drivers/net/ethernet/cavium/liquidio/lio_main.c

   1 /**********************************************************************
   2  * Author: Cavium, Inc.
   3  *
   4  * Contact: support@cavium.com
   5  *          Please include "LiquidIO" in the subject.
   6  *
   7  * Copyright (c) 2003-2016 Cavium, Inc.
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more details.
  17  ***********************************************************************/
  18 #include <linux/module.h>
  19 #include <linux/pci.h>
  20 #include <linux/firmware.h>
  21 #include <net/vxlan.h>
  22 #include <linux/kthread.h>
  23 #include "liquidio_common.h"
  24 #include "octeon_droq.h"
  25 #include "octeon_iq.h"
  26 #include "response_manager.h"
  27 #include "octeon_device.h"
  28 #include "octeon_nic.h"
  29 #include "octeon_main.h"
  30 #include "octeon_network.h"
  31 #include "cn66xx_regs.h"
  32 #include "cn66xx_device.h"
  33 #include "cn68xx_device.h"
  34 #include "cn23xx_pf_device.h"
  35 #include "liquidio_image.h"
  36
  37 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>");
  38 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver");
  39 MODULE_LICENSE("GPL");
  40 MODULE_VERSION(LIQUIDIO_VERSION);
  41 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME LIO_FW_NAME_SUFFIX);
  42 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME LIO_FW_NAME_SUFFIX);
  43 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME LIO_FW_NAME_SUFFIX);
  44 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME LIO_FW_NAME_SUFFIX);
  45
  46 static int ddr_timeout = 10000;
  47 module_param(ddr_timeout, int, 0644);
  48 MODULE_PARM_DESC(ddr_timeout,
  49                  "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check");
  50
  51 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
  52
  53 static int debug = -1;
  54 module_param(debug, int, 0644);
  55 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits");
  56
  57 static char fw_type[LIO_MAX_FW_TYPE_LEN];
  58 module_param_string(fw_type, fw_type, sizeof(fw_type), 0000);
  59 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded. Default \"nic\"");
  60
  61 static int ptp_enable = 1;
  62
  63 /* Bit mask values for lio->ifstate */
  64 #define   LIO_IFSTATE_DROQ_OPS             0x01
  65 #define   LIO_IFSTATE_REGISTERED           0x02
  66 #define   LIO_IFSTATE_RUNNING              0x04
  67 #define   LIO_IFSTATE_RX_TIMESTAMP_ENABLED 0x08
  68
  69 /* Polling interval for determining when NIC application is alive */
  70 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100
  71
  72 /* runtime link query interval */
  73 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS         1000
  74
  75 struct liquidio_if_cfg_context {
  76         int octeon_id;
  77
  78         wait_queue_head_t wc;
  79
  80         int cond;
  81 };
  82
  83 struct liquidio_if_cfg_resp {
  84         u64 rh;
  85         struct liquidio_if_cfg_info cfg_info;
  86         u64 status;
  87 };
  88
  89 struct liquidio_rx_ctl_context {
  90         int octeon_id;
  91
  92         wait_queue_head_t wc;
  93
  94         int cond;
  95 };
  96
  97 struct oct_link_status_resp {
  98         u64 rh;
  99         struct oct_link_info link_info;
 100         u64 status;
 101 };
 102
 103 struct oct_timestamp_resp {
 104         u64 rh;
 105         u64 timestamp;
 106         u64 status;
 107 };
 108
 109 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp))
 110
 111 union tx_info {
 112         u64 u64;
 113         struct {
 114 #ifdef __BIG_ENDIAN_BITFIELD
 115                 u16 gso_size;
 116                 u16 gso_segs;
 117                 u32 reserved;
 118 #else
 119                 u32 reserved;
 120                 u16 gso_segs;
 121                 u16 gso_size;
 122 #endif
 123         } s;
 124 };
 125
 126 /** Octeon device properties to be used by the NIC module.
 127  * Each octeon device in the system will be represented
 128  * by this structure in the NIC module.
 129  */
 130
 131 #define OCTNIC_MAX_SG  (MAX_SKB_FRAGS)
 132
 133 #define OCTNIC_GSO_MAX_HEADER_SIZE 128
 134 #define OCTNIC_GSO_MAX_SIZE                                                    \
 135         (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE)
 136
 137 /** Structure of a node in list of gather components maintained by
 138  * NIC driver for each network device.
 139  */
 140 struct octnic_gather {
 141         /** List manipulation. Next and prev pointers. */
 142         struct list_head list;
 143
 144         /** Size of the gather component at sg in bytes. */
 145         int sg_size;
 146
 147         /** Number of bytes that sg was adjusted to make it 8B-aligned. */
 148         int adjust;
 149
 150         /** Gather component that can accommodate max sized fragment list
 151          *  received from the IP layer.
 152          */
 153         struct octeon_sg_entry *sg;
 154
 155         dma_addr_t sg_dma_ptr;
 156 };
 157
 158 struct handshake {
 159         struct completion init;
 160         struct completion started;
 161         struct pci_dev *pci_dev;
 162         int init_ok;
 163         int started_ok;
 164 };
 165
 166 struct octeon_device_priv {
 167         /** Tasklet structures for this device. */
 168         struct tasklet_struct droq_tasklet;
 169         unsigned long napi_mask;
 170 };
 171
 172 #ifdef CONFIG_PCI_IOV
 173 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs);
 174 #endif
 175
 176 static int octeon_device_init(struct octeon_device *);
 177 static int liquidio_stop(struct net_device *netdev);
 178 static void liquidio_remove(struct pci_dev *pdev);
 179 static int liquidio_probe(struct pci_dev *pdev,
 180                           const struct pci_device_id *ent);
 181
 182 static struct handshake handshake[MAX_OCTEON_DEVICES];
 183 static struct completion first_stage;
 184
 185 static void octeon_droq_bh(unsigned long pdev)
 186 {
 187         int q_no;
 188         int reschedule = 0;
 189         struct octeon_device *oct = (struct octeon_device *)pdev;
 190         struct octeon_device_priv *oct_priv =
 191                 (struct octeon_device_priv *)oct->priv;
 192
 193         for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) {
 194                 if (!(oct->io_qmask.oq & BIT_ULL(q_no)))
 195                         continue;
 196                 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no],
 197                                                           MAX_PACKET_BUDGET);
 198                 lio_enable_irq(oct->droq[q_no], NULL);
 199
 200                 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
 201                         /* set time and cnt interrupt thresholds for this DROQ
 202                          * for NAPI
 203                          */
 204                         int adjusted_q_no = q_no + oct->sriov_info.pf_srn;
 205
 206                         octeon_write_csr64(
 207                             oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no),
 208                             0x5700000040ULL);
 209                         octeon_write_csr64(
 210                             oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0);
 211                 }
 212         }
 213
 214         if (reschedule)
 215                 tasklet_schedule(&oct_priv->droq_tasklet);
 216 }
 217
 218 static int lio_wait_for_oq_pkts(struct octeon_device *oct)
 219 {
 220         struct octeon_device_priv *oct_priv =
 221                 (struct octeon_device_priv *)oct->priv;
 222         int retry = 100, pkt_cnt = 0, pending_pkts = 0;
 223         int i;
 224
 225         do {
 226                 pending_pkts = 0;
 227
 228                 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
 229                         if (!(oct->io_qmask.oq & BIT_ULL(i)))
 230                                 continue;
 231                         pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]);
 232                 }
 233                 if (pkt_cnt > 0) {
 234                         pending_pkts += pkt_cnt;
 235                         tasklet_schedule(&oct_priv->droq_tasklet);
 236                 }
 237                 pkt_cnt = 0;
 238                 schedule_timeout_uninterruptible(1);
 239
 240         } while (retry-- && pending_pkts);
 241
 242         return pkt_cnt;
 243 }
 244
 245 /**
 246  * \brief Forces all IO queues off on a given device
 247  * @param oct Pointer to Octeon device
 248  */
 249 static void force_io_queues_off(struct octeon_device *oct)
 250 {
 251         if ((oct->chip_id == OCTEON_CN66XX) ||
 252             (oct->chip_id == OCTEON_CN68XX)) {
 253                 /* Reset the Enable bits for Input Queues. */
 254                 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0);
 255
 256                 /* Reset the Enable bits for Output Queues. */
 257                 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0);
 258         }
 259 }
 260
 261 /**
 262  * \brief wait for all pending requests to complete
 263  * @param oct Pointer to Octeon device
 264  *
 265  * Called during shutdown sequence
 266  */
 267 static int wait_for_pending_requests(struct octeon_device *oct)
 268 {
 269         int i, pcount = 0;
 270
 271         for (i = 0; i < 100; i++) {
 272                 pcount =
 273                         atomic_read(&oct->response_list
 274                                 [OCTEON_ORDERED_SC_LIST].pending_req_count);
 275                 if (pcount)
 276                         schedule_timeout_uninterruptible(HZ / 10);
 277                 else
 278                         break;
 279         }
 280
 281         if (pcount)
 282                 return 1;
 283
 284         return 0;
 285 }
 286
 287 /**
 288  * \brief Cause device to go quiet so it can be safely removed/reset/etc
 289  * @param oct Pointer to Octeon device
 290  */
 291 static inline void pcierror_quiesce_device(struct octeon_device *oct)
 292 {
 293         int i;
 294
 295         /* Disable the input and output queues now. No more packets will
 296          * arrive from Octeon, but we should wait for all packet processing
 297          * to finish.
 298          */
 299         force_io_queues_off(oct);
 300
 301         /* To allow for in-flight requests */
 302         schedule_timeout_uninterruptible(100);
 303
 304         if (wait_for_pending_requests(oct))
 305                 dev_err(&oct->pci_dev->dev, "There were pending requests\n");
 306
 307         /* Force all requests waiting to be fetched by OCTEON to complete. */
 308         for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
 309                 struct octeon_instr_queue *iq;
 310
 311                 if (!(oct->io_qmask.iq & BIT_ULL(i)))
 312                         continue;
 313                 iq = oct->instr_queue[i];
 314
 315                 if (atomic_read(&iq->instr_pending)) {
 316                         spin_lock_bh(&iq->lock);
 317                         iq->fill_cnt = 0;
 318                         iq->octeon_read_index = iq->host_write_index;
 319                         iq->stats.instr_processed +=
 320                                 atomic_read(&iq->instr_pending);
 321                         lio_process_iq_request_list(oct, iq, 0);
 322                         spin_unlock_bh(&iq->lock);
 323                 }
 324         }
 325
 326         /* Force all pending ordered list requests to time out. */
 327         lio_process_ordered_list(oct, 1);
 328
 329         /* We do not need to wait for output queue packets to be processed. */
 330 }
 331
 332 /**
 333  * \brief Cleanup PCI AER uncorrectable error status
 334  * @param dev Pointer to PCI device
 335  */
 336 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
 337 {
 338         int pos = 0x100;
 339         u32 status, mask;
 340
 341         pr_info("%s :\n", __func__);
 342
 343         pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
 344         pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
 345         if (dev->error_state == pci_channel_io_normal)
 346                 status &= ~mask;        /* Clear corresponding nonfatal bits */
 347         else
 348                 status &= mask;         /* Clear corresponding fatal bits */
 349         pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
 350 }
 351
 352 /**
 353  * \brief Stop all PCI IO to a given device
 354  * @param dev Pointer to Octeon device
 355  */
 356 static void stop_pci_io(struct octeon_device *oct)
 357 {
 358         /* No more instructions will be forwarded. */
 359         atomic_set(&oct->status, OCT_DEV_IN_RESET);
 360
 361         pci_disable_device(oct->pci_dev);
 362
 363         /* Disable interrupts  */
 364         oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
 365
 366         pcierror_quiesce_device(oct);
 367
 368         /* Release the interrupt line */
 369         free_irq(oct->pci_dev->irq, oct);
 370
 371         if (oct->flags & LIO_FLAG_MSI_ENABLED)
 372                 pci_disable_msi(oct->pci_dev);
 373
 374         dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
 375                 lio_get_state_string(&oct->status));
 376
 377         /* making it a common function for all OCTEON models */
 378         cleanup_aer_uncorrect_error_status(oct->pci_dev);
 379 }
 380
 381 /**
 382  * \brief called when PCI error is detected
 383  * @param pdev Pointer to PCI device
 384  * @param state The current pci connection state
 385  *
 386  * This function is called after a PCI bus error affecting
 387  * this device has been detected.
 388  */
 389 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev,
 390                                                      pci_channel_state_t state)
 391 {
 392         struct octeon_device *oct = pci_get_drvdata(pdev);
 393
 394         /* Non-correctable Non-fatal errors */
 395         if (state == pci_channel_io_normal) {
 396                 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n");
 397                 cleanup_aer_uncorrect_error_status(oct->pci_dev);
 398                 return PCI_ERS_RESULT_CAN_RECOVER;
 399         }
 400
 401         /* Non-correctable Fatal errors */
 402         dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n");
 403         stop_pci_io(oct);
 404
 405         /* Always return a DISCONNECT. There is no support for recovery but only
 406          * for a clean shutdown.
 407          */
 408         return PCI_ERS_RESULT_DISCONNECT;
 409 }
 410
 411 /**
 412  * \brief mmio handler
 413  * @param pdev Pointer to PCI device
 414  */
 415 static pci_ers_result_t liquidio_pcie_mmio_enabled(
 416                                 struct pci_dev *pdev __attribute__((unused)))
 417 {
 418         /* We should never hit this since we never ask for a reset for a Fatal
 419          * Error. We always return DISCONNECT in io_error above.
 420          * But play safe and return RECOVERED for now.
 421          */
 422         return PCI_ERS_RESULT_RECOVERED;
 423 }
 424
 425 /**
 426  * \brief called after the pci bus has been reset.
 427  * @param pdev Pointer to PCI device
 428  *
 429  * Restart the card from scratch, as if from a cold-boot. Implementation
 430  * resembles the first-half of the octeon_resume routine.
 431  */
 432 static pci_ers_result_t liquidio_pcie_slot_reset(
 433                                 struct pci_dev *pdev __attribute__((unused)))
 434 {
 435         /* We should never hit this since we never ask for a reset for a Fatal
 436          * Error. We always return DISCONNECT in io_error above.
 437          * But play safe and return RECOVERED for now.
 438          */
 439         return PCI_ERS_RESULT_RECOVERED;
 440 }
 441
 442 /**
 443  * \brief called when traffic can start flowing again.
 444  * @param pdev Pointer to PCI device
 445  *
 446  * This callback is called when the error recovery driver tells us that
 447  * its OK to resume normal operation. Implementation resembles the
 448  * second-half of the octeon_resume routine.
 449  */
 450 static void liquidio_pcie_resume(struct pci_dev *pdev __attribute__((unused)))
 451 {
 452         /* Nothing to be done here. */
 453 }
 454
 455 #ifdef CONFIG_PM
 456 /**
 457  * \brief called when suspending
 458  * @param pdev Pointer to PCI device
 459  * @param state state to suspend to
 460  */
 461 static int liquidio_suspend(struct pci_dev *pdev __attribute__((unused)),
 462                             pm_message_t state __attribute__((unused)))
 463 {
 464         return 0;
 465 }
 466
 467 /**
 468  * \brief called when resuming
 469  * @param pdev Pointer to PCI device
 470  */
 471 static int liquidio_resume(struct pci_dev *pdev __attribute__((unused)))
 472 {
 473         return 0;
 474 }
 475 #endif
 476
 477 /* For PCI-E Advanced Error Recovery (AER) Interface */
 478 static const struct pci_error_handlers liquidio_err_handler = {
 479         .error_detected = liquidio_pcie_error_detected,
 480         .mmio_enabled   = liquidio_pcie_mmio_enabled,
 481         .slot_reset     = liquidio_pcie_slot_reset,
 482         .resume         = liquidio_pcie_resume,
 483 };
 484
 485 static const struct pci_device_id liquidio_pci_tbl[] = {
 486         {       /* 68xx */
 487                 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
 488         },
 489         {       /* 66xx */
 490                 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
 491         },
 492         {       /* 23xx pf */
 493                 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
 494         },
 495         {
 496                 0, 0, 0, 0, 0, 0, 0
 497         }
 498 };
 499 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl);
 500
 501 static struct pci_driver liquidio_pci_driver = {
 502         .name           = "LiquidIO",
 503         .id_table       = liquidio_pci_tbl,
 504         .probe          = liquidio_probe,
 505         .remove         = liquidio_remove,
 506         .err_handler    = &liquidio_err_handler,    /* For AER */
 507
 508 #ifdef CONFIG_PM
 509         .suspend        = liquidio_suspend,
 510         .resume         = liquidio_resume,
 511 #endif
 512 #ifdef CONFIG_PCI_IOV
 513         .sriov_configure = liquidio_enable_sriov,
 514 #endif
 515 };
 516
 517 /**
 518  * \brief register PCI driver
 519  */
 520 static int liquidio_init_pci(void)
 521 {
 522         return pci_register_driver(&liquidio_pci_driver);
 523 }
 524
 525 /**
 526  * \brief unregister PCI driver
 527  */
 528 static void liquidio_deinit_pci(void)
 529 {
 530         pci_unregister_driver(&liquidio_pci_driver);
 531 }
 532
 533 /**
 534  * \brief check interface state
 535  * @param lio per-network private data
 536  * @param state_flag flag state to check
 537  */
 538 static inline int ifstate_check(struct lio *lio, int state_flag)
 539 {
 540         return atomic_read(&lio->ifstate) & state_flag;
 541 }
 542
 543 /**
 544  * \brief set interface state
 545  * @param lio per-network private data
 546  * @param state_flag flag state to set
 547  */
 548 static inline void ifstate_set(struct lio *lio, int state_flag)
 549 {
 550         atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) | state_flag));
 551 }
 552
 553 /**
 554  * \brief clear interface state
 555  * @param lio per-network private data
 556  * @param state_flag flag state to clear
 557  */
 558 static inline void ifstate_reset(struct lio *lio, int state_flag)
 559 {
 560         atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) & ~(state_flag)));
 561 }
 562
 563 /**
 564  * \brief Stop Tx queues
 565  * @param netdev network device
 566  */
 567 static inline void txqs_stop(struct net_device *netdev)
 568 {
 569         if (netif_is_multiqueue(netdev)) {
 570                 int i;
 571
 572                 for (i = 0; i < netdev->num_tx_queues; i++)
 573                         netif_stop_subqueue(netdev, i);
 574         } else {
 575                 netif_stop_queue(netdev);
 576         }
 577 }
 578
 579 /**
 580  * \brief Start Tx queues
 581  * @param netdev network device
 582  */
 583 static inline void txqs_start(struct net_device *netdev)
 584 {
 585         if (netif_is_multiqueue(netdev)) {
 586                 int i;
 587
 588                 for (i = 0; i < netdev->num_tx_queues; i++)
 589                         netif_start_subqueue(netdev, i);
 590         } else {
 591                 netif_start_queue(netdev);
 592         }
 593 }
 594
 595 /**
 596  * \brief Wake Tx queues
 597  * @param netdev network device
 598  */
 599 static inline void txqs_wake(struct net_device *netdev)
 600 {
 601         struct lio *lio = GET_LIO(netdev);
 602
 603         if (netif_is_multiqueue(netdev)) {
 604                 int i;
 605
 606                 for (i = 0; i < netdev->num_tx_queues; i++) {
 607                         int qno = lio->linfo.txpciq[i %
 608                                 (lio->linfo.num_txpciq)].s.q_no;
 609
 610                         if (__netif_subqueue_stopped(netdev, i)) {
 611                                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno,
 612                                                           tx_restart, 1);
 613                                 netif_wake_subqueue(netdev, i);
 614                         }
 615                 }
 616         } else {
 617                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
 618                                           tx_restart, 1);
 619                 netif_wake_queue(netdev);
 620         }
 621 }
 622
 623 /**
 624  * \brief Stop Tx queue
 625  * @param netdev network device
 626  */
 627 static void stop_txq(struct net_device *netdev)
 628 {
 629         txqs_stop(netdev);
 630 }
 631
 632 /**
 633  * \brief Start Tx queue
 634  * @param netdev network device
 635  */
 636 static void start_txq(struct net_device *netdev)
 637 {
 638         struct lio *lio = GET_LIO(netdev);
 639
 640         if (lio->linfo.link.s.link_up) {
 641                 txqs_start(netdev);
 642                 return;
 643         }
 644 }
 645
 646 /**
 647  * \brief Wake a queue
 648  * @param netdev network device
 649  * @param q which queue to wake
 650  */
 651 static inline void wake_q(struct net_device *netdev, int q)
 652 {
 653         if (netif_is_multiqueue(netdev))
 654                 netif_wake_subqueue(netdev, q);
 655         else
 656                 netif_wake_queue(netdev);
 657 }
 658
 659 /**
 660  * \brief Stop a queue
 661  * @param netdev network device
 662  * @param q which queue to stop
 663  */
 664 static inline void stop_q(struct net_device *netdev, int q)
 665 {
 666         if (netif_is_multiqueue(netdev))
 667                 netif_stop_subqueue(netdev, q);
 668         else
 669                 netif_stop_queue(netdev);
 670 }
 671
 672 /**
 673  * \brief Check Tx queue status, and take appropriate action
 674  * @param lio per-network private data
 675  * @returns 0 if full, number of queues woken up otherwise
 676  */
 677 static inline int check_txq_status(struct lio *lio)
 678 {
 679         int ret_val = 0;
 680
 681         if (netif_is_multiqueue(lio->netdev)) {
 682                 int numqs = lio->netdev->num_tx_queues;
 683                 int q, iq = 0;
 684
 685                 /* check each sub-queue state */
 686                 for (q = 0; q < numqs; q++) {
 687                         iq = lio->linfo.txpciq[q %
 688                                 (lio->linfo.num_txpciq)].s.q_no;
 689                         if (octnet_iq_is_full(lio->oct_dev, iq))
 690                                 continue;
 691                         if (__netif_subqueue_stopped(lio->netdev, q)) {
 692                                 wake_q(lio->netdev, q);
 693                                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq,
 694                                                           tx_restart, 1);
 695                                 ret_val++;
 696                         }
 697                 }
 698         } else {
 699                 if (octnet_iq_is_full(lio->oct_dev, lio->txq))
 700                         return 0;
 701                 wake_q(lio->netdev, lio->txq);
 702                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
 703                                           tx_restart, 1);
 704                 ret_val = 1;
 705         }
 706         return ret_val;
 707 }
 708
 709 /**
 710  * Remove the node at the head of the list. The list would be empty at
 711  * the end of this call if there are no more nodes in the list.
 712  */
 713 static inline struct list_head *list_delete_head(struct list_head *root)
 714 {
 715         struct list_head *node;
 716
 717         if ((root->prev == root) && (root->next == root))
 718                 node = NULL;
 719         else
 720                 node = root->next;
 721
 722         if (node)
 723                 list_del(node);
 724
 725         return node;
 726 }
 727
 728 /**
 729  * \brief Delete gather lists
 730  * @param lio per-network private data
 731  */
 732 static void delete_glists(struct lio *lio)
 733 {
 734         struct octnic_gather *g;
 735         int i;
 736
 737         kfree(lio->glist_lock);
 738         lio->glist_lock = NULL;
 739
 740         if (!lio->glist)
 741                 return;
 742
 743         for (i = 0; i < lio->linfo.num_txpciq; i++) {
 744                 do {
 745                         g = (struct octnic_gather *)
 746                                 list_delete_head(&lio->glist[i]);
 747                         if (g)
 748                                 kfree(g);
 749                 } while (g);
 750
 751                 if (lio->glists_virt_base && lio->glists_virt_base[i]) {
 752                         lio_dma_free(lio->oct_dev,
 753                                      lio->glist_entry_size * lio->tx_qsize,
 754                                      lio->glists_virt_base[i],
 755                                      lio->glists_dma_base[i]);
 756                 }
 757         }
 758
 759         kfree(lio->glists_virt_base);
 760         lio->glists_virt_base = NULL;
 761
 762         kfree(lio->glists_dma_base);
 763         lio->glists_dma_base = NULL;
 764
 765         kfree(lio->glist);
 766         lio->glist = NULL;
 767 }
 768
 769 /**
 770  * \brief Setup gather lists
 771  * @param lio per-network private data
 772  */
 773 static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs)
 774 {
 775         int i, j;
 776         struct octnic_gather *g;
 777
 778         lio->glist_lock = kcalloc(num_iqs, sizeof(*lio->glist_lock),
 779                                   GFP_KERNEL);
 780         if (!lio->glist_lock)
 781                 return -ENOMEM;
 782
 783         lio->glist = kcalloc(num_iqs, sizeof(*lio->glist),
 784                              GFP_KERNEL);
 785         if (!lio->glist) {
 786                 kfree(lio->glist_lock);
 787                 lio->glist_lock = NULL;
 788                 return -ENOMEM;
 789         }
 790
 791         lio->glist_entry_size =
 792                 ROUNDUP8((ROUNDUP4(OCTNIC_MAX_SG) >> 2) * OCT_SG_ENTRY_SIZE);
 793
 794         /* allocate memory to store virtual and dma base address of
 795          * per glist consistent memory
 796          */
 797         lio->glists_virt_base = kcalloc(num_iqs, sizeof(*lio->glists_virt_base),
 798                                         GFP_KERNEL);
 799         lio->glists_dma_base = kcalloc(num_iqs, sizeof(*lio->glists_dma_base),
 800                                        GFP_KERNEL);
 801
 802         if (!lio->glists_virt_base || !lio->glists_dma_base) {
 803                 delete_glists(lio);
 804                 return -ENOMEM;
 805         }
 806
 807         for (i = 0; i < num_iqs; i++) {
 808                 int numa_node = cpu_to_node(i % num_online_cpus());
 809
 810                 spin_lock_init(&lio->glist_lock[i]);
 811
 812                 INIT_LIST_HEAD(&lio->glist[i]);
 813
 814                 lio->glists_virt_base[i] =
 815                         lio_dma_alloc(oct,
 816                                       lio->glist_entry_size * lio->tx_qsize,
 817                                       &lio->glists_dma_base[i]);
 818
 819                 if (!lio->glists_virt_base[i]) {
 820                         delete_glists(lio);
 821                         return -ENOMEM;
 822                 }
 823
 824                 for (j = 0; j < lio->tx_qsize; j++) {
 825                         g = kzalloc_node(sizeof(*g), GFP_KERNEL,
 826                                          numa_node);
 827                         if (!g)
 828                                 g = kzalloc(sizeof(*g), GFP_KERNEL);
 829                         if (!g)
 830                                 break;
 831
 832                         g->sg = lio->glists_virt_base[i] +
 833                                 (j * lio->glist_entry_size);
 834
 835                         g->sg_dma_ptr = lio->glists_dma_base[i] +
 836                                         (j * lio->glist_entry_size);
 837
 838                         list_add_tail(&g->list, &lio->glist[i]);
 839                 }
 840
 841                 if (j != lio->tx_qsize) {
 842                         delete_glists(lio);
 843                         return -ENOMEM;
 844                 }
 845         }
 846
 847         return 0;
 848 }
 849
 850 /**
 851  * \brief Print link information
 852  * @param netdev network device
 853  */
 854 static void print_link_info(struct net_device *netdev)
 855 {
 856         struct lio *lio = GET_LIO(netdev);
 857
 858         if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) {
 859                 struct oct_link_info *linfo = &lio->linfo;
 860
 861                 if (linfo->link.s.link_up) {
 862                         netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n",
 863                                    linfo->link.s.speed,
 864                                    (linfo->link.s.duplex) ? "Full" : "Half");
 865                 } else {
 866                         netif_info(lio, link, lio->netdev, "Link Down\n");
 867                 }
 868         }
 869 }
 870
 871 /**
 872  * \brief Routine to notify MTU change
 873  * @param work work_struct data structure
 874  */
 875 static void octnet_link_status_change(struct work_struct *work)
 876 {
 877         struct cavium_wk *wk = (struct cavium_wk *)work;
 878         struct lio *lio = (struct lio *)wk->ctxptr;
 879
 880         rtnl_lock();
 881         call_netdevice_notifiers(NETDEV_CHANGEMTU, lio->netdev);
 882         rtnl_unlock();
 883 }
 884
 885 /**
 886  * \brief Sets up the mtu status change work
 887  * @param netdev network device
 888  */
 889 static inline int setup_link_status_change_wq(struct net_device *netdev)
 890 {
 891         struct lio *lio = GET_LIO(netdev);
 892         struct octeon_device *oct = lio->oct_dev;
 893
 894         lio->link_status_wq.wq = alloc_workqueue("link-status",
 895                                                  WQ_MEM_RECLAIM, 0);
 896         if (!lio->link_status_wq.wq) {
 897                 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n");
 898                 return -1;
 899         }
 900         INIT_DELAYED_WORK(&lio->link_status_wq.wk.work,
 901                           octnet_link_status_change);
 902         lio->link_status_wq.wk.ctxptr = lio;
 903
 904         return 0;
 905 }
 906
 907 static inline void cleanup_link_status_change_wq(struct net_device *netdev)
 908 {
 909         struct lio *lio = GET_LIO(netdev);
 910
 911         if (lio->link_status_wq.wq) {
 912                 cancel_delayed_work_sync(&lio->link_status_wq.wk.work);
 913                 destroy_workqueue(lio->link_status_wq.wq);
 914         }
 915 }
 916
 917 /**
 918  * \brief Update link status
 919  * @param netdev network device
 920  * @param ls link status structure
 921  *
 922  * Called on receipt of a link status response from the core application to
 923  * update each interface's link status.
 924  */
 925 static inline void update_link_status(struct net_device *netdev,
 926                                       union oct_link_status *ls)
 927 {
 928         struct lio *lio = GET_LIO(netdev);
 929         int changed = (lio->linfo.link.u64 != ls->u64);
 930
 931         lio->linfo.link.u64 = ls->u64;
 932
 933         if ((lio->intf_open) && (changed)) {
 934                 print_link_info(netdev);
 935                 lio->link_changes++;
 936
 937                 if (lio->linfo.link.s.link_up) {
 938                         netif_carrier_on(netdev);
 939                         txqs_wake(netdev);
 940                 } else {
 941                         netif_carrier_off(netdev);
 942                         stop_txq(netdev);
 943                 }
 944         }
 945 }
 946
 947 /* Runs in interrupt context. */
 948 static void update_txq_status(struct octeon_device *oct, int iq_num)
 949 {
 950         struct net_device *netdev;
 951         struct lio *lio;
 952         struct octeon_instr_queue *iq = oct->instr_queue[iq_num];
 953
 954         netdev = oct->props[iq->ifidx].netdev;
 955
 956         /* This is needed because the first IQ does not have
 957          * a netdev associated with it.
 958          */
 959         if (!netdev)
 960                 return;
 961
 962         lio = GET_LIO(netdev);
 963         if (netif_is_multiqueue(netdev)) {
 964                 if (__netif_subqueue_stopped(netdev, iq->q_index) &&
 965                     lio->linfo.link.s.link_up &&
 966                     (!octnet_iq_is_full(oct, iq_num))) {
 967                         INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq_num,
 968                                                   tx_restart, 1);
 969                         netif_wake_subqueue(netdev, iq->q_index);
 970                 } else {
 971                         if (!octnet_iq_is_full(oct, lio->txq)) {
 972                                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev,
 973                                                           lio->txq,
 974                                                           tx_restart, 1);
 975                                 wake_q(netdev, lio->txq);
 976                         }
 977                 }
 978         }
 979 }
 980
 981 static
 982 int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret)
 983 {
 984         struct octeon_device *oct = droq->oct_dev;
 985         struct octeon_device_priv *oct_priv =
 986             (struct octeon_device_priv *)oct->priv;
 987
 988         if (droq->ops.poll_mode) {
 989                 droq->ops.napi_fn(droq);
 990         } else {
 991                 if (ret & MSIX_PO_INT) {
 992                         tasklet_schedule(&oct_priv->droq_tasklet);
 993                         return 1;
 994                 }
 995                 /* this will be flushed periodically by check iq db */
 996                 if (ret & MSIX_PI_INT)
 997                         return 0;
 998         }
 999         return 0;
1000 }
1001
1002 /**
1003  * \brief Droq packet processor sceduler
1004  * @param oct octeon device
1005  */
1006 static void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
1007 {
1008         struct octeon_device_priv *oct_priv =
1009                 (struct octeon_device_priv *)oct->priv;
1010         u64 oq_no;
1011         struct octeon_droq *droq;
1012
1013         if (oct->int_status & OCT_DEV_INTR_PKT_DATA) {
1014                 for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct);
1015                      oq_no++) {
1016                         if (!(oct->droq_intr & BIT_ULL(oq_no)))
1017                                 continue;
1018
1019                         droq = oct->droq[oq_no];
1020
1021                         if (droq->ops.poll_mode) {
1022                                 droq->ops.napi_fn(droq);
1023                                 oct_priv->napi_mask |= (1 << oq_no);
1024                         } else {
1025                                 tasklet_schedule(&oct_priv->droq_tasklet);
1026                         }
1027                 }
1028         }
1029 }
1030
1031 static irqreturn_t
1032 liquidio_msix_intr_handler(int irq __attribute__((unused)), void *dev)
1033 {
1034         u64 ret;
1035         struct octeon_ioq_vector *ioq_vector = (struct octeon_ioq_vector *)dev;
1036         struct octeon_device *oct = ioq_vector->oct_dev;
1037         struct octeon_droq *droq = oct->droq[ioq_vector->droq_index];
1038
1039         ret = oct->fn_list.msix_interrupt_handler(ioq_vector);
1040
1041         if ((ret & MSIX_PO_INT) || (ret & MSIX_PI_INT))
1042                 liquidio_schedule_msix_droq_pkt_handler(droq, ret);
1043
1044         return IRQ_HANDLED;
1045 }
1046
1047 /**
1048  * \brief Interrupt handler for octeon
1049  * @param irq unused
1050  * @param dev octeon device
1051  */
1052 static
1053 irqreturn_t liquidio_legacy_intr_handler(int irq __attribute__((unused)),
1054                                          void *dev)
1055 {
1056         struct octeon_device *oct = (struct octeon_device *)dev;
1057         irqreturn_t ret;
1058
1059         /* Disable our interrupts for the duration of ISR */
1060         oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1061
1062         ret = oct->fn_list.process_interrupt_regs(oct);
1063
1064         if (ret == IRQ_HANDLED)
1065                 liquidio_schedule_droq_pkt_handlers(oct);
1066
1067         /* Re-enable our interrupts  */
1068         if (!(atomic_read(&oct->status) == OCT_DEV_IN_RESET))
1069                 oct->fn_list.enable_interrupt(oct, OCTEON_ALL_INTR);
1070
1071         return ret;
1072 }
1073
1074 /**
1075  * \brief Setup interrupt for octeon device
1076  * @param oct octeon device
1077  *
1078  *  Enable interrupt in Octeon device as given in the PCI interrupt mask.
1079  */
1080 static int octeon_setup_interrupt(struct octeon_device *oct)
1081 {
1082         int irqret, err;
1083         struct msix_entry *msix_entries;
1084         int i;
1085         int num_ioq_vectors;
1086         int num_alloc_ioq_vectors;
1087
1088         if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
1089                 oct->num_msix_irqs = oct->sriov_info.num_pf_rings;
1090                 /* one non ioq interrupt for handling sli_mac_pf_int_sum */
1091                 oct->num_msix_irqs += 1;
1092
1093                 oct->msix_entries = kcalloc(
1094                     oct->num_msix_irqs, sizeof(struct msix_entry), GFP_KERNEL);
1095                 if (!oct->msix_entries)
1096                         return 1;
1097
1098                 msix_entries = (struct msix_entry *)oct->msix_entries;
1099                 /*Assumption is that pf msix vectors start from pf srn to pf to
1100                  * trs and not from 0. if not change this code
1101                  */
1102                 for (i = 0; i < oct->num_msix_irqs - 1; i++)
1103                         msix_entries[i].entry = oct->sriov_info.pf_srn + i;
1104                 msix_entries[oct->num_msix_irqs - 1].entry =
1105                     oct->sriov_info.trs;
1106                 num_alloc_ioq_vectors = pci_enable_msix_range(
1107                                                 oct->pci_dev, msix_entries,
1108                                                 oct->num_msix_irqs,
1109                                                 oct->num_msix_irqs);
1110                 if (num_alloc_ioq_vectors < 0) {
1111                         dev_err(&oct->pci_dev->dev, "unable to Allocate MSI-X interrupts\n");
1112                         kfree(oct->msix_entries);
1113                         oct->msix_entries = NULL;
1114                         return 1;
1115                 }
1116                 dev_dbg(&oct->pci_dev->dev, "OCTEON: Enough MSI-X interrupts are allocated...\n");
1117
1118                 num_ioq_vectors = oct->num_msix_irqs;
1119
1120                 /** For PF, there is one non-ioq interrupt handler */
1121                 num_ioq_vectors -= 1;
1122                 irqret = request_irq(msix_entries[num_ioq_vectors].vector,
1123                                      liquidio_legacy_intr_handler, 0, "octeon",
1124                                      oct);
1125                 if (irqret) {
1126                         dev_err(&oct->pci_dev->dev,
1127                                 "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1128                                 irqret);
1129                         pci_disable_msix(oct->pci_dev);
1130                         kfree(oct->msix_entries);
1131                         oct->msix_entries = NULL;
1132                         return 1;
1133                 }
1134
1135                 for (i = 0; i < num_ioq_vectors; i++) {
1136                         irqret = request_irq(msix_entries[i].vector,
1137                                              liquidio_msix_intr_handler, 0,
1138                                              "octeon", &oct->ioq_vector[i]);
1139                         if (irqret) {
1140                                 dev_err(&oct->pci_dev->dev,
1141                                         "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1142                                         irqret);
1143                                 /** Freeing the non-ioq irq vector here . */
1144                                 free_irq(msix_entries[num_ioq_vectors].vector,
1145                                          oct);
1146
1147                                 while (i) {
1148                                         i--;
1149                                         /** clearing affinity mask. */
1150                                         irq_set_affinity_hint(
1151                                                 msix_entries[i].vector, NULL);
1152                                         free_irq(msix_entries[i].vector,
1153                                                  &oct->ioq_vector[i]);
1154                                 }
1155                                 pci_disable_msix(oct->pci_dev);
1156                                 kfree(oct->msix_entries);
1157                                 oct->msix_entries = NULL;
1158                                 return 1;
1159                         }
1160                         oct->ioq_vector[i].vector = msix_entries[i].vector;
1161                         /* assign the cpu mask for this msix interrupt vector */
1162                         irq_set_affinity_hint(
1163                                         msix_entries[i].vector,
1164                                         (&oct->ioq_vector[i].affinity_mask));
1165                 }
1166                 dev_dbg(&oct->pci_dev->dev, "OCTEON[%d]: MSI-X enabled\n",
1167                         oct->octeon_id);
1168         } else {
1169                 err = pci_enable_msi(oct->pci_dev);
1170                 if (err)
1171                         dev_warn(&oct->pci_dev->dev, "Reverting to legacy interrupts. Error: %d\n",
1172                                  err);
1173                 else
1174                         oct->flags |= LIO_FLAG_MSI_ENABLED;
1175
1176                 irqret = request_irq(oct->pci_dev->irq,
1177                                      liquidio_legacy_intr_handler, IRQF_SHARED,
1178                                      "octeon", oct);
1179                 if (irqret) {
1180                         if (oct->flags & LIO_FLAG_MSI_ENABLED)
1181                                 pci_disable_msi(oct->pci_dev);
1182                         dev_err(&oct->pci_dev->dev, "Request IRQ failed with code: %d\n",
1183                                 irqret);
1184                         return 1;
1185                 }
1186         }
1187         return 0;
1188 }
1189
1190 static int liquidio_watchdog(void *param)
1191 {
1192         u64 wdog;
1193         u16 mask_of_stuck_cores = 0;
1194         u16 mask_of_crashed_cores = 0;
1195         int core_num;
1196         u8 core_is_stuck[LIO_MAX_CORES];
1197         u8 core_crashed[LIO_MAX_CORES];
1198         struct octeon_device *oct = param;
1199
1200         memset(core_is_stuck, 0, sizeof(core_is_stuck));
1201         memset(core_crashed, 0, sizeof(core_crashed));
1202
1203         while (!kthread_should_stop()) {
1204                 mask_of_crashed_cores =
1205                     (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2);
1206
1207                 for (core_num = 0; core_num < LIO_MAX_CORES; core_num++) {
1208                         if (!core_is_stuck[core_num]) {
1209                                 wdog = lio_pci_readq(oct, CIU3_WDOG(core_num));
1210
1211                                 /* look at watchdog state field */
1212                                 wdog &= CIU3_WDOG_MASK;
1213                                 if (wdog) {
1214                                         /* this watchdog timer has expired */
1215                                         core_is_stuck[core_num] =
1216                                                 LIO_MONITOR_WDOG_EXPIRE;
1217                                         mask_of_stuck_cores |= (1 << core_num);
1218                                 }
1219                         }
1220
1221                         if (!core_crashed[core_num])
1222                                 core_crashed[core_num] =
1223                                     (mask_of_crashed_cores >> core_num) & 1;
1224                 }
1225
1226                 if (mask_of_stuck_cores) {
1227                         for (core_num = 0; core_num < LIO_MAX_CORES;
1228                              core_num++) {
1229                                 if (core_is_stuck[core_num] == 1) {
1230                                         dev_err(&oct->pci_dev->dev,
1231                                                 "ERROR: Octeon core %d is stuck!\n",
1232                                                 core_num);
1233                                         /* 2 means we have printk'd  an error
1234                                          * so no need to repeat the same printk
1235                                          */
1236                                         core_is_stuck[core_num] =
1237                                                 LIO_MONITOR_CORE_STUCK_MSGD;
1238                                 }
1239                         }
1240                 }
1241
1242                 if (mask_of_crashed_cores) {
1243                         for (core_num = 0; core_num < LIO_MAX_CORES;
1244                              core_num++) {
1245                                 if (core_crashed[core_num] == 1) {
1246                                         dev_err(&oct->pci_dev->dev,
1247                                                 "ERROR: Octeon core %d crashed!  See oct-fwdump for details.\n",
1248                                                 core_num);
1249                                         /* 2 means we have printk'd  an error
1250                                          * so no need to repeat the same printk
1251                                          */
1252                                         core_crashed[core_num] =
1253                                                 LIO_MONITOR_CORE_STUCK_MSGD;
1254                                 }
1255                         }
1256                 }
1257 #ifdef CONFIG_MODULE_UNLOAD
1258                 if (mask_of_stuck_cores || mask_of_crashed_cores) {
1259                         /* make module refcount=0 so that rmmod will work */
1260                         long refcount;
1261
1262                         refcount = module_refcount(THIS_MODULE);
1263
1264                         while (refcount > 0) {
1265                                 module_put(THIS_MODULE);
1266                                 refcount = module_refcount(THIS_MODULE);
1267                         }
1268
1269                         /* compensate for and withstand an unlikely (but still
1270                          * possible) race condition
1271                          */
1272                         while (refcount < 0) {
1273                                 try_module_get(THIS_MODULE);
1274                                 refcount = module_refcount(THIS_MODULE);
1275                         }
1276                 }
1277 #endif
1278                 /* sleep for two seconds */
1279                 set_current_state(TASK_INTERRUPTIBLE);
1280                 schedule_timeout(2 * HZ);
1281         }
1282
1283         return 0;
1284 }
1285
1286 /**
1287  * \brief PCI probe handler
1288  * @param pdev PCI device structure
1289  * @param ent unused
1290  */
1291 static int
1292 liquidio_probe(struct pci_dev *pdev,
1293                const struct pci_device_id *ent __attribute__((unused)))
1294 {
1295         struct octeon_device *oct_dev = NULL;
1296         struct handshake *hs;
1297
1298         oct_dev = octeon_allocate_device(pdev->device,
1299                                          sizeof(struct octeon_device_priv));
1300         if (!oct_dev) {
1301                 dev_err(&pdev->dev, "Unable to allocate device\n");
1302                 return -ENOMEM;
1303         }
1304
1305         if (pdev->device == OCTEON_CN23XX_PF_VID)
1306                 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED;
1307
1308         dev_info(&pdev->dev, "Initializing device %x:%x.\n",
1309                  (u32)pdev->vendor, (u32)pdev->device);
1310
1311         /* Assign octeon_device for this device to the private data area. */
1312         pci_set_drvdata(pdev, oct_dev);
1313
1314         /* set linux specific device pointer */
1315         oct_dev->pci_dev = (void *)pdev;
1316
1317         hs = &handshake[oct_dev->octeon_id];
1318         init_completion(&hs->init);
1319         init_completion(&hs->started);
1320         hs->pci_dev = pdev;
1321
1322         if (oct_dev->octeon_id == 0)
1323                 /* first LiquidIO NIC is detected */
1324                 complete(&first_stage);
1325
1326         if (octeon_device_init(oct_dev)) {
1327                 complete(&hs->init);
1328                 liquidio_remove(pdev);
1329                 return -ENOMEM;
1330         }
1331
1332         if (OCTEON_CN23XX_PF(oct_dev)) {
1333                 u64 scratch1;
1334                 u8 bus, device, function;
1335
1336                 scratch1 = octeon_read_csr64(oct_dev, CN23XX_SLI_SCRATCH1);
1337                 if (!(scratch1 & 4ULL)) {
1338                         /* Bit 2 of SLI_SCRATCH_1 is a flag that indicates that
1339                          * the lio watchdog kernel thread is running for this
1340                          * NIC.  Each NIC gets one watchdog kernel thread.
1341                          */
1342                         scratch1 |= 4ULL;
1343                         octeon_write_csr64(oct_dev, CN23XX_SLI_SCRATCH1,
1344                                            scratch1);
1345
1346                         bus = pdev->bus->number;
1347                         device = PCI_SLOT(pdev->devfn);
1348                         function = PCI_FUNC(pdev->devfn);
1349                         oct_dev->watchdog_task = kthread_create(
1350                             liquidio_watchdog, oct_dev,
1351                             "liowd/%02hhx:%02hhx.%hhx", bus, device, function);
1352                         if (!IS_ERR(oct_dev->watchdog_task)) {
1353                                 wake_up_process(oct_dev->watchdog_task);
1354                         } else {
1355                                 oct_dev->watchdog_task = NULL;
1356                                 dev_err(&oct_dev->pci_dev->dev,
1357                                         "failed to create kernel_thread\n");
1358                                 liquidio_remove(pdev);
1359                                 return -1;
1360                         }
1361                 }
1362         }
1363
1364         oct_dev->rx_pause = 1;
1365         oct_dev->tx_pause = 1;
1366
1367         dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n");
1368
1369         return 0;
1370 }
1371
1372 /**
1373  *\brief Destroy resources associated with octeon device
1374  * @param pdev PCI device structure
1375  * @param ent unused
1376  */
1377 static void octeon_destroy_resources(struct octeon_device *oct)
1378 {
1379         int i;
1380         struct msix_entry *msix_entries;
1381         struct octeon_device_priv *oct_priv =
1382                 (struct octeon_device_priv *)oct->priv;
1383
1384         struct handshake *hs;
1385
1386         switch (atomic_read(&oct->status)) {
1387         case OCT_DEV_RUNNING:
1388         case OCT_DEV_CORE_OK:
1389
1390                 /* No more instructions will be forwarded. */
1391                 atomic_set(&oct->status, OCT_DEV_IN_RESET);
1392
1393                 oct->app_mode = CVM_DRV_INVALID_APP;
1394                 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
1395                         lio_get_state_string(&oct->status));
1396
1397                 schedule_timeout_uninterruptible(HZ / 10);
1398
1399                 /* fallthrough */
1400         case OCT_DEV_HOST_OK:
1401
1402                 /* fallthrough */
1403         case OCT_DEV_CONSOLE_INIT_DONE:
1404                 /* Remove any consoles */
1405                 octeon_remove_consoles(oct);
1406
1407                 /* fallthrough */
1408         case OCT_DEV_IO_QUEUES_DONE:
1409                 if (wait_for_pending_requests(oct))
1410                         dev_err(&oct->pci_dev->dev, "There were pending requests\n");
1411
1412                 if (lio_wait_for_instr_fetch(oct))
1413                         dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
1414
1415                 /* Disable the input and output queues now. No more packets will
1416                  * arrive from Octeon, but we should wait for all packet
1417                  * processing to finish.
1418                  */
1419                 oct->fn_list.disable_io_queues(oct);
1420
1421                 if (lio_wait_for_oq_pkts(oct))
1422                         dev_err(&oct->pci_dev->dev, "OQ had pending packets\n");
1423
1424         /* fallthrough */
1425         case OCT_DEV_INTR_SET_DONE:
1426                 /* Disable interrupts  */
1427                 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1428
1429                 if (oct->msix_on) {
1430                         msix_entries = (struct msix_entry *)oct->msix_entries;
1431                         for (i = 0; i < oct->num_msix_irqs - 1; i++) {
1432                                 /* clear the affinity_cpumask */
1433                                 irq_set_affinity_hint(msix_entries[i].vector,
1434                                                       NULL);
1435                                 free_irq(msix_entries[i].vector,
1436                                          &oct->ioq_vector[i]);
1437                         }
1438                         /* non-iov vector's argument is oct struct */
1439                         free_irq(msix_entries[i].vector, oct);
1440
1441                         pci_disable_msix(oct->pci_dev);
1442                         kfree(oct->msix_entries);
1443                         oct->msix_entries = NULL;
1444                 } else {
1445                         /* Release the interrupt line */
1446                         free_irq(oct->pci_dev->irq, oct);
1447
1448                         if (oct->flags & LIO_FLAG_MSI_ENABLED)
1449                                 pci_disable_msi(oct->pci_dev);
1450                 }
1451
1452         /* fallthrough */
1453         case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
1454                 if (OCTEON_CN23XX_PF(oct))
1455                         octeon_free_ioq_vector(oct);
1456
1457         /* fallthrough */
1458         case OCT_DEV_MBOX_SETUP_DONE:
1459                 if (OCTEON_CN23XX_PF(oct))
1460                         oct->fn_list.free_mbox(oct);
1461
1462         /* fallthrough */
1463         case OCT_DEV_IN_RESET:
1464         case OCT_DEV_DROQ_INIT_DONE:
1465                 /* Wait for any pending operations */
1466                 mdelay(100);
1467                 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
1468                         if (!(oct->io_qmask.oq & BIT_ULL(i)))
1469                                 continue;
1470                         octeon_delete_droq(oct, i);
1471                 }
1472
1473                 /* Force any pending handshakes to complete */
1474                 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
1475                         hs = &handshake[i];
1476
1477                         if (hs->pci_dev) {
1478                                 handshake[oct->octeon_id].init_ok = 0;
1479                                 complete(&handshake[oct->octeon_id].init);
1480                                 handshake[oct->octeon_id].started_ok = 0;
1481                                 complete(&handshake[oct->octeon_id].started);
1482                         }
1483                 }
1484
1485                 /* fallthrough */
1486         case OCT_DEV_RESP_LIST_INIT_DONE:
1487                 octeon_delete_response_list(oct);
1488
1489                 /* fallthrough */
1490         case OCT_DEV_INSTR_QUEUE_INIT_DONE:
1491                 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
1492                         if (!(oct->io_qmask.iq & BIT_ULL(i)))
1493                                 continue;
1494                         octeon_delete_instr_queue(oct, i);
1495                 }
1496 #ifdef CONFIG_PCI_IOV
1497                 if (oct->sriov_info.sriov_enabled)
1498                         pci_disable_sriov(oct->pci_dev);
1499 #endif
1500                 /* fallthrough */
1501         case OCT_DEV_SC_BUFF_POOL_INIT_DONE:
1502                 octeon_free_sc_buffer_pool(oct);
1503
1504                 /* fallthrough */
1505         case OCT_DEV_DISPATCH_INIT_DONE:
1506                 octeon_delete_dispatch_list(oct);
1507                 cancel_delayed_work_sync(&oct->nic_poll_work.work);
1508
1509                 /* fallthrough */
1510         case OCT_DEV_PCI_MAP_DONE:
1511                 /* Soft reset the octeon device before exiting */
1512                 if ((!OCTEON_CN23XX_PF(oct)) || !oct->octeon_id)
1513                         oct->fn_list.soft_reset(oct);
1514
1515                 octeon_unmap_pci_barx(oct, 0);
1516                 octeon_unmap_pci_barx(oct, 1);
1517
1518                 /* fallthrough */
1519         case OCT_DEV_PCI_ENABLE_DONE:
1520                 pci_clear_master(oct->pci_dev);
1521                 /* Disable the device, releasing the PCI INT */
1522                 pci_disable_device(oct->pci_dev);
1523
1524                 /* fallthrough */
1525         case OCT_DEV_BEGIN_STATE:
1526                 /* Nothing to be done here either */
1527                 break;
1528         }                       /* end switch (oct->status) */
1529
1530         tasklet_kill(&oct_priv->droq_tasklet);
1531 }
1532
1533 /**
1534  * \brief Callback for rx ctrl
1535  * @param status status of request
1536  * @param buf pointer to resp structure
1537  */
1538 static void rx_ctl_callback(struct octeon_device *oct,
1539                             u32 status,
1540                             void *buf)
1541 {
1542         struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
1543         struct liquidio_rx_ctl_context *ctx;
1544
1545         ctx  = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1546
1547         oct = lio_get_device(ctx->octeon_id);
1548         if (status)
1549                 dev_err(&oct->pci_dev->dev, "rx ctl instruction failed. Status: %llx\n",
1550                         CVM_CAST64(status));
1551         WRITE_ONCE(ctx->cond, 1);
1552
1553         /* This barrier is required to be sure that the response has been
1554          * written fully before waking up the handler
1555          */
1556         wmb();
1557
1558         wake_up_interruptible(&ctx->wc);
1559 }
1560
1561 /**
1562  * \brief Send Rx control command
1563  * @param lio per-network private data
1564  * @param start_stop whether to start or stop
1565  */
1566 static void send_rx_ctrl_cmd(struct lio *lio, int start_stop)
1567 {
1568         struct octeon_soft_command *sc;
1569         struct liquidio_rx_ctl_context *ctx;
1570         union octnet_cmd *ncmd;
1571         int ctx_size = sizeof(struct liquidio_rx_ctl_context);
1572         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1573         int retval;
1574
1575         if (oct->props[lio->ifidx].rx_on == start_stop)
1576                 return;
1577
1578         sc = (struct octeon_soft_command *)
1579                 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE,
1580                                           16, ctx_size);
1581
1582         ncmd = (union octnet_cmd *)sc->virtdptr;
1583         ctx  = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1584
1585         WRITE_ONCE(ctx->cond, 0);
1586         ctx->octeon_id = lio_get_device_id(oct);
1587         init_waitqueue_head(&ctx->wc);
1588
1589         ncmd->u64 = 0;
1590         ncmd->s.cmd = OCTNET_CMD_RX_CTL;
1591         ncmd->s.param1 = start_stop;
1592
1593         octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3));
1594
1595         sc->iq_no = lio->linfo.txpciq[0].s.q_no;
1596
1597         octeon_prepare_soft_command(oct, sc, OPCODE_NIC,
1598                                     OPCODE_NIC_CMD, 0, 0, 0);
1599
1600         sc->callback = rx_ctl_callback;
1601         sc->callback_arg = sc;
1602         sc->wait_time = 5000;
1603
1604         retval = octeon_send_soft_command(oct, sc);
1605         if (retval == IQ_SEND_FAILED) {
1606                 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n");
1607         } else {
1608                 /* Sleep on a wait queue till the cond flag indicates that the
1609                  * response arrived or timed-out.
1610                  */
1611                 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR)
1612                         return;
1613                 oct->props[lio->ifidx].rx_on = start_stop;
1614         }
1615
1616         octeon_free_soft_command(oct, sc);
1617 }
1618
1619 /**
1620  * \brief Destroy NIC device interface
1621  * @param oct octeon device
1622  * @param ifidx which interface to destroy
1623  *
1624  * Cleanup associated with each interface for an Octeon device  when NIC
1625  * module is being unloaded or if initialization fails during load.
1626  */
1627 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx)
1628 {
1629         struct net_device *netdev = oct->props[ifidx].netdev;
1630         struct lio *lio;
1631         struct napi_struct *napi, *n;
1632
1633         if (!netdev) {
1634                 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n",
1635                         __func__, ifidx);
1636                 return;
1637         }
1638
1639         lio = GET_LIO(netdev);
1640
1641         dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n");
1642
1643         if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING)
1644                 liquidio_stop(netdev);
1645
1646         if (oct->props[lio->ifidx].napi_enabled == 1) {
1647                 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
1648                         napi_disable(napi);
1649
1650                 oct->props[lio->ifidx].napi_enabled = 0;
1651
1652                 if (OCTEON_CN23XX_PF(oct))
1653                         oct->droq[0]->ops.poll_mode = 0;
1654         }
1655
1656         if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED)
1657                 unregister_netdev(netdev);
1658
1659         cleanup_link_status_change_wq(netdev);
1660
1661         delete_glists(lio);
1662
1663         free_netdev(netdev);
1664
1665         oct->props[ifidx].gmxport = -1;
1666
1667         oct->props[ifidx].netdev = NULL;
1668 }
1669
1670 /**
1671  * \brief Stop complete NIC functionality
1672  * @param oct octeon device
1673  */
1674 static int liquidio_stop_nic_module(struct octeon_device *oct)
1675 {
1676         int i, j;
1677         struct lio *lio;
1678
1679         dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n");
1680         if (!oct->ifcount) {
1681                 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n");
1682                 return 1;
1683         }
1684
1685         spin_lock_bh(&oct->cmd_resp_wqlock);
1686         oct->cmd_resp_state = OCT_DRV_OFFLINE;
1687         spin_unlock_bh(&oct->cmd_resp_wqlock);
1688
1689         for (i = 0; i < oct->ifcount; i++) {
1690                 lio = GET_LIO(oct->props[i].netdev);
1691                 for (j = 0; j < lio->linfo.num_rxpciq; j++)
1692                         octeon_unregister_droq_ops(oct,
1693                                                    lio->linfo.rxpciq[j].s.q_no);
1694         }
1695
1696         for (i = 0; i < oct->ifcount; i++)
1697                 liquidio_destroy_nic_device(oct, i);
1698
1699         dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n");
1700         return 0;
1701 }
1702
1703 /**
1704  * \brief Cleans up resources at unload time
1705  * @param pdev PCI device structure
1706  */
1707 static void liquidio_remove(struct pci_dev *pdev)
1708 {
1709         struct octeon_device *oct_dev = pci_get_drvdata(pdev);
1710
1711         dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n");
1712
1713         if (oct_dev->watchdog_task)
1714                 kthread_stop(oct_dev->watchdog_task);
1715
1716         if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP))
1717                 liquidio_stop_nic_module(oct_dev);
1718
1719         /* Reset the octeon device and cleanup all memory allocated for
1720          * the octeon device by driver.
1721          */
1722         octeon_destroy_resources(oct_dev);
1723
1724         dev_info(&oct_dev->pci_dev->dev, "Device removed\n");
1725
1726         /* This octeon device has been removed. Update the global
1727          * data structure to reflect this. Free the device structure.
1728          */
1729         octeon_free_device_mem(oct_dev);
1730 }
1731
1732 /**
1733  * \brief Identify the Octeon device and to map the BAR address space
1734  * @param oct octeon device
1735  */
1736 static int octeon_chip_specific_setup(struct octeon_device *oct)
1737 {
1738         u32 dev_id, rev_id;
1739         int ret = 1;
1740         char *s;
1741
1742         pci_read_config_dword(oct->pci_dev, 0, &dev_id);
1743         pci_read_config_dword(oct->pci_dev, 8, &rev_id);
1744         oct->rev_id = rev_id & 0xff;
1745
1746         switch (dev_id) {
1747         case OCTEON_CN68XX_PCIID:
1748                 oct->chip_id = OCTEON_CN68XX;
1749                 ret = lio_setup_cn68xx_octeon_device(oct);
1750                 s = "CN68XX";
1751                 break;
1752
1753         case OCTEON_CN66XX_PCIID:
1754                 oct->chip_id = OCTEON_CN66XX;
1755                 ret = lio_setup_cn66xx_octeon_device(oct);
1756                 s = "CN66XX";
1757                 break;
1758
1759         case OCTEON_CN23XX_PCIID_PF:
1760                 oct->chip_id = OCTEON_CN23XX_PF_VID;
1761                 ret = setup_cn23xx_octeon_pf_device(oct);
1762                 s = "CN23XX";
1763                 break;
1764
1765         default:
1766                 s = "?";
1767                 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n",
1768                         dev_id);
1769         }
1770
1771         if (!ret)
1772                 dev_info(&oct->pci_dev->dev, "%s PASS%d.%d %s Version: %s\n", s,
1773                          OCTEON_MAJOR_REV(oct),
1774                          OCTEON_MINOR_REV(oct),
1775                          octeon_get_conf(oct)->card_name,
1776                          LIQUIDIO_VERSION);
1777
1778         return ret;
1779 }
1780
1781 /**
1782  * \brief PCI initialization for each Octeon device.
1783  * @param oct octeon device
1784  */
1785 static int octeon_pci_os_setup(struct octeon_device *oct)
1786 {
1787         /* setup PCI stuff first */
1788         if (pci_enable_device(oct->pci_dev)) {
1789                 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n");
1790                 return 1;
1791         }
1792
1793         if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) {
1794                 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n");
1795                 pci_disable_device(oct->pci_dev);
1796                 return 1;
1797         }
1798
1799         /* Enable PCI DMA Master. */
1800         pci_set_master(oct->pci_dev);
1801
1802         return 0;
1803 }
1804
1805 static inline int skb_iq(struct lio *lio, struct sk_buff *skb)
1806 {
1807         int q = 0;
1808
1809         if (netif_is_multiqueue(lio->netdev))
1810                 q = skb->queue_mapping % lio->linfo.num_txpciq;
1811
1812         return q;
1813 }
1814
1815 /**
1816  * \brief Check Tx queue state for a given network buffer
1817  * @param lio per-network private data
1818  * @param skb network buffer
1819  */
1820 static inline int check_txq_state(struct lio *lio, struct sk_buff *skb)
1821 {
1822         int q = 0, iq = 0;
1823
1824         if (netif_is_multiqueue(lio->netdev)) {
1825                 q = skb->queue_mapping;
1826                 iq = lio->linfo.txpciq[(q % (lio->linfo.num_txpciq))].s.q_no;
1827         } else {
1828                 iq = lio->txq;
1829                 q = iq;
1830         }
1831
1832         if (octnet_iq_is_full(lio->oct_dev, iq))
1833                 return 0;
1834
1835         if (__netif_subqueue_stopped(lio->netdev, q)) {
1836                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, tx_restart, 1);
1837                 wake_q(lio->netdev, q);
1838         }
1839         return 1;
1840 }
1841
1842 /**
1843  * \brief Unmap and free network buffer
1844  * @param buf buffer
1845  */
1846 static void free_netbuf(void *buf)
1847 {
1848         struct sk_buff *skb;
1849         struct octnet_buf_free_info *finfo;
1850         struct lio *lio;
1851
1852         finfo = (struct octnet_buf_free_info *)buf;
1853         skb = finfo->skb;
1854         lio = finfo->lio;
1855
1856         dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len,
1857                          DMA_TO_DEVICE);
1858
1859         check_txq_state(lio, skb);
1860
1861         tx_buffer_free(skb);
1862 }
1863
1864 /**
1865  * \brief Unmap and free gather buffer
1866  * @param buf buffer
1867  */
1868 static void free_netsgbuf(void *buf)
1869 {
1870         struct octnet_buf_free_info *finfo;
1871         struct sk_buff *skb;
1872         struct lio *lio;
1873         struct octnic_gather *g;
1874         int i, frags, iq;
1875
1876         finfo = (struct octnet_buf_free_info *)buf;
1877         skb = finfo->skb;
1878         lio = finfo->lio;
1879         g = finfo->g;
1880         frags = skb_shinfo(skb)->nr_frags;
1881
1882         dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1883                          g->sg[0].ptr[0], (skb->len - skb->data_len),
1884                          DMA_TO_DEVICE);
1885
1886         i = 1;
1887         while (frags--) {
1888                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1889
1890                 pci_unmap_page((lio->oct_dev)->pci_dev,
1891                                g->sg[(i >> 2)].ptr[(i & 3)],
1892                                frag->size, DMA_TO_DEVICE);
1893                 i++;
1894         }
1895
1896         iq = skb_iq(lio, skb);
1897         spin_lock(&lio->glist_lock[iq]);
1898         list_add_tail(&g->list, &lio->glist[iq]);
1899         spin_unlock(&lio->glist_lock[iq]);
1900
1901         check_txq_state(lio, skb);     /* mq support: sub-queue state check */
1902
1903         tx_buffer_free(skb);
1904 }
1905
1906 /**
1907  * \brief Unmap and free gather buffer with response
1908  * @param buf buffer
1909  */
1910 static void free_netsgbuf_with_resp(void *buf)
1911 {
1912         struct octeon_soft_command *sc;
1913         struct octnet_buf_free_info *finfo;
1914         struct sk_buff *skb;
1915         struct lio *lio;
1916         struct octnic_gather *g;
1917         int i, frags, iq;
1918
1919         sc = (struct octeon_soft_command *)buf;
1920         skb = (struct sk_buff *)sc->callback_arg;
1921         finfo = (struct octnet_buf_free_info *)&skb->cb;
1922
1923         lio = finfo->lio;
1924         g = finfo->g;
1925         frags = skb_shinfo(skb)->nr_frags;
1926
1927         dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1928                          g->sg[0].ptr[0], (skb->len - skb->data_len),
1929                          DMA_TO_DEVICE);
1930
1931         i = 1;
1932         while (frags--) {
1933                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1934
1935                 pci_unmap_page((lio->oct_dev)->pci_dev,
1936                                g->sg[(i >> 2)].ptr[(i & 3)],
1937                                frag->size, DMA_TO_DEVICE);
1938                 i++;
1939         }
1940
1941         iq = skb_iq(lio, skb);
1942
1943         spin_lock(&lio->glist_lock[iq]);
1944         list_add_tail(&g->list, &lio->glist[iq]);
1945         spin_unlock(&lio->glist_lock[iq]);
1946
1947         /* Don't free the skb yet */
1948
1949         check_txq_state(lio, skb);
1950 }
1951
1952 /**
1953  * \brief Adjust ptp frequency
1954  * @param ptp PTP clock info
1955  * @param ppb how much to adjust by, in parts-per-billion
1956  */
1957 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1958 {
1959         struct lio *lio = container_of(ptp, struct lio, ptp_info);
1960         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1961         u64 comp, delta;
1962         unsigned long flags;
1963         bool neg_adj = false;
1964
1965         if (ppb < 0) {
1966                 neg_adj = true;
1967                 ppb = -ppb;
1968         }
1969
1970         /* The hardware adds the clock compensation value to the
1971          * PTP clock on every coprocessor clock cycle, so we
1972          * compute the delta in terms of coprocessor clocks.
1973          */
1974         delta = (u64)ppb << 32;
1975         do_div(delta, oct->coproc_clock_rate);
1976
1977         spin_lock_irqsave(&lio->ptp_lock, flags);
1978         comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP);
1979         if (neg_adj)
1980                 comp -= delta;
1981         else
1982                 comp += delta;
1983         lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP);
1984         spin_unlock_irqrestore(&lio->ptp_lock, flags);
1985
1986         return 0;
1987 }
1988
1989 /**
1990  * \brief Adjust ptp time
1991  * @param ptp PTP clock info
1992  * @param delta how much to adjust by, in nanosecs
1993  */
1994 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
1995 {
1996         unsigned long flags;
1997         struct lio *lio = container_of(ptp, struct lio, ptp_info);
1998
1999         spin_lock_irqsave(&lio->ptp_lock, flags);
2000         lio->ptp_adjust += delta;
2001         spin_unlock_irqrestore(&lio->ptp_lock, flags);
2002
2003         return 0;
2004 }
2005
2006 /**
2007  * \brief Get hardware clock time, including any adjustment
2008  * @param ptp PTP clock info
2009  * @param ts timespec
2010  */
2011 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp,
2012                                 struct timespec64 *ts)
2013 {
2014         u64 ns;
2015         unsigned long flags;
2016         struct lio *lio = container_of(ptp, struct lio, ptp_info);
2017         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2018
2019         spin_lock_irqsave(&lio->ptp_lock, flags);
2020         ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI);
2021         ns += lio->ptp_adjust;
2022         spin_unlock_irqrestore(&lio->ptp_lock, flags);
2023
2024         *ts = ns_to_timespec64(ns);
2025
2026         return 0;
2027 }
2028
2029 /**
2030  * \brief Set hardware clock time. Reset adjustment
2031  * @param ptp PTP clock info
2032  * @param ts timespec
2033  */
2034 static int liquidio_ptp_settime(struct ptp_clock_info *ptp,
2035                                 const struct timespec64 *ts)
2036 {
2037         u64 ns;
2038         unsigned long flags;
2039         struct lio *lio = container_of(ptp, struct lio, ptp_info);
2040         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2041
2042         ns = timespec_to_ns(ts);
2043
2044         spin_lock_irqsave(&lio->ptp_lock, flags);
2045         lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI);
2046         lio->ptp_adjust = 0;
2047         spin_unlock_irqrestore(&lio->ptp_lock, flags);
2048
2049         return 0;
2050 }
2051
2052 /**
2053  * \brief Check if PTP is enabled
2054  * @param ptp PTP clock info
2055  * @param rq request
2056  * @param on is it on
2057  */
2058 static int
2059 liquidio_ptp_enable(struct ptp_clock_info *ptp __attribute__((unused)),
2060                     struct ptp_clock_request *rq __attribute__((unused)),
2061                     int on __attribute__((unused)))
2062 {
2063         return -EOPNOTSUPP;
2064 }
2065
2066 /**
2067  * \brief Open PTP clock source
2068  * @param netdev network device
2069  */
2070 static void oct_ptp_open(struct net_device *netdev)
2071 {
2072         struct lio *lio = GET_LIO(netdev);
2073         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2074
2075         spin_lock_init(&lio->ptp_lock);
2076
2077         snprintf(lio->ptp_info.name, 16, "%s", netdev->name);
2078         lio->ptp_info.owner = THIS_MODULE;
2079         lio->ptp_info.max_adj = 250000000;
2080         lio->ptp_info.n_alarm = 0;
2081         lio->ptp_info.n_ext_ts = 0;
2082         lio->ptp_info.n_per_out = 0;
2083         lio->ptp_info.pps = 0;
2084         lio->ptp_info.adjfreq = liquidio_ptp_adjfreq;
2085         lio->ptp_info.adjtime = liquidio_ptp_adjtime;
2086         lio->ptp_info.gettime64 = liquidio_ptp_gettime;
2087         lio->ptp_info.settime64 = liquidio_ptp_settime;
2088         lio->ptp_info.enable = liquidio_ptp_enable;
2089
2090         lio->ptp_adjust = 0;
2091
2092         lio->ptp_clock = ptp_clock_register(&lio->ptp_info,
2093                                              &oct->pci_dev->dev);
2094
2095         if (IS_ERR(lio->ptp_clock))
2096                 lio->ptp_clock = NULL;
2097 }
2098
2099 /**
2100  * \brief Init PTP clock
2101  * @param oct octeon device
2102  */
2103 static void liquidio_ptp_init(struct octeon_device *oct)
2104 {
2105         u64 clock_comp, cfg;
2106
2107         clock_comp = (u64)NSEC_PER_SEC << 32;
2108         do_div(clock_comp, oct->coproc_clock_rate);
2109         lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP);
2110
2111         /* Enable */
2112         cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG);
2113         lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG);
2114 }
2115
2116 /**
2117  * \brief Load firmware to device
2118  * @param oct octeon device
2119  *
2120  * Maps device to firmware filename, requests firmware, and downloads it
2121  */
2122 static int load_firmware(struct octeon_device *oct)
2123 {
2124         int ret = 0;
2125         const struct firmware *fw;
2126         char fw_name[LIO_MAX_FW_FILENAME_LEN];
2127         char *tmp_fw_type;
2128
2129         if (strncmp(fw_type, LIO_FW_NAME_TYPE_NONE,
2130                     sizeof(LIO_FW_NAME_TYPE_NONE)) == 0) {
2131                 dev_info(&oct->pci_dev->dev, "Skipping firmware load\n");
2132                 return ret;
2133         }
2134
2135         if (fw_type[0] == '\0')
2136                 tmp_fw_type = LIO_FW_NAME_TYPE_NIC;
2137         else
2138                 tmp_fw_type = fw_type;
2139
2140         sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME,
2141                 octeon_get_conf(oct)->card_name, tmp_fw_type,
2142                 LIO_FW_NAME_SUFFIX);
2143
2144         ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev);
2145         if (ret) {
2146                 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n.",
2147                         fw_name);
2148                 release_firmware(fw);
2149                 return ret;
2150         }
2151
2152         ret = octeon_download_firmware(oct, fw->data, fw->size);
2153
2154         release_firmware(fw);
2155
2156         return ret;
2157 }
2158
2159 /**
2160  * \brief Setup output queue
2161  * @param oct octeon device
2162  * @param q_no which queue
2163  * @param num_descs how many descriptors
2164  * @param desc_size size of each descriptor
2165  * @param app_ctx application context
2166  */
2167 static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs,
2168                              int desc_size, void *app_ctx)
2169 {
2170         int ret_val = 0;
2171
2172         dev_dbg(&oct->pci_dev->dev, "Creating Droq: %d\n", q_no);
2173         /* droq creation and local register settings. */
2174         ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx);
2175         if (ret_val < 0)
2176                 return ret_val;
2177
2178         if (ret_val == 1) {
2179                 dev_dbg(&oct->pci_dev->dev, "Using default droq %d\n", q_no);
2180                 return 0;
2181         }
2182         /* tasklet creation for the droq */
2183
2184         /* Enable the droq queues */
2185         octeon_set_droq_pkt_op(oct, q_no, 1);
2186
2187         /* Send Credit for Octeon Output queues. Credits are always
2188          * sent after the output queue is enabled.
2189          */
2190         writel(oct->droq[q_no]->max_count,
2191                oct->droq[q_no]->pkts_credit_reg);
2192
2193         return ret_val;
2194 }
2195
2196 /**
2197  * \brief Callback for getting interface configuration
2198  * @param status status of request
2199  * @param buf pointer to resp structure
2200  */
2201 static void if_cfg_callback(struct octeon_device *oct,
2202                             u32 status __attribute__((unused)),
2203                             void *buf)
2204 {
2205         struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
2206         struct liquidio_if_cfg_resp *resp;
2207         struct liquidio_if_cfg_context *ctx;
2208
2209         resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
2210         ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
2211
2212         oct = lio_get_device(ctx->octeon_id);
2213         if (resp->status)
2214                 dev_err(&oct->pci_dev->dev, "nic if cfg instruction failed. Status: %llx\n",
2215                         CVM_CAST64(resp->status));
2216         WRITE_ONCE(ctx->cond, 1);
2217
2218         snprintf(oct->fw_info.liquidio_firmware_version, 32, "%s",
2219                  resp->cfg_info.liquidio_firmware_version);
2220
2221         /* This barrier is required to be sure that the response has been
2222          * written fully before waking up the handler
2223          */
2224         wmb();
2225
2226         wake_up_interruptible(&ctx->wc);
2227 }
2228
2229 /** Routine to push packets arriving on Octeon interface upto network layer.
2230  * @param oct_id   - octeon device id.
2231  * @param skbuff   - skbuff struct to be passed to network layer.
2232  * @param len      - size of total data received.
2233  * @param rh       - Control header associated with the packet
2234  * @param param    - additional control data with the packet
2235  * @param arg      - farg registered in droq_ops
2236  */
2237 static void
2238 liquidio_push_packet(u32 octeon_id __attribute__((unused)),
2239                      void *skbuff,
2240                      u32 len,
2241                      union octeon_rh *rh,
2242                      void *param,
2243                      void *arg)
2244 {
2245         struct napi_struct *napi = param;
2246         struct sk_buff *skb = (struct sk_buff *)skbuff;
2247         struct skb_shared_hwtstamps *shhwtstamps;
2248         u64 ns;
2249         u16 vtag = 0;
2250         u32 r_dh_off;
2251         struct net_device *netdev = (struct net_device *)arg;
2252         struct octeon_droq *droq = container_of(param, struct octeon_droq,
2253                                                 napi);
2254         if (netdev) {
2255                 int packet_was_received;
2256                 struct lio *lio = GET_LIO(netdev);
2257                 struct octeon_device *oct = lio->oct_dev;
2258
2259                 /* Do not proceed if the interface is not in RUNNING state. */
2260                 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) {
2261                         recv_buffer_free(skb);
2262                         droq->stats.rx_dropped++;
2263                         return;
2264                 }
2265
2266                 skb->dev = netdev;
2267
2268                 skb_record_rx_queue(skb, droq->q_no);
2269                 if (likely(len > MIN_SKB_SIZE)) {
2270                         struct octeon_skb_page_info *pg_info;
2271                         unsigned char *va;
2272
2273                         pg_info = ((struct octeon_skb_page_info *)(skb->cb));
2274                         if (pg_info->page) {
2275                                 /* For Paged allocation use the frags */
2276                                 va = page_address(pg_info->page) +
2277                                         pg_info->page_offset;
2278                                 memcpy(skb->data, va, MIN_SKB_SIZE);
2279                                 skb_put(skb, MIN_SKB_SIZE);
2280                                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
2281                                                 pg_info->page,
2282                                                 pg_info->page_offset +
2283                                                 MIN_SKB_SIZE,
2284                                                 len - MIN_SKB_SIZE,
2285                                                 LIO_RXBUFFER_SZ);
2286                         }
2287                 } else {
2288                         struct octeon_skb_page_info *pg_info =
2289                                 ((struct octeon_skb_page_info *)(skb->cb));
2290                         skb_copy_to_linear_data(skb, page_address(pg_info->page)
2291                                                 + pg_info->page_offset, len);
2292                         skb_put(skb, len);
2293                         put_page(pg_info->page);
2294                 }
2295
2296                 r_dh_off = (rh->r_dh.len - 1) * BYTES_PER_DHLEN_UNIT;
2297
2298                 if (((oct->chip_id == OCTEON_CN66XX) ||
2299                      (oct->chip_id == OCTEON_CN68XX)) &&
2300                     ptp_enable) {
2301                         if (rh->r_dh.has_hwtstamp) {
2302                                 /* timestamp is included from the hardware at
2303                                  * the beginning of the packet.
2304                                  */
2305                                 if (ifstate_check
2306                                     (lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED)) {
2307                                         /* Nanoseconds are in the first 64-bits
2308                                          * of the packet.
2309                                          */
2310                                         memcpy(&ns, (skb->data + r_dh_off),
2311                                                sizeof(ns));
2312                                         r_dh_off -= BYTES_PER_DHLEN_UNIT;
2313                                         shhwtstamps = skb_hwtstamps(skb);
2314                                         shhwtstamps->hwtstamp =
2315                                                 ns_to_ktime(ns +
2316                                                             lio->ptp_adjust);
2317                                 }
2318                         }
2319                 }
2320
2321                 if (rh->r_dh.has_hash) {
2322                         __be32 *hash_be = (__be32 *)(skb->data + r_dh_off);
2323                         u32 hash = be32_to_cpu(*hash_be);
2324
2325                         skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
2326                         r_dh_off -= BYTES_PER_DHLEN_UNIT;
2327                 }
2328
2329                 skb_pull(skb, rh->r_dh.len * BYTES_PER_DHLEN_UNIT);
2330
2331                 skb->protocol = eth_type_trans(skb, skb->dev);
2332                 if ((netdev->features & NETIF_F_RXCSUM) &&
2333                     (((rh->r_dh.encap_on) &&
2334                       (rh->r_dh.csum_verified & CNNIC_TUN_CSUM_VERIFIED)) ||
2335                      (!(rh->r_dh.encap_on) &&
2336                       (rh->r_dh.csum_verified & CNNIC_CSUM_VERIFIED))))
2337                         /* checksum has already been verified */
2338                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2339                 else
2340                         skb->ip_summed = CHECKSUM_NONE;
2341
2342                 /* Setting Encapsulation field on basis of status received
2343                  * from the firmware
2344                  */
2345                 if (rh->r_dh.encap_on) {
2346                         skb->encapsulation = 1;
2347                         skb->csum_level = 1;
2348                         droq->stats.rx_vxlan++;
2349                 }
2350
2351                 /* inbound VLAN tag */
2352                 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2353                     (rh->r_dh.vlan != 0)) {
2354                         u16 vid = rh->r_dh.vlan;
2355                         u16 priority = rh->r_dh.priority;
2356
2357                         vtag = priority << 13 | vid;
2358                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag);
2359                 }
2360
2361                 packet_was_received = napi_gro_receive(napi, skb) != GRO_DROP;
2362
2363                 if (packet_was_received) {
2364                         droq->stats.rx_bytes_received += len;
2365                         droq->stats.rx_pkts_received++;
2366                 } else {
2367                         droq->stats.rx_dropped++;
2368                         netif_info(lio, rx_err, lio->netdev,
2369                                    "droq:%d  error rx_dropped:%llu\n",
2370                                    droq->q_no, droq->stats.rx_dropped);
2371                 }
2372
2373         } else {
2374                 recv_buffer_free(skb);
2375         }
2376 }
2377
2378 /**
2379  * \brief wrapper for calling napi_schedule
2380  * @param param parameters to pass to napi_schedule
2381  *
2382  * Used when scheduling on different CPUs
2383  */
2384 static void napi_schedule_wrapper(void *param)
2385 {
2386         struct napi_struct *napi = param;
2387
2388         napi_schedule(napi);
2389 }
2390
2391 /**
2392  * \brief callback when receive interrupt occurs and we are in NAPI mode
2393  * @param arg pointer to octeon output queue
2394  */
2395 static void liquidio_napi_drv_callback(void *arg)
2396 {
2397         struct octeon_device *oct;
2398         struct octeon_droq *droq = arg;
2399         int this_cpu = smp_processor_id();
2400
2401         oct = droq->oct_dev;
2402
2403         if (OCTEON_CN23XX_PF(oct) || droq->cpu_id == this_cpu) {
2404                 napi_schedule_irqoff(&droq->napi);
2405         } else {
2406                 struct call_single_data *csd = &droq->csd;
2407
2408                 csd->func = napi_schedule_wrapper;
2409                 csd->info = &droq->napi;
2410                 csd->flags = 0;
2411
2412                 smp_call_function_single_async(droq->cpu_id, csd);
2413         }
2414 }
2415
2416 /**
2417  * \brief Entry point for NAPI polling
2418  * @param napi NAPI structure
2419  * @param budget maximum number of items to process
2420  */
2421 static int liquidio_napi_poll(struct napi_struct *napi, int budget)
2422 {
2423         struct octeon_droq *droq;
2424         int work_done;
2425         int tx_done = 0, iq_no;
2426         struct octeon_instr_queue *iq;
2427         struct octeon_device *oct;
2428
2429         droq = container_of(napi, struct octeon_droq, napi);
2430         oct = droq->oct_dev;
2431         iq_no = droq->q_no;
2432         /* Handle Droq descriptors */
2433         work_done = octeon_process_droq_poll_cmd(oct, droq->q_no,
2434                                                  POLL_EVENT_PROCESS_PKTS,
2435                                                  budget);
2436
2437         /* Flush the instruction queue */
2438         iq = oct->instr_queue[iq_no];
2439         if (iq) {
2440                 /* Process iq buffers with in the budget limits */
2441                 tx_done = octeon_flush_iq(oct, iq, budget);
2442                 /* Update iq read-index rather than waiting for next interrupt.
2443                  * Return back if tx_done is false.
2444                  */
2445                 update_txq_status(oct, iq_no);
2446         } else {
2447                 dev_err(&oct->pci_dev->dev, "%s:  iq (%d) num invalid\n",
2448                         __func__, iq_no);
2449         }
2450
2451         /* force enable interrupt if reg cnts are high to avoid wraparound */
2452         if ((work_done < budget && tx_done) ||
2453             (iq && iq->pkt_in_done >= MAX_REG_CNT) ||
2454             (droq->pkt_count >= MAX_REG_CNT)) {
2455                 tx_done = 1;
2456                 napi_complete_done(napi, work_done);
2457                 octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no,
2458                                              POLL_EVENT_ENABLE_INTR, 0);
2459                 return 0;
2460         }
2461
2462         return (!tx_done) ? (budget) : (work_done);
2463 }
2464
2465 /**
2466  * \brief Setup input and output queues
2467  * @param octeon_dev octeon device
2468  * @param ifidx  Interface Index
2469  *
2470  * Note: Queues are with respect to the octeon device. Thus
2471  * an input queue is for egress packets, and output queues
2472  * are for ingress packets.
2473  */
2474 static inline int setup_io_queues(struct octeon_device *octeon_dev,
2475                                   int ifidx)
2476 {
2477         struct octeon_droq_ops droq_ops;
2478         struct net_device *netdev;
2479         static int cpu_id;
2480         static int cpu_id_modulus;
2481         struct octeon_droq *droq;
2482         struct napi_struct *napi;
2483         int q, q_no, retval = 0;
2484         struct lio *lio;
2485         int num_tx_descs;
2486
2487         netdev = octeon_dev->props[ifidx].netdev;
2488
2489         lio = GET_LIO(netdev);
2490
2491         memset(&droq_ops, 0, sizeof(struct octeon_droq_ops));
2492
2493         droq_ops.fptr = liquidio_push_packet;
2494         droq_ops.farg = (void *)netdev;
2495
2496         droq_ops.poll_mode = 1;
2497         droq_ops.napi_fn = liquidio_napi_drv_callback;
2498         cpu_id = 0;
2499         cpu_id_modulus = num_present_cpus();
2500
2501         /* set up DROQs. */
2502         for (q = 0; q < lio->linfo.num_rxpciq; q++) {
2503                 q_no = lio->linfo.rxpciq[q].s.q_no;
2504                 dev_dbg(&octeon_dev->pci_dev->dev,
2505                         "setup_io_queues index:%d linfo.rxpciq.s.q_no:%d\n",
2506                         q, q_no);
2507                 retval = octeon_setup_droq(octeon_dev, q_no,
2508                                            CFG_GET_NUM_RX_DESCS_NIC_IF
2509                                                    (octeon_get_conf(octeon_dev),
2510                                                    lio->ifidx),
2511                                            CFG_GET_NUM_RX_BUF_SIZE_NIC_IF
2512                                                    (octeon_get_conf(octeon_dev),
2513                                                    lio->ifidx), NULL);
2514                 if (retval) {
2515                         dev_err(&octeon_dev->pci_dev->dev,
2516                                 "%s : Runtime DROQ(RxQ) creation failed.\n",
2517                                 __func__);
2518                         return 1;
2519                 }
2520
2521                 droq = octeon_dev->droq[q_no];
2522                 napi = &droq->napi;
2523                 dev_dbg(&octeon_dev->pci_dev->dev, "netif_napi_add netdev:%llx oct:%llx pf_num:%d\n",
2524                         (u64)netdev, (u64)octeon_dev, octeon_dev->pf_num);
2525                 netif_napi_add(netdev, napi, liquidio_napi_poll, 64);
2526
2527                 /* designate a CPU for this droq */
2528                 droq->cpu_id = cpu_id;
2529                 cpu_id++;
2530                 if (cpu_id >= cpu_id_modulus)
2531                         cpu_id = 0;
2532
2533                 octeon_register_droq_ops(octeon_dev, q_no, &droq_ops);
2534         }
2535
2536         if (OCTEON_CN23XX_PF(octeon_dev)) {
2537                 /* 23XX PF can receive control messages (via the first PF-owned
2538                  * droq) from the firmware even if the ethX interface is down,
2539                  * so that's why poll_mode must be off for the first droq.
2540                  */
2541                 octeon_dev->droq[0]->ops.poll_mode = 0;
2542         }
2543
2544         /* set up IQs. */
2545         for (q = 0; q < lio->linfo.num_txpciq; q++) {
2546                 num_tx_descs = CFG_GET_NUM_TX_DESCS_NIC_IF(octeon_get_conf
2547                                                            (octeon_dev),
2548                                                            lio->ifidx);
2549                 retval = octeon_setup_iq(octeon_dev, ifidx, q,
2550                                          lio->linfo.txpciq[q], num_tx_descs,
2551                                          netdev_get_tx_queue(netdev, q));
2552                 if (retval) {
2553                         dev_err(&octeon_dev->pci_dev->dev,
2554                                 " %s : Runtime IQ(TxQ) creation failed.\n",
2555                                 __func__);
2556                         return 1;
2557                 }
2558         }
2559
2560         return 0;
2561 }
2562
2563 /**
2564  * \brief Poll routine for checking transmit queue status
2565  * @param work work_struct data structure
2566  */
2567 static void octnet_poll_check_txq_status(struct work_struct *work)
2568 {
2569         struct cavium_wk *wk = (struct cavium_wk *)work;
2570         struct lio *lio = (struct lio *)wk->ctxptr;
2571
2572         if (!ifstate_check(lio, LIO_IFSTATE_RUNNING))
2573                 return;
2574
2575         check_txq_status(lio);
2576         queue_delayed_work(lio->txq_status_wq.wq,
2577                            &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2578 }
2579
2580 /**
2581  * \brief Sets up the txq poll check
2582  * @param netdev network device
2583  */
2584 static inline int setup_tx_poll_fn(struct net_device *netdev)
2585 {
2586         struct lio *lio = GET_LIO(netdev);
2587         struct octeon_device *oct = lio->oct_dev;
2588
2589         lio->txq_status_wq.wq = alloc_workqueue("txq-status",
2590                                                 WQ_MEM_RECLAIM, 0);
2591         if (!lio->txq_status_wq.wq) {
2592                 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n");
2593                 return -1;
2594         }
2595         INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work,
2596                           octnet_poll_check_txq_status);
2597         lio->txq_status_wq.wk.ctxptr = lio;
2598         queue_delayed_work(lio->txq_status_wq.wq,
2599                            &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2600         return 0;
2601 }
2602
2603 static inline void cleanup_tx_poll_fn(struct net_device *netdev)
2604 {
2605         struct lio *lio = GET_LIO(netdev);
2606
2607         if (lio->txq_status_wq.wq) {
2608                 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work);
2609                 destroy_workqueue(lio->txq_status_wq.wq);
2610         }
2611 }
2612
2613 /**
2614  * \brief Net device open for LiquidIO
2615  * @param netdev network device
2616  */
2617 static int liquidio_open(struct net_device *netdev)
2618 {
2619         struct lio *lio = GET_LIO(netdev);
2620         struct octeon_device *oct = lio->oct_dev;
2621         struct napi_struct *napi, *n;
2622
2623         if (oct->props[lio->ifidx].napi_enabled == 0) {
2624                 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
2625                         napi_enable(napi);
2626
2627                 oct->props[lio->ifidx].napi_enabled = 1;
2628
2629                 if (OCTEON_CN23XX_PF(oct))
2630                         oct->droq[0]->ops.poll_mode = 1;
2631         }
2632
2633         if ((oct->chip_id == OCTEON_CN66XX || oct->chip_id == OCTEON_CN68XX) &&
2634             ptp_enable)
2635                 oct_ptp_open(netdev);
2636
2637         ifstate_set(lio, LIO_IFSTATE_RUNNING);
2638
2639         /* Ready for link status updates */
2640         lio->intf_open = 1;
2641
2642         netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n");
2643
2644         if (OCTEON_CN23XX_PF(oct)) {
2645                 if (!oct->msix_on)
2646                         if (setup_tx_poll_fn(netdev))
2647                                 return -1;
2648         } else {
2649                 if (setup_tx_poll_fn(netdev))
2650                         return -1;
2651         }
2652
2653         start_txq(netdev);
2654
2655         /* tell Octeon to start forwarding packets to host */
2656         send_rx_ctrl_cmd(lio, 1);
2657
2658         dev_info(&oct->pci_dev->dev, "%s interface is opened\n",
2659                  netdev->name);
2660
2661         return 0;
2662 }
2663
2664 /**
2665  * \brief Net device stop for LiquidIO
2666  * @param netdev network device
2667  */
2668 static int liquidio_stop(struct net_device *netdev)
2669 {
2670         struct lio *lio = GET_LIO(netdev);
2671         struct octeon_device *oct = lio->oct_dev;
2672
2673         ifstate_reset(lio, LIO_IFSTATE_RUNNING);
2674
2675         netif_tx_disable(netdev);
2676
2677         /* Inform that netif carrier is down */
2678         netif_carrier_off(netdev);
2679         lio->intf_open = 0;
2680         lio->linfo.link.s.link_up = 0;
2681         lio->link_changes++;
2682
2683         /* Tell Octeon that nic interface is down. */
2684         send_rx_ctrl_cmd(lio, 0);
2685
2686         if (OCTEON_CN23XX_PF(oct)) {
2687                 if (!oct->msix_on)
2688                         cleanup_tx_poll_fn(netdev);
2689         } else {
2690                 cleanup_tx_poll_fn(netdev);
2691         }
2692
2693         if (lio->ptp_clock) {
2694                 ptp_clock_unregister(lio->ptp_clock);
2695                 lio->ptp_clock = NULL;
2696         }
2697
2698         dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name);
2699
2700         return 0;
2701 }
2702
2703 /**
2704  * \brief Converts a mask based on net device flags
2705  * @param netdev network device
2706  *
2707  * This routine generates a octnet_ifflags mask from the net device flags
2708  * received from the OS.
2709  */
2710 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev)
2711 {
2712         enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST;
2713
2714         if (netdev->flags & IFF_PROMISC)
2715                 f |= OCTNET_IFFLAG_PROMISC;
2716
2717         if (netdev->flags & IFF_ALLMULTI)
2718                 f |= OCTNET_IFFLAG_ALLMULTI;
2719
2720         if (netdev->flags & IFF_MULTICAST) {
2721                 f |= OCTNET_IFFLAG_MULTICAST;
2722
2723                 /* Accept all multicast addresses if there are more than we
2724                  * can handle
2725                  */
2726                 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR)
2727                         f |= OCTNET_IFFLAG_ALLMULTI;
2728         }
2729
2730         if (netdev->flags & IFF_BROADCAST)
2731                 f |= OCTNET_IFFLAG_BROADCAST;
2732
2733         return f;
2734 }
2735
2736 /**
2737  * \brief Net device set_multicast_list
2738  * @param netdev network device
2739  */
2740 static void liquidio_set_mcast_list(struct net_device *netdev)
2741 {
2742         struct lio *lio = GET_LIO(netdev);
2743         struct octeon_device *oct = lio->oct_dev;
2744         struct octnic_ctrl_pkt nctrl;
2745         struct netdev_hw_addr *ha;
2746         u64 *mc;
2747         int ret;
2748         int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR);
2749
2750         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2751
2752         /* Create a ctrl pkt command to be sent to core app. */
2753         nctrl.ncmd.u64 = 0;
2754         nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST;
2755         nctrl.ncmd.s.param1 = get_new_flags(netdev);
2756         nctrl.ncmd.s.param2 = mc_count;
2757         nctrl.ncmd.s.more = mc_count;
2758         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2759         nctrl.netpndev = (u64)netdev;
2760         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2761
2762         /* copy all the addresses into the udd */
2763         mc = &nctrl.udd[0];
2764         netdev_for_each_mc_addr(ha, netdev) {
2765                 *mc = 0;
2766                 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN);
2767                 /* no need to swap bytes */
2768
2769                 if (++mc > &nctrl.udd[mc_count])
2770                         break;
2771         }
2772
2773         /* Apparently, any activity in this call from the kernel has to
2774          * be atomic. So we won't wait for response.
2775          */
2776         nctrl.wait_time = 0;
2777
2778         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2779         if (ret < 0) {
2780                 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n",
2781                         ret);
2782         }
2783 }
2784
2785 /**
2786  * \brief Net device set_mac_address
2787  * @param netdev network device
2788  */
2789 static int liquidio_set_mac(struct net_device *netdev, void *p)
2790 {
2791         int ret = 0;
2792         struct lio *lio = GET_LIO(netdev);
2793         struct octeon_device *oct = lio->oct_dev;
2794         struct sockaddr *addr = (struct sockaddr *)p;
2795         struct octnic_ctrl_pkt nctrl;
2796
2797         if (!is_valid_ether_addr(addr->sa_data))
2798                 return -EADDRNOTAVAIL;
2799
2800         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2801
2802         nctrl.ncmd.u64 = 0;
2803         nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
2804         nctrl.ncmd.s.param1 = 0;
2805         nctrl.ncmd.s.more = 1;
2806         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2807         nctrl.netpndev = (u64)netdev;
2808         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2809         nctrl.wait_time = 100;
2810
2811         nctrl.udd[0] = 0;
2812         /* The MAC Address is presented in network byte order. */
2813         memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN);
2814
2815         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2816         if (ret < 0) {
2817                 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n");
2818                 return -ENOMEM;
2819         }
2820         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2821         memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN);
2822
2823         return 0;
2824 }
2825
2826 /**
2827  * \brief Net device get_stats
2828  * @param netdev network device
2829  */
2830 static struct net_device_stats *liquidio_get_stats(struct net_device *netdev)
2831 {
2832         struct lio *lio = GET_LIO(netdev);
2833         struct net_device_stats *stats = &netdev->stats;
2834         struct octeon_device *oct;
2835         u64 pkts = 0, drop = 0, bytes = 0;
2836         struct oct_droq_stats *oq_stats;
2837         struct oct_iq_stats *iq_stats;
2838         int i, iq_no, oq_no;
2839
2840         oct = lio->oct_dev;
2841
2842         for (i = 0; i < lio->linfo.num_txpciq; i++) {
2843                 iq_no = lio->linfo.txpciq[i].s.q_no;
2844                 iq_stats = &oct->instr_queue[iq_no]->stats;
2845                 pkts += iq_stats->tx_done;
2846                 drop += iq_stats->tx_dropped;
2847                 bytes += iq_stats->tx_tot_bytes;
2848         }
2849
2850         stats->tx_packets = pkts;
2851         stats->tx_bytes = bytes;
2852         stats->tx_dropped = drop;
2853
2854         pkts = 0;
2855         drop = 0;
2856         bytes = 0;
2857
2858         for (i = 0; i < lio->linfo.num_rxpciq; i++) {
2859                 oq_no = lio->linfo.rxpciq[i].s.q_no;
2860                 oq_stats = &oct->droq[oq_no]->stats;
2861                 pkts += oq_stats->rx_pkts_received;
2862                 drop += (oq_stats->rx_dropped +
2863                          oq_stats->dropped_nodispatch +
2864                          oq_stats->dropped_toomany +
2865                          oq_stats->dropped_nomem);
2866                 bytes += oq_stats->rx_bytes_received;
2867         }
2868
2869         stats->rx_bytes = bytes;
2870         stats->rx_packets = pkts;
2871         stats->rx_dropped = drop;
2872
2873         return stats;
2874 }
2875
2876 /**
2877  * \brief Net device change_mtu
2878  * @param netdev network device
2879  */
2880 static int liquidio_change_mtu(struct net_device *netdev, int new_mtu)
2881 {
2882         struct lio *lio = GET_LIO(netdev);
2883         struct octeon_device *oct = lio->oct_dev;
2884         struct octnic_ctrl_pkt nctrl;
2885         int ret = 0;
2886
2887         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2888
2889         nctrl.ncmd.u64 = 0;
2890         nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MTU;
2891         nctrl.ncmd.s.param1 = new_mtu;
2892         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2893         nctrl.wait_time = 100;
2894         nctrl.netpndev = (u64)netdev;
2895         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2896
2897         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2898         if (ret < 0) {
2899                 dev_err(&oct->pci_dev->dev, "Failed to set MTU\n");
2900                 return -1;
2901         }
2902
2903         lio->mtu = new_mtu;
2904
2905         return 0;
2906 }
2907
2908 /**
2909  * \brief Handler for SIOCSHWTSTAMP ioctl
2910  * @param netdev network device
2911  * @param ifr interface request
2912  * @param cmd command
2913  */
2914 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
2915 {
2916         struct hwtstamp_config conf;
2917         struct lio *lio = GET_LIO(netdev);
2918
2919         if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf)))
2920                 return -EFAULT;
2921
2922         if (conf.flags)
2923                 return -EINVAL;
2924
2925         switch (conf.tx_type) {
2926         case HWTSTAMP_TX_ON:
2927         case HWTSTAMP_TX_OFF:
2928                 break;
2929         default:
2930                 return -ERANGE;
2931         }
2932
2933         switch (conf.rx_filter) {
2934         case HWTSTAMP_FILTER_NONE:
2935                 break;
2936         case HWTSTAMP_FILTER_ALL:
2937         case HWTSTAMP_FILTER_SOME:
2938         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2939         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2940         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2941         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2942         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2943         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2944         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2945         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2946         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2947         case HWTSTAMP_FILTER_PTP_V2_EVENT:
2948         case HWTSTAMP_FILTER_PTP_V2_SYNC:
2949         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2950                 conf.rx_filter = HWTSTAMP_FILTER_ALL;
2951                 break;
2952         default:
2953                 return -ERANGE;
2954         }
2955
2956         if (conf.rx_filter == HWTSTAMP_FILTER_ALL)
2957                 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2958
2959         else
2960                 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2961
2962         return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0;
2963 }
2964
2965 /**
2966  * \brief ioctl handler
2967  * @param netdev network device
2968  * @param ifr interface request
2969  * @param cmd command
2970  */
2971 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2972 {
2973         struct lio *lio = GET_LIO(netdev);
2974
2975         switch (cmd) {
2976         case SIOCSHWTSTAMP:
2977                 if ((lio->oct_dev->chip_id == OCTEON_CN66XX ||
2978                      lio->oct_dev->chip_id == OCTEON_CN68XX) && ptp_enable)
2979                         return hwtstamp_ioctl(netdev, ifr);
2980         default:
2981                 return -EOPNOTSUPP;
2982         }
2983 }
2984
2985 /**
2986  * \brief handle a Tx timestamp response
2987  * @param status response status
2988  * @param buf pointer to skb
2989  */
2990 static void handle_timestamp(struct octeon_device *oct,
2991                              u32 status,
2992                              void *buf)
2993 {
2994         struct octnet_buf_free_info *finfo;
2995         struct octeon_soft_command *sc;
2996         struct oct_timestamp_resp *resp;
2997         struct lio *lio;
2998         struct sk_buff *skb = (struct sk_buff *)buf;
2999
3000         finfo = (struct octnet_buf_free_info *)skb->cb;
3001         lio = finfo->lio;
3002         sc = finfo->sc;
3003         oct = lio->oct_dev;
3004         resp = (struct oct_timestamp_resp *)sc->virtrptr;
3005
3006         if (status != OCTEON_REQUEST_DONE) {
3007                 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n",
3008                         CVM_CAST64(status));
3009                 resp->timestamp = 0;
3010         }
3011
3012         octeon_swap_8B_data(&resp->timestamp, 1);
3013
3014         if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) {
3015                 struct skb_shared_hwtstamps ts;
3016                 u64 ns = resp->timestamp;
3017
3018                 netif_info(lio, tx_done, lio->netdev,
3019                            "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n",
3020                            skb, (unsigned long long)ns);
3021                 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust);
3022                 skb_tstamp_tx(skb, &ts);
3023         }
3024
3025         octeon_free_soft_command(oct, sc);
3026         tx_buffer_free(skb);
3027 }
3028
3029 /* \brief Send a data packet that will be timestamped
3030  * @param oct octeon device
3031  * @param ndata pointer to network data
3032  * @param finfo pointer to private network data
3033  */
3034 static inline int send_nic_timestamp_pkt(struct octeon_device *oct,
3035                                          struct octnic_data_pkt *ndata,
3036                                          struct octnet_buf_free_info *finfo)
3037 {
3038         int retval;
3039         struct octeon_soft_command *sc;
3040         struct lio *lio;
3041         int ring_doorbell;
3042         u32 len;
3043
3044         lio = finfo->lio;
3045
3046         sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd,
3047                                             sizeof(struct oct_timestamp_resp));
3048         finfo->sc = sc;
3049
3050         if (!sc) {
3051                 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n");
3052                 return IQ_SEND_FAILED;
3053         }
3054
3055         if (ndata->reqtype == REQTYPE_NORESP_NET)
3056                 ndata->reqtype = REQTYPE_RESP_NET;
3057         else if (ndata->reqtype == REQTYPE_NORESP_NET_SG)
3058                 ndata->reqtype = REQTYPE_RESP_NET_SG;
3059
3060         sc->callback = handle_timestamp;
3061         sc->callback_arg = finfo->skb;
3062         sc->iq_no = ndata->q_no;
3063
3064         if (OCTEON_CN23XX_PF(oct))
3065                 len = (u32)((struct octeon_instr_ih3 *)
3066                             (&sc->cmd.cmd3.ih3))->dlengsz;
3067         else
3068                 len = (u32)((struct octeon_instr_ih2 *)
3069                             (&sc->cmd.cmd2.ih2))->dlengsz;
3070
3071         ring_doorbell = 1;
3072
3073         retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd,
3074                                      sc, len, ndata->reqtype);
3075
3076         if (retval == IQ_SEND_FAILED) {
3077                 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n",
3078                         retval);
3079                 octeon_free_soft_command(oct, sc);
3080         } else {
3081                 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n");
3082         }
3083
3084         return retval;
3085 }
3086
3087 /** \brief Transmit networks packets to the Octeon interface
3088  * @param skbuff   skbuff struct to be passed to network layer.
3089  * @param netdev    pointer to network device
3090  * @returns whether the packet was transmitted to the device okay or not
3091  *             (NETDEV_TX_OK or NETDEV_TX_BUSY)
3092  */
3093 static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
3094 {
3095         struct lio *lio;
3096         struct octnet_buf_free_info *finfo;
3097         union octnic_cmd_setup cmdsetup;
3098         struct octnic_data_pkt ndata;
3099         struct octeon_device *oct;
3100         struct oct_iq_stats *stats;
3101         struct octeon_instr_irh *irh;
3102         union tx_info *tx_info;
3103         int status = 0;
3104         int q_idx = 0, iq_no = 0;
3105         int j;
3106         u64 dptr = 0;
3107         u32 tag = 0;
3108
3109         lio = GET_LIO(netdev);
3110         oct = lio->oct_dev;
3111
3112         if (netif_is_multiqueue(netdev)) {
3113                 q_idx = skb->queue_mapping;
3114                 q_idx = (q_idx % (lio->linfo.num_txpciq));
3115                 tag = q_idx;
3116                 iq_no = lio->linfo.txpciq[q_idx].s.q_no;
3117         } else {
3118                 iq_no = lio->txq;
3119         }
3120
3121         stats = &oct->instr_queue[iq_no]->stats;
3122
3123         /* Check for all conditions in which the current packet cannot be
3124          * transmitted.
3125          */
3126         if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) ||
3127             (!lio->linfo.link.s.link_up) ||
3128             (skb->len <= 0)) {
3129                 netif_info(lio, tx_err, lio->netdev,
3130                            "Transmit failed link_status : %d\n",
3131                            lio->linfo.link.s.link_up);
3132                 goto lio_xmit_failed;
3133         }
3134
3135         /* Use space in skb->cb to store info used to unmap and
3136          * free the buffers.
3137          */
3138         finfo = (struct octnet_buf_free_info *)skb->cb;
3139         finfo->lio = lio;
3140         finfo->skb = skb;
3141         finfo->sc = NULL;
3142
3143         /* Prepare the attributes for the data to be passed to OSI. */
3144         memset(&ndata, 0, sizeof(struct octnic_data_pkt));
3145
3146         ndata.buf = (void *)finfo;
3147
3148         ndata.q_no = iq_no;
3149
3150         if (netif_is_multiqueue(netdev)) {
3151                 if (octnet_iq_is_full(oct, ndata.q_no)) {
3152                         /* defer sending if queue is full */
3153                         netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3154                                    ndata.q_no);
3155                         stats->tx_iq_busy++;
3156                         return NETDEV_TX_BUSY;
3157                 }
3158         } else {
3159                 if (octnet_iq_is_full(oct, lio->txq)) {
3160                         /* defer sending if queue is full */
3161                         stats->tx_iq_busy++;
3162                         netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3163                                    lio->txq);
3164                         return NETDEV_TX_BUSY;
3165                 }
3166         }
3167         /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu:  %d, q_no:%d\n",
3168          *      lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no);
3169          */
3170
3171         ndata.datasize = skb->len;
3172
3173         cmdsetup.u64 = 0;
3174         cmdsetup.s.iq_no = iq_no;
3175
3176         if (skb->ip_summed == CHECKSUM_PARTIAL) {
3177                 if (skb->encapsulation) {
3178                         cmdsetup.s.tnl_csum = 1;
3179                         stats->tx_vxlan++;
3180                 } else {
3181                         cmdsetup.s.transport_csum = 1;
3182                 }
3183         }
3184         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
3185                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
3186                 cmdsetup.s.timestamp = 1;
3187         }
3188
3189         if (skb_shinfo(skb)->nr_frags == 0) {
3190                 cmdsetup.s.u.datasize = skb->len;
3191                 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3192
3193                 /* Offload checksum calculation for TCP/UDP packets */
3194                 dptr = dma_map_single(&oct->pci_dev->dev,
3195                                       skb->data,
3196                                       skb->len,
3197                                       DMA_TO_DEVICE);
3198                 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) {
3199                         dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n",
3200                                 __func__);
3201                         return NETDEV_TX_BUSY;
3202                 }
3203
3204                 if (OCTEON_CN23XX_PF(oct))
3205                         ndata.cmd.cmd3.dptr = dptr;
3206                 else
3207                         ndata.cmd.cmd2.dptr = dptr;
3208                 finfo->dptr = dptr;
3209                 ndata.reqtype = REQTYPE_NORESP_NET;
3210
3211         } else {
3212                 int i, frags;
3213                 struct skb_frag_struct *frag;
3214                 struct octnic_gather *g;
3215
3216                 spin_lock(&lio->glist_lock[q_idx]);
3217                 g = (struct octnic_gather *)
3218                         list_delete_head(&lio->glist[q_idx]);
3219                 spin_unlock(&lio->glist_lock[q_idx]);
3220
3221                 if (!g) {
3222                         netif_info(lio, tx_err, lio->netdev,
3223                                    "Transmit scatter gather: glist null!\n");
3224                         goto lio_xmit_failed;
3225                 }
3226
3227                 cmdsetup.s.gather = 1;
3228                 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1);
3229                 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3230
3231                 memset(g->sg, 0, g->sg_size);
3232
3233                 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev,
3234                                                  skb->data,
3235                                                  (skb->len - skb->data_len),
3236                                                  DMA_TO_DEVICE);
3237                 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) {
3238                         dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n",
3239                                 __func__);
3240                         return NETDEV_TX_BUSY;
3241                 }
3242                 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0);
3243
3244                 frags = skb_shinfo(skb)->nr_frags;
3245                 i = 1;
3246                 while (frags--) {
3247                         frag = &skb_shinfo(skb)->frags[i - 1];
3248
3249                         g->sg[(i >> 2)].ptr[(i & 3)] =
3250                                 dma_map_page(&oct->pci_dev->dev,
3251                                              frag->page.p,
3252                                              frag->page_offset,
3253                                              frag->size,
3254                                              DMA_TO_DEVICE);
3255
3256                         if (dma_mapping_error(&oct->pci_dev->dev,
3257                                               g->sg[i >> 2].ptr[i & 3])) {
3258                                 dma_unmap_single(&oct->pci_dev->dev,
3259                                                  g->sg[0].ptr[0],
3260                                                  skb->len - skb->data_len,
3261                                                  DMA_TO_DEVICE);
3262                                 for (j = 1; j < i; j++) {
3263                                         frag = &skb_shinfo(skb)->frags[j - 1];
3264                                         dma_unmap_page(&oct->pci_dev->dev,
3265                                                        g->sg[j >> 2].ptr[j & 3],
3266                                                        frag->size,
3267                                                        DMA_TO_DEVICE);
3268                                 }
3269                                 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n",
3270                                         __func__);
3271                                 return NETDEV_TX_BUSY;
3272                         }
3273
3274                         add_sg_size(&g->sg[(i >> 2)], frag->size, (i & 3));
3275                         i++;
3276                 }
3277
3278                 dptr = g->sg_dma_ptr;
3279
3280                 if (OCTEON_CN23XX_PF(oct))
3281                         ndata.cmd.cmd3.dptr = dptr;
3282                 else
3283                         ndata.cmd.cmd2.dptr = dptr;
3284                 finfo->dptr = dptr;
3285                 finfo->g = g;
3286
3287                 ndata.reqtype = REQTYPE_NORESP_NET_SG;
3288         }
3289
3290         if (OCTEON_CN23XX_PF(oct)) {
3291                 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh;
3292                 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0];
3293         } else {
3294                 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh;
3295                 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0];
3296         }
3297
3298         if (skb_shinfo(skb)->gso_size) {
3299                 tx_info->s.gso_size = skb_shinfo(skb)->gso_size;
3300                 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs;
3301                 stats->tx_gso++;
3302         }
3303
3304         /* HW insert VLAN tag */
3305         if (skb_vlan_tag_present(skb)) {
3306                 irh->priority = skb_vlan_tag_get(skb) >> 13;
3307                 irh->vlan = skb_vlan_tag_get(skb) & 0xfff;
3308         }
3309
3310         if (unlikely(cmdsetup.s.timestamp))
3311                 status = send_nic_timestamp_pkt(oct, &ndata, finfo);
3312         else
3313                 status = octnet_send_nic_data_pkt(oct, &ndata);
3314         if (status == IQ_SEND_FAILED)
3315                 goto lio_xmit_failed;
3316
3317         netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n");
3318
3319         if (status == IQ_SEND_STOP)
3320                 stop_q(lio->netdev, q_idx);
3321
3322         netif_trans_update(netdev);
3323
3324         if (tx_info->s.gso_segs)
3325                 stats->tx_done += tx_info->s.gso_segs;
3326         else
3327                 stats->tx_done++;
3328         stats->tx_tot_bytes += ndata.datasize;
3329
3330         return NETDEV_TX_OK;
3331
3332 lio_xmit_failed:
3333         stats->tx_dropped++;
3334         netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n",
3335                    iq_no, stats->tx_dropped);
3336         if (dptr)
3337                 dma_unmap_single(&oct->pci_dev->dev, dptr,
3338                                  ndata.datasize, DMA_TO_DEVICE);
3339         tx_buffer_free(skb);
3340         return NETDEV_TX_OK;
3341 }
3342
3343 /** \brief Network device Tx timeout
3344  * @param netdev    pointer to network device
3345  */
3346 static void liquidio_tx_timeout(struct net_device *netdev)
3347 {
3348         struct lio *lio;
3349
3350         lio = GET_LIO(netdev);
3351
3352         netif_info(lio, tx_err, lio->netdev,
3353                    "Transmit timeout tx_dropped:%ld, waking up queues now!!\n",
3354                    netdev->stats.tx_dropped);
3355         netif_trans_update(netdev);
3356         txqs_wake(netdev);
3357 }
3358
3359 static int liquidio_vlan_rx_add_vid(struct net_device *netdev,
3360                                     __be16 proto __attribute__((unused)),
3361                                     u16 vid)
3362 {
3363         struct lio *lio = GET_LIO(netdev);
3364         struct octeon_device *oct = lio->oct_dev;
3365         struct octnic_ctrl_pkt nctrl;
3366         int ret = 0;
3367
3368         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3369
3370         nctrl.ncmd.u64 = 0;
3371         nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER;
3372         nctrl.ncmd.s.param1 = vid;
3373         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3374         nctrl.wait_time = 100;
3375         nctrl.netpndev = (u64)netdev;
3376         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3377
3378         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3379         if (ret < 0) {
3380                 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3381                         ret);
3382         }
3383
3384         return ret;
3385 }
3386
3387 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev,
3388                                      __be16 proto __attribute__((unused)),
3389                                      u16 vid)
3390 {
3391         struct lio *lio = GET_LIO(netdev);
3392         struct octeon_device *oct = lio->oct_dev;
3393         struct octnic_ctrl_pkt nctrl;
3394         int ret = 0;
3395
3396         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3397
3398         nctrl.ncmd.u64 = 0;
3399         nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER;
3400         nctrl.ncmd.s.param1 = vid;
3401         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3402         nctrl.wait_time = 100;
3403         nctrl.netpndev = (u64)netdev;
3404         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3405
3406         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3407         if (ret < 0) {
3408                 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3409                         ret);
3410         }
3411         return ret;
3412 }
3413
3414 /** Sending command to enable/disable RX checksum offload
3415  * @param netdev                pointer to network device
3416  * @param command               OCTNET_CMD_TNL_RX_CSUM_CTL
3417  * @param rx_cmd_bit            OCTNET_CMD_RXCSUM_ENABLE/
3418  *                              OCTNET_CMD_RXCSUM_DISABLE
3419  * @returns                     SUCCESS or FAILURE
3420  */
3421 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command,
3422                                        u8 rx_cmd)
3423 {
3424         struct lio *lio = GET_LIO(netdev);
3425         struct octeon_device *oct = lio->oct_dev;
3426         struct octnic_ctrl_pkt nctrl;
3427         int ret = 0;
3428
3429         nctrl.ncmd.u64 = 0;
3430         nctrl.ncmd.s.cmd = command;
3431         nctrl.ncmd.s.param1 = rx_cmd;
3432         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3433         nctrl.wait_time = 100;
3434         nctrl.netpndev = (u64)netdev;
3435         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3436
3437         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3438         if (ret < 0) {
3439                 dev_err(&oct->pci_dev->dev,
3440                         "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n",
3441                         ret);
3442         }
3443         return ret;
3444 }
3445
3446 /** Sending command to add/delete VxLAN UDP port to firmware
3447  * @param netdev                pointer to network device
3448  * @param command               OCTNET_CMD_VXLAN_PORT_CONFIG
3449  * @param vxlan_port            VxLAN port to be added or deleted
3450  * @param vxlan_cmd_bit         OCTNET_CMD_VXLAN_PORT_ADD,
3451  *                              OCTNET_CMD_VXLAN_PORT_DEL
3452  * @returns                     SUCCESS or FAILURE
3453  */
3454 static int liquidio_vxlan_port_command(struct net_device *netdev, int command,
3455                                        u16 vxlan_port, u8 vxlan_cmd_bit)
3456 {
3457         struct lio *lio = GET_LIO(netdev);
3458         struct octeon_device *oct = lio->oct_dev;
3459         struct octnic_ctrl_pkt nctrl;
3460         int ret = 0;
3461
3462         nctrl.ncmd.u64 = 0;
3463         nctrl.ncmd.s.cmd = command;
3464         nctrl.ncmd.s.more = vxlan_cmd_bit;
3465         nctrl.ncmd.s.param1 = vxlan_port;
3466         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3467         nctrl.wait_time = 100;
3468         nctrl.netpndev = (u64)netdev;
3469         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3470
3471         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3472         if (ret < 0) {
3473                 dev_err(&oct->pci_dev->dev,
3474                         "VxLAN port add/delete failed in core (ret:0x%x)\n",
3475                         ret);
3476         }
3477         return ret;
3478 }
3479
3480 /** \brief Net device fix features
3481  * @param netdev  pointer to network device
3482  * @param request features requested
3483  * @returns updated features list
3484  */
3485 static netdev_features_t liquidio_fix_features(struct net_device *netdev,
3486                                                netdev_features_t request)
3487 {
3488         struct lio *lio = netdev_priv(netdev);
3489
3490         if ((request & NETIF_F_RXCSUM) &&
3491             !(lio->dev_capability & NETIF_F_RXCSUM))
3492                 request &= ~NETIF_F_RXCSUM;
3493
3494         if ((request & NETIF_F_HW_CSUM) &&
3495             !(lio->dev_capability & NETIF_F_HW_CSUM))
3496                 request &= ~NETIF_F_HW_CSUM;
3497
3498         if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO))
3499                 request &= ~NETIF_F_TSO;
3500
3501         if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6))
3502                 request &= ~NETIF_F_TSO6;
3503
3504         if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO))
3505                 request &= ~NETIF_F_LRO;
3506
3507         /*Disable LRO if RXCSUM is off */
3508         if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) &&
3509             (lio->dev_capability & NETIF_F_LRO))
3510                 request &= ~NETIF_F_LRO;
3511
3512         return request;
3513 }
3514
3515 /** \brief Net device set features
3516  * @param netdev  pointer to network device
3517  * @param features features to enable/disable
3518  */
3519 static int liquidio_set_features(struct net_device *netdev,
3520                                  netdev_features_t features)
3521 {
3522         struct lio *lio = netdev_priv(netdev);
3523
3524         if (!((netdev->features ^ features) & NETIF_F_LRO))
3525                 return 0;
3526
3527         if ((features & NETIF_F_LRO) && (lio->dev_capability & NETIF_F_LRO))
3528                 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
3529                                      OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3530         else if (!(features & NETIF_F_LRO) &&
3531                  (lio->dev_capability & NETIF_F_LRO))
3532                 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE,
3533                                      OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3534
3535         /* Sending command to firmware to enable/disable RX checksum
3536          * offload settings using ethtool
3537          */
3538         if (!(netdev->features & NETIF_F_RXCSUM) &&
3539             (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3540             (features & NETIF_F_RXCSUM))
3541                 liquidio_set_rxcsum_command(netdev,
3542                                             OCTNET_CMD_TNL_RX_CSUM_CTL,
3543                                             OCTNET_CMD_RXCSUM_ENABLE);
3544         else if ((netdev->features & NETIF_F_RXCSUM) &&
3545                  (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3546                  !(features & NETIF_F_RXCSUM))
3547                 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
3548                                             OCTNET_CMD_RXCSUM_DISABLE);
3549
3550         return 0;
3551 }
3552
3553 static void liquidio_add_vxlan_port(struct net_device *netdev,
3554                                     struct udp_tunnel_info *ti)
3555 {
3556         if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3557                 return;
3558
3559         liquidio_vxlan_port_command(netdev,
3560                                     OCTNET_CMD_VXLAN_PORT_CONFIG,
3561                                     htons(ti->port),
3562                                     OCTNET_CMD_VXLAN_PORT_ADD);
3563 }
3564
3565 static void liquidio_del_vxlan_port(struct net_device *netdev,
3566                                     struct udp_tunnel_info *ti)
3567 {
3568         if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3569                 return;
3570
3571         liquidio_vxlan_port_command(netdev,
3572                                     OCTNET_CMD_VXLAN_PORT_CONFIG,
3573                                     htons(ti->port),
3574                                     OCTNET_CMD_VXLAN_PORT_DEL);
3575 }
3576
3577 static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx,
3578                                  u8 *mac, bool is_admin_assigned)
3579 {
3580         struct lio *lio = GET_LIO(netdev);
3581         struct octeon_device *oct = lio->oct_dev;
3582         struct octnic_ctrl_pkt nctrl;
3583
3584         if (!is_valid_ether_addr(mac))
3585                 return -EINVAL;
3586
3587         if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs)
3588                 return -EINVAL;
3589
3590         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3591
3592         nctrl.ncmd.u64 = 0;
3593         nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
3594         /* vfidx is 0 based, but vf_num (param1) is 1 based */
3595         nctrl.ncmd.s.param1 = vfidx + 1;
3596         nctrl.ncmd.s.param2 = (is_admin_assigned ? 1 : 0);
3597         nctrl.ncmd.s.more = 1;
3598         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3599         nctrl.cb_fn = 0;
3600         nctrl.wait_time = LIO_CMD_WAIT_TM;
3601
3602         nctrl.udd[0] = 0;
3603         /* The MAC Address is presented in network byte order. */
3604         ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac);
3605
3606         oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0];
3607
3608         octnet_send_nic_ctrl_pkt(oct, &nctrl);
3609
3610         return 0;
3611 }
3612
3613 static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac)
3614 {
3615         struct lio *lio = GET_LIO(netdev);
3616         struct octeon_device *oct = lio->oct_dev;
3617         int retval;
3618
3619         retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true);
3620         if (!retval)
3621                 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac);
3622
3623         return retval;
3624 }
3625
3626 static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx,
3627                                 u16 vlan, u8 qos, __be16 vlan_proto)
3628 {
3629         struct lio *lio = GET_LIO(netdev);
3630         struct octeon_device *oct = lio->oct_dev;
3631         struct octnic_ctrl_pkt nctrl;
3632         u16 vlantci;
3633
3634         if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced)
3635                 return -EINVAL;
3636
3637         if (vlan_proto != htons(ETH_P_8021Q))
3638                 return -EPROTONOSUPPORT;
3639
3640         if (vlan >= VLAN_N_VID || qos > 7)
3641                 return -EINVAL;
3642
3643         if (vlan)
3644                 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT;
3645         else
3646                 vlantci = 0;
3647
3648         if (oct->sriov_info.vf_vlantci[vfidx] == vlantci)
3649                 return 0;
3650
3651         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3652
3653         if (vlan)
3654                 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER;
3655         else
3656                 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER;
3657
3658         nctrl.ncmd.s.param1 = vlantci;
3659         nctrl.ncmd.s.param2 =
3660             vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */
3661         nctrl.ncmd.s.more = 0;
3662         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3663         nctrl.cb_fn = 0;
3664         nctrl.wait_time = LIO_CMD_WAIT_TM;
3665
3666         octnet_send_nic_ctrl_pkt(oct, &nctrl);
3667
3668         oct->sriov_info.vf_vlantci[vfidx] = vlantci;
3669
3670         return 0;
3671 }
3672
3673 static int liquidio_get_vf_config(struct net_device *netdev, int vfidx,
3674                                   struct ifla_vf_info *ivi)
3675 {
3676         struct lio *lio = GET_LIO(netdev);
3677         struct octeon_device *oct = lio->oct_dev;
3678         u8 *macaddr;
3679
3680         if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced)
3681                 return -EINVAL;
3682
3683         ivi->vf = vfidx;
3684         macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx];
3685         ether_addr_copy(&ivi->mac[0], macaddr);
3686         ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK;
3687         ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT;
3688         ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx];
3689         return 0;
3690 }
3691
3692 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx,
3693                                       int linkstate)
3694 {
3695         struct lio *lio = GET_LIO(netdev);
3696         struct octeon_device *oct = lio->oct_dev;
3697         struct octnic_ctrl_pkt nctrl;
3698
3699         if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced)
3700                 return -EINVAL;
3701
3702         if (oct->sriov_info.vf_linkstate[vfidx] == linkstate)
3703                 return 0;
3704
3705         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3706         nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE;
3707         nctrl.ncmd.s.param1 =
3708             vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */
3709         nctrl.ncmd.s.param2 = linkstate;
3710         nctrl.ncmd.s.more = 0;
3711         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3712         nctrl.cb_fn = 0;
3713         nctrl.wait_time = LIO_CMD_WAIT_TM;
3714
3715         octnet_send_nic_ctrl_pkt(oct, &nctrl);
3716
3717         oct->sriov_info.vf_linkstate[vfidx] = linkstate;
3718
3719         return 0;
3720 }
3721
3722 static const struct net_device_ops lionetdevops = {
3723         .ndo_open               = liquidio_open,
3724         .ndo_stop               = liquidio_stop,
3725         .ndo_start_xmit         = liquidio_xmit,
3726         .ndo_get_stats          = liquidio_get_stats,
3727         .ndo_set_mac_address    = liquidio_set_mac,
3728         .ndo_set_rx_mode        = liquidio_set_mcast_list,
3729         .ndo_tx_timeout         = liquidio_tx_timeout,
3730
3731         .ndo_vlan_rx_add_vid    = liquidio_vlan_rx_add_vid,
3732         .ndo_vlan_rx_kill_vid   = liquidio_vlan_rx_kill_vid,
3733         .ndo_change_mtu         = liquidio_change_mtu,
3734         .ndo_do_ioctl           = liquidio_ioctl,
3735         .ndo_fix_features       = liquidio_fix_features,
3736         .ndo_set_features       = liquidio_set_features,
3737         .ndo_udp_tunnel_add     = liquidio_add_vxlan_port,
3738         .ndo_udp_tunnel_del     = liquidio_del_vxlan_port,
3739         .ndo_set_vf_mac         = liquidio_set_vf_mac,
3740         .ndo_set_vf_vlan        = liquidio_set_vf_vlan,
3741         .ndo_get_vf_config      = liquidio_get_vf_config,
3742         .ndo_set_vf_link_state  = liquidio_set_vf_link_state,
3743 };
3744
3745 /** \brief Entry point for the liquidio module
3746  */
3747 static int __init liquidio_init(void)
3748 {
3749         int i;
3750         struct handshake *hs;
3751
3752         init_completion(&first_stage);
3753
3754         octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT);
3755
3756         if (liquidio_init_pci())
3757                 return -EINVAL;
3758
3759         wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000));
3760
3761         for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3762                 hs = &handshake[i];
3763                 if (hs->pci_dev) {
3764                         wait_for_completion(&hs->init);
3765                         if (!hs->init_ok) {
3766                                 /* init handshake failed */
3767                                 dev_err(&hs->pci_dev->dev,
3768                                         "Failed to init device\n");
3769                                 liquidio_deinit_pci();
3770                                 return -EIO;
3771                         }
3772                 }
3773         }
3774
3775         for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3776                 hs = &handshake[i];
3777                 if (hs->pci_dev) {
3778                         wait_for_completion_timeout(&hs->started,
3779                                                     msecs_to_jiffies(30000));
3780                         if (!hs->started_ok) {
3781                                 /* starter handshake failed */
3782                                 dev_err(&hs->pci_dev->dev,
3783                                         "Firmware failed to start\n");
3784                                 liquidio_deinit_pci();
3785                                 return -EIO;
3786                         }
3787                 }
3788         }
3789
3790         return 0;
3791 }
3792
3793 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf)
3794 {
3795         struct octeon_device *oct = (struct octeon_device *)buf;
3796         struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
3797         int gmxport = 0;
3798         union oct_link_status *ls;
3799         int i;
3800
3801         if (recv_pkt->buffer_size[0] != sizeof(*ls)) {
3802                 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n",
3803                         recv_pkt->buffer_size[0],
3804                         recv_pkt->rh.r_nic_info.gmxport);
3805                 goto nic_info_err;
3806         }
3807
3808         gmxport = recv_pkt->rh.r_nic_info.gmxport;
3809         ls = (union oct_link_status *)get_rbd(recv_pkt->buffer_ptr[0]);
3810
3811         octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3);
3812         for (i = 0; i < oct->ifcount; i++) {
3813                 if (oct->props[i].gmxport == gmxport) {
3814                         update_link_status(oct->props[i].netdev, ls);
3815                         break;
3816                 }
3817         }
3818
3819 nic_info_err:
3820         for (i = 0; i < recv_pkt->buffer_count; i++)
3821                 recv_buffer_free(recv_pkt->buffer_ptr[i]);
3822         octeon_free_recv_info(recv_info);
3823         return 0;
3824 }
3825
3826 /**
3827  * \brief Setup network interfaces
3828  * @param octeon_dev  octeon device
3829  *
3830  * Called during init time for each device. It assumes the NIC
3831  * is already up and running.  The link information for each
3832  * interface is passed in link_info.
3833  */
3834 static int setup_nic_devices(struct octeon_device *octeon_dev)
3835 {
3836         struct lio *lio = NULL;
3837         struct net_device *netdev;
3838         u8 mac[6], i, j;
3839         struct octeon_soft_command *sc;
3840         struct liquidio_if_cfg_context *ctx;
3841         struct liquidio_if_cfg_resp *resp;
3842         struct octdev_props *props;
3843         int retval, num_iqueues, num_oqueues;
3844         union oct_nic_if_cfg if_cfg;
3845         unsigned int base_queue;
3846         unsigned int gmx_port_id;
3847         u32 resp_size, ctx_size, data_size;
3848         u32 ifidx_or_pfnum;
3849         struct lio_version *vdata;
3850
3851         /* This is to handle link status changes */
3852         octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
3853                                     OPCODE_NIC_INFO,
3854                                     lio_nic_info, octeon_dev);
3855
3856         /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions.
3857          * They are handled directly.
3858          */
3859         octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET,
3860                                         free_netbuf);
3861
3862         octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG,
3863                                         free_netsgbuf);
3864
3865         octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG,
3866                                         free_netsgbuf_with_resp);
3867
3868         for (i = 0; i < octeon_dev->ifcount; i++) {
3869                 resp_size = sizeof(struct liquidio_if_cfg_resp);
3870                 ctx_size = sizeof(struct liquidio_if_cfg_context);
3871                 data_size = sizeof(struct lio_version);
3872                 sc = (struct octeon_soft_command *)
3873                         octeon_alloc_soft_command(octeon_dev, data_size,
3874                                                   resp_size, ctx_size);
3875                 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
3876                 ctx  = (struct liquidio_if_cfg_context *)sc->ctxptr;
3877                 vdata = (struct lio_version *)sc->virtdptr;
3878
3879                 *((u64 *)vdata) = 0;
3880                 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION);
3881                 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION);
3882                 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION);
3883
3884                 if (OCTEON_CN23XX_PF(octeon_dev)) {
3885                         num_iqueues = octeon_dev->sriov_info.num_pf_rings;
3886                         num_oqueues = octeon_dev->sriov_info.num_pf_rings;
3887                         base_queue = octeon_dev->sriov_info.pf_srn;
3888
3889                         gmx_port_id = octeon_dev->pf_num;
3890                         ifidx_or_pfnum = octeon_dev->pf_num;
3891                 } else {
3892                         num_iqueues = CFG_GET_NUM_TXQS_NIC_IF(
3893                                                 octeon_get_conf(octeon_dev), i);
3894                         num_oqueues = CFG_GET_NUM_RXQS_NIC_IF(
3895                                                 octeon_get_conf(octeon_dev), i);
3896                         base_queue = CFG_GET_BASE_QUE_NIC_IF(
3897                                                 octeon_get_conf(octeon_dev), i);
3898                         gmx_port_id = CFG_GET_GMXID_NIC_IF(
3899                                                 octeon_get_conf(octeon_dev), i);
3900                         ifidx_or_pfnum = i;
3901                 }
3902
3903                 dev_dbg(&octeon_dev->pci_dev->dev,
3904                         "requesting config for interface %d, iqs %d, oqs %d\n",
3905                         ifidx_or_pfnum, num_iqueues, num_oqueues);
3906                 WRITE_ONCE(ctx->cond, 0);
3907                 ctx->octeon_id = lio_get_device_id(octeon_dev);
3908                 init_waitqueue_head(&ctx->wc);
3909
3910                 if_cfg.u64 = 0;
3911                 if_cfg.s.num_iqueues = num_iqueues;
3912                 if_cfg.s.num_oqueues = num_oqueues;
3913                 if_cfg.s.base_queue = base_queue;
3914                 if_cfg.s.gmx_port_id = gmx_port_id;
3915
3916                 sc->iq_no = 0;
3917
3918                 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC,
3919                                             OPCODE_NIC_IF_CFG, 0,
3920                                             if_cfg.u64, 0);
3921
3922                 sc->callback = if_cfg_callback;
3923                 sc->callback_arg = sc;
3924                 sc->wait_time = 3000;
3925
3926                 retval = octeon_send_soft_command(octeon_dev, sc);
3927                 if (retval == IQ_SEND_FAILED) {
3928                         dev_err(&octeon_dev->pci_dev->dev,
3929                                 "iq/oq config failed status: %x\n",
3930                                 retval);
3931                         /* Soft instr is freed by driver in case of failure. */
3932                         goto setup_nic_dev_fail;
3933                 }
3934
3935                 /* Sleep on a wait queue till the cond flag indicates that the
3936                  * response arrived or timed-out.
3937                  */
3938                 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) {
3939                         dev_err(&octeon_dev->pci_dev->dev, "Wait interrupted\n");
3940                         goto setup_nic_wait_intr;
3941                 }
3942
3943                 retval = resp->status;
3944                 if (retval) {
3945                         dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n");
3946                         goto setup_nic_dev_fail;
3947                 }
3948
3949                 octeon_swap_8B_data((u64 *)(&resp->cfg_info),
3950                                     (sizeof(struct liquidio_if_cfg_info)) >> 3);
3951
3952                 num_iqueues = hweight64(resp->cfg_info.iqmask);
3953                 num_oqueues = hweight64(resp->cfg_info.oqmask);
3954
3955                 if (!(num_iqueues) || !(num_oqueues)) {
3956                         dev_err(&octeon_dev->pci_dev->dev,
3957                                 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n",
3958                                 resp->cfg_info.iqmask,
3959                                 resp->cfg_info.oqmask);
3960                         goto setup_nic_dev_fail;
3961                 }
3962                 dev_dbg(&octeon_dev->pci_dev->dev,
3963                         "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n",
3964                         i, resp->cfg_info.iqmask, resp->cfg_info.oqmask,
3965                         num_iqueues, num_oqueues);
3966                 netdev = alloc_etherdev_mq(LIO_SIZE, num_iqueues);
3967
3968                 if (!netdev) {
3969                         dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n");
3970                         goto setup_nic_dev_fail;
3971                 }
3972
3973                 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev);
3974
3975                 /* Associate the routines that will handle different
3976                  * netdev tasks.
3977                  */
3978                 netdev->netdev_ops = &lionetdevops;
3979
3980                 lio = GET_LIO(netdev);
3981
3982                 memset(lio, 0, sizeof(struct lio));
3983
3984                 lio->ifidx = ifidx_or_pfnum;
3985
3986                 props = &octeon_dev->props[i];
3987                 props->gmxport = resp->cfg_info.linfo.gmxport;
3988                 props->netdev = netdev;
3989
3990                 lio->linfo.num_rxpciq = num_oqueues;
3991                 lio->linfo.num_txpciq = num_iqueues;
3992                 for (j = 0; j < num_oqueues; j++) {
3993                         lio->linfo.rxpciq[j].u64 =
3994                                 resp->cfg_info.linfo.rxpciq[j].u64;
3995                 }
3996                 for (j = 0; j < num_iqueues; j++) {
3997                         lio->linfo.txpciq[j].u64 =
3998                                 resp->cfg_info.linfo.txpciq[j].u64;
3999                 }
4000                 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr;
4001                 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport;
4002                 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64;
4003
4004                 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4005
4006                 if (OCTEON_CN23XX_PF(octeon_dev) ||
4007                     OCTEON_CN6XXX(octeon_dev)) {
4008                         lio->dev_capability = NETIF_F_HIGHDMA
4009                                               | NETIF_F_IP_CSUM
4010                                               | NETIF_F_IPV6_CSUM
4011                                               | NETIF_F_SG | NETIF_F_RXCSUM
4012                                               | NETIF_F_GRO
4013                                               | NETIF_F_TSO | NETIF_F_TSO6
4014                                               | NETIF_F_LRO;
4015                 }
4016                 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE);
4017
4018                 /*  Copy of transmit encapsulation capabilities:
4019                  *  TSO, TSO6, Checksums for this device
4020                  */
4021                 lio->enc_dev_capability = NETIF_F_IP_CSUM
4022                                           | NETIF_F_IPV6_CSUM
4023                                           | NETIF_F_GSO_UDP_TUNNEL
4024                                           | NETIF_F_HW_CSUM | NETIF_F_SG
4025                                           | NETIF_F_RXCSUM
4026                                           | NETIF_F_TSO | NETIF_F_TSO6
4027                                           | NETIF_F_LRO;
4028
4029                 netdev->hw_enc_features = (lio->enc_dev_capability &
4030                                            ~NETIF_F_LRO);
4031
4032                 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL;
4033
4034                 netdev->vlan_features = lio->dev_capability;
4035                 /* Add any unchangeable hw features */
4036                 lio->dev_capability |=  NETIF_F_HW_VLAN_CTAG_FILTER |
4037                                         NETIF_F_HW_VLAN_CTAG_RX |
4038                                         NETIF_F_HW_VLAN_CTAG_TX;
4039
4040                 netdev->features = (lio->dev_capability & ~NETIF_F_LRO);
4041
4042                 netdev->hw_features = lio->dev_capability;
4043                 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/
4044                 netdev->hw_features = netdev->hw_features &
4045                         ~NETIF_F_HW_VLAN_CTAG_RX;
4046
4047                 /* MTU range: 68 - 16000 */
4048                 netdev->min_mtu = LIO_MIN_MTU_SIZE;
4049                 netdev->max_mtu = LIO_MAX_MTU_SIZE;
4050
4051                 /* Point to the  properties for octeon device to which this
4052                  * interface belongs.
4053                  */
4054                 lio->oct_dev = octeon_dev;
4055                 lio->octprops = props;
4056                 lio->netdev = netdev;
4057
4058                 dev_dbg(&octeon_dev->pci_dev->dev,
4059                         "if%d gmx: %d hw_addr: 0x%llx\n", i,
4060                         lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr));
4061
4062                 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) {
4063                         u8 vfmac[ETH_ALEN];
4064
4065                         random_ether_addr(&vfmac[0]);
4066                         if (__liquidio_set_vf_mac(netdev, j,
4067                                                   &vfmac[0], false)) {
4068                                 dev_err(&octeon_dev->pci_dev->dev,
4069                                         "Error setting VF%d MAC address\n",
4070                                         j);
4071                                 goto setup_nic_dev_fail;
4072                         }
4073                 }
4074
4075                 /* 64-bit swap required on LE machines */
4076                 octeon_swap_8B_data(&lio->linfo.hw_addr, 1);
4077                 for (j = 0; j < 6; j++)
4078                         mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j));
4079
4080                 /* Copy MAC Address to OS network device structure */
4081
4082                 ether_addr_copy(netdev->dev_addr, mac);
4083
4084                 /* By default all interfaces on a single Octeon uses the same
4085                  * tx and rx queues
4086                  */
4087                 lio->txq = lio->linfo.txpciq[0].s.q_no;
4088                 lio->rxq = lio->linfo.rxpciq[0].s.q_no;
4089                 if (setup_io_queues(octeon_dev, i)) {
4090                         dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n");
4091                         goto setup_nic_dev_fail;
4092                 }
4093
4094                 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS);
4095
4096                 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq);
4097                 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq);
4098
4099                 if (setup_glists(octeon_dev, lio, num_iqueues)) {
4100                         dev_err(&octeon_dev->pci_dev->dev,
4101                                 "Gather list allocation failed\n");
4102                         goto setup_nic_dev_fail;
4103                 }
4104
4105                 /* Register ethtool support */
4106                 liquidio_set_ethtool_ops(netdev);
4107                 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID)
4108                         octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT;
4109                 else
4110                         octeon_dev->priv_flags = 0x0;
4111
4112                 if (netdev->features & NETIF_F_LRO)
4113                         liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
4114                                              OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
4115
4116                 liquidio_set_feature(netdev, OCTNET_CMD_ENABLE_VLAN_FILTER, 0);
4117
4118                 if ((debug != -1) && (debug & NETIF_MSG_HW))
4119                         liquidio_set_feature(netdev,
4120                                              OCTNET_CMD_VERBOSE_ENABLE, 0);
4121
4122                 if (setup_link_status_change_wq(netdev))
4123                         goto setup_nic_dev_fail;
4124
4125                 /* Register the network device with the OS */
4126                 if (register_netdev(netdev)) {
4127                         dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n");
4128                         goto setup_nic_dev_fail;
4129                 }
4130
4131                 dev_dbg(&octeon_dev->pci_dev->dev,
4132                         "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n",
4133                         i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
4134                 netif_carrier_off(netdev);
4135                 lio->link_changes++;
4136
4137                 ifstate_set(lio, LIO_IFSTATE_REGISTERED);
4138
4139                 /* Sending command to firmware to enable Rx checksum offload
4140                  * by default at the time of setup of Liquidio driver for
4141                  * this device
4142                  */
4143                 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
4144                                             OCTNET_CMD_RXCSUM_ENABLE);
4145                 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL,
4146                                      OCTNET_CMD_TXCSUM_ENABLE);
4147
4148                 dev_dbg(&octeon_dev->pci_dev->dev,
4149                         "NIC ifidx:%d Setup successful\n", i);
4150
4151                 octeon_free_soft_command(octeon_dev, sc);
4152         }
4153
4154         return 0;
4155
4156 setup_nic_dev_fail:
4157
4158         octeon_free_soft_command(octeon_dev, sc);
4159
4160 setup_nic_wait_intr:
4161
4162         while (i--) {
4163                 dev_err(&octeon_dev->pci_dev->dev,
4164                         "NIC ifidx:%d Setup failed\n", i);
4165                 liquidio_destroy_nic_device(octeon_dev, i);
4166         }
4167         return -ENODEV;
4168 }
4169
4170 #ifdef CONFIG_PCI_IOV
4171 static int octeon_enable_sriov(struct octeon_device *oct)
4172 {
4173         unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced;
4174         struct pci_dev *vfdev;
4175         int err;
4176         u32 u;
4177
4178         if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) {
4179                 err = pci_enable_sriov(oct->pci_dev,
4180                                        oct->sriov_info.num_vfs_alloced);
4181                 if (err) {
4182                         dev_err(&oct->pci_dev->dev,
4183                                 "OCTEON: Failed to enable PCI sriov: %d\n",
4184                                 err);
4185                         oct->sriov_info.num_vfs_alloced = 0;
4186                         return err;
4187                 }
4188                 oct->sriov_info.sriov_enabled = 1;
4189
4190                 /* init lookup table that maps DPI ring number to VF pci_dev
4191                  * struct pointer
4192                  */
4193                 u = 0;
4194                 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM,
4195                                        OCTEON_CN23XX_VF_VID, NULL);
4196                 while (vfdev) {
4197                         if (vfdev->is_virtfn &&
4198                             (vfdev->physfn == oct->pci_dev)) {
4199                                 oct->sriov_info.dpiring_to_vfpcidev_lut[u] =
4200                                         vfdev;
4201                                 u += oct->sriov_info.rings_per_vf;
4202                         }
4203                         vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM,
4204                                                OCTEON_CN23XX_VF_VID, vfdev);
4205                 }
4206         }
4207
4208         return num_vfs_alloced;
4209 }
4210
4211 static int lio_pci_sriov_disable(struct octeon_device *oct)
4212 {
4213         int u;
4214
4215         if (pci_vfs_assigned(oct->pci_dev)) {
4216                 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n");
4217                 return -EPERM;
4218         }
4219
4220         pci_disable_sriov(oct->pci_dev);
4221
4222         u = 0;
4223         while (u < MAX_POSSIBLE_VFS) {
4224                 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL;
4225                 u += oct->sriov_info.rings_per_vf;
4226         }
4227
4228         oct->sriov_info.num_vfs_alloced = 0;
4229         dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n",
4230                  oct->pf_num);
4231
4232         return 0;
4233 }
4234
4235 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs)
4236 {
4237         struct octeon_device *oct = pci_get_drvdata(dev);
4238         int ret = 0;
4239
4240         if ((num_vfs == oct->sriov_info.num_vfs_alloced) &&
4241             (oct->sriov_info.sriov_enabled)) {
4242                 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n",
4243                          oct->pf_num, num_vfs);
4244                 return 0;
4245         }
4246
4247         if (!num_vfs) {
4248                 ret = lio_pci_sriov_disable(oct);
4249         } else if (num_vfs > oct->sriov_info.max_vfs) {
4250                 dev_err(&oct->pci_dev->dev,
4251                         "OCTEON: Max allowed VFs:%d user requested:%d",
4252                         oct->sriov_info.max_vfs, num_vfs);
4253                 ret = -EPERM;
4254         } else {
4255                 oct->sriov_info.num_vfs_alloced = num_vfs;
4256                 ret = octeon_enable_sriov(oct);
4257                 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n",
4258                          oct->pf_num, num_vfs);
4259         }
4260
4261         return ret;
4262 }
4263 #endif
4264
4265 /**
4266  * \brief initialize the NIC
4267  * @param oct octeon device
4268  *
4269  * This initialization routine is called once the Octeon device application is
4270  * up and running
4271  */
4272 static int liquidio_init_nic_module(struct octeon_device *oct)
4273 {
4274         struct oct_intrmod_cfg *intrmod_cfg;
4275         int i, retval = 0;
4276         int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct));
4277
4278         dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n");
4279
4280         /* only default iq and oq were initialized
4281          * initialize the rest as well
4282          */
4283         /* run port_config command for each port */
4284         oct->ifcount = num_nic_ports;
4285
4286         memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports);
4287
4288         for (i = 0; i < MAX_OCTEON_LINKS; i++)
4289                 oct->props[i].gmxport = -1;
4290
4291         retval = setup_nic_devices(oct);
4292         if (retval) {
4293                 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n");
4294                 goto octnet_init_failure;
4295         }
4296
4297         liquidio_ptp_init(oct);
4298
4299         /* Initialize interrupt moderation params */
4300         intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
4301         intrmod_cfg->rx_enable = 1;
4302         intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
4303         intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
4304         intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
4305         intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
4306         intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
4307         intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
4308         intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
4309         intrmod_cfg->tx_enable = 1;
4310         intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
4311         intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
4312         intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
4313         intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
4314         intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
4315         dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
4316
4317         return retval;
4318
4319 octnet_init_failure:
4320
4321         oct->ifcount = 0;
4322
4323         return retval;
4324 }
4325
4326 /**
4327  * \brief starter callback that invokes the remaining initialization work after
4328  * the NIC is up and running.
4329  * @param octptr  work struct work_struct
4330  */
4331 static void nic_starter(struct work_struct *work)
4332 {
4333         struct octeon_device *oct;
4334         struct cavium_wk *wk = (struct cavium_wk *)work;
4335
4336         oct = (struct octeon_device *)wk->ctxptr;
4337
4338         if (atomic_read(&oct->status) == OCT_DEV_RUNNING)
4339                 return;
4340
4341         /* If the status of the device is CORE_OK, the core
4342          * application has reported its application type. Call
4343          * any registered handlers now and move to the RUNNING
4344          * state.
4345          */
4346         if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) {
4347                 schedule_delayed_work(&oct->nic_poll_work.work,
4348                                       LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4349                 return;
4350         }
4351
4352         atomic_set(&oct->status, OCT_DEV_RUNNING);
4353
4354         if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) {
4355                 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n");
4356
4357                 if (liquidio_init_nic_module(oct))
4358                         dev_err(&oct->pci_dev->dev, "NIC initialization failed\n");
4359                 else
4360                         handshake[oct->octeon_id].started_ok = 1;
4361         } else {
4362                 dev_err(&oct->pci_dev->dev,
4363                         "Unexpected application running on NIC (%d). Check firmware.\n",
4364                         oct->app_mode);
4365         }
4366
4367         complete(&handshake[oct->octeon_id].started);
4368 }
4369
4370 static int
4371 octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf)
4372 {
4373         struct octeon_device *oct = (struct octeon_device *)buf;
4374         struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
4375         int i, notice, vf_idx;
4376         u64 *data, vf_num;
4377
4378         notice = recv_pkt->rh.r.ossp;
4379         data = (u64 *)get_rbd(recv_pkt->buffer_ptr[0]);
4380
4381         /* the first 64-bit word of data is the vf_num */
4382         vf_num = data[0];
4383         octeon_swap_8B_data(&vf_num, 1);
4384         vf_idx = (int)vf_num - 1;
4385
4386         if (notice == VF_DRV_LOADED) {
4387                 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) {
4388                         oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx);
4389                         dev_info(&oct->pci_dev->dev,
4390                                  "driver for VF%d was loaded\n", vf_idx);
4391                         try_module_get(THIS_MODULE);
4392                 }
4393         } else if (notice == VF_DRV_REMOVED) {
4394                 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) {
4395                         oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx);
4396                         dev_info(&oct->pci_dev->dev,
4397                                  "driver for VF%d was removed\n", vf_idx);
4398                         module_put(THIS_MODULE);
4399                 }
4400         } else if (notice == VF_DRV_MACADDR_CHANGED) {
4401                 u8 *b = (u8 *)&data[1];
4402
4403                 oct->sriov_info.vf_macaddr[vf_idx] = data[1];
4404                 dev_info(&oct->pci_dev->dev,
4405                          "VF driver changed VF%d's MAC address to %pM\n",
4406                          vf_idx, b + 2);
4407         }
4408
4409         for (i = 0; i < recv_pkt->buffer_count; i++)
4410                 recv_buffer_free(recv_pkt->buffer_ptr[i]);
4411         octeon_free_recv_info(recv_info);
4412
4413         return 0;
4414 }
4415
4416 /**
4417  * \brief Device initialization for each Octeon device that is probed
4418  * @param octeon_dev  octeon device
4419  */
4420 static int octeon_device_init(struct octeon_device *octeon_dev)
4421 {
4422         int j, ret;
4423         int fw_loaded = 0;
4424         char bootcmd[] = "\n";
4425         struct octeon_device_priv *oct_priv =
4426                 (struct octeon_device_priv *)octeon_dev->priv;
4427         atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE);
4428
4429         /* Enable access to the octeon device and make its DMA capability
4430          * known to the OS.
4431          */
4432         if (octeon_pci_os_setup(octeon_dev))
4433                 return 1;
4434
4435         atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE);
4436
4437         /* Identify the Octeon type and map the BAR address space. */
4438         if (octeon_chip_specific_setup(octeon_dev)) {
4439                 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n");
4440                 return 1;
4441         }
4442
4443         atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE);
4444
4445         octeon_dev->app_mode = CVM_DRV_INVALID_APP;
4446
4447         if (OCTEON_CN23XX_PF(octeon_dev)) {
4448                 if (!cn23xx_fw_loaded(octeon_dev)) {
4449                         fw_loaded = 0;
4450                         /* Do a soft reset of the Octeon device. */
4451                         if (octeon_dev->fn_list.soft_reset(octeon_dev))
4452                                 return 1;
4453                         /* things might have changed */
4454                         if (!cn23xx_fw_loaded(octeon_dev))
4455                                 fw_loaded = 0;
4456                         else
4457                                 fw_loaded = 1;
4458                 } else {
4459                         fw_loaded = 1;
4460                 }
4461         } else if (octeon_dev->fn_list.soft_reset(octeon_dev)) {
4462                 return 1;
4463         }
4464
4465         /* Initialize the dispatch mechanism used to push packets arriving on
4466          * Octeon Output queues.
4467          */
4468         if (octeon_init_dispatch_list(octeon_dev))
4469                 return 1;
4470
4471         octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
4472                                     OPCODE_NIC_CORE_DRV_ACTIVE,
4473                                     octeon_core_drv_init,
4474                                     octeon_dev);
4475
4476         octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
4477                                     OPCODE_NIC_VF_DRV_NOTICE,
4478                                     octeon_recv_vf_drv_notice, octeon_dev);
4479         INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter);
4480         octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev;
4481         schedule_delayed_work(&octeon_dev->nic_poll_work.work,
4482                               LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4483
4484         atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE);
4485
4486         if (octeon_set_io_queues_off(octeon_dev)) {
4487                 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n");
4488                 return 1;
4489         }
4490
4491         if (OCTEON_CN23XX_PF(octeon_dev)) {
4492                 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4493                 if (ret) {
4494                         dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n");
4495                         return ret;
4496                 }
4497         }
4498
4499         /* Initialize soft command buffer pool
4500          */
4501         if (octeon_setup_sc_buffer_pool(octeon_dev)) {
4502                 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n");
4503                 return 1;
4504         }
4505         atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE);
4506
4507         /*  Setup the data structures that manage this Octeon's Input queues. */
4508         if (octeon_setup_instr_queues(octeon_dev)) {
4509                 dev_err(&octeon_dev->pci_dev->dev,
4510                         "instruction queue initialization failed\n");
4511                 return 1;
4512         }
4513         atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE);
4514
4515         /* Initialize lists to manage the requests of different types that
4516          * arrive from user & kernel applications for this octeon device.
4517          */
4518         if (octeon_setup_response_list(octeon_dev)) {
4519                 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n");
4520                 return 1;
4521         }
4522         atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE);
4523
4524         if (octeon_setup_output_queues(octeon_dev)) {
4525                 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n");
4526                 return 1;
4527         }
4528
4529         atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE);
4530
4531         if (OCTEON_CN23XX_PF(octeon_dev)) {
4532                 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) {
4533                         dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n");
4534                         return 1;
4535                 }
4536                 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE);
4537
4538                 if (octeon_allocate_ioq_vector(octeon_dev)) {
4539                         dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n");
4540                         return 1;
4541                 }
4542                 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE);
4543
4544         } else {
4545                 /* The input and output queue registers were setup earlier (the
4546                  * queues were not enabled). Any additional registers
4547                  * that need to be programmed should be done now.
4548                  */
4549                 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4550                 if (ret) {
4551                         dev_err(&octeon_dev->pci_dev->dev,
4552                                 "Failed to configure device registers\n");
4553                         return ret;
4554                 }
4555         }
4556
4557         /* Initialize the tasklet that handles output queue packet processing.*/
4558         dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n");
4559         tasklet_init(&oct_priv->droq_tasklet, octeon_droq_bh,
4560                      (unsigned long)octeon_dev);
4561
4562         /* Setup the interrupt handler and record the INT SUM register address
4563          */
4564         if (octeon_setup_interrupt(octeon_dev))
4565                 return 1;
4566
4567         /* Enable Octeon device interrupts */
4568         octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR);
4569
4570         atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE);
4571
4572         /* Enable the input and output queues for this Octeon device */
4573         ret = octeon_dev->fn_list.enable_io_queues(octeon_dev);
4574         if (ret) {
4575                 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues");
4576                 return ret;
4577         }
4578
4579         atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE);
4580
4581         if ((!OCTEON_CN23XX_PF(octeon_dev)) || !fw_loaded) {
4582                 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n");
4583                 if (!ddr_timeout) {
4584                         dev_info(&octeon_dev->pci_dev->dev,
4585                                  "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n");
4586                 }
4587
4588                 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS);
4589
4590                 /* Wait for the octeon to initialize DDR after the soft-reset.*/
4591                 while (!ddr_timeout) {
4592                         set_current_state(TASK_INTERRUPTIBLE);
4593                         if (schedule_timeout(HZ / 10)) {
4594                                 /* user probably pressed Control-C */
4595                                 return 1;
4596                         }
4597                 }
4598                 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout);
4599                 if (ret) {
4600                         dev_err(&octeon_dev->pci_dev->dev,
4601                                 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n",
4602                                 ret);
4603                         return 1;
4604                 }
4605
4606                 if (octeon_wait_for_bootloader(octeon_dev, 1000)) {
4607                         dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n");
4608                         return 1;
4609                 }
4610
4611                 /* Divert uboot to take commands from host instead. */
4612                 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50);
4613
4614                 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n");
4615                 ret = octeon_init_consoles(octeon_dev);
4616                 if (ret) {
4617                         dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n");
4618                         return 1;
4619                 }
4620                 ret = octeon_add_console(octeon_dev, 0);
4621                 if (ret) {
4622                         dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n");
4623                         return 1;
4624                 }
4625
4626                 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE);
4627
4628                 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n");
4629                 ret = load_firmware(octeon_dev);
4630                 if (ret) {
4631                         dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n");
4632                         return 1;
4633                 }
4634                 /* set bit 1 of SLI_SCRATCH_1 to indicate that firmware is
4635                  * loaded
4636                  */
4637                 if (OCTEON_CN23XX_PF(octeon_dev))
4638                         octeon_write_csr64(octeon_dev, CN23XX_SLI_SCRATCH1,
4639                                            2ULL);
4640         }
4641
4642         handshake[octeon_dev->octeon_id].init_ok = 1;
4643         complete(&handshake[octeon_dev->octeon_id].init);
4644
4645         atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK);
4646
4647         /* Send Credit for Octeon Output queues. Credits are always sent after
4648          * the output queue is enabled.
4649          */
4650         for (j = 0; j < octeon_dev->num_oqs; j++)
4651                 writel(octeon_dev->droq[j]->max_count,
4652                        octeon_dev->droq[j]->pkts_credit_reg);
4653
4654         /* Packets can start arriving on the output queues from this point. */
4655         return 0;
4656 }
4657
4658 /**
4659  * \brief Exits the module
4660  */
4661 static void __exit liquidio_exit(void)
4662 {
4663         liquidio_deinit_pci();
4664
4665         pr_info("LiquidIO network module is now unloaded\n");
4666 }
4667
4668 module_init(liquidio_init);
4669 module_exit(liquidio_exit);