1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2016 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more details.
17 ***********************************************************************/
18 #include <linux/pci.h>
19 #include <linux/firmware.h>
20 #include <net/vxlan.h>
21 #include <linux/kthread.h>
22 #include "liquidio_common.h"
23 #include "octeon_droq.h"
24 #include "octeon_iq.h"
25 #include "response_manager.h"
26 #include "octeon_device.h"
27 #include "octeon_nic.h"
28 #include "octeon_main.h"
29 #include "octeon_network.h"
30 #include "cn66xx_regs.h"
31 #include "cn66xx_device.h"
32 #include "cn68xx_device.h"
33 #include "cn23xx_pf_device.h"
34 #include "liquidio_image.h"
36 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>");
37 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver");
38 MODULE_LICENSE("GPL");
39 MODULE_VERSION(LIQUIDIO_VERSION);
40 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME LIO_FW_NAME_SUFFIX);
41 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME LIO_FW_NAME_SUFFIX);
42 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME LIO_FW_NAME_SUFFIX);
43 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME LIO_FW_NAME_SUFFIX);
45 static int ddr_timeout = 10000;
46 module_param(ddr_timeout, int, 0644);
47 MODULE_PARM_DESC(ddr_timeout,
48 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check");
50 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
52 static int debug = -1;
53 module_param(debug, int, 0644);
54 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits");
56 static char fw_type[LIO_MAX_FW_TYPE_LEN];
57 module_param_string(fw_type, fw_type, sizeof(fw_type), 0000);
58 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded. Default \"nic\"");
60 static int ptp_enable = 1;
62 /* Bit mask values for lio->ifstate */
63 #define LIO_IFSTATE_DROQ_OPS 0x01
64 #define LIO_IFSTATE_REGISTERED 0x02
65 #define LIO_IFSTATE_RUNNING 0x04
66 #define LIO_IFSTATE_RX_TIMESTAMP_ENABLED 0x08
68 /* Polling interval for determining when NIC application is alive */
69 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100
71 /* runtime link query interval */
72 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000
74 struct liquidio_if_cfg_context {
82 struct liquidio_if_cfg_resp {
84 struct liquidio_if_cfg_info cfg_info;
88 struct liquidio_rx_ctl_context {
96 struct oct_link_status_resp {
98 struct oct_link_info link_info;
102 struct oct_timestamp_resp {
108 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp))
113 #ifdef __BIG_ENDIAN_BITFIELD
125 /** Octeon device properties to be used by the NIC module.
126 * Each octeon device in the system will be represented
127 * by this structure in the NIC module.
130 #define OCTNIC_MAX_SG (MAX_SKB_FRAGS)
132 #define OCTNIC_GSO_MAX_HEADER_SIZE 128
133 #define OCTNIC_GSO_MAX_SIZE \
134 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE)
136 /** Structure of a node in list of gather components maintained by
137 * NIC driver for each network device.
139 struct octnic_gather {
140 /** List manipulation. Next and prev pointers. */
141 struct list_head list;
143 /** Size of the gather component at sg in bytes. */
146 /** Number of bytes that sg was adjusted to make it 8B-aligned. */
149 /** Gather component that can accommodate max sized fragment list
150 * received from the IP layer.
152 struct octeon_sg_entry *sg;
158 struct completion init;
159 struct completion started;
160 struct pci_dev *pci_dev;
165 struct octeon_device_priv {
166 /** Tasklet structures for this device. */
167 struct tasklet_struct droq_tasklet;
168 unsigned long napi_mask;
171 #ifdef CONFIG_PCI_IOV
172 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs);
175 static int octeon_device_init(struct octeon_device *);
176 static int liquidio_stop(struct net_device *netdev);
177 static void liquidio_remove(struct pci_dev *pdev);
178 static int liquidio_probe(struct pci_dev *pdev,
179 const struct pci_device_id *ent);
181 static struct handshake handshake[MAX_OCTEON_DEVICES];
182 static struct completion first_stage;
184 static void octeon_droq_bh(unsigned long pdev)
188 struct octeon_device *oct = (struct octeon_device *)pdev;
189 struct octeon_device_priv *oct_priv =
190 (struct octeon_device_priv *)oct->priv;
192 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) {
193 if (!(oct->io_qmask.oq & BIT_ULL(q_no)))
195 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no],
197 lio_enable_irq(oct->droq[q_no], NULL);
199 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
200 /* set time and cnt interrupt thresholds for this DROQ
203 int adjusted_q_no = q_no + oct->sriov_info.pf_srn;
206 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no),
209 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0);
214 tasklet_schedule(&oct_priv->droq_tasklet);
217 static int lio_wait_for_oq_pkts(struct octeon_device *oct)
219 struct octeon_device_priv *oct_priv =
220 (struct octeon_device_priv *)oct->priv;
221 int retry = 100, pkt_cnt = 0, pending_pkts = 0;
227 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
228 if (!(oct->io_qmask.oq & BIT_ULL(i)))
230 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]);
233 pending_pkts += pkt_cnt;
234 tasklet_schedule(&oct_priv->droq_tasklet);
237 schedule_timeout_uninterruptible(1);
239 } while (retry-- && pending_pkts);
245 * \brief Forces all IO queues off on a given device
246 * @param oct Pointer to Octeon device
248 static void force_io_queues_off(struct octeon_device *oct)
250 if ((oct->chip_id == OCTEON_CN66XX) ||
251 (oct->chip_id == OCTEON_CN68XX)) {
252 /* Reset the Enable bits for Input Queues. */
253 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0);
255 /* Reset the Enable bits for Output Queues. */
256 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0);
261 * \brief wait for all pending requests to complete
262 * @param oct Pointer to Octeon device
264 * Called during shutdown sequence
266 static int wait_for_pending_requests(struct octeon_device *oct)
270 for (i = 0; i < 100; i++) {
272 atomic_read(&oct->response_list
273 [OCTEON_ORDERED_SC_LIST].pending_req_count);
275 schedule_timeout_uninterruptible(HZ / 10);
287 * \brief Cause device to go quiet so it can be safely removed/reset/etc
288 * @param oct Pointer to Octeon device
290 static inline void pcierror_quiesce_device(struct octeon_device *oct)
294 /* Disable the input and output queues now. No more packets will
295 * arrive from Octeon, but we should wait for all packet processing
298 force_io_queues_off(oct);
300 /* To allow for in-flight requests */
301 schedule_timeout_uninterruptible(100);
303 if (wait_for_pending_requests(oct))
304 dev_err(&oct->pci_dev->dev, "There were pending requests\n");
306 /* Force all requests waiting to be fetched by OCTEON to complete. */
307 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
308 struct octeon_instr_queue *iq;
310 if (!(oct->io_qmask.iq & BIT_ULL(i)))
312 iq = oct->instr_queue[i];
314 if (atomic_read(&iq->instr_pending)) {
315 spin_lock_bh(&iq->lock);
317 iq->octeon_read_index = iq->host_write_index;
318 iq->stats.instr_processed +=
319 atomic_read(&iq->instr_pending);
320 lio_process_iq_request_list(oct, iq, 0);
321 spin_unlock_bh(&iq->lock);
325 /* Force all pending ordered list requests to time out. */
326 lio_process_ordered_list(oct, 1);
328 /* We do not need to wait for output queue packets to be processed. */
332 * \brief Cleanup PCI AER uncorrectable error status
333 * @param dev Pointer to PCI device
335 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
340 pr_info("%s :\n", __func__);
342 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
343 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
344 if (dev->error_state == pci_channel_io_normal)
345 status &= ~mask; /* Clear corresponding nonfatal bits */
347 status &= mask; /* Clear corresponding fatal bits */
348 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
352 * \brief Stop all PCI IO to a given device
353 * @param dev Pointer to Octeon device
355 static void stop_pci_io(struct octeon_device *oct)
357 /* No more instructions will be forwarded. */
358 atomic_set(&oct->status, OCT_DEV_IN_RESET);
360 pci_disable_device(oct->pci_dev);
362 /* Disable interrupts */
363 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
365 pcierror_quiesce_device(oct);
367 /* Release the interrupt line */
368 free_irq(oct->pci_dev->irq, oct);
370 if (oct->flags & LIO_FLAG_MSI_ENABLED)
371 pci_disable_msi(oct->pci_dev);
373 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
374 lio_get_state_string(&oct->status));
376 /* making it a common function for all OCTEON models */
377 cleanup_aer_uncorrect_error_status(oct->pci_dev);
381 * \brief called when PCI error is detected
382 * @param pdev Pointer to PCI device
383 * @param state The current pci connection state
385 * This function is called after a PCI bus error affecting
386 * this device has been detected.
388 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev,
389 pci_channel_state_t state)
391 struct octeon_device *oct = pci_get_drvdata(pdev);
393 /* Non-correctable Non-fatal errors */
394 if (state == pci_channel_io_normal) {
395 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n");
396 cleanup_aer_uncorrect_error_status(oct->pci_dev);
397 return PCI_ERS_RESULT_CAN_RECOVER;
400 /* Non-correctable Fatal errors */
401 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n");
404 /* Always return a DISCONNECT. There is no support for recovery but only
405 * for a clean shutdown.
407 return PCI_ERS_RESULT_DISCONNECT;
411 * \brief mmio handler
412 * @param pdev Pointer to PCI device
414 static pci_ers_result_t liquidio_pcie_mmio_enabled(
415 struct pci_dev *pdev __attribute__((unused)))
417 /* We should never hit this since we never ask for a reset for a Fatal
418 * Error. We always return DISCONNECT in io_error above.
419 * But play safe and return RECOVERED for now.
421 return PCI_ERS_RESULT_RECOVERED;
425 * \brief called after the pci bus has been reset.
426 * @param pdev Pointer to PCI device
428 * Restart the card from scratch, as if from a cold-boot. Implementation
429 * resembles the first-half of the octeon_resume routine.
431 static pci_ers_result_t liquidio_pcie_slot_reset(
432 struct pci_dev *pdev __attribute__((unused)))
434 /* We should never hit this since we never ask for a reset for a Fatal
435 * Error. We always return DISCONNECT in io_error above.
436 * But play safe and return RECOVERED for now.
438 return PCI_ERS_RESULT_RECOVERED;
442 * \brief called when traffic can start flowing again.
443 * @param pdev Pointer to PCI device
445 * This callback is called when the error recovery driver tells us that
446 * its OK to resume normal operation. Implementation resembles the
447 * second-half of the octeon_resume routine.
449 static void liquidio_pcie_resume(struct pci_dev *pdev __attribute__((unused)))
451 /* Nothing to be done here. */
456 * \brief called when suspending
457 * @param pdev Pointer to PCI device
458 * @param state state to suspend to
460 static int liquidio_suspend(struct pci_dev *pdev __attribute__((unused)),
461 pm_message_t state __attribute__((unused)))
467 * \brief called when resuming
468 * @param pdev Pointer to PCI device
470 static int liquidio_resume(struct pci_dev *pdev __attribute__((unused)))
476 /* For PCI-E Advanced Error Recovery (AER) Interface */
477 static const struct pci_error_handlers liquidio_err_handler = {
478 .error_detected = liquidio_pcie_error_detected,
479 .mmio_enabled = liquidio_pcie_mmio_enabled,
480 .slot_reset = liquidio_pcie_slot_reset,
481 .resume = liquidio_pcie_resume,
484 static const struct pci_device_id liquidio_pci_tbl[] = {
486 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
489 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
492 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
498 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl);
500 static struct pci_driver liquidio_pci_driver = {
502 .id_table = liquidio_pci_tbl,
503 .probe = liquidio_probe,
504 .remove = liquidio_remove,
505 .err_handler = &liquidio_err_handler, /* For AER */
508 .suspend = liquidio_suspend,
509 .resume = liquidio_resume,
511 #ifdef CONFIG_PCI_IOV
512 .sriov_configure = liquidio_enable_sriov,
517 * \brief register PCI driver
519 static int liquidio_init_pci(void)
521 return pci_register_driver(&liquidio_pci_driver);
525 * \brief unregister PCI driver
527 static void liquidio_deinit_pci(void)
529 pci_unregister_driver(&liquidio_pci_driver);
533 * \brief check interface state
534 * @param lio per-network private data
535 * @param state_flag flag state to check
537 static inline int ifstate_check(struct lio *lio, int state_flag)
539 return atomic_read(&lio->ifstate) & state_flag;
543 * \brief set interface state
544 * @param lio per-network private data
545 * @param state_flag flag state to set
547 static inline void ifstate_set(struct lio *lio, int state_flag)
549 atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) | state_flag));
553 * \brief clear interface state
554 * @param lio per-network private data
555 * @param state_flag flag state to clear
557 static inline void ifstate_reset(struct lio *lio, int state_flag)
559 atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) & ~(state_flag)));
563 * \brief Stop Tx queues
564 * @param netdev network device
566 static inline void txqs_stop(struct net_device *netdev)
568 if (netif_is_multiqueue(netdev)) {
571 for (i = 0; i < netdev->num_tx_queues; i++)
572 netif_stop_subqueue(netdev, i);
574 netif_stop_queue(netdev);
579 * \brief Start Tx queues
580 * @param netdev network device
582 static inline void txqs_start(struct net_device *netdev)
584 if (netif_is_multiqueue(netdev)) {
587 for (i = 0; i < netdev->num_tx_queues; i++)
588 netif_start_subqueue(netdev, i);
590 netif_start_queue(netdev);
595 * \brief Wake Tx queues
596 * @param netdev network device
598 static inline void txqs_wake(struct net_device *netdev)
600 struct lio *lio = GET_LIO(netdev);
602 if (netif_is_multiqueue(netdev)) {
605 for (i = 0; i < netdev->num_tx_queues; i++) {
606 int qno = lio->linfo.txpciq[i %
607 (lio->linfo.num_txpciq)].s.q_no;
609 if (__netif_subqueue_stopped(netdev, i)) {
610 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno,
612 netif_wake_subqueue(netdev, i);
616 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
618 netif_wake_queue(netdev);
623 * \brief Stop Tx queue
624 * @param netdev network device
626 static void stop_txq(struct net_device *netdev)
632 * \brief Start Tx queue
633 * @param netdev network device
635 static void start_txq(struct net_device *netdev)
637 struct lio *lio = GET_LIO(netdev);
639 if (lio->linfo.link.s.link_up) {
646 * \brief Wake a queue
647 * @param netdev network device
648 * @param q which queue to wake
650 static inline void wake_q(struct net_device *netdev, int q)
652 if (netif_is_multiqueue(netdev))
653 netif_wake_subqueue(netdev, q);
655 netif_wake_queue(netdev);
659 * \brief Stop a queue
660 * @param netdev network device
661 * @param q which queue to stop
663 static inline void stop_q(struct net_device *netdev, int q)
665 if (netif_is_multiqueue(netdev))
666 netif_stop_subqueue(netdev, q);
668 netif_stop_queue(netdev);
672 * \brief Check Tx queue status, and take appropriate action
673 * @param lio per-network private data
674 * @returns 0 if full, number of queues woken up otherwise
676 static inline int check_txq_status(struct lio *lio)
680 if (netif_is_multiqueue(lio->netdev)) {
681 int numqs = lio->netdev->num_tx_queues;
684 /* check each sub-queue state */
685 for (q = 0; q < numqs; q++) {
686 iq = lio->linfo.txpciq[q %
687 (lio->linfo.num_txpciq)].s.q_no;
688 if (octnet_iq_is_full(lio->oct_dev, iq))
690 if (__netif_subqueue_stopped(lio->netdev, q)) {
691 wake_q(lio->netdev, q);
692 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq,
698 if (octnet_iq_is_full(lio->oct_dev, lio->txq))
700 wake_q(lio->netdev, lio->txq);
701 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
709 * Remove the node at the head of the list. The list would be empty at
710 * the end of this call if there are no more nodes in the list.
712 static inline struct list_head *list_delete_head(struct list_head *root)
714 struct list_head *node;
716 if ((root->prev == root) && (root->next == root))
728 * \brief Delete gather lists
729 * @param lio per-network private data
731 static void delete_glists(struct lio *lio)
733 struct octnic_gather *g;
739 for (i = 0; i < lio->linfo.num_txpciq; i++) {
741 g = (struct octnic_gather *)
742 list_delete_head(&lio->glist[i]);
745 dma_unmap_single(&lio->oct_dev->
750 kfree((void *)((unsigned long)g->sg -
758 kfree((void *)lio->glist);
759 kfree((void *)lio->glist_lock);
763 * \brief Setup gather lists
764 * @param lio per-network private data
766 static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs)
769 struct octnic_gather *g;
771 lio->glist_lock = kcalloc(num_iqs, sizeof(*lio->glist_lock),
773 if (!lio->glist_lock)
776 lio->glist = kcalloc(num_iqs, sizeof(*lio->glist),
779 kfree((void *)lio->glist_lock);
783 for (i = 0; i < num_iqs; i++) {
784 int numa_node = cpu_to_node(i % num_online_cpus());
786 spin_lock_init(&lio->glist_lock[i]);
788 INIT_LIST_HEAD(&lio->glist[i]);
790 for (j = 0; j < lio->tx_qsize; j++) {
791 g = kzalloc_node(sizeof(*g), GFP_KERNEL,
794 g = kzalloc(sizeof(*g), GFP_KERNEL);
798 g->sg_size = ((ROUNDUP4(OCTNIC_MAX_SG) >> 2) *
801 g->sg = kmalloc_node(g->sg_size + 8,
802 GFP_KERNEL, numa_node);
804 g->sg = kmalloc(g->sg_size + 8, GFP_KERNEL);
810 /* The gather component should be aligned on 64-bit
813 if (((unsigned long)g->sg) & 7) {
814 g->adjust = 8 - (((unsigned long)g->sg) & 7);
815 g->sg = (struct octeon_sg_entry *)
816 ((unsigned long)g->sg + g->adjust);
818 g->sg_dma_ptr = dma_map_single(&oct->pci_dev->dev,
821 if (dma_mapping_error(&oct->pci_dev->dev,
823 kfree((void *)((unsigned long)g->sg -
829 list_add_tail(&g->list, &lio->glist[i]);
832 if (j != lio->tx_qsize) {
842 * \brief Print link information
843 * @param netdev network device
845 static void print_link_info(struct net_device *netdev)
847 struct lio *lio = GET_LIO(netdev);
849 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) {
850 struct oct_link_info *linfo = &lio->linfo;
852 if (linfo->link.s.link_up) {
853 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n",
855 (linfo->link.s.duplex) ? "Full" : "Half");
857 netif_info(lio, link, lio->netdev, "Link Down\n");
863 * \brief Routine to notify MTU change
864 * @param work work_struct data structure
866 static void octnet_link_status_change(struct work_struct *work)
868 struct cavium_wk *wk = (struct cavium_wk *)work;
869 struct lio *lio = (struct lio *)wk->ctxptr;
872 call_netdevice_notifiers(NETDEV_CHANGEMTU, lio->netdev);
877 * \brief Sets up the mtu status change work
878 * @param netdev network device
880 static inline int setup_link_status_change_wq(struct net_device *netdev)
882 struct lio *lio = GET_LIO(netdev);
883 struct octeon_device *oct = lio->oct_dev;
885 lio->link_status_wq.wq = alloc_workqueue("link-status",
887 if (!lio->link_status_wq.wq) {
888 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n");
891 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work,
892 octnet_link_status_change);
893 lio->link_status_wq.wk.ctxptr = lio;
898 static inline void cleanup_link_status_change_wq(struct net_device *netdev)
900 struct lio *lio = GET_LIO(netdev);
902 if (lio->link_status_wq.wq) {
903 cancel_delayed_work_sync(&lio->link_status_wq.wk.work);
904 destroy_workqueue(lio->link_status_wq.wq);
909 * \brief Update link status
910 * @param netdev network device
911 * @param ls link status structure
913 * Called on receipt of a link status response from the core application to
914 * update each interface's link status.
916 static inline void update_link_status(struct net_device *netdev,
917 union oct_link_status *ls)
919 struct lio *lio = GET_LIO(netdev);
920 int changed = (lio->linfo.link.u64 != ls->u64);
922 lio->linfo.link.u64 = ls->u64;
924 if ((lio->intf_open) && (changed)) {
925 print_link_info(netdev);
928 if (lio->linfo.link.s.link_up) {
929 netif_carrier_on(netdev);
932 netif_carrier_off(netdev);
938 /* Runs in interrupt context. */
939 static void update_txq_status(struct octeon_device *oct, int iq_num)
941 struct net_device *netdev;
943 struct octeon_instr_queue *iq = oct->instr_queue[iq_num];
945 netdev = oct->props[iq->ifidx].netdev;
947 /* This is needed because the first IQ does not have
948 * a netdev associated with it.
953 lio = GET_LIO(netdev);
954 if (netif_is_multiqueue(netdev)) {
955 if (__netif_subqueue_stopped(netdev, iq->q_index) &&
956 lio->linfo.link.s.link_up &&
957 (!octnet_iq_is_full(oct, iq_num))) {
958 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq_num,
960 netif_wake_subqueue(netdev, iq->q_index);
962 if (!octnet_iq_is_full(oct, lio->txq)) {
963 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev,
966 wake_q(netdev, lio->txq);
973 int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret)
975 struct octeon_device *oct = droq->oct_dev;
976 struct octeon_device_priv *oct_priv =
977 (struct octeon_device_priv *)oct->priv;
979 if (droq->ops.poll_mode) {
980 droq->ops.napi_fn(droq);
982 if (ret & MSIX_PO_INT) {
983 tasklet_schedule(&oct_priv->droq_tasklet);
986 /* this will be flushed periodically by check iq db */
987 if (ret & MSIX_PI_INT)
994 * \brief Droq packet processor sceduler
995 * @param oct octeon device
997 static void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
999 struct octeon_device_priv *oct_priv =
1000 (struct octeon_device_priv *)oct->priv;
1002 struct octeon_droq *droq;
1004 if (oct->int_status & OCT_DEV_INTR_PKT_DATA) {
1005 for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct);
1007 if (!(oct->droq_intr & BIT_ULL(oq_no)))
1010 droq = oct->droq[oq_no];
1012 if (droq->ops.poll_mode) {
1013 droq->ops.napi_fn(droq);
1014 oct_priv->napi_mask |= (1 << oq_no);
1016 tasklet_schedule(&oct_priv->droq_tasklet);
1023 liquidio_msix_intr_handler(int irq __attribute__((unused)), void *dev)
1026 struct octeon_ioq_vector *ioq_vector = (struct octeon_ioq_vector *)dev;
1027 struct octeon_device *oct = ioq_vector->oct_dev;
1028 struct octeon_droq *droq = oct->droq[ioq_vector->droq_index];
1030 ret = oct->fn_list.msix_interrupt_handler(ioq_vector);
1032 if ((ret & MSIX_PO_INT) || (ret & MSIX_PI_INT))
1033 liquidio_schedule_msix_droq_pkt_handler(droq, ret);
1039 * \brief Interrupt handler for octeon
1041 * @param dev octeon device
1044 irqreturn_t liquidio_legacy_intr_handler(int irq __attribute__((unused)),
1047 struct octeon_device *oct = (struct octeon_device *)dev;
1050 /* Disable our interrupts for the duration of ISR */
1051 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1053 ret = oct->fn_list.process_interrupt_regs(oct);
1055 if (ret == IRQ_HANDLED)
1056 liquidio_schedule_droq_pkt_handlers(oct);
1058 /* Re-enable our interrupts */
1059 if (!(atomic_read(&oct->status) == OCT_DEV_IN_RESET))
1060 oct->fn_list.enable_interrupt(oct, OCTEON_ALL_INTR);
1066 * \brief Setup interrupt for octeon device
1067 * @param oct octeon device
1069 * Enable interrupt in Octeon device as given in the PCI interrupt mask.
1071 static int octeon_setup_interrupt(struct octeon_device *oct)
1074 struct msix_entry *msix_entries;
1076 int num_ioq_vectors;
1077 int num_alloc_ioq_vectors;
1079 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
1080 oct->num_msix_irqs = oct->sriov_info.num_pf_rings;
1081 /* one non ioq interrupt for handling sli_mac_pf_int_sum */
1082 oct->num_msix_irqs += 1;
1084 oct->msix_entries = kcalloc(
1085 oct->num_msix_irqs, sizeof(struct msix_entry), GFP_KERNEL);
1086 if (!oct->msix_entries)
1089 msix_entries = (struct msix_entry *)oct->msix_entries;
1090 /*Assumption is that pf msix vectors start from pf srn to pf to
1091 * trs and not from 0. if not change this code
1093 for (i = 0; i < oct->num_msix_irqs - 1; i++)
1094 msix_entries[i].entry = oct->sriov_info.pf_srn + i;
1095 msix_entries[oct->num_msix_irqs - 1].entry =
1096 oct->sriov_info.trs;
1097 num_alloc_ioq_vectors = pci_enable_msix_range(
1098 oct->pci_dev, msix_entries,
1100 oct->num_msix_irqs);
1101 if (num_alloc_ioq_vectors < 0) {
1102 dev_err(&oct->pci_dev->dev, "unable to Allocate MSI-X interrupts\n");
1103 kfree(oct->msix_entries);
1104 oct->msix_entries = NULL;
1107 dev_dbg(&oct->pci_dev->dev, "OCTEON: Enough MSI-X interrupts are allocated...\n");
1109 num_ioq_vectors = oct->num_msix_irqs;
1111 /** For PF, there is one non-ioq interrupt handler */
1112 num_ioq_vectors -= 1;
1113 irqret = request_irq(msix_entries[num_ioq_vectors].vector,
1114 liquidio_legacy_intr_handler, 0, "octeon",
1117 dev_err(&oct->pci_dev->dev,
1118 "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1120 pci_disable_msix(oct->pci_dev);
1121 kfree(oct->msix_entries);
1122 oct->msix_entries = NULL;
1126 for (i = 0; i < num_ioq_vectors; i++) {
1127 irqret = request_irq(msix_entries[i].vector,
1128 liquidio_msix_intr_handler, 0,
1129 "octeon", &oct->ioq_vector[i]);
1131 dev_err(&oct->pci_dev->dev,
1132 "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1134 /** Freeing the non-ioq irq vector here . */
1135 free_irq(msix_entries[num_ioq_vectors].vector,
1140 /** clearing affinity mask. */
1141 irq_set_affinity_hint(
1142 msix_entries[i].vector, NULL);
1143 free_irq(msix_entries[i].vector,
1144 &oct->ioq_vector[i]);
1146 pci_disable_msix(oct->pci_dev);
1147 kfree(oct->msix_entries);
1148 oct->msix_entries = NULL;
1151 oct->ioq_vector[i].vector = msix_entries[i].vector;
1152 /* assign the cpu mask for this msix interrupt vector */
1153 irq_set_affinity_hint(
1154 msix_entries[i].vector,
1155 (&oct->ioq_vector[i].affinity_mask));
1157 dev_dbg(&oct->pci_dev->dev, "OCTEON[%d]: MSI-X enabled\n",
1160 err = pci_enable_msi(oct->pci_dev);
1162 dev_warn(&oct->pci_dev->dev, "Reverting to legacy interrupts. Error: %d\n",
1165 oct->flags |= LIO_FLAG_MSI_ENABLED;
1167 irqret = request_irq(oct->pci_dev->irq,
1168 liquidio_legacy_intr_handler, IRQF_SHARED,
1171 if (oct->flags & LIO_FLAG_MSI_ENABLED)
1172 pci_disable_msi(oct->pci_dev);
1173 dev_err(&oct->pci_dev->dev, "Request IRQ failed with code: %d\n",
1181 static int liquidio_watchdog(void *param)
1184 u16 mask_of_stuck_cores = 0;
1185 u16 mask_of_crashed_cores = 0;
1187 u8 core_is_stuck[LIO_MAX_CORES];
1188 u8 core_crashed[LIO_MAX_CORES];
1189 struct octeon_device *oct = param;
1191 memset(core_is_stuck, 0, sizeof(core_is_stuck));
1192 memset(core_crashed, 0, sizeof(core_crashed));
1194 while (!kthread_should_stop()) {
1195 mask_of_crashed_cores =
1196 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2);
1198 for (core_num = 0; core_num < LIO_MAX_CORES; core_num++) {
1199 if (!core_is_stuck[core_num]) {
1200 wdog = lio_pci_readq(oct, CIU3_WDOG(core_num));
1202 /* look at watchdog state field */
1203 wdog &= CIU3_WDOG_MASK;
1205 /* this watchdog timer has expired */
1206 core_is_stuck[core_num] =
1207 LIO_MONITOR_WDOG_EXPIRE;
1208 mask_of_stuck_cores |= (1 << core_num);
1212 if (!core_crashed[core_num])
1213 core_crashed[core_num] =
1214 (mask_of_crashed_cores >> core_num) & 1;
1217 if (mask_of_stuck_cores) {
1218 for (core_num = 0; core_num < LIO_MAX_CORES;
1220 if (core_is_stuck[core_num] == 1) {
1221 dev_err(&oct->pci_dev->dev,
1222 "ERROR: Octeon core %d is stuck!\n",
1224 /* 2 means we have printk'd an error
1225 * so no need to repeat the same printk
1227 core_is_stuck[core_num] =
1228 LIO_MONITOR_CORE_STUCK_MSGD;
1233 if (mask_of_crashed_cores) {
1234 for (core_num = 0; core_num < LIO_MAX_CORES;
1236 if (core_crashed[core_num] == 1) {
1237 dev_err(&oct->pci_dev->dev,
1238 "ERROR: Octeon core %d crashed! See oct-fwdump for details.\n",
1240 /* 2 means we have printk'd an error
1241 * so no need to repeat the same printk
1243 core_crashed[core_num] =
1244 LIO_MONITOR_CORE_STUCK_MSGD;
1248 #ifdef CONFIG_MODULE_UNLOAD
1249 if (mask_of_stuck_cores || mask_of_crashed_cores) {
1250 /* make module refcount=0 so that rmmod will work */
1253 refcount = module_refcount(THIS_MODULE);
1255 while (refcount > 0) {
1256 module_put(THIS_MODULE);
1257 refcount = module_refcount(THIS_MODULE);
1260 /* compensate for and withstand an unlikely (but still
1261 * possible) race condition
1263 while (refcount < 0) {
1264 try_module_get(THIS_MODULE);
1265 refcount = module_refcount(THIS_MODULE);
1269 /* sleep for two seconds */
1270 set_current_state(TASK_INTERRUPTIBLE);
1271 schedule_timeout(2 * HZ);
1278 * \brief PCI probe handler
1279 * @param pdev PCI device structure
1283 liquidio_probe(struct pci_dev *pdev,
1284 const struct pci_device_id *ent __attribute__((unused)))
1286 struct octeon_device *oct_dev = NULL;
1287 struct handshake *hs;
1289 oct_dev = octeon_allocate_device(pdev->device,
1290 sizeof(struct octeon_device_priv));
1292 dev_err(&pdev->dev, "Unable to allocate device\n");
1296 if (pdev->device == OCTEON_CN23XX_PF_VID)
1297 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED;
1299 dev_info(&pdev->dev, "Initializing device %x:%x.\n",
1300 (u32)pdev->vendor, (u32)pdev->device);
1302 /* Assign octeon_device for this device to the private data area. */
1303 pci_set_drvdata(pdev, oct_dev);
1305 /* set linux specific device pointer */
1306 oct_dev->pci_dev = (void *)pdev;
1308 hs = &handshake[oct_dev->octeon_id];
1309 init_completion(&hs->init);
1310 init_completion(&hs->started);
1313 if (oct_dev->octeon_id == 0)
1314 /* first LiquidIO NIC is detected */
1315 complete(&first_stage);
1317 if (octeon_device_init(oct_dev)) {
1318 complete(&hs->init);
1319 liquidio_remove(pdev);
1323 if (OCTEON_CN23XX_PF(oct_dev)) {
1325 u8 bus, device, function;
1327 scratch1 = octeon_read_csr64(oct_dev, CN23XX_SLI_SCRATCH1);
1328 if (!(scratch1 & 4ULL)) {
1329 /* Bit 2 of SLI_SCRATCH_1 is a flag that indicates that
1330 * the lio watchdog kernel thread is running for this
1331 * NIC. Each NIC gets one watchdog kernel thread.
1334 octeon_write_csr64(oct_dev, CN23XX_SLI_SCRATCH1,
1337 bus = pdev->bus->number;
1338 device = PCI_SLOT(pdev->devfn);
1339 function = PCI_FUNC(pdev->devfn);
1340 oct_dev->watchdog_task = kthread_create(
1341 liquidio_watchdog, oct_dev,
1342 "liowd/%02hhx:%02hhx.%hhx", bus, device, function);
1343 if (!IS_ERR(oct_dev->watchdog_task)) {
1344 wake_up_process(oct_dev->watchdog_task);
1346 oct_dev->watchdog_task = NULL;
1347 dev_err(&oct_dev->pci_dev->dev,
1348 "failed to create kernel_thread\n");
1349 liquidio_remove(pdev);
1355 oct_dev->rx_pause = 1;
1356 oct_dev->tx_pause = 1;
1358 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n");
1364 *\brief Destroy resources associated with octeon device
1365 * @param pdev PCI device structure
1368 static void octeon_destroy_resources(struct octeon_device *oct)
1371 struct msix_entry *msix_entries;
1372 struct octeon_device_priv *oct_priv =
1373 (struct octeon_device_priv *)oct->priv;
1375 struct handshake *hs;
1377 switch (atomic_read(&oct->status)) {
1378 case OCT_DEV_RUNNING:
1379 case OCT_DEV_CORE_OK:
1381 /* No more instructions will be forwarded. */
1382 atomic_set(&oct->status, OCT_DEV_IN_RESET);
1384 oct->app_mode = CVM_DRV_INVALID_APP;
1385 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
1386 lio_get_state_string(&oct->status));
1388 schedule_timeout_uninterruptible(HZ / 10);
1391 case OCT_DEV_HOST_OK:
1394 case OCT_DEV_CONSOLE_INIT_DONE:
1395 /* Remove any consoles */
1396 octeon_remove_consoles(oct);
1399 case OCT_DEV_IO_QUEUES_DONE:
1400 if (wait_for_pending_requests(oct))
1401 dev_err(&oct->pci_dev->dev, "There were pending requests\n");
1403 if (lio_wait_for_instr_fetch(oct))
1404 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
1406 /* Disable the input and output queues now. No more packets will
1407 * arrive from Octeon, but we should wait for all packet
1408 * processing to finish.
1410 oct->fn_list.disable_io_queues(oct);
1412 if (lio_wait_for_oq_pkts(oct))
1413 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n");
1416 case OCT_DEV_INTR_SET_DONE:
1417 /* Disable interrupts */
1418 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1421 msix_entries = (struct msix_entry *)oct->msix_entries;
1422 for (i = 0; i < oct->num_msix_irqs - 1; i++) {
1423 /* clear the affinity_cpumask */
1424 irq_set_affinity_hint(msix_entries[i].vector,
1426 free_irq(msix_entries[i].vector,
1427 &oct->ioq_vector[i]);
1429 /* non-iov vector's argument is oct struct */
1430 free_irq(msix_entries[i].vector, oct);
1432 pci_disable_msix(oct->pci_dev);
1433 kfree(oct->msix_entries);
1434 oct->msix_entries = NULL;
1436 /* Release the interrupt line */
1437 free_irq(oct->pci_dev->irq, oct);
1439 if (oct->flags & LIO_FLAG_MSI_ENABLED)
1440 pci_disable_msi(oct->pci_dev);
1444 case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
1445 if (OCTEON_CN23XX_PF(oct))
1446 octeon_free_ioq_vector(oct);
1449 case OCT_DEV_MBOX_SETUP_DONE:
1450 if (OCTEON_CN23XX_PF(oct))
1451 oct->fn_list.free_mbox(oct);
1454 case OCT_DEV_IN_RESET:
1455 case OCT_DEV_DROQ_INIT_DONE:
1456 /* Wait for any pending operations */
1458 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
1459 if (!(oct->io_qmask.oq & BIT_ULL(i)))
1461 octeon_delete_droq(oct, i);
1464 /* Force any pending handshakes to complete */
1465 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
1469 handshake[oct->octeon_id].init_ok = 0;
1470 complete(&handshake[oct->octeon_id].init);
1471 handshake[oct->octeon_id].started_ok = 0;
1472 complete(&handshake[oct->octeon_id].started);
1477 case OCT_DEV_RESP_LIST_INIT_DONE:
1478 octeon_delete_response_list(oct);
1481 case OCT_DEV_INSTR_QUEUE_INIT_DONE:
1482 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
1483 if (!(oct->io_qmask.iq & BIT_ULL(i)))
1485 octeon_delete_instr_queue(oct, i);
1487 #ifdef CONFIG_PCI_IOV
1488 if (oct->sriov_info.sriov_enabled)
1489 pci_disable_sriov(oct->pci_dev);
1492 case OCT_DEV_SC_BUFF_POOL_INIT_DONE:
1493 octeon_free_sc_buffer_pool(oct);
1496 case OCT_DEV_DISPATCH_INIT_DONE:
1497 octeon_delete_dispatch_list(oct);
1498 cancel_delayed_work_sync(&oct->nic_poll_work.work);
1501 case OCT_DEV_PCI_MAP_DONE:
1502 /* Soft reset the octeon device before exiting */
1503 if ((!OCTEON_CN23XX_PF(oct)) || !oct->octeon_id)
1504 oct->fn_list.soft_reset(oct);
1506 octeon_unmap_pci_barx(oct, 0);
1507 octeon_unmap_pci_barx(oct, 1);
1510 case OCT_DEV_PCI_ENABLE_DONE:
1511 pci_clear_master(oct->pci_dev);
1512 /* Disable the device, releasing the PCI INT */
1513 pci_disable_device(oct->pci_dev);
1516 case OCT_DEV_BEGIN_STATE:
1517 /* Nothing to be done here either */
1519 } /* end switch (oct->status) */
1521 tasklet_kill(&oct_priv->droq_tasklet);
1525 * \brief Callback for rx ctrl
1526 * @param status status of request
1527 * @param buf pointer to resp structure
1529 static void rx_ctl_callback(struct octeon_device *oct,
1533 struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
1534 struct liquidio_rx_ctl_context *ctx;
1536 ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1538 oct = lio_get_device(ctx->octeon_id);
1540 dev_err(&oct->pci_dev->dev, "rx ctl instruction failed. Status: %llx\n",
1541 CVM_CAST64(status));
1542 WRITE_ONCE(ctx->cond, 1);
1544 /* This barrier is required to be sure that the response has been
1545 * written fully before waking up the handler
1549 wake_up_interruptible(&ctx->wc);
1553 * \brief Send Rx control command
1554 * @param lio per-network private data
1555 * @param start_stop whether to start or stop
1557 static void send_rx_ctrl_cmd(struct lio *lio, int start_stop)
1559 struct octeon_soft_command *sc;
1560 struct liquidio_rx_ctl_context *ctx;
1561 union octnet_cmd *ncmd;
1562 int ctx_size = sizeof(struct liquidio_rx_ctl_context);
1563 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1566 if (oct->props[lio->ifidx].rx_on == start_stop)
1569 sc = (struct octeon_soft_command *)
1570 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE,
1573 ncmd = (union octnet_cmd *)sc->virtdptr;
1574 ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1576 WRITE_ONCE(ctx->cond, 0);
1577 ctx->octeon_id = lio_get_device_id(oct);
1578 init_waitqueue_head(&ctx->wc);
1581 ncmd->s.cmd = OCTNET_CMD_RX_CTL;
1582 ncmd->s.param1 = start_stop;
1584 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3));
1586 sc->iq_no = lio->linfo.txpciq[0].s.q_no;
1588 octeon_prepare_soft_command(oct, sc, OPCODE_NIC,
1589 OPCODE_NIC_CMD, 0, 0, 0);
1591 sc->callback = rx_ctl_callback;
1592 sc->callback_arg = sc;
1593 sc->wait_time = 5000;
1595 retval = octeon_send_soft_command(oct, sc);
1596 if (retval == IQ_SEND_FAILED) {
1597 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n");
1599 /* Sleep on a wait queue till the cond flag indicates that the
1600 * response arrived or timed-out.
1602 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR)
1604 oct->props[lio->ifidx].rx_on = start_stop;
1607 octeon_free_soft_command(oct, sc);
1611 * \brief Destroy NIC device interface
1612 * @param oct octeon device
1613 * @param ifidx which interface to destroy
1615 * Cleanup associated with each interface for an Octeon device when NIC
1616 * module is being unloaded or if initialization fails during load.
1618 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx)
1620 struct net_device *netdev = oct->props[ifidx].netdev;
1622 struct napi_struct *napi, *n;
1625 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n",
1630 lio = GET_LIO(netdev);
1632 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n");
1634 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING)
1635 liquidio_stop(netdev);
1637 if (oct->props[lio->ifidx].napi_enabled == 1) {
1638 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
1641 oct->props[lio->ifidx].napi_enabled = 0;
1643 if (OCTEON_CN23XX_PF(oct))
1644 oct->droq[0]->ops.poll_mode = 0;
1647 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED)
1648 unregister_netdev(netdev);
1650 cleanup_link_status_change_wq(netdev);
1654 free_netdev(netdev);
1656 oct->props[ifidx].gmxport = -1;
1658 oct->props[ifidx].netdev = NULL;
1662 * \brief Stop complete NIC functionality
1663 * @param oct octeon device
1665 static int liquidio_stop_nic_module(struct octeon_device *oct)
1670 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n");
1671 if (!oct->ifcount) {
1672 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n");
1676 spin_lock_bh(&oct->cmd_resp_wqlock);
1677 oct->cmd_resp_state = OCT_DRV_OFFLINE;
1678 spin_unlock_bh(&oct->cmd_resp_wqlock);
1680 for (i = 0; i < oct->ifcount; i++) {
1681 lio = GET_LIO(oct->props[i].netdev);
1682 for (j = 0; j < lio->linfo.num_rxpciq; j++)
1683 octeon_unregister_droq_ops(oct,
1684 lio->linfo.rxpciq[j].s.q_no);
1687 for (i = 0; i < oct->ifcount; i++)
1688 liquidio_destroy_nic_device(oct, i);
1690 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n");
1695 * \brief Cleans up resources at unload time
1696 * @param pdev PCI device structure
1698 static void liquidio_remove(struct pci_dev *pdev)
1700 struct octeon_device *oct_dev = pci_get_drvdata(pdev);
1702 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n");
1704 if (oct_dev->watchdog_task)
1705 kthread_stop(oct_dev->watchdog_task);
1707 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP))
1708 liquidio_stop_nic_module(oct_dev);
1710 /* Reset the octeon device and cleanup all memory allocated for
1711 * the octeon device by driver.
1713 octeon_destroy_resources(oct_dev);
1715 dev_info(&oct_dev->pci_dev->dev, "Device removed\n");
1717 /* This octeon device has been removed. Update the global
1718 * data structure to reflect this. Free the device structure.
1720 octeon_free_device_mem(oct_dev);
1724 * \brief Identify the Octeon device and to map the BAR address space
1725 * @param oct octeon device
1727 static int octeon_chip_specific_setup(struct octeon_device *oct)
1733 pci_read_config_dword(oct->pci_dev, 0, &dev_id);
1734 pci_read_config_dword(oct->pci_dev, 8, &rev_id);
1735 oct->rev_id = rev_id & 0xff;
1738 case OCTEON_CN68XX_PCIID:
1739 oct->chip_id = OCTEON_CN68XX;
1740 ret = lio_setup_cn68xx_octeon_device(oct);
1744 case OCTEON_CN66XX_PCIID:
1745 oct->chip_id = OCTEON_CN66XX;
1746 ret = lio_setup_cn66xx_octeon_device(oct);
1750 case OCTEON_CN23XX_PCIID_PF:
1751 oct->chip_id = OCTEON_CN23XX_PF_VID;
1752 ret = setup_cn23xx_octeon_pf_device(oct);
1758 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n",
1763 dev_info(&oct->pci_dev->dev, "%s PASS%d.%d %s Version: %s\n", s,
1764 OCTEON_MAJOR_REV(oct),
1765 OCTEON_MINOR_REV(oct),
1766 octeon_get_conf(oct)->card_name,
1773 * \brief PCI initialization for each Octeon device.
1774 * @param oct octeon device
1776 static int octeon_pci_os_setup(struct octeon_device *oct)
1778 /* setup PCI stuff first */
1779 if (pci_enable_device(oct->pci_dev)) {
1780 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n");
1784 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) {
1785 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n");
1786 pci_disable_device(oct->pci_dev);
1790 /* Enable PCI DMA Master. */
1791 pci_set_master(oct->pci_dev);
1796 static inline int skb_iq(struct lio *lio, struct sk_buff *skb)
1800 if (netif_is_multiqueue(lio->netdev))
1801 q = skb->queue_mapping % lio->linfo.num_txpciq;
1807 * \brief Check Tx queue state for a given network buffer
1808 * @param lio per-network private data
1809 * @param skb network buffer
1811 static inline int check_txq_state(struct lio *lio, struct sk_buff *skb)
1815 if (netif_is_multiqueue(lio->netdev)) {
1816 q = skb->queue_mapping;
1817 iq = lio->linfo.txpciq[(q % (lio->linfo.num_txpciq))].s.q_no;
1823 if (octnet_iq_is_full(lio->oct_dev, iq))
1826 if (__netif_subqueue_stopped(lio->netdev, q)) {
1827 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, tx_restart, 1);
1828 wake_q(lio->netdev, q);
1834 * \brief Unmap and free network buffer
1837 static void free_netbuf(void *buf)
1839 struct sk_buff *skb;
1840 struct octnet_buf_free_info *finfo;
1843 finfo = (struct octnet_buf_free_info *)buf;
1847 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len,
1850 check_txq_state(lio, skb);
1852 tx_buffer_free(skb);
1856 * \brief Unmap and free gather buffer
1859 static void free_netsgbuf(void *buf)
1861 struct octnet_buf_free_info *finfo;
1862 struct sk_buff *skb;
1864 struct octnic_gather *g;
1867 finfo = (struct octnet_buf_free_info *)buf;
1871 frags = skb_shinfo(skb)->nr_frags;
1873 dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1874 g->sg[0].ptr[0], (skb->len - skb->data_len),
1879 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1881 pci_unmap_page((lio->oct_dev)->pci_dev,
1882 g->sg[(i >> 2)].ptr[(i & 3)],
1883 frag->size, DMA_TO_DEVICE);
1887 dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev,
1888 g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE);
1890 iq = skb_iq(lio, skb);
1891 spin_lock(&lio->glist_lock[iq]);
1892 list_add_tail(&g->list, &lio->glist[iq]);
1893 spin_unlock(&lio->glist_lock[iq]);
1895 check_txq_state(lio, skb); /* mq support: sub-queue state check */
1897 tx_buffer_free(skb);
1901 * \brief Unmap and free gather buffer with response
1904 static void free_netsgbuf_with_resp(void *buf)
1906 struct octeon_soft_command *sc;
1907 struct octnet_buf_free_info *finfo;
1908 struct sk_buff *skb;
1910 struct octnic_gather *g;
1913 sc = (struct octeon_soft_command *)buf;
1914 skb = (struct sk_buff *)sc->callback_arg;
1915 finfo = (struct octnet_buf_free_info *)&skb->cb;
1919 frags = skb_shinfo(skb)->nr_frags;
1921 dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1922 g->sg[0].ptr[0], (skb->len - skb->data_len),
1927 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1929 pci_unmap_page((lio->oct_dev)->pci_dev,
1930 g->sg[(i >> 2)].ptr[(i & 3)],
1931 frag->size, DMA_TO_DEVICE);
1935 dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev,
1936 g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE);
1938 iq = skb_iq(lio, skb);
1940 spin_lock(&lio->glist_lock[iq]);
1941 list_add_tail(&g->list, &lio->glist[iq]);
1942 spin_unlock(&lio->glist_lock[iq]);
1944 /* Don't free the skb yet */
1946 check_txq_state(lio, skb);
1950 * \brief Adjust ptp frequency
1951 * @param ptp PTP clock info
1952 * @param ppb how much to adjust by, in parts-per-billion
1954 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1956 struct lio *lio = container_of(ptp, struct lio, ptp_info);
1957 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1959 unsigned long flags;
1960 bool neg_adj = false;
1967 /* The hardware adds the clock compensation value to the
1968 * PTP clock on every coprocessor clock cycle, so we
1969 * compute the delta in terms of coprocessor clocks.
1971 delta = (u64)ppb << 32;
1972 do_div(delta, oct->coproc_clock_rate);
1974 spin_lock_irqsave(&lio->ptp_lock, flags);
1975 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP);
1980 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP);
1981 spin_unlock_irqrestore(&lio->ptp_lock, flags);
1987 * \brief Adjust ptp time
1988 * @param ptp PTP clock info
1989 * @param delta how much to adjust by, in nanosecs
1991 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
1993 unsigned long flags;
1994 struct lio *lio = container_of(ptp, struct lio, ptp_info);
1996 spin_lock_irqsave(&lio->ptp_lock, flags);
1997 lio->ptp_adjust += delta;
1998 spin_unlock_irqrestore(&lio->ptp_lock, flags);
2004 * \brief Get hardware clock time, including any adjustment
2005 * @param ptp PTP clock info
2006 * @param ts timespec
2008 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp,
2009 struct timespec64 *ts)
2012 unsigned long flags;
2013 struct lio *lio = container_of(ptp, struct lio, ptp_info);
2014 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2016 spin_lock_irqsave(&lio->ptp_lock, flags);
2017 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI);
2018 ns += lio->ptp_adjust;
2019 spin_unlock_irqrestore(&lio->ptp_lock, flags);
2021 *ts = ns_to_timespec64(ns);
2027 * \brief Set hardware clock time. Reset adjustment
2028 * @param ptp PTP clock info
2029 * @param ts timespec
2031 static int liquidio_ptp_settime(struct ptp_clock_info *ptp,
2032 const struct timespec64 *ts)
2035 unsigned long flags;
2036 struct lio *lio = container_of(ptp, struct lio, ptp_info);
2037 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2039 ns = timespec_to_ns(ts);
2041 spin_lock_irqsave(&lio->ptp_lock, flags);
2042 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI);
2043 lio->ptp_adjust = 0;
2044 spin_unlock_irqrestore(&lio->ptp_lock, flags);
2050 * \brief Check if PTP is enabled
2051 * @param ptp PTP clock info
2053 * @param on is it on
2056 liquidio_ptp_enable(struct ptp_clock_info *ptp __attribute__((unused)),
2057 struct ptp_clock_request *rq __attribute__((unused)),
2058 int on __attribute__((unused)))
2064 * \brief Open PTP clock source
2065 * @param netdev network device
2067 static void oct_ptp_open(struct net_device *netdev)
2069 struct lio *lio = GET_LIO(netdev);
2070 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2072 spin_lock_init(&lio->ptp_lock);
2074 snprintf(lio->ptp_info.name, 16, "%s", netdev->name);
2075 lio->ptp_info.owner = THIS_MODULE;
2076 lio->ptp_info.max_adj = 250000000;
2077 lio->ptp_info.n_alarm = 0;
2078 lio->ptp_info.n_ext_ts = 0;
2079 lio->ptp_info.n_per_out = 0;
2080 lio->ptp_info.pps = 0;
2081 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq;
2082 lio->ptp_info.adjtime = liquidio_ptp_adjtime;
2083 lio->ptp_info.gettime64 = liquidio_ptp_gettime;
2084 lio->ptp_info.settime64 = liquidio_ptp_settime;
2085 lio->ptp_info.enable = liquidio_ptp_enable;
2087 lio->ptp_adjust = 0;
2089 lio->ptp_clock = ptp_clock_register(&lio->ptp_info,
2090 &oct->pci_dev->dev);
2092 if (IS_ERR(lio->ptp_clock))
2093 lio->ptp_clock = NULL;
2097 * \brief Init PTP clock
2098 * @param oct octeon device
2100 static void liquidio_ptp_init(struct octeon_device *oct)
2102 u64 clock_comp, cfg;
2104 clock_comp = (u64)NSEC_PER_SEC << 32;
2105 do_div(clock_comp, oct->coproc_clock_rate);
2106 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP);
2109 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG);
2110 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG);
2114 * \brief Load firmware to device
2115 * @param oct octeon device
2117 * Maps device to firmware filename, requests firmware, and downloads it
2119 static int load_firmware(struct octeon_device *oct)
2122 const struct firmware *fw;
2123 char fw_name[LIO_MAX_FW_FILENAME_LEN];
2126 if (strncmp(fw_type, LIO_FW_NAME_TYPE_NONE,
2127 sizeof(LIO_FW_NAME_TYPE_NONE)) == 0) {
2128 dev_info(&oct->pci_dev->dev, "Skipping firmware load\n");
2132 if (fw_type[0] == '\0')
2133 tmp_fw_type = LIO_FW_NAME_TYPE_NIC;
2135 tmp_fw_type = fw_type;
2137 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME,
2138 octeon_get_conf(oct)->card_name, tmp_fw_type,
2139 LIO_FW_NAME_SUFFIX);
2141 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev);
2143 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n.",
2145 release_firmware(fw);
2149 ret = octeon_download_firmware(oct, fw->data, fw->size);
2151 release_firmware(fw);
2157 * \brief Setup output queue
2158 * @param oct octeon device
2159 * @param q_no which queue
2160 * @param num_descs how many descriptors
2161 * @param desc_size size of each descriptor
2162 * @param app_ctx application context
2164 static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs,
2165 int desc_size, void *app_ctx)
2169 dev_dbg(&oct->pci_dev->dev, "Creating Droq: %d\n", q_no);
2170 /* droq creation and local register settings. */
2171 ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx);
2176 dev_dbg(&oct->pci_dev->dev, "Using default droq %d\n", q_no);
2179 /* tasklet creation for the droq */
2181 /* Enable the droq queues */
2182 octeon_set_droq_pkt_op(oct, q_no, 1);
2184 /* Send Credit for Octeon Output queues. Credits are always
2185 * sent after the output queue is enabled.
2187 writel(oct->droq[q_no]->max_count,
2188 oct->droq[q_no]->pkts_credit_reg);
2194 * \brief Callback for getting interface configuration
2195 * @param status status of request
2196 * @param buf pointer to resp structure
2198 static void if_cfg_callback(struct octeon_device *oct,
2199 u32 status __attribute__((unused)),
2202 struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
2203 struct liquidio_if_cfg_resp *resp;
2204 struct liquidio_if_cfg_context *ctx;
2206 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
2207 ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
2209 oct = lio_get_device(ctx->octeon_id);
2211 dev_err(&oct->pci_dev->dev, "nic if cfg instruction failed. Status: %llx\n",
2212 CVM_CAST64(resp->status));
2213 WRITE_ONCE(ctx->cond, 1);
2215 snprintf(oct->fw_info.liquidio_firmware_version, 32, "%s",
2216 resp->cfg_info.liquidio_firmware_version);
2218 /* This barrier is required to be sure that the response has been
2219 * written fully before waking up the handler
2223 wake_up_interruptible(&ctx->wc);
2227 * \brief Select queue based on hash
2228 * @param dev Net device
2229 * @param skb sk_buff structure
2230 * @returns selected queue number
2232 static u16 select_q(struct net_device *dev, struct sk_buff *skb,
2233 void *accel_priv __attribute__((unused)),
2234 select_queue_fallback_t fallback __attribute__((unused)))
2240 qindex = skb_tx_hash(dev, skb);
2242 return (u16)(qindex % (lio->linfo.num_txpciq));
2245 /** Routine to push packets arriving on Octeon interface upto network layer.
2246 * @param oct_id - octeon device id.
2247 * @param skbuff - skbuff struct to be passed to network layer.
2248 * @param len - size of total data received.
2249 * @param rh - Control header associated with the packet
2250 * @param param - additional control data with the packet
2251 * @param arg - farg registered in droq_ops
2254 liquidio_push_packet(u32 octeon_id __attribute__((unused)),
2257 union octeon_rh *rh,
2261 struct napi_struct *napi = param;
2262 struct sk_buff *skb = (struct sk_buff *)skbuff;
2263 struct skb_shared_hwtstamps *shhwtstamps;
2267 struct net_device *netdev = (struct net_device *)arg;
2268 struct octeon_droq *droq = container_of(param, struct octeon_droq,
2271 int packet_was_received;
2272 struct lio *lio = GET_LIO(netdev);
2273 struct octeon_device *oct = lio->oct_dev;
2275 /* Do not proceed if the interface is not in RUNNING state. */
2276 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) {
2277 recv_buffer_free(skb);
2278 droq->stats.rx_dropped++;
2284 skb_record_rx_queue(skb, droq->q_no);
2285 if (likely(len > MIN_SKB_SIZE)) {
2286 struct octeon_skb_page_info *pg_info;
2289 pg_info = ((struct octeon_skb_page_info *)(skb->cb));
2290 if (pg_info->page) {
2291 /* For Paged allocation use the frags */
2292 va = page_address(pg_info->page) +
2293 pg_info->page_offset;
2294 memcpy(skb->data, va, MIN_SKB_SIZE);
2295 skb_put(skb, MIN_SKB_SIZE);
2296 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
2298 pg_info->page_offset +
2304 struct octeon_skb_page_info *pg_info =
2305 ((struct octeon_skb_page_info *)(skb->cb));
2306 skb_copy_to_linear_data(skb, page_address(pg_info->page)
2307 + pg_info->page_offset, len);
2309 put_page(pg_info->page);
2312 r_dh_off = (rh->r_dh.len - 1) * BYTES_PER_DHLEN_UNIT;
2314 if (((oct->chip_id == OCTEON_CN66XX) ||
2315 (oct->chip_id == OCTEON_CN68XX)) &&
2317 if (rh->r_dh.has_hwtstamp) {
2318 /* timestamp is included from the hardware at
2319 * the beginning of the packet.
2322 (lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED)) {
2323 /* Nanoseconds are in the first 64-bits
2326 memcpy(&ns, (skb->data + r_dh_off),
2328 r_dh_off -= BYTES_PER_DHLEN_UNIT;
2329 shhwtstamps = skb_hwtstamps(skb);
2330 shhwtstamps->hwtstamp =
2337 if (rh->r_dh.has_hash) {
2338 __be32 *hash_be = (__be32 *)(skb->data + r_dh_off);
2339 u32 hash = be32_to_cpu(*hash_be);
2341 skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
2342 r_dh_off -= BYTES_PER_DHLEN_UNIT;
2345 skb_pull(skb, rh->r_dh.len * BYTES_PER_DHLEN_UNIT);
2347 skb->protocol = eth_type_trans(skb, skb->dev);
2348 if ((netdev->features & NETIF_F_RXCSUM) &&
2349 (((rh->r_dh.encap_on) &&
2350 (rh->r_dh.csum_verified & CNNIC_TUN_CSUM_VERIFIED)) ||
2351 (!(rh->r_dh.encap_on) &&
2352 (rh->r_dh.csum_verified & CNNIC_CSUM_VERIFIED))))
2353 /* checksum has already been verified */
2354 skb->ip_summed = CHECKSUM_UNNECESSARY;
2356 skb->ip_summed = CHECKSUM_NONE;
2358 /* Setting Encapsulation field on basis of status received
2361 if (rh->r_dh.encap_on) {
2362 skb->encapsulation = 1;
2363 skb->csum_level = 1;
2364 droq->stats.rx_vxlan++;
2367 /* inbound VLAN tag */
2368 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2369 (rh->r_dh.vlan != 0)) {
2370 u16 vid = rh->r_dh.vlan;
2371 u16 priority = rh->r_dh.priority;
2373 vtag = priority << 13 | vid;
2374 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag);
2377 packet_was_received = napi_gro_receive(napi, skb) != GRO_DROP;
2379 if (packet_was_received) {
2380 droq->stats.rx_bytes_received += len;
2381 droq->stats.rx_pkts_received++;
2382 netdev->last_rx = jiffies;
2384 droq->stats.rx_dropped++;
2385 netif_info(lio, rx_err, lio->netdev,
2386 "droq:%d error rx_dropped:%llu\n",
2387 droq->q_no, droq->stats.rx_dropped);
2391 recv_buffer_free(skb);
2396 * \brief wrapper for calling napi_schedule
2397 * @param param parameters to pass to napi_schedule
2399 * Used when scheduling on different CPUs
2401 static void napi_schedule_wrapper(void *param)
2403 struct napi_struct *napi = param;
2405 napi_schedule(napi);
2409 * \brief callback when receive interrupt occurs and we are in NAPI mode
2410 * @param arg pointer to octeon output queue
2412 static void liquidio_napi_drv_callback(void *arg)
2414 struct octeon_device *oct;
2415 struct octeon_droq *droq = arg;
2416 int this_cpu = smp_processor_id();
2418 oct = droq->oct_dev;
2420 if (OCTEON_CN23XX_PF(oct) || droq->cpu_id == this_cpu) {
2421 napi_schedule_irqoff(&droq->napi);
2423 struct call_single_data *csd = &droq->csd;
2425 csd->func = napi_schedule_wrapper;
2426 csd->info = &droq->napi;
2429 smp_call_function_single_async(droq->cpu_id, csd);
2434 * \brief Entry point for NAPI polling
2435 * @param napi NAPI structure
2436 * @param budget maximum number of items to process
2438 static int liquidio_napi_poll(struct napi_struct *napi, int budget)
2440 struct octeon_droq *droq;
2442 int tx_done = 0, iq_no;
2443 struct octeon_instr_queue *iq;
2444 struct octeon_device *oct;
2446 droq = container_of(napi, struct octeon_droq, napi);
2447 oct = droq->oct_dev;
2449 /* Handle Droq descriptors */
2450 work_done = octeon_process_droq_poll_cmd(oct, droq->q_no,
2451 POLL_EVENT_PROCESS_PKTS,
2454 /* Flush the instruction queue */
2455 iq = oct->instr_queue[iq_no];
2457 /* Process iq buffers with in the budget limits */
2458 tx_done = octeon_flush_iq(oct, iq, budget);
2459 /* Update iq read-index rather than waiting for next interrupt.
2460 * Return back if tx_done is false.
2462 update_txq_status(oct, iq_no);
2464 dev_err(&oct->pci_dev->dev, "%s: iq (%d) num invalid\n",
2468 if ((work_done < budget) && (tx_done)) {
2469 napi_complete(napi);
2470 octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no,
2471 POLL_EVENT_ENABLE_INTR, 0);
2475 return (!tx_done) ? (budget) : (work_done);
2479 * \brief Setup input and output queues
2480 * @param octeon_dev octeon device
2481 * @param ifidx Interface Index
2483 * Note: Queues are with respect to the octeon device. Thus
2484 * an input queue is for egress packets, and output queues
2485 * are for ingress packets.
2487 static inline int setup_io_queues(struct octeon_device *octeon_dev,
2490 struct octeon_droq_ops droq_ops;
2491 struct net_device *netdev;
2493 static int cpu_id_modulus;
2494 struct octeon_droq *droq;
2495 struct napi_struct *napi;
2496 int q, q_no, retval = 0;
2500 netdev = octeon_dev->props[ifidx].netdev;
2502 lio = GET_LIO(netdev);
2504 memset(&droq_ops, 0, sizeof(struct octeon_droq_ops));
2506 droq_ops.fptr = liquidio_push_packet;
2507 droq_ops.farg = (void *)netdev;
2509 droq_ops.poll_mode = 1;
2510 droq_ops.napi_fn = liquidio_napi_drv_callback;
2512 cpu_id_modulus = num_present_cpus();
2515 for (q = 0; q < lio->linfo.num_rxpciq; q++) {
2516 q_no = lio->linfo.rxpciq[q].s.q_no;
2517 dev_dbg(&octeon_dev->pci_dev->dev,
2518 "setup_io_queues index:%d linfo.rxpciq.s.q_no:%d\n",
2520 retval = octeon_setup_droq(octeon_dev, q_no,
2521 CFG_GET_NUM_RX_DESCS_NIC_IF
2522 (octeon_get_conf(octeon_dev),
2524 CFG_GET_NUM_RX_BUF_SIZE_NIC_IF
2525 (octeon_get_conf(octeon_dev),
2528 dev_err(&octeon_dev->pci_dev->dev,
2529 "%s : Runtime DROQ(RxQ) creation failed.\n",
2534 droq = octeon_dev->droq[q_no];
2536 dev_dbg(&octeon_dev->pci_dev->dev, "netif_napi_add netdev:%llx oct:%llx pf_num:%d\n",
2537 (u64)netdev, (u64)octeon_dev, octeon_dev->pf_num);
2538 netif_napi_add(netdev, napi, liquidio_napi_poll, 64);
2540 /* designate a CPU for this droq */
2541 droq->cpu_id = cpu_id;
2543 if (cpu_id >= cpu_id_modulus)
2546 octeon_register_droq_ops(octeon_dev, q_no, &droq_ops);
2549 if (OCTEON_CN23XX_PF(octeon_dev)) {
2550 /* 23XX PF can receive control messages (via the first PF-owned
2551 * droq) from the firmware even if the ethX interface is down,
2552 * so that's why poll_mode must be off for the first droq.
2554 octeon_dev->droq[0]->ops.poll_mode = 0;
2558 for (q = 0; q < lio->linfo.num_txpciq; q++) {
2559 num_tx_descs = CFG_GET_NUM_TX_DESCS_NIC_IF(octeon_get_conf
2562 retval = octeon_setup_iq(octeon_dev, ifidx, q,
2563 lio->linfo.txpciq[q], num_tx_descs,
2564 netdev_get_tx_queue(netdev, q));
2566 dev_err(&octeon_dev->pci_dev->dev,
2567 " %s : Runtime IQ(TxQ) creation failed.\n",
2577 * \brief Poll routine for checking transmit queue status
2578 * @param work work_struct data structure
2580 static void octnet_poll_check_txq_status(struct work_struct *work)
2582 struct cavium_wk *wk = (struct cavium_wk *)work;
2583 struct lio *lio = (struct lio *)wk->ctxptr;
2585 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING))
2588 check_txq_status(lio);
2589 queue_delayed_work(lio->txq_status_wq.wq,
2590 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2594 * \brief Sets up the txq poll check
2595 * @param netdev network device
2597 static inline int setup_tx_poll_fn(struct net_device *netdev)
2599 struct lio *lio = GET_LIO(netdev);
2600 struct octeon_device *oct = lio->oct_dev;
2602 lio->txq_status_wq.wq = alloc_workqueue("txq-status",
2604 if (!lio->txq_status_wq.wq) {
2605 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n");
2608 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work,
2609 octnet_poll_check_txq_status);
2610 lio->txq_status_wq.wk.ctxptr = lio;
2611 queue_delayed_work(lio->txq_status_wq.wq,
2612 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2616 static inline void cleanup_tx_poll_fn(struct net_device *netdev)
2618 struct lio *lio = GET_LIO(netdev);
2620 if (lio->txq_status_wq.wq) {
2621 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work);
2622 destroy_workqueue(lio->txq_status_wq.wq);
2627 * \brief Net device open for LiquidIO
2628 * @param netdev network device
2630 static int liquidio_open(struct net_device *netdev)
2632 struct lio *lio = GET_LIO(netdev);
2633 struct octeon_device *oct = lio->oct_dev;
2634 struct napi_struct *napi, *n;
2636 if (oct->props[lio->ifidx].napi_enabled == 0) {
2637 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
2640 oct->props[lio->ifidx].napi_enabled = 1;
2642 if (OCTEON_CN23XX_PF(oct))
2643 oct->droq[0]->ops.poll_mode = 1;
2646 if ((oct->chip_id == OCTEON_CN66XX || oct->chip_id == OCTEON_CN68XX) &&
2648 oct_ptp_open(netdev);
2650 ifstate_set(lio, LIO_IFSTATE_RUNNING);
2652 /* Ready for link status updates */
2655 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n");
2657 if (OCTEON_CN23XX_PF(oct)) {
2659 if (setup_tx_poll_fn(netdev))
2662 if (setup_tx_poll_fn(netdev))
2668 /* tell Octeon to start forwarding packets to host */
2669 send_rx_ctrl_cmd(lio, 1);
2671 dev_info(&oct->pci_dev->dev, "%s interface is opened\n",
2678 * \brief Net device stop for LiquidIO
2679 * @param netdev network device
2681 static int liquidio_stop(struct net_device *netdev)
2683 struct lio *lio = GET_LIO(netdev);
2684 struct octeon_device *oct = lio->oct_dev;
2686 ifstate_reset(lio, LIO_IFSTATE_RUNNING);
2688 netif_tx_disable(netdev);
2690 /* Inform that netif carrier is down */
2691 netif_carrier_off(netdev);
2693 lio->linfo.link.s.link_up = 0;
2694 lio->link_changes++;
2696 /* Tell Octeon that nic interface is down. */
2697 send_rx_ctrl_cmd(lio, 0);
2699 if (OCTEON_CN23XX_PF(oct)) {
2701 cleanup_tx_poll_fn(netdev);
2703 cleanup_tx_poll_fn(netdev);
2706 if (lio->ptp_clock) {
2707 ptp_clock_unregister(lio->ptp_clock);
2708 lio->ptp_clock = NULL;
2711 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name);
2717 * \brief Converts a mask based on net device flags
2718 * @param netdev network device
2720 * This routine generates a octnet_ifflags mask from the net device flags
2721 * received from the OS.
2723 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev)
2725 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST;
2727 if (netdev->flags & IFF_PROMISC)
2728 f |= OCTNET_IFFLAG_PROMISC;
2730 if (netdev->flags & IFF_ALLMULTI)
2731 f |= OCTNET_IFFLAG_ALLMULTI;
2733 if (netdev->flags & IFF_MULTICAST) {
2734 f |= OCTNET_IFFLAG_MULTICAST;
2736 /* Accept all multicast addresses if there are more than we
2739 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR)
2740 f |= OCTNET_IFFLAG_ALLMULTI;
2743 if (netdev->flags & IFF_BROADCAST)
2744 f |= OCTNET_IFFLAG_BROADCAST;
2750 * \brief Net device set_multicast_list
2751 * @param netdev network device
2753 static void liquidio_set_mcast_list(struct net_device *netdev)
2755 struct lio *lio = GET_LIO(netdev);
2756 struct octeon_device *oct = lio->oct_dev;
2757 struct octnic_ctrl_pkt nctrl;
2758 struct netdev_hw_addr *ha;
2761 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR);
2763 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2765 /* Create a ctrl pkt command to be sent to core app. */
2767 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST;
2768 nctrl.ncmd.s.param1 = get_new_flags(netdev);
2769 nctrl.ncmd.s.param2 = mc_count;
2770 nctrl.ncmd.s.more = mc_count;
2771 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2772 nctrl.netpndev = (u64)netdev;
2773 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2775 /* copy all the addresses into the udd */
2777 netdev_for_each_mc_addr(ha, netdev) {
2779 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN);
2780 /* no need to swap bytes */
2782 if (++mc > &nctrl.udd[mc_count])
2786 /* Apparently, any activity in this call from the kernel has to
2787 * be atomic. So we won't wait for response.
2789 nctrl.wait_time = 0;
2791 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2793 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n",
2799 * \brief Net device set_mac_address
2800 * @param netdev network device
2802 static int liquidio_set_mac(struct net_device *netdev, void *p)
2805 struct lio *lio = GET_LIO(netdev);
2806 struct octeon_device *oct = lio->oct_dev;
2807 struct sockaddr *addr = (struct sockaddr *)p;
2808 struct octnic_ctrl_pkt nctrl;
2810 if (!is_valid_ether_addr(addr->sa_data))
2811 return -EADDRNOTAVAIL;
2813 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2816 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
2817 nctrl.ncmd.s.param1 = 0;
2818 nctrl.ncmd.s.more = 1;
2819 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2820 nctrl.netpndev = (u64)netdev;
2821 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2822 nctrl.wait_time = 100;
2825 /* The MAC Address is presented in network byte order. */
2826 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN);
2828 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2830 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n");
2833 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2834 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN);
2840 * \brief Net device get_stats
2841 * @param netdev network device
2843 static struct net_device_stats *liquidio_get_stats(struct net_device *netdev)
2845 struct lio *lio = GET_LIO(netdev);
2846 struct net_device_stats *stats = &netdev->stats;
2847 struct octeon_device *oct;
2848 u64 pkts = 0, drop = 0, bytes = 0;
2849 struct oct_droq_stats *oq_stats;
2850 struct oct_iq_stats *iq_stats;
2851 int i, iq_no, oq_no;
2855 for (i = 0; i < lio->linfo.num_txpciq; i++) {
2856 iq_no = lio->linfo.txpciq[i].s.q_no;
2857 iq_stats = &oct->instr_queue[iq_no]->stats;
2858 pkts += iq_stats->tx_done;
2859 drop += iq_stats->tx_dropped;
2860 bytes += iq_stats->tx_tot_bytes;
2863 stats->tx_packets = pkts;
2864 stats->tx_bytes = bytes;
2865 stats->tx_dropped = drop;
2871 for (i = 0; i < lio->linfo.num_rxpciq; i++) {
2872 oq_no = lio->linfo.rxpciq[i].s.q_no;
2873 oq_stats = &oct->droq[oq_no]->stats;
2874 pkts += oq_stats->rx_pkts_received;
2875 drop += (oq_stats->rx_dropped +
2876 oq_stats->dropped_nodispatch +
2877 oq_stats->dropped_toomany +
2878 oq_stats->dropped_nomem);
2879 bytes += oq_stats->rx_bytes_received;
2882 stats->rx_bytes = bytes;
2883 stats->rx_packets = pkts;
2884 stats->rx_dropped = drop;
2890 * \brief Net device change_mtu
2891 * @param netdev network device
2893 static int liquidio_change_mtu(struct net_device *netdev, int new_mtu)
2895 struct lio *lio = GET_LIO(netdev);
2896 struct octeon_device *oct = lio->oct_dev;
2897 struct octnic_ctrl_pkt nctrl;
2900 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2903 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MTU;
2904 nctrl.ncmd.s.param1 = new_mtu;
2905 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2906 nctrl.wait_time = 100;
2907 nctrl.netpndev = (u64)netdev;
2908 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2910 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2912 dev_err(&oct->pci_dev->dev, "Failed to set MTU\n");
2922 * \brief Handler for SIOCSHWTSTAMP ioctl
2923 * @param netdev network device
2924 * @param ifr interface request
2925 * @param cmd command
2927 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
2929 struct hwtstamp_config conf;
2930 struct lio *lio = GET_LIO(netdev);
2932 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf)))
2938 switch (conf.tx_type) {
2939 case HWTSTAMP_TX_ON:
2940 case HWTSTAMP_TX_OFF:
2946 switch (conf.rx_filter) {
2947 case HWTSTAMP_FILTER_NONE:
2949 case HWTSTAMP_FILTER_ALL:
2950 case HWTSTAMP_FILTER_SOME:
2951 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2952 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2953 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2954 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2955 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2956 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2957 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2958 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2959 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2960 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2961 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2962 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2963 conf.rx_filter = HWTSTAMP_FILTER_ALL;
2969 if (conf.rx_filter == HWTSTAMP_FILTER_ALL)
2970 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2973 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2975 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0;
2979 * \brief ioctl handler
2980 * @param netdev network device
2981 * @param ifr interface request
2982 * @param cmd command
2984 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2986 struct lio *lio = GET_LIO(netdev);
2990 if ((lio->oct_dev->chip_id == OCTEON_CN66XX ||
2991 lio->oct_dev->chip_id == OCTEON_CN68XX) && ptp_enable)
2992 return hwtstamp_ioctl(netdev, ifr);
2999 * \brief handle a Tx timestamp response
3000 * @param status response status
3001 * @param buf pointer to skb
3003 static void handle_timestamp(struct octeon_device *oct,
3007 struct octnet_buf_free_info *finfo;
3008 struct octeon_soft_command *sc;
3009 struct oct_timestamp_resp *resp;
3011 struct sk_buff *skb = (struct sk_buff *)buf;
3013 finfo = (struct octnet_buf_free_info *)skb->cb;
3017 resp = (struct oct_timestamp_resp *)sc->virtrptr;
3019 if (status != OCTEON_REQUEST_DONE) {
3020 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n",
3021 CVM_CAST64(status));
3022 resp->timestamp = 0;
3025 octeon_swap_8B_data(&resp->timestamp, 1);
3027 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) {
3028 struct skb_shared_hwtstamps ts;
3029 u64 ns = resp->timestamp;
3031 netif_info(lio, tx_done, lio->netdev,
3032 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n",
3033 skb, (unsigned long long)ns);
3034 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust);
3035 skb_tstamp_tx(skb, &ts);
3038 octeon_free_soft_command(oct, sc);
3039 tx_buffer_free(skb);
3042 /* \brief Send a data packet that will be timestamped
3043 * @param oct octeon device
3044 * @param ndata pointer to network data
3045 * @param finfo pointer to private network data
3047 static inline int send_nic_timestamp_pkt(struct octeon_device *oct,
3048 struct octnic_data_pkt *ndata,
3049 struct octnet_buf_free_info *finfo)
3052 struct octeon_soft_command *sc;
3059 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd,
3060 sizeof(struct oct_timestamp_resp));
3064 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n");
3065 return IQ_SEND_FAILED;
3068 if (ndata->reqtype == REQTYPE_NORESP_NET)
3069 ndata->reqtype = REQTYPE_RESP_NET;
3070 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG)
3071 ndata->reqtype = REQTYPE_RESP_NET_SG;
3073 sc->callback = handle_timestamp;
3074 sc->callback_arg = finfo->skb;
3075 sc->iq_no = ndata->q_no;
3077 if (OCTEON_CN23XX_PF(oct))
3078 len = (u32)((struct octeon_instr_ih3 *)
3079 (&sc->cmd.cmd3.ih3))->dlengsz;
3081 len = (u32)((struct octeon_instr_ih2 *)
3082 (&sc->cmd.cmd2.ih2))->dlengsz;
3086 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd,
3087 sc, len, ndata->reqtype);
3089 if (retval == IQ_SEND_FAILED) {
3090 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n",
3092 octeon_free_soft_command(oct, sc);
3094 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n");
3100 /** \brief Transmit networks packets to the Octeon interface
3101 * @param skbuff skbuff struct to be passed to network layer.
3102 * @param netdev pointer to network device
3103 * @returns whether the packet was transmitted to the device okay or not
3104 * (NETDEV_TX_OK or NETDEV_TX_BUSY)
3106 static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
3109 struct octnet_buf_free_info *finfo;
3110 union octnic_cmd_setup cmdsetup;
3111 struct octnic_data_pkt ndata;
3112 struct octeon_device *oct;
3113 struct oct_iq_stats *stats;
3114 struct octeon_instr_irh *irh;
3115 union tx_info *tx_info;
3117 int q_idx = 0, iq_no = 0;
3122 lio = GET_LIO(netdev);
3125 if (netif_is_multiqueue(netdev)) {
3126 q_idx = skb->queue_mapping;
3127 q_idx = (q_idx % (lio->linfo.num_txpciq));
3129 iq_no = lio->linfo.txpciq[q_idx].s.q_no;
3134 stats = &oct->instr_queue[iq_no]->stats;
3136 /* Check for all conditions in which the current packet cannot be
3139 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) ||
3140 (!lio->linfo.link.s.link_up) ||
3142 netif_info(lio, tx_err, lio->netdev,
3143 "Transmit failed link_status : %d\n",
3144 lio->linfo.link.s.link_up);
3145 goto lio_xmit_failed;
3148 /* Use space in skb->cb to store info used to unmap and
3151 finfo = (struct octnet_buf_free_info *)skb->cb;
3156 /* Prepare the attributes for the data to be passed to OSI. */
3157 memset(&ndata, 0, sizeof(struct octnic_data_pkt));
3159 ndata.buf = (void *)finfo;
3163 if (netif_is_multiqueue(netdev)) {
3164 if (octnet_iq_is_full(oct, ndata.q_no)) {
3165 /* defer sending if queue is full */
3166 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3168 stats->tx_iq_busy++;
3169 return NETDEV_TX_BUSY;
3172 if (octnet_iq_is_full(oct, lio->txq)) {
3173 /* defer sending if queue is full */
3174 stats->tx_iq_busy++;
3175 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3177 return NETDEV_TX_BUSY;
3180 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n",
3181 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no);
3184 ndata.datasize = skb->len;
3187 cmdsetup.s.iq_no = iq_no;
3189 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3190 if (skb->encapsulation) {
3191 cmdsetup.s.tnl_csum = 1;
3194 cmdsetup.s.transport_csum = 1;
3197 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
3198 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
3199 cmdsetup.s.timestamp = 1;
3202 if (skb_shinfo(skb)->nr_frags == 0) {
3203 cmdsetup.s.u.datasize = skb->len;
3204 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3206 /* Offload checksum calculation for TCP/UDP packets */
3207 dptr = dma_map_single(&oct->pci_dev->dev,
3211 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) {
3212 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n",
3214 return NETDEV_TX_BUSY;
3217 if (OCTEON_CN23XX_PF(oct))
3218 ndata.cmd.cmd3.dptr = dptr;
3220 ndata.cmd.cmd2.dptr = dptr;
3222 ndata.reqtype = REQTYPE_NORESP_NET;
3226 struct skb_frag_struct *frag;
3227 struct octnic_gather *g;
3229 spin_lock(&lio->glist_lock[q_idx]);
3230 g = (struct octnic_gather *)
3231 list_delete_head(&lio->glist[q_idx]);
3232 spin_unlock(&lio->glist_lock[q_idx]);
3235 netif_info(lio, tx_err, lio->netdev,
3236 "Transmit scatter gather: glist null!\n");
3237 goto lio_xmit_failed;
3240 cmdsetup.s.gather = 1;
3241 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1);
3242 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3244 memset(g->sg, 0, g->sg_size);
3246 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev,
3248 (skb->len - skb->data_len),
3250 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) {
3251 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n",
3253 return NETDEV_TX_BUSY;
3255 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0);
3257 frags = skb_shinfo(skb)->nr_frags;
3260 frag = &skb_shinfo(skb)->frags[i - 1];
3262 g->sg[(i >> 2)].ptr[(i & 3)] =
3263 dma_map_page(&oct->pci_dev->dev,
3269 if (dma_mapping_error(&oct->pci_dev->dev,
3270 g->sg[i >> 2].ptr[i & 3])) {
3271 dma_unmap_single(&oct->pci_dev->dev,
3273 skb->len - skb->data_len,
3275 for (j = 1; j < i; j++) {
3276 frag = &skb_shinfo(skb)->frags[j - 1];
3277 dma_unmap_page(&oct->pci_dev->dev,
3278 g->sg[j >> 2].ptr[j & 3],
3282 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n",
3284 return NETDEV_TX_BUSY;
3287 add_sg_size(&g->sg[(i >> 2)], frag->size, (i & 3));
3291 dma_sync_single_for_device(&oct->pci_dev->dev, g->sg_dma_ptr,
3292 g->sg_size, DMA_TO_DEVICE);
3293 dptr = g->sg_dma_ptr;
3295 if (OCTEON_CN23XX_PF(oct))
3296 ndata.cmd.cmd3.dptr = dptr;
3298 ndata.cmd.cmd2.dptr = dptr;
3302 ndata.reqtype = REQTYPE_NORESP_NET_SG;
3305 if (OCTEON_CN23XX_PF(oct)) {
3306 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh;
3307 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0];
3309 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh;
3310 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0];
3313 if (skb_shinfo(skb)->gso_size) {
3314 tx_info->s.gso_size = skb_shinfo(skb)->gso_size;
3315 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs;
3319 /* HW insert VLAN tag */
3320 if (skb_vlan_tag_present(skb)) {
3321 irh->priority = skb_vlan_tag_get(skb) >> 13;
3322 irh->vlan = skb_vlan_tag_get(skb) & 0xfff;
3325 if (unlikely(cmdsetup.s.timestamp))
3326 status = send_nic_timestamp_pkt(oct, &ndata, finfo);
3328 status = octnet_send_nic_data_pkt(oct, &ndata);
3329 if (status == IQ_SEND_FAILED)
3330 goto lio_xmit_failed;
3332 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n");
3334 if (status == IQ_SEND_STOP)
3335 stop_q(lio->netdev, q_idx);
3337 netif_trans_update(netdev);
3339 if (skb_shinfo(skb)->gso_size)
3340 stats->tx_done += skb_shinfo(skb)->gso_segs;
3343 stats->tx_tot_bytes += skb->len;
3345 return NETDEV_TX_OK;
3348 stats->tx_dropped++;
3349 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n",
3350 iq_no, stats->tx_dropped);
3352 dma_unmap_single(&oct->pci_dev->dev, dptr,
3353 ndata.datasize, DMA_TO_DEVICE);
3354 tx_buffer_free(skb);
3355 return NETDEV_TX_OK;
3358 /** \brief Network device Tx timeout
3359 * @param netdev pointer to network device
3361 static void liquidio_tx_timeout(struct net_device *netdev)
3365 lio = GET_LIO(netdev);
3367 netif_info(lio, tx_err, lio->netdev,
3368 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n",
3369 netdev->stats.tx_dropped);
3370 netif_trans_update(netdev);
3374 static int liquidio_vlan_rx_add_vid(struct net_device *netdev,
3375 __be16 proto __attribute__((unused)),
3378 struct lio *lio = GET_LIO(netdev);
3379 struct octeon_device *oct = lio->oct_dev;
3380 struct octnic_ctrl_pkt nctrl;
3383 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3386 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER;
3387 nctrl.ncmd.s.param1 = vid;
3388 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3389 nctrl.wait_time = 100;
3390 nctrl.netpndev = (u64)netdev;
3391 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3393 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3395 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3402 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev,
3403 __be16 proto __attribute__((unused)),
3406 struct lio *lio = GET_LIO(netdev);
3407 struct octeon_device *oct = lio->oct_dev;
3408 struct octnic_ctrl_pkt nctrl;
3411 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3414 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER;
3415 nctrl.ncmd.s.param1 = vid;
3416 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3417 nctrl.wait_time = 100;
3418 nctrl.netpndev = (u64)netdev;
3419 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3421 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3423 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3429 /** Sending command to enable/disable RX checksum offload
3430 * @param netdev pointer to network device
3431 * @param command OCTNET_CMD_TNL_RX_CSUM_CTL
3432 * @param rx_cmd_bit OCTNET_CMD_RXCSUM_ENABLE/
3433 * OCTNET_CMD_RXCSUM_DISABLE
3434 * @returns SUCCESS or FAILURE
3436 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command,
3439 struct lio *lio = GET_LIO(netdev);
3440 struct octeon_device *oct = lio->oct_dev;
3441 struct octnic_ctrl_pkt nctrl;
3445 nctrl.ncmd.s.cmd = command;
3446 nctrl.ncmd.s.param1 = rx_cmd;
3447 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3448 nctrl.wait_time = 100;
3449 nctrl.netpndev = (u64)netdev;
3450 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3452 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3454 dev_err(&oct->pci_dev->dev,
3455 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n",
3461 /** Sending command to add/delete VxLAN UDP port to firmware
3462 * @param netdev pointer to network device
3463 * @param command OCTNET_CMD_VXLAN_PORT_CONFIG
3464 * @param vxlan_port VxLAN port to be added or deleted
3465 * @param vxlan_cmd_bit OCTNET_CMD_VXLAN_PORT_ADD,
3466 * OCTNET_CMD_VXLAN_PORT_DEL
3467 * @returns SUCCESS or FAILURE
3469 static int liquidio_vxlan_port_command(struct net_device *netdev, int command,
3470 u16 vxlan_port, u8 vxlan_cmd_bit)
3472 struct lio *lio = GET_LIO(netdev);
3473 struct octeon_device *oct = lio->oct_dev;
3474 struct octnic_ctrl_pkt nctrl;
3478 nctrl.ncmd.s.cmd = command;
3479 nctrl.ncmd.s.more = vxlan_cmd_bit;
3480 nctrl.ncmd.s.param1 = vxlan_port;
3481 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3482 nctrl.wait_time = 100;
3483 nctrl.netpndev = (u64)netdev;
3484 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3486 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3488 dev_err(&oct->pci_dev->dev,
3489 "VxLAN port add/delete failed in core (ret:0x%x)\n",
3495 /** \brief Net device fix features
3496 * @param netdev pointer to network device
3497 * @param request features requested
3498 * @returns updated features list
3500 static netdev_features_t liquidio_fix_features(struct net_device *netdev,
3501 netdev_features_t request)
3503 struct lio *lio = netdev_priv(netdev);
3505 if ((request & NETIF_F_RXCSUM) &&
3506 !(lio->dev_capability & NETIF_F_RXCSUM))
3507 request &= ~NETIF_F_RXCSUM;
3509 if ((request & NETIF_F_HW_CSUM) &&
3510 !(lio->dev_capability & NETIF_F_HW_CSUM))
3511 request &= ~NETIF_F_HW_CSUM;
3513 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO))
3514 request &= ~NETIF_F_TSO;
3516 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6))
3517 request &= ~NETIF_F_TSO6;
3519 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO))
3520 request &= ~NETIF_F_LRO;
3522 /*Disable LRO if RXCSUM is off */
3523 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) &&
3524 (lio->dev_capability & NETIF_F_LRO))
3525 request &= ~NETIF_F_LRO;
3530 /** \brief Net device set features
3531 * @param netdev pointer to network device
3532 * @param features features to enable/disable
3534 static int liquidio_set_features(struct net_device *netdev,
3535 netdev_features_t features)
3537 struct lio *lio = netdev_priv(netdev);
3539 if (!((netdev->features ^ features) & NETIF_F_LRO))
3542 if ((features & NETIF_F_LRO) && (lio->dev_capability & NETIF_F_LRO))
3543 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
3544 OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3545 else if (!(features & NETIF_F_LRO) &&
3546 (lio->dev_capability & NETIF_F_LRO))
3547 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE,
3548 OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3550 /* Sending command to firmware to enable/disable RX checksum
3551 * offload settings using ethtool
3553 if (!(netdev->features & NETIF_F_RXCSUM) &&
3554 (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3555 (features & NETIF_F_RXCSUM))
3556 liquidio_set_rxcsum_command(netdev,
3557 OCTNET_CMD_TNL_RX_CSUM_CTL,
3558 OCTNET_CMD_RXCSUM_ENABLE);
3559 else if ((netdev->features & NETIF_F_RXCSUM) &&
3560 (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3561 !(features & NETIF_F_RXCSUM))
3562 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
3563 OCTNET_CMD_RXCSUM_DISABLE);
3568 static void liquidio_add_vxlan_port(struct net_device *netdev,
3569 struct udp_tunnel_info *ti)
3571 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3574 liquidio_vxlan_port_command(netdev,
3575 OCTNET_CMD_VXLAN_PORT_CONFIG,
3577 OCTNET_CMD_VXLAN_PORT_ADD);
3580 static void liquidio_del_vxlan_port(struct net_device *netdev,
3581 struct udp_tunnel_info *ti)
3583 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3586 liquidio_vxlan_port_command(netdev,
3587 OCTNET_CMD_VXLAN_PORT_CONFIG,
3589 OCTNET_CMD_VXLAN_PORT_DEL);
3592 static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx,
3593 u8 *mac, bool is_admin_assigned)
3595 struct lio *lio = GET_LIO(netdev);
3596 struct octeon_device *oct = lio->oct_dev;
3597 struct octnic_ctrl_pkt nctrl;
3599 if (!is_valid_ether_addr(mac))
3602 if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs)
3605 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3608 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
3609 /* vfidx is 0 based, but vf_num (param1) is 1 based */
3610 nctrl.ncmd.s.param1 = vfidx + 1;
3611 nctrl.ncmd.s.param2 = (is_admin_assigned ? 1 : 0);
3612 nctrl.ncmd.s.more = 1;
3613 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3615 nctrl.wait_time = LIO_CMD_WAIT_TM;
3618 /* The MAC Address is presented in network byte order. */
3619 ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac);
3621 oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0];
3623 octnet_send_nic_ctrl_pkt(oct, &nctrl);
3628 static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac)
3630 struct lio *lio = GET_LIO(netdev);
3631 struct octeon_device *oct = lio->oct_dev;
3634 retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true);
3636 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac);
3641 static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx,
3642 u16 vlan, u8 qos, __be16 vlan_proto)
3644 struct lio *lio = GET_LIO(netdev);
3645 struct octeon_device *oct = lio->oct_dev;
3646 struct octnic_ctrl_pkt nctrl;
3649 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced)
3652 if (vlan_proto != htons(ETH_P_8021Q))
3653 return -EPROTONOSUPPORT;
3655 if (vlan >= VLAN_N_VID || qos > 7)
3659 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT;
3663 if (oct->sriov_info.vf_vlantci[vfidx] == vlantci)
3666 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3669 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER;
3671 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER;
3673 nctrl.ncmd.s.param1 = vlantci;
3674 nctrl.ncmd.s.param2 =
3675 vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */
3676 nctrl.ncmd.s.more = 0;
3677 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3679 nctrl.wait_time = LIO_CMD_WAIT_TM;
3681 octnet_send_nic_ctrl_pkt(oct, &nctrl);
3683 oct->sriov_info.vf_vlantci[vfidx] = vlantci;
3688 static int liquidio_get_vf_config(struct net_device *netdev, int vfidx,
3689 struct ifla_vf_info *ivi)
3691 struct lio *lio = GET_LIO(netdev);
3692 struct octeon_device *oct = lio->oct_dev;
3695 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced)
3699 macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx];
3700 ether_addr_copy(&ivi->mac[0], macaddr);
3701 ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK;
3702 ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT;
3703 ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx];
3707 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx,
3710 struct lio *lio = GET_LIO(netdev);
3711 struct octeon_device *oct = lio->oct_dev;
3712 struct octnic_ctrl_pkt nctrl;
3714 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced)
3717 if (oct->sriov_info.vf_linkstate[vfidx] == linkstate)
3720 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3721 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE;
3722 nctrl.ncmd.s.param1 =
3723 vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */
3724 nctrl.ncmd.s.param2 = linkstate;
3725 nctrl.ncmd.s.more = 0;
3726 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3728 nctrl.wait_time = LIO_CMD_WAIT_TM;
3730 octnet_send_nic_ctrl_pkt(oct, &nctrl);
3732 oct->sriov_info.vf_linkstate[vfidx] = linkstate;
3737 static const struct net_device_ops lionetdevops = {
3738 .ndo_open = liquidio_open,
3739 .ndo_stop = liquidio_stop,
3740 .ndo_start_xmit = liquidio_xmit,
3741 .ndo_get_stats = liquidio_get_stats,
3742 .ndo_set_mac_address = liquidio_set_mac,
3743 .ndo_set_rx_mode = liquidio_set_mcast_list,
3744 .ndo_tx_timeout = liquidio_tx_timeout,
3746 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid,
3747 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid,
3748 .ndo_change_mtu = liquidio_change_mtu,
3749 .ndo_do_ioctl = liquidio_ioctl,
3750 .ndo_fix_features = liquidio_fix_features,
3751 .ndo_set_features = liquidio_set_features,
3752 .ndo_udp_tunnel_add = liquidio_add_vxlan_port,
3753 .ndo_udp_tunnel_del = liquidio_del_vxlan_port,
3754 .ndo_set_vf_mac = liquidio_set_vf_mac,
3755 .ndo_set_vf_vlan = liquidio_set_vf_vlan,
3756 .ndo_get_vf_config = liquidio_get_vf_config,
3757 .ndo_set_vf_link_state = liquidio_set_vf_link_state,
3758 .ndo_select_queue = select_q
3761 /** \brief Entry point for the liquidio module
3763 static int __init liquidio_init(void)
3766 struct handshake *hs;
3768 init_completion(&first_stage);
3770 octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT);
3772 if (liquidio_init_pci())
3775 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000));
3777 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3780 wait_for_completion(&hs->init);
3782 /* init handshake failed */
3783 dev_err(&hs->pci_dev->dev,
3784 "Failed to init device\n");
3785 liquidio_deinit_pci();
3791 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3794 wait_for_completion_timeout(&hs->started,
3795 msecs_to_jiffies(30000));
3796 if (!hs->started_ok) {
3797 /* starter handshake failed */
3798 dev_err(&hs->pci_dev->dev,
3799 "Firmware failed to start\n");
3800 liquidio_deinit_pci();
3809 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf)
3811 struct octeon_device *oct = (struct octeon_device *)buf;
3812 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
3814 union oct_link_status *ls;
3817 if (recv_pkt->buffer_size[0] != sizeof(*ls)) {
3818 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n",
3819 recv_pkt->buffer_size[0],
3820 recv_pkt->rh.r_nic_info.gmxport);
3824 gmxport = recv_pkt->rh.r_nic_info.gmxport;
3825 ls = (union oct_link_status *)get_rbd(recv_pkt->buffer_ptr[0]);
3827 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3);
3828 for (i = 0; i < oct->ifcount; i++) {
3829 if (oct->props[i].gmxport == gmxport) {
3830 update_link_status(oct->props[i].netdev, ls);
3836 for (i = 0; i < recv_pkt->buffer_count; i++)
3837 recv_buffer_free(recv_pkt->buffer_ptr[i]);
3838 octeon_free_recv_info(recv_info);
3843 * \brief Setup network interfaces
3844 * @param octeon_dev octeon device
3846 * Called during init time for each device. It assumes the NIC
3847 * is already up and running. The link information for each
3848 * interface is passed in link_info.
3850 static int setup_nic_devices(struct octeon_device *octeon_dev)
3852 struct lio *lio = NULL;
3853 struct net_device *netdev;
3855 struct octeon_soft_command *sc;
3856 struct liquidio_if_cfg_context *ctx;
3857 struct liquidio_if_cfg_resp *resp;
3858 struct octdev_props *props;
3859 int retval, num_iqueues, num_oqueues;
3860 union oct_nic_if_cfg if_cfg;
3861 unsigned int base_queue;
3862 unsigned int gmx_port_id;
3863 u32 resp_size, ctx_size, data_size;
3865 struct lio_version *vdata;
3867 /* This is to handle link status changes */
3868 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
3870 lio_nic_info, octeon_dev);
3872 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions.
3873 * They are handled directly.
3875 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET,
3878 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG,
3881 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG,
3882 free_netsgbuf_with_resp);
3884 for (i = 0; i < octeon_dev->ifcount; i++) {
3885 resp_size = sizeof(struct liquidio_if_cfg_resp);
3886 ctx_size = sizeof(struct liquidio_if_cfg_context);
3887 data_size = sizeof(struct lio_version);
3888 sc = (struct octeon_soft_command *)
3889 octeon_alloc_soft_command(octeon_dev, data_size,
3890 resp_size, ctx_size);
3891 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
3892 ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
3893 vdata = (struct lio_version *)sc->virtdptr;
3895 *((u64 *)vdata) = 0;
3896 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION);
3897 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION);
3898 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION);
3900 if (OCTEON_CN23XX_PF(octeon_dev)) {
3901 num_iqueues = octeon_dev->sriov_info.num_pf_rings;
3902 num_oqueues = octeon_dev->sriov_info.num_pf_rings;
3903 base_queue = octeon_dev->sriov_info.pf_srn;
3905 gmx_port_id = octeon_dev->pf_num;
3906 ifidx_or_pfnum = octeon_dev->pf_num;
3908 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF(
3909 octeon_get_conf(octeon_dev), i);
3910 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF(
3911 octeon_get_conf(octeon_dev), i);
3912 base_queue = CFG_GET_BASE_QUE_NIC_IF(
3913 octeon_get_conf(octeon_dev), i);
3914 gmx_port_id = CFG_GET_GMXID_NIC_IF(
3915 octeon_get_conf(octeon_dev), i);
3919 dev_dbg(&octeon_dev->pci_dev->dev,
3920 "requesting config for interface %d, iqs %d, oqs %d\n",
3921 ifidx_or_pfnum, num_iqueues, num_oqueues);
3922 WRITE_ONCE(ctx->cond, 0);
3923 ctx->octeon_id = lio_get_device_id(octeon_dev);
3924 init_waitqueue_head(&ctx->wc);
3927 if_cfg.s.num_iqueues = num_iqueues;
3928 if_cfg.s.num_oqueues = num_oqueues;
3929 if_cfg.s.base_queue = base_queue;
3930 if_cfg.s.gmx_port_id = gmx_port_id;
3934 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC,
3935 OPCODE_NIC_IF_CFG, 0,
3938 sc->callback = if_cfg_callback;
3939 sc->callback_arg = sc;
3940 sc->wait_time = 3000;
3942 retval = octeon_send_soft_command(octeon_dev, sc);
3943 if (retval == IQ_SEND_FAILED) {
3944 dev_err(&octeon_dev->pci_dev->dev,
3945 "iq/oq config failed status: %x\n",
3947 /* Soft instr is freed by driver in case of failure. */
3948 goto setup_nic_dev_fail;
3951 /* Sleep on a wait queue till the cond flag indicates that the
3952 * response arrived or timed-out.
3954 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) {
3955 dev_err(&octeon_dev->pci_dev->dev, "Wait interrupted\n");
3956 goto setup_nic_wait_intr;
3959 retval = resp->status;
3961 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n");
3962 goto setup_nic_dev_fail;
3965 octeon_swap_8B_data((u64 *)(&resp->cfg_info),
3966 (sizeof(struct liquidio_if_cfg_info)) >> 3);
3968 num_iqueues = hweight64(resp->cfg_info.iqmask);
3969 num_oqueues = hweight64(resp->cfg_info.oqmask);
3971 if (!(num_iqueues) || !(num_oqueues)) {
3972 dev_err(&octeon_dev->pci_dev->dev,
3973 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n",
3974 resp->cfg_info.iqmask,
3975 resp->cfg_info.oqmask);
3976 goto setup_nic_dev_fail;
3978 dev_dbg(&octeon_dev->pci_dev->dev,
3979 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n",
3980 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask,
3981 num_iqueues, num_oqueues);
3982 netdev = alloc_etherdev_mq(LIO_SIZE, num_iqueues);
3985 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n");
3986 goto setup_nic_dev_fail;
3989 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev);
3991 /* Associate the routines that will handle different
3994 netdev->netdev_ops = &lionetdevops;
3996 lio = GET_LIO(netdev);
3998 memset(lio, 0, sizeof(struct lio));
4000 lio->ifidx = ifidx_or_pfnum;
4002 props = &octeon_dev->props[i];
4003 props->gmxport = resp->cfg_info.linfo.gmxport;
4004 props->netdev = netdev;
4006 lio->linfo.num_rxpciq = num_oqueues;
4007 lio->linfo.num_txpciq = num_iqueues;
4008 for (j = 0; j < num_oqueues; j++) {
4009 lio->linfo.rxpciq[j].u64 =
4010 resp->cfg_info.linfo.rxpciq[j].u64;
4012 for (j = 0; j < num_iqueues; j++) {
4013 lio->linfo.txpciq[j].u64 =
4014 resp->cfg_info.linfo.txpciq[j].u64;
4016 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr;
4017 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport;
4018 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64;
4020 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4022 if (OCTEON_CN23XX_PF(octeon_dev) ||
4023 OCTEON_CN6XXX(octeon_dev)) {
4024 lio->dev_capability = NETIF_F_HIGHDMA
4027 | NETIF_F_SG | NETIF_F_RXCSUM
4029 | NETIF_F_TSO | NETIF_F_TSO6
4032 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE);
4034 /* Copy of transmit encapsulation capabilities:
4035 * TSO, TSO6, Checksums for this device
4037 lio->enc_dev_capability = NETIF_F_IP_CSUM
4039 | NETIF_F_GSO_UDP_TUNNEL
4040 | NETIF_F_HW_CSUM | NETIF_F_SG
4042 | NETIF_F_TSO | NETIF_F_TSO6
4045 netdev->hw_enc_features = (lio->enc_dev_capability &
4048 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL;
4050 netdev->vlan_features = lio->dev_capability;
4051 /* Add any unchangeable hw features */
4052 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER |
4053 NETIF_F_HW_VLAN_CTAG_RX |
4054 NETIF_F_HW_VLAN_CTAG_TX;
4056 netdev->features = (lio->dev_capability & ~NETIF_F_LRO);
4058 netdev->hw_features = lio->dev_capability;
4059 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/
4060 netdev->hw_features = netdev->hw_features &
4061 ~NETIF_F_HW_VLAN_CTAG_RX;
4063 /* MTU range: 68 - 16000 */
4064 netdev->min_mtu = LIO_MIN_MTU_SIZE;
4065 netdev->max_mtu = LIO_MAX_MTU_SIZE;
4067 /* Point to the properties for octeon device to which this
4068 * interface belongs.
4070 lio->oct_dev = octeon_dev;
4071 lio->octprops = props;
4072 lio->netdev = netdev;
4074 dev_dbg(&octeon_dev->pci_dev->dev,
4075 "if%d gmx: %d hw_addr: 0x%llx\n", i,
4076 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr));
4078 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) {
4081 random_ether_addr(&vfmac[0]);
4082 if (__liquidio_set_vf_mac(netdev, j,
4083 &vfmac[0], false)) {
4084 dev_err(&octeon_dev->pci_dev->dev,
4085 "Error setting VF%d MAC address\n",
4087 goto setup_nic_dev_fail;
4091 /* 64-bit swap required on LE machines */
4092 octeon_swap_8B_data(&lio->linfo.hw_addr, 1);
4093 for (j = 0; j < 6; j++)
4094 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j));
4096 /* Copy MAC Address to OS network device structure */
4098 ether_addr_copy(netdev->dev_addr, mac);
4100 /* By default all interfaces on a single Octeon uses the same
4103 lio->txq = lio->linfo.txpciq[0].s.q_no;
4104 lio->rxq = lio->linfo.rxpciq[0].s.q_no;
4105 if (setup_io_queues(octeon_dev, i)) {
4106 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n");
4107 goto setup_nic_dev_fail;
4110 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS);
4112 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq);
4113 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq);
4115 if (setup_glists(octeon_dev, lio, num_iqueues)) {
4116 dev_err(&octeon_dev->pci_dev->dev,
4117 "Gather list allocation failed\n");
4118 goto setup_nic_dev_fail;
4121 /* Register ethtool support */
4122 liquidio_set_ethtool_ops(netdev);
4123 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID)
4124 octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT;
4126 octeon_dev->priv_flags = 0x0;
4128 if (netdev->features & NETIF_F_LRO)
4129 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
4130 OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
4132 liquidio_set_feature(netdev, OCTNET_CMD_ENABLE_VLAN_FILTER, 0);
4134 if ((debug != -1) && (debug & NETIF_MSG_HW))
4135 liquidio_set_feature(netdev,
4136 OCTNET_CMD_VERBOSE_ENABLE, 0);
4138 if (setup_link_status_change_wq(netdev))
4139 goto setup_nic_dev_fail;
4141 /* Register the network device with the OS */
4142 if (register_netdev(netdev)) {
4143 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n");
4144 goto setup_nic_dev_fail;
4147 dev_dbg(&octeon_dev->pci_dev->dev,
4148 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n",
4149 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
4150 netif_carrier_off(netdev);
4151 lio->link_changes++;
4153 ifstate_set(lio, LIO_IFSTATE_REGISTERED);
4155 /* Sending command to firmware to enable Rx checksum offload
4156 * by default at the time of setup of Liquidio driver for
4159 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
4160 OCTNET_CMD_RXCSUM_ENABLE);
4161 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL,
4162 OCTNET_CMD_TXCSUM_ENABLE);
4164 dev_dbg(&octeon_dev->pci_dev->dev,
4165 "NIC ifidx:%d Setup successful\n", i);
4167 octeon_free_soft_command(octeon_dev, sc);
4174 octeon_free_soft_command(octeon_dev, sc);
4176 setup_nic_wait_intr:
4179 dev_err(&octeon_dev->pci_dev->dev,
4180 "NIC ifidx:%d Setup failed\n", i);
4181 liquidio_destroy_nic_device(octeon_dev, i);
4186 #ifdef CONFIG_PCI_IOV
4187 static int octeon_enable_sriov(struct octeon_device *oct)
4189 unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced;
4190 struct pci_dev *vfdev;
4194 if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) {
4195 err = pci_enable_sriov(oct->pci_dev,
4196 oct->sriov_info.num_vfs_alloced);
4198 dev_err(&oct->pci_dev->dev,
4199 "OCTEON: Failed to enable PCI sriov: %d\n",
4201 oct->sriov_info.num_vfs_alloced = 0;
4204 oct->sriov_info.sriov_enabled = 1;
4206 /* init lookup table that maps DPI ring number to VF pci_dev
4210 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM,
4211 OCTEON_CN23XX_VF_VID, NULL);
4213 if (vfdev->is_virtfn &&
4214 (vfdev->physfn == oct->pci_dev)) {
4215 oct->sriov_info.dpiring_to_vfpcidev_lut[u] =
4217 u += oct->sriov_info.rings_per_vf;
4219 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM,
4220 OCTEON_CN23XX_VF_VID, vfdev);
4224 return num_vfs_alloced;
4227 static int lio_pci_sriov_disable(struct octeon_device *oct)
4231 if (pci_vfs_assigned(oct->pci_dev)) {
4232 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n");
4236 pci_disable_sriov(oct->pci_dev);
4239 while (u < MAX_POSSIBLE_VFS) {
4240 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL;
4241 u += oct->sriov_info.rings_per_vf;
4244 oct->sriov_info.num_vfs_alloced = 0;
4245 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n",
4251 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs)
4253 struct octeon_device *oct = pci_get_drvdata(dev);
4256 if ((num_vfs == oct->sriov_info.num_vfs_alloced) &&
4257 (oct->sriov_info.sriov_enabled)) {
4258 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n",
4259 oct->pf_num, num_vfs);
4264 ret = lio_pci_sriov_disable(oct);
4265 } else if (num_vfs > oct->sriov_info.max_vfs) {
4266 dev_err(&oct->pci_dev->dev,
4267 "OCTEON: Max allowed VFs:%d user requested:%d",
4268 oct->sriov_info.max_vfs, num_vfs);
4271 oct->sriov_info.num_vfs_alloced = num_vfs;
4272 ret = octeon_enable_sriov(oct);
4273 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n",
4274 oct->pf_num, num_vfs);
4282 * \brief initialize the NIC
4283 * @param oct octeon device
4285 * This initialization routine is called once the Octeon device application is
4288 static int liquidio_init_nic_module(struct octeon_device *oct)
4290 struct oct_intrmod_cfg *intrmod_cfg;
4292 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct));
4294 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n");
4296 /* only default iq and oq were initialized
4297 * initialize the rest as well
4299 /* run port_config command for each port */
4300 oct->ifcount = num_nic_ports;
4302 memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports);
4304 for (i = 0; i < MAX_OCTEON_LINKS; i++)
4305 oct->props[i].gmxport = -1;
4307 retval = setup_nic_devices(oct);
4309 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n");
4310 goto octnet_init_failure;
4313 liquidio_ptp_init(oct);
4315 /* Initialize interrupt moderation params */
4316 intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
4317 intrmod_cfg->rx_enable = 1;
4318 intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
4319 intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
4320 intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
4321 intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
4322 intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
4323 intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
4324 intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
4325 intrmod_cfg->tx_enable = 1;
4326 intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
4327 intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
4328 intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
4329 intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
4330 intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
4331 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
4335 octnet_init_failure:
4343 * \brief starter callback that invokes the remaining initialization work after
4344 * the NIC is up and running.
4345 * @param octptr work struct work_struct
4347 static void nic_starter(struct work_struct *work)
4349 struct octeon_device *oct;
4350 struct cavium_wk *wk = (struct cavium_wk *)work;
4352 oct = (struct octeon_device *)wk->ctxptr;
4354 if (atomic_read(&oct->status) == OCT_DEV_RUNNING)
4357 /* If the status of the device is CORE_OK, the core
4358 * application has reported its application type. Call
4359 * any registered handlers now and move to the RUNNING
4362 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) {
4363 schedule_delayed_work(&oct->nic_poll_work.work,
4364 LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4368 atomic_set(&oct->status, OCT_DEV_RUNNING);
4370 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) {
4371 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n");
4373 if (liquidio_init_nic_module(oct))
4374 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n");
4376 handshake[oct->octeon_id].started_ok = 1;
4378 dev_err(&oct->pci_dev->dev,
4379 "Unexpected application running on NIC (%d). Check firmware.\n",
4383 complete(&handshake[oct->octeon_id].started);
4387 octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf)
4389 struct octeon_device *oct = (struct octeon_device *)buf;
4390 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
4391 int i, notice, vf_idx;
4394 notice = recv_pkt->rh.r.ossp;
4395 data = (u64 *)get_rbd(recv_pkt->buffer_ptr[0]);
4397 /* the first 64-bit word of data is the vf_num */
4399 octeon_swap_8B_data(&vf_num, 1);
4400 vf_idx = (int)vf_num - 1;
4402 if (notice == VF_DRV_LOADED) {
4403 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) {
4404 oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx);
4405 dev_info(&oct->pci_dev->dev,
4406 "driver for VF%d was loaded\n", vf_idx);
4407 try_module_get(THIS_MODULE);
4409 } else if (notice == VF_DRV_REMOVED) {
4410 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) {
4411 oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx);
4412 dev_info(&oct->pci_dev->dev,
4413 "driver for VF%d was removed\n", vf_idx);
4414 module_put(THIS_MODULE);
4416 } else if (notice == VF_DRV_MACADDR_CHANGED) {
4417 u8 *b = (u8 *)&data[1];
4419 oct->sriov_info.vf_macaddr[vf_idx] = data[1];
4420 dev_info(&oct->pci_dev->dev,
4421 "VF driver changed VF%d's MAC address to %pM\n",
4425 for (i = 0; i < recv_pkt->buffer_count; i++)
4426 recv_buffer_free(recv_pkt->buffer_ptr[i]);
4427 octeon_free_recv_info(recv_info);
4433 * \brief Device initialization for each Octeon device that is probed
4434 * @param octeon_dev octeon device
4436 static int octeon_device_init(struct octeon_device *octeon_dev)
4440 char bootcmd[] = "\n";
4441 struct octeon_device_priv *oct_priv =
4442 (struct octeon_device_priv *)octeon_dev->priv;
4443 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE);
4445 /* Enable access to the octeon device and make its DMA capability
4448 if (octeon_pci_os_setup(octeon_dev))
4451 atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE);
4453 /* Identify the Octeon type and map the BAR address space. */
4454 if (octeon_chip_specific_setup(octeon_dev)) {
4455 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n");
4459 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE);
4461 octeon_dev->app_mode = CVM_DRV_INVALID_APP;
4463 if (OCTEON_CN23XX_PF(octeon_dev)) {
4464 if (!cn23xx_fw_loaded(octeon_dev)) {
4466 /* Do a soft reset of the Octeon device. */
4467 if (octeon_dev->fn_list.soft_reset(octeon_dev))
4469 /* things might have changed */
4470 if (!cn23xx_fw_loaded(octeon_dev))
4477 } else if (octeon_dev->fn_list.soft_reset(octeon_dev)) {
4481 /* Initialize the dispatch mechanism used to push packets arriving on
4482 * Octeon Output queues.
4484 if (octeon_init_dispatch_list(octeon_dev))
4487 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
4488 OPCODE_NIC_CORE_DRV_ACTIVE,
4489 octeon_core_drv_init,
4492 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
4493 OPCODE_NIC_VF_DRV_NOTICE,
4494 octeon_recv_vf_drv_notice, octeon_dev);
4495 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter);
4496 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev;
4497 schedule_delayed_work(&octeon_dev->nic_poll_work.work,
4498 LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4500 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE);
4502 if (octeon_set_io_queues_off(octeon_dev)) {
4503 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n");
4507 if (OCTEON_CN23XX_PF(octeon_dev)) {
4508 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4510 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n");
4515 /* Initialize soft command buffer pool
4517 if (octeon_setup_sc_buffer_pool(octeon_dev)) {
4518 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n");
4521 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE);
4523 /* Setup the data structures that manage this Octeon's Input queues. */
4524 if (octeon_setup_instr_queues(octeon_dev)) {
4525 dev_err(&octeon_dev->pci_dev->dev,
4526 "instruction queue initialization failed\n");
4529 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE);
4531 /* Initialize lists to manage the requests of different types that
4532 * arrive from user & kernel applications for this octeon device.
4534 if (octeon_setup_response_list(octeon_dev)) {
4535 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n");
4538 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE);
4540 if (octeon_setup_output_queues(octeon_dev)) {
4541 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n");
4545 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE);
4547 if (OCTEON_CN23XX_PF(octeon_dev)) {
4548 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) {
4549 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n");
4552 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE);
4554 if (octeon_allocate_ioq_vector(octeon_dev)) {
4555 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n");
4558 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE);
4561 /* The input and output queue registers were setup earlier (the
4562 * queues were not enabled). Any additional registers
4563 * that need to be programmed should be done now.
4565 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4567 dev_err(&octeon_dev->pci_dev->dev,
4568 "Failed to configure device registers\n");
4573 /* Initialize the tasklet that handles output queue packet processing.*/
4574 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n");
4575 tasklet_init(&oct_priv->droq_tasklet, octeon_droq_bh,
4576 (unsigned long)octeon_dev);
4578 /* Setup the interrupt handler and record the INT SUM register address
4580 if (octeon_setup_interrupt(octeon_dev))
4583 /* Enable Octeon device interrupts */
4584 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR);
4586 atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE);
4588 /* Enable the input and output queues for this Octeon device */
4589 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev);
4591 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues");
4595 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE);
4597 if ((!OCTEON_CN23XX_PF(octeon_dev)) || !fw_loaded) {
4598 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n");
4600 dev_info(&octeon_dev->pci_dev->dev,
4601 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n");
4604 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS);
4606 /* Wait for the octeon to initialize DDR after the soft-reset.*/
4607 while (!ddr_timeout) {
4608 set_current_state(TASK_INTERRUPTIBLE);
4609 if (schedule_timeout(HZ / 10)) {
4610 /* user probably pressed Control-C */
4614 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout);
4616 dev_err(&octeon_dev->pci_dev->dev,
4617 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n",
4622 if (octeon_wait_for_bootloader(octeon_dev, 1000)) {
4623 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n");
4627 /* Divert uboot to take commands from host instead. */
4628 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50);
4630 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n");
4631 ret = octeon_init_consoles(octeon_dev);
4633 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n");
4636 ret = octeon_add_console(octeon_dev, 0);
4638 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n");
4642 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE);
4644 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n");
4645 ret = load_firmware(octeon_dev);
4647 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n");
4650 /* set bit 1 of SLI_SCRATCH_1 to indicate that firmware is
4653 if (OCTEON_CN23XX_PF(octeon_dev))
4654 octeon_write_csr64(octeon_dev, CN23XX_SLI_SCRATCH1,
4658 handshake[octeon_dev->octeon_id].init_ok = 1;
4659 complete(&handshake[octeon_dev->octeon_id].init);
4661 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK);
4663 /* Send Credit for Octeon Output queues. Credits are always sent after
4664 * the output queue is enabled.
4666 for (j = 0; j < octeon_dev->num_oqs; j++)
4667 writel(octeon_dev->droq[j]->max_count,
4668 octeon_dev->droq[j]->pkts_credit_reg);
4670 /* Packets can start arriving on the output queues from this point. */
4675 * \brief Exits the module
4677 static void __exit liquidio_exit(void)
4679 liquidio_deinit_pci();
4681 pr_info("LiquidIO network module is now unloaded\n");
4684 module_init(liquidio_init);
4685 module_exit(liquidio_exit);