2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/crc32.h>
31 #include <linux/mii.h>
33 #include <linux/of_net.h>
34 #include <linux/ethtool.h>
35 #include <linux/dm9000.h>
36 #include <linux/delay.h>
37 #include <linux/platform_device.h>
38 #include <linux/irq.h>
39 #include <linux/slab.h>
41 #include <asm/delay.h>
47 /* Board/System/Debug information/definition ---------------- */
49 #define DM9000_PHY 0x40 /* PHY address 0x01 */
51 #define CARDNAME "dm9000"
52 #define DRV_VERSION "1.31"
55 * Transmit timeout, default 5 seconds.
57 static int watchdog = 5000;
58 module_param(watchdog, int, 0400);
59 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
62 * Debug messages level
65 module_param(debug, int, 0644);
66 MODULE_PARM_DESC(debug, "dm9000 debug level (0-4)");
68 /* DM9000 register address locking.
70 * The DM9000 uses an address register to control where data written
71 * to the data register goes. This means that the address register
72 * must be preserved over interrupts or similar calls.
74 * During interrupt and other critical calls, a spinlock is used to
75 * protect the system, but the calls themselves save the address
76 * in the address register in case they are interrupting another
77 * access to the device.
79 * For general accesses a lock is provided so that calls which are
80 * allowed to sleep are serialised so that the address register does
81 * not need to be saved. This lock also serves to serialise access
82 * to the EEPROM and PHY access registers which are shared between
86 /* The driver supports the original DM9000E, and now the two newer
87 * devices, DM9000A and DM9000B.
91 TYPE_DM9000E, /* original DM9000 */
96 /* Structure/enum declaration ------------------------------- */
97 typedef struct board_info {
99 void __iomem *io_addr; /* Register I/O base address */
100 void __iomem *io_data; /* Data I/O address */
105 u16 queue_start_addr;
108 u8 io_mode; /* 0:word, 2:byte */
113 unsigned int in_suspend :1;
114 unsigned int wake_supported :1;
116 enum dm9000_type type;
118 void (*inblk)(void __iomem *port, void *data, int length);
119 void (*outblk)(void __iomem *port, void *data, int length);
120 void (*dumpblk)(void __iomem *port, int length);
122 struct device *dev; /* parent device */
124 struct resource *addr_res; /* resources found */
125 struct resource *data_res;
126 struct resource *addr_req; /* resources requested */
127 struct resource *data_req;
128 struct resource *irq_res;
132 struct mutex addr_lock; /* phy and eeprom access lock */
134 struct delayed_work phy_poll;
135 struct net_device *ndev;
139 struct mii_if_info mii;
148 #define dm9000_dbg(db, lev, msg...) do { \
149 if ((lev) < debug) { \
150 dev_dbg(db->dev, msg); \
154 static inline board_info_t *to_dm9000_board(struct net_device *dev)
156 return netdev_priv(dev);
159 /* DM9000 network board routine ---------------------------- */
162 * Read a byte from I/O port
165 ior(board_info_t * db, int reg)
167 writeb(reg, db->io_addr);
168 return readb(db->io_data);
172 * Write a byte to I/O port
176 iow(board_info_t * db, int reg, int value)
178 writeb(reg, db->io_addr);
179 writeb(value, db->io_data);
183 dm9000_reset(board_info_t *db)
185 dev_dbg(db->dev, "resetting device\n");
187 /* Reset DM9000, see DM9000 Application Notes V1.22 Jun 11, 2004 page 29
188 * The essential point is that we have to do a double reset, and the
189 * instruction is to set LBK into MAC internal loopback mode.
191 iow(db, DM9000_NCR, 0x03);
192 udelay(100); /* Application note says at least 20 us */
193 if (ior(db, DM9000_NCR) & 1)
194 dev_err(db->dev, "dm9000 did not respond to first reset\n");
196 iow(db, DM9000_NCR, 0);
197 iow(db, DM9000_NCR, 0x03);
199 if (ior(db, DM9000_NCR) & 1)
200 dev_err(db->dev, "dm9000 did not respond to second reset\n");
203 /* routines for sending block to chip */
205 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
207 iowrite8_rep(reg, data, count);
210 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
212 iowrite16_rep(reg, data, (count+1) >> 1);
215 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
217 iowrite32_rep(reg, data, (count+3) >> 2);
220 /* input block from chip to memory */
222 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
224 ioread8_rep(reg, data, count);
228 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
230 ioread16_rep(reg, data, (count+1) >> 1);
233 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
235 ioread32_rep(reg, data, (count+3) >> 2);
238 /* dump block from chip to null */
240 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
245 for (i = 0; i < count; i++)
249 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
254 count = (count + 1) >> 1;
256 for (i = 0; i < count; i++)
260 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
265 count = (count + 3) >> 2;
267 for (i = 0; i < count; i++)
272 * Sleep, either by using msleep() or if we are suspending, then
273 * use mdelay() to sleep.
275 static void dm9000_msleep(board_info_t *db, unsigned int ms)
283 /* Read a word from phyxcer */
285 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
287 board_info_t *db = netdev_priv(dev);
289 unsigned int reg_save;
292 mutex_lock(&db->addr_lock);
294 spin_lock_irqsave(&db->lock, flags);
296 /* Save previous register address */
297 reg_save = readb(db->io_addr);
299 /* Fill the phyxcer register into REG_0C */
300 iow(db, DM9000_EPAR, DM9000_PHY | reg);
302 /* Issue phyxcer read command */
303 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS);
305 writeb(reg_save, db->io_addr);
306 spin_unlock_irqrestore(&db->lock, flags);
308 dm9000_msleep(db, 1); /* Wait read complete */
310 spin_lock_irqsave(&db->lock, flags);
311 reg_save = readb(db->io_addr);
313 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
315 /* The read data keeps on REG_0D & REG_0E */
316 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
318 /* restore the previous address */
319 writeb(reg_save, db->io_addr);
320 spin_unlock_irqrestore(&db->lock, flags);
322 mutex_unlock(&db->addr_lock);
324 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
328 /* Write a word to phyxcer */
330 dm9000_phy_write(struct net_device *dev,
331 int phyaddr_unused, int reg, int value)
333 board_info_t *db = netdev_priv(dev);
335 unsigned long reg_save;
337 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
338 mutex_lock(&db->addr_lock);
340 spin_lock_irqsave(&db->lock, flags);
342 /* Save previous register address */
343 reg_save = readb(db->io_addr);
345 /* Fill the phyxcer register into REG_0C */
346 iow(db, DM9000_EPAR, DM9000_PHY | reg);
348 /* Fill the written data into REG_0D & REG_0E */
349 iow(db, DM9000_EPDRL, value);
350 iow(db, DM9000_EPDRH, value >> 8);
352 /* Issue phyxcer write command */
353 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW);
355 writeb(reg_save, db->io_addr);
356 spin_unlock_irqrestore(&db->lock, flags);
358 dm9000_msleep(db, 1); /* Wait write complete */
360 spin_lock_irqsave(&db->lock, flags);
361 reg_save = readb(db->io_addr);
363 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
365 /* restore the previous address */
366 writeb(reg_save, db->io_addr);
368 spin_unlock_irqrestore(&db->lock, flags);
369 mutex_unlock(&db->addr_lock);
374 * select the specified set of io routines to use with the
378 static void dm9000_set_io(struct board_info *db, int byte_width)
380 /* use the size of the data resource to work out what IO
381 * routines we want to use
384 switch (byte_width) {
386 db->dumpblk = dm9000_dumpblk_8bit;
387 db->outblk = dm9000_outblk_8bit;
388 db->inblk = dm9000_inblk_8bit;
393 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
395 db->dumpblk = dm9000_dumpblk_16bit;
396 db->outblk = dm9000_outblk_16bit;
397 db->inblk = dm9000_inblk_16bit;
402 db->dumpblk = dm9000_dumpblk_32bit;
403 db->outblk = dm9000_outblk_32bit;
404 db->inblk = dm9000_inblk_32bit;
409 static void dm9000_schedule_poll(board_info_t *db)
411 if (db->type == TYPE_DM9000E)
412 schedule_delayed_work(&db->phy_poll, HZ * 2);
415 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
417 board_info_t *dm = to_dm9000_board(dev);
419 if (!netif_running(dev))
422 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
426 dm9000_read_locked(board_info_t *db, int reg)
431 spin_lock_irqsave(&db->lock, flags);
433 spin_unlock_irqrestore(&db->lock, flags);
438 static int dm9000_wait_eeprom(board_info_t *db)
441 int timeout = 8; /* wait max 8msec */
443 /* The DM9000 data sheets say we should be able to
444 * poll the ERRE bit in EPCR to wait for the EEPROM
445 * operation. From testing several chips, this bit
446 * does not seem to work.
448 * We attempt to use the bit, but fall back to the
449 * timeout (which is why we do not return an error
450 * on expiry) to say that the EEPROM operation has
455 status = dm9000_read_locked(db, DM9000_EPCR);
457 if ((status & EPCR_ERRE) == 0)
463 dev_dbg(db->dev, "timeout waiting EEPROM\n");
472 * Read a word data from EEPROM
475 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
479 if (db->flags & DM9000_PLATF_NO_EEPROM) {
485 mutex_lock(&db->addr_lock);
487 spin_lock_irqsave(&db->lock, flags);
489 iow(db, DM9000_EPAR, offset);
490 iow(db, DM9000_EPCR, EPCR_ERPRR);
492 spin_unlock_irqrestore(&db->lock, flags);
494 dm9000_wait_eeprom(db);
496 /* delay for at-least 150uS */
499 spin_lock_irqsave(&db->lock, flags);
501 iow(db, DM9000_EPCR, 0x0);
503 to[0] = ior(db, DM9000_EPDRL);
504 to[1] = ior(db, DM9000_EPDRH);
506 spin_unlock_irqrestore(&db->lock, flags);
508 mutex_unlock(&db->addr_lock);
512 * Write a word data to SROM
515 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
519 if (db->flags & DM9000_PLATF_NO_EEPROM)
522 mutex_lock(&db->addr_lock);
524 spin_lock_irqsave(&db->lock, flags);
525 iow(db, DM9000_EPAR, offset);
526 iow(db, DM9000_EPDRH, data[1]);
527 iow(db, DM9000_EPDRL, data[0]);
528 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
529 spin_unlock_irqrestore(&db->lock, flags);
531 dm9000_wait_eeprom(db);
533 mdelay(1); /* wait at least 150uS to clear */
535 spin_lock_irqsave(&db->lock, flags);
536 iow(db, DM9000_EPCR, 0);
537 spin_unlock_irqrestore(&db->lock, flags);
539 mutex_unlock(&db->addr_lock);
544 static void dm9000_get_drvinfo(struct net_device *dev,
545 struct ethtool_drvinfo *info)
547 board_info_t *dm = to_dm9000_board(dev);
549 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
550 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
551 strlcpy(info->bus_info, to_platform_device(dm->dev)->name,
552 sizeof(info->bus_info));
555 static u32 dm9000_get_msglevel(struct net_device *dev)
557 board_info_t *dm = to_dm9000_board(dev);
559 return dm->msg_enable;
562 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
564 board_info_t *dm = to_dm9000_board(dev);
566 dm->msg_enable = value;
569 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
571 board_info_t *dm = to_dm9000_board(dev);
573 mii_ethtool_gset(&dm->mii, cmd);
577 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
579 board_info_t *dm = to_dm9000_board(dev);
581 return mii_ethtool_sset(&dm->mii, cmd);
584 static int dm9000_nway_reset(struct net_device *dev)
586 board_info_t *dm = to_dm9000_board(dev);
587 return mii_nway_restart(&dm->mii);
590 static int dm9000_set_features(struct net_device *dev,
591 netdev_features_t features)
593 board_info_t *dm = to_dm9000_board(dev);
594 netdev_features_t changed = dev->features ^ features;
597 if (!(changed & NETIF_F_RXCSUM))
600 spin_lock_irqsave(&dm->lock, flags);
601 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
602 spin_unlock_irqrestore(&dm->lock, flags);
607 static u32 dm9000_get_link(struct net_device *dev)
609 board_info_t *dm = to_dm9000_board(dev);
612 if (dm->flags & DM9000_PLATF_EXT_PHY)
613 ret = mii_link_ok(&dm->mii);
615 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
620 #define DM_EEPROM_MAGIC (0x444D394B)
622 static int dm9000_get_eeprom_len(struct net_device *dev)
627 static int dm9000_get_eeprom(struct net_device *dev,
628 struct ethtool_eeprom *ee, u8 *data)
630 board_info_t *dm = to_dm9000_board(dev);
631 int offset = ee->offset;
635 /* EEPROM access is aligned to two bytes */
637 if ((len & 1) != 0 || (offset & 1) != 0)
640 if (dm->flags & DM9000_PLATF_NO_EEPROM)
643 ee->magic = DM_EEPROM_MAGIC;
645 for (i = 0; i < len; i += 2)
646 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
651 static int dm9000_set_eeprom(struct net_device *dev,
652 struct ethtool_eeprom *ee, u8 *data)
654 board_info_t *dm = to_dm9000_board(dev);
655 int offset = ee->offset;
659 /* EEPROM access is aligned to two bytes */
661 if (dm->flags & DM9000_PLATF_NO_EEPROM)
664 if (ee->magic != DM_EEPROM_MAGIC)
668 if (len & 1 || offset & 1) {
669 int which = offset & 1;
672 dm9000_read_eeprom(dm, offset / 2, tmp);
674 dm9000_write_eeprom(dm, offset / 2, tmp);
678 dm9000_write_eeprom(dm, offset / 2, data);
690 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
692 board_info_t *dm = to_dm9000_board(dev);
694 memset(w, 0, sizeof(struct ethtool_wolinfo));
696 /* note, we could probably support wake-phy too */
697 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
698 w->wolopts = dm->wake_state;
701 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
703 board_info_t *dm = to_dm9000_board(dev);
705 u32 opts = w->wolopts;
708 if (!dm->wake_supported)
711 if (opts & ~WAKE_MAGIC)
714 if (opts & WAKE_MAGIC)
717 mutex_lock(&dm->addr_lock);
719 spin_lock_irqsave(&dm->lock, flags);
720 iow(dm, DM9000_WCR, wcr);
721 spin_unlock_irqrestore(&dm->lock, flags);
723 mutex_unlock(&dm->addr_lock);
725 if (dm->wake_state != opts) {
726 /* change in wol state, update IRQ state */
729 irq_set_irq_wake(dm->irq_wake, 1);
730 else if (dm->wake_state && !opts)
731 irq_set_irq_wake(dm->irq_wake, 0);
734 dm->wake_state = opts;
738 static const struct ethtool_ops dm9000_ethtool_ops = {
739 .get_drvinfo = dm9000_get_drvinfo,
740 .get_settings = dm9000_get_settings,
741 .set_settings = dm9000_set_settings,
742 .get_msglevel = dm9000_get_msglevel,
743 .set_msglevel = dm9000_set_msglevel,
744 .nway_reset = dm9000_nway_reset,
745 .get_link = dm9000_get_link,
746 .get_wol = dm9000_get_wol,
747 .set_wol = dm9000_set_wol,
748 .get_eeprom_len = dm9000_get_eeprom_len,
749 .get_eeprom = dm9000_get_eeprom,
750 .set_eeprom = dm9000_set_eeprom,
753 static void dm9000_show_carrier(board_info_t *db,
754 unsigned carrier, unsigned nsr)
757 struct net_device *ndev = db->ndev;
758 struct mii_if_info *mii = &db->mii;
759 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
762 lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
764 "%s: link up, %dMbps, %s-duplex, lpa 0x%04X\n",
765 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
766 (ncr & NCR_FDX) ? "full" : "half", lpa);
768 dev_info(db->dev, "%s: link down\n", ndev->name);
773 dm9000_poll_work(struct work_struct *w)
775 struct delayed_work *dw = to_delayed_work(w);
776 board_info_t *db = container_of(dw, board_info_t, phy_poll);
777 struct net_device *ndev = db->ndev;
779 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
780 !(db->flags & DM9000_PLATF_EXT_PHY)) {
781 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
782 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
783 unsigned new_carrier;
785 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
787 if (old_carrier != new_carrier) {
788 if (netif_msg_link(db))
789 dm9000_show_carrier(db, new_carrier, nsr);
792 netif_carrier_off(ndev);
794 netif_carrier_on(ndev);
797 mii_check_media(&db->mii, netif_msg_link(db), 0);
799 if (netif_running(ndev))
800 dm9000_schedule_poll(db);
803 /* dm9000_release_board
805 * release a board, and any mapped resources
809 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
811 /* unmap our resources */
813 iounmap(db->io_addr);
814 iounmap(db->io_data);
816 /* release the resources */
818 release_resource(db->data_req);
821 release_resource(db->addr_req);
825 static unsigned char dm9000_type_to_char(enum dm9000_type type)
828 case TYPE_DM9000E: return 'e';
829 case TYPE_DM9000A: return 'a';
830 case TYPE_DM9000B: return 'b';
837 * Set DM9000 multicast address
840 dm9000_hash_table_unlocked(struct net_device *dev)
842 board_info_t *db = netdev_priv(dev);
843 struct netdev_hw_addr *ha;
846 u16 hash_table[4] = { 0, 0, 0, 0x8000 }; /* broadcast address */
847 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
849 dm9000_dbg(db, 1, "entering %s\n", __func__);
851 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
852 iow(db, oft, dev->dev_addr[i]);
854 if (dev->flags & IFF_PROMISC)
857 if (dev->flags & IFF_ALLMULTI)
860 /* the multicast address in Hash Table : 64 bits */
861 netdev_for_each_mc_addr(ha, dev) {
862 hash_val = ether_crc_le(6, ha->addr) & 0x3f;
863 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
866 /* Write the hash table to MAC MD table */
867 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
868 iow(db, oft++, hash_table[i]);
869 iow(db, oft++, hash_table[i] >> 8);
872 iow(db, DM9000_RCR, rcr);
876 dm9000_hash_table(struct net_device *dev)
878 board_info_t *db = netdev_priv(dev);
881 spin_lock_irqsave(&db->lock, flags);
882 dm9000_hash_table_unlocked(dev);
883 spin_unlock_irqrestore(&db->lock, flags);
887 * Initialize dm9000 board
890 dm9000_init_dm9000(struct net_device *dev)
892 board_info_t *db = netdev_priv(dev);
896 dm9000_dbg(db, 1, "entering %s\n", __func__);
899 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
902 if (dev->hw_features & NETIF_F_RXCSUM)
904 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
906 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
907 iow(db, DM9000_GPR, 0);
909 /* If we are dealing with DM9000B, some extra steps are required: a
910 * manual phy reset, and setting init params.
912 if (db->type == TYPE_DM9000B) {
913 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET);
914 dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM);
917 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
919 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
920 * up dumping the wake events if we disable this. There is already
921 * a wake-mask in DM9000_WCR */
922 if (db->wake_supported)
925 iow(db, DM9000_NCR, ncr);
927 /* Program operating register */
928 iow(db, DM9000_TCR, 0); /* TX Polling clear */
929 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
930 iow(db, DM9000_FCR, 0xff); /* Flow Control */
931 iow(db, DM9000_SMCR, 0); /* Special Mode */
932 /* clear TX status */
933 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
934 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
936 /* Set address filter table */
937 dm9000_hash_table_unlocked(dev);
939 imr = IMR_PAR | IMR_PTM | IMR_PRM;
940 if (db->type != TYPE_DM9000E)
945 /* Enable TX/RX interrupt mask */
946 iow(db, DM9000_IMR, imr);
948 /* Init Driver variable */
950 db->queue_pkt_len = 0;
951 dev->trans_start = jiffies;
954 /* Our watchdog timed out. Called by the networking layer */
955 static void dm9000_timeout(struct net_device *dev)
957 board_info_t *db = netdev_priv(dev);
961 /* Save previous register address */
962 spin_lock_irqsave(&db->lock, flags);
963 reg_save = readb(db->io_addr);
965 netif_stop_queue(dev);
967 dm9000_init_dm9000(dev);
968 /* We can accept TX packets again */
969 dev->trans_start = jiffies; /* prevent tx timeout */
970 netif_wake_queue(dev);
972 /* Restore previous register address */
973 writeb(reg_save, db->io_addr);
974 spin_unlock_irqrestore(&db->lock, flags);
977 static void dm9000_send_packet(struct net_device *dev,
981 board_info_t *dm = to_dm9000_board(dev);
983 /* The DM9000 is not smart enough to leave fragmented packets alone. */
984 if (dm->ip_summed != ip_summed) {
985 if (ip_summed == CHECKSUM_NONE)
986 iow(dm, DM9000_TCCR, 0);
988 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
989 dm->ip_summed = ip_summed;
992 /* Set TX length to DM9000 */
993 iow(dm, DM9000_TXPLL, pkt_len);
994 iow(dm, DM9000_TXPLH, pkt_len >> 8);
996 /* Issue TX polling command */
997 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
1001 * Hardware start transmission.
1002 * Send a packet to media from the upper layer.
1005 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
1007 unsigned long flags;
1008 board_info_t *db = netdev_priv(dev);
1010 dm9000_dbg(db, 3, "%s:\n", __func__);
1012 if (db->tx_pkt_cnt > 1)
1013 return NETDEV_TX_BUSY;
1015 spin_lock_irqsave(&db->lock, flags);
1017 /* Move data to DM9000 TX RAM */
1018 writeb(DM9000_MWCMD, db->io_addr);
1020 (db->outblk)(db->io_data, skb->data, skb->len);
1021 dev->stats.tx_bytes += skb->len;
1024 /* TX control: First packet immediately send, second packet queue */
1025 if (db->tx_pkt_cnt == 1) {
1026 dm9000_send_packet(dev, skb->ip_summed, skb->len);
1029 db->queue_pkt_len = skb->len;
1030 db->queue_ip_summed = skb->ip_summed;
1031 netif_stop_queue(dev);
1034 spin_unlock_irqrestore(&db->lock, flags);
1039 return NETDEV_TX_OK;
1043 * DM9000 interrupt handler
1044 * receive the packet to upper layer, free the transmitted packet
1047 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
1049 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
1051 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
1052 /* One packet sent complete */
1054 dev->stats.tx_packets++;
1056 if (netif_msg_tx_done(db))
1057 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
1059 /* Queue packet check & send */
1060 if (db->tx_pkt_cnt > 0)
1061 dm9000_send_packet(dev, db->queue_ip_summed,
1063 netif_wake_queue(dev);
1067 struct dm9000_rxhdr {
1074 * Received a packet and pass to upper layer
1077 dm9000_rx(struct net_device *dev)
1079 board_info_t *db = netdev_priv(dev);
1080 struct dm9000_rxhdr rxhdr;
1081 struct sk_buff *skb;
1086 /* Check packet ready or not */
1088 ior(db, DM9000_MRCMDX); /* Dummy read */
1090 /* Get most updated data */
1091 rxbyte = readb(db->io_data);
1093 /* Status check: this byte must be 0 or 1 */
1094 if (rxbyte & DM9000_PKT_ERR) {
1095 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1096 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1097 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
1101 if (!(rxbyte & DM9000_PKT_RDY))
1104 /* A packet ready now & Get status/length */
1106 writeb(DM9000_MRCMD, db->io_addr);
1108 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1110 RxLen = le16_to_cpu(rxhdr.RxLen);
1112 if (netif_msg_rx_status(db))
1113 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
1114 rxhdr.RxStatus, RxLen);
1116 /* Packet Status check */
1119 if (netif_msg_rx_err(db))
1120 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1123 if (RxLen > DM9000_PKT_MAX) {
1124 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1127 /* rxhdr.RxStatus is identical to RSR register. */
1128 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
1129 RSR_PLE | RSR_RWTO |
1130 RSR_LCS | RSR_RF)) {
1132 if (rxhdr.RxStatus & RSR_FOE) {
1133 if (netif_msg_rx_err(db))
1134 dev_dbg(db->dev, "fifo error\n");
1135 dev->stats.rx_fifo_errors++;
1137 if (rxhdr.RxStatus & RSR_CE) {
1138 if (netif_msg_rx_err(db))
1139 dev_dbg(db->dev, "crc error\n");
1140 dev->stats.rx_crc_errors++;
1142 if (rxhdr.RxStatus & RSR_RF) {
1143 if (netif_msg_rx_err(db))
1144 dev_dbg(db->dev, "length error\n");
1145 dev->stats.rx_length_errors++;
1149 /* Move data from DM9000 */
1151 ((skb = netdev_alloc_skb(dev, RxLen + 4)) != NULL)) {
1152 skb_reserve(skb, 2);
1153 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1155 /* Read received packet from RX SRAM */
1157 (db->inblk)(db->io_data, rdptr, RxLen);
1158 dev->stats.rx_bytes += RxLen;
1160 /* Pass to upper layer */
1161 skb->protocol = eth_type_trans(skb, dev);
1162 if (dev->features & NETIF_F_RXCSUM) {
1163 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1164 skb->ip_summed = CHECKSUM_UNNECESSARY;
1166 skb_checksum_none_assert(skb);
1169 dev->stats.rx_packets++;
1172 /* need to dump the packet's data */
1174 (db->dumpblk)(db->io_data, RxLen);
1176 } while (rxbyte & DM9000_PKT_RDY);
1179 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1181 struct net_device *dev = dev_id;
1182 board_info_t *db = netdev_priv(dev);
1184 unsigned long flags;
1187 dm9000_dbg(db, 3, "entering %s\n", __func__);
1189 /* A real interrupt coming */
1191 /* holders of db->lock must always block IRQs */
1192 spin_lock_irqsave(&db->lock, flags);
1194 /* Save previous register address */
1195 reg_save = readb(db->io_addr);
1197 /* Disable all interrupts */
1198 iow(db, DM9000_IMR, IMR_PAR);
1200 /* Got DM9000 interrupt status */
1201 int_status = ior(db, DM9000_ISR); /* Got ISR */
1202 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1204 if (netif_msg_intr(db))
1205 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1207 /* Received the coming packet */
1208 if (int_status & ISR_PRS)
1211 /* Trnasmit Interrupt check */
1212 if (int_status & ISR_PTS)
1213 dm9000_tx_done(dev, db);
1215 if (db->type != TYPE_DM9000E) {
1216 if (int_status & ISR_LNKCHNG) {
1217 /* fire a link-change request */
1218 schedule_delayed_work(&db->phy_poll, 1);
1222 /* Re-enable interrupt mask */
1223 iow(db, DM9000_IMR, db->imr_all);
1225 /* Restore previous register address */
1226 writeb(reg_save, db->io_addr);
1228 spin_unlock_irqrestore(&db->lock, flags);
1233 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1235 struct net_device *dev = dev_id;
1236 board_info_t *db = netdev_priv(dev);
1237 unsigned long flags;
1240 spin_lock_irqsave(&db->lock, flags);
1242 nsr = ior(db, DM9000_NSR);
1243 wcr = ior(db, DM9000_WCR);
1245 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1247 if (nsr & NSR_WAKEST) {
1248 /* clear, so we can avoid */
1249 iow(db, DM9000_NSR, NSR_WAKEST);
1251 if (wcr & WCR_LINKST)
1252 dev_info(db->dev, "wake by link status change\n");
1253 if (wcr & WCR_SAMPLEST)
1254 dev_info(db->dev, "wake by sample packet\n");
1255 if (wcr & WCR_MAGICST )
1256 dev_info(db->dev, "wake by magic packet\n");
1257 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1258 dev_err(db->dev, "wake signalled with no reason? "
1259 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1263 spin_unlock_irqrestore(&db->lock, flags);
1265 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1268 #ifdef CONFIG_NET_POLL_CONTROLLER
1272 static void dm9000_poll_controller(struct net_device *dev)
1274 disable_irq(dev->irq);
1275 dm9000_interrupt(dev->irq, dev);
1276 enable_irq(dev->irq);
1281 * Open the interface.
1282 * The interface is opened whenever "ifconfig" actives it.
1285 dm9000_open(struct net_device *dev)
1287 board_info_t *db = netdev_priv(dev);
1288 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1290 if (netif_msg_ifup(db))
1291 dev_dbg(db->dev, "enabling %s\n", dev->name);
1293 /* If there is no IRQ type specified, default to something that
1294 * may work, and tell the user that this is a problem */
1296 if (irqflags == IRQF_TRIGGER_NONE)
1297 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1299 irqflags |= IRQF_SHARED;
1301 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1302 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1303 mdelay(1); /* delay needs by DM9000B */
1305 /* Initialize DM9000 board */
1307 dm9000_init_dm9000(dev);
1309 if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
1312 /* Init driver variable */
1315 mii_check_media(&db->mii, netif_msg_link(db), 1);
1316 netif_start_queue(dev);
1318 dm9000_schedule_poll(db);
1324 dm9000_shutdown(struct net_device *dev)
1326 board_info_t *db = netdev_priv(dev);
1329 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1330 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1331 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1332 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1336 * Stop the interface.
1337 * The interface is stopped when it is brought.
1340 dm9000_stop(struct net_device *ndev)
1342 board_info_t *db = netdev_priv(ndev);
1344 if (netif_msg_ifdown(db))
1345 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1347 cancel_delayed_work_sync(&db->phy_poll);
1349 netif_stop_queue(ndev);
1350 netif_carrier_off(ndev);
1352 /* free interrupt */
1353 free_irq(ndev->irq, ndev);
1355 dm9000_shutdown(ndev);
1360 static const struct net_device_ops dm9000_netdev_ops = {
1361 .ndo_open = dm9000_open,
1362 .ndo_stop = dm9000_stop,
1363 .ndo_start_xmit = dm9000_start_xmit,
1364 .ndo_tx_timeout = dm9000_timeout,
1365 .ndo_set_rx_mode = dm9000_hash_table,
1366 .ndo_do_ioctl = dm9000_ioctl,
1367 .ndo_change_mtu = eth_change_mtu,
1368 .ndo_set_features = dm9000_set_features,
1369 .ndo_validate_addr = eth_validate_addr,
1370 .ndo_set_mac_address = eth_mac_addr,
1371 #ifdef CONFIG_NET_POLL_CONTROLLER
1372 .ndo_poll_controller = dm9000_poll_controller,
1376 static struct dm9000_plat_data *dm9000_parse_dt(struct device *dev)
1378 struct dm9000_plat_data *pdata;
1379 struct device_node *np = dev->of_node;
1380 const void *mac_addr;
1382 if (!IS_ENABLED(CONFIG_OF) || !np)
1385 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1387 return ERR_PTR(-ENOMEM);
1389 if (of_find_property(np, "davicom,ext-phy", NULL))
1390 pdata->flags |= DM9000_PLATF_EXT_PHY;
1391 if (of_find_property(np, "davicom,no-eeprom", NULL))
1392 pdata->flags |= DM9000_PLATF_NO_EEPROM;
1394 mac_addr = of_get_mac_address(np);
1396 memcpy(pdata->dev_addr, mac_addr, sizeof(pdata->dev_addr));
1402 * Search DM9000 board, allocate space and register it
1405 dm9000_probe(struct platform_device *pdev)
1407 struct dm9000_plat_data *pdata = dev_get_platdata(&pdev->dev);
1408 struct board_info *db; /* Point a board information structure */
1409 struct net_device *ndev;
1410 const unsigned char *mac_src;
1417 pdata = dm9000_parse_dt(&pdev->dev);
1419 return PTR_ERR(pdata);
1422 /* Init network device */
1423 ndev = alloc_etherdev(sizeof(struct board_info));
1427 SET_NETDEV_DEV(ndev, &pdev->dev);
1429 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1431 /* setup board info structure */
1432 db = netdev_priv(ndev);
1434 db->dev = &pdev->dev;
1437 spin_lock_init(&db->lock);
1438 mutex_init(&db->addr_lock);
1440 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1442 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1443 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1444 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1446 if (db->addr_res == NULL || db->data_res == NULL ||
1447 db->irq_res == NULL) {
1448 dev_err(db->dev, "insufficient resources\n");
1453 db->irq_wake = platform_get_irq(pdev, 1);
1454 if (db->irq_wake >= 0) {
1455 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1457 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1458 IRQF_SHARED, dev_name(db->dev), ndev);
1460 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1463 /* test to see if irq is really wakeup capable */
1464 ret = irq_set_irq_wake(db->irq_wake, 1);
1466 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1470 irq_set_irq_wake(db->irq_wake, 0);
1471 db->wake_supported = 1;
1476 iosize = resource_size(db->addr_res);
1477 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1480 if (db->addr_req == NULL) {
1481 dev_err(db->dev, "cannot claim address reg area\n");
1486 db->io_addr = ioremap(db->addr_res->start, iosize);
1488 if (db->io_addr == NULL) {
1489 dev_err(db->dev, "failed to ioremap address reg\n");
1494 iosize = resource_size(db->data_res);
1495 db->data_req = request_mem_region(db->data_res->start, iosize,
1498 if (db->data_req == NULL) {
1499 dev_err(db->dev, "cannot claim data reg area\n");
1504 db->io_data = ioremap(db->data_res->start, iosize);
1506 if (db->io_data == NULL) {
1507 dev_err(db->dev, "failed to ioremap data reg\n");
1512 /* fill in parameters for net-dev structure */
1513 ndev->base_addr = (unsigned long)db->io_addr;
1514 ndev->irq = db->irq_res->start;
1516 /* ensure at least we have a default set of IO routines */
1517 dm9000_set_io(db, iosize);
1519 /* check to see if anything is being over-ridden */
1520 if (pdata != NULL) {
1521 /* check to see if the driver wants to over-ride the
1522 * default IO width */
1524 if (pdata->flags & DM9000_PLATF_8BITONLY)
1525 dm9000_set_io(db, 1);
1527 if (pdata->flags & DM9000_PLATF_16BITONLY)
1528 dm9000_set_io(db, 2);
1530 if (pdata->flags & DM9000_PLATF_32BITONLY)
1531 dm9000_set_io(db, 4);
1533 /* check to see if there are any IO routine
1536 if (pdata->inblk != NULL)
1537 db->inblk = pdata->inblk;
1539 if (pdata->outblk != NULL)
1540 db->outblk = pdata->outblk;
1542 if (pdata->dumpblk != NULL)
1543 db->dumpblk = pdata->dumpblk;
1545 db->flags = pdata->flags;
1548 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1549 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1552 /* Fixing bug on dm9000_probe, takeover dm9000_reset(db),
1553 * Need 'NCR_MAC_LBK' bit to indeed stable our DM9000 fifo
1554 * while probe stage.
1557 iow(db, DM9000_NCR, NCR_MAC_LBK | NCR_RST);
1559 /* try multiple times, DM9000 sometimes gets the read wrong */
1560 for (i = 0; i < 8; i++) {
1561 id_val = ior(db, DM9000_VIDL);
1562 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1563 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1564 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1566 if (id_val == DM9000_ID)
1568 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1571 if (id_val != DM9000_ID) {
1572 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1577 /* Identify what type of DM9000 we are working on */
1579 id_val = ior(db, DM9000_CHIPR);
1580 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1584 db->type = TYPE_DM9000A;
1587 db->type = TYPE_DM9000B;
1590 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1591 db->type = TYPE_DM9000E;
1594 /* dm9000a/b are capable of hardware checksum offload */
1595 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1596 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;
1597 ndev->features |= ndev->hw_features;
1600 /* from this point we assume that we have found a DM9000 */
1602 /* driver system function */
1605 ndev->netdev_ops = &dm9000_netdev_ops;
1606 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1607 ndev->ethtool_ops = &dm9000_ethtool_ops;
1609 db->msg_enable = NETIF_MSG_LINK;
1610 db->mii.phy_id_mask = 0x1f;
1611 db->mii.reg_num_mask = 0x1f;
1612 db->mii.force_media = 0;
1613 db->mii.full_duplex = 0;
1615 db->mii.mdio_read = dm9000_phy_read;
1616 db->mii.mdio_write = dm9000_phy_write;
1620 /* try reading the node address from the attached EEPROM */
1621 for (i = 0; i < 6; i += 2)
1622 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1624 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1625 mac_src = "platform data";
1626 memcpy(ndev->dev_addr, pdata->dev_addr, ETH_ALEN);
1629 if (!is_valid_ether_addr(ndev->dev_addr)) {
1630 /* try reading from mac */
1633 for (i = 0; i < 6; i++)
1634 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1637 if (!is_valid_ether_addr(ndev->dev_addr)) {
1638 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1639 "set using ifconfig\n", ndev->name);
1641 eth_hw_addr_random(ndev);
1646 platform_set_drvdata(pdev, ndev);
1647 ret = register_netdev(ndev);
1650 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1651 ndev->name, dm9000_type_to_char(db->type),
1652 db->io_addr, db->io_data, ndev->irq,
1653 ndev->dev_addr, mac_src);
1657 dev_err(db->dev, "not found (%d).\n", ret);
1659 dm9000_release_board(pdev, db);
1666 dm9000_drv_suspend(struct device *dev)
1668 struct platform_device *pdev = to_platform_device(dev);
1669 struct net_device *ndev = platform_get_drvdata(pdev);
1673 db = netdev_priv(ndev);
1676 if (!netif_running(ndev))
1679 netif_device_detach(ndev);
1681 /* only shutdown if not using WoL */
1682 if (!db->wake_state)
1683 dm9000_shutdown(ndev);
1689 dm9000_drv_resume(struct device *dev)
1691 struct platform_device *pdev = to_platform_device(dev);
1692 struct net_device *ndev = platform_get_drvdata(pdev);
1693 board_info_t *db = netdev_priv(ndev);
1696 if (netif_running(ndev)) {
1697 /* reset if we were not in wake mode to ensure if
1698 * the device was powered off it is in a known state */
1699 if (!db->wake_state) {
1701 dm9000_init_dm9000(ndev);
1704 netif_device_attach(ndev);
1712 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1713 .suspend = dm9000_drv_suspend,
1714 .resume = dm9000_drv_resume,
1718 dm9000_drv_remove(struct platform_device *pdev)
1720 struct net_device *ndev = platform_get_drvdata(pdev);
1722 unregister_netdev(ndev);
1723 dm9000_release_board(pdev, netdev_priv(ndev));
1724 free_netdev(ndev); /* free device structure */
1726 dev_dbg(&pdev->dev, "released and freed device\n");
1731 static const struct of_device_id dm9000_of_matches[] = {
1732 { .compatible = "davicom,dm9000", },
1735 MODULE_DEVICE_TABLE(of, dm9000_of_matches);
1738 static struct platform_driver dm9000_driver = {
1741 .owner = THIS_MODULE,
1742 .pm = &dm9000_drv_pm_ops,
1743 .of_match_table = of_match_ptr(dm9000_of_matches),
1745 .probe = dm9000_probe,
1746 .remove = dm9000_drv_remove,
1749 module_platform_driver(dm9000_driver);
1751 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1752 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1753 MODULE_LICENSE("GPL");
1754 MODULE_ALIAS("platform:dm9000");