2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/crc32.h>
31 #include <linux/mii.h>
32 #include <linux/ethtool.h>
33 #include <linux/dm9000.h>
34 #include <linux/delay.h>
35 #include <linux/platform_device.h>
36 #include <linux/irq.h>
37 #include <linux/slab.h>
39 #include <asm/delay.h>
45 /* Board/System/Debug information/definition ---------------- */
47 #define DM9000_PHY 0x40 /* PHY address 0x01 */
49 #define CARDNAME "dm9000"
50 #define DRV_VERSION "1.31"
53 * Transmit timeout, default 5 seconds.
55 static int watchdog = 5000;
56 module_param(watchdog, int, 0400);
57 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
60 * Debug messages level
63 module_param(debug, int, 0644);
64 MODULE_PARM_DESC(debug, "dm9000 debug level (0-4)");
66 /* DM9000 register address locking.
68 * The DM9000 uses an address register to control where data written
69 * to the data register goes. This means that the address register
70 * must be preserved over interrupts or similar calls.
72 * During interrupt and other critical calls, a spinlock is used to
73 * protect the system, but the calls themselves save the address
74 * in the address register in case they are interrupting another
75 * access to the device.
77 * For general accesses a lock is provided so that calls which are
78 * allowed to sleep are serialised so that the address register does
79 * not need to be saved. This lock also serves to serialise access
80 * to the EEPROM and PHY access registers which are shared between
84 /* The driver supports the original DM9000E, and now the two newer
85 * devices, DM9000A and DM9000B.
89 TYPE_DM9000E, /* original DM9000 */
94 /* Structure/enum declaration ------------------------------- */
95 typedef struct board_info {
97 void __iomem *io_addr; /* Register I/O base address */
98 void __iomem *io_data; /* Data I/O address */
103 u16 queue_start_addr;
106 u8 io_mode; /* 0:word, 2:byte */
111 unsigned int in_suspend :1;
112 unsigned int wake_supported :1;
114 enum dm9000_type type;
116 void (*inblk)(void __iomem *port, void *data, int length);
117 void (*outblk)(void __iomem *port, void *data, int length);
118 void (*dumpblk)(void __iomem *port, int length);
120 struct device *dev; /* parent device */
122 struct resource *addr_res; /* resources found */
123 struct resource *data_res;
124 struct resource *addr_req; /* resources requested */
125 struct resource *data_req;
126 struct resource *irq_res;
130 struct mutex addr_lock; /* phy and eeprom access lock */
132 struct delayed_work phy_poll;
133 struct net_device *ndev;
137 struct mii_if_info mii;
146 #define dm9000_dbg(db, lev, msg...) do { \
147 if ((lev) < debug) { \
148 dev_dbg(db->dev, msg); \
152 static inline board_info_t *to_dm9000_board(struct net_device *dev)
154 return netdev_priv(dev);
157 /* DM9000 network board routine ---------------------------- */
160 dm9000_reset(board_info_t * db)
162 dev_dbg(db->dev, "resetting device\n");
165 writeb(DM9000_NCR, db->io_addr);
167 writeb(NCR_RST, db->io_data);
172 * Read a byte from I/O port
175 ior(board_info_t * db, int reg)
177 writeb(reg, db->io_addr);
178 return readb(db->io_data);
182 * Write a byte to I/O port
186 iow(board_info_t * db, int reg, int value)
188 writeb(reg, db->io_addr);
189 writeb(value, db->io_data);
192 /* routines for sending block to chip */
194 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
196 iowrite8_rep(reg, data, count);
199 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
201 iowrite16_rep(reg, data, (count+1) >> 1);
204 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
206 iowrite32_rep(reg, data, (count+3) >> 2);
209 /* input block from chip to memory */
211 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
213 ioread8_rep(reg, data, count);
217 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
219 ioread16_rep(reg, data, (count+1) >> 1);
222 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
224 ioread32_rep(reg, data, (count+3) >> 2);
227 /* dump block from chip to null */
229 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
234 for (i = 0; i < count; i++)
238 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
243 count = (count + 1) >> 1;
245 for (i = 0; i < count; i++)
249 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
254 count = (count + 3) >> 2;
256 for (i = 0; i < count; i++)
262 * select the specified set of io routines to use with the
266 static void dm9000_set_io(struct board_info *db, int byte_width)
268 /* use the size of the data resource to work out what IO
269 * routines we want to use
272 switch (byte_width) {
274 db->dumpblk = dm9000_dumpblk_8bit;
275 db->outblk = dm9000_outblk_8bit;
276 db->inblk = dm9000_inblk_8bit;
281 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
283 db->dumpblk = dm9000_dumpblk_16bit;
284 db->outblk = dm9000_outblk_16bit;
285 db->inblk = dm9000_inblk_16bit;
290 db->dumpblk = dm9000_dumpblk_32bit;
291 db->outblk = dm9000_outblk_32bit;
292 db->inblk = dm9000_inblk_32bit;
297 static void dm9000_schedule_poll(board_info_t *db)
299 if (db->type == TYPE_DM9000E)
300 schedule_delayed_work(&db->phy_poll, HZ * 2);
303 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
305 board_info_t *dm = to_dm9000_board(dev);
307 if (!netif_running(dev))
310 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
314 dm9000_read_locked(board_info_t *db, int reg)
319 spin_lock_irqsave(&db->lock, flags);
321 spin_unlock_irqrestore(&db->lock, flags);
326 static int dm9000_wait_eeprom(board_info_t *db)
329 int timeout = 8; /* wait max 8msec */
331 /* The DM9000 data sheets say we should be able to
332 * poll the ERRE bit in EPCR to wait for the EEPROM
333 * operation. From testing several chips, this bit
334 * does not seem to work.
336 * We attempt to use the bit, but fall back to the
337 * timeout (which is why we do not return an error
338 * on expiry) to say that the EEPROM operation has
343 status = dm9000_read_locked(db, DM9000_EPCR);
345 if ((status & EPCR_ERRE) == 0)
351 dev_dbg(db->dev, "timeout waiting EEPROM\n");
360 * Read a word data from EEPROM
363 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
367 if (db->flags & DM9000_PLATF_NO_EEPROM) {
373 mutex_lock(&db->addr_lock);
375 spin_lock_irqsave(&db->lock, flags);
377 iow(db, DM9000_EPAR, offset);
378 iow(db, DM9000_EPCR, EPCR_ERPRR);
380 spin_unlock_irqrestore(&db->lock, flags);
382 dm9000_wait_eeprom(db);
384 /* delay for at-least 150uS */
387 spin_lock_irqsave(&db->lock, flags);
389 iow(db, DM9000_EPCR, 0x0);
391 to[0] = ior(db, DM9000_EPDRL);
392 to[1] = ior(db, DM9000_EPDRH);
394 spin_unlock_irqrestore(&db->lock, flags);
396 mutex_unlock(&db->addr_lock);
400 * Write a word data to SROM
403 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
407 if (db->flags & DM9000_PLATF_NO_EEPROM)
410 mutex_lock(&db->addr_lock);
412 spin_lock_irqsave(&db->lock, flags);
413 iow(db, DM9000_EPAR, offset);
414 iow(db, DM9000_EPDRH, data[1]);
415 iow(db, DM9000_EPDRL, data[0]);
416 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
417 spin_unlock_irqrestore(&db->lock, flags);
419 dm9000_wait_eeprom(db);
421 mdelay(1); /* wait at least 150uS to clear */
423 spin_lock_irqsave(&db->lock, flags);
424 iow(db, DM9000_EPCR, 0);
425 spin_unlock_irqrestore(&db->lock, flags);
427 mutex_unlock(&db->addr_lock);
432 static void dm9000_get_drvinfo(struct net_device *dev,
433 struct ethtool_drvinfo *info)
435 board_info_t *dm = to_dm9000_board(dev);
437 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
438 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
439 strlcpy(info->bus_info, to_platform_device(dm->dev)->name,
440 sizeof(info->bus_info));
443 static u32 dm9000_get_msglevel(struct net_device *dev)
445 board_info_t *dm = to_dm9000_board(dev);
447 return dm->msg_enable;
450 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
452 board_info_t *dm = to_dm9000_board(dev);
454 dm->msg_enable = value;
457 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
459 board_info_t *dm = to_dm9000_board(dev);
461 mii_ethtool_gset(&dm->mii, cmd);
465 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
467 board_info_t *dm = to_dm9000_board(dev);
469 return mii_ethtool_sset(&dm->mii, cmd);
472 static int dm9000_nway_reset(struct net_device *dev)
474 board_info_t *dm = to_dm9000_board(dev);
475 return mii_nway_restart(&dm->mii);
478 static int dm9000_set_features(struct net_device *dev,
479 netdev_features_t features)
481 board_info_t *dm = to_dm9000_board(dev);
482 netdev_features_t changed = dev->features ^ features;
485 if (!(changed & NETIF_F_RXCSUM))
488 spin_lock_irqsave(&dm->lock, flags);
489 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
490 spin_unlock_irqrestore(&dm->lock, flags);
495 static u32 dm9000_get_link(struct net_device *dev)
497 board_info_t *dm = to_dm9000_board(dev);
500 if (dm->flags & DM9000_PLATF_EXT_PHY)
501 ret = mii_link_ok(&dm->mii);
503 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
508 #define DM_EEPROM_MAGIC (0x444D394B)
510 static int dm9000_get_eeprom_len(struct net_device *dev)
515 static int dm9000_get_eeprom(struct net_device *dev,
516 struct ethtool_eeprom *ee, u8 *data)
518 board_info_t *dm = to_dm9000_board(dev);
519 int offset = ee->offset;
523 /* EEPROM access is aligned to two bytes */
525 if ((len & 1) != 0 || (offset & 1) != 0)
528 if (dm->flags & DM9000_PLATF_NO_EEPROM)
531 ee->magic = DM_EEPROM_MAGIC;
533 for (i = 0; i < len; i += 2)
534 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
539 static int dm9000_set_eeprom(struct net_device *dev,
540 struct ethtool_eeprom *ee, u8 *data)
542 board_info_t *dm = to_dm9000_board(dev);
543 int offset = ee->offset;
547 /* EEPROM access is aligned to two bytes */
549 if (dm->flags & DM9000_PLATF_NO_EEPROM)
552 if (ee->magic != DM_EEPROM_MAGIC)
556 if (len & 1 || offset & 1) {
557 int which = offset & 1;
560 dm9000_read_eeprom(dm, offset / 2, tmp);
562 dm9000_write_eeprom(dm, offset / 2, tmp);
566 dm9000_write_eeprom(dm, offset / 2, data);
578 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
580 board_info_t *dm = to_dm9000_board(dev);
582 memset(w, 0, sizeof(struct ethtool_wolinfo));
584 /* note, we could probably support wake-phy too */
585 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
586 w->wolopts = dm->wake_state;
589 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
591 board_info_t *dm = to_dm9000_board(dev);
593 u32 opts = w->wolopts;
596 if (!dm->wake_supported)
599 if (opts & ~WAKE_MAGIC)
602 if (opts & WAKE_MAGIC)
605 mutex_lock(&dm->addr_lock);
607 spin_lock_irqsave(&dm->lock, flags);
608 iow(dm, DM9000_WCR, wcr);
609 spin_unlock_irqrestore(&dm->lock, flags);
611 mutex_unlock(&dm->addr_lock);
613 if (dm->wake_state != opts) {
614 /* change in wol state, update IRQ state */
617 irq_set_irq_wake(dm->irq_wake, 1);
618 else if (dm->wake_state && !opts)
619 irq_set_irq_wake(dm->irq_wake, 0);
622 dm->wake_state = opts;
626 static const struct ethtool_ops dm9000_ethtool_ops = {
627 .get_drvinfo = dm9000_get_drvinfo,
628 .get_settings = dm9000_get_settings,
629 .set_settings = dm9000_set_settings,
630 .get_msglevel = dm9000_get_msglevel,
631 .set_msglevel = dm9000_set_msglevel,
632 .nway_reset = dm9000_nway_reset,
633 .get_link = dm9000_get_link,
634 .get_wol = dm9000_get_wol,
635 .set_wol = dm9000_set_wol,
636 .get_eeprom_len = dm9000_get_eeprom_len,
637 .get_eeprom = dm9000_get_eeprom,
638 .set_eeprom = dm9000_set_eeprom,
641 static void dm9000_show_carrier(board_info_t *db,
642 unsigned carrier, unsigned nsr)
644 struct net_device *ndev = db->ndev;
645 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
648 dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n",
649 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
650 (ncr & NCR_FDX) ? "full" : "half");
652 dev_info(db->dev, "%s: link down\n", ndev->name);
656 dm9000_poll_work(struct work_struct *w)
658 struct delayed_work *dw = to_delayed_work(w);
659 board_info_t *db = container_of(dw, board_info_t, phy_poll);
660 struct net_device *ndev = db->ndev;
662 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
663 !(db->flags & DM9000_PLATF_EXT_PHY)) {
664 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
665 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
666 unsigned new_carrier;
668 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
670 if (old_carrier != new_carrier) {
671 if (netif_msg_link(db))
672 dm9000_show_carrier(db, new_carrier, nsr);
675 netif_carrier_off(ndev);
677 netif_carrier_on(ndev);
680 mii_check_media(&db->mii, netif_msg_link(db), 0);
682 if (netif_running(ndev))
683 dm9000_schedule_poll(db);
686 /* dm9000_release_board
688 * release a board, and any mapped resources
692 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
694 /* unmap our resources */
696 iounmap(db->io_addr);
697 iounmap(db->io_data);
699 /* release the resources */
701 release_resource(db->data_req);
704 release_resource(db->addr_req);
708 static unsigned char dm9000_type_to_char(enum dm9000_type type)
711 case TYPE_DM9000E: return 'e';
712 case TYPE_DM9000A: return 'a';
713 case TYPE_DM9000B: return 'b';
720 * Set DM9000 multicast address
723 dm9000_hash_table_unlocked(struct net_device *dev)
725 board_info_t *db = netdev_priv(dev);
726 struct netdev_hw_addr *ha;
730 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
732 dm9000_dbg(db, 1, "entering %s\n", __func__);
734 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
735 iow(db, oft, dev->dev_addr[i]);
737 /* Clear Hash Table */
738 for (i = 0; i < 4; i++)
741 /* broadcast address */
742 hash_table[3] = 0x8000;
744 if (dev->flags & IFF_PROMISC)
747 if (dev->flags & IFF_ALLMULTI)
750 /* the multicast address in Hash Table : 64 bits */
751 netdev_for_each_mc_addr(ha, dev) {
752 hash_val = ether_crc_le(6, ha->addr) & 0x3f;
753 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
756 /* Write the hash table to MAC MD table */
757 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
758 iow(db, oft++, hash_table[i]);
759 iow(db, oft++, hash_table[i] >> 8);
762 iow(db, DM9000_RCR, rcr);
766 dm9000_hash_table(struct net_device *dev)
768 board_info_t *db = netdev_priv(dev);
771 spin_lock_irqsave(&db->lock, flags);
772 dm9000_hash_table_unlocked(dev);
773 spin_unlock_irqrestore(&db->lock, flags);
777 * Initialize dm9000 board
780 dm9000_init_dm9000(struct net_device *dev)
782 board_info_t *db = netdev_priv(dev);
786 dm9000_dbg(db, 1, "entering %s\n", __func__);
789 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
792 if (dev->hw_features & NETIF_F_RXCSUM)
794 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
796 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
798 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
800 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
801 * up dumping the wake events if we disable this. There is already
802 * a wake-mask in DM9000_WCR */
803 if (db->wake_supported)
806 iow(db, DM9000_NCR, ncr);
808 /* Program operating register */
809 iow(db, DM9000_TCR, 0); /* TX Polling clear */
810 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
811 iow(db, DM9000_FCR, 0xff); /* Flow Control */
812 iow(db, DM9000_SMCR, 0); /* Special Mode */
813 /* clear TX status */
814 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
815 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
817 /* Set address filter table */
818 dm9000_hash_table_unlocked(dev);
820 imr = IMR_PAR | IMR_PTM | IMR_PRM;
821 if (db->type != TYPE_DM9000E)
826 /* Enable TX/RX interrupt mask */
827 iow(db, DM9000_IMR, imr);
829 /* Init Driver variable */
831 db->queue_pkt_len = 0;
832 dev->trans_start = jiffies;
835 /* Our watchdog timed out. Called by the networking layer */
836 static void dm9000_timeout(struct net_device *dev)
838 board_info_t *db = netdev_priv(dev);
842 /* Save previous register address */
843 spin_lock_irqsave(&db->lock, flags);
844 reg_save = readb(db->io_addr);
846 netif_stop_queue(dev);
848 dm9000_init_dm9000(dev);
849 /* We can accept TX packets again */
850 dev->trans_start = jiffies; /* prevent tx timeout */
851 netif_wake_queue(dev);
853 /* Restore previous register address */
854 writeb(reg_save, db->io_addr);
855 spin_unlock_irqrestore(&db->lock, flags);
858 static void dm9000_send_packet(struct net_device *dev,
862 board_info_t *dm = to_dm9000_board(dev);
864 /* The DM9000 is not smart enough to leave fragmented packets alone. */
865 if (dm->ip_summed != ip_summed) {
866 if (ip_summed == CHECKSUM_NONE)
867 iow(dm, DM9000_TCCR, 0);
869 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
870 dm->ip_summed = ip_summed;
873 /* Set TX length to DM9000 */
874 iow(dm, DM9000_TXPLL, pkt_len);
875 iow(dm, DM9000_TXPLH, pkt_len >> 8);
877 /* Issue TX polling command */
878 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
882 * Hardware start transmission.
883 * Send a packet to media from the upper layer.
886 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
889 board_info_t *db = netdev_priv(dev);
891 dm9000_dbg(db, 3, "%s:\n", __func__);
893 if (db->tx_pkt_cnt > 1)
894 return NETDEV_TX_BUSY;
896 spin_lock_irqsave(&db->lock, flags);
898 /* Move data to DM9000 TX RAM */
899 writeb(DM9000_MWCMD, db->io_addr);
901 (db->outblk)(db->io_data, skb->data, skb->len);
902 dev->stats.tx_bytes += skb->len;
905 /* TX control: First packet immediately send, second packet queue */
906 if (db->tx_pkt_cnt == 1) {
907 dm9000_send_packet(dev, skb->ip_summed, skb->len);
910 db->queue_pkt_len = skb->len;
911 db->queue_ip_summed = skb->ip_summed;
912 netif_stop_queue(dev);
915 spin_unlock_irqrestore(&db->lock, flags);
924 * DM9000 interrupt handler
925 * receive the packet to upper layer, free the transmitted packet
928 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
930 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
932 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
933 /* One packet sent complete */
935 dev->stats.tx_packets++;
937 if (netif_msg_tx_done(db))
938 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
940 /* Queue packet check & send */
941 if (db->tx_pkt_cnt > 0)
942 dm9000_send_packet(dev, db->queue_ip_summed,
944 netif_wake_queue(dev);
948 struct dm9000_rxhdr {
955 * Received a packet and pass to upper layer
958 dm9000_rx(struct net_device *dev)
960 board_info_t *db = netdev_priv(dev);
961 struct dm9000_rxhdr rxhdr;
967 /* Check packet ready or not */
969 ior(db, DM9000_MRCMDX); /* Dummy read */
971 /* Get most updated data */
972 rxbyte = readb(db->io_data);
974 /* Status check: this byte must be 0 or 1 */
975 if (rxbyte & DM9000_PKT_ERR) {
976 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
977 iow(db, DM9000_RCR, 0x00); /* Stop Device */
978 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
982 if (!(rxbyte & DM9000_PKT_RDY))
985 /* A packet ready now & Get status/length */
987 writeb(DM9000_MRCMD, db->io_addr);
989 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
991 RxLen = le16_to_cpu(rxhdr.RxLen);
993 if (netif_msg_rx_status(db))
994 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
995 rxhdr.RxStatus, RxLen);
997 /* Packet Status check */
1000 if (netif_msg_rx_err(db))
1001 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1004 if (RxLen > DM9000_PKT_MAX) {
1005 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1008 /* rxhdr.RxStatus is identical to RSR register. */
1009 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
1010 RSR_PLE | RSR_RWTO |
1011 RSR_LCS | RSR_RF)) {
1013 if (rxhdr.RxStatus & RSR_FOE) {
1014 if (netif_msg_rx_err(db))
1015 dev_dbg(db->dev, "fifo error\n");
1016 dev->stats.rx_fifo_errors++;
1018 if (rxhdr.RxStatus & RSR_CE) {
1019 if (netif_msg_rx_err(db))
1020 dev_dbg(db->dev, "crc error\n");
1021 dev->stats.rx_crc_errors++;
1023 if (rxhdr.RxStatus & RSR_RF) {
1024 if (netif_msg_rx_err(db))
1025 dev_dbg(db->dev, "length error\n");
1026 dev->stats.rx_length_errors++;
1030 /* Move data from DM9000 */
1032 ((skb = netdev_alloc_skb(dev, RxLen + 4)) != NULL)) {
1033 skb_reserve(skb, 2);
1034 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1036 /* Read received packet from RX SRAM */
1038 (db->inblk)(db->io_data, rdptr, RxLen);
1039 dev->stats.rx_bytes += RxLen;
1041 /* Pass to upper layer */
1042 skb->protocol = eth_type_trans(skb, dev);
1043 if (dev->features & NETIF_F_RXCSUM) {
1044 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1045 skb->ip_summed = CHECKSUM_UNNECESSARY;
1047 skb_checksum_none_assert(skb);
1050 dev->stats.rx_packets++;
1053 /* need to dump the packet's data */
1055 (db->dumpblk)(db->io_data, RxLen);
1057 } while (rxbyte & DM9000_PKT_RDY);
1060 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1062 struct net_device *dev = dev_id;
1063 board_info_t *db = netdev_priv(dev);
1065 unsigned long flags;
1068 dm9000_dbg(db, 3, "entering %s\n", __func__);
1070 /* A real interrupt coming */
1072 /* holders of db->lock must always block IRQs */
1073 spin_lock_irqsave(&db->lock, flags);
1075 /* Save previous register address */
1076 reg_save = readb(db->io_addr);
1078 /* Disable all interrupts */
1079 iow(db, DM9000_IMR, IMR_PAR);
1081 /* Got DM9000 interrupt status */
1082 int_status = ior(db, DM9000_ISR); /* Got ISR */
1083 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1085 if (netif_msg_intr(db))
1086 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1088 /* Received the coming packet */
1089 if (int_status & ISR_PRS)
1092 /* Trnasmit Interrupt check */
1093 if (int_status & ISR_PTS)
1094 dm9000_tx_done(dev, db);
1096 if (db->type != TYPE_DM9000E) {
1097 if (int_status & ISR_LNKCHNG) {
1098 /* fire a link-change request */
1099 schedule_delayed_work(&db->phy_poll, 1);
1103 /* Re-enable interrupt mask */
1104 iow(db, DM9000_IMR, db->imr_all);
1106 /* Restore previous register address */
1107 writeb(reg_save, db->io_addr);
1109 spin_unlock_irqrestore(&db->lock, flags);
1114 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1116 struct net_device *dev = dev_id;
1117 board_info_t *db = netdev_priv(dev);
1118 unsigned long flags;
1121 spin_lock_irqsave(&db->lock, flags);
1123 nsr = ior(db, DM9000_NSR);
1124 wcr = ior(db, DM9000_WCR);
1126 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1128 if (nsr & NSR_WAKEST) {
1129 /* clear, so we can avoid */
1130 iow(db, DM9000_NSR, NSR_WAKEST);
1132 if (wcr & WCR_LINKST)
1133 dev_info(db->dev, "wake by link status change\n");
1134 if (wcr & WCR_SAMPLEST)
1135 dev_info(db->dev, "wake by sample packet\n");
1136 if (wcr & WCR_MAGICST )
1137 dev_info(db->dev, "wake by magic packet\n");
1138 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1139 dev_err(db->dev, "wake signalled with no reason? "
1140 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1144 spin_unlock_irqrestore(&db->lock, flags);
1146 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1149 #ifdef CONFIG_NET_POLL_CONTROLLER
1153 static void dm9000_poll_controller(struct net_device *dev)
1155 disable_irq(dev->irq);
1156 dm9000_interrupt(dev->irq, dev);
1157 enable_irq(dev->irq);
1162 * Open the interface.
1163 * The interface is opened whenever "ifconfig" actives it.
1166 dm9000_open(struct net_device *dev)
1168 board_info_t *db = netdev_priv(dev);
1169 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1171 if (netif_msg_ifup(db))
1172 dev_dbg(db->dev, "enabling %s\n", dev->name);
1174 /* If there is no IRQ type specified, default to something that
1175 * may work, and tell the user that this is a problem */
1177 if (irqflags == IRQF_TRIGGER_NONE)
1178 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1180 irqflags |= IRQF_SHARED;
1182 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1183 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1184 mdelay(1); /* delay needs by DM9000B */
1186 /* Initialize DM9000 board */
1188 dm9000_init_dm9000(dev);
1190 if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
1193 /* Init driver variable */
1196 mii_check_media(&db->mii, netif_msg_link(db), 1);
1197 netif_start_queue(dev);
1199 dm9000_schedule_poll(db);
1205 * Sleep, either by using msleep() or if we are suspending, then
1206 * use mdelay() to sleep.
1208 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1217 * Read a word from phyxcer
1220 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1222 board_info_t *db = netdev_priv(dev);
1223 unsigned long flags;
1224 unsigned int reg_save;
1227 mutex_lock(&db->addr_lock);
1229 spin_lock_irqsave(&db->lock,flags);
1231 /* Save previous register address */
1232 reg_save = readb(db->io_addr);
1234 /* Fill the phyxcer register into REG_0C */
1235 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1237 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); /* Issue phyxcer read command */
1239 writeb(reg_save, db->io_addr);
1240 spin_unlock_irqrestore(&db->lock,flags);
1242 dm9000_msleep(db, 1); /* Wait read complete */
1244 spin_lock_irqsave(&db->lock,flags);
1245 reg_save = readb(db->io_addr);
1247 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1249 /* The read data keeps on REG_0D & REG_0E */
1250 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1252 /* restore the previous address */
1253 writeb(reg_save, db->io_addr);
1254 spin_unlock_irqrestore(&db->lock,flags);
1256 mutex_unlock(&db->addr_lock);
1258 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1263 * Write a word to phyxcer
1266 dm9000_phy_write(struct net_device *dev,
1267 int phyaddr_unused, int reg, int value)
1269 board_info_t *db = netdev_priv(dev);
1270 unsigned long flags;
1271 unsigned long reg_save;
1273 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1274 mutex_lock(&db->addr_lock);
1276 spin_lock_irqsave(&db->lock,flags);
1278 /* Save previous register address */
1279 reg_save = readb(db->io_addr);
1281 /* Fill the phyxcer register into REG_0C */
1282 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1284 /* Fill the written data into REG_0D & REG_0E */
1285 iow(db, DM9000_EPDRL, value);
1286 iow(db, DM9000_EPDRH, value >> 8);
1288 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); /* Issue phyxcer write command */
1290 writeb(reg_save, db->io_addr);
1291 spin_unlock_irqrestore(&db->lock, flags);
1293 dm9000_msleep(db, 1); /* Wait write complete */
1295 spin_lock_irqsave(&db->lock,flags);
1296 reg_save = readb(db->io_addr);
1298 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1300 /* restore the previous address */
1301 writeb(reg_save, db->io_addr);
1303 spin_unlock_irqrestore(&db->lock, flags);
1304 mutex_unlock(&db->addr_lock);
1308 dm9000_shutdown(struct net_device *dev)
1310 board_info_t *db = netdev_priv(dev);
1313 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1314 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1315 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1316 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1320 * Stop the interface.
1321 * The interface is stopped when it is brought.
1324 dm9000_stop(struct net_device *ndev)
1326 board_info_t *db = netdev_priv(ndev);
1328 if (netif_msg_ifdown(db))
1329 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1331 cancel_delayed_work_sync(&db->phy_poll);
1333 netif_stop_queue(ndev);
1334 netif_carrier_off(ndev);
1336 /* free interrupt */
1337 free_irq(ndev->irq, ndev);
1339 dm9000_shutdown(ndev);
1344 static const struct net_device_ops dm9000_netdev_ops = {
1345 .ndo_open = dm9000_open,
1346 .ndo_stop = dm9000_stop,
1347 .ndo_start_xmit = dm9000_start_xmit,
1348 .ndo_tx_timeout = dm9000_timeout,
1349 .ndo_set_rx_mode = dm9000_hash_table,
1350 .ndo_do_ioctl = dm9000_ioctl,
1351 .ndo_change_mtu = eth_change_mtu,
1352 .ndo_set_features = dm9000_set_features,
1353 .ndo_validate_addr = eth_validate_addr,
1354 .ndo_set_mac_address = eth_mac_addr,
1355 #ifdef CONFIG_NET_POLL_CONTROLLER
1356 .ndo_poll_controller = dm9000_poll_controller,
1361 * Search DM9000 board, allocate space and register it
1364 dm9000_probe(struct platform_device *pdev)
1366 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1367 struct board_info *db; /* Point a board information structure */
1368 struct net_device *ndev;
1369 const unsigned char *mac_src;
1375 /* Init network device */
1376 ndev = alloc_etherdev(sizeof(struct board_info));
1380 SET_NETDEV_DEV(ndev, &pdev->dev);
1382 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1384 /* setup board info structure */
1385 db = netdev_priv(ndev);
1387 db->dev = &pdev->dev;
1390 spin_lock_init(&db->lock);
1391 mutex_init(&db->addr_lock);
1393 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1395 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1396 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1397 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1399 if (db->addr_res == NULL || db->data_res == NULL ||
1400 db->irq_res == NULL) {
1401 dev_err(db->dev, "insufficient resources\n");
1406 db->irq_wake = platform_get_irq(pdev, 1);
1407 if (db->irq_wake >= 0) {
1408 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1410 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1411 IRQF_SHARED, dev_name(db->dev), ndev);
1413 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1416 /* test to see if irq is really wakeup capable */
1417 ret = irq_set_irq_wake(db->irq_wake, 1);
1419 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1423 irq_set_irq_wake(db->irq_wake, 0);
1424 db->wake_supported = 1;
1429 iosize = resource_size(db->addr_res);
1430 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1433 if (db->addr_req == NULL) {
1434 dev_err(db->dev, "cannot claim address reg area\n");
1439 db->io_addr = ioremap(db->addr_res->start, iosize);
1441 if (db->io_addr == NULL) {
1442 dev_err(db->dev, "failed to ioremap address reg\n");
1447 iosize = resource_size(db->data_res);
1448 db->data_req = request_mem_region(db->data_res->start, iosize,
1451 if (db->data_req == NULL) {
1452 dev_err(db->dev, "cannot claim data reg area\n");
1457 db->io_data = ioremap(db->data_res->start, iosize);
1459 if (db->io_data == NULL) {
1460 dev_err(db->dev, "failed to ioremap data reg\n");
1465 /* fill in parameters for net-dev structure */
1466 ndev->base_addr = (unsigned long)db->io_addr;
1467 ndev->irq = db->irq_res->start;
1469 /* ensure at least we have a default set of IO routines */
1470 dm9000_set_io(db, iosize);
1472 /* check to see if anything is being over-ridden */
1473 if (pdata != NULL) {
1474 /* check to see if the driver wants to over-ride the
1475 * default IO width */
1477 if (pdata->flags & DM9000_PLATF_8BITONLY)
1478 dm9000_set_io(db, 1);
1480 if (pdata->flags & DM9000_PLATF_16BITONLY)
1481 dm9000_set_io(db, 2);
1483 if (pdata->flags & DM9000_PLATF_32BITONLY)
1484 dm9000_set_io(db, 4);
1486 /* check to see if there are any IO routine
1489 if (pdata->inblk != NULL)
1490 db->inblk = pdata->inblk;
1492 if (pdata->outblk != NULL)
1493 db->outblk = pdata->outblk;
1495 if (pdata->dumpblk != NULL)
1496 db->dumpblk = pdata->dumpblk;
1498 db->flags = pdata->flags;
1501 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1502 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1507 /* try multiple times, DM9000 sometimes gets the read wrong */
1508 for (i = 0; i < 8; i++) {
1509 id_val = ior(db, DM9000_VIDL);
1510 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1511 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1512 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1514 if (id_val == DM9000_ID)
1516 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1519 if (id_val != DM9000_ID) {
1520 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1525 /* Identify what type of DM9000 we are working on */
1527 id_val = ior(db, DM9000_CHIPR);
1528 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1532 db->type = TYPE_DM9000A;
1535 db->type = TYPE_DM9000B;
1538 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1539 db->type = TYPE_DM9000E;
1542 /* dm9000a/b are capable of hardware checksum offload */
1543 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1544 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;
1545 ndev->features |= ndev->hw_features;
1548 /* from this point we assume that we have found a DM9000 */
1550 /* driver system function */
1553 ndev->netdev_ops = &dm9000_netdev_ops;
1554 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1555 ndev->ethtool_ops = &dm9000_ethtool_ops;
1557 db->msg_enable = NETIF_MSG_LINK;
1558 db->mii.phy_id_mask = 0x1f;
1559 db->mii.reg_num_mask = 0x1f;
1560 db->mii.force_media = 0;
1561 db->mii.full_duplex = 0;
1563 db->mii.mdio_read = dm9000_phy_read;
1564 db->mii.mdio_write = dm9000_phy_write;
1568 /* try reading the node address from the attached EEPROM */
1569 for (i = 0; i < 6; i += 2)
1570 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1572 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1573 mac_src = "platform data";
1574 memcpy(ndev->dev_addr, pdata->dev_addr, 6);
1577 if (!is_valid_ether_addr(ndev->dev_addr)) {
1578 /* try reading from mac */
1581 for (i = 0; i < 6; i++)
1582 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1585 if (!is_valid_ether_addr(ndev->dev_addr)) {
1586 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1587 "set using ifconfig\n", ndev->name);
1589 eth_hw_addr_random(ndev);
1594 platform_set_drvdata(pdev, ndev);
1595 ret = register_netdev(ndev);
1598 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1599 ndev->name, dm9000_type_to_char(db->type),
1600 db->io_addr, db->io_data, ndev->irq,
1601 ndev->dev_addr, mac_src);
1605 dev_err(db->dev, "not found (%d).\n", ret);
1607 dm9000_release_board(pdev, db);
1614 dm9000_drv_suspend(struct device *dev)
1616 struct platform_device *pdev = to_platform_device(dev);
1617 struct net_device *ndev = platform_get_drvdata(pdev);
1621 db = netdev_priv(ndev);
1624 if (!netif_running(ndev))
1627 netif_device_detach(ndev);
1629 /* only shutdown if not using WoL */
1630 if (!db->wake_state)
1631 dm9000_shutdown(ndev);
1637 dm9000_drv_resume(struct device *dev)
1639 struct platform_device *pdev = to_platform_device(dev);
1640 struct net_device *ndev = platform_get_drvdata(pdev);
1641 board_info_t *db = netdev_priv(ndev);
1644 if (netif_running(ndev)) {
1645 /* reset if we were not in wake mode to ensure if
1646 * the device was powered off it is in a known state */
1647 if (!db->wake_state) {
1649 dm9000_init_dm9000(ndev);
1652 netif_device_attach(ndev);
1660 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1661 .suspend = dm9000_drv_suspend,
1662 .resume = dm9000_drv_resume,
1666 dm9000_drv_remove(struct platform_device *pdev)
1668 struct net_device *ndev = platform_get_drvdata(pdev);
1670 platform_set_drvdata(pdev, NULL);
1672 unregister_netdev(ndev);
1673 dm9000_release_board(pdev, netdev_priv(ndev));
1674 free_netdev(ndev); /* free device structure */
1676 dev_dbg(&pdev->dev, "released and freed device\n");
1680 static struct platform_driver dm9000_driver = {
1683 .owner = THIS_MODULE,
1684 .pm = &dm9000_drv_pm_ops,
1686 .probe = dm9000_probe,
1687 .remove = dm9000_drv_remove,
1693 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1695 return platform_driver_register(&dm9000_driver);
1699 dm9000_cleanup(void)
1701 platform_driver_unregister(&dm9000_driver);
1704 module_init(dm9000_init);
1705 module_exit(dm9000_cleanup);
1707 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1708 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1709 MODULE_LICENSE("GPL");
1710 MODULE_ALIAS("platform:dm9000");