2 * Copyright (C) 2005 - 2013 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
27 #include <linux/if_vlan.h>
28 #include <linux/workqueue.h>
29 #include <linux/interrupt.h>
30 #include <linux/firmware.h>
31 #include <linux/slab.h>
32 #include <linux/u64_stats_sync.h>
37 #define DRV_VER "4.6.62.0u"
38 #define DRV_NAME "be2net"
39 #define BE_NAME "Emulex BladeEngine2"
40 #define BE3_NAME "Emulex BladeEngine3"
41 #define OC_NAME "Emulex OneConnect"
42 #define OC_NAME_BE OC_NAME "(be3)"
43 #define OC_NAME_LANCER OC_NAME "(Lancer)"
44 #define OC_NAME_SH OC_NAME "(Skyhawk)"
45 #define DRV_DESC "Emulex OneConnect 10Gbps NIC Driver"
47 #define BE_VENDOR_ID 0x19a2
48 #define EMULEX_VENDOR_ID 0x10df
49 #define BE_DEVICE_ID1 0x211
50 #define BE_DEVICE_ID2 0x221
51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */
56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */
57 #define OC_SUBSYS_DEVICE_ID1 0xE602
58 #define OC_SUBSYS_DEVICE_ID2 0xE642
59 #define OC_SUBSYS_DEVICE_ID3 0xE612
60 #define OC_SUBSYS_DEVICE_ID4 0xE652
62 static inline char *nic_name(struct pci_dev *pdev)
64 switch (pdev->device) {
71 return OC_NAME_LANCER;
82 /* Number of bytes of an RX frame that are copied to skb->data */
83 #define BE_HDR_LEN ((u16) 64)
84 /* allocate extra space to allow tunneling decapsulation without head reallocation */
85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
87 #define BE_MAX_JUMBO_FRAME_SIZE 9018
88 #define BE_MIN_MTU 256
90 #define BE_NUM_VLANS_SUPPORTED 64
91 #define BE_MAX_EQD 96u
92 #define BE_MAX_TX_FRAG_COUNT 30
94 #define EVNT_Q_LEN 1024
96 #define TX_CQ_LEN 1024
97 #define RX_Q_LEN 1024 /* Does not support any other value */
98 #define RX_CQ_LEN 1024
99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
100 #define MCC_CQ_LEN 256
102 #define BE3_MAX_RSS_QS 8
103 #define BE2_MAX_RSS_QS 4
104 #define MAX_RSS_QS BE3_MAX_RSS_QS
105 #define MAX_RX_QS (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
108 #define MAX_ROCE_EQS 5
109 #define MAX_MSIX_VECTORS (MAX_RSS_QS + MAX_ROCE_EQS) /* RSS qs + RoCE */
110 #define BE_TX_BUDGET 256
111 #define BE_NAPI_WEIGHT 64
112 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
113 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
115 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */
116 #define FW_VER_LEN 32
124 struct be_queue_info {
125 struct be_dma_mem dma_mem;
127 u16 entry_size; /* Size of an element in the queue */
131 atomic_t used; /* Number of valid elements in the queue */
134 static inline u32 MODULO(u16 val, u16 limit)
136 BUG_ON(limit & (limit - 1));
137 return val & (limit - 1);
140 static inline void index_adv(u16 *index, u16 val, u16 limit)
142 *index = MODULO((*index + val), limit);
145 static inline void index_inc(u16 *index, u16 limit)
147 *index = MODULO((*index + 1), limit);
150 static inline void *queue_head_node(struct be_queue_info *q)
152 return q->dma_mem.va + q->head * q->entry_size;
155 static inline void *queue_tail_node(struct be_queue_info *q)
157 return q->dma_mem.va + q->tail * q->entry_size;
160 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
162 return q->dma_mem.va + index * q->entry_size;
165 static inline void queue_head_inc(struct be_queue_info *q)
167 index_inc(&q->head, q->len);
170 static inline void index_dec(u16 *index, u16 limit)
172 *index = MODULO((*index - 1), limit);
175 static inline void queue_tail_inc(struct be_queue_info *q)
177 index_inc(&q->tail, q->len);
181 struct be_queue_info q;
184 /* Adaptive interrupt coalescing (AIC) info */
186 u32 min_eqd; /* in usecs */
187 u32 max_eqd; /* in usecs */
188 u32 eqd; /* configured val when aic is off */
189 u32 cur_eqd; /* in usecs */
191 u8 idx; /* array index */
194 struct napi_struct napi;
195 struct be_adapter *adapter;
196 } ____cacheline_aligned_in_smp;
199 struct be_queue_info q;
200 struct be_queue_info cq;
212 struct u64_stats_sync sync;
213 struct u64_stats_sync sync_compl;
218 struct be_queue_info q;
219 struct be_queue_info cq;
220 /* Remember the skbs that were transmitted */
221 struct sk_buff *sent_skb_list[TX_Q_LEN];
222 struct be_tx_stats stats;
223 } ____cacheline_aligned_in_smp;
225 /* Struct to remember the pages posted for rx frags */
226 struct be_rx_page_info {
228 DEFINE_DMA_UNMAP_ADDR(bus);
238 u32 rx_drops_no_skbs; /* skb allocation errors */
239 u32 rx_drops_no_frags; /* HW has no fetched frags */
240 u32 rx_post_fail; /* page post alloc failures */
243 u32 rx_compl_err; /* completions with err set */
244 u32 rx_pps; /* pkts per second */
245 struct u64_stats_sync sync;
248 struct be_rx_compl_info {
268 struct be_adapter *adapter;
269 struct be_queue_info q;
270 struct be_queue_info cq;
271 struct be_rx_compl_info rxcp;
272 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
273 struct be_rx_stats stats;
275 bool rx_post_starved; /* Zero rx frags have been posted to BE */
276 } ____cacheline_aligned_in_smp;
278 struct be_drv_stats {
279 u32 be_on_die_temperature;
281 u32 rx_drops_no_pbuf;
282 u32 rx_drops_no_txpb;
283 u32 rx_drops_no_erx_descr;
284 u32 rx_drops_no_tpre_descr;
285 u32 rx_drops_too_many_frags;
286 u32 forwarded_packets;
289 u32 rx_alignment_symbol_errors;
291 u32 rx_priority_pause_frames;
292 u32 rx_control_frames;
293 u32 rx_in_range_errors;
294 u32 rx_out_range_errors;
295 u32 rx_frame_too_long;
296 u32 rx_address_filtered;
297 u32 rx_dropped_too_small;
298 u32 rx_dropped_too_short;
299 u32 rx_dropped_header_too_small;
300 u32 rx_dropped_tcp_length;
302 u32 rx_ip_checksum_errs;
303 u32 rx_tcp_checksum_errs;
304 u32 rx_udp_checksum_errs;
306 u32 tx_priority_pauseframes;
307 u32 tx_controlframes;
308 u32 rxpp_fifo_overflow_drop;
309 u32 rx_input_fifo_overflow_drop;
310 u32 pmem_fifo_overflow_drop;
315 unsigned char mac_addr[ETH_ALEN];
328 #define BE_FLAGS_LINK_STATUS_INIT 1
329 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3)
330 #define BE_UC_PMAC_COUNT 30
331 #define BE_VF_UC_PMAC_COUNT 2
332 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
342 u16 auto_speeds_supported;
343 u16 fixed_speeds_supported;
351 struct pci_dev *pdev;
352 struct net_device *netdev;
354 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
355 u8 __iomem *db; /* Door Bell */
357 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
358 struct be_dma_mem mbox_mem;
359 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
360 * is stored for freeing purpose */
361 struct be_dma_mem mbox_mem_alloced;
363 struct be_mcc_obj mcc_obj;
364 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
365 spinlock_t mcc_cq_lock;
369 struct be_eq_obj eq_obj[MAX_MSIX_VECTORS];
370 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
375 struct be_tx_obj tx_obj[MAX_TX_QS];
379 struct be_rx_obj rx_obj[MAX_RX_QS];
380 u32 big_page_size; /* Compounded page size shared by rx wrbs */
382 struct be_drv_stats drv_stats;
384 u8 vlan_tag[VLAN_N_VID];
385 u8 vlan_prio_bmap; /* Available Priority BitMap */
386 u16 recommended_prio; /* Recommended Priority */
387 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
389 struct be_dma_mem stats_cmd;
390 /* Work queue used to perform periodic tasks like getting statistics */
391 struct delayed_work work;
394 struct delayed_work func_recovery_work;
397 /* Ethtool knobs and info */
398 char fw_ver[FW_VER_LEN];
399 int if_handle; /* Used to configure filtering */
400 u32 *pmac_id; /* MAC addr handle used by BE card */
401 u32 beacon_state; /* for set_phys_id */
411 u32 rx_fc; /* Rx flow control */
412 u32 tx_fc; /* Tx flow control */
420 u32 num_msix_roce_vec;
421 struct ocrdma_dev *ocrdma_dev;
422 struct list_head entry;
425 struct completion flash_compl;
427 u32 num_vfs; /* Number of VFs provisioned by PF driver */
428 u32 dev_num_vfs; /* Number of VFs supported by HW */
430 struct be_vf_cfg *vf_cfg;
438 u32 uc_macs; /* Count of secondary UC MAC programmed */
442 int be_get_temp_freq;
449 u16 max_event_queues;
455 #define be_physfn(adapter) (!adapter->virtfn)
456 #define sriov_enabled(adapter) (adapter->num_vfs > 0)
457 #define sriov_want(adapter) (adapter->dev_num_vfs && num_vfs && \
459 #define for_all_vfs(adapter, vf_cfg, i) \
460 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
466 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \
467 adapter->pdev->device == OC_DEVICE_ID4)
469 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \
470 adapter->pdev->device == OC_DEVICE_ID6)
472 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \
473 adapter->pdev->device == OC_DEVICE_ID2)
475 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \
476 adapter->pdev->device == OC_DEVICE_ID1)
478 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter))
480 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \
481 (adapter->function_mode & RDMA_ENABLED))
483 extern const struct ethtool_ops be_ethtool_ops;
485 #define msix_enabled(adapter) (adapter->num_msix_vec > 0)
486 #define num_irqs(adapter) (msix_enabled(adapter) ? \
487 adapter->num_msix_vec : 1)
488 #define tx_stats(txo) (&(txo)->stats)
489 #define rx_stats(rxo) (&(rxo)->stats)
491 /* The default RXQ is the last RXQ */
492 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1])
494 #define for_all_rx_queues(adapter, rxo, i) \
495 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
498 /* Skip the default non-rss queue (last one)*/
499 #define for_all_rss_queues(adapter, rxo, i) \
500 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
503 #define for_all_tx_queues(adapter, txo, i) \
504 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
507 #define for_all_evt_queues(adapter, eqo, i) \
508 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
511 #define is_mcc_eqo(eqo) (eqo->idx == 0)
512 #define mcc_eqo(adapter) (&adapter->eq_obj[0])
514 #define PAGE_SHIFT_4K 12
515 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
517 /* Returns number of pages spanned by the data starting at the given addr */
518 #define PAGES_4K_SPANNED(_address, size) \
519 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
520 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
522 /* Returns bit offset within a DWORD of a bitfield */
523 #define AMAP_BIT_OFFSET(_struct, field) \
524 (((size_t)&(((_struct *)0)->field))%32)
526 /* Returns the bit mask of the field that is NOT shifted into location. */
527 static inline u32 amap_mask(u32 bitsize)
529 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
533 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
535 u32 *dw = (u32 *) ptr + dw_offset;
536 *dw &= ~(mask << offset);
537 *dw |= (mask & value) << offset;
540 #define AMAP_SET_BITS(_struct, field, ptr, val) \
542 offsetof(_struct, field)/32, \
543 amap_mask(sizeof(((_struct *)0)->field)), \
544 AMAP_BIT_OFFSET(_struct, field), \
547 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
549 u32 *dw = (u32 *) ptr;
550 return mask & (*(dw + dw_offset) >> offset);
553 #define AMAP_GET_BITS(_struct, field, ptr) \
555 offsetof(_struct, field)/32, \
556 amap_mask(sizeof(((_struct *)0)->field)), \
557 AMAP_BIT_OFFSET(_struct, field))
559 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
560 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
561 static inline void swap_dws(void *wrb, int len)
567 *dw = cpu_to_le32(*dw);
571 #endif /* __BIG_ENDIAN */
574 static inline u8 is_tcp_pkt(struct sk_buff *skb)
578 if (ip_hdr(skb)->version == 4)
579 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
580 else if (ip_hdr(skb)->version == 6)
581 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
586 static inline u8 is_udp_pkt(struct sk_buff *skb)
590 if (ip_hdr(skb)->version == 4)
591 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
592 else if (ip_hdr(skb)->version == 6)
593 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
598 static inline bool is_ipv4_pkt(struct sk_buff *skb)
600 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
603 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
607 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
609 mac[5] = (u8)(addr & 0xFF);
610 mac[4] = (u8)((addr >> 8) & 0xFF);
611 mac[3] = (u8)((addr >> 16) & 0xFF);
612 /* Use the OUI from the current MAC address */
613 memcpy(mac, adapter->netdev->dev_addr, 3);
616 static inline bool be_multi_rxq(const struct be_adapter *adapter)
618 return adapter->num_rx_qs > 1;
621 static inline bool be_error(struct be_adapter *adapter)
623 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
626 static inline bool be_hw_error(struct be_adapter *adapter)
628 return adapter->eeh_error || adapter->hw_error;
631 static inline void be_clear_all_error(struct be_adapter *adapter)
633 adapter->eeh_error = false;
634 adapter->hw_error = false;
635 adapter->fw_timeout = false;
638 static inline bool be_is_wol_excluded(struct be_adapter *adapter)
640 struct pci_dev *pdev = adapter->pdev;
642 if (!be_physfn(adapter))
645 switch (pdev->subsystem_device) {
646 case OC_SUBSYS_DEVICE_ID1:
647 case OC_SUBSYS_DEVICE_ID2:
648 case OC_SUBSYS_DEVICE_ID3:
649 case OC_SUBSYS_DEVICE_ID4:
656 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
658 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
661 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
663 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);
664 extern void be_parse_stats(struct be_adapter *adapter);
665 extern int be_load_fw(struct be_adapter *adapter, u8 *func);
666 extern bool be_is_wol_supported(struct be_adapter *adapter);
667 extern bool be_pause_supported(struct be_adapter *adapter);
668 extern u32 be_get_fw_log_level(struct be_adapter *adapter);
671 * internal function to initialize-cleanup roce device.
673 extern void be_roce_dev_add(struct be_adapter *);
674 extern void be_roce_dev_remove(struct be_adapter *);
677 * internal function to open-close roce device during ifup-ifdown.
679 extern void be_roce_dev_open(struct be_adapter *);
680 extern void be_roce_dev_close(struct be_adapter *);