drivers/net/ethernet/emulex/benet/be_cmds.c

   1 /*
   2  * Copyright (C) 2005 - 2013 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 #include <linux/module.h>
  19 #include "be.h"
  20 #include "be_cmds.h"
  21
  22 static struct be_cmd_priv_map cmd_priv_map[] = {
  23         {
  24                 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG,
  25                 CMD_SUBSYSTEM_ETH,
  26                 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
  27                 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
  28         },
  29         {
  30                 OPCODE_COMMON_GET_FLOW_CONTROL,
  31                 CMD_SUBSYSTEM_COMMON,
  32                 BE_PRIV_LNKQUERY | BE_PRIV_VHADM |
  33                 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
  34         },
  35         {
  36                 OPCODE_COMMON_SET_FLOW_CONTROL,
  37                 CMD_SUBSYSTEM_COMMON,
  38                 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
  39                 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
  40         },
  41         {
  42                 OPCODE_ETH_GET_PPORT_STATS,
  43                 CMD_SUBSYSTEM_ETH,
  44                 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
  45                 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
  46         },
  47         {
  48                 OPCODE_COMMON_GET_PHY_DETAILS,
  49                 CMD_SUBSYSTEM_COMMON,
  50                 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
  51                 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
  52         }
  53 };
  54
  55 static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode,
  56                            u8 subsystem)
  57 {
  58         int i;
  59         int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map);
  60         u32 cmd_privileges = adapter->cmd_privileges;
  61
  62         for (i = 0; i < num_entries; i++)
  63                 if (opcode == cmd_priv_map[i].opcode &&
  64                     subsystem == cmd_priv_map[i].subsystem)
  65                         if (!(cmd_privileges & cmd_priv_map[i].priv_mask))
  66                                 return false;
  67
  68         return true;
  69 }
  70
  71 static inline void *embedded_payload(struct be_mcc_wrb *wrb)
  72 {
  73         return wrb->payload.embedded_payload;
  74 }
  75
  76 static void be_mcc_notify(struct be_adapter *adapter)
  77 {
  78         struct be_queue_info *mccq = &adapter->mcc_obj.q;
  79         u32 val = 0;
  80
  81         if (be_error(adapter))
  82                 return;
  83
  84         val |= mccq->id & DB_MCCQ_RING_ID_MASK;
  85         val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT;
  86
  87         wmb();
  88         iowrite32(val, adapter->db + DB_MCCQ_OFFSET);
  89 }
  90
  91 /* To check if valid bit is set, check the entire word as we don't know
  92  * the endianness of the data (old entry is host endian while a new entry is
  93  * little endian) */
  94 static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl)
  95 {
  96         u32 flags;
  97
  98         if (compl->flags != 0) {
  99                 flags = le32_to_cpu(compl->flags);
 100                 if (flags & CQE_FLAGS_VALID_MASK) {
 101                         compl->flags = flags;
 102                         return true;
 103                 }
 104         }
 105         return false;
 106 }
 107
 108 /* Need to reset the entire word that houses the valid bit */
 109 static inline void be_mcc_compl_use(struct be_mcc_compl *compl)
 110 {
 111         compl->flags = 0;
 112 }
 113
 114 static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1)
 115 {
 116         unsigned long addr;
 117
 118         addr = tag1;
 119         addr = ((addr << 16) << 16) | tag0;
 120         return (void *)addr;
 121 }
 122
 123 static int be_mcc_compl_process(struct be_adapter *adapter,
 124                                 struct be_mcc_compl *compl)
 125 {
 126         u16 compl_status, extd_status;
 127         struct be_cmd_resp_hdr *resp_hdr;
 128         u8 opcode = 0, subsystem = 0;
 129
 130         /* Just swap the status to host endian; mcc tag is opaquely copied
 131          * from mcc_wrb */
 132         be_dws_le_to_cpu(compl, 4);
 133
 134         compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
 135                                 CQE_STATUS_COMPL_MASK;
 136
 137         resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1);
 138
 139         if (resp_hdr) {
 140                 opcode = resp_hdr->opcode;
 141                 subsystem = resp_hdr->subsystem;
 142         }
 143
 144         if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) ||
 145              (opcode == OPCODE_COMMON_WRITE_OBJECT)) &&
 146             (subsystem == CMD_SUBSYSTEM_COMMON)) {
 147                 adapter->flash_status = compl_status;
 148                 complete(&adapter->flash_compl);
 149         }
 150
 151         if (compl_status == MCC_STATUS_SUCCESS) {
 152                 if (((opcode == OPCODE_ETH_GET_STATISTICS) ||
 153                      (opcode == OPCODE_ETH_GET_PPORT_STATS)) &&
 154                     (subsystem == CMD_SUBSYSTEM_ETH)) {
 155                         be_parse_stats(adapter);
 156                         adapter->stats_cmd_sent = false;
 157                 }
 158                 if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES &&
 159                     subsystem == CMD_SUBSYSTEM_COMMON) {
 160                         struct be_cmd_resp_get_cntl_addnl_attribs *resp =
 161                                 (void *)resp_hdr;
 162                         adapter->drv_stats.be_on_die_temperature =
 163                                 resp->on_die_temperature;
 164                 }
 165         } else {
 166                 if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES)
 167                         adapter->be_get_temp_freq = 0;
 168
 169                 if (compl_status == MCC_STATUS_NOT_SUPPORTED ||
 170                         compl_status == MCC_STATUS_ILLEGAL_REQUEST)
 171                         goto done;
 172
 173                 if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) {
 174                         dev_warn(&adapter->pdev->dev,
 175                                  "VF is not privileged to issue opcode %d-%d\n",
 176                                  opcode, subsystem);
 177                 } else {
 178                         extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) &
 179                                         CQE_STATUS_EXTD_MASK;
 180                         dev_err(&adapter->pdev->dev,
 181                                 "opcode %d-%d failed:status %d-%d\n",
 182                                 opcode, subsystem, compl_status, extd_status);
 183
 184                         if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES)
 185                                 return extd_status;
 186                 }
 187         }
 188 done:
 189         return compl_status;
 190 }
 191
 192 /* Link state evt is a string of bytes; no need for endian swapping */
 193 static void be_async_link_state_process(struct be_adapter *adapter,
 194                 struct be_async_event_link_state *evt)
 195 {
 196         /* When link status changes, link speed must be re-queried from FW */
 197         adapter->phy.link_speed = -1;
 198
 199         /* Ignore physical link event */
 200         if (lancer_chip(adapter) &&
 201             !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK))
 202                 return;
 203
 204         /* For the initial link status do not rely on the ASYNC event as
 205          * it may not be received in some cases.
 206          */
 207         if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT)
 208                 be_link_status_update(adapter, evt->port_link_status);
 209 }
 210
 211 /* Grp5 CoS Priority evt */
 212 static void be_async_grp5_cos_priority_process(struct be_adapter *adapter,
 213                 struct be_async_event_grp5_cos_priority *evt)
 214 {
 215         if (evt->valid) {
 216                 adapter->vlan_prio_bmap = evt->available_priority_bmap;
 217                 adapter->recommended_prio &= ~VLAN_PRIO_MASK;
 218                 adapter->recommended_prio =
 219                         evt->reco_default_priority << VLAN_PRIO_SHIFT;
 220         }
 221 }
 222
 223 /* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */
 224 static void be_async_grp5_qos_speed_process(struct be_adapter *adapter,
 225                 struct be_async_event_grp5_qos_link_speed *evt)
 226 {
 227         if (adapter->phy.link_speed >= 0 &&
 228             evt->physical_port == adapter->port_num)
 229                 adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10;
 230 }
 231
 232 /*Grp5 PVID evt*/
 233 static void be_async_grp5_pvid_state_process(struct be_adapter *adapter,
 234                 struct be_async_event_grp5_pvid_state *evt)
 235 {
 236         if (evt->enabled)
 237                 adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK;
 238         else
 239                 adapter->pvid = 0;
 240 }
 241
 242 static void be_async_grp5_evt_process(struct be_adapter *adapter,
 243                 u32 trailer, struct be_mcc_compl *evt)
 244 {
 245         u8 event_type = 0;
 246
 247         event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) &
 248                 ASYNC_TRAILER_EVENT_TYPE_MASK;
 249
 250         switch (event_type) {
 251         case ASYNC_EVENT_COS_PRIORITY:
 252                 be_async_grp5_cos_priority_process(adapter,
 253                 (struct be_async_event_grp5_cos_priority *)evt);
 254         break;
 255         case ASYNC_EVENT_QOS_SPEED:
 256                 be_async_grp5_qos_speed_process(adapter,
 257                 (struct be_async_event_grp5_qos_link_speed *)evt);
 258         break;
 259         case ASYNC_EVENT_PVID_STATE:
 260                 be_async_grp5_pvid_state_process(adapter,
 261                 (struct be_async_event_grp5_pvid_state *)evt);
 262         break;
 263         default:
 264                 dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n",
 265                          event_type);
 266                 break;
 267         }
 268 }
 269
 270 static void be_async_dbg_evt_process(struct be_adapter *adapter,
 271                 u32 trailer, struct be_mcc_compl *cmp)
 272 {
 273         u8 event_type = 0;
 274         struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp;
 275
 276         event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) &
 277                 ASYNC_TRAILER_EVENT_TYPE_MASK;
 278
 279         switch (event_type) {
 280         case ASYNC_DEBUG_EVENT_TYPE_QNQ:
 281                 if (evt->valid)
 282                         adapter->qnq_vid = le16_to_cpu(evt->vlan_tag);
 283                 adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
 284         break;
 285         default:
 286                 dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n",
 287                          event_type);
 288         break;
 289         }
 290 }
 291
 292 static inline bool is_link_state_evt(u32 trailer)
 293 {
 294         return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
 295                 ASYNC_TRAILER_EVENT_CODE_MASK) ==
 296                                 ASYNC_EVENT_CODE_LINK_STATE;
 297 }
 298
 299 static inline bool is_grp5_evt(u32 trailer)
 300 {
 301         return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
 302                 ASYNC_TRAILER_EVENT_CODE_MASK) ==
 303                                 ASYNC_EVENT_CODE_GRP_5);
 304 }
 305
 306 static inline bool is_dbg_evt(u32 trailer)
 307 {
 308         return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
 309                 ASYNC_TRAILER_EVENT_CODE_MASK) ==
 310                                 ASYNC_EVENT_CODE_QNQ);
 311 }
 312
 313 static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter)
 314 {
 315         struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq;
 316         struct be_mcc_compl *compl = queue_tail_node(mcc_cq);
 317
 318         if (be_mcc_compl_is_new(compl)) {
 319                 queue_tail_inc(mcc_cq);
 320                 return compl;
 321         }
 322         return NULL;
 323 }
 324
 325 void be_async_mcc_enable(struct be_adapter *adapter)
 326 {
 327         spin_lock_bh(&adapter->mcc_cq_lock);
 328
 329         be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0);
 330         adapter->mcc_obj.rearm_cq = true;
 331
 332         spin_unlock_bh(&adapter->mcc_cq_lock);
 333 }
 334
 335 void be_async_mcc_disable(struct be_adapter *adapter)
 336 {
 337         spin_lock_bh(&adapter->mcc_cq_lock);
 338
 339         adapter->mcc_obj.rearm_cq = false;
 340         be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0);
 341
 342         spin_unlock_bh(&adapter->mcc_cq_lock);
 343 }
 344
 345 int be_process_mcc(struct be_adapter *adapter)
 346 {
 347         struct be_mcc_compl *compl;
 348         int num = 0, status = 0;
 349         struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
 350
 351         spin_lock(&adapter->mcc_cq_lock);
 352         while ((compl = be_mcc_compl_get(adapter))) {
 353                 if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
 354                         /* Interpret flags as an async trailer */
 355                         if (is_link_state_evt(compl->flags))
 356                                 be_async_link_state_process(adapter,
 357                                 (struct be_async_event_link_state *) compl);
 358                         else if (is_grp5_evt(compl->flags))
 359                                 be_async_grp5_evt_process(adapter,
 360                                 compl->flags, compl);
 361                         else if (is_dbg_evt(compl->flags))
 362                                 be_async_dbg_evt_process(adapter,
 363                                 compl->flags, compl);
 364                 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
 365                                 status = be_mcc_compl_process(adapter, compl);
 366                                 atomic_dec(&mcc_obj->q.used);
 367                 }
 368                 be_mcc_compl_use(compl);
 369                 num++;
 370         }
 371
 372         if (num)
 373                 be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num);
 374
 375         spin_unlock(&adapter->mcc_cq_lock);
 376         return status;
 377 }
 378
 379 /* Wait till no more pending mcc requests are present */
 380 static int be_mcc_wait_compl(struct be_adapter *adapter)
 381 {
 382 #define mcc_timeout             120000 /* 12s timeout */
 383         int i, status = 0;
 384         struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
 385
 386         for (i = 0; i < mcc_timeout; i++) {
 387                 if (be_error(adapter))
 388                         return -EIO;
 389
 390                 local_bh_disable();
 391                 status = be_process_mcc(adapter);
 392                 local_bh_enable();
 393
 394                 if (atomic_read(&mcc_obj->q.used) == 0)
 395                         break;
 396                 udelay(100);
 397         }
 398         if (i == mcc_timeout) {
 399                 dev_err(&adapter->pdev->dev, "FW not responding\n");
 400                 adapter->fw_timeout = true;
 401                 return -EIO;
 402         }
 403         return status;
 404 }
 405
 406 /* Notify MCC requests and wait for completion */
 407 static int be_mcc_notify_wait(struct be_adapter *adapter)
 408 {
 409         int status;
 410         struct be_mcc_wrb *wrb;
 411         struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
 412         u16 index = mcc_obj->q.head;
 413         struct be_cmd_resp_hdr *resp;
 414
 415         index_dec(&index, mcc_obj->q.len);
 416         wrb = queue_index_node(&mcc_obj->q, index);
 417
 418         resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1);
 419
 420         be_mcc_notify(adapter);
 421
 422         status = be_mcc_wait_compl(adapter);
 423         if (status == -EIO)
 424                 goto out;
 425
 426         status = resp->status;
 427 out:
 428         return status;
 429 }
 430
 431 static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db)
 432 {
 433         int msecs = 0;
 434         u32 ready;
 435
 436         do {
 437                 if (be_error(adapter))
 438                         return -EIO;
 439
 440                 ready = ioread32(db);
 441                 if (ready == 0xffffffff)
 442                         return -1;
 443
 444                 ready &= MPU_MAILBOX_DB_RDY_MASK;
 445                 if (ready)
 446                         break;
 447
 448                 if (msecs > 4000) {
 449                         dev_err(&adapter->pdev->dev, "FW not responding\n");
 450                         adapter->fw_timeout = true;
 451                         be_detect_error(adapter);
 452                         return -1;
 453                 }
 454
 455                 msleep(1);
 456                 msecs++;
 457         } while (true);
 458
 459         return 0;
 460 }
 461
 462 /*
 463  * Insert the mailbox address into the doorbell in two steps
 464  * Polls on the mbox doorbell till a command completion (or a timeout) occurs
 465  */
 466 static int be_mbox_notify_wait(struct be_adapter *adapter)
 467 {
 468         int status;
 469         u32 val = 0;
 470         void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET;
 471         struct be_dma_mem *mbox_mem = &adapter->mbox_mem;
 472         struct be_mcc_mailbox *mbox = mbox_mem->va;
 473         struct be_mcc_compl *compl = &mbox->compl;
 474
 475         /* wait for ready to be set */
 476         status = be_mbox_db_ready_wait(adapter, db);
 477         if (status != 0)
 478                 return status;
 479
 480         val |= MPU_MAILBOX_DB_HI_MASK;
 481         /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
 482         val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
 483         iowrite32(val, db);
 484
 485         /* wait for ready to be set */
 486         status = be_mbox_db_ready_wait(adapter, db);
 487         if (status != 0)
 488                 return status;
 489
 490         val = 0;
 491         /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
 492         val |= (u32)(mbox_mem->dma >> 4) << 2;
 493         iowrite32(val, db);
 494
 495         status = be_mbox_db_ready_wait(adapter, db);
 496         if (status != 0)
 497                 return status;
 498
 499         /* A cq entry has been made now */
 500         if (be_mcc_compl_is_new(compl)) {
 501                 status = be_mcc_compl_process(adapter, &mbox->compl);
 502                 be_mcc_compl_use(compl);
 503                 if (status)
 504                         return status;
 505         } else {
 506                 dev_err(&adapter->pdev->dev, "invalid mailbox completion\n");
 507                 return -1;
 508         }
 509         return 0;
 510 }
 511
 512 static u16 be_POST_stage_get(struct be_adapter *adapter)
 513 {
 514         u32 sem;
 515
 516         if (BEx_chip(adapter))
 517                 sem  = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx);
 518         else
 519                 pci_read_config_dword(adapter->pdev,
 520                                       SLIPORT_SEMAPHORE_OFFSET_SH, &sem);
 521
 522         return sem & POST_STAGE_MASK;
 523 }
 524
 525 int lancer_wait_ready(struct be_adapter *adapter)
 526 {
 527 #define SLIPORT_READY_TIMEOUT 30
 528         u32 sliport_status;
 529         int status = 0, i;
 530
 531         for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
 532                 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
 533                 if (sliport_status & SLIPORT_STATUS_RDY_MASK)
 534                         break;
 535
 536                 msleep(1000);
 537         }
 538
 539         if (i == SLIPORT_READY_TIMEOUT)
 540                 status = -1;
 541
 542         return status;
 543 }
 544
 545 static bool lancer_provisioning_error(struct be_adapter *adapter)
 546 {
 547         u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
 548         sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
 549         if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
 550                 sliport_err1 = ioread32(adapter->db +
 551                                         SLIPORT_ERROR1_OFFSET);
 552                 sliport_err2 = ioread32(adapter->db +
 553                                         SLIPORT_ERROR2_OFFSET);
 554
 555                 if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 &&
 556                     sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2)
 557                         return true;
 558         }
 559         return false;
 560 }
 561
 562 int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
 563 {
 564         int status;
 565         u32 sliport_status, err, reset_needed;
 566         bool resource_error;
 567
 568         resource_error = lancer_provisioning_error(adapter);
 569         if (resource_error)
 570                 return -EAGAIN;
 571
 572         status = lancer_wait_ready(adapter);
 573         if (!status) {
 574                 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
 575                 err = sliport_status & SLIPORT_STATUS_ERR_MASK;
 576                 reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK;
 577                 if (err && reset_needed) {
 578                         iowrite32(SLI_PORT_CONTROL_IP_MASK,
 579                                   adapter->db + SLIPORT_CONTROL_OFFSET);
 580
 581                         /* check adapter has corrected the error */
 582                         status = lancer_wait_ready(adapter);
 583                         sliport_status = ioread32(adapter->db +
 584                                                   SLIPORT_STATUS_OFFSET);
 585                         sliport_status &= (SLIPORT_STATUS_ERR_MASK |
 586                                                 SLIPORT_STATUS_RN_MASK);
 587                         if (status || sliport_status)
 588                                 status = -1;
 589                 } else if (err || reset_needed) {
 590                         status = -1;
 591                 }
 592         }
 593         /* Stop error recovery if error is not recoverable.
 594          * No resource error is temporary errors and will go away
 595          * when PF provisions resources.
 596          */
 597         resource_error = lancer_provisioning_error(adapter);
 598         if (resource_error)
 599                 status = -EAGAIN;
 600
 601         return status;
 602 }
 603
 604 int be_fw_wait_ready(struct be_adapter *adapter)
 605 {
 606         u16 stage;
 607         int status, timeout = 0;
 608         struct device *dev = &adapter->pdev->dev;
 609
 610         if (lancer_chip(adapter)) {
 611                 status = lancer_wait_ready(adapter);
 612                 return status;
 613         }
 614
 615         do {
 616                 stage = be_POST_stage_get(adapter);
 617                 if (stage == POST_STAGE_ARMFW_RDY)
 618                         return 0;
 619
 620                 dev_info(dev, "Waiting for POST, %ds elapsed\n",
 621                          timeout);
 622                 if (msleep_interruptible(2000)) {
 623                         dev_err(dev, "Waiting for POST aborted\n");
 624                         return -EINTR;
 625                 }
 626                 timeout += 2;
 627         } while (timeout < 60);
 628
 629         dev_err(dev, "POST timeout; stage=0x%x\n", stage);
 630         return -1;
 631 }
 632
 633
 634 static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
 635 {
 636         return &wrb->payload.sgl[0];
 637 }
 638
 639 static inline void fill_wrb_tags(struct be_mcc_wrb *wrb,
 640                                  unsigned long addr)
 641 {
 642         wrb->tag0 = addr & 0xFFFFFFFF;
 643         wrb->tag1 = upper_32_bits(addr);
 644 }
 645
 646 /* Don't touch the hdr after it's prepared */
 647 /* mem will be NULL for embedded commands */
 648 static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
 649                                 u8 subsystem, u8 opcode, int cmd_len,
 650                                 struct be_mcc_wrb *wrb, struct be_dma_mem *mem)
 651 {
 652         struct be_sge *sge;
 653
 654         req_hdr->opcode = opcode;
 655         req_hdr->subsystem = subsystem;
 656         req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
 657         req_hdr->version = 0;
 658         fill_wrb_tags(wrb, (ulong) req_hdr);
 659         wrb->payload_length = cmd_len;
 660         if (mem) {
 661                 wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) <<
 662                         MCC_WRB_SGE_CNT_SHIFT;
 663                 sge = nonembedded_sgl(wrb);
 664                 sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma));
 665                 sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF);
 666                 sge->len = cpu_to_le32(mem->size);
 667         } else
 668                 wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
 669         be_dws_cpu_to_le(wrb, 8);
 670 }
 671
 672 static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
 673                         struct be_dma_mem *mem)
 674 {
 675         int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
 676         u64 dma = (u64)mem->dma;
 677
 678         for (i = 0; i < buf_pages; i++) {
 679                 pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
 680                 pages[i].hi = cpu_to_le32(upper_32_bits(dma));
 681                 dma += PAGE_SIZE_4K;
 682         }
 683 }
 684
 685 static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter)
 686 {
 687         struct be_dma_mem *mbox_mem = &adapter->mbox_mem;
 688         struct be_mcc_wrb *wrb
 689                 = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
 690         memset(wrb, 0, sizeof(*wrb));
 691         return wrb;
 692 }
 693
 694 static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter)
 695 {
 696         struct be_queue_info *mccq = &adapter->mcc_obj.q;
 697         struct be_mcc_wrb *wrb;
 698
 699         if (!mccq->created)
 700                 return NULL;
 701
 702         if (atomic_read(&mccq->used) >= mccq->len)
 703                 return NULL;
 704
 705         wrb = queue_head_node(mccq);
 706         queue_head_inc(mccq);
 707         atomic_inc(&mccq->used);
 708         memset(wrb, 0, sizeof(*wrb));
 709         return wrb;
 710 }
 711
 712 static bool use_mcc(struct be_adapter *adapter)
 713 {
 714         return adapter->mcc_obj.q.created;
 715 }
 716
 717 /* Must be used only in process context */
 718 static int be_cmd_lock(struct be_adapter *adapter)
 719 {
 720         if (use_mcc(adapter)) {
 721                 spin_lock_bh(&adapter->mcc_lock);
 722                 return 0;
 723         } else {
 724                 return mutex_lock_interruptible(&adapter->mbox_lock);
 725         }
 726 }
 727
 728 /* Must be used only in process context */
 729 static void be_cmd_unlock(struct be_adapter *adapter)
 730 {
 731         if (use_mcc(adapter))
 732                 spin_unlock_bh(&adapter->mcc_lock);
 733         else
 734                 return mutex_unlock(&adapter->mbox_lock);
 735 }
 736
 737 static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter,
 738                                       struct be_mcc_wrb *wrb)
 739 {
 740         struct be_mcc_wrb *dest_wrb;
 741
 742         if (use_mcc(adapter)) {
 743                 dest_wrb = wrb_from_mccq(adapter);
 744                 if (!dest_wrb)
 745                         return NULL;
 746         } else {
 747                 dest_wrb = wrb_from_mbox(adapter);
 748         }
 749
 750         memcpy(dest_wrb, wrb, sizeof(*wrb));
 751         if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK))
 752                 fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb));
 753
 754         return dest_wrb;
 755 }
 756
 757 /* Must be used only in process context */
 758 static int be_cmd_notify_wait(struct be_adapter *adapter,
 759                               struct be_mcc_wrb *wrb)
 760 {
 761         struct be_mcc_wrb *dest_wrb;
 762         int status;
 763
 764         status = be_cmd_lock(adapter);
 765         if (status)
 766                 return status;
 767
 768         dest_wrb = be_cmd_copy(adapter, wrb);
 769         if (!dest_wrb)
 770                 return -EBUSY;
 771
 772         if (use_mcc(adapter))
 773                 status = be_mcc_notify_wait(adapter);
 774         else
 775                 status = be_mbox_notify_wait(adapter);
 776
 777         if (!status)
 778                 memcpy(wrb, dest_wrb, sizeof(*wrb));
 779
 780         be_cmd_unlock(adapter);
 781         return status;
 782 }
 783
 784 /* Tell fw we're about to start firing cmds by writing a
 785  * special pattern across the wrb hdr; uses mbox
 786  */
 787 int be_cmd_fw_init(struct be_adapter *adapter)
 788 {
 789         u8 *wrb;
 790         int status;
 791
 792         if (lancer_chip(adapter))
 793                 return 0;
 794
 795         if (mutex_lock_interruptible(&adapter->mbox_lock))
 796                 return -1;
 797
 798         wrb = (u8 *)wrb_from_mbox(adapter);
 799         *wrb++ = 0xFF;
 800         *wrb++ = 0x12;
 801         *wrb++ = 0x34;
 802         *wrb++ = 0xFF;
 803         *wrb++ = 0xFF;
 804         *wrb++ = 0x56;
 805         *wrb++ = 0x78;
 806         *wrb = 0xFF;
 807
 808         status = be_mbox_notify_wait(adapter);
 809
 810         mutex_unlock(&adapter->mbox_lock);
 811         return status;
 812 }
 813
 814 /* Tell fw we're done with firing cmds by writing a
 815  * special pattern across the wrb hdr; uses mbox
 816  */
 817 int be_cmd_fw_clean(struct be_adapter *adapter)
 818 {
 819         u8 *wrb;
 820         int status;
 821
 822         if (lancer_chip(adapter))
 823                 return 0;
 824
 825         if (mutex_lock_interruptible(&adapter->mbox_lock))
 826                 return -1;
 827
 828         wrb = (u8 *)wrb_from_mbox(adapter);
 829         *wrb++ = 0xFF;
 830         *wrb++ = 0xAA;
 831         *wrb++ = 0xBB;
 832         *wrb++ = 0xFF;
 833         *wrb++ = 0xFF;
 834         *wrb++ = 0xCC;
 835         *wrb++ = 0xDD;
 836         *wrb = 0xFF;
 837
 838         status = be_mbox_notify_wait(adapter);
 839
 840         mutex_unlock(&adapter->mbox_lock);
 841         return status;
 842 }
 843
 844 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo)
 845 {
 846         struct be_mcc_wrb *wrb;
 847         struct be_cmd_req_eq_create *req;
 848         struct be_dma_mem *q_mem = &eqo->q.dma_mem;
 849         int status, ver = 0;
 850
 851         if (mutex_lock_interruptible(&adapter->mbox_lock))
 852                 return -1;
 853
 854         wrb = wrb_from_mbox(adapter);
 855         req = embedded_payload(wrb);
 856
 857         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
 858                 OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL);
 859
 860         /* Support for EQ_CREATEv2 available only SH-R onwards */
 861         if (!(BEx_chip(adapter) || lancer_chip(adapter)))
 862                 ver = 2;
 863
 864         req->hdr.version = ver;
 865         req->num_pages =  cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
 866
 867         AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
 868         /* 4byte eqe*/
 869         AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
 870         AMAP_SET_BITS(struct amap_eq_context, count, req->context,
 871                       __ilog2_u32(eqo->q.len / 256));
 872         be_dws_cpu_to_le(req->context, sizeof(req->context));
 873
 874         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
 875
 876         status = be_mbox_notify_wait(adapter);
 877         if (!status) {
 878                 struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
 879                 eqo->q.id = le16_to_cpu(resp->eq_id);
 880                 eqo->msix_idx =
 881                         (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx;
 882                 eqo->q.created = true;
 883         }
 884
 885         mutex_unlock(&adapter->mbox_lock);
 886         return status;
 887 }
 888
 889 /* Use MCC */
 890 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
 891                           bool permanent, u32 if_handle, u32 pmac_id)
 892 {
 893         struct be_mcc_wrb *wrb;
 894         struct be_cmd_req_mac_query *req;
 895         int status;
 896
 897         spin_lock_bh(&adapter->mcc_lock);
 898
 899         wrb = wrb_from_mccq(adapter);
 900         if (!wrb) {
 901                 status = -EBUSY;
 902                 goto err;
 903         }
 904         req = embedded_payload(wrb);
 905
 906         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
 907                 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL);
 908         req->type = MAC_ADDRESS_TYPE_NETWORK;
 909         if (permanent) {
 910                 req->permanent = 1;
 911         } else {
 912                 req->if_id = cpu_to_le16((u16) if_handle);
 913                 req->pmac_id = cpu_to_le32(pmac_id);
 914                 req->permanent = 0;
 915         }
 916
 917         status = be_mcc_notify_wait(adapter);
 918         if (!status) {
 919                 struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
 920                 memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
 921         }
 922
 923 err:
 924         spin_unlock_bh(&adapter->mcc_lock);
 925         return status;
 926 }
 927
 928 /* Uses synchronous MCCQ */
 929 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
 930                 u32 if_id, u32 *pmac_id, u32 domain)
 931 {
 932         struct be_mcc_wrb *wrb;
 933         struct be_cmd_req_pmac_add *req;
 934         int status;
 935
 936         spin_lock_bh(&adapter->mcc_lock);
 937
 938         wrb = wrb_from_mccq(adapter);
 939         if (!wrb) {
 940                 status = -EBUSY;
 941                 goto err;
 942         }
 943         req = embedded_payload(wrb);
 944
 945         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
 946                 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL);
 947
 948         req->hdr.domain = domain;
 949         req->if_id = cpu_to_le32(if_id);
 950         memcpy(req->mac_address, mac_addr, ETH_ALEN);
 951
 952         status = be_mcc_notify_wait(adapter);
 953         if (!status) {
 954                 struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
 955                 *pmac_id = le32_to_cpu(resp->pmac_id);
 956         }
 957
 958 err:
 959         spin_unlock_bh(&adapter->mcc_lock);
 960
 961          if (status == MCC_STATUS_UNAUTHORIZED_REQUEST)
 962                 status = -EPERM;
 963
 964         return status;
 965 }
 966
 967 /* Uses synchronous MCCQ */
 968 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom)
 969 {
 970         struct be_mcc_wrb *wrb;
 971         struct be_cmd_req_pmac_del *req;
 972         int status;
 973
 974         if (pmac_id == -1)
 975                 return 0;
 976
 977         spin_lock_bh(&adapter->mcc_lock);
 978
 979         wrb = wrb_from_mccq(adapter);
 980         if (!wrb) {
 981                 status = -EBUSY;
 982                 goto err;
 983         }
 984         req = embedded_payload(wrb);
 985
 986         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
 987                 OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL);
 988
 989         req->hdr.domain = dom;
 990         req->if_id = cpu_to_le32(if_id);
 991         req->pmac_id = cpu_to_le32(pmac_id);
 992
 993         status = be_mcc_notify_wait(adapter);
 994
 995 err:
 996         spin_unlock_bh(&adapter->mcc_lock);
 997         return status;
 998 }
 999
1000 /* Uses Mbox */
1001 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
1002                 struct be_queue_info *eq, bool no_delay, int coalesce_wm)
1003 {
1004         struct be_mcc_wrb *wrb;
1005         struct be_cmd_req_cq_create *req;
1006         struct be_dma_mem *q_mem = &cq->dma_mem;
1007         void *ctxt;
1008         int status;
1009
1010         if (mutex_lock_interruptible(&adapter->mbox_lock))
1011                 return -1;
1012
1013         wrb = wrb_from_mbox(adapter);
1014         req = embedded_payload(wrb);
1015         ctxt = &req->context;
1016
1017         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1018                 OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL);
1019
1020         req->num_pages =  cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1021
1022         if (BEx_chip(adapter)) {
1023                 AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt,
1024                                                                 coalesce_wm);
1025                 AMAP_SET_BITS(struct amap_cq_context_be, nodelay,
1026                                                                 ctxt, no_delay);
1027                 AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt,
1028                                                 __ilog2_u32(cq->len/256));
1029                 AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1);
1030                 AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1);
1031                 AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id);
1032         } else {
1033                 req->hdr.version = 2;
1034                 req->page_size = 1; /* 1 for 4K */
1035                 AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt,
1036                                                                 no_delay);
1037                 AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
1038                                                 __ilog2_u32(cq->len/256));
1039                 AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
1040                 AMAP_SET_BITS(struct amap_cq_context_v2, eventable,
1041                                                                 ctxt, 1);
1042                 AMAP_SET_BITS(struct amap_cq_context_v2, eqid,
1043                                                                 ctxt, eq->id);
1044         }
1045
1046         be_dws_cpu_to_le(ctxt, sizeof(req->context));
1047
1048         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1049
1050         status = be_mbox_notify_wait(adapter);
1051         if (!status) {
1052                 struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
1053                 cq->id = le16_to_cpu(resp->cq_id);
1054                 cq->created = true;
1055         }
1056
1057         mutex_unlock(&adapter->mbox_lock);
1058
1059         return status;
1060 }
1061
1062 static u32 be_encoded_q_len(int q_len)
1063 {
1064         u32 len_encoded = fls(q_len); /* log2(len) + 1 */
1065         if (len_encoded == 16)
1066                 len_encoded = 0;
1067         return len_encoded;
1068 }
1069
1070 static int be_cmd_mccq_ext_create(struct be_adapter *adapter,
1071                                 struct be_queue_info *mccq,
1072                                 struct be_queue_info *cq)
1073 {
1074         struct be_mcc_wrb *wrb;
1075         struct be_cmd_req_mcc_ext_create *req;
1076         struct be_dma_mem *q_mem = &mccq->dma_mem;
1077         void *ctxt;
1078         int status;
1079
1080         if (mutex_lock_interruptible(&adapter->mbox_lock))
1081                 return -1;
1082
1083         wrb = wrb_from_mbox(adapter);
1084         req = embedded_payload(wrb);
1085         ctxt = &req->context;
1086
1087         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1088                         OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL);
1089
1090         req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1091         if (lancer_chip(adapter)) {
1092                 req->hdr.version = 1;
1093                 req->cq_id = cpu_to_le16(cq->id);
1094
1095                 AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt,
1096                                                 be_encoded_q_len(mccq->len));
1097                 AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1);
1098                 AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id,
1099                                                                 ctxt, cq->id);
1100                 AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid,
1101                                                                  ctxt, 1);
1102
1103         } else {
1104                 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
1105                 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
1106                                                 be_encoded_q_len(mccq->len));
1107                 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
1108         }
1109
1110         /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */
1111         req->async_event_bitmap[0] = cpu_to_le32(0x00000022);
1112         req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ);
1113         be_dws_cpu_to_le(ctxt, sizeof(req->context));
1114
1115         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1116
1117         status = be_mbox_notify_wait(adapter);
1118         if (!status) {
1119                 struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb);
1120                 mccq->id = le16_to_cpu(resp->id);
1121                 mccq->created = true;
1122         }
1123         mutex_unlock(&adapter->mbox_lock);
1124
1125         return status;
1126 }
1127
1128 static int be_cmd_mccq_org_create(struct be_adapter *adapter,
1129                                 struct be_queue_info *mccq,
1130                                 struct be_queue_info *cq)
1131 {
1132         struct be_mcc_wrb *wrb;
1133         struct be_cmd_req_mcc_create *req;
1134         struct be_dma_mem *q_mem = &mccq->dma_mem;
1135         void *ctxt;
1136         int status;
1137
1138         if (mutex_lock_interruptible(&adapter->mbox_lock))
1139                 return -1;
1140
1141         wrb = wrb_from_mbox(adapter);
1142         req = embedded_payload(wrb);
1143         ctxt = &req->context;
1144
1145         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1146                         OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL);
1147
1148         req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1149
1150         AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
1151         AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
1152                         be_encoded_q_len(mccq->len));
1153         AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
1154
1155         be_dws_cpu_to_le(ctxt, sizeof(req->context));
1156
1157         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1158
1159         status = be_mbox_notify_wait(adapter);
1160         if (!status) {
1161                 struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb);
1162                 mccq->id = le16_to_cpu(resp->id);
1163                 mccq->created = true;
1164         }
1165
1166         mutex_unlock(&adapter->mbox_lock);
1167         return status;
1168 }
1169
1170 int be_cmd_mccq_create(struct be_adapter *adapter,
1171                         struct be_queue_info *mccq,
1172                         struct be_queue_info *cq)
1173 {
1174         int status;
1175
1176         status = be_cmd_mccq_ext_create(adapter, mccq, cq);
1177         if (status && !lancer_chip(adapter)) {
1178                 dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 "
1179                         "or newer to avoid conflicting priorities between NIC "
1180                         "and FCoE traffic");
1181                 status = be_cmd_mccq_org_create(adapter, mccq, cq);
1182         }
1183         return status;
1184 }
1185
1186 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo)
1187 {
1188         struct be_mcc_wrb wrb = {0};
1189         struct be_cmd_req_eth_tx_create *req;
1190         struct be_queue_info *txq = &txo->q;
1191         struct be_queue_info *cq = &txo->cq;
1192         struct be_dma_mem *q_mem = &txq->dma_mem;
1193         int status, ver = 0;
1194
1195         req = embedded_payload(&wrb);
1196         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1197                                 OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL);
1198
1199         if (lancer_chip(adapter)) {
1200                 req->hdr.version = 1;
1201                 req->if_id = cpu_to_le16(adapter->if_handle);
1202         } else if (BEx_chip(adapter)) {
1203                 if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC)
1204                         req->hdr.version = 2;
1205         } else { /* For SH */
1206                 req->hdr.version = 2;
1207         }
1208
1209         req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
1210         req->ulp_num = BE_ULP1_NUM;
1211         req->type = BE_ETH_TX_RING_TYPE_STANDARD;
1212         req->cq_id = cpu_to_le16(cq->id);
1213         req->queue_size = be_encoded_q_len(txq->len);
1214         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1215         ver = req->hdr.version;
1216
1217         status = be_cmd_notify_wait(adapter, &wrb);
1218         if (!status) {
1219                 struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb);
1220                 txq->id = le16_to_cpu(resp->cid);
1221                 if (ver == 2)
1222                         txo->db_offset = le32_to_cpu(resp->db_offset);
1223                 else
1224                         txo->db_offset = DB_TXULP1_OFFSET;
1225                 txq->created = true;
1226         }
1227
1228         return status;
1229 }
1230
1231 /* Uses MCC */
1232 int be_cmd_rxq_create(struct be_adapter *adapter,
1233                 struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
1234                 u32 if_id, u32 rss, u8 *rss_id)
1235 {
1236         struct be_mcc_wrb *wrb;
1237         struct be_cmd_req_eth_rx_create *req;
1238         struct be_dma_mem *q_mem = &rxq->dma_mem;
1239         int status;
1240
1241         spin_lock_bh(&adapter->mcc_lock);
1242
1243         wrb = wrb_from_mccq(adapter);
1244         if (!wrb) {
1245                 status = -EBUSY;
1246                 goto err;
1247         }
1248         req = embedded_payload(wrb);
1249
1250         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1251                                 OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL);
1252
1253         req->cq_id = cpu_to_le16(cq_id);
1254         req->frag_size = fls(frag_size) - 1;
1255         req->num_pages = 2;
1256         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1257         req->interface_id = cpu_to_le32(if_id);
1258         req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE);
1259         req->rss_queue = cpu_to_le32(rss);
1260
1261         status = be_mcc_notify_wait(adapter);
1262         if (!status) {
1263                 struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
1264                 rxq->id = le16_to_cpu(resp->id);
1265                 rxq->created = true;
1266                 *rss_id = resp->rss_id;
1267         }
1268
1269 err:
1270         spin_unlock_bh(&adapter->mcc_lock);
1271         return status;
1272 }
1273
1274 /* Generic destroyer function for all types of queues
1275  * Uses Mbox
1276  */
1277 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1278                 int queue_type)
1279 {
1280         struct be_mcc_wrb *wrb;
1281         struct be_cmd_req_q_destroy *req;
1282         u8 subsys = 0, opcode = 0;
1283         int status;
1284
1285         if (mutex_lock_interruptible(&adapter->mbox_lock))
1286                 return -1;
1287
1288         wrb = wrb_from_mbox(adapter);
1289         req = embedded_payload(wrb);
1290
1291         switch (queue_type) {
1292         case QTYPE_EQ:
1293                 subsys = CMD_SUBSYSTEM_COMMON;
1294                 opcode = OPCODE_COMMON_EQ_DESTROY;
1295                 break;
1296         case QTYPE_CQ:
1297                 subsys = CMD_SUBSYSTEM_COMMON;
1298                 opcode = OPCODE_COMMON_CQ_DESTROY;
1299                 break;
1300         case QTYPE_TXQ:
1301                 subsys = CMD_SUBSYSTEM_ETH;
1302                 opcode = OPCODE_ETH_TX_DESTROY;
1303                 break;
1304         case QTYPE_RXQ:
1305                 subsys = CMD_SUBSYSTEM_ETH;
1306                 opcode = OPCODE_ETH_RX_DESTROY;
1307                 break;
1308         case QTYPE_MCCQ:
1309                 subsys = CMD_SUBSYSTEM_COMMON;
1310                 opcode = OPCODE_COMMON_MCC_DESTROY;
1311                 break;
1312         default:
1313                 BUG();
1314         }
1315
1316         be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb,
1317                                 NULL);
1318         req->id = cpu_to_le16(q->id);
1319
1320         status = be_mbox_notify_wait(adapter);
1321         q->created = false;
1322
1323         mutex_unlock(&adapter->mbox_lock);
1324         return status;
1325 }
1326
1327 /* Uses MCC */
1328 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q)
1329 {
1330         struct be_mcc_wrb *wrb;
1331         struct be_cmd_req_q_destroy *req;
1332         int status;
1333
1334         spin_lock_bh(&adapter->mcc_lock);
1335
1336         wrb = wrb_from_mccq(adapter);
1337         if (!wrb) {
1338                 status = -EBUSY;
1339                 goto err;
1340         }
1341         req = embedded_payload(wrb);
1342
1343         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1344                         OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL);
1345         req->id = cpu_to_le16(q->id);
1346
1347         status = be_mcc_notify_wait(adapter);
1348         q->created = false;
1349
1350 err:
1351         spin_unlock_bh(&adapter->mcc_lock);
1352         return status;
1353 }
1354
1355 /* Create an rx filtering policy configuration on an i/f
1356  * Will use MBOX only if MCCQ has not been created.
1357  */
1358 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
1359                      u32 *if_handle, u32 domain)
1360 {
1361         struct be_mcc_wrb wrb = {0};
1362         struct be_cmd_req_if_create *req;
1363         int status;
1364
1365         req = embedded_payload(&wrb);
1366         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1367                 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL);
1368         req->hdr.domain = domain;
1369         req->capability_flags = cpu_to_le32(cap_flags);
1370         req->enable_flags = cpu_to_le32(en_flags);
1371         req->pmac_invalid = true;
1372
1373         status = be_cmd_notify_wait(adapter, &wrb);
1374         if (!status) {
1375                 struct be_cmd_resp_if_create *resp = embedded_payload(&wrb);
1376                 *if_handle = le32_to_cpu(resp->interface_id);
1377
1378                 /* Hack to retrieve VF's pmac-id on BE3 */
1379                 if (BE3_chip(adapter) && !be_physfn(adapter))
1380                         adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id);
1381         }
1382         return status;
1383 }
1384
1385 /* Uses MCCQ */
1386 int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain)
1387 {
1388         struct be_mcc_wrb *wrb;
1389         struct be_cmd_req_if_destroy *req;
1390         int status;
1391
1392         if (interface_id == -1)
1393                 return 0;
1394
1395         spin_lock_bh(&adapter->mcc_lock);
1396
1397         wrb = wrb_from_mccq(adapter);
1398         if (!wrb) {
1399                 status = -EBUSY;
1400                 goto err;
1401         }
1402         req = embedded_payload(wrb);
1403
1404         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1405                 OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL);
1406         req->hdr.domain = domain;
1407         req->interface_id = cpu_to_le32(interface_id);
1408
1409         status = be_mcc_notify_wait(adapter);
1410 err:
1411         spin_unlock_bh(&adapter->mcc_lock);
1412         return status;
1413 }
1414
1415 /* Get stats is a non embedded command: the request is not embedded inside
1416  * WRB but is a separate dma memory block
1417  * Uses asynchronous MCC
1418  */
1419 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)
1420 {
1421         struct be_mcc_wrb *wrb;
1422         struct be_cmd_req_hdr *hdr;
1423         int status = 0;
1424
1425         spin_lock_bh(&adapter->mcc_lock);
1426
1427         wrb = wrb_from_mccq(adapter);
1428         if (!wrb) {
1429                 status = -EBUSY;
1430                 goto err;
1431         }
1432         hdr = nonemb_cmd->va;
1433
1434         be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH,
1435                 OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd);
1436
1437         /* version 1 of the cmd is not supported only by BE2 */
1438         if (!BE2_chip(adapter))
1439                 hdr->version = 1;
1440
1441         be_mcc_notify(adapter);
1442         adapter->stats_cmd_sent = true;
1443
1444 err:
1445         spin_unlock_bh(&adapter->mcc_lock);
1446         return status;
1447 }
1448
1449 /* Lancer Stats */
1450 int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1451                                 struct be_dma_mem *nonemb_cmd)
1452 {
1453
1454         struct be_mcc_wrb *wrb;
1455         struct lancer_cmd_req_pport_stats *req;
1456         int status = 0;
1457
1458         if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS,
1459                             CMD_SUBSYSTEM_ETH))
1460                 return -EPERM;
1461
1462         spin_lock_bh(&adapter->mcc_lock);
1463
1464         wrb = wrb_from_mccq(adapter);
1465         if (!wrb) {
1466                 status = -EBUSY;
1467                 goto err;
1468         }
1469         req = nonemb_cmd->va;
1470
1471         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1472                         OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb,
1473                         nonemb_cmd);
1474
1475         req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num);
1476         req->cmd_params.params.reset_stats = 0;
1477
1478         be_mcc_notify(adapter);
1479         adapter->stats_cmd_sent = true;
1480
1481 err:
1482         spin_unlock_bh(&adapter->mcc_lock);
1483         return status;
1484 }
1485
1486 static int be_mac_to_link_speed(int mac_speed)
1487 {
1488         switch (mac_speed) {
1489         case PHY_LINK_SPEED_ZERO:
1490                 return 0;
1491         case PHY_LINK_SPEED_10MBPS:
1492                 return 10;
1493         case PHY_LINK_SPEED_100MBPS:
1494                 return 100;
1495         case PHY_LINK_SPEED_1GBPS:
1496                 return 1000;
1497         case PHY_LINK_SPEED_10GBPS:
1498                 return 10000;
1499         case PHY_LINK_SPEED_20GBPS:
1500                 return 20000;
1501         case PHY_LINK_SPEED_25GBPS:
1502                 return 25000;
1503         case PHY_LINK_SPEED_40GBPS:
1504                 return 40000;
1505         }
1506         return 0;
1507 }
1508
1509 /* Uses synchronous mcc
1510  * Returns link_speed in Mbps
1511  */
1512 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
1513                              u8 *link_status, u32 dom)
1514 {
1515         struct be_mcc_wrb *wrb;
1516         struct be_cmd_req_link_status *req;
1517         int status;
1518
1519         spin_lock_bh(&adapter->mcc_lock);
1520
1521         if (link_status)
1522                 *link_status = LINK_DOWN;
1523
1524         wrb = wrb_from_mccq(adapter);
1525         if (!wrb) {
1526                 status = -EBUSY;
1527                 goto err;
1528         }
1529         req = embedded_payload(wrb);
1530
1531         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1532                 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL);
1533
1534         /* version 1 of the cmd is not supported only by BE2 */
1535         if (!BE2_chip(adapter))
1536                 req->hdr.version = 1;
1537
1538         req->hdr.domain = dom;
1539
1540         status = be_mcc_notify_wait(adapter);
1541         if (!status) {
1542                 struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
1543                 if (link_speed) {
1544                         *link_speed = resp->link_speed ?
1545                                       le16_to_cpu(resp->link_speed) * 10 :
1546                                       be_mac_to_link_speed(resp->mac_speed);
1547
1548                         if (!resp->logical_link_status)
1549                                 *link_speed = 0;
1550                 }
1551                 if (link_status)
1552                         *link_status = resp->logical_link_status;
1553         }
1554
1555 err:
1556         spin_unlock_bh(&adapter->mcc_lock);
1557         return status;
1558 }
1559
1560 /* Uses synchronous mcc */
1561 int be_cmd_get_die_temperature(struct be_adapter *adapter)
1562 {
1563         struct be_mcc_wrb *wrb;
1564         struct be_cmd_req_get_cntl_addnl_attribs *req;
1565         int status = 0;
1566
1567         spin_lock_bh(&adapter->mcc_lock);
1568
1569         wrb = wrb_from_mccq(adapter);
1570         if (!wrb) {
1571                 status = -EBUSY;
1572                 goto err;
1573         }
1574         req = embedded_payload(wrb);
1575
1576         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1577                 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req),
1578                 wrb, NULL);
1579
1580         be_mcc_notify(adapter);
1581
1582 err:
1583         spin_unlock_bh(&adapter->mcc_lock);
1584         return status;
1585 }
1586
1587 /* Uses synchronous mcc */
1588 int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size)
1589 {
1590         struct be_mcc_wrb *wrb;
1591         struct be_cmd_req_get_fat *req;
1592         int status;
1593
1594         spin_lock_bh(&adapter->mcc_lock);
1595
1596         wrb = wrb_from_mccq(adapter);
1597         if (!wrb) {
1598                 status = -EBUSY;
1599                 goto err;
1600         }
1601         req = embedded_payload(wrb);
1602
1603         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1604                 OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL);
1605         req->fat_operation = cpu_to_le32(QUERY_FAT);
1606         status = be_mcc_notify_wait(adapter);
1607         if (!status) {
1608                 struct be_cmd_resp_get_fat *resp = embedded_payload(wrb);
1609                 if (log_size && resp->log_size)
1610                         *log_size = le32_to_cpu(resp->log_size) -
1611                                         sizeof(u32);
1612         }
1613 err:
1614         spin_unlock_bh(&adapter->mcc_lock);
1615         return status;
1616 }
1617
1618 void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1619 {
1620         struct be_dma_mem get_fat_cmd;
1621         struct be_mcc_wrb *wrb;
1622         struct be_cmd_req_get_fat *req;
1623         u32 offset = 0, total_size, buf_size,
1624                                 log_offset = sizeof(u32), payload_len;
1625         int status;
1626
1627         if (buf_len == 0)
1628                 return;
1629
1630         total_size = buf_len;
1631
1632         get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024;
1633         get_fat_cmd.va = pci_alloc_consistent(adapter->pdev,
1634                         get_fat_cmd.size,
1635                         &get_fat_cmd.dma);
1636         if (!get_fat_cmd.va) {
1637                 status = -ENOMEM;
1638                 dev_err(&adapter->pdev->dev,
1639                 "Memory allocation failure while retrieving FAT data\n");
1640                 return;
1641         }
1642
1643         spin_lock_bh(&adapter->mcc_lock);
1644
1645         while (total_size) {
1646                 buf_size = min(total_size, (u32)60*1024);
1647                 total_size -= buf_size;
1648
1649                 wrb = wrb_from_mccq(adapter);
1650                 if (!wrb) {
1651                         status = -EBUSY;
1652                         goto err;
1653                 }
1654                 req = get_fat_cmd.va;
1655
1656                 payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size;
1657                 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1658                                 OPCODE_COMMON_MANAGE_FAT, payload_len, wrb,
1659                                 &get_fat_cmd);
1660
1661                 req->fat_operation = cpu_to_le32(RETRIEVE_FAT);
1662                 req->read_log_offset = cpu_to_le32(log_offset);
1663                 req->read_log_length = cpu_to_le32(buf_size);
1664                 req->data_buffer_size = cpu_to_le32(buf_size);
1665
1666                 status = be_mcc_notify_wait(adapter);
1667                 if (!status) {
1668                         struct be_cmd_resp_get_fat *resp = get_fat_cmd.va;
1669                         memcpy(buf + offset,
1670                                 resp->data_buffer,
1671                                 le32_to_cpu(resp->read_log_length));
1672                 } else {
1673                         dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n");
1674                         goto err;
1675                 }
1676                 offset += buf_size;
1677                 log_offset += buf_size;
1678         }
1679 err:
1680         pci_free_consistent(adapter->pdev, get_fat_cmd.size,
1681                         get_fat_cmd.va,
1682                         get_fat_cmd.dma);
1683         spin_unlock_bh(&adapter->mcc_lock);
1684 }
1685
1686 /* Uses synchronous mcc */
1687 int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1688                         char *fw_on_flash)
1689 {
1690         struct be_mcc_wrb *wrb;
1691         struct be_cmd_req_get_fw_version *req;
1692         int status;
1693
1694         spin_lock_bh(&adapter->mcc_lock);
1695
1696         wrb = wrb_from_mccq(adapter);
1697         if (!wrb) {
1698                 status = -EBUSY;
1699                 goto err;
1700         }
1701
1702         req = embedded_payload(wrb);
1703
1704         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1705                 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL);
1706         status = be_mcc_notify_wait(adapter);
1707         if (!status) {
1708                 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
1709                 strcpy(fw_ver, resp->firmware_version_string);
1710                 if (fw_on_flash)
1711                         strcpy(fw_on_flash, resp->fw_on_flash_version_string);
1712         }
1713 err:
1714         spin_unlock_bh(&adapter->mcc_lock);
1715         return status;
1716 }
1717
1718 /* set the EQ delay interval of an EQ to specified value
1719  * Uses async mcc
1720  */
1721 int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd)
1722 {
1723         struct be_mcc_wrb *wrb;
1724         struct be_cmd_req_modify_eq_delay *req;
1725         int status = 0;
1726
1727         spin_lock_bh(&adapter->mcc_lock);
1728
1729         wrb = wrb_from_mccq(adapter);
1730         if (!wrb) {
1731                 status = -EBUSY;
1732                 goto err;
1733         }
1734         req = embedded_payload(wrb);
1735
1736         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1737                 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL);
1738
1739         req->num_eq = cpu_to_le32(1);
1740         req->delay[0].eq_id = cpu_to_le32(eq_id);
1741         req->delay[0].phase = 0;
1742         req->delay[0].delay_multiplier = cpu_to_le32(eqd);
1743
1744         be_mcc_notify(adapter);
1745
1746 err:
1747         spin_unlock_bh(&adapter->mcc_lock);
1748         return status;
1749 }
1750
1751 /* Uses sycnhronous mcc */
1752 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
1753                         u32 num, bool untagged, bool promiscuous)
1754 {
1755         struct be_mcc_wrb *wrb;
1756         struct be_cmd_req_vlan_config *req;
1757         int status;
1758
1759         spin_lock_bh(&adapter->mcc_lock);
1760
1761         wrb = wrb_from_mccq(adapter);
1762         if (!wrb) {
1763                 status = -EBUSY;
1764                 goto err;
1765         }
1766         req = embedded_payload(wrb);
1767
1768         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1769                 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL);
1770
1771         req->interface_id = if_id;
1772         req->promiscuous = promiscuous;
1773         req->untagged = untagged;
1774         req->num_vlan = num;
1775         if (!promiscuous) {
1776                 memcpy(req->normal_vlan, vtag_array,
1777                         req->num_vlan * sizeof(vtag_array[0]));
1778         }
1779
1780         status = be_mcc_notify_wait(adapter);
1781
1782 err:
1783         spin_unlock_bh(&adapter->mcc_lock);
1784         return status;
1785 }
1786
1787 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)
1788 {
1789         struct be_mcc_wrb *wrb;
1790         struct be_dma_mem *mem = &adapter->rx_filter;
1791         struct be_cmd_req_rx_filter *req = mem->va;
1792         int status;
1793
1794         spin_lock_bh(&adapter->mcc_lock);
1795
1796         wrb = wrb_from_mccq(adapter);
1797         if (!wrb) {
1798                 status = -EBUSY;
1799                 goto err;
1800         }
1801         memset(req, 0, sizeof(*req));
1802         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1803                                 OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req),
1804                                 wrb, mem);
1805
1806         req->if_id = cpu_to_le32(adapter->if_handle);
1807         if (flags & IFF_PROMISC) {
1808                 req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS |
1809                                         BE_IF_FLAGS_VLAN_PROMISCUOUS |
1810                                         BE_IF_FLAGS_MCAST_PROMISCUOUS);
1811                 if (value == ON)
1812                         req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS |
1813                                                 BE_IF_FLAGS_VLAN_PROMISCUOUS |
1814                                                 BE_IF_FLAGS_MCAST_PROMISCUOUS);
1815         } else if (flags & IFF_ALLMULTI) {
1816                 req->if_flags_mask = req->if_flags =
1817                                 cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS);
1818         } else if (flags & BE_FLAGS_VLAN_PROMISC) {
1819                 req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS);
1820
1821                 if (value == ON)
1822                         req->if_flags =
1823                                 cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS);
1824         } else {
1825                 struct netdev_hw_addr *ha;
1826                 int i = 0;
1827
1828                 req->if_flags_mask = req->if_flags =
1829                                 cpu_to_le32(BE_IF_FLAGS_MULTICAST);
1830
1831                 /* Reset mcast promisc mode if already set by setting mask
1832                  * and not setting flags field
1833                  */
1834                 req->if_flags_mask |=
1835                         cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS &
1836                                     be_if_cap_flags(adapter));
1837                 req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev));
1838                 netdev_for_each_mc_addr(ha, adapter->netdev)
1839                         memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN);
1840         }
1841
1842         status = be_mcc_notify_wait(adapter);
1843 err:
1844         spin_unlock_bh(&adapter->mcc_lock);
1845         return status;
1846 }
1847
1848 /* Uses synchrounous mcc */
1849 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)
1850 {
1851         struct be_mcc_wrb *wrb;
1852         struct be_cmd_req_set_flow_control *req;
1853         int status;
1854
1855         if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL,
1856                             CMD_SUBSYSTEM_COMMON))
1857                 return -EPERM;
1858
1859         spin_lock_bh(&adapter->mcc_lock);
1860
1861         wrb = wrb_from_mccq(adapter);
1862         if (!wrb) {
1863                 status = -EBUSY;
1864                 goto err;
1865         }
1866         req = embedded_payload(wrb);
1867
1868         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1869                 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL);
1870
1871         req->tx_flow_control = cpu_to_le16((u16)tx_fc);
1872         req->rx_flow_control = cpu_to_le16((u16)rx_fc);
1873
1874         status = be_mcc_notify_wait(adapter);
1875
1876 err:
1877         spin_unlock_bh(&adapter->mcc_lock);
1878         return status;
1879 }
1880
1881 /* Uses sycn mcc */
1882 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)
1883 {
1884         struct be_mcc_wrb *wrb;
1885         struct be_cmd_req_get_flow_control *req;
1886         int status;
1887
1888         if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL,
1889                             CMD_SUBSYSTEM_COMMON))
1890                 return -EPERM;
1891
1892         spin_lock_bh(&adapter->mcc_lock);
1893
1894         wrb = wrb_from_mccq(adapter);
1895         if (!wrb) {
1896                 status = -EBUSY;
1897                 goto err;
1898         }
1899         req = embedded_payload(wrb);
1900
1901         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1902                 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL);
1903
1904         status = be_mcc_notify_wait(adapter);
1905         if (!status) {
1906                 struct be_cmd_resp_get_flow_control *resp =
1907                                                 embedded_payload(wrb);
1908                 *tx_fc = le16_to_cpu(resp->tx_flow_control);
1909                 *rx_fc = le16_to_cpu(resp->rx_flow_control);
1910         }
1911
1912 err:
1913         spin_unlock_bh(&adapter->mcc_lock);
1914         return status;
1915 }
1916
1917 /* Uses mbox */
1918 int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
1919                         u32 *mode, u32 *caps, u16 *asic_rev)
1920 {
1921         struct be_mcc_wrb *wrb;
1922         struct be_cmd_req_query_fw_cfg *req;
1923         int status;
1924
1925         if (mutex_lock_interruptible(&adapter->mbox_lock))
1926                 return -1;
1927
1928         wrb = wrb_from_mbox(adapter);
1929         req = embedded_payload(wrb);
1930
1931         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1932                 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL);
1933
1934         status = be_mbox_notify_wait(adapter);
1935         if (!status) {
1936                 struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
1937                 *port_num = le32_to_cpu(resp->phys_port);
1938                 *mode = le32_to_cpu(resp->function_mode);
1939                 *caps = le32_to_cpu(resp->function_caps);
1940                 *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF;
1941         }
1942
1943         mutex_unlock(&adapter->mbox_lock);
1944         return status;
1945 }
1946
1947 /* Uses mbox */
1948 int be_cmd_reset_function(struct be_adapter *adapter)
1949 {
1950         struct be_mcc_wrb *wrb;
1951         struct be_cmd_req_hdr *req;
1952         int status;
1953
1954         if (lancer_chip(adapter)) {
1955                 status = lancer_wait_ready(adapter);
1956                 if (!status) {
1957                         iowrite32(SLI_PORT_CONTROL_IP_MASK,
1958                                   adapter->db + SLIPORT_CONTROL_OFFSET);
1959                         status = lancer_test_and_set_rdy_state(adapter);
1960                 }
1961                 if (status) {
1962                         dev_err(&adapter->pdev->dev,
1963                                 "Adapter in non recoverable error\n");
1964                 }
1965                 return status;
1966         }
1967
1968         if (mutex_lock_interruptible(&adapter->mbox_lock))
1969                 return -1;
1970
1971         wrb = wrb_from_mbox(adapter);
1972         req = embedded_payload(wrb);
1973
1974         be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON,
1975                 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL);
1976
1977         status = be_mbox_notify_wait(adapter);
1978
1979         mutex_unlock(&adapter->mbox_lock);
1980         return status;
1981 }
1982
1983 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
1984                         u32 rss_hash_opts, u16 table_size)
1985 {
1986         struct be_mcc_wrb *wrb;
1987         struct be_cmd_req_rss_config *req;
1988         u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e,
1989                         0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2,
1990                         0x3ea83c02, 0x4a110304};
1991         int status;
1992
1993         if (mutex_lock_interruptible(&adapter->mbox_lock))
1994                 return -1;
1995
1996         wrb = wrb_from_mbox(adapter);
1997         req = embedded_payload(wrb);
1998
1999         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2000                 OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL);
2001
2002         req->if_id = cpu_to_le32(adapter->if_handle);
2003         req->enable_rss = cpu_to_le16(rss_hash_opts);
2004         req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1);
2005
2006         if (lancer_chip(adapter) || skyhawk_chip(adapter))
2007                 req->hdr.version = 1;
2008
2009         memcpy(req->cpu_table, rsstable, table_size);
2010         memcpy(req->hash, myhash, sizeof(myhash));
2011         be_dws_cpu_to_le(req->hash, sizeof(req->hash));
2012
2013         status = be_mbox_notify_wait(adapter);
2014
2015         mutex_unlock(&adapter->mbox_lock);
2016         return status;
2017 }
2018
2019 /* Uses sync mcc */
2020 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,
2021                         u8 bcn, u8 sts, u8 state)
2022 {
2023         struct be_mcc_wrb *wrb;
2024         struct be_cmd_req_enable_disable_beacon *req;
2025         int status;
2026
2027         spin_lock_bh(&adapter->mcc_lock);
2028
2029         wrb = wrb_from_mccq(adapter);
2030         if (!wrb) {
2031                 status = -EBUSY;
2032                 goto err;
2033         }
2034         req = embedded_payload(wrb);
2035
2036         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2037                 OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL);
2038
2039         req->port_num = port_num;
2040         req->beacon_state = state;
2041         req->beacon_duration = bcn;
2042         req->status_duration = sts;
2043
2044         status = be_mcc_notify_wait(adapter);
2045
2046 err:
2047         spin_unlock_bh(&adapter->mcc_lock);
2048         return status;
2049 }
2050
2051 /* Uses sync mcc */
2052 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)
2053 {
2054         struct be_mcc_wrb *wrb;
2055         struct be_cmd_req_get_beacon_state *req;
2056         int status;
2057
2058         spin_lock_bh(&adapter->mcc_lock);
2059
2060         wrb = wrb_from_mccq(adapter);
2061         if (!wrb) {
2062                 status = -EBUSY;
2063                 goto err;
2064         }
2065         req = embedded_payload(wrb);
2066
2067         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2068                 OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL);
2069
2070         req->port_num = port_num;
2071
2072         status = be_mcc_notify_wait(adapter);
2073         if (!status) {
2074                 struct be_cmd_resp_get_beacon_state *resp =
2075                                                 embedded_payload(wrb);
2076                 *state = resp->beacon_state;
2077         }
2078
2079 err:
2080         spin_unlock_bh(&adapter->mcc_lock);
2081         return status;
2082 }
2083
2084 int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2085                             u32 data_size, u32 data_offset,
2086                             const char *obj_name, u32 *data_written,
2087                             u8 *change_status, u8 *addn_status)
2088 {
2089         struct be_mcc_wrb *wrb;
2090         struct lancer_cmd_req_write_object *req;
2091         struct lancer_cmd_resp_write_object *resp;
2092         void *ctxt = NULL;
2093         int status;
2094
2095         spin_lock_bh(&adapter->mcc_lock);
2096         adapter->flash_status = 0;
2097
2098         wrb = wrb_from_mccq(adapter);
2099         if (!wrb) {
2100                 status = -EBUSY;
2101                 goto err_unlock;
2102         }
2103
2104         req = embedded_payload(wrb);
2105
2106         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2107                                 OPCODE_COMMON_WRITE_OBJECT,
2108                                 sizeof(struct lancer_cmd_req_write_object), wrb,
2109                                 NULL);
2110
2111         ctxt = &req->context;
2112         AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2113                         write_length, ctxt, data_size);
2114
2115         if (data_size == 0)
2116                 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2117                                 eof, ctxt, 1);
2118         else
2119                 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2120                                 eof, ctxt, 0);
2121
2122         be_dws_cpu_to_le(ctxt, sizeof(req->context));
2123         req->write_offset = cpu_to_le32(data_offset);
2124         strcpy(req->object_name, obj_name);
2125         req->descriptor_count = cpu_to_le32(1);
2126         req->buf_len = cpu_to_le32(data_size);
2127         req->addr_low = cpu_to_le32((cmd->dma +
2128                                 sizeof(struct lancer_cmd_req_write_object))
2129                                 & 0xFFFFFFFF);
2130         req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma +
2131                                 sizeof(struct lancer_cmd_req_write_object)));
2132
2133         be_mcc_notify(adapter);
2134         spin_unlock_bh(&adapter->mcc_lock);
2135
2136         if (!wait_for_completion_timeout(&adapter->flash_compl,
2137                                          msecs_to_jiffies(60000)))
2138                 status = -1;
2139         else
2140                 status = adapter->flash_status;
2141
2142         resp = embedded_payload(wrb);
2143         if (!status) {
2144                 *data_written = le32_to_cpu(resp->actual_write_len);
2145                 *change_status = resp->change_status;
2146         } else {
2147                 *addn_status = resp->additional_status;
2148         }
2149
2150         return status;
2151
2152 err_unlock:
2153         spin_unlock_bh(&adapter->mcc_lock);
2154         return status;
2155 }
2156
2157 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2158                 u32 data_size, u32 data_offset, const char *obj_name,
2159                 u32 *data_read, u32 *eof, u8 *addn_status)
2160 {
2161         struct be_mcc_wrb *wrb;
2162         struct lancer_cmd_req_read_object *req;
2163         struct lancer_cmd_resp_read_object *resp;
2164         int status;
2165
2166         spin_lock_bh(&adapter->mcc_lock);
2167
2168         wrb = wrb_from_mccq(adapter);
2169         if (!wrb) {
2170                 status = -EBUSY;
2171                 goto err_unlock;
2172         }
2173
2174         req = embedded_payload(wrb);
2175
2176         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2177                         OPCODE_COMMON_READ_OBJECT,
2178                         sizeof(struct lancer_cmd_req_read_object), wrb,
2179                         NULL);
2180
2181         req->desired_read_len = cpu_to_le32(data_size);
2182         req->read_offset = cpu_to_le32(data_offset);
2183         strcpy(req->object_name, obj_name);
2184         req->descriptor_count = cpu_to_le32(1);
2185         req->buf_len = cpu_to_le32(data_size);
2186         req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF));
2187         req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma));
2188
2189         status = be_mcc_notify_wait(adapter);
2190
2191         resp = embedded_payload(wrb);
2192         if (!status) {
2193                 *data_read = le32_to_cpu(resp->actual_read_len);
2194                 *eof = le32_to_cpu(resp->eof);
2195         } else {
2196                 *addn_status = resp->additional_status;
2197         }
2198
2199 err_unlock:
2200         spin_unlock_bh(&adapter->mcc_lock);
2201         return status;
2202 }
2203
2204 int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2205                         u32 flash_type, u32 flash_opcode, u32 buf_size)
2206 {
2207         struct be_mcc_wrb *wrb;
2208         struct be_cmd_write_flashrom *req;
2209         int status;
2210
2211         spin_lock_bh(&adapter->mcc_lock);
2212         adapter->flash_status = 0;
2213
2214         wrb = wrb_from_mccq(adapter);
2215         if (!wrb) {
2216                 status = -EBUSY;
2217                 goto err_unlock;
2218         }
2219         req = cmd->va;
2220
2221         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2222                 OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd);
2223
2224         req->params.op_type = cpu_to_le32(flash_type);
2225         req->params.op_code = cpu_to_le32(flash_opcode);
2226         req->params.data_buf_size = cpu_to_le32(buf_size);
2227
2228         be_mcc_notify(adapter);
2229         spin_unlock_bh(&adapter->mcc_lock);
2230
2231         if (!wait_for_completion_timeout(&adapter->flash_compl,
2232                         msecs_to_jiffies(40000)))
2233                 status = -1;
2234         else
2235                 status = adapter->flash_status;
2236
2237         return status;
2238
2239 err_unlock:
2240         spin_unlock_bh(&adapter->mcc_lock);
2241         return status;
2242 }
2243
2244 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
2245                          int offset)
2246 {
2247         struct be_mcc_wrb *wrb;
2248         struct be_cmd_read_flash_crc *req;
2249         int status;
2250
2251         spin_lock_bh(&adapter->mcc_lock);
2252
2253         wrb = wrb_from_mccq(adapter);
2254         if (!wrb) {
2255                 status = -EBUSY;
2256                 goto err;
2257         }
2258         req = embedded_payload(wrb);
2259
2260         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2261                                OPCODE_COMMON_READ_FLASHROM, sizeof(*req),
2262                                wrb, NULL);
2263
2264         req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT);
2265         req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT);
2266         req->params.offset = cpu_to_le32(offset);
2267         req->params.data_buf_size = cpu_to_le32(0x4);
2268
2269         status = be_mcc_notify_wait(adapter);
2270         if (!status)
2271                 memcpy(flashed_crc, req->crc, 4);
2272
2273 err:
2274         spin_unlock_bh(&adapter->mcc_lock);
2275         return status;
2276 }
2277
2278 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2279                                 struct be_dma_mem *nonemb_cmd)
2280 {
2281         struct be_mcc_wrb *wrb;
2282         struct be_cmd_req_acpi_wol_magic_config *req;
2283         int status;
2284
2285         spin_lock_bh(&adapter->mcc_lock);
2286
2287         wrb = wrb_from_mccq(adapter);
2288         if (!wrb) {
2289                 status = -EBUSY;
2290                 goto err;
2291         }
2292         req = nonemb_cmd->va;
2293
2294         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2295                 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb,
2296                 nonemb_cmd);
2297         memcpy(req->magic_mac, mac, ETH_ALEN);
2298
2299         status = be_mcc_notify_wait(adapter);
2300
2301 err:
2302         spin_unlock_bh(&adapter->mcc_lock);
2303         return status;
2304 }
2305
2306 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2307                         u8 loopback_type, u8 enable)
2308 {
2309         struct be_mcc_wrb *wrb;
2310         struct be_cmd_req_set_lmode *req;
2311         int status;
2312
2313         spin_lock_bh(&adapter->mcc_lock);
2314
2315         wrb = wrb_from_mccq(adapter);
2316         if (!wrb) {
2317                 status = -EBUSY;
2318                 goto err;
2319         }
2320
2321         req = embedded_payload(wrb);
2322
2323         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2324                         OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb,
2325                         NULL);
2326
2327         req->src_port = port_num;
2328         req->dest_port = port_num;
2329         req->loopback_type = loopback_type;
2330         req->loopback_state = enable;
2331
2332         status = be_mcc_notify_wait(adapter);
2333 err:
2334         spin_unlock_bh(&adapter->mcc_lock);
2335         return status;
2336 }
2337
2338 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2339                 u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern)
2340 {
2341         struct be_mcc_wrb *wrb;
2342         struct be_cmd_req_loopback_test *req;
2343         int status;
2344
2345         spin_lock_bh(&adapter->mcc_lock);
2346
2347         wrb = wrb_from_mccq(adapter);
2348         if (!wrb) {
2349                 status = -EBUSY;
2350                 goto err;
2351         }
2352
2353         req = embedded_payload(wrb);
2354
2355         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2356                         OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL);
2357         req->hdr.timeout = cpu_to_le32(4);
2358
2359         req->pattern = cpu_to_le64(pattern);
2360         req->src_port = cpu_to_le32(port_num);
2361         req->dest_port = cpu_to_le32(port_num);
2362         req->pkt_size = cpu_to_le32(pkt_size);
2363         req->num_pkts = cpu_to_le32(num_pkts);
2364         req->loopback_type = cpu_to_le32(loopback_type);
2365
2366         status = be_mcc_notify_wait(adapter);
2367         if (!status) {
2368                 struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb);
2369                 status = le32_to_cpu(resp->status);
2370         }
2371
2372 err:
2373         spin_unlock_bh(&adapter->mcc_lock);
2374         return status;
2375 }
2376
2377 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
2378                                 u32 byte_cnt, struct be_dma_mem *cmd)
2379 {
2380         struct be_mcc_wrb *wrb;
2381         struct be_cmd_req_ddrdma_test *req;
2382         int status;
2383         int i, j = 0;
2384
2385         spin_lock_bh(&adapter->mcc_lock);
2386
2387         wrb = wrb_from_mccq(adapter);
2388         if (!wrb) {
2389                 status = -EBUSY;
2390                 goto err;
2391         }
2392         req = cmd->va;
2393         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2394                         OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd);
2395
2396         req->pattern = cpu_to_le64(pattern);
2397         req->byte_count = cpu_to_le32(byte_cnt);
2398         for (i = 0; i < byte_cnt; i++) {
2399                 req->snd_buff[i] = (u8)(pattern >> (j*8));
2400                 j++;
2401                 if (j > 7)
2402                         j = 0;
2403         }
2404
2405         status = be_mcc_notify_wait(adapter);
2406
2407         if (!status) {
2408                 struct be_cmd_resp_ddrdma_test *resp;
2409                 resp = cmd->va;
2410                 if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) ||
2411                                 resp->snd_err) {
2412                         status = -1;
2413                 }
2414         }
2415
2416 err:
2417         spin_unlock_bh(&adapter->mcc_lock);
2418         return status;
2419 }
2420
2421 int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2422                                 struct be_dma_mem *nonemb_cmd)
2423 {
2424         struct be_mcc_wrb *wrb;
2425         struct be_cmd_req_seeprom_read *req;
2426         int status;
2427
2428         spin_lock_bh(&adapter->mcc_lock);
2429
2430         wrb = wrb_from_mccq(adapter);
2431         if (!wrb) {
2432                 status = -EBUSY;
2433                 goto err;
2434         }
2435         req = nonemb_cmd->va;
2436
2437         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2438                         OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb,
2439                         nonemb_cmd);
2440
2441         status = be_mcc_notify_wait(adapter);
2442
2443 err:
2444         spin_unlock_bh(&adapter->mcc_lock);
2445         return status;
2446 }
2447
2448 int be_cmd_get_phy_info(struct be_adapter *adapter)
2449 {
2450         struct be_mcc_wrb *wrb;
2451         struct be_cmd_req_get_phy_info *req;
2452         struct be_dma_mem cmd;
2453         int status;
2454
2455         if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS,
2456                             CMD_SUBSYSTEM_COMMON))
2457                 return -EPERM;
2458
2459         spin_lock_bh(&adapter->mcc_lock);
2460
2461         wrb = wrb_from_mccq(adapter);
2462         if (!wrb) {
2463                 status = -EBUSY;
2464                 goto err;
2465         }
2466         cmd.size = sizeof(struct be_cmd_req_get_phy_info);
2467         cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size,
2468                                         &cmd.dma);
2469         if (!cmd.va) {
2470                 dev_err(&adapter->pdev->dev, "Memory alloc failure\n");
2471                 status = -ENOMEM;
2472                 goto err;
2473         }
2474
2475         req = cmd.va;
2476
2477         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2478                         OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req),
2479                         wrb, &cmd);
2480
2481         status = be_mcc_notify_wait(adapter);
2482         if (!status) {
2483                 struct be_phy_info *resp_phy_info =
2484                                 cmd.va + sizeof(struct be_cmd_req_hdr);
2485                 adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type);
2486                 adapter->phy.interface_type =
2487                         le16_to_cpu(resp_phy_info->interface_type);
2488                 adapter->phy.auto_speeds_supported =
2489                         le16_to_cpu(resp_phy_info->auto_speeds_supported);
2490                 adapter->phy.fixed_speeds_supported =
2491                         le16_to_cpu(resp_phy_info->fixed_speeds_supported);
2492                 adapter->phy.misc_params =
2493                         le32_to_cpu(resp_phy_info->misc_params);
2494
2495                 if (BE2_chip(adapter)) {
2496                         adapter->phy.fixed_speeds_supported =
2497                                 BE_SUPPORTED_SPEED_10GBPS |
2498                                 BE_SUPPORTED_SPEED_1GBPS;
2499                 }
2500         }
2501         pci_free_consistent(adapter->pdev, cmd.size,
2502                                 cmd.va, cmd.dma);
2503 err:
2504         spin_unlock_bh(&adapter->mcc_lock);
2505         return status;
2506 }
2507
2508 int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)
2509 {
2510         struct be_mcc_wrb *wrb;
2511         struct be_cmd_req_set_qos *req;
2512         int status;
2513
2514         spin_lock_bh(&adapter->mcc_lock);
2515
2516         wrb = wrb_from_mccq(adapter);
2517         if (!wrb) {
2518                 status = -EBUSY;
2519                 goto err;
2520         }
2521
2522         req = embedded_payload(wrb);
2523
2524         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2525                         OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL);
2526
2527         req->hdr.domain = domain;
2528         req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC);
2529         req->max_bps_nic = cpu_to_le32(bps);
2530
2531         status = be_mcc_notify_wait(adapter);
2532
2533 err:
2534         spin_unlock_bh(&adapter->mcc_lock);
2535         return status;
2536 }
2537
2538 int be_cmd_get_cntl_attributes(struct be_adapter *adapter)
2539 {
2540         struct be_mcc_wrb *wrb;
2541         struct be_cmd_req_cntl_attribs *req;
2542         struct be_cmd_resp_cntl_attribs *resp;
2543         int status;
2544         int payload_len = max(sizeof(*req), sizeof(*resp));
2545         struct mgmt_controller_attrib *attribs;
2546         struct be_dma_mem attribs_cmd;
2547
2548         if (mutex_lock_interruptible(&adapter->mbox_lock))
2549                 return -1;
2550
2551         memset(&attribs_cmd, 0, sizeof(struct be_dma_mem));
2552         attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs);
2553         attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size,
2554                                                 &attribs_cmd.dma);
2555         if (!attribs_cmd.va) {
2556                 dev_err(&adapter->pdev->dev,
2557                                 "Memory allocation failure\n");
2558                 status = -ENOMEM;
2559                 goto err;
2560         }
2561
2562         wrb = wrb_from_mbox(adapter);
2563         if (!wrb) {
2564                 status = -EBUSY;
2565                 goto err;
2566         }
2567         req = attribs_cmd.va;
2568
2569         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2570                          OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb,
2571                         &attribs_cmd);
2572
2573         status = be_mbox_notify_wait(adapter);
2574         if (!status) {
2575                 attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr);
2576                 adapter->hba_port_num = attribs->hba_attribs.phy_port;
2577         }
2578
2579 err:
2580         mutex_unlock(&adapter->mbox_lock);
2581         if (attribs_cmd.va)
2582                 pci_free_consistent(adapter->pdev, attribs_cmd.size,
2583                                     attribs_cmd.va, attribs_cmd.dma);
2584         return status;
2585 }
2586
2587 /* Uses mbox */
2588 int be_cmd_req_native_mode(struct be_adapter *adapter)
2589 {
2590         struct be_mcc_wrb *wrb;
2591         struct be_cmd_req_set_func_cap *req;
2592         int status;
2593
2594         if (mutex_lock_interruptible(&adapter->mbox_lock))
2595                 return -1;
2596
2597         wrb = wrb_from_mbox(adapter);
2598         if (!wrb) {
2599                 status = -EBUSY;
2600                 goto err;
2601         }
2602
2603         req = embedded_payload(wrb);
2604
2605         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2606                 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL);
2607
2608         req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS |
2609                                 CAPABILITY_BE3_NATIVE_ERX_API);
2610         req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API);
2611
2612         status = be_mbox_notify_wait(adapter);
2613         if (!status) {
2614                 struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb);
2615                 adapter->be3_native = le32_to_cpu(resp->cap_flags) &
2616                                         CAPABILITY_BE3_NATIVE_ERX_API;
2617                 if (!adapter->be3_native)
2618                         dev_warn(&adapter->pdev->dev,
2619                                  "adapter not in advanced mode\n");
2620         }
2621 err:
2622         mutex_unlock(&adapter->mbox_lock);
2623         return status;
2624 }
2625
2626 /* Get privilege(s) for a function */
2627 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2628                              u32 domain)
2629 {
2630         struct be_mcc_wrb *wrb;
2631         struct be_cmd_req_get_fn_privileges *req;
2632         int status;
2633
2634         spin_lock_bh(&adapter->mcc_lock);
2635
2636         wrb = wrb_from_mccq(adapter);
2637         if (!wrb) {
2638                 status = -EBUSY;
2639                 goto err;
2640         }
2641
2642         req = embedded_payload(wrb);
2643
2644         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2645                                OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req),
2646                                wrb, NULL);
2647
2648         req->hdr.domain = domain;
2649
2650         status = be_mcc_notify_wait(adapter);
2651         if (!status) {
2652                 struct be_cmd_resp_get_fn_privileges *resp =
2653                                                 embedded_payload(wrb);
2654                 *privilege = le32_to_cpu(resp->privilege_mask);
2655         }
2656
2657 err:
2658         spin_unlock_bh(&adapter->mcc_lock);
2659         return status;
2660 }
2661
2662 /* Set privilege(s) for a function */
2663 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2664                              u32 domain)
2665 {
2666         struct be_mcc_wrb *wrb;
2667         struct be_cmd_req_set_fn_privileges *req;
2668         int status;
2669
2670         spin_lock_bh(&adapter->mcc_lock);
2671
2672         wrb = wrb_from_mccq(adapter);
2673         if (!wrb) {
2674                 status = -EBUSY;
2675                 goto err;
2676         }
2677
2678         req = embedded_payload(wrb);
2679         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2680                                OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req),
2681                                wrb, NULL);
2682         req->hdr.domain = domain;
2683         if (lancer_chip(adapter))
2684                 req->privileges_lancer = cpu_to_le32(privileges);
2685         else
2686                 req->privileges = cpu_to_le32(privileges);
2687
2688         status = be_mcc_notify_wait(adapter);
2689 err:
2690         spin_unlock_bh(&adapter->mcc_lock);
2691         return status;
2692 }
2693
2694 /* pmac_id_valid: true => pmac_id is supplied and MAC address is requested.
2695  * pmac_id_valid: false => pmac_id or MAC address is requested.
2696  *                If pmac_id is returned, pmac_id_valid is returned as true
2697  */
2698 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2699                              bool *pmac_id_valid, u32 *pmac_id, u8 domain)
2700 {
2701         struct be_mcc_wrb *wrb;
2702         struct be_cmd_req_get_mac_list *req;
2703         int status;
2704         int mac_count;
2705         struct be_dma_mem get_mac_list_cmd;
2706         int i;
2707
2708         memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem));
2709         get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list);
2710         get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev,
2711                         get_mac_list_cmd.size,
2712                         &get_mac_list_cmd.dma);
2713
2714         if (!get_mac_list_cmd.va) {
2715                 dev_err(&adapter->pdev->dev,
2716                                 "Memory allocation failure during GET_MAC_LIST\n");
2717                 return -ENOMEM;
2718         }
2719
2720         spin_lock_bh(&adapter->mcc_lock);
2721
2722         wrb = wrb_from_mccq(adapter);
2723         if (!wrb) {
2724                 status = -EBUSY;
2725                 goto out;
2726         }
2727
2728         req = get_mac_list_cmd.va;
2729
2730         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2731                                OPCODE_COMMON_GET_MAC_LIST,
2732                                get_mac_list_cmd.size, wrb, &get_mac_list_cmd);
2733         req->hdr.domain = domain;
2734         req->mac_type = MAC_ADDRESS_TYPE_NETWORK;
2735         if (*pmac_id_valid) {
2736                 req->mac_id = cpu_to_le32(*pmac_id);
2737                 req->iface_id = cpu_to_le16(adapter->if_handle);
2738                 req->perm_override = 0;
2739         } else {
2740                 req->perm_override = 1;
2741         }
2742
2743         status = be_mcc_notify_wait(adapter);
2744         if (!status) {
2745                 struct be_cmd_resp_get_mac_list *resp =
2746                                                 get_mac_list_cmd.va;
2747
2748                 if (*pmac_id_valid) {
2749                         memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr,
2750                                ETH_ALEN);
2751                         goto out;
2752                 }
2753
2754                 mac_count = resp->true_mac_count + resp->pseudo_mac_count;
2755                 /* Mac list returned could contain one or more active mac_ids
2756                  * or one or more true or pseudo permanant mac addresses.
2757                  * If an active mac_id is present, return first active mac_id
2758                  * found.
2759                  */
2760                 for (i = 0; i < mac_count; i++) {
2761                         struct get_list_macaddr *mac_entry;
2762                         u16 mac_addr_size;
2763                         u32 mac_id;
2764
2765                         mac_entry = &resp->macaddr_list[i];
2766                         mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size);
2767                         /* mac_id is a 32 bit value and mac_addr size
2768                          * is 6 bytes
2769                          */
2770                         if (mac_addr_size == sizeof(u32)) {
2771                                 *pmac_id_valid = true;
2772                                 mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id;
2773                                 *pmac_id = le32_to_cpu(mac_id);
2774                                 goto out;
2775                         }
2776                 }
2777                 /* If no active mac_id found, return first mac addr */
2778                 *pmac_id_valid = false;
2779                 memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr,
2780                                                                 ETH_ALEN);
2781         }
2782
2783 out:
2784         spin_unlock_bh(&adapter->mcc_lock);
2785         pci_free_consistent(adapter->pdev, get_mac_list_cmd.size,
2786                         get_mac_list_cmd.va, get_mac_list_cmd.dma);
2787         return status;
2788 }
2789
2790 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac)
2791 {
2792         bool active = true;
2793
2794         if (BEx_chip(adapter))
2795                 return be_cmd_mac_addr_query(adapter, mac, false,
2796                                              adapter->if_handle, curr_pmac_id);
2797         else
2798                 /* Fetch the MAC address using pmac_id */
2799                 return be_cmd_get_mac_from_list(adapter, mac, &active,
2800                                                 &curr_pmac_id, 0);
2801 }
2802
2803 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac)
2804 {
2805         int status;
2806         bool pmac_valid = false;
2807
2808         memset(mac, 0, ETH_ALEN);
2809
2810         if (BEx_chip(adapter)) {
2811                 if (be_physfn(adapter))
2812                         status = be_cmd_mac_addr_query(adapter, mac, true, 0,
2813                                                        0);
2814                 else
2815                         status = be_cmd_mac_addr_query(adapter, mac, false,
2816                                                        adapter->if_handle, 0);
2817         } else {
2818                 status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid,
2819                                                   NULL, 0);
2820         }
2821
2822         return status;
2823 }
2824
2825 /* Uses synchronous MCCQ */
2826 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
2827                         u8 mac_count, u32 domain)
2828 {
2829         struct be_mcc_wrb *wrb;
2830         struct be_cmd_req_set_mac_list *req;
2831         int status;
2832         struct be_dma_mem cmd;
2833
2834         memset(&cmd, 0, sizeof(struct be_dma_mem));
2835         cmd.size = sizeof(struct be_cmd_req_set_mac_list);
2836         cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size,
2837                         &cmd.dma, GFP_KERNEL);
2838         if (!cmd.va)
2839                 return -ENOMEM;
2840
2841         spin_lock_bh(&adapter->mcc_lock);
2842
2843         wrb = wrb_from_mccq(adapter);
2844         if (!wrb) {
2845                 status = -EBUSY;
2846                 goto err;
2847         }
2848
2849         req = cmd.va;
2850         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2851                                 OPCODE_COMMON_SET_MAC_LIST, sizeof(*req),
2852                                 wrb, &cmd);
2853
2854         req->hdr.domain = domain;
2855         req->mac_count = mac_count;
2856         if (mac_count)
2857                 memcpy(req->mac, mac_array, ETH_ALEN*mac_count);
2858
2859         status = be_mcc_notify_wait(adapter);
2860
2861 err:
2862         dma_free_coherent(&adapter->pdev->dev, cmd.size,
2863                                 cmd.va, cmd.dma);
2864         spin_unlock_bh(&adapter->mcc_lock);
2865         return status;
2866 }
2867
2868 /* Wrapper to delete any active MACs and provision the new mac.
2869  * Changes to MAC_LIST are allowed iff none of the MAC addresses in the
2870  * current list are active.
2871  */
2872 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom)
2873 {
2874         bool active_mac = false;
2875         u8 old_mac[ETH_ALEN];
2876         u32 pmac_id;
2877         int status;
2878
2879         status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac,
2880                                           &pmac_id, dom);
2881         if (!status && active_mac)
2882                 be_cmd_pmac_del(adapter, if_id, pmac_id, dom);
2883
2884         return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom);
2885 }
2886
2887 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
2888                           u32 domain, u16 intf_id, u16 hsw_mode)
2889 {
2890         struct be_mcc_wrb *wrb;
2891         struct be_cmd_req_set_hsw_config *req;
2892         void *ctxt;
2893         int status;
2894
2895         spin_lock_bh(&adapter->mcc_lock);
2896
2897         wrb = wrb_from_mccq(adapter);
2898         if (!wrb) {
2899                 status = -EBUSY;
2900                 goto err;
2901         }
2902
2903         req = embedded_payload(wrb);
2904         ctxt = &req->context;
2905
2906         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2907                         OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL);
2908
2909         req->hdr.domain = domain;
2910         AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id);
2911         if (pvid) {
2912                 AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1);
2913                 AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid);
2914         }
2915         if (!BEx_chip(adapter) && hsw_mode) {
2916                 AMAP_SET_BITS(struct amap_set_hsw_context, interface_id,
2917                               ctxt, adapter->hba_port_num);
2918                 AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1);
2919                 AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type,
2920                               ctxt, hsw_mode);
2921         }
2922
2923         be_dws_cpu_to_le(req->context, sizeof(req->context));
2924         status = be_mcc_notify_wait(adapter);
2925
2926 err:
2927         spin_unlock_bh(&adapter->mcc_lock);
2928         return status;
2929 }
2930
2931 /* Get Hyper switch config */
2932 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
2933                           u32 domain, u16 intf_id, u8 *mode)
2934 {
2935         struct be_mcc_wrb *wrb;
2936         struct be_cmd_req_get_hsw_config *req;
2937         void *ctxt;
2938         int status;
2939         u16 vid;
2940
2941         spin_lock_bh(&adapter->mcc_lock);
2942
2943         wrb = wrb_from_mccq(adapter);
2944         if (!wrb) {
2945                 status = -EBUSY;
2946                 goto err;
2947         }
2948
2949         req = embedded_payload(wrb);
2950         ctxt = &req->context;
2951
2952         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2953                         OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL);
2954
2955         req->hdr.domain = domain;
2956         AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id,
2957                       ctxt, intf_id);
2958         AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1);
2959
2960         if (!BEx_chip(adapter)) {
2961                 AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id,
2962                               ctxt, adapter->hba_port_num);
2963                 AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1);
2964         }
2965         be_dws_cpu_to_le(req->context, sizeof(req->context));
2966
2967         status = be_mcc_notify_wait(adapter);
2968         if (!status) {
2969                 struct be_cmd_resp_get_hsw_config *resp =
2970                                                 embedded_payload(wrb);
2971                 be_dws_le_to_cpu(&resp->context,
2972                                                 sizeof(resp->context));
2973                 vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context,
2974                                                         pvid, &resp->context);
2975                 if (pvid)
2976                         *pvid = le16_to_cpu(vid);
2977                 if (mode)
2978                         *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context,
2979                                               port_fwd_type, &resp->context);
2980         }
2981
2982 err:
2983         spin_unlock_bh(&adapter->mcc_lock);
2984         return status;
2985 }
2986
2987 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter)
2988 {
2989         struct be_mcc_wrb *wrb;
2990         struct be_cmd_req_acpi_wol_magic_config_v1 *req;
2991         int status;
2992         int payload_len = sizeof(*req);
2993         struct be_dma_mem cmd;
2994
2995         if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG,
2996                             CMD_SUBSYSTEM_ETH))
2997                 return -EPERM;
2998
2999         if (mutex_lock_interruptible(&adapter->mbox_lock))
3000                 return -1;
3001
3002         memset(&cmd, 0, sizeof(struct be_dma_mem));
3003         cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1);
3004         cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size,
3005                                                &cmd.dma);
3006         if (!cmd.va) {
3007                 dev_err(&adapter->pdev->dev,
3008                                 "Memory allocation failure\n");
3009                 status = -ENOMEM;
3010                 goto err;
3011         }
3012
3013         wrb = wrb_from_mbox(adapter);
3014         if (!wrb) {
3015                 status = -EBUSY;
3016                 goto err;
3017         }
3018
3019         req = cmd.va;
3020
3021         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
3022                                OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG,
3023                                payload_len, wrb, &cmd);
3024
3025         req->hdr.version = 1;
3026         req->query_options = BE_GET_WOL_CAP;
3027
3028         status = be_mbox_notify_wait(adapter);
3029         if (!status) {
3030                 struct be_cmd_resp_acpi_wol_magic_config_v1 *resp;
3031                 resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va;
3032
3033                 /* the command could succeed misleadingly on old f/w
3034                  * which is not aware of the V1 version. fake an error. */
3035                 if (resp->hdr.response_length < payload_len) {
3036                         status = -1;
3037                         goto err;
3038                 }
3039                 adapter->wol_cap = resp->wol_settings;
3040         }
3041 err:
3042         mutex_unlock(&adapter->mbox_lock);
3043         if (cmd.va)
3044                 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
3045         return status;
3046
3047 }
3048 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
3049                                    struct be_dma_mem *cmd)
3050 {
3051         struct be_mcc_wrb *wrb;
3052         struct be_cmd_req_get_ext_fat_caps *req;
3053         int status;
3054
3055         if (mutex_lock_interruptible(&adapter->mbox_lock))
3056                 return -1;
3057
3058         wrb = wrb_from_mbox(adapter);
3059         if (!wrb) {
3060                 status = -EBUSY;
3061                 goto err;
3062         }
3063
3064         req = cmd->va;
3065         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3066                                OPCODE_COMMON_GET_EXT_FAT_CAPABILITES,
3067                                cmd->size, wrb, cmd);
3068         req->parameter_type = cpu_to_le32(1);
3069
3070         status = be_mbox_notify_wait(adapter);
3071 err:
3072         mutex_unlock(&adapter->mbox_lock);
3073         return status;
3074 }
3075
3076 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
3077                                    struct be_dma_mem *cmd,
3078                                    struct be_fat_conf_params *configs)
3079 {
3080         struct be_mcc_wrb *wrb;
3081         struct be_cmd_req_set_ext_fat_caps *req;
3082         int status;
3083
3084         spin_lock_bh(&adapter->mcc_lock);
3085
3086         wrb = wrb_from_mccq(adapter);
3087         if (!wrb) {
3088                 status = -EBUSY;
3089                 goto err;
3090         }
3091
3092         req = cmd->va;
3093         memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params));
3094         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3095                                OPCODE_COMMON_SET_EXT_FAT_CAPABILITES,
3096                                cmd->size, wrb, cmd);
3097
3098         status = be_mcc_notify_wait(adapter);
3099 err:
3100         spin_unlock_bh(&adapter->mcc_lock);
3101         return status;
3102 }
3103
3104 int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name)
3105 {
3106         struct be_mcc_wrb *wrb;
3107         struct be_cmd_req_get_port_name *req;
3108         int status;
3109
3110         if (!lancer_chip(adapter)) {
3111                 *port_name = adapter->hba_port_num + '0';
3112                 return 0;
3113         }
3114
3115         spin_lock_bh(&adapter->mcc_lock);
3116
3117         wrb = wrb_from_mccq(adapter);
3118         if (!wrb) {
3119                 status = -EBUSY;
3120                 goto err;
3121         }
3122
3123         req = embedded_payload(wrb);
3124
3125         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3126                                OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb,
3127                                NULL);
3128         req->hdr.version = 1;
3129
3130         status = be_mcc_notify_wait(adapter);
3131         if (!status) {
3132                 struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb);
3133                 *port_name = resp->port_name[adapter->hba_port_num];
3134         } else {
3135                 *port_name = adapter->hba_port_num + '0';
3136         }
3137 err:
3138         spin_unlock_bh(&adapter->mcc_lock);
3139         return status;
3140 }
3141
3142 static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count)
3143 {
3144         struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf;
3145         int i;
3146
3147         for (i = 0; i < desc_count; i++) {
3148                 if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 ||
3149                     hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1)
3150                         return (struct be_nic_res_desc *)hdr;
3151
3152                 hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0;
3153                 hdr = (void *)hdr + hdr->desc_len;
3154         }
3155         return NULL;
3156 }
3157
3158 static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf,
3159                                                  u32 desc_count)
3160 {
3161         struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf;
3162         struct be_pcie_res_desc *pcie;
3163         int i;
3164
3165         for (i = 0; i < desc_count; i++) {
3166                 if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 ||
3167                      hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) {
3168                         pcie = (struct be_pcie_res_desc *)hdr;
3169                         if (pcie->pf_num == devfn)
3170                                 return pcie;
3171                 }
3172
3173                 hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0;
3174                 hdr = (void *)hdr + hdr->desc_len;
3175         }
3176         return NULL;
3177 }
3178
3179 static void be_copy_nic_desc(struct be_resources *res,
3180                              struct be_nic_res_desc *desc)
3181 {
3182         res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count);
3183         res->max_vlans = le16_to_cpu(desc->vlan_count);
3184         res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count);
3185         res->max_tx_qs = le16_to_cpu(desc->txq_count);
3186         res->max_rss_qs = le16_to_cpu(desc->rssq_count);
3187         res->max_rx_qs = le16_to_cpu(desc->rq_count);
3188         res->max_evt_qs = le16_to_cpu(desc->eq_count);
3189         /* Clear flags that driver is not interested in */
3190         res->if_cap_flags = le32_to_cpu(desc->cap_flags) &
3191                                 BE_IF_CAP_FLAGS_WANT;
3192         /* Need 1 RXQ as the default RXQ */
3193         if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs)
3194                 res->max_rss_qs -= 1;
3195 }
3196
3197 /* Uses Mbox */
3198 int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res)
3199 {
3200         struct be_mcc_wrb *wrb;
3201         struct be_cmd_req_get_func_config *req;
3202         int status;
3203         struct be_dma_mem cmd;
3204
3205         if (mutex_lock_interruptible(&adapter->mbox_lock))
3206                 return -1;
3207
3208         memset(&cmd, 0, sizeof(struct be_dma_mem));
3209         cmd.size = sizeof(struct be_cmd_resp_get_func_config);
3210         cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size,
3211                                       &cmd.dma);
3212         if (!cmd.va) {
3213                 dev_err(&adapter->pdev->dev, "Memory alloc failure\n");
3214                 status = -ENOMEM;
3215                 goto err;
3216         }
3217
3218         wrb = wrb_from_mbox(adapter);
3219         if (!wrb) {
3220                 status = -EBUSY;
3221                 goto err;
3222         }
3223
3224         req = cmd.va;
3225
3226         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3227                                OPCODE_COMMON_GET_FUNC_CONFIG,
3228                                cmd.size, wrb, &cmd);
3229
3230         if (skyhawk_chip(adapter))
3231                 req->hdr.version = 1;
3232
3233         status = be_mbox_notify_wait(adapter);
3234         if (!status) {
3235                 struct be_cmd_resp_get_func_config *resp = cmd.va;
3236                 u32 desc_count = le32_to_cpu(resp->desc_count);
3237                 struct be_nic_res_desc *desc;
3238
3239                 desc = be_get_nic_desc(resp->func_param, desc_count);
3240                 if (!desc) {
3241                         status = -EINVAL;
3242                         goto err;
3243                 }
3244
3245                 adapter->pf_number = desc->pf_num;
3246                 be_copy_nic_desc(res, desc);
3247         }
3248 err:
3249         mutex_unlock(&adapter->mbox_lock);
3250         if (cmd.va)
3251                 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
3252         return status;
3253 }
3254
3255 /* Uses mbox */
3256 static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter,
3257                                         u8 domain, struct be_dma_mem *cmd)
3258 {
3259         struct be_mcc_wrb *wrb;
3260         struct be_cmd_req_get_profile_config *req;
3261         int status;
3262
3263         if (mutex_lock_interruptible(&adapter->mbox_lock))
3264                 return -1;
3265         wrb = wrb_from_mbox(adapter);
3266
3267         req = cmd->va;
3268         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3269                                OPCODE_COMMON_GET_PROFILE_CONFIG,
3270                                cmd->size, wrb, cmd);
3271
3272         req->type = ACTIVE_PROFILE_TYPE;
3273         req->hdr.domain = domain;
3274         if (!lancer_chip(adapter))
3275                 req->hdr.version = 1;
3276
3277         status = be_mbox_notify_wait(adapter);
3278
3279         mutex_unlock(&adapter->mbox_lock);
3280         return status;
3281 }
3282
3283 /* Uses sync mcc */
3284 static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter,
3285                                         u8 domain, struct be_dma_mem *cmd)
3286 {
3287         struct be_mcc_wrb *wrb;
3288         struct be_cmd_req_get_profile_config *req;
3289         int status;
3290
3291         spin_lock_bh(&adapter->mcc_lock);
3292
3293         wrb = wrb_from_mccq(adapter);
3294         if (!wrb) {
3295                 status = -EBUSY;
3296                 goto err;
3297         }
3298
3299         req = cmd->va;
3300         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3301                                OPCODE_COMMON_GET_PROFILE_CONFIG,
3302                                cmd->size, wrb, cmd);
3303
3304         req->type = ACTIVE_PROFILE_TYPE;
3305         req->hdr.domain = domain;
3306         if (!lancer_chip(adapter))
3307                 req->hdr.version = 1;
3308
3309         status = be_mcc_notify_wait(adapter);
3310
3311 err:
3312         spin_unlock_bh(&adapter->mcc_lock);
3313         return status;
3314 }
3315
3316 /* Uses sync mcc, if MCCQ is already created otherwise mbox */
3317 int be_cmd_get_profile_config(struct be_adapter *adapter,
3318                               struct be_resources *res, u8 domain)
3319 {
3320         struct be_cmd_resp_get_profile_config *resp;
3321         struct be_pcie_res_desc *pcie;
3322         struct be_nic_res_desc *nic;
3323         struct be_queue_info *mccq = &adapter->mcc_obj.q;
3324         struct be_dma_mem cmd;
3325         u32 desc_count;
3326         int status;
3327
3328         memset(&cmd, 0, sizeof(struct be_dma_mem));
3329         cmd.size = sizeof(struct be_cmd_resp_get_profile_config);
3330         cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
3331         if (!cmd.va)
3332                 return -ENOMEM;
3333
3334         if (!mccq->created)
3335                 status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd);
3336         else
3337                 status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd);
3338         if (status)
3339                 goto err;
3340
3341         resp = cmd.va;
3342         desc_count = le32_to_cpu(resp->desc_count);
3343
3344         pcie =  be_get_pcie_desc(adapter->pdev->devfn, resp->func_param,
3345                                  desc_count);
3346         if (pcie)
3347                 res->max_vfs = le16_to_cpu(pcie->num_vfs);
3348
3349         nic = be_get_nic_desc(resp->func_param, desc_count);
3350         if (nic)
3351                 be_copy_nic_desc(res, nic);
3352
3353 err:
3354         if (cmd.va)
3355                 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
3356         return status;
3357 }
3358
3359 /* Currently only Lancer uses this command and it supports version 0 only
3360  * Uses sync mcc
3361  */
3362 int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps,
3363                               u8 domain)
3364 {
3365         struct be_mcc_wrb *wrb;
3366         struct be_cmd_req_set_profile_config *req;
3367         int status;
3368
3369         spin_lock_bh(&adapter->mcc_lock);
3370
3371         wrb = wrb_from_mccq(adapter);
3372         if (!wrb) {
3373                 status = -EBUSY;
3374                 goto err;
3375         }
3376
3377         req = embedded_payload(wrb);
3378
3379         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3380                                OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req),
3381                                wrb, NULL);
3382         req->hdr.domain = domain;
3383         req->desc_count = cpu_to_le32(1);
3384         req->nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0;
3385         req->nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0;
3386         req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV);
3387         req->nic_desc.pf_num = adapter->pf_number;
3388         req->nic_desc.vf_num = domain;
3389
3390         /* Mark fields invalid */
3391         req->nic_desc.unicast_mac_count = 0xFFFF;
3392         req->nic_desc.mcc_count = 0xFFFF;
3393         req->nic_desc.vlan_count = 0xFFFF;
3394         req->nic_desc.mcast_mac_count = 0xFFFF;
3395         req->nic_desc.txq_count = 0xFFFF;
3396         req->nic_desc.rq_count = 0xFFFF;
3397         req->nic_desc.rssq_count = 0xFFFF;
3398         req->nic_desc.lro_count = 0xFFFF;
3399         req->nic_desc.cq_count = 0xFFFF;
3400         req->nic_desc.toe_conn_count = 0xFFFF;
3401         req->nic_desc.eq_count = 0xFFFF;
3402         req->nic_desc.link_param = 0xFF;
3403         req->nic_desc.bw_min = 0xFFFFFFFF;
3404         req->nic_desc.acpi_params = 0xFF;
3405         req->nic_desc.wol_param = 0x0F;
3406
3407         /* Change BW */
3408         req->nic_desc.bw_min = cpu_to_le32(bps);
3409         req->nic_desc.bw_max = cpu_to_le32(bps);
3410         status = be_mcc_notify_wait(adapter);
3411 err:
3412         spin_unlock_bh(&adapter->mcc_lock);
3413         return status;
3414 }
3415
3416 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
3417                      int vf_num)
3418 {
3419         struct be_mcc_wrb *wrb;
3420         struct be_cmd_req_get_iface_list *req;
3421         struct be_cmd_resp_get_iface_list *resp;
3422         int status;
3423
3424         spin_lock_bh(&adapter->mcc_lock);
3425
3426         wrb = wrb_from_mccq(adapter);
3427         if (!wrb) {
3428                 status = -EBUSY;
3429                 goto err;
3430         }
3431         req = embedded_payload(wrb);
3432
3433         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3434                                OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp),
3435                                wrb, NULL);
3436         req->hdr.domain = vf_num + 1;
3437
3438         status = be_mcc_notify_wait(adapter);
3439         if (!status) {
3440                 resp = (struct be_cmd_resp_get_iface_list *)req;
3441                 vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id);
3442         }
3443
3444 err:
3445         spin_unlock_bh(&adapter->mcc_lock);
3446         return status;
3447 }
3448
3449 static int lancer_wait_idle(struct be_adapter *adapter)
3450 {
3451 #define SLIPORT_IDLE_TIMEOUT 30
3452         u32 reg_val;
3453         int status = 0, i;
3454
3455         for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) {
3456                 reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET);
3457                 if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0)
3458                         break;
3459
3460                 ssleep(1);
3461         }
3462
3463         if (i == SLIPORT_IDLE_TIMEOUT)
3464                 status = -1;
3465
3466         return status;
3467 }
3468
3469 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask)
3470 {
3471         int status = 0;
3472
3473         status = lancer_wait_idle(adapter);
3474         if (status)
3475                 return status;
3476
3477         iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET);
3478
3479         return status;
3480 }
3481
3482 /* Routine to check whether dump image is present or not */
3483 bool dump_present(struct be_adapter *adapter)
3484 {
3485         u32 sliport_status = 0;
3486
3487         sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3488         return !!(sliport_status & SLIPORT_STATUS_DIP_MASK);
3489 }
3490
3491 int lancer_initiate_dump(struct be_adapter *adapter)
3492 {
3493         int status;
3494
3495         /* give firmware reset and diagnostic dump */
3496         status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK |
3497                                      PHYSDEV_CONTROL_DD_MASK);
3498         if (status < 0) {
3499                 dev_err(&adapter->pdev->dev, "Firmware reset failed\n");
3500                 return status;
3501         }
3502
3503         status = lancer_wait_idle(adapter);
3504         if (status)
3505                 return status;
3506
3507         if (!dump_present(adapter)) {
3508                 dev_err(&adapter->pdev->dev, "Dump image not present\n");
3509                 return -1;
3510         }
3511
3512         return 0;
3513 }
3514
3515 /* Uses sync mcc */
3516 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain)
3517 {
3518         struct be_mcc_wrb *wrb;
3519         struct be_cmd_enable_disable_vf *req;
3520         int status;
3521
3522         if (!lancer_chip(adapter))
3523                 return 0;
3524
3525         spin_lock_bh(&adapter->mcc_lock);
3526
3527         wrb = wrb_from_mccq(adapter);
3528         if (!wrb) {
3529                 status = -EBUSY;
3530                 goto err;
3531         }
3532
3533         req = embedded_payload(wrb);
3534
3535         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3536                                OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req),
3537                                wrb, NULL);
3538
3539         req->hdr.domain = domain;
3540         req->enable = 1;
3541         status = be_mcc_notify_wait(adapter);
3542 err:
3543         spin_unlock_bh(&adapter->mcc_lock);
3544         return status;
3545 }
3546
3547 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable)
3548 {
3549         struct be_mcc_wrb *wrb;
3550         struct be_cmd_req_intr_set *req;
3551         int status;
3552
3553         if (mutex_lock_interruptible(&adapter->mbox_lock))
3554                 return -1;
3555
3556         wrb = wrb_from_mbox(adapter);
3557
3558         req = embedded_payload(wrb);
3559
3560         be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3561                                OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req),
3562                                wrb, NULL);
3563
3564         req->intr_enabled = intr_enable;
3565
3566         status = be_mbox_notify_wait(adapter);
3567
3568         mutex_unlock(&adapter->mbox_lock);
3569         return status;
3570 }
3571
3572 int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,
3573                         int wrb_payload_size, u16 *cmd_status, u16 *ext_status)
3574 {
3575         struct be_adapter *adapter = netdev_priv(netdev_handle);
3576         struct be_mcc_wrb *wrb;
3577         struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload;
3578         struct be_cmd_req_hdr *req;
3579         struct be_cmd_resp_hdr *resp;
3580         int status;
3581
3582         spin_lock_bh(&adapter->mcc_lock);
3583
3584         wrb = wrb_from_mccq(adapter);
3585         if (!wrb) {
3586                 status = -EBUSY;
3587                 goto err;
3588         }
3589         req = embedded_payload(wrb);
3590         resp = embedded_payload(wrb);
3591
3592         be_wrb_cmd_hdr_prepare(req, hdr->subsystem,
3593                                hdr->opcode, wrb_payload_size, wrb, NULL);
3594         memcpy(req, wrb_payload, wrb_payload_size);
3595         be_dws_cpu_to_le(req, wrb_payload_size);
3596
3597         status = be_mcc_notify_wait(adapter);
3598         if (cmd_status)
3599                 *cmd_status = (status & 0xffff);
3600         if (ext_status)
3601                 *ext_status = 0;
3602         memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length);
3603         be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length);
3604 err:
3605         spin_unlock_bh(&adapter->mcc_lock);
3606         return status;
3607 }
3608 EXPORT_SYMBOL(be_roce_mcc_cmd);