drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2013 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66
  61 };
  62
  63 #define MCC_ADDL_STS_INSUFFICIENT_RESOURCES     0x16
  64
  65 #define CQE_STATUS_COMPL_MASK           0xFFFF
  66 #define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
  67 #define CQE_STATUS_EXTD_MASK            0xFFFF
  68 #define CQE_STATUS_EXTD_SHIFT           16      /* bits 16 - 31 */
  69
  70 struct be_mcc_compl {
  71         u32 status;             /* dword 0 */
  72         u32 tag0;               /* dword 1 */
  73         u32 tag1;               /* dword 2 */
  74         u32 flags;              /* dword 3 */
  75 };
  76
  77 /* When the async bit of mcc_compl is set, the last 4 bytes of
  78  * mcc_compl is interpreted as follows:
  79  */
  80 #define ASYNC_TRAILER_EVENT_CODE_SHIFT  8       /* bits 8 - 15 */
  81 #define ASYNC_TRAILER_EVENT_CODE_MASK   0xFF
  82 #define ASYNC_TRAILER_EVENT_TYPE_SHIFT  16
  83 #define ASYNC_TRAILER_EVENT_TYPE_MASK   0xFF
  84 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  85 #define ASYNC_EVENT_CODE_GRP_5          0x5
  86 #define ASYNC_EVENT_QOS_SPEED           0x1
  87 #define ASYNC_EVENT_COS_PRIORITY        0x2
  88 #define ASYNC_EVENT_PVID_STATE          0x3
  89 #define ASYNC_EVENT_CODE_QNQ            0x6
  90 #define ASYNC_DEBUG_EVENT_TYPE_QNQ      1
  91
  92 struct be_async_event_trailer {
  93         u32 code;
  94 };
  95
  96 enum {
  97         LINK_DOWN       = 0x0,
  98         LINK_UP         = 0x1
  99 };
 100 #define LINK_STATUS_MASK                        0x1
 101 #define LOGICAL_LINK_STATUS_MASK                0x2
 102
 103 /* When the event code of an async trailer is link-state, the mcc_compl
 104  * must be interpreted as follows
 105  */
 106 struct be_async_event_link_state {
 107         u8 physical_port;
 108         u8 port_link_status;
 109         u8 port_duplex;
 110         u8 port_speed;
 111         u8 port_fault;
 112         u8 rsvd0[7];
 113         struct be_async_event_trailer trailer;
 114 } __packed;
 115
 116 /* When the event code of an async trailer is GRP-5 and event_type is QOS_SPEED
 117  * the mcc_compl must be interpreted as follows
 118  */
 119 struct be_async_event_grp5_qos_link_speed {
 120         u8 physical_port;
 121         u8 rsvd[5];
 122         u16 qos_link_speed;
 123         u32 event_tag;
 124         struct be_async_event_trailer trailer;
 125 } __packed;
 126
 127 /* When the event code of an async trailer is GRP5 and event type is
 128  * CoS-Priority, the mcc_compl must be interpreted as follows
 129  */
 130 struct be_async_event_grp5_cos_priority {
 131         u8 physical_port;
 132         u8 available_priority_bmap;
 133         u8 reco_default_priority;
 134         u8 valid;
 135         u8 rsvd0;
 136         u8 event_tag;
 137         struct be_async_event_trailer trailer;
 138 } __packed;
 139
 140 /* When the event code of an async trailer is GRP5 and event type is
 141  * PVID state, the mcc_compl must be interpreted as follows
 142  */
 143 struct be_async_event_grp5_pvid_state {
 144         u8 enabled;
 145         u8 rsvd0;
 146         u16 tag;
 147         u32 event_tag;
 148         u32 rsvd1;
 149         struct be_async_event_trailer trailer;
 150 } __packed;
 151
 152 /* async event indicating outer VLAN tag in QnQ */
 153 struct be_async_event_qnq {
 154         u8 valid;       /* Indicates if outer VLAN is valid */
 155         u8 rsvd0;
 156         u16 vlan_tag;
 157         u32 event_tag;
 158         u8 rsvd1[4];
 159         struct be_async_event_trailer trailer;
 160 } __packed;
 161
 162 struct be_mcc_mailbox {
 163         struct be_mcc_wrb wrb;
 164         struct be_mcc_compl compl;
 165 };
 166
 167 #define CMD_SUBSYSTEM_COMMON    0x1
 168 #define CMD_SUBSYSTEM_ETH       0x3
 169 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 170
 171 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 172 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 173 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 174 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 175 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 176 #define OPCODE_COMMON_READ_FLASHROM                     6
 177 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 178 #define OPCODE_COMMON_CQ_CREATE                         12
 179 #define OPCODE_COMMON_EQ_CREATE                         13
 180 #define OPCODE_COMMON_MCC_CREATE                        21
 181 #define OPCODE_COMMON_SET_QOS                           28
 182 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 183 #define OPCODE_COMMON_SEEPROM_READ                      30
 184 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 185 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 186 #define OPCODE_COMMON_GET_FW_VERSION                    35
 187 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 188 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 189 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 190 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 191 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 192 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 193 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 194 #define OPCODE_COMMON_MCC_DESTROY                       53
 195 #define OPCODE_COMMON_CQ_DESTROY                        54
 196 #define OPCODE_COMMON_EQ_DESTROY                        55
 197 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 198 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 199 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 200 #define OPCODE_COMMON_FUNCTION_RESET                    61
 201 #define OPCODE_COMMON_MANAGE_FAT                        68
 202 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 203 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 204 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 205 #define OPCODE_COMMON_GET_PORT_NAME                     77
 206 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE              89
 207 #define OPCODE_COMMON_SET_FN_PRIVILEGES                 100
 208 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 209 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 210 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 211 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 212 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 213 #define OPCODE_COMMON_GET_MAC_LIST                      147
 214 #define OPCODE_COMMON_SET_MAC_LIST                      148
 215 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 216 #define OPCODE_COMMON_GET_FUNC_CONFIG                   160
 217 #define OPCODE_COMMON_GET_PROFILE_CONFIG                164
 218 #define OPCODE_COMMON_SET_PROFILE_CONFIG                165
 219 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 220 #define OPCODE_COMMON_GET_FN_PRIVILEGES                 170
 221 #define OPCODE_COMMON_READ_OBJECT                       171
 222 #define OPCODE_COMMON_WRITE_OBJECT                      172
 223 #define OPCODE_COMMON_GET_IFACE_LIST                    194
 224 #define OPCODE_COMMON_ENABLE_DISABLE_VF                 196
 225
 226 #define OPCODE_ETH_RSS_CONFIG                           1
 227 #define OPCODE_ETH_ACPI_CONFIG                          2
 228 #define OPCODE_ETH_PROMISCUOUS                          3
 229 #define OPCODE_ETH_GET_STATISTICS                       4
 230 #define OPCODE_ETH_TX_CREATE                            7
 231 #define OPCODE_ETH_RX_CREATE                            8
 232 #define OPCODE_ETH_TX_DESTROY                           9
 233 #define OPCODE_ETH_RX_DESTROY                           10
 234 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 235 #define OPCODE_ETH_GET_PPORT_STATS                      18
 236
 237 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 238 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 239 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 240
 241 struct be_cmd_req_hdr {
 242         u8 opcode;              /* dword 0 */
 243         u8 subsystem;           /* dword 0 */
 244         u8 port_number;         /* dword 0 */
 245         u8 domain;              /* dword 0 */
 246         u32 timeout;            /* dword 1 */
 247         u32 request_length;     /* dword 2 */
 248         u8 version;             /* dword 3 */
 249         u8 rsvd[3];             /* dword 3 */
 250 };
 251
 252 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 253 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 254 struct be_cmd_resp_hdr {
 255         u8 opcode;              /* dword 0 */
 256         u8 subsystem;           /* dword 0 */
 257         u8 rsvd[2];             /* dword 0 */
 258         u8 status;              /* dword 1 */
 259         u8 add_status;          /* dword 1 */
 260         u8 rsvd1[2];            /* dword 1 */
 261         u32 response_length;    /* dword 2 */
 262         u32 actual_resp_len;    /* dword 3 */
 263 };
 264
 265 struct phys_addr {
 266         u32 lo;
 267         u32 hi;
 268 };
 269
 270 /**************************
 271  * BE Command definitions *
 272  **************************/
 273
 274 /* Pseudo amap definition in which each bit of the actual structure is defined
 275  * as a byte: used to calculate offset/shift/mask of each field */
 276 struct amap_eq_context {
 277         u8 cidx[13];            /* dword 0*/
 278         u8 rsvd0[3];            /* dword 0*/
 279         u8 epidx[13];           /* dword 0*/
 280         u8 valid;               /* dword 0*/
 281         u8 rsvd1;               /* dword 0*/
 282         u8 size;                /* dword 0*/
 283         u8 pidx[13];            /* dword 1*/
 284         u8 rsvd2[3];            /* dword 1*/
 285         u8 pd[10];              /* dword 1*/
 286         u8 count[3];            /* dword 1*/
 287         u8 solevent;            /* dword 1*/
 288         u8 stalled;             /* dword 1*/
 289         u8 armed;               /* dword 1*/
 290         u8 rsvd3[4];            /* dword 2*/
 291         u8 func[8];             /* dword 2*/
 292         u8 rsvd4;               /* dword 2*/
 293         u8 delaymult[10];       /* dword 2*/
 294         u8 rsvd5[2];            /* dword 2*/
 295         u8 phase[2];            /* dword 2*/
 296         u8 nodelay;             /* dword 2*/
 297         u8 rsvd6[4];            /* dword 2*/
 298         u8 rsvd7[32];           /* dword 3*/
 299 } __packed;
 300
 301 struct be_cmd_req_eq_create {
 302         struct be_cmd_req_hdr hdr;
 303         u16 num_pages;          /* sword */
 304         u16 rsvd0;              /* sword */
 305         u8 context[sizeof(struct amap_eq_context) / 8];
 306         struct phys_addr pages[8];
 307 } __packed;
 308
 309 struct be_cmd_resp_eq_create {
 310         struct be_cmd_resp_hdr resp_hdr;
 311         u16 eq_id;              /* sword */
 312         u16 msix_idx;           /* available only in v2 */
 313 } __packed;
 314
 315 /******************** Mac query ***************************/
 316 enum {
 317         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 318         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 319         MAC_ADDRESS_TYPE_PD = 0x2,
 320         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 321 };
 322
 323 struct mac_addr {
 324         u16 size_of_struct;
 325         u8 addr[ETH_ALEN];
 326 } __packed;
 327
 328 struct be_cmd_req_mac_query {
 329         struct be_cmd_req_hdr hdr;
 330         u8 type;
 331         u8 permanent;
 332         u16 if_id;
 333         u32 pmac_id;
 334 } __packed;
 335
 336 struct be_cmd_resp_mac_query {
 337         struct be_cmd_resp_hdr hdr;
 338         struct mac_addr mac;
 339 };
 340
 341 /******************** PMac Add ***************************/
 342 struct be_cmd_req_pmac_add {
 343         struct be_cmd_req_hdr hdr;
 344         u32 if_id;
 345         u8 mac_address[ETH_ALEN];
 346         u8 rsvd0[2];
 347 } __packed;
 348
 349 struct be_cmd_resp_pmac_add {
 350         struct be_cmd_resp_hdr hdr;
 351         u32 pmac_id;
 352 };
 353
 354 /******************** PMac Del ***************************/
 355 struct be_cmd_req_pmac_del {
 356         struct be_cmd_req_hdr hdr;
 357         u32 if_id;
 358         u32 pmac_id;
 359 };
 360
 361 /******************** Create CQ ***************************/
 362 /* Pseudo amap definition in which each bit of the actual structure is defined
 363  * as a byte: used to calculate offset/shift/mask of each field */
 364 struct amap_cq_context_be {
 365         u8 cidx[11];            /* dword 0*/
 366         u8 rsvd0;               /* dword 0*/
 367         u8 coalescwm[2];        /* dword 0*/
 368         u8 nodelay;             /* dword 0*/
 369         u8 epidx[11];           /* dword 0*/
 370         u8 rsvd1;               /* dword 0*/
 371         u8 count[2];            /* dword 0*/
 372         u8 valid;               /* dword 0*/
 373         u8 solevent;            /* dword 0*/
 374         u8 eventable;           /* dword 0*/
 375         u8 pidx[11];            /* dword 1*/
 376         u8 rsvd2;               /* dword 1*/
 377         u8 pd[10];              /* dword 1*/
 378         u8 eqid[8];             /* dword 1*/
 379         u8 stalled;             /* dword 1*/
 380         u8 armed;               /* dword 1*/
 381         u8 rsvd3[4];            /* dword 2*/
 382         u8 func[8];             /* dword 2*/
 383         u8 rsvd4[20];           /* dword 2*/
 384         u8 rsvd5[32];           /* dword 3*/
 385 } __packed;
 386
 387 struct amap_cq_context_v2 {
 388         u8 rsvd0[12];           /* dword 0*/
 389         u8 coalescwm[2];        /* dword 0*/
 390         u8 nodelay;             /* dword 0*/
 391         u8 rsvd1[12];           /* dword 0*/
 392         u8 count[2];            /* dword 0*/
 393         u8 valid;               /* dword 0*/
 394         u8 rsvd2;               /* dword 0*/
 395         u8 eventable;           /* dword 0*/
 396         u8 eqid[16];            /* dword 1*/
 397         u8 rsvd3[15];           /* dword 1*/
 398         u8 armed;               /* dword 1*/
 399         u8 rsvd4[32];           /* dword 2*/
 400         u8 rsvd5[32];           /* dword 3*/
 401 } __packed;
 402
 403 struct be_cmd_req_cq_create {
 404         struct be_cmd_req_hdr hdr;
 405         u16 num_pages;
 406         u8 page_size;
 407         u8 rsvd0;
 408         u8 context[sizeof(struct amap_cq_context_be) / 8];
 409         struct phys_addr pages[8];
 410 } __packed;
 411
 412
 413 struct be_cmd_resp_cq_create {
 414         struct be_cmd_resp_hdr hdr;
 415         u16 cq_id;
 416         u16 rsvd0;
 417 } __packed;
 418
 419 struct be_cmd_req_get_fat {
 420         struct be_cmd_req_hdr hdr;
 421         u32 fat_operation;
 422         u32 read_log_offset;
 423         u32 read_log_length;
 424         u32 data_buffer_size;
 425         u32 data_buffer[1];
 426 } __packed;
 427
 428 struct be_cmd_resp_get_fat {
 429         struct be_cmd_resp_hdr hdr;
 430         u32 log_size;
 431         u32 read_log_length;
 432         u32 rsvd[2];
 433         u32 data_buffer[1];
 434 } __packed;
 435
 436
 437 /******************** Create MCCQ ***************************/
 438 /* Pseudo amap definition in which each bit of the actual structure is defined
 439  * as a byte: used to calculate offset/shift/mask of each field */
 440 struct amap_mcc_context_be {
 441         u8 con_index[14];
 442         u8 rsvd0[2];
 443         u8 ring_size[4];
 444         u8 fetch_wrb;
 445         u8 fetch_r2t;
 446         u8 cq_id[10];
 447         u8 prod_index[14];
 448         u8 fid[8];
 449         u8 pdid[9];
 450         u8 valid;
 451         u8 rsvd1[32];
 452         u8 rsvd2[32];
 453 } __packed;
 454
 455 struct amap_mcc_context_lancer {
 456         u8 async_cq_id[16];
 457         u8 ring_size[4];
 458         u8 rsvd0[12];
 459         u8 rsvd1[31];
 460         u8 valid;
 461         u8 async_cq_valid[1];
 462         u8 rsvd2[31];
 463         u8 rsvd3[32];
 464 } __packed;
 465
 466 struct be_cmd_req_mcc_create {
 467         struct be_cmd_req_hdr hdr;
 468         u16 num_pages;
 469         u16 cq_id;
 470         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 471         struct phys_addr pages[8];
 472 } __packed;
 473
 474 struct be_cmd_req_mcc_ext_create {
 475         struct be_cmd_req_hdr hdr;
 476         u16 num_pages;
 477         u16 cq_id;
 478         u32 async_event_bitmap[1];
 479         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 480         struct phys_addr pages[8];
 481 } __packed;
 482
 483 struct be_cmd_resp_mcc_create {
 484         struct be_cmd_resp_hdr hdr;
 485         u16 id;
 486         u16 rsvd0;
 487 } __packed;
 488
 489 /******************** Create TxQ ***************************/
 490 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 491 #define BE_ULP1_NUM                             1
 492
 493 struct be_cmd_req_eth_tx_create {
 494         struct be_cmd_req_hdr hdr;
 495         u8 num_pages;
 496         u8 ulp_num;
 497         u16 type;
 498         u16 if_id;
 499         u8 queue_size;
 500         u8 rsvd0;
 501         u32 rsvd1;
 502         u16 cq_id;
 503         u16 rsvd2;
 504         u32 rsvd3[13];
 505         struct phys_addr pages[8];
 506 } __packed;
 507
 508 struct be_cmd_resp_eth_tx_create {
 509         struct be_cmd_resp_hdr hdr;
 510         u16 cid;
 511         u16 rid;
 512         u32 db_offset;
 513         u32 rsvd0[4];
 514 } __packed;
 515
 516 /******************** Create RxQ ***************************/
 517 struct be_cmd_req_eth_rx_create {
 518         struct be_cmd_req_hdr hdr;
 519         u16 cq_id;
 520         u8 frag_size;
 521         u8 num_pages;
 522         struct phys_addr pages[2];
 523         u32 interface_id;
 524         u16 max_frame_size;
 525         u16 rsvd0;
 526         u32 rss_queue;
 527 } __packed;
 528
 529 struct be_cmd_resp_eth_rx_create {
 530         struct be_cmd_resp_hdr hdr;
 531         u16 id;
 532         u8 rss_id;
 533         u8 rsvd0;
 534 } __packed;
 535
 536 /******************** Q Destroy  ***************************/
 537 /* Type of Queue to be destroyed */
 538 enum {
 539         QTYPE_EQ = 1,
 540         QTYPE_CQ,
 541         QTYPE_TXQ,
 542         QTYPE_RXQ,
 543         QTYPE_MCCQ
 544 };
 545
 546 struct be_cmd_req_q_destroy {
 547         struct be_cmd_req_hdr hdr;
 548         u16 id;
 549         u16 bypass_flush;       /* valid only for rx q destroy */
 550 } __packed;
 551
 552 /************ I/f Create (it's actually I/f Config Create)**********/
 553
 554 /* Capability flags for the i/f */
 555 enum be_if_flags {
 556         BE_IF_FLAGS_RSS = 0x4,
 557         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 558         BE_IF_FLAGS_BROADCAST = 0x10,
 559         BE_IF_FLAGS_UNTAGGED = 0x20,
 560         BE_IF_FLAGS_ULP = 0x40,
 561         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 562         BE_IF_FLAGS_VLAN = 0x100,
 563         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 564         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 565         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 566         BE_IF_FLAGS_MULTICAST = 0x1000
 567 };
 568
 569 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
 570                          BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 571                          BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
 572                          BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
 573                          BE_IF_FLAGS_UNTAGGED)
 574
 575 /* An RX interface is an object with one or more MAC addresses and
 576  * filtering capabilities. */
 577 struct be_cmd_req_if_create {
 578         struct be_cmd_req_hdr hdr;
 579         u32 version;            /* ignore currently */
 580         u32 capability_flags;
 581         u32 enable_flags;
 582         u8 mac_addr[ETH_ALEN];
 583         u8 rsvd0;
 584         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 585         u32 vlan_tag;    /* not used currently */
 586 } __packed;
 587
 588 struct be_cmd_resp_if_create {
 589         struct be_cmd_resp_hdr hdr;
 590         u32 interface_id;
 591         u32 pmac_id;
 592 };
 593
 594 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 595 struct be_cmd_req_if_destroy {
 596         struct be_cmd_req_hdr hdr;
 597         u32 interface_id;
 598 };
 599
 600 /*************** HW Stats Get **********************************/
 601 struct be_port_rxf_stats_v0 {
 602         u32 rx_bytes_lsd;       /* dword 0*/
 603         u32 rx_bytes_msd;       /* dword 1*/
 604         u32 rx_total_frames;    /* dword 2*/
 605         u32 rx_unicast_frames;  /* dword 3*/
 606         u32 rx_multicast_frames;        /* dword 4*/
 607         u32 rx_broadcast_frames;        /* dword 5*/
 608         u32 rx_crc_errors;      /* dword 6*/
 609         u32 rx_alignment_symbol_errors; /* dword 7*/
 610         u32 rx_pause_frames;    /* dword 8*/
 611         u32 rx_control_frames;  /* dword 9*/
 612         u32 rx_in_range_errors; /* dword 10*/
 613         u32 rx_out_range_errors;        /* dword 11*/
 614         u32 rx_frame_too_long;  /* dword 12*/
 615         u32 rx_address_filtered;        /* dword 13*/
 616         u32 rx_vlan_filtered;   /* dword 14*/
 617         u32 rx_dropped_too_small;       /* dword 15*/
 618         u32 rx_dropped_too_short;       /* dword 16*/
 619         u32 rx_dropped_header_too_small;        /* dword 17*/
 620         u32 rx_dropped_tcp_length;      /* dword 18*/
 621         u32 rx_dropped_runt;    /* dword 19*/
 622         u32 rx_64_byte_packets; /* dword 20*/
 623         u32 rx_65_127_byte_packets;     /* dword 21*/
 624         u32 rx_128_256_byte_packets;    /* dword 22*/
 625         u32 rx_256_511_byte_packets;    /* dword 23*/
 626         u32 rx_512_1023_byte_packets;   /* dword 24*/
 627         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 628         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 629         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 630         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 631         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 632         u32 rx_ip_checksum_errs;        /* dword 30*/
 633         u32 rx_tcp_checksum_errs;       /* dword 31*/
 634         u32 rx_udp_checksum_errs;       /* dword 32*/
 635         u32 rx_non_rss_packets; /* dword 33*/
 636         u32 rx_ipv4_packets;    /* dword 34*/
 637         u32 rx_ipv6_packets;    /* dword 35*/
 638         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 639         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 640         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 641         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 642         u32 rx_chute1_packets;  /* dword 40*/
 643         u32 rx_chute2_packets;  /* dword 41*/
 644         u32 rx_chute3_packets;  /* dword 42*/
 645         u32 rx_management_packets;      /* dword 43*/
 646         u32 rx_switched_unicast_packets;        /* dword 44*/
 647         u32 rx_switched_multicast_packets;      /* dword 45*/
 648         u32 rx_switched_broadcast_packets;      /* dword 46*/
 649         u32 tx_bytes_lsd;       /* dword 47*/
 650         u32 tx_bytes_msd;       /* dword 48*/
 651         u32 tx_unicastframes;   /* dword 49*/
 652         u32 tx_multicastframes; /* dword 50*/
 653         u32 tx_broadcastframes; /* dword 51*/
 654         u32 tx_pauseframes;     /* dword 52*/
 655         u32 tx_controlframes;   /* dword 53*/
 656         u32 tx_64_byte_packets; /* dword 54*/
 657         u32 tx_65_127_byte_packets;     /* dword 55*/
 658         u32 tx_128_256_byte_packets;    /* dword 56*/
 659         u32 tx_256_511_byte_packets;    /* dword 57*/
 660         u32 tx_512_1023_byte_packets;   /* dword 58*/
 661         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 662         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 663         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 664         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 665         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 666         u32 rx_fifo_overflow;   /* dword 64*/
 667         u32 rx_input_fifo_overflow;     /* dword 65*/
 668 };
 669
 670 struct be_rxf_stats_v0 {
 671         struct be_port_rxf_stats_v0 port[2];
 672         u32 rx_drops_no_pbuf;   /* dword 132*/
 673         u32 rx_drops_no_txpb;   /* dword 133*/
 674         u32 rx_drops_no_erx_descr;      /* dword 134*/
 675         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 676         u32 management_rx_port_packets; /* dword 136*/
 677         u32 management_rx_port_bytes;   /* dword 137*/
 678         u32 management_rx_port_pause_frames;    /* dword 138*/
 679         u32 management_rx_port_errors;  /* dword 139*/
 680         u32 management_tx_port_packets; /* dword 140*/
 681         u32 management_tx_port_bytes;   /* dword 141*/
 682         u32 management_tx_port_pause;   /* dword 142*/
 683         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 684         u32 rx_drops_too_many_frags;    /* dword 144*/
 685         u32 rx_drops_invalid_ring;      /* dword 145*/
 686         u32 forwarded_packets;  /* dword 146*/
 687         u32 rx_drops_mtu;       /* dword 147*/
 688         u32 rsvd0[7];
 689         u32 port0_jabber_events;
 690         u32 port1_jabber_events;
 691         u32 rsvd1[6];
 692 };
 693
 694 struct be_erx_stats_v0 {
 695         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 696         u32 rsvd[4];
 697 };
 698
 699 struct be_pmem_stats {
 700         u32 eth_red_drops;
 701         u32 rsvd[5];
 702 };
 703
 704 struct be_hw_stats_v0 {
 705         struct be_rxf_stats_v0 rxf;
 706         u32 rsvd[48];
 707         struct be_erx_stats_v0 erx;
 708         struct be_pmem_stats pmem;
 709 };
 710
 711 struct be_cmd_req_get_stats_v0 {
 712         struct be_cmd_req_hdr hdr;
 713         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 714 };
 715
 716 struct be_cmd_resp_get_stats_v0 {
 717         struct be_cmd_resp_hdr hdr;
 718         struct be_hw_stats_v0 hw_stats;
 719 };
 720
 721 struct lancer_pport_stats {
 722         u32 tx_packets_lo;
 723         u32 tx_packets_hi;
 724         u32 tx_unicast_packets_lo;
 725         u32 tx_unicast_packets_hi;
 726         u32 tx_multicast_packets_lo;
 727         u32 tx_multicast_packets_hi;
 728         u32 tx_broadcast_packets_lo;
 729         u32 tx_broadcast_packets_hi;
 730         u32 tx_bytes_lo;
 731         u32 tx_bytes_hi;
 732         u32 tx_unicast_bytes_lo;
 733         u32 tx_unicast_bytes_hi;
 734         u32 tx_multicast_bytes_lo;
 735         u32 tx_multicast_bytes_hi;
 736         u32 tx_broadcast_bytes_lo;
 737         u32 tx_broadcast_bytes_hi;
 738         u32 tx_discards_lo;
 739         u32 tx_discards_hi;
 740         u32 tx_errors_lo;
 741         u32 tx_errors_hi;
 742         u32 tx_pause_frames_lo;
 743         u32 tx_pause_frames_hi;
 744         u32 tx_pause_on_frames_lo;
 745         u32 tx_pause_on_frames_hi;
 746         u32 tx_pause_off_frames_lo;
 747         u32 tx_pause_off_frames_hi;
 748         u32 tx_internal_mac_errors_lo;
 749         u32 tx_internal_mac_errors_hi;
 750         u32 tx_control_frames_lo;
 751         u32 tx_control_frames_hi;
 752         u32 tx_packets_64_bytes_lo;
 753         u32 tx_packets_64_bytes_hi;
 754         u32 tx_packets_65_to_127_bytes_lo;
 755         u32 tx_packets_65_to_127_bytes_hi;
 756         u32 tx_packets_128_to_255_bytes_lo;
 757         u32 tx_packets_128_to_255_bytes_hi;
 758         u32 tx_packets_256_to_511_bytes_lo;
 759         u32 tx_packets_256_to_511_bytes_hi;
 760         u32 tx_packets_512_to_1023_bytes_lo;
 761         u32 tx_packets_512_to_1023_bytes_hi;
 762         u32 tx_packets_1024_to_1518_bytes_lo;
 763         u32 tx_packets_1024_to_1518_bytes_hi;
 764         u32 tx_packets_1519_to_2047_bytes_lo;
 765         u32 tx_packets_1519_to_2047_bytes_hi;
 766         u32 tx_packets_2048_to_4095_bytes_lo;
 767         u32 tx_packets_2048_to_4095_bytes_hi;
 768         u32 tx_packets_4096_to_8191_bytes_lo;
 769         u32 tx_packets_4096_to_8191_bytes_hi;
 770         u32 tx_packets_8192_to_9216_bytes_lo;
 771         u32 tx_packets_8192_to_9216_bytes_hi;
 772         u32 tx_lso_packets_lo;
 773         u32 tx_lso_packets_hi;
 774         u32 rx_packets_lo;
 775         u32 rx_packets_hi;
 776         u32 rx_unicast_packets_lo;
 777         u32 rx_unicast_packets_hi;
 778         u32 rx_multicast_packets_lo;
 779         u32 rx_multicast_packets_hi;
 780         u32 rx_broadcast_packets_lo;
 781         u32 rx_broadcast_packets_hi;
 782         u32 rx_bytes_lo;
 783         u32 rx_bytes_hi;
 784         u32 rx_unicast_bytes_lo;
 785         u32 rx_unicast_bytes_hi;
 786         u32 rx_multicast_bytes_lo;
 787         u32 rx_multicast_bytes_hi;
 788         u32 rx_broadcast_bytes_lo;
 789         u32 rx_broadcast_bytes_hi;
 790         u32 rx_unknown_protos;
 791         u32 rsvd_69; /* Word 69 is reserved */
 792         u32 rx_discards_lo;
 793         u32 rx_discards_hi;
 794         u32 rx_errors_lo;
 795         u32 rx_errors_hi;
 796         u32 rx_crc_errors_lo;
 797         u32 rx_crc_errors_hi;
 798         u32 rx_alignment_errors_lo;
 799         u32 rx_alignment_errors_hi;
 800         u32 rx_symbol_errors_lo;
 801         u32 rx_symbol_errors_hi;
 802         u32 rx_pause_frames_lo;
 803         u32 rx_pause_frames_hi;
 804         u32 rx_pause_on_frames_lo;
 805         u32 rx_pause_on_frames_hi;
 806         u32 rx_pause_off_frames_lo;
 807         u32 rx_pause_off_frames_hi;
 808         u32 rx_frames_too_long_lo;
 809         u32 rx_frames_too_long_hi;
 810         u32 rx_internal_mac_errors_lo;
 811         u32 rx_internal_mac_errors_hi;
 812         u32 rx_undersize_packets;
 813         u32 rx_oversize_packets;
 814         u32 rx_fragment_packets;
 815         u32 rx_jabbers;
 816         u32 rx_control_frames_lo;
 817         u32 rx_control_frames_hi;
 818         u32 rx_control_frames_unknown_opcode_lo;
 819         u32 rx_control_frames_unknown_opcode_hi;
 820         u32 rx_in_range_errors;
 821         u32 rx_out_of_range_errors;
 822         u32 rx_address_filtered;
 823         u32 rx_vlan_filtered;
 824         u32 rx_dropped_too_small;
 825         u32 rx_dropped_too_short;
 826         u32 rx_dropped_header_too_small;
 827         u32 rx_dropped_invalid_tcp_length;
 828         u32 rx_dropped_runt;
 829         u32 rx_ip_checksum_errors;
 830         u32 rx_tcp_checksum_errors;
 831         u32 rx_udp_checksum_errors;
 832         u32 rx_non_rss_packets;
 833         u32 rsvd_111;
 834         u32 rx_ipv4_packets_lo;
 835         u32 rx_ipv4_packets_hi;
 836         u32 rx_ipv6_packets_lo;
 837         u32 rx_ipv6_packets_hi;
 838         u32 rx_ipv4_bytes_lo;
 839         u32 rx_ipv4_bytes_hi;
 840         u32 rx_ipv6_bytes_lo;
 841         u32 rx_ipv6_bytes_hi;
 842         u32 rx_nic_packets_lo;
 843         u32 rx_nic_packets_hi;
 844         u32 rx_tcp_packets_lo;
 845         u32 rx_tcp_packets_hi;
 846         u32 rx_iscsi_packets_lo;
 847         u32 rx_iscsi_packets_hi;
 848         u32 rx_management_packets_lo;
 849         u32 rx_management_packets_hi;
 850         u32 rx_switched_unicast_packets_lo;
 851         u32 rx_switched_unicast_packets_hi;
 852         u32 rx_switched_multicast_packets_lo;
 853         u32 rx_switched_multicast_packets_hi;
 854         u32 rx_switched_broadcast_packets_lo;
 855         u32 rx_switched_broadcast_packets_hi;
 856         u32 num_forwards_lo;
 857         u32 num_forwards_hi;
 858         u32 rx_fifo_overflow;
 859         u32 rx_input_fifo_overflow;
 860         u32 rx_drops_too_many_frags_lo;
 861         u32 rx_drops_too_many_frags_hi;
 862         u32 rx_drops_invalid_queue;
 863         u32 rsvd_141;
 864         u32 rx_drops_mtu_lo;
 865         u32 rx_drops_mtu_hi;
 866         u32 rx_packets_64_bytes_lo;
 867         u32 rx_packets_64_bytes_hi;
 868         u32 rx_packets_65_to_127_bytes_lo;
 869         u32 rx_packets_65_to_127_bytes_hi;
 870         u32 rx_packets_128_to_255_bytes_lo;
 871         u32 rx_packets_128_to_255_bytes_hi;
 872         u32 rx_packets_256_to_511_bytes_lo;
 873         u32 rx_packets_256_to_511_bytes_hi;
 874         u32 rx_packets_512_to_1023_bytes_lo;
 875         u32 rx_packets_512_to_1023_bytes_hi;
 876         u32 rx_packets_1024_to_1518_bytes_lo;
 877         u32 rx_packets_1024_to_1518_bytes_hi;
 878         u32 rx_packets_1519_to_2047_bytes_lo;
 879         u32 rx_packets_1519_to_2047_bytes_hi;
 880         u32 rx_packets_2048_to_4095_bytes_lo;
 881         u32 rx_packets_2048_to_4095_bytes_hi;
 882         u32 rx_packets_4096_to_8191_bytes_lo;
 883         u32 rx_packets_4096_to_8191_bytes_hi;
 884         u32 rx_packets_8192_to_9216_bytes_lo;
 885         u32 rx_packets_8192_to_9216_bytes_hi;
 886 };
 887
 888 struct pport_stats_params {
 889         u16 pport_num;
 890         u8 rsvd;
 891         u8 reset_stats;
 892 };
 893
 894 struct lancer_cmd_req_pport_stats {
 895         struct be_cmd_req_hdr hdr;
 896         union {
 897                 struct pport_stats_params params;
 898                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 899         } cmd_params;
 900 };
 901
 902 struct lancer_cmd_resp_pport_stats {
 903         struct be_cmd_resp_hdr hdr;
 904         struct lancer_pport_stats pport_stats;
 905 };
 906
 907 static inline struct lancer_pport_stats*
 908         pport_stats_from_cmd(struct be_adapter *adapter)
 909 {
 910         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 911         return &cmd->pport_stats;
 912 }
 913
 914 struct be_cmd_req_get_cntl_addnl_attribs {
 915         struct be_cmd_req_hdr hdr;
 916         u8 rsvd[8];
 917 };
 918
 919 struct be_cmd_resp_get_cntl_addnl_attribs {
 920         struct be_cmd_resp_hdr hdr;
 921         u16 ipl_file_number;
 922         u8 ipl_file_version;
 923         u8 rsvd0;
 924         u8 on_die_temperature; /* in degrees centigrade*/
 925         u8 rsvd1[3];
 926 };
 927
 928 struct be_cmd_req_vlan_config {
 929         struct be_cmd_req_hdr hdr;
 930         u8 interface_id;
 931         u8 promiscuous;
 932         u8 untagged;
 933         u8 num_vlan;
 934         u16 normal_vlan[64];
 935 } __packed;
 936
 937 /******************* RX FILTER ******************************/
 938 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 939 struct macaddr {
 940         u8 byte[ETH_ALEN];
 941 };
 942
 943 struct be_cmd_req_rx_filter {
 944         struct be_cmd_req_hdr hdr;
 945         u32 global_flags_mask;
 946         u32 global_flags;
 947         u32 if_flags_mask;
 948         u32 if_flags;
 949         u32 if_id;
 950         u32 mcast_num;
 951         struct macaddr mcast_mac[BE_MAX_MC];
 952 };
 953
 954 /******************** Link Status Query *******************/
 955 struct be_cmd_req_link_status {
 956         struct be_cmd_req_hdr hdr;
 957         u32 rsvd;
 958 };
 959
 960 enum {
 961         PHY_LINK_DUPLEX_NONE = 0x0,
 962         PHY_LINK_DUPLEX_HALF = 0x1,
 963         PHY_LINK_DUPLEX_FULL = 0x2
 964 };
 965
 966 enum {
 967         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 968         PHY_LINK_SPEED_10MBPS = 0x1,
 969         PHY_LINK_SPEED_100MBPS = 0x2,
 970         PHY_LINK_SPEED_1GBPS = 0x3,
 971         PHY_LINK_SPEED_10GBPS = 0x4,
 972         PHY_LINK_SPEED_20GBPS = 0x5,
 973         PHY_LINK_SPEED_25GBPS = 0x6,
 974         PHY_LINK_SPEED_40GBPS = 0x7
 975 };
 976
 977 struct be_cmd_resp_link_status {
 978         struct be_cmd_resp_hdr hdr;
 979         u8 physical_port;
 980         u8 mac_duplex;
 981         u8 mac_speed;
 982         u8 mac_fault;
 983         u8 mgmt_mac_duplex;
 984         u8 mgmt_mac_speed;
 985         u16 link_speed;
 986         u8 logical_link_status;
 987         u8 rsvd1[3];
 988 } __packed;
 989
 990 /******************** Port Identification ***************************/
 991 /*    Identifies the type of port attached to NIC     */
 992 struct be_cmd_req_port_type {
 993         struct be_cmd_req_hdr hdr;
 994         u32 page_num;
 995         u32 port;
 996 };
 997
 998 enum {
 999         TR_PAGE_A0 = 0xa0,
1000         TR_PAGE_A2 = 0xa2
1001 };
1002
1003 struct be_cmd_resp_port_type {
1004         struct be_cmd_resp_hdr hdr;
1005         u32 page_num;
1006         u32 port;
1007         struct data {
1008                 u8 identifier;
1009                 u8 identifier_ext;
1010                 u8 connector;
1011                 u8 transceiver[8];
1012                 u8 rsvd0[3];
1013                 u8 length_km;
1014                 u8 length_hm;
1015                 u8 length_om1;
1016                 u8 length_om2;
1017                 u8 length_cu;
1018                 u8 length_cu_m;
1019                 u8 vendor_name[16];
1020                 u8 rsvd;
1021                 u8 vendor_oui[3];
1022                 u8 vendor_pn[16];
1023                 u8 vendor_rev[4];
1024         } data;
1025 };
1026
1027 /******************** Get FW Version *******************/
1028 struct be_cmd_req_get_fw_version {
1029         struct be_cmd_req_hdr hdr;
1030         u8 rsvd0[FW_VER_LEN];
1031         u8 rsvd1[FW_VER_LEN];
1032 } __packed;
1033
1034 struct be_cmd_resp_get_fw_version {
1035         struct be_cmd_resp_hdr hdr;
1036         u8 firmware_version_string[FW_VER_LEN];
1037         u8 fw_on_flash_version_string[FW_VER_LEN];
1038 } __packed;
1039
1040 /******************** Set Flow Contrl *******************/
1041 struct be_cmd_req_set_flow_control {
1042         struct be_cmd_req_hdr hdr;
1043         u16 tx_flow_control;
1044         u16 rx_flow_control;
1045 } __packed;
1046
1047 /******************** Get Flow Contrl *******************/
1048 struct be_cmd_req_get_flow_control {
1049         struct be_cmd_req_hdr hdr;
1050         u32 rsvd;
1051 };
1052
1053 struct be_cmd_resp_get_flow_control {
1054         struct be_cmd_resp_hdr hdr;
1055         u16 tx_flow_control;
1056         u16 rx_flow_control;
1057 } __packed;
1058
1059 /******************** Modify EQ Delay *******************/
1060 struct be_cmd_req_modify_eq_delay {
1061         struct be_cmd_req_hdr hdr;
1062         u32 num_eq;
1063         struct {
1064                 u32 eq_id;
1065                 u32 phase;
1066                 u32 delay_multiplier;
1067         } delay[8];
1068 } __packed;
1069
1070 struct be_cmd_resp_modify_eq_delay {
1071         struct be_cmd_resp_hdr hdr;
1072         u32 rsvd0;
1073 } __packed;
1074
1075 /******************** Get FW Config *******************/
1076 /* The HW can come up in either of the following multi-channel modes
1077  * based on the skew/IPL.
1078  */
1079 #define RDMA_ENABLED                            0x4
1080 #define FLEX10_MODE                             0x400
1081 #define VNIC_MODE                               0x20000
1082 #define UMC_ENABLED                             0x1000000
1083 struct be_cmd_req_query_fw_cfg {
1084         struct be_cmd_req_hdr hdr;
1085         u32 rsvd[31];
1086 };
1087
1088 struct be_cmd_resp_query_fw_cfg {
1089         struct be_cmd_resp_hdr hdr;
1090         u32 be_config_number;
1091         u32 asic_revision;
1092         u32 phys_port;
1093         u32 function_mode;
1094         u32 rsvd[26];
1095         u32 function_caps;
1096 };
1097
1098 /******************** RSS Config ****************************************/
1099 /* RSS type             Input parameters used to compute RX hash
1100  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1101  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1102  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1103  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1104  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1105  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1106  *
1107  * When multiple RSS types are enabled, HW picks the best hash policy
1108  * based on the type of the received packet.
1109  */
1110 #define RSS_ENABLE_NONE                         0x0
1111 #define RSS_ENABLE_IPV4                         0x1
1112 #define RSS_ENABLE_TCP_IPV4                     0x2
1113 #define RSS_ENABLE_IPV6                         0x4
1114 #define RSS_ENABLE_TCP_IPV6                     0x8
1115 #define RSS_ENABLE_UDP_IPV4                     0x10
1116 #define RSS_ENABLE_UDP_IPV6                     0x20
1117
1118 #define L3_RSS_FLAGS                            (RXH_IP_DST | RXH_IP_SRC)
1119 #define L4_RSS_FLAGS                            (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1120
1121 struct be_cmd_req_rss_config {
1122         struct be_cmd_req_hdr hdr;
1123         u32 if_id;
1124         u16 enable_rss;
1125         u16 cpu_table_size_log2;
1126         u32 hash[10];
1127         u8 cpu_table[128];
1128         u8 flush;
1129         u8 rsvd0[3];
1130 };
1131
1132 /******************** Port Beacon ***************************/
1133
1134 #define BEACON_STATE_ENABLED            0x1
1135 #define BEACON_STATE_DISABLED           0x0
1136
1137 struct be_cmd_req_enable_disable_beacon {
1138         struct be_cmd_req_hdr hdr;
1139         u8  port_num;
1140         u8  beacon_state;
1141         u8  beacon_duration;
1142         u8  status_duration;
1143 } __packed;
1144
1145 struct be_cmd_resp_enable_disable_beacon {
1146         struct be_cmd_resp_hdr resp_hdr;
1147         u32 rsvd0;
1148 } __packed;
1149
1150 struct be_cmd_req_get_beacon_state {
1151         struct be_cmd_req_hdr hdr;
1152         u8  port_num;
1153         u8  rsvd0;
1154         u16 rsvd1;
1155 } __packed;
1156
1157 struct be_cmd_resp_get_beacon_state {
1158         struct be_cmd_resp_hdr resp_hdr;
1159         u8 beacon_state;
1160         u8 rsvd0[3];
1161 } __packed;
1162
1163 /****************** Firmware Flash ******************/
1164 struct flashrom_params {
1165         u32 op_code;
1166         u32 op_type;
1167         u32 data_buf_size;
1168         u32 offset;
1169 };
1170
1171 struct be_cmd_write_flashrom {
1172         struct be_cmd_req_hdr hdr;
1173         struct flashrom_params params;
1174         u8 data_buf[32768];
1175         u8 rsvd[4];
1176 } __packed;
1177
1178 /* cmd to read flash crc */
1179 struct be_cmd_read_flash_crc {
1180         struct be_cmd_req_hdr hdr;
1181         struct flashrom_params params;
1182         u8 crc[4];
1183         u8 rsvd[4];
1184 };
1185 /**************** Lancer Firmware Flash ************/
1186 struct amap_lancer_write_obj_context {
1187         u8 write_length[24];
1188         u8 reserved1[7];
1189         u8 eof;
1190 } __packed;
1191
1192 struct lancer_cmd_req_write_object {
1193         struct be_cmd_req_hdr hdr;
1194         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1195         u32 write_offset;
1196         u8 object_name[104];
1197         u32 descriptor_count;
1198         u32 buf_len;
1199         u32 addr_low;
1200         u32 addr_high;
1201 };
1202
1203 #define LANCER_NO_RESET_NEEDED          0x00
1204 #define LANCER_FW_RESET_NEEDED          0x02
1205 struct lancer_cmd_resp_write_object {
1206         u8 opcode;
1207         u8 subsystem;
1208         u8 rsvd1[2];
1209         u8 status;
1210         u8 additional_status;
1211         u8 rsvd2[2];
1212         u32 resp_len;
1213         u32 actual_resp_len;
1214         u32 actual_write_len;
1215         u8 change_status;
1216         u8 rsvd3[3];
1217 };
1218
1219 /************************ Lancer Read FW info **************/
1220 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1221 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1222
1223 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1224 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1225 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1226
1227 struct lancer_cmd_req_read_object {
1228         struct be_cmd_req_hdr hdr;
1229         u32 desired_read_len;
1230         u32 read_offset;
1231         u8 object_name[104];
1232         u32 descriptor_count;
1233         u32 buf_len;
1234         u32 addr_low;
1235         u32 addr_high;
1236 };
1237
1238 struct lancer_cmd_resp_read_object {
1239         u8 opcode;
1240         u8 subsystem;
1241         u8 rsvd1[2];
1242         u8 status;
1243         u8 additional_status;
1244         u8 rsvd2[2];
1245         u32 resp_len;
1246         u32 actual_resp_len;
1247         u32 actual_read_len;
1248         u32 eof;
1249 };
1250
1251 /************************ WOL *******************************/
1252 struct be_cmd_req_acpi_wol_magic_config{
1253         struct be_cmd_req_hdr hdr;
1254         u32 rsvd0[145];
1255         u8 magic_mac[6];
1256         u8 rsvd2[2];
1257 } __packed;
1258
1259 struct be_cmd_req_acpi_wol_magic_config_v1 {
1260         struct be_cmd_req_hdr hdr;
1261         u8 rsvd0[2];
1262         u8 query_options;
1263         u8 rsvd1[5];
1264         u32 rsvd2[288];
1265         u8 magic_mac[6];
1266         u8 rsvd3[22];
1267 } __packed;
1268
1269 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1270         struct be_cmd_resp_hdr hdr;
1271         u8 rsvd0[2];
1272         u8 wol_settings;
1273         u8 rsvd1[5];
1274         u32 rsvd2[295];
1275 } __packed;
1276
1277 #define BE_GET_WOL_CAP                  2
1278
1279 #define BE_WOL_CAP                      0x1
1280 #define BE_PME_D0_CAP                   0x8
1281 #define BE_PME_D1_CAP                   0x10
1282 #define BE_PME_D2_CAP                   0x20
1283 #define BE_PME_D3HOT_CAP                0x40
1284 #define BE_PME_D3COLD_CAP               0x80
1285
1286 /********************** LoopBack test *********************/
1287 struct be_cmd_req_loopback_test {
1288         struct be_cmd_req_hdr hdr;
1289         u32 loopback_type;
1290         u32 num_pkts;
1291         u64 pattern;
1292         u32 src_port;
1293         u32 dest_port;
1294         u32 pkt_size;
1295 };
1296
1297 struct be_cmd_resp_loopback_test {
1298         struct be_cmd_resp_hdr resp_hdr;
1299         u32    status;
1300         u32    num_txfer;
1301         u32    num_rx;
1302         u32    miscomp_off;
1303         u32    ticks_compl;
1304 };
1305
1306 struct be_cmd_req_set_lmode {
1307         struct be_cmd_req_hdr hdr;
1308         u8 src_port;
1309         u8 dest_port;
1310         u8 loopback_type;
1311         u8 loopback_state;
1312 };
1313
1314 struct be_cmd_resp_set_lmode {
1315         struct be_cmd_resp_hdr resp_hdr;
1316         u8 rsvd0[4];
1317 };
1318
1319 /********************** DDR DMA test *********************/
1320 struct be_cmd_req_ddrdma_test {
1321         struct be_cmd_req_hdr hdr;
1322         u64 pattern;
1323         u32 byte_count;
1324         u32 rsvd0;
1325         u8  snd_buff[4096];
1326         u8  rsvd1[4096];
1327 };
1328
1329 struct be_cmd_resp_ddrdma_test {
1330         struct be_cmd_resp_hdr hdr;
1331         u64 pattern;
1332         u32 byte_cnt;
1333         u32 snd_err;
1334         u8  rsvd0[4096];
1335         u8  rcv_buff[4096];
1336 };
1337
1338 /*********************** SEEPROM Read ***********************/
1339
1340 #define BE_READ_SEEPROM_LEN 1024
1341 struct be_cmd_req_seeprom_read {
1342         struct be_cmd_req_hdr hdr;
1343         u8 rsvd0[BE_READ_SEEPROM_LEN];
1344 };
1345
1346 struct be_cmd_resp_seeprom_read {
1347         struct be_cmd_req_hdr hdr;
1348         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1349 };
1350
1351 enum {
1352         PHY_TYPE_CX4_10GB = 0,
1353         PHY_TYPE_XFP_10GB,
1354         PHY_TYPE_SFP_1GB,
1355         PHY_TYPE_SFP_PLUS_10GB,
1356         PHY_TYPE_KR_10GB,
1357         PHY_TYPE_KX4_10GB,
1358         PHY_TYPE_BASET_10GB,
1359         PHY_TYPE_BASET_1GB,
1360         PHY_TYPE_BASEX_1GB,
1361         PHY_TYPE_SGMII,
1362         PHY_TYPE_DISABLED = 255
1363 };
1364
1365 #define BE_SUPPORTED_SPEED_NONE         0
1366 #define BE_SUPPORTED_SPEED_10MBPS       1
1367 #define BE_SUPPORTED_SPEED_100MBPS      2
1368 #define BE_SUPPORTED_SPEED_1GBPS        4
1369 #define BE_SUPPORTED_SPEED_10GBPS       8
1370
1371 #define BE_AN_EN                        0x2
1372 #define BE_PAUSE_SYM_EN                 0x80
1373
1374 /* MAC speed valid values */
1375 #define SPEED_DEFAULT  0x0
1376 #define SPEED_FORCED_10GB  0x1
1377 #define SPEED_FORCED_1GB  0x2
1378 #define SPEED_AUTONEG_10GB  0x3
1379 #define SPEED_AUTONEG_1GB  0x4
1380 #define SPEED_AUTONEG_100MB  0x5
1381 #define SPEED_AUTONEG_10GB_1GB 0x6
1382 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1383 #define SPEED_AUTONEG_1GB_100MB  0x8
1384 #define SPEED_AUTONEG_10MB  0x9
1385 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1386 #define SPEED_AUTONEG_100MB_10MB 0xb
1387 #define SPEED_FORCED_100MB  0xc
1388 #define SPEED_FORCED_10MB  0xd
1389
1390 struct be_cmd_req_get_phy_info {
1391         struct be_cmd_req_hdr hdr;
1392         u8 rsvd0[24];
1393 };
1394
1395 struct be_phy_info {
1396         u16 phy_type;
1397         u16 interface_type;
1398         u32 misc_params;
1399         u16 ext_phy_details;
1400         u16 rsvd;
1401         u16 auto_speeds_supported;
1402         u16 fixed_speeds_supported;
1403         u32 future_use[2];
1404 };
1405
1406 struct be_cmd_resp_get_phy_info {
1407         struct be_cmd_req_hdr hdr;
1408         struct be_phy_info phy_info;
1409 };
1410
1411 /*********************** Set QOS ***********************/
1412
1413 #define BE_QOS_BITS_NIC                         1
1414
1415 struct be_cmd_req_set_qos {
1416         struct be_cmd_req_hdr hdr;
1417         u32 valid_bits;
1418         u32 max_bps_nic;
1419         u32 rsvd[7];
1420 };
1421
1422 struct be_cmd_resp_set_qos {
1423         struct be_cmd_resp_hdr hdr;
1424         u32 rsvd;
1425 };
1426
1427 /*********************** Controller Attributes ***********************/
1428 struct be_cmd_req_cntl_attribs {
1429         struct be_cmd_req_hdr hdr;
1430 };
1431
1432 struct be_cmd_resp_cntl_attribs {
1433         struct be_cmd_resp_hdr hdr;
1434         struct mgmt_controller_attrib attribs;
1435 };
1436
1437 /*********************** Set driver function ***********************/
1438 #define CAPABILITY_SW_TIMESTAMPS        2
1439 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1440
1441 struct be_cmd_req_set_func_cap {
1442         struct be_cmd_req_hdr hdr;
1443         u32 valid_cap_flags;
1444         u32 cap_flags;
1445         u8 rsvd[212];
1446 };
1447
1448 struct be_cmd_resp_set_func_cap {
1449         struct be_cmd_resp_hdr hdr;
1450         u32 valid_cap_flags;
1451         u32 cap_flags;
1452         u8 rsvd[212];
1453 };
1454
1455 /*********************** Function Privileges ***********************/
1456 enum {
1457         BE_PRIV_DEFAULT = 0x1,
1458         BE_PRIV_LNKQUERY = 0x2,
1459         BE_PRIV_LNKSTATS = 0x4,
1460         BE_PRIV_LNKMGMT = 0x8,
1461         BE_PRIV_LNKDIAG = 0x10,
1462         BE_PRIV_UTILQUERY = 0x20,
1463         BE_PRIV_FILTMGMT = 0x40,
1464         BE_PRIV_IFACEMGMT = 0x80,
1465         BE_PRIV_VHADM = 0x100,
1466         BE_PRIV_DEVCFG = 0x200,
1467         BE_PRIV_DEVSEC = 0x400
1468 };
1469 #define MAX_PRIVILEGES          (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1470                                  BE_PRIV_DEVSEC)
1471 #define MIN_PRIVILEGES          BE_PRIV_DEFAULT
1472
1473 struct be_cmd_priv_map {
1474         u8 opcode;
1475         u8 subsystem;
1476         u32 priv_mask;
1477 };
1478
1479 struct be_cmd_req_get_fn_privileges {
1480         struct be_cmd_req_hdr hdr;
1481         u32 rsvd;
1482 };
1483
1484 struct be_cmd_resp_get_fn_privileges {
1485         struct be_cmd_resp_hdr hdr;
1486         u32 privilege_mask;
1487 };
1488
1489 struct be_cmd_req_set_fn_privileges {
1490         struct be_cmd_req_hdr hdr;
1491         u32 privileges;         /* Used by BE3, SH-R */
1492         u32 privileges_lancer;  /* Used by Lancer */
1493 };
1494
1495 /******************** GET/SET_MACLIST  **************************/
1496 #define BE_MAX_MAC                      64
1497 struct be_cmd_req_get_mac_list {
1498         struct be_cmd_req_hdr hdr;
1499         u8 mac_type;
1500         u8 perm_override;
1501         u16 iface_id;
1502         u32 mac_id;
1503         u32 rsvd[3];
1504 } __packed;
1505
1506 struct get_list_macaddr {
1507         u16 mac_addr_size;
1508         union {
1509                 u8 macaddr[6];
1510                 struct {
1511                         u8 rsvd[2];
1512                         u32 mac_id;
1513                 } __packed s_mac_id;
1514         } __packed mac_addr_id;
1515 } __packed;
1516
1517 struct be_cmd_resp_get_mac_list {
1518         struct be_cmd_resp_hdr hdr;
1519         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1520         struct get_list_macaddr macid_macaddr; /* soft mac */
1521         u8 true_mac_count;
1522         u8 pseudo_mac_count;
1523         u8 mac_list_size;
1524         u8 rsvd;
1525         /* perm override mac */
1526         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1527 } __packed;
1528
1529 struct be_cmd_req_set_mac_list {
1530         struct be_cmd_req_hdr hdr;
1531         u8 mac_count;
1532         u8 rsvd1;
1533         u16 rsvd2;
1534         struct macaddr mac[BE_MAX_MAC];
1535 } __packed;
1536
1537 /*********************** HSW Config ***********************/
1538 #define PORT_FWD_TYPE_VEPA              0x3
1539 #define PORT_FWD_TYPE_VEB               0x2
1540
1541 struct amap_set_hsw_context {
1542         u8 interface_id[16];
1543         u8 rsvd0[14];
1544         u8 pvid_valid;
1545         u8 pport;
1546         u8 rsvd1[6];
1547         u8 port_fwd_type[3];
1548         u8 rsvd2[7];
1549         u8 pvid[16];
1550         u8 rsvd3[32];
1551         u8 rsvd4[32];
1552         u8 rsvd5[32];
1553 } __packed;
1554
1555 struct be_cmd_req_set_hsw_config {
1556         struct be_cmd_req_hdr hdr;
1557         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1558 } __packed;
1559
1560 struct be_cmd_resp_set_hsw_config {
1561         struct be_cmd_resp_hdr hdr;
1562         u32 rsvd;
1563 };
1564
1565 struct amap_get_hsw_req_context {
1566         u8 interface_id[16];
1567         u8 rsvd0[14];
1568         u8 pvid_valid;
1569         u8 pport;
1570 } __packed;
1571
1572 struct amap_get_hsw_resp_context {
1573         u8 rsvd0[6];
1574         u8 port_fwd_type[3];
1575         u8 rsvd1[7];
1576         u8 pvid[16];
1577         u8 rsvd2[32];
1578         u8 rsvd3[32];
1579         u8 rsvd4[32];
1580 } __packed;
1581
1582 struct be_cmd_req_get_hsw_config {
1583         struct be_cmd_req_hdr hdr;
1584         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1585 } __packed;
1586
1587 struct be_cmd_resp_get_hsw_config {
1588         struct be_cmd_resp_hdr hdr;
1589         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1590         u32 rsvd;
1591 };
1592
1593 /******************* get port names ***************/
1594 struct be_cmd_req_get_port_name {
1595         struct be_cmd_req_hdr hdr;
1596         u32 rsvd0;
1597 };
1598
1599 struct be_cmd_resp_get_port_name {
1600         struct be_cmd_req_hdr hdr;
1601         u8 port_name[4];
1602 };
1603
1604 /*************** HW Stats Get v1 **********************************/
1605 #define BE_TXP_SW_SZ                    48
1606 struct be_port_rxf_stats_v1 {
1607         u32 rsvd0[12];
1608         u32 rx_crc_errors;
1609         u32 rx_alignment_symbol_errors;
1610         u32 rx_pause_frames;
1611         u32 rx_priority_pause_frames;
1612         u32 rx_control_frames;
1613         u32 rx_in_range_errors;
1614         u32 rx_out_range_errors;
1615         u32 rx_frame_too_long;
1616         u32 rx_address_filtered;
1617         u32 rx_dropped_too_small;
1618         u32 rx_dropped_too_short;
1619         u32 rx_dropped_header_too_small;
1620         u32 rx_dropped_tcp_length;
1621         u32 rx_dropped_runt;
1622         u32 rsvd1[10];
1623         u32 rx_ip_checksum_errs;
1624         u32 rx_tcp_checksum_errs;
1625         u32 rx_udp_checksum_errs;
1626         u32 rsvd2[7];
1627         u32 rx_switched_unicast_packets;
1628         u32 rx_switched_multicast_packets;
1629         u32 rx_switched_broadcast_packets;
1630         u32 rsvd3[3];
1631         u32 tx_pauseframes;
1632         u32 tx_priority_pauseframes;
1633         u32 tx_controlframes;
1634         u32 rsvd4[10];
1635         u32 rxpp_fifo_overflow_drop;
1636         u32 rx_input_fifo_overflow_drop;
1637         u32 pmem_fifo_overflow_drop;
1638         u32 jabber_events;
1639         u32 rsvd5[3];
1640 };
1641
1642
1643 struct be_rxf_stats_v1 {
1644         struct be_port_rxf_stats_v1 port[4];
1645         u32 rsvd0[2];
1646         u32 rx_drops_no_pbuf;
1647         u32 rx_drops_no_txpb;
1648         u32 rx_drops_no_erx_descr;
1649         u32 rx_drops_no_tpre_descr;
1650         u32 rsvd1[6];
1651         u32 rx_drops_too_many_frags;
1652         u32 rx_drops_invalid_ring;
1653         u32 forwarded_packets;
1654         u32 rx_drops_mtu;
1655         u32 rsvd2[14];
1656 };
1657
1658 struct be_erx_stats_v1 {
1659         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1660         u32 rsvd[4];
1661 };
1662
1663 struct be_hw_stats_v1 {
1664         struct be_rxf_stats_v1 rxf;
1665         u32 rsvd0[BE_TXP_SW_SZ];
1666         struct be_erx_stats_v1 erx;
1667         struct be_pmem_stats pmem;
1668         u32 rsvd1[18];
1669 };
1670
1671 struct be_cmd_req_get_stats_v1 {
1672         struct be_cmd_req_hdr hdr;
1673         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1674 };
1675
1676 struct be_cmd_resp_get_stats_v1 {
1677         struct be_cmd_resp_hdr hdr;
1678         struct be_hw_stats_v1 hw_stats;
1679 };
1680
1681 /************** get fat capabilites *******************/
1682 #define MAX_MODULES 27
1683 #define MAX_MODES 4
1684 #define MODE_UART 0
1685 #define FW_LOG_LEVEL_DEFAULT 48
1686 #define FW_LOG_LEVEL_FATAL 64
1687
1688 struct ext_fat_mode {
1689         u8 mode;
1690         u8 rsvd0;
1691         u16 port_mask;
1692         u32 dbg_lvl;
1693         u64 fun_mask;
1694 } __packed;
1695
1696 struct ext_fat_modules {
1697         u8 modules_str[32];
1698         u32 modules_id;
1699         u32 num_modes;
1700         struct ext_fat_mode trace_lvl[MAX_MODES];
1701 } __packed;
1702
1703 struct be_fat_conf_params {
1704         u32 max_log_entries;
1705         u32 log_entry_size;
1706         u8 log_type;
1707         u8 max_log_funs;
1708         u8 max_log_ports;
1709         u8 rsvd0;
1710         u32 supp_modes;
1711         u32 num_modules;
1712         struct ext_fat_modules module[MAX_MODULES];
1713 } __packed;
1714
1715 struct be_cmd_req_get_ext_fat_caps {
1716         struct be_cmd_req_hdr hdr;
1717         u32 parameter_type;
1718 };
1719
1720 struct be_cmd_resp_get_ext_fat_caps {
1721         struct be_cmd_resp_hdr hdr;
1722         struct be_fat_conf_params get_params;
1723 };
1724
1725 struct be_cmd_req_set_ext_fat_caps {
1726         struct be_cmd_req_hdr hdr;
1727         struct be_fat_conf_params set_params;
1728 };
1729
1730 #define RESOURCE_DESC_SIZE_V0                   72
1731 #define RESOURCE_DESC_SIZE_V1                   88
1732 #define PCIE_RESOURCE_DESC_TYPE_V0              0x40
1733 #define NIC_RESOURCE_DESC_TYPE_V0               0x41
1734 #define PCIE_RESOURCE_DESC_TYPE_V1              0x50
1735 #define NIC_RESOURCE_DESC_TYPE_V1               0x51
1736 #define MAX_RESOURCE_DESC                       264
1737
1738 /* QOS unit number */
1739 #define QUN                                     4
1740 /* Immediate */
1741 #define IMM                                     6
1742 /* No save */
1743 #define NOSV                                    7
1744
1745 struct be_res_desc_hdr {
1746         u8 desc_type;
1747         u8 desc_len;
1748 } __packed;
1749
1750 struct be_pcie_res_desc {
1751         struct be_res_desc_hdr hdr;
1752         u8 rsvd0;
1753         u8 flags;
1754         u16 rsvd1;
1755         u8 pf_num;
1756         u8 rsvd2;
1757         u32 rsvd3;
1758         u8 sriov_state;
1759         u8 pf_state;
1760         u8 pf_type;
1761         u8 rsvd4;
1762         u16 num_vfs;
1763         u16 rsvd5;
1764         u32 rsvd6[17];
1765 } __packed;
1766
1767 struct be_nic_res_desc {
1768         struct be_res_desc_hdr hdr;
1769         u8 rsvd1;
1770         u8 flags;
1771         u8 vf_num;
1772         u8 rsvd2;
1773         u8 pf_num;
1774         u8 rsvd3;
1775         u16 unicast_mac_count;
1776         u8 rsvd4[6];
1777         u16 mcc_count;
1778         u16 vlan_count;
1779         u16 mcast_mac_count;
1780         u16 txq_count;
1781         u16 rq_count;
1782         u16 rssq_count;
1783         u16 lro_count;
1784         u16 cq_count;
1785         u16 toe_conn_count;
1786         u16 eq_count;
1787         u32 rsvd5;
1788         u32 cap_flags;
1789         u8 link_param;
1790         u8 rsvd6[3];
1791         u32 bw_min;
1792         u32 bw_max;
1793         u8 acpi_params;
1794         u8 wol_param;
1795         u16 rsvd7;
1796         u32 rsvd8[7];
1797 } __packed;
1798
1799 struct be_cmd_req_get_func_config {
1800         struct be_cmd_req_hdr hdr;
1801 };
1802
1803 struct be_cmd_resp_get_func_config {
1804         struct be_cmd_resp_hdr hdr;
1805         u32 desc_count;
1806         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
1807 };
1808
1809 #define ACTIVE_PROFILE_TYPE                     0x2
1810 struct be_cmd_req_get_profile_config {
1811         struct be_cmd_req_hdr hdr;
1812         u8 rsvd;
1813         u8 type;
1814         u16 rsvd1;
1815 };
1816
1817 struct be_cmd_resp_get_profile_config {
1818         struct be_cmd_resp_hdr hdr;
1819         u32 desc_count;
1820         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
1821 };
1822
1823 struct be_cmd_req_set_profile_config {
1824         struct be_cmd_req_hdr hdr;
1825         u32 rsvd;
1826         u32 desc_count;
1827         struct be_nic_res_desc nic_desc;
1828 };
1829
1830 struct be_cmd_resp_set_profile_config {
1831         struct be_cmd_resp_hdr hdr;
1832 };
1833
1834 struct be_cmd_enable_disable_vf {
1835         struct be_cmd_req_hdr hdr;
1836         u8 enable;
1837         u8 rsvd[3];
1838 };
1839
1840 struct be_cmd_req_intr_set {
1841         struct be_cmd_req_hdr hdr;
1842         u8 intr_enabled;
1843         u8 rsvd[3];
1844 };
1845
1846 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
1847 {
1848         return flags & adapter->cmd_privileges ? true : false;
1849 }
1850
1851 /************** Get IFACE LIST *******************/
1852 struct be_if_desc {
1853         u32 if_id;
1854         u32 cap_flags;
1855         u32 en_flags;
1856 };
1857
1858 struct be_cmd_req_get_iface_list {
1859         struct be_cmd_req_hdr hdr;
1860 };
1861
1862 struct be_cmd_resp_get_iface_list {
1863         struct be_cmd_req_hdr hdr;
1864         u32 if_cnt;
1865         struct be_if_desc if_desc;
1866 };
1867
1868 extern int be_pci_fnum_get(struct be_adapter *adapter);
1869 extern int be_fw_wait_ready(struct be_adapter *adapter);
1870 extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
1871                                  bool permanent, u32 if_handle, u32 pmac_id);
1872 extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
1873                         u32 if_id, u32 *pmac_id, u32 domain);
1874 extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id,
1875                         int pmac_id, u32 domain);
1876 extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
1877                             u32 en_flags, u32 *if_handle, u32 domain);
1878 extern int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle,
1879                         u32 domain);
1880 extern int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
1881 extern int be_cmd_cq_create(struct be_adapter *adapter,
1882                         struct be_queue_info *cq, struct be_queue_info *eq,
1883                         bool no_delay, int num_cqe_dma_coalesce);
1884 extern int be_cmd_mccq_create(struct be_adapter *adapter,
1885                         struct be_queue_info *mccq,
1886                         struct be_queue_info *cq);
1887 extern int be_cmd_txq_create(struct be_adapter *adapter,
1888                         struct be_tx_obj *txo);
1889 extern int be_cmd_rxq_create(struct be_adapter *adapter,
1890                         struct be_queue_info *rxq, u16 cq_id,
1891                         u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
1892 extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1893                         int type);
1894 extern int be_cmd_rxq_destroy(struct be_adapter *adapter,
1895                         struct be_queue_info *q);
1896 extern int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
1897                                     u8 *link_status, u32 dom);
1898 extern int be_cmd_reset(struct be_adapter *adapter);
1899 extern int be_cmd_get_stats(struct be_adapter *adapter,
1900                         struct be_dma_mem *nonemb_cmd);
1901 extern int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1902                         struct be_dma_mem *nonemb_cmd);
1903 extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1904                 char *fw_on_flash);
1905
1906 extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
1907 extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
1908                         u16 *vtag_array, u32 num, bool untagged,
1909                         bool promiscuous);
1910 extern int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
1911 extern int be_cmd_set_flow_control(struct be_adapter *adapter,
1912                         u32 tx_fc, u32 rx_fc);
1913 extern int be_cmd_get_flow_control(struct be_adapter *adapter,
1914                         u32 *tx_fc, u32 *rx_fc);
1915 extern int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
1916                         u32 *function_mode, u32 *function_caps, u16 *asic_rev);
1917 extern int be_cmd_reset_function(struct be_adapter *adapter);
1918 extern int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
1919                              u32 rss_hash_opts, u16 table_size);
1920 extern int be_process_mcc(struct be_adapter *adapter);
1921 extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
1922                         u8 port_num, u8 beacon, u8 status, u8 state);
1923 extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
1924                         u8 port_num, u32 *state);
1925 extern int be_cmd_write_flashrom(struct be_adapter *adapter,
1926                         struct be_dma_mem *cmd, u32 flash_oper,
1927                         u32 flash_opcode, u32 buf_size);
1928 extern int lancer_cmd_write_object(struct be_adapter *adapter,
1929                                    struct be_dma_mem *cmd,
1930                                    u32 data_size, u32 data_offset,
1931                                    const char *obj_name,
1932                                    u32 *data_written, u8 *change_status,
1933                                    u8 *addn_status);
1934 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
1935                 u32 data_size, u32 data_offset, const char *obj_name,
1936                 u32 *data_read, u32 *eof, u8 *addn_status);
1937 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
1938                                 int offset);
1939 extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
1940                                 struct be_dma_mem *nonemb_cmd);
1941 extern int be_cmd_fw_init(struct be_adapter *adapter);
1942 extern int be_cmd_fw_clean(struct be_adapter *adapter);
1943 extern void be_async_mcc_enable(struct be_adapter *adapter);
1944 extern void be_async_mcc_disable(struct be_adapter *adapter);
1945 extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1946                                 u32 loopback_type, u32 pkt_size,
1947                                 u32 num_pkts, u64 pattern);
1948 extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
1949                         u32 byte_cnt, struct be_dma_mem *cmd);
1950 extern int be_cmd_get_seeprom_data(struct be_adapter *adapter,
1951                                 struct be_dma_mem *nonemb_cmd);
1952 extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
1953                                 u8 loopback_type, u8 enable);
1954 extern int be_cmd_get_phy_info(struct be_adapter *adapter);
1955 extern int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain);
1956 extern void be_detect_error(struct be_adapter *adapter);
1957 extern int be_cmd_get_die_temperature(struct be_adapter *adapter);
1958 extern int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
1959 extern int be_cmd_req_native_mode(struct be_adapter *adapter);
1960 extern int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
1961 extern void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
1962 extern int be_cmd_get_fn_privileges(struct be_adapter *adapter,
1963                                     u32 *privilege, u32 domain);
1964 extern int be_cmd_set_fn_privileges(struct be_adapter *adapter,
1965                                     u32 privileges, u32 vf_num);
1966 extern int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
1967                                     bool *pmac_id_active, u32 *pmac_id,
1968                                     u8 domain);
1969 extern int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id,
1970                                  u8 *mac);
1971 extern int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
1972 extern int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
1973                                                 u8 mac_count, u32 domain);
1974 extern int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id,
1975                           u32 dom);
1976 extern int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
1977                                  u32 domain, u16 intf_id, u16 hsw_mode);
1978 extern int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
1979                                  u32 domain, u16 intf_id, u8 *mode);
1980 extern int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
1981 extern int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
1982                                           struct be_dma_mem *cmd);
1983 extern int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
1984                                           struct be_dma_mem *cmd,
1985                                           struct be_fat_conf_params *cfgs);
1986 extern int lancer_wait_ready(struct be_adapter *adapter);
1987 extern int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
1988 extern int lancer_initiate_dump(struct be_adapter *adapter);
1989 extern bool dump_present(struct be_adapter *adapter);
1990 extern int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
1991 extern int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
1992 int be_cmd_get_func_config(struct be_adapter *adapter,
1993                            struct be_resources *res);
1994 int be_cmd_get_profile_config(struct be_adapter *adapter,
1995                               struct be_resources *res, u8 domain);
1996 extern int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps,
1997                                      u8 domain);
1998 extern int be_cmd_get_if_id(struct be_adapter *adapter,
1999                             struct be_vf_cfg *vf_cfg, int vf_num);
2000 extern int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
2001 extern int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);