2 * Copyright (C) 2005 - 2015 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
19 * The driver sends configuration and managements command requests to the
20 * firmware in the BE. These requests are communicated to the processor
21 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
22 * WRB inside a MAILBOX.
23 * The commands are serviced by the ARM processor in the BladeEngine's MPU.
32 #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
33 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
34 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
36 u32 embedded; /* dword 0 */
37 u32 payload_length; /* dword 1 */
38 u32 tag0; /* dword 2 */
39 u32 tag1; /* dword 3 */
40 u32 rsvd; /* dword 4 */
42 u8 embedded_payload[236]; /* used by embedded cmds */
43 struct be_sge sgl[19]; /* used by non-embedded cmds */
47 #define CQE_FLAGS_VALID_MASK BIT(31)
48 #define CQE_FLAGS_ASYNC_MASK BIT(30)
49 #define CQE_FLAGS_COMPLETED_MASK BIT(28)
50 #define CQE_FLAGS_CONSUMED_MASK BIT(27)
52 /* Completion Status */
53 enum mcc_base_status {
54 MCC_STATUS_SUCCESS = 0,
55 MCC_STATUS_FAILED = 1,
56 MCC_STATUS_ILLEGAL_REQUEST = 2,
57 MCC_STATUS_ILLEGAL_FIELD = 3,
58 MCC_STATUS_INSUFFICIENT_BUFFER = 4,
59 MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
60 MCC_STATUS_NOT_SUPPORTED = 66,
61 MCC_STATUS_FEATURE_NOT_SUPPORTED = 68
64 /* Additional status */
65 enum mcc_addl_status {
66 MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16,
67 MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d,
68 MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a,
69 MCC_ADDL_STATUS_INSUFFICIENT_VLANS = 0xab,
70 MCC_ADDL_STATUS_INVALID_SIGNATURE = 0x56,
71 MCC_ADDL_STATUS_MISSING_SIGNATURE = 0x57,
72 MCC_ADDL_STATUS_INSUFFICIENT_PRIVILEGES = 0x60
75 #define CQE_BASE_STATUS_MASK 0xFFFF
76 #define CQE_BASE_STATUS_SHIFT 0 /* bits 0 - 15 */
77 #define CQE_ADDL_STATUS_MASK 0xFF
78 #define CQE_ADDL_STATUS_SHIFT 16 /* bits 16 - 31 */
80 #define base_status(status) \
81 ((enum mcc_base_status) \
82 (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
83 #define addl_status(status) \
84 ((enum mcc_addl_status) \
85 (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
86 CQE_ADDL_STATUS_MASK : 0))
89 u32 status; /* dword 0 */
90 u32 tag0; /* dword 1 */
91 u32 tag1; /* dword 2 */
92 u32 flags; /* dword 3 */
95 /* When the async bit of mcc_compl flags is set, flags
96 * is interpreted as follows:
98 #define ASYNC_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
99 #define ASYNC_EVENT_CODE_MASK 0xFF
100 #define ASYNC_EVENT_TYPE_SHIFT 16
101 #define ASYNC_EVENT_TYPE_MASK 0xFF
102 #define ASYNC_EVENT_CODE_LINK_STATE 0x1
103 #define ASYNC_EVENT_CODE_GRP_5 0x5
104 #define ASYNC_EVENT_QOS_SPEED 0x1
105 #define ASYNC_EVENT_COS_PRIORITY 0x2
106 #define ASYNC_EVENT_PVID_STATE 0x3
107 #define ASYNC_EVENT_CODE_QNQ 0x6
108 #define ASYNC_DEBUG_EVENT_TYPE_QNQ 1
109 #define ASYNC_EVENT_CODE_SLIPORT 0x11
110 #define ASYNC_EVENT_PORT_MISCONFIG 0x9
111 #define ASYNC_EVENT_FW_CONTROL 0x5
117 #define LINK_STATUS_MASK 0x1
118 #define LOGICAL_LINK_STATUS_MASK 0x2
120 /* When the event code of compl->flags is link-state, the mcc_compl
121 * must be interpreted as follows
123 struct be_async_event_link_state {
133 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
134 * the mcc_compl must be interpreted as follows
136 struct be_async_event_grp5_qos_link_speed {
144 /* When the event code of compl->flags is GRP5 and event type is
145 * CoS-Priority, the mcc_compl must be interpreted as follows
147 struct be_async_event_grp5_cos_priority {
149 u8 available_priority_bmap;
150 u8 reco_default_priority;
157 /* When the event code of compl->flags is GRP5 and event type is
158 * PVID state, the mcc_compl must be interpreted as follows
160 struct be_async_event_grp5_pvid_state {
169 /* async event indicating outer VLAN tag in QnQ */
170 struct be_async_event_qnq {
171 u8 valid; /* Indicates if outer VLAN is valid */
179 #define INCOMPATIBLE_SFP 0x3
180 /* async event indicating misconfigured port */
181 struct be_async_event_misconfig_port {
182 u32 event_data_word1;
183 u32 event_data_word2;
188 #define BMC_FILT_BROADCAST_ARP BIT(0)
189 #define BMC_FILT_BROADCAST_DHCP_CLIENT BIT(1)
190 #define BMC_FILT_BROADCAST_DHCP_SERVER BIT(2)
191 #define BMC_FILT_BROADCAST_NET_BIOS BIT(3)
192 #define BMC_FILT_BROADCAST BIT(7)
193 #define BMC_FILT_MULTICAST_IPV6_NEIGH_ADVER BIT(8)
194 #define BMC_FILT_MULTICAST_IPV6_RA BIT(9)
195 #define BMC_FILT_MULTICAST_IPV6_RAS BIT(10)
196 #define BMC_FILT_MULTICAST BIT(15)
197 struct be_async_fw_control {
198 u32 event_data_word1;
199 u32 event_data_word2;
201 u32 event_data_word4;
204 struct be_mcc_mailbox {
205 struct be_mcc_wrb wrb;
206 struct be_mcc_compl compl;
209 #define CMD_SUBSYSTEM_COMMON 0x1
210 #define CMD_SUBSYSTEM_ETH 0x3
211 #define CMD_SUBSYSTEM_LOWLEVEL 0xb
213 #define OPCODE_COMMON_NTWK_MAC_QUERY 1
214 #define OPCODE_COMMON_NTWK_MAC_SET 2
215 #define OPCODE_COMMON_NTWK_MULTICAST_SET 3
216 #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
217 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
218 #define OPCODE_COMMON_READ_FLASHROM 6
219 #define OPCODE_COMMON_WRITE_FLASHROM 7
220 #define OPCODE_COMMON_CQ_CREATE 12
221 #define OPCODE_COMMON_EQ_CREATE 13
222 #define OPCODE_COMMON_MCC_CREATE 21
223 #define OPCODE_COMMON_SET_QOS 28
224 #define OPCODE_COMMON_MCC_CREATE_EXT 90
225 #define OPCODE_COMMON_SEEPROM_READ 30
226 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
227 #define OPCODE_COMMON_NTWK_RX_FILTER 34
228 #define OPCODE_COMMON_GET_FW_VERSION 35
229 #define OPCODE_COMMON_SET_FLOW_CONTROL 36
230 #define OPCODE_COMMON_GET_FLOW_CONTROL 37
231 #define OPCODE_COMMON_SET_FRAME_SIZE 39
232 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
233 #define OPCODE_COMMON_FIRMWARE_CONFIG 42
234 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
235 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
236 #define OPCODE_COMMON_MCC_DESTROY 53
237 #define OPCODE_COMMON_CQ_DESTROY 54
238 #define OPCODE_COMMON_EQ_DESTROY 55
239 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
240 #define OPCODE_COMMON_NTWK_PMAC_ADD 59
241 #define OPCODE_COMMON_NTWK_PMAC_DEL 60
242 #define OPCODE_COMMON_FUNCTION_RESET 61
243 #define OPCODE_COMMON_MANAGE_FAT 68
244 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69
245 #define OPCODE_COMMON_GET_BEACON_STATE 70
246 #define OPCODE_COMMON_READ_TRANSRECV_DATA 73
247 #define OPCODE_COMMON_GET_PORT_NAME 77
248 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG 80
249 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE 89
250 #define OPCODE_COMMON_SET_FN_PRIVILEGES 100
251 #define OPCODE_COMMON_GET_PHY_DETAILS 102
252 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP 103
253 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES 121
254 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES 125
255 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES 126
256 #define OPCODE_COMMON_GET_MAC_LIST 147
257 #define OPCODE_COMMON_SET_MAC_LIST 148
258 #define OPCODE_COMMON_GET_HSW_CONFIG 152
259 #define OPCODE_COMMON_GET_FUNC_CONFIG 160
260 #define OPCODE_COMMON_GET_PROFILE_CONFIG 164
261 #define OPCODE_COMMON_SET_PROFILE_CONFIG 165
262 #define OPCODE_COMMON_GET_ACTIVE_PROFILE 167
263 #define OPCODE_COMMON_SET_HSW_CONFIG 153
264 #define OPCODE_COMMON_GET_FN_PRIVILEGES 170
265 #define OPCODE_COMMON_READ_OBJECT 171
266 #define OPCODE_COMMON_WRITE_OBJECT 172
267 #define OPCODE_COMMON_DELETE_OBJECT 174
268 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS 193
269 #define OPCODE_COMMON_GET_IFACE_LIST 194
270 #define OPCODE_COMMON_ENABLE_DISABLE_VF 196
272 #define OPCODE_ETH_RSS_CONFIG 1
273 #define OPCODE_ETH_ACPI_CONFIG 2
274 #define OPCODE_ETH_PROMISCUOUS 3
275 #define OPCODE_ETH_GET_STATISTICS 4
276 #define OPCODE_ETH_TX_CREATE 7
277 #define OPCODE_ETH_RX_CREATE 8
278 #define OPCODE_ETH_TX_DESTROY 9
279 #define OPCODE_ETH_RX_DESTROY 10
280 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12
281 #define OPCODE_ETH_GET_PPORT_STATS 18
283 #define OPCODE_LOWLEVEL_HOST_DDR_DMA 17
284 #define OPCODE_LOWLEVEL_LOOPBACK_TEST 18
285 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19
287 struct be_cmd_req_hdr {
288 u8 opcode; /* dword 0 */
289 u8 subsystem; /* dword 0 */
290 u8 port_number; /* dword 0 */
291 u8 domain; /* dword 0 */
292 u32 timeout; /* dword 1 */
293 u32 request_length; /* dword 2 */
294 u8 version; /* dword 3 */
295 u8 rsvd[3]; /* dword 3 */
298 #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
299 #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
300 struct be_cmd_resp_hdr {
301 u8 opcode; /* dword 0 */
302 u8 subsystem; /* dword 0 */
303 u8 rsvd[2]; /* dword 0 */
304 u8 base_status; /* dword 1 */
305 u8 addl_status; /* dword 1 */
306 u8 rsvd1[2]; /* dword 1 */
307 u32 response_length; /* dword 2 */
308 u32 actual_resp_len; /* dword 3 */
316 /**************************
317 * BE Command definitions *
318 **************************/
320 /* Pseudo amap definition in which each bit of the actual structure is defined
321 * as a byte: used to calculate offset/shift/mask of each field */
322 struct amap_eq_context {
323 u8 cidx[13]; /* dword 0*/
324 u8 rsvd0[3]; /* dword 0*/
325 u8 epidx[13]; /* dword 0*/
326 u8 valid; /* dword 0*/
327 u8 rsvd1; /* dword 0*/
328 u8 size; /* dword 0*/
329 u8 pidx[13]; /* dword 1*/
330 u8 rsvd2[3]; /* dword 1*/
331 u8 pd[10]; /* dword 1*/
332 u8 count[3]; /* dword 1*/
333 u8 solevent; /* dword 1*/
334 u8 stalled; /* dword 1*/
335 u8 armed; /* dword 1*/
336 u8 rsvd3[4]; /* dword 2*/
337 u8 func[8]; /* dword 2*/
338 u8 rsvd4; /* dword 2*/
339 u8 delaymult[10]; /* dword 2*/
340 u8 rsvd5[2]; /* dword 2*/
341 u8 phase[2]; /* dword 2*/
342 u8 nodelay; /* dword 2*/
343 u8 rsvd6[4]; /* dword 2*/
344 u8 rsvd7[32]; /* dword 3*/
347 struct be_cmd_req_eq_create {
348 struct be_cmd_req_hdr hdr;
349 u16 num_pages; /* sword */
350 u16 rsvd0; /* sword */
351 u8 context[sizeof(struct amap_eq_context) / 8];
352 struct phys_addr pages[8];
355 struct be_cmd_resp_eq_create {
356 struct be_cmd_resp_hdr resp_hdr;
357 u16 eq_id; /* sword */
358 u16 msix_idx; /* available only in v2 */
361 /******************** Mac query ***************************/
363 MAC_ADDRESS_TYPE_STORAGE = 0x0,
364 MAC_ADDRESS_TYPE_NETWORK = 0x1,
365 MAC_ADDRESS_TYPE_PD = 0x2,
366 MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
374 struct be_cmd_req_mac_query {
375 struct be_cmd_req_hdr hdr;
382 struct be_cmd_resp_mac_query {
383 struct be_cmd_resp_hdr hdr;
387 /******************** PMac Add ***************************/
388 struct be_cmd_req_pmac_add {
389 struct be_cmd_req_hdr hdr;
391 u8 mac_address[ETH_ALEN];
395 struct be_cmd_resp_pmac_add {
396 struct be_cmd_resp_hdr hdr;
400 /******************** PMac Del ***************************/
401 struct be_cmd_req_pmac_del {
402 struct be_cmd_req_hdr hdr;
407 /******************** Create CQ ***************************/
408 /* Pseudo amap definition in which each bit of the actual structure is defined
409 * as a byte: used to calculate offset/shift/mask of each field */
410 struct amap_cq_context_be {
411 u8 cidx[11]; /* dword 0*/
412 u8 rsvd0; /* dword 0*/
413 u8 coalescwm[2]; /* dword 0*/
414 u8 nodelay; /* dword 0*/
415 u8 epidx[11]; /* dword 0*/
416 u8 rsvd1; /* dword 0*/
417 u8 count[2]; /* dword 0*/
418 u8 valid; /* dword 0*/
419 u8 solevent; /* dword 0*/
420 u8 eventable; /* dword 0*/
421 u8 pidx[11]; /* dword 1*/
422 u8 rsvd2; /* dword 1*/
423 u8 pd[10]; /* dword 1*/
424 u8 eqid[8]; /* dword 1*/
425 u8 stalled; /* dword 1*/
426 u8 armed; /* dword 1*/
427 u8 rsvd3[4]; /* dword 2*/
428 u8 func[8]; /* dword 2*/
429 u8 rsvd4[20]; /* dword 2*/
430 u8 rsvd5[32]; /* dword 3*/
433 struct amap_cq_context_v2 {
434 u8 rsvd0[12]; /* dword 0*/
435 u8 coalescwm[2]; /* dword 0*/
436 u8 nodelay; /* dword 0*/
437 u8 rsvd1[12]; /* dword 0*/
438 u8 count[2]; /* dword 0*/
439 u8 valid; /* dword 0*/
440 u8 rsvd2; /* dword 0*/
441 u8 eventable; /* dword 0*/
442 u8 eqid[16]; /* dword 1*/
443 u8 rsvd3[15]; /* dword 1*/
444 u8 armed; /* dword 1*/
445 u8 rsvd4[32]; /* dword 2*/
446 u8 rsvd5[32]; /* dword 3*/
449 struct be_cmd_req_cq_create {
450 struct be_cmd_req_hdr hdr;
454 u8 context[sizeof(struct amap_cq_context_be) / 8];
455 struct phys_addr pages[8];
459 struct be_cmd_resp_cq_create {
460 struct be_cmd_resp_hdr hdr;
465 struct be_cmd_req_get_fat {
466 struct be_cmd_req_hdr hdr;
470 u32 data_buffer_size;
474 struct be_cmd_resp_get_fat {
475 struct be_cmd_resp_hdr hdr;
483 /******************** Create MCCQ ***************************/
484 /* Pseudo amap definition in which each bit of the actual structure is defined
485 * as a byte: used to calculate offset/shift/mask of each field */
486 struct amap_mcc_context_be {
501 struct amap_mcc_context_v1 {
507 u8 async_cq_valid[1];
512 struct be_cmd_req_mcc_create {
513 struct be_cmd_req_hdr hdr;
516 u8 context[sizeof(struct amap_mcc_context_be) / 8];
517 struct phys_addr pages[8];
520 struct be_cmd_req_mcc_ext_create {
521 struct be_cmd_req_hdr hdr;
524 u32 async_event_bitmap[1];
525 u8 context[sizeof(struct amap_mcc_context_v1) / 8];
526 struct phys_addr pages[8];
529 struct be_cmd_resp_mcc_create {
530 struct be_cmd_resp_hdr hdr;
535 /******************** Create TxQ ***************************/
536 #define BE_ETH_TX_RING_TYPE_STANDARD 2
537 #define BE_ULP1_NUM 1
539 struct be_cmd_req_eth_tx_create {
540 struct be_cmd_req_hdr hdr;
551 struct phys_addr pages[8];
554 struct be_cmd_resp_eth_tx_create {
555 struct be_cmd_resp_hdr hdr;
562 /******************** Create RxQ ***************************/
563 struct be_cmd_req_eth_rx_create {
564 struct be_cmd_req_hdr hdr;
568 struct phys_addr pages[2];
575 struct be_cmd_resp_eth_rx_create {
576 struct be_cmd_resp_hdr hdr;
582 /******************** Q Destroy ***************************/
583 /* Type of Queue to be destroyed */
592 struct be_cmd_req_q_destroy {
593 struct be_cmd_req_hdr hdr;
595 u16 bypass_flush; /* valid only for rx q destroy */
598 /************ I/f Create (it's actually I/f Config Create)**********/
600 /* Capability flags for the i/f */
602 BE_IF_FLAGS_RSS = 0x4,
603 BE_IF_FLAGS_PROMISCUOUS = 0x8,
604 BE_IF_FLAGS_BROADCAST = 0x10,
605 BE_IF_FLAGS_UNTAGGED = 0x20,
606 BE_IF_FLAGS_ULP = 0x40,
607 BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
608 BE_IF_FLAGS_VLAN = 0x100,
609 BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
610 BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
611 BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
612 BE_IF_FLAGS_MULTICAST = 0x1000,
613 BE_IF_FLAGS_DEFQ_RSS = 0x1000000
616 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
617 BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
618 BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
619 BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
620 BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_DEFQ_RSS)
622 #define BE_IF_FLAGS_ALL_PROMISCUOUS (BE_IF_FLAGS_PROMISCUOUS | \
623 BE_IF_FLAGS_VLAN_PROMISCUOUS |\
624 BE_IF_FLAGS_MCAST_PROMISCUOUS)
626 #define BE_IF_EN_FLAGS (BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |\
627 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_UNTAGGED)
629 #define BE_IF_ALL_FILT_FLAGS (BE_IF_EN_FLAGS | BE_IF_FLAGS_ALL_PROMISCUOUS)
631 /* An RX interface is an object with one or more MAC addresses and
632 * filtering capabilities. */
633 struct be_cmd_req_if_create {
634 struct be_cmd_req_hdr hdr;
635 u32 version; /* ignore currently */
636 u32 capability_flags;
638 u8 mac_addr[ETH_ALEN];
640 u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
641 u32 vlan_tag; /* not used currently */
644 struct be_cmd_resp_if_create {
645 struct be_cmd_resp_hdr hdr;
650 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
651 struct be_cmd_req_if_destroy {
652 struct be_cmd_req_hdr hdr;
656 /*************** HW Stats Get **********************************/
657 struct be_port_rxf_stats_v0 {
658 u32 rx_bytes_lsd; /* dword 0*/
659 u32 rx_bytes_msd; /* dword 1*/
660 u32 rx_total_frames; /* dword 2*/
661 u32 rx_unicast_frames; /* dword 3*/
662 u32 rx_multicast_frames; /* dword 4*/
663 u32 rx_broadcast_frames; /* dword 5*/
664 u32 rx_crc_errors; /* dword 6*/
665 u32 rx_alignment_symbol_errors; /* dword 7*/
666 u32 rx_pause_frames; /* dword 8*/
667 u32 rx_control_frames; /* dword 9*/
668 u32 rx_in_range_errors; /* dword 10*/
669 u32 rx_out_range_errors; /* dword 11*/
670 u32 rx_frame_too_long; /* dword 12*/
671 u32 rx_address_filtered; /* dword 13*/
672 u32 rx_vlan_filtered; /* dword 14*/
673 u32 rx_dropped_too_small; /* dword 15*/
674 u32 rx_dropped_too_short; /* dword 16*/
675 u32 rx_dropped_header_too_small; /* dword 17*/
676 u32 rx_dropped_tcp_length; /* dword 18*/
677 u32 rx_dropped_runt; /* dword 19*/
678 u32 rx_64_byte_packets; /* dword 20*/
679 u32 rx_65_127_byte_packets; /* dword 21*/
680 u32 rx_128_256_byte_packets; /* dword 22*/
681 u32 rx_256_511_byte_packets; /* dword 23*/
682 u32 rx_512_1023_byte_packets; /* dword 24*/
683 u32 rx_1024_1518_byte_packets; /* dword 25*/
684 u32 rx_1519_2047_byte_packets; /* dword 26*/
685 u32 rx_2048_4095_byte_packets; /* dword 27*/
686 u32 rx_4096_8191_byte_packets; /* dword 28*/
687 u32 rx_8192_9216_byte_packets; /* dword 29*/
688 u32 rx_ip_checksum_errs; /* dword 30*/
689 u32 rx_tcp_checksum_errs; /* dword 31*/
690 u32 rx_udp_checksum_errs; /* dword 32*/
691 u32 rx_non_rss_packets; /* dword 33*/
692 u32 rx_ipv4_packets; /* dword 34*/
693 u32 rx_ipv6_packets; /* dword 35*/
694 u32 rx_ipv4_bytes_lsd; /* dword 36*/
695 u32 rx_ipv4_bytes_msd; /* dword 37*/
696 u32 rx_ipv6_bytes_lsd; /* dword 38*/
697 u32 rx_ipv6_bytes_msd; /* dword 39*/
698 u32 rx_chute1_packets; /* dword 40*/
699 u32 rx_chute2_packets; /* dword 41*/
700 u32 rx_chute3_packets; /* dword 42*/
701 u32 rx_management_packets; /* dword 43*/
702 u32 rx_switched_unicast_packets; /* dword 44*/
703 u32 rx_switched_multicast_packets; /* dword 45*/
704 u32 rx_switched_broadcast_packets; /* dword 46*/
705 u32 tx_bytes_lsd; /* dword 47*/
706 u32 tx_bytes_msd; /* dword 48*/
707 u32 tx_unicastframes; /* dword 49*/
708 u32 tx_multicastframes; /* dword 50*/
709 u32 tx_broadcastframes; /* dword 51*/
710 u32 tx_pauseframes; /* dword 52*/
711 u32 tx_controlframes; /* dword 53*/
712 u32 tx_64_byte_packets; /* dword 54*/
713 u32 tx_65_127_byte_packets; /* dword 55*/
714 u32 tx_128_256_byte_packets; /* dword 56*/
715 u32 tx_256_511_byte_packets; /* dword 57*/
716 u32 tx_512_1023_byte_packets; /* dword 58*/
717 u32 tx_1024_1518_byte_packets; /* dword 59*/
718 u32 tx_1519_2047_byte_packets; /* dword 60*/
719 u32 tx_2048_4095_byte_packets; /* dword 61*/
720 u32 tx_4096_8191_byte_packets; /* dword 62*/
721 u32 tx_8192_9216_byte_packets; /* dword 63*/
722 u32 rx_fifo_overflow; /* dword 64*/
723 u32 rx_input_fifo_overflow; /* dword 65*/
726 struct be_rxf_stats_v0 {
727 struct be_port_rxf_stats_v0 port[2];
728 u32 rx_drops_no_pbuf; /* dword 132*/
729 u32 rx_drops_no_txpb; /* dword 133*/
730 u32 rx_drops_no_erx_descr; /* dword 134*/
731 u32 rx_drops_no_tpre_descr; /* dword 135*/
732 u32 management_rx_port_packets; /* dword 136*/
733 u32 management_rx_port_bytes; /* dword 137*/
734 u32 management_rx_port_pause_frames; /* dword 138*/
735 u32 management_rx_port_errors; /* dword 139*/
736 u32 management_tx_port_packets; /* dword 140*/
737 u32 management_tx_port_bytes; /* dword 141*/
738 u32 management_tx_port_pause; /* dword 142*/
739 u32 management_rx_port_rxfifo_overflow; /* dword 143*/
740 u32 rx_drops_too_many_frags; /* dword 144*/
741 u32 rx_drops_invalid_ring; /* dword 145*/
742 u32 forwarded_packets; /* dword 146*/
743 u32 rx_drops_mtu; /* dword 147*/
745 u32 port0_jabber_events;
746 u32 port1_jabber_events;
750 struct be_erx_stats_v0 {
751 u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
755 struct be_pmem_stats {
760 struct be_hw_stats_v0 {
761 struct be_rxf_stats_v0 rxf;
763 struct be_erx_stats_v0 erx;
764 struct be_pmem_stats pmem;
767 struct be_cmd_req_get_stats_v0 {
768 struct be_cmd_req_hdr hdr;
769 u8 rsvd[sizeof(struct be_hw_stats_v0)];
772 struct be_cmd_resp_get_stats_v0 {
773 struct be_cmd_resp_hdr hdr;
774 struct be_hw_stats_v0 hw_stats;
777 struct lancer_pport_stats {
780 u32 tx_unicast_packets_lo;
781 u32 tx_unicast_packets_hi;
782 u32 tx_multicast_packets_lo;
783 u32 tx_multicast_packets_hi;
784 u32 tx_broadcast_packets_lo;
785 u32 tx_broadcast_packets_hi;
788 u32 tx_unicast_bytes_lo;
789 u32 tx_unicast_bytes_hi;
790 u32 tx_multicast_bytes_lo;
791 u32 tx_multicast_bytes_hi;
792 u32 tx_broadcast_bytes_lo;
793 u32 tx_broadcast_bytes_hi;
798 u32 tx_pause_frames_lo;
799 u32 tx_pause_frames_hi;
800 u32 tx_pause_on_frames_lo;
801 u32 tx_pause_on_frames_hi;
802 u32 tx_pause_off_frames_lo;
803 u32 tx_pause_off_frames_hi;
804 u32 tx_internal_mac_errors_lo;
805 u32 tx_internal_mac_errors_hi;
806 u32 tx_control_frames_lo;
807 u32 tx_control_frames_hi;
808 u32 tx_packets_64_bytes_lo;
809 u32 tx_packets_64_bytes_hi;
810 u32 tx_packets_65_to_127_bytes_lo;
811 u32 tx_packets_65_to_127_bytes_hi;
812 u32 tx_packets_128_to_255_bytes_lo;
813 u32 tx_packets_128_to_255_bytes_hi;
814 u32 tx_packets_256_to_511_bytes_lo;
815 u32 tx_packets_256_to_511_bytes_hi;
816 u32 tx_packets_512_to_1023_bytes_lo;
817 u32 tx_packets_512_to_1023_bytes_hi;
818 u32 tx_packets_1024_to_1518_bytes_lo;
819 u32 tx_packets_1024_to_1518_bytes_hi;
820 u32 tx_packets_1519_to_2047_bytes_lo;
821 u32 tx_packets_1519_to_2047_bytes_hi;
822 u32 tx_packets_2048_to_4095_bytes_lo;
823 u32 tx_packets_2048_to_4095_bytes_hi;
824 u32 tx_packets_4096_to_8191_bytes_lo;
825 u32 tx_packets_4096_to_8191_bytes_hi;
826 u32 tx_packets_8192_to_9216_bytes_lo;
827 u32 tx_packets_8192_to_9216_bytes_hi;
828 u32 tx_lso_packets_lo;
829 u32 tx_lso_packets_hi;
832 u32 rx_unicast_packets_lo;
833 u32 rx_unicast_packets_hi;
834 u32 rx_multicast_packets_lo;
835 u32 rx_multicast_packets_hi;
836 u32 rx_broadcast_packets_lo;
837 u32 rx_broadcast_packets_hi;
840 u32 rx_unicast_bytes_lo;
841 u32 rx_unicast_bytes_hi;
842 u32 rx_multicast_bytes_lo;
843 u32 rx_multicast_bytes_hi;
844 u32 rx_broadcast_bytes_lo;
845 u32 rx_broadcast_bytes_hi;
846 u32 rx_unknown_protos;
847 u32 rsvd_69; /* Word 69 is reserved */
852 u32 rx_crc_errors_lo;
853 u32 rx_crc_errors_hi;
854 u32 rx_alignment_errors_lo;
855 u32 rx_alignment_errors_hi;
856 u32 rx_symbol_errors_lo;
857 u32 rx_symbol_errors_hi;
858 u32 rx_pause_frames_lo;
859 u32 rx_pause_frames_hi;
860 u32 rx_pause_on_frames_lo;
861 u32 rx_pause_on_frames_hi;
862 u32 rx_pause_off_frames_lo;
863 u32 rx_pause_off_frames_hi;
864 u32 rx_frames_too_long_lo;
865 u32 rx_frames_too_long_hi;
866 u32 rx_internal_mac_errors_lo;
867 u32 rx_internal_mac_errors_hi;
868 u32 rx_undersize_packets;
869 u32 rx_oversize_packets;
870 u32 rx_fragment_packets;
872 u32 rx_control_frames_lo;
873 u32 rx_control_frames_hi;
874 u32 rx_control_frames_unknown_opcode_lo;
875 u32 rx_control_frames_unknown_opcode_hi;
876 u32 rx_in_range_errors;
877 u32 rx_out_of_range_errors;
878 u32 rx_address_filtered;
879 u32 rx_vlan_filtered;
880 u32 rx_dropped_too_small;
881 u32 rx_dropped_too_short;
882 u32 rx_dropped_header_too_small;
883 u32 rx_dropped_invalid_tcp_length;
885 u32 rx_ip_checksum_errors;
886 u32 rx_tcp_checksum_errors;
887 u32 rx_udp_checksum_errors;
888 u32 rx_non_rss_packets;
890 u32 rx_ipv4_packets_lo;
891 u32 rx_ipv4_packets_hi;
892 u32 rx_ipv6_packets_lo;
893 u32 rx_ipv6_packets_hi;
894 u32 rx_ipv4_bytes_lo;
895 u32 rx_ipv4_bytes_hi;
896 u32 rx_ipv6_bytes_lo;
897 u32 rx_ipv6_bytes_hi;
898 u32 rx_nic_packets_lo;
899 u32 rx_nic_packets_hi;
900 u32 rx_tcp_packets_lo;
901 u32 rx_tcp_packets_hi;
902 u32 rx_iscsi_packets_lo;
903 u32 rx_iscsi_packets_hi;
904 u32 rx_management_packets_lo;
905 u32 rx_management_packets_hi;
906 u32 rx_switched_unicast_packets_lo;
907 u32 rx_switched_unicast_packets_hi;
908 u32 rx_switched_multicast_packets_lo;
909 u32 rx_switched_multicast_packets_hi;
910 u32 rx_switched_broadcast_packets_lo;
911 u32 rx_switched_broadcast_packets_hi;
914 u32 rx_fifo_overflow;
915 u32 rx_input_fifo_overflow;
916 u32 rx_drops_too_many_frags_lo;
917 u32 rx_drops_too_many_frags_hi;
918 u32 rx_drops_invalid_queue;
922 u32 rx_packets_64_bytes_lo;
923 u32 rx_packets_64_bytes_hi;
924 u32 rx_packets_65_to_127_bytes_lo;
925 u32 rx_packets_65_to_127_bytes_hi;
926 u32 rx_packets_128_to_255_bytes_lo;
927 u32 rx_packets_128_to_255_bytes_hi;
928 u32 rx_packets_256_to_511_bytes_lo;
929 u32 rx_packets_256_to_511_bytes_hi;
930 u32 rx_packets_512_to_1023_bytes_lo;
931 u32 rx_packets_512_to_1023_bytes_hi;
932 u32 rx_packets_1024_to_1518_bytes_lo;
933 u32 rx_packets_1024_to_1518_bytes_hi;
934 u32 rx_packets_1519_to_2047_bytes_lo;
935 u32 rx_packets_1519_to_2047_bytes_hi;
936 u32 rx_packets_2048_to_4095_bytes_lo;
937 u32 rx_packets_2048_to_4095_bytes_hi;
938 u32 rx_packets_4096_to_8191_bytes_lo;
939 u32 rx_packets_4096_to_8191_bytes_hi;
940 u32 rx_packets_8192_to_9216_bytes_lo;
941 u32 rx_packets_8192_to_9216_bytes_hi;
944 struct pport_stats_params {
950 struct lancer_cmd_req_pport_stats {
951 struct be_cmd_req_hdr hdr;
953 struct pport_stats_params params;
954 u8 rsvd[sizeof(struct lancer_pport_stats)];
958 struct lancer_cmd_resp_pport_stats {
959 struct be_cmd_resp_hdr hdr;
960 struct lancer_pport_stats pport_stats;
963 static inline struct lancer_pport_stats*
964 pport_stats_from_cmd(struct be_adapter *adapter)
966 struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
967 return &cmd->pport_stats;
970 struct be_cmd_req_get_cntl_addnl_attribs {
971 struct be_cmd_req_hdr hdr;
975 struct be_cmd_resp_get_cntl_addnl_attribs {
976 struct be_cmd_resp_hdr hdr;
980 u8 on_die_temperature; /* in degrees centigrade*/
984 struct be_cmd_req_vlan_config {
985 struct be_cmd_req_hdr hdr;
993 /******************* RX FILTER ******************************/
994 #define BE_MAX_MC 64 /* set mcast promisc if > 64 */
999 struct be_cmd_req_rx_filter {
1000 struct be_cmd_req_hdr hdr;
1001 u32 global_flags_mask;
1007 struct macaddr mcast_mac[BE_MAX_MC];
1010 /******************** Link Status Query *******************/
1011 struct be_cmd_req_link_status {
1012 struct be_cmd_req_hdr hdr;
1017 PHY_LINK_DUPLEX_NONE = 0x0,
1018 PHY_LINK_DUPLEX_HALF = 0x1,
1019 PHY_LINK_DUPLEX_FULL = 0x2
1023 PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
1024 PHY_LINK_SPEED_10MBPS = 0x1,
1025 PHY_LINK_SPEED_100MBPS = 0x2,
1026 PHY_LINK_SPEED_1GBPS = 0x3,
1027 PHY_LINK_SPEED_10GBPS = 0x4,
1028 PHY_LINK_SPEED_20GBPS = 0x5,
1029 PHY_LINK_SPEED_25GBPS = 0x6,
1030 PHY_LINK_SPEED_40GBPS = 0x7
1033 struct be_cmd_resp_link_status {
1034 struct be_cmd_resp_hdr hdr;
1042 u8 logical_link_status;
1046 /******************** Port Identification ***************************/
1047 /* Identifies the type of port attached to NIC */
1048 struct be_cmd_req_port_type {
1049 struct be_cmd_req_hdr hdr;
1059 /* From SFF-8436 QSFP+ spec */
1060 #define QSFP_PLUS_CABLE_TYPE_OFFSET 0x83
1061 #define QSFP_PLUS_CR4_CABLE 0x8
1062 #define QSFP_PLUS_SR4_CABLE 0x4
1063 #define QSFP_PLUS_LR4_CABLE 0x2
1065 /* From SFF-8472 spec */
1066 #define SFP_PLUS_SFF_8472_COMP 0x5E
1067 #define SFP_PLUS_CABLE_TYPE_OFFSET 0x8
1068 #define SFP_PLUS_COPPER_CABLE 0x4
1069 #define SFP_VENDOR_NAME_OFFSET 0x14
1070 #define SFP_VENDOR_PN_OFFSET 0x28
1072 #define PAGE_DATA_LEN 256
1073 struct be_cmd_resp_port_type {
1074 struct be_cmd_resp_hdr hdr;
1077 u8 page_data[PAGE_DATA_LEN];
1080 /******************** Get FW Version *******************/
1081 struct be_cmd_req_get_fw_version {
1082 struct be_cmd_req_hdr hdr;
1083 u8 rsvd0[FW_VER_LEN];
1084 u8 rsvd1[FW_VER_LEN];
1087 struct be_cmd_resp_get_fw_version {
1088 struct be_cmd_resp_hdr hdr;
1089 u8 firmware_version_string[FW_VER_LEN];
1090 u8 fw_on_flash_version_string[FW_VER_LEN];
1093 /******************** Set Flow Contrl *******************/
1094 struct be_cmd_req_set_flow_control {
1095 struct be_cmd_req_hdr hdr;
1096 u16 tx_flow_control;
1097 u16 rx_flow_control;
1100 /******************** Get Flow Contrl *******************/
1101 struct be_cmd_req_get_flow_control {
1102 struct be_cmd_req_hdr hdr;
1106 struct be_cmd_resp_get_flow_control {
1107 struct be_cmd_resp_hdr hdr;
1108 u16 tx_flow_control;
1109 u16 rx_flow_control;
1112 /******************** Modify EQ Delay *******************/
1116 u32 delay_multiplier;
1119 struct be_cmd_req_modify_eq_delay {
1120 struct be_cmd_req_hdr hdr;
1122 struct be_set_eqd set_eqd[MAX_EVT_QS];
1125 /******************** Get FW Config *******************/
1126 /* The HW can come up in either of the following multi-channel modes
1127 * based on the skew/IPL.
1129 #define RDMA_ENABLED 0x4
1130 #define QNQ_MODE 0x400
1131 #define VNIC_MODE 0x20000
1132 #define UMC_ENABLED 0x1000000
1133 struct be_cmd_req_query_fw_cfg {
1134 struct be_cmd_req_hdr hdr;
1138 struct be_cmd_resp_query_fw_cfg {
1139 struct be_cmd_resp_hdr hdr;
1140 u32 be_config_number;
1148 /******************** RSS Config ****************************************/
1149 /* RSS type Input parameters used to compute RX hash
1150 * RSS_ENABLE_IPV4 SRC IPv4, DST IPv4
1151 * RSS_ENABLE_TCP_IPV4 SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1152 * RSS_ENABLE_IPV6 SRC IPv6, DST IPv6
1153 * RSS_ENABLE_TCP_IPV6 SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1154 * RSS_ENABLE_UDP_IPV4 SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1155 * RSS_ENABLE_UDP_IPV6 SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1157 * When multiple RSS types are enabled, HW picks the best hash policy
1158 * based on the type of the received packet.
1160 #define RSS_ENABLE_NONE 0x0
1161 #define RSS_ENABLE_IPV4 0x1
1162 #define RSS_ENABLE_TCP_IPV4 0x2
1163 #define RSS_ENABLE_IPV6 0x4
1164 #define RSS_ENABLE_TCP_IPV6 0x8
1165 #define RSS_ENABLE_UDP_IPV4 0x10
1166 #define RSS_ENABLE_UDP_IPV6 0x20
1168 #define L3_RSS_FLAGS (RXH_IP_DST | RXH_IP_SRC)
1169 #define L4_RSS_FLAGS (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1171 struct be_cmd_req_rss_config {
1172 struct be_cmd_req_hdr hdr;
1175 u16 cpu_table_size_log2;
1182 /******************** Port Beacon ***************************/
1184 #define BEACON_STATE_ENABLED 0x1
1185 #define BEACON_STATE_DISABLED 0x0
1187 struct be_cmd_req_enable_disable_beacon {
1188 struct be_cmd_req_hdr hdr;
1195 struct be_cmd_req_get_beacon_state {
1196 struct be_cmd_req_hdr hdr;
1202 struct be_cmd_resp_get_beacon_state {
1203 struct be_cmd_resp_hdr resp_hdr;
1208 /* Flashrom related descriptors */
1209 #define MAX_FLASH_COMP 32
1211 /* Optypes of each component in the UFI */
1213 OPTYPE_ISCSI_ACTIVE = 0,
1216 OPTYPE_PXE_BIOS = 3,
1217 OPTYPE_OFFSET_SPECIFIED = 7,
1218 OPTYPE_FCOE_BIOS = 8,
1219 OPTYPE_ISCSI_BACKUP = 9,
1220 OPTYPE_FCOE_FW_ACTIVE = 10,
1221 OPTYPE_FCOE_FW_BACKUP = 11,
1222 OPTYPE_NCSI_FW = 13,
1223 OPTYPE_REDBOOT_DIR = 18,
1224 OPTYPE_REDBOOT_CONFIG = 19,
1225 OPTYPE_SH_PHY_FW = 21,
1226 OPTYPE_FLASHISM_JUMPVECTOR = 22,
1227 OPTYPE_UFI_DIR = 23,
1231 /* Maximum sizes of components in BE2 FW UFI */
1233 BE2_BIOS_COMP_MAX_SIZE = 0x40000,
1234 BE2_REDBOOT_COMP_MAX_SIZE = 0x40000,
1235 BE2_COMP_MAX_SIZE = 0x140000
1238 /* Maximum sizes of components in BE3 FW UFI */
1240 BE3_NCSI_COMP_MAX_SIZE = 0x40000,
1241 BE3_PHY_FW_COMP_MAX_SIZE = 0x40000,
1242 BE3_BIOS_COMP_MAX_SIZE = 0x80000,
1243 BE3_REDBOOT_COMP_MAX_SIZE = 0x100000,
1244 BE3_COMP_MAX_SIZE = 0x200000
1247 /* Offsets for components in BE2 FW UFI */
1249 BE2_REDBOOT_START = 0x8000,
1250 BE2_FCOE_BIOS_START = 0x80000,
1251 BE2_ISCSI_PRIMARY_IMAGE_START = 0x100000,
1252 BE2_ISCSI_BACKUP_IMAGE_START = 0x240000,
1253 BE2_FCOE_PRIMARY_IMAGE_START = 0x380000,
1254 BE2_FCOE_BACKUP_IMAGE_START = 0x4c0000,
1255 BE2_ISCSI_BIOS_START = 0x700000,
1256 BE2_PXE_BIOS_START = 0x780000
1259 /* Offsets for components in BE3 FW UFI */
1261 BE3_REDBOOT_START = 0x40000,
1262 BE3_PHY_FW_START = 0x140000,
1263 BE3_ISCSI_PRIMARY_IMAGE_START = 0x200000,
1264 BE3_ISCSI_BACKUP_IMAGE_START = 0x400000,
1265 BE3_FCOE_PRIMARY_IMAGE_START = 0x600000,
1266 BE3_FCOE_BACKUP_IMAGE_START = 0x800000,
1267 BE3_ISCSI_BIOS_START = 0xc00000,
1268 BE3_PXE_BIOS_START = 0xc80000,
1269 BE3_FCOE_BIOS_START = 0xd00000,
1270 BE3_NCSI_START = 0xf40000
1273 /* Component entry types */
1276 IMAGE_OPTION_ROM_PXE = 0x20,
1277 IMAGE_OPTION_ROM_FCOE = 0x21,
1278 IMAGE_OPTION_ROM_ISCSI = 0x22,
1279 IMAGE_FLASHISM_JUMPVECTOR = 0x30,
1280 IMAGE_FIRMWARE_ISCSI = 0xa0,
1281 IMAGE_FIRMWARE_FCOE = 0xa2,
1282 IMAGE_FIRMWARE_BACKUP_ISCSI = 0xb0,
1283 IMAGE_FIRMWARE_BACKUP_FCOE = 0xb2,
1284 IMAGE_FIRMWARE_PHY = 0xc0,
1285 IMAGE_REDBOOT_DIR = 0xd0,
1286 IMAGE_REDBOOT_CONFIG = 0xd1,
1287 IMAGE_UFI_DIR = 0xd2,
1288 IMAGE_BOOT_CODE = 0xe2
1291 struct controller_id {
1299 unsigned long offset;
1310 u8 image_version[32];
1313 struct flash_file_hdr_g2 {
1317 struct controller_id cont_id;
1325 /* First letter of the build version of the image */
1326 #define BLD_STR_UFI_TYPE_BE2 '2'
1327 #define BLD_STR_UFI_TYPE_BE3 '3'
1328 #define BLD_STR_UFI_TYPE_SH '4'
1330 struct flash_file_hdr_g3 {
1342 struct flash_section_hdr {
1351 struct flash_section_hdr_g2 {
1360 struct flash_section_entry {
1373 struct flash_section_info {
1375 struct flash_section_hdr fsec_hdr;
1376 struct flash_section_entry fsec_entry[32];
1379 struct flash_section_info_g2 {
1381 struct flash_section_hdr_g2 fsec_hdr;
1382 struct flash_section_entry fsec_entry[32];
1385 /****************** Firmware Flash ******************/
1386 #define FLASHROM_OPER_FLASH 1
1387 #define FLASHROM_OPER_SAVE 2
1388 #define FLASHROM_OPER_REPORT 4
1389 #define FLASHROM_OPER_PHY_FLASH 9
1390 #define FLASHROM_OPER_PHY_SAVE 10
1392 struct flashrom_params {
1399 struct be_cmd_write_flashrom {
1400 struct be_cmd_req_hdr hdr;
1401 struct flashrom_params params;
1406 /* cmd to read flash crc */
1407 struct be_cmd_read_flash_crc {
1408 struct be_cmd_req_hdr hdr;
1409 struct flashrom_params params;
1414 /**************** Lancer Firmware Flash ************/
1415 #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
1416 #define LANCER_FW_DOWNLOAD_LOCATION "/prg"
1418 struct amap_lancer_write_obj_context {
1419 u8 write_length[24];
1424 struct lancer_cmd_req_write_object {
1425 struct be_cmd_req_hdr hdr;
1426 u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1428 u8 object_name[104];
1429 u32 descriptor_count;
1435 #define LANCER_NO_RESET_NEEDED 0x00
1436 #define LANCER_FW_RESET_NEEDED 0x02
1437 struct lancer_cmd_resp_write_object {
1442 u8 additional_status;
1445 u32 actual_resp_len;
1446 u32 actual_write_len;
1451 /************************ Lancer Read FW info **************/
1452 #define LANCER_READ_FILE_CHUNK (32*1024)
1453 #define LANCER_READ_FILE_EOF_MASK 0x80000000
1455 #define LANCER_FW_DUMP_FILE "/dbg/dump.bin"
1456 #define LANCER_VPD_PF_FILE "/vpd/ntr_pf.vpd"
1457 #define LANCER_VPD_VF_FILE "/vpd/ntr_vf.vpd"
1459 struct lancer_cmd_req_read_object {
1460 struct be_cmd_req_hdr hdr;
1461 u32 desired_read_len;
1463 u8 object_name[104];
1464 u32 descriptor_count;
1470 struct lancer_cmd_resp_read_object {
1475 u8 additional_status;
1478 u32 actual_resp_len;
1479 u32 actual_read_len;
1483 struct lancer_cmd_req_delete_object {
1484 struct be_cmd_req_hdr hdr;
1487 u8 object_name[104];
1490 /************************ WOL *******************************/
1491 struct be_cmd_req_acpi_wol_magic_config{
1492 struct be_cmd_req_hdr hdr;
1498 struct be_cmd_req_acpi_wol_magic_config_v1 {
1499 struct be_cmd_req_hdr hdr;
1508 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1509 struct be_cmd_resp_hdr hdr;
1516 #define BE_GET_WOL_CAP 2
1518 #define BE_WOL_CAP 0x1
1519 #define BE_PME_D0_CAP 0x8
1520 #define BE_PME_D1_CAP 0x10
1521 #define BE_PME_D2_CAP 0x20
1522 #define BE_PME_D3HOT_CAP 0x40
1523 #define BE_PME_D3COLD_CAP 0x80
1525 /********************** LoopBack test *********************/
1526 #define SET_LB_MODE_TIMEOUT 12000
1528 struct be_cmd_req_loopback_test {
1529 struct be_cmd_req_hdr hdr;
1538 struct be_cmd_resp_loopback_test {
1539 struct be_cmd_resp_hdr resp_hdr;
1547 struct be_cmd_req_set_lmode {
1548 struct be_cmd_req_hdr hdr;
1555 /********************** DDR DMA test *********************/
1556 struct be_cmd_req_ddrdma_test {
1557 struct be_cmd_req_hdr hdr;
1565 struct be_cmd_resp_ddrdma_test {
1566 struct be_cmd_resp_hdr hdr;
1574 /*********************** SEEPROM Read ***********************/
1576 #define BE_READ_SEEPROM_LEN 1024
1577 struct be_cmd_req_seeprom_read {
1578 struct be_cmd_req_hdr hdr;
1579 u8 rsvd0[BE_READ_SEEPROM_LEN];
1582 struct be_cmd_resp_seeprom_read {
1583 struct be_cmd_req_hdr hdr;
1584 u8 seeprom_data[BE_READ_SEEPROM_LEN];
1588 PHY_TYPE_CX4_10GB = 0,
1591 PHY_TYPE_SFP_PLUS_10GB,
1594 PHY_TYPE_BASET_10GB,
1602 PHY_TYPE_DISABLED = 255
1605 #define BE_SUPPORTED_SPEED_NONE 0
1606 #define BE_SUPPORTED_SPEED_10MBPS 1
1607 #define BE_SUPPORTED_SPEED_100MBPS 2
1608 #define BE_SUPPORTED_SPEED_1GBPS 4
1609 #define BE_SUPPORTED_SPEED_10GBPS 8
1610 #define BE_SUPPORTED_SPEED_20GBPS 0x10
1611 #define BE_SUPPORTED_SPEED_40GBPS 0x20
1613 #define BE_AN_EN 0x2
1614 #define BE_PAUSE_SYM_EN 0x80
1616 /* MAC speed valid values */
1617 #define SPEED_DEFAULT 0x0
1618 #define SPEED_FORCED_10GB 0x1
1619 #define SPEED_FORCED_1GB 0x2
1620 #define SPEED_AUTONEG_10GB 0x3
1621 #define SPEED_AUTONEG_1GB 0x4
1622 #define SPEED_AUTONEG_100MB 0x5
1623 #define SPEED_AUTONEG_10GB_1GB 0x6
1624 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1625 #define SPEED_AUTONEG_1GB_100MB 0x8
1626 #define SPEED_AUTONEG_10MB 0x9
1627 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1628 #define SPEED_AUTONEG_100MB_10MB 0xb
1629 #define SPEED_FORCED_100MB 0xc
1630 #define SPEED_FORCED_10MB 0xd
1632 struct be_cmd_req_get_phy_info {
1633 struct be_cmd_req_hdr hdr;
1637 struct be_phy_info {
1641 u16 ext_phy_details;
1643 u16 auto_speeds_supported;
1644 u16 fixed_speeds_supported;
1648 struct be_cmd_resp_get_phy_info {
1649 struct be_cmd_req_hdr hdr;
1650 struct be_phy_info phy_info;
1653 /*********************** Set QOS ***********************/
1655 #define BE_QOS_BITS_NIC 1
1657 struct be_cmd_req_set_qos {
1658 struct be_cmd_req_hdr hdr;
1664 /*********************** Controller Attributes ***********************/
1665 struct mgmt_hba_attribs {
1667 u8 controller_model_number[32];
1669 u32 controller_serial_number[8];
1676 struct mgmt_controller_attrib {
1677 struct mgmt_hba_attribs hba_attribs;
1681 struct be_cmd_req_cntl_attribs {
1682 struct be_cmd_req_hdr hdr;
1685 struct be_cmd_resp_cntl_attribs {
1686 struct be_cmd_resp_hdr hdr;
1687 struct mgmt_controller_attrib attribs;
1690 /*********************** Set driver function ***********************/
1691 #define CAPABILITY_SW_TIMESTAMPS 2
1692 #define CAPABILITY_BE3_NATIVE_ERX_API 4
1694 struct be_cmd_req_set_func_cap {
1695 struct be_cmd_req_hdr hdr;
1696 u32 valid_cap_flags;
1701 struct be_cmd_resp_set_func_cap {
1702 struct be_cmd_resp_hdr hdr;
1703 u32 valid_cap_flags;
1708 /*********************** Function Privileges ***********************/
1710 BE_PRIV_DEFAULT = 0x1,
1711 BE_PRIV_LNKQUERY = 0x2,
1712 BE_PRIV_LNKSTATS = 0x4,
1713 BE_PRIV_LNKMGMT = 0x8,
1714 BE_PRIV_LNKDIAG = 0x10,
1715 BE_PRIV_UTILQUERY = 0x20,
1716 BE_PRIV_FILTMGMT = 0x40,
1717 BE_PRIV_IFACEMGMT = 0x80,
1718 BE_PRIV_VHADM = 0x100,
1719 BE_PRIV_DEVCFG = 0x200,
1720 BE_PRIV_DEVSEC = 0x400
1722 #define MAX_PRIVILEGES (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1724 #define MIN_PRIVILEGES BE_PRIV_DEFAULT
1726 struct be_cmd_priv_map {
1732 struct be_cmd_req_get_fn_privileges {
1733 struct be_cmd_req_hdr hdr;
1737 struct be_cmd_resp_get_fn_privileges {
1738 struct be_cmd_resp_hdr hdr;
1742 struct be_cmd_req_set_fn_privileges {
1743 struct be_cmd_req_hdr hdr;
1744 u32 privileges; /* Used by BE3, SH-R */
1745 u32 privileges_lancer; /* Used by Lancer */
1748 /******************** GET/SET_MACLIST **************************/
1749 #define BE_MAX_MAC 64
1750 struct be_cmd_req_get_mac_list {
1751 struct be_cmd_req_hdr hdr;
1759 struct get_list_macaddr {
1766 } __packed s_mac_id;
1767 } __packed mac_addr_id;
1770 struct be_cmd_resp_get_mac_list {
1771 struct be_cmd_resp_hdr hdr;
1772 struct get_list_macaddr fd_macaddr; /* Factory default mac */
1773 struct get_list_macaddr macid_macaddr; /* soft mac */
1775 u8 pseudo_mac_count;
1778 /* perm override mac */
1779 struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1782 struct be_cmd_req_set_mac_list {
1783 struct be_cmd_req_hdr hdr;
1787 struct macaddr mac[BE_MAX_MAC];
1790 /*********************** HSW Config ***********************/
1791 #define PORT_FWD_TYPE_VEPA 0x3
1792 #define PORT_FWD_TYPE_VEB 0x2
1793 #define PORT_FWD_TYPE_PASSTHRU 0x1
1795 #define ENABLE_MAC_SPOOFCHK 0x2
1796 #define DISABLE_MAC_SPOOFCHK 0x3
1798 struct amap_set_hsw_context {
1799 u8 interface_id[16];
1806 u8 port_fwd_type[3];
1808 u8 vlan_spoofchk[2];
1815 struct be_cmd_req_set_hsw_config {
1816 struct be_cmd_req_hdr hdr;
1817 u8 context[sizeof(struct amap_set_hsw_context) / 8];
1820 struct amap_get_hsw_req_context {
1821 u8 interface_id[16];
1827 struct amap_get_hsw_resp_context {
1829 u8 port_fwd_type[3];
1839 struct be_cmd_req_get_hsw_config {
1840 struct be_cmd_req_hdr hdr;
1841 u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1844 struct be_cmd_resp_get_hsw_config {
1845 struct be_cmd_resp_hdr hdr;
1846 u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1850 /******************* get port names ***************/
1851 struct be_cmd_req_get_port_name {
1852 struct be_cmd_req_hdr hdr;
1856 struct be_cmd_resp_get_port_name {
1857 struct be_cmd_req_hdr hdr;
1861 /*************** HW Stats Get v1 **********************************/
1862 #define BE_TXP_SW_SZ 48
1863 struct be_port_rxf_stats_v1 {
1866 u32 rx_alignment_symbol_errors;
1867 u32 rx_pause_frames;
1868 u32 rx_priority_pause_frames;
1869 u32 rx_control_frames;
1870 u32 rx_in_range_errors;
1871 u32 rx_out_range_errors;
1872 u32 rx_frame_too_long;
1873 u32 rx_address_filtered;
1874 u32 rx_dropped_too_small;
1875 u32 rx_dropped_too_short;
1876 u32 rx_dropped_header_too_small;
1877 u32 rx_dropped_tcp_length;
1878 u32 rx_dropped_runt;
1880 u32 rx_ip_checksum_errs;
1881 u32 rx_tcp_checksum_errs;
1882 u32 rx_udp_checksum_errs;
1884 u32 rx_switched_unicast_packets;
1885 u32 rx_switched_multicast_packets;
1886 u32 rx_switched_broadcast_packets;
1889 u32 tx_priority_pauseframes;
1890 u32 tx_controlframes;
1892 u32 rxpp_fifo_overflow_drop;
1893 u32 rx_input_fifo_overflow_drop;
1894 u32 pmem_fifo_overflow_drop;
1900 struct be_rxf_stats_v1 {
1901 struct be_port_rxf_stats_v1 port[4];
1903 u32 rx_drops_no_pbuf;
1904 u32 rx_drops_no_txpb;
1905 u32 rx_drops_no_erx_descr;
1906 u32 rx_drops_no_tpre_descr;
1908 u32 rx_drops_too_many_frags;
1909 u32 rx_drops_invalid_ring;
1910 u32 forwarded_packets;
1915 struct be_erx_stats_v1 {
1916 u32 rx_drops_no_fragments[68]; /* dwordS 0 to 67*/
1920 struct be_port_rxf_stats_v2 {
1922 u32 roce_bytes_received_lsd;
1923 u32 roce_bytes_received_msd;
1925 u32 roce_frames_received;
1927 u32 rx_alignment_symbol_errors;
1928 u32 rx_pause_frames;
1929 u32 rx_priority_pause_frames;
1930 u32 rx_control_frames;
1931 u32 rx_in_range_errors;
1932 u32 rx_out_range_errors;
1933 u32 rx_frame_too_long;
1934 u32 rx_address_filtered;
1935 u32 rx_dropped_too_small;
1936 u32 rx_dropped_too_short;
1937 u32 rx_dropped_header_too_small;
1938 u32 rx_dropped_tcp_length;
1939 u32 rx_dropped_runt;
1941 u32 rx_ip_checksum_errs;
1942 u32 rx_tcp_checksum_errs;
1943 u32 rx_udp_checksum_errs;
1945 u32 rx_switched_unicast_packets;
1946 u32 rx_switched_multicast_packets;
1947 u32 rx_switched_broadcast_packets;
1950 u32 tx_priority_pauseframes;
1951 u32 tx_controlframes;
1953 u32 rxpp_fifo_overflow_drop;
1954 u32 rx_input_fifo_overflow_drop;
1955 u32 pmem_fifo_overflow_drop;
1958 u32 rx_drops_payload_size;
1959 u32 rx_drops_clipped_header;
1961 u32 roce_drops_payload_len;
1966 struct be_rxf_stats_v2 {
1967 struct be_port_rxf_stats_v2 port[4];
1969 u32 rx_drops_no_pbuf;
1970 u32 rx_drops_no_txpb;
1971 u32 rx_drops_no_erx_descr;
1972 u32 rx_drops_no_tpre_descr;
1974 u32 rx_drops_too_many_frags;
1975 u32 rx_drops_invalid_ring;
1976 u32 forwarded_packets;
1981 struct be_hw_stats_v1 {
1982 struct be_rxf_stats_v1 rxf;
1983 u32 rsvd0[BE_TXP_SW_SZ];
1984 struct be_erx_stats_v1 erx;
1985 struct be_pmem_stats pmem;
1989 struct be_cmd_req_get_stats_v1 {
1990 struct be_cmd_req_hdr hdr;
1991 u8 rsvd[sizeof(struct be_hw_stats_v1)];
1994 struct be_cmd_resp_get_stats_v1 {
1995 struct be_cmd_resp_hdr hdr;
1996 struct be_hw_stats_v1 hw_stats;
1999 struct be_erx_stats_v2 {
2000 u32 rx_drops_no_fragments[136]; /* dwordS 0 to 135*/
2004 struct be_hw_stats_v2 {
2005 struct be_rxf_stats_v2 rxf;
2006 u32 rsvd0[BE_TXP_SW_SZ];
2007 struct be_erx_stats_v2 erx;
2008 struct be_pmem_stats pmem;
2012 struct be_cmd_req_get_stats_v2 {
2013 struct be_cmd_req_hdr hdr;
2014 u8 rsvd[sizeof(struct be_hw_stats_v2)];
2017 struct be_cmd_resp_get_stats_v2 {
2018 struct be_cmd_resp_hdr hdr;
2019 struct be_hw_stats_v2 hw_stats;
2022 /************** get fat capabilites *******************/
2023 #define MAX_MODULES 27
2026 #define FW_LOG_LEVEL_DEFAULT 48
2027 #define FW_LOG_LEVEL_FATAL 64
2029 struct ext_fat_mode {
2037 struct ext_fat_modules {
2041 struct ext_fat_mode trace_lvl[MAX_MODES];
2044 struct be_fat_conf_params {
2045 u32 max_log_entries;
2053 struct ext_fat_modules module[MAX_MODULES];
2056 struct be_cmd_req_get_ext_fat_caps {
2057 struct be_cmd_req_hdr hdr;
2061 struct be_cmd_resp_get_ext_fat_caps {
2062 struct be_cmd_resp_hdr hdr;
2063 struct be_fat_conf_params get_params;
2066 struct be_cmd_req_set_ext_fat_caps {
2067 struct be_cmd_req_hdr hdr;
2068 struct be_fat_conf_params set_params;
2071 #define RESOURCE_DESC_SIZE_V0 72
2072 #define RESOURCE_DESC_SIZE_V1 88
2073 #define PCIE_RESOURCE_DESC_TYPE_V0 0x40
2074 #define NIC_RESOURCE_DESC_TYPE_V0 0x41
2075 #define PCIE_RESOURCE_DESC_TYPE_V1 0x50
2076 #define NIC_RESOURCE_DESC_TYPE_V1 0x51
2077 #define PORT_RESOURCE_DESC_TYPE_V1 0x55
2078 #define MAX_RESOURCE_DESC 264
2080 #define IF_CAPS_FLAGS_VALID_SHIFT 0 /* IF caps valid */
2081 #define VFT_SHIFT 3 /* VF template */
2082 #define IMM_SHIFT 6 /* Immediate */
2083 #define NOSV_SHIFT 7 /* No save */
2085 struct be_res_desc_hdr {
2090 struct be_port_res_desc {
2091 struct be_res_desc_hdr hdr;
2098 #define NV_TYPE_MASK 0x3 /* bits 0-1 */
2099 #define NV_TYPE_DISABLED 1
2100 #define NV_TYPE_VXLAN 3
2101 #define SOCVID_SHIFT 2 /* Strip outer vlan */
2102 #define RCVID_SHIFT 4 /* Report vlan */
2103 #define PF_NUM_IGNORE 255
2106 __le16 nv_port; /* vxlan/gre port */
2110 struct be_pcie_res_desc {
2111 struct be_res_desc_hdr hdr;
2127 struct be_nic_res_desc {
2128 struct be_res_desc_hdr hdr;
2131 #define QUN_SHIFT 4 /* QoS is in absolute units */
2137 u16 unicast_mac_count;
2141 u16 mcast_mac_count;
2154 u16 channel_id_param;
2160 u16 tunnel_iface_count;
2161 u16 direct_tenant_iface_count;
2165 /************ Multi-Channel type ***********/
2176 /* Is BE in a multi-channel mode */
2177 static inline bool be_is_mc(struct be_adapter *adapter)
2179 return adapter->mc_type > MC_NONE;
2182 struct be_cmd_req_get_func_config {
2183 struct be_cmd_req_hdr hdr;
2186 struct be_cmd_resp_get_func_config {
2187 struct be_cmd_resp_hdr hdr;
2189 u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2197 struct be_cmd_req_get_profile_config {
2198 struct be_cmd_req_hdr hdr;
2200 #define ACTIVE_PROFILE_TYPE 0x2
2201 #define QUERY_MODIFIABLE_FIELDS_TYPE BIT(3)
2206 struct be_cmd_resp_get_profile_config {
2207 struct be_cmd_resp_hdr hdr;
2210 u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2213 #define FIELD_MODIFIABLE 0xFFFF
2214 struct be_cmd_req_set_profile_config {
2215 struct be_cmd_req_hdr hdr;
2218 u8 desc[2 * RESOURCE_DESC_SIZE_V1];
2221 struct be_cmd_req_get_active_profile {
2222 struct be_cmd_req_hdr hdr;
2226 struct be_cmd_resp_get_active_profile {
2227 struct be_cmd_resp_hdr hdr;
2228 u16 active_profile_id;
2229 u16 next_profile_id;
2232 struct be_cmd_enable_disable_vf {
2233 struct be_cmd_req_hdr hdr;
2238 struct be_cmd_req_intr_set {
2239 struct be_cmd_req_hdr hdr;
2244 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
2246 return flags & adapter->cmd_privileges ? true : false;
2249 /************** Get IFACE LIST *******************/
2256 struct be_cmd_req_get_iface_list {
2257 struct be_cmd_req_hdr hdr;
2260 struct be_cmd_resp_get_iface_list {
2261 struct be_cmd_req_hdr hdr;
2263 struct be_if_desc if_desc;
2266 /*************** Set logical link ********************/
2267 #define PLINK_ENABLE BIT(0)
2268 #define PLINK_TRACK BIT(8)
2269 struct be_cmd_req_set_ll_link {
2270 struct be_cmd_req_hdr hdr;
2271 u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2274 /************** Manage IFACE Filters *******************/
2275 #define OP_CONVERT_NORMAL_TO_TUNNEL 0
2276 #define OP_CONVERT_TUNNEL_TO_NORMAL 1
2278 struct be_cmd_req_manage_iface_filters {
2279 struct be_cmd_req_hdr hdr;
2284 u32 tunnel_iface_id;
2285 u32 target_iface_id;
2291 u32 cap_control_flags;
2294 int be_pci_fnum_get(struct be_adapter *adapter);
2295 int be_fw_wait_ready(struct be_adapter *adapter);
2296 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
2297 bool permanent, u32 if_handle, u32 pmac_id);
2298 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id,
2299 u32 *pmac_id, u32 domain);
2300 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
2302 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
2303 u32 *if_handle, u32 domain);
2304 int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain);
2305 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
2306 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
2307 struct be_queue_info *eq, bool no_delay,
2308 int num_cqe_dma_coalesce);
2309 int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq,
2310 struct be_queue_info *cq);
2311 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo);
2312 int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq,
2313 u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
2314 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
2316 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q);
2317 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
2318 u8 *link_status, u32 dom);
2319 int be_cmd_reset(struct be_adapter *adapter);
2320 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd);
2321 int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
2322 struct be_dma_mem *nonemb_cmd);
2323 int be_cmd_get_fw_ver(struct be_adapter *adapter);
2324 int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num);
2325 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
2326 u32 num, u32 domain);
2327 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
2328 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc);
2329 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc);
2330 int be_cmd_query_fw_cfg(struct be_adapter *adapter);
2331 int be_cmd_reset_function(struct be_adapter *adapter);
2332 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2333 u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey);
2334 int be_process_mcc(struct be_adapter *adapter);
2335 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon,
2336 u8 status, u8 state);
2337 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num,
2339 int be_cmd_read_port_transceiver_data(struct be_adapter *adapter,
2340 u8 page_num, u8 *data);
2341 int be_cmd_query_cable_type(struct be_adapter *adapter);
2342 int be_cmd_query_sfp_info(struct be_adapter *adapter);
2343 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2344 u32 data_size, u32 data_offset, const char *obj_name,
2345 u32 *data_read, u32 *eof, u8 *addn_status);
2346 int lancer_fw_download(struct be_adapter *adapter, const struct firmware *fw);
2347 int be_fw_download(struct be_adapter *adapter, const struct firmware *fw);
2348 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2349 struct be_dma_mem *nonemb_cmd);
2350 int be_cmd_fw_init(struct be_adapter *adapter);
2351 int be_cmd_fw_clean(struct be_adapter *adapter);
2352 void be_async_mcc_enable(struct be_adapter *adapter);
2353 void be_async_mcc_disable(struct be_adapter *adapter);
2354 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2355 u32 loopback_type, u32 pkt_size, u32 num_pkts,
2357 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt,
2358 struct be_dma_mem *cmd);
2359 int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2360 struct be_dma_mem *nonemb_cmd);
2361 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2362 u8 loopback_type, u8 enable);
2363 int be_cmd_get_phy_info(struct be_adapter *adapter);
2364 int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate,
2365 u16 link_speed, u8 domain);
2366 void be_detect_error(struct be_adapter *adapter);
2367 int be_cmd_get_die_temperature(struct be_adapter *adapter);
2368 int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
2369 int be_cmd_get_fat_dump_len(struct be_adapter *adapter, u32 *dump_size);
2370 int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf);
2371 int be_cmd_req_native_mode(struct be_adapter *adapter);
2372 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2374 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2376 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2377 bool *pmac_id_active, u32 *pmac_id,
2378 u32 if_handle, u8 domain);
2379 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac,
2380 u32 if_handle, bool active, u32 domain);
2381 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
2382 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count,
2384 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom);
2385 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
2386 u16 intf_id, u16 hsw_mode, u8 spoofchk);
2387 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
2388 u16 intf_id, u8 *mode, bool *spoofchk);
2389 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
2390 int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
2391 int be_cmd_get_fw_log_level(struct be_adapter *adapter);
2392 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
2393 struct be_dma_mem *cmd);
2394 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
2395 struct be_dma_mem *cmd,
2396 struct be_fat_conf_params *cfgs);
2397 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
2398 int lancer_initiate_dump(struct be_adapter *adapter);
2399 int lancer_delete_dump(struct be_adapter *adapter);
2400 bool dump_present(struct be_adapter *adapter);
2401 int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
2402 int be_cmd_query_port_name(struct be_adapter *adapter);
2403 int be_cmd_get_func_config(struct be_adapter *adapter,
2404 struct be_resources *res);
2405 int be_cmd_get_profile_config(struct be_adapter *adapter,
2406 struct be_resources *res, u8 query, u8 domain);
2407 int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile);
2408 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
2410 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
2411 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
2412 int be_cmd_set_logical_link_config(struct be_adapter *adapter,
2413 int link_state, u8 domain);
2414 int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port);
2415 int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op);
2416 int be_cmd_set_sriov_config(struct be_adapter *adapter,
2417 struct be_resources res, u16 num_vfs,