drivers/net/ethernet/ezchip/nps_enet.c

   1 /*
   2  * Copyright(c) 2015 EZchip Technologies.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/of_address.h>
  20 #include <linux/of_irq.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_platform.h>
  23 #include "nps_enet.h"
  24
  25 #define DRV_NAME                        "nps_mgt_enet"
  26
  27 static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
  28 {
  29         struct nps_enet_priv *priv = netdev_priv(ndev);
  30         u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
  31
  32         /* Empty Rx FIFO buffer by reading all words */
  33         for (i = 0; i < len; i++)
  34                 nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  35 }
  36
  37 static void nps_enet_read_rx_fifo(struct net_device *ndev,
  38                                   unsigned char *dst, u32 length)
  39 {
  40         struct nps_enet_priv *priv = netdev_priv(ndev);
  41         s32 i, last = length & (sizeof(u32) - 1);
  42         u32 *reg = (u32 *)dst, len = length / sizeof(u32);
  43         bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
  44
  45         /* In case dst is not aligned we need an intermediate buffer */
  46         if (dst_is_aligned)
  47                 for (i = 0; i < len; i++, reg++)
  48                         *reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  49         else { /* !dst_is_aligned */
  50                 for (i = 0; i < len; i++, reg++) {
  51                         u32 buf =
  52                                 nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  53
  54                         /* to accommodate word-unaligned address of "reg"
  55                          * we have to do memcpy_toio() instead of simple "=".
  56                          */
  57                         memcpy_toio((void __iomem *)reg, &buf, sizeof(buf));
  58                 }
  59         }
  60
  61         /* copy last bytes (if any) */
  62         if (last) {
  63                 u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
  64
  65                 memcpy_toio((void __iomem *)reg, &buf, last);
  66         }
  67 }
  68
  69 static u32 nps_enet_rx_handler(struct net_device *ndev)
  70 {
  71         u32 frame_len, err = 0;
  72         u32 work_done = 0;
  73         struct nps_enet_priv *priv = netdev_priv(ndev);
  74         struct sk_buff *skb;
  75         struct nps_enet_rx_ctl rx_ctrl;
  76
  77         rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
  78         frame_len = rx_ctrl.nr;
  79
  80         /* Check if we got RX */
  81         if (!rx_ctrl.cr)
  82                 return work_done;
  83
  84         /* If we got here there is a work for us */
  85         work_done++;
  86
  87         /* Check Rx error */
  88         if (rx_ctrl.er) {
  89                 ndev->stats.rx_errors++;
  90                 err = 1;
  91         }
  92
  93         /* Check Rx CRC error */
  94         if (rx_ctrl.crc) {
  95                 ndev->stats.rx_crc_errors++;
  96                 ndev->stats.rx_dropped++;
  97                 err = 1;
  98         }
  99
 100         /* Check Frame length Min 64b */
 101         if (unlikely(frame_len < ETH_ZLEN)) {
 102                 ndev->stats.rx_length_errors++;
 103                 ndev->stats.rx_dropped++;
 104                 err = 1;
 105         }
 106
 107         if (err)
 108                 goto rx_irq_clean;
 109
 110         /* Skb allocation */
 111         skb = netdev_alloc_skb_ip_align(ndev, frame_len);
 112         if (unlikely(!skb)) {
 113                 ndev->stats.rx_errors++;
 114                 ndev->stats.rx_dropped++;
 115                 goto rx_irq_clean;
 116         }
 117
 118         /* Copy frame from Rx fifo into the skb */
 119         nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
 120
 121         skb_put(skb, frame_len);
 122         skb->protocol = eth_type_trans(skb, ndev);
 123         skb->ip_summed = CHECKSUM_UNNECESSARY;
 124
 125         ndev->stats.rx_packets++;
 126         ndev->stats.rx_bytes += frame_len;
 127         netif_receive_skb(skb);
 128
 129         goto rx_irq_frame_done;
 130
 131 rx_irq_clean:
 132         /* Clean Rx fifo */
 133         nps_enet_clean_rx_fifo(ndev, frame_len);
 134
 135 rx_irq_frame_done:
 136         /* Ack Rx ctrl register */
 137         nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
 138
 139         return work_done;
 140 }
 141
 142 static void nps_enet_tx_handler(struct net_device *ndev)
 143 {
 144         struct nps_enet_priv *priv = netdev_priv(ndev);
 145         struct nps_enet_tx_ctl tx_ctrl;
 146
 147         tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
 148
 149         /* Check if we got TX */
 150         if (!priv->tx_packet_sent || tx_ctrl.ct)
 151                 return;
 152
 153         /* Check Tx transmit error */
 154         if (unlikely(tx_ctrl.et)) {
 155                 ndev->stats.tx_errors++;
 156         } else {
 157                 ndev->stats.tx_packets++;
 158                 ndev->stats.tx_bytes += tx_ctrl.nt;
 159         }
 160
 161         dev_kfree_skb(priv->tx_skb);
 162         priv->tx_packet_sent = false;
 163
 164         if (netif_queue_stopped(ndev))
 165                 netif_wake_queue(ndev);
 166 }
 167
 168 /**
 169  * nps_enet_poll - NAPI poll handler.
 170  * @napi:       Pointer to napi_struct structure.
 171  * @budget:     How many frames to process on one call.
 172  *
 173  * returns:     Number of processed frames
 174  */
 175 static int nps_enet_poll(struct napi_struct *napi, int budget)
 176 {
 177         struct net_device *ndev = napi->dev;
 178         struct nps_enet_priv *priv = netdev_priv(ndev);
 179         struct nps_enet_buf_int_enable buf_int_enable;
 180         u32 work_done;
 181
 182         buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
 183         buf_int_enable.tx_done = NPS_ENET_ENABLE;
 184         nps_enet_tx_handler(ndev);
 185         work_done = nps_enet_rx_handler(ndev);
 186         if (work_done < budget) {
 187                 napi_complete(napi);
 188                 nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
 189                                  buf_int_enable.value);
 190         }
 191
 192         return work_done;
 193 }
 194
 195 /**
 196  * nps_enet_irq_handler - Global interrupt handler for ENET.
 197  * @irq:                irq number.
 198  * @dev_instance:       device instance.
 199  *
 200  * returns: IRQ_HANDLED for all cases.
 201  *
 202  * EZchip ENET has 2 interrupt causes, and depending on bits raised in
 203  * CTRL registers we may tell what is a reason for interrupt to fire up.
 204  * We got one for RX and the other for TX (completion).
 205  */
 206 static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
 207 {
 208         struct net_device *ndev = dev_instance;
 209         struct nps_enet_priv *priv = netdev_priv(ndev);
 210         struct nps_enet_rx_ctl rx_ctrl;
 211         struct nps_enet_tx_ctl tx_ctrl;
 212
 213         rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
 214         tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
 215
 216         if ((!tx_ctrl.ct && priv->tx_packet_sent) || rx_ctrl.cr)
 217                 if (likely(napi_schedule_prep(&priv->napi))) {
 218                         nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
 219                         __napi_schedule(&priv->napi);
 220                 }
 221
 222         return IRQ_HANDLED;
 223 }
 224
 225 static void nps_enet_set_hw_mac_address(struct net_device *ndev)
 226 {
 227         struct nps_enet_priv *priv = netdev_priv(ndev);
 228         struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
 229         struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
 230
 231         /* set MAC address in HW */
 232         ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
 233         ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
 234         ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
 235         ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
 236         ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
 237         ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
 238
 239         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
 240                          ge_mac_cfg_1.value);
 241
 242         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
 243                          ge_mac_cfg_2->value);
 244 }
 245
 246 /**
 247  * nps_enet_hw_reset - Reset the network device.
 248  * @ndev:       Pointer to the network device.
 249  *
 250  * This function reset the PCS and TX fifo.
 251  * The programming model is to set the relevant reset bits
 252  * wait for some time for this to propagate and then unset
 253  * the reset bits. This way we ensure that reset procedure
 254  * is done successfully by device.
 255  */
 256 static void nps_enet_hw_reset(struct net_device *ndev)
 257 {
 258         struct nps_enet_priv *priv = netdev_priv(ndev);
 259         struct nps_enet_ge_rst ge_rst;
 260         struct nps_enet_phase_fifo_ctl phase_fifo_ctl;
 261
 262         ge_rst.value = 0;
 263         phase_fifo_ctl.value = 0;
 264         /* Pcs reset sequence*/
 265         ge_rst.gmac_0 = NPS_ENET_ENABLE;
 266         nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
 267         usleep_range(10, 20);
 268         ge_rst.value = 0;
 269         nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
 270
 271         /* Tx fifo reset sequence */
 272         phase_fifo_ctl.rst = NPS_ENET_ENABLE;
 273         phase_fifo_ctl.init = NPS_ENET_ENABLE;
 274         nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
 275                          phase_fifo_ctl.value);
 276         usleep_range(10, 20);
 277         phase_fifo_ctl.value = 0;
 278         nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
 279                          phase_fifo_ctl.value);
 280 }
 281
 282 static void nps_enet_hw_enable_control(struct net_device *ndev)
 283 {
 284         struct nps_enet_priv *priv = netdev_priv(ndev);
 285         struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0;
 286         struct nps_enet_buf_int_enable buf_int_enable;
 287         struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
 288         struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
 289         s32 max_frame_length;
 290
 291         ge_mac_cfg_0.value = 0;
 292         buf_int_enable.value = 0;
 293         /* Enable Rx and Tx statistics */
 294         ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
 295
 296         /* Discard packets with different MAC address */
 297         ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
 298
 299         /* Discard multicast packets */
 300         ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
 301
 302         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
 303                          ge_mac_cfg_2->value);
 304
 305         /* Discard Packets bigger than max frame length */
 306         max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
 307         if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
 308                 ge_mac_cfg_3->max_len = max_frame_length;
 309                 nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
 310                                  ge_mac_cfg_3->value);
 311         }
 312
 313         /* Enable interrupts */
 314         buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
 315         buf_int_enable.tx_done = NPS_ENET_ENABLE;
 316         nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
 317                          buf_int_enable.value);
 318
 319         /* Write device MAC address to HW */
 320         nps_enet_set_hw_mac_address(ndev);
 321
 322         /* Rx and Tx HW features */
 323         ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
 324         ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
 325         ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
 326
 327         /* IFG configuration */
 328         ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
 329         ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
 330
 331         /* preamble configuration */
 332         ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
 333         ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
 334
 335         /* enable flow control frames */
 336         ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
 337         ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
 338         ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
 339
 340         /* Enable Rx and Tx */
 341         ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
 342         ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
 343
 344         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
 345                          ge_mac_cfg_0.value);
 346 }
 347
 348 static void nps_enet_hw_disable_control(struct net_device *ndev)
 349 {
 350         struct nps_enet_priv *priv = netdev_priv(ndev);
 351
 352         /* Disable interrupts */
 353         nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
 354
 355         /* Disable Rx and Tx */
 356         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
 357 }
 358
 359 static void nps_enet_send_frame(struct net_device *ndev,
 360                                 struct sk_buff *skb)
 361 {
 362         struct nps_enet_priv *priv = netdev_priv(ndev);
 363         struct nps_enet_tx_ctl tx_ctrl;
 364         short length = skb->len;
 365         u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
 366         u32 *src = (u32 *)virt_to_phys(skb->data);
 367         bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32));
 368
 369         tx_ctrl.value = 0;
 370         /* In case src is not aligned we need an intermediate buffer */
 371         if (src_is_aligned)
 372                 for (i = 0; i < len; i++, src++)
 373                         nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
 374         else { /* !src_is_aligned */
 375                 for (i = 0; i < len; i++, src++) {
 376                         u32 buf;
 377
 378                         /* to accommodate word-unaligned address of "src"
 379                          * we have to do memcpy_fromio() instead of simple "="
 380                          */
 381                         memcpy_fromio(&buf, (void __iomem *)src, sizeof(buf));
 382                         nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
 383                 }
 384         }
 385         /* Write the length of the Frame */
 386         tx_ctrl.nt = length;
 387
 388         /* Indicate SW is done */
 389         priv->tx_packet_sent = true;
 390         tx_ctrl.ct = NPS_ENET_ENABLE;
 391
 392         /* Send Frame */
 393         nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
 394 }
 395
 396 /**
 397  * nps_enet_set_mac_address - Set the MAC address for this device.
 398  * @ndev:       Pointer to net_device structure.
 399  * @p:          6 byte Address to be written as MAC address.
 400  *
 401  * This function copies the HW address from the sockaddr structure to the
 402  * net_device structure and updates the address in HW.
 403  *
 404  * returns:     -EBUSY if the net device is busy or 0 if the address is set
 405  *              successfully.
 406  */
 407 static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
 408 {
 409         struct sockaddr *addr = p;
 410         s32 res;
 411
 412         if (netif_running(ndev))
 413                 return -EBUSY;
 414
 415         res = eth_mac_addr(ndev, p);
 416         if (!res) {
 417                 ether_addr_copy(ndev->dev_addr, addr->sa_data);
 418                 nps_enet_set_hw_mac_address(ndev);
 419         }
 420
 421         return res;
 422 }
 423
 424 /**
 425  * nps_enet_set_rx_mode - Change the receive filtering mode.
 426  * @ndev:       Pointer to the network device.
 427  *
 428  * This function enables/disables promiscuous mode
 429  */
 430 static void nps_enet_set_rx_mode(struct net_device *ndev)
 431 {
 432         struct nps_enet_priv *priv = netdev_priv(ndev);
 433         struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
 434
 435         ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
 436
 437         if (ndev->flags & IFF_PROMISC) {
 438                 ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
 439                 ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
 440         } else {
 441                 ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
 442                 ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
 443         }
 444
 445         nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
 446 }
 447
 448 /**
 449  * nps_enet_open - Open the network device.
 450  * @ndev:       Pointer to the network device.
 451  *
 452  * returns: 0, on success or non-zero error value on failure.
 453  *
 454  * This function sets the MAC address, requests and enables an IRQ
 455  * for the ENET device and starts the Tx queue.
 456  */
 457 static s32 nps_enet_open(struct net_device *ndev)
 458 {
 459         struct nps_enet_priv *priv = netdev_priv(ndev);
 460         s32 err;
 461
 462         /* Reset private variables */
 463         priv->tx_packet_sent = false;
 464         priv->ge_mac_cfg_2.value = 0;
 465         priv->ge_mac_cfg_3.value = 0;
 466
 467         /* ge_mac_cfg_3 default values */
 468         priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
 469         priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
 470
 471         /* Disable HW device */
 472         nps_enet_hw_disable_control(ndev);
 473
 474         /* irq Rx allocation */
 475         err = request_irq(priv->irq, nps_enet_irq_handler,
 476                           0, "enet-rx-tx", ndev);
 477         if (err)
 478                 return err;
 479
 480         napi_enable(&priv->napi);
 481
 482         /* Enable HW device */
 483         nps_enet_hw_reset(ndev);
 484         nps_enet_hw_enable_control(ndev);
 485
 486         netif_start_queue(ndev);
 487
 488         return 0;
 489 }
 490
 491 /**
 492  * nps_enet_stop - Close the network device.
 493  * @ndev:       Pointer to the network device.
 494  *
 495  * This function stops the Tx queue, disables interrupts for the ENET device.
 496  */
 497 static s32 nps_enet_stop(struct net_device *ndev)
 498 {
 499         struct nps_enet_priv *priv = netdev_priv(ndev);
 500
 501         napi_disable(&priv->napi);
 502         netif_stop_queue(ndev);
 503         nps_enet_hw_disable_control(ndev);
 504         free_irq(priv->irq, ndev);
 505
 506         return 0;
 507 }
 508
 509 /**
 510  * nps_enet_start_xmit - Starts the data transmission.
 511  * @skb:        sk_buff pointer that contains data to be Transmitted.
 512  * @ndev:       Pointer to net_device structure.
 513  *
 514  * returns: NETDEV_TX_OK, on success
 515  *              NETDEV_TX_BUSY, if any of the descriptors are not free.
 516  *
 517  * This function is invoked from upper layers to initiate transmission.
 518  */
 519 static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
 520                                        struct net_device *ndev)
 521 {
 522         struct nps_enet_priv *priv = netdev_priv(ndev);
 523
 524         /* This driver handles one frame at a time  */
 525         netif_stop_queue(ndev);
 526
 527         priv->tx_skb = skb;
 528
 529         nps_enet_send_frame(ndev, skb);
 530
 531         return NETDEV_TX_OK;
 532 }
 533
 534 #ifdef CONFIG_NET_POLL_CONTROLLER
 535 static void nps_enet_poll_controller(struct net_device *ndev)
 536 {
 537         disable_irq(ndev->irq);
 538         nps_enet_irq_handler(ndev->irq, ndev);
 539         enable_irq(ndev->irq);
 540 }
 541 #endif
 542
 543 static const struct net_device_ops nps_netdev_ops = {
 544         .ndo_open               = nps_enet_open,
 545         .ndo_stop               = nps_enet_stop,
 546         .ndo_start_xmit         = nps_enet_start_xmit,
 547         .ndo_set_mac_address    = nps_enet_set_mac_address,
 548         .ndo_set_rx_mode        = nps_enet_set_rx_mode,
 549 #ifdef CONFIG_NET_POLL_CONTROLLER
 550         .ndo_poll_controller    = nps_enet_poll_controller,
 551 #endif
 552 };
 553
 554 static s32 nps_enet_probe(struct platform_device *pdev)
 555 {
 556         struct device *dev = &pdev->dev;
 557         struct net_device *ndev;
 558         struct nps_enet_priv *priv;
 559         s32 err = 0;
 560         const char *mac_addr;
 561         struct resource *res_regs;
 562
 563         if (!dev->of_node)
 564                 return -ENODEV;
 565
 566         ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
 567         if (!ndev)
 568                 return -ENOMEM;
 569
 570         platform_set_drvdata(pdev, ndev);
 571         SET_NETDEV_DEV(ndev, dev);
 572         priv = netdev_priv(ndev);
 573
 574         /* The EZ NET specific entries in the device structure. */
 575         ndev->netdev_ops = &nps_netdev_ops;
 576         ndev->watchdog_timeo = (400 * HZ / 1000);
 577         /* FIXME :: no multicast support yet */
 578         ndev->flags &= ~IFF_MULTICAST;
 579
 580         res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 581         priv->regs_base = devm_ioremap_resource(dev, res_regs);
 582         if (IS_ERR(priv->regs_base)) {
 583                 err = PTR_ERR(priv->regs_base);
 584                 goto out_netdev;
 585         }
 586         dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
 587
 588         /* set kernel MAC address to dev */
 589         mac_addr = of_get_mac_address(dev->of_node);
 590         if (mac_addr)
 591                 ether_addr_copy(ndev->dev_addr, mac_addr);
 592         else
 593                 eth_hw_addr_random(ndev);
 594
 595         /* Get IRQ number */
 596         priv->irq = platform_get_irq(pdev, 0);
 597         if (!priv->irq) {
 598                 dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
 599                 err = -ENODEV;
 600                 goto out_netdev;
 601         }
 602
 603         netif_napi_add(ndev, &priv->napi, nps_enet_poll,
 604                        NPS_ENET_NAPI_POLL_WEIGHT);
 605
 606         /* Register the driver. Should be the last thing in probe */
 607         err = register_netdev(ndev);
 608         if (err) {
 609                 dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
 610                         ndev->name, (s32)err);
 611                 goto out_netif_api;
 612         }
 613
 614         dev_info(dev, "(rx/tx=%d)\n", priv->irq);
 615         return 0;
 616
 617 out_netif_api:
 618         netif_napi_del(&priv->napi);
 619 out_netdev:
 620         if (err)
 621                 free_netdev(ndev);
 622
 623         return err;
 624 }
 625
 626 static s32 nps_enet_remove(struct platform_device *pdev)
 627 {
 628         struct net_device *ndev = platform_get_drvdata(pdev);
 629         struct nps_enet_priv *priv = netdev_priv(ndev);
 630
 631         unregister_netdev(ndev);
 632         free_netdev(ndev);
 633         netif_napi_del(&priv->napi);
 634
 635         return 0;
 636 }
 637
 638 static const struct of_device_id nps_enet_dt_ids[] = {
 639         { .compatible = "ezchip,nps-mgt-enet" },
 640         { /* Sentinel */ }
 641 };
 642
 643 static struct platform_driver nps_enet_driver = {
 644         .probe = nps_enet_probe,
 645         .remove = nps_enet_remove,
 646         .driver = {
 647                 .name = DRV_NAME,
 648                 .of_match_table  = nps_enet_dt_ids,
 649         },
 650 };
 651
 652 module_platform_driver(nps_enet_driver);
 653
 654 MODULE_AUTHOR("EZchip Semiconductor");
 655 MODULE_LICENSE("GPL v2");