2 * Faraday FTGMAC100 Gigabit Ethernet
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/dma-mapping.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
31 #include <linux/phy.h>
32 #include <linux/platform_device.h>
35 #include "ftgmac100.h"
37 #define DRV_NAME "ftgmac100"
38 #define DRV_VERSION "0.7"
40 #define RX_QUEUE_ENTRIES 256 /* must be power of 2 */
41 #define TX_QUEUE_ENTRIES 512 /* must be power of 2 */
43 #define MAX_PKT_SIZE 1518
44 #define RX_BUF_SIZE PAGE_SIZE /* must be smaller than 0x3fff */
46 /******************************************************************************
48 *****************************************************************************/
49 struct ftgmac100_descs {
50 struct ftgmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
51 struct ftgmac100_txdes txdes[TX_QUEUE_ENTRIES];
59 struct ftgmac100_descs *descs;
60 dma_addr_t descs_dma_addr;
62 unsigned int rx_pointer;
63 unsigned int tx_clean_pointer;
64 unsigned int tx_pointer;
65 unsigned int tx_pending;
69 struct net_device *netdev;
71 struct napi_struct napi;
73 struct mii_bus *mii_bus;
74 int phy_irq[PHY_MAX_ADDR];
75 struct phy_device *phydev;
79 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
80 struct ftgmac100_rxdes *rxdes, gfp_t gfp);
82 /******************************************************************************
83 * internal functions (hardware register access)
84 *****************************************************************************/
85 #define INT_MASK_ALL_ENABLED (FTGMAC100_INT_RPKT_LOST | \
86 FTGMAC100_INT_XPKT_ETH | \
87 FTGMAC100_INT_XPKT_LOST | \
88 FTGMAC100_INT_AHB_ERR | \
89 FTGMAC100_INT_PHYSTS_CHG | \
90 FTGMAC100_INT_RPKT_BUF | \
91 FTGMAC100_INT_NO_RXBUF)
93 static void ftgmac100_set_rx_ring_base(struct ftgmac100 *priv, dma_addr_t addr)
95 iowrite32(addr, priv->base + FTGMAC100_OFFSET_RXR_BADR);
98 static void ftgmac100_set_rx_buffer_size(struct ftgmac100 *priv,
101 size = FTGMAC100_RBSR_SIZE(size);
102 iowrite32(size, priv->base + FTGMAC100_OFFSET_RBSR);
105 static void ftgmac100_set_normal_prio_tx_ring_base(struct ftgmac100 *priv,
108 iowrite32(addr, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
111 static void ftgmac100_txdma_normal_prio_start_polling(struct ftgmac100 *priv)
113 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD);
116 static int ftgmac100_reset_hw(struct ftgmac100 *priv)
118 struct net_device *netdev = priv->netdev;
121 /* NOTE: reset clears all registers */
122 iowrite32(FTGMAC100_MACCR_SW_RST, priv->base + FTGMAC100_OFFSET_MACCR);
123 for (i = 0; i < 5; i++) {
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR);
127 if (!(maccr & FTGMAC100_MACCR_SW_RST))
133 netdev_err(netdev, "software reset failed\n");
137 static void ftgmac100_set_mac(struct ftgmac100 *priv, const unsigned char *mac)
139 unsigned int maddr = mac[0] << 8 | mac[1];
140 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
142 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR);
143 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR);
146 static void ftgmac100_init_hw(struct ftgmac100 *priv)
148 /* setup ring buffer base registers */
149 ftgmac100_set_rx_ring_base(priv,
150 priv->descs_dma_addr +
151 offsetof(struct ftgmac100_descs, rxdes));
152 ftgmac100_set_normal_prio_tx_ring_base(priv,
153 priv->descs_dma_addr +
154 offsetof(struct ftgmac100_descs, txdes));
156 ftgmac100_set_rx_buffer_size(priv, RX_BUF_SIZE);
158 iowrite32(FTGMAC100_APTC_RXPOLL_CNT(1), priv->base + FTGMAC100_OFFSET_APTC);
160 ftgmac100_set_mac(priv, priv->netdev->dev_addr);
163 #define MACCR_ENABLE_ALL (FTGMAC100_MACCR_TXDMA_EN | \
164 FTGMAC100_MACCR_RXDMA_EN | \
165 FTGMAC100_MACCR_TXMAC_EN | \
166 FTGMAC100_MACCR_RXMAC_EN | \
167 FTGMAC100_MACCR_FULLDUP | \
168 FTGMAC100_MACCR_CRC_APD | \
169 FTGMAC100_MACCR_RX_RUNT | \
170 FTGMAC100_MACCR_RX_BROADPKT)
172 static void ftgmac100_start_hw(struct ftgmac100 *priv, int speed)
174 int maccr = MACCR_ENABLE_ALL;
182 maccr |= FTGMAC100_MACCR_FAST_MODE;
186 maccr |= FTGMAC100_MACCR_GIGA_MODE;
190 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
193 static void ftgmac100_stop_hw(struct ftgmac100 *priv)
195 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
198 /******************************************************************************
199 * internal functions (receive descriptor)
200 *****************************************************************************/
201 static bool ftgmac100_rxdes_first_segment(struct ftgmac100_rxdes *rxdes)
203 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FRS);
206 static bool ftgmac100_rxdes_last_segment(struct ftgmac100_rxdes *rxdes)
208 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_LRS);
211 static bool ftgmac100_rxdes_packet_ready(struct ftgmac100_rxdes *rxdes)
213 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY);
216 static void ftgmac100_rxdes_set_dma_own(struct ftgmac100_rxdes *rxdes)
218 /* clear status bits */
219 rxdes->rxdes0 &= cpu_to_le32(FTGMAC100_RXDES0_EDORR);
222 static bool ftgmac100_rxdes_rx_error(struct ftgmac100_rxdes *rxdes)
224 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ERR);
227 static bool ftgmac100_rxdes_crc_error(struct ftgmac100_rxdes *rxdes)
229 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_CRC_ERR);
232 static bool ftgmac100_rxdes_frame_too_long(struct ftgmac100_rxdes *rxdes)
234 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FTL);
237 static bool ftgmac100_rxdes_runt(struct ftgmac100_rxdes *rxdes)
239 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RUNT);
242 static bool ftgmac100_rxdes_odd_nibble(struct ftgmac100_rxdes *rxdes)
244 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ODD_NB);
247 static unsigned int ftgmac100_rxdes_data_length(struct ftgmac100_rxdes *rxdes)
249 return le32_to_cpu(rxdes->rxdes0) & FTGMAC100_RXDES0_VDBC;
252 static bool ftgmac100_rxdes_multicast(struct ftgmac100_rxdes *rxdes)
254 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_MULTICAST);
257 static void ftgmac100_rxdes_set_end_of_ring(struct ftgmac100_rxdes *rxdes)
259 rxdes->rxdes0 |= cpu_to_le32(FTGMAC100_RXDES0_EDORR);
262 static void ftgmac100_rxdes_set_dma_addr(struct ftgmac100_rxdes *rxdes,
265 rxdes->rxdes3 = cpu_to_le32(addr);
268 static dma_addr_t ftgmac100_rxdes_get_dma_addr(struct ftgmac100_rxdes *rxdes)
270 return le32_to_cpu(rxdes->rxdes3);
273 static bool ftgmac100_rxdes_is_tcp(struct ftgmac100_rxdes *rxdes)
275 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
276 cpu_to_le32(FTGMAC100_RXDES1_PROT_TCPIP);
279 static bool ftgmac100_rxdes_is_udp(struct ftgmac100_rxdes *rxdes)
281 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
282 cpu_to_le32(FTGMAC100_RXDES1_PROT_UDPIP);
285 static bool ftgmac100_rxdes_tcpcs_err(struct ftgmac100_rxdes *rxdes)
287 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_TCP_CHKSUM_ERR);
290 static bool ftgmac100_rxdes_udpcs_err(struct ftgmac100_rxdes *rxdes)
292 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_UDP_CHKSUM_ERR);
295 static bool ftgmac100_rxdes_ipcs_err(struct ftgmac100_rxdes *rxdes)
297 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_IP_CHKSUM_ERR);
301 * rxdes2 is not used by hardware. We use it to keep track of page.
302 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
304 static void ftgmac100_rxdes_set_page(struct ftgmac100_rxdes *rxdes, struct page *page)
306 rxdes->rxdes2 = (unsigned int)page;
309 static struct page *ftgmac100_rxdes_get_page(struct ftgmac100_rxdes *rxdes)
311 return (struct page *)rxdes->rxdes2;
314 /******************************************************************************
315 * internal functions (receive)
316 *****************************************************************************/
317 static int ftgmac100_next_rx_pointer(int pointer)
319 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
322 static void ftgmac100_rx_pointer_advance(struct ftgmac100 *priv)
324 priv->rx_pointer = ftgmac100_next_rx_pointer(priv->rx_pointer);
327 static struct ftgmac100_rxdes *ftgmac100_current_rxdes(struct ftgmac100 *priv)
329 return &priv->descs->rxdes[priv->rx_pointer];
332 static struct ftgmac100_rxdes *
333 ftgmac100_rx_locate_first_segment(struct ftgmac100 *priv)
335 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
337 while (ftgmac100_rxdes_packet_ready(rxdes)) {
338 if (ftgmac100_rxdes_first_segment(rxdes))
341 ftgmac100_rxdes_set_dma_own(rxdes);
342 ftgmac100_rx_pointer_advance(priv);
343 rxdes = ftgmac100_current_rxdes(priv);
349 static bool ftgmac100_rx_packet_error(struct ftgmac100 *priv,
350 struct ftgmac100_rxdes *rxdes)
352 struct net_device *netdev = priv->netdev;
355 if (unlikely(ftgmac100_rxdes_rx_error(rxdes))) {
357 netdev_info(netdev, "rx err\n");
359 netdev->stats.rx_errors++;
363 if (unlikely(ftgmac100_rxdes_crc_error(rxdes))) {
365 netdev_info(netdev, "rx crc err\n");
367 netdev->stats.rx_crc_errors++;
369 } else if (unlikely(ftgmac100_rxdes_ipcs_err(rxdes))) {
371 netdev_info(netdev, "rx IP checksum err\n");
376 if (unlikely(ftgmac100_rxdes_frame_too_long(rxdes))) {
378 netdev_info(netdev, "rx frame too long\n");
380 netdev->stats.rx_length_errors++;
382 } else if (unlikely(ftgmac100_rxdes_runt(rxdes))) {
384 netdev_info(netdev, "rx runt\n");
386 netdev->stats.rx_length_errors++;
388 } else if (unlikely(ftgmac100_rxdes_odd_nibble(rxdes))) {
390 netdev_info(netdev, "rx odd nibble\n");
392 netdev->stats.rx_length_errors++;
399 static void ftgmac100_rx_drop_packet(struct ftgmac100 *priv)
401 struct net_device *netdev = priv->netdev;
402 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
406 netdev_dbg(netdev, "drop packet %p\n", rxdes);
409 if (ftgmac100_rxdes_last_segment(rxdes))
412 ftgmac100_rxdes_set_dma_own(rxdes);
413 ftgmac100_rx_pointer_advance(priv);
414 rxdes = ftgmac100_current_rxdes(priv);
415 } while (!done && ftgmac100_rxdes_packet_ready(rxdes));
417 netdev->stats.rx_dropped++;
420 static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
422 struct net_device *netdev = priv->netdev;
423 struct ftgmac100_rxdes *rxdes;
427 rxdes = ftgmac100_rx_locate_first_segment(priv);
431 if (unlikely(ftgmac100_rx_packet_error(priv, rxdes))) {
432 ftgmac100_rx_drop_packet(priv);
436 /* start processing */
437 skb = netdev_alloc_skb_ip_align(netdev, 128);
438 if (unlikely(!skb)) {
440 netdev_err(netdev, "rx skb alloc failed\n");
442 ftgmac100_rx_drop_packet(priv);
446 if (unlikely(ftgmac100_rxdes_multicast(rxdes)))
447 netdev->stats.multicast++;
450 * It seems that HW does checksum incorrectly with fragmented packets,
451 * so we are conservative here - if HW checksum error, let software do
452 * the checksum again.
454 if ((ftgmac100_rxdes_is_tcp(rxdes) && !ftgmac100_rxdes_tcpcs_err(rxdes)) ||
455 (ftgmac100_rxdes_is_udp(rxdes) && !ftgmac100_rxdes_udpcs_err(rxdes)))
456 skb->ip_summed = CHECKSUM_UNNECESSARY;
459 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
460 struct page *page = ftgmac100_rxdes_get_page(rxdes);
463 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
465 size = ftgmac100_rxdes_data_length(rxdes);
466 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, page, 0, size);
469 skb->data_len += size;
470 skb->truesize += PAGE_SIZE;
472 if (ftgmac100_rxdes_last_segment(rxdes))
475 ftgmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
477 ftgmac100_rx_pointer_advance(priv);
478 rxdes = ftgmac100_current_rxdes(priv);
481 /* Small frames are copied into linear part of skb to free one page */
482 if (skb->len <= 128) {
483 skb->truesize -= PAGE_SIZE;
484 __pskb_pull_tail(skb, skb->len);
486 /* We pull the minimum amount into linear part */
487 __pskb_pull_tail(skb, ETH_HLEN);
489 skb->protocol = eth_type_trans(skb, netdev);
491 netdev->stats.rx_packets++;
492 netdev->stats.rx_bytes += skb->len;
494 /* push packet to protocol stack */
495 napi_gro_receive(&priv->napi, skb);
501 /******************************************************************************
502 * internal functions (transmit descriptor)
503 *****************************************************************************/
504 static void ftgmac100_txdes_reset(struct ftgmac100_txdes *txdes)
506 /* clear all except end of ring bit */
507 txdes->txdes0 &= cpu_to_le32(FTGMAC100_TXDES0_EDOTR);
513 static bool ftgmac100_txdes_owned_by_dma(struct ftgmac100_txdes *txdes)
515 return txdes->txdes0 & cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
518 static void ftgmac100_txdes_set_dma_own(struct ftgmac100_txdes *txdes)
521 * Make sure dma own bit will not be set before any other
525 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
528 static void ftgmac100_txdes_set_end_of_ring(struct ftgmac100_txdes *txdes)
530 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_EDOTR);
533 static void ftgmac100_txdes_set_first_segment(struct ftgmac100_txdes *txdes)
535 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_FTS);
538 static void ftgmac100_txdes_set_last_segment(struct ftgmac100_txdes *txdes)
540 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_LTS);
543 static void ftgmac100_txdes_set_buffer_size(struct ftgmac100_txdes *txdes,
546 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXBUF_SIZE(len));
549 static void ftgmac100_txdes_set_txint(struct ftgmac100_txdes *txdes)
551 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TXIC);
554 static void ftgmac100_txdes_set_tcpcs(struct ftgmac100_txdes *txdes)
556 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TCP_CHKSUM);
559 static void ftgmac100_txdes_set_udpcs(struct ftgmac100_txdes *txdes)
561 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_UDP_CHKSUM);
564 static void ftgmac100_txdes_set_ipcs(struct ftgmac100_txdes *txdes)
566 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_IP_CHKSUM);
569 static void ftgmac100_txdes_set_dma_addr(struct ftgmac100_txdes *txdes,
572 txdes->txdes3 = cpu_to_le32(addr);
575 static dma_addr_t ftgmac100_txdes_get_dma_addr(struct ftgmac100_txdes *txdes)
577 return le32_to_cpu(txdes->txdes3);
581 * txdes2 is not used by hardware. We use it to keep track of socket buffer.
582 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
584 static void ftgmac100_txdes_set_skb(struct ftgmac100_txdes *txdes,
587 txdes->txdes2 = (unsigned int)skb;
590 static struct sk_buff *ftgmac100_txdes_get_skb(struct ftgmac100_txdes *txdes)
592 return (struct sk_buff *)txdes->txdes2;
595 /******************************************************************************
596 * internal functions (transmit)
597 *****************************************************************************/
598 static int ftgmac100_next_tx_pointer(int pointer)
600 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
603 static void ftgmac100_tx_pointer_advance(struct ftgmac100 *priv)
605 priv->tx_pointer = ftgmac100_next_tx_pointer(priv->tx_pointer);
608 static void ftgmac100_tx_clean_pointer_advance(struct ftgmac100 *priv)
610 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv->tx_clean_pointer);
613 static struct ftgmac100_txdes *ftgmac100_current_txdes(struct ftgmac100 *priv)
615 return &priv->descs->txdes[priv->tx_pointer];
618 static struct ftgmac100_txdes *
619 ftgmac100_current_clean_txdes(struct ftgmac100 *priv)
621 return &priv->descs->txdes[priv->tx_clean_pointer];
624 static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv)
626 struct net_device *netdev = priv->netdev;
627 struct ftgmac100_txdes *txdes;
631 if (priv->tx_pending == 0)
634 txdes = ftgmac100_current_clean_txdes(priv);
636 if (ftgmac100_txdes_owned_by_dma(txdes))
639 skb = ftgmac100_txdes_get_skb(txdes);
640 map = ftgmac100_txdes_get_dma_addr(txdes);
642 netdev->stats.tx_packets++;
643 netdev->stats.tx_bytes += skb->len;
645 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
649 ftgmac100_txdes_reset(txdes);
651 ftgmac100_tx_clean_pointer_advance(priv);
653 spin_lock(&priv->tx_lock);
655 spin_unlock(&priv->tx_lock);
656 netif_wake_queue(netdev);
661 static void ftgmac100_tx_complete(struct ftgmac100 *priv)
663 while (ftgmac100_tx_complete_packet(priv))
667 static int ftgmac100_xmit(struct ftgmac100 *priv, struct sk_buff *skb,
670 struct net_device *netdev = priv->netdev;
671 struct ftgmac100_txdes *txdes;
672 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
674 txdes = ftgmac100_current_txdes(priv);
675 ftgmac100_tx_pointer_advance(priv);
677 /* setup TX descriptor */
678 ftgmac100_txdes_set_skb(txdes, skb);
679 ftgmac100_txdes_set_dma_addr(txdes, map);
680 ftgmac100_txdes_set_buffer_size(txdes, len);
682 ftgmac100_txdes_set_first_segment(txdes);
683 ftgmac100_txdes_set_last_segment(txdes);
684 ftgmac100_txdes_set_txint(txdes);
685 if (skb->ip_summed == CHECKSUM_PARTIAL) {
686 __be16 protocol = skb->protocol;
688 if (protocol == cpu_to_be16(ETH_P_IP)) {
689 u8 ip_proto = ip_hdr(skb)->protocol;
691 ftgmac100_txdes_set_ipcs(txdes);
692 if (ip_proto == IPPROTO_TCP)
693 ftgmac100_txdes_set_tcpcs(txdes);
694 else if (ip_proto == IPPROTO_UDP)
695 ftgmac100_txdes_set_udpcs(txdes);
699 spin_lock(&priv->tx_lock);
701 if (priv->tx_pending == TX_QUEUE_ENTRIES)
702 netif_stop_queue(netdev);
705 ftgmac100_txdes_set_dma_own(txdes);
706 spin_unlock(&priv->tx_lock);
708 ftgmac100_txdma_normal_prio_start_polling(priv);
713 /******************************************************************************
714 * internal functions (buffer)
715 *****************************************************************************/
716 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
717 struct ftgmac100_rxdes *rxdes, gfp_t gfp)
719 struct net_device *netdev = priv->netdev;
723 page = alloc_page(gfp);
726 netdev_err(netdev, "failed to allocate rx page\n");
730 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
731 if (unlikely(dma_mapping_error(priv->dev, map))) {
733 netdev_err(netdev, "failed to map rx page\n");
738 ftgmac100_rxdes_set_page(rxdes, page);
739 ftgmac100_rxdes_set_dma_addr(rxdes, map);
740 ftgmac100_rxdes_set_dma_own(rxdes);
744 static void ftgmac100_free_buffers(struct ftgmac100 *priv)
748 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
749 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
750 struct page *page = ftgmac100_rxdes_get_page(rxdes);
751 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
756 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
760 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
761 struct ftgmac100_txdes *txdes = &priv->descs->txdes[i];
762 struct sk_buff *skb = ftgmac100_txdes_get_skb(txdes);
763 dma_addr_t map = ftgmac100_txdes_get_dma_addr(txdes);
768 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
772 dma_free_coherent(priv->dev, sizeof(struct ftgmac100_descs),
773 priv->descs, priv->descs_dma_addr);
776 static int ftgmac100_alloc_buffers(struct ftgmac100 *priv)
780 priv->descs = dma_zalloc_coherent(priv->dev,
781 sizeof(struct ftgmac100_descs),
782 &priv->descs_dma_addr, GFP_KERNEL);
786 /* initialize RX ring */
787 ftgmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
789 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
790 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
792 if (ftgmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
796 /* initialize TX ring */
797 ftgmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
801 ftgmac100_free_buffers(priv);
805 /******************************************************************************
806 * internal functions (mdio)
807 *****************************************************************************/
808 static void ftgmac100_adjust_link(struct net_device *netdev)
810 struct ftgmac100 *priv = netdev_priv(netdev);
811 struct phy_device *phydev = priv->phydev;
814 if (phydev->speed == priv->old_speed)
817 priv->old_speed = phydev->speed;
819 ier = ioread32(priv->base + FTGMAC100_OFFSET_IER);
821 /* disable all interrupts */
822 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
824 netif_stop_queue(netdev);
825 ftgmac100_stop_hw(priv);
827 netif_start_queue(netdev);
828 ftgmac100_init_hw(priv);
829 ftgmac100_start_hw(priv, phydev->speed);
831 /* re-enable interrupts */
832 iowrite32(ier, priv->base + FTGMAC100_OFFSET_IER);
835 static int ftgmac100_mii_probe(struct ftgmac100 *priv)
837 struct net_device *netdev = priv->netdev;
838 struct phy_device *phydev = NULL;
841 /* search for connect PHY device */
842 for (i = 0; i < PHY_MAX_ADDR; i++) {
843 struct phy_device *tmp = priv->mii_bus->phy_map[i];
851 /* now we are supposed to have a proper phydev, to attach to... */
853 netdev_info(netdev, "%s: no PHY found\n", netdev->name);
857 phydev = phy_connect(netdev, dev_name(&phydev->dev),
858 &ftgmac100_adjust_link, PHY_INTERFACE_MODE_GMII);
860 if (IS_ERR(phydev)) {
861 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
862 return PTR_ERR(phydev);
865 priv->phydev = phydev;
869 /******************************************************************************
870 * struct mii_bus functions
871 *****************************************************************************/
872 static int ftgmac100_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
874 struct net_device *netdev = bus->priv;
875 struct ftgmac100 *priv = netdev_priv(netdev);
879 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
881 /* preserve MDC cycle threshold */
882 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
884 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
885 FTGMAC100_PHYCR_REGAD(regnum) |
886 FTGMAC100_PHYCR_MIIRD;
888 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
890 for (i = 0; i < 10; i++) {
891 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
893 if ((phycr & FTGMAC100_PHYCR_MIIRD) == 0) {
896 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA);
897 return FTGMAC100_PHYDATA_MIIRDATA(data);
903 netdev_err(netdev, "mdio read timed out\n");
907 static int ftgmac100_mdiobus_write(struct mii_bus *bus, int phy_addr,
908 int regnum, u16 value)
910 struct net_device *netdev = bus->priv;
911 struct ftgmac100 *priv = netdev_priv(netdev);
916 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
918 /* preserve MDC cycle threshold */
919 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
921 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
922 FTGMAC100_PHYCR_REGAD(regnum) |
923 FTGMAC100_PHYCR_MIIWR;
925 data = FTGMAC100_PHYDATA_MIIWDATA(value);
927 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA);
928 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
930 for (i = 0; i < 10; i++) {
931 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
933 if ((phycr & FTGMAC100_PHYCR_MIIWR) == 0)
939 netdev_err(netdev, "mdio write timed out\n");
943 static int ftgmac100_mdiobus_reset(struct mii_bus *bus)
948 /******************************************************************************
949 * struct ethtool_ops functions
950 *****************************************************************************/
951 static void ftgmac100_get_drvinfo(struct net_device *netdev,
952 struct ethtool_drvinfo *info)
954 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
955 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
956 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
959 static int ftgmac100_get_settings(struct net_device *netdev,
960 struct ethtool_cmd *cmd)
962 struct ftgmac100 *priv = netdev_priv(netdev);
964 return phy_ethtool_gset(priv->phydev, cmd);
967 static int ftgmac100_set_settings(struct net_device *netdev,
968 struct ethtool_cmd *cmd)
970 struct ftgmac100 *priv = netdev_priv(netdev);
972 return phy_ethtool_sset(priv->phydev, cmd);
975 static const struct ethtool_ops ftgmac100_ethtool_ops = {
976 .set_settings = ftgmac100_set_settings,
977 .get_settings = ftgmac100_get_settings,
978 .get_drvinfo = ftgmac100_get_drvinfo,
979 .get_link = ethtool_op_get_link,
982 /******************************************************************************
984 *****************************************************************************/
985 static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
987 struct net_device *netdev = dev_id;
988 struct ftgmac100 *priv = netdev_priv(netdev);
990 if (likely(netif_running(netdev))) {
991 /* Disable interrupts for polling */
992 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
993 napi_schedule(&priv->napi);
999 /******************************************************************************
1000 * struct napi_struct functions
1001 *****************************************************************************/
1002 static int ftgmac100_poll(struct napi_struct *napi, int budget)
1004 struct ftgmac100 *priv = container_of(napi, struct ftgmac100, napi);
1005 struct net_device *netdev = priv->netdev;
1006 unsigned int status;
1007 bool completed = true;
1010 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR);
1011 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR);
1013 if (status & (FTGMAC100_INT_RPKT_BUF | FTGMAC100_INT_NO_RXBUF)) {
1015 * FTGMAC100_INT_RPKT_BUF:
1016 * RX DMA has received packets into RX buffer successfully
1018 * FTGMAC100_INT_NO_RXBUF:
1019 * RX buffer unavailable
1024 retry = ftgmac100_rx_packet(priv, &rx);
1025 } while (retry && rx < budget);
1027 if (retry && rx == budget)
1031 if (status & (FTGMAC100_INT_XPKT_ETH | FTGMAC100_INT_XPKT_LOST)) {
1033 * FTGMAC100_INT_XPKT_ETH:
1034 * packet transmitted to ethernet successfully
1036 * FTGMAC100_INT_XPKT_LOST:
1037 * packet transmitted to ethernet lost due to late
1038 * collision or excessive collision
1040 ftgmac100_tx_complete(priv);
1043 if (status & (FTGMAC100_INT_NO_RXBUF | FTGMAC100_INT_RPKT_LOST |
1044 FTGMAC100_INT_AHB_ERR | FTGMAC100_INT_PHYSTS_CHG)) {
1045 if (net_ratelimit())
1046 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
1047 status & FTGMAC100_INT_NO_RXBUF ? "NO_RXBUF " : "",
1048 status & FTGMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
1049 status & FTGMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
1050 status & FTGMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
1052 if (status & FTGMAC100_INT_NO_RXBUF) {
1053 /* RX buffer unavailable */
1054 netdev->stats.rx_over_errors++;
1057 if (status & FTGMAC100_INT_RPKT_LOST) {
1058 /* received packet lost due to RX FIFO full */
1059 netdev->stats.rx_fifo_errors++;
1064 napi_complete(napi);
1066 /* enable all interrupts */
1067 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTGMAC100_OFFSET_IER);
1073 /******************************************************************************
1074 * struct net_device_ops functions
1075 *****************************************************************************/
1076 static int ftgmac100_open(struct net_device *netdev)
1078 struct ftgmac100 *priv = netdev_priv(netdev);
1081 err = ftgmac100_alloc_buffers(priv);
1083 netdev_err(netdev, "failed to allocate buffers\n");
1087 err = request_irq(priv->irq, ftgmac100_interrupt, 0, netdev->name, netdev);
1089 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
1093 priv->rx_pointer = 0;
1094 priv->tx_clean_pointer = 0;
1095 priv->tx_pointer = 0;
1096 priv->tx_pending = 0;
1098 err = ftgmac100_reset_hw(priv);
1102 ftgmac100_init_hw(priv);
1103 ftgmac100_start_hw(priv, 10);
1105 phy_start(priv->phydev);
1107 napi_enable(&priv->napi);
1108 netif_start_queue(netdev);
1110 /* enable all interrupts */
1111 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTGMAC100_OFFSET_IER);
1115 free_irq(priv->irq, netdev);
1117 ftgmac100_free_buffers(priv);
1122 static int ftgmac100_stop(struct net_device *netdev)
1124 struct ftgmac100 *priv = netdev_priv(netdev);
1126 /* disable all interrupts */
1127 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1129 netif_stop_queue(netdev);
1130 napi_disable(&priv->napi);
1131 phy_stop(priv->phydev);
1133 ftgmac100_stop_hw(priv);
1134 free_irq(priv->irq, netdev);
1135 ftgmac100_free_buffers(priv);
1140 static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
1141 struct net_device *netdev)
1143 struct ftgmac100 *priv = netdev_priv(netdev);
1146 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1147 if (net_ratelimit())
1148 netdev_dbg(netdev, "tx packet too big\n");
1150 netdev->stats.tx_dropped++;
1152 return NETDEV_TX_OK;
1155 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1156 if (unlikely(dma_mapping_error(priv->dev, map))) {
1158 if (net_ratelimit())
1159 netdev_err(netdev, "map socket buffer failed\n");
1161 netdev->stats.tx_dropped++;
1163 return NETDEV_TX_OK;
1166 return ftgmac100_xmit(priv, skb, map);
1170 static int ftgmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1172 struct ftgmac100 *priv = netdev_priv(netdev);
1174 return phy_mii_ioctl(priv->phydev, ifr, cmd);
1177 static const struct net_device_ops ftgmac100_netdev_ops = {
1178 .ndo_open = ftgmac100_open,
1179 .ndo_stop = ftgmac100_stop,
1180 .ndo_start_xmit = ftgmac100_hard_start_xmit,
1181 .ndo_set_mac_address = eth_mac_addr,
1182 .ndo_validate_addr = eth_validate_addr,
1183 .ndo_do_ioctl = ftgmac100_do_ioctl,
1186 /******************************************************************************
1187 * struct platform_driver functions
1188 *****************************************************************************/
1189 static int ftgmac100_probe(struct platform_device *pdev)
1191 struct resource *res;
1193 struct net_device *netdev;
1194 struct ftgmac100 *priv;
1201 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1205 irq = platform_get_irq(pdev, 0);
1209 /* setup net_device */
1210 netdev = alloc_etherdev(sizeof(*priv));
1213 goto err_alloc_etherdev;
1216 SET_NETDEV_DEV(netdev, &pdev->dev);
1218 SET_ETHTOOL_OPS(netdev, &ftgmac100_ethtool_ops);
1219 netdev->netdev_ops = &ftgmac100_netdev_ops;
1220 netdev->features = NETIF_F_IP_CSUM | NETIF_F_GRO;
1222 platform_set_drvdata(pdev, netdev);
1224 /* setup private data */
1225 priv = netdev_priv(netdev);
1226 priv->netdev = netdev;
1227 priv->dev = &pdev->dev;
1229 spin_lock_init(&priv->tx_lock);
1231 /* initialize NAPI */
1232 netif_napi_add(netdev, &priv->napi, ftgmac100_poll, 64);
1235 priv->res = request_mem_region(res->start, resource_size(res),
1236 dev_name(&pdev->dev));
1238 dev_err(&pdev->dev, "Could not reserve memory region\n");
1243 priv->base = ioremap(res->start, resource_size(res));
1245 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1252 /* initialize mdio bus */
1253 priv->mii_bus = mdiobus_alloc();
1254 if (!priv->mii_bus) {
1256 goto err_alloc_mdiobus;
1259 priv->mii_bus->name = "ftgmac100_mdio";
1260 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "ftgmac100_mii");
1262 priv->mii_bus->priv = netdev;
1263 priv->mii_bus->read = ftgmac100_mdiobus_read;
1264 priv->mii_bus->write = ftgmac100_mdiobus_write;
1265 priv->mii_bus->reset = ftgmac100_mdiobus_reset;
1266 priv->mii_bus->irq = priv->phy_irq;
1268 for (i = 0; i < PHY_MAX_ADDR; i++)
1269 priv->mii_bus->irq[i] = PHY_POLL;
1271 err = mdiobus_register(priv->mii_bus);
1273 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1274 goto err_register_mdiobus;
1277 err = ftgmac100_mii_probe(priv);
1279 dev_err(&pdev->dev, "MII Probe failed!\n");
1283 /* register network device */
1284 err = register_netdev(netdev);
1286 dev_err(&pdev->dev, "Failed to register netdev\n");
1287 goto err_register_netdev;
1290 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1292 if (!is_valid_ether_addr(netdev->dev_addr)) {
1293 eth_hw_addr_random(netdev);
1294 netdev_info(netdev, "generated random MAC address %pM\n",
1300 err_register_netdev:
1301 phy_disconnect(priv->phydev);
1303 mdiobus_unregister(priv->mii_bus);
1304 err_register_mdiobus:
1305 mdiobus_free(priv->mii_bus);
1307 iounmap(priv->base);
1309 release_resource(priv->res);
1311 netif_napi_del(&priv->napi);
1312 free_netdev(netdev);
1317 static int __exit ftgmac100_remove(struct platform_device *pdev)
1319 struct net_device *netdev;
1320 struct ftgmac100 *priv;
1322 netdev = platform_get_drvdata(pdev);
1323 priv = netdev_priv(netdev);
1325 unregister_netdev(netdev);
1327 phy_disconnect(priv->phydev);
1328 mdiobus_unregister(priv->mii_bus);
1329 mdiobus_free(priv->mii_bus);
1331 iounmap(priv->base);
1332 release_resource(priv->res);
1334 netif_napi_del(&priv->napi);
1335 free_netdev(netdev);
1339 static struct platform_driver ftgmac100_driver = {
1340 .probe = ftgmac100_probe,
1341 .remove = __exit_p(ftgmac100_remove),
1344 .owner = THIS_MODULE,
1348 module_platform_driver(ftgmac100_driver);
1350 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1351 MODULE_DESCRIPTION("FTGMAC100 driver");
1352 MODULE_LICENSE("GPL");