2 * Faraday FTGMAC100 Gigabit Ethernet
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/dma-mapping.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
32 #include <linux/phy.h>
33 #include <linux/platform_device.h>
34 #include <linux/property.h>
38 #include "ftgmac100.h"
40 #define DRV_NAME "ftgmac100"
41 #define DRV_VERSION "0.7"
43 #define RX_QUEUE_ENTRIES 256 /* must be power of 2 */
44 #define TX_QUEUE_ENTRIES 512 /* must be power of 2 */
46 #define MAX_PKT_SIZE 1518
47 #define RX_BUF_SIZE PAGE_SIZE /* must be smaller than 0x3fff */
49 struct ftgmac100_descs {
50 struct ftgmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
51 struct ftgmac100_txdes txdes[TX_QUEUE_ENTRIES];
59 struct ftgmac100_descs *descs;
60 dma_addr_t descs_dma_addr;
63 struct page *rx_pages[RX_QUEUE_ENTRIES];
64 unsigned int rx_pointer;
65 u32 rxdes0_edorr_mask;
68 unsigned int tx_clean_pointer;
69 unsigned int tx_pointer;
70 unsigned int tx_pending;
71 u32 txdes0_edotr_mask;
74 /* Component structures */
75 struct net_device *netdev;
77 struct ncsi_dev *ndev;
78 struct napi_struct napi;
79 struct mii_bus *mii_bus;
90 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
91 struct ftgmac100_rxdes *rxdes, gfp_t gfp);
93 static void ftgmac100_set_rx_ring_base(struct ftgmac100 *priv, dma_addr_t addr)
95 iowrite32(addr, priv->base + FTGMAC100_OFFSET_RXR_BADR);
98 static void ftgmac100_set_rx_buffer_size(struct ftgmac100 *priv,
101 size = FTGMAC100_RBSR_SIZE(size);
102 iowrite32(size, priv->base + FTGMAC100_OFFSET_RBSR);
105 static void ftgmac100_set_normal_prio_tx_ring_base(struct ftgmac100 *priv,
108 iowrite32(addr, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
111 static void ftgmac100_txdma_normal_prio_start_polling(struct ftgmac100 *priv)
113 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD);
116 static int ftgmac100_reset_hw(struct ftgmac100 *priv)
118 struct net_device *netdev = priv->netdev;
121 /* NOTE: reset clears all registers */
122 iowrite32(FTGMAC100_MACCR_SW_RST, priv->base + FTGMAC100_OFFSET_MACCR);
123 for (i = 0; i < 5; i++) {
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR);
127 if (!(maccr & FTGMAC100_MACCR_SW_RST))
133 netdev_err(netdev, "software reset failed\n");
137 static void ftgmac100_set_mac(struct ftgmac100 *priv, const unsigned char *mac)
139 unsigned int maddr = mac[0] << 8 | mac[1];
140 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
142 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR);
143 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR);
146 static void ftgmac100_setup_mac(struct ftgmac100 *priv)
153 addr = device_get_mac_address(priv->dev, mac, ETH_ALEN);
155 ether_addr_copy(priv->netdev->dev_addr, mac);
156 dev_info(priv->dev, "Read MAC address %pM from device tree\n",
161 m = ioread32(priv->base + FTGMAC100_OFFSET_MAC_MADR);
162 l = ioread32(priv->base + FTGMAC100_OFFSET_MAC_LADR);
164 mac[0] = (m >> 8) & 0xff;
166 mac[2] = (l >> 24) & 0xff;
167 mac[3] = (l >> 16) & 0xff;
168 mac[4] = (l >> 8) & 0xff;
171 if (is_valid_ether_addr(mac)) {
172 ether_addr_copy(priv->netdev->dev_addr, mac);
173 dev_info(priv->dev, "Read MAC address %pM from chip\n", mac);
175 eth_hw_addr_random(priv->netdev);
176 dev_info(priv->dev, "Generated random MAC address %pM\n",
177 priv->netdev->dev_addr);
181 static int ftgmac100_set_mac_addr(struct net_device *dev, void *p)
185 ret = eth_prepare_mac_addr_change(dev, p);
189 eth_commit_mac_addr_change(dev, p);
190 ftgmac100_set_mac(netdev_priv(dev), dev->dev_addr);
195 static void ftgmac100_init_hw(struct ftgmac100 *priv)
197 /* setup ring buffer base registers */
198 ftgmac100_set_rx_ring_base(priv,
199 priv->descs_dma_addr +
200 offsetof(struct ftgmac100_descs, rxdes));
201 ftgmac100_set_normal_prio_tx_ring_base(priv,
202 priv->descs_dma_addr +
203 offsetof(struct ftgmac100_descs, txdes));
205 ftgmac100_set_rx_buffer_size(priv, RX_BUF_SIZE);
207 iowrite32(FTGMAC100_APTC_RXPOLL_CNT(1), priv->base + FTGMAC100_OFFSET_APTC);
209 ftgmac100_set_mac(priv, priv->netdev->dev_addr);
212 #define MACCR_ENABLE_ALL (FTGMAC100_MACCR_TXDMA_EN | \
213 FTGMAC100_MACCR_RXDMA_EN | \
214 FTGMAC100_MACCR_TXMAC_EN | \
215 FTGMAC100_MACCR_RXMAC_EN | \
216 FTGMAC100_MACCR_CRC_APD | \
217 FTGMAC100_MACCR_RX_RUNT | \
218 FTGMAC100_MACCR_RX_BROADPKT)
220 static void ftgmac100_start_hw(struct ftgmac100 *priv)
222 int maccr = MACCR_ENABLE_ALL;
224 switch (priv->cur_speed) {
230 maccr |= FTGMAC100_MACCR_FAST_MODE;
234 maccr |= FTGMAC100_MACCR_GIGA_MODE;
238 if (priv->cur_duplex == DUPLEX_FULL)
239 maccr |= FTGMAC100_MACCR_FULLDUP;
241 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
244 static void ftgmac100_stop_hw(struct ftgmac100 *priv)
246 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
249 static bool ftgmac100_rxdes_first_segment(struct ftgmac100_rxdes *rxdes)
251 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FRS);
254 static bool ftgmac100_rxdes_last_segment(struct ftgmac100_rxdes *rxdes)
256 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_LRS);
259 static bool ftgmac100_rxdes_packet_ready(struct ftgmac100_rxdes *rxdes)
261 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY);
264 static void ftgmac100_rxdes_set_dma_own(const struct ftgmac100 *priv,
265 struct ftgmac100_rxdes *rxdes)
267 /* clear status bits */
268 rxdes->rxdes0 &= cpu_to_le32(priv->rxdes0_edorr_mask);
271 static bool ftgmac100_rxdes_rx_error(struct ftgmac100_rxdes *rxdes)
273 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ERR);
276 static bool ftgmac100_rxdes_crc_error(struct ftgmac100_rxdes *rxdes)
278 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_CRC_ERR);
281 static bool ftgmac100_rxdes_frame_too_long(struct ftgmac100_rxdes *rxdes)
283 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FTL);
286 static bool ftgmac100_rxdes_runt(struct ftgmac100_rxdes *rxdes)
288 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RUNT);
291 static bool ftgmac100_rxdes_odd_nibble(struct ftgmac100_rxdes *rxdes)
293 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ODD_NB);
296 static unsigned int ftgmac100_rxdes_data_length(struct ftgmac100_rxdes *rxdes)
298 return le32_to_cpu(rxdes->rxdes0) & FTGMAC100_RXDES0_VDBC;
301 static bool ftgmac100_rxdes_multicast(struct ftgmac100_rxdes *rxdes)
303 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_MULTICAST);
306 static void ftgmac100_rxdes_set_end_of_ring(const struct ftgmac100 *priv,
307 struct ftgmac100_rxdes *rxdes)
309 rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
312 static void ftgmac100_rxdes_set_dma_addr(struct ftgmac100_rxdes *rxdes,
315 rxdes->rxdes3 = cpu_to_le32(addr);
318 static dma_addr_t ftgmac100_rxdes_get_dma_addr(struct ftgmac100_rxdes *rxdes)
320 return le32_to_cpu(rxdes->rxdes3);
323 static bool ftgmac100_rxdes_is_tcp(struct ftgmac100_rxdes *rxdes)
325 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
326 cpu_to_le32(FTGMAC100_RXDES1_PROT_TCPIP);
329 static bool ftgmac100_rxdes_is_udp(struct ftgmac100_rxdes *rxdes)
331 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
332 cpu_to_le32(FTGMAC100_RXDES1_PROT_UDPIP);
335 static bool ftgmac100_rxdes_tcpcs_err(struct ftgmac100_rxdes *rxdes)
337 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_TCP_CHKSUM_ERR);
340 static bool ftgmac100_rxdes_udpcs_err(struct ftgmac100_rxdes *rxdes)
342 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_UDP_CHKSUM_ERR);
345 static bool ftgmac100_rxdes_ipcs_err(struct ftgmac100_rxdes *rxdes)
347 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_IP_CHKSUM_ERR);
350 static inline struct page **ftgmac100_rxdes_page_slot(struct ftgmac100 *priv,
351 struct ftgmac100_rxdes *rxdes)
353 return &priv->rx_pages[rxdes - priv->descs->rxdes];
357 * rxdes2 is not used by hardware. We use it to keep track of page.
358 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
360 static void ftgmac100_rxdes_set_page(struct ftgmac100 *priv,
361 struct ftgmac100_rxdes *rxdes,
364 *ftgmac100_rxdes_page_slot(priv, rxdes) = page;
367 static struct page *ftgmac100_rxdes_get_page(struct ftgmac100 *priv,
368 struct ftgmac100_rxdes *rxdes)
370 return *ftgmac100_rxdes_page_slot(priv, rxdes);
373 static int ftgmac100_next_rx_pointer(int pointer)
375 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
378 static void ftgmac100_rx_pointer_advance(struct ftgmac100 *priv)
380 priv->rx_pointer = ftgmac100_next_rx_pointer(priv->rx_pointer);
383 static struct ftgmac100_rxdes *ftgmac100_current_rxdes(struct ftgmac100 *priv)
385 return &priv->descs->rxdes[priv->rx_pointer];
388 static struct ftgmac100_rxdes *
389 ftgmac100_rx_locate_first_segment(struct ftgmac100 *priv)
391 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
393 while (ftgmac100_rxdes_packet_ready(rxdes)) {
394 if (ftgmac100_rxdes_first_segment(rxdes))
397 ftgmac100_rxdes_set_dma_own(priv, rxdes);
398 ftgmac100_rx_pointer_advance(priv);
399 rxdes = ftgmac100_current_rxdes(priv);
405 static bool ftgmac100_rx_packet_error(struct ftgmac100 *priv,
406 struct ftgmac100_rxdes *rxdes)
408 struct net_device *netdev = priv->netdev;
411 if (unlikely(ftgmac100_rxdes_rx_error(rxdes))) {
413 netdev_info(netdev, "rx err\n");
415 netdev->stats.rx_errors++;
419 if (unlikely(ftgmac100_rxdes_crc_error(rxdes))) {
421 netdev_info(netdev, "rx crc err\n");
423 netdev->stats.rx_crc_errors++;
425 } else if (unlikely(ftgmac100_rxdes_ipcs_err(rxdes))) {
427 netdev_info(netdev, "rx IP checksum err\n");
432 if (unlikely(ftgmac100_rxdes_frame_too_long(rxdes))) {
434 netdev_info(netdev, "rx frame too long\n");
436 netdev->stats.rx_length_errors++;
438 } else if (unlikely(ftgmac100_rxdes_runt(rxdes))) {
440 netdev_info(netdev, "rx runt\n");
442 netdev->stats.rx_length_errors++;
444 } else if (unlikely(ftgmac100_rxdes_odd_nibble(rxdes))) {
446 netdev_info(netdev, "rx odd nibble\n");
448 netdev->stats.rx_length_errors++;
455 static void ftgmac100_rx_drop_packet(struct ftgmac100 *priv)
457 struct net_device *netdev = priv->netdev;
458 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
462 netdev_dbg(netdev, "drop packet %p\n", rxdes);
465 if (ftgmac100_rxdes_last_segment(rxdes))
468 ftgmac100_rxdes_set_dma_own(priv, rxdes);
469 ftgmac100_rx_pointer_advance(priv);
470 rxdes = ftgmac100_current_rxdes(priv);
471 } while (!done && ftgmac100_rxdes_packet_ready(rxdes));
473 netdev->stats.rx_dropped++;
476 static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
478 struct net_device *netdev = priv->netdev;
479 struct ftgmac100_rxdes *rxdes;
483 rxdes = ftgmac100_rx_locate_first_segment(priv);
487 if (unlikely(ftgmac100_rx_packet_error(priv, rxdes))) {
488 ftgmac100_rx_drop_packet(priv);
492 /* start processing */
493 skb = netdev_alloc_skb_ip_align(netdev, 128);
494 if (unlikely(!skb)) {
496 netdev_err(netdev, "rx skb alloc failed\n");
498 ftgmac100_rx_drop_packet(priv);
502 if (unlikely(ftgmac100_rxdes_multicast(rxdes)))
503 netdev->stats.multicast++;
506 * It seems that HW does checksum incorrectly with fragmented packets,
507 * so we are conservative here - if HW checksum error, let software do
508 * the checksum again.
510 if ((ftgmac100_rxdes_is_tcp(rxdes) && !ftgmac100_rxdes_tcpcs_err(rxdes)) ||
511 (ftgmac100_rxdes_is_udp(rxdes) && !ftgmac100_rxdes_udpcs_err(rxdes)))
512 skb->ip_summed = CHECKSUM_UNNECESSARY;
515 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
516 struct page *page = ftgmac100_rxdes_get_page(priv, rxdes);
519 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
521 size = ftgmac100_rxdes_data_length(rxdes);
522 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, page, 0, size);
525 skb->data_len += size;
526 skb->truesize += PAGE_SIZE;
528 if (ftgmac100_rxdes_last_segment(rxdes))
531 ftgmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
533 ftgmac100_rx_pointer_advance(priv);
534 rxdes = ftgmac100_current_rxdes(priv);
537 /* Small frames are copied into linear part of skb to free one page */
538 if (skb->len <= 128) {
539 skb->truesize -= PAGE_SIZE;
540 __pskb_pull_tail(skb, skb->len);
542 /* We pull the minimum amount into linear part */
543 __pskb_pull_tail(skb, ETH_HLEN);
545 skb->protocol = eth_type_trans(skb, netdev);
547 netdev->stats.rx_packets++;
548 netdev->stats.rx_bytes += skb->len;
550 /* push packet to protocol stack */
551 napi_gro_receive(&priv->napi, skb);
557 static void ftgmac100_txdes_reset(const struct ftgmac100 *priv,
558 struct ftgmac100_txdes *txdes)
560 /* clear all except end of ring bit */
561 txdes->txdes0 &= cpu_to_le32(priv->txdes0_edotr_mask);
567 static bool ftgmac100_txdes_owned_by_dma(struct ftgmac100_txdes *txdes)
569 return txdes->txdes0 & cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
572 static void ftgmac100_txdes_set_dma_own(struct ftgmac100_txdes *txdes)
575 * Make sure dma own bit will not be set before any other
579 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
582 static void ftgmac100_txdes_set_end_of_ring(const struct ftgmac100 *priv,
583 struct ftgmac100_txdes *txdes)
585 txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask);
588 static void ftgmac100_txdes_set_first_segment(struct ftgmac100_txdes *txdes)
590 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_FTS);
593 static void ftgmac100_txdes_set_last_segment(struct ftgmac100_txdes *txdes)
595 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_LTS);
598 static void ftgmac100_txdes_set_buffer_size(struct ftgmac100_txdes *txdes,
601 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXBUF_SIZE(len));
604 static void ftgmac100_txdes_set_txint(struct ftgmac100_txdes *txdes)
606 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TXIC);
609 static void ftgmac100_txdes_set_tcpcs(struct ftgmac100_txdes *txdes)
611 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TCP_CHKSUM);
614 static void ftgmac100_txdes_set_udpcs(struct ftgmac100_txdes *txdes)
616 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_UDP_CHKSUM);
619 static void ftgmac100_txdes_set_ipcs(struct ftgmac100_txdes *txdes)
621 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_IP_CHKSUM);
624 static void ftgmac100_txdes_set_dma_addr(struct ftgmac100_txdes *txdes,
627 txdes->txdes3 = cpu_to_le32(addr);
630 static dma_addr_t ftgmac100_txdes_get_dma_addr(struct ftgmac100_txdes *txdes)
632 return le32_to_cpu(txdes->txdes3);
636 * txdes2 is not used by hardware. We use it to keep track of socket buffer.
637 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
639 static void ftgmac100_txdes_set_skb(struct ftgmac100_txdes *txdes,
642 txdes->txdes2 = (unsigned int)skb;
645 static struct sk_buff *ftgmac100_txdes_get_skb(struct ftgmac100_txdes *txdes)
647 return (struct sk_buff *)txdes->txdes2;
650 static int ftgmac100_next_tx_pointer(int pointer)
652 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
655 static void ftgmac100_tx_pointer_advance(struct ftgmac100 *priv)
657 priv->tx_pointer = ftgmac100_next_tx_pointer(priv->tx_pointer);
660 static void ftgmac100_tx_clean_pointer_advance(struct ftgmac100 *priv)
662 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv->tx_clean_pointer);
665 static struct ftgmac100_txdes *ftgmac100_current_txdes(struct ftgmac100 *priv)
667 return &priv->descs->txdes[priv->tx_pointer];
670 static struct ftgmac100_txdes *
671 ftgmac100_current_clean_txdes(struct ftgmac100 *priv)
673 return &priv->descs->txdes[priv->tx_clean_pointer];
676 static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv)
678 struct net_device *netdev = priv->netdev;
679 struct ftgmac100_txdes *txdes;
683 if (priv->tx_pending == 0)
686 txdes = ftgmac100_current_clean_txdes(priv);
688 if (ftgmac100_txdes_owned_by_dma(txdes))
691 skb = ftgmac100_txdes_get_skb(txdes);
692 map = ftgmac100_txdes_get_dma_addr(txdes);
694 netdev->stats.tx_packets++;
695 netdev->stats.tx_bytes += skb->len;
697 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
701 ftgmac100_txdes_reset(priv, txdes);
703 ftgmac100_tx_clean_pointer_advance(priv);
705 spin_lock(&priv->tx_lock);
707 spin_unlock(&priv->tx_lock);
708 netif_wake_queue(netdev);
713 static void ftgmac100_tx_complete(struct ftgmac100 *priv)
715 while (ftgmac100_tx_complete_packet(priv))
719 static int ftgmac100_xmit(struct ftgmac100 *priv, struct sk_buff *skb,
722 struct net_device *netdev = priv->netdev;
723 struct ftgmac100_txdes *txdes;
724 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
726 txdes = ftgmac100_current_txdes(priv);
727 ftgmac100_tx_pointer_advance(priv);
729 /* setup TX descriptor */
730 ftgmac100_txdes_set_skb(txdes, skb);
731 ftgmac100_txdes_set_dma_addr(txdes, map);
732 ftgmac100_txdes_set_buffer_size(txdes, len);
734 ftgmac100_txdes_set_first_segment(txdes);
735 ftgmac100_txdes_set_last_segment(txdes);
736 ftgmac100_txdes_set_txint(txdes);
737 if (skb->ip_summed == CHECKSUM_PARTIAL) {
738 __be16 protocol = skb->protocol;
740 if (protocol == cpu_to_be16(ETH_P_IP)) {
741 u8 ip_proto = ip_hdr(skb)->protocol;
743 ftgmac100_txdes_set_ipcs(txdes);
744 if (ip_proto == IPPROTO_TCP)
745 ftgmac100_txdes_set_tcpcs(txdes);
746 else if (ip_proto == IPPROTO_UDP)
747 ftgmac100_txdes_set_udpcs(txdes);
751 spin_lock(&priv->tx_lock);
753 if (priv->tx_pending == TX_QUEUE_ENTRIES)
754 netif_stop_queue(netdev);
757 ftgmac100_txdes_set_dma_own(txdes);
758 spin_unlock(&priv->tx_lock);
760 ftgmac100_txdma_normal_prio_start_polling(priv);
765 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
766 struct ftgmac100_rxdes *rxdes, gfp_t gfp)
768 struct net_device *netdev = priv->netdev;
772 page = alloc_page(gfp);
775 netdev_err(netdev, "failed to allocate rx page\n");
779 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
780 if (unlikely(dma_mapping_error(priv->dev, map))) {
782 netdev_err(netdev, "failed to map rx page\n");
787 ftgmac100_rxdes_set_page(priv, rxdes, page);
788 ftgmac100_rxdes_set_dma_addr(rxdes, map);
789 ftgmac100_rxdes_set_dma_own(priv, rxdes);
793 static void ftgmac100_free_buffers(struct ftgmac100 *priv)
797 /* Free all RX buffers */
798 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
799 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
800 struct page *page = ftgmac100_rxdes_get_page(priv, rxdes);
801 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
806 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
810 /* Free all TX buffers */
811 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
812 struct ftgmac100_txdes *txdes = &priv->descs->txdes[i];
813 struct sk_buff *skb = ftgmac100_txdes_get_skb(txdes);
814 dma_addr_t map = ftgmac100_txdes_get_dma_addr(txdes);
819 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
824 static void ftgmac100_free_rings(struct ftgmac100 *priv)
826 /* Free descriptors */
828 dma_free_coherent(priv->dev, sizeof(struct ftgmac100_descs),
829 priv->descs, priv->descs_dma_addr);
832 static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
834 /* Allocate descriptors */
835 priv->descs = dma_zalloc_coherent(priv->dev,
836 sizeof(struct ftgmac100_descs),
837 &priv->descs_dma_addr, GFP_KERNEL);
844 static void ftgmac100_init_rings(struct ftgmac100 *priv)
848 /* Initialize RX ring */
849 for (i = 0; i < RX_QUEUE_ENTRIES; i++)
850 priv->descs->rxdes[i].rxdes0 = 0;
851 ftgmac100_rxdes_set_end_of_ring(priv, &priv->descs->rxdes[i - 1]);
853 /* Initialize TX ring */
854 for (i = 0; i < TX_QUEUE_ENTRIES; i++)
855 priv->descs->txdes[i].txdes0 = 0;
856 ftgmac100_txdes_set_end_of_ring(priv, &priv->descs->txdes[i -1]);
859 static int ftgmac100_alloc_rx_buffers(struct ftgmac100 *priv)
863 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
864 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
866 if (ftgmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
872 static void ftgmac100_adjust_link(struct net_device *netdev)
874 struct ftgmac100 *priv = netdev_priv(netdev);
875 struct phy_device *phydev = netdev->phydev;
879 /* We store "no link" as speed 0 */
883 new_speed = phydev->speed;
885 if (phydev->speed == priv->cur_speed &&
886 phydev->duplex == priv->cur_duplex)
889 /* Print status if we have a link or we had one and just lost it,
890 * don't print otherwise.
892 if (new_speed || priv->cur_speed)
893 phy_print_status(phydev);
895 priv->cur_speed = new_speed;
896 priv->cur_duplex = phydev->duplex;
898 /* Link is down, do nothing else */
902 ier = ioread32(priv->base + FTGMAC100_OFFSET_IER);
904 /* disable all interrupts */
905 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
907 netif_stop_queue(netdev);
908 ftgmac100_stop_hw(priv);
910 netif_start_queue(netdev);
911 ftgmac100_init_hw(priv);
912 ftgmac100_start_hw(priv);
914 /* re-enable interrupts */
915 iowrite32(ier, priv->base + FTGMAC100_OFFSET_IER);
918 static int ftgmac100_mii_probe(struct ftgmac100 *priv)
920 struct net_device *netdev = priv->netdev;
921 struct phy_device *phydev;
923 phydev = phy_find_first(priv->mii_bus);
925 netdev_info(netdev, "%s: no PHY found\n", netdev->name);
929 phydev = phy_connect(netdev, phydev_name(phydev),
930 &ftgmac100_adjust_link, PHY_INTERFACE_MODE_GMII);
932 if (IS_ERR(phydev)) {
933 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
934 return PTR_ERR(phydev);
940 static int ftgmac100_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
942 struct net_device *netdev = bus->priv;
943 struct ftgmac100 *priv = netdev_priv(netdev);
947 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
949 /* preserve MDC cycle threshold */
950 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
952 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
953 FTGMAC100_PHYCR_REGAD(regnum) |
954 FTGMAC100_PHYCR_MIIRD;
956 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
958 for (i = 0; i < 10; i++) {
959 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
961 if ((phycr & FTGMAC100_PHYCR_MIIRD) == 0) {
964 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA);
965 return FTGMAC100_PHYDATA_MIIRDATA(data);
971 netdev_err(netdev, "mdio read timed out\n");
975 static int ftgmac100_mdiobus_write(struct mii_bus *bus, int phy_addr,
976 int regnum, u16 value)
978 struct net_device *netdev = bus->priv;
979 struct ftgmac100 *priv = netdev_priv(netdev);
984 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
986 /* preserve MDC cycle threshold */
987 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
989 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
990 FTGMAC100_PHYCR_REGAD(regnum) |
991 FTGMAC100_PHYCR_MIIWR;
993 data = FTGMAC100_PHYDATA_MIIWDATA(value);
995 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA);
996 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
998 for (i = 0; i < 10; i++) {
999 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
1001 if ((phycr & FTGMAC100_PHYCR_MIIWR) == 0)
1007 netdev_err(netdev, "mdio write timed out\n");
1011 static void ftgmac100_get_drvinfo(struct net_device *netdev,
1012 struct ethtool_drvinfo *info)
1014 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1015 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1016 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
1019 static const struct ethtool_ops ftgmac100_ethtool_ops = {
1020 .get_drvinfo = ftgmac100_get_drvinfo,
1021 .get_link = ethtool_op_get_link,
1022 .get_link_ksettings = phy_ethtool_get_link_ksettings,
1023 .set_link_ksettings = phy_ethtool_set_link_ksettings,
1026 static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
1028 struct net_device *netdev = dev_id;
1029 struct ftgmac100 *priv = netdev_priv(netdev);
1031 /* When running in NCSI mode, the interface should be ready for
1032 * receiving or transmitting NCSI packets before it's opened.
1034 if (likely(priv->use_ncsi || netif_running(netdev))) {
1035 /* Disable interrupts for polling */
1036 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1037 napi_schedule(&priv->napi);
1043 static int ftgmac100_poll(struct napi_struct *napi, int budget)
1045 struct ftgmac100 *priv = container_of(napi, struct ftgmac100, napi);
1046 struct net_device *netdev = priv->netdev;
1047 unsigned int status;
1048 bool completed = true;
1051 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR);
1052 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR);
1054 if (status & (FTGMAC100_INT_RPKT_BUF | FTGMAC100_INT_NO_RXBUF)) {
1056 * FTGMAC100_INT_RPKT_BUF:
1057 * RX DMA has received packets into RX buffer successfully
1059 * FTGMAC100_INT_NO_RXBUF:
1060 * RX buffer unavailable
1065 retry = ftgmac100_rx_packet(priv, &rx);
1066 } while (retry && rx < budget);
1068 if (retry && rx == budget)
1072 if (status & (FTGMAC100_INT_XPKT_ETH | FTGMAC100_INT_XPKT_LOST)) {
1074 * FTGMAC100_INT_XPKT_ETH:
1075 * packet transmitted to ethernet successfully
1077 * FTGMAC100_INT_XPKT_LOST:
1078 * packet transmitted to ethernet lost due to late
1079 * collision or excessive collision
1081 ftgmac100_tx_complete(priv);
1084 if (status & priv->int_mask_all & (FTGMAC100_INT_NO_RXBUF |
1085 FTGMAC100_INT_RPKT_LOST | FTGMAC100_INT_AHB_ERR)) {
1086 if (net_ratelimit())
1087 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s\n", status,
1088 status & FTGMAC100_INT_NO_RXBUF ? "NO_RXBUF " : "",
1089 status & FTGMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
1090 status & FTGMAC100_INT_AHB_ERR ? "AHB_ERR " : "");
1092 if (status & FTGMAC100_INT_NO_RXBUF) {
1093 /* RX buffer unavailable */
1094 netdev->stats.rx_over_errors++;
1097 if (status & FTGMAC100_INT_RPKT_LOST) {
1098 /* received packet lost due to RX FIFO full */
1099 netdev->stats.rx_fifo_errors++;
1104 napi_complete(napi);
1106 /* enable all interrupts */
1107 iowrite32(priv->int_mask_all,
1108 priv->base + FTGMAC100_OFFSET_IER);
1114 static int ftgmac100_open(struct net_device *netdev)
1116 struct ftgmac100 *priv = netdev_priv(netdev);
1117 unsigned int status;
1120 /* Allocate ring buffers */
1121 err = ftgmac100_alloc_rings(priv);
1123 netdev_err(netdev, "Failed to allocate descriptors\n");
1127 /* Initialize the rings */
1128 ftgmac100_init_rings(priv);
1130 /* Allocate receive buffers */
1131 if (ftgmac100_alloc_rx_buffers(priv))
1134 /* When using NC-SI we force the speed to 100Mbit/s full duplex,
1136 * Otherwise we leave it set to 0 (no link), the link
1137 * message from the PHY layer will handle setting it up to
1138 * something else if needed.
1140 if (priv->use_ncsi) {
1141 priv->cur_duplex = DUPLEX_FULL;
1142 priv->cur_speed = SPEED_100;
1144 priv->cur_duplex = 0;
1145 priv->cur_speed = 0;
1148 priv->rx_pointer = 0;
1149 priv->tx_clean_pointer = 0;
1150 priv->tx_pointer = 0;
1151 priv->tx_pending = 0;
1153 err = ftgmac100_reset_hw(priv);
1157 /* Initialize NAPI */
1158 netif_napi_add(netdev, &priv->napi, ftgmac100_poll, 64);
1160 /* Grab our interrupt */
1161 err = request_irq(netdev->irq, ftgmac100_interrupt, 0, netdev->name, netdev);
1163 netdev_err(netdev, "failed to request irq %d\n", netdev->irq);
1167 ftgmac100_init_hw(priv);
1168 ftgmac100_start_hw(priv);
1170 /* Clear stale interrupts */
1171 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR);
1172 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR);
1175 phy_start(netdev->phydev);
1176 else if (priv->use_ncsi)
1177 netif_carrier_on(netdev);
1179 napi_enable(&priv->napi);
1180 netif_start_queue(netdev);
1182 /* enable all interrupts */
1183 iowrite32(priv->int_mask_all, priv->base + FTGMAC100_OFFSET_IER);
1185 /* Start the NCSI device */
1186 if (priv->use_ncsi) {
1187 err = ncsi_start_dev(priv->ndev);
1195 napi_disable(&priv->napi);
1196 netif_stop_queue(netdev);
1197 free_irq(netdev->irq, netdev);
1199 netif_napi_del(&priv->napi);
1202 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1203 ftgmac100_free_buffers(priv);
1204 ftgmac100_free_rings(priv);
1208 static int ftgmac100_stop(struct net_device *netdev)
1210 struct ftgmac100 *priv = netdev_priv(netdev);
1212 /* disable all interrupts */
1213 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1215 netif_stop_queue(netdev);
1216 napi_disable(&priv->napi);
1217 netif_napi_del(&priv->napi);
1219 phy_stop(netdev->phydev);
1220 else if (priv->use_ncsi)
1221 ncsi_stop_dev(priv->ndev);
1223 ftgmac100_stop_hw(priv);
1224 free_irq(netdev->irq, netdev);
1225 ftgmac100_free_buffers(priv);
1226 ftgmac100_free_rings(priv);
1231 static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
1232 struct net_device *netdev)
1234 struct ftgmac100 *priv = netdev_priv(netdev);
1237 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1238 if (net_ratelimit())
1239 netdev_dbg(netdev, "tx packet too big\n");
1241 netdev->stats.tx_dropped++;
1243 return NETDEV_TX_OK;
1246 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1247 if (unlikely(dma_mapping_error(priv->dev, map))) {
1249 if (net_ratelimit())
1250 netdev_err(netdev, "map socket buffer failed\n");
1252 netdev->stats.tx_dropped++;
1254 return NETDEV_TX_OK;
1257 return ftgmac100_xmit(priv, skb, map);
1261 static int ftgmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1263 if (!netdev->phydev)
1266 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
1269 static const struct net_device_ops ftgmac100_netdev_ops = {
1270 .ndo_open = ftgmac100_open,
1271 .ndo_stop = ftgmac100_stop,
1272 .ndo_start_xmit = ftgmac100_hard_start_xmit,
1273 .ndo_set_mac_address = ftgmac100_set_mac_addr,
1274 .ndo_validate_addr = eth_validate_addr,
1275 .ndo_do_ioctl = ftgmac100_do_ioctl,
1278 static int ftgmac100_setup_mdio(struct net_device *netdev)
1280 struct ftgmac100 *priv = netdev_priv(netdev);
1281 struct platform_device *pdev = to_platform_device(priv->dev);
1285 /* initialize mdio bus */
1286 priv->mii_bus = mdiobus_alloc();
1290 if (of_machine_is_compatible("aspeed,ast2400") ||
1291 of_machine_is_compatible("aspeed,ast2500")) {
1292 /* This driver supports the old MDIO interface */
1293 reg = ioread32(priv->base + FTGMAC100_OFFSET_REVR);
1294 reg &= ~FTGMAC100_REVR_NEW_MDIO_INTERFACE;
1295 iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
1298 priv->mii_bus->name = "ftgmac100_mdio";
1299 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
1300 pdev->name, pdev->id);
1301 priv->mii_bus->priv = priv->netdev;
1302 priv->mii_bus->read = ftgmac100_mdiobus_read;
1303 priv->mii_bus->write = ftgmac100_mdiobus_write;
1305 for (i = 0; i < PHY_MAX_ADDR; i++)
1306 priv->mii_bus->irq[i] = PHY_POLL;
1308 err = mdiobus_register(priv->mii_bus);
1310 dev_err(priv->dev, "Cannot register MDIO bus!\n");
1311 goto err_register_mdiobus;
1314 err = ftgmac100_mii_probe(priv);
1316 dev_err(priv->dev, "MII Probe failed!\n");
1323 mdiobus_unregister(priv->mii_bus);
1324 err_register_mdiobus:
1325 mdiobus_free(priv->mii_bus);
1329 static void ftgmac100_destroy_mdio(struct net_device *netdev)
1331 struct ftgmac100 *priv = netdev_priv(netdev);
1333 if (!netdev->phydev)
1336 phy_disconnect(netdev->phydev);
1337 mdiobus_unregister(priv->mii_bus);
1338 mdiobus_free(priv->mii_bus);
1341 static void ftgmac100_ncsi_handler(struct ncsi_dev *nd)
1343 if (unlikely(nd->state != ncsi_dev_state_functional))
1346 netdev_info(nd->dev, "NCSI interface %s\n",
1347 nd->link_up ? "up" : "down");
1350 static int ftgmac100_probe(struct platform_device *pdev)
1352 struct resource *res;
1354 struct net_device *netdev;
1355 struct ftgmac100 *priv;
1361 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1365 irq = platform_get_irq(pdev, 0);
1369 /* setup net_device */
1370 netdev = alloc_etherdev(sizeof(*priv));
1373 goto err_alloc_etherdev;
1376 SET_NETDEV_DEV(netdev, &pdev->dev);
1378 netdev->ethtool_ops = &ftgmac100_ethtool_ops;
1379 netdev->netdev_ops = &ftgmac100_netdev_ops;
1381 platform_set_drvdata(pdev, netdev);
1383 /* setup private data */
1384 priv = netdev_priv(netdev);
1385 priv->netdev = netdev;
1386 priv->dev = &pdev->dev;
1388 spin_lock_init(&priv->tx_lock);
1391 priv->res = request_mem_region(res->start, resource_size(res),
1392 dev_name(&pdev->dev));
1394 dev_err(&pdev->dev, "Could not reserve memory region\n");
1399 priv->base = ioremap(res->start, resource_size(res));
1401 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1408 /* MAC address from chip or random one */
1409 ftgmac100_setup_mac(priv);
1411 priv->int_mask_all = (FTGMAC100_INT_RPKT_LOST |
1412 FTGMAC100_INT_XPKT_ETH |
1413 FTGMAC100_INT_XPKT_LOST |
1414 FTGMAC100_INT_AHB_ERR |
1415 FTGMAC100_INT_RPKT_BUF |
1416 FTGMAC100_INT_NO_RXBUF);
1418 if (of_machine_is_compatible("aspeed,ast2400") ||
1419 of_machine_is_compatible("aspeed,ast2500")) {
1420 priv->rxdes0_edorr_mask = BIT(30);
1421 priv->txdes0_edotr_mask = BIT(30);
1423 priv->rxdes0_edorr_mask = BIT(15);
1424 priv->txdes0_edotr_mask = BIT(15);
1427 if (pdev->dev.of_node &&
1428 of_get_property(pdev->dev.of_node, "use-ncsi", NULL)) {
1429 if (!IS_ENABLED(CONFIG_NET_NCSI)) {
1430 dev_err(&pdev->dev, "NCSI stack not enabled\n");
1434 dev_info(&pdev->dev, "Using NCSI interface\n");
1435 priv->use_ncsi = true;
1436 priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler);
1440 priv->use_ncsi = false;
1441 err = ftgmac100_setup_mdio(netdev);
1443 goto err_setup_mdio;
1446 /* We have to disable on-chip IP checksum functionality
1447 * when NCSI is enabled on the interface. It doesn't work
1450 netdev->features = NETIF_F_IP_CSUM | NETIF_F_GRO;
1451 if (priv->use_ncsi &&
1452 of_get_property(pdev->dev.of_node, "no-hw-checksum", NULL))
1453 netdev->features &= ~NETIF_F_IP_CSUM;
1456 /* register network device */
1457 err = register_netdev(netdev);
1459 dev_err(&pdev->dev, "Failed to register netdev\n");
1460 goto err_register_netdev;
1463 netdev_info(netdev, "irq %d, mapped at %p\n", netdev->irq, priv->base);
1468 err_register_netdev:
1469 ftgmac100_destroy_mdio(netdev);
1471 iounmap(priv->base);
1473 release_resource(priv->res);
1475 netif_napi_del(&priv->napi);
1476 free_netdev(netdev);
1481 static int ftgmac100_remove(struct platform_device *pdev)
1483 struct net_device *netdev;
1484 struct ftgmac100 *priv;
1486 netdev = platform_get_drvdata(pdev);
1487 priv = netdev_priv(netdev);
1489 unregister_netdev(netdev);
1490 ftgmac100_destroy_mdio(netdev);
1492 iounmap(priv->base);
1493 release_resource(priv->res);
1495 netif_napi_del(&priv->napi);
1496 free_netdev(netdev);
1500 static const struct of_device_id ftgmac100_of_match[] = {
1501 { .compatible = "faraday,ftgmac100" },
1504 MODULE_DEVICE_TABLE(of, ftgmac100_of_match);
1506 static struct platform_driver ftgmac100_driver = {
1507 .probe = ftgmac100_probe,
1508 .remove = ftgmac100_remove,
1511 .of_match_table = ftgmac100_of_match,
1514 module_platform_driver(ftgmac100_driver);
1516 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1517 MODULE_DESCRIPTION("FTGMAC100 driver");
1518 MODULE_LICENSE("GPL");