2 * Faraday FTGMAC100 Gigabit Ethernet
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/dma-mapping.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
32 #include <linux/phy.h>
33 #include <linux/platform_device.h>
34 #include <linux/property.h>
38 #include "ftgmac100.h"
40 #define DRV_NAME "ftgmac100"
41 #define DRV_VERSION "0.7"
43 #define RX_QUEUE_ENTRIES 256 /* must be power of 2 */
44 #define TX_QUEUE_ENTRIES 512 /* must be power of 2 */
46 #define MAX_PKT_SIZE 1518
47 #define RX_BUF_SIZE PAGE_SIZE /* must be smaller than 0x3fff */
49 struct ftgmac100_descs {
50 struct ftgmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
51 struct ftgmac100_txdes txdes[TX_QUEUE_ENTRIES];
59 struct ftgmac100_descs *descs;
60 dma_addr_t descs_dma_addr;
63 struct page *rx_pages[RX_QUEUE_ENTRIES];
64 unsigned int rx_pointer;
65 u32 rxdes0_edorr_mask;
68 unsigned int tx_clean_pointer;
69 unsigned int tx_pointer;
70 unsigned int tx_pending;
71 u32 txdes0_edotr_mask;
74 /* Component structures */
75 struct net_device *netdev;
77 struct ncsi_dev *ndev;
78 struct napi_struct napi;
79 struct work_struct reset_task;
80 struct mii_bus *mii_bus;
91 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
92 struct ftgmac100_rxdes *rxdes, gfp_t gfp);
94 static void ftgmac100_set_rx_ring_base(struct ftgmac100 *priv, dma_addr_t addr)
96 iowrite32(addr, priv->base + FTGMAC100_OFFSET_RXR_BADR);
99 static void ftgmac100_set_rx_buffer_size(struct ftgmac100 *priv,
102 size = FTGMAC100_RBSR_SIZE(size);
103 iowrite32(size, priv->base + FTGMAC100_OFFSET_RBSR);
106 static void ftgmac100_set_normal_prio_tx_ring_base(struct ftgmac100 *priv,
109 iowrite32(addr, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
112 static void ftgmac100_txdma_normal_prio_start_polling(struct ftgmac100 *priv)
114 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD);
117 static int ftgmac100_reset_hw(struct ftgmac100 *priv)
119 struct net_device *netdev = priv->netdev;
122 /* NOTE: reset clears all registers */
123 iowrite32(FTGMAC100_MACCR_SW_RST, priv->base + FTGMAC100_OFFSET_MACCR);
124 for (i = 0; i < 5; i++) {
127 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR);
128 if (!(maccr & FTGMAC100_MACCR_SW_RST))
134 netdev_err(netdev, "software reset failed\n");
138 static void ftgmac100_set_mac(struct ftgmac100 *priv, const unsigned char *mac)
140 unsigned int maddr = mac[0] << 8 | mac[1];
141 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
143 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR);
144 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR);
147 static void ftgmac100_setup_mac(struct ftgmac100 *priv)
154 addr = device_get_mac_address(priv->dev, mac, ETH_ALEN);
156 ether_addr_copy(priv->netdev->dev_addr, mac);
157 dev_info(priv->dev, "Read MAC address %pM from device tree\n",
162 m = ioread32(priv->base + FTGMAC100_OFFSET_MAC_MADR);
163 l = ioread32(priv->base + FTGMAC100_OFFSET_MAC_LADR);
165 mac[0] = (m >> 8) & 0xff;
167 mac[2] = (l >> 24) & 0xff;
168 mac[3] = (l >> 16) & 0xff;
169 mac[4] = (l >> 8) & 0xff;
172 if (is_valid_ether_addr(mac)) {
173 ether_addr_copy(priv->netdev->dev_addr, mac);
174 dev_info(priv->dev, "Read MAC address %pM from chip\n", mac);
176 eth_hw_addr_random(priv->netdev);
177 dev_info(priv->dev, "Generated random MAC address %pM\n",
178 priv->netdev->dev_addr);
182 static int ftgmac100_set_mac_addr(struct net_device *dev, void *p)
186 ret = eth_prepare_mac_addr_change(dev, p);
190 eth_commit_mac_addr_change(dev, p);
191 ftgmac100_set_mac(netdev_priv(dev), dev->dev_addr);
196 static void ftgmac100_init_hw(struct ftgmac100 *priv)
198 /* setup ring buffer base registers */
199 ftgmac100_set_rx_ring_base(priv,
200 priv->descs_dma_addr +
201 offsetof(struct ftgmac100_descs, rxdes));
202 ftgmac100_set_normal_prio_tx_ring_base(priv,
203 priv->descs_dma_addr +
204 offsetof(struct ftgmac100_descs, txdes));
206 ftgmac100_set_rx_buffer_size(priv, RX_BUF_SIZE);
208 iowrite32(FTGMAC100_APTC_RXPOLL_CNT(1), priv->base + FTGMAC100_OFFSET_APTC);
210 ftgmac100_set_mac(priv, priv->netdev->dev_addr);
213 #define MACCR_ENABLE_ALL (FTGMAC100_MACCR_TXDMA_EN | \
214 FTGMAC100_MACCR_RXDMA_EN | \
215 FTGMAC100_MACCR_TXMAC_EN | \
216 FTGMAC100_MACCR_RXMAC_EN | \
217 FTGMAC100_MACCR_CRC_APD | \
218 FTGMAC100_MACCR_RX_RUNT | \
219 FTGMAC100_MACCR_RX_BROADPKT)
221 static void ftgmac100_start_hw(struct ftgmac100 *priv)
223 int maccr = MACCR_ENABLE_ALL;
225 switch (priv->cur_speed) {
231 maccr |= FTGMAC100_MACCR_FAST_MODE;
235 maccr |= FTGMAC100_MACCR_GIGA_MODE;
239 if (priv->cur_duplex == DUPLEX_FULL)
240 maccr |= FTGMAC100_MACCR_FULLDUP;
242 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
245 static void ftgmac100_stop_hw(struct ftgmac100 *priv)
247 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
250 static bool ftgmac100_rxdes_first_segment(struct ftgmac100_rxdes *rxdes)
252 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FRS);
255 static bool ftgmac100_rxdes_last_segment(struct ftgmac100_rxdes *rxdes)
257 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_LRS);
260 static bool ftgmac100_rxdes_packet_ready(struct ftgmac100_rxdes *rxdes)
262 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY);
265 static void ftgmac100_rxdes_set_dma_own(const struct ftgmac100 *priv,
266 struct ftgmac100_rxdes *rxdes)
268 /* clear status bits */
269 rxdes->rxdes0 &= cpu_to_le32(priv->rxdes0_edorr_mask);
272 static bool ftgmac100_rxdes_rx_error(struct ftgmac100_rxdes *rxdes)
274 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ERR);
277 static bool ftgmac100_rxdes_crc_error(struct ftgmac100_rxdes *rxdes)
279 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_CRC_ERR);
282 static bool ftgmac100_rxdes_frame_too_long(struct ftgmac100_rxdes *rxdes)
284 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FTL);
287 static bool ftgmac100_rxdes_runt(struct ftgmac100_rxdes *rxdes)
289 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RUNT);
292 static bool ftgmac100_rxdes_odd_nibble(struct ftgmac100_rxdes *rxdes)
294 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ODD_NB);
297 static unsigned int ftgmac100_rxdes_data_length(struct ftgmac100_rxdes *rxdes)
299 return le32_to_cpu(rxdes->rxdes0) & FTGMAC100_RXDES0_VDBC;
302 static bool ftgmac100_rxdes_multicast(struct ftgmac100_rxdes *rxdes)
304 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_MULTICAST);
307 static void ftgmac100_rxdes_set_end_of_ring(const struct ftgmac100 *priv,
308 struct ftgmac100_rxdes *rxdes)
310 rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
313 static void ftgmac100_rxdes_set_dma_addr(struct ftgmac100_rxdes *rxdes,
316 rxdes->rxdes3 = cpu_to_le32(addr);
319 static dma_addr_t ftgmac100_rxdes_get_dma_addr(struct ftgmac100_rxdes *rxdes)
321 return le32_to_cpu(rxdes->rxdes3);
324 static bool ftgmac100_rxdes_is_tcp(struct ftgmac100_rxdes *rxdes)
326 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
327 cpu_to_le32(FTGMAC100_RXDES1_PROT_TCPIP);
330 static bool ftgmac100_rxdes_is_udp(struct ftgmac100_rxdes *rxdes)
332 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
333 cpu_to_le32(FTGMAC100_RXDES1_PROT_UDPIP);
336 static bool ftgmac100_rxdes_tcpcs_err(struct ftgmac100_rxdes *rxdes)
338 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_TCP_CHKSUM_ERR);
341 static bool ftgmac100_rxdes_udpcs_err(struct ftgmac100_rxdes *rxdes)
343 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_UDP_CHKSUM_ERR);
346 static bool ftgmac100_rxdes_ipcs_err(struct ftgmac100_rxdes *rxdes)
348 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_IP_CHKSUM_ERR);
351 static inline struct page **ftgmac100_rxdes_page_slot(struct ftgmac100 *priv,
352 struct ftgmac100_rxdes *rxdes)
354 return &priv->rx_pages[rxdes - priv->descs->rxdes];
358 * rxdes2 is not used by hardware. We use it to keep track of page.
359 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
361 static void ftgmac100_rxdes_set_page(struct ftgmac100 *priv,
362 struct ftgmac100_rxdes *rxdes,
365 *ftgmac100_rxdes_page_slot(priv, rxdes) = page;
368 static struct page *ftgmac100_rxdes_get_page(struct ftgmac100 *priv,
369 struct ftgmac100_rxdes *rxdes)
371 return *ftgmac100_rxdes_page_slot(priv, rxdes);
374 static int ftgmac100_next_rx_pointer(int pointer)
376 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
379 static void ftgmac100_rx_pointer_advance(struct ftgmac100 *priv)
381 priv->rx_pointer = ftgmac100_next_rx_pointer(priv->rx_pointer);
384 static struct ftgmac100_rxdes *ftgmac100_current_rxdes(struct ftgmac100 *priv)
386 return &priv->descs->rxdes[priv->rx_pointer];
389 static struct ftgmac100_rxdes *
390 ftgmac100_rx_locate_first_segment(struct ftgmac100 *priv)
392 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
394 while (ftgmac100_rxdes_packet_ready(rxdes)) {
395 if (ftgmac100_rxdes_first_segment(rxdes))
398 ftgmac100_rxdes_set_dma_own(priv, rxdes);
399 ftgmac100_rx_pointer_advance(priv);
400 rxdes = ftgmac100_current_rxdes(priv);
406 static bool ftgmac100_rx_packet_error(struct ftgmac100 *priv,
407 struct ftgmac100_rxdes *rxdes)
409 struct net_device *netdev = priv->netdev;
412 if (unlikely(ftgmac100_rxdes_rx_error(rxdes))) {
414 netdev_info(netdev, "rx err\n");
416 netdev->stats.rx_errors++;
420 if (unlikely(ftgmac100_rxdes_crc_error(rxdes))) {
422 netdev_info(netdev, "rx crc err\n");
424 netdev->stats.rx_crc_errors++;
426 } else if (unlikely(ftgmac100_rxdes_ipcs_err(rxdes))) {
428 netdev_info(netdev, "rx IP checksum err\n");
433 if (unlikely(ftgmac100_rxdes_frame_too_long(rxdes))) {
435 netdev_info(netdev, "rx frame too long\n");
437 netdev->stats.rx_length_errors++;
439 } else if (unlikely(ftgmac100_rxdes_runt(rxdes))) {
441 netdev_info(netdev, "rx runt\n");
443 netdev->stats.rx_length_errors++;
445 } else if (unlikely(ftgmac100_rxdes_odd_nibble(rxdes))) {
447 netdev_info(netdev, "rx odd nibble\n");
449 netdev->stats.rx_length_errors++;
456 static void ftgmac100_rx_drop_packet(struct ftgmac100 *priv)
458 struct net_device *netdev = priv->netdev;
459 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
463 netdev_dbg(netdev, "drop packet %p\n", rxdes);
466 if (ftgmac100_rxdes_last_segment(rxdes))
469 ftgmac100_rxdes_set_dma_own(priv, rxdes);
470 ftgmac100_rx_pointer_advance(priv);
471 rxdes = ftgmac100_current_rxdes(priv);
472 } while (!done && ftgmac100_rxdes_packet_ready(rxdes));
474 netdev->stats.rx_dropped++;
477 static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
479 struct net_device *netdev = priv->netdev;
480 struct ftgmac100_rxdes *rxdes;
484 rxdes = ftgmac100_rx_locate_first_segment(priv);
488 if (unlikely(ftgmac100_rx_packet_error(priv, rxdes))) {
489 ftgmac100_rx_drop_packet(priv);
493 /* start processing */
494 skb = netdev_alloc_skb_ip_align(netdev, 128);
495 if (unlikely(!skb)) {
497 netdev_err(netdev, "rx skb alloc failed\n");
499 ftgmac100_rx_drop_packet(priv);
503 if (unlikely(ftgmac100_rxdes_multicast(rxdes)))
504 netdev->stats.multicast++;
507 * It seems that HW does checksum incorrectly with fragmented packets,
508 * so we are conservative here - if HW checksum error, let software do
509 * the checksum again.
511 if ((ftgmac100_rxdes_is_tcp(rxdes) && !ftgmac100_rxdes_tcpcs_err(rxdes)) ||
512 (ftgmac100_rxdes_is_udp(rxdes) && !ftgmac100_rxdes_udpcs_err(rxdes)))
513 skb->ip_summed = CHECKSUM_UNNECESSARY;
516 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
517 struct page *page = ftgmac100_rxdes_get_page(priv, rxdes);
520 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
522 size = ftgmac100_rxdes_data_length(rxdes);
523 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, page, 0, size);
526 skb->data_len += size;
527 skb->truesize += PAGE_SIZE;
529 if (ftgmac100_rxdes_last_segment(rxdes))
532 ftgmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
534 ftgmac100_rx_pointer_advance(priv);
535 rxdes = ftgmac100_current_rxdes(priv);
538 /* Small frames are copied into linear part of skb to free one page */
539 if (skb->len <= 128) {
540 skb->truesize -= PAGE_SIZE;
541 __pskb_pull_tail(skb, skb->len);
543 /* We pull the minimum amount into linear part */
544 __pskb_pull_tail(skb, ETH_HLEN);
546 skb->protocol = eth_type_trans(skb, netdev);
548 netdev->stats.rx_packets++;
549 netdev->stats.rx_bytes += skb->len;
551 /* push packet to protocol stack */
552 napi_gro_receive(&priv->napi, skb);
558 static void ftgmac100_txdes_reset(const struct ftgmac100 *priv,
559 struct ftgmac100_txdes *txdes)
561 /* clear all except end of ring bit */
562 txdes->txdes0 &= cpu_to_le32(priv->txdes0_edotr_mask);
568 static bool ftgmac100_txdes_owned_by_dma(struct ftgmac100_txdes *txdes)
570 return txdes->txdes0 & cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
573 static void ftgmac100_txdes_set_dma_own(struct ftgmac100_txdes *txdes)
576 * Make sure dma own bit will not be set before any other
580 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
583 static void ftgmac100_txdes_set_end_of_ring(const struct ftgmac100 *priv,
584 struct ftgmac100_txdes *txdes)
586 txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask);
589 static void ftgmac100_txdes_set_first_segment(struct ftgmac100_txdes *txdes)
591 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_FTS);
594 static void ftgmac100_txdes_set_last_segment(struct ftgmac100_txdes *txdes)
596 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_LTS);
599 static void ftgmac100_txdes_set_buffer_size(struct ftgmac100_txdes *txdes,
602 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXBUF_SIZE(len));
605 static void ftgmac100_txdes_set_txint(struct ftgmac100_txdes *txdes)
607 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TXIC);
610 static void ftgmac100_txdes_set_tcpcs(struct ftgmac100_txdes *txdes)
612 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TCP_CHKSUM);
615 static void ftgmac100_txdes_set_udpcs(struct ftgmac100_txdes *txdes)
617 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_UDP_CHKSUM);
620 static void ftgmac100_txdes_set_ipcs(struct ftgmac100_txdes *txdes)
622 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_IP_CHKSUM);
625 static void ftgmac100_txdes_set_dma_addr(struct ftgmac100_txdes *txdes,
628 txdes->txdes3 = cpu_to_le32(addr);
631 static dma_addr_t ftgmac100_txdes_get_dma_addr(struct ftgmac100_txdes *txdes)
633 return le32_to_cpu(txdes->txdes3);
637 * txdes2 is not used by hardware. We use it to keep track of socket buffer.
638 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
640 static void ftgmac100_txdes_set_skb(struct ftgmac100_txdes *txdes,
643 txdes->txdes2 = (unsigned int)skb;
646 static struct sk_buff *ftgmac100_txdes_get_skb(struct ftgmac100_txdes *txdes)
648 return (struct sk_buff *)txdes->txdes2;
651 static int ftgmac100_next_tx_pointer(int pointer)
653 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
656 static void ftgmac100_tx_pointer_advance(struct ftgmac100 *priv)
658 priv->tx_pointer = ftgmac100_next_tx_pointer(priv->tx_pointer);
661 static void ftgmac100_tx_clean_pointer_advance(struct ftgmac100 *priv)
663 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv->tx_clean_pointer);
666 static struct ftgmac100_txdes *ftgmac100_current_txdes(struct ftgmac100 *priv)
668 return &priv->descs->txdes[priv->tx_pointer];
671 static struct ftgmac100_txdes *
672 ftgmac100_current_clean_txdes(struct ftgmac100 *priv)
674 return &priv->descs->txdes[priv->tx_clean_pointer];
677 static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv)
679 struct net_device *netdev = priv->netdev;
680 struct ftgmac100_txdes *txdes;
684 if (priv->tx_pending == 0)
687 txdes = ftgmac100_current_clean_txdes(priv);
689 if (ftgmac100_txdes_owned_by_dma(txdes))
692 skb = ftgmac100_txdes_get_skb(txdes);
693 map = ftgmac100_txdes_get_dma_addr(txdes);
695 netdev->stats.tx_packets++;
696 netdev->stats.tx_bytes += skb->len;
698 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
702 ftgmac100_txdes_reset(priv, txdes);
704 ftgmac100_tx_clean_pointer_advance(priv);
706 spin_lock(&priv->tx_lock);
708 spin_unlock(&priv->tx_lock);
709 netif_wake_queue(netdev);
714 static void ftgmac100_tx_complete(struct ftgmac100 *priv)
716 while (ftgmac100_tx_complete_packet(priv))
720 static int ftgmac100_xmit(struct ftgmac100 *priv, struct sk_buff *skb,
723 struct net_device *netdev = priv->netdev;
724 struct ftgmac100_txdes *txdes;
725 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
727 txdes = ftgmac100_current_txdes(priv);
728 ftgmac100_tx_pointer_advance(priv);
730 /* setup TX descriptor */
731 ftgmac100_txdes_set_skb(txdes, skb);
732 ftgmac100_txdes_set_dma_addr(txdes, map);
733 ftgmac100_txdes_set_buffer_size(txdes, len);
735 ftgmac100_txdes_set_first_segment(txdes);
736 ftgmac100_txdes_set_last_segment(txdes);
737 ftgmac100_txdes_set_txint(txdes);
738 if (skb->ip_summed == CHECKSUM_PARTIAL) {
739 __be16 protocol = skb->protocol;
741 if (protocol == cpu_to_be16(ETH_P_IP)) {
742 u8 ip_proto = ip_hdr(skb)->protocol;
744 ftgmac100_txdes_set_ipcs(txdes);
745 if (ip_proto == IPPROTO_TCP)
746 ftgmac100_txdes_set_tcpcs(txdes);
747 else if (ip_proto == IPPROTO_UDP)
748 ftgmac100_txdes_set_udpcs(txdes);
752 spin_lock(&priv->tx_lock);
754 if (priv->tx_pending == TX_QUEUE_ENTRIES)
755 netif_stop_queue(netdev);
758 ftgmac100_txdes_set_dma_own(txdes);
759 spin_unlock(&priv->tx_lock);
761 ftgmac100_txdma_normal_prio_start_polling(priv);
766 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
767 struct ftgmac100_rxdes *rxdes, gfp_t gfp)
769 struct net_device *netdev = priv->netdev;
773 page = alloc_page(gfp);
776 netdev_err(netdev, "failed to allocate rx page\n");
780 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
781 if (unlikely(dma_mapping_error(priv->dev, map))) {
783 netdev_err(netdev, "failed to map rx page\n");
788 ftgmac100_rxdes_set_page(priv, rxdes, page);
789 ftgmac100_rxdes_set_dma_addr(rxdes, map);
790 ftgmac100_rxdes_set_dma_own(priv, rxdes);
794 static void ftgmac100_free_buffers(struct ftgmac100 *priv)
798 /* Free all RX buffers */
799 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
800 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
801 struct page *page = ftgmac100_rxdes_get_page(priv, rxdes);
802 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
807 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
811 /* Free all TX buffers */
812 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
813 struct ftgmac100_txdes *txdes = &priv->descs->txdes[i];
814 struct sk_buff *skb = ftgmac100_txdes_get_skb(txdes);
815 dma_addr_t map = ftgmac100_txdes_get_dma_addr(txdes);
820 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
825 static void ftgmac100_free_rings(struct ftgmac100 *priv)
827 /* Free descriptors */
829 dma_free_coherent(priv->dev, sizeof(struct ftgmac100_descs),
830 priv->descs, priv->descs_dma_addr);
833 static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
835 /* Allocate descriptors */
836 priv->descs = dma_zalloc_coherent(priv->dev,
837 sizeof(struct ftgmac100_descs),
838 &priv->descs_dma_addr, GFP_KERNEL);
845 static void ftgmac100_init_rings(struct ftgmac100 *priv)
849 /* Initialize RX ring */
850 for (i = 0; i < RX_QUEUE_ENTRIES; i++)
851 priv->descs->rxdes[i].rxdes0 = 0;
852 ftgmac100_rxdes_set_end_of_ring(priv, &priv->descs->rxdes[i - 1]);
854 /* Initialize TX ring */
855 for (i = 0; i < TX_QUEUE_ENTRIES; i++)
856 priv->descs->txdes[i].txdes0 = 0;
857 ftgmac100_txdes_set_end_of_ring(priv, &priv->descs->txdes[i -1]);
860 static int ftgmac100_alloc_rx_buffers(struct ftgmac100 *priv)
864 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
865 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
867 if (ftgmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
873 static void ftgmac100_adjust_link(struct net_device *netdev)
875 struct ftgmac100 *priv = netdev_priv(netdev);
876 struct phy_device *phydev = netdev->phydev;
879 /* We store "no link" as speed 0 */
883 new_speed = phydev->speed;
885 if (phydev->speed == priv->cur_speed &&
886 phydev->duplex == priv->cur_duplex)
889 /* Print status if we have a link or we had one and just lost it,
890 * don't print otherwise.
892 if (new_speed || priv->cur_speed)
893 phy_print_status(phydev);
895 priv->cur_speed = new_speed;
896 priv->cur_duplex = phydev->duplex;
898 /* Link is down, do nothing else */
902 /* Disable all interrupts */
903 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
905 /* Reset the adapter asynchronously */
906 schedule_work(&priv->reset_task);
909 static int ftgmac100_mii_probe(struct ftgmac100 *priv)
911 struct net_device *netdev = priv->netdev;
912 struct phy_device *phydev;
914 phydev = phy_find_first(priv->mii_bus);
916 netdev_info(netdev, "%s: no PHY found\n", netdev->name);
920 phydev = phy_connect(netdev, phydev_name(phydev),
921 &ftgmac100_adjust_link, PHY_INTERFACE_MODE_GMII);
923 if (IS_ERR(phydev)) {
924 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
925 return PTR_ERR(phydev);
931 static int ftgmac100_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
933 struct net_device *netdev = bus->priv;
934 struct ftgmac100 *priv = netdev_priv(netdev);
938 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
940 /* preserve MDC cycle threshold */
941 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
943 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
944 FTGMAC100_PHYCR_REGAD(regnum) |
945 FTGMAC100_PHYCR_MIIRD;
947 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
949 for (i = 0; i < 10; i++) {
950 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
952 if ((phycr & FTGMAC100_PHYCR_MIIRD) == 0) {
955 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA);
956 return FTGMAC100_PHYDATA_MIIRDATA(data);
962 netdev_err(netdev, "mdio read timed out\n");
966 static int ftgmac100_mdiobus_write(struct mii_bus *bus, int phy_addr,
967 int regnum, u16 value)
969 struct net_device *netdev = bus->priv;
970 struct ftgmac100 *priv = netdev_priv(netdev);
975 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
977 /* preserve MDC cycle threshold */
978 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
980 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
981 FTGMAC100_PHYCR_REGAD(regnum) |
982 FTGMAC100_PHYCR_MIIWR;
984 data = FTGMAC100_PHYDATA_MIIWDATA(value);
986 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA);
987 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
989 for (i = 0; i < 10; i++) {
990 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
992 if ((phycr & FTGMAC100_PHYCR_MIIWR) == 0)
998 netdev_err(netdev, "mdio write timed out\n");
1002 static void ftgmac100_get_drvinfo(struct net_device *netdev,
1003 struct ethtool_drvinfo *info)
1005 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1006 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1007 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
1010 static const struct ethtool_ops ftgmac100_ethtool_ops = {
1011 .get_drvinfo = ftgmac100_get_drvinfo,
1012 .get_link = ethtool_op_get_link,
1013 .get_link_ksettings = phy_ethtool_get_link_ksettings,
1014 .set_link_ksettings = phy_ethtool_set_link_ksettings,
1017 static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
1019 struct net_device *netdev = dev_id;
1020 struct ftgmac100 *priv = netdev_priv(netdev);
1022 /* When running in NCSI mode, the interface should be ready for
1023 * receiving or transmitting NCSI packets before it's opened.
1025 if (likely(priv->use_ncsi || netif_running(netdev))) {
1026 /* Disable interrupts for polling */
1027 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1028 napi_schedule(&priv->napi);
1034 static int ftgmac100_poll(struct napi_struct *napi, int budget)
1036 struct ftgmac100 *priv = container_of(napi, struct ftgmac100, napi);
1037 struct net_device *netdev = priv->netdev;
1038 unsigned int status;
1039 bool completed = true;
1042 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR);
1043 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR);
1045 if (status & (FTGMAC100_INT_RPKT_BUF | FTGMAC100_INT_NO_RXBUF)) {
1047 * FTGMAC100_INT_RPKT_BUF:
1048 * RX DMA has received packets into RX buffer successfully
1050 * FTGMAC100_INT_NO_RXBUF:
1051 * RX buffer unavailable
1056 retry = ftgmac100_rx_packet(priv, &rx);
1057 } while (retry && rx < budget);
1059 if (retry && rx == budget)
1063 if (status & (FTGMAC100_INT_XPKT_ETH | FTGMAC100_INT_XPKT_LOST)) {
1065 * FTGMAC100_INT_XPKT_ETH:
1066 * packet transmitted to ethernet successfully
1068 * FTGMAC100_INT_XPKT_LOST:
1069 * packet transmitted to ethernet lost due to late
1070 * collision or excessive collision
1072 ftgmac100_tx_complete(priv);
1075 if (status & priv->int_mask_all & (FTGMAC100_INT_NO_RXBUF |
1076 FTGMAC100_INT_RPKT_LOST | FTGMAC100_INT_AHB_ERR)) {
1077 if (net_ratelimit())
1078 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s\n", status,
1079 status & FTGMAC100_INT_NO_RXBUF ? "NO_RXBUF " : "",
1080 status & FTGMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
1081 status & FTGMAC100_INT_AHB_ERR ? "AHB_ERR " : "");
1083 if (status & FTGMAC100_INT_NO_RXBUF) {
1084 /* RX buffer unavailable */
1085 netdev->stats.rx_over_errors++;
1088 if (status & FTGMAC100_INT_RPKT_LOST) {
1089 /* received packet lost due to RX FIFO full */
1090 netdev->stats.rx_fifo_errors++;
1095 napi_complete(napi);
1097 /* enable all interrupts */
1098 iowrite32(priv->int_mask_all,
1099 priv->base + FTGMAC100_OFFSET_IER);
1105 static int ftgmac100_init_all(struct ftgmac100 *priv, bool ignore_alloc_err)
1109 /* Re-init descriptors (adjust queue sizes) */
1110 ftgmac100_init_rings(priv);
1112 /* Realloc rx descriptors */
1113 err = ftgmac100_alloc_rx_buffers(priv);
1114 if (err && !ignore_alloc_err)
1117 /* Reinit and restart HW */
1118 ftgmac100_init_hw(priv);
1119 ftgmac100_start_hw(priv);
1121 /* Re-enable the device */
1122 napi_enable(&priv->napi);
1123 netif_start_queue(priv->netdev);
1125 /* Enable all interrupts */
1126 iowrite32(priv->int_mask_all, priv->base + FTGMAC100_OFFSET_IER);
1131 static void ftgmac100_reset_task(struct work_struct *work)
1133 struct ftgmac100 *priv = container_of(work, struct ftgmac100,
1135 struct net_device *netdev = priv->netdev;
1138 netdev_dbg(netdev, "Resetting NIC...\n");
1140 /* Lock the world */
1143 mutex_lock(&netdev->phydev->lock);
1145 mutex_lock(&priv->mii_bus->mdio_lock);
1148 /* Check if the interface is still up */
1149 if (!netif_running(netdev))
1152 /* Stop the network stack */
1153 netif_trans_update(netdev);
1154 napi_disable(&priv->napi);
1155 netif_tx_disable(netdev);
1157 /* Stop and reset the MAC */
1158 ftgmac100_stop_hw(priv);
1159 err = ftgmac100_reset_hw(priv);
1161 /* Not much we can do ... it might come back... */
1162 netdev_err(netdev, "attempting to continue...\n");
1165 /* Free all rx and tx buffers */
1166 ftgmac100_free_buffers(priv);
1168 /* The ring pointers have been reset in HW, reflect this here */
1169 priv->rx_pointer = 0;
1170 priv->tx_clean_pointer = 0;
1171 priv->tx_pointer = 0;
1172 priv->tx_pending = 0;
1174 /* Setup everything again and restart chip */
1175 ftgmac100_init_all(priv, true);
1177 netdev_dbg(netdev, "Reset done !\n");
1180 mutex_unlock(&priv->mii_bus->mdio_lock);
1182 mutex_unlock(&netdev->phydev->lock);
1186 static int ftgmac100_open(struct net_device *netdev)
1188 struct ftgmac100 *priv = netdev_priv(netdev);
1191 /* Allocate ring buffers */
1192 err = ftgmac100_alloc_rings(priv);
1194 netdev_err(netdev, "Failed to allocate descriptors\n");
1198 /* When using NC-SI we force the speed to 100Mbit/s full duplex,
1200 * Otherwise we leave it set to 0 (no link), the link
1201 * message from the PHY layer will handle setting it up to
1202 * something else if needed.
1204 if (priv->use_ncsi) {
1205 priv->cur_duplex = DUPLEX_FULL;
1206 priv->cur_speed = SPEED_100;
1208 priv->cur_duplex = 0;
1209 priv->cur_speed = 0;
1212 priv->rx_pointer = 0;
1213 priv->tx_clean_pointer = 0;
1214 priv->tx_pointer = 0;
1215 priv->tx_pending = 0;
1217 err = ftgmac100_reset_hw(priv);
1221 /* Initialize NAPI */
1222 netif_napi_add(netdev, &priv->napi, ftgmac100_poll, 64);
1224 /* Grab our interrupt */
1225 err = request_irq(netdev->irq, ftgmac100_interrupt, 0, netdev->name, netdev);
1227 netdev_err(netdev, "failed to request irq %d\n", netdev->irq);
1231 /* Start things up */
1232 err = ftgmac100_init_all(priv, false);
1234 netdev_err(netdev, "Failed to allocate packet buffers\n");
1238 if (netdev->phydev) {
1239 /* If we have a PHY, start polling */
1240 phy_start(netdev->phydev);
1241 } else if (priv->use_ncsi) {
1242 /* If using NC-SI, set our carrier on and start the stack */
1243 netif_carrier_on(netdev);
1245 /* Start the NCSI device */
1246 err = ncsi_start_dev(priv->ndev);
1254 napi_disable(&priv->napi);
1255 netif_stop_queue(netdev);
1257 ftgmac100_free_buffers(priv);
1258 free_irq(netdev->irq, netdev);
1260 netif_napi_del(&priv->napi);
1262 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1263 ftgmac100_free_rings(priv);
1267 static int ftgmac100_stop(struct net_device *netdev)
1269 struct ftgmac100 *priv = netdev_priv(netdev);
1271 /* Note about the reset task: We are called with the rtnl lock
1272 * held, so we are synchronized against the core of the reset
1273 * task. We must not try to synchronously cancel it otherwise
1274 * we can deadlock. But since it will test for netif_running()
1275 * which has already been cleared by the net core, we don't
1276 * anything special to do.
1279 /* disable all interrupts */
1280 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1282 netif_stop_queue(netdev);
1283 napi_disable(&priv->napi);
1284 netif_napi_del(&priv->napi);
1286 phy_stop(netdev->phydev);
1287 else if (priv->use_ncsi)
1288 ncsi_stop_dev(priv->ndev);
1290 ftgmac100_stop_hw(priv);
1291 free_irq(netdev->irq, netdev);
1292 ftgmac100_free_buffers(priv);
1293 ftgmac100_free_rings(priv);
1298 static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
1299 struct net_device *netdev)
1301 struct ftgmac100 *priv = netdev_priv(netdev);
1304 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1305 if (net_ratelimit())
1306 netdev_dbg(netdev, "tx packet too big\n");
1308 netdev->stats.tx_dropped++;
1310 return NETDEV_TX_OK;
1313 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1314 if (unlikely(dma_mapping_error(priv->dev, map))) {
1316 if (net_ratelimit())
1317 netdev_err(netdev, "map socket buffer failed\n");
1319 netdev->stats.tx_dropped++;
1321 return NETDEV_TX_OK;
1324 return ftgmac100_xmit(priv, skb, map);
1328 static int ftgmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1330 if (!netdev->phydev)
1333 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
1336 static const struct net_device_ops ftgmac100_netdev_ops = {
1337 .ndo_open = ftgmac100_open,
1338 .ndo_stop = ftgmac100_stop,
1339 .ndo_start_xmit = ftgmac100_hard_start_xmit,
1340 .ndo_set_mac_address = ftgmac100_set_mac_addr,
1341 .ndo_validate_addr = eth_validate_addr,
1342 .ndo_do_ioctl = ftgmac100_do_ioctl,
1345 static int ftgmac100_setup_mdio(struct net_device *netdev)
1347 struct ftgmac100 *priv = netdev_priv(netdev);
1348 struct platform_device *pdev = to_platform_device(priv->dev);
1352 /* initialize mdio bus */
1353 priv->mii_bus = mdiobus_alloc();
1357 if (of_machine_is_compatible("aspeed,ast2400") ||
1358 of_machine_is_compatible("aspeed,ast2500")) {
1359 /* This driver supports the old MDIO interface */
1360 reg = ioread32(priv->base + FTGMAC100_OFFSET_REVR);
1361 reg &= ~FTGMAC100_REVR_NEW_MDIO_INTERFACE;
1362 iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
1365 priv->mii_bus->name = "ftgmac100_mdio";
1366 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
1367 pdev->name, pdev->id);
1368 priv->mii_bus->priv = priv->netdev;
1369 priv->mii_bus->read = ftgmac100_mdiobus_read;
1370 priv->mii_bus->write = ftgmac100_mdiobus_write;
1372 for (i = 0; i < PHY_MAX_ADDR; i++)
1373 priv->mii_bus->irq[i] = PHY_POLL;
1375 err = mdiobus_register(priv->mii_bus);
1377 dev_err(priv->dev, "Cannot register MDIO bus!\n");
1378 goto err_register_mdiobus;
1381 err = ftgmac100_mii_probe(priv);
1383 dev_err(priv->dev, "MII Probe failed!\n");
1390 mdiobus_unregister(priv->mii_bus);
1391 err_register_mdiobus:
1392 mdiobus_free(priv->mii_bus);
1396 static void ftgmac100_destroy_mdio(struct net_device *netdev)
1398 struct ftgmac100 *priv = netdev_priv(netdev);
1400 if (!netdev->phydev)
1403 phy_disconnect(netdev->phydev);
1404 mdiobus_unregister(priv->mii_bus);
1405 mdiobus_free(priv->mii_bus);
1408 static void ftgmac100_ncsi_handler(struct ncsi_dev *nd)
1410 if (unlikely(nd->state != ncsi_dev_state_functional))
1413 netdev_info(nd->dev, "NCSI interface %s\n",
1414 nd->link_up ? "up" : "down");
1417 static int ftgmac100_probe(struct platform_device *pdev)
1419 struct resource *res;
1421 struct net_device *netdev;
1422 struct ftgmac100 *priv;
1428 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1432 irq = platform_get_irq(pdev, 0);
1436 /* setup net_device */
1437 netdev = alloc_etherdev(sizeof(*priv));
1440 goto err_alloc_etherdev;
1443 SET_NETDEV_DEV(netdev, &pdev->dev);
1445 netdev->ethtool_ops = &ftgmac100_ethtool_ops;
1446 netdev->netdev_ops = &ftgmac100_netdev_ops;
1448 platform_set_drvdata(pdev, netdev);
1450 /* setup private data */
1451 priv = netdev_priv(netdev);
1452 priv->netdev = netdev;
1453 priv->dev = &pdev->dev;
1454 INIT_WORK(&priv->reset_task, ftgmac100_reset_task);
1456 spin_lock_init(&priv->tx_lock);
1459 priv->res = request_mem_region(res->start, resource_size(res),
1460 dev_name(&pdev->dev));
1462 dev_err(&pdev->dev, "Could not reserve memory region\n");
1467 priv->base = ioremap(res->start, resource_size(res));
1469 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1476 /* MAC address from chip or random one */
1477 ftgmac100_setup_mac(priv);
1479 priv->int_mask_all = (FTGMAC100_INT_RPKT_LOST |
1480 FTGMAC100_INT_XPKT_ETH |
1481 FTGMAC100_INT_XPKT_LOST |
1482 FTGMAC100_INT_AHB_ERR |
1483 FTGMAC100_INT_RPKT_BUF |
1484 FTGMAC100_INT_NO_RXBUF);
1486 if (of_machine_is_compatible("aspeed,ast2400") ||
1487 of_machine_is_compatible("aspeed,ast2500")) {
1488 priv->rxdes0_edorr_mask = BIT(30);
1489 priv->txdes0_edotr_mask = BIT(30);
1491 priv->rxdes0_edorr_mask = BIT(15);
1492 priv->txdes0_edotr_mask = BIT(15);
1495 if (pdev->dev.of_node &&
1496 of_get_property(pdev->dev.of_node, "use-ncsi", NULL)) {
1497 if (!IS_ENABLED(CONFIG_NET_NCSI)) {
1498 dev_err(&pdev->dev, "NCSI stack not enabled\n");
1502 dev_info(&pdev->dev, "Using NCSI interface\n");
1503 priv->use_ncsi = true;
1504 priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler);
1508 priv->use_ncsi = false;
1509 err = ftgmac100_setup_mdio(netdev);
1511 goto err_setup_mdio;
1514 /* We have to disable on-chip IP checksum functionality
1515 * when NCSI is enabled on the interface. It doesn't work
1518 netdev->features = NETIF_F_IP_CSUM | NETIF_F_GRO;
1519 if (priv->use_ncsi &&
1520 of_get_property(pdev->dev.of_node, "no-hw-checksum", NULL))
1521 netdev->features &= ~NETIF_F_IP_CSUM;
1524 /* register network device */
1525 err = register_netdev(netdev);
1527 dev_err(&pdev->dev, "Failed to register netdev\n");
1528 goto err_register_netdev;
1531 netdev_info(netdev, "irq %d, mapped at %p\n", netdev->irq, priv->base);
1536 err_register_netdev:
1537 ftgmac100_destroy_mdio(netdev);
1539 iounmap(priv->base);
1541 release_resource(priv->res);
1543 netif_napi_del(&priv->napi);
1544 free_netdev(netdev);
1549 static int ftgmac100_remove(struct platform_device *pdev)
1551 struct net_device *netdev;
1552 struct ftgmac100 *priv;
1554 netdev = platform_get_drvdata(pdev);
1555 priv = netdev_priv(netdev);
1557 unregister_netdev(netdev);
1559 /* There's a small chance the reset task will have been re-queued,
1560 * during stop, make sure it's gone before we free the structure.
1562 cancel_work_sync(&priv->reset_task);
1564 ftgmac100_destroy_mdio(netdev);
1566 iounmap(priv->base);
1567 release_resource(priv->res);
1569 netif_napi_del(&priv->napi);
1570 free_netdev(netdev);
1574 static const struct of_device_id ftgmac100_of_match[] = {
1575 { .compatible = "faraday,ftgmac100" },
1578 MODULE_DEVICE_TABLE(of, ftgmac100_of_match);
1580 static struct platform_driver ftgmac100_driver = {
1581 .probe = ftgmac100_probe,
1582 .remove = ftgmac100_remove,
1585 .of_match_table = ftgmac100_of_match,
1588 module_platform_driver(ftgmac100_driver);
1590 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1591 MODULE_DESCRIPTION("FTGMAC100 driver");
1592 MODULE_LICENSE("GPL");