2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 * Right now, I am very wasteful with the buffers. I allocate memory
6 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
15 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
19 * Copyright (c) 2004-2006 Macq Electronique SA.
21 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/pci.h>
33 #include <linux/init.h>
34 #include <linux/delay.h>
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38 #include <linux/spinlock.h>
39 #include <linux/workqueue.h>
40 #include <linux/bitops.h>
42 #include <linux/irq.h>
43 #include <linux/clk.h>
44 #include <linux/platform_device.h>
45 #include <linux/phy.h>
46 #include <linux/fec.h>
48 #include <linux/of_device.h>
49 #include <linux/of_gpio.h>
50 #include <linux/of_net.h>
51 #include <linux/pinctrl/consumer.h>
52 #include <linux/regulator/consumer.h>
54 #include <asm/cacheflush.h>
57 #include <asm/coldfire.h>
58 #include <asm/mcfsim.h>
63 #if defined(CONFIG_ARM)
64 #define FEC_ALIGNMENT 0xf
66 #define FEC_ALIGNMENT 0x3
69 #define DRIVER_NAME "fec"
70 #define FEC_NAPI_WEIGHT 64
72 /* Pause frame feild and FIFO threshold */
73 #define FEC_ENET_FCE (1 << 5)
74 #define FEC_ENET_RSEM_V 0x84
75 #define FEC_ENET_RSFL_V 16
76 #define FEC_ENET_RAEM_V 0x8
77 #define FEC_ENET_RAFL_V 0x8
78 #define FEC_ENET_OPD_V 0xFFF0
80 /* Controller is ENET-MAC */
81 #define FEC_QUIRK_ENET_MAC (1 << 0)
82 /* Controller needs driver to swap frame */
83 #define FEC_QUIRK_SWAP_FRAME (1 << 1)
84 /* Controller uses gasket */
85 #define FEC_QUIRK_USE_GASKET (1 << 2)
86 /* Controller has GBIT support */
87 #define FEC_QUIRK_HAS_GBIT (1 << 3)
88 /* Controller has extend desc buffer */
89 #define FEC_QUIRK_HAS_BUFDESC_EX (1 << 4)
91 static struct platform_device_id fec_devtype[] = {
93 /* keep it for coldfire */
98 .driver_data = FEC_QUIRK_USE_GASKET,
104 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
107 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
108 FEC_QUIRK_HAS_BUFDESC_EX,
113 MODULE_DEVICE_TABLE(platform, fec_devtype);
116 IMX25_FEC = 1, /* runs on i.mx25/50/53 */
117 IMX27_FEC, /* runs on i.mx27/35/51 */
122 static const struct of_device_id fec_dt_ids[] = {
123 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
124 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
125 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
126 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
129 MODULE_DEVICE_TABLE(of, fec_dt_ids);
131 static unsigned char macaddr[ETH_ALEN];
132 module_param_array(macaddr, byte, NULL, 0);
133 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
135 #if defined(CONFIG_M5272)
137 * Some hardware gets it MAC address out of local flash memory.
138 * if this is non-zero then assume it is the address to get MAC from.
140 #if defined(CONFIG_NETtel)
141 #define FEC_FLASHMAC 0xf0006006
142 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
143 #define FEC_FLASHMAC 0xf0006000
144 #elif defined(CONFIG_CANCam)
145 #define FEC_FLASHMAC 0xf0020000
146 #elif defined (CONFIG_M5272C3)
147 #define FEC_FLASHMAC (0xffe04000 + 4)
148 #elif defined(CONFIG_MOD5272)
149 #define FEC_FLASHMAC 0xffc0406b
151 #define FEC_FLASHMAC 0
153 #endif /* CONFIG_M5272 */
155 #if (((RX_RING_SIZE + TX_RING_SIZE) * 32) > PAGE_SIZE)
156 #error "FEC: descriptor ring size constants too large"
159 /* Interrupt events/masks. */
160 #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
161 #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
162 #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
163 #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
164 #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
165 #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
166 #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
167 #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
168 #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
169 #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
171 #define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
172 #define FEC_RX_DISABLED_IMASK (FEC_DEFAULT_IMASK & (~FEC_ENET_RXF))
174 /* The FEC stores dest/src/type, data, and checksum for receive packets.
176 #define PKT_MAXBUF_SIZE 1518
177 #define PKT_MINBUF_SIZE 64
178 #define PKT_MAXBLR_SIZE 1520
181 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
182 * size bits. Other FEC hardware does not, so we need to take that into
183 * account when setting it.
185 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
186 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
187 #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
189 #define OPT_FRAME_SIZE 0
192 /* FEC MII MMFR bits definition */
193 #define FEC_MMFR_ST (1 << 30)
194 #define FEC_MMFR_OP_READ (2 << 28)
195 #define FEC_MMFR_OP_WRITE (1 << 28)
196 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
197 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
198 #define FEC_MMFR_TA (2 << 16)
199 #define FEC_MMFR_DATA(v) (v & 0xffff)
201 #define FEC_MII_TIMEOUT 30000 /* us */
203 /* Transmitter timeout */
204 #define TX_TIMEOUT (2 * HZ)
206 #define FEC_PAUSE_FLAG_AUTONEG 0x1
207 #define FEC_PAUSE_FLAG_ENABLE 0x2
211 static struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp, int is_ex)
213 struct bufdesc_ex *ex = (struct bufdesc_ex *)bdp;
215 return (struct bufdesc *)(ex + 1);
220 static struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp, int is_ex)
222 struct bufdesc_ex *ex = (struct bufdesc_ex *)bdp;
224 return (struct bufdesc *)(ex - 1);
229 static void *swap_buffer(void *bufaddr, int len)
232 unsigned int *buf = bufaddr;
234 for (i = 0; i < (len + 3) / 4; i++, buf++)
235 *buf = cpu_to_be32(*buf);
241 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
243 struct fec_enet_private *fep = netdev_priv(ndev);
244 const struct platform_device_id *id_entry =
245 platform_get_device_id(fep->pdev);
248 unsigned short status;
252 /* Link is down or autonegotiation is in progress. */
253 return NETDEV_TX_BUSY;
256 spin_lock_irqsave(&fep->hw_lock, flags);
257 /* Fill in a Tx ring entry */
260 status = bdp->cbd_sc;
262 if (status & BD_ENET_TX_READY) {
263 /* Ooops. All transmit buffers are full. Bail out.
264 * This should not happen, since ndev->tbusy should be set.
266 printk("%s: tx queue full!.\n", ndev->name);
267 spin_unlock_irqrestore(&fep->hw_lock, flags);
268 return NETDEV_TX_BUSY;
271 /* Clear all of the status flags */
272 status &= ~BD_ENET_TX_STATS;
274 /* Set buffer length and buffer pointer */
276 bdp->cbd_datlen = skb->len;
279 * On some FEC implementations data must be aligned on
280 * 4-byte boundaries. Use bounce buffers to copy data
281 * and get it aligned. Ugh.
283 if (((unsigned long) bufaddr) & FEC_ALIGNMENT) {
286 index = (struct bufdesc_ex *)bdp -
287 (struct bufdesc_ex *)fep->tx_bd_base;
289 index = bdp - fep->tx_bd_base;
290 memcpy(fep->tx_bounce[index], skb->data, skb->len);
291 bufaddr = fep->tx_bounce[index];
295 * Some design made an incorrect assumption on endian mode of
296 * the system that it's running on. As the result, driver has to
297 * swap every frame going to and coming from the controller.
299 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
300 swap_buffer(bufaddr, skb->len);
302 /* Save skb pointer */
303 fep->tx_skbuff[fep->skb_cur] = skb;
305 ndev->stats.tx_bytes += skb->len;
306 fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
308 /* Push the data cache so the CPM does not get stale memory
311 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, bufaddr,
312 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
314 /* Send it on its way. Tell FEC it's ready, interrupt when done,
315 * it's the last BD of the frame, and to put the CRC on the end.
317 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
318 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
319 bdp->cbd_sc = status;
321 if (fep->bufdesc_ex) {
323 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
325 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
327 ebdp->cbd_esc = (BD_ENET_TX_TS | BD_ENET_TX_INT);
328 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
331 ebdp->cbd_esc = BD_ENET_TX_INT;
334 /* Trigger transmission start */
335 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
337 /* If this was the last BD in the ring, start at the beginning again. */
338 if (status & BD_ENET_TX_WRAP)
339 bdp = fep->tx_bd_base;
341 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
343 if (bdp == fep->dirty_tx) {
345 netif_stop_queue(ndev);
350 skb_tx_timestamp(skb);
352 spin_unlock_irqrestore(&fep->hw_lock, flags);
357 /* This function is called to start or restart the FEC during a link
358 * change. This only happens when switching between half and full
362 fec_restart(struct net_device *ndev, int duplex)
364 struct fec_enet_private *fep = netdev_priv(ndev);
365 const struct platform_device_id *id_entry =
366 platform_get_device_id(fep->pdev);
369 u32 rcntl = OPT_FRAME_SIZE | 0x04;
370 u32 ecntl = 0x2; /* ETHEREN */
372 /* Whack a reset. We should wait for this. */
373 writel(1, fep->hwp + FEC_ECNTRL);
377 * enet-mac reset will reset mac address registers too,
378 * so need to reconfigure it.
380 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
381 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
382 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
383 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
386 /* Clear any outstanding interrupt. */
387 writel(0xffc00000, fep->hwp + FEC_IEVENT);
389 /* Reset all multicast. */
390 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
391 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
393 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
394 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
397 /* Set maximum receive buffer size. */
398 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
400 /* Set receive and transmit descriptor base. */
401 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
403 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc_ex)
404 * RX_RING_SIZE, fep->hwp + FEC_X_DES_START);
406 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc)
407 * RX_RING_SIZE, fep->hwp + FEC_X_DES_START);
409 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
410 fep->cur_rx = fep->rx_bd_base;
412 /* Reset SKB transmit buffers. */
413 fep->skb_cur = fep->skb_dirty = 0;
414 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
415 if (fep->tx_skbuff[i]) {
416 dev_kfree_skb_any(fep->tx_skbuff[i]);
417 fep->tx_skbuff[i] = NULL;
421 /* Enable MII mode */
424 writel(0x04, fep->hwp + FEC_X_CNTRL);
428 writel(0x0, fep->hwp + FEC_X_CNTRL);
431 fep->full_duplex = duplex;
434 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
437 * The phy interface and speed need to get configured
438 * differently on enet-mac.
440 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
441 /* Enable flow control and length check */
442 rcntl |= 0x40000000 | 0x00000020;
444 /* RGMII, RMII or MII */
445 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
447 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
452 /* 1G, 100M or 10M */
454 if (fep->phy_dev->speed == SPEED_1000)
456 else if (fep->phy_dev->speed == SPEED_100)
462 #ifdef FEC_MIIGSK_ENR
463 if (id_entry->driver_data & FEC_QUIRK_USE_GASKET) {
465 /* disable the gasket and wait */
466 writel(0, fep->hwp + FEC_MIIGSK_ENR);
467 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
471 * configure the gasket:
472 * RMII, 50 MHz, no loopback, no echo
473 * MII, 25 MHz, no loopback, no echo
475 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
476 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
477 if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
478 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
479 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
481 /* re-enable the gasket */
482 writel(2, fep->hwp + FEC_MIIGSK_ENR);
487 /* enable pause frame*/
488 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||
489 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&
490 fep->phy_dev && fep->phy_dev->pause)) {
491 rcntl |= FEC_ENET_FCE;
493 /* set FIFO thresh hold parameter to reduce overrun */
494 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
495 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
496 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
497 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
500 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
502 rcntl &= ~FEC_ENET_FCE;
505 writel(rcntl, fep->hwp + FEC_R_CNTRL);
507 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
508 /* enable ENET endian swap */
510 /* enable ENET store and forward mode */
511 writel(1 << 8, fep->hwp + FEC_X_WMRK);
517 /* And last, enable the transmit and receive processing */
518 writel(ecntl, fep->hwp + FEC_ECNTRL);
519 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
522 fec_ptp_start_cyclecounter(ndev);
524 /* Enable interrupts we wish to service */
525 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
529 fec_stop(struct net_device *ndev)
531 struct fec_enet_private *fep = netdev_priv(ndev);
532 const struct platform_device_id *id_entry =
533 platform_get_device_id(fep->pdev);
534 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
536 /* We cannot expect a graceful transmit stop without link !!! */
538 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
540 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
541 printk("fec_stop : Graceful transmit stop did not complete !\n");
544 /* Whack a reset. We should wait for this. */
545 writel(1, fep->hwp + FEC_ECNTRL);
547 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
548 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
550 /* We have to keep ENET enabled to have MII interrupt stay working */
551 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
552 writel(2, fep->hwp + FEC_ECNTRL);
553 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
559 fec_timeout(struct net_device *ndev)
561 struct fec_enet_private *fep = netdev_priv(ndev);
563 ndev->stats.tx_errors++;
565 fec_restart(ndev, fep->full_duplex);
566 netif_wake_queue(ndev);
570 fec_enet_tx(struct net_device *ndev)
572 struct fec_enet_private *fep;
574 unsigned short status;
577 fep = netdev_priv(ndev);
578 spin_lock(&fep->hw_lock);
581 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
582 if (bdp == fep->cur_tx && fep->tx_full == 0)
585 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
586 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
587 bdp->cbd_bufaddr = 0;
589 skb = fep->tx_skbuff[fep->skb_dirty];
590 /* Check for errors. */
591 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
592 BD_ENET_TX_RL | BD_ENET_TX_UN |
594 ndev->stats.tx_errors++;
595 if (status & BD_ENET_TX_HB) /* No heartbeat */
596 ndev->stats.tx_heartbeat_errors++;
597 if (status & BD_ENET_TX_LC) /* Late collision */
598 ndev->stats.tx_window_errors++;
599 if (status & BD_ENET_TX_RL) /* Retrans limit */
600 ndev->stats.tx_aborted_errors++;
601 if (status & BD_ENET_TX_UN) /* Underrun */
602 ndev->stats.tx_fifo_errors++;
603 if (status & BD_ENET_TX_CSL) /* Carrier lost */
604 ndev->stats.tx_carrier_errors++;
606 ndev->stats.tx_packets++;
609 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
611 struct skb_shared_hwtstamps shhwtstamps;
613 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
615 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
616 spin_lock_irqsave(&fep->tmreg_lock, flags);
617 shhwtstamps.hwtstamp = ns_to_ktime(
618 timecounter_cyc2time(&fep->tc, ebdp->ts));
619 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
620 skb_tstamp_tx(skb, &shhwtstamps);
623 if (status & BD_ENET_TX_READY)
624 printk("HEY! Enet xmit interrupt and TX_READY.\n");
626 /* Deferred means some collisions occurred during transmit,
627 * but we eventually sent the packet OK.
629 if (status & BD_ENET_TX_DEF)
630 ndev->stats.collisions++;
632 /* Free the sk buffer associated with this last transmit */
633 dev_kfree_skb_any(skb);
634 fep->tx_skbuff[fep->skb_dirty] = NULL;
635 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
637 /* Update pointer to next buffer descriptor to be transmitted */
638 if (status & BD_ENET_TX_WRAP)
639 bdp = fep->tx_bd_base;
641 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
643 /* Since we have freed up a buffer, the ring is no longer full
647 if (netif_queue_stopped(ndev))
648 netif_wake_queue(ndev);
652 spin_unlock(&fep->hw_lock);
656 /* During a receive, the cur_rx points to the current incoming buffer.
657 * When we update through the ring, if the next incoming buffer has
658 * not been given to the system, we just set the empty indicator,
659 * effectively tossing the packet.
662 fec_enet_rx(struct net_device *ndev, int budget)
664 struct fec_enet_private *fep = netdev_priv(ndev);
665 const struct platform_device_id *id_entry =
666 platform_get_device_id(fep->pdev);
668 unsigned short status;
672 int pkt_received = 0;
678 /* First, grab all of the stats for the incoming packet.
679 * These get messed up if we get called due to a busy condition.
683 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
685 if (pkt_received >= budget)
689 /* Since we have allocated space to hold a complete frame,
690 * the last indicator should be set.
692 if ((status & BD_ENET_RX_LAST) == 0)
693 printk("FEC ENET: rcv is not +last\n");
696 goto rx_processing_done;
698 /* Check for errors. */
699 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
700 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
701 ndev->stats.rx_errors++;
702 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
703 /* Frame too long or too short. */
704 ndev->stats.rx_length_errors++;
706 if (status & BD_ENET_RX_NO) /* Frame alignment */
707 ndev->stats.rx_frame_errors++;
708 if (status & BD_ENET_RX_CR) /* CRC Error */
709 ndev->stats.rx_crc_errors++;
710 if (status & BD_ENET_RX_OV) /* FIFO overrun */
711 ndev->stats.rx_fifo_errors++;
714 /* Report late collisions as a frame error.
715 * On this error, the BD is closed, but we don't know what we
716 * have in the buffer. So, just drop this frame on the floor.
718 if (status & BD_ENET_RX_CL) {
719 ndev->stats.rx_errors++;
720 ndev->stats.rx_frame_errors++;
721 goto rx_processing_done;
724 /* Process the incoming frame. */
725 ndev->stats.rx_packets++;
726 pkt_len = bdp->cbd_datlen;
727 ndev->stats.rx_bytes += pkt_len;
728 data = (__u8*)__va(bdp->cbd_bufaddr);
730 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
731 FEC_ENET_TX_FRSIZE, DMA_FROM_DEVICE);
733 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
734 swap_buffer(data, pkt_len);
736 /* This does 16 byte alignment, exactly what we need.
737 * The packet length includes FCS, but we don't want to
738 * include that when passing upstream as it messes up
739 * bridging applications.
741 skb = netdev_alloc_skb(ndev, pkt_len - 4 + NET_IP_ALIGN);
743 if (unlikely(!skb)) {
744 printk("%s: Memory squeeze, dropping packet.\n",
746 ndev->stats.rx_dropped++;
748 skb_reserve(skb, NET_IP_ALIGN);
749 skb_put(skb, pkt_len - 4); /* Make room */
750 skb_copy_to_linear_data(skb, data, pkt_len - 4);
751 skb->protocol = eth_type_trans(skb, ndev);
753 /* Get receive timestamp from the skb */
754 if (fep->hwts_rx_en && fep->bufdesc_ex) {
755 struct skb_shared_hwtstamps *shhwtstamps =
758 struct bufdesc_ex *ebdp =
759 (struct bufdesc_ex *)bdp;
761 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
763 spin_lock_irqsave(&fep->tmreg_lock, flags);
764 shhwtstamps->hwtstamp = ns_to_ktime(
765 timecounter_cyc2time(&fep->tc, ebdp->ts));
766 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
769 if (!skb_defer_rx_timestamp(skb))
770 napi_gro_receive(&fep->napi, skb);
773 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, data,
774 FEC_ENET_TX_FRSIZE, DMA_FROM_DEVICE);
776 /* Clear the status flags for this buffer */
777 status &= ~BD_ENET_RX_STATS;
779 /* Mark the buffer empty */
780 status |= BD_ENET_RX_EMPTY;
781 bdp->cbd_sc = status;
783 if (fep->bufdesc_ex) {
784 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
786 ebdp->cbd_esc = BD_ENET_RX_INT;
791 /* Update BD pointer to next entry */
792 if (status & BD_ENET_RX_WRAP)
793 bdp = fep->rx_bd_base;
795 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
796 /* Doing this here will keep the FEC running while we process
797 * incoming frames. On a heavily loaded network, we should be
798 * able to keep up at the expense of system resources.
800 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
808 fec_enet_interrupt(int irq, void *dev_id)
810 struct net_device *ndev = dev_id;
811 struct fec_enet_private *fep = netdev_priv(ndev);
813 irqreturn_t ret = IRQ_NONE;
816 int_events = readl(fep->hwp + FEC_IEVENT);
817 writel(int_events, fep->hwp + FEC_IEVENT);
819 if (int_events & FEC_ENET_RXF) {
822 /* Disable the RX interrupt */
823 if (napi_schedule_prep(&fep->napi)) {
824 writel(FEC_RX_DISABLED_IMASK,
825 fep->hwp + FEC_IMASK);
826 __napi_schedule(&fep->napi);
830 /* Transmit OK, or non-fatal error. Update the buffer
831 * descriptors. FEC handles all errors, we just discover
832 * them as part of the transmit process.
834 if (int_events & FEC_ENET_TXF) {
839 if (int_events & FEC_ENET_MII) {
841 complete(&fep->mdio_done);
843 } while (int_events);
848 static int fec_enet_rx_napi(struct napi_struct *napi, int budget)
850 struct net_device *ndev = napi->dev;
851 int pkts = fec_enet_rx(ndev, budget);
852 struct fec_enet_private *fep = netdev_priv(ndev);
856 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
861 /* ------------------------------------------------------------------------- */
862 static void fec_get_mac(struct net_device *ndev)
864 struct fec_enet_private *fep = netdev_priv(ndev);
865 struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
866 unsigned char *iap, tmpaddr[ETH_ALEN];
869 * try to get mac address in following order:
871 * 1) module parameter via kernel command line in form
872 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
878 * 2) from device tree data
880 if (!is_valid_ether_addr(iap)) {
881 struct device_node *np = fep->pdev->dev.of_node;
883 const char *mac = of_get_mac_address(np);
885 iap = (unsigned char *) mac;
891 * 3) from flash or fuse (via platform data)
893 if (!is_valid_ether_addr(iap)) {
896 iap = (unsigned char *)FEC_FLASHMAC;
899 iap = (unsigned char *)&pdata->mac;
904 * 4) FEC mac registers set by bootloader
906 if (!is_valid_ether_addr(iap)) {
907 *((unsigned long *) &tmpaddr[0]) =
908 be32_to_cpu(readl(fep->hwp + FEC_ADDR_LOW));
909 *((unsigned short *) &tmpaddr[4]) =
910 be16_to_cpu(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
914 memcpy(ndev->dev_addr, iap, ETH_ALEN);
916 /* Adjust MAC if using macaddr */
918 ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
921 /* ------------------------------------------------------------------------- */
926 static void fec_enet_adjust_link(struct net_device *ndev)
928 struct fec_enet_private *fep = netdev_priv(ndev);
929 struct phy_device *phy_dev = fep->phy_dev;
932 int status_change = 0;
934 spin_lock_irqsave(&fep->hw_lock, flags);
936 /* Prevent a state halted on mii error */
937 if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
938 phy_dev->state = PHY_RESUMING;
942 /* Duplex link change */
944 if (fep->full_duplex != phy_dev->duplex) {
945 fec_restart(ndev, phy_dev->duplex);
946 /* prevent unnecessary second fec_restart() below */
947 fep->link = phy_dev->link;
952 /* Link on or off change */
953 if (phy_dev->link != fep->link) {
954 fep->link = phy_dev->link;
956 fec_restart(ndev, phy_dev->duplex);
963 spin_unlock_irqrestore(&fep->hw_lock, flags);
966 phy_print_status(phy_dev);
969 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
971 struct fec_enet_private *fep = bus->priv;
972 unsigned long time_left;
974 fep->mii_timeout = 0;
975 init_completion(&fep->mdio_done);
977 /* start a read op */
978 writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
979 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
980 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
982 /* wait for end of transfer */
983 time_left = wait_for_completion_timeout(&fep->mdio_done,
984 usecs_to_jiffies(FEC_MII_TIMEOUT));
985 if (time_left == 0) {
986 fep->mii_timeout = 1;
987 printk(KERN_ERR "FEC: MDIO read timeout\n");
992 return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
995 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
998 struct fec_enet_private *fep = bus->priv;
999 unsigned long time_left;
1001 fep->mii_timeout = 0;
1002 init_completion(&fep->mdio_done);
1004 /* start a write op */
1005 writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1006 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1007 FEC_MMFR_TA | FEC_MMFR_DATA(value),
1008 fep->hwp + FEC_MII_DATA);
1010 /* wait for end of transfer */
1011 time_left = wait_for_completion_timeout(&fep->mdio_done,
1012 usecs_to_jiffies(FEC_MII_TIMEOUT));
1013 if (time_left == 0) {
1014 fep->mii_timeout = 1;
1015 printk(KERN_ERR "FEC: MDIO write timeout\n");
1022 static int fec_enet_mdio_reset(struct mii_bus *bus)
1027 static int fec_enet_mii_probe(struct net_device *ndev)
1029 struct fec_enet_private *fep = netdev_priv(ndev);
1030 const struct platform_device_id *id_entry =
1031 platform_get_device_id(fep->pdev);
1032 struct phy_device *phy_dev = NULL;
1033 char mdio_bus_id[MII_BUS_ID_SIZE];
1034 char phy_name[MII_BUS_ID_SIZE + 3];
1036 int dev_id = fep->dev_id;
1038 fep->phy_dev = NULL;
1040 /* check for attached phy */
1041 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
1042 if ((fep->mii_bus->phy_mask & (1 << phy_id)))
1044 if (fep->mii_bus->phy_map[phy_id] == NULL)
1046 if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
1050 strncpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1054 if (phy_id >= PHY_MAX_ADDR) {
1056 "%s: no PHY, assuming direct connection to switch\n",
1058 strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1062 snprintf(phy_name, sizeof(phy_name), PHY_ID_FMT, mdio_bus_id, phy_id);
1063 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link,
1064 fep->phy_interface);
1065 if (IS_ERR(phy_dev)) {
1066 printk(KERN_ERR "%s: could not attach to PHY\n", ndev->name);
1067 return PTR_ERR(phy_dev);
1070 /* mask with MAC supported features */
1071 if (id_entry->driver_data & FEC_QUIRK_HAS_GBIT) {
1072 phy_dev->supported &= PHY_GBIT_FEATURES;
1073 phy_dev->supported |= SUPPORTED_Pause;
1076 phy_dev->supported &= PHY_BASIC_FEATURES;
1078 phy_dev->advertising = phy_dev->supported;
1080 fep->phy_dev = phy_dev;
1082 fep->full_duplex = 0;
1085 "%s: Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1087 fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1093 static int fec_enet_mii_init(struct platform_device *pdev)
1095 static struct mii_bus *fec0_mii_bus;
1096 struct net_device *ndev = platform_get_drvdata(pdev);
1097 struct fec_enet_private *fep = netdev_priv(ndev);
1098 const struct platform_device_id *id_entry =
1099 platform_get_device_id(fep->pdev);
1100 int err = -ENXIO, i;
1103 * The dual fec interfaces are not equivalent with enet-mac.
1104 * Here are the differences:
1106 * - fec0 supports MII & RMII modes while fec1 only supports RMII
1107 * - fec0 acts as the 1588 time master while fec1 is slave
1108 * - external phys can only be configured by fec0
1110 * That is to say fec1 can not work independently. It only works
1111 * when fec0 is working. The reason behind this design is that the
1112 * second interface is added primarily for Switch mode.
1114 * Because of the last point above, both phys are attached on fec0
1115 * mdio interface in board design, and need to be configured by
1118 if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
1119 /* fec1 uses fec0 mii_bus */
1120 if (mii_cnt && fec0_mii_bus) {
1121 fep->mii_bus = fec0_mii_bus;
1128 fep->mii_timeout = 0;
1131 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
1133 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
1134 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
1135 * Reference Manual has an error on this, and gets fixed on i.MX6Q
1138 fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ahb), 5000000);
1139 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1141 fep->phy_speed <<= 1;
1142 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1144 fep->mii_bus = mdiobus_alloc();
1145 if (fep->mii_bus == NULL) {
1150 fep->mii_bus->name = "fec_enet_mii_bus";
1151 fep->mii_bus->read = fec_enet_mdio_read;
1152 fep->mii_bus->write = fec_enet_mdio_write;
1153 fep->mii_bus->reset = fec_enet_mdio_reset;
1154 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1155 pdev->name, fep->dev_id + 1);
1156 fep->mii_bus->priv = fep;
1157 fep->mii_bus->parent = &pdev->dev;
1159 fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
1160 if (!fep->mii_bus->irq) {
1162 goto err_out_free_mdiobus;
1165 for (i = 0; i < PHY_MAX_ADDR; i++)
1166 fep->mii_bus->irq[i] = PHY_POLL;
1168 if (mdiobus_register(fep->mii_bus))
1169 goto err_out_free_mdio_irq;
1173 /* save fec0 mii_bus */
1174 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1175 fec0_mii_bus = fep->mii_bus;
1179 err_out_free_mdio_irq:
1180 kfree(fep->mii_bus->irq);
1181 err_out_free_mdiobus:
1182 mdiobus_free(fep->mii_bus);
1187 static void fec_enet_mii_remove(struct fec_enet_private *fep)
1189 if (--mii_cnt == 0) {
1190 mdiobus_unregister(fep->mii_bus);
1191 kfree(fep->mii_bus->irq);
1192 mdiobus_free(fep->mii_bus);
1196 static int fec_enet_get_settings(struct net_device *ndev,
1197 struct ethtool_cmd *cmd)
1199 struct fec_enet_private *fep = netdev_priv(ndev);
1200 struct phy_device *phydev = fep->phy_dev;
1205 return phy_ethtool_gset(phydev, cmd);
1208 static int fec_enet_set_settings(struct net_device *ndev,
1209 struct ethtool_cmd *cmd)
1211 struct fec_enet_private *fep = netdev_priv(ndev);
1212 struct phy_device *phydev = fep->phy_dev;
1217 return phy_ethtool_sset(phydev, cmd);
1220 static void fec_enet_get_drvinfo(struct net_device *ndev,
1221 struct ethtool_drvinfo *info)
1223 struct fec_enet_private *fep = netdev_priv(ndev);
1225 strlcpy(info->driver, fep->pdev->dev.driver->name,
1226 sizeof(info->driver));
1227 strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
1228 strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
1231 static int fec_enet_get_ts_info(struct net_device *ndev,
1232 struct ethtool_ts_info *info)
1234 struct fec_enet_private *fep = netdev_priv(ndev);
1236 if (fep->bufdesc_ex) {
1238 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1239 SOF_TIMESTAMPING_RX_SOFTWARE |
1240 SOF_TIMESTAMPING_SOFTWARE |
1241 SOF_TIMESTAMPING_TX_HARDWARE |
1242 SOF_TIMESTAMPING_RX_HARDWARE |
1243 SOF_TIMESTAMPING_RAW_HARDWARE;
1245 info->phc_index = ptp_clock_index(fep->ptp_clock);
1247 info->phc_index = -1;
1249 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1250 (1 << HWTSTAMP_TX_ON);
1252 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1253 (1 << HWTSTAMP_FILTER_ALL);
1256 return ethtool_op_get_ts_info(ndev, info);
1260 static void fec_enet_get_pauseparam(struct net_device *ndev,
1261 struct ethtool_pauseparam *pause)
1263 struct fec_enet_private *fep = netdev_priv(ndev);
1265 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0;
1266 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0;
1267 pause->rx_pause = pause->tx_pause;
1270 static int fec_enet_set_pauseparam(struct net_device *ndev,
1271 struct ethtool_pauseparam *pause)
1273 struct fec_enet_private *fep = netdev_priv(ndev);
1275 if (pause->tx_pause != pause->rx_pause) {
1277 "hardware only support enable/disable both tx and rx");
1281 fep->pause_flag = 0;
1283 /* tx pause must be same as rx pause */
1284 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
1285 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
1287 if (pause->rx_pause || pause->autoneg) {
1288 fep->phy_dev->supported |= ADVERTISED_Pause;
1289 fep->phy_dev->advertising |= ADVERTISED_Pause;
1291 fep->phy_dev->supported &= ~ADVERTISED_Pause;
1292 fep->phy_dev->advertising &= ~ADVERTISED_Pause;
1295 if (pause->autoneg) {
1296 if (netif_running(ndev))
1298 phy_start_aneg(fep->phy_dev);
1300 if (netif_running(ndev))
1301 fec_restart(ndev, 0);
1306 static const struct ethtool_ops fec_enet_ethtool_ops = {
1307 .get_pauseparam = fec_enet_get_pauseparam,
1308 .set_pauseparam = fec_enet_set_pauseparam,
1309 .get_settings = fec_enet_get_settings,
1310 .set_settings = fec_enet_set_settings,
1311 .get_drvinfo = fec_enet_get_drvinfo,
1312 .get_link = ethtool_op_get_link,
1313 .get_ts_info = fec_enet_get_ts_info,
1316 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
1318 struct fec_enet_private *fep = netdev_priv(ndev);
1319 struct phy_device *phydev = fep->phy_dev;
1321 if (!netif_running(ndev))
1327 if (cmd == SIOCSHWTSTAMP && fep->bufdesc_ex)
1328 return fec_ptp_ioctl(ndev, rq, cmd);
1330 return phy_mii_ioctl(phydev, rq, cmd);
1333 static void fec_enet_free_buffers(struct net_device *ndev)
1335 struct fec_enet_private *fep = netdev_priv(ndev);
1337 struct sk_buff *skb;
1338 struct bufdesc *bdp;
1340 bdp = fep->rx_bd_base;
1341 for (i = 0; i < RX_RING_SIZE; i++) {
1342 skb = fep->rx_skbuff[i];
1344 if (bdp->cbd_bufaddr)
1345 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1346 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1349 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1352 bdp = fep->tx_bd_base;
1353 for (i = 0; i < TX_RING_SIZE; i++)
1354 kfree(fep->tx_bounce[i]);
1357 static int fec_enet_alloc_buffers(struct net_device *ndev)
1359 struct fec_enet_private *fep = netdev_priv(ndev);
1361 struct sk_buff *skb;
1362 struct bufdesc *bdp;
1364 bdp = fep->rx_bd_base;
1365 for (i = 0; i < RX_RING_SIZE; i++) {
1366 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
1368 fec_enet_free_buffers(ndev);
1371 fep->rx_skbuff[i] = skb;
1373 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
1374 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1375 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1377 if (fep->bufdesc_ex) {
1378 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1379 ebdp->cbd_esc = BD_ENET_RX_INT;
1382 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1385 /* Set the last buffer to wrap. */
1386 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1387 bdp->cbd_sc |= BD_SC_WRAP;
1389 bdp = fep->tx_bd_base;
1390 for (i = 0; i < TX_RING_SIZE; i++) {
1391 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
1394 bdp->cbd_bufaddr = 0;
1396 if (fep->bufdesc_ex) {
1397 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1398 ebdp->cbd_esc = BD_ENET_RX_INT;
1401 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1404 /* Set the last buffer to wrap. */
1405 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1406 bdp->cbd_sc |= BD_SC_WRAP;
1412 fec_enet_open(struct net_device *ndev)
1414 struct fec_enet_private *fep = netdev_priv(ndev);
1417 napi_enable(&fep->napi);
1419 /* I should reset the ring buffers here, but I don't yet know
1420 * a simple way to do that.
1423 ret = fec_enet_alloc_buffers(ndev);
1427 /* Probe and connect to PHY when open the interface */
1428 ret = fec_enet_mii_probe(ndev);
1430 fec_enet_free_buffers(ndev);
1433 phy_start(fep->phy_dev);
1434 netif_start_queue(ndev);
1440 fec_enet_close(struct net_device *ndev)
1442 struct fec_enet_private *fep = netdev_priv(ndev);
1444 /* Don't know what to do yet. */
1446 netif_stop_queue(ndev);
1450 phy_stop(fep->phy_dev);
1451 phy_disconnect(fep->phy_dev);
1454 fec_enet_free_buffers(ndev);
1459 /* Set or clear the multicast filter for this adaptor.
1460 * Skeleton taken from sunlance driver.
1461 * The CPM Ethernet implementation allows Multicast as well as individual
1462 * MAC address filtering. Some of the drivers check to make sure it is
1463 * a group multicast address, and discard those that are not. I guess I
1464 * will do the same for now, but just remove the test if you want
1465 * individual filtering as well (do the upper net layers want or support
1466 * this kind of feature?).
1469 #define HASH_BITS 6 /* #bits in hash */
1470 #define CRC32_POLY 0xEDB88320
1472 static void set_multicast_list(struct net_device *ndev)
1474 struct fec_enet_private *fep = netdev_priv(ndev);
1475 struct netdev_hw_addr *ha;
1476 unsigned int i, bit, data, crc, tmp;
1479 if (ndev->flags & IFF_PROMISC) {
1480 tmp = readl(fep->hwp + FEC_R_CNTRL);
1482 writel(tmp, fep->hwp + FEC_R_CNTRL);
1486 tmp = readl(fep->hwp + FEC_R_CNTRL);
1488 writel(tmp, fep->hwp + FEC_R_CNTRL);
1490 if (ndev->flags & IFF_ALLMULTI) {
1491 /* Catch all multicast addresses, so set the
1494 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1495 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1500 /* Clear filter and add the addresses in hash register
1502 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1503 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1505 netdev_for_each_mc_addr(ha, ndev) {
1506 /* calculate crc32 value of mac address */
1509 for (i = 0; i < ndev->addr_len; i++) {
1511 for (bit = 0; bit < 8; bit++, data >>= 1) {
1513 (((crc ^ data) & 1) ? CRC32_POLY : 0);
1517 /* only upper 6 bits (HASH_BITS) are used
1518 * which point to specific bit in he hash registers
1520 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1523 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1524 tmp |= 1 << (hash - 32);
1525 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1527 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1529 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1534 /* Set a MAC change in hardware. */
1536 fec_set_mac_address(struct net_device *ndev, void *p)
1538 struct fec_enet_private *fep = netdev_priv(ndev);
1539 struct sockaddr *addr = p;
1541 if (!is_valid_ether_addr(addr->sa_data))
1542 return -EADDRNOTAVAIL;
1544 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
1546 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
1547 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
1548 fep->hwp + FEC_ADDR_LOW);
1549 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
1550 fep->hwp + FEC_ADDR_HIGH);
1554 #ifdef CONFIG_NET_POLL_CONTROLLER
1556 * fec_poll_controller - FEC Poll controller function
1557 * @dev: The FEC network adapter
1559 * Polled functionality used by netconsole and others in non interrupt mode
1562 void fec_poll_controller(struct net_device *dev)
1565 struct fec_enet_private *fep = netdev_priv(dev);
1567 for (i = 0; i < FEC_IRQ_NUM; i++) {
1568 if (fep->irq[i] > 0) {
1569 disable_irq(fep->irq[i]);
1570 fec_enet_interrupt(fep->irq[i], dev);
1571 enable_irq(fep->irq[i]);
1577 static const struct net_device_ops fec_netdev_ops = {
1578 .ndo_open = fec_enet_open,
1579 .ndo_stop = fec_enet_close,
1580 .ndo_start_xmit = fec_enet_start_xmit,
1581 .ndo_set_rx_mode = set_multicast_list,
1582 .ndo_change_mtu = eth_change_mtu,
1583 .ndo_validate_addr = eth_validate_addr,
1584 .ndo_tx_timeout = fec_timeout,
1585 .ndo_set_mac_address = fec_set_mac_address,
1586 .ndo_do_ioctl = fec_enet_ioctl,
1587 #ifdef CONFIG_NET_POLL_CONTROLLER
1588 .ndo_poll_controller = fec_poll_controller,
1593 * XXX: We need to clean up on failure exits here.
1596 static int fec_enet_init(struct net_device *ndev)
1598 struct fec_enet_private *fep = netdev_priv(ndev);
1599 struct bufdesc *cbd_base;
1600 struct bufdesc *bdp;
1603 /* Allocate memory for buffer descriptors. */
1604 cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma,
1607 printk("FEC: allocate descriptor memory failed?\n");
1611 spin_lock_init(&fep->hw_lock);
1615 /* Get the Ethernet address */
1618 /* Set receive and transmit descriptor base. */
1619 fep->rx_bd_base = cbd_base;
1620 if (fep->bufdesc_ex)
1621 fep->tx_bd_base = (struct bufdesc *)
1622 (((struct bufdesc_ex *)cbd_base) + RX_RING_SIZE);
1624 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1626 /* The FEC Ethernet specific entries in the device structure */
1627 ndev->watchdog_timeo = TX_TIMEOUT;
1628 ndev->netdev_ops = &fec_netdev_ops;
1629 ndev->ethtool_ops = &fec_enet_ethtool_ops;
1631 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
1632 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, FEC_NAPI_WEIGHT);
1634 /* Initialize the receive buffer descriptors. */
1635 bdp = fep->rx_bd_base;
1636 for (i = 0; i < RX_RING_SIZE; i++) {
1638 /* Initialize the BD for every fragment in the page. */
1640 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1643 /* Set the last buffer to wrap */
1644 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1645 bdp->cbd_sc |= BD_SC_WRAP;
1647 /* ...and the same for transmit */
1648 bdp = fep->tx_bd_base;
1649 for (i = 0; i < TX_RING_SIZE; i++) {
1651 /* Initialize the BD for every fragment in the page. */
1653 bdp->cbd_bufaddr = 0;
1654 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1657 /* Set the last buffer to wrap */
1658 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1659 bdp->cbd_sc |= BD_SC_WRAP;
1661 fec_restart(ndev, 0);
1667 static int fec_get_phy_mode_dt(struct platform_device *pdev)
1669 struct device_node *np = pdev->dev.of_node;
1672 return of_get_phy_mode(np);
1677 static void fec_reset_phy(struct platform_device *pdev)
1681 struct device_node *np = pdev->dev.of_node;
1686 of_property_read_u32(np, "phy-reset-duration", &msec);
1687 /* A sane reset duration should not be longer than 1s */
1691 phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0);
1692 if (!gpio_is_valid(phy_reset))
1695 err = devm_gpio_request_one(&pdev->dev, phy_reset,
1696 GPIOF_OUT_INIT_LOW, "phy-reset");
1698 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err);
1702 gpio_set_value(phy_reset, 1);
1704 #else /* CONFIG_OF */
1705 static int fec_get_phy_mode_dt(struct platform_device *pdev)
1710 static void fec_reset_phy(struct platform_device *pdev)
1713 * In case of platform probe, the reset has been done
1717 #endif /* CONFIG_OF */
1720 fec_probe(struct platform_device *pdev)
1722 struct fec_enet_private *fep;
1723 struct fec_platform_data *pdata;
1724 struct net_device *ndev;
1725 int i, irq, ret = 0;
1727 const struct of_device_id *of_id;
1729 struct pinctrl *pinctrl;
1730 struct regulator *reg_phy;
1732 of_id = of_match_device(fec_dt_ids, &pdev->dev);
1734 pdev->id_entry = of_id->data;
1736 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1740 r = request_mem_region(r->start, resource_size(r), pdev->name);
1744 /* Init network device */
1745 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
1748 goto failed_alloc_etherdev;
1751 SET_NETDEV_DEV(ndev, &pdev->dev);
1753 /* setup board info structure */
1754 fep = netdev_priv(ndev);
1756 /* default enable pause frame auto negotiation */
1757 if (pdev->id_entry &&
1758 (pdev->id_entry->driver_data & FEC_QUIRK_HAS_GBIT))
1759 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG;
1761 fep->hwp = ioremap(r->start, resource_size(r));
1763 fep->dev_id = dev_id++;
1765 fep->bufdesc_ex = 0;
1769 goto failed_ioremap;
1772 platform_set_drvdata(pdev, ndev);
1774 ret = fec_get_phy_mode_dt(pdev);
1776 pdata = pdev->dev.platform_data;
1778 fep->phy_interface = pdata->phy;
1780 fep->phy_interface = PHY_INTERFACE_MODE_MII;
1782 fep->phy_interface = ret;
1785 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1786 if (IS_ERR(pinctrl)) {
1787 ret = PTR_ERR(pinctrl);
1791 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1792 if (IS_ERR(fep->clk_ipg)) {
1793 ret = PTR_ERR(fep->clk_ipg);
1797 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1798 if (IS_ERR(fep->clk_ahb)) {
1799 ret = PTR_ERR(fep->clk_ahb);
1803 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
1805 pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX;
1806 if (IS_ERR(fep->clk_ptp)) {
1807 ret = PTR_ERR(fep->clk_ptp);
1808 fep->bufdesc_ex = 0;
1811 clk_prepare_enable(fep->clk_ahb);
1812 clk_prepare_enable(fep->clk_ipg);
1813 if (!IS_ERR(fep->clk_ptp))
1814 clk_prepare_enable(fep->clk_ptp);
1816 reg_phy = devm_regulator_get(&pdev->dev, "phy");
1817 if (!IS_ERR(reg_phy)) {
1818 ret = regulator_enable(reg_phy);
1821 "Failed to enable phy regulator: %d\n", ret);
1822 goto failed_regulator;
1826 fec_reset_phy(pdev);
1828 if (fep->bufdesc_ex)
1829 fec_ptp_init(ndev, pdev);
1831 ret = fec_enet_init(ndev);
1835 for (i = 0; i < FEC_IRQ_NUM; i++) {
1836 irq = platform_get_irq(pdev, i);
1843 ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev);
1846 irq = platform_get_irq(pdev, i);
1847 free_irq(irq, ndev);
1853 ret = fec_enet_mii_init(pdev);
1855 goto failed_mii_init;
1857 /* Carrier starts down, phylib will bring it up */
1858 netif_carrier_off(ndev);
1860 ret = register_netdev(ndev);
1862 goto failed_register;
1867 fec_enet_mii_remove(fep);
1870 for (i = 0; i < FEC_IRQ_NUM; i++) {
1871 irq = platform_get_irq(pdev, i);
1873 free_irq(irq, ndev);
1877 clk_disable_unprepare(fep->clk_ahb);
1878 clk_disable_unprepare(fep->clk_ipg);
1879 if (!IS_ERR(fep->clk_ptp))
1880 clk_disable_unprepare(fep->clk_ptp);
1886 failed_alloc_etherdev:
1887 release_mem_region(r->start, resource_size(r));
1893 fec_drv_remove(struct platform_device *pdev)
1895 struct net_device *ndev = platform_get_drvdata(pdev);
1896 struct fec_enet_private *fep = netdev_priv(ndev);
1900 unregister_netdev(ndev);
1901 fec_enet_mii_remove(fep);
1902 del_timer_sync(&fep->time_keep);
1903 clk_disable_unprepare(fep->clk_ptp);
1905 ptp_clock_unregister(fep->ptp_clock);
1906 clk_disable_unprepare(fep->clk_ahb);
1907 clk_disable_unprepare(fep->clk_ipg);
1908 for (i = 0; i < FEC_IRQ_NUM; i++) {
1909 int irq = platform_get_irq(pdev, i);
1911 free_irq(irq, ndev);
1916 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1918 release_mem_region(r->start, resource_size(r));
1920 platform_set_drvdata(pdev, NULL);
1927 fec_suspend(struct device *dev)
1929 struct net_device *ndev = dev_get_drvdata(dev);
1930 struct fec_enet_private *fep = netdev_priv(ndev);
1932 if (netif_running(ndev)) {
1934 netif_device_detach(ndev);
1936 clk_disable_unprepare(fep->clk_ahb);
1937 clk_disable_unprepare(fep->clk_ipg);
1943 fec_resume(struct device *dev)
1945 struct net_device *ndev = dev_get_drvdata(dev);
1946 struct fec_enet_private *fep = netdev_priv(ndev);
1948 clk_prepare_enable(fep->clk_ahb);
1949 clk_prepare_enable(fep->clk_ipg);
1950 if (netif_running(ndev)) {
1951 fec_restart(ndev, fep->full_duplex);
1952 netif_device_attach(ndev);
1958 static const struct dev_pm_ops fec_pm_ops = {
1959 .suspend = fec_suspend,
1960 .resume = fec_resume,
1961 .freeze = fec_suspend,
1963 .poweroff = fec_suspend,
1964 .restore = fec_resume,
1968 static struct platform_driver fec_driver = {
1970 .name = DRIVER_NAME,
1971 .owner = THIS_MODULE,
1975 .of_match_table = fec_dt_ids,
1977 .id_table = fec_devtype,
1979 .remove = fec_drv_remove,
1982 module_platform_driver(fec_driver);
1984 MODULE_LICENSE("GPL");