2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 * Right now, I am very wasteful with the buffers. I allocate memory
6 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
15 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
19 * Copyright (c) 2004-2006 Macq Electronique SA.
21 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/pci.h>
33 #include <linux/init.h>
34 #include <linux/delay.h>
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38 #include <linux/spinlock.h>
39 #include <linux/workqueue.h>
40 #include <linux/bitops.h>
42 #include <linux/irq.h>
43 #include <linux/clk.h>
44 #include <linux/platform_device.h>
45 #include <linux/phy.h>
46 #include <linux/fec.h>
48 #include <linux/of_device.h>
49 #include <linux/of_gpio.h>
50 #include <linux/of_net.h>
51 #include <linux/pinctrl/consumer.h>
52 #include <linux/regulator/consumer.h>
54 #include <asm/cacheflush.h>
57 #include <asm/coldfire.h>
58 #include <asm/mcfsim.h>
63 #if defined(CONFIG_ARM)
64 #define FEC_ALIGNMENT 0xf
66 #define FEC_ALIGNMENT 0x3
69 #define DRIVER_NAME "fec"
71 /* Controller is ENET-MAC */
72 #define FEC_QUIRK_ENET_MAC (1 << 0)
73 /* Controller needs driver to swap frame */
74 #define FEC_QUIRK_SWAP_FRAME (1 << 1)
75 /* Controller uses gasket */
76 #define FEC_QUIRK_USE_GASKET (1 << 2)
77 /* Controller has GBIT support */
78 #define FEC_QUIRK_HAS_GBIT (1 << 3)
79 /* Controller has extend desc buffer */
80 #define FEC_QUIRK_HAS_BUFDESC_EX (1 << 4)
82 static struct platform_device_id fec_devtype[] = {
84 /* keep it for coldfire */
89 .driver_data = FEC_QUIRK_USE_GASKET,
95 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
98 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
99 FEC_QUIRK_HAS_BUFDESC_EX,
104 MODULE_DEVICE_TABLE(platform, fec_devtype);
107 IMX25_FEC = 1, /* runs on i.mx25/50/53 */
108 IMX27_FEC, /* runs on i.mx27/35/51 */
113 static const struct of_device_id fec_dt_ids[] = {
114 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
115 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
116 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
117 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
120 MODULE_DEVICE_TABLE(of, fec_dt_ids);
122 static unsigned char macaddr[ETH_ALEN];
123 module_param_array(macaddr, byte, NULL, 0);
124 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
126 #if defined(CONFIG_M5272)
128 * Some hardware gets it MAC address out of local flash memory.
129 * if this is non-zero then assume it is the address to get MAC from.
131 #if defined(CONFIG_NETtel)
132 #define FEC_FLASHMAC 0xf0006006
133 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
134 #define FEC_FLASHMAC 0xf0006000
135 #elif defined(CONFIG_CANCam)
136 #define FEC_FLASHMAC 0xf0020000
137 #elif defined (CONFIG_M5272C3)
138 #define FEC_FLASHMAC (0xffe04000 + 4)
139 #elif defined(CONFIG_MOD5272)
140 #define FEC_FLASHMAC 0xffc0406b
142 #define FEC_FLASHMAC 0
144 #endif /* CONFIG_M5272 */
146 #if (((RX_RING_SIZE + TX_RING_SIZE) * 32) > PAGE_SIZE)
147 #error "FEC: descriptor ring size constants too large"
150 /* Interrupt events/masks. */
151 #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
152 #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
153 #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
154 #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
155 #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
156 #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
157 #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
158 #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
159 #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
160 #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
162 #define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
164 /* The FEC stores dest/src/type, data, and checksum for receive packets.
166 #define PKT_MAXBUF_SIZE 1518
167 #define PKT_MINBUF_SIZE 64
168 #define PKT_MAXBLR_SIZE 1520
171 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
172 * size bits. Other FEC hardware does not, so we need to take that into
173 * account when setting it.
175 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
176 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
177 #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
179 #define OPT_FRAME_SIZE 0
182 /* FEC MII MMFR bits definition */
183 #define FEC_MMFR_ST (1 << 30)
184 #define FEC_MMFR_OP_READ (2 << 28)
185 #define FEC_MMFR_OP_WRITE (1 << 28)
186 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
187 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
188 #define FEC_MMFR_TA (2 << 16)
189 #define FEC_MMFR_DATA(v) (v & 0xffff)
191 #define FEC_MII_TIMEOUT 30000 /* us */
193 /* Transmitter timeout */
194 #define TX_TIMEOUT (2 * HZ)
198 static struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp, int is_ex)
200 struct bufdesc_ex *ex = (struct bufdesc_ex *)bdp;
202 return (struct bufdesc *)(ex + 1);
207 static struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp, int is_ex)
209 struct bufdesc_ex *ex = (struct bufdesc_ex *)bdp;
211 return (struct bufdesc *)(ex - 1);
216 static void *swap_buffer(void *bufaddr, int len)
219 unsigned int *buf = bufaddr;
221 for (i = 0; i < (len + 3) / 4; i++, buf++)
222 *buf = cpu_to_be32(*buf);
228 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
230 struct fec_enet_private *fep = netdev_priv(ndev);
231 const struct platform_device_id *id_entry =
232 platform_get_device_id(fep->pdev);
235 unsigned short status;
239 /* Link is down or autonegotiation is in progress. */
240 return NETDEV_TX_BUSY;
243 spin_lock_irqsave(&fep->hw_lock, flags);
244 /* Fill in a Tx ring entry */
247 status = bdp->cbd_sc;
249 if (status & BD_ENET_TX_READY) {
250 /* Ooops. All transmit buffers are full. Bail out.
251 * This should not happen, since ndev->tbusy should be set.
253 printk("%s: tx queue full!.\n", ndev->name);
254 spin_unlock_irqrestore(&fep->hw_lock, flags);
255 return NETDEV_TX_BUSY;
258 /* Clear all of the status flags */
259 status &= ~BD_ENET_TX_STATS;
261 /* Set buffer length and buffer pointer */
263 bdp->cbd_datlen = skb->len;
266 * On some FEC implementations data must be aligned on
267 * 4-byte boundaries. Use bounce buffers to copy data
268 * and get it aligned. Ugh.
270 if (((unsigned long) bufaddr) & FEC_ALIGNMENT) {
273 index = (struct bufdesc_ex *)bdp -
274 (struct bufdesc_ex *)fep->tx_bd_base;
276 index = bdp - fep->tx_bd_base;
277 memcpy(fep->tx_bounce[index], skb->data, skb->len);
278 bufaddr = fep->tx_bounce[index];
282 * Some design made an incorrect assumption on endian mode of
283 * the system that it's running on. As the result, driver has to
284 * swap every frame going to and coming from the controller.
286 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
287 swap_buffer(bufaddr, skb->len);
289 /* Save skb pointer */
290 fep->tx_skbuff[fep->skb_cur] = skb;
292 ndev->stats.tx_bytes += skb->len;
293 fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
295 /* Push the data cache so the CPM does not get stale memory
298 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, bufaddr,
299 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
301 /* Send it on its way. Tell FEC it's ready, interrupt when done,
302 * it's the last BD of the frame, and to put the CRC on the end.
304 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
305 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
306 bdp->cbd_sc = status;
308 if (fep->bufdesc_ex) {
310 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
312 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
314 ebdp->cbd_esc = (BD_ENET_TX_TS | BD_ENET_TX_INT);
315 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
318 ebdp->cbd_esc = BD_ENET_TX_INT;
321 /* Trigger transmission start */
322 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
324 /* If this was the last BD in the ring, start at the beginning again. */
325 if (status & BD_ENET_TX_WRAP)
326 bdp = fep->tx_bd_base;
328 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
330 if (bdp == fep->dirty_tx) {
332 netif_stop_queue(ndev);
337 skb_tx_timestamp(skb);
339 spin_unlock_irqrestore(&fep->hw_lock, flags);
344 /* This function is called to start or restart the FEC during a link
345 * change. This only happens when switching between half and full
349 fec_restart(struct net_device *ndev, int duplex)
351 struct fec_enet_private *fep = netdev_priv(ndev);
352 const struct platform_device_id *id_entry =
353 platform_get_device_id(fep->pdev);
356 u32 rcntl = OPT_FRAME_SIZE | 0x04;
357 u32 ecntl = 0x2; /* ETHEREN */
359 /* Whack a reset. We should wait for this. */
360 writel(1, fep->hwp + FEC_ECNTRL);
364 * enet-mac reset will reset mac address registers too,
365 * so need to reconfigure it.
367 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
368 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
369 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
370 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
373 /* Clear any outstanding interrupt. */
374 writel(0xffc00000, fep->hwp + FEC_IEVENT);
376 /* Reset all multicast. */
377 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
378 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
380 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
381 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
384 /* Set maximum receive buffer size. */
385 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
387 /* Set receive and transmit descriptor base. */
388 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
390 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc_ex)
391 * RX_RING_SIZE, fep->hwp + FEC_X_DES_START);
393 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc)
394 * RX_RING_SIZE, fep->hwp + FEC_X_DES_START);
396 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
397 fep->cur_rx = fep->rx_bd_base;
399 /* Reset SKB transmit buffers. */
400 fep->skb_cur = fep->skb_dirty = 0;
401 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
402 if (fep->tx_skbuff[i]) {
403 dev_kfree_skb_any(fep->tx_skbuff[i]);
404 fep->tx_skbuff[i] = NULL;
408 /* Enable MII mode */
411 writel(0x04, fep->hwp + FEC_X_CNTRL);
415 writel(0x0, fep->hwp + FEC_X_CNTRL);
418 fep->full_duplex = duplex;
421 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
424 * The phy interface and speed need to get configured
425 * differently on enet-mac.
427 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
428 /* Enable flow control and length check */
429 rcntl |= 0x40000000 | 0x00000020;
431 /* RGMII, RMII or MII */
432 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
434 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
439 /* 1G, 100M or 10M */
441 if (fep->phy_dev->speed == SPEED_1000)
443 else if (fep->phy_dev->speed == SPEED_100)
449 #ifdef FEC_MIIGSK_ENR
450 if (id_entry->driver_data & FEC_QUIRK_USE_GASKET) {
452 /* disable the gasket and wait */
453 writel(0, fep->hwp + FEC_MIIGSK_ENR);
454 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
458 * configure the gasket:
459 * RMII, 50 MHz, no loopback, no echo
460 * MII, 25 MHz, no loopback, no echo
462 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
463 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
464 if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
465 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
466 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
468 /* re-enable the gasket */
469 writel(2, fep->hwp + FEC_MIIGSK_ENR);
473 writel(rcntl, fep->hwp + FEC_R_CNTRL);
475 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
476 /* enable ENET endian swap */
478 /* enable ENET store and forward mode */
479 writel(1 << 8, fep->hwp + FEC_X_WMRK);
485 /* And last, enable the transmit and receive processing */
486 writel(ecntl, fep->hwp + FEC_ECNTRL);
487 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
490 fec_ptp_start_cyclecounter(ndev);
492 /* Enable interrupts we wish to service */
493 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
497 fec_stop(struct net_device *ndev)
499 struct fec_enet_private *fep = netdev_priv(ndev);
500 const struct platform_device_id *id_entry =
501 platform_get_device_id(fep->pdev);
502 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
504 /* We cannot expect a graceful transmit stop without link !!! */
506 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
508 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
509 printk("fec_stop : Graceful transmit stop did not complete !\n");
512 /* Whack a reset. We should wait for this. */
513 writel(1, fep->hwp + FEC_ECNTRL);
515 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
516 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
518 /* We have to keep ENET enabled to have MII interrupt stay working */
519 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
520 writel(2, fep->hwp + FEC_ECNTRL);
521 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
527 fec_timeout(struct net_device *ndev)
529 struct fec_enet_private *fep = netdev_priv(ndev);
531 ndev->stats.tx_errors++;
533 fec_restart(ndev, fep->full_duplex);
534 netif_wake_queue(ndev);
538 fec_enet_tx(struct net_device *ndev)
540 struct fec_enet_private *fep;
542 unsigned short status;
545 fep = netdev_priv(ndev);
546 spin_lock(&fep->hw_lock);
549 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
550 if (bdp == fep->cur_tx && fep->tx_full == 0)
553 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
554 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
555 bdp->cbd_bufaddr = 0;
557 skb = fep->tx_skbuff[fep->skb_dirty];
558 /* Check for errors. */
559 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
560 BD_ENET_TX_RL | BD_ENET_TX_UN |
562 ndev->stats.tx_errors++;
563 if (status & BD_ENET_TX_HB) /* No heartbeat */
564 ndev->stats.tx_heartbeat_errors++;
565 if (status & BD_ENET_TX_LC) /* Late collision */
566 ndev->stats.tx_window_errors++;
567 if (status & BD_ENET_TX_RL) /* Retrans limit */
568 ndev->stats.tx_aborted_errors++;
569 if (status & BD_ENET_TX_UN) /* Underrun */
570 ndev->stats.tx_fifo_errors++;
571 if (status & BD_ENET_TX_CSL) /* Carrier lost */
572 ndev->stats.tx_carrier_errors++;
574 ndev->stats.tx_packets++;
577 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
579 struct skb_shared_hwtstamps shhwtstamps;
581 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
583 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
584 spin_lock_irqsave(&fep->tmreg_lock, flags);
585 shhwtstamps.hwtstamp = ns_to_ktime(
586 timecounter_cyc2time(&fep->tc, ebdp->ts));
587 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
588 skb_tstamp_tx(skb, &shhwtstamps);
591 if (status & BD_ENET_TX_READY)
592 printk("HEY! Enet xmit interrupt and TX_READY.\n");
594 /* Deferred means some collisions occurred during transmit,
595 * but we eventually sent the packet OK.
597 if (status & BD_ENET_TX_DEF)
598 ndev->stats.collisions++;
600 /* Free the sk buffer associated with this last transmit */
601 dev_kfree_skb_any(skb);
602 fep->tx_skbuff[fep->skb_dirty] = NULL;
603 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
605 /* Update pointer to next buffer descriptor to be transmitted */
606 if (status & BD_ENET_TX_WRAP)
607 bdp = fep->tx_bd_base;
609 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
611 /* Since we have freed up a buffer, the ring is no longer full
615 if (netif_queue_stopped(ndev))
616 netif_wake_queue(ndev);
620 spin_unlock(&fep->hw_lock);
624 /* During a receive, the cur_rx points to the current incoming buffer.
625 * When we update through the ring, if the next incoming buffer has
626 * not been given to the system, we just set the empty indicator,
627 * effectively tossing the packet.
630 fec_enet_rx(struct net_device *ndev)
632 struct fec_enet_private *fep = netdev_priv(ndev);
633 const struct platform_device_id *id_entry =
634 platform_get_device_id(fep->pdev);
636 unsigned short status;
645 spin_lock(&fep->hw_lock);
647 /* First, grab all of the stats for the incoming packet.
648 * These get messed up if we get called due to a busy condition.
652 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
654 /* Since we have allocated space to hold a complete frame,
655 * the last indicator should be set.
657 if ((status & BD_ENET_RX_LAST) == 0)
658 printk("FEC ENET: rcv is not +last\n");
661 goto rx_processing_done;
663 /* Check for errors. */
664 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
665 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
666 ndev->stats.rx_errors++;
667 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
668 /* Frame too long or too short. */
669 ndev->stats.rx_length_errors++;
671 if (status & BD_ENET_RX_NO) /* Frame alignment */
672 ndev->stats.rx_frame_errors++;
673 if (status & BD_ENET_RX_CR) /* CRC Error */
674 ndev->stats.rx_crc_errors++;
675 if (status & BD_ENET_RX_OV) /* FIFO overrun */
676 ndev->stats.rx_fifo_errors++;
679 /* Report late collisions as a frame error.
680 * On this error, the BD is closed, but we don't know what we
681 * have in the buffer. So, just drop this frame on the floor.
683 if (status & BD_ENET_RX_CL) {
684 ndev->stats.rx_errors++;
685 ndev->stats.rx_frame_errors++;
686 goto rx_processing_done;
689 /* Process the incoming frame. */
690 ndev->stats.rx_packets++;
691 pkt_len = bdp->cbd_datlen;
692 ndev->stats.rx_bytes += pkt_len;
693 data = (__u8*)__va(bdp->cbd_bufaddr);
695 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
696 FEC_ENET_TX_FRSIZE, DMA_FROM_DEVICE);
698 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
699 swap_buffer(data, pkt_len);
701 /* This does 16 byte alignment, exactly what we need.
702 * The packet length includes FCS, but we don't want to
703 * include that when passing upstream as it messes up
704 * bridging applications.
706 skb = netdev_alloc_skb(ndev, pkt_len - 4 + NET_IP_ALIGN);
708 if (unlikely(!skb)) {
709 printk("%s: Memory squeeze, dropping packet.\n",
711 ndev->stats.rx_dropped++;
713 skb_reserve(skb, NET_IP_ALIGN);
714 skb_put(skb, pkt_len - 4); /* Make room */
715 skb_copy_to_linear_data(skb, data, pkt_len - 4);
716 skb->protocol = eth_type_trans(skb, ndev);
718 /* Get receive timestamp from the skb */
719 if (fep->hwts_rx_en && fep->bufdesc_ex) {
720 struct skb_shared_hwtstamps *shhwtstamps =
723 struct bufdesc_ex *ebdp =
724 (struct bufdesc_ex *)bdp;
726 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
728 spin_lock_irqsave(&fep->tmreg_lock, flags);
729 shhwtstamps->hwtstamp = ns_to_ktime(
730 timecounter_cyc2time(&fep->tc, ebdp->ts));
731 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
734 if (!skb_defer_rx_timestamp(skb))
738 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, data,
739 FEC_ENET_TX_FRSIZE, DMA_FROM_DEVICE);
741 /* Clear the status flags for this buffer */
742 status &= ~BD_ENET_RX_STATS;
744 /* Mark the buffer empty */
745 status |= BD_ENET_RX_EMPTY;
746 bdp->cbd_sc = status;
748 if (fep->bufdesc_ex) {
749 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
751 ebdp->cbd_esc = BD_ENET_RX_INT;
756 /* Update BD pointer to next entry */
757 if (status & BD_ENET_RX_WRAP)
758 bdp = fep->rx_bd_base;
760 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
761 /* Doing this here will keep the FEC running while we process
762 * incoming frames. On a heavily loaded network, we should be
763 * able to keep up at the expense of system resources.
765 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
769 spin_unlock(&fep->hw_lock);
773 fec_enet_interrupt(int irq, void *dev_id)
775 struct net_device *ndev = dev_id;
776 struct fec_enet_private *fep = netdev_priv(ndev);
778 irqreturn_t ret = IRQ_NONE;
781 int_events = readl(fep->hwp + FEC_IEVENT);
782 writel(int_events, fep->hwp + FEC_IEVENT);
784 if (int_events & FEC_ENET_RXF) {
789 /* Transmit OK, or non-fatal error. Update the buffer
790 * descriptors. FEC handles all errors, we just discover
791 * them as part of the transmit process.
793 if (int_events & FEC_ENET_TXF) {
798 if (int_events & FEC_ENET_MII) {
800 complete(&fep->mdio_done);
802 } while (int_events);
809 /* ------------------------------------------------------------------------- */
810 static void __inline__ fec_get_mac(struct net_device *ndev)
812 struct fec_enet_private *fep = netdev_priv(ndev);
813 struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
814 unsigned char *iap, tmpaddr[ETH_ALEN];
817 * try to get mac address in following order:
819 * 1) module parameter via kernel command line in form
820 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
826 * 2) from device tree data
828 if (!is_valid_ether_addr(iap)) {
829 struct device_node *np = fep->pdev->dev.of_node;
831 const char *mac = of_get_mac_address(np);
833 iap = (unsigned char *) mac;
839 * 3) from flash or fuse (via platform data)
841 if (!is_valid_ether_addr(iap)) {
844 iap = (unsigned char *)FEC_FLASHMAC;
847 iap = (unsigned char *)&pdata->mac;
852 * 4) FEC mac registers set by bootloader
854 if (!is_valid_ether_addr(iap)) {
855 *((unsigned long *) &tmpaddr[0]) =
856 be32_to_cpu(readl(fep->hwp + FEC_ADDR_LOW));
857 *((unsigned short *) &tmpaddr[4]) =
858 be16_to_cpu(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
862 memcpy(ndev->dev_addr, iap, ETH_ALEN);
864 /* Adjust MAC if using macaddr */
866 ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
869 /* ------------------------------------------------------------------------- */
874 static void fec_enet_adjust_link(struct net_device *ndev)
876 struct fec_enet_private *fep = netdev_priv(ndev);
877 struct phy_device *phy_dev = fep->phy_dev;
880 int status_change = 0;
882 spin_lock_irqsave(&fep->hw_lock, flags);
884 /* Prevent a state halted on mii error */
885 if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
886 phy_dev->state = PHY_RESUMING;
890 /* Duplex link change */
892 if (fep->full_duplex != phy_dev->duplex) {
893 fec_restart(ndev, phy_dev->duplex);
894 /* prevent unnecessary second fec_restart() below */
895 fep->link = phy_dev->link;
900 /* Link on or off change */
901 if (phy_dev->link != fep->link) {
902 fep->link = phy_dev->link;
904 fec_restart(ndev, phy_dev->duplex);
911 spin_unlock_irqrestore(&fep->hw_lock, flags);
914 phy_print_status(phy_dev);
917 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
919 struct fec_enet_private *fep = bus->priv;
920 unsigned long time_left;
922 fep->mii_timeout = 0;
923 init_completion(&fep->mdio_done);
925 /* start a read op */
926 writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
927 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
928 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
930 /* wait for end of transfer */
931 time_left = wait_for_completion_timeout(&fep->mdio_done,
932 usecs_to_jiffies(FEC_MII_TIMEOUT));
933 if (time_left == 0) {
934 fep->mii_timeout = 1;
935 printk(KERN_ERR "FEC: MDIO read timeout\n");
940 return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
943 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
946 struct fec_enet_private *fep = bus->priv;
947 unsigned long time_left;
949 fep->mii_timeout = 0;
950 init_completion(&fep->mdio_done);
952 /* start a write op */
953 writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
954 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
955 FEC_MMFR_TA | FEC_MMFR_DATA(value),
956 fep->hwp + FEC_MII_DATA);
958 /* wait for end of transfer */
959 time_left = wait_for_completion_timeout(&fep->mdio_done,
960 usecs_to_jiffies(FEC_MII_TIMEOUT));
961 if (time_left == 0) {
962 fep->mii_timeout = 1;
963 printk(KERN_ERR "FEC: MDIO write timeout\n");
970 static int fec_enet_mdio_reset(struct mii_bus *bus)
975 static int fec_enet_mii_probe(struct net_device *ndev)
977 struct fec_enet_private *fep = netdev_priv(ndev);
978 const struct platform_device_id *id_entry =
979 platform_get_device_id(fep->pdev);
980 struct phy_device *phy_dev = NULL;
981 char mdio_bus_id[MII_BUS_ID_SIZE];
982 char phy_name[MII_BUS_ID_SIZE + 3];
984 int dev_id = fep->dev_id;
988 /* check for attached phy */
989 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
990 if ((fep->mii_bus->phy_mask & (1 << phy_id)))
992 if (fep->mii_bus->phy_map[phy_id] == NULL)
994 if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
998 strncpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1002 if (phy_id >= PHY_MAX_ADDR) {
1004 "%s: no PHY, assuming direct connection to switch\n",
1006 strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1010 snprintf(phy_name, sizeof(phy_name), PHY_ID_FMT, mdio_bus_id, phy_id);
1011 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link, 0,
1012 fep->phy_interface);
1013 if (IS_ERR(phy_dev)) {
1014 printk(KERN_ERR "%s: could not attach to PHY\n", ndev->name);
1015 return PTR_ERR(phy_dev);
1018 /* mask with MAC supported features */
1019 if (id_entry->driver_data & FEC_QUIRK_HAS_GBIT)
1020 phy_dev->supported &= PHY_GBIT_FEATURES;
1022 phy_dev->supported &= PHY_BASIC_FEATURES;
1024 phy_dev->advertising = phy_dev->supported;
1026 fep->phy_dev = phy_dev;
1028 fep->full_duplex = 0;
1031 "%s: Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1033 fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1039 static int fec_enet_mii_init(struct platform_device *pdev)
1041 static struct mii_bus *fec0_mii_bus;
1042 struct net_device *ndev = platform_get_drvdata(pdev);
1043 struct fec_enet_private *fep = netdev_priv(ndev);
1044 const struct platform_device_id *id_entry =
1045 platform_get_device_id(fep->pdev);
1046 int err = -ENXIO, i;
1049 * The dual fec interfaces are not equivalent with enet-mac.
1050 * Here are the differences:
1052 * - fec0 supports MII & RMII modes while fec1 only supports RMII
1053 * - fec0 acts as the 1588 time master while fec1 is slave
1054 * - external phys can only be configured by fec0
1056 * That is to say fec1 can not work independently. It only works
1057 * when fec0 is working. The reason behind this design is that the
1058 * second interface is added primarily for Switch mode.
1060 * Because of the last point above, both phys are attached on fec0
1061 * mdio interface in board design, and need to be configured by
1064 if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
1065 /* fec1 uses fec0 mii_bus */
1066 if (mii_cnt && fec0_mii_bus) {
1067 fep->mii_bus = fec0_mii_bus;
1074 fep->mii_timeout = 0;
1077 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
1079 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
1080 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
1081 * Reference Manual has an error on this, and gets fixed on i.MX6Q
1084 fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ahb), 5000000);
1085 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1087 fep->phy_speed <<= 1;
1088 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1090 fep->mii_bus = mdiobus_alloc();
1091 if (fep->mii_bus == NULL) {
1096 fep->mii_bus->name = "fec_enet_mii_bus";
1097 fep->mii_bus->read = fec_enet_mdio_read;
1098 fep->mii_bus->write = fec_enet_mdio_write;
1099 fep->mii_bus->reset = fec_enet_mdio_reset;
1100 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1101 pdev->name, fep->dev_id + 1);
1102 fep->mii_bus->priv = fep;
1103 fep->mii_bus->parent = &pdev->dev;
1105 fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
1106 if (!fep->mii_bus->irq) {
1108 goto err_out_free_mdiobus;
1111 for (i = 0; i < PHY_MAX_ADDR; i++)
1112 fep->mii_bus->irq[i] = PHY_POLL;
1114 if (mdiobus_register(fep->mii_bus))
1115 goto err_out_free_mdio_irq;
1119 /* save fec0 mii_bus */
1120 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1121 fec0_mii_bus = fep->mii_bus;
1125 err_out_free_mdio_irq:
1126 kfree(fep->mii_bus->irq);
1127 err_out_free_mdiobus:
1128 mdiobus_free(fep->mii_bus);
1133 static void fec_enet_mii_remove(struct fec_enet_private *fep)
1135 if (--mii_cnt == 0) {
1136 mdiobus_unregister(fep->mii_bus);
1137 kfree(fep->mii_bus->irq);
1138 mdiobus_free(fep->mii_bus);
1142 static int fec_enet_get_settings(struct net_device *ndev,
1143 struct ethtool_cmd *cmd)
1145 struct fec_enet_private *fep = netdev_priv(ndev);
1146 struct phy_device *phydev = fep->phy_dev;
1151 return phy_ethtool_gset(phydev, cmd);
1154 static int fec_enet_set_settings(struct net_device *ndev,
1155 struct ethtool_cmd *cmd)
1157 struct fec_enet_private *fep = netdev_priv(ndev);
1158 struct phy_device *phydev = fep->phy_dev;
1163 return phy_ethtool_sset(phydev, cmd);
1166 static void fec_enet_get_drvinfo(struct net_device *ndev,
1167 struct ethtool_drvinfo *info)
1169 struct fec_enet_private *fep = netdev_priv(ndev);
1171 strlcpy(info->driver, fep->pdev->dev.driver->name,
1172 sizeof(info->driver));
1173 strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
1174 strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
1177 static const struct ethtool_ops fec_enet_ethtool_ops = {
1178 .get_settings = fec_enet_get_settings,
1179 .set_settings = fec_enet_set_settings,
1180 .get_drvinfo = fec_enet_get_drvinfo,
1181 .get_link = ethtool_op_get_link,
1182 .get_ts_info = ethtool_op_get_ts_info,
1185 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
1187 struct fec_enet_private *fep = netdev_priv(ndev);
1188 struct phy_device *phydev = fep->phy_dev;
1190 if (!netif_running(ndev))
1196 if (cmd == SIOCSHWTSTAMP && fep->bufdesc_ex)
1197 return fec_ptp_ioctl(ndev, rq, cmd);
1199 return phy_mii_ioctl(phydev, rq, cmd);
1202 static void fec_enet_free_buffers(struct net_device *ndev)
1204 struct fec_enet_private *fep = netdev_priv(ndev);
1206 struct sk_buff *skb;
1207 struct bufdesc *bdp;
1209 bdp = fep->rx_bd_base;
1210 for (i = 0; i < RX_RING_SIZE; i++) {
1211 skb = fep->rx_skbuff[i];
1213 if (bdp->cbd_bufaddr)
1214 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1215 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1218 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1221 bdp = fep->tx_bd_base;
1222 for (i = 0; i < TX_RING_SIZE; i++)
1223 kfree(fep->tx_bounce[i]);
1226 static int fec_enet_alloc_buffers(struct net_device *ndev)
1228 struct fec_enet_private *fep = netdev_priv(ndev);
1230 struct sk_buff *skb;
1231 struct bufdesc *bdp;
1233 bdp = fep->rx_bd_base;
1234 for (i = 0; i < RX_RING_SIZE; i++) {
1235 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
1237 fec_enet_free_buffers(ndev);
1240 fep->rx_skbuff[i] = skb;
1242 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
1243 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1244 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1246 if (fep->bufdesc_ex) {
1247 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1248 ebdp->cbd_esc = BD_ENET_RX_INT;
1251 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1254 /* Set the last buffer to wrap. */
1255 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1256 bdp->cbd_sc |= BD_SC_WRAP;
1258 bdp = fep->tx_bd_base;
1259 for (i = 0; i < TX_RING_SIZE; i++) {
1260 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
1263 bdp->cbd_bufaddr = 0;
1265 if (fep->bufdesc_ex) {
1266 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1267 ebdp->cbd_esc = BD_ENET_RX_INT;
1270 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1273 /* Set the last buffer to wrap. */
1274 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1275 bdp->cbd_sc |= BD_SC_WRAP;
1281 fec_enet_open(struct net_device *ndev)
1283 struct fec_enet_private *fep = netdev_priv(ndev);
1286 /* I should reset the ring buffers here, but I don't yet know
1287 * a simple way to do that.
1290 ret = fec_enet_alloc_buffers(ndev);
1294 /* Probe and connect to PHY when open the interface */
1295 ret = fec_enet_mii_probe(ndev);
1297 fec_enet_free_buffers(ndev);
1300 phy_start(fep->phy_dev);
1301 netif_start_queue(ndev);
1307 fec_enet_close(struct net_device *ndev)
1309 struct fec_enet_private *fep = netdev_priv(ndev);
1311 /* Don't know what to do yet. */
1313 netif_stop_queue(ndev);
1317 phy_stop(fep->phy_dev);
1318 phy_disconnect(fep->phy_dev);
1321 fec_enet_free_buffers(ndev);
1326 /* Set or clear the multicast filter for this adaptor.
1327 * Skeleton taken from sunlance driver.
1328 * The CPM Ethernet implementation allows Multicast as well as individual
1329 * MAC address filtering. Some of the drivers check to make sure it is
1330 * a group multicast address, and discard those that are not. I guess I
1331 * will do the same for now, but just remove the test if you want
1332 * individual filtering as well (do the upper net layers want or support
1333 * this kind of feature?).
1336 #define HASH_BITS 6 /* #bits in hash */
1337 #define CRC32_POLY 0xEDB88320
1339 static void set_multicast_list(struct net_device *ndev)
1341 struct fec_enet_private *fep = netdev_priv(ndev);
1342 struct netdev_hw_addr *ha;
1343 unsigned int i, bit, data, crc, tmp;
1346 if (ndev->flags & IFF_PROMISC) {
1347 tmp = readl(fep->hwp + FEC_R_CNTRL);
1349 writel(tmp, fep->hwp + FEC_R_CNTRL);
1353 tmp = readl(fep->hwp + FEC_R_CNTRL);
1355 writel(tmp, fep->hwp + FEC_R_CNTRL);
1357 if (ndev->flags & IFF_ALLMULTI) {
1358 /* Catch all multicast addresses, so set the
1361 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1362 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1367 /* Clear filter and add the addresses in hash register
1369 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1370 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1372 netdev_for_each_mc_addr(ha, ndev) {
1373 /* calculate crc32 value of mac address */
1376 for (i = 0; i < ndev->addr_len; i++) {
1378 for (bit = 0; bit < 8; bit++, data >>= 1) {
1380 (((crc ^ data) & 1) ? CRC32_POLY : 0);
1384 /* only upper 6 bits (HASH_BITS) are used
1385 * which point to specific bit in he hash registers
1387 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1390 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1391 tmp |= 1 << (hash - 32);
1392 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1394 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1396 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1401 /* Set a MAC change in hardware. */
1403 fec_set_mac_address(struct net_device *ndev, void *p)
1405 struct fec_enet_private *fep = netdev_priv(ndev);
1406 struct sockaddr *addr = p;
1408 if (!is_valid_ether_addr(addr->sa_data))
1409 return -EADDRNOTAVAIL;
1411 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
1413 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
1414 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
1415 fep->hwp + FEC_ADDR_LOW);
1416 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
1417 fep->hwp + FEC_ADDR_HIGH);
1421 #ifdef CONFIG_NET_POLL_CONTROLLER
1423 * fec_poll_controller - FEC Poll controller function
1424 * @dev: The FEC network adapter
1426 * Polled functionality used by netconsole and others in non interrupt mode
1429 void fec_poll_controller(struct net_device *dev)
1432 struct fec_enet_private *fep = netdev_priv(dev);
1434 for (i = 0; i < FEC_IRQ_NUM; i++) {
1435 if (fep->irq[i] > 0) {
1436 disable_irq(fep->irq[i]);
1437 fec_enet_interrupt(fep->irq[i], dev);
1438 enable_irq(fep->irq[i]);
1444 static const struct net_device_ops fec_netdev_ops = {
1445 .ndo_open = fec_enet_open,
1446 .ndo_stop = fec_enet_close,
1447 .ndo_start_xmit = fec_enet_start_xmit,
1448 .ndo_set_rx_mode = set_multicast_list,
1449 .ndo_change_mtu = eth_change_mtu,
1450 .ndo_validate_addr = eth_validate_addr,
1451 .ndo_tx_timeout = fec_timeout,
1452 .ndo_set_mac_address = fec_set_mac_address,
1453 .ndo_do_ioctl = fec_enet_ioctl,
1454 #ifdef CONFIG_NET_POLL_CONTROLLER
1455 .ndo_poll_controller = fec_poll_controller,
1460 * XXX: We need to clean up on failure exits here.
1463 static int fec_enet_init(struct net_device *ndev)
1465 struct fec_enet_private *fep = netdev_priv(ndev);
1466 struct bufdesc *cbd_base;
1467 struct bufdesc *bdp;
1470 /* Allocate memory for buffer descriptors. */
1471 cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma,
1474 printk("FEC: allocate descriptor memory failed?\n");
1478 spin_lock_init(&fep->hw_lock);
1482 /* Get the Ethernet address */
1485 /* Set receive and transmit descriptor base. */
1486 fep->rx_bd_base = cbd_base;
1487 if (fep->bufdesc_ex)
1488 fep->tx_bd_base = (struct bufdesc *)
1489 (((struct bufdesc_ex *)cbd_base) + RX_RING_SIZE);
1491 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1493 /* The FEC Ethernet specific entries in the device structure */
1494 ndev->watchdog_timeo = TX_TIMEOUT;
1495 ndev->netdev_ops = &fec_netdev_ops;
1496 ndev->ethtool_ops = &fec_enet_ethtool_ops;
1498 /* Initialize the receive buffer descriptors. */
1499 bdp = fep->rx_bd_base;
1500 for (i = 0; i < RX_RING_SIZE; i++) {
1502 /* Initialize the BD for every fragment in the page. */
1504 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1507 /* Set the last buffer to wrap */
1508 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1509 bdp->cbd_sc |= BD_SC_WRAP;
1511 /* ...and the same for transmit */
1512 bdp = fep->tx_bd_base;
1513 for (i = 0; i < TX_RING_SIZE; i++) {
1515 /* Initialize the BD for every fragment in the page. */
1517 bdp->cbd_bufaddr = 0;
1518 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1521 /* Set the last buffer to wrap */
1522 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1523 bdp->cbd_sc |= BD_SC_WRAP;
1525 fec_restart(ndev, 0);
1531 static int fec_get_phy_mode_dt(struct platform_device *pdev)
1533 struct device_node *np = pdev->dev.of_node;
1536 return of_get_phy_mode(np);
1541 static void fec_reset_phy(struct platform_device *pdev)
1545 struct device_node *np = pdev->dev.of_node;
1550 of_property_read_u32(np, "phy-reset-duration", &msec);
1551 /* A sane reset duration should not be longer than 1s */
1555 phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0);
1556 err = devm_gpio_request_one(&pdev->dev, phy_reset,
1557 GPIOF_OUT_INIT_LOW, "phy-reset");
1559 pr_debug("FEC: failed to get gpio phy-reset: %d\n", err);
1563 gpio_set_value(phy_reset, 1);
1565 #else /* CONFIG_OF */
1566 static inline int fec_get_phy_mode_dt(struct platform_device *pdev)
1571 static inline void fec_reset_phy(struct platform_device *pdev)
1574 * In case of platform probe, the reset has been done
1578 #endif /* CONFIG_OF */
1581 fec_probe(struct platform_device *pdev)
1583 struct fec_enet_private *fep;
1584 struct fec_platform_data *pdata;
1585 struct net_device *ndev;
1586 int i, irq, ret = 0;
1588 const struct of_device_id *of_id;
1590 struct pinctrl *pinctrl;
1591 struct regulator *reg_phy;
1593 of_id = of_match_device(fec_dt_ids, &pdev->dev);
1595 pdev->id_entry = of_id->data;
1597 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1601 r = request_mem_region(r->start, resource_size(r), pdev->name);
1605 /* Init network device */
1606 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
1609 goto failed_alloc_etherdev;
1612 SET_NETDEV_DEV(ndev, &pdev->dev);
1614 /* setup board info structure */
1615 fep = netdev_priv(ndev);
1617 fep->hwp = ioremap(r->start, resource_size(r));
1619 fep->dev_id = dev_id++;
1621 fep->bufdesc_ex = 0;
1625 goto failed_ioremap;
1628 platform_set_drvdata(pdev, ndev);
1630 ret = fec_get_phy_mode_dt(pdev);
1632 pdata = pdev->dev.platform_data;
1634 fep->phy_interface = pdata->phy;
1636 fep->phy_interface = PHY_INTERFACE_MODE_MII;
1638 fep->phy_interface = ret;
1641 for (i = 0; i < FEC_IRQ_NUM; i++) {
1642 irq = platform_get_irq(pdev, i);
1649 ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev);
1652 irq = platform_get_irq(pdev, i);
1653 free_irq(irq, ndev);
1659 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1660 if (IS_ERR(pinctrl)) {
1661 ret = PTR_ERR(pinctrl);
1665 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1666 if (IS_ERR(fep->clk_ipg)) {
1667 ret = PTR_ERR(fep->clk_ipg);
1671 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1672 if (IS_ERR(fep->clk_ahb)) {
1673 ret = PTR_ERR(fep->clk_ahb);
1677 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
1679 pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX;
1680 if (IS_ERR(fep->clk_ptp)) {
1681 ret = PTR_ERR(fep->clk_ptp);
1682 fep->bufdesc_ex = 0;
1685 clk_prepare_enable(fep->clk_ahb);
1686 clk_prepare_enable(fep->clk_ipg);
1687 if (!IS_ERR(fep->clk_ptp))
1688 clk_prepare_enable(fep->clk_ptp);
1690 reg_phy = devm_regulator_get(&pdev->dev, "phy");
1691 if (!IS_ERR(reg_phy)) {
1692 ret = regulator_enable(reg_phy);
1695 "Failed to enable phy regulator: %d\n", ret);
1696 goto failed_regulator;
1700 fec_reset_phy(pdev);
1702 ret = fec_enet_init(ndev);
1706 ret = fec_enet_mii_init(pdev);
1708 goto failed_mii_init;
1710 /* Carrier starts down, phylib will bring it up */
1711 netif_carrier_off(ndev);
1713 ret = register_netdev(ndev);
1715 goto failed_register;
1717 if (fep->bufdesc_ex)
1718 fec_ptp_init(ndev, pdev);
1723 fec_enet_mii_remove(fep);
1727 clk_disable_unprepare(fep->clk_ahb);
1728 clk_disable_unprepare(fep->clk_ipg);
1729 if (!IS_ERR(fep->clk_ptp))
1730 clk_disable_unprepare(fep->clk_ptp);
1733 for (i = 0; i < FEC_IRQ_NUM; i++) {
1734 irq = platform_get_irq(pdev, i);
1736 free_irq(irq, ndev);
1742 failed_alloc_etherdev:
1743 release_mem_region(r->start, resource_size(r));
1749 fec_drv_remove(struct platform_device *pdev)
1751 struct net_device *ndev = platform_get_drvdata(pdev);
1752 struct fec_enet_private *fep = netdev_priv(ndev);
1756 unregister_netdev(ndev);
1757 fec_enet_mii_remove(fep);
1758 for (i = 0; i < FEC_IRQ_NUM; i++) {
1759 int irq = platform_get_irq(pdev, i);
1761 free_irq(irq, ndev);
1763 del_timer_sync(&fep->time_keep);
1764 clk_disable_unprepare(fep->clk_ptp);
1766 ptp_clock_unregister(fep->ptp_clock);
1767 clk_disable_unprepare(fep->clk_ahb);
1768 clk_disable_unprepare(fep->clk_ipg);
1772 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1774 release_mem_region(r->start, resource_size(r));
1776 platform_set_drvdata(pdev, NULL);
1783 fec_suspend(struct device *dev)
1785 struct net_device *ndev = dev_get_drvdata(dev);
1786 struct fec_enet_private *fep = netdev_priv(ndev);
1788 if (netif_running(ndev)) {
1790 netif_device_detach(ndev);
1792 clk_disable_unprepare(fep->clk_ahb);
1793 clk_disable_unprepare(fep->clk_ipg);
1799 fec_resume(struct device *dev)
1801 struct net_device *ndev = dev_get_drvdata(dev);
1802 struct fec_enet_private *fep = netdev_priv(ndev);
1804 clk_prepare_enable(fep->clk_ahb);
1805 clk_prepare_enable(fep->clk_ipg);
1806 if (netif_running(ndev)) {
1807 fec_restart(ndev, fep->full_duplex);
1808 netif_device_attach(ndev);
1814 static const struct dev_pm_ops fec_pm_ops = {
1815 .suspend = fec_suspend,
1816 .resume = fec_resume,
1817 .freeze = fec_suspend,
1819 .poweroff = fec_suspend,
1820 .restore = fec_resume,
1824 static struct platform_driver fec_driver = {
1826 .name = DRIVER_NAME,
1827 .owner = THIS_MODULE,
1831 .of_match_table = fec_dt_ids,
1833 .id_table = fec_devtype,
1835 .remove = fec_drv_remove,
1838 module_platform_driver(fec_driver);
1840 MODULE_LICENSE("GPL");