2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 * Right now, I am very wasteful with the buffers. I allocate memory
6 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
15 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
19 * Copyright (c) 2004-2006 Macq Electronique SA.
21 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/delay.h>
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
40 #include <linux/tcp.h>
41 #include <linux/udp.h>
42 #include <linux/icmp.h>
43 #include <linux/spinlock.h>
44 #include <linux/workqueue.h>
45 #include <linux/bitops.h>
47 #include <linux/irq.h>
48 #include <linux/clk.h>
49 #include <linux/platform_device.h>
50 #include <linux/phy.h>
51 #include <linux/fec.h>
53 #include <linux/of_device.h>
54 #include <linux/of_gpio.h>
55 #include <linux/of_net.h>
56 #include <linux/regulator/consumer.h>
57 #include <linux/if_vlan.h>
58 #include <linux/pinctrl/consumer.h>
60 #include <asm/cacheflush.h>
64 static void set_multicast_list(struct net_device *ndev);
65 static void fec_reset_phy(struct platform_device *pdev);
66 static void fec_free_reset_gpio(struct platform_device *pdev);
68 #if defined(CONFIG_ARM)
69 #define FEC_ALIGNMENT 0xf
71 #define FEC_ALIGNMENT 0x3
74 #define DRIVER_NAME "fec"
76 /* Pause frame feild and FIFO threshold */
77 #define FEC_ENET_FCE (1 << 5)
78 #define FEC_ENET_RSEM_V 0x84
79 #define FEC_ENET_RSFL_V 16
80 #define FEC_ENET_RAEM_V 0x8
81 #define FEC_ENET_RAFL_V 0x8
82 #define FEC_ENET_OPD_V 0xFFF0
84 /* Controller is ENET-MAC */
85 #define FEC_QUIRK_ENET_MAC (1 << 0)
86 /* Controller needs driver to swap frame */
87 #define FEC_QUIRK_SWAP_FRAME (1 << 1)
88 /* Controller uses gasket */
89 #define FEC_QUIRK_USE_GASKET (1 << 2)
90 /* Controller has GBIT support */
91 #define FEC_QUIRK_HAS_GBIT (1 << 3)
92 /* Controller has extend desc buffer */
93 #define FEC_QUIRK_HAS_BUFDESC_EX (1 << 4)
94 /* Controller has hardware checksum support */
95 #define FEC_QUIRK_HAS_CSUM (1 << 5)
96 /* Controller has hardware vlan support */
97 #define FEC_QUIRK_HAS_VLAN (1 << 6)
98 /* ENET IP errata ERR006358
100 * If the ready bit in the transmit buffer descriptor (TxBD[R]) is previously
101 * detected as not set during a prior frame transmission, then the
102 * ENET_TDAR[TDAR] bit is cleared at a later time, even if additional TxBDs
103 * were added to the ring and the ENET_TDAR[TDAR] bit is set. This results in
104 * frames not being transmitted until there is a 0-to-1 transition on
107 #define FEC_QUIRK_ERR006358 (1 << 7)
109 static struct platform_device_id fec_devtype[] = {
111 /* keep it for coldfire */
116 .driver_data = FEC_QUIRK_USE_GASKET,
122 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
125 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
126 FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
127 FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358,
129 .name = "mvf600-fec",
130 .driver_data = FEC_QUIRK_ENET_MAC,
135 MODULE_DEVICE_TABLE(platform, fec_devtype);
138 IMX25_FEC = 1, /* runs on i.mx25/50/53 */
139 IMX27_FEC, /* runs on i.mx27/35/51 */
145 static const struct of_device_id fec_dt_ids[] = {
146 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
147 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
148 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
149 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
150 { .compatible = "fsl,mvf600-fec", .data = &fec_devtype[MVF600_FEC], },
153 MODULE_DEVICE_TABLE(of, fec_dt_ids);
155 static unsigned char macaddr[ETH_ALEN];
156 module_param_array(macaddr, byte, NULL, 0);
157 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
159 #if defined(CONFIG_M5272)
161 * Some hardware gets it MAC address out of local flash memory.
162 * if this is non-zero then assume it is the address to get MAC from.
164 #if defined(CONFIG_NETtel)
165 #define FEC_FLASHMAC 0xf0006006
166 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
167 #define FEC_FLASHMAC 0xf0006000
168 #elif defined(CONFIG_CANCam)
169 #define FEC_FLASHMAC 0xf0020000
170 #elif defined (CONFIG_M5272C3)
171 #define FEC_FLASHMAC (0xffe04000 + 4)
172 #elif defined(CONFIG_MOD5272)
173 #define FEC_FLASHMAC 0xffc0406b
175 #define FEC_FLASHMAC 0
177 #endif /* CONFIG_M5272 */
179 /* Interrupt events/masks. */
180 #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
181 #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
182 #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
183 #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
184 #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
185 #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
186 #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
187 #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
188 #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
189 #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
191 #define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
192 #define FEC_RX_DISABLED_IMASK (FEC_DEFAULT_IMASK & (~FEC_ENET_RXF))
194 /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets.
196 #define PKT_MAXBUF_SIZE 1522
197 #define PKT_MINBUF_SIZE 64
198 #define PKT_MAXBLR_SIZE 1536
200 /* FEC receive acceleration */
201 #define FEC_RACC_IPDIS (1 << 1)
202 #define FEC_RACC_PRODIS (1 << 2)
203 #define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
206 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
207 * size bits. Other FEC hardware does not, so we need to take that into
208 * account when setting it.
210 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
211 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
212 #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
214 #define OPT_FRAME_SIZE 0
217 /* FEC MII MMFR bits definition */
218 #define FEC_MMFR_ST (1 << 30)
219 #define FEC_MMFR_OP_READ (2 << 28)
220 #define FEC_MMFR_OP_WRITE (1 << 28)
221 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
222 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
223 #define FEC_MMFR_TA (2 << 16)
224 #define FEC_MMFR_DATA(v) (v & 0xffff)
226 #define FEC_MII_TIMEOUT 30000 /* us */
228 /* Transmitter timeout */
229 #define TX_TIMEOUT (2 * HZ)
231 #define FEC_PAUSE_FLAG_AUTONEG 0x1
232 #define FEC_PAUSE_FLAG_ENABLE 0x2
234 #define TSO_HEADER_SIZE 128
235 /* Max number of allowed TCP segments for software TSO */
236 #define FEC_MAX_TSO_SEGS 100
237 #define FEC_MAX_SKB_DESCS (FEC_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
239 #define IS_TSO_HEADER(txq, addr) \
240 ((addr >= txq->tso_hdrs_dma) && \
241 (addr < txq->tso_hdrs_dma + txq->tx_ring_size * TSO_HEADER_SIZE))
246 struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp, struct fec_enet_private *fep)
248 struct bufdesc *new_bd = bdp + 1;
249 struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp + 1;
250 struct bufdesc_ex *ex_base;
251 struct bufdesc *base;
254 if (bdp >= fep->tx_bd_base) {
255 base = fep->tx_bd_base;
256 ring_size = fep->tx_ring_size;
257 ex_base = (struct bufdesc_ex *)fep->tx_bd_base;
259 base = fep->rx_bd_base;
260 ring_size = fep->rx_ring_size;
261 ex_base = (struct bufdesc_ex *)fep->rx_bd_base;
265 return (struct bufdesc *)((ex_new_bd >= (ex_base + ring_size)) ?
266 ex_base : ex_new_bd);
268 return (new_bd >= (base + ring_size)) ?
273 struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp, struct fec_enet_private *fep)
275 struct bufdesc *new_bd = bdp - 1;
276 struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp - 1;
277 struct bufdesc_ex *ex_base;
278 struct bufdesc *base;
281 if (bdp >= fep->tx_bd_base) {
282 base = fep->tx_bd_base;
283 ring_size = fep->tx_ring_size;
284 ex_base = (struct bufdesc_ex *)fep->tx_bd_base;
286 base = fep->rx_bd_base;
287 ring_size = fep->rx_ring_size;
288 ex_base = (struct bufdesc_ex *)fep->rx_bd_base;
292 return (struct bufdesc *)((ex_new_bd < ex_base) ?
293 (ex_new_bd + ring_size) : ex_new_bd);
295 return (new_bd < base) ? (new_bd + ring_size) : new_bd;
298 static int fec_enet_get_bd_index(struct bufdesc *base, struct bufdesc *bdp,
299 struct fec_enet_private *fep)
301 return ((const char *)bdp - (const char *)base) / fep->bufdesc_size;
304 static int fec_enet_get_free_txdesc_num(struct fec_enet_private *fep)
308 entries = ((const char *)fep->dirty_tx -
309 (const char *)fep->cur_tx) / fep->bufdesc_size - 1;
311 return entries > 0 ? entries : entries + fep->tx_ring_size;
314 static void *swap_buffer(void *bufaddr, int len)
317 unsigned int *buf = bufaddr;
319 for (i = 0; i < DIV_ROUND_UP(len, 4); i++, buf++)
320 *buf = cpu_to_be32(*buf);
325 static inline bool is_ipv4_pkt(struct sk_buff *skb)
327 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
331 fec_enet_clear_csum(struct sk_buff *skb, struct net_device *ndev)
333 /* Only run for packets requiring a checksum. */
334 if (skb->ip_summed != CHECKSUM_PARTIAL)
337 if (unlikely(skb_cow_head(skb, 0)))
340 if (is_ipv4_pkt(skb))
341 ip_hdr(skb)->check = 0;
342 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0;
348 fec_enet_submit_work(struct bufdesc *bdp, struct fec_enet_private *fep)
350 const struct platform_device_id *id_entry =
351 platform_get_device_id(fep->pdev);
352 struct bufdesc *bdp_pre;
354 bdp_pre = fec_enet_get_prevdesc(bdp, fep);
355 if ((id_entry->driver_data & FEC_QUIRK_ERR006358) &&
356 !(bdp_pre->cbd_sc & BD_ENET_TX_READY)) {
357 fep->delay_work.trig_tx = true;
358 schedule_delayed_work(&(fep->delay_work.delay_work),
359 msecs_to_jiffies(1));
364 fec_enet_txq_submit_frag_skb(struct sk_buff *skb, struct net_device *ndev)
366 struct fec_enet_private *fep = netdev_priv(ndev);
367 const struct platform_device_id *id_entry =
368 platform_get_device_id(fep->pdev);
369 struct bufdesc *bdp = fep->cur_tx;
370 struct bufdesc_ex *ebdp;
371 int nr_frags = skb_shinfo(skb)->nr_frags;
373 unsigned short status;
374 unsigned int estatus = 0;
375 skb_frag_t *this_frag;
380 for (frag = 0; frag < nr_frags; frag++) {
381 this_frag = &skb_shinfo(skb)->frags[frag];
382 bdp = fec_enet_get_nextdesc(bdp, fep);
383 ebdp = (struct bufdesc_ex *)bdp;
385 status = bdp->cbd_sc;
386 status &= ~BD_ENET_TX_STATS;
387 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
388 frag_len = skb_shinfo(skb)->frags[frag].size;
390 /* Handle the last BD specially */
391 if (frag == nr_frags - 1) {
392 status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
393 if (fep->bufdesc_ex) {
394 estatus |= BD_ENET_TX_INT;
395 if (unlikely(skb_shinfo(skb)->tx_flags &
396 SKBTX_HW_TSTAMP && fep->hwts_tx_en))
397 estatus |= BD_ENET_TX_TS;
401 if (fep->bufdesc_ex) {
402 if (skb->ip_summed == CHECKSUM_PARTIAL)
403 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
405 ebdp->cbd_esc = estatus;
408 bufaddr = page_address(this_frag->page.p) + this_frag->page_offset;
410 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
411 if (((unsigned long) bufaddr) & FEC_ALIGNMENT ||
412 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
413 memcpy(fep->tx_bounce[index], bufaddr, frag_len);
414 bufaddr = fep->tx_bounce[index];
416 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
417 swap_buffer(bufaddr, frag_len);
420 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, bufaddr,
421 frag_len, DMA_TO_DEVICE);
422 if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
423 dev_kfree_skb_any(skb);
425 netdev_err(ndev, "Tx DMA memory map failed\n");
426 goto dma_mapping_error;
429 bdp->cbd_datlen = frag_len;
430 bdp->cbd_sc = status;
439 for (i = 0; i < frag; i++) {
440 bdp = fec_enet_get_nextdesc(bdp, fep);
441 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
442 bdp->cbd_datlen, DMA_TO_DEVICE);
447 static int fec_enet_txq_submit_skb(struct sk_buff *skb, struct net_device *ndev)
449 struct fec_enet_private *fep = netdev_priv(ndev);
450 const struct platform_device_id *id_entry =
451 platform_get_device_id(fep->pdev);
452 int nr_frags = skb_shinfo(skb)->nr_frags;
453 struct bufdesc *bdp, *last_bdp;
455 unsigned short status;
456 unsigned short buflen;
457 unsigned int estatus = 0;
462 entries_free = fec_enet_get_free_txdesc_num(fep);
463 if (entries_free < MAX_SKB_FRAGS + 1) {
464 dev_kfree_skb_any(skb);
466 netdev_err(ndev, "NOT enough BD for SG!\n");
470 /* Protocol checksum off-load for TCP and UDP. */
471 if (fec_enet_clear_csum(skb, ndev)) {
472 dev_kfree_skb_any(skb);
476 /* Fill in a Tx ring entry */
478 status = bdp->cbd_sc;
479 status &= ~BD_ENET_TX_STATS;
481 /* Set buffer length and buffer pointer */
483 buflen = skb_headlen(skb);
485 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
486 if (((unsigned long) bufaddr) & FEC_ALIGNMENT ||
487 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
488 memcpy(fep->tx_bounce[index], skb->data, buflen);
489 bufaddr = fep->tx_bounce[index];
491 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
492 swap_buffer(bufaddr, buflen);
495 /* Push the data cache so the CPM does not get stale memory
498 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, bufaddr,
499 buflen, DMA_TO_DEVICE);
500 if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
501 dev_kfree_skb_any(skb);
503 netdev_err(ndev, "Tx DMA memory map failed\n");
508 ret = fec_enet_txq_submit_frag_skb(skb, ndev);
512 status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
513 if (fep->bufdesc_ex) {
514 estatus = BD_ENET_TX_INT;
515 if (unlikely(skb_shinfo(skb)->tx_flags &
516 SKBTX_HW_TSTAMP && fep->hwts_tx_en))
517 estatus |= BD_ENET_TX_TS;
521 if (fep->bufdesc_ex) {
523 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
525 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
527 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
529 if (skb->ip_summed == CHECKSUM_PARTIAL)
530 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
533 ebdp->cbd_esc = estatus;
536 last_bdp = fep->cur_tx;
537 index = fec_enet_get_bd_index(fep->tx_bd_base, last_bdp, fep);
538 /* Save skb pointer */
539 fep->tx_skbuff[index] = skb;
541 bdp->cbd_datlen = buflen;
543 /* Send it on its way. Tell FEC it's ready, interrupt when done,
544 * it's the last BD of the frame, and to put the CRC on the end.
546 status |= (BD_ENET_TX_READY | BD_ENET_TX_TC);
547 bdp->cbd_sc = status;
549 fec_enet_submit_work(bdp, fep);
551 /* If this was the last BD in the ring, start at the beginning again. */
552 bdp = fec_enet_get_nextdesc(last_bdp, fep);
554 skb_tx_timestamp(skb);
558 /* Trigger transmission start */
559 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
565 fec_enet_txq_put_data_tso(struct sk_buff *skb, struct net_device *ndev,
566 struct bufdesc *bdp, int index, char *data,
567 int size, bool last_tcp, bool is_last)
569 struct fec_enet_private *fep = netdev_priv(ndev);
570 const struct platform_device_id *id_entry =
571 platform_get_device_id(fep->pdev);
572 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
573 unsigned short status;
574 unsigned int estatus = 0;
576 status = bdp->cbd_sc;
577 status &= ~BD_ENET_TX_STATS;
579 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
580 bdp->cbd_datlen = size;
582 if (((unsigned long) data) & FEC_ALIGNMENT ||
583 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
584 memcpy(fep->tx_bounce[index], data, size);
585 data = fep->tx_bounce[index];
587 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
588 swap_buffer(data, size);
591 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, data,
592 size, DMA_TO_DEVICE);
593 if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
594 dev_kfree_skb_any(skb);
596 netdev_err(ndev, "Tx DMA memory map failed\n");
597 return NETDEV_TX_BUSY;
600 if (fep->bufdesc_ex) {
601 if (skb->ip_summed == CHECKSUM_PARTIAL)
602 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
604 ebdp->cbd_esc = estatus;
607 /* Handle the last BD specially */
609 status |= (BD_ENET_TX_LAST | BD_ENET_TX_TC);
611 status |= BD_ENET_TX_INTR;
613 ebdp->cbd_esc |= BD_ENET_TX_INT;
616 bdp->cbd_sc = status;
622 fec_enet_txq_put_hdr_tso(struct sk_buff *skb, struct net_device *ndev,
623 struct bufdesc *bdp, int index)
625 struct fec_enet_private *fep = netdev_priv(ndev);
626 const struct platform_device_id *id_entry =
627 platform_get_device_id(fep->pdev);
628 int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
629 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
631 unsigned long dmabuf;
632 unsigned short status;
633 unsigned int estatus = 0;
635 status = bdp->cbd_sc;
636 status &= ~BD_ENET_TX_STATS;
637 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
639 bufaddr = fep->tso_hdrs + index * TSO_HEADER_SIZE;
640 dmabuf = fep->tso_hdrs_dma + index * TSO_HEADER_SIZE;
641 if (((unsigned long) bufaddr) & FEC_ALIGNMENT ||
642 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
643 memcpy(fep->tx_bounce[index], skb->data, hdr_len);
644 bufaddr = fep->tx_bounce[index];
646 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
647 swap_buffer(bufaddr, hdr_len);
649 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr,
650 hdr_len, DMA_TO_DEVICE);
651 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) {
652 dev_kfree_skb_any(skb);
654 netdev_err(ndev, "Tx DMA memory map failed\n");
655 return NETDEV_TX_BUSY;
659 bdp->cbd_bufaddr = dmabuf;
660 bdp->cbd_datlen = hdr_len;
662 if (fep->bufdesc_ex) {
663 if (skb->ip_summed == CHECKSUM_PARTIAL)
664 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
666 ebdp->cbd_esc = estatus;
669 bdp->cbd_sc = status;
674 static int fec_enet_txq_submit_tso(struct sk_buff *skb, struct net_device *ndev)
676 struct fec_enet_private *fep = netdev_priv(ndev);
677 int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
678 int total_len, data_left;
679 struct bufdesc *bdp = fep->cur_tx;
681 unsigned int index = 0;
684 if (tso_count_descs(skb) >= fec_enet_get_free_txdesc_num(fep)) {
685 dev_kfree_skb_any(skb);
687 netdev_err(ndev, "NOT enough BD for TSO!\n");
691 /* Protocol checksum off-load for TCP and UDP. */
692 if (fec_enet_clear_csum(skb, ndev)) {
693 dev_kfree_skb_any(skb);
697 /* Initialize the TSO handler, and prepare the first payload */
698 tso_start(skb, &tso);
700 total_len = skb->len - hdr_len;
701 while (total_len > 0) {
704 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
705 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len);
706 total_len -= data_left;
708 /* prepare packet headers: MAC + IP + TCP */
709 hdr = fep->tso_hdrs + index * TSO_HEADER_SIZE;
710 tso_build_hdr(skb, hdr, &tso, data_left, total_len == 0);
711 ret = fec_enet_txq_put_hdr_tso(skb, ndev, bdp, index);
715 while (data_left > 0) {
718 size = min_t(int, tso.size, data_left);
719 bdp = fec_enet_get_nextdesc(bdp, fep);
720 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
721 ret = fec_enet_txq_put_data_tso(skb, ndev, bdp, index, tso.data,
722 size, size == data_left,
728 tso_build_data(skb, &tso, size);
731 bdp = fec_enet_get_nextdesc(bdp, fep);
734 /* Save skb pointer */
735 fep->tx_skbuff[index] = skb;
737 fec_enet_submit_work(bdp, fep);
739 skb_tx_timestamp(skb);
742 /* Trigger transmission start */
743 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
748 /* TODO: Release all used data descriptors for TSO */
753 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
755 struct fec_enet_private *fep = netdev_priv(ndev);
760 ret = fec_enet_txq_submit_tso(skb, ndev);
762 ret = fec_enet_txq_submit_skb(skb, ndev);
766 entries_free = fec_enet_get_free_txdesc_num(fep);
767 if (entries_free <= fep->tx_stop_threshold)
768 netif_stop_queue(ndev);
773 /* Init RX & TX buffer descriptors
775 static void fec_enet_bd_init(struct net_device *dev)
777 struct fec_enet_private *fep = netdev_priv(dev);
781 /* Initialize the receive buffer descriptors. */
782 bdp = fep->rx_bd_base;
783 for (i = 0; i < fep->rx_ring_size; i++) {
785 /* Initialize the BD for every fragment in the page. */
786 if (bdp->cbd_bufaddr)
787 bdp->cbd_sc = BD_ENET_RX_EMPTY;
790 bdp = fec_enet_get_nextdesc(bdp, fep);
793 /* Set the last buffer to wrap */
794 bdp = fec_enet_get_prevdesc(bdp, fep);
795 bdp->cbd_sc |= BD_SC_WRAP;
797 fep->cur_rx = fep->rx_bd_base;
799 /* ...and the same for transmit */
800 bdp = fep->tx_bd_base;
802 for (i = 0; i < fep->tx_ring_size; i++) {
804 /* Initialize the BD for every fragment in the page. */
806 if (bdp->cbd_bufaddr && fep->tx_skbuff[i]) {
807 dev_kfree_skb_any(fep->tx_skbuff[i]);
808 fep->tx_skbuff[i] = NULL;
810 bdp->cbd_bufaddr = 0;
811 bdp = fec_enet_get_nextdesc(bdp, fep);
814 /* Set the last buffer to wrap */
815 bdp = fec_enet_get_prevdesc(bdp, fep);
816 bdp->cbd_sc |= BD_SC_WRAP;
820 /* This function is called to start or restart the FEC during a link
821 * change. This only happens when switching between half and full
825 fec_restart(struct net_device *ndev, int duplex)
827 struct fec_enet_private *fep = netdev_priv(ndev);
828 const struct platform_device_id *id_entry =
829 platform_get_device_id(fep->pdev);
833 u32 rcntl = OPT_FRAME_SIZE | 0x04;
834 u32 ecntl = 0x2; /* ETHEREN */
836 if (netif_running(ndev)) {
837 netif_device_detach(ndev);
838 napi_disable(&fep->napi);
839 netif_stop_queue(ndev);
840 netif_tx_lock_bh(ndev);
843 /* Whack a reset. We should wait for this. */
844 writel(1, fep->hwp + FEC_ECNTRL);
848 * enet-mac reset will reset mac address registers too,
849 * so need to reconfigure it.
851 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
852 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
853 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
854 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
857 /* Clear any outstanding interrupt. */
858 writel(0xffc00000, fep->hwp + FEC_IEVENT);
860 /* Set maximum receive buffer size. */
861 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
863 fec_enet_bd_init(ndev);
865 /* Set receive and transmit descriptor base. */
866 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
868 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc_ex)
869 * fep->rx_ring_size, fep->hwp + FEC_X_DES_START);
871 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc)
872 * fep->rx_ring_size, fep->hwp + FEC_X_DES_START);
875 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
876 if (fep->tx_skbuff[i]) {
877 dev_kfree_skb_any(fep->tx_skbuff[i]);
878 fep->tx_skbuff[i] = NULL;
882 /* Enable MII mode */
885 writel(0x04, fep->hwp + FEC_X_CNTRL);
889 writel(0x0, fep->hwp + FEC_X_CNTRL);
892 fep->full_duplex = duplex;
895 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
897 #if !defined(CONFIG_M5272)
898 /* set RX checksum */
899 val = readl(fep->hwp + FEC_RACC);
900 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
901 val |= FEC_RACC_OPTIONS;
903 val &= ~FEC_RACC_OPTIONS;
904 writel(val, fep->hwp + FEC_RACC);
908 * The phy interface and speed need to get configured
909 * differently on enet-mac.
911 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
912 /* Enable flow control and length check */
913 rcntl |= 0x40000000 | 0x00000020;
915 /* RGMII, RMII or MII */
916 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
918 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
923 /* 1G, 100M or 10M */
925 if (fep->phy_dev->speed == SPEED_1000)
927 else if (fep->phy_dev->speed == SPEED_100)
933 #ifdef FEC_MIIGSK_ENR
934 if (id_entry->driver_data & FEC_QUIRK_USE_GASKET) {
936 /* disable the gasket and wait */
937 writel(0, fep->hwp + FEC_MIIGSK_ENR);
938 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
942 * configure the gasket:
943 * RMII, 50 MHz, no loopback, no echo
944 * MII, 25 MHz, no loopback, no echo
946 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
947 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
948 if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
949 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
950 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
952 /* re-enable the gasket */
953 writel(2, fep->hwp + FEC_MIIGSK_ENR);
958 #if !defined(CONFIG_M5272)
959 /* enable pause frame*/
960 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||
961 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&
962 fep->phy_dev && fep->phy_dev->pause)) {
963 rcntl |= FEC_ENET_FCE;
965 /* set FIFO threshold parameter to reduce overrun */
966 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
967 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
968 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
969 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
972 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
974 rcntl &= ~FEC_ENET_FCE;
976 #endif /* !defined(CONFIG_M5272) */
978 writel(rcntl, fep->hwp + FEC_R_CNTRL);
980 /* Setup multicast filter. */
981 set_multicast_list(ndev);
983 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
984 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
987 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
988 /* enable ENET endian swap */
990 /* enable ENET store and forward mode */
991 writel(1 << 8, fep->hwp + FEC_X_WMRK);
998 /* Enable the MIB statistic event counters */
999 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
1002 /* And last, enable the transmit and receive processing */
1003 writel(ecntl, fep->hwp + FEC_ECNTRL);
1004 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
1006 if (fep->bufdesc_ex)
1007 fec_ptp_start_cyclecounter(ndev);
1009 /* Enable interrupts we wish to service */
1010 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1012 if (netif_running(ndev)) {
1013 netif_tx_unlock_bh(ndev);
1014 netif_wake_queue(ndev);
1015 napi_enable(&fep->napi);
1016 netif_device_attach(ndev);
1021 fec_stop(struct net_device *ndev)
1023 struct fec_enet_private *fep = netdev_priv(ndev);
1024 const struct platform_device_id *id_entry =
1025 platform_get_device_id(fep->pdev);
1026 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
1028 /* We cannot expect a graceful transmit stop without link !!! */
1030 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
1032 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
1033 netdev_err(ndev, "Graceful transmit stop did not complete!\n");
1036 /* Whack a reset. We should wait for this. */
1037 writel(1, fep->hwp + FEC_ECNTRL);
1039 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1040 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1042 /* We have to keep ENET enabled to have MII interrupt stay working */
1043 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
1044 writel(2, fep->hwp + FEC_ECNTRL);
1045 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
1051 fec_timeout(struct net_device *ndev)
1053 struct fec_enet_private *fep = netdev_priv(ndev);
1055 ndev->stats.tx_errors++;
1057 fep->delay_work.timeout = true;
1058 schedule_delayed_work(&(fep->delay_work.delay_work), 0);
1061 static void fec_enet_work(struct work_struct *work)
1063 struct fec_enet_private *fep =
1065 struct fec_enet_private,
1066 delay_work.delay_work.work);
1068 if (fep->delay_work.timeout) {
1069 fep->delay_work.timeout = false;
1070 fec_restart(fep->netdev, fep->full_duplex);
1071 netif_wake_queue(fep->netdev);
1074 if (fep->delay_work.trig_tx) {
1075 fep->delay_work.trig_tx = false;
1076 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
1081 fec_enet_tx(struct net_device *ndev)
1083 struct fec_enet_private *fep;
1084 struct bufdesc *bdp;
1085 unsigned short status;
1086 struct sk_buff *skb;
1090 fep = netdev_priv(ndev);
1091 bdp = fep->dirty_tx;
1093 /* get next bdp of dirty_tx */
1094 bdp = fec_enet_get_nextdesc(bdp, fep);
1096 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
1098 /* current queue is empty */
1099 if (bdp == fep->cur_tx)
1102 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
1104 skb = fep->tx_skbuff[index];
1105 if (!IS_TSO_HEADER(fep, bdp->cbd_bufaddr))
1106 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1107 bdp->cbd_datlen, DMA_TO_DEVICE);
1108 bdp->cbd_bufaddr = 0;
1110 bdp = fec_enet_get_nextdesc(bdp, fep);
1114 /* Check for errors. */
1115 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
1116 BD_ENET_TX_RL | BD_ENET_TX_UN |
1118 ndev->stats.tx_errors++;
1119 if (status & BD_ENET_TX_HB) /* No heartbeat */
1120 ndev->stats.tx_heartbeat_errors++;
1121 if (status & BD_ENET_TX_LC) /* Late collision */
1122 ndev->stats.tx_window_errors++;
1123 if (status & BD_ENET_TX_RL) /* Retrans limit */
1124 ndev->stats.tx_aborted_errors++;
1125 if (status & BD_ENET_TX_UN) /* Underrun */
1126 ndev->stats.tx_fifo_errors++;
1127 if (status & BD_ENET_TX_CSL) /* Carrier lost */
1128 ndev->stats.tx_carrier_errors++;
1130 ndev->stats.tx_packets++;
1131 ndev->stats.tx_bytes += skb->len;
1134 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
1136 struct skb_shared_hwtstamps shhwtstamps;
1137 unsigned long flags;
1138 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1140 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1141 spin_lock_irqsave(&fep->tmreg_lock, flags);
1142 shhwtstamps.hwtstamp = ns_to_ktime(
1143 timecounter_cyc2time(&fep->tc, ebdp->ts));
1144 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
1145 skb_tstamp_tx(skb, &shhwtstamps);
1148 if (status & BD_ENET_TX_READY)
1149 netdev_err(ndev, "HEY! Enet xmit interrupt and TX_READY\n");
1151 /* Deferred means some collisions occurred during transmit,
1152 * but we eventually sent the packet OK.
1154 if (status & BD_ENET_TX_DEF)
1155 ndev->stats.collisions++;
1157 /* Free the sk buffer associated with this last transmit */
1158 dev_kfree_skb_any(skb);
1159 fep->tx_skbuff[index] = NULL;
1161 fep->dirty_tx = bdp;
1163 /* Update pointer to next buffer descriptor to be transmitted */
1164 bdp = fec_enet_get_nextdesc(bdp, fep);
1166 /* Since we have freed up a buffer, the ring is no longer full
1168 if (netif_queue_stopped(ndev)) {
1169 entries_free = fec_enet_get_free_txdesc_num(fep);
1170 if (entries_free >= fep->tx_wake_threshold)
1171 netif_wake_queue(ndev);
1177 /* During a receive, the cur_rx points to the current incoming buffer.
1178 * When we update through the ring, if the next incoming buffer has
1179 * not been given to the system, we just set the empty indicator,
1180 * effectively tossing the packet.
1183 fec_enet_rx(struct net_device *ndev, int budget)
1185 struct fec_enet_private *fep = netdev_priv(ndev);
1186 const struct platform_device_id *id_entry =
1187 platform_get_device_id(fep->pdev);
1188 struct bufdesc *bdp;
1189 unsigned short status;
1190 struct sk_buff *skb;
1193 int pkt_received = 0;
1194 struct bufdesc_ex *ebdp = NULL;
1195 bool vlan_packet_rcvd = false;
1203 /* First, grab all of the stats for the incoming packet.
1204 * These get messed up if we get called due to a busy condition.
1208 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
1210 if (pkt_received >= budget)
1214 /* Since we have allocated space to hold a complete frame,
1215 * the last indicator should be set.
1217 if ((status & BD_ENET_RX_LAST) == 0)
1218 netdev_err(ndev, "rcv is not +last\n");
1221 goto rx_processing_done;
1223 /* Check for errors. */
1224 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
1225 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
1226 ndev->stats.rx_errors++;
1227 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
1228 /* Frame too long or too short. */
1229 ndev->stats.rx_length_errors++;
1231 if (status & BD_ENET_RX_NO) /* Frame alignment */
1232 ndev->stats.rx_frame_errors++;
1233 if (status & BD_ENET_RX_CR) /* CRC Error */
1234 ndev->stats.rx_crc_errors++;
1235 if (status & BD_ENET_RX_OV) /* FIFO overrun */
1236 ndev->stats.rx_fifo_errors++;
1239 /* Report late collisions as a frame error.
1240 * On this error, the BD is closed, but we don't know what we
1241 * have in the buffer. So, just drop this frame on the floor.
1243 if (status & BD_ENET_RX_CL) {
1244 ndev->stats.rx_errors++;
1245 ndev->stats.rx_frame_errors++;
1246 goto rx_processing_done;
1249 /* Process the incoming frame. */
1250 ndev->stats.rx_packets++;
1251 pkt_len = bdp->cbd_datlen;
1252 ndev->stats.rx_bytes += pkt_len;
1254 index = fec_enet_get_bd_index(fep->rx_bd_base, bdp, fep);
1255 data = fep->rx_skbuff[index]->data;
1256 dma_sync_single_for_cpu(&fep->pdev->dev, bdp->cbd_bufaddr,
1257 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1259 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
1260 swap_buffer(data, pkt_len);
1262 /* Extract the enhanced buffer descriptor */
1264 if (fep->bufdesc_ex)
1265 ebdp = (struct bufdesc_ex *)bdp;
1267 /* If this is a VLAN packet remove the VLAN Tag */
1268 vlan_packet_rcvd = false;
1269 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1270 fep->bufdesc_ex && (ebdp->cbd_esc & BD_ENET_RX_VLAN)) {
1271 /* Push and remove the vlan tag */
1272 struct vlan_hdr *vlan_header =
1273 (struct vlan_hdr *) (data + ETH_HLEN);
1274 vlan_tag = ntohs(vlan_header->h_vlan_TCI);
1275 pkt_len -= VLAN_HLEN;
1277 vlan_packet_rcvd = true;
1280 /* This does 16 byte alignment, exactly what we need.
1281 * The packet length includes FCS, but we don't want to
1282 * include that when passing upstream as it messes up
1283 * bridging applications.
1285 skb = netdev_alloc_skb(ndev, pkt_len - 4 + NET_IP_ALIGN);
1287 if (unlikely(!skb)) {
1288 ndev->stats.rx_dropped++;
1290 int payload_offset = (2 * ETH_ALEN);
1291 skb_reserve(skb, NET_IP_ALIGN);
1292 skb_put(skb, pkt_len - 4); /* Make room */
1294 /* Extract the frame data without the VLAN header. */
1295 skb_copy_to_linear_data(skb, data, (2 * ETH_ALEN));
1296 if (vlan_packet_rcvd)
1297 payload_offset = (2 * ETH_ALEN) + VLAN_HLEN;
1298 skb_copy_to_linear_data_offset(skb, (2 * ETH_ALEN),
1299 data + payload_offset,
1300 pkt_len - 4 - (2 * ETH_ALEN));
1302 skb->protocol = eth_type_trans(skb, ndev);
1304 /* Get receive timestamp from the skb */
1305 if (fep->hwts_rx_en && fep->bufdesc_ex) {
1306 struct skb_shared_hwtstamps *shhwtstamps =
1308 unsigned long flags;
1310 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
1312 spin_lock_irqsave(&fep->tmreg_lock, flags);
1313 shhwtstamps->hwtstamp = ns_to_ktime(
1314 timecounter_cyc2time(&fep->tc, ebdp->ts));
1315 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
1318 if (fep->bufdesc_ex &&
1319 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) {
1320 if (!(ebdp->cbd_esc & FLAG_RX_CSUM_ERROR)) {
1321 /* don't check it */
1322 skb->ip_summed = CHECKSUM_UNNECESSARY;
1324 skb_checksum_none_assert(skb);
1328 /* Handle received VLAN packets */
1329 if (vlan_packet_rcvd)
1330 __vlan_hwaccel_put_tag(skb,
1334 napi_gro_receive(&fep->napi, skb);
1337 dma_sync_single_for_device(&fep->pdev->dev, bdp->cbd_bufaddr,
1338 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1340 /* Clear the status flags for this buffer */
1341 status &= ~BD_ENET_RX_STATS;
1343 /* Mark the buffer empty */
1344 status |= BD_ENET_RX_EMPTY;
1345 bdp->cbd_sc = status;
1347 if (fep->bufdesc_ex) {
1348 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1350 ebdp->cbd_esc = BD_ENET_RX_INT;
1355 /* Update BD pointer to next entry */
1356 bdp = fec_enet_get_nextdesc(bdp, fep);
1358 /* Doing this here will keep the FEC running while we process
1359 * incoming frames. On a heavily loaded network, we should be
1360 * able to keep up at the expense of system resources.
1362 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
1366 return pkt_received;
1370 fec_enet_interrupt(int irq, void *dev_id)
1372 struct net_device *ndev = dev_id;
1373 struct fec_enet_private *fep = netdev_priv(ndev);
1375 irqreturn_t ret = IRQ_NONE;
1378 int_events = readl(fep->hwp + FEC_IEVENT);
1379 writel(int_events, fep->hwp + FEC_IEVENT);
1381 if (int_events & (FEC_ENET_RXF | FEC_ENET_TXF)) {
1384 /* Disable the RX interrupt */
1385 if (napi_schedule_prep(&fep->napi)) {
1386 writel(FEC_RX_DISABLED_IMASK,
1387 fep->hwp + FEC_IMASK);
1388 __napi_schedule(&fep->napi);
1392 if (int_events & FEC_ENET_MII) {
1394 complete(&fep->mdio_done);
1396 } while (int_events);
1401 static int fec_enet_rx_napi(struct napi_struct *napi, int budget)
1403 struct net_device *ndev = napi->dev;
1404 int pkts = fec_enet_rx(ndev, budget);
1405 struct fec_enet_private *fep = netdev_priv(ndev);
1409 if (pkts < budget) {
1410 napi_complete(napi);
1411 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1416 /* ------------------------------------------------------------------------- */
1417 static void fec_get_mac(struct net_device *ndev)
1419 struct fec_enet_private *fep = netdev_priv(ndev);
1420 struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev);
1421 unsigned char *iap, tmpaddr[ETH_ALEN];
1424 * try to get mac address in following order:
1426 * 1) module parameter via kernel command line in form
1427 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
1432 * 2) from device tree data
1434 if (!is_valid_ether_addr(iap)) {
1435 struct device_node *np = fep->pdev->dev.of_node;
1437 const char *mac = of_get_mac_address(np);
1439 iap = (unsigned char *) mac;
1444 * 3) from flash or fuse (via platform data)
1446 if (!is_valid_ether_addr(iap)) {
1449 iap = (unsigned char *)FEC_FLASHMAC;
1452 iap = (unsigned char *)&pdata->mac;
1457 * 4) FEC mac registers set by bootloader
1459 if (!is_valid_ether_addr(iap)) {
1460 *((__be32 *) &tmpaddr[0]) =
1461 cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW));
1462 *((__be16 *) &tmpaddr[4]) =
1463 cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
1468 * 5) random mac address
1470 if (!is_valid_ether_addr(iap)) {
1471 /* Report it and use a random ethernet address instead */
1472 netdev_err(ndev, "Invalid MAC address: %pM\n", iap);
1473 eth_hw_addr_random(ndev);
1474 netdev_info(ndev, "Using random MAC address: %pM\n",
1479 memcpy(ndev->dev_addr, iap, ETH_ALEN);
1481 /* Adjust MAC if using macaddr */
1483 ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
1486 /* ------------------------------------------------------------------------- */
1491 static void fec_enet_adjust_link(struct net_device *ndev)
1493 struct fec_enet_private *fep = netdev_priv(ndev);
1494 struct phy_device *phy_dev = fep->phy_dev;
1495 int status_change = 0;
1497 /* Prevent a state halted on mii error */
1498 if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
1499 phy_dev->state = PHY_RESUMING;
1503 if (phy_dev->link) {
1505 fep->link = phy_dev->link;
1509 if (fep->full_duplex != phy_dev->duplex)
1512 if (phy_dev->speed != fep->speed) {
1513 fep->speed = phy_dev->speed;
1517 /* if any of the above changed restart the FEC */
1519 fec_restart(ndev, phy_dev->duplex);
1523 fep->link = phy_dev->link;
1529 phy_print_status(phy_dev);
1532 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
1534 struct fec_enet_private *fep = bus->priv;
1535 unsigned long time_left;
1537 fep->mii_timeout = 0;
1538 init_completion(&fep->mdio_done);
1540 /* start a read op */
1541 writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
1542 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1543 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
1545 /* wait for end of transfer */
1546 time_left = wait_for_completion_timeout(&fep->mdio_done,
1547 usecs_to_jiffies(FEC_MII_TIMEOUT));
1548 if (time_left == 0) {
1549 fep->mii_timeout = 1;
1550 netdev_err(fep->netdev, "MDIO read timeout\n");
1555 return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
1558 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
1561 struct fec_enet_private *fep = bus->priv;
1562 unsigned long time_left;
1564 fep->mii_timeout = 0;
1565 init_completion(&fep->mdio_done);
1567 /* start a write op */
1568 writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1569 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1570 FEC_MMFR_TA | FEC_MMFR_DATA(value),
1571 fep->hwp + FEC_MII_DATA);
1573 /* wait for end of transfer */
1574 time_left = wait_for_completion_timeout(&fep->mdio_done,
1575 usecs_to_jiffies(FEC_MII_TIMEOUT));
1576 if (time_left == 0) {
1577 fep->mii_timeout = 1;
1578 netdev_err(fep->netdev, "MDIO write timeout\n");
1585 static int fec_enet_clk_enable(struct net_device *ndev, bool enable)
1587 struct fec_enet_private *fep = netdev_priv(ndev);
1591 ret = clk_prepare_enable(fep->clk_ahb);
1594 ret = clk_prepare_enable(fep->clk_ipg);
1596 goto failed_clk_ipg;
1597 if (fep->clk_enet_out) {
1598 ret = clk_prepare_enable(fep->clk_enet_out);
1600 goto failed_clk_enet_out;
1603 ret = clk_prepare_enable(fep->clk_ptp);
1605 goto failed_clk_ptp;
1608 clk_disable_unprepare(fep->clk_ahb);
1609 clk_disable_unprepare(fep->clk_ipg);
1610 if (fep->clk_enet_out)
1611 clk_disable_unprepare(fep->clk_enet_out);
1613 clk_disable_unprepare(fep->clk_ptp);
1618 if (fep->clk_enet_out)
1619 clk_disable_unprepare(fep->clk_enet_out);
1620 failed_clk_enet_out:
1621 clk_disable_unprepare(fep->clk_ipg);
1623 clk_disable_unprepare(fep->clk_ahb);
1628 static int fec_enet_mii_probe(struct net_device *ndev)
1630 struct fec_enet_private *fep = netdev_priv(ndev);
1631 const struct platform_device_id *id_entry =
1632 platform_get_device_id(fep->pdev);
1633 struct phy_device *phy_dev = NULL;
1634 char mdio_bus_id[MII_BUS_ID_SIZE];
1635 char phy_name[MII_BUS_ID_SIZE + 3];
1637 int dev_id = fep->dev_id;
1639 fep->phy_dev = NULL;
1641 /* check for attached phy */
1642 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
1643 if ((fep->mii_bus->phy_mask & (1 << phy_id)))
1645 if (fep->mii_bus->phy_map[phy_id] == NULL)
1647 if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
1651 strncpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1655 if (phy_id >= PHY_MAX_ADDR) {
1656 netdev_info(ndev, "no PHY, assuming direct connection to switch\n");
1657 strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1661 snprintf(phy_name, sizeof(phy_name), PHY_ID_FMT, mdio_bus_id, phy_id);
1662 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link,
1663 fep->phy_interface);
1664 if (IS_ERR(phy_dev)) {
1665 netdev_err(ndev, "could not attach to PHY\n");
1666 return PTR_ERR(phy_dev);
1669 /* mask with MAC supported features */
1670 if (id_entry->driver_data & FEC_QUIRK_HAS_GBIT) {
1671 phy_dev->supported &= PHY_GBIT_FEATURES;
1672 #if !defined(CONFIG_M5272)
1673 phy_dev->supported |= SUPPORTED_Pause;
1677 phy_dev->supported &= PHY_BASIC_FEATURES;
1679 phy_dev->advertising = phy_dev->supported;
1681 fep->phy_dev = phy_dev;
1683 fep->full_duplex = 0;
1685 netdev_info(ndev, "Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1686 fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1692 static int fec_enet_mii_init(struct platform_device *pdev)
1694 static struct mii_bus *fec0_mii_bus;
1695 struct net_device *ndev = platform_get_drvdata(pdev);
1696 struct fec_enet_private *fep = netdev_priv(ndev);
1697 const struct platform_device_id *id_entry =
1698 platform_get_device_id(fep->pdev);
1699 int err = -ENXIO, i;
1702 * The dual fec interfaces are not equivalent with enet-mac.
1703 * Here are the differences:
1705 * - fec0 supports MII & RMII modes while fec1 only supports RMII
1706 * - fec0 acts as the 1588 time master while fec1 is slave
1707 * - external phys can only be configured by fec0
1709 * That is to say fec1 can not work independently. It only works
1710 * when fec0 is working. The reason behind this design is that the
1711 * second interface is added primarily for Switch mode.
1713 * Because of the last point above, both phys are attached on fec0
1714 * mdio interface in board design, and need to be configured by
1717 if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
1718 /* fec1 uses fec0 mii_bus */
1719 if (mii_cnt && fec0_mii_bus) {
1720 fep->mii_bus = fec0_mii_bus;
1727 fep->mii_timeout = 0;
1730 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
1732 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
1733 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
1734 * Reference Manual has an error on this, and gets fixed on i.MX6Q
1737 fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
1738 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1740 fep->phy_speed <<= 1;
1741 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1743 fep->mii_bus = mdiobus_alloc();
1744 if (fep->mii_bus == NULL) {
1749 fep->mii_bus->name = "fec_enet_mii_bus";
1750 fep->mii_bus->read = fec_enet_mdio_read;
1751 fep->mii_bus->write = fec_enet_mdio_write;
1752 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1753 pdev->name, fep->dev_id + 1);
1754 fep->mii_bus->priv = fep;
1755 fep->mii_bus->parent = &pdev->dev;
1757 fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
1758 if (!fep->mii_bus->irq) {
1760 goto err_out_free_mdiobus;
1763 for (i = 0; i < PHY_MAX_ADDR; i++)
1764 fep->mii_bus->irq[i] = PHY_POLL;
1766 if (mdiobus_register(fep->mii_bus))
1767 goto err_out_free_mdio_irq;
1771 /* save fec0 mii_bus */
1772 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1773 fec0_mii_bus = fep->mii_bus;
1777 err_out_free_mdio_irq:
1778 kfree(fep->mii_bus->irq);
1779 err_out_free_mdiobus:
1780 mdiobus_free(fep->mii_bus);
1785 static void fec_enet_mii_remove(struct fec_enet_private *fep)
1787 if (--mii_cnt == 0) {
1788 mdiobus_unregister(fep->mii_bus);
1789 kfree(fep->mii_bus->irq);
1790 mdiobus_free(fep->mii_bus);
1794 static int fec_enet_get_settings(struct net_device *ndev,
1795 struct ethtool_cmd *cmd)
1797 struct fec_enet_private *fep = netdev_priv(ndev);
1798 struct phy_device *phydev = fep->phy_dev;
1803 return phy_ethtool_gset(phydev, cmd);
1806 static int fec_enet_set_settings(struct net_device *ndev,
1807 struct ethtool_cmd *cmd)
1809 struct fec_enet_private *fep = netdev_priv(ndev);
1810 struct phy_device *phydev = fep->phy_dev;
1815 return phy_ethtool_sset(phydev, cmd);
1818 static void fec_enet_get_drvinfo(struct net_device *ndev,
1819 struct ethtool_drvinfo *info)
1821 struct fec_enet_private *fep = netdev_priv(ndev);
1823 strlcpy(info->driver, fep->pdev->dev.driver->name,
1824 sizeof(info->driver));
1825 strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
1826 strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
1829 static int fec_enet_get_ts_info(struct net_device *ndev,
1830 struct ethtool_ts_info *info)
1832 struct fec_enet_private *fep = netdev_priv(ndev);
1834 if (fep->bufdesc_ex) {
1836 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1837 SOF_TIMESTAMPING_RX_SOFTWARE |
1838 SOF_TIMESTAMPING_SOFTWARE |
1839 SOF_TIMESTAMPING_TX_HARDWARE |
1840 SOF_TIMESTAMPING_RX_HARDWARE |
1841 SOF_TIMESTAMPING_RAW_HARDWARE;
1843 info->phc_index = ptp_clock_index(fep->ptp_clock);
1845 info->phc_index = -1;
1847 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1848 (1 << HWTSTAMP_TX_ON);
1850 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1851 (1 << HWTSTAMP_FILTER_ALL);
1854 return ethtool_op_get_ts_info(ndev, info);
1858 #if !defined(CONFIG_M5272)
1860 static void fec_enet_get_pauseparam(struct net_device *ndev,
1861 struct ethtool_pauseparam *pause)
1863 struct fec_enet_private *fep = netdev_priv(ndev);
1865 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0;
1866 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0;
1867 pause->rx_pause = pause->tx_pause;
1870 static int fec_enet_set_pauseparam(struct net_device *ndev,
1871 struct ethtool_pauseparam *pause)
1873 struct fec_enet_private *fep = netdev_priv(ndev);
1875 if (pause->tx_pause != pause->rx_pause) {
1877 "hardware only support enable/disable both tx and rx");
1881 fep->pause_flag = 0;
1883 /* tx pause must be same as rx pause */
1884 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
1885 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
1887 if (pause->rx_pause || pause->autoneg) {
1888 fep->phy_dev->supported |= ADVERTISED_Pause;
1889 fep->phy_dev->advertising |= ADVERTISED_Pause;
1891 fep->phy_dev->supported &= ~ADVERTISED_Pause;
1892 fep->phy_dev->advertising &= ~ADVERTISED_Pause;
1895 if (pause->autoneg) {
1896 if (netif_running(ndev))
1898 phy_start_aneg(fep->phy_dev);
1900 if (netif_running(ndev))
1901 fec_restart(ndev, 0);
1906 static const struct fec_stat {
1907 char name[ETH_GSTRING_LEN];
1911 { "tx_dropped", RMON_T_DROP },
1912 { "tx_packets", RMON_T_PACKETS },
1913 { "tx_broadcast", RMON_T_BC_PKT },
1914 { "tx_multicast", RMON_T_MC_PKT },
1915 { "tx_crc_errors", RMON_T_CRC_ALIGN },
1916 { "tx_undersize", RMON_T_UNDERSIZE },
1917 { "tx_oversize", RMON_T_OVERSIZE },
1918 { "tx_fragment", RMON_T_FRAG },
1919 { "tx_jabber", RMON_T_JAB },
1920 { "tx_collision", RMON_T_COL },
1921 { "tx_64byte", RMON_T_P64 },
1922 { "tx_65to127byte", RMON_T_P65TO127 },
1923 { "tx_128to255byte", RMON_T_P128TO255 },
1924 { "tx_256to511byte", RMON_T_P256TO511 },
1925 { "tx_512to1023byte", RMON_T_P512TO1023 },
1926 { "tx_1024to2047byte", RMON_T_P1024TO2047 },
1927 { "tx_GTE2048byte", RMON_T_P_GTE2048 },
1928 { "tx_octets", RMON_T_OCTETS },
1931 { "IEEE_tx_drop", IEEE_T_DROP },
1932 { "IEEE_tx_frame_ok", IEEE_T_FRAME_OK },
1933 { "IEEE_tx_1col", IEEE_T_1COL },
1934 { "IEEE_tx_mcol", IEEE_T_MCOL },
1935 { "IEEE_tx_def", IEEE_T_DEF },
1936 { "IEEE_tx_lcol", IEEE_T_LCOL },
1937 { "IEEE_tx_excol", IEEE_T_EXCOL },
1938 { "IEEE_tx_macerr", IEEE_T_MACERR },
1939 { "IEEE_tx_cserr", IEEE_T_CSERR },
1940 { "IEEE_tx_sqe", IEEE_T_SQE },
1941 { "IEEE_tx_fdxfc", IEEE_T_FDXFC },
1942 { "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK },
1945 { "rx_packets", RMON_R_PACKETS },
1946 { "rx_broadcast", RMON_R_BC_PKT },
1947 { "rx_multicast", RMON_R_MC_PKT },
1948 { "rx_crc_errors", RMON_R_CRC_ALIGN },
1949 { "rx_undersize", RMON_R_UNDERSIZE },
1950 { "rx_oversize", RMON_R_OVERSIZE },
1951 { "rx_fragment", RMON_R_FRAG },
1952 { "rx_jabber", RMON_R_JAB },
1953 { "rx_64byte", RMON_R_P64 },
1954 { "rx_65to127byte", RMON_R_P65TO127 },
1955 { "rx_128to255byte", RMON_R_P128TO255 },
1956 { "rx_256to511byte", RMON_R_P256TO511 },
1957 { "rx_512to1023byte", RMON_R_P512TO1023 },
1958 { "rx_1024to2047byte", RMON_R_P1024TO2047 },
1959 { "rx_GTE2048byte", RMON_R_P_GTE2048 },
1960 { "rx_octets", RMON_R_OCTETS },
1963 { "IEEE_rx_drop", IEEE_R_DROP },
1964 { "IEEE_rx_frame_ok", IEEE_R_FRAME_OK },
1965 { "IEEE_rx_crc", IEEE_R_CRC },
1966 { "IEEE_rx_align", IEEE_R_ALIGN },
1967 { "IEEE_rx_macerr", IEEE_R_MACERR },
1968 { "IEEE_rx_fdxfc", IEEE_R_FDXFC },
1969 { "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK },
1972 static void fec_enet_get_ethtool_stats(struct net_device *dev,
1973 struct ethtool_stats *stats, u64 *data)
1975 struct fec_enet_private *fep = netdev_priv(dev);
1978 for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
1979 data[i] = readl(fep->hwp + fec_stats[i].offset);
1982 static void fec_enet_get_strings(struct net_device *netdev,
1983 u32 stringset, u8 *data)
1986 switch (stringset) {
1988 for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
1989 memcpy(data + i * ETH_GSTRING_LEN,
1990 fec_stats[i].name, ETH_GSTRING_LEN);
1995 static int fec_enet_get_sset_count(struct net_device *dev, int sset)
1999 return ARRAY_SIZE(fec_stats);
2004 #endif /* !defined(CONFIG_M5272) */
2006 static int fec_enet_nway_reset(struct net_device *dev)
2008 struct fec_enet_private *fep = netdev_priv(dev);
2009 struct phy_device *phydev = fep->phy_dev;
2014 return genphy_restart_aneg(phydev);
2017 static const struct ethtool_ops fec_enet_ethtool_ops = {
2018 #if !defined(CONFIG_M5272)
2019 .get_pauseparam = fec_enet_get_pauseparam,
2020 .set_pauseparam = fec_enet_set_pauseparam,
2022 .get_settings = fec_enet_get_settings,
2023 .set_settings = fec_enet_set_settings,
2024 .get_drvinfo = fec_enet_get_drvinfo,
2025 .get_link = ethtool_op_get_link,
2026 .get_ts_info = fec_enet_get_ts_info,
2027 .nway_reset = fec_enet_nway_reset,
2028 #ifndef CONFIG_M5272
2029 .get_ethtool_stats = fec_enet_get_ethtool_stats,
2030 .get_strings = fec_enet_get_strings,
2031 .get_sset_count = fec_enet_get_sset_count,
2035 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2037 struct fec_enet_private *fep = netdev_priv(ndev);
2038 struct phy_device *phydev = fep->phy_dev;
2040 if (!netif_running(ndev))
2046 if (fep->bufdesc_ex) {
2047 if (cmd == SIOCSHWTSTAMP)
2048 return fec_ptp_set(ndev, rq);
2049 if (cmd == SIOCGHWTSTAMP)
2050 return fec_ptp_get(ndev, rq);
2053 return phy_mii_ioctl(phydev, rq, cmd);
2056 static void fec_enet_free_buffers(struct net_device *ndev)
2058 struct fec_enet_private *fep = netdev_priv(ndev);
2060 struct sk_buff *skb;
2061 struct bufdesc *bdp;
2063 bdp = fep->rx_bd_base;
2064 for (i = 0; i < fep->rx_ring_size; i++) {
2065 skb = fep->rx_skbuff[i];
2067 if (bdp->cbd_bufaddr)
2068 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
2069 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
2072 bdp = fec_enet_get_nextdesc(bdp, fep);
2075 bdp = fep->tx_bd_base;
2076 for (i = 0; i < fep->tx_ring_size; i++)
2077 kfree(fep->tx_bounce[i]);
2080 static int fec_enet_alloc_buffers(struct net_device *ndev)
2082 struct fec_enet_private *fep = netdev_priv(ndev);
2084 struct sk_buff *skb;
2085 struct bufdesc *bdp;
2087 bdp = fep->rx_bd_base;
2088 for (i = 0; i < fep->rx_ring_size; i++) {
2089 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
2091 fec_enet_free_buffers(ndev);
2094 fep->rx_skbuff[i] = skb;
2096 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
2097 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
2098 if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
2099 fec_enet_free_buffers(ndev);
2100 if (net_ratelimit())
2101 netdev_err(ndev, "Rx DMA memory map failed\n");
2104 bdp->cbd_sc = BD_ENET_RX_EMPTY;
2106 if (fep->bufdesc_ex) {
2107 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2108 ebdp->cbd_esc = BD_ENET_RX_INT;
2111 bdp = fec_enet_get_nextdesc(bdp, fep);
2114 /* Set the last buffer to wrap. */
2115 bdp = fec_enet_get_prevdesc(bdp, fep);
2116 bdp->cbd_sc |= BD_SC_WRAP;
2118 bdp = fep->tx_bd_base;
2119 for (i = 0; i < fep->tx_ring_size; i++) {
2120 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
2123 bdp->cbd_bufaddr = 0;
2125 if (fep->bufdesc_ex) {
2126 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2127 ebdp->cbd_esc = BD_ENET_TX_INT;
2130 bdp = fec_enet_get_nextdesc(bdp, fep);
2133 /* Set the last buffer to wrap. */
2134 bdp = fec_enet_get_prevdesc(bdp, fep);
2135 bdp->cbd_sc |= BD_SC_WRAP;
2141 fec_enet_open(struct net_device *ndev)
2143 struct fec_enet_private *fep = netdev_priv(ndev);
2146 pinctrl_pm_select_default_state(&fep->pdev->dev);
2147 ret = fec_enet_clk_enable(ndev, true);
2151 /* I should reset the ring buffers here, but I don't yet know
2152 * a simple way to do that.
2155 ret = fec_enet_alloc_buffers(ndev);
2159 /* Probe and connect to PHY when open the interface */
2160 ret = fec_enet_mii_probe(ndev);
2162 fec_enet_free_buffers(ndev);
2166 napi_enable(&fep->napi);
2167 phy_start(fep->phy_dev);
2168 netif_start_queue(ndev);
2172 fec_reset_phy(fep->pdev);
2178 fec_enet_close(struct net_device *ndev)
2180 struct fec_enet_private *fep = netdev_priv(ndev);
2182 /* Don't know what to do yet. */
2183 napi_disable(&fep->napi);
2185 netif_stop_queue(ndev);
2189 phy_stop(fep->phy_dev);
2190 phy_disconnect(fep->phy_dev);
2193 fec_enet_clk_enable(ndev, false);
2194 pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2195 fec_enet_free_buffers(ndev);
2196 fec_free_reset_gpio(fep->pdev);
2201 /* Set or clear the multicast filter for this adaptor.
2202 * Skeleton taken from sunlance driver.
2203 * The CPM Ethernet implementation allows Multicast as well as individual
2204 * MAC address filtering. Some of the drivers check to make sure it is
2205 * a group multicast address, and discard those that are not. I guess I
2206 * will do the same for now, but just remove the test if you want
2207 * individual filtering as well (do the upper net layers want or support
2208 * this kind of feature?).
2211 #define HASH_BITS 6 /* #bits in hash */
2212 #define CRC32_POLY 0xEDB88320
2214 static void set_multicast_list(struct net_device *ndev)
2216 struct fec_enet_private *fep = netdev_priv(ndev);
2217 struct netdev_hw_addr *ha;
2218 unsigned int i, bit, data, crc, tmp;
2221 if (ndev->flags & IFF_PROMISC) {
2222 tmp = readl(fep->hwp + FEC_R_CNTRL);
2224 writel(tmp, fep->hwp + FEC_R_CNTRL);
2228 tmp = readl(fep->hwp + FEC_R_CNTRL);
2230 writel(tmp, fep->hwp + FEC_R_CNTRL);
2232 if (ndev->flags & IFF_ALLMULTI) {
2233 /* Catch all multicast addresses, so set the
2236 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2237 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2242 /* Clear filter and add the addresses in hash register
2244 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2245 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2247 netdev_for_each_mc_addr(ha, ndev) {
2248 /* calculate crc32 value of mac address */
2251 for (i = 0; i < ndev->addr_len; i++) {
2253 for (bit = 0; bit < 8; bit++, data >>= 1) {
2255 (((crc ^ data) & 1) ? CRC32_POLY : 0);
2259 /* only upper 6 bits (HASH_BITS) are used
2260 * which point to specific bit in he hash registers
2262 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
2265 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2266 tmp |= 1 << (hash - 32);
2267 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2269 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2271 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2276 /* Set a MAC change in hardware. */
2278 fec_set_mac_address(struct net_device *ndev, void *p)
2280 struct fec_enet_private *fep = netdev_priv(ndev);
2281 struct sockaddr *addr = p;
2284 if (!is_valid_ether_addr(addr->sa_data))
2285 return -EADDRNOTAVAIL;
2286 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
2289 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
2290 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
2291 fep->hwp + FEC_ADDR_LOW);
2292 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
2293 fep->hwp + FEC_ADDR_HIGH);
2297 #ifdef CONFIG_NET_POLL_CONTROLLER
2299 * fec_poll_controller - FEC Poll controller function
2300 * @dev: The FEC network adapter
2302 * Polled functionality used by netconsole and others in non interrupt mode
2305 static void fec_poll_controller(struct net_device *dev)
2308 struct fec_enet_private *fep = netdev_priv(dev);
2310 for (i = 0; i < FEC_IRQ_NUM; i++) {
2311 if (fep->irq[i] > 0) {
2312 disable_irq(fep->irq[i]);
2313 fec_enet_interrupt(fep->irq[i], dev);
2314 enable_irq(fep->irq[i]);
2320 static int fec_set_features(struct net_device *netdev,
2321 netdev_features_t features)
2323 struct fec_enet_private *fep = netdev_priv(netdev);
2324 netdev_features_t changed = features ^ netdev->features;
2326 netdev->features = features;
2328 /* Receive checksum has been changed */
2329 if (changed & NETIF_F_RXCSUM) {
2330 if (features & NETIF_F_RXCSUM)
2331 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
2333 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED;
2335 if (netif_running(netdev)) {
2337 fec_restart(netdev, fep->phy_dev->duplex);
2338 netif_wake_queue(netdev);
2340 fec_restart(netdev, fep->phy_dev->duplex);
2347 static const struct net_device_ops fec_netdev_ops = {
2348 .ndo_open = fec_enet_open,
2349 .ndo_stop = fec_enet_close,
2350 .ndo_start_xmit = fec_enet_start_xmit,
2351 .ndo_set_rx_mode = set_multicast_list,
2352 .ndo_change_mtu = eth_change_mtu,
2353 .ndo_validate_addr = eth_validate_addr,
2354 .ndo_tx_timeout = fec_timeout,
2355 .ndo_set_mac_address = fec_set_mac_address,
2356 .ndo_do_ioctl = fec_enet_ioctl,
2357 #ifdef CONFIG_NET_POLL_CONTROLLER
2358 .ndo_poll_controller = fec_poll_controller,
2360 .ndo_set_features = fec_set_features,
2364 * XXX: We need to clean up on failure exits here.
2367 static int fec_enet_init(struct net_device *ndev)
2369 struct fec_enet_private *fep = netdev_priv(ndev);
2370 const struct platform_device_id *id_entry =
2371 platform_get_device_id(fep->pdev);
2372 struct bufdesc *cbd_base;
2375 /* init the tx & rx ring size */
2376 fep->tx_ring_size = TX_RING_SIZE;
2377 fep->rx_ring_size = RX_RING_SIZE;
2379 fep->tx_stop_threshold = FEC_MAX_SKB_DESCS;
2380 fep->tx_wake_threshold = (fep->tx_ring_size - fep->tx_stop_threshold) / 2;
2382 if (fep->bufdesc_ex)
2383 fep->bufdesc_size = sizeof(struct bufdesc_ex);
2385 fep->bufdesc_size = sizeof(struct bufdesc);
2386 bd_size = (fep->tx_ring_size + fep->rx_ring_size) *
2389 /* Allocate memory for buffer descriptors. */
2390 cbd_base = dma_alloc_coherent(NULL, bd_size, &fep->bd_dma,
2395 fep->tso_hdrs = dma_alloc_coherent(NULL, fep->tx_ring_size * TSO_HEADER_SIZE,
2396 &fep->tso_hdrs_dma, GFP_KERNEL);
2397 if (!fep->tso_hdrs) {
2398 dma_free_coherent(NULL, bd_size, cbd_base, fep->bd_dma);
2402 memset(cbd_base, 0, PAGE_SIZE);
2406 /* Get the Ethernet address */
2408 /* make sure MAC we just acquired is programmed into the hw */
2409 fec_set_mac_address(ndev, NULL);
2411 /* Set receive and transmit descriptor base. */
2412 fep->rx_bd_base = cbd_base;
2413 if (fep->bufdesc_ex)
2414 fep->tx_bd_base = (struct bufdesc *)
2415 (((struct bufdesc_ex *)cbd_base) + fep->rx_ring_size);
2417 fep->tx_bd_base = cbd_base + fep->rx_ring_size;
2419 /* The FEC Ethernet specific entries in the device structure */
2420 ndev->watchdog_timeo = TX_TIMEOUT;
2421 ndev->netdev_ops = &fec_netdev_ops;
2422 ndev->ethtool_ops = &fec_enet_ethtool_ops;
2424 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
2425 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, NAPI_POLL_WEIGHT);
2427 if (id_entry->driver_data & FEC_QUIRK_HAS_VLAN)
2428 /* enable hw VLAN support */
2429 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
2431 if (id_entry->driver_data & FEC_QUIRK_HAS_CSUM) {
2432 ndev->gso_max_segs = FEC_MAX_TSO_SEGS;
2434 /* enable hw accelerator */
2435 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
2436 | NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO);
2437 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
2440 ndev->hw_features = ndev->features;
2442 fec_restart(ndev, 0);
2448 static void fec_reset_phy(struct platform_device *pdev)
2452 struct device_node *np = pdev->dev.of_node;
2453 struct net_device *ndev = platform_get_drvdata(pdev);
2454 struct fec_enet_private *fep = netdev_priv(ndev);
2459 of_property_read_u32(np, "phy-reset-duration", &msec);
2460 /* A sane reset duration should not be longer than 1s */
2464 fep->phy_reset_gpio = of_get_named_gpio(np, "phy-reset-gpios", 0);
2465 if (!gpio_is_valid(fep->phy_reset_gpio))
2468 err = devm_gpio_request_one(&pdev->dev, fep->phy_reset_gpio,
2469 GPIOF_OUT_INIT_LOW, "phy-reset");
2471 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err);
2475 gpio_set_value(fep->phy_reset_gpio, 1);
2478 static void fec_free_reset_gpio(struct platform_device *pdev)
2480 struct net_device *ndev = platform_get_drvdata(pdev);
2481 struct fec_enet_private *fep = netdev_priv(ndev);
2482 struct device_node *np = pdev->dev.of_node;
2486 fep->phy_reset_gpio = of_get_named_gpio(np, "phy-reset-gpios", 0);
2487 if (!gpio_is_valid(fep->phy_reset_gpio))
2490 devm_gpio_free(&pdev->dev, fep->phy_reset_gpio);
2492 #else /* CONFIG_OF */
2493 static void fec_reset_phy(struct platform_device *pdev)
2496 * In case of platform probe, the reset has been done
2501 static void fec_free_reset_gpio(struct platform_device *pdev)
2504 * make pair as api "fec_reset_phy()"
2507 #endif /* CONFIG_OF */
2510 fec_probe(struct platform_device *pdev)
2512 struct fec_enet_private *fep;
2513 struct fec_platform_data *pdata;
2514 struct net_device *ndev;
2515 int i, irq, ret = 0;
2517 const struct of_device_id *of_id;
2520 of_id = of_match_device(fec_dt_ids, &pdev->dev);
2522 pdev->id_entry = of_id->data;
2524 /* Init network device */
2525 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
2529 SET_NETDEV_DEV(ndev, &pdev->dev);
2531 /* setup board info structure */
2532 fep = netdev_priv(ndev);
2534 #if !defined(CONFIG_M5272)
2535 /* default enable pause frame auto negotiation */
2536 if (pdev->id_entry &&
2537 (pdev->id_entry->driver_data & FEC_QUIRK_HAS_GBIT))
2538 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG;
2541 /* Select default pin state */
2542 pinctrl_pm_select_default_state(&pdev->dev);
2544 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2545 fep->hwp = devm_ioremap_resource(&pdev->dev, r);
2546 if (IS_ERR(fep->hwp)) {
2547 ret = PTR_ERR(fep->hwp);
2548 goto failed_ioremap;
2552 fep->dev_id = dev_id++;
2554 fep->bufdesc_ex = 0;
2556 platform_set_drvdata(pdev, ndev);
2558 ret = of_get_phy_mode(pdev->dev.of_node);
2560 pdata = dev_get_platdata(&pdev->dev);
2562 fep->phy_interface = pdata->phy;
2564 fep->phy_interface = PHY_INTERFACE_MODE_MII;
2566 fep->phy_interface = ret;
2569 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
2570 if (IS_ERR(fep->clk_ipg)) {
2571 ret = PTR_ERR(fep->clk_ipg);
2575 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
2576 if (IS_ERR(fep->clk_ahb)) {
2577 ret = PTR_ERR(fep->clk_ahb);
2581 /* enet_out is optional, depends on board */
2582 fep->clk_enet_out = devm_clk_get(&pdev->dev, "enet_out");
2583 if (IS_ERR(fep->clk_enet_out))
2584 fep->clk_enet_out = NULL;
2586 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
2588 pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX;
2589 if (IS_ERR(fep->clk_ptp)) {
2590 fep->clk_ptp = NULL;
2591 fep->bufdesc_ex = 0;
2594 ret = fec_enet_clk_enable(ndev, true);
2598 fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
2599 if (!IS_ERR(fep->reg_phy)) {
2600 ret = regulator_enable(fep->reg_phy);
2603 "Failed to enable phy regulator: %d\n", ret);
2604 goto failed_regulator;
2607 fep->reg_phy = NULL;
2610 if (fep->bufdesc_ex)
2613 ret = fec_enet_init(ndev);
2617 for (i = 0; i < FEC_IRQ_NUM; i++) {
2618 irq = platform_get_irq(pdev, i);
2625 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt,
2626 0, pdev->name, ndev);
2631 ret = fec_enet_mii_init(pdev);
2633 goto failed_mii_init;
2635 /* Carrier starts down, phylib will bring it up */
2636 netif_carrier_off(ndev);
2637 fec_enet_clk_enable(ndev, false);
2638 pinctrl_pm_select_sleep_state(&pdev->dev);
2640 ret = register_netdev(ndev);
2642 goto failed_register;
2644 if (fep->bufdesc_ex && fep->ptp_clock)
2645 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id);
2647 INIT_DELAYED_WORK(&(fep->delay_work.delay_work), fec_enet_work);
2651 fec_enet_mii_remove(fep);
2656 regulator_disable(fep->reg_phy);
2658 fec_enet_clk_enable(ndev, false);
2667 fec_drv_remove(struct platform_device *pdev)
2669 struct net_device *ndev = platform_get_drvdata(pdev);
2670 struct fec_enet_private *fep = netdev_priv(ndev);
2672 cancel_delayed_work_sync(&(fep->delay_work.delay_work));
2673 unregister_netdev(ndev);
2674 fec_enet_mii_remove(fep);
2675 del_timer_sync(&fep->time_keep);
2677 regulator_disable(fep->reg_phy);
2679 ptp_clock_unregister(fep->ptp_clock);
2680 fec_enet_clk_enable(ndev, false);
2686 #ifdef CONFIG_PM_SLEEP
2688 fec_suspend(struct device *dev)
2690 struct net_device *ndev = dev_get_drvdata(dev);
2691 struct fec_enet_private *fep = netdev_priv(ndev);
2693 if (netif_running(ndev)) {
2695 netif_device_detach(ndev);
2697 fec_enet_clk_enable(ndev, false);
2698 pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2701 regulator_disable(fep->reg_phy);
2707 fec_resume(struct device *dev)
2709 struct net_device *ndev = dev_get_drvdata(dev);
2710 struct fec_enet_private *fep = netdev_priv(ndev);
2714 ret = regulator_enable(fep->reg_phy);
2719 pinctrl_pm_select_default_state(&fep->pdev->dev);
2720 ret = fec_enet_clk_enable(ndev, true);
2724 if (netif_running(ndev)) {
2725 fec_restart(ndev, fep->full_duplex);
2726 netif_device_attach(ndev);
2733 regulator_disable(fep->reg_phy);
2736 #endif /* CONFIG_PM_SLEEP */
2738 static SIMPLE_DEV_PM_OPS(fec_pm_ops, fec_suspend, fec_resume);
2740 static struct platform_driver fec_driver = {
2742 .name = DRIVER_NAME,
2743 .owner = THIS_MODULE,
2745 .of_match_table = fec_dt_ids,
2747 .id_table = fec_devtype,
2749 .remove = fec_drv_remove,
2752 module_platform_driver(fec_driver);
2754 MODULE_ALIAS("platform:"DRIVER_NAME);
2755 MODULE_LICENSE("GPL");