drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/acpi.h>
  11 #include <linux/device.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/netdevice.h>
  17 #include <linux/mfd/syscon.h>
  18 #include <linux/of.h>
  19 #include <linux/of_address.h>
  20 #include <linux/of_irq.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/vmalloc.h>
  23
  24 #include "hns_dsaf_mac.h"
  25 #include "hns_dsaf_main.h"
  26 #include "hns_dsaf_ppe.h"
  27 #include "hns_dsaf_rcb.h"
  28 #include "hns_dsaf_misc.h"
  29
  30 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
  31         [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
  32         [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
  33         [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
  34         [DSAF_MODE_DISABLE_SP] = "single-port",
  35 };
  36
  37 static const struct acpi_device_id hns_dsaf_acpi_match[] = {
  38         { "HISI00B1", 0 },
  39         { "HISI00B2", 0 },
  40         { },
  41 };
  42 MODULE_DEVICE_TABLE(acpi, hns_dsaf_acpi_match);
  43
  44 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
  45 {
  46         int ret, i;
  47         u32 desc_num;
  48         u32 buf_size;
  49         u32 reset_offset = 0;
  50         u32 res_idx = 0;
  51         const char *mode_str;
  52         struct regmap *syscon;
  53         struct resource *res;
  54         struct device_node *np = dsaf_dev->dev->of_node;
  55         struct platform_device *pdev = to_platform_device(dsaf_dev->dev);
  56
  57         if (dev_of_node(dsaf_dev->dev)) {
  58                 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
  59                         dsaf_dev->dsaf_ver = AE_VERSION_1;
  60                 else
  61                         dsaf_dev->dsaf_ver = AE_VERSION_2;
  62         } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
  63                 if (acpi_dev_found(hns_dsaf_acpi_match[0].id))
  64                         dsaf_dev->dsaf_ver = AE_VERSION_1;
  65                 else if (acpi_dev_found(hns_dsaf_acpi_match[1].id))
  66                         dsaf_dev->dsaf_ver = AE_VERSION_2;
  67                 else
  68                         return -ENXIO;
  69         } else {
  70                 dev_err(dsaf_dev->dev, "cannot get cfg data from of or acpi\n");
  71                 return -ENXIO;
  72         }
  73
  74         ret = device_property_read_string(dsaf_dev->dev, "mode", &mode_str);
  75         if (ret) {
  76                 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
  77                 return ret;
  78         }
  79         for (i = 0; i < DSAF_MODE_MAX; i++) {
  80                 if (g_dsaf_mode_match[i] &&
  81                     !strcmp(mode_str, g_dsaf_mode_match[i]))
  82                         break;
  83         }
  84         if (i >= DSAF_MODE_MAX ||
  85             i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
  86                 dev_err(dsaf_dev->dev,
  87                         "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
  88                 return -EINVAL;
  89         }
  90         dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
  91
  92         if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
  93                 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
  94         else
  95                 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
  96
  97         if ((i == DSAF_MODE_ENABLE_16VM) ||
  98             (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
  99             (i == DSAF_MODE_DISABLE_6PORT_2VM))
 100                 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
 101         else
 102                 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
 103
 104         if (dev_of_node(dsaf_dev->dev)) {
 105                 syscon = syscon_node_to_regmap(
 106                                 of_parse_phandle(np, "subctrl-syscon", 0));
 107                 if (IS_ERR_OR_NULL(syscon)) {
 108                         res = platform_get_resource(pdev, IORESOURCE_MEM,
 109                                                     res_idx++);
 110                         if (!res) {
 111                                 dev_err(dsaf_dev->dev, "subctrl info is needed!\n");
 112                                 return -ENOMEM;
 113                         }
 114
 115                         dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev,
 116                                                                   res);
 117                         if (!dsaf_dev->sc_base) {
 118                                 dev_err(dsaf_dev->dev, "subctrl can not map!\n");
 119                                 return -ENOMEM;
 120                         }
 121
 122                         res = platform_get_resource(pdev, IORESOURCE_MEM,
 123                                                     res_idx++);
 124                         if (!res) {
 125                                 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n");
 126                                 return -ENOMEM;
 127                         }
 128
 129                         dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev,
 130                                                                    res);
 131                         if (!dsaf_dev->sds_base) {
 132                                 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n");
 133                                 return -ENOMEM;
 134                         }
 135                 } else {
 136                         dsaf_dev->sub_ctrl = syscon;
 137                 }
 138         }
 139
 140         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base");
 141         if (!res) {
 142                 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
 143                 if (!res) {
 144                         dev_err(dsaf_dev->dev, "ppe-base info is needed!\n");
 145                         return -ENOMEM;
 146                 }
 147         }
 148         dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res);
 149         if (!dsaf_dev->ppe_base) {
 150                 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n");
 151                 return -ENOMEM;
 152         }
 153         dsaf_dev->ppe_paddr = res->start;
 154
 155         if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
 156                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 157                                                    "dsaf-base");
 158                 if (!res) {
 159                         res = platform_get_resource(pdev, IORESOURCE_MEM,
 160                                                     res_idx);
 161                         if (!res) {
 162                                 dev_err(dsaf_dev->dev,
 163                                         "dsaf-base info is needed!\n");
 164                                 return -ENOMEM;
 165                         }
 166                 }
 167                 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res);
 168                 if (!dsaf_dev->io_base) {
 169                         dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n");
 170                         return -ENOMEM;
 171                 }
 172         }
 173
 174         ret = device_property_read_u32(dsaf_dev->dev, "desc-num", &desc_num);
 175         if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
 176             desc_num > HNS_DSAF_MAX_DESC_CNT) {
 177                 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
 178                         desc_num, ret);
 179                 return -EINVAL;
 180         }
 181         dsaf_dev->desc_num = desc_num;
 182
 183         ret = device_property_read_u32(dsaf_dev->dev, "reset-field-offset",
 184                                        &reset_offset);
 185         if (ret < 0) {
 186                 dev_dbg(dsaf_dev->dev,
 187                         "get reset-field-offset fail, ret=%d!\r\n", ret);
 188         }
 189         dsaf_dev->reset_offset = reset_offset;
 190
 191         ret = device_property_read_u32(dsaf_dev->dev, "buf-size", &buf_size);
 192         if (ret < 0) {
 193                 dev_err(dsaf_dev->dev,
 194                         "get buf-size fail, ret=%d!\r\n", ret);
 195                 return ret;
 196         }
 197         dsaf_dev->buf_size = buf_size;
 198
 199         dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
 200         if (dsaf_dev->buf_size_type < 0) {
 201                 dev_err(dsaf_dev->dev,
 202                         "buf_size(%d) is wrong!\n", buf_size);
 203                 return -EINVAL;
 204         }
 205
 206         dsaf_dev->misc_op = hns_misc_op_get(dsaf_dev);
 207         if (!dsaf_dev->misc_op)
 208                 return -ENOMEM;
 209
 210         if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
 211                 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
 212         else
 213                 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
 214
 215         return 0;
 216 }
 217
 218 /**
 219  * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
 220  * @dsaf_id: dsa fabric id
 221  */
 222 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
 223 {
 224         dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
 225 }
 226
 227 /**
 228  * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
 229  * @dsaf_id: dsa fabric id
 230  * @hns_dsaf_reg_cnt_clr_ce: config value
 231  */
 232 static void
 233 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
 234 {
 235         dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
 236                          DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
 237 }
 238
 239 /**
 240  * hns_ppe_qid_cfg - config ppe qid
 241  * @dsaf_id: dsa fabric id
 242  * @pppe_qid_cfg: value array
 243  */
 244 static void
 245 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
 246 {
 247         u32 i;
 248
 249         for (i = 0; i < DSAF_COMM_CHN; i++) {
 250                 dsaf_set_dev_field(dsaf_dev,
 251                                    DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
 252                                    DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
 253                                    qid_cfg);
 254         }
 255 }
 256
 257 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
 258 {
 259         u16 max_q_per_vf, max_vfn;
 260         u32 q_id, q_num_per_port;
 261         u32 i;
 262
 263         hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
 264         q_num_per_port = max_vfn * max_q_per_vf;
 265
 266         for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
 267                 dsaf_set_dev_field(dsaf_dev,
 268                                    DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
 269                                    0xff, 0, q_id);
 270                 q_id += q_num_per_port;
 271         }
 272 }
 273
 274 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
 275 {
 276         u16 max_q_per_vf, max_vfn;
 277         u32 q_id, q_num_per_port;
 278         u32 mac_id;
 279
 280         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 281                 return;
 282
 283         hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
 284         q_num_per_port = max_vfn * max_q_per_vf;
 285
 286         for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
 287                 dsaf_set_dev_field(dsaf_dev,
 288                                    DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
 289                                    DSAFV2_SERDES_LBK_QID_M,
 290                                    DSAFV2_SERDES_LBK_QID_S,
 291                                    q_id);
 292                 q_id += q_num_per_port;
 293         }
 294 }
 295
 296 /**
 297  * hns_dsaf_sw_port_type_cfg - cfg sw type
 298  * @dsaf_id: dsa fabric id
 299  * @psw_port_type: array
 300  */
 301 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
 302                                       enum dsaf_sw_port_type port_type)
 303 {
 304         u32 i;
 305
 306         for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
 307                 dsaf_set_dev_field(dsaf_dev,
 308                                    DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
 309                                    DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
 310                                    port_type);
 311         }
 312 }
 313
 314 /**
 315  * hns_dsaf_stp_port_type_cfg - cfg stp type
 316  * @dsaf_id: dsa fabric id
 317  * @pstp_port_type: array
 318  */
 319 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
 320                                        enum dsaf_stp_port_type port_type)
 321 {
 322         u32 i;
 323
 324         for (i = 0; i < DSAF_COMM_CHN; i++) {
 325                 dsaf_set_dev_field(dsaf_dev,
 326                                    DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
 327                                    DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
 328                                    port_type);
 329         }
 330 }
 331
 332 #define HNS_DSAF_SBM_NUM(dev) \
 333         (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
 334 /**
 335  * hns_dsaf_sbm_cfg - config sbm
 336  * @dsaf_id: dsa fabric id
 337  */
 338 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
 339 {
 340         u32 o_sbm_cfg;
 341         u32 i;
 342
 343         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 344                 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
 345                                           DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
 346                 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
 347                 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
 348                 dsaf_write_dev(dsaf_dev,
 349                                DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
 350         }
 351 }
 352
 353 /**
 354  * hns_dsaf_sbm_cfg_mib_en - config sbm
 355  * @dsaf_id: dsa fabric id
 356  */
 357 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
 358 {
 359         u32 sbm_cfg_mib_en;
 360         u32 i;
 361         u32 reg;
 362         u32 read_cnt;
 363
 364         /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
 365         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 366                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 367                 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
 368         }
 369
 370         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 371                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 372                 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
 373         }
 374
 375         /* waitint for all sbm enable finished */
 376         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 377                 read_cnt = 0;
 378                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 379                 do {
 380                         udelay(1);
 381                         sbm_cfg_mib_en = dsaf_get_dev_bit(
 382                                         dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
 383                         read_cnt++;
 384                 } while (sbm_cfg_mib_en == 0 &&
 385                         read_cnt < DSAF_CFG_READ_CNT);
 386
 387                 if (sbm_cfg_mib_en == 0) {
 388                         dev_err(dsaf_dev->dev,
 389                                 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
 390                                 dsaf_dev->ae_dev.name, i);
 391                         return -ENODEV;
 392                 }
 393         }
 394
 395         return 0;
 396 }
 397
 398 /**
 399  * hns_dsaf_sbm_bp_wl_cfg - config sbm
 400  * @dsaf_id: dsa fabric id
 401  */
 402 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
 403 {
 404         u32 o_sbm_bp_cfg;
 405         u32 reg;
 406         u32 i;
 407
 408         /* XGE */
 409         for (i = 0; i < DSAF_XGE_NUM; i++) {
 410                 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
 411                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 412                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
 413                                DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
 414                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
 415                                DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
 416                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
 417                                DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
 418                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 419
 420                 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
 421                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 422                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
 423                                DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
 424                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
 425                                DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
 426                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 427
 428                 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
 429                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 430                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 431                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
 432                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 433                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
 434                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 435
 436                 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
 437                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 438                 dsaf_set_field(o_sbm_bp_cfg,
 439                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 440                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
 441                 dsaf_set_field(o_sbm_bp_cfg,
 442                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 443                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
 444                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 445
 446                 /* for no enable pfc mode */
 447                 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
 448                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 449                 dsaf_set_field(o_sbm_bp_cfg,
 450                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 451                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
 452                 dsaf_set_field(o_sbm_bp_cfg,
 453                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 454                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
 455                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 456         }
 457
 458         /* PPE */
 459         for (i = 0; i < DSAF_COMM_CHN; i++) {
 460                 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
 461                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 462                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 463                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
 464                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 465                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
 466                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 467         }
 468
 469         /* RoCEE */
 470         for (i = 0; i < DSAF_COMM_CHN; i++) {
 471                 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
 472                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 473                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 474                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
 475                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 476                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
 477                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 478         }
 479 }
 480
 481 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
 482 {
 483         u32 o_sbm_bp_cfg;
 484         u32 reg;
 485         u32 i;
 486
 487         /* XGE */
 488         for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
 489                 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
 490                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 491                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
 492                                DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
 493                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
 494                                DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
 495                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
 496                                DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
 497                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 498
 499                 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
 500                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 501                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
 502                                DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
 503                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
 504                                DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
 505                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 506
 507                 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
 508                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 509                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 510                                DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
 511                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 512                                DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
 513                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 514
 515                 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
 516                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 517                 dsaf_set_field(o_sbm_bp_cfg,
 518                                DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 519                                DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
 520                 dsaf_set_field(o_sbm_bp_cfg,
 521                                DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 522                                DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
 523                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 524
 525                 /* for no enable pfc mode */
 526                 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
 527                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 528                 dsaf_set_field(o_sbm_bp_cfg,
 529                                DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
 530                                DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
 531                 dsaf_set_field(o_sbm_bp_cfg,
 532                                DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
 533                                DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
 534                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 535         }
 536
 537         /* PPE */
 538         reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
 539         o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 540         dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 541                        DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
 542         dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 543                        DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
 544         dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 545         /* RoCEE */
 546         for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
 547                 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
 548                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 549                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 550                                DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
 551                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 552                                DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
 553                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 554         }
 555 }
 556
 557 /**
 558  * hns_dsaf_voq_bp_all_thrd_cfg -  voq
 559  * @dsaf_id: dsa fabric id
 560  */
 561 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
 562 {
 563         u32 voq_bp_all_thrd;
 564         u32 i;
 565
 566         for (i = 0; i < DSAF_VOQ_NUM; i++) {
 567                 voq_bp_all_thrd = dsaf_read_dev(
 568                         dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
 569                 if (i < DSAF_XGE_NUM) {
 570                         dsaf_set_field(voq_bp_all_thrd,
 571                                        DSAF_VOQ_BP_ALL_DOWNTHRD_M,
 572                                        DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
 573                         dsaf_set_field(voq_bp_all_thrd,
 574                                        DSAF_VOQ_BP_ALL_UPTHRD_M,
 575                                        DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
 576                 } else {
 577                         dsaf_set_field(voq_bp_all_thrd,
 578                                        DSAF_VOQ_BP_ALL_DOWNTHRD_M,
 579                                        DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
 580                         dsaf_set_field(voq_bp_all_thrd,
 581                                        DSAF_VOQ_BP_ALL_UPTHRD_M,
 582                                        DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
 583                 }
 584                 dsaf_write_dev(
 585                         dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
 586                         voq_bp_all_thrd);
 587         }
 588 }
 589
 590 /**
 591  * hns_dsaf_tbl_tcam_data_cfg - tbl
 592  * @dsaf_id: dsa fabric id
 593  * @ptbl_tcam_data: addr
 594  */
 595 static void hns_dsaf_tbl_tcam_data_cfg(
 596         struct dsaf_device *dsaf_dev,
 597         struct dsaf_tbl_tcam_data *ptbl_tcam_data)
 598 {
 599         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
 600                        ptbl_tcam_data->tbl_tcam_data_low);
 601         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
 602                        ptbl_tcam_data->tbl_tcam_data_high);
 603 }
 604
 605 /**
 606  * dsaf_tbl_tcam_mcast_cfg - tbl
 607  * @dsaf_id: dsa fabric id
 608  * @ptbl_tcam_mcast: addr
 609  */
 610 static void hns_dsaf_tbl_tcam_mcast_cfg(
 611         struct dsaf_device *dsaf_dev,
 612         struct dsaf_tbl_tcam_mcast_cfg *mcast)
 613 {
 614         u32 mcast_cfg4;
 615
 616         mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
 617         dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
 618                      mcast->tbl_mcast_item_vld);
 619         dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
 620                      mcast->tbl_mcast_old_en);
 621         dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
 622                        DSAF_TBL_MCAST_CFG4_VM128_112_S,
 623                        mcast->tbl_mcast_port_msk[4]);
 624         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
 625
 626         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
 627                        mcast->tbl_mcast_port_msk[3]);
 628
 629         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
 630                        mcast->tbl_mcast_port_msk[2]);
 631
 632         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
 633                        mcast->tbl_mcast_port_msk[1]);
 634
 635         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
 636                        mcast->tbl_mcast_port_msk[0]);
 637 }
 638
 639 /**
 640  * hns_dsaf_tbl_tcam_ucast_cfg - tbl
 641  * @dsaf_id: dsa fabric id
 642  * @ptbl_tcam_ucast: addr
 643  */
 644 static void hns_dsaf_tbl_tcam_ucast_cfg(
 645         struct dsaf_device *dsaf_dev,
 646         struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
 647 {
 648         u32 ucast_cfg1;
 649
 650         ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
 651         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
 652                      tbl_tcam_ucast->tbl_ucast_mac_discard);
 653         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
 654                      tbl_tcam_ucast->tbl_ucast_item_vld);
 655         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
 656                      tbl_tcam_ucast->tbl_ucast_old_en);
 657         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
 658                      tbl_tcam_ucast->tbl_ucast_dvc);
 659         dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
 660                        DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
 661                        tbl_tcam_ucast->tbl_ucast_out_port);
 662         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
 663 }
 664
 665 /**
 666  * hns_dsaf_tbl_line_cfg - tbl
 667  * @dsaf_id: dsa fabric id
 668  * @ptbl_lin: addr
 669  */
 670 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
 671                                   struct dsaf_tbl_line_cfg *tbl_lin)
 672 {
 673         u32 tbl_line;
 674
 675         tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
 676         dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
 677                      tbl_lin->tbl_line_mac_discard);
 678         dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
 679                      tbl_lin->tbl_line_dvc);
 680         dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
 681                        DSAF_TBL_LINE_CFG_OUT_PORT_S,
 682                        tbl_lin->tbl_line_out_port);
 683         dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
 684 }
 685
 686 /**
 687  * hns_dsaf_tbl_tcam_mcast_pul - tbl
 688  * @dsaf_id: dsa fabric id
 689  */
 690 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
 691 {
 692         u32 o_tbl_pul;
 693
 694         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 695         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
 696         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 697         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
 698         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 699 }
 700
 701 /**
 702  * hns_dsaf_tbl_line_pul - tbl
 703  * @dsaf_id: dsa fabric id
 704  */
 705 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
 706 {
 707         u32 tbl_pul;
 708
 709         tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 710         dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
 711         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
 712         dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
 713         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
 714 }
 715
 716 /**
 717  * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
 718  * @dsaf_id: dsa fabric id
 719  */
 720 static void hns_dsaf_tbl_tcam_data_mcast_pul(
 721         struct dsaf_device *dsaf_dev)
 722 {
 723         u32 o_tbl_pul;
 724
 725         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 726         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
 727         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
 728         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 729         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
 730         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
 731         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 732 }
 733
 734 /**
 735  * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
 736  * @dsaf_id: dsa fabric id
 737  */
 738 static void hns_dsaf_tbl_tcam_data_ucast_pul(
 739         struct dsaf_device *dsaf_dev)
 740 {
 741         u32 o_tbl_pul;
 742
 743         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 744         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
 745         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
 746         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 747         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
 748         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
 749         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 750 }
 751
 752 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
 753 {
 754         if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
 755                 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
 756                                  DSAF_CFG_MIX_MODE_S, !!en);
 757 }
 758
 759 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
 760 {
 761         if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
 762             dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG)
 763                 return;
 764
 765         dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
 766                          DSAFV2_SERDES_LBK_EN_B, !!en);
 767 }
 768
 769 /**
 770  * hns_dsaf_tbl_stat_en - tbl
 771  * @dsaf_id: dsa fabric id
 772  * @ptbl_stat_en: addr
 773  */
 774 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
 775 {
 776         u32 o_tbl_ctrl;
 777
 778         o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
 779         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
 780         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
 781         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
 782         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
 783         dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
 784 }
 785
 786 /**
 787  * hns_dsaf_rocee_bp_en - rocee back press enable
 788  * @dsaf_id: dsa fabric id
 789  */
 790 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
 791 {
 792         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 793                 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
 794                                  DSAF_FC_XGE_TX_PAUSE_S, 1);
 795 }
 796
 797 /* set msk for dsaf exception irq*/
 798 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
 799                                      u32 chnn_num, u32 mask_set)
 800 {
 801         dsaf_write_dev(dsaf_dev,
 802                        DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
 803 }
 804
 805 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
 806                                      u32 chnn_num, u32 msk_set)
 807 {
 808         dsaf_write_dev(dsaf_dev,
 809                        DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
 810 }
 811
 812 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
 813                                        u32 chnn, u32 msk_set)
 814 {
 815         dsaf_write_dev(dsaf_dev,
 816                        DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
 817 }
 818
 819 static void
 820 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
 821 {
 822         dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
 823 }
 824
 825 /* clr dsaf exception irq*/
 826 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
 827                                      u32 chnn_num, u32 int_src)
 828 {
 829         dsaf_write_dev(dsaf_dev,
 830                        DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
 831 }
 832
 833 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
 834                                      u32 chnn, u32 int_src)
 835 {
 836         dsaf_write_dev(dsaf_dev,
 837                        DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
 838 }
 839
 840 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
 841                                        u32 chnn, u32 int_src)
 842 {
 843         dsaf_write_dev(dsaf_dev,
 844                        DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
 845 }
 846
 847 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
 848                                      u32 int_src)
 849 {
 850         dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
 851 }
 852
 853 /**
 854  * hns_dsaf_single_line_tbl_cfg - INT
 855  * @dsaf_id: dsa fabric id
 856  * @address:
 857  * @ptbl_line:
 858  */
 859 static void hns_dsaf_single_line_tbl_cfg(
 860         struct dsaf_device *dsaf_dev,
 861         u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
 862 {
 863         /*Write Addr*/
 864         hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
 865
 866         /*Write Line*/
 867         hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
 868
 869         /*Write Plus*/
 870         hns_dsaf_tbl_line_pul(dsaf_dev);
 871 }
 872
 873 /**
 874  * hns_dsaf_tcam_uc_cfg - INT
 875  * @dsaf_id: dsa fabric id
 876  * @address,
 877  * @ptbl_tcam_data,
 878  */
 879 static void hns_dsaf_tcam_uc_cfg(
 880         struct dsaf_device *dsaf_dev, u32 address,
 881         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 882         struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
 883 {
 884         /*Write Addr*/
 885         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 886         /*Write Tcam Data*/
 887         hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
 888         /*Write Tcam Ucast*/
 889         hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
 890         /*Write Plus*/
 891         hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
 892 }
 893
 894 /**
 895  * hns_dsaf_tcam_mc_cfg - INT
 896  * @dsaf_id: dsa fabric id
 897  * @address,
 898  * @ptbl_tcam_data,
 899  * @ptbl_tcam_mcast,
 900  */
 901 static void hns_dsaf_tcam_mc_cfg(
 902         struct dsaf_device *dsaf_dev, u32 address,
 903         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 904         struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
 905 {
 906         /*Write Addr*/
 907         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 908         /*Write Tcam Data*/
 909         hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
 910         /*Write Tcam Mcast*/
 911         hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
 912         /*Write Plus*/
 913         hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
 914 }
 915
 916 /**
 917  * hns_dsaf_tcam_mc_invld - INT
 918  * @dsaf_id: dsa fabric id
 919  * @address
 920  */
 921 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
 922 {
 923         /*Write Addr*/
 924         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 925
 926         /*write tcam mcast*/
 927         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
 928         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
 929         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
 930         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
 931         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
 932
 933         /*Write Plus*/
 934         hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
 935 }
 936
 937 /**
 938  * hns_dsaf_tcam_uc_get - INT
 939  * @dsaf_id: dsa fabric id
 940  * @address
 941  * @ptbl_tcam_data
 942  * @ptbl_tcam_ucast
 943  */
 944 static void hns_dsaf_tcam_uc_get(
 945         struct dsaf_device *dsaf_dev, u32 address,
 946         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 947         struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
 948 {
 949         u32 tcam_read_data0;
 950         u32 tcam_read_data4;
 951
 952         /*Write Addr*/
 953         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 954
 955         /*read tcam item puls*/
 956         hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
 957
 958         /*read tcam data*/
 959         ptbl_tcam_data->tbl_tcam_data_high
 960                 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
 961         ptbl_tcam_data->tbl_tcam_data_low
 962                 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
 963
 964         /*read tcam mcast*/
 965         tcam_read_data0 = dsaf_read_dev(dsaf_dev,
 966                                         DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
 967         tcam_read_data4 = dsaf_read_dev(dsaf_dev,
 968                                         DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
 969
 970         ptbl_tcam_ucast->tbl_ucast_item_vld
 971                 = dsaf_get_bit(tcam_read_data4,
 972                                DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
 973         ptbl_tcam_ucast->tbl_ucast_old_en
 974                 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
 975         ptbl_tcam_ucast->tbl_ucast_mac_discard
 976                 = dsaf_get_bit(tcam_read_data0,
 977                                DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
 978         ptbl_tcam_ucast->tbl_ucast_out_port
 979                 = dsaf_get_field(tcam_read_data0,
 980                                  DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
 981                                  DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
 982         ptbl_tcam_ucast->tbl_ucast_dvc
 983                 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
 984 }
 985
 986 /**
 987  * hns_dsaf_tcam_mc_get - INT
 988  * @dsaf_id: dsa fabric id
 989  * @address
 990  * @ptbl_tcam_data
 991  * @ptbl_tcam_ucast
 992  */
 993 static void hns_dsaf_tcam_mc_get(
 994         struct dsaf_device *dsaf_dev, u32 address,
 995         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 996         struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
 997 {
 998         u32 data_tmp;
 999
1000         /*Write Addr*/
1001         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
1002
1003         /*read tcam item puls*/
1004         hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
1005
1006         /*read tcam data*/
1007         ptbl_tcam_data->tbl_tcam_data_high =
1008                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
1009         ptbl_tcam_data->tbl_tcam_data_low =
1010                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
1011
1012         /*read tcam mcast*/
1013         ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
1014                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
1015         ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
1016                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
1017         ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
1018                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
1019         ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
1020                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
1021
1022         data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
1023         ptbl_tcam_mcast->tbl_mcast_item_vld =
1024                 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
1025         ptbl_tcam_mcast->tbl_mcast_old_en =
1026                 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
1027         ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
1028                 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
1029                                DSAF_TBL_MCAST_CFG4_VM128_112_S);
1030 }
1031
1032 /**
1033  * hns_dsaf_tbl_line_init - INT
1034  * @dsaf_id: dsa fabric id
1035  */
1036 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
1037 {
1038         u32 i;
1039         /* defaultly set all lineal mac table entry resulting discard */
1040         struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1041
1042         for (i = 0; i < DSAF_LINE_SUM; i++)
1043                 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1044 }
1045
1046 /**
1047  * hns_dsaf_tbl_tcam_init - INT
1048  * @dsaf_id: dsa fabric id
1049  */
1050 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1051 {
1052         u32 i;
1053         struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1054         struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1055
1056         /*tcam tbl*/
1057         for (i = 0; i < DSAF_TCAM_SUM; i++)
1058                 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1059 }
1060
1061 /**
1062  * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1063  * @mac_cb: mac contrl block
1064  */
1065 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1066                                 int mac_id, int tc_en)
1067 {
1068         dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1069 }
1070
1071 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1072                                    int mac_id, int tx_en, int rx_en)
1073 {
1074         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1075                 if (!tx_en || !rx_en)
1076                         dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1077
1078                 return;
1079         }
1080
1081         dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1082                          DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1083         dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1084                          DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1085 }
1086
1087 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1088                                  u32 en)
1089 {
1090         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1091                 if (!en) {
1092                         dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1093                         return -EINVAL;
1094                 }
1095         }
1096
1097         dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1098                          DSAF_MAC_PAUSE_RX_EN_B, !!en);
1099
1100         return 0;
1101 }
1102
1103 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1104                                   u32 *en)
1105 {
1106         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1107                 *en = 1;
1108         else
1109                 *en = dsaf_get_dev_bit(dsaf_dev,
1110                                        DSAF_PAUSE_CFG_REG + mac_id * 4,
1111                                        DSAF_MAC_PAUSE_RX_EN_B);
1112 }
1113
1114 /**
1115  * hns_dsaf_tbl_tcam_init - INT
1116  * @dsaf_id: dsa fabric id
1117  * @dsaf_mode
1118  */
1119 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1120 {
1121         u32 i;
1122         u32 o_dsaf_cfg;
1123         bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
1124
1125         o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1126         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1127         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1128         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1129         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1130         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1131         dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1132
1133         hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1134         hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1135
1136         /* set 22 queue per tx ppe engine, only used in switch mode */
1137         hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1138
1139         /* set promisc def queue id */
1140         hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1141
1142         /* set inner loopback queue id */
1143         hns_dsaf_inner_qid_cfg(dsaf_dev);
1144
1145         /* in non switch mode, set all port to access mode */
1146         hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1147
1148         /*set dsaf pfc  to 0 for parseing rx pause*/
1149         for (i = 0; i < DSAF_COMM_CHN; i++) {
1150                 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1151                 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1152         }
1153
1154         /*msk and  clr exception irqs */
1155         for (i = 0; i < DSAF_COMM_CHN; i++) {
1156                 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1157                 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1158                 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1159
1160                 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1161                 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1162                 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1163         }
1164         hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1165         hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1166 }
1167
1168 /**
1169  * hns_dsaf_inode_init - INT
1170  * @dsaf_id: dsa fabric id
1171  */
1172 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1173 {
1174         u32 reg;
1175         u32 tc_cfg;
1176         u32 i;
1177
1178         if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1179                 tc_cfg = HNS_DSAF_I4TC_CFG;
1180         else
1181                 tc_cfg = HNS_DSAF_I8TC_CFG;
1182
1183         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1184                 for (i = 0; i < DSAF_INODE_NUM; i++) {
1185                         reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1186                         dsaf_set_dev_field(dsaf_dev, reg,
1187                                            DSAF_INODE_IN_PORT_NUM_M,
1188                                            DSAF_INODE_IN_PORT_NUM_S,
1189                                            i % DSAF_XGE_NUM);
1190                 }
1191         } else {
1192                 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1193                         reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1194                         dsaf_set_dev_field(dsaf_dev, reg,
1195                                            DSAF_INODE_IN_PORT_NUM_M,
1196                                            DSAF_INODE_IN_PORT_NUM_S, 0);
1197                         dsaf_set_dev_field(dsaf_dev, reg,
1198                                            DSAFV2_INODE_IN_PORT1_NUM_M,
1199                                            DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1200                         dsaf_set_dev_field(dsaf_dev, reg,
1201                                            DSAFV2_INODE_IN_PORT2_NUM_M,
1202                                            DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1203                         dsaf_set_dev_field(dsaf_dev, reg,
1204                                            DSAFV2_INODE_IN_PORT3_NUM_M,
1205                                            DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1206                         dsaf_set_dev_field(dsaf_dev, reg,
1207                                            DSAFV2_INODE_IN_PORT4_NUM_M,
1208                                            DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1209                         dsaf_set_dev_field(dsaf_dev, reg,
1210                                            DSAFV2_INODE_IN_PORT5_NUM_M,
1211                                            DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1212                 }
1213         }
1214         for (i = 0; i < DSAF_INODE_NUM; i++) {
1215                 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1216                 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1217         }
1218 }
1219
1220 /**
1221  * hns_dsaf_sbm_init - INT
1222  * @dsaf_id: dsa fabric id
1223  */
1224 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1225 {
1226         u32 flag;
1227         u32 finish_msk;
1228         u32 cnt = 0;
1229         int ret;
1230
1231         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1232                 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1233                 finish_msk = DSAF_SRAM_INIT_OVER_M;
1234         } else {
1235                 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1236                 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1237         }
1238
1239         /* enable sbm chanel, disable sbm chanel shcut function*/
1240         hns_dsaf_sbm_cfg(dsaf_dev);
1241
1242         /* enable sbm mib */
1243         ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1244         if (ret) {
1245                 dev_err(dsaf_dev->dev,
1246                         "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1247                         dsaf_dev->ae_dev.name, ret);
1248                 return ret;
1249         }
1250
1251         /* enable sbm initial link sram */
1252         hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1253
1254         do {
1255                 usleep_range(200, 210);/*udelay(200);*/
1256                 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1257                                           finish_msk, DSAF_SRAM_INIT_OVER_S);
1258                 cnt++;
1259         } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1260                  cnt < DSAF_CFG_READ_CNT);
1261
1262         if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1263                 dev_err(dsaf_dev->dev,
1264                         "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1265                         dsaf_dev->ae_dev.name, flag, cnt);
1266                 return -ENODEV;
1267         }
1268
1269         hns_dsaf_rocee_bp_en(dsaf_dev);
1270
1271         return 0;
1272 }
1273
1274 /**
1275  * hns_dsaf_tbl_init - INT
1276  * @dsaf_id: dsa fabric id
1277  */
1278 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1279 {
1280         hns_dsaf_tbl_stat_en(dsaf_dev);
1281
1282         hns_dsaf_tbl_tcam_init(dsaf_dev);
1283         hns_dsaf_tbl_line_init(dsaf_dev);
1284 }
1285
1286 /**
1287  * hns_dsaf_voq_init - INT
1288  * @dsaf_id: dsa fabric id
1289  */
1290 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1291 {
1292         hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1293 }
1294
1295 /**
1296  * hns_dsaf_init_hw - init dsa fabric hardware
1297  * @dsaf_dev: dsa fabric device struct pointer
1298  */
1299 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1300 {
1301         int ret;
1302
1303         dev_dbg(dsaf_dev->dev,
1304                 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1305
1306         dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
1307         mdelay(10);
1308         dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 1);
1309
1310         hns_dsaf_comm_init(dsaf_dev);
1311
1312         /*init XBAR_INODE*/
1313         hns_dsaf_inode_init(dsaf_dev);
1314
1315         /*init SBM*/
1316         ret = hns_dsaf_sbm_init(dsaf_dev);
1317         if (ret)
1318                 return ret;
1319
1320         /*init TBL*/
1321         hns_dsaf_tbl_init(dsaf_dev);
1322
1323         /*init VOQ*/
1324         hns_dsaf_voq_init(dsaf_dev);
1325
1326         return 0;
1327 }
1328
1329 /**
1330  * hns_dsaf_remove_hw - uninit dsa fabric hardware
1331  * @dsaf_dev: dsa fabric device struct pointer
1332  */
1333 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1334 {
1335         /*reset*/
1336         dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
1337 }
1338
1339 /**
1340  * hns_dsaf_init - init dsa fabric
1341  * @dsaf_dev: dsa fabric device struct pointer
1342  * retuen 0 - success , negative --fail
1343  */
1344 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1345 {
1346         struct dsaf_drv_priv *priv =
1347             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1348         u32 i;
1349         int ret;
1350
1351         if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1352                 return 0;
1353
1354         ret = hns_dsaf_init_hw(dsaf_dev);
1355         if (ret)
1356                 return ret;
1357
1358         /* malloc mem for tcam mac key(vlan+mac) */
1359         priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1360                   * DSAF_TCAM_SUM);
1361         if (!priv->soft_mac_tbl) {
1362                 ret = -ENOMEM;
1363                 goto remove_hw;
1364         }
1365
1366         /*all entry invall */
1367         for (i = 0; i < DSAF_TCAM_SUM; i++)
1368                 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1369
1370         return 0;
1371
1372 remove_hw:
1373         hns_dsaf_remove_hw(dsaf_dev);
1374         return ret;
1375 }
1376
1377 /**
1378  * hns_dsaf_free - free dsa fabric
1379  * @dsaf_dev: dsa fabric device struct pointer
1380  */
1381 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1382 {
1383         struct dsaf_drv_priv *priv =
1384             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1385
1386         hns_dsaf_remove_hw(dsaf_dev);
1387
1388         /* free all mac mem */
1389         vfree(priv->soft_mac_tbl);
1390         priv->soft_mac_tbl = NULL;
1391 }
1392
1393 /**
1394  * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1395  * @dsaf_dev: dsa fabric device struct pointer
1396  * @mac_key: mac entry struct pointer
1397  */
1398 static u16 hns_dsaf_find_soft_mac_entry(
1399         struct dsaf_device *dsaf_dev,
1400         struct dsaf_drv_tbl_tcam_key *mac_key)
1401 {
1402         struct dsaf_drv_priv *priv =
1403             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1404         struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1405         u32 i;
1406
1407         soft_mac_entry = priv->soft_mac_tbl;
1408         for (i = 0; i < DSAF_TCAM_SUM; i++) {
1409                 /* invall tab entry */
1410                 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1411                     (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1412                     (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1413                         /* return find result --soft index */
1414                         return soft_mac_entry->index;
1415
1416                 soft_mac_entry++;
1417         }
1418         return DSAF_INVALID_ENTRY_IDX;
1419 }
1420
1421 /**
1422  * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1423  * @dsaf_dev: dsa fabric device struct pointer
1424  */
1425 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1426 {
1427         struct dsaf_drv_priv *priv =
1428             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1429         struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1430         u32 i;
1431
1432         soft_mac_entry = priv->soft_mac_tbl;
1433         for (i = 0; i < DSAF_TCAM_SUM; i++) {
1434                 /* inv all entry */
1435                 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1436                         /* return find result --soft index */
1437                         return i;
1438
1439                 soft_mac_entry++;
1440         }
1441         return DSAF_INVALID_ENTRY_IDX;
1442 }
1443
1444 /**
1445  * hns_dsaf_set_mac_key - set mac key
1446  * @dsaf_dev: dsa fabric device struct pointer
1447  * @mac_key: tcam key pointer
1448  * @vlan_id: vlan id
1449  * @in_port_num: input port num
1450  * @addr: mac addr
1451  */
1452 static void hns_dsaf_set_mac_key(
1453         struct dsaf_device *dsaf_dev,
1454         struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1455         u8 *addr)
1456 {
1457         u8 port;
1458
1459         if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1460                 /*DSAF mode : in port id fixed 0*/
1461                 port = 0;
1462         else
1463                 /*non-dsaf mode*/
1464                 port = in_port_num;
1465
1466         mac_key->high.bits.mac_0 = addr[0];
1467         mac_key->high.bits.mac_1 = addr[1];
1468         mac_key->high.bits.mac_2 = addr[2];
1469         mac_key->high.bits.mac_3 = addr[3];
1470         mac_key->low.bits.mac_4 = addr[4];
1471         mac_key->low.bits.mac_5 = addr[5];
1472         mac_key->low.bits.vlan = vlan_id;
1473         mac_key->low.bits.port = port;
1474 }
1475
1476 /**
1477  * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1478  * @dsaf_dev: dsa fabric device struct pointer
1479  * @mac_entry: uc-mac entry
1480  */
1481 int hns_dsaf_set_mac_uc_entry(
1482         struct dsaf_device *dsaf_dev,
1483         struct dsaf_drv_mac_single_dest_entry *mac_entry)
1484 {
1485         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1486         struct dsaf_drv_tbl_tcam_key mac_key;
1487         struct dsaf_tbl_tcam_ucast_cfg mac_data;
1488         struct dsaf_drv_priv *priv =
1489             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1490         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1491
1492         /* mac addr check */
1493         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1494             MAC_IS_BROADCAST(mac_entry->addr) ||
1495             MAC_IS_MULTICAST(mac_entry->addr)) {
1496                 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1497                         dsaf_dev->ae_dev.name, mac_entry->addr);
1498                 return -EINVAL;
1499         }
1500
1501         /* config key */
1502         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1503                              mac_entry->in_port_num, mac_entry->addr);
1504
1505         /* entry ie exist? */
1506         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1507         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1508                 /*if has not inv entry,find a empty entry */
1509                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1510                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1511                         /* has not empty,return error */
1512                         dev_err(dsaf_dev->dev,
1513                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1514                                 dsaf_dev->ae_dev.name,
1515                                 mac_key.high.val, mac_key.low.val);
1516                         return -EINVAL;
1517                 }
1518         }
1519
1520         dev_dbg(dsaf_dev->dev,
1521                 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1522                 dsaf_dev->ae_dev.name, mac_key.high.val,
1523                 mac_key.low.val, entry_index);
1524
1525         /* config hardware entry */
1526         mac_data.tbl_ucast_item_vld = 1;
1527         mac_data.tbl_ucast_mac_discard = 0;
1528         mac_data.tbl_ucast_old_en = 0;
1529         /* default config dvc to 0 */
1530         mac_data.tbl_ucast_dvc = 0;
1531         mac_data.tbl_ucast_out_port = mac_entry->port_num;
1532         hns_dsaf_tcam_uc_cfg(
1533                 dsaf_dev, entry_index,
1534                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1535
1536         /* config software entry */
1537         soft_mac_entry += entry_index;
1538         soft_mac_entry->index = entry_index;
1539         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1540         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1541
1542         return 0;
1543 }
1544
1545 /**
1546  * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1547  * @dsaf_dev: dsa fabric device struct pointer
1548  * @mac_entry: mc-mac entry
1549  */
1550 int hns_dsaf_set_mac_mc_entry(
1551         struct dsaf_device *dsaf_dev,
1552         struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1553 {
1554         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1555         struct dsaf_drv_tbl_tcam_key mac_key;
1556         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1557         struct dsaf_drv_priv *priv =
1558             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1559         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1560         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1561
1562         /* mac addr check */
1563         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1564                 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1565                         dsaf_dev->ae_dev.name, mac_entry->addr);
1566                 return -EINVAL;
1567         }
1568
1569         /*config key */
1570         hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1571                              mac_entry->in_vlan_id,
1572                              mac_entry->in_port_num, mac_entry->addr);
1573
1574         /* entry ie exist? */
1575         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1576         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1577                 /*if hasnot, find enpty entry*/
1578                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1579                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1580                         /*if hasnot empty, error*/
1581                         dev_err(dsaf_dev->dev,
1582                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1583                                 dsaf_dev->ae_dev.name,
1584                                 mac_key.high.val, mac_key.low.val);
1585                         return -EINVAL;
1586                 }
1587
1588                 /* config hardware entry */
1589                 memset(mac_data.tbl_mcast_port_msk,
1590                        0, sizeof(mac_data.tbl_mcast_port_msk));
1591         } else {
1592                 /* config hardware entry */
1593                 hns_dsaf_tcam_mc_get(
1594                         dsaf_dev, entry_index,
1595                         (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1596         }
1597         mac_data.tbl_mcast_old_en = 0;
1598         mac_data.tbl_mcast_item_vld = 1;
1599         dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1600                        0x3F, 0, mac_entry->port_mask[0]);
1601
1602         dev_dbg(dsaf_dev->dev,
1603                 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1604                 dsaf_dev->ae_dev.name, mac_key.high.val,
1605                 mac_key.low.val, entry_index);
1606
1607         hns_dsaf_tcam_mc_cfg(
1608                 dsaf_dev, entry_index,
1609                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1610
1611         /* config software entry */
1612         soft_mac_entry += entry_index;
1613         soft_mac_entry->index = entry_index;
1614         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1615         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1616
1617         return 0;
1618 }
1619
1620 /**
1621  * hns_dsaf_add_mac_mc_port - add mac mc-port
1622  * @dsaf_dev: dsa fabric device struct pointer
1623  * @mac_entry: mc-mac entry
1624  */
1625 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1626                              struct dsaf_drv_mac_single_dest_entry *mac_entry)
1627 {
1628         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1629         struct dsaf_drv_tbl_tcam_key mac_key;
1630         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1631         struct dsaf_drv_priv *priv =
1632             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1633         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1634         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1635         int mskid;
1636
1637         /*chechk mac addr */
1638         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1639                 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1640                         mac_entry->addr);
1641                 return -EINVAL;
1642         }
1643
1644         /*config key */
1645         hns_dsaf_set_mac_key(
1646                 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1647                 mac_entry->in_port_num, mac_entry->addr);
1648
1649         memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1650
1651         /*check exist? */
1652         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1653         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1654                 /*if hasnot , find a empty*/
1655                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1656                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1657                         /*if hasnot empty, error*/
1658                         dev_err(dsaf_dev->dev,
1659                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1660                                 dsaf_dev->ae_dev.name, mac_key.high.val,
1661                                 mac_key.low.val);
1662                         return -EINVAL;
1663                 }
1664         } else {
1665                 /*if exist, add in */
1666                 hns_dsaf_tcam_mc_get(
1667                         dsaf_dev, entry_index,
1668                         (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1669         }
1670         /* config hardware entry */
1671         if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1672                 mskid = mac_entry->port_num;
1673         } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1674                 mskid = mac_entry->port_num -
1675                         DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1676         } else {
1677                 dev_err(dsaf_dev->dev,
1678                         "%s,pnum(%d)error,key(%#x:%#x)\n",
1679                         dsaf_dev->ae_dev.name, mac_entry->port_num,
1680                         mac_key.high.val, mac_key.low.val);
1681                 return -EINVAL;
1682         }
1683         dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1684         mac_data.tbl_mcast_old_en = 0;
1685         mac_data.tbl_mcast_item_vld = 1;
1686
1687         dev_dbg(dsaf_dev->dev,
1688                 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1689                 dsaf_dev->ae_dev.name, mac_key.high.val,
1690                 mac_key.low.val, entry_index);
1691
1692         hns_dsaf_tcam_mc_cfg(
1693                 dsaf_dev, entry_index,
1694                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1695
1696         /*config software entry */
1697         soft_mac_entry += entry_index;
1698         soft_mac_entry->index = entry_index;
1699         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1700         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1701
1702         return 0;
1703 }
1704
1705 /**
1706  * hns_dsaf_del_mac_entry - del mac mc-port
1707  * @dsaf_dev: dsa fabric device struct pointer
1708  * @vlan_id: vlian id
1709  * @in_port_num: input port num
1710  * @addr : mac addr
1711  */
1712 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1713                            u8 in_port_num, u8 *addr)
1714 {
1715         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1716         struct dsaf_drv_tbl_tcam_key mac_key;
1717         struct dsaf_drv_priv *priv =
1718             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1719         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1720
1721         /*check mac addr */
1722         if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1723                 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1724                         addr);
1725                 return -EINVAL;
1726         }
1727
1728         /*config key */
1729         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1730
1731         /*exist ?*/
1732         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1733         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1734                 /*not exist, error */
1735                 dev_err(dsaf_dev->dev,
1736                         "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1737                         dsaf_dev->ae_dev.name,
1738                         mac_key.high.val, mac_key.low.val);
1739                 return -EINVAL;
1740         }
1741         dev_dbg(dsaf_dev->dev,
1742                 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1743                 dsaf_dev->ae_dev.name, mac_key.high.val,
1744                 mac_key.low.val, entry_index);
1745
1746         /*do del opt*/
1747         hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1748
1749         /*del soft emtry */
1750         soft_mac_entry += entry_index;
1751         soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1752
1753         return 0;
1754 }
1755
1756 /**
1757  * hns_dsaf_del_mac_mc_port - del mac mc- port
1758  * @dsaf_dev: dsa fabric device struct pointer
1759  * @mac_entry: mac entry
1760  */
1761 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1762                              struct dsaf_drv_mac_single_dest_entry *mac_entry)
1763 {
1764         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1765         struct dsaf_drv_tbl_tcam_key mac_key;
1766         struct dsaf_drv_priv *priv =
1767             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1768         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1769         u16 vlan_id;
1770         u8 in_port_num;
1771         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1772         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1773         int mskid;
1774         const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1775
1776         if (!(void *)mac_entry) {
1777                 dev_err(dsaf_dev->dev,
1778                         "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1779                 return -EINVAL;
1780         }
1781
1782         /*get key info*/
1783         vlan_id = mac_entry->in_vlan_id;
1784         in_port_num = mac_entry->in_port_num;
1785
1786         /*check mac addr */
1787         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1788                 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1789                         mac_entry->addr);
1790                 return -EINVAL;
1791         }
1792
1793         /*config key */
1794         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1795                              mac_entry->addr);
1796
1797         /*check is exist? */
1798         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1799         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1800                 /*find none */
1801                 dev_err(dsaf_dev->dev,
1802                         "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1803                         dsaf_dev->ae_dev.name,
1804                         mac_key.high.val, mac_key.low.val);
1805                 return -EINVAL;
1806         }
1807
1808         dev_dbg(dsaf_dev->dev,
1809                 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1810                 dsaf_dev->ae_dev.name, mac_key.high.val,
1811                 mac_key.low.val, entry_index);
1812
1813         /*read entry*/
1814         hns_dsaf_tcam_mc_get(
1815                 dsaf_dev, entry_index,
1816                 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1817
1818         /*del the port*/
1819         if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1820                 mskid = mac_entry->port_num;
1821         } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1822                 mskid = mac_entry->port_num -
1823                         DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1824         } else {
1825                 dev_err(dsaf_dev->dev,
1826                         "%s,pnum(%d)error,key(%#x:%#x)\n",
1827                         dsaf_dev->ae_dev.name, mac_entry->port_num,
1828                         mac_key.high.val, mac_key.low.val);
1829                 return -EINVAL;
1830         }
1831         dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1832
1833         /*check non port, do del entry */
1834         if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1835                     sizeof(mac_data.tbl_mcast_port_msk))) {
1836                 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1837
1838                 /* del soft entry */
1839                 soft_mac_entry += entry_index;
1840                 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1841         } else { /* not zer, just del port, updata*/
1842                 hns_dsaf_tcam_mc_cfg(
1843                         dsaf_dev, entry_index,
1844                         (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1845         }
1846
1847         return 0;
1848 }
1849
1850 /**
1851  * hns_dsaf_get_mac_uc_entry - get mac uc entry
1852  * @dsaf_dev: dsa fabric device struct pointer
1853  * @mac_entry: mac entry
1854  */
1855 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1856                               struct dsaf_drv_mac_single_dest_entry *mac_entry)
1857 {
1858         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1859         struct dsaf_drv_tbl_tcam_key mac_key;
1860
1861         struct dsaf_tbl_tcam_ucast_cfg mac_data;
1862
1863         /* check macaddr */
1864         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1865             MAC_IS_BROADCAST(mac_entry->addr)) {
1866                 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1867                         mac_entry->addr);
1868                 return -EINVAL;
1869         }
1870
1871         /*config key */
1872         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1873                              mac_entry->in_port_num, mac_entry->addr);
1874
1875         /*check exist? */
1876         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1877         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1878                 /*find none, error */
1879                 dev_err(dsaf_dev->dev,
1880                         "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1881                         dsaf_dev->ae_dev.name,
1882                         mac_key.high.val, mac_key.low.val);
1883                 return -EINVAL;
1884         }
1885         dev_dbg(dsaf_dev->dev,
1886                 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1887                 dsaf_dev->ae_dev.name, mac_key.high.val,
1888                 mac_key.low.val, entry_index);
1889
1890         /*read entry*/
1891         hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1892                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1893         mac_entry->port_num = mac_data.tbl_ucast_out_port;
1894
1895         return 0;
1896 }
1897
1898 /**
1899  * hns_dsaf_get_mac_mc_entry - get mac mc entry
1900  * @dsaf_dev: dsa fabric device struct pointer
1901  * @mac_entry: mac entry
1902  */
1903 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1904                               struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1905 {
1906         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1907         struct dsaf_drv_tbl_tcam_key mac_key;
1908
1909         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1910
1911         /*check mac addr */
1912         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1913             MAC_IS_BROADCAST(mac_entry->addr)) {
1914                 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1915                         mac_entry->addr);
1916                 return -EINVAL;
1917         }
1918
1919         /*config key */
1920         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1921                              mac_entry->in_port_num, mac_entry->addr);
1922
1923         /*check exist? */
1924         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1925         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1926                 /* find none, error */
1927                 dev_err(dsaf_dev->dev,
1928                         "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1929                         dsaf_dev->ae_dev.name, mac_key.high.val,
1930                         mac_key.low.val);
1931                 return -EINVAL;
1932         }
1933         dev_dbg(dsaf_dev->dev,
1934                 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1935                 dsaf_dev->ae_dev.name, mac_key.high.val,
1936                 mac_key.low.val, entry_index);
1937
1938         /*read entry */
1939         hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1940                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1941
1942         mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1943         return 0;
1944 }
1945
1946 /**
1947  * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1948  * @dsaf_dev: dsa fabric device struct pointer
1949  * @entry_index: tab entry index
1950  * @mac_entry: mac entry
1951  */
1952 int hns_dsaf_get_mac_entry_by_index(
1953         struct dsaf_device *dsaf_dev,
1954         u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1955 {
1956         struct dsaf_drv_tbl_tcam_key mac_key;
1957
1958         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1959         struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1960         char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1961
1962         if (entry_index >= DSAF_TCAM_SUM) {
1963                 /* find none, del error */
1964                 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1965                         dsaf_dev->ae_dev.name);
1966                 return -EINVAL;
1967         }
1968
1969         /* mc entry, do read opt */
1970         hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1971                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1972
1973         mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1974
1975         /***get mac addr*/
1976         mac_addr[0] = mac_key.high.bits.mac_0;
1977         mac_addr[1] = mac_key.high.bits.mac_1;
1978         mac_addr[2] = mac_key.high.bits.mac_2;
1979         mac_addr[3] = mac_key.high.bits.mac_3;
1980         mac_addr[4] = mac_key.low.bits.mac_4;
1981         mac_addr[5] = mac_key.low.bits.mac_5;
1982         /**is mc or uc*/
1983         if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1984             MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1985                 /**mc donot do*/
1986         } else {
1987                 /*is not mc, just uc... */
1988                 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1989                                      (struct dsaf_tbl_tcam_data *)&mac_key,
1990                                      &mac_uc_data);
1991                 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1992         }
1993
1994         return 0;
1995 }
1996
1997 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1998                                               size_t sizeof_priv)
1999 {
2000         struct dsaf_device *dsaf_dev;
2001
2002         dsaf_dev = devm_kzalloc(dev,
2003                                 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
2004         if (unlikely(!dsaf_dev)) {
2005                 dsaf_dev = ERR_PTR(-ENOMEM);
2006         } else {
2007                 dsaf_dev->dev = dev;
2008                 dev_set_drvdata(dev, dsaf_dev);
2009         }
2010
2011         return dsaf_dev;
2012 }
2013
2014 /**
2015  * hns_dsaf_free_dev - free dev mem
2016  * @dev: struct device pointer
2017  */
2018 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
2019 {
2020         (void)dev_set_drvdata(dsaf_dev->dev, NULL);
2021 }
2022
2023 /**
2024  * dsaf_pfc_unit_cnt - set pfc unit count
2025  * @dsaf_id: dsa fabric id
2026  * @pport_rate:  value array
2027  * @pdsaf_pfc_unit_cnt:  value array
2028  */
2029 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int  mac_id,
2030                                   enum dsaf_port_rate_mode rate)
2031 {
2032         u32 unit_cnt;
2033
2034         switch (rate) {
2035         case DSAF_PORT_RATE_10000:
2036                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2037                 break;
2038         case DSAF_PORT_RATE_1000:
2039                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2040                 break;
2041         case DSAF_PORT_RATE_2500:
2042                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2043                 break;
2044         default:
2045                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2046         }
2047
2048         dsaf_set_dev_field(dsaf_dev,
2049                            (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2050                            DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2051                            unit_cnt);
2052 }
2053
2054 /**
2055  * dsaf_port_work_rate_cfg - fifo
2056  * @dsaf_id: dsa fabric id
2057  * @xge_ge_work_mode
2058  */
2059 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2060                                  enum dsaf_port_rate_mode rate_mode)
2061 {
2062         u32 port_work_mode;
2063
2064         port_work_mode = dsaf_read_dev(
2065                 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2066
2067         if (rate_mode == DSAF_PORT_RATE_10000)
2068                 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2069         else
2070                 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2071
2072         dsaf_write_dev(dsaf_dev,
2073                        DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2074                        port_work_mode);
2075
2076         hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2077 }
2078
2079 /**
2080  * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2081  * @mac_cb: mac contrl block
2082  */
2083 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2084 {
2085         enum dsaf_port_rate_mode mode;
2086         struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2087         int mac_id = mac_cb->mac_id;
2088
2089         if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2090                 return;
2091         if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2092                 mode = DSAF_PORT_RATE_10000;
2093         else
2094                 mode = DSAF_PORT_RATE_1000;
2095
2096         hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2097 }
2098
2099 static u32 hns_dsaf_get_inode_prio_reg(int index)
2100 {
2101         int base_index, offset;
2102         u32 base_addr = DSAF_INODE_IN_PRIO_PAUSE_BASE_REG;
2103
2104         base_index = (index + 1) / DSAF_REG_PER_ZONE;
2105         offset = (index + 1) % DSAF_REG_PER_ZONE;
2106
2107         return base_addr + DSAF_INODE_IN_PRIO_PAUSE_BASE_OFFSET * base_index +
2108                 DSAF_INODE_IN_PRIO_PAUSE_OFFSET * offset;
2109 }
2110
2111 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2112 {
2113         struct dsaf_hw_stats *hw_stats
2114                 = &dsaf_dev->hw_stats[node_num];
2115         bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2116         int i;
2117         u32 reg_tmp;
2118
2119         hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2120                 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2121         hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2122                 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2123         hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2124                 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2125         hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2126                 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2127
2128         reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2129                             DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2130         hw_stats->rx_pause_frame +=
2131                 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2132
2133         hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2134                 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2135         hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2136                 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2137         hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2138                 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2139         hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2140                 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2141         hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2142                 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2143         hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2144                 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2145
2146         hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2147                 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2148         hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2149                 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2150
2151         /* pfc pause frame statistics stored in dsaf inode*/
2152         if ((node_num < DSAF_SERVICE_NW_NUM) && !is_ver1) {
2153                 for (i = 0; i < DSAF_PRIO_NR; i++) {
2154                         reg_tmp = hns_dsaf_get_inode_prio_reg(i);
2155                         hw_stats->rx_pfc[i] += dsaf_read_dev(dsaf_dev,
2156                                 reg_tmp + 0x4 * (u64)node_num);
2157                         hw_stats->tx_pfc[i] += dsaf_read_dev(dsaf_dev,
2158                                 DSAF_XOD_XGE_PFC_PRIO_CNT_BASE_REG +
2159                                 DSAF_XOD_XGE_PFC_PRIO_CNT_OFFSET * i +
2160                                 0xF0 * (u64)node_num);
2161                 }
2162         }
2163         hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2164                 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2165 }
2166
2167 /**
2168  *hns_dsaf_get_regs - dump dsaf regs
2169  *@dsaf_dev: dsaf device
2170  *@data:data for value of regs
2171  */
2172 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2173 {
2174         u32 i = 0;
2175         u32 j;
2176         u32 *p = data;
2177         u32 reg_tmp;
2178         bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2179
2180         /* dsaf common registers */
2181         p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2182         p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2183         p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2184         p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2185         p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2186         p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2187         p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2188         p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2189         p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2190
2191         p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2192         p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2193         p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2194         p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2195         p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2196         p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2197         p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2198         p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2199         p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2200         p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2201         p[19] =  dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2202         p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2203         p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2204         p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2205         p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2206
2207         for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2208                 p[24 + i] = dsaf_read_dev(ddev,
2209                                 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2210
2211         p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2212
2213         for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2214                 p[33 + i] = dsaf_read_dev(ddev,
2215                                 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2216
2217         for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2218                 p[41 + i] = dsaf_read_dev(ddev,
2219                                 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2220
2221         /* dsaf inode registers */
2222         p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2223
2224         p[171] = dsaf_read_dev(ddev,
2225                         DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2226
2227         for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2228                 j = i * DSAF_COMM_CHN + port;
2229                 p[172 + i] = dsaf_read_dev(ddev,
2230                                 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2231                 p[175 + i] = dsaf_read_dev(ddev,
2232                                 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2233                 p[178 + i] = dsaf_read_dev(ddev,
2234                                 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2235                 p[181 + i] = dsaf_read_dev(ddev,
2236                                 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2237                 p[184 + i] = dsaf_read_dev(ddev,
2238                                 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2239                 p[187 + i] = dsaf_read_dev(ddev,
2240                                 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2241                 p[190 + i] = dsaf_read_dev(ddev,
2242                                 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2243                 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2244                                     DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2245                 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
2246                 p[196 + i] = dsaf_read_dev(ddev,
2247                                 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2248                 p[199 + i] = dsaf_read_dev(ddev,
2249                                 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2250                 p[202 + i] = dsaf_read_dev(ddev,
2251                                 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2252                 p[205 + i] = dsaf_read_dev(ddev,
2253                                 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2254                 p[208 + i] = dsaf_read_dev(ddev,
2255                                 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2256                 p[211 + i] = dsaf_read_dev(ddev,
2257                         DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2258                 p[214 + i] = dsaf_read_dev(ddev,
2259                                 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2260                 p[217 + i] = dsaf_read_dev(ddev,
2261                                 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2262                 p[220 + i] = dsaf_read_dev(ddev,
2263                                 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2264                 p[223 + i] = dsaf_read_dev(ddev,
2265                                 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2266                 p[224 + i] = dsaf_read_dev(ddev,
2267                                 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2268         }
2269
2270         p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2271
2272         for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2273                 j = i * DSAF_COMM_CHN + port;
2274                 p[228 + i] = dsaf_read_dev(ddev,
2275                                 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2276         }
2277
2278         p[231] = dsaf_read_dev(ddev,
2279                 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2280
2281         /* dsaf inode registers */
2282         for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2283                 j = i * DSAF_COMM_CHN + port;
2284                 p[232 + i] = dsaf_read_dev(ddev,
2285                                 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2286                 p[235 + i] = dsaf_read_dev(ddev,
2287                                 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2288                 p[238 + i] = dsaf_read_dev(ddev,
2289                                 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2290                 p[241 + i] = dsaf_read_dev(ddev,
2291                                 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2292                 p[244 + i] = dsaf_read_dev(ddev,
2293                                 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2294                 p[245 + i] = dsaf_read_dev(ddev,
2295                                 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2296                 p[248 + i] = dsaf_read_dev(ddev,
2297                                 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2298                 p[251 + i] = dsaf_read_dev(ddev,
2299                                 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2300                 p[254 + i] = dsaf_read_dev(ddev,
2301                                 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2302                 p[257 + i] = dsaf_read_dev(ddev,
2303                                 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2304                 p[260 + i] = dsaf_read_dev(ddev,
2305                                 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2306                 p[263 + i] = dsaf_read_dev(ddev,
2307                                 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2308                 p[266 + i] = dsaf_read_dev(ddev,
2309                                 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2310                 p[269 + i] = dsaf_read_dev(ddev,
2311                                 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2312                 p[272 + i] = dsaf_read_dev(ddev,
2313                                 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2314                 p[275 + i] = dsaf_read_dev(ddev,
2315                                 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2316                 p[278 + i] = dsaf_read_dev(ddev,
2317                                 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2318                 p[281 + i] = dsaf_read_dev(ddev,
2319                                 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2320                 p[284 + i] = dsaf_read_dev(ddev,
2321                                 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2322                 p[287 + i] = dsaf_read_dev(ddev,
2323                                 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2324                 p[290 + i] = dsaf_read_dev(ddev,
2325                                 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2326                 p[293 + i] = dsaf_read_dev(ddev,
2327                                 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2328                 p[296 + i] = dsaf_read_dev(ddev,
2329                                 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2330                 p[299 + i] = dsaf_read_dev(ddev,
2331                                 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2332                 p[302 + i] = dsaf_read_dev(ddev,
2333                                 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2334                 p[305 + i] = dsaf_read_dev(ddev,
2335                                 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2336                 p[308 + i] = dsaf_read_dev(ddev,
2337                                 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2338         }
2339
2340         /* dsaf onode registers */
2341         for (i = 0; i < DSAF_XOD_NUM; i++) {
2342                 p[311 + i] = dsaf_read_dev(ddev,
2343                                 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
2344                 p[319 + i] = dsaf_read_dev(ddev,
2345                                 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
2346                 p[327 + i] = dsaf_read_dev(ddev,
2347                                 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
2348                 p[335 + i] = dsaf_read_dev(ddev,
2349                                 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
2350                 p[343 + i] = dsaf_read_dev(ddev,
2351                                 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
2352                 p[351 + i] = dsaf_read_dev(ddev,
2353                                 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
2354         }
2355
2356         p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2357         p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2358         p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2359
2360         for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2361                 j = i * DSAF_COMM_CHN + port;
2362                 p[362 + i] = dsaf_read_dev(ddev,
2363                                 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2364                 p[365 + i] = dsaf_read_dev(ddev,
2365                                 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2366                 p[368 + i] = dsaf_read_dev(ddev,
2367                                 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2368                 p[371 + i] = dsaf_read_dev(ddev,
2369                                 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2370                 p[374 + i] = dsaf_read_dev(ddev,
2371                                 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2372                 p[377 + i] = dsaf_read_dev(ddev,
2373                                 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2374                 p[380 + i] = dsaf_read_dev(ddev,
2375                                 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2376                 p[383 + i] = dsaf_read_dev(ddev,
2377                                 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2378                 p[386 + i] = dsaf_read_dev(ddev,
2379                                 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2380                 p[389 + i] = dsaf_read_dev(ddev,
2381                                 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2382         }
2383
2384         p[392] = dsaf_read_dev(ddev,
2385                 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2386         p[393] = dsaf_read_dev(ddev,
2387                 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2388         p[394] = dsaf_read_dev(ddev,
2389                 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2390         p[395] = dsaf_read_dev(ddev,
2391                 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2392         p[396] = dsaf_read_dev(ddev,
2393                 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2394         p[397] = dsaf_read_dev(ddev,
2395                 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2396         p[398] = dsaf_read_dev(ddev,
2397                 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2398         p[399] = dsaf_read_dev(ddev,
2399                 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2400         p[400] = dsaf_read_dev(ddev,
2401                 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2402         p[401] = dsaf_read_dev(ddev,
2403                 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2404         p[402] = dsaf_read_dev(ddev,
2405                 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2406         p[403] = dsaf_read_dev(ddev,
2407                 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2408         p[404] = dsaf_read_dev(ddev,
2409                 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2410
2411         /* dsaf voq registers */
2412         for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2413                 j = (i * DSAF_COMM_CHN + port) * 0x90;
2414                 p[405 + i] = dsaf_read_dev(ddev,
2415                         DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2416                 p[408 + i] = dsaf_read_dev(ddev,
2417                         DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2418                 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2419                 p[414 + i] = dsaf_read_dev(ddev,
2420                         DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2421                 p[417 + i] = dsaf_read_dev(ddev,
2422                         DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2423                 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2424                 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2425                 p[426 + i] = dsaf_read_dev(ddev,
2426                         DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2427                 p[429 + i] = dsaf_read_dev(ddev,
2428                         DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2429                 p[432 + i] = dsaf_read_dev(ddev,
2430                         DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2431                 p[435 + i] = dsaf_read_dev(ddev,
2432                         DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2433                 p[438 + i] = dsaf_read_dev(ddev,
2434                         DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2435         }
2436
2437         /* dsaf tbl registers */
2438         p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2439         p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2440         p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2441         p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2442         p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2443         p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2444         p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2445         p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2446         p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2447         p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2448         p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2449         p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2450         p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2451         p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2452         p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2453         p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2454         p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2455         p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2456         p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2457         p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2458         p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2459         p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2460         p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2461
2462         for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2463                 j = i * 0x8;
2464                 p[464 + 2 * i] = dsaf_read_dev(ddev,
2465                         DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2466                 p[465 + 2 * i] = dsaf_read_dev(ddev,
2467                         DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2468         }
2469
2470         p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2471         p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2472         p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2473         p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2474         p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2475         p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2476         p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2477         p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2478         p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2479         p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2480         p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2481         p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2482
2483         /* dsaf other registers */
2484         p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2485         p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2486         p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2487         p[495] = dsaf_read_dev(ddev,
2488                 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2489         p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2490         p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2491
2492         if (!is_ver1)
2493                 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2494
2495         /* mark end of dsaf regs */
2496         for (i = 499; i < 504; i++)
2497                 p[i] = 0xdddddddd;
2498 }
2499
2500 static char *hns_dsaf_get_node_stats_strings(char *data, int node,
2501                                              struct dsaf_device *dsaf_dev)
2502 {
2503         char *buff = data;
2504         int i;
2505         bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2506
2507         snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2508         buff = buff + ETH_GSTRING_LEN;
2509         snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2510         buff = buff + ETH_GSTRING_LEN;
2511         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2512         buff = buff + ETH_GSTRING_LEN;
2513         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2514         buff = buff + ETH_GSTRING_LEN;
2515         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2516         buff = buff + ETH_GSTRING_LEN;
2517         snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2518         buff = buff + ETH_GSTRING_LEN;
2519         snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2520         buff = buff + ETH_GSTRING_LEN;
2521         snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2522         buff = buff + ETH_GSTRING_LEN;
2523         snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2524         buff = buff + ETH_GSTRING_LEN;
2525         snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2526         buff = buff + ETH_GSTRING_LEN;
2527         snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2528         buff = buff + ETH_GSTRING_LEN;
2529         snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2530         buff = buff + ETH_GSTRING_LEN;
2531         snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2532         buff = buff + ETH_GSTRING_LEN;
2533         if ((node < DSAF_SERVICE_NW_NUM) && (!is_ver1)) {
2534                 for (i = 0; i < DSAF_PRIO_NR; i++) {
2535                         snprintf(buff, ETH_GSTRING_LEN,
2536                                  "inod%d_pfc_prio%d_pkts", node, i);
2537                         buff = buff + ETH_GSTRING_LEN;
2538                 }
2539                 for (i = 0; i < DSAF_PRIO_NR; i++) {
2540                         snprintf(buff, ETH_GSTRING_LEN,
2541                                  "onod%d_pfc_prio%d_pkts", node, i);
2542                         buff = buff + ETH_GSTRING_LEN;
2543                 }
2544         }
2545         snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2546         buff = buff + ETH_GSTRING_LEN;
2547
2548         return buff;
2549 }
2550
2551 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2552                                     int node_num)
2553 {
2554         u64 *p = data;
2555         int i;
2556         struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2557         bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2558
2559         p[0] = hw_stats->pad_drop;
2560         p[1] = hw_stats->man_pkts;
2561         p[2] = hw_stats->rx_pkts;
2562         p[3] = hw_stats->rx_pkt_id;
2563         p[4] = hw_stats->rx_pause_frame;
2564         p[5] = hw_stats->release_buf_num;
2565         p[6] = hw_stats->sbm_drop;
2566         p[7] = hw_stats->crc_false;
2567         p[8] = hw_stats->bp_drop;
2568         p[9] = hw_stats->rslt_drop;
2569         p[10] = hw_stats->local_addr_false;
2570         p[11] = hw_stats->vlan_drop;
2571         p[12] = hw_stats->stp_drop;
2572         if ((node_num < DSAF_SERVICE_NW_NUM) && (!is_ver1)) {
2573                 for (i = 0; i < DSAF_PRIO_NR; i++) {
2574                         p[13 + i] = hw_stats->rx_pfc[i];
2575                         p[13 + i + DSAF_PRIO_NR] = hw_stats->tx_pfc[i];
2576                 }
2577                 p[29] = hw_stats->tx_pkts;
2578                 return &p[30];
2579         }
2580
2581         p[13] = hw_stats->tx_pkts;
2582         return &p[14];
2583 }
2584
2585 /**
2586  *hns_dsaf_get_stats - get dsaf statistic
2587  *@ddev: dsaf device
2588  *@data:statistic value
2589  *@port: port num
2590  */
2591 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2592 {
2593         u64 *p = data;
2594         int node_num = port;
2595
2596         /* for ge/xge node info */
2597         p = hns_dsaf_get_node_stats(ddev, p, node_num);
2598
2599         /* for ppe node info */
2600         node_num = port + DSAF_PPE_INODE_BASE;
2601         (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2602 }
2603
2604 /**
2605  *hns_dsaf_get_sset_count - get dsaf string set count
2606  *@stringset: type of values in data
2607  *return dsaf string name count
2608  */
2609 int hns_dsaf_get_sset_count(struct dsaf_device *dsaf_dev, int stringset)
2610 {
2611         bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2612
2613         if (stringset == ETH_SS_STATS) {
2614                 if (is_ver1)
2615                         return DSAF_STATIC_NUM;
2616                 else
2617                         return DSAF_V2_STATIC_NUM;
2618         }
2619         return 0;
2620 }
2621
2622 /**
2623  *hns_dsaf_get_strings - get dsaf string set
2624  *@stringset:srting set index
2625  *@data:strings name value
2626  *@port:port index
2627  */
2628 void hns_dsaf_get_strings(int stringset, u8 *data, int port,
2629                           struct dsaf_device *dsaf_dev)
2630 {
2631         char *buff = (char *)data;
2632         int node = port;
2633
2634         if (stringset != ETH_SS_STATS)
2635                 return;
2636
2637         /* for ge/xge node info */
2638         buff = hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev);
2639
2640         /* for ppe node info */
2641         node = port + DSAF_PPE_INODE_BASE;
2642         (void)hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev);
2643 }
2644
2645 /**
2646  *hns_dsaf_get_sset_count - get dsaf regs count
2647  *return dsaf regs count
2648  */
2649 int hns_dsaf_get_regs_count(void)
2650 {
2651         return DSAF_DUMP_REGS_NUM;
2652 }
2653
2654 /**
2655  * dsaf_probe - probo dsaf dev
2656  * @pdev: dasf platform device
2657  * retuen 0 - success , negative --fail
2658  */
2659 static int hns_dsaf_probe(struct platform_device *pdev)
2660 {
2661         struct dsaf_device *dsaf_dev;
2662         int ret;
2663
2664         dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2665         if (IS_ERR(dsaf_dev)) {
2666                 ret = PTR_ERR(dsaf_dev);
2667                 dev_err(&pdev->dev,
2668                         "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2669                 return ret;
2670         }
2671
2672         ret = hns_dsaf_get_cfg(dsaf_dev);
2673         if (ret)
2674                 goto free_dev;
2675
2676         ret = hns_dsaf_init(dsaf_dev);
2677         if (ret)
2678                 goto free_dev;
2679
2680         ret = hns_mac_init(dsaf_dev);
2681         if (ret)
2682                 goto uninit_dsaf;
2683
2684         ret = hns_ppe_init(dsaf_dev);
2685         if (ret)
2686                 goto uninit_mac;
2687
2688         ret = hns_dsaf_ae_init(dsaf_dev);
2689         if (ret)
2690                 goto uninit_ppe;
2691
2692         return 0;
2693
2694 uninit_ppe:
2695         hns_ppe_uninit(dsaf_dev);
2696
2697 uninit_mac:
2698         hns_mac_uninit(dsaf_dev);
2699
2700 uninit_dsaf:
2701         hns_dsaf_free(dsaf_dev);
2702
2703 free_dev:
2704         hns_dsaf_free_dev(dsaf_dev);
2705
2706         return ret;
2707 }
2708
2709 /**
2710  * dsaf_remove - remove dsaf dev
2711  * @pdev: dasf platform device
2712  */
2713 static int hns_dsaf_remove(struct platform_device *pdev)
2714 {
2715         struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2716
2717         hns_dsaf_ae_uninit(dsaf_dev);
2718
2719         hns_ppe_uninit(dsaf_dev);
2720
2721         hns_mac_uninit(dsaf_dev);
2722
2723         hns_dsaf_free(dsaf_dev);
2724
2725         hns_dsaf_free_dev(dsaf_dev);
2726
2727         return 0;
2728 }
2729
2730 static const struct of_device_id g_dsaf_match[] = {
2731         {.compatible = "hisilicon,hns-dsaf-v1"},
2732         {.compatible = "hisilicon,hns-dsaf-v2"},
2733         {}
2734 };
2735
2736 static struct platform_driver g_dsaf_driver = {
2737         .probe = hns_dsaf_probe,
2738         .remove = hns_dsaf_remove,
2739         .driver = {
2740                 .name = DSAF_DRV_NAME,
2741                 .of_match_table = g_dsaf_match,
2742                 .acpi_match_table = hns_dsaf_acpi_match,
2743         },
2744 };
2745
2746 module_platform_driver(g_dsaf_driver);
2747
2748 MODULE_LICENSE("GPL");
2749 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2750 MODULE_DESCRIPTION("HNS DSAF driver");
2751 MODULE_VERSION(DSAF_MOD_VERSION);