drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include "hns_dsaf_mac.h"
  11 #include "hns_dsaf_misc.h"
  12 #include "hns_dsaf_ppe.h"
  13 #include "hns_dsaf_reg.h"
  14
  15 enum _dsm_op_index {
  16         HNS_OP_RESET_FUNC               = 0x1,
  17         HNS_OP_SERDES_LP_FUNC           = 0x2,
  18         HNS_OP_LED_SET_FUNC             = 0x3,
  19         HNS_OP_GET_PORT_TYPE_FUNC       = 0x4,
  20         HNS_OP_GET_SFP_STAT_FUNC        = 0x5,
  21 };
  22
  23 enum _dsm_rst_type {
  24         HNS_DSAF_RESET_FUNC     = 0x1,
  25         HNS_PPE_RESET_FUNC      = 0x2,
  26         HNS_XGE_CORE_RESET_FUNC = 0x3,
  27         HNS_XGE_RESET_FUNC      = 0x4,
  28         HNS_GE_RESET_FUNC       = 0x5,
  29 };
  30
  31 const u8 hns_dsaf_acpi_dsm_uuid[] = {
  32         0x1A, 0xAA, 0x85, 0x1A, 0x93, 0xE2, 0x5E, 0x41,
  33         0x8E, 0x28, 0x8D, 0x69, 0x0A, 0x0F, 0x82, 0x0A
  34 };
  35
  36 static void dsaf_write_sub(struct dsaf_device *dsaf_dev, u32 reg, u32 val)
  37 {
  38         if (dsaf_dev->sub_ctrl)
  39                 dsaf_write_syscon(dsaf_dev->sub_ctrl, reg, val);
  40         else
  41                 dsaf_write_reg(dsaf_dev->sc_base, reg, val);
  42 }
  43
  44 static u32 dsaf_read_sub(struct dsaf_device *dsaf_dev, u32 reg)
  45 {
  46         u32 ret;
  47
  48         if (dsaf_dev->sub_ctrl)
  49                 ret = dsaf_read_syscon(dsaf_dev->sub_ctrl, reg);
  50         else
  51                 ret = dsaf_read_reg(dsaf_dev->sc_base, reg);
  52
  53         return ret;
  54 }
  55
  56 static void hns_cpld_set_led(struct hns_mac_cb *mac_cb, int link_status,
  57                              u16 speed, int data)
  58 {
  59         int speed_reg = 0;
  60         u8 value;
  61
  62         if (!mac_cb) {
  63                 pr_err("sfp_led_opt mac_dev is null!\n");
  64                 return;
  65         }
  66         if (!mac_cb->cpld_ctrl) {
  67                 dev_err(mac_cb->dev, "mac_id=%d, cpld syscon is null !\n",
  68                         mac_cb->mac_id);
  69                 return;
  70         }
  71
  72         if (speed == MAC_SPEED_10000)
  73                 speed_reg = 1;
  74
  75         value = mac_cb->cpld_led_value;
  76
  77         if (link_status) {
  78                 dsaf_set_bit(value, DSAF_LED_LINK_B, link_status);
  79                 dsaf_set_field(value, DSAF_LED_SPEED_M,
  80                                DSAF_LED_SPEED_S, speed_reg);
  81                 dsaf_set_bit(value, DSAF_LED_DATA_B, data);
  82
  83                 if (value != mac_cb->cpld_led_value) {
  84                         dsaf_write_syscon(mac_cb->cpld_ctrl,
  85                                           mac_cb->cpld_ctrl_reg, value);
  86                         mac_cb->cpld_led_value = value;
  87                 }
  88         } else {
  89                 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
  90                                   CPLD_LED_DEFAULT_VALUE);
  91                 mac_cb->cpld_led_value = CPLD_LED_DEFAULT_VALUE;
  92         }
  93 }
  94
  95 static void cpld_led_reset(struct hns_mac_cb *mac_cb)
  96 {
  97         if (!mac_cb || !mac_cb->cpld_ctrl)
  98                 return;
  99
 100         dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
 101                           CPLD_LED_DEFAULT_VALUE);
 102         mac_cb->cpld_led_value = CPLD_LED_DEFAULT_VALUE;
 103 }
 104
 105 static int cpld_set_led_id(struct hns_mac_cb *mac_cb,
 106                            enum hnae_led_state status)
 107 {
 108         switch (status) {
 109         case HNAE_LED_ACTIVE:
 110                 mac_cb->cpld_led_value =
 111                         dsaf_read_syscon(mac_cb->cpld_ctrl,
 112                                          mac_cb->cpld_ctrl_reg);
 113                 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
 114                              CPLD_LED_ON_VALUE);
 115                 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
 116                                   mac_cb->cpld_led_value);
 117                 return 2;
 118         case HNAE_LED_INACTIVE:
 119                 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
 120                              CPLD_LED_DEFAULT_VALUE);
 121                 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
 122                                   mac_cb->cpld_led_value);
 123                 break;
 124         default:
 125                 break;
 126         }
 127
 128         return 0;
 129 }
 130
 131 #define RESET_REQ_OR_DREQ 1
 132
 133 static void hns_dsaf_acpi_srst_by_port(struct dsaf_device *dsaf_dev, u8 op_type,
 134                                        u32 port_type, u32 port, u32 val)
 135 {
 136         union acpi_object *obj;
 137         union acpi_object obj_args[3], argv4;
 138
 139         obj_args[0].integer.type = ACPI_TYPE_INTEGER;
 140         obj_args[0].integer.value = port_type;
 141         obj_args[1].integer.type = ACPI_TYPE_INTEGER;
 142         obj_args[1].integer.value = port;
 143         obj_args[2].integer.type = ACPI_TYPE_INTEGER;
 144         obj_args[2].integer.value = val;
 145
 146         argv4.type = ACPI_TYPE_PACKAGE;
 147         argv4.package.count = 3;
 148         argv4.package.elements = obj_args;
 149
 150         obj = acpi_evaluate_dsm(ACPI_HANDLE(dsaf_dev->dev),
 151                                 hns_dsaf_acpi_dsm_uuid, 0, op_type, &argv4);
 152         if (!obj) {
 153                 dev_warn(dsaf_dev->dev, "reset port_type%d port%d fail!",
 154                          port_type, port);
 155                 return;
 156         }
 157
 158         ACPI_FREE(obj);
 159 }
 160
 161 static void hns_dsaf_rst(struct dsaf_device *dsaf_dev, bool dereset)
 162 {
 163         u32 xbar_reg_addr;
 164         u32 nt_reg_addr;
 165
 166         if (!dereset) {
 167                 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_REQ_REG;
 168                 nt_reg_addr = DSAF_SUB_SC_NT_RESET_REQ_REG;
 169         } else {
 170                 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_DREQ_REG;
 171                 nt_reg_addr = DSAF_SUB_SC_NT_RESET_DREQ_REG;
 172         }
 173
 174         dsaf_write_sub(dsaf_dev, xbar_reg_addr, RESET_REQ_OR_DREQ);
 175         dsaf_write_sub(dsaf_dev, nt_reg_addr, RESET_REQ_OR_DREQ);
 176 }
 177
 178 static void hns_dsaf_rst_acpi(struct dsaf_device *dsaf_dev, bool dereset)
 179 {
 180         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 181                                    HNS_DSAF_RESET_FUNC,
 182                                    0, dereset);
 183 }
 184
 185 static void hns_dsaf_xge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 186                                       bool dereset)
 187 {
 188         u32 reg_val = 0;
 189         u32 reg_addr;
 190
 191         if (port >= DSAF_XGE_NUM)
 192                 return;
 193
 194         reg_val |= RESET_REQ_OR_DREQ;
 195         reg_val |= 0x2082082 << dsaf_dev->mac_cb[port]->port_rst_off;
 196
 197         if (!dereset)
 198                 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
 199         else
 200                 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
 201
 202         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 203 }
 204
 205 static void hns_dsaf_xge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
 206                                            u32 port, bool dereset)
 207 {
 208         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 209                                    HNS_XGE_RESET_FUNC, port, dereset);
 210 }
 211
 212 static void hns_dsaf_xge_core_srst_by_port(struct dsaf_device *dsaf_dev,
 213                                            u32 port, bool dereset)
 214 {
 215         u32 reg_val = 0;
 216         u32 reg_addr;
 217
 218         if (port >= DSAF_XGE_NUM)
 219                 return;
 220
 221         reg_val |= XGMAC_TRX_CORE_SRST_M
 222                 << dsaf_dev->mac_cb[port]->port_rst_off;
 223
 224         if (!dereset)
 225                 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
 226         else
 227                 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
 228
 229         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 230 }
 231
 232 static void
 233 hns_dsaf_xge_core_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
 234                                     u32 port, bool dereset)
 235 {
 236         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 237                                    HNS_XGE_CORE_RESET_FUNC, port, dereset);
 238 }
 239
 240 static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 241                                      bool dereset)
 242 {
 243         u32 reg_val_1;
 244         u32 reg_val_2;
 245         u32 port_rst_off;
 246
 247         if (port >= DSAF_GE_NUM)
 248                 return;
 249
 250         if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
 251                 reg_val_1  = 0x1 << port;
 252                 port_rst_off = dsaf_dev->mac_cb[port]->port_rst_off;
 253                 /* there is difference between V1 and V2 in register.*/
 254                 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 255                         reg_val_2  = 0x1041041 << port_rst_off;
 256                 else
 257                         reg_val_2  = 0x2082082 << port_rst_off;
 258
 259                 if (!dereset) {
 260                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
 261                                        reg_val_1);
 262
 263                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ0_REG,
 264                                        reg_val_2);
 265                 } else {
 266                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ0_REG,
 267                                        reg_val_2);
 268
 269                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
 270                                        reg_val_1);
 271                 }
 272         } else {
 273                 reg_val_1 = 0x15540 << dsaf_dev->reset_offset;
 274
 275                 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 276                         reg_val_2 = 0x100 << dsaf_dev->reset_offset;
 277                 else
 278                         reg_val_2 = 0x40 << dsaf_dev->reset_offset;
 279
 280                 if (!dereset) {
 281                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
 282                                        reg_val_1);
 283
 284                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_REQ_REG,
 285                                        reg_val_2);
 286                 } else {
 287                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
 288                                        reg_val_1);
 289
 290                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_DREQ_REG,
 291                                        reg_val_2);
 292                 }
 293         }
 294 }
 295
 296 static void hns_dsaf_ge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
 297                                           u32 port, bool dereset)
 298 {
 299         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 300                                    HNS_GE_RESET_FUNC, port, dereset);
 301 }
 302
 303 static void hns_ppe_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 304                                  bool dereset)
 305 {
 306         u32 reg_val = 0;
 307         u32 reg_addr;
 308
 309         reg_val |= RESET_REQ_OR_DREQ << dsaf_dev->mac_cb[port]->port_rst_off;
 310
 311         if (!dereset)
 312                 reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
 313         else
 314                 reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
 315
 316         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 317 }
 318
 319 static void
 320 hns_ppe_srst_by_port_acpi(struct dsaf_device *dsaf_dev, u32 port, bool dereset)
 321 {
 322         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 323                                    HNS_PPE_RESET_FUNC, port, dereset);
 324 }
 325
 326 static void hns_ppe_com_srst(struct dsaf_device *dsaf_dev, bool dereset)
 327 {
 328         u32 reg_val;
 329         u32 reg_addr;
 330
 331         if (!(dev_of_node(dsaf_dev->dev)))
 332                 return;
 333
 334         if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
 335                 reg_val = RESET_REQ_OR_DREQ;
 336                 if (!dereset)
 337                         reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_REQ_REG;
 338                 else
 339                         reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_DREQ_REG;
 340
 341         } else {
 342                 reg_val = 0x100 << dsaf_dev->reset_offset;
 343
 344                 if (!dereset)
 345                         reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
 346                 else
 347                         reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
 348         }
 349
 350         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 351 }
 352
 353 /**
 354  * hns_mac_get_sds_mode - get phy ifterface form serdes mode
 355  * @mac_cb: mac control block
 356  * retuen phy interface
 357  */
 358 static phy_interface_t hns_mac_get_phy_if(struct hns_mac_cb *mac_cb)
 359 {
 360         u32 mode;
 361         u32 reg;
 362         bool is_ver1 = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver);
 363         int mac_id = mac_cb->mac_id;
 364         phy_interface_t phy_if;
 365
 366         if (is_ver1) {
 367                 if (HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev))
 368                         return PHY_INTERFACE_MODE_SGMII;
 369
 370                 if (mac_id >= 0 && mac_id <= 3)
 371                         reg = HNS_MAC_HILINK4_REG;
 372                 else
 373                         reg = HNS_MAC_HILINK3_REG;
 374         } else{
 375                 if (!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev) && mac_id <= 3)
 376                         reg = HNS_MAC_HILINK4V2_REG;
 377                 else
 378                         reg = HNS_MAC_HILINK3V2_REG;
 379         }
 380
 381         mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
 382         if (dsaf_get_bit(mode, mac_cb->port_mode_off))
 383                 phy_if = PHY_INTERFACE_MODE_XGMII;
 384         else
 385                 phy_if = PHY_INTERFACE_MODE_SGMII;
 386
 387         return phy_if;
 388 }
 389
 390 static phy_interface_t hns_mac_get_phy_if_acpi(struct hns_mac_cb *mac_cb)
 391 {
 392         phy_interface_t phy_if = PHY_INTERFACE_MODE_NA;
 393         union acpi_object *obj;
 394         union acpi_object obj_args, argv4;
 395
 396         obj_args.integer.type = ACPI_TYPE_INTEGER;
 397         obj_args.integer.value = mac_cb->mac_id;
 398
 399         argv4.type = ACPI_TYPE_PACKAGE,
 400         argv4.package.count = 1,
 401         argv4.package.elements = &obj_args,
 402
 403         obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
 404                                 hns_dsaf_acpi_dsm_uuid, 0,
 405                                 HNS_OP_GET_PORT_TYPE_FUNC, &argv4);
 406
 407         if (!obj || obj->type != ACPI_TYPE_INTEGER)
 408                 return phy_if;
 409
 410         phy_if = obj->integer.value ?
 411                 PHY_INTERFACE_MODE_XGMII : PHY_INTERFACE_MODE_SGMII;
 412
 413         dev_dbg(mac_cb->dev, "mac_id=%d, phy_if=%d\n", mac_cb->mac_id, phy_if);
 414
 415         ACPI_FREE(obj);
 416
 417         return phy_if;
 418 }
 419
 420 int hns_mac_get_sfp_prsnt(struct hns_mac_cb *mac_cb, int *sfp_prsnt)
 421 {
 422         if (!mac_cb->cpld_ctrl)
 423                 return -ENODEV;
 424
 425         *sfp_prsnt = !dsaf_read_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg
 426                                         + MAC_SFP_PORT_OFFSET);
 427
 428         return 0;
 429 }
 430
 431 /**
 432  * hns_mac_config_sds_loopback - set loop back for serdes
 433  * @mac_cb: mac control block
 434  * retuen 0 == success
 435  */
 436 static int hns_mac_config_sds_loopback(struct hns_mac_cb *mac_cb, bool en)
 437 {
 438         /* port 0-3 hilink4 base is serdes_vaddr + 0x00280000
 439          * port 4-7 hilink3 base is serdes_vaddr + 0x00200000
 440          */
 441         u8 *base_addr = (u8 *)mac_cb->serdes_vaddr +
 442                        (mac_cb->mac_id <= 3 ? 0x00280000 : 0x00200000);
 443         const u8 lane_id[] = {
 444                 0,      /* mac 0 -> lane 0 */
 445                 1,      /* mac 1 -> lane 1 */
 446                 2,      /* mac 2 -> lane 2 */
 447                 3,      /* mac 3 -> lane 3 */
 448                 2,      /* mac 4 -> lane 2 */
 449                 3,      /* mac 5 -> lane 3 */
 450                 0,      /* mac 6 -> lane 0 */
 451                 1       /* mac 7 -> lane 1 */
 452         };
 453 #define RX_CSR(lane, reg) ((0x4080 + (reg) * 0x0002 + (lane) * 0x0200) * 2)
 454         u64 reg_offset = RX_CSR(lane_id[mac_cb->mac_id], 0);
 455
 456         int sfp_prsnt;
 457         int ret = hns_mac_get_sfp_prsnt(mac_cb, &sfp_prsnt);
 458
 459         if (!mac_cb->phy_dev) {
 460                 if (ret)
 461                         pr_info("please confirm sfp is present or not\n");
 462                 else
 463                         if (!sfp_prsnt)
 464                                 pr_info("no sfp in this eth\n");
 465         }
 466
 467         if (mac_cb->serdes_ctrl) {
 468                 u32 origin = dsaf_read_syscon(mac_cb->serdes_ctrl, reg_offset);
 469
 470                 dsaf_set_field(origin, 1ull << 10, 10, en);
 471                 dsaf_write_syscon(mac_cb->serdes_ctrl, reg_offset, origin);
 472         } else {
 473                 dsaf_set_reg_field(base_addr, reg_offset, 1ull << 10, 10, en);
 474         }
 475
 476         return 0;
 477 }
 478
 479 static int
 480 hns_mac_config_sds_loopback_acpi(struct hns_mac_cb *mac_cb, bool en)
 481 {
 482         union acpi_object *obj;
 483         union acpi_object obj_args[3], argv4;
 484
 485         obj_args[0].integer.type = ACPI_TYPE_INTEGER;
 486         obj_args[0].integer.value = mac_cb->mac_id;
 487         obj_args[1].integer.type = ACPI_TYPE_INTEGER;
 488         obj_args[1].integer.value = !!en;
 489
 490         argv4.type = ACPI_TYPE_PACKAGE;
 491         argv4.package.count = 2;
 492         argv4.package.elements = obj_args;
 493
 494         obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dsaf_dev->dev),
 495                                 hns_dsaf_acpi_dsm_uuid, 0,
 496                                 HNS_OP_SERDES_LP_FUNC, &argv4);
 497         if (!obj) {
 498                 dev_warn(mac_cb->dsaf_dev->dev, "set port%d serdes lp fail!",
 499                          mac_cb->mac_id);
 500
 501                 return -ENOTSUPP;
 502         }
 503
 504         ACPI_FREE(obj);
 505
 506         return 0;
 507 }
 508
 509 struct dsaf_misc_op *hns_misc_op_get(struct dsaf_device *dsaf_dev)
 510 {
 511         struct dsaf_misc_op *misc_op;
 512
 513         misc_op = devm_kzalloc(dsaf_dev->dev, sizeof(*misc_op), GFP_KERNEL);
 514         if (!misc_op)
 515                 return NULL;
 516
 517         if (dev_of_node(dsaf_dev->dev)) {
 518                 misc_op->cpld_set_led = hns_cpld_set_led;
 519                 misc_op->cpld_reset_led = cpld_led_reset;
 520                 misc_op->cpld_set_led_id = cpld_set_led_id;
 521
 522                 misc_op->dsaf_reset = hns_dsaf_rst;
 523                 misc_op->xge_srst = hns_dsaf_xge_srst_by_port;
 524                 misc_op->xge_core_srst = hns_dsaf_xge_core_srst_by_port;
 525                 misc_op->ge_srst = hns_dsaf_ge_srst_by_port;
 526                 misc_op->ppe_srst = hns_ppe_srst_by_port;
 527                 misc_op->ppe_comm_srst = hns_ppe_com_srst;
 528
 529                 misc_op->get_phy_if = hns_mac_get_phy_if;
 530                 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
 531
 532                 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback;
 533         } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
 534                 misc_op->cpld_set_led = hns_cpld_set_led;
 535                 misc_op->cpld_reset_led = cpld_led_reset;
 536                 misc_op->cpld_set_led_id = cpld_set_led_id;
 537
 538                 misc_op->dsaf_reset = hns_dsaf_rst_acpi;
 539                 misc_op->xge_srst = hns_dsaf_xge_srst_by_port_acpi;
 540                 misc_op->xge_core_srst = hns_dsaf_xge_core_srst_by_port_acpi;
 541                 misc_op->ge_srst = hns_dsaf_ge_srst_by_port_acpi;
 542                 misc_op->ppe_srst = hns_ppe_srst_by_port_acpi;
 543                 misc_op->ppe_comm_srst = hns_ppe_com_srst;
 544
 545                 misc_op->get_phy_if = hns_mac_get_phy_if_acpi;
 546                 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
 547
 548                 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback_acpi;
 549         } else {
 550                 devm_kfree(dsaf_dev->dev, (void *)misc_op);
 551                 misc_op = NULL;
 552         }
 553
 554         return (void *)misc_op;
 555 }