1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 2
42 #define DRV_VERSION_BUILD 11
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
274 void i40e_tx_timeout(struct net_device *netdev)
276 static void i40e_tx_timeout(struct net_device *netdev)
279 struct i40e_netdev_priv *np = netdev_priv(netdev);
280 struct i40e_vsi *vsi = np->vsi;
281 struct i40e_pf *pf = vsi->back;
283 pf->tx_timeout_count++;
285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
286 pf->tx_timeout_recovery_level = 1;
287 pf->tx_timeout_last_recovery = jiffies;
288 netdev_info(netdev, "tx_timeout recovery level %d\n",
289 pf->tx_timeout_recovery_level);
291 switch (pf->tx_timeout_recovery_level) {
293 /* disable and re-enable queues for the VSI */
294 if (in_interrupt()) {
295 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
298 i40e_vsi_reinit_locked(vsi);
302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
312 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
316 i40e_service_event_schedule(pf);
317 pf->tx_timeout_recovery_level++;
321 * i40e_release_rx_desc - Store the new tail and head values
322 * @rx_ring: ring to bump
323 * @val: new head index
325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
327 rx_ring->next_to_use = val;
329 /* Force memory writes to complete before letting h/w
330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
335 writel(val, rx_ring->tail);
339 * i40e_get_vsi_stats_struct - Get System Network Statistics
340 * @vsi: the VSI we care about
342 * Returns the address of the device statistics structure.
343 * The statistics are actually updated from the service task.
345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
347 return &vsi->net_stats;
351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
352 * @netdev: network interface device structure
354 * Returns the address of the device statistics structure.
355 * The statistics are actually updated from the service task.
358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
359 struct net_device *netdev,
360 struct rtnl_link_stats64 *stats)
362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
363 struct net_device *netdev,
364 struct rtnl_link_stats64 *stats)
367 struct i40e_netdev_priv *np = netdev_priv(netdev);
368 struct i40e_ring *tx_ring, *rx_ring;
369 struct i40e_vsi *vsi = np->vsi;
370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
373 if (test_bit(__I40E_DOWN, &vsi->state))
380 for (i = 0; i < vsi->num_queue_pairs; i++) {
384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
390 packets = tx_ring->stats.packets;
391 bytes = tx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
394 stats->tx_packets += packets;
395 stats->tx_bytes += bytes;
396 rx_ring = &tx_ring[1];
399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
400 packets = rx_ring->stats.packets;
401 bytes = rx_ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
404 stats->rx_packets += packets;
405 stats->rx_bytes += bytes;
409 /* following stats updated by i40e_watchdog_subtask() */
410 stats->multicast = vsi_stats->multicast;
411 stats->tx_errors = vsi_stats->tx_errors;
412 stats->tx_dropped = vsi_stats->tx_dropped;
413 stats->rx_errors = vsi_stats->rx_errors;
414 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
415 stats->rx_length_errors = vsi_stats->rx_length_errors;
421 * i40e_vsi_reset_stats - Resets all stats of the given vsi
422 * @vsi: the VSI to have its stats reset
424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
426 struct rtnl_link_stats64 *ns;
432 ns = i40e_get_vsi_stats_struct(vsi);
433 memset(ns, 0, sizeof(*ns));
434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
437 if (vsi->rx_rings && vsi->rx_rings[0]) {
438 for (i = 0; i < vsi->num_queue_pairs; i++) {
439 memset(&vsi->rx_rings[i]->stats, 0 ,
440 sizeof(vsi->rx_rings[i]->stats));
441 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
442 sizeof(vsi->rx_rings[i]->rx_stats));
443 memset(&vsi->tx_rings[i]->stats, 0 ,
444 sizeof(vsi->tx_rings[i]->stats));
445 memset(&vsi->tx_rings[i]->tx_stats, 0,
446 sizeof(vsi->tx_rings[i]->tx_stats));
449 vsi->stat_offsets_loaded = false;
453 * i40e_pf_reset_stats - Reset all of the stats for the given pf
454 * @pf: the PF to be reset
456 void i40e_pf_reset_stats(struct i40e_pf *pf)
460 memset(&pf->stats, 0, sizeof(pf->stats));
461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
462 pf->stat_offsets_loaded = false;
464 for (i = 0; i < I40E_MAX_VEB; i++) {
466 memset(&pf->veb[i]->stats, 0,
467 sizeof(pf->veb[i]->stats));
468 memset(&pf->veb[i]->stats_offsets, 0,
469 sizeof(pf->veb[i]->stats_offsets));
470 pf->veb[i]->stat_offsets_loaded = false;
476 * i40e_stat_update48 - read and update a 48 bit stat from the chip
477 * @hw: ptr to the hardware info
478 * @hireg: the high 32 bit reg to read
479 * @loreg: the low 32 bit reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
484 * Since the device stats are not reset at PFReset, they likely will not
485 * be zeroed when the driver starts. We'll save the first values read
486 * and use them as offsets to be subtracted from the raw values in order
487 * to report stats that count from zero. In the process, we also manage
488 * the potential roll-over.
490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
491 bool offset_loaded, u64 *offset, u64 *stat)
495 if (hw->device_id == I40E_DEV_ID_QEMU) {
496 new_data = rd32(hw, loreg);
497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
499 new_data = rd64(hw, loreg);
503 if (likely(new_data >= *offset))
504 *stat = new_data - *offset;
506 *stat = (new_data + ((u64)1 << 48)) - *offset;
507 *stat &= 0xFFFFFFFFFFFFULL;
511 * i40e_stat_update32 - read and update a 32 bit stat from the chip
512 * @hw: ptr to the hardware info
513 * @reg: the hw reg to read
514 * @offset_loaded: has the initial offset been loaded yet
515 * @offset: ptr to current offset value
516 * @stat: ptr to the stat
518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
519 bool offset_loaded, u64 *offset, u64 *stat)
523 new_data = rd32(hw, reg);
526 if (likely(new_data >= *offset))
527 *stat = (u32)(new_data - *offset);
529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
534 * @vsi: the VSI to be updated
536 void i40e_update_eth_stats(struct i40e_vsi *vsi)
538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
539 struct i40e_pf *pf = vsi->back;
540 struct i40e_hw *hw = &pf->hw;
541 struct i40e_eth_stats *oes;
542 struct i40e_eth_stats *es; /* device's eth stats */
544 es = &vsi->eth_stats;
545 oes = &vsi->eth_stats_offsets;
547 /* Gather up the stats that the hw collects */
548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
549 vsi->stat_offsets_loaded,
550 &oes->tx_errors, &es->tx_errors);
551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_discards, &es->rx_discards);
554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
555 vsi->stat_offsets_loaded,
556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_errors, &es->tx_errors);
561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
562 I40E_GLV_GORCL(stat_idx),
563 vsi->stat_offsets_loaded,
564 &oes->rx_bytes, &es->rx_bytes);
565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
566 I40E_GLV_UPRCL(stat_idx),
567 vsi->stat_offsets_loaded,
568 &oes->rx_unicast, &es->rx_unicast);
569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
570 I40E_GLV_MPRCL(stat_idx),
571 vsi->stat_offsets_loaded,
572 &oes->rx_multicast, &es->rx_multicast);
573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
574 I40E_GLV_BPRCL(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_broadcast, &es->rx_broadcast);
578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
579 I40E_GLV_GOTCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->tx_bytes, &es->tx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
583 I40E_GLV_UPTCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->tx_unicast, &es->tx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
587 I40E_GLV_MPTCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->tx_multicast, &es->tx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
591 I40E_GLV_BPTCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->tx_broadcast, &es->tx_broadcast);
594 vsi->stat_offsets_loaded = true;
598 * i40e_update_veb_stats - Update Switch component statistics
599 * @veb: the VEB being updated
601 static void i40e_update_veb_stats(struct i40e_veb *veb)
603 struct i40e_pf *pf = veb->pf;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
609 idx = veb->stats_idx;
611 oes = &veb->stats_offsets;
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_discards, &es->tx_discards);
617 if (hw->revision_id > 0)
618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
619 veb->stat_offsets_loaded,
620 &oes->rx_unknown_protocol,
621 &es->rx_unknown_protocol);
622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
623 veb->stat_offsets_loaded,
624 &oes->rx_bytes, &es->rx_bytes);
625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
626 veb->stat_offsets_loaded,
627 &oes->rx_unicast, &es->rx_unicast);
628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
629 veb->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
632 veb->stat_offsets_loaded,
633 &oes->rx_broadcast, &es->rx_broadcast);
635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
636 veb->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_unicast, &es->tx_unicast);
641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
642 veb->stat_offsets_loaded,
643 &oes->tx_multicast, &es->tx_multicast);
644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
645 veb->stat_offsets_loaded,
646 &oes->tx_broadcast, &es->tx_broadcast);
647 veb->stat_offsets_loaded = true;
652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
653 * @vsi: the VSI that is capable of doing FCoE
655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
657 struct i40e_pf *pf = vsi->back;
658 struct i40e_hw *hw = &pf->hw;
659 struct i40e_fcoe_stats *ofs;
660 struct i40e_fcoe_stats *fs; /* device's eth stats */
663 if (vsi->type != I40E_VSI_FCOE)
666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
667 fs = &vsi->fcoe_stats;
668 ofs = &vsi->fcoe_stats_offsets;
670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
671 vsi->fcoe_stat_offsets_loaded,
672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
674 vsi->fcoe_stat_offsets_loaded,
675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
677 vsi->fcoe_stat_offsets_loaded,
678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
680 vsi->fcoe_stat_offsets_loaded,
681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
683 vsi->fcoe_stat_offsets_loaded,
684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
686 vsi->fcoe_stat_offsets_loaded,
687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
689 vsi->fcoe_stat_offsets_loaded,
690 &ofs->fcoe_last_error, &fs->fcoe_last_error);
691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
692 vsi->fcoe_stat_offsets_loaded,
693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
695 vsi->fcoe_stat_offsets_loaded = true;
700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
701 * @pf: the corresponding PF
703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
707 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
708 struct i40e_hw_port_stats *nsd = &pf->stats;
709 struct i40e_hw *hw = &pf->hw;
713 if ((hw->fc.current_mode != I40E_FC_FULL) &&
714 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
717 xoff = nsd->link_xoff_rx;
718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
719 pf->stat_offsets_loaded,
720 &osd->link_xoff_rx, &nsd->link_xoff_rx);
722 /* No new LFC xoff rx */
723 if (!(nsd->link_xoff_rx - xoff))
726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
727 for (v = 0; v < pf->num_alloc_vsi; v++) {
728 struct i40e_vsi *vsi = pf->vsi[v];
730 if (!vsi || !vsi->tx_rings[0])
733 for (i = 0; i < vsi->num_queue_pairs; i++) {
734 struct i40e_ring *ring = vsi->tx_rings[i];
735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
742 * @pf: the corresponding PF
744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
748 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
749 struct i40e_hw_port_stats *nsd = &pf->stats;
750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
751 struct i40e_dcbx_config *dcb_cfg;
752 struct i40e_hw *hw = &pf->hw;
756 dcb_cfg = &hw->local_dcbx_config;
758 /* See if DCB enabled with PFC TC */
759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
760 !(dcb_cfg->pfc.pfcenable)) {
761 i40e_update_link_xoff_rx(pf);
765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
766 u64 prio_xoff = nsd->priority_xoff_rx[i];
767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
768 pf->stat_offsets_loaded,
769 &osd->priority_xoff_rx[i],
770 &nsd->priority_xoff_rx[i]);
772 /* No new PFC xoff rx */
773 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
775 /* Get the TC for given priority */
776 tc = dcb_cfg->etscfg.prioritytable[i];
780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
781 for (v = 0; v < pf->num_alloc_vsi; v++) {
782 struct i40e_vsi *vsi = pf->vsi[v];
784 if (!vsi || !vsi->tx_rings[0])
787 for (i = 0; i < vsi->num_queue_pairs; i++) {
788 struct i40e_ring *ring = vsi->tx_rings[i];
792 clear_bit(__I40E_HANG_CHECK_ARMED,
799 * i40e_update_vsi_stats - Update the vsi statistics counters.
800 * @vsi: the VSI to be updated
802 * There are a few instances where we store the same stat in a
803 * couple of different structs. This is partly because we have
804 * the netdev stats that need to be filled out, which is slightly
805 * different from the "eth_stats" defined by the chip and used in
806 * VF communications. We sort it out here.
808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
810 struct i40e_pf *pf = vsi->back;
811 struct rtnl_link_stats64 *ons;
812 struct rtnl_link_stats64 *ns; /* netdev stats */
813 struct i40e_eth_stats *oes;
814 struct i40e_eth_stats *es; /* device's eth stats */
815 u32 tx_restart, tx_busy;
824 if (test_bit(__I40E_DOWN, &vsi->state) ||
825 test_bit(__I40E_CONFIG_BUSY, &pf->state))
828 ns = i40e_get_vsi_stats_struct(vsi);
829 ons = &vsi->net_stats_offsets;
830 es = &vsi->eth_stats;
831 oes = &vsi->eth_stats_offsets;
833 /* Gather up the netdev and vsi stats that the driver collects
834 * on the fly during packet processing
838 tx_restart = tx_busy = 0;
842 for (q = 0; q < vsi->num_queue_pairs; q++) {
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
856 /* Rx queue is part of the same block as Tx queue */
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
874 ns->rx_packets = rx_p;
876 ns->tx_packets = tx_p;
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
923 I40E_GLPRT_UPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_unicast,
926 &nsd->eth.rx_unicast);
927 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
928 I40E_GLPRT_MPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_multicast,
931 &nsd->eth.rx_multicast);
932 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
933 I40E_GLPRT_BPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_broadcast,
936 &nsd->eth.rx_broadcast);
937 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
938 I40E_GLPRT_UPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_unicast,
941 &nsd->eth.tx_unicast);
942 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
943 I40E_GLPRT_MPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_multicast,
946 &nsd->eth.tx_multicast);
947 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
948 I40E_GLPRT_BPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_broadcast,
951 &nsd->eth.tx_broadcast);
953 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_dropped_link_down,
956 &nsd->tx_dropped_link_down);
958 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->crc_errors, &nsd->crc_errors);
962 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->illegal_bytes, &nsd->illegal_bytes);
966 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->mac_local_faults,
969 &nsd->mac_local_faults);
970 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->mac_remote_faults,
973 &nsd->mac_remote_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->rx_length_errors,
978 &nsd->rx_length_errors);
980 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->link_xon_rx, &nsd->link_xon_rx);
983 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->link_xon_tx, &nsd->link_xon_tx);
986 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
987 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->link_xoff_tx, &nsd->link_xoff_tx);
991 for (i = 0; i < 8; i++) {
992 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
993 pf->stat_offsets_loaded,
994 &osd->priority_xon_rx[i],
995 &nsd->priority_xon_rx[i]);
996 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
997 pf->stat_offsets_loaded,
998 &osd->priority_xon_tx[i],
999 &nsd->priority_xon_tx[i]);
1000 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1001 pf->stat_offsets_loaded,
1002 &osd->priority_xoff_tx[i],
1003 &nsd->priority_xoff_tx[i]);
1004 i40e_stat_update32(hw,
1005 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xon_2_xoff[i],
1008 &nsd->priority_xon_2_xoff[i]);
1011 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1012 I40E_GLPRT_PRC64L(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->rx_size_64, &nsd->rx_size_64);
1015 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1016 I40E_GLPRT_PRC127L(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->rx_size_127, &nsd->rx_size_127);
1019 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1020 I40E_GLPRT_PRC255L(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_size_255, &nsd->rx_size_255);
1023 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1024 I40E_GLPRT_PRC511L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_size_511, &nsd->rx_size_511);
1027 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1028 I40E_GLPRT_PRC1023L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->rx_size_1023, &nsd->rx_size_1023);
1031 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1032 I40E_GLPRT_PRC1522L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_size_1522, &nsd->rx_size_1522);
1035 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1036 I40E_GLPRT_PRC9522L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_size_big, &nsd->rx_size_big);
1040 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1041 I40E_GLPRT_PTC64L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->tx_size_64, &nsd->tx_size_64);
1044 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1045 I40E_GLPRT_PTC127L(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->tx_size_127, &nsd->tx_size_127);
1048 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1049 I40E_GLPRT_PTC255L(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->tx_size_255, &nsd->tx_size_255);
1052 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1053 I40E_GLPRT_PTC511L(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->tx_size_511, &nsd->tx_size_511);
1056 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1057 I40E_GLPRT_PTC1023L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->tx_size_1023, &nsd->tx_size_1023);
1060 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1061 I40E_GLPRT_PTC1522L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->tx_size_1522, &nsd->tx_size_1522);
1064 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1065 I40E_GLPRT_PTC9522L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->tx_size_big, &nsd->tx_size_big);
1069 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->rx_undersize, &nsd->rx_undersize);
1072 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->rx_fragments, &nsd->rx_fragments);
1075 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->rx_oversize, &nsd->rx_oversize);
1078 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_jabber, &nsd->rx_jabber);
1083 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1087 pf->stat_offsets_loaded,
1088 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1091 nsd->tx_lpi_status =
1092 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1093 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1094 nsd->rx_lpi_status =
1095 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1096 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1097 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1098 pf->stat_offsets_loaded,
1099 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1100 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1101 pf->stat_offsets_loaded,
1102 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1104 pf->stat_offsets_loaded = true;
1108 * i40e_update_stats - Update the various statistics counters.
1109 * @vsi: the VSI to be updated
1111 * Update the various stats for this VSI and its related entities.
1113 void i40e_update_stats(struct i40e_vsi *vsi)
1115 struct i40e_pf *pf = vsi->back;
1117 if (vsi == pf->vsi[pf->lan_vsi])
1118 i40e_update_pf_stats(pf);
1120 i40e_update_vsi_stats(vsi);
1122 i40e_update_fcoe_stats(vsi);
1127 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1128 * @vsi: the VSI to be searched
1129 * @macaddr: the MAC address
1131 * @is_vf: make sure its a vf filter, else doesn't matter
1132 * @is_netdev: make sure its a netdev filter, else doesn't matter
1134 * Returns ptr to the filter object or NULL
1136 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1137 u8 *macaddr, s16 vlan,
1138 bool is_vf, bool is_netdev)
1140 struct i40e_mac_filter *f;
1142 if (!vsi || !macaddr)
1145 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1146 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1147 (vlan == f->vlan) &&
1148 (!is_vf || f->is_vf) &&
1149 (!is_netdev || f->is_netdev))
1156 * i40e_find_mac - Find a mac addr in the macvlan filters list
1157 * @vsi: the VSI to be searched
1158 * @macaddr: the MAC address we are searching for
1159 * @is_vf: make sure its a vf filter, else doesn't matter
1160 * @is_netdev: make sure its a netdev filter, else doesn't matter
1162 * Returns the first filter with the provided MAC address or NULL if
1163 * MAC address was not found
1165 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1166 bool is_vf, bool is_netdev)
1168 struct i40e_mac_filter *f;
1170 if (!vsi || !macaddr)
1173 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1174 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1175 (!is_vf || f->is_vf) &&
1176 (!is_netdev || f->is_netdev))
1183 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1184 * @vsi: the VSI to be searched
1186 * Returns true if VSI is in vlan mode or false otherwise
1188 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1190 struct i40e_mac_filter *f;
1192 /* Only -1 for all the filters denotes not in vlan mode
1193 * so we have to go through all the list in order to make sure
1195 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1204 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1205 * @vsi: the VSI to be searched
1206 * @macaddr: the mac address to be filtered
1207 * @is_vf: true if it is a vf
1208 * @is_netdev: true if it is a netdev
1210 * Goes through all the macvlan filters and adds a
1211 * macvlan filter for each unique vlan that already exists
1213 * Returns first filter found on success, else NULL
1215 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1216 bool is_vf, bool is_netdev)
1218 struct i40e_mac_filter *f;
1220 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1221 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1222 is_vf, is_netdev)) {
1223 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1229 return list_first_entry_or_null(&vsi->mac_filter_list,
1230 struct i40e_mac_filter, list);
1234 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1235 * @vsi: the PF Main VSI - inappropriate for any other VSI
1236 * @macaddr: the MAC address
1238 * Some older firmware configurations set up a default promiscuous VLAN
1239 * filter that needs to be removed.
1241 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1243 struct i40e_aqc_remove_macvlan_element_data element;
1244 struct i40e_pf *pf = vsi->back;
1247 /* Only appropriate for the PF main VSI */
1248 if (vsi->type != I40E_VSI_MAIN)
1251 memset(&element, 0, sizeof(element));
1252 ether_addr_copy(element.mac_addr, macaddr);
1253 element.vlan_tag = 0;
1254 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1255 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1256 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1264 * i40e_add_filter - Add a mac/vlan filter to the VSI
1265 * @vsi: the VSI to be searched
1266 * @macaddr: the MAC address
1268 * @is_vf: make sure its a vf filter, else doesn't matter
1269 * @is_netdev: make sure its a netdev filter, else doesn't matter
1271 * Returns ptr to the filter object or NULL when no memory available.
1273 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1274 u8 *macaddr, s16 vlan,
1275 bool is_vf, bool is_netdev)
1277 struct i40e_mac_filter *f;
1279 if (!vsi || !macaddr)
1282 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1284 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1286 goto add_filter_out;
1288 ether_addr_copy(f->macaddr, macaddr);
1292 INIT_LIST_HEAD(&f->list);
1293 list_add(&f->list, &vsi->mac_filter_list);
1296 /* increment counter and add a new flag if needed */
1302 } else if (is_netdev) {
1303 if (!f->is_netdev) {
1304 f->is_netdev = true;
1311 /* changed tells sync_filters_subtask to
1312 * push the filter down to the firmware
1315 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1316 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1324 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1325 * @vsi: the VSI to be searched
1326 * @macaddr: the MAC address
1328 * @is_vf: make sure it's a vf filter, else doesn't matter
1329 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1331 void i40e_del_filter(struct i40e_vsi *vsi,
1332 u8 *macaddr, s16 vlan,
1333 bool is_vf, bool is_netdev)
1335 struct i40e_mac_filter *f;
1337 if (!vsi || !macaddr)
1340 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1341 if (!f || f->counter == 0)
1349 } else if (is_netdev) {
1351 f->is_netdev = false;
1355 /* make sure we don't remove a filter in use by vf or netdev */
1357 min_f += (f->is_vf ? 1 : 0);
1358 min_f += (f->is_netdev ? 1 : 0);
1360 if (f->counter > min_f)
1364 /* counter == 0 tells sync_filters_subtask to
1365 * remove the filter from the firmware's list
1367 if (f->counter == 0) {
1369 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1370 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1375 * i40e_set_mac - NDO callback to set mac address
1376 * @netdev: network interface device structure
1377 * @p: pointer to an address structure
1379 * Returns 0 on success, negative on failure
1382 int i40e_set_mac(struct net_device *netdev, void *p)
1384 static int i40e_set_mac(struct net_device *netdev, void *p)
1387 struct i40e_netdev_priv *np = netdev_priv(netdev);
1388 struct i40e_vsi *vsi = np->vsi;
1389 struct i40e_pf *pf = vsi->back;
1390 struct i40e_hw *hw = &pf->hw;
1391 struct sockaddr *addr = p;
1392 struct i40e_mac_filter *f;
1394 if (!is_valid_ether_addr(addr->sa_data))
1395 return -EADDRNOTAVAIL;
1397 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1398 netdev_info(netdev, "already using mac address %pM\n",
1403 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1404 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1405 return -EADDRNOTAVAIL;
1407 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1408 netdev_info(netdev, "returning to hw mac address %pM\n",
1411 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1413 if (vsi->type == I40E_VSI_MAIN) {
1415 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1416 I40E_AQC_WRITE_TYPE_LAA_WOL,
1417 addr->sa_data, NULL);
1420 "Addr change for Main VSI failed: %d\n",
1422 return -EADDRNOTAVAIL;
1426 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1427 struct i40e_aqc_remove_macvlan_element_data element;
1429 memset(&element, 0, sizeof(element));
1430 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1431 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1432 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1434 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1438 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1439 struct i40e_aqc_add_macvlan_element_data element;
1441 memset(&element, 0, sizeof(element));
1442 ether_addr_copy(element.mac_addr, hw->mac.addr);
1443 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1444 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1446 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1452 i40e_sync_vsi_filters(vsi);
1453 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1459 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1460 * @vsi: the VSI being setup
1461 * @ctxt: VSI context structure
1462 * @enabled_tc: Enabled TCs bitmap
1463 * @is_add: True if called before Add VSI
1465 * Setup VSI queue mapping for enabled traffic classes.
1468 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1469 struct i40e_vsi_context *ctxt,
1473 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1479 struct i40e_pf *pf = vsi->back;
1489 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1492 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1493 /* Find numtc from enabled TC bitmap */
1494 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1495 if (enabled_tc & (1 << i)) /* TC is enabled */
1499 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1503 /* At least TC0 is enabled in case of non-DCB case */
1507 vsi->tc_config.numtc = numtc;
1508 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1509 /* Number of queues per enabled TC */
1510 /* In MFP case we can have a much lower count of MSIx
1511 * vectors available and so we need to lower the used
1514 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1515 num_tc_qps = qcount / numtc;
1516 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1518 /* Setup queue offset/count for all TCs for given VSI */
1519 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1520 /* See if the given TC is enabled for the given VSI */
1521 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1524 switch (vsi->type) {
1526 qcount = min_t(int, pf->rss_size, num_tc_qps);
1530 qcount = num_tc_qps;
1534 case I40E_VSI_SRIOV:
1535 case I40E_VSI_VMDQ2:
1537 qcount = num_tc_qps;
1541 vsi->tc_config.tc_info[i].qoffset = offset;
1542 vsi->tc_config.tc_info[i].qcount = qcount;
1544 /* find the power-of-2 of the number of queue pairs */
1547 while (num_qps && ((1 << pow) < qcount)) {
1552 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1554 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1555 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1559 /* TC is not enabled so set the offset to
1560 * default queue and allocate one queue
1563 vsi->tc_config.tc_info[i].qoffset = 0;
1564 vsi->tc_config.tc_info[i].qcount = 1;
1565 vsi->tc_config.tc_info[i].netdev_tc = 0;
1569 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1572 /* Set actual Tx/Rx queue pairs */
1573 vsi->num_queue_pairs = offset;
1574 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1575 if (vsi->req_queue_pairs > 0)
1576 vsi->num_queue_pairs = vsi->req_queue_pairs;
1578 vsi->num_queue_pairs = pf->num_lan_msix;
1581 /* Scheduler section valid can only be set for ADD VSI */
1583 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1585 ctxt->info.up_enable_bits = enabled_tc;
1587 if (vsi->type == I40E_VSI_SRIOV) {
1588 ctxt->info.mapping_flags |=
1589 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1590 for (i = 0; i < vsi->num_queue_pairs; i++)
1591 ctxt->info.queue_mapping[i] =
1592 cpu_to_le16(vsi->base_queue + i);
1594 ctxt->info.mapping_flags |=
1595 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1596 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1598 ctxt->info.valid_sections |= cpu_to_le16(sections);
1602 * i40e_set_rx_mode - NDO callback to set the netdev filters
1603 * @netdev: network interface device structure
1606 void i40e_set_rx_mode(struct net_device *netdev)
1608 static void i40e_set_rx_mode(struct net_device *netdev)
1611 struct i40e_netdev_priv *np = netdev_priv(netdev);
1612 struct i40e_mac_filter *f, *ftmp;
1613 struct i40e_vsi *vsi = np->vsi;
1614 struct netdev_hw_addr *uca;
1615 struct netdev_hw_addr *mca;
1616 struct netdev_hw_addr *ha;
1618 /* add addr if not already in the filter list */
1619 netdev_for_each_uc_addr(uca, netdev) {
1620 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1621 if (i40e_is_vsi_in_vlan(vsi))
1622 i40e_put_mac_in_vlan(vsi, uca->addr,
1625 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1630 netdev_for_each_mc_addr(mca, netdev) {
1631 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1632 if (i40e_is_vsi_in_vlan(vsi))
1633 i40e_put_mac_in_vlan(vsi, mca->addr,
1636 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1641 /* remove filter if not in netdev list */
1642 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1648 if (is_multicast_ether_addr(f->macaddr)) {
1649 netdev_for_each_mc_addr(mca, netdev) {
1650 if (ether_addr_equal(mca->addr, f->macaddr)) {
1656 netdev_for_each_uc_addr(uca, netdev) {
1657 if (ether_addr_equal(uca->addr, f->macaddr)) {
1663 for_each_dev_addr(netdev, ha) {
1664 if (ether_addr_equal(ha->addr, f->macaddr)) {
1672 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1675 /* check for other flag changes */
1676 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1677 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1678 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1683 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1684 * @vsi: ptr to the VSI
1686 * Push any outstanding VSI filter changes through the AdminQ.
1688 * Returns 0 or error value
1690 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1692 struct i40e_mac_filter *f, *ftmp;
1693 bool promisc_forced_on = false;
1694 bool add_happened = false;
1695 int filter_list_len = 0;
1696 u32 changed_flags = 0;
1697 i40e_status aq_ret = 0;
1703 /* empty array typed pointers, kcalloc later */
1704 struct i40e_aqc_add_macvlan_element_data *add_list;
1705 struct i40e_aqc_remove_macvlan_element_data *del_list;
1707 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1708 usleep_range(1000, 2000);
1712 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1713 vsi->current_netdev_flags = vsi->netdev->flags;
1716 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1717 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1719 filter_list_len = pf->hw.aq.asq_buf_size /
1720 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1721 del_list = kcalloc(filter_list_len,
1722 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1727 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1731 if (f->counter != 0)
1736 /* add to delete list */
1737 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1738 del_list[num_del].vlan_tag =
1739 cpu_to_le16((u16)(f->vlan ==
1740 I40E_VLAN_ANY ? 0 : f->vlan));
1742 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1743 del_list[num_del].flags = cmd_flags;
1746 /* unlink from filter list */
1750 /* flush a full buffer */
1751 if (num_del == filter_list_len) {
1752 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1753 vsi->seid, del_list, num_del,
1756 memset(del_list, 0, sizeof(*del_list));
1759 pf->hw.aq.asq_last_status !=
1761 dev_info(&pf->pdev->dev,
1762 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1764 pf->hw.aq.asq_last_status);
1768 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1769 del_list, num_del, NULL);
1773 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1774 dev_info(&pf->pdev->dev,
1775 "ignoring delete macvlan error, err %d, aq_err %d\n",
1776 aq_ret, pf->hw.aq.asq_last_status);
1782 /* do all the adds now */
1783 filter_list_len = pf->hw.aq.asq_buf_size /
1784 sizeof(struct i40e_aqc_add_macvlan_element_data),
1785 add_list = kcalloc(filter_list_len,
1786 sizeof(struct i40e_aqc_add_macvlan_element_data),
1791 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1795 if (f->counter == 0)
1798 add_happened = true;
1801 /* add to add array */
1802 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1803 add_list[num_add].vlan_tag =
1805 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1806 add_list[num_add].queue_number = 0;
1808 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1809 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1812 /* flush a full buffer */
1813 if (num_add == filter_list_len) {
1814 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1821 memset(add_list, 0, sizeof(*add_list));
1825 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1826 add_list, num_add, NULL);
1832 if (add_happened && aq_ret &&
1833 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1834 dev_info(&pf->pdev->dev,
1835 "add filter failed, err %d, aq_err %d\n",
1836 aq_ret, pf->hw.aq.asq_last_status);
1837 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1838 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1840 promisc_forced_on = true;
1841 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1843 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1848 /* check for changes in promiscuous modes */
1849 if (changed_flags & IFF_ALLMULTI) {
1850 bool cur_multipromisc;
1851 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1852 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1857 dev_info(&pf->pdev->dev,
1858 "set multi promisc failed, err %d, aq_err %d\n",
1859 aq_ret, pf->hw.aq.asq_last_status);
1861 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1863 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1864 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1866 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1870 dev_info(&pf->pdev->dev,
1871 "set uni promisc failed, err %d, aq_err %d\n",
1872 aq_ret, pf->hw.aq.asq_last_status);
1873 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1877 dev_info(&pf->pdev->dev,
1878 "set brdcast promisc failed, err %d, aq_err %d\n",
1879 aq_ret, pf->hw.aq.asq_last_status);
1882 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1887 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1888 * @pf: board private structure
1890 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1894 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1896 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1898 for (v = 0; v < pf->num_alloc_vsi; v++) {
1900 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1901 i40e_sync_vsi_filters(pf->vsi[v]);
1906 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1907 * @netdev: network interface device structure
1908 * @new_mtu: new value for maximum frame size
1910 * Returns 0 on success, negative on failure
1912 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1914 struct i40e_netdev_priv *np = netdev_priv(netdev);
1915 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1916 struct i40e_vsi *vsi = np->vsi;
1918 /* MTU < 68 is an error and causes problems on some kernels */
1919 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1922 netdev_info(netdev, "changing MTU from %d to %d\n",
1923 netdev->mtu, new_mtu);
1924 netdev->mtu = new_mtu;
1925 if (netif_running(netdev))
1926 i40e_vsi_reinit_locked(vsi);
1932 * i40e_ioctl - Access the hwtstamp interface
1933 * @netdev: network interface device structure
1934 * @ifr: interface request data
1935 * @cmd: ioctl command
1937 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1939 struct i40e_netdev_priv *np = netdev_priv(netdev);
1940 struct i40e_pf *pf = np->vsi->back;
1944 return i40e_ptp_get_ts_config(pf, ifr);
1946 return i40e_ptp_set_ts_config(pf, ifr);
1953 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1954 * @vsi: the vsi being adjusted
1956 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1958 struct i40e_vsi_context ctxt;
1961 if ((vsi->info.valid_sections &
1962 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1963 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1964 return; /* already enabled */
1966 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1967 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1968 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1970 ctxt.seid = vsi->seid;
1971 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1972 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1974 dev_info(&vsi->back->pdev->dev,
1975 "%s: update vsi failed, aq_err=%d\n",
1976 __func__, vsi->back->hw.aq.asq_last_status);
1981 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1982 * @vsi: the vsi being adjusted
1984 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1986 struct i40e_vsi_context ctxt;
1989 if ((vsi->info.valid_sections &
1990 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1991 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1992 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1993 return; /* already disabled */
1995 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1996 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1997 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1999 ctxt.seid = vsi->seid;
2000 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2001 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2003 dev_info(&vsi->back->pdev->dev,
2004 "%s: update vsi failed, aq_err=%d\n",
2005 __func__, vsi->back->hw.aq.asq_last_status);
2010 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2011 * @netdev: network interface to be adjusted
2012 * @features: netdev features to test if VLAN offload is enabled or not
2014 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2016 struct i40e_netdev_priv *np = netdev_priv(netdev);
2017 struct i40e_vsi *vsi = np->vsi;
2019 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2020 i40e_vlan_stripping_enable(vsi);
2022 i40e_vlan_stripping_disable(vsi);
2026 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2027 * @vsi: the vsi being configured
2028 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2030 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2032 struct i40e_mac_filter *f, *add_f;
2033 bool is_netdev, is_vf;
2035 is_vf = (vsi->type == I40E_VSI_SRIOV);
2036 is_netdev = !!(vsi->netdev);
2039 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2042 dev_info(&vsi->back->pdev->dev,
2043 "Could not add vlan filter %d for %pM\n",
2044 vid, vsi->netdev->dev_addr);
2049 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2050 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2052 dev_info(&vsi->back->pdev->dev,
2053 "Could not add vlan filter %d for %pM\n",
2059 /* Now if we add a vlan tag, make sure to check if it is the first
2060 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2061 * with 0, so we now accept untagged and specified tagged traffic
2062 * (and not any taged and untagged)
2065 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2067 is_vf, is_netdev)) {
2068 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2069 I40E_VLAN_ANY, is_vf, is_netdev);
2070 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2073 dev_info(&vsi->back->pdev->dev,
2074 "Could not add filter 0 for %pM\n",
2075 vsi->netdev->dev_addr);
2081 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2082 if (vid > 0 && !vsi->info.pvid) {
2083 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2084 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2085 is_vf, is_netdev)) {
2086 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2088 add_f = i40e_add_filter(vsi, f->macaddr,
2089 0, is_vf, is_netdev);
2091 dev_info(&vsi->back->pdev->dev,
2092 "Could not add filter 0 for %pM\n",
2100 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2101 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2104 return i40e_sync_vsi_filters(vsi);
2108 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2109 * @vsi: the vsi being configured
2110 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2112 * Return: 0 on success or negative otherwise
2114 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2116 struct net_device *netdev = vsi->netdev;
2117 struct i40e_mac_filter *f, *add_f;
2118 bool is_vf, is_netdev;
2119 int filter_count = 0;
2121 is_vf = (vsi->type == I40E_VSI_SRIOV);
2122 is_netdev = !!(netdev);
2125 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2127 list_for_each_entry(f, &vsi->mac_filter_list, list)
2128 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2130 /* go through all the filters for this VSI and if there is only
2131 * vid == 0 it means there are no other filters, so vid 0 must
2132 * be replaced with -1. This signifies that we should from now
2133 * on accept any traffic (with any tag present, or untagged)
2135 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2138 ether_addr_equal(netdev->dev_addr, f->macaddr))
2146 if (!filter_count && is_netdev) {
2147 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2148 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2151 dev_info(&vsi->back->pdev->dev,
2152 "Could not add filter %d for %pM\n",
2153 I40E_VLAN_ANY, netdev->dev_addr);
2158 if (!filter_count) {
2159 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2160 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2161 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2164 dev_info(&vsi->back->pdev->dev,
2165 "Could not add filter %d for %pM\n",
2166 I40E_VLAN_ANY, f->macaddr);
2172 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2173 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2176 return i40e_sync_vsi_filters(vsi);
2180 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2181 * @netdev: network interface to be adjusted
2182 * @vid: vlan id to be added
2184 * net_device_ops implementation for adding vlan ids
2187 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2188 __always_unused __be16 proto, u16 vid)
2190 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2191 __always_unused __be16 proto, u16 vid)
2194 struct i40e_netdev_priv *np = netdev_priv(netdev);
2195 struct i40e_vsi *vsi = np->vsi;
2201 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2203 /* If the network stack called us with vid = 0 then
2204 * it is asking to receive priority tagged packets with
2205 * vlan id 0. Our HW receives them by default when configured
2206 * to receive untagged packets so there is no need to add an
2207 * extra filter for vlan 0 tagged packets.
2210 ret = i40e_vsi_add_vlan(vsi, vid);
2212 if (!ret && (vid < VLAN_N_VID))
2213 set_bit(vid, vsi->active_vlans);
2219 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2220 * @netdev: network interface to be adjusted
2221 * @vid: vlan id to be removed
2223 * net_device_ops implementation for removing vlan ids
2226 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2227 __always_unused __be16 proto, u16 vid)
2229 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2230 __always_unused __be16 proto, u16 vid)
2233 struct i40e_netdev_priv *np = netdev_priv(netdev);
2234 struct i40e_vsi *vsi = np->vsi;
2236 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2238 /* return code is ignored as there is nothing a user
2239 * can do about failure to remove and a log message was
2240 * already printed from the other function
2242 i40e_vsi_kill_vlan(vsi, vid);
2244 clear_bit(vid, vsi->active_vlans);
2250 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2251 * @vsi: the vsi being brought back up
2253 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2260 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2262 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2263 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2268 * i40e_vsi_add_pvid - Add pvid for the VSI
2269 * @vsi: the vsi being adjusted
2270 * @vid: the vlan id to set as a PVID
2272 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2274 struct i40e_vsi_context ctxt;
2277 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2278 vsi->info.pvid = cpu_to_le16(vid);
2279 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2280 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2281 I40E_AQ_VSI_PVLAN_EMOD_STR;
2283 ctxt.seid = vsi->seid;
2284 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2285 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2287 dev_info(&vsi->back->pdev->dev,
2288 "%s: update vsi failed, aq_err=%d\n",
2289 __func__, vsi->back->hw.aq.asq_last_status);
2297 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2298 * @vsi: the vsi being adjusted
2300 * Just use the vlan_rx_register() service to put it back to normal
2302 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2304 i40e_vlan_stripping_disable(vsi);
2310 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2311 * @vsi: ptr to the VSI
2313 * If this function returns with an error, then it's possible one or
2314 * more of the rings is populated (while the rest are not). It is the
2315 * callers duty to clean those orphaned rings.
2317 * Return 0 on success, negative on failure
2319 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2323 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2324 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2330 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2331 * @vsi: ptr to the VSI
2333 * Free VSI's transmit software resources
2335 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2342 for (i = 0; i < vsi->num_queue_pairs; i++)
2343 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2344 i40e_free_tx_resources(vsi->tx_rings[i]);
2348 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2349 * @vsi: ptr to the VSI
2351 * If this function returns with an error, then it's possible one or
2352 * more of the rings is populated (while the rest are not). It is the
2353 * callers duty to clean those orphaned rings.
2355 * Return 0 on success, negative on failure
2357 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2361 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2362 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2364 i40e_fcoe_setup_ddp_resources(vsi);
2370 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2371 * @vsi: ptr to the VSI
2373 * Free all receive software resources
2375 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2382 for (i = 0; i < vsi->num_queue_pairs; i++)
2383 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2384 i40e_free_rx_resources(vsi->rx_rings[i]);
2386 i40e_fcoe_free_ddp_resources(vsi);
2391 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2392 * @ring: The Tx ring to configure
2394 * This enables/disables XPS for a given Tx descriptor ring
2395 * based on the TCs enabled for the VSI that ring belongs to.
2397 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2399 struct i40e_vsi *vsi = ring->vsi;
2402 if (!ring->q_vector || !ring->netdev)
2405 /* Single TC mode enable XPS */
2406 if (vsi->tc_config.numtc <= 1) {
2407 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2408 netif_set_xps_queue(ring->netdev,
2409 &ring->q_vector->affinity_mask,
2411 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2412 /* Disable XPS to allow selection based on TC */
2413 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2414 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2415 free_cpumask_var(mask);
2420 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2421 * @ring: The Tx ring to configure
2423 * Configure the Tx descriptor ring in the HMC context.
2425 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2427 struct i40e_vsi *vsi = ring->vsi;
2428 u16 pf_q = vsi->base_queue + ring->queue_index;
2429 struct i40e_hw *hw = &vsi->back->hw;
2430 struct i40e_hmc_obj_txq tx_ctx;
2431 i40e_status err = 0;
2434 /* some ATR related tx ring init */
2435 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2436 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2437 ring->atr_count = 0;
2439 ring->atr_sample_rate = 0;
2443 i40e_config_xps_tx_ring(ring);
2445 /* clear the context structure first */
2446 memset(&tx_ctx, 0, sizeof(tx_ctx));
2448 tx_ctx.new_context = 1;
2449 tx_ctx.base = (ring->dma / 128);
2450 tx_ctx.qlen = ring->count;
2451 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2452 I40E_FLAG_FD_ATR_ENABLED));
2454 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2456 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2457 /* FDIR VSI tx ring can still use RS bit and writebacks */
2458 if (vsi->type != I40E_VSI_FDIR)
2459 tx_ctx.head_wb_ena = 1;
2460 tx_ctx.head_wb_addr = ring->dma +
2461 (ring->count * sizeof(struct i40e_tx_desc));
2463 /* As part of VSI creation/update, FW allocates certain
2464 * Tx arbitration queue sets for each TC enabled for
2465 * the VSI. The FW returns the handles to these queue
2466 * sets as part of the response buffer to Add VSI,
2467 * Update VSI, etc. AQ commands. It is expected that
2468 * these queue set handles be associated with the Tx
2469 * queues by the driver as part of the TX queue context
2470 * initialization. This has to be done regardless of
2471 * DCB as by default everything is mapped to TC0.
2473 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2474 tx_ctx.rdylist_act = 0;
2476 /* clear the context in the HMC */
2477 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2479 dev_info(&vsi->back->pdev->dev,
2480 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2481 ring->queue_index, pf_q, err);
2485 /* set the context in the HMC */
2486 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2488 dev_info(&vsi->back->pdev->dev,
2489 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2490 ring->queue_index, pf_q, err);
2494 /* Now associate this queue with this PCI function */
2495 if (vsi->type == I40E_VSI_VMDQ2) {
2496 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2497 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2498 I40E_QTX_CTL_VFVM_INDX_MASK;
2500 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2503 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2504 I40E_QTX_CTL_PF_INDX_MASK);
2505 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2508 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2510 /* cache tail off for easier writes later */
2511 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2517 * i40e_configure_rx_ring - Configure a receive ring context
2518 * @ring: The Rx ring to configure
2520 * Configure the Rx descriptor ring in the HMC context.
2522 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2524 struct i40e_vsi *vsi = ring->vsi;
2525 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2526 u16 pf_q = vsi->base_queue + ring->queue_index;
2527 struct i40e_hw *hw = &vsi->back->hw;
2528 struct i40e_hmc_obj_rxq rx_ctx;
2529 i40e_status err = 0;
2533 /* clear the context structure first */
2534 memset(&rx_ctx, 0, sizeof(rx_ctx));
2536 ring->rx_buf_len = vsi->rx_buf_len;
2537 ring->rx_hdr_len = vsi->rx_hdr_len;
2539 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2540 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2542 rx_ctx.base = (ring->dma / 128);
2543 rx_ctx.qlen = ring->count;
2545 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2546 set_ring_16byte_desc_enabled(ring);
2552 rx_ctx.dtype = vsi->dtype;
2554 set_ring_ps_enabled(ring);
2555 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2557 I40E_RX_SPLIT_TCP_UDP |
2560 rx_ctx.hsplit_0 = 0;
2563 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2564 (chain_len * ring->rx_buf_len));
2565 if (hw->revision_id == 0)
2566 rx_ctx.lrxqthresh = 0;
2568 rx_ctx.lrxqthresh = 2;
2569 rx_ctx.crcstrip = 1;
2573 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2575 /* set the prefena field to 1 because the manual says to */
2578 /* clear the context in the HMC */
2579 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2581 dev_info(&vsi->back->pdev->dev,
2582 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2583 ring->queue_index, pf_q, err);
2587 /* set the context in the HMC */
2588 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2590 dev_info(&vsi->back->pdev->dev,
2591 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2592 ring->queue_index, pf_q, err);
2596 /* cache tail for quicker writes, and clear the reg before use */
2597 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2598 writel(0, ring->tail);
2600 if (ring_is_ps_enabled(ring)) {
2601 i40e_alloc_rx_headers(ring);
2602 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2604 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2611 * i40e_vsi_configure_tx - Configure the VSI for Tx
2612 * @vsi: VSI structure describing this set of rings and resources
2614 * Configure the Tx VSI for operation.
2616 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2621 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2622 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2628 * i40e_vsi_configure_rx - Configure the VSI for Rx
2629 * @vsi: the VSI being configured
2631 * Configure the Rx VSI for operation.
2633 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2638 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2639 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2640 + ETH_FCS_LEN + VLAN_HLEN;
2642 vsi->max_frame = I40E_RXBUFFER_2048;
2644 /* figure out correct receive buffer length */
2645 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2646 I40E_FLAG_RX_PS_ENABLED)) {
2647 case I40E_FLAG_RX_1BUF_ENABLED:
2648 vsi->rx_hdr_len = 0;
2649 vsi->rx_buf_len = vsi->max_frame;
2650 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2652 case I40E_FLAG_RX_PS_ENABLED:
2653 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2654 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2655 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2658 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2659 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2660 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2665 /* setup rx buffer for FCoE */
2666 if ((vsi->type == I40E_VSI_FCOE) &&
2667 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2668 vsi->rx_hdr_len = 0;
2669 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2670 vsi->max_frame = I40E_RXBUFFER_3072;
2671 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2674 #endif /* I40E_FCOE */
2675 /* round up for the chip's needs */
2676 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2677 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2678 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2679 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2681 /* set up individual rings */
2682 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2683 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2689 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2690 * @vsi: ptr to the VSI
2692 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2694 struct i40e_ring *tx_ring, *rx_ring;
2695 u16 qoffset, qcount;
2698 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2699 /* Reset the TC information */
2700 for (i = 0; i < vsi->num_queue_pairs; i++) {
2701 rx_ring = vsi->rx_rings[i];
2702 tx_ring = vsi->tx_rings[i];
2703 rx_ring->dcb_tc = 0;
2704 tx_ring->dcb_tc = 0;
2708 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2709 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2712 qoffset = vsi->tc_config.tc_info[n].qoffset;
2713 qcount = vsi->tc_config.tc_info[n].qcount;
2714 for (i = qoffset; i < (qoffset + qcount); i++) {
2715 rx_ring = vsi->rx_rings[i];
2716 tx_ring = vsi->tx_rings[i];
2717 rx_ring->dcb_tc = n;
2718 tx_ring->dcb_tc = n;
2724 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2725 * @vsi: ptr to the VSI
2727 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2730 i40e_set_rx_mode(vsi->netdev);
2734 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2735 * @vsi: Pointer to the targeted VSI
2737 * This function replays the hlist on the hw where all the SB Flow Director
2738 * filters were saved.
2740 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2742 struct i40e_fdir_filter *filter;
2743 struct i40e_pf *pf = vsi->back;
2744 struct hlist_node *node;
2746 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2749 hlist_for_each_entry_safe(filter, node,
2750 &pf->fdir_filter_list, fdir_node) {
2751 i40e_add_del_fdir(vsi, filter, true);
2756 * i40e_vsi_configure - Set up the VSI for action
2757 * @vsi: the VSI being configured
2759 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2763 i40e_set_vsi_rx_mode(vsi);
2764 i40e_restore_vlan(vsi);
2765 i40e_vsi_config_dcb_rings(vsi);
2766 err = i40e_vsi_configure_tx(vsi);
2768 err = i40e_vsi_configure_rx(vsi);
2774 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2775 * @vsi: the VSI being configured
2777 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2779 struct i40e_pf *pf = vsi->back;
2780 struct i40e_q_vector *q_vector;
2781 struct i40e_hw *hw = &pf->hw;
2787 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2788 * and PFINT_LNKLSTn registers, e.g.:
2789 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2791 qp = vsi->base_queue;
2792 vector = vsi->base_vector;
2793 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2794 q_vector = vsi->q_vectors[i];
2795 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2796 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2797 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2799 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2800 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2801 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2804 /* Linked list for the queuepairs assigned to this vector */
2805 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2806 for (q = 0; q < q_vector->num_ringpairs; q++) {
2807 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2808 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2809 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2810 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2812 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2814 wr32(hw, I40E_QINT_RQCTL(qp), val);
2816 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2817 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2818 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2819 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2821 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2823 /* Terminate the linked list */
2824 if (q == (q_vector->num_ringpairs - 1))
2825 val |= (I40E_QUEUE_END_OF_LIST
2826 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2828 wr32(hw, I40E_QINT_TQCTL(qp), val);
2837 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2838 * @hw: ptr to the hardware info
2840 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2842 struct i40e_hw *hw = &pf->hw;
2845 /* clear things first */
2846 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2847 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2849 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2850 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2851 I40E_PFINT_ICR0_ENA_GRST_MASK |
2852 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2853 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2854 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2855 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2856 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2858 if (pf->flags & I40E_FLAG_PTP)
2859 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2861 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2863 /* SW_ITR_IDX = 0, but don't change INTENA */
2864 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2865 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2867 /* OTHER_ITR_IDX = 0 */
2868 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2872 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2873 * @vsi: the VSI being configured
2875 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2877 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2878 struct i40e_pf *pf = vsi->back;
2879 struct i40e_hw *hw = &pf->hw;
2882 /* set the ITR configuration */
2883 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2884 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2885 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2886 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2887 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2888 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2890 i40e_enable_misc_int_causes(pf);
2892 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2893 wr32(hw, I40E_PFINT_LNKLST0, 0);
2895 /* Associate the queue pair to the vector and enable the queue int */
2896 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2897 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2898 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2900 wr32(hw, I40E_QINT_RQCTL(0), val);
2902 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2903 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2904 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2906 wr32(hw, I40E_QINT_TQCTL(0), val);
2911 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2912 * @pf: board private structure
2914 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2916 struct i40e_hw *hw = &pf->hw;
2918 wr32(hw, I40E_PFINT_DYN_CTL0,
2919 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2924 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2925 * @pf: board private structure
2927 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2929 struct i40e_hw *hw = &pf->hw;
2932 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2933 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2934 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2936 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2941 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2942 * @vsi: pointer to a vsi
2943 * @vector: enable a particular Hw Interrupt vector
2945 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2947 struct i40e_pf *pf = vsi->back;
2948 struct i40e_hw *hw = &pf->hw;
2951 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2952 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2953 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2954 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2955 /* skip the flush */
2959 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2960 * @vsi: pointer to a vsi
2961 * @vector: disable a particular Hw Interrupt vector
2963 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2965 struct i40e_pf *pf = vsi->back;
2966 struct i40e_hw *hw = &pf->hw;
2969 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2970 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2975 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2976 * @irq: interrupt number
2977 * @data: pointer to a q_vector
2979 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2981 struct i40e_q_vector *q_vector = data;
2983 if (!q_vector->tx.ring && !q_vector->rx.ring)
2986 napi_schedule(&q_vector->napi);
2992 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2993 * @vsi: the VSI being configured
2994 * @basename: name for the vector
2996 * Allocates MSI-X vectors and requests interrupts from the kernel.
2998 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3000 int q_vectors = vsi->num_q_vectors;
3001 struct i40e_pf *pf = vsi->back;
3002 int base = vsi->base_vector;
3007 for (vector = 0; vector < q_vectors; vector++) {
3008 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3010 if (q_vector->tx.ring && q_vector->rx.ring) {
3011 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3012 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3014 } else if (q_vector->rx.ring) {
3015 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3016 "%s-%s-%d", basename, "rx", rx_int_idx++);
3017 } else if (q_vector->tx.ring) {
3018 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3019 "%s-%s-%d", basename, "tx", tx_int_idx++);
3021 /* skip this unused q_vector */
3024 err = request_irq(pf->msix_entries[base + vector].vector,
3030 dev_info(&pf->pdev->dev,
3031 "%s: request_irq failed, error: %d\n",
3033 goto free_queue_irqs;
3035 /* assign the mask for this irq */
3036 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3037 &q_vector->affinity_mask);
3040 vsi->irqs_ready = true;
3046 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3048 free_irq(pf->msix_entries[base + vector].vector,
3049 &(vsi->q_vectors[vector]));
3055 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3056 * @vsi: the VSI being un-configured
3058 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3060 struct i40e_pf *pf = vsi->back;
3061 struct i40e_hw *hw = &pf->hw;
3062 int base = vsi->base_vector;
3065 for (i = 0; i < vsi->num_queue_pairs; i++) {
3066 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3067 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3070 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3071 for (i = vsi->base_vector;
3072 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3073 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3076 for (i = 0; i < vsi->num_q_vectors; i++)
3077 synchronize_irq(pf->msix_entries[i + base].vector);
3079 /* Legacy and MSI mode - this stops all interrupt handling */
3080 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3081 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3083 synchronize_irq(pf->pdev->irq);
3088 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3089 * @vsi: the VSI being configured
3091 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3093 struct i40e_pf *pf = vsi->back;
3096 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3097 for (i = vsi->base_vector;
3098 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3099 i40e_irq_dynamic_enable(vsi, i);
3101 i40e_irq_dynamic_enable_icr0(pf);
3104 i40e_flush(&pf->hw);
3109 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3110 * @pf: board private structure
3112 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3115 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3116 i40e_flush(&pf->hw);
3120 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3121 * @irq: interrupt number
3122 * @data: pointer to a q_vector
3124 * This is the handler used for all MSI/Legacy interrupts, and deals
3125 * with both queue and non-queue interrupts. This is also used in
3126 * MSIX mode to handle the non-queue interrupts.
3128 static irqreturn_t i40e_intr(int irq, void *data)
3130 struct i40e_pf *pf = (struct i40e_pf *)data;
3131 struct i40e_hw *hw = &pf->hw;
3132 irqreturn_t ret = IRQ_NONE;
3133 u32 icr0, icr0_remaining;
3136 icr0 = rd32(hw, I40E_PFINT_ICR0);
3137 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3139 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3140 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3143 /* if interrupt but no bits showing, must be SWINT */
3144 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3145 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3148 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3149 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3151 /* temporarily disable queue cause for NAPI processing */
3152 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3153 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3154 wr32(hw, I40E_QINT_RQCTL(0), qval);
3156 qval = rd32(hw, I40E_QINT_TQCTL(0));
3157 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3158 wr32(hw, I40E_QINT_TQCTL(0), qval);
3160 if (!test_bit(__I40E_DOWN, &pf->state))
3161 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3164 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3165 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3166 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3169 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3170 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3171 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3174 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3175 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3176 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3179 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3180 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3181 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3182 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3183 val = rd32(hw, I40E_GLGEN_RSTAT);
3184 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3185 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3186 if (val == I40E_RESET_CORER) {
3188 } else if (val == I40E_RESET_GLOBR) {
3190 } else if (val == I40E_RESET_EMPR) {
3192 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3196 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3197 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3198 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3201 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3202 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3204 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3205 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3206 i40e_ptp_tx_hwtstamp(pf);
3210 /* If a critical error is pending we have no choice but to reset the
3212 * Report and mask out any remaining unexpected interrupts.
3214 icr0_remaining = icr0 & ena_mask;
3215 if (icr0_remaining) {
3216 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3218 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3219 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3220 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3221 dev_info(&pf->pdev->dev, "device will be reset\n");
3222 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3223 i40e_service_event_schedule(pf);
3225 ena_mask &= ~icr0_remaining;
3230 /* re-enable interrupt causes */
3231 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3232 if (!test_bit(__I40E_DOWN, &pf->state)) {
3233 i40e_service_event_schedule(pf);
3234 i40e_irq_dynamic_enable_icr0(pf);
3241 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3242 * @tx_ring: tx ring to clean
3243 * @budget: how many cleans we're allowed
3245 * Returns true if there's any budget left (e.g. the clean is finished)
3247 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3249 struct i40e_vsi *vsi = tx_ring->vsi;
3250 u16 i = tx_ring->next_to_clean;
3251 struct i40e_tx_buffer *tx_buf;
3252 struct i40e_tx_desc *tx_desc;
3254 tx_buf = &tx_ring->tx_bi[i];
3255 tx_desc = I40E_TX_DESC(tx_ring, i);
3256 i -= tx_ring->count;
3259 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3261 /* if next_to_watch is not set then there is no work pending */
3265 /* prevent any other reads prior to eop_desc */
3266 read_barrier_depends();
3268 /* if the descriptor isn't done, no work yet to do */
3269 if (!(eop_desc->cmd_type_offset_bsz &
3270 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3273 /* clear next_to_watch to prevent false hangs */
3274 tx_buf->next_to_watch = NULL;
3276 tx_desc->buffer_addr = 0;
3277 tx_desc->cmd_type_offset_bsz = 0;
3278 /* move past filter desc */
3283 i -= tx_ring->count;
3284 tx_buf = tx_ring->tx_bi;
3285 tx_desc = I40E_TX_DESC(tx_ring, 0);
3287 /* unmap skb header data */
3288 dma_unmap_single(tx_ring->dev,
3289 dma_unmap_addr(tx_buf, dma),
3290 dma_unmap_len(tx_buf, len),
3292 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3293 kfree(tx_buf->raw_buf);
3295 tx_buf->raw_buf = NULL;
3296 tx_buf->tx_flags = 0;
3297 tx_buf->next_to_watch = NULL;
3298 dma_unmap_len_set(tx_buf, len, 0);
3299 tx_desc->buffer_addr = 0;
3300 tx_desc->cmd_type_offset_bsz = 0;
3302 /* move us past the eop_desc for start of next FD desc */
3307 i -= tx_ring->count;
3308 tx_buf = tx_ring->tx_bi;
3309 tx_desc = I40E_TX_DESC(tx_ring, 0);
3312 /* update budget accounting */
3314 } while (likely(budget));
3316 i += tx_ring->count;
3317 tx_ring->next_to_clean = i;
3319 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3320 i40e_irq_dynamic_enable(vsi,
3321 tx_ring->q_vector->v_idx + vsi->base_vector);
3327 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3328 * @irq: interrupt number
3329 * @data: pointer to a q_vector
3331 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3333 struct i40e_q_vector *q_vector = data;
3334 struct i40e_vsi *vsi;
3336 if (!q_vector->tx.ring)
3339 vsi = q_vector->tx.ring->vsi;
3340 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3346 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3347 * @vsi: the VSI being configured
3348 * @v_idx: vector index
3349 * @qp_idx: queue pair index
3351 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3353 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3354 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3355 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3357 tx_ring->q_vector = q_vector;
3358 tx_ring->next = q_vector->tx.ring;
3359 q_vector->tx.ring = tx_ring;
3360 q_vector->tx.count++;
3362 rx_ring->q_vector = q_vector;
3363 rx_ring->next = q_vector->rx.ring;
3364 q_vector->rx.ring = rx_ring;
3365 q_vector->rx.count++;
3369 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3370 * @vsi: the VSI being configured
3372 * This function maps descriptor rings to the queue-specific vectors
3373 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3374 * one vector per queue pair, but on a constrained vector budget, we
3375 * group the queue pairs as "efficiently" as possible.
3377 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3379 int qp_remaining = vsi->num_queue_pairs;
3380 int q_vectors = vsi->num_q_vectors;
3385 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3386 * group them so there are multiple queues per vector.
3387 * It is also important to go through all the vectors available to be
3388 * sure that if we don't use all the vectors, that the remaining vectors
3389 * are cleared. This is especially important when decreasing the
3390 * number of queues in use.
3392 for (; v_start < q_vectors; v_start++) {
3393 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3395 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3397 q_vector->num_ringpairs = num_ringpairs;
3399 q_vector->rx.count = 0;
3400 q_vector->tx.count = 0;
3401 q_vector->rx.ring = NULL;
3402 q_vector->tx.ring = NULL;
3404 while (num_ringpairs--) {
3405 map_vector_to_qp(vsi, v_start, qp_idx);
3413 * i40e_vsi_request_irq - Request IRQ from the OS
3414 * @vsi: the VSI being configured
3415 * @basename: name for the vector
3417 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3419 struct i40e_pf *pf = vsi->back;
3422 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3423 err = i40e_vsi_request_irq_msix(vsi, basename);
3424 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3425 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3428 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3432 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3437 #ifdef CONFIG_NET_POLL_CONTROLLER
3439 * i40e_netpoll - A Polling 'interrupt'handler
3440 * @netdev: network interface device structure
3442 * This is used by netconsole to send skbs without having to re-enable
3443 * interrupts. It's not called while the normal interrupt routine is executing.
3446 void i40e_netpoll(struct net_device *netdev)
3448 static void i40e_netpoll(struct net_device *netdev)
3451 struct i40e_netdev_priv *np = netdev_priv(netdev);
3452 struct i40e_vsi *vsi = np->vsi;
3453 struct i40e_pf *pf = vsi->back;
3456 /* if interface is down do nothing */
3457 if (test_bit(__I40E_DOWN, &vsi->state))
3460 pf->flags |= I40E_FLAG_IN_NETPOLL;
3461 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3462 for (i = 0; i < vsi->num_q_vectors; i++)
3463 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3465 i40e_intr(pf->pdev->irq, netdev);
3467 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3472 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3473 * @pf: the PF being configured
3474 * @pf_q: the PF queue
3475 * @enable: enable or disable state of the queue
3477 * This routine will wait for the given Tx queue of the PF to reach the
3478 * enabled or disabled state.
3479 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3480 * multiple retries; else will return 0 in case of success.
3482 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3487 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3488 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3489 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3492 usleep_range(10, 20);
3494 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3501 * i40e_vsi_control_tx - Start or stop a VSI's rings
3502 * @vsi: the VSI being configured
3503 * @enable: start or stop the rings
3505 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3507 struct i40e_pf *pf = vsi->back;
3508 struct i40e_hw *hw = &pf->hw;
3509 int i, j, pf_q, ret = 0;
3512 pf_q = vsi->base_queue;
3513 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3515 /* warn the TX unit of coming changes */
3516 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3518 usleep_range(10, 20);
3520 for (j = 0; j < 50; j++) {
3521 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3522 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3523 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3525 usleep_range(1000, 2000);
3527 /* Skip if the queue is already in the requested state */
3528 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3531 /* turn on/off the queue */
3533 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3534 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3536 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3539 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3540 /* No waiting for the Tx queue to disable */
3541 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3544 /* wait for the change to finish */
3545 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3547 dev_info(&pf->pdev->dev,
3548 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3549 __func__, vsi->seid, pf_q,
3550 (enable ? "en" : "dis"));
3555 if (hw->revision_id == 0)
3561 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3562 * @pf: the PF being configured
3563 * @pf_q: the PF queue
3564 * @enable: enable or disable state of the queue
3566 * This routine will wait for the given Rx queue of the PF to reach the
3567 * enabled or disabled state.
3568 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3569 * multiple retries; else will return 0 in case of success.
3571 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3576 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3577 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3578 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3581 usleep_range(10, 20);
3583 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3590 * i40e_vsi_control_rx - Start or stop a VSI's rings
3591 * @vsi: the VSI being configured
3592 * @enable: start or stop the rings
3594 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3596 struct i40e_pf *pf = vsi->back;
3597 struct i40e_hw *hw = &pf->hw;
3598 int i, j, pf_q, ret = 0;
3601 pf_q = vsi->base_queue;
3602 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3603 for (j = 0; j < 50; j++) {
3604 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3605 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3606 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3608 usleep_range(1000, 2000);
3611 /* Skip if the queue is already in the requested state */
3612 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3615 /* turn on/off the queue */
3617 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3619 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3620 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3622 /* wait for the change to finish */
3623 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3625 dev_info(&pf->pdev->dev,
3626 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3627 __func__, vsi->seid, pf_q,
3628 (enable ? "en" : "dis"));
3637 * i40e_vsi_control_rings - Start or stop a VSI's rings
3638 * @vsi: the VSI being configured
3639 * @enable: start or stop the rings
3641 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3645 /* do rx first for enable and last for disable */
3647 ret = i40e_vsi_control_rx(vsi, request);
3650 ret = i40e_vsi_control_tx(vsi, request);
3652 /* Ignore return value, we need to shutdown whatever we can */
3653 i40e_vsi_control_tx(vsi, request);
3654 i40e_vsi_control_rx(vsi, request);
3661 * i40e_vsi_free_irq - Free the irq association with the OS
3662 * @vsi: the VSI being configured
3664 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3666 struct i40e_pf *pf = vsi->back;
3667 struct i40e_hw *hw = &pf->hw;
3668 int base = vsi->base_vector;
3672 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3673 if (!vsi->q_vectors)
3676 if (!vsi->irqs_ready)
3679 vsi->irqs_ready = false;
3680 for (i = 0; i < vsi->num_q_vectors; i++) {
3681 u16 vector = i + base;
3683 /* free only the irqs that were actually requested */
3684 if (!vsi->q_vectors[i] ||
3685 !vsi->q_vectors[i]->num_ringpairs)
3688 /* clear the affinity_mask in the IRQ descriptor */
3689 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3691 free_irq(pf->msix_entries[vector].vector,
3694 /* Tear down the interrupt queue link list
3696 * We know that they come in pairs and always
3697 * the Rx first, then the Tx. To clear the
3698 * link list, stick the EOL value into the
3699 * next_q field of the registers.
3701 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3702 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3703 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3704 val |= I40E_QUEUE_END_OF_LIST
3705 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3706 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3708 while (qp != I40E_QUEUE_END_OF_LIST) {
3711 val = rd32(hw, I40E_QINT_RQCTL(qp));
3713 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3714 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3715 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3716 I40E_QINT_RQCTL_INTEVENT_MASK);
3718 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3719 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3721 wr32(hw, I40E_QINT_RQCTL(qp), val);
3723 val = rd32(hw, I40E_QINT_TQCTL(qp));
3725 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3726 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3728 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3729 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3730 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3731 I40E_QINT_TQCTL_INTEVENT_MASK);
3733 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3734 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3736 wr32(hw, I40E_QINT_TQCTL(qp), val);
3741 free_irq(pf->pdev->irq, pf);
3743 val = rd32(hw, I40E_PFINT_LNKLST0);
3744 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3745 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3746 val |= I40E_QUEUE_END_OF_LIST
3747 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3748 wr32(hw, I40E_PFINT_LNKLST0, val);
3750 val = rd32(hw, I40E_QINT_RQCTL(qp));
3751 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3752 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3753 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3754 I40E_QINT_RQCTL_INTEVENT_MASK);
3756 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3757 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3759 wr32(hw, I40E_QINT_RQCTL(qp), val);
3761 val = rd32(hw, I40E_QINT_TQCTL(qp));
3763 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3764 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3765 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3766 I40E_QINT_TQCTL_INTEVENT_MASK);
3768 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3769 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3771 wr32(hw, I40E_QINT_TQCTL(qp), val);
3776 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3777 * @vsi: the VSI being configured
3778 * @v_idx: Index of vector to be freed
3780 * This function frees the memory allocated to the q_vector. In addition if
3781 * NAPI is enabled it will delete any references to the NAPI struct prior
3782 * to freeing the q_vector.
3784 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3786 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3787 struct i40e_ring *ring;
3792 /* disassociate q_vector from rings */
3793 i40e_for_each_ring(ring, q_vector->tx)
3794 ring->q_vector = NULL;
3796 i40e_for_each_ring(ring, q_vector->rx)
3797 ring->q_vector = NULL;
3799 /* only VSI w/ an associated netdev is set up w/ NAPI */
3801 netif_napi_del(&q_vector->napi);
3803 vsi->q_vectors[v_idx] = NULL;
3805 kfree_rcu(q_vector, rcu);
3809 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3810 * @vsi: the VSI being un-configured
3812 * This frees the memory allocated to the q_vectors and
3813 * deletes references to the NAPI struct.
3815 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3819 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3820 i40e_free_q_vector(vsi, v_idx);
3824 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3825 * @pf: board private structure
3827 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3829 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3830 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3831 pci_disable_msix(pf->pdev);
3832 kfree(pf->msix_entries);
3833 pf->msix_entries = NULL;
3834 kfree(pf->irq_pile);
3835 pf->irq_pile = NULL;
3836 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3837 pci_disable_msi(pf->pdev);
3839 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3843 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3844 * @pf: board private structure
3846 * We go through and clear interrupt specific resources and reset the structure
3847 * to pre-load conditions
3849 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3853 i40e_stop_misc_vector(pf);
3854 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3855 synchronize_irq(pf->msix_entries[0].vector);
3856 free_irq(pf->msix_entries[0].vector, pf);
3859 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3860 for (i = 0; i < pf->num_alloc_vsi; i++)
3862 i40e_vsi_free_q_vectors(pf->vsi[i]);
3863 i40e_reset_interrupt_capability(pf);
3867 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3868 * @vsi: the VSI being configured
3870 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3877 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3878 napi_enable(&vsi->q_vectors[q_idx]->napi);
3882 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3883 * @vsi: the VSI being configured
3885 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3892 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3893 napi_disable(&vsi->q_vectors[q_idx]->napi);
3897 * i40e_vsi_close - Shut down a VSI
3898 * @vsi: the vsi to be quelled
3900 static void i40e_vsi_close(struct i40e_vsi *vsi)
3902 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3904 i40e_vsi_free_irq(vsi);
3905 i40e_vsi_free_tx_resources(vsi);
3906 i40e_vsi_free_rx_resources(vsi);
3910 * i40e_quiesce_vsi - Pause a given VSI
3911 * @vsi: the VSI being paused
3913 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3915 if (test_bit(__I40E_DOWN, &vsi->state))
3918 /* No need to disable FCoE VSI when Tx suspended */
3919 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3920 vsi->type == I40E_VSI_FCOE) {
3921 dev_dbg(&vsi->back->pdev->dev,
3922 "%s: VSI seid %d skipping FCoE VSI disable\n",
3923 __func__, vsi->seid);
3927 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3928 if (vsi->netdev && netif_running(vsi->netdev)) {
3929 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3931 i40e_vsi_close(vsi);
3936 * i40e_unquiesce_vsi - Resume a given VSI
3937 * @vsi: the VSI being resumed
3939 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3941 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3944 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3945 if (vsi->netdev && netif_running(vsi->netdev))
3946 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3948 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3952 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3955 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3959 for (v = 0; v < pf->num_alloc_vsi; v++) {
3961 i40e_quiesce_vsi(pf->vsi[v]);
3966 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3969 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3973 for (v = 0; v < pf->num_alloc_vsi; v++) {
3975 i40e_unquiesce_vsi(pf->vsi[v]);
3979 #ifdef CONFIG_I40E_DCB
3981 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
3982 * @vsi: the VSI being configured
3984 * This function waits for the given VSI's Tx queues to be disabled.
3986 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
3988 struct i40e_pf *pf = vsi->back;
3991 pf_q = vsi->base_queue;
3992 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3993 /* Check and wait for the disable status of the queue */
3994 ret = i40e_pf_txq_wait(pf, pf_q, false);
3996 dev_info(&pf->pdev->dev,
3997 "%s: VSI seid %d Tx ring %d disable timeout\n",
3998 __func__, vsi->seid, pf_q);
4007 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4010 * This function waits for the Tx queues to be in disabled state for all the
4011 * VSIs that are managed by this PF.
4013 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4017 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4018 /* No need to wait for FCoE VSI queues */
4019 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4020 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4031 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4032 * @pf: pointer to pf
4034 * Get TC map for ISCSI PF type that will include iSCSI TC
4037 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4039 struct i40e_dcb_app_priority_table app;
4040 struct i40e_hw *hw = &pf->hw;
4041 u8 enabled_tc = 1; /* TC0 is always enabled */
4043 /* Get the iSCSI APP TLV */
4044 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4046 for (i = 0; i < dcbcfg->numapps; i++) {
4047 app = dcbcfg->app[i];
4048 if (app.selector == I40E_APP_SEL_TCPIP &&
4049 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4050 tc = dcbcfg->etscfg.prioritytable[app.priority];
4051 enabled_tc |= (1 << tc);
4060 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4061 * @dcbcfg: the corresponding DCBx configuration structure
4063 * Return the number of TCs from given DCBx configuration
4065 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4070 /* Scan the ETS Config Priority Table to find
4071 * traffic class enabled for a given priority
4072 * and use the traffic class index to get the
4073 * number of traffic classes enabled
4075 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4076 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4077 num_tc = dcbcfg->etscfg.prioritytable[i];
4080 /* Traffic class index starts from zero so
4081 * increment to return the actual count
4087 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4088 * @dcbcfg: the corresponding DCBx configuration structure
4090 * Query the current DCB configuration and return the number of
4091 * traffic classes enabled from the given DCBX config
4093 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4095 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4099 for (i = 0; i < num_tc; i++)
4100 enabled_tc |= 1 << i;
4106 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4107 * @pf: PF being queried
4109 * Return number of traffic classes enabled for the given PF
4111 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4113 struct i40e_hw *hw = &pf->hw;
4116 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4118 /* If DCB is not enabled then always in single TC */
4119 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4122 /* SFP mode will be enabled for all TCs on port */
4123 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4124 return i40e_dcb_get_num_tc(dcbcfg);
4126 /* MFP mode return count of enabled TCs for this PF */
4127 if (pf->hw.func_caps.iscsi)
4128 enabled_tc = i40e_get_iscsi_tc_map(pf);
4130 return 1; /* Only TC0 */
4132 /* At least have TC0 */
4133 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4134 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4135 if (enabled_tc & (1 << i))
4142 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4143 * @pf: PF being queried
4145 * Return a bitmap for first enabled traffic class for this PF.
4147 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4149 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4153 return 0x1; /* TC0 */
4155 /* Find the first enabled TC */
4156 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4157 if (enabled_tc & (1 << i))
4165 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4166 * @pf: PF being queried
4168 * Return a bitmap for enabled traffic classes for this PF.
4170 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4172 /* If DCB is not enabled for this PF then just return default TC */
4173 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4174 return i40e_pf_get_default_tc(pf);
4176 /* SFP mode we want PF to be enabled for all TCs */
4177 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4178 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4180 /* MFP enabled and iSCSI PF type */
4181 if (pf->hw.func_caps.iscsi)
4182 return i40e_get_iscsi_tc_map(pf);
4184 return i40e_pf_get_default_tc(pf);
4188 * i40e_vsi_get_bw_info - Query VSI BW Information
4189 * @vsi: the VSI being queried
4191 * Returns 0 on success, negative value on failure
4193 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4195 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4196 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4197 struct i40e_pf *pf = vsi->back;
4198 struct i40e_hw *hw = &pf->hw;
4203 /* Get the VSI level BW configuration */
4204 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4206 dev_info(&pf->pdev->dev,
4207 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4208 aq_ret, pf->hw.aq.asq_last_status);
4212 /* Get the VSI level BW configuration per TC */
4213 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4216 dev_info(&pf->pdev->dev,
4217 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4218 aq_ret, pf->hw.aq.asq_last_status);
4222 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4223 dev_info(&pf->pdev->dev,
4224 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4225 bw_config.tc_valid_bits,
4226 bw_ets_config.tc_valid_bits);
4227 /* Still continuing */
4230 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4231 vsi->bw_max_quanta = bw_config.max_bw;
4232 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4233 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4234 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4235 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4236 vsi->bw_ets_limit_credits[i] =
4237 le16_to_cpu(bw_ets_config.credits[i]);
4238 /* 3 bits out of 4 for each TC */
4239 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4246 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4247 * @vsi: the VSI being configured
4248 * @enabled_tc: TC bitmap
4249 * @bw_credits: BW shared credits per TC
4251 * Returns 0 on success, negative value on failure
4253 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4256 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4260 bw_data.tc_valid_bits = enabled_tc;
4261 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4262 bw_data.tc_bw_credits[i] = bw_share[i];
4264 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4267 dev_info(&vsi->back->pdev->dev,
4268 "AQ command Config VSI BW allocation per TC failed = %d\n",
4269 vsi->back->hw.aq.asq_last_status);
4273 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4274 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4280 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4281 * @vsi: the VSI being configured
4282 * @enabled_tc: TC map to be enabled
4285 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4287 struct net_device *netdev = vsi->netdev;
4288 struct i40e_pf *pf = vsi->back;
4289 struct i40e_hw *hw = &pf->hw;
4292 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4298 netdev_reset_tc(netdev);
4302 /* Set up actual enabled TCs on the VSI */
4303 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4306 /* set per TC queues for the VSI */
4307 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4308 /* Only set TC queues for enabled tcs
4310 * e.g. For a VSI that has TC0 and TC3 enabled the
4311 * enabled_tc bitmap would be 0x00001001; the driver
4312 * will set the numtc for netdev as 2 that will be
4313 * referenced by the netdev layer as TC 0 and 1.
4315 if (vsi->tc_config.enabled_tc & (1 << i))
4316 netdev_set_tc_queue(netdev,
4317 vsi->tc_config.tc_info[i].netdev_tc,
4318 vsi->tc_config.tc_info[i].qcount,
4319 vsi->tc_config.tc_info[i].qoffset);
4322 /* Assign UP2TC map for the VSI */
4323 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4324 /* Get the actual TC# for the UP */
4325 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4326 /* Get the mapped netdev TC# for the UP */
4327 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4328 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4333 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4334 * @vsi: the VSI being configured
4335 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4337 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4338 struct i40e_vsi_context *ctxt)
4340 /* copy just the sections touched not the entire info
4341 * since not all sections are valid as returned by
4344 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4345 memcpy(&vsi->info.queue_mapping,
4346 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4347 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4348 sizeof(vsi->info.tc_mapping));
4352 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4353 * @vsi: VSI to be configured
4354 * @enabled_tc: TC bitmap
4356 * This configures a particular VSI for TCs that are mapped to the
4357 * given TC bitmap. It uses default bandwidth share for TCs across
4358 * VSIs to configure TC for a particular VSI.
4361 * It is expected that the VSI queues have been quisced before calling
4364 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4366 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4367 struct i40e_vsi_context ctxt;
4371 /* Check if enabled_tc is same as existing or new TCs */
4372 if (vsi->tc_config.enabled_tc == enabled_tc)
4375 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4376 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4377 if (enabled_tc & (1 << i))
4381 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4383 dev_info(&vsi->back->pdev->dev,
4384 "Failed configuring TC map %d for VSI %d\n",
4385 enabled_tc, vsi->seid);
4389 /* Update Queue Pairs Mapping for currently enabled UPs */
4390 ctxt.seid = vsi->seid;
4391 ctxt.pf_num = vsi->back->hw.pf_id;
4393 ctxt.uplink_seid = vsi->uplink_seid;
4394 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4395 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4397 /* Update the VSI after updating the VSI queue-mapping information */
4398 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4400 dev_info(&vsi->back->pdev->dev,
4401 "update vsi failed, aq_err=%d\n",
4402 vsi->back->hw.aq.asq_last_status);
4405 /* update the local VSI info with updated queue map */
4406 i40e_vsi_update_queue_map(vsi, &ctxt);
4407 vsi->info.valid_sections = 0;
4409 /* Update current VSI BW information */
4410 ret = i40e_vsi_get_bw_info(vsi);
4412 dev_info(&vsi->back->pdev->dev,
4413 "Failed updating vsi bw info, aq_err=%d\n",
4414 vsi->back->hw.aq.asq_last_status);
4418 /* Update the netdev TC setup */
4419 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4425 * i40e_veb_config_tc - Configure TCs for given VEB
4427 * @enabled_tc: TC bitmap
4429 * Configures given TC bitmap for VEB (switching) element
4431 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4433 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4434 struct i40e_pf *pf = veb->pf;
4438 /* No TCs or already enabled TCs just return */
4439 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4442 bw_data.tc_valid_bits = enabled_tc;
4443 /* bw_data.absolute_credits is not set (relative) */
4445 /* Enable ETS TCs with equal BW Share for now */
4446 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4447 if (enabled_tc & (1 << i))
4448 bw_data.tc_bw_share_credits[i] = 1;
4451 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4454 dev_info(&pf->pdev->dev,
4455 "veb bw config failed, aq_err=%d\n",
4456 pf->hw.aq.asq_last_status);
4460 /* Update the BW information */
4461 ret = i40e_veb_get_bw_info(veb);
4463 dev_info(&pf->pdev->dev,
4464 "Failed getting veb bw config, aq_err=%d\n",
4465 pf->hw.aq.asq_last_status);
4472 #ifdef CONFIG_I40E_DCB
4474 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4477 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4478 * the caller would've quiesce all the VSIs before calling
4481 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4487 /* Enable the TCs available on PF to all VEBs */
4488 tc_map = i40e_pf_get_tc_map(pf);
4489 for (v = 0; v < I40E_MAX_VEB; v++) {
4492 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4494 dev_info(&pf->pdev->dev,
4495 "Failed configuring TC for VEB seid=%d\n",
4497 /* Will try to configure as many components */
4501 /* Update each VSI */
4502 for (v = 0; v < pf->num_alloc_vsi; v++) {
4506 /* - Enable all TCs for the LAN VSI
4508 * - For FCoE VSI only enable the TC configured
4509 * as per the APP TLV
4511 * - For all others keep them at TC0 for now
4513 if (v == pf->lan_vsi)
4514 tc_map = i40e_pf_get_tc_map(pf);
4516 tc_map = i40e_pf_get_default_tc(pf);
4518 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4519 tc_map = i40e_get_fcoe_tc_map(pf);
4520 #endif /* #ifdef I40E_FCOE */
4522 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4524 dev_info(&pf->pdev->dev,
4525 "Failed configuring TC for VSI seid=%d\n",
4527 /* Will try to configure as many components */
4529 /* Re-configure VSI vectors based on updated TC map */
4530 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4531 if (pf->vsi[v]->netdev)
4532 i40e_dcbnl_set_all(pf->vsi[v]);
4538 * i40e_resume_port_tx - Resume port Tx
4541 * Resume a port's Tx and issue a PF reset in case of failure to
4544 static int i40e_resume_port_tx(struct i40e_pf *pf)
4546 struct i40e_hw *hw = &pf->hw;
4549 ret = i40e_aq_resume_port_tx(hw, NULL);
4551 dev_info(&pf->pdev->dev,
4552 "AQ command Resume Port Tx failed = %d\n",
4553 pf->hw.aq.asq_last_status);
4554 /* Schedule PF reset to recover */
4555 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4556 i40e_service_event_schedule(pf);
4563 * i40e_init_pf_dcb - Initialize DCB configuration
4564 * @pf: PF being configured
4566 * Query the current DCB configuration and cache it
4567 * in the hardware structure
4569 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4571 struct i40e_hw *hw = &pf->hw;
4574 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4575 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4576 (pf->hw.aq.fw_maj_ver < 4))
4579 /* Get the initial DCB configuration */
4580 err = i40e_init_dcb(hw);
4582 /* Device/Function is not DCBX capable */
4583 if ((!hw->func_caps.dcb) ||
4584 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4585 dev_info(&pf->pdev->dev,
4586 "DCBX offload is not supported or is disabled for this PF.\n");
4588 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4592 /* When status is not DISABLED then DCBX in FW */
4593 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4594 DCB_CAP_DCBX_VER_IEEE;
4596 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4597 /* Enable DCB tagging only when more than one TC */
4598 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4599 pf->flags |= I40E_FLAG_DCB_ENABLED;
4600 dev_dbg(&pf->pdev->dev,
4601 "DCBX offload is supported for this PF.\n");
4604 dev_info(&pf->pdev->dev,
4605 "AQ Querying DCB configuration failed: aq_err %d\n",
4606 pf->hw.aq.asq_last_status);
4612 #endif /* CONFIG_I40E_DCB */
4613 #define SPEED_SIZE 14
4616 * i40e_print_link_message - print link up or down
4617 * @vsi: the VSI for which link needs a message
4619 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4621 char speed[SPEED_SIZE] = "Unknown";
4622 char fc[FC_SIZE] = "RX/TX";
4625 netdev_info(vsi->netdev, "NIC Link is Down\n");
4629 /* Warn user if link speed on NPAR enabled partition is not at
4632 if (vsi->back->hw.func_caps.npar_enable &&
4633 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4634 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4635 netdev_warn(vsi->netdev,
4636 "The partition detected link speed that is less than 10Gbps\n");
4638 switch (vsi->back->hw.phy.link_info.link_speed) {
4639 case I40E_LINK_SPEED_40GB:
4640 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4642 case I40E_LINK_SPEED_10GB:
4643 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4645 case I40E_LINK_SPEED_1GB:
4646 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4648 case I40E_LINK_SPEED_100MB:
4649 strncpy(speed, "100 Mbps", SPEED_SIZE);
4655 switch (vsi->back->hw.fc.current_mode) {
4657 strlcpy(fc, "RX/TX", FC_SIZE);
4659 case I40E_FC_TX_PAUSE:
4660 strlcpy(fc, "TX", FC_SIZE);
4662 case I40E_FC_RX_PAUSE:
4663 strlcpy(fc, "RX", FC_SIZE);
4666 strlcpy(fc, "None", FC_SIZE);
4670 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4675 * i40e_up_complete - Finish the last steps of bringing up a connection
4676 * @vsi: the VSI being configured
4678 static int i40e_up_complete(struct i40e_vsi *vsi)
4680 struct i40e_pf *pf = vsi->back;
4683 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4684 i40e_vsi_configure_msix(vsi);
4686 i40e_configure_msi_and_legacy(vsi);
4689 err = i40e_vsi_control_rings(vsi, true);
4693 clear_bit(__I40E_DOWN, &vsi->state);
4694 i40e_napi_enable_all(vsi);
4695 i40e_vsi_enable_irq(vsi);
4697 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4699 i40e_print_link_message(vsi, true);
4700 netif_tx_start_all_queues(vsi->netdev);
4701 netif_carrier_on(vsi->netdev);
4702 } else if (vsi->netdev) {
4703 i40e_print_link_message(vsi, false);
4704 /* need to check for qualified module here*/
4705 if ((pf->hw.phy.link_info.link_info &
4706 I40E_AQ_MEDIA_AVAILABLE) &&
4707 (!(pf->hw.phy.link_info.an_info &
4708 I40E_AQ_QUALIFIED_MODULE)))
4709 netdev_err(vsi->netdev,
4710 "the driver failed to link because an unqualified module was detected.");
4713 /* replay FDIR SB filters */
4714 if (vsi->type == I40E_VSI_FDIR) {
4715 /* reset fd counters */
4716 pf->fd_add_err = pf->fd_atr_cnt = 0;
4717 if (pf->fd_tcp_rule > 0) {
4718 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4719 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4720 pf->fd_tcp_rule = 0;
4722 i40e_fdir_filter_restore(vsi);
4724 i40e_service_event_schedule(pf);
4730 * i40e_vsi_reinit_locked - Reset the VSI
4731 * @vsi: the VSI being configured
4733 * Rebuild the ring structs after some configuration
4734 * has changed, e.g. MTU size.
4736 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4738 struct i40e_pf *pf = vsi->back;
4740 WARN_ON(in_interrupt());
4741 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4742 usleep_range(1000, 2000);
4745 /* Give a VF some time to respond to the reset. The
4746 * two second wait is based upon the watchdog cycle in
4749 if (vsi->type == I40E_VSI_SRIOV)
4752 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4756 * i40e_up - Bring the connection back up after being down
4757 * @vsi: the VSI being configured
4759 int i40e_up(struct i40e_vsi *vsi)
4763 err = i40e_vsi_configure(vsi);
4765 err = i40e_up_complete(vsi);
4771 * i40e_down - Shutdown the connection processing
4772 * @vsi: the VSI being stopped
4774 void i40e_down(struct i40e_vsi *vsi)
4778 /* It is assumed that the caller of this function
4779 * sets the vsi->state __I40E_DOWN bit.
4782 netif_carrier_off(vsi->netdev);
4783 netif_tx_disable(vsi->netdev);
4785 i40e_vsi_disable_irq(vsi);
4786 i40e_vsi_control_rings(vsi, false);
4787 i40e_napi_disable_all(vsi);
4789 for (i = 0; i < vsi->num_queue_pairs; i++) {
4790 i40e_clean_tx_ring(vsi->tx_rings[i]);
4791 i40e_clean_rx_ring(vsi->rx_rings[i]);
4796 * i40e_setup_tc - configure multiple traffic classes
4797 * @netdev: net device to configure
4798 * @tc: number of traffic classes to enable
4801 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4803 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4806 struct i40e_netdev_priv *np = netdev_priv(netdev);
4807 struct i40e_vsi *vsi = np->vsi;
4808 struct i40e_pf *pf = vsi->back;
4813 /* Check if DCB enabled to continue */
4814 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4815 netdev_info(netdev, "DCB is not enabled for adapter\n");
4819 /* Check if MFP enabled */
4820 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4821 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4825 /* Check whether tc count is within enabled limit */
4826 if (tc > i40e_pf_get_num_tc(pf)) {
4827 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4831 /* Generate TC map for number of tc requested */
4832 for (i = 0; i < tc; i++)
4833 enabled_tc |= (1 << i);
4835 /* Requesting same TC configuration as already enabled */
4836 if (enabled_tc == vsi->tc_config.enabled_tc)
4839 /* Quiesce VSI queues */
4840 i40e_quiesce_vsi(vsi);
4842 /* Configure VSI for enabled TCs */
4843 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4845 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4851 i40e_unquiesce_vsi(vsi);
4858 * i40e_open - Called when a network interface is made active
4859 * @netdev: network interface device structure
4861 * The open entry point is called when a network interface is made
4862 * active by the system (IFF_UP). At this point all resources needed
4863 * for transmit and receive operations are allocated, the interrupt
4864 * handler is registered with the OS, the netdev watchdog subtask is
4865 * enabled, and the stack is notified that the interface is ready.
4867 * Returns 0 on success, negative value on failure
4869 int i40e_open(struct net_device *netdev)
4871 struct i40e_netdev_priv *np = netdev_priv(netdev);
4872 struct i40e_vsi *vsi = np->vsi;
4873 struct i40e_pf *pf = vsi->back;
4876 /* disallow open during test or if eeprom is broken */
4877 if (test_bit(__I40E_TESTING, &pf->state) ||
4878 test_bit(__I40E_BAD_EEPROM, &pf->state))
4881 netif_carrier_off(netdev);
4883 err = i40e_vsi_open(vsi);
4887 /* configure global TSO hardware offload settings */
4888 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4889 TCP_FLAG_FIN) >> 16);
4890 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4892 TCP_FLAG_CWR) >> 16);
4893 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4895 #ifdef CONFIG_I40E_VXLAN
4896 vxlan_get_rx_port(netdev);
4904 * @vsi: the VSI to open
4906 * Finish initialization of the VSI.
4908 * Returns 0 on success, negative value on failure
4910 int i40e_vsi_open(struct i40e_vsi *vsi)
4912 struct i40e_pf *pf = vsi->back;
4913 char int_name[I40E_INT_NAME_STR_LEN];
4916 /* allocate descriptors */
4917 err = i40e_vsi_setup_tx_resources(vsi);
4920 err = i40e_vsi_setup_rx_resources(vsi);
4924 err = i40e_vsi_configure(vsi);
4929 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4930 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4931 err = i40e_vsi_request_irq(vsi, int_name);
4935 /* Notify the stack of the actual queue counts. */
4936 err = netif_set_real_num_tx_queues(vsi->netdev,
4937 vsi->num_queue_pairs);
4939 goto err_set_queues;
4941 err = netif_set_real_num_rx_queues(vsi->netdev,
4942 vsi->num_queue_pairs);
4944 goto err_set_queues;
4946 } else if (vsi->type == I40E_VSI_FDIR) {
4947 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
4948 dev_driver_string(&pf->pdev->dev),
4949 dev_name(&pf->pdev->dev));
4950 err = i40e_vsi_request_irq(vsi, int_name);
4957 err = i40e_up_complete(vsi);
4959 goto err_up_complete;
4966 i40e_vsi_free_irq(vsi);
4968 i40e_vsi_free_rx_resources(vsi);
4970 i40e_vsi_free_tx_resources(vsi);
4971 if (vsi == pf->vsi[pf->lan_vsi])
4972 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4978 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4979 * @pf: Pointer to pf
4981 * This function destroys the hlist where all the Flow Director
4982 * filters were saved.
4984 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4986 struct i40e_fdir_filter *filter;
4987 struct hlist_node *node2;
4989 hlist_for_each_entry_safe(filter, node2,
4990 &pf->fdir_filter_list, fdir_node) {
4991 hlist_del(&filter->fdir_node);
4994 pf->fdir_pf_active_filters = 0;
4998 * i40e_close - Disables a network interface
4999 * @netdev: network interface device structure
5001 * The close entry point is called when an interface is de-activated
5002 * by the OS. The hardware is still under the driver's control, but
5003 * this netdev interface is disabled.
5005 * Returns 0, this is not allowed to fail
5008 int i40e_close(struct net_device *netdev)
5010 static int i40e_close(struct net_device *netdev)
5013 struct i40e_netdev_priv *np = netdev_priv(netdev);
5014 struct i40e_vsi *vsi = np->vsi;
5016 i40e_vsi_close(vsi);
5022 * i40e_do_reset - Start a PF or Core Reset sequence
5023 * @pf: board private structure
5024 * @reset_flags: which reset is requested
5026 * The essential difference in resets is that the PF Reset
5027 * doesn't clear the packet buffers, doesn't reset the PE
5028 * firmware, and doesn't bother the other PFs on the chip.
5030 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5034 WARN_ON(in_interrupt());
5036 if (i40e_check_asq_alive(&pf->hw))
5037 i40e_vc_notify_reset(pf);
5039 /* do the biggest reset indicated */
5040 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
5042 /* Request a Global Reset
5044 * This will start the chip's countdown to the actual full
5045 * chip reset event, and a warning interrupt to be sent
5046 * to all PFs, including the requestor. Our handler
5047 * for the warning interrupt will deal with the shutdown
5048 * and recovery of the switch setup.
5050 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5051 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5052 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5053 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5055 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
5057 /* Request a Core Reset
5059 * Same as Global Reset, except does *not* include the MAC/PHY
5061 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5062 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5063 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5064 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5065 i40e_flush(&pf->hw);
5067 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
5069 /* Request a PF Reset
5071 * Resets only the PF-specific registers
5073 * This goes directly to the tear-down and rebuild of
5074 * the switch, since we need to do all the recovery as
5075 * for the Core Reset.
5077 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5078 i40e_handle_reset_warning(pf);
5080 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
5083 /* Find the VSI(s) that requested a re-init */
5084 dev_info(&pf->pdev->dev,
5085 "VSI reinit requested\n");
5086 for (v = 0; v < pf->num_alloc_vsi; v++) {
5087 struct i40e_vsi *vsi = pf->vsi[v];
5089 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5090 i40e_vsi_reinit_locked(pf->vsi[v]);
5091 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5095 /* no further action needed, so return now */
5097 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
5100 /* Find the VSI(s) that needs to be brought down */
5101 dev_info(&pf->pdev->dev, "VSI down requested\n");
5102 for (v = 0; v < pf->num_alloc_vsi; v++) {
5103 struct i40e_vsi *vsi = pf->vsi[v];
5105 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5106 set_bit(__I40E_DOWN, &vsi->state);
5108 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5112 /* no further action needed, so return now */
5115 dev_info(&pf->pdev->dev,
5116 "bad reset request 0x%08x\n", reset_flags);
5121 #ifdef CONFIG_I40E_DCB
5123 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5124 * @pf: board private structure
5125 * @old_cfg: current DCB config
5126 * @new_cfg: new DCB config
5128 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5129 struct i40e_dcbx_config *old_cfg,
5130 struct i40e_dcbx_config *new_cfg)
5132 bool need_reconfig = false;
5134 /* Check if ETS configuration has changed */
5135 if (memcmp(&new_cfg->etscfg,
5137 sizeof(new_cfg->etscfg))) {
5138 /* If Priority Table has changed reconfig is needed */
5139 if (memcmp(&new_cfg->etscfg.prioritytable,
5140 &old_cfg->etscfg.prioritytable,
5141 sizeof(new_cfg->etscfg.prioritytable))) {
5142 need_reconfig = true;
5143 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5146 if (memcmp(&new_cfg->etscfg.tcbwtable,
5147 &old_cfg->etscfg.tcbwtable,
5148 sizeof(new_cfg->etscfg.tcbwtable)))
5149 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5151 if (memcmp(&new_cfg->etscfg.tsatable,
5152 &old_cfg->etscfg.tsatable,
5153 sizeof(new_cfg->etscfg.tsatable)))
5154 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5157 /* Check if PFC configuration has changed */
5158 if (memcmp(&new_cfg->pfc,
5160 sizeof(new_cfg->pfc))) {
5161 need_reconfig = true;
5162 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5165 /* Check if APP Table has changed */
5166 if (memcmp(&new_cfg->app,
5168 sizeof(new_cfg->app))) {
5169 need_reconfig = true;
5170 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5173 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5175 return need_reconfig;
5179 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5180 * @pf: board private structure
5181 * @e: event info posted on ARQ
5183 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5184 struct i40e_arq_event_info *e)
5186 struct i40e_aqc_lldp_get_mib *mib =
5187 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5188 struct i40e_hw *hw = &pf->hw;
5189 struct i40e_dcbx_config tmp_dcbx_cfg;
5190 bool need_reconfig = false;
5194 /* Not DCB capable or capability disabled */
5195 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5198 /* Ignore if event is not for Nearest Bridge */
5199 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5200 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5201 dev_dbg(&pf->pdev->dev,
5202 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5203 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5206 /* Check MIB Type and return if event for Remote MIB update */
5207 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5208 dev_dbg(&pf->pdev->dev,
5209 "%s: LLDP event mib type %s\n", __func__,
5210 type ? "remote" : "local");
5211 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5212 /* Update the remote cached instance and return */
5213 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5214 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5215 &hw->remote_dcbx_config);
5219 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5220 /* Store the old configuration */
5221 memcpy(&tmp_dcbx_cfg, &hw->local_dcbx_config, sizeof(tmp_dcbx_cfg));
5223 /* Reset the old DCBx configuration data */
5224 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5225 /* Get updated DCBX data from firmware */
5226 ret = i40e_get_dcb_config(&pf->hw);
5228 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n");
5232 /* No change detected in DCBX configs */
5233 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5234 sizeof(tmp_dcbx_cfg))) {
5235 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5239 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5240 &hw->local_dcbx_config);
5242 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5247 /* Enable DCB tagging only when more than one TC */
5248 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5249 pf->flags |= I40E_FLAG_DCB_ENABLED;
5251 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5253 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5254 /* Reconfiguration needed quiesce all VSIs */
5255 i40e_pf_quiesce_all_vsi(pf);
5257 /* Changes in configuration update VEB/VSI */
5258 i40e_dcb_reconfigure(pf);
5260 ret = i40e_resume_port_tx(pf);
5262 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5263 /* In case of error no point in resuming VSIs */
5267 /* Wait for the PF's Tx queues to be disabled */
5268 ret = i40e_pf_wait_txq_disabled(pf);
5270 /* Schedule PF reset to recover */
5271 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5272 i40e_service_event_schedule(pf);
5274 i40e_pf_unquiesce_all_vsi(pf);
5280 #endif /* CONFIG_I40E_DCB */
5283 * i40e_do_reset_safe - Protected reset path for userland calls.
5284 * @pf: board private structure
5285 * @reset_flags: which reset is requested
5288 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5291 i40e_do_reset(pf, reset_flags);
5296 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5297 * @pf: board private structure
5298 * @e: event info posted on ARQ
5300 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5303 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5304 struct i40e_arq_event_info *e)
5306 struct i40e_aqc_lan_overflow *data =
5307 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5308 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5309 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5310 struct i40e_hw *hw = &pf->hw;
5314 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5317 /* Queue belongs to VF, find the VF and issue VF reset */
5318 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5319 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5320 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5321 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5322 vf_id -= hw->func_caps.vf_base_id;
5323 vf = &pf->vf[vf_id];
5324 i40e_vc_notify_vf_reset(vf);
5325 /* Allow VF to process pending reset notification */
5327 i40e_reset_vf(vf, false);
5332 * i40e_service_event_complete - Finish up the service event
5333 * @pf: board private structure
5335 static void i40e_service_event_complete(struct i40e_pf *pf)
5337 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5339 /* flush memory to make sure state is correct before next watchog */
5340 smp_mb__before_atomic();
5341 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5345 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5346 * @pf: board private structure
5348 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5352 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5353 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5358 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5359 * @pf: board private structure
5361 int i40e_get_current_fd_count(struct i40e_pf *pf)
5364 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5365 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5366 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5367 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5372 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5373 * @pf: board private structure
5375 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5377 u32 fcnt_prog, fcnt_avail;
5379 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5382 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5385 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5386 fcnt_avail = pf->fdir_pf_filter_count;
5387 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5388 (pf->fd_add_err == 0) ||
5389 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5390 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5391 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5392 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5393 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5396 /* Wait for some more space to be available to turn on ATR */
5397 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5398 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5399 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5400 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5401 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5406 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5408 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5409 * @pf: board private structure
5411 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5413 int flush_wait_retry = 50;
5416 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5419 if (time_after(jiffies, pf->fd_flush_timestamp +
5420 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5421 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5422 pf->fd_flush_timestamp = jiffies;
5423 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5424 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5425 /* flush all filters */
5426 wr32(&pf->hw, I40E_PFQF_CTL_1,
5427 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5428 i40e_flush(&pf->hw);
5432 /* Check FD flush status every 5-6msec */
5433 usleep_range(5000, 6000);
5434 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5435 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5437 } while (flush_wait_retry--);
5438 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5439 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5441 /* replay sideband filters */
5442 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5444 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5445 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5446 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5447 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5448 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5454 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5455 * @pf: board private structure
5457 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5459 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5462 /* We can see up to 256 filter programming desc in transit if the filters are
5463 * being applied really fast; before we see the first
5464 * filter miss error on Rx queue 0. Accumulating enough error messages before
5465 * reacting will make sure we don't cause flush too often.
5467 #define I40E_MAX_FD_PROGRAM_ERROR 256
5470 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5471 * @pf: board private structure
5473 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5476 /* if interface is down do nothing */
5477 if (test_bit(__I40E_DOWN, &pf->state))
5480 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5483 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5484 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5485 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5486 i40e_fdir_flush_and_replay(pf);
5488 i40e_fdir_check_and_reenable(pf);
5493 * i40e_vsi_link_event - notify VSI of a link event
5494 * @vsi: vsi to be notified
5495 * @link_up: link up or down
5497 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5499 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5502 switch (vsi->type) {
5507 if (!vsi->netdev || !vsi->netdev_registered)
5511 netif_carrier_on(vsi->netdev);
5512 netif_tx_wake_all_queues(vsi->netdev);
5514 netif_carrier_off(vsi->netdev);
5515 netif_tx_stop_all_queues(vsi->netdev);
5519 case I40E_VSI_SRIOV:
5520 case I40E_VSI_VMDQ2:
5522 case I40E_VSI_MIRROR:
5524 /* there is no notification for other VSIs */
5530 * i40e_veb_link_event - notify elements on the veb of a link event
5531 * @veb: veb to be notified
5532 * @link_up: link up or down
5534 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5539 if (!veb || !veb->pf)
5543 /* depth first... */
5544 for (i = 0; i < I40E_MAX_VEB; i++)
5545 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5546 i40e_veb_link_event(pf->veb[i], link_up);
5548 /* ... now the local VSIs */
5549 for (i = 0; i < pf->num_alloc_vsi; i++)
5550 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5551 i40e_vsi_link_event(pf->vsi[i], link_up);
5555 * i40e_link_event - Update netif_carrier status
5556 * @pf: board private structure
5558 static void i40e_link_event(struct i40e_pf *pf)
5560 bool new_link, old_link;
5561 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5562 u8 new_link_speed, old_link_speed;
5564 /* set this to force the get_link_status call to refresh state */
5565 pf->hw.phy.get_link_info = true;
5567 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5568 new_link = i40e_get_link_status(&pf->hw);
5569 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5570 new_link_speed = pf->hw.phy.link_info.link_speed;
5572 if (new_link == old_link &&
5573 new_link_speed == old_link_speed &&
5574 (test_bit(__I40E_DOWN, &vsi->state) ||
5575 new_link == netif_carrier_ok(vsi->netdev)))
5578 if (!test_bit(__I40E_DOWN, &vsi->state))
5579 i40e_print_link_message(vsi, new_link);
5581 /* Notify the base of the switch tree connected to
5582 * the link. Floating VEBs are not notified.
5584 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5585 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5587 i40e_vsi_link_event(vsi, new_link);
5590 i40e_vc_notify_link_state(pf);
5592 if (pf->flags & I40E_FLAG_PTP)
5593 i40e_ptp_set_increment(pf);
5597 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5598 * @pf: board private structure
5600 * Set the per-queue flags to request a check for stuck queues in the irq
5601 * clean functions, then force interrupts to be sure the irq clean is called.
5603 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5607 /* If we're down or resetting, just bail */
5608 if (test_bit(__I40E_DOWN, &pf->state) ||
5609 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5612 /* for each VSI/netdev
5614 * set the check flag
5616 * force an interrupt
5618 for (v = 0; v < pf->num_alloc_vsi; v++) {
5619 struct i40e_vsi *vsi = pf->vsi[v];
5623 test_bit(__I40E_DOWN, &vsi->state) ||
5624 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5627 for (i = 0; i < vsi->num_queue_pairs; i++) {
5628 set_check_for_tx_hang(vsi->tx_rings[i]);
5629 if (test_bit(__I40E_HANG_CHECK_ARMED,
5630 &vsi->tx_rings[i]->state))
5635 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5636 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5637 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5638 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5639 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5640 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5641 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5643 u16 vec = vsi->base_vector - 1;
5644 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5645 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5646 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5647 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5648 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5649 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5650 wr32(&vsi->back->hw,
5651 I40E_PFINT_DYN_CTLN(vec), val);
5653 i40e_flush(&vsi->back->hw);
5659 * i40e_watchdog_subtask - periodic checks not using event driven response
5660 * @pf: board private structure
5662 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5666 /* if interface is down do nothing */
5667 if (test_bit(__I40E_DOWN, &pf->state) ||
5668 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5671 /* make sure we don't do these things too often */
5672 if (time_before(jiffies, (pf->service_timer_previous +
5673 pf->service_timer_period)))
5675 pf->service_timer_previous = jiffies;
5677 i40e_check_hang_subtask(pf);
5678 i40e_link_event(pf);
5680 /* Update the stats for active netdevs so the network stack
5681 * can look at updated numbers whenever it cares to
5683 for (i = 0; i < pf->num_alloc_vsi; i++)
5684 if (pf->vsi[i] && pf->vsi[i]->netdev)
5685 i40e_update_stats(pf->vsi[i]);
5687 /* Update the stats for the active switching components */
5688 for (i = 0; i < I40E_MAX_VEB; i++)
5690 i40e_update_veb_stats(pf->veb[i]);
5692 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5696 * i40e_reset_subtask - Set up for resetting the device and driver
5697 * @pf: board private structure
5699 static void i40e_reset_subtask(struct i40e_pf *pf)
5701 u32 reset_flags = 0;
5704 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5705 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5706 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5708 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5709 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5710 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5712 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5713 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5714 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5716 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5717 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5718 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5720 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5721 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5722 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5725 /* If there's a recovery already waiting, it takes
5726 * precedence before starting a new reset sequence.
5728 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5729 i40e_handle_reset_warning(pf);
5733 /* If we're already down or resetting, just bail */
5735 !test_bit(__I40E_DOWN, &pf->state) &&
5736 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5737 i40e_do_reset(pf, reset_flags);
5744 * i40e_handle_link_event - Handle link event
5745 * @pf: board private structure
5746 * @e: event info posted on ARQ
5748 static void i40e_handle_link_event(struct i40e_pf *pf,
5749 struct i40e_arq_event_info *e)
5751 struct i40e_hw *hw = &pf->hw;
5752 struct i40e_aqc_get_link_status *status =
5753 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5754 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5756 /* save off old link status information */
5757 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5758 sizeof(pf->hw.phy.link_info_old));
5760 /* Do a new status request to re-enable LSE reporting
5761 * and load new status information into the hw struct
5762 * This completely ignores any state information
5763 * in the ARQ event info, instead choosing to always
5764 * issue the AQ update link status command.
5766 i40e_link_event(pf);
5768 /* check for unqualified module, if link is down */
5769 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5770 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5771 (!(status->link_info & I40E_AQ_LINK_UP)))
5772 dev_err(&pf->pdev->dev,
5773 "The driver failed to link because an unqualified module was detected.\n");
5777 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5778 * @pf: board private structure
5780 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5782 struct i40e_arq_event_info event;
5783 struct i40e_hw *hw = &pf->hw;
5790 /* Do not run clean AQ when PF reset fails */
5791 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5794 /* check for error indications */
5795 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5797 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5798 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5799 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5801 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5802 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5803 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5805 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5806 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5807 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5810 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5812 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5814 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5815 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5816 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5818 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5819 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5820 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5822 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5823 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5824 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5827 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5829 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5830 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5835 ret = i40e_clean_arq_element(hw, &event, &pending);
5836 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5839 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5843 opcode = le16_to_cpu(event.desc.opcode);
5846 case i40e_aqc_opc_get_link_status:
5847 i40e_handle_link_event(pf, &event);
5849 case i40e_aqc_opc_send_msg_to_pf:
5850 ret = i40e_vc_process_vf_msg(pf,
5851 le16_to_cpu(event.desc.retval),
5852 le32_to_cpu(event.desc.cookie_high),
5853 le32_to_cpu(event.desc.cookie_low),
5857 case i40e_aqc_opc_lldp_update_mib:
5858 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5859 #ifdef CONFIG_I40E_DCB
5861 ret = i40e_handle_lldp_event(pf, &event);
5863 #endif /* CONFIG_I40E_DCB */
5865 case i40e_aqc_opc_event_lan_overflow:
5866 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5867 i40e_handle_lan_overflow_event(pf, &event);
5869 case i40e_aqc_opc_send_msg_to_peer:
5870 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5873 dev_info(&pf->pdev->dev,
5874 "ARQ Error: Unknown event 0x%04x received\n",
5878 } while (pending && (i++ < pf->adminq_work_limit));
5880 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5881 /* re-enable Admin queue interrupt cause */
5882 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5883 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5884 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5887 kfree(event.msg_buf);
5891 * i40e_verify_eeprom - make sure eeprom is good to use
5892 * @pf: board private structure
5894 static void i40e_verify_eeprom(struct i40e_pf *pf)
5898 err = i40e_diag_eeprom_test(&pf->hw);
5900 /* retry in case of garbage read */
5901 err = i40e_diag_eeprom_test(&pf->hw);
5903 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5905 set_bit(__I40E_BAD_EEPROM, &pf->state);
5909 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5910 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5911 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5916 * i40e_config_bridge_mode - Configure the HW bridge mode
5917 * @veb: pointer to the bridge instance
5919 * Configure the loop back mode for the LAN VSI that is downlink to the
5920 * specified HW bridge instance. It is expected this function is called
5921 * when a new HW bridge is instantiated.
5923 static void i40e_config_bridge_mode(struct i40e_veb *veb)
5925 struct i40e_pf *pf = veb->pf;
5927 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
5928 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
5929 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
5930 i40e_disable_pf_switch_lb(pf);
5932 i40e_enable_pf_switch_lb(pf);
5936 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5937 * @veb: pointer to the VEB instance
5939 * This is a recursive function that first builds the attached VSIs then
5940 * recurses in to build the next layer of VEB. We track the connections
5941 * through our own index numbers because the seid's from the HW could
5942 * change across the reset.
5944 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5946 struct i40e_vsi *ctl_vsi = NULL;
5947 struct i40e_pf *pf = veb->pf;
5951 /* build VSI that owns this VEB, temporarily attached to base VEB */
5952 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5954 pf->vsi[v]->veb_idx == veb->idx &&
5955 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5956 ctl_vsi = pf->vsi[v];
5961 dev_info(&pf->pdev->dev,
5962 "missing owner VSI for veb_idx %d\n", veb->idx);
5964 goto end_reconstitute;
5966 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5967 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5968 ret = i40e_add_vsi(ctl_vsi);
5970 dev_info(&pf->pdev->dev,
5971 "rebuild of owner VSI failed: %d\n", ret);
5972 goto end_reconstitute;
5974 i40e_vsi_reset_stats(ctl_vsi);
5976 /* create the VEB in the switch and move the VSI onto the VEB */
5977 ret = i40e_add_veb(veb, ctl_vsi);
5979 goto end_reconstitute;
5981 i40e_config_bridge_mode(veb);
5983 /* create the remaining VSIs attached to this VEB */
5984 for (v = 0; v < pf->num_alloc_vsi; v++) {
5985 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5988 if (pf->vsi[v]->veb_idx == veb->idx) {
5989 struct i40e_vsi *vsi = pf->vsi[v];
5990 vsi->uplink_seid = veb->seid;
5991 ret = i40e_add_vsi(vsi);
5993 dev_info(&pf->pdev->dev,
5994 "rebuild of vsi_idx %d failed: %d\n",
5996 goto end_reconstitute;
5998 i40e_vsi_reset_stats(vsi);
6002 /* create any VEBs attached to this VEB - RECURSION */
6003 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6004 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6005 pf->veb[veb_idx]->uplink_seid = veb->seid;
6006 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6017 * i40e_get_capabilities - get info about the HW
6018 * @pf: the PF struct
6020 static int i40e_get_capabilities(struct i40e_pf *pf)
6022 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6027 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6029 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6033 /* this loads the data into the hw struct for us */
6034 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6036 i40e_aqc_opc_list_func_capabilities,
6038 /* data loaded, buffer no longer needed */
6041 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6042 /* retry with a larger buffer */
6043 buf_len = data_size;
6044 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6045 dev_info(&pf->pdev->dev,
6046 "capability discovery failed: aq=%d\n",
6047 pf->hw.aq.asq_last_status);
6052 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6053 (pf->hw.aq.fw_maj_ver < 2)) {
6054 pf->hw.func_caps.num_msix_vectors++;
6055 pf->hw.func_caps.num_msix_vectors_vf++;
6058 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6059 dev_info(&pf->pdev->dev,
6060 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6061 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6062 pf->hw.func_caps.num_msix_vectors,
6063 pf->hw.func_caps.num_msix_vectors_vf,
6064 pf->hw.func_caps.fd_filters_guaranteed,
6065 pf->hw.func_caps.fd_filters_best_effort,
6066 pf->hw.func_caps.num_tx_qp,
6067 pf->hw.func_caps.num_vsis);
6069 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6070 + pf->hw.func_caps.num_vfs)
6071 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6072 dev_info(&pf->pdev->dev,
6073 "got num_vsis %d, setting num_vsis to %d\n",
6074 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6075 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6081 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6084 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6085 * @pf: board private structure
6087 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6089 struct i40e_vsi *vsi;
6092 /* quick workaround for an NVM issue that leaves a critical register
6095 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6096 static const u32 hkey[] = {
6097 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6098 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6099 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6102 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6103 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6106 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6109 /* find existing VSI and see if it needs configuring */
6111 for (i = 0; i < pf->num_alloc_vsi; i++) {
6112 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6118 /* create a new VSI if none exists */
6120 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6121 pf->vsi[pf->lan_vsi]->seid, 0);
6123 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6124 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6129 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6133 * i40e_fdir_teardown - release the Flow Director resources
6134 * @pf: board private structure
6136 static void i40e_fdir_teardown(struct i40e_pf *pf)
6140 i40e_fdir_filter_exit(pf);
6141 for (i = 0; i < pf->num_alloc_vsi; i++) {
6142 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6143 i40e_vsi_release(pf->vsi[i]);
6150 * i40e_prep_for_reset - prep for the core to reset
6151 * @pf: board private structure
6153 * Close up the VFs and other things in prep for pf Reset.
6155 static void i40e_prep_for_reset(struct i40e_pf *pf)
6157 struct i40e_hw *hw = &pf->hw;
6158 i40e_status ret = 0;
6161 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6162 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6165 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6167 /* quiesce the VSIs and their queues that are not already DOWN */
6168 i40e_pf_quiesce_all_vsi(pf);
6170 for (v = 0; v < pf->num_alloc_vsi; v++) {
6172 pf->vsi[v]->seid = 0;
6175 i40e_shutdown_adminq(&pf->hw);
6177 /* call shutdown HMC */
6178 if (hw->hmc.hmc_obj) {
6179 ret = i40e_shutdown_lan_hmc(hw);
6181 dev_warn(&pf->pdev->dev,
6182 "shutdown_lan_hmc failed: %d\n", ret);
6187 * i40e_send_version - update firmware with driver version
6190 static void i40e_send_version(struct i40e_pf *pf)
6192 struct i40e_driver_version dv;
6194 dv.major_version = DRV_VERSION_MAJOR;
6195 dv.minor_version = DRV_VERSION_MINOR;
6196 dv.build_version = DRV_VERSION_BUILD;
6197 dv.subbuild_version = 0;
6198 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6199 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6203 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6204 * @pf: board private structure
6205 * @reinit: if the Main VSI needs to re-initialized.
6207 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6209 struct i40e_hw *hw = &pf->hw;
6210 u8 set_fc_aq_fail = 0;
6214 /* Now we wait for GRST to settle out.
6215 * We don't have to delete the VEBs or VSIs from the hw switch
6216 * because the reset will make them disappear.
6218 ret = i40e_pf_reset(hw);
6220 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6221 set_bit(__I40E_RESET_FAILED, &pf->state);
6222 goto clear_recovery;
6226 if (test_bit(__I40E_DOWN, &pf->state))
6227 goto clear_recovery;
6228 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6230 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6231 ret = i40e_init_adminq(&pf->hw);
6233 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6234 goto clear_recovery;
6237 /* re-verify the eeprom if we just had an EMP reset */
6238 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6239 i40e_verify_eeprom(pf);
6241 i40e_clear_pxe_mode(hw);
6242 ret = i40e_get_capabilities(pf);
6244 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6246 goto end_core_reset;
6249 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6250 hw->func_caps.num_rx_qp,
6251 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6253 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6254 goto end_core_reset;
6256 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6258 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6259 goto end_core_reset;
6262 #ifdef CONFIG_I40E_DCB
6263 ret = i40e_init_pf_dcb(pf);
6265 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6266 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6267 /* Continue without DCB enabled */
6269 #endif /* CONFIG_I40E_DCB */
6271 ret = i40e_init_pf_fcoe(pf);
6273 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6276 /* do basic switch setup */
6277 ret = i40e_setup_pf_switch(pf, reinit);
6279 goto end_core_reset;
6281 /* driver is only interested in link up/down and module qualification
6282 * reports from firmware
6284 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6285 I40E_AQ_EVENT_LINK_UPDOWN |
6286 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6288 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6290 /* make sure our flow control settings are restored */
6291 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6293 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6295 /* Rebuild the VSIs and VEBs that existed before reset.
6296 * They are still in our local switch element arrays, so only
6297 * need to rebuild the switch model in the HW.
6299 * If there were VEBs but the reconstitution failed, we'll try
6300 * try to recover minimal use by getting the basic PF VSI working.
6302 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6303 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6304 /* find the one VEB connected to the MAC, and find orphans */
6305 for (v = 0; v < I40E_MAX_VEB; v++) {
6309 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6310 pf->veb[v]->uplink_seid == 0) {
6311 ret = i40e_reconstitute_veb(pf->veb[v]);
6316 /* If Main VEB failed, we're in deep doodoo,
6317 * so give up rebuilding the switch and set up
6318 * for minimal rebuild of PF VSI.
6319 * If orphan failed, we'll report the error
6320 * but try to keep going.
6322 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6323 dev_info(&pf->pdev->dev,
6324 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6326 pf->vsi[pf->lan_vsi]->uplink_seid
6329 } else if (pf->veb[v]->uplink_seid == 0) {
6330 dev_info(&pf->pdev->dev,
6331 "rebuild of orphan VEB failed: %d\n",
6338 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6339 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6340 /* no VEB, so rebuild only the Main VSI */
6341 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6343 dev_info(&pf->pdev->dev,
6344 "rebuild of Main VSI failed: %d\n", ret);
6345 goto end_core_reset;
6349 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6350 (pf->hw.aq.fw_maj_ver < 4)) {
6352 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6354 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6355 pf->hw.aq.asq_last_status);
6357 /* reinit the misc interrupt */
6358 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6359 ret = i40e_setup_misc_vector(pf);
6361 /* restart the VSIs that were rebuilt and running before the reset */
6362 i40e_pf_unquiesce_all_vsi(pf);
6364 if (pf->num_alloc_vfs) {
6365 for (v = 0; v < pf->num_alloc_vfs; v++)
6366 i40e_reset_vf(&pf->vf[v], true);
6369 /* tell the firmware that we're starting */
6370 i40e_send_version(pf);
6373 clear_bit(__I40E_RESET_FAILED, &pf->state);
6375 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6379 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6380 * @pf: board private structure
6382 * Close up the VFs and other things in prep for a Core Reset,
6383 * then get ready to rebuild the world.
6385 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6387 i40e_prep_for_reset(pf);
6388 i40e_reset_and_rebuild(pf, false);
6392 * i40e_handle_mdd_event
6393 * @pf: pointer to the pf structure
6395 * Called from the MDD irq handler to identify possibly malicious vfs
6397 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6399 struct i40e_hw *hw = &pf->hw;
6400 bool mdd_detected = false;
6401 bool pf_mdd_detected = false;
6406 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6409 /* find what triggered the MDD event */
6410 reg = rd32(hw, I40E_GL_MDET_TX);
6411 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6412 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6413 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6414 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6415 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6416 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6417 I40E_GL_MDET_TX_EVENT_SHIFT;
6418 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6419 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6420 pf->hw.func_caps.base_queue;
6421 if (netif_msg_tx_err(pf))
6422 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6423 event, queue, pf_num, vf_num);
6424 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6425 mdd_detected = true;
6427 reg = rd32(hw, I40E_GL_MDET_RX);
6428 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6429 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6430 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6431 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6432 I40E_GL_MDET_RX_EVENT_SHIFT;
6433 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6434 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6435 pf->hw.func_caps.base_queue;
6436 if (netif_msg_rx_err(pf))
6437 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6438 event, queue, func);
6439 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6440 mdd_detected = true;
6444 reg = rd32(hw, I40E_PF_MDET_TX);
6445 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6446 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6447 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6448 pf_mdd_detected = true;
6450 reg = rd32(hw, I40E_PF_MDET_RX);
6451 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6452 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6453 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6454 pf_mdd_detected = true;
6456 /* Queue belongs to the PF, initiate a reset */
6457 if (pf_mdd_detected) {
6458 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6459 i40e_service_event_schedule(pf);
6463 /* see if one of the VFs needs its hand slapped */
6464 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6466 reg = rd32(hw, I40E_VP_MDET_TX(i));
6467 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6468 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6469 vf->num_mdd_events++;
6470 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6474 reg = rd32(hw, I40E_VP_MDET_RX(i));
6475 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6476 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6477 vf->num_mdd_events++;
6478 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6482 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6483 dev_info(&pf->pdev->dev,
6484 "Too many MDD events on VF %d, disabled\n", i);
6485 dev_info(&pf->pdev->dev,
6486 "Use PF Control I/F to re-enable the VF\n");
6487 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6491 /* re-enable mdd interrupt cause */
6492 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6493 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6494 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6495 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6499 #ifdef CONFIG_I40E_VXLAN
6501 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6502 * @pf: board private structure
6504 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6506 struct i40e_hw *hw = &pf->hw;
6512 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6515 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6517 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6518 if (pf->pending_vxlan_bitmap & (1 << i)) {
6519 pf->pending_vxlan_bitmap &= ~(1 << i);
6520 port = pf->vxlan_ports[i];
6522 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6523 I40E_AQC_TUNNEL_TYPE_VXLAN,
6524 &filter_index, NULL)
6525 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6528 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6529 port ? "adding" : "deleting",
6530 ntohs(port), port ? i : i);
6532 pf->vxlan_ports[i] = 0;
6534 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6535 port ? "Added" : "Deleted",
6536 ntohs(port), port ? i : filter_index);
6544 * i40e_service_task - Run the driver's async subtasks
6545 * @work: pointer to work_struct containing our data
6547 static void i40e_service_task(struct work_struct *work)
6549 struct i40e_pf *pf = container_of(work,
6552 unsigned long start_time = jiffies;
6554 /* don't bother with service tasks if a reset is in progress */
6555 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6556 i40e_service_event_complete(pf);
6560 i40e_reset_subtask(pf);
6561 i40e_handle_mdd_event(pf);
6562 i40e_vc_process_vflr_event(pf);
6563 i40e_watchdog_subtask(pf);
6564 i40e_fdir_reinit_subtask(pf);
6565 i40e_sync_filters_subtask(pf);
6566 #ifdef CONFIG_I40E_VXLAN
6567 i40e_sync_vxlan_filters_subtask(pf);
6569 i40e_clean_adminq_subtask(pf);
6571 i40e_service_event_complete(pf);
6573 /* If the tasks have taken longer than one timer cycle or there
6574 * is more work to be done, reschedule the service task now
6575 * rather than wait for the timer to tick again.
6577 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6578 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6579 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6580 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6581 i40e_service_event_schedule(pf);
6585 * i40e_service_timer - timer callback
6586 * @data: pointer to PF struct
6588 static void i40e_service_timer(unsigned long data)
6590 struct i40e_pf *pf = (struct i40e_pf *)data;
6592 mod_timer(&pf->service_timer,
6593 round_jiffies(jiffies + pf->service_timer_period));
6594 i40e_service_event_schedule(pf);
6598 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6599 * @vsi: the VSI being configured
6601 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6603 struct i40e_pf *pf = vsi->back;
6605 switch (vsi->type) {
6607 vsi->alloc_queue_pairs = pf->num_lan_qps;
6608 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6609 I40E_REQ_DESCRIPTOR_MULTIPLE);
6610 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6611 vsi->num_q_vectors = pf->num_lan_msix;
6613 vsi->num_q_vectors = 1;
6618 vsi->alloc_queue_pairs = 1;
6619 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6620 I40E_REQ_DESCRIPTOR_MULTIPLE);
6621 vsi->num_q_vectors = 1;
6624 case I40E_VSI_VMDQ2:
6625 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6626 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6627 I40E_REQ_DESCRIPTOR_MULTIPLE);
6628 vsi->num_q_vectors = pf->num_vmdq_msix;
6631 case I40E_VSI_SRIOV:
6632 vsi->alloc_queue_pairs = pf->num_vf_qps;
6633 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6634 I40E_REQ_DESCRIPTOR_MULTIPLE);
6639 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6640 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6641 I40E_REQ_DESCRIPTOR_MULTIPLE);
6642 vsi->num_q_vectors = pf->num_fcoe_msix;
6645 #endif /* I40E_FCOE */
6655 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6656 * @type: VSI pointer
6657 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6659 * On error: returns error code (negative)
6660 * On success: returns 0
6662 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6667 /* allocate memory for both Tx and Rx ring pointers */
6668 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6669 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6672 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6674 if (alloc_qvectors) {
6675 /* allocate memory for q_vector pointers */
6676 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6677 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6678 if (!vsi->q_vectors) {
6686 kfree(vsi->tx_rings);
6691 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6692 * @pf: board private structure
6693 * @type: type of VSI
6695 * On error: returns error code (negative)
6696 * On success: returns vsi index in PF (positive)
6698 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6701 struct i40e_vsi *vsi;
6705 /* Need to protect the allocation of the VSIs at the PF level */
6706 mutex_lock(&pf->switch_mutex);
6708 /* VSI list may be fragmented if VSI creation/destruction has
6709 * been happening. We can afford to do a quick scan to look
6710 * for any free VSIs in the list.
6712 * find next empty vsi slot, looping back around if necessary
6715 while (i < pf->num_alloc_vsi && pf->vsi[i])
6717 if (i >= pf->num_alloc_vsi) {
6719 while (i < pf->next_vsi && pf->vsi[i])
6723 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6724 vsi_idx = i; /* Found one! */
6727 goto unlock_pf; /* out of VSI slots! */
6731 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6738 set_bit(__I40E_DOWN, &vsi->state);
6741 vsi->rx_itr_setting = pf->rx_itr_default;
6742 vsi->tx_itr_setting = pf->tx_itr_default;
6743 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6744 pf->rss_table_size : 64;
6745 vsi->netdev_registered = false;
6746 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6747 INIT_LIST_HEAD(&vsi->mac_filter_list);
6748 vsi->irqs_ready = false;
6750 ret = i40e_set_num_rings_in_vsi(vsi);
6754 ret = i40e_vsi_alloc_arrays(vsi, true);
6758 /* Setup default MSIX irq handler for VSI */
6759 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6761 pf->vsi[vsi_idx] = vsi;
6766 pf->next_vsi = i - 1;
6769 mutex_unlock(&pf->switch_mutex);
6774 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6775 * @type: VSI pointer
6776 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6778 * On error: returns error code (negative)
6779 * On success: returns 0
6781 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6783 /* free the ring and vector containers */
6784 if (free_qvectors) {
6785 kfree(vsi->q_vectors);
6786 vsi->q_vectors = NULL;
6788 kfree(vsi->tx_rings);
6789 vsi->tx_rings = NULL;
6790 vsi->rx_rings = NULL;
6794 * i40e_vsi_clear - Deallocate the VSI provided
6795 * @vsi: the VSI being un-configured
6797 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6808 mutex_lock(&pf->switch_mutex);
6809 if (!pf->vsi[vsi->idx]) {
6810 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6811 vsi->idx, vsi->idx, vsi, vsi->type);
6815 if (pf->vsi[vsi->idx] != vsi) {
6816 dev_err(&pf->pdev->dev,
6817 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6818 pf->vsi[vsi->idx]->idx,
6820 pf->vsi[vsi->idx]->type,
6821 vsi->idx, vsi, vsi->type);
6825 /* updates the pf for this cleared vsi */
6826 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6827 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6829 i40e_vsi_free_arrays(vsi, true);
6831 pf->vsi[vsi->idx] = NULL;
6832 if (vsi->idx < pf->next_vsi)
6833 pf->next_vsi = vsi->idx;
6836 mutex_unlock(&pf->switch_mutex);
6844 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6845 * @vsi: the VSI being cleaned
6847 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6851 if (vsi->tx_rings && vsi->tx_rings[0]) {
6852 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6853 kfree_rcu(vsi->tx_rings[i], rcu);
6854 vsi->tx_rings[i] = NULL;
6855 vsi->rx_rings[i] = NULL;
6861 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6862 * @vsi: the VSI being configured
6864 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6866 struct i40e_ring *tx_ring, *rx_ring;
6867 struct i40e_pf *pf = vsi->back;
6870 /* Set basic values in the rings to be used later during open() */
6871 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6872 /* allocate space for both Tx and Rx in one shot */
6873 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6877 tx_ring->queue_index = i;
6878 tx_ring->reg_idx = vsi->base_queue + i;
6879 tx_ring->ring_active = false;
6881 tx_ring->netdev = vsi->netdev;
6882 tx_ring->dev = &pf->pdev->dev;
6883 tx_ring->count = vsi->num_desc;
6885 tx_ring->dcb_tc = 0;
6886 vsi->tx_rings[i] = tx_ring;
6888 rx_ring = &tx_ring[1];
6889 rx_ring->queue_index = i;
6890 rx_ring->reg_idx = vsi->base_queue + i;
6891 rx_ring->ring_active = false;
6893 rx_ring->netdev = vsi->netdev;
6894 rx_ring->dev = &pf->pdev->dev;
6895 rx_ring->count = vsi->num_desc;
6897 rx_ring->dcb_tc = 0;
6898 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6899 set_ring_16byte_desc_enabled(rx_ring);
6901 clear_ring_16byte_desc_enabled(rx_ring);
6902 vsi->rx_rings[i] = rx_ring;
6908 i40e_vsi_clear_rings(vsi);
6913 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6914 * @pf: board private structure
6915 * @vectors: the number of MSI-X vectors to request
6917 * Returns the number of vectors reserved, or error
6919 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6921 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6922 I40E_MIN_MSIX, vectors);
6924 dev_info(&pf->pdev->dev,
6925 "MSI-X vector reservation failed: %d\n", vectors);
6933 * i40e_init_msix - Setup the MSIX capability
6934 * @pf: board private structure
6936 * Work with the OS to set up the MSIX vectors needed.
6938 * Returns the number of vectors reserved or negative on failure
6940 static int i40e_init_msix(struct i40e_pf *pf)
6942 struct i40e_hw *hw = &pf->hw;
6947 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6950 /* The number of vectors we'll request will be comprised of:
6951 * - Add 1 for "other" cause for Admin Queue events, etc.
6952 * - The number of LAN queue pairs
6953 * - Queues being used for RSS.
6954 * We don't need as many as max_rss_size vectors.
6955 * use rss_size instead in the calculation since that
6956 * is governed by number of cpus in the system.
6957 * - assumes symmetric Tx/Rx pairing
6958 * - The number of VMDq pairs
6960 * - The number of FCOE qps.
6962 * Once we count this up, try the request.
6964 * If we can't get what we want, we'll simplify to nearly nothing
6965 * and try again. If that still fails, we punt.
6967 pf->num_lan_msix = min_t(int, num_online_cpus(),
6968 hw->func_caps.num_msix_vectors);
6969 pf->num_vmdq_msix = pf->num_vmdq_qps;
6971 other_vecs += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6972 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6975 /* Scale down if necessary, and the rings will share vectors */
6976 pf->num_lan_msix = min_t(int, pf->num_lan_msix,
6977 (hw->func_caps.num_msix_vectors - other_vecs));
6978 v_budget = pf->num_lan_msix + other_vecs;
6981 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6982 pf->num_fcoe_msix = pf->num_fcoe_qps;
6983 v_budget += pf->num_fcoe_msix;
6987 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6989 if (!pf->msix_entries)
6992 for (i = 0; i < v_budget; i++)
6993 pf->msix_entries[i].entry = i;
6994 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
6996 if (v_actual != v_budget) {
6997 /* If we have limited resources, we will start with no vectors
6998 * for the special features and then allocate vectors to some
6999 * of these features based on the policy and at the end disable
7000 * the features that did not get any vectors.
7003 pf->num_fcoe_qps = 0;
7004 pf->num_fcoe_msix = 0;
7006 pf->num_vmdq_msix = 0;
7009 if (v_actual < I40E_MIN_MSIX) {
7010 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7011 kfree(pf->msix_entries);
7012 pf->msix_entries = NULL;
7015 } else if (v_actual == I40E_MIN_MSIX) {
7016 /* Adjust for minimal MSIX use */
7017 pf->num_vmdq_vsis = 0;
7018 pf->num_vmdq_qps = 0;
7019 pf->num_lan_qps = 1;
7020 pf->num_lan_msix = 1;
7022 } else if (v_actual != v_budget) {
7025 /* reserve the misc vector */
7028 /* Scale vector usage down */
7029 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7030 pf->num_vmdq_vsis = 1;
7032 /* partition out the remaining vectors */
7035 pf->num_lan_msix = 1;
7039 /* give one vector to FCoE */
7040 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7041 pf->num_lan_msix = 1;
7042 pf->num_fcoe_msix = 1;
7045 pf->num_lan_msix = 2;
7050 /* give one vector to FCoE */
7051 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7052 pf->num_fcoe_msix = 1;
7056 pf->num_lan_msix = min_t(int, (vec / 2),
7058 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
7059 I40E_DEFAULT_NUM_VMDQ_VSI);
7064 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7065 (pf->num_vmdq_msix == 0)) {
7066 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7067 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7071 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7072 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7073 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7080 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7081 * @vsi: the VSI being configured
7082 * @v_idx: index of the vector in the vsi struct
7084 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7086 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7088 struct i40e_q_vector *q_vector;
7090 /* allocate q_vector */
7091 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7095 q_vector->vsi = vsi;
7096 q_vector->v_idx = v_idx;
7097 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7099 netif_napi_add(vsi->netdev, &q_vector->napi,
7100 i40e_napi_poll, NAPI_POLL_WEIGHT);
7102 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7103 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7105 /* tie q_vector and vsi together */
7106 vsi->q_vectors[v_idx] = q_vector;
7112 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7113 * @vsi: the VSI being configured
7115 * We allocate one q_vector per queue interrupt. If allocation fails we
7118 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7120 struct i40e_pf *pf = vsi->back;
7121 int v_idx, num_q_vectors;
7124 /* if not MSIX, give the one vector only to the LAN VSI */
7125 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7126 num_q_vectors = vsi->num_q_vectors;
7127 else if (vsi == pf->vsi[pf->lan_vsi])
7132 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7133 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7142 i40e_free_q_vector(vsi, v_idx);
7148 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7149 * @pf: board private structure to initialize
7151 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
7156 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7157 vectors = i40e_init_msix(pf);
7159 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7161 I40E_FLAG_FCOE_ENABLED |
7163 I40E_FLAG_RSS_ENABLED |
7164 I40E_FLAG_DCB_CAPABLE |
7165 I40E_FLAG_SRIOV_ENABLED |
7166 I40E_FLAG_FD_SB_ENABLED |
7167 I40E_FLAG_FD_ATR_ENABLED |
7168 I40E_FLAG_VMDQ_ENABLED);
7170 /* rework the queue expectations without MSIX */
7171 i40e_determine_queue_usage(pf);
7175 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7176 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7177 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7178 vectors = pci_enable_msi(pf->pdev);
7180 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7182 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7184 vectors = 1; /* one MSI or Legacy vector */
7187 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7188 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7190 /* set up vector assignment tracking */
7191 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7192 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7193 pf->irq_pile->num_entries = vectors;
7194 pf->irq_pile->search_hint = 0;
7196 /* track first vector for misc interrupts */
7197 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7201 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7202 * @pf: board private structure
7204 * This sets up the handler for MSIX 0, which is used to manage the
7205 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7206 * when in MSI or Legacy interrupt mode.
7208 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7210 struct i40e_hw *hw = &pf->hw;
7213 /* Only request the irq if this is the first time through, and
7214 * not when we're rebuilding after a Reset
7216 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7217 err = request_irq(pf->msix_entries[0].vector,
7218 i40e_intr, 0, pf->int_name, pf);
7220 dev_info(&pf->pdev->dev,
7221 "request_irq for %s failed: %d\n",
7227 i40e_enable_misc_int_causes(pf);
7229 /* associate no queues to the misc vector */
7230 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7231 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7235 i40e_irq_dynamic_enable_icr0(pf);
7241 * i40e_config_rss - Prepare for RSS if used
7242 * @pf: board private structure
7244 static int i40e_config_rss(struct i40e_pf *pf)
7246 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1];
7247 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7248 struct i40e_hw *hw = &pf->hw;
7254 netdev_rss_key_fill(rss_key, sizeof(rss_key));
7255 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7256 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]);
7258 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7259 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7260 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7261 hena |= I40E_DEFAULT_RSS_HENA;
7262 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7263 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7265 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7267 /* Check capability and Set table size and register per hw expectation*/
7268 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7269 if (hw->func_caps.rss_table_size == 512) {
7270 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7271 pf->rss_table_size = 512;
7273 pf->rss_table_size = 128;
7274 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7276 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7278 /* Populate the LUT with max no. of queues in round robin fashion */
7279 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7281 /* The assumption is that lan qp count will be the highest
7282 * qp count for any PF VSI that needs RSS.
7283 * If multiple VSIs need RSS support, all the qp counts
7284 * for those VSIs should be a power of 2 for RSS to work.
7285 * If LAN VSI is the only consumer for RSS then this requirement
7288 if (j == vsi->rss_size)
7290 /* lut = 4-byte sliding window of 4 lut entries */
7291 lut = (lut << 8) | (j &
7292 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7293 /* On i = 3, we have 4 entries in lut; write to the register */
7295 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7303 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7304 * @pf: board private structure
7305 * @queue_count: the requested queue count for rss.
7307 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7308 * count which may be different from the requested queue count.
7310 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7312 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7315 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7318 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7320 if (queue_count != vsi->num_queue_pairs) {
7321 vsi->req_queue_pairs = queue_count;
7322 i40e_prep_for_reset(pf);
7324 pf->rss_size = new_rss_size;
7326 i40e_reset_and_rebuild(pf, true);
7327 i40e_config_rss(pf);
7329 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7330 return pf->rss_size;
7334 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7335 * @pf: board private structure
7337 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7340 bool min_valid, max_valid;
7343 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7344 &min_valid, &max_valid);
7348 pf->npar_min_bw = min_bw;
7350 pf->npar_max_bw = max_bw;
7357 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7358 * @pf: board private structure
7360 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7362 struct i40e_aqc_configure_partition_bw_data bw_data;
7365 /* Set the valid bit for this pf */
7366 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id);
7367 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7368 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7370 /* Set the new bandwidths */
7371 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7377 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7378 * @pf: board private structure
7380 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7382 /* Commit temporary BW setting to permanent NVM image */
7383 enum i40e_admin_queue_err last_aq_status;
7387 if (pf->hw.partition_id != 1) {
7388 dev_info(&pf->pdev->dev,
7389 "Commit BW only works on partition 1! This is partition %d",
7390 pf->hw.partition_id);
7391 ret = I40E_NOT_SUPPORTED;
7395 /* Acquire NVM for read access */
7396 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7397 last_aq_status = pf->hw.aq.asq_last_status;
7399 dev_info(&pf->pdev->dev,
7400 "Cannot acquire NVM for read access, err %d: aq_err %d\n",
7401 ret, last_aq_status);
7405 /* Read word 0x10 of NVM - SW compatibility word 1 */
7406 ret = i40e_aq_read_nvm(&pf->hw,
7407 I40E_SR_NVM_CONTROL_WORD,
7408 0x10, sizeof(nvm_word), &nvm_word,
7410 /* Save off last admin queue command status before releasing
7413 last_aq_status = pf->hw.aq.asq_last_status;
7414 i40e_release_nvm(&pf->hw);
7416 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n",
7417 ret, last_aq_status);
7421 /* Wait a bit for NVM release to complete */
7424 /* Acquire NVM for write access */
7425 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7426 last_aq_status = pf->hw.aq.asq_last_status;
7428 dev_info(&pf->pdev->dev,
7429 "Cannot acquire NVM for write access, err %d: aq_err %d\n",
7430 ret, last_aq_status);
7433 /* Write it back out unchanged to initiate update NVM,
7434 * which will force a write of the shadow (alt) RAM to
7435 * the NVM - thus storing the bandwidth values permanently.
7437 ret = i40e_aq_update_nvm(&pf->hw,
7438 I40E_SR_NVM_CONTROL_WORD,
7439 0x10, sizeof(nvm_word),
7440 &nvm_word, true, NULL);
7441 /* Save off last admin queue command status before releasing
7444 last_aq_status = pf->hw.aq.asq_last_status;
7445 i40e_release_nvm(&pf->hw);
7447 dev_info(&pf->pdev->dev,
7448 "BW settings NOT SAVED, err %d aq_err %d\n",
7449 ret, last_aq_status);
7456 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7457 * @pf: board private structure to initialize
7459 * i40e_sw_init initializes the Adapter private data structure.
7460 * Fields are initialized based on PCI device information and
7461 * OS network device settings (MTU size).
7463 static int i40e_sw_init(struct i40e_pf *pf)
7468 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7469 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7470 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7471 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7472 if (I40E_DEBUG_USER & debug)
7473 pf->hw.debug_mask = debug;
7474 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7475 I40E_DEFAULT_MSG_ENABLE);
7478 /* Set default capability flags */
7479 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7480 I40E_FLAG_MSI_ENABLED |
7481 I40E_FLAG_MSIX_ENABLED;
7483 if (iommu_present(&pci_bus_type))
7484 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7486 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7488 /* Set default ITR */
7489 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7490 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7492 /* Depending on PF configurations, it is possible that the RSS
7493 * maximum might end up larger than the available queues
7495 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7497 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7498 pf->rss_size_max = min_t(int, pf->rss_size_max,
7499 pf->hw.func_caps.num_tx_qp);
7500 if (pf->hw.func_caps.rss) {
7501 pf->flags |= I40E_FLAG_RSS_ENABLED;
7502 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7505 /* MFP mode enabled */
7506 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7507 pf->flags |= I40E_FLAG_MFP_ENABLED;
7508 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7509 if (i40e_get_npar_bw_setting(pf))
7510 dev_warn(&pf->pdev->dev,
7511 "Could not get NPAR bw settings\n");
7513 dev_info(&pf->pdev->dev,
7514 "Min BW = %8.8x, Max BW = %8.8x\n",
7515 pf->npar_min_bw, pf->npar_max_bw);
7518 /* FW/NVM is not yet fixed in this regard */
7519 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7520 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7521 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7522 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7523 /* Setup a counter for fd_atr per pf */
7524 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7525 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7526 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7527 /* Setup a counter for fd_sb per pf */
7528 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7530 dev_info(&pf->pdev->dev,
7531 "Flow Director Sideband mode Disabled in MFP mode\n");
7533 pf->fdir_pf_filter_count =
7534 pf->hw.func_caps.fd_filters_guaranteed;
7535 pf->hw.fdir_shared_filter_count =
7536 pf->hw.func_caps.fd_filters_best_effort;
7539 if (pf->hw.func_caps.vmdq) {
7540 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7541 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7542 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7546 err = i40e_init_pf_fcoe(pf);
7548 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7550 #endif /* I40E_FCOE */
7551 #ifdef CONFIG_PCI_IOV
7552 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7553 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7554 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7555 pf->num_req_vfs = min_t(int,
7556 pf->hw.func_caps.num_vfs,
7559 #endif /* CONFIG_PCI_IOV */
7560 pf->eeprom_version = 0xDEAD;
7561 pf->lan_veb = I40E_NO_VEB;
7562 pf->lan_vsi = I40E_NO_VSI;
7564 /* set up queue assignment tracking */
7565 size = sizeof(struct i40e_lump_tracking)
7566 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7567 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7572 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7573 pf->qp_pile->search_hint = 0;
7575 pf->tx_timeout_recovery_level = 1;
7577 mutex_init(&pf->switch_mutex);
7579 /* If NPAR is enabled nudge the Tx scheduler */
7580 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
7581 i40e_set_npar_bw_setting(pf);
7588 * i40e_set_ntuple - set the ntuple feature flag and take action
7589 * @pf: board private structure to initialize
7590 * @features: the feature set that the stack is suggesting
7592 * returns a bool to indicate if reset needs to happen
7594 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7596 bool need_reset = false;
7598 /* Check if Flow Director n-tuple support was enabled or disabled. If
7599 * the state changed, we need to reset.
7601 if (features & NETIF_F_NTUPLE) {
7602 /* Enable filters and mark for reset */
7603 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7605 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7607 /* turn off filters, mark for reset and clear SW filter list */
7608 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7610 i40e_fdir_filter_exit(pf);
7612 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7613 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7614 /* reset fd counters */
7615 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7616 pf->fdir_pf_active_filters = 0;
7617 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7618 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7619 /* if ATR was auto disabled it can be re-enabled. */
7620 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7621 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7622 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7628 * i40e_set_features - set the netdev feature flags
7629 * @netdev: ptr to the netdev being adjusted
7630 * @features: the feature set that the stack is suggesting
7632 static int i40e_set_features(struct net_device *netdev,
7633 netdev_features_t features)
7635 struct i40e_netdev_priv *np = netdev_priv(netdev);
7636 struct i40e_vsi *vsi = np->vsi;
7637 struct i40e_pf *pf = vsi->back;
7640 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7641 i40e_vlan_stripping_enable(vsi);
7643 i40e_vlan_stripping_disable(vsi);
7645 need_reset = i40e_set_ntuple(pf, features);
7648 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7653 #ifdef CONFIG_I40E_VXLAN
7655 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7656 * @pf: board private structure
7657 * @port: The UDP port to look up
7659 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7661 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7665 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7666 if (pf->vxlan_ports[i] == port)
7674 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7675 * @netdev: This physical port's netdev
7676 * @sa_family: Socket Family that VXLAN is notifying us about
7677 * @port: New UDP port number that VXLAN started listening to
7679 static void i40e_add_vxlan_port(struct net_device *netdev,
7680 sa_family_t sa_family, __be16 port)
7682 struct i40e_netdev_priv *np = netdev_priv(netdev);
7683 struct i40e_vsi *vsi = np->vsi;
7684 struct i40e_pf *pf = vsi->back;
7688 if (sa_family == AF_INET6)
7691 idx = i40e_get_vxlan_port_idx(pf, port);
7693 /* Check if port already exists */
7694 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7695 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7699 /* Now check if there is space to add the new port */
7700 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7702 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7703 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7708 /* New port: add it and mark its index in the bitmap */
7709 pf->vxlan_ports[next_idx] = port;
7710 pf->pending_vxlan_bitmap |= (1 << next_idx);
7712 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7716 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7717 * @netdev: This physical port's netdev
7718 * @sa_family: Socket Family that VXLAN is notifying us about
7719 * @port: UDP port number that VXLAN stopped listening to
7721 static void i40e_del_vxlan_port(struct net_device *netdev,
7722 sa_family_t sa_family, __be16 port)
7724 struct i40e_netdev_priv *np = netdev_priv(netdev);
7725 struct i40e_vsi *vsi = np->vsi;
7726 struct i40e_pf *pf = vsi->back;
7729 if (sa_family == AF_INET6)
7732 idx = i40e_get_vxlan_port_idx(pf, port);
7734 /* Check if port already exists */
7735 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7736 /* if port exists, set it to 0 (mark for deletion)
7737 * and make it pending
7739 pf->vxlan_ports[idx] = 0;
7741 pf->pending_vxlan_bitmap |= (1 << idx);
7743 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7745 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7751 static int i40e_get_phys_port_id(struct net_device *netdev,
7752 struct netdev_phys_item_id *ppid)
7754 struct i40e_netdev_priv *np = netdev_priv(netdev);
7755 struct i40e_pf *pf = np->vsi->back;
7756 struct i40e_hw *hw = &pf->hw;
7758 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7761 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7762 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7768 * i40e_ndo_fdb_add - add an entry to the hardware database
7769 * @ndm: the input from the stack
7770 * @tb: pointer to array of nladdr (unused)
7771 * @dev: the net device pointer
7772 * @addr: the MAC address entry being added
7773 * @flags: instructions from stack about fdb operation
7775 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7776 struct net_device *dev,
7777 const unsigned char *addr, u16 vid,
7780 struct i40e_netdev_priv *np = netdev_priv(dev);
7781 struct i40e_pf *pf = np->vsi->back;
7784 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7788 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
7792 /* Hardware does not support aging addresses so if a
7793 * ndm_state is given only allow permanent addresses
7795 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7796 netdev_info(dev, "FDB only supports static addresses\n");
7800 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7801 err = dev_uc_add_excl(dev, addr);
7802 else if (is_multicast_ether_addr(addr))
7803 err = dev_mc_add_excl(dev, addr);
7807 /* Only return duplicate errors if NLM_F_EXCL is set */
7808 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7814 #ifdef HAVE_BRIDGE_ATTRIBS
7816 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
7817 * @dev: the netdev being configured
7818 * @nlh: RTNL message
7820 * Inserts a new hardware bridge if not already created and
7821 * enables the bridging mode requested (VEB or VEPA). If the
7822 * hardware bridge has already been inserted and the request
7823 * is to change the mode then that requires a PF reset to
7824 * allow rebuild of the components with required hardware
7825 * bridge mode enabled.
7827 static int i40e_ndo_bridge_setlink(struct net_device *dev,
7828 struct nlmsghdr *nlh)
7830 struct i40e_netdev_priv *np = netdev_priv(dev);
7831 struct i40e_vsi *vsi = np->vsi;
7832 struct i40e_pf *pf = vsi->back;
7833 struct i40e_veb *veb = NULL;
7834 struct nlattr *attr, *br_spec;
7837 /* Only for PF VSI for now */
7838 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7841 /* Find the HW bridge for PF VSI */
7842 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7843 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7847 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7849 nla_for_each_nested(attr, br_spec, rem) {
7852 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7855 mode = nla_get_u16(attr);
7856 if ((mode != BRIDGE_MODE_VEPA) &&
7857 (mode != BRIDGE_MODE_VEB))
7860 /* Insert a new HW bridge */
7862 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7863 vsi->tc_config.enabled_tc);
7865 veb->bridge_mode = mode;
7866 i40e_config_bridge_mode(veb);
7868 /* No Bridge HW offload available */
7872 } else if (mode != veb->bridge_mode) {
7873 /* Existing HW bridge but different mode needs reset */
7874 veb->bridge_mode = mode;
7875 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7884 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
7887 * @seq: RTNL message seq #
7888 * @dev: the netdev being configured
7889 * @filter_mask: unused
7891 * Return the mode in which the hardware bridge is operating in
7894 #ifdef HAVE_BRIDGE_FILTER
7895 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7896 struct net_device *dev,
7897 u32 __always_unused filter_mask)
7899 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7900 struct net_device *dev)
7901 #endif /* HAVE_BRIDGE_FILTER */
7903 struct i40e_netdev_priv *np = netdev_priv(dev);
7904 struct i40e_vsi *vsi = np->vsi;
7905 struct i40e_pf *pf = vsi->back;
7906 struct i40e_veb *veb = NULL;
7909 /* Only for PF VSI for now */
7910 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7913 /* Find the HW bridge for the PF VSI */
7914 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7915 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7922 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode);
7924 #endif /* HAVE_BRIDGE_ATTRIBS */
7926 static const struct net_device_ops i40e_netdev_ops = {
7927 .ndo_open = i40e_open,
7928 .ndo_stop = i40e_close,
7929 .ndo_start_xmit = i40e_lan_xmit_frame,
7930 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7931 .ndo_set_rx_mode = i40e_set_rx_mode,
7932 .ndo_validate_addr = eth_validate_addr,
7933 .ndo_set_mac_address = i40e_set_mac,
7934 .ndo_change_mtu = i40e_change_mtu,
7935 .ndo_do_ioctl = i40e_ioctl,
7936 .ndo_tx_timeout = i40e_tx_timeout,
7937 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7938 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7939 #ifdef CONFIG_NET_POLL_CONTROLLER
7940 .ndo_poll_controller = i40e_netpoll,
7942 .ndo_setup_tc = i40e_setup_tc,
7944 .ndo_fcoe_enable = i40e_fcoe_enable,
7945 .ndo_fcoe_disable = i40e_fcoe_disable,
7947 .ndo_set_features = i40e_set_features,
7948 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7949 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7950 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7951 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7952 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7953 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7954 #ifdef CONFIG_I40E_VXLAN
7955 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7956 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7958 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7959 .ndo_fdb_add = i40e_ndo_fdb_add,
7960 #ifdef HAVE_BRIDGE_ATTRIBS
7961 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
7962 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
7963 #endif /* HAVE_BRIDGE_ATTRIBS */
7967 * i40e_config_netdev - Setup the netdev flags
7968 * @vsi: the VSI being configured
7970 * Returns 0 on success, negative value on failure
7972 static int i40e_config_netdev(struct i40e_vsi *vsi)
7974 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7975 struct i40e_pf *pf = vsi->back;
7976 struct i40e_hw *hw = &pf->hw;
7977 struct i40e_netdev_priv *np;
7978 struct net_device *netdev;
7979 u8 mac_addr[ETH_ALEN];
7982 etherdev_size = sizeof(struct i40e_netdev_priv);
7983 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7987 vsi->netdev = netdev;
7988 np = netdev_priv(netdev);
7991 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7992 NETIF_F_GSO_UDP_TUNNEL |
7995 netdev->features = NETIF_F_SG |
7999 NETIF_F_GSO_UDP_TUNNEL |
8000 NETIF_F_HW_VLAN_CTAG_TX |
8001 NETIF_F_HW_VLAN_CTAG_RX |
8002 NETIF_F_HW_VLAN_CTAG_FILTER |
8011 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8012 netdev->features |= NETIF_F_NTUPLE;
8014 /* copy netdev features into list of user selectable features */
8015 netdev->hw_features |= netdev->features;
8017 if (vsi->type == I40E_VSI_MAIN) {
8018 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8019 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8020 /* The following steps are necessary to prevent reception
8021 * of tagged packets - some older NVM configurations load a
8022 * default a MAC-VLAN filter that accepts any tagged packet
8023 * which must be replaced by a normal filter.
8025 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8026 i40e_add_filter(vsi, mac_addr,
8027 I40E_VLAN_ANY, false, true);
8029 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8030 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8031 pf->vsi[pf->lan_vsi]->netdev->name);
8032 random_ether_addr(mac_addr);
8033 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8035 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8037 ether_addr_copy(netdev->dev_addr, mac_addr);
8038 ether_addr_copy(netdev->perm_addr, mac_addr);
8039 /* vlan gets same features (except vlan offload)
8040 * after any tweaks for specific VSI types
8042 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8043 NETIF_F_HW_VLAN_CTAG_RX |
8044 NETIF_F_HW_VLAN_CTAG_FILTER);
8045 netdev->priv_flags |= IFF_UNICAST_FLT;
8046 netdev->priv_flags |= IFF_SUPP_NOFCS;
8047 /* Setup netdev TC information */
8048 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8050 netdev->netdev_ops = &i40e_netdev_ops;
8051 netdev->watchdog_timeo = 5 * HZ;
8052 i40e_set_ethtool_ops(netdev);
8054 i40e_fcoe_config_netdev(netdev, vsi);
8061 * i40e_vsi_delete - Delete a VSI from the switch
8062 * @vsi: the VSI being removed
8064 * Returns 0 on success, negative value on failure
8066 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8068 /* remove default VSI is not allowed */
8069 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8072 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8076 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8077 * @vsi: the VSI being queried
8079 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8081 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8083 struct i40e_veb *veb;
8084 struct i40e_pf *pf = vsi->back;
8086 /* Uplink is not a bridge so default to VEB */
8087 if (vsi->veb_idx == I40E_NO_VEB)
8090 veb = pf->veb[vsi->veb_idx];
8091 /* Uplink is a bridge in VEPA mode */
8092 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8095 /* Uplink is a bridge in VEB mode */
8100 * i40e_add_vsi - Add a VSI to the switch
8101 * @vsi: the VSI being configured
8103 * This initializes a VSI context depending on the VSI type to be added and
8104 * passes it down to the add_vsi aq command.
8106 static int i40e_add_vsi(struct i40e_vsi *vsi)
8109 struct i40e_mac_filter *f, *ftmp;
8110 struct i40e_pf *pf = vsi->back;
8111 struct i40e_hw *hw = &pf->hw;
8112 struct i40e_vsi_context ctxt;
8113 u8 enabled_tc = 0x1; /* TC0 enabled */
8116 memset(&ctxt, 0, sizeof(ctxt));
8117 switch (vsi->type) {
8119 /* The PF's main VSI is already setup as part of the
8120 * device initialization, so we'll not bother with
8121 * the add_vsi call, but we will retrieve the current
8124 ctxt.seid = pf->main_vsi_seid;
8125 ctxt.pf_num = pf->hw.pf_id;
8127 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8128 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8130 dev_info(&pf->pdev->dev,
8131 "couldn't get pf vsi config, err %d, aq_err %d\n",
8132 ret, pf->hw.aq.asq_last_status);
8135 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8136 vsi->info.valid_sections = 0;
8138 vsi->seid = ctxt.seid;
8139 vsi->id = ctxt.vsi_number;
8141 enabled_tc = i40e_pf_get_tc_map(pf);
8143 /* MFP mode setup queue map and update VSI */
8144 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8145 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8146 memset(&ctxt, 0, sizeof(ctxt));
8147 ctxt.seid = pf->main_vsi_seid;
8148 ctxt.pf_num = pf->hw.pf_id;
8150 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8151 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8153 dev_info(&pf->pdev->dev,
8154 "update vsi failed, aq_err=%d\n",
8155 pf->hw.aq.asq_last_status);
8159 /* update the local VSI info queue map */
8160 i40e_vsi_update_queue_map(vsi, &ctxt);
8161 vsi->info.valid_sections = 0;
8163 /* Default/Main VSI is only enabled for TC0
8164 * reconfigure it to enable all TCs that are
8165 * available on the port in SFP mode.
8166 * For MFP case the iSCSI PF would use this
8167 * flow to enable LAN+iSCSI TC.
8169 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8171 dev_info(&pf->pdev->dev,
8172 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
8174 pf->hw.aq.asq_last_status);
8181 ctxt.pf_num = hw->pf_id;
8183 ctxt.uplink_seid = vsi->uplink_seid;
8184 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8185 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8186 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8187 ctxt.info.valid_sections |=
8188 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8189 ctxt.info.switch_id =
8190 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8192 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8195 case I40E_VSI_VMDQ2:
8196 ctxt.pf_num = hw->pf_id;
8198 ctxt.uplink_seid = vsi->uplink_seid;
8199 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8200 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8202 /* This VSI is connected to VEB so the switch_id
8203 * should be set to zero by default.
8205 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8206 ctxt.info.valid_sections |=
8207 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8208 ctxt.info.switch_id =
8209 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8212 /* Setup the VSI tx/rx queue map for TC0 only for now */
8213 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8216 case I40E_VSI_SRIOV:
8217 ctxt.pf_num = hw->pf_id;
8218 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8219 ctxt.uplink_seid = vsi->uplink_seid;
8220 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8221 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8223 /* This VSI is connected to VEB so the switch_id
8224 * should be set to zero by default.
8226 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8227 ctxt.info.valid_sections |=
8228 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8229 ctxt.info.switch_id =
8230 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8233 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8234 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8235 if (pf->vf[vsi->vf_id].spoofchk) {
8236 ctxt.info.valid_sections |=
8237 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8238 ctxt.info.sec_flags |=
8239 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8240 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8242 /* Setup the VSI tx/rx queue map for TC0 only for now */
8243 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8248 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8250 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8255 #endif /* I40E_FCOE */
8260 if (vsi->type != I40E_VSI_MAIN) {
8261 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8263 dev_info(&vsi->back->pdev->dev,
8264 "add vsi failed, aq_err=%d\n",
8265 vsi->back->hw.aq.asq_last_status);
8269 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8270 vsi->info.valid_sections = 0;
8271 vsi->seid = ctxt.seid;
8272 vsi->id = ctxt.vsi_number;
8275 /* If macvlan filters already exist, force them to get loaded */
8276 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8280 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8281 struct i40e_aqc_remove_macvlan_element_data element;
8283 memset(&element, 0, sizeof(element));
8284 ether_addr_copy(element.mac_addr, f->macaddr);
8285 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8286 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8289 /* some older FW has a different default */
8291 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8292 i40e_aq_remove_macvlan(hw, vsi->seid,
8296 i40e_aq_mac_address_write(hw,
8297 I40E_AQC_WRITE_TYPE_LAA_WOL,
8302 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8303 pf->flags |= I40E_FLAG_FILTER_SYNC;
8306 /* Update VSI BW information */
8307 ret = i40e_vsi_get_bw_info(vsi);
8309 dev_info(&pf->pdev->dev,
8310 "couldn't get vsi bw info, err %d, aq_err %d\n",
8311 ret, pf->hw.aq.asq_last_status);
8312 /* VSI is already added so not tearing that up */
8321 * i40e_vsi_release - Delete a VSI and free its resources
8322 * @vsi: the VSI being removed
8324 * Returns 0 on success or < 0 on error
8326 int i40e_vsi_release(struct i40e_vsi *vsi)
8328 struct i40e_mac_filter *f, *ftmp;
8329 struct i40e_veb *veb = NULL;
8336 /* release of a VEB-owner or last VSI is not allowed */
8337 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8338 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8339 vsi->seid, vsi->uplink_seid);
8342 if (vsi == pf->vsi[pf->lan_vsi] &&
8343 !test_bit(__I40E_DOWN, &pf->state)) {
8344 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8348 uplink_seid = vsi->uplink_seid;
8349 if (vsi->type != I40E_VSI_SRIOV) {
8350 if (vsi->netdev_registered) {
8351 vsi->netdev_registered = false;
8353 /* results in a call to i40e_close() */
8354 unregister_netdev(vsi->netdev);
8357 i40e_vsi_close(vsi);
8359 i40e_vsi_disable_irq(vsi);
8362 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8363 i40e_del_filter(vsi, f->macaddr, f->vlan,
8364 f->is_vf, f->is_netdev);
8365 i40e_sync_vsi_filters(vsi);
8367 i40e_vsi_delete(vsi);
8368 i40e_vsi_free_q_vectors(vsi);
8370 free_netdev(vsi->netdev);
8373 i40e_vsi_clear_rings(vsi);
8374 i40e_vsi_clear(vsi);
8376 /* If this was the last thing on the VEB, except for the
8377 * controlling VSI, remove the VEB, which puts the controlling
8378 * VSI onto the next level down in the switch.
8380 * Well, okay, there's one more exception here: don't remove
8381 * the orphan VEBs yet. We'll wait for an explicit remove request
8382 * from up the network stack.
8384 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8386 pf->vsi[i]->uplink_seid == uplink_seid &&
8387 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8388 n++; /* count the VSIs */
8391 for (i = 0; i < I40E_MAX_VEB; i++) {
8394 if (pf->veb[i]->uplink_seid == uplink_seid)
8395 n++; /* count the VEBs */
8396 if (pf->veb[i]->seid == uplink_seid)
8399 if (n == 0 && veb && veb->uplink_seid != 0)
8400 i40e_veb_release(veb);
8406 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8407 * @vsi: ptr to the VSI
8409 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8410 * corresponding SW VSI structure and initializes num_queue_pairs for the
8411 * newly allocated VSI.
8413 * Returns 0 on success or negative on failure
8415 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8418 struct i40e_pf *pf = vsi->back;
8420 if (vsi->q_vectors[0]) {
8421 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8426 if (vsi->base_vector) {
8427 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8428 vsi->seid, vsi->base_vector);
8432 ret = i40e_vsi_alloc_q_vectors(vsi);
8434 dev_info(&pf->pdev->dev,
8435 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8436 vsi->num_q_vectors, vsi->seid, ret);
8437 vsi->num_q_vectors = 0;
8438 goto vector_setup_out;
8441 if (vsi->num_q_vectors)
8442 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8443 vsi->num_q_vectors, vsi->idx);
8444 if (vsi->base_vector < 0) {
8445 dev_info(&pf->pdev->dev,
8446 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8447 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8448 i40e_vsi_free_q_vectors(vsi);
8450 goto vector_setup_out;
8458 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8459 * @vsi: pointer to the vsi.
8461 * This re-allocates a vsi's queue resources.
8463 * Returns pointer to the successfully allocated and configured VSI sw struct
8464 * on success, otherwise returns NULL on failure.
8466 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8468 struct i40e_pf *pf = vsi->back;
8472 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8473 i40e_vsi_clear_rings(vsi);
8475 i40e_vsi_free_arrays(vsi, false);
8476 i40e_set_num_rings_in_vsi(vsi);
8477 ret = i40e_vsi_alloc_arrays(vsi, false);
8481 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8483 dev_info(&pf->pdev->dev,
8484 "failed to get tracking for %d queues for VSI %d err=%d\n",
8485 vsi->alloc_queue_pairs, vsi->seid, ret);
8488 vsi->base_queue = ret;
8490 /* Update the FW view of the VSI. Force a reset of TC and queue
8491 * layout configurations.
8493 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8494 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8495 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8496 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8498 /* assign it some queues */
8499 ret = i40e_alloc_rings(vsi);
8503 /* map all of the rings to the q_vectors */
8504 i40e_vsi_map_rings_to_vectors(vsi);
8508 i40e_vsi_free_q_vectors(vsi);
8509 if (vsi->netdev_registered) {
8510 vsi->netdev_registered = false;
8511 unregister_netdev(vsi->netdev);
8512 free_netdev(vsi->netdev);
8515 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8517 i40e_vsi_clear(vsi);
8522 * i40e_vsi_setup - Set up a VSI by a given type
8523 * @pf: board private structure
8525 * @uplink_seid: the switch element to link to
8526 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8528 * This allocates the sw VSI structure and its queue resources, then add a VSI
8529 * to the identified VEB.
8531 * Returns pointer to the successfully allocated and configure VSI sw struct on
8532 * success, otherwise returns NULL on failure.
8534 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8535 u16 uplink_seid, u32 param1)
8537 struct i40e_vsi *vsi = NULL;
8538 struct i40e_veb *veb = NULL;
8542 /* The requested uplink_seid must be either
8543 * - the PF's port seid
8544 * no VEB is needed because this is the PF
8545 * or this is a Flow Director special case VSI
8546 * - seid of an existing VEB
8547 * - seid of a VSI that owns an existing VEB
8548 * - seid of a VSI that doesn't own a VEB
8549 * a new VEB is created and the VSI becomes the owner
8550 * - seid of the PF VSI, which is what creates the first VEB
8551 * this is a special case of the previous
8553 * Find which uplink_seid we were given and create a new VEB if needed
8555 for (i = 0; i < I40E_MAX_VEB; i++) {
8556 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8562 if (!veb && uplink_seid != pf->mac_seid) {
8564 for (i = 0; i < pf->num_alloc_vsi; i++) {
8565 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8571 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8576 if (vsi->uplink_seid == pf->mac_seid)
8577 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8578 vsi->tc_config.enabled_tc);
8579 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8580 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8581 vsi->tc_config.enabled_tc);
8583 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8584 dev_info(&vsi->back->pdev->dev,
8585 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8589 i40e_config_bridge_mode(veb);
8591 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8592 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8596 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8600 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8601 uplink_seid = veb->seid;
8604 /* get vsi sw struct */
8605 v_idx = i40e_vsi_mem_alloc(pf, type);
8608 vsi = pf->vsi[v_idx];
8612 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8614 if (type == I40E_VSI_MAIN)
8615 pf->lan_vsi = v_idx;
8616 else if (type == I40E_VSI_SRIOV)
8617 vsi->vf_id = param1;
8618 /* assign it some queues */
8619 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8622 dev_info(&pf->pdev->dev,
8623 "failed to get tracking for %d queues for VSI %d err=%d\n",
8624 vsi->alloc_queue_pairs, vsi->seid, ret);
8627 vsi->base_queue = ret;
8629 /* get a VSI from the hardware */
8630 vsi->uplink_seid = uplink_seid;
8631 ret = i40e_add_vsi(vsi);
8635 switch (vsi->type) {
8636 /* setup the netdev if needed */
8638 case I40E_VSI_VMDQ2:
8640 ret = i40e_config_netdev(vsi);
8643 ret = register_netdev(vsi->netdev);
8646 vsi->netdev_registered = true;
8647 netif_carrier_off(vsi->netdev);
8648 #ifdef CONFIG_I40E_DCB
8649 /* Setup DCB netlink interface */
8650 i40e_dcbnl_setup(vsi);
8651 #endif /* CONFIG_I40E_DCB */
8655 /* set up vectors and rings if needed */
8656 ret = i40e_vsi_setup_vectors(vsi);
8660 ret = i40e_alloc_rings(vsi);
8664 /* map all of the rings to the q_vectors */
8665 i40e_vsi_map_rings_to_vectors(vsi);
8667 i40e_vsi_reset_stats(vsi);
8671 /* no netdev or rings for the other VSI types */
8678 i40e_vsi_free_q_vectors(vsi);
8680 if (vsi->netdev_registered) {
8681 vsi->netdev_registered = false;
8682 unregister_netdev(vsi->netdev);
8683 free_netdev(vsi->netdev);
8687 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8689 i40e_vsi_clear(vsi);
8695 * i40e_veb_get_bw_info - Query VEB BW information
8696 * @veb: the veb to query
8698 * Query the Tx scheduler BW configuration data for given VEB
8700 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8702 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8703 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8704 struct i40e_pf *pf = veb->pf;
8705 struct i40e_hw *hw = &pf->hw;
8710 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8713 dev_info(&pf->pdev->dev,
8714 "query veb bw config failed, aq_err=%d\n",
8715 hw->aq.asq_last_status);
8719 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8722 dev_info(&pf->pdev->dev,
8723 "query veb bw ets config failed, aq_err=%d\n",
8724 hw->aq.asq_last_status);
8728 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8729 veb->bw_max_quanta = ets_data.tc_bw_max;
8730 veb->is_abs_credits = bw_data.absolute_credits_enable;
8731 veb->enabled_tc = ets_data.tc_valid_bits;
8732 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8733 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8734 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8735 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8736 veb->bw_tc_limit_credits[i] =
8737 le16_to_cpu(bw_data.tc_bw_limits[i]);
8738 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8746 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8747 * @pf: board private structure
8749 * On error: returns error code (negative)
8750 * On success: returns vsi index in PF (positive)
8752 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8755 struct i40e_veb *veb;
8758 /* Need to protect the allocation of switch elements at the PF level */
8759 mutex_lock(&pf->switch_mutex);
8761 /* VEB list may be fragmented if VEB creation/destruction has
8762 * been happening. We can afford to do a quick scan to look
8763 * for any free slots in the list.
8765 * find next empty veb slot, looping back around if necessary
8768 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8770 if (i >= I40E_MAX_VEB) {
8772 goto err_alloc_veb; /* out of VEB slots! */
8775 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8782 veb->enabled_tc = 1;
8787 mutex_unlock(&pf->switch_mutex);
8792 * i40e_switch_branch_release - Delete a branch of the switch tree
8793 * @branch: where to start deleting
8795 * This uses recursion to find the tips of the branch to be
8796 * removed, deleting until we get back to and can delete this VEB.
8798 static void i40e_switch_branch_release(struct i40e_veb *branch)
8800 struct i40e_pf *pf = branch->pf;
8801 u16 branch_seid = branch->seid;
8802 u16 veb_idx = branch->idx;
8805 /* release any VEBs on this VEB - RECURSION */
8806 for (i = 0; i < I40E_MAX_VEB; i++) {
8809 if (pf->veb[i]->uplink_seid == branch->seid)
8810 i40e_switch_branch_release(pf->veb[i]);
8813 /* Release the VSIs on this VEB, but not the owner VSI.
8815 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8816 * the VEB itself, so don't use (*branch) after this loop.
8818 for (i = 0; i < pf->num_alloc_vsi; i++) {
8821 if (pf->vsi[i]->uplink_seid == branch_seid &&
8822 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8823 i40e_vsi_release(pf->vsi[i]);
8827 /* There's one corner case where the VEB might not have been
8828 * removed, so double check it here and remove it if needed.
8829 * This case happens if the veb was created from the debugfs
8830 * commands and no VSIs were added to it.
8832 if (pf->veb[veb_idx])
8833 i40e_veb_release(pf->veb[veb_idx]);
8837 * i40e_veb_clear - remove veb struct
8838 * @veb: the veb to remove
8840 static void i40e_veb_clear(struct i40e_veb *veb)
8846 struct i40e_pf *pf = veb->pf;
8848 mutex_lock(&pf->switch_mutex);
8849 if (pf->veb[veb->idx] == veb)
8850 pf->veb[veb->idx] = NULL;
8851 mutex_unlock(&pf->switch_mutex);
8858 * i40e_veb_release - Delete a VEB and free its resources
8859 * @veb: the VEB being removed
8861 void i40e_veb_release(struct i40e_veb *veb)
8863 struct i40e_vsi *vsi = NULL;
8869 /* find the remaining VSI and check for extras */
8870 for (i = 0; i < pf->num_alloc_vsi; i++) {
8871 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8877 dev_info(&pf->pdev->dev,
8878 "can't remove VEB %d with %d VSIs left\n",
8883 /* move the remaining VSI to uplink veb */
8884 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8885 if (veb->uplink_seid) {
8886 vsi->uplink_seid = veb->uplink_seid;
8887 if (veb->uplink_seid == pf->mac_seid)
8888 vsi->veb_idx = I40E_NO_VEB;
8890 vsi->veb_idx = veb->veb_idx;
8893 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8894 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8897 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8898 i40e_veb_clear(veb);
8902 * i40e_add_veb - create the VEB in the switch
8903 * @veb: the VEB to be instantiated
8904 * @vsi: the controlling VSI
8906 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8908 bool is_default = false;
8909 bool is_cloud = false;
8912 /* get a VEB from the hardware */
8913 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8914 veb->enabled_tc, is_default,
8915 is_cloud, &veb->seid, NULL);
8917 dev_info(&veb->pf->pdev->dev,
8918 "couldn't add VEB, err %d, aq_err %d\n",
8919 ret, veb->pf->hw.aq.asq_last_status);
8923 /* get statistics counter */
8924 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8925 &veb->stats_idx, NULL, NULL, NULL);
8927 dev_info(&veb->pf->pdev->dev,
8928 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8929 ret, veb->pf->hw.aq.asq_last_status);
8932 ret = i40e_veb_get_bw_info(veb);
8934 dev_info(&veb->pf->pdev->dev,
8935 "couldn't get VEB bw info, err %d, aq_err %d\n",
8936 ret, veb->pf->hw.aq.asq_last_status);
8937 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8941 vsi->uplink_seid = veb->seid;
8942 vsi->veb_idx = veb->idx;
8943 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8949 * i40e_veb_setup - Set up a VEB
8950 * @pf: board private structure
8951 * @flags: VEB setup flags
8952 * @uplink_seid: the switch element to link to
8953 * @vsi_seid: the initial VSI seid
8954 * @enabled_tc: Enabled TC bit-map
8956 * This allocates the sw VEB structure and links it into the switch
8957 * It is possible and legal for this to be a duplicate of an already
8958 * existing VEB. It is also possible for both uplink and vsi seids
8959 * to be zero, in order to create a floating VEB.
8961 * Returns pointer to the successfully allocated VEB sw struct on
8962 * success, otherwise returns NULL on failure.
8964 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8965 u16 uplink_seid, u16 vsi_seid,
8968 struct i40e_veb *veb, *uplink_veb = NULL;
8969 int vsi_idx, veb_idx;
8972 /* if one seid is 0, the other must be 0 to create a floating relay */
8973 if ((uplink_seid == 0 || vsi_seid == 0) &&
8974 (uplink_seid + vsi_seid != 0)) {
8975 dev_info(&pf->pdev->dev,
8976 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8977 uplink_seid, vsi_seid);
8981 /* make sure there is such a vsi and uplink */
8982 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8983 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8985 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8986 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8991 if (uplink_seid && uplink_seid != pf->mac_seid) {
8992 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8993 if (pf->veb[veb_idx] &&
8994 pf->veb[veb_idx]->seid == uplink_seid) {
8995 uplink_veb = pf->veb[veb_idx];
9000 dev_info(&pf->pdev->dev,
9001 "uplink seid %d not found\n", uplink_seid);
9006 /* get veb sw struct */
9007 veb_idx = i40e_veb_mem_alloc(pf);
9010 veb = pf->veb[veb_idx];
9012 veb->uplink_seid = uplink_seid;
9013 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9014 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9016 /* create the VEB in the switch */
9017 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9020 if (vsi_idx == pf->lan_vsi)
9021 pf->lan_veb = veb->idx;
9026 i40e_veb_clear(veb);
9032 * i40e_setup_pf_switch_element - set pf vars based on switch type
9033 * @pf: board private structure
9034 * @ele: element we are building info from
9035 * @num_reported: total number of elements
9036 * @printconfig: should we print the contents
9038 * helper function to assist in extracting a few useful SEID values.
9040 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9041 struct i40e_aqc_switch_config_element_resp *ele,
9042 u16 num_reported, bool printconfig)
9044 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9045 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9046 u8 element_type = ele->element_type;
9047 u16 seid = le16_to_cpu(ele->seid);
9050 dev_info(&pf->pdev->dev,
9051 "type=%d seid=%d uplink=%d downlink=%d\n",
9052 element_type, seid, uplink_seid, downlink_seid);
9054 switch (element_type) {
9055 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9056 pf->mac_seid = seid;
9058 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9060 if (uplink_seid != pf->mac_seid)
9062 if (pf->lan_veb == I40E_NO_VEB) {
9065 /* find existing or else empty VEB */
9066 for (v = 0; v < I40E_MAX_VEB; v++) {
9067 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9072 if (pf->lan_veb == I40E_NO_VEB) {
9073 v = i40e_veb_mem_alloc(pf);
9080 pf->veb[pf->lan_veb]->seid = seid;
9081 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9082 pf->veb[pf->lan_veb]->pf = pf;
9083 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9085 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9086 if (num_reported != 1)
9088 /* This is immediately after a reset so we can assume this is
9091 pf->mac_seid = uplink_seid;
9092 pf->pf_seid = downlink_seid;
9093 pf->main_vsi_seid = seid;
9095 dev_info(&pf->pdev->dev,
9096 "pf_seid=%d main_vsi_seid=%d\n",
9097 pf->pf_seid, pf->main_vsi_seid);
9099 case I40E_SWITCH_ELEMENT_TYPE_PF:
9100 case I40E_SWITCH_ELEMENT_TYPE_VF:
9101 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9102 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9103 case I40E_SWITCH_ELEMENT_TYPE_PE:
9104 case I40E_SWITCH_ELEMENT_TYPE_PA:
9105 /* ignore these for now */
9108 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9109 element_type, seid);
9115 * i40e_fetch_switch_configuration - Get switch config from firmware
9116 * @pf: board private structure
9117 * @printconfig: should we print the contents
9119 * Get the current switch configuration from the device and
9120 * extract a few useful SEID values.
9122 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9124 struct i40e_aqc_get_switch_config_resp *sw_config;
9130 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9134 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9136 u16 num_reported, num_total;
9138 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9142 dev_info(&pf->pdev->dev,
9143 "get switch config failed %d aq_err=%x\n",
9144 ret, pf->hw.aq.asq_last_status);
9149 num_reported = le16_to_cpu(sw_config->header.num_reported);
9150 num_total = le16_to_cpu(sw_config->header.num_total);
9153 dev_info(&pf->pdev->dev,
9154 "header: %d reported %d total\n",
9155 num_reported, num_total);
9157 for (i = 0; i < num_reported; i++) {
9158 struct i40e_aqc_switch_config_element_resp *ele =
9159 &sw_config->element[i];
9161 i40e_setup_pf_switch_element(pf, ele, num_reported,
9164 } while (next_seid != 0);
9171 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9172 * @pf: board private structure
9173 * @reinit: if the Main VSI needs to re-initialized.
9175 * Returns 0 on success, negative value on failure
9177 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9181 /* find out what's out there already */
9182 ret = i40e_fetch_switch_configuration(pf, false);
9184 dev_info(&pf->pdev->dev,
9185 "couldn't fetch switch config, err %d, aq_err %d\n",
9186 ret, pf->hw.aq.asq_last_status);
9189 i40e_pf_reset_stats(pf);
9191 /* first time setup */
9192 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9193 struct i40e_vsi *vsi = NULL;
9196 /* Set up the PF VSI associated with the PF's main VSI
9197 * that is already in the HW switch
9199 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9200 uplink_seid = pf->veb[pf->lan_veb]->seid;
9202 uplink_seid = pf->mac_seid;
9203 if (pf->lan_vsi == I40E_NO_VSI)
9204 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9206 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9208 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9209 i40e_fdir_teardown(pf);
9213 /* force a reset of TC and queue layout configurations */
9214 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9215 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9216 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9217 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9219 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9221 i40e_fdir_sb_setup(pf);
9223 /* Setup static PF queue filter control settings */
9224 ret = i40e_setup_pf_filter_control(pf);
9226 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9228 /* Failure here should not stop continuing other steps */
9231 /* enable RSS in the HW, even for only one queue, as the stack can use
9234 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9235 i40e_config_rss(pf);
9237 /* fill in link information and enable LSE reporting */
9238 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9239 i40e_link_event(pf);
9241 /* Initialize user-specific link properties */
9242 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9243 I40E_AQ_AN_COMPLETED) ? true : false);
9251 * i40e_determine_queue_usage - Work out queue distribution
9252 * @pf: board private structure
9254 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9258 pf->num_lan_qps = 0;
9260 pf->num_fcoe_qps = 0;
9263 /* Find the max queues to be put into basic use. We'll always be
9264 * using TC0, whether or not DCB is running, and TC0 will get the
9267 queues_left = pf->hw.func_caps.num_tx_qp;
9269 if ((queues_left == 1) ||
9270 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9271 /* one qp for PF, no queues for anything else */
9273 pf->rss_size = pf->num_lan_qps = 1;
9275 /* make sure all the fancies are disabled */
9276 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9278 I40E_FLAG_FCOE_ENABLED |
9280 I40E_FLAG_FD_SB_ENABLED |
9281 I40E_FLAG_FD_ATR_ENABLED |
9282 I40E_FLAG_DCB_CAPABLE |
9283 I40E_FLAG_SRIOV_ENABLED |
9284 I40E_FLAG_VMDQ_ENABLED);
9285 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9286 I40E_FLAG_FD_SB_ENABLED |
9287 I40E_FLAG_FD_ATR_ENABLED |
9288 I40E_FLAG_DCB_CAPABLE))) {
9290 pf->rss_size = pf->num_lan_qps = 1;
9291 queues_left -= pf->num_lan_qps;
9293 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9295 I40E_FLAG_FCOE_ENABLED |
9297 I40E_FLAG_FD_SB_ENABLED |
9298 I40E_FLAG_FD_ATR_ENABLED |
9299 I40E_FLAG_DCB_ENABLED |
9300 I40E_FLAG_VMDQ_ENABLED);
9302 /* Not enough queues for all TCs */
9303 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9304 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9305 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9306 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9308 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9310 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9311 pf->hw.func_caps.num_tx_qp);
9313 queues_left -= pf->num_lan_qps;
9317 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9318 if (I40E_DEFAULT_FCOE <= queues_left) {
9319 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9320 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9321 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9323 pf->num_fcoe_qps = 0;
9324 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9325 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9328 queues_left -= pf->num_fcoe_qps;
9332 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9333 if (queues_left > 1) {
9334 queues_left -= 1; /* save 1 queue for FD */
9336 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9337 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9341 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9342 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9343 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9344 (queues_left / pf->num_vf_qps));
9345 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9348 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9349 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9350 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9351 (queues_left / pf->num_vmdq_qps));
9352 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9355 pf->queues_left = queues_left;
9357 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9362 * i40e_setup_pf_filter_control - Setup PF static filter control
9363 * @pf: PF to be setup
9365 * i40e_setup_pf_filter_control sets up a pf's initial filter control
9366 * settings. If PE/FCoE are enabled then it will also set the per PF
9367 * based filter sizes required for them. It also enables Flow director,
9368 * ethertype and macvlan type filter settings for the pf.
9370 * Returns 0 on success, negative on failure
9372 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9374 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9376 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9378 /* Flow Director is enabled */
9379 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9380 settings->enable_fdir = true;
9382 /* Ethtype and MACVLAN filters enabled for PF */
9383 settings->enable_ethtype = true;
9384 settings->enable_macvlan = true;
9386 if (i40e_set_filter_control(&pf->hw, settings))
9392 #define INFO_STRING_LEN 255
9393 static void i40e_print_features(struct i40e_pf *pf)
9395 struct i40e_hw *hw = &pf->hw;
9398 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9400 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9406 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9407 #ifdef CONFIG_PCI_IOV
9408 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9410 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9411 pf->hw.func_caps.num_vsis,
9412 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9413 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9415 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9416 buf += sprintf(buf, "RSS ");
9417 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9418 buf += sprintf(buf, "FD_ATR ");
9419 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9420 buf += sprintf(buf, "FD_SB ");
9421 buf += sprintf(buf, "NTUPLE ");
9423 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9424 buf += sprintf(buf, "DCB ");
9425 if (pf->flags & I40E_FLAG_PTP)
9426 buf += sprintf(buf, "PTP ");
9428 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9429 buf += sprintf(buf, "FCOE ");
9432 BUG_ON(buf > (string + INFO_STRING_LEN));
9433 dev_info(&pf->pdev->dev, "%s\n", string);
9438 * i40e_probe - Device initialization routine
9439 * @pdev: PCI device information struct
9440 * @ent: entry in i40e_pci_tbl
9442 * i40e_probe initializes a pf identified by a pci_dev structure.
9443 * The OS initialization, configuring of the pf private structure,
9444 * and a hardware reset occur.
9446 * Returns 0 on success, negative on failure
9448 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9450 struct i40e_aq_get_phy_abilities_resp abilities;
9451 unsigned long ioremap_len;
9454 static u16 pfs_found;
9460 err = pci_enable_device_mem(pdev);
9464 /* set up for high or low dma */
9465 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9467 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9470 "DMA configuration failed: 0x%x\n", err);
9475 /* set up pci connections */
9476 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9477 IORESOURCE_MEM), i40e_driver_name);
9479 dev_info(&pdev->dev,
9480 "pci_request_selected_regions failed %d\n", err);
9484 pci_enable_pcie_error_reporting(pdev);
9485 pci_set_master(pdev);
9487 /* Now that we have a PCI connection, we need to do the
9488 * low level device setup. This is primarily setting up
9489 * the Admin Queue structures and then querying for the
9490 * device's current profile information.
9492 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9499 set_bit(__I40E_DOWN, &pf->state);
9504 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9505 I40E_MAX_CSR_SPACE);
9507 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
9510 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9511 (unsigned int)pci_resource_start(pdev, 0),
9512 (unsigned int)pci_resource_len(pdev, 0), err);
9515 hw->vendor_id = pdev->vendor;
9516 hw->device_id = pdev->device;
9517 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9518 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9519 hw->subsystem_device_id = pdev->subsystem_device;
9520 hw->bus.device = PCI_SLOT(pdev->devfn);
9521 hw->bus.func = PCI_FUNC(pdev->devfn);
9522 pf->instance = pfs_found;
9525 pf->msg_enable = pf->hw.debug_mask;
9526 pf->msg_enable = debug;
9529 /* do a special CORER for clearing PXE mode once at init */
9530 if (hw->revision_id == 0 &&
9531 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9532 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9537 i40e_clear_pxe_mode(hw);
9540 /* Reset here to make sure all is clean and to define PF 'n' */
9542 err = i40e_pf_reset(hw);
9544 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9549 hw->aq.num_arq_entries = I40E_AQ_LEN;
9550 hw->aq.num_asq_entries = I40E_AQ_LEN;
9551 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9552 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9553 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9555 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9557 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9559 err = i40e_init_shared_code(hw);
9561 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9565 /* set up a default setting for link flow control */
9566 pf->hw.fc.requested_mode = I40E_FC_NONE;
9568 err = i40e_init_adminq(hw);
9569 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9571 dev_info(&pdev->dev,
9572 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9576 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9577 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9578 dev_info(&pdev->dev,
9579 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9580 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9581 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9582 dev_info(&pdev->dev,
9583 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9585 i40e_verify_eeprom(pf);
9587 /* Rev 0 hardware was never productized */
9588 if (hw->revision_id < 1)
9589 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9591 i40e_clear_pxe_mode(hw);
9592 err = i40e_get_capabilities(pf);
9594 goto err_adminq_setup;
9596 err = i40e_sw_init(pf);
9598 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9602 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9603 hw->func_caps.num_rx_qp,
9604 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9606 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9607 goto err_init_lan_hmc;
9610 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9612 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9614 goto err_configure_lan_hmc;
9617 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
9618 * Ignore error return codes because if it was already disabled via
9619 * hardware settings this will fail
9621 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
9622 (pf->hw.aq.fw_maj_ver < 4)) {
9623 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
9624 i40e_aq_stop_lldp(hw, true, NULL);
9627 i40e_get_mac_addr(hw, hw->mac.addr);
9628 if (!is_valid_ether_addr(hw->mac.addr)) {
9629 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9633 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9634 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9635 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9636 if (is_valid_ether_addr(hw->mac.port_addr))
9637 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9639 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9641 dev_info(&pdev->dev,
9642 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9643 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9644 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9646 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9648 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9649 #endif /* I40E_FCOE */
9651 pci_set_drvdata(pdev, pf);
9652 pci_save_state(pdev);
9653 #ifdef CONFIG_I40E_DCB
9654 err = i40e_init_pf_dcb(pf);
9656 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
9657 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9658 /* Continue without DCB enabled */
9660 #endif /* CONFIG_I40E_DCB */
9662 /* set up periodic task facility */
9663 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9664 pf->service_timer_period = HZ;
9666 INIT_WORK(&pf->service_task, i40e_service_task);
9667 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9668 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9669 pf->link_check_timeout = jiffies;
9671 /* WoL defaults to disabled */
9673 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9675 /* set up the main switch operations */
9676 i40e_determine_queue_usage(pf);
9677 i40e_init_interrupt_scheme(pf);
9679 /* The number of VSIs reported by the FW is the minimum guaranteed
9680 * to us; HW supports far more and we share the remaining pool with
9681 * the other PFs. We allocate space for more than the guarantee with
9682 * the understanding that we might not get them all later.
9684 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9685 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9687 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9689 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9690 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9691 pf->vsi = kzalloc(len, GFP_KERNEL);
9694 goto err_switch_setup;
9697 err = i40e_setup_pf_switch(pf, false);
9699 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9702 /* if FDIR VSI was set up, start it now */
9703 for (i = 0; i < pf->num_alloc_vsi; i++) {
9704 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9705 i40e_vsi_open(pf->vsi[i]);
9710 /* driver is only interested in link up/down and module qualification
9711 * reports from firmware
9713 err = i40e_aq_set_phy_int_mask(&pf->hw,
9714 I40E_AQ_EVENT_LINK_UPDOWN |
9715 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9717 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9719 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
9720 (pf->hw.aq.fw_maj_ver < 4)) {
9722 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9724 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9725 pf->hw.aq.asq_last_status);
9727 /* The main driver is (mostly) up and happy. We need to set this state
9728 * before setting up the misc vector or we get a race and the vector
9729 * ends up disabled forever.
9731 clear_bit(__I40E_DOWN, &pf->state);
9733 /* In case of MSIX we are going to setup the misc vector right here
9734 * to handle admin queue events etc. In case of legacy and MSI
9735 * the misc functionality and queue processing is combined in
9736 * the same vector and that gets setup at open.
9738 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9739 err = i40e_setup_misc_vector(pf);
9741 dev_info(&pdev->dev,
9742 "setup of misc vector failed: %d\n", err);
9747 #ifdef CONFIG_PCI_IOV
9748 /* prep for VF support */
9749 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9750 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9751 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9754 /* disable link interrupts for VFs */
9755 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9756 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9757 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9760 if (pci_num_vf(pdev)) {
9761 dev_info(&pdev->dev,
9762 "Active VFs found, allocating resources.\n");
9763 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9765 dev_info(&pdev->dev,
9766 "Error %d allocating resources for existing VFs\n",
9770 #endif /* CONFIG_PCI_IOV */
9774 i40e_dbg_pf_init(pf);
9776 /* tell the firmware that we're starting */
9777 i40e_send_version(pf);
9779 /* since everything's happy, start the service_task timer */
9780 mod_timer(&pf->service_timer,
9781 round_jiffies(jiffies + pf->service_timer_period));
9784 /* create FCoE interface */
9785 i40e_fcoe_vsi_setup(pf);
9788 /* Get the negotiated link width and speed from PCI config space */
9789 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9791 i40e_set_pci_config_data(hw, link_status);
9793 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9794 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9795 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9796 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9798 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9799 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9800 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9801 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9804 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9805 hw->bus.speed < i40e_bus_speed_8000) {
9806 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9807 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9810 /* get the requested speeds from the fw */
9811 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
9813 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n",
9815 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
9817 /* print a string summarizing features */
9818 i40e_print_features(pf);
9822 /* Unwind what we've done if something failed in the setup */
9824 set_bit(__I40E_DOWN, &pf->state);
9825 i40e_clear_interrupt_scheme(pf);
9828 i40e_reset_interrupt_capability(pf);
9829 del_timer_sync(&pf->service_timer);
9831 err_configure_lan_hmc:
9832 (void)i40e_shutdown_lan_hmc(hw);
9837 (void)i40e_shutdown_adminq(hw);
9839 iounmap(hw->hw_addr);
9843 pci_disable_pcie_error_reporting(pdev);
9844 pci_release_selected_regions(pdev,
9845 pci_select_bars(pdev, IORESOURCE_MEM));
9848 pci_disable_device(pdev);
9853 * i40e_remove - Device removal routine
9854 * @pdev: PCI device information struct
9856 * i40e_remove is called by the PCI subsystem to alert the driver
9857 * that is should release a PCI device. This could be caused by a
9858 * Hot-Plug event, or because the driver is going to be removed from
9861 static void i40e_remove(struct pci_dev *pdev)
9863 struct i40e_pf *pf = pci_get_drvdata(pdev);
9864 i40e_status ret_code;
9867 i40e_dbg_pf_exit(pf);
9871 /* no more scheduling of any task */
9872 set_bit(__I40E_DOWN, &pf->state);
9873 del_timer_sync(&pf->service_timer);
9874 cancel_work_sync(&pf->service_task);
9875 i40e_fdir_teardown(pf);
9877 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9879 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9882 i40e_fdir_teardown(pf);
9884 /* If there is a switch structure or any orphans, remove them.
9885 * This will leave only the PF's VSI remaining.
9887 for (i = 0; i < I40E_MAX_VEB; i++) {
9891 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9892 pf->veb[i]->uplink_seid == 0)
9893 i40e_switch_branch_release(pf->veb[i]);
9896 /* Now we can shutdown the PF's VSI, just before we kill
9899 if (pf->vsi[pf->lan_vsi])
9900 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9902 /* shutdown and destroy the HMC */
9903 if (pf->hw.hmc.hmc_obj) {
9904 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9906 dev_warn(&pdev->dev,
9907 "Failed to destroy the HMC resources: %d\n",
9911 /* shutdown the adminq */
9912 ret_code = i40e_shutdown_adminq(&pf->hw);
9914 dev_warn(&pdev->dev,
9915 "Failed to destroy the Admin Queue resources: %d\n",
9918 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9919 i40e_clear_interrupt_scheme(pf);
9920 for (i = 0; i < pf->num_alloc_vsi; i++) {
9922 i40e_vsi_clear_rings(pf->vsi[i]);
9923 i40e_vsi_clear(pf->vsi[i]);
9928 for (i = 0; i < I40E_MAX_VEB; i++) {
9936 iounmap(pf->hw.hw_addr);
9938 pci_release_selected_regions(pdev,
9939 pci_select_bars(pdev, IORESOURCE_MEM));
9941 pci_disable_pcie_error_reporting(pdev);
9942 pci_disable_device(pdev);
9946 * i40e_pci_error_detected - warning that something funky happened in PCI land
9947 * @pdev: PCI device information struct
9949 * Called to warn that something happened and the error handling steps
9950 * are in progress. Allows the driver to quiesce things, be ready for
9953 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9954 enum pci_channel_state error)
9956 struct i40e_pf *pf = pci_get_drvdata(pdev);
9958 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9960 /* shutdown all operations */
9961 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9963 i40e_prep_for_reset(pf);
9967 /* Request a slot reset */
9968 return PCI_ERS_RESULT_NEED_RESET;
9972 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9973 * @pdev: PCI device information struct
9975 * Called to find if the driver can work with the device now that
9976 * the pci slot has been reset. If a basic connection seems good
9977 * (registers are readable and have sane content) then return a
9978 * happy little PCI_ERS_RESULT_xxx.
9980 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9982 struct i40e_pf *pf = pci_get_drvdata(pdev);
9983 pci_ers_result_t result;
9987 dev_info(&pdev->dev, "%s\n", __func__);
9988 if (pci_enable_device_mem(pdev)) {
9989 dev_info(&pdev->dev,
9990 "Cannot re-enable PCI device after reset.\n");
9991 result = PCI_ERS_RESULT_DISCONNECT;
9993 pci_set_master(pdev);
9994 pci_restore_state(pdev);
9995 pci_save_state(pdev);
9996 pci_wake_from_d3(pdev, false);
9998 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10000 result = PCI_ERS_RESULT_RECOVERED;
10002 result = PCI_ERS_RESULT_DISCONNECT;
10005 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10007 dev_info(&pdev->dev,
10008 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10010 /* non-fatal, continue */
10017 * i40e_pci_error_resume - restart operations after PCI error recovery
10018 * @pdev: PCI device information struct
10020 * Called to allow the driver to bring things back up after PCI error
10021 * and/or reset recovery has finished.
10023 static void i40e_pci_error_resume(struct pci_dev *pdev)
10025 struct i40e_pf *pf = pci_get_drvdata(pdev);
10027 dev_info(&pdev->dev, "%s\n", __func__);
10028 if (test_bit(__I40E_SUSPENDED, &pf->state))
10032 i40e_handle_reset_warning(pf);
10037 * i40e_shutdown - PCI callback for shutting down
10038 * @pdev: PCI device information struct
10040 static void i40e_shutdown(struct pci_dev *pdev)
10042 struct i40e_pf *pf = pci_get_drvdata(pdev);
10043 struct i40e_hw *hw = &pf->hw;
10045 set_bit(__I40E_SUSPENDED, &pf->state);
10046 set_bit(__I40E_DOWN, &pf->state);
10048 i40e_prep_for_reset(pf);
10051 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10052 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10054 i40e_clear_interrupt_scheme(pf);
10056 if (system_state == SYSTEM_POWER_OFF) {
10057 pci_wake_from_d3(pdev, pf->wol_en);
10058 pci_set_power_state(pdev, PCI_D3hot);
10064 * i40e_suspend - PCI callback for moving to D3
10065 * @pdev: PCI device information struct
10067 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10069 struct i40e_pf *pf = pci_get_drvdata(pdev);
10070 struct i40e_hw *hw = &pf->hw;
10072 set_bit(__I40E_SUSPENDED, &pf->state);
10073 set_bit(__I40E_DOWN, &pf->state);
10074 del_timer_sync(&pf->service_timer);
10075 cancel_work_sync(&pf->service_task);
10077 i40e_prep_for_reset(pf);
10080 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10081 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10083 pci_wake_from_d3(pdev, pf->wol_en);
10084 pci_set_power_state(pdev, PCI_D3hot);
10090 * i40e_resume - PCI callback for waking up from D3
10091 * @pdev: PCI device information struct
10093 static int i40e_resume(struct pci_dev *pdev)
10095 struct i40e_pf *pf = pci_get_drvdata(pdev);
10098 pci_set_power_state(pdev, PCI_D0);
10099 pci_restore_state(pdev);
10100 /* pci_restore_state() clears dev->state_saves, so
10101 * call pci_save_state() again to restore it.
10103 pci_save_state(pdev);
10105 err = pci_enable_device_mem(pdev);
10107 dev_err(&pdev->dev,
10108 "%s: Cannot enable PCI device from suspend\n",
10112 pci_set_master(pdev);
10114 /* no wakeup events while running */
10115 pci_wake_from_d3(pdev, false);
10117 /* handling the reset will rebuild the device state */
10118 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10119 clear_bit(__I40E_DOWN, &pf->state);
10121 i40e_reset_and_rebuild(pf, false);
10129 static const struct pci_error_handlers i40e_err_handler = {
10130 .error_detected = i40e_pci_error_detected,
10131 .slot_reset = i40e_pci_error_slot_reset,
10132 .resume = i40e_pci_error_resume,
10135 static struct pci_driver i40e_driver = {
10136 .name = i40e_driver_name,
10137 .id_table = i40e_pci_tbl,
10138 .probe = i40e_probe,
10139 .remove = i40e_remove,
10141 .suspend = i40e_suspend,
10142 .resume = i40e_resume,
10144 .shutdown = i40e_shutdown,
10145 .err_handler = &i40e_err_handler,
10146 .sriov_configure = i40e_pci_sriov_configure,
10150 * i40e_init_module - Driver registration routine
10152 * i40e_init_module is the first routine called when the driver is
10153 * loaded. All it does is register with the PCI subsystem.
10155 static int __init i40e_init_module(void)
10157 pr_info("%s: %s - version %s\n", i40e_driver_name,
10158 i40e_driver_string, i40e_driver_version_str);
10159 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10161 #if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
10162 i40e_configfs_init();
10163 #endif /* CONFIG_I40E_CONFIGFS_FS */
10165 return pci_register_driver(&i40e_driver);
10167 module_init(i40e_init_module);
10170 * i40e_exit_module - Driver exit cleanup routine
10172 * i40e_exit_module is called just before the driver is removed
10175 static void __exit i40e_exit_module(void)
10177 pci_unregister_driver(&i40e_driver);
10179 #if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
10180 i40e_configfs_exit();
10181 #endif /* CONFIG_I40E_CONFIGFS_FS */
10183 module_exit(i40e_exit_module);