1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #ifdef CONFIG_I40E_VXLAN
30 #include <net/vxlan.h>
33 const char i40e_driver_name[] = "i40e";
34 static const char i40e_driver_string[] =
35 "Intel(R) Ethernet Connection XL710 Network Driver";
39 #define DRV_VERSION_MAJOR 0
40 #define DRV_VERSION_MINOR 3
41 #define DRV_VERSION_BUILD 32
42 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
43 __stringify(DRV_VERSION_MINOR) "." \
44 __stringify(DRV_VERSION_BUILD) DRV_KERN
45 const char i40e_driver_version_str[] = DRV_VERSION;
46 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48 /* a bit of forward declarations */
49 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
50 static void i40e_handle_reset_warning(struct i40e_pf *pf);
51 static int i40e_add_vsi(struct i40e_vsi *vsi);
52 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
53 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
54 static int i40e_setup_misc_vector(struct i40e_pf *pf);
55 static void i40e_determine_queue_usage(struct i40e_pf *pf);
56 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
57 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
58 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60 /* i40e_pci_tbl - PCI Device ID Table
62 * Last entry must be all 0s
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
67 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_D), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
273 static void i40e_tx_timeout(struct net_device *netdev)
275 struct i40e_netdev_priv *np = netdev_priv(netdev);
276 struct i40e_vsi *vsi = np->vsi;
277 struct i40e_pf *pf = vsi->back;
279 pf->tx_timeout_count++;
281 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
282 pf->tx_timeout_recovery_level = 0;
283 pf->tx_timeout_last_recovery = jiffies;
284 netdev_info(netdev, "tx_timeout recovery level %d\n",
285 pf->tx_timeout_recovery_level);
287 switch (pf->tx_timeout_recovery_level) {
289 /* disable and re-enable queues for the VSI */
290 if (in_interrupt()) {
291 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
292 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
294 i40e_vsi_reinit_locked(vsi);
298 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
301 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
304 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
307 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
308 set_bit(__I40E_DOWN, &vsi->state);
312 i40e_service_event_schedule(pf);
313 pf->tx_timeout_recovery_level++;
317 * i40e_release_rx_desc - Store the new tail and head values
318 * @rx_ring: ring to bump
319 * @val: new head index
321 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
323 rx_ring->next_to_use = val;
325 /* Force memory writes to complete before letting h/w
326 * know there are new descriptors to fetch. (Only
327 * applicable for weak-ordered memory model archs,
331 writel(val, rx_ring->tail);
335 * i40e_get_vsi_stats_struct - Get System Network Statistics
336 * @vsi: the VSI we care about
338 * Returns the address of the device statistics structure.
339 * The statistics are actually updated from the service task.
341 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
343 return &vsi->net_stats;
347 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
348 * @netdev: network interface device structure
350 * Returns the address of the device statistics structure.
351 * The statistics are actually updated from the service task.
353 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
354 struct net_device *netdev,
355 struct rtnl_link_stats64 *stats)
357 struct i40e_netdev_priv *np = netdev_priv(netdev);
358 struct i40e_vsi *vsi = np->vsi;
359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
362 if (test_bit(__I40E_DOWN, &vsi->state))
369 for (i = 0; i < vsi->num_queue_pairs; i++) {
370 struct i40e_ring *tx_ring, *rx_ring;
374 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
379 start = u64_stats_fetch_begin_bh(&tx_ring->syncp);
380 packets = tx_ring->stats.packets;
381 bytes = tx_ring->stats.bytes;
382 } while (u64_stats_fetch_retry_bh(&tx_ring->syncp, start));
384 stats->tx_packets += packets;
385 stats->tx_bytes += bytes;
386 rx_ring = &tx_ring[1];
389 start = u64_stats_fetch_begin_bh(&rx_ring->syncp);
390 packets = rx_ring->stats.packets;
391 bytes = rx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_bh(&rx_ring->syncp, start));
394 stats->rx_packets += packets;
395 stats->rx_bytes += bytes;
399 /* following stats updated by ixgbe_watchdog_task() */
400 stats->multicast = vsi_stats->multicast;
401 stats->tx_errors = vsi_stats->tx_errors;
402 stats->tx_dropped = vsi_stats->tx_dropped;
403 stats->rx_errors = vsi_stats->rx_errors;
404 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
405 stats->rx_length_errors = vsi_stats->rx_length_errors;
411 * i40e_vsi_reset_stats - Resets all stats of the given vsi
412 * @vsi: the VSI to have its stats reset
414 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
416 struct rtnl_link_stats64 *ns;
422 ns = i40e_get_vsi_stats_struct(vsi);
423 memset(ns, 0, sizeof(*ns));
424 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
425 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
426 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
427 if (vsi->rx_rings && vsi->rx_rings[0]) {
428 for (i = 0; i < vsi->num_queue_pairs; i++) {
429 memset(&vsi->rx_rings[i]->stats, 0 ,
430 sizeof(vsi->rx_rings[i]->stats));
431 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
432 sizeof(vsi->rx_rings[i]->rx_stats));
433 memset(&vsi->tx_rings[i]->stats, 0 ,
434 sizeof(vsi->tx_rings[i]->stats));
435 memset(&vsi->tx_rings[i]->tx_stats, 0,
436 sizeof(vsi->tx_rings[i]->tx_stats));
439 vsi->stat_offsets_loaded = false;
443 * i40e_pf_reset_stats - Reset all of the stats for the given pf
444 * @pf: the PF to be reset
446 void i40e_pf_reset_stats(struct i40e_pf *pf)
448 memset(&pf->stats, 0, sizeof(pf->stats));
449 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
450 pf->stat_offsets_loaded = false;
454 * i40e_stat_update48 - read and update a 48 bit stat from the chip
455 * @hw: ptr to the hardware info
456 * @hireg: the high 32 bit reg to read
457 * @loreg: the low 32 bit reg to read
458 * @offset_loaded: has the initial offset been loaded yet
459 * @offset: ptr to current offset value
460 * @stat: ptr to the stat
462 * Since the device stats are not reset at PFReset, they likely will not
463 * be zeroed when the driver starts. We'll save the first values read
464 * and use them as offsets to be subtracted from the raw values in order
465 * to report stats that count from zero. In the process, we also manage
466 * the potential roll-over.
468 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
469 bool offset_loaded, u64 *offset, u64 *stat)
473 if (hw->device_id == I40E_DEV_ID_QEMU) {
474 new_data = rd32(hw, loreg);
475 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
477 new_data = rd64(hw, loreg);
481 if (likely(new_data >= *offset))
482 *stat = new_data - *offset;
484 *stat = (new_data + ((u64)1 << 48)) - *offset;
485 *stat &= 0xFFFFFFFFFFFFULL;
489 * i40e_stat_update32 - read and update a 32 bit stat from the chip
490 * @hw: ptr to the hardware info
491 * @reg: the hw reg to read
492 * @offset_loaded: has the initial offset been loaded yet
493 * @offset: ptr to current offset value
494 * @stat: ptr to the stat
496 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
497 bool offset_loaded, u64 *offset, u64 *stat)
501 new_data = rd32(hw, reg);
504 if (likely(new_data >= *offset))
505 *stat = (u32)(new_data - *offset);
507 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
511 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
512 * @vsi: the VSI to be updated
514 void i40e_update_eth_stats(struct i40e_vsi *vsi)
516 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
517 struct i40e_pf *pf = vsi->back;
518 struct i40e_hw *hw = &pf->hw;
519 struct i40e_eth_stats *oes;
520 struct i40e_eth_stats *es; /* device's eth stats */
522 es = &vsi->eth_stats;
523 oes = &vsi->eth_stats_offsets;
525 /* Gather up the stats that the hw collects */
526 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
527 vsi->stat_offsets_loaded,
528 &oes->tx_errors, &es->tx_errors);
529 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
530 vsi->stat_offsets_loaded,
531 &oes->rx_discards, &es->rx_discards);
533 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
534 I40E_GLV_GORCL(stat_idx),
535 vsi->stat_offsets_loaded,
536 &oes->rx_bytes, &es->rx_bytes);
537 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
538 I40E_GLV_UPRCL(stat_idx),
539 vsi->stat_offsets_loaded,
540 &oes->rx_unicast, &es->rx_unicast);
541 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
542 I40E_GLV_MPRCL(stat_idx),
543 vsi->stat_offsets_loaded,
544 &oes->rx_multicast, &es->rx_multicast);
545 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
546 I40E_GLV_BPRCL(stat_idx),
547 vsi->stat_offsets_loaded,
548 &oes->rx_broadcast, &es->rx_broadcast);
550 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
551 I40E_GLV_GOTCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->tx_bytes, &es->tx_bytes);
554 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
555 I40E_GLV_UPTCL(stat_idx),
556 vsi->stat_offsets_loaded,
557 &oes->tx_unicast, &es->tx_unicast);
558 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
559 I40E_GLV_MPTCL(stat_idx),
560 vsi->stat_offsets_loaded,
561 &oes->tx_multicast, &es->tx_multicast);
562 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
563 I40E_GLV_BPTCL(stat_idx),
564 vsi->stat_offsets_loaded,
565 &oes->tx_broadcast, &es->tx_broadcast);
566 vsi->stat_offsets_loaded = true;
570 * i40e_update_veb_stats - Update Switch component statistics
571 * @veb: the VEB being updated
573 static void i40e_update_veb_stats(struct i40e_veb *veb)
575 struct i40e_pf *pf = veb->pf;
576 struct i40e_hw *hw = &pf->hw;
577 struct i40e_eth_stats *oes;
578 struct i40e_eth_stats *es; /* device's eth stats */
581 idx = veb->stats_idx;
583 oes = &veb->stats_offsets;
585 /* Gather up the stats that the hw collects */
586 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
587 veb->stat_offsets_loaded,
588 &oes->tx_discards, &es->tx_discards);
589 if (hw->revision_id > 0)
590 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
591 veb->stat_offsets_loaded,
592 &oes->rx_unknown_protocol,
593 &es->rx_unknown_protocol);
594 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
595 veb->stat_offsets_loaded,
596 &oes->rx_bytes, &es->rx_bytes);
597 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
598 veb->stat_offsets_loaded,
599 &oes->rx_unicast, &es->rx_unicast);
600 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
601 veb->stat_offsets_loaded,
602 &oes->rx_multicast, &es->rx_multicast);
603 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
604 veb->stat_offsets_loaded,
605 &oes->rx_broadcast, &es->rx_broadcast);
607 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
608 veb->stat_offsets_loaded,
609 &oes->tx_bytes, &es->tx_bytes);
610 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
611 veb->stat_offsets_loaded,
612 &oes->tx_unicast, &es->tx_unicast);
613 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
614 veb->stat_offsets_loaded,
615 &oes->tx_multicast, &es->tx_multicast);
616 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
617 veb->stat_offsets_loaded,
618 &oes->tx_broadcast, &es->tx_broadcast);
619 veb->stat_offsets_loaded = true;
623 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
624 * @pf: the corresponding PF
626 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
628 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
630 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
631 struct i40e_hw_port_stats *nsd = &pf->stats;
632 struct i40e_hw *hw = &pf->hw;
636 if ((hw->fc.current_mode != I40E_FC_FULL) &&
637 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
640 xoff = nsd->link_xoff_rx;
641 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
642 pf->stat_offsets_loaded,
643 &osd->link_xoff_rx, &nsd->link_xoff_rx);
645 /* No new LFC xoff rx */
646 if (!(nsd->link_xoff_rx - xoff))
649 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
650 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
651 struct i40e_vsi *vsi = pf->vsi[v];
656 for (i = 0; i < vsi->num_queue_pairs; i++) {
657 struct i40e_ring *ring = vsi->tx_rings[i];
658 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
664 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
665 * @pf: the corresponding PF
667 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
669 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
671 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
672 struct i40e_hw_port_stats *nsd = &pf->stats;
673 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
674 struct i40e_dcbx_config *dcb_cfg;
675 struct i40e_hw *hw = &pf->hw;
679 dcb_cfg = &hw->local_dcbx_config;
681 /* See if DCB enabled with PFC TC */
682 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
683 !(dcb_cfg->pfc.pfcenable)) {
684 i40e_update_link_xoff_rx(pf);
688 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
689 u64 prio_xoff = nsd->priority_xoff_rx[i];
690 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
691 pf->stat_offsets_loaded,
692 &osd->priority_xoff_rx[i],
693 &nsd->priority_xoff_rx[i]);
695 /* No new PFC xoff rx */
696 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
698 /* Get the TC for given priority */
699 tc = dcb_cfg->etscfg.prioritytable[i];
703 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
704 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
705 struct i40e_vsi *vsi = pf->vsi[v];
710 for (i = 0; i < vsi->num_queue_pairs; i++) {
711 struct i40e_ring *ring = vsi->tx_rings[i];
715 clear_bit(__I40E_HANG_CHECK_ARMED,
722 * i40e_update_stats - Update the board statistics counters.
723 * @vsi: the VSI to be updated
725 * There are a few instances where we store the same stat in a
726 * couple of different structs. This is partly because we have
727 * the netdev stats that need to be filled out, which is slightly
728 * different from the "eth_stats" defined by the chip and used in
729 * VF communications. We sort it all out here in a central place.
731 void i40e_update_stats(struct i40e_vsi *vsi)
733 struct i40e_pf *pf = vsi->back;
734 struct i40e_hw *hw = &pf->hw;
735 struct rtnl_link_stats64 *ons;
736 struct rtnl_link_stats64 *ns; /* netdev stats */
737 struct i40e_eth_stats *oes;
738 struct i40e_eth_stats *es; /* device's eth stats */
739 u32 tx_restart, tx_busy;
746 if (test_bit(__I40E_DOWN, &vsi->state) ||
747 test_bit(__I40E_CONFIG_BUSY, &pf->state))
750 ns = i40e_get_vsi_stats_struct(vsi);
751 ons = &vsi->net_stats_offsets;
752 es = &vsi->eth_stats;
753 oes = &vsi->eth_stats_offsets;
755 /* Gather up the netdev and vsi stats that the driver collects
756 * on the fly during packet processing
760 tx_restart = tx_busy = 0;
764 for (q = 0; q < vsi->num_queue_pairs; q++) {
770 p = ACCESS_ONCE(vsi->tx_rings[q]);
773 start = u64_stats_fetch_begin_bh(&p->syncp);
774 packets = p->stats.packets;
775 bytes = p->stats.bytes;
776 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
779 tx_restart += p->tx_stats.restart_queue;
780 tx_busy += p->tx_stats.tx_busy;
782 /* Rx queue is part of the same block as Tx queue */
785 start = u64_stats_fetch_begin_bh(&p->syncp);
786 packets = p->stats.packets;
787 bytes = p->stats.bytes;
788 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
791 rx_buf += p->rx_stats.alloc_buff_failed;
792 rx_page += p->rx_stats.alloc_page_failed;
795 vsi->tx_restart = tx_restart;
796 vsi->tx_busy = tx_busy;
797 vsi->rx_page_failed = rx_page;
798 vsi->rx_buf_failed = rx_buf;
800 ns->rx_packets = rx_p;
802 ns->tx_packets = tx_p;
805 i40e_update_eth_stats(vsi);
806 /* update netdev stats from eth stats */
807 ons->rx_errors = oes->rx_errors;
808 ns->rx_errors = es->rx_errors;
809 ons->tx_errors = oes->tx_errors;
810 ns->tx_errors = es->tx_errors;
811 ons->multicast = oes->rx_multicast;
812 ns->multicast = es->rx_multicast;
813 ons->tx_dropped = oes->tx_discards;
814 ns->tx_dropped = es->tx_discards;
816 /* Get the port data only if this is the main PF VSI */
817 if (vsi == pf->vsi[pf->lan_vsi]) {
818 struct i40e_hw_port_stats *nsd = &pf->stats;
819 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
821 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
822 I40E_GLPRT_GORCL(hw->port),
823 pf->stat_offsets_loaded,
824 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
825 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
826 I40E_GLPRT_GOTCL(hw->port),
827 pf->stat_offsets_loaded,
828 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
829 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
830 pf->stat_offsets_loaded,
831 &osd->eth.rx_discards,
832 &nsd->eth.rx_discards);
833 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
834 pf->stat_offsets_loaded,
835 &osd->eth.tx_discards,
836 &nsd->eth.tx_discards);
837 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
838 I40E_GLPRT_MPRCL(hw->port),
839 pf->stat_offsets_loaded,
840 &osd->eth.rx_multicast,
841 &nsd->eth.rx_multicast);
843 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
844 pf->stat_offsets_loaded,
845 &osd->tx_dropped_link_down,
846 &nsd->tx_dropped_link_down);
848 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
849 pf->stat_offsets_loaded,
850 &osd->crc_errors, &nsd->crc_errors);
851 ns->rx_crc_errors = nsd->crc_errors;
853 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
854 pf->stat_offsets_loaded,
855 &osd->illegal_bytes, &nsd->illegal_bytes);
856 ns->rx_errors = nsd->crc_errors
857 + nsd->illegal_bytes;
859 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->mac_local_faults,
862 &nsd->mac_local_faults);
863 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
864 pf->stat_offsets_loaded,
865 &osd->mac_remote_faults,
866 &nsd->mac_remote_faults);
868 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
869 pf->stat_offsets_loaded,
870 &osd->rx_length_errors,
871 &nsd->rx_length_errors);
872 ns->rx_length_errors = nsd->rx_length_errors;
874 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->link_xon_rx, &nsd->link_xon_rx);
877 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
878 pf->stat_offsets_loaded,
879 &osd->link_xon_tx, &nsd->link_xon_tx);
880 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
881 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
882 pf->stat_offsets_loaded,
883 &osd->link_xoff_tx, &nsd->link_xoff_tx);
885 for (i = 0; i < 8; i++) {
886 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
887 pf->stat_offsets_loaded,
888 &osd->priority_xon_rx[i],
889 &nsd->priority_xon_rx[i]);
890 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
891 pf->stat_offsets_loaded,
892 &osd->priority_xon_tx[i],
893 &nsd->priority_xon_tx[i]);
894 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
895 pf->stat_offsets_loaded,
896 &osd->priority_xoff_tx[i],
897 &nsd->priority_xoff_tx[i]);
898 i40e_stat_update32(hw,
899 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
900 pf->stat_offsets_loaded,
901 &osd->priority_xon_2_xoff[i],
902 &nsd->priority_xon_2_xoff[i]);
905 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
906 I40E_GLPRT_PRC64L(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->rx_size_64, &nsd->rx_size_64);
909 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
910 I40E_GLPRT_PRC127L(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->rx_size_127, &nsd->rx_size_127);
913 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
914 I40E_GLPRT_PRC255L(hw->port),
915 pf->stat_offsets_loaded,
916 &osd->rx_size_255, &nsd->rx_size_255);
917 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
918 I40E_GLPRT_PRC511L(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->rx_size_511, &nsd->rx_size_511);
921 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
922 I40E_GLPRT_PRC1023L(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->rx_size_1023, &nsd->rx_size_1023);
925 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
926 I40E_GLPRT_PRC1522L(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->rx_size_1522, &nsd->rx_size_1522);
929 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
930 I40E_GLPRT_PRC9522L(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->rx_size_big, &nsd->rx_size_big);
934 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
935 I40E_GLPRT_PTC64L(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->tx_size_64, &nsd->tx_size_64);
938 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
939 I40E_GLPRT_PTC127L(hw->port),
940 pf->stat_offsets_loaded,
941 &osd->tx_size_127, &nsd->tx_size_127);
942 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
943 I40E_GLPRT_PTC255L(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->tx_size_255, &nsd->tx_size_255);
946 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
947 I40E_GLPRT_PTC511L(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->tx_size_511, &nsd->tx_size_511);
950 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
951 I40E_GLPRT_PTC1023L(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->tx_size_1023, &nsd->tx_size_1023);
954 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
955 I40E_GLPRT_PTC1522L(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->tx_size_1522, &nsd->tx_size_1522);
958 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
959 I40E_GLPRT_PTC9522L(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->tx_size_big, &nsd->tx_size_big);
963 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->rx_undersize, &nsd->rx_undersize);
966 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_fragments, &nsd->rx_fragments);
969 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
970 pf->stat_offsets_loaded,
971 &osd->rx_oversize, &nsd->rx_oversize);
972 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->rx_jabber, &nsd->rx_jabber);
977 pf->stat_offsets_loaded = true;
981 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
982 * @vsi: the VSI to be searched
983 * @macaddr: the MAC address
985 * @is_vf: make sure its a vf filter, else doesn't matter
986 * @is_netdev: make sure its a netdev filter, else doesn't matter
988 * Returns ptr to the filter object or NULL
990 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
991 u8 *macaddr, s16 vlan,
992 bool is_vf, bool is_netdev)
994 struct i40e_mac_filter *f;
996 if (!vsi || !macaddr)
999 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1000 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1001 (vlan == f->vlan) &&
1002 (!is_vf || f->is_vf) &&
1003 (!is_netdev || f->is_netdev))
1010 * i40e_find_mac - Find a mac addr in the macvlan filters list
1011 * @vsi: the VSI to be searched
1012 * @macaddr: the MAC address we are searching for
1013 * @is_vf: make sure its a vf filter, else doesn't matter
1014 * @is_netdev: make sure its a netdev filter, else doesn't matter
1016 * Returns the first filter with the provided MAC address or NULL if
1017 * MAC address was not found
1019 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1020 bool is_vf, bool is_netdev)
1022 struct i40e_mac_filter *f;
1024 if (!vsi || !macaddr)
1027 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1028 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1029 (!is_vf || f->is_vf) &&
1030 (!is_netdev || f->is_netdev))
1037 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1038 * @vsi: the VSI to be searched
1040 * Returns true if VSI is in vlan mode or false otherwise
1042 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1044 struct i40e_mac_filter *f;
1046 /* Only -1 for all the filters denotes not in vlan mode
1047 * so we have to go through all the list in order to make sure
1049 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1058 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1059 * @vsi: the VSI to be searched
1060 * @macaddr: the mac address to be filtered
1061 * @is_vf: true if it is a vf
1062 * @is_netdev: true if it is a netdev
1064 * Goes through all the macvlan filters and adds a
1065 * macvlan filter for each unique vlan that already exists
1067 * Returns first filter found on success, else NULL
1069 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1070 bool is_vf, bool is_netdev)
1072 struct i40e_mac_filter *f;
1074 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1075 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1076 is_vf, is_netdev)) {
1077 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1083 return list_first_entry_or_null(&vsi->mac_filter_list,
1084 struct i40e_mac_filter, list);
1088 * i40e_add_filter - Add a mac/vlan filter to the VSI
1089 * @vsi: the VSI to be searched
1090 * @macaddr: the MAC address
1092 * @is_vf: make sure its a vf filter, else doesn't matter
1093 * @is_netdev: make sure its a netdev filter, else doesn't matter
1095 * Returns ptr to the filter object or NULL when no memory available.
1097 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1098 u8 *macaddr, s16 vlan,
1099 bool is_vf, bool is_netdev)
1101 struct i40e_mac_filter *f;
1103 if (!vsi || !macaddr)
1106 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1108 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1110 goto add_filter_out;
1112 memcpy(f->macaddr, macaddr, ETH_ALEN);
1116 INIT_LIST_HEAD(&f->list);
1117 list_add(&f->list, &vsi->mac_filter_list);
1120 /* increment counter and add a new flag if needed */
1126 } else if (is_netdev) {
1127 if (!f->is_netdev) {
1128 f->is_netdev = true;
1135 /* changed tells sync_filters_subtask to
1136 * push the filter down to the firmware
1139 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1140 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1148 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1149 * @vsi: the VSI to be searched
1150 * @macaddr: the MAC address
1152 * @is_vf: make sure it's a vf filter, else doesn't matter
1153 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1155 void i40e_del_filter(struct i40e_vsi *vsi,
1156 u8 *macaddr, s16 vlan,
1157 bool is_vf, bool is_netdev)
1159 struct i40e_mac_filter *f;
1161 if (!vsi || !macaddr)
1164 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1165 if (!f || f->counter == 0)
1173 } else if (is_netdev) {
1175 f->is_netdev = false;
1179 /* make sure we don't remove a filter in use by vf or netdev */
1181 min_f += (f->is_vf ? 1 : 0);
1182 min_f += (f->is_netdev ? 1 : 0);
1184 if (f->counter > min_f)
1188 /* counter == 0 tells sync_filters_subtask to
1189 * remove the filter from the firmware's list
1191 if (f->counter == 0) {
1193 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1194 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1199 * i40e_set_mac - NDO callback to set mac address
1200 * @netdev: network interface device structure
1201 * @p: pointer to an address structure
1203 * Returns 0 on success, negative on failure
1205 static int i40e_set_mac(struct net_device *netdev, void *p)
1207 struct i40e_netdev_priv *np = netdev_priv(netdev);
1208 struct i40e_vsi *vsi = np->vsi;
1209 struct sockaddr *addr = p;
1210 struct i40e_mac_filter *f;
1212 if (!is_valid_ether_addr(addr->sa_data))
1213 return -EADDRNOTAVAIL;
1215 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1217 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1220 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1221 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1222 return -EADDRNOTAVAIL;
1224 if (vsi->type == I40E_VSI_MAIN) {
1226 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1227 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1228 addr->sa_data, NULL);
1231 "Addr change for Main VSI failed: %d\n",
1233 return -EADDRNOTAVAIL;
1236 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1239 /* In order to be sure to not drop any packets, add the new address
1240 * then delete the old one.
1242 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1246 i40e_sync_vsi_filters(vsi);
1247 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1248 i40e_sync_vsi_filters(vsi);
1250 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1256 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1257 * @vsi: the VSI being setup
1258 * @ctxt: VSI context structure
1259 * @enabled_tc: Enabled TCs bitmap
1260 * @is_add: True if called before Add VSI
1262 * Setup VSI queue mapping for enabled traffic classes.
1264 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1265 struct i40e_vsi_context *ctxt,
1269 struct i40e_pf *pf = vsi->back;
1279 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1282 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1283 /* Find numtc from enabled TC bitmap */
1284 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1285 if (enabled_tc & (1 << i)) /* TC is enabled */
1289 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1293 /* At least TC0 is enabled in case of non-DCB case */
1297 vsi->tc_config.numtc = numtc;
1298 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1299 /* Number of queues per enabled TC */
1300 num_tc_qps = rounddown_pow_of_two(vsi->alloc_queue_pairs/numtc);
1301 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1303 /* Setup queue offset/count for all TCs for given VSI */
1304 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1305 /* See if the given TC is enabled for the given VSI */
1306 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1309 switch (vsi->type) {
1311 qcount = min_t(int, pf->rss_size, num_tc_qps);
1314 case I40E_VSI_SRIOV:
1315 case I40E_VSI_VMDQ2:
1317 qcount = num_tc_qps;
1321 vsi->tc_config.tc_info[i].qoffset = offset;
1322 vsi->tc_config.tc_info[i].qcount = qcount;
1324 /* find the power-of-2 of the number of queue pairs */
1327 while (num_qps && ((1 << pow) < qcount)) {
1332 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1334 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1335 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1339 /* TC is not enabled so set the offset to
1340 * default queue and allocate one queue
1343 vsi->tc_config.tc_info[i].qoffset = 0;
1344 vsi->tc_config.tc_info[i].qcount = 1;
1345 vsi->tc_config.tc_info[i].netdev_tc = 0;
1349 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1352 /* Set actual Tx/Rx queue pairs */
1353 vsi->num_queue_pairs = offset;
1355 /* Scheduler section valid can only be set for ADD VSI */
1357 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1359 ctxt->info.up_enable_bits = enabled_tc;
1361 if (vsi->type == I40E_VSI_SRIOV) {
1362 ctxt->info.mapping_flags |=
1363 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1364 for (i = 0; i < vsi->num_queue_pairs; i++)
1365 ctxt->info.queue_mapping[i] =
1366 cpu_to_le16(vsi->base_queue + i);
1368 ctxt->info.mapping_flags |=
1369 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1370 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1372 ctxt->info.valid_sections |= cpu_to_le16(sections);
1376 * i40e_set_rx_mode - NDO callback to set the netdev filters
1377 * @netdev: network interface device structure
1379 static void i40e_set_rx_mode(struct net_device *netdev)
1381 struct i40e_netdev_priv *np = netdev_priv(netdev);
1382 struct i40e_mac_filter *f, *ftmp;
1383 struct i40e_vsi *vsi = np->vsi;
1384 struct netdev_hw_addr *uca;
1385 struct netdev_hw_addr *mca;
1386 struct netdev_hw_addr *ha;
1388 /* add addr if not already in the filter list */
1389 netdev_for_each_uc_addr(uca, netdev) {
1390 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1391 if (i40e_is_vsi_in_vlan(vsi))
1392 i40e_put_mac_in_vlan(vsi, uca->addr,
1395 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1400 netdev_for_each_mc_addr(mca, netdev) {
1401 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1402 if (i40e_is_vsi_in_vlan(vsi))
1403 i40e_put_mac_in_vlan(vsi, mca->addr,
1406 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1411 /* remove filter if not in netdev list */
1412 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1418 if (is_multicast_ether_addr(f->macaddr)) {
1419 netdev_for_each_mc_addr(mca, netdev) {
1420 if (ether_addr_equal(mca->addr, f->macaddr)) {
1426 netdev_for_each_uc_addr(uca, netdev) {
1427 if (ether_addr_equal(uca->addr, f->macaddr)) {
1433 for_each_dev_addr(netdev, ha) {
1434 if (ether_addr_equal(ha->addr, f->macaddr)) {
1442 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1445 /* check for other flag changes */
1446 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1447 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1448 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1453 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1454 * @vsi: ptr to the VSI
1456 * Push any outstanding VSI filter changes through the AdminQ.
1458 * Returns 0 or error value
1460 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1462 struct i40e_mac_filter *f, *ftmp;
1463 bool promisc_forced_on = false;
1464 bool add_happened = false;
1465 int filter_list_len = 0;
1466 u32 changed_flags = 0;
1467 i40e_status aq_ret = 0;
1473 /* empty array typed pointers, kcalloc later */
1474 struct i40e_aqc_add_macvlan_element_data *add_list;
1475 struct i40e_aqc_remove_macvlan_element_data *del_list;
1477 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1478 usleep_range(1000, 2000);
1482 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1483 vsi->current_netdev_flags = vsi->netdev->flags;
1486 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1487 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1489 filter_list_len = pf->hw.aq.asq_buf_size /
1490 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1491 del_list = kcalloc(filter_list_len,
1492 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1497 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1501 if (f->counter != 0)
1506 /* add to delete list */
1507 memcpy(del_list[num_del].mac_addr,
1508 f->macaddr, ETH_ALEN);
1509 del_list[num_del].vlan_tag =
1510 cpu_to_le16((u16)(f->vlan ==
1511 I40E_VLAN_ANY ? 0 : f->vlan));
1513 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 del_list[num_del].flags = cmd_flags;
1517 /* unlink from filter list */
1521 /* flush a full buffer */
1522 if (num_del == filter_list_len) {
1523 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1524 vsi->seid, del_list, num_del,
1527 memset(del_list, 0, sizeof(*del_list));
1530 dev_info(&pf->pdev->dev,
1531 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1533 pf->hw.aq.asq_last_status);
1537 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1538 del_list, num_del, NULL);
1542 dev_info(&pf->pdev->dev,
1543 "ignoring delete macvlan error, err %d, aq_err %d\n",
1544 aq_ret, pf->hw.aq.asq_last_status);
1550 /* do all the adds now */
1551 filter_list_len = pf->hw.aq.asq_buf_size /
1552 sizeof(struct i40e_aqc_add_macvlan_element_data),
1553 add_list = kcalloc(filter_list_len,
1554 sizeof(struct i40e_aqc_add_macvlan_element_data),
1559 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1563 if (f->counter == 0)
1566 add_happened = true;
1569 /* add to add array */
1570 memcpy(add_list[num_add].mac_addr,
1571 f->macaddr, ETH_ALEN);
1572 add_list[num_add].vlan_tag =
1574 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1575 add_list[num_add].queue_number = 0;
1577 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1578 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1581 /* flush a full buffer */
1582 if (num_add == filter_list_len) {
1583 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1590 memset(add_list, 0, sizeof(*add_list));
1594 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1595 add_list, num_add, NULL);
1601 if (add_happened && (!aq_ret)) {
1603 } else if (add_happened && (aq_ret)) {
1604 dev_info(&pf->pdev->dev,
1605 "add filter failed, err %d, aq_err %d\n",
1606 aq_ret, pf->hw.aq.asq_last_status);
1607 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1608 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1610 promisc_forced_on = true;
1611 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1613 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1618 /* check for changes in promiscuous modes */
1619 if (changed_flags & IFF_ALLMULTI) {
1620 bool cur_multipromisc;
1621 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1622 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1627 dev_info(&pf->pdev->dev,
1628 "set multi promisc failed, err %d, aq_err %d\n",
1629 aq_ret, pf->hw.aq.asq_last_status);
1631 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1633 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1634 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1636 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1640 dev_info(&pf->pdev->dev,
1641 "set uni promisc failed, err %d, aq_err %d\n",
1642 aq_ret, pf->hw.aq.asq_last_status);
1643 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1647 dev_info(&pf->pdev->dev,
1648 "set brdcast promisc failed, err %d, aq_err %d\n",
1649 aq_ret, pf->hw.aq.asq_last_status);
1652 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1657 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1658 * @pf: board private structure
1660 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1664 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1666 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1668 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1670 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1671 i40e_sync_vsi_filters(pf->vsi[v]);
1676 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1677 * @netdev: network interface device structure
1678 * @new_mtu: new value for maximum frame size
1680 * Returns 0 on success, negative on failure
1682 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1684 struct i40e_netdev_priv *np = netdev_priv(netdev);
1685 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1686 struct i40e_vsi *vsi = np->vsi;
1688 /* MTU < 68 is an error and causes problems on some kernels */
1689 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1692 netdev_info(netdev, "changing MTU from %d to %d\n",
1693 netdev->mtu, new_mtu);
1694 netdev->mtu = new_mtu;
1695 if (netif_running(netdev))
1696 i40e_vsi_reinit_locked(vsi);
1702 * i40e_ioctl - Access the hwtstamp interface
1703 * @netdev: network interface device structure
1704 * @ifr: interface request data
1705 * @cmd: ioctl command
1707 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1709 struct i40e_netdev_priv *np = netdev_priv(netdev);
1710 struct i40e_pf *pf = np->vsi->back;
1714 return i40e_ptp_get_ts_config(pf, ifr);
1716 return i40e_ptp_set_ts_config(pf, ifr);
1723 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1724 * @vsi: the vsi being adjusted
1726 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1728 struct i40e_vsi_context ctxt;
1731 if ((vsi->info.valid_sections &
1732 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1733 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1734 return; /* already enabled */
1736 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1737 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1738 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1740 ctxt.seid = vsi->seid;
1741 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1742 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1744 dev_info(&vsi->back->pdev->dev,
1745 "%s: update vsi failed, aq_err=%d\n",
1746 __func__, vsi->back->hw.aq.asq_last_status);
1751 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1752 * @vsi: the vsi being adjusted
1754 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1756 struct i40e_vsi_context ctxt;
1759 if ((vsi->info.valid_sections &
1760 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1761 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1762 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1763 return; /* already disabled */
1765 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1766 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1767 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1769 ctxt.seid = vsi->seid;
1770 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1771 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1773 dev_info(&vsi->back->pdev->dev,
1774 "%s: update vsi failed, aq_err=%d\n",
1775 __func__, vsi->back->hw.aq.asq_last_status);
1780 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1781 * @netdev: network interface to be adjusted
1782 * @features: netdev features to test if VLAN offload is enabled or not
1784 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1786 struct i40e_netdev_priv *np = netdev_priv(netdev);
1787 struct i40e_vsi *vsi = np->vsi;
1789 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1790 i40e_vlan_stripping_enable(vsi);
1792 i40e_vlan_stripping_disable(vsi);
1796 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1797 * @vsi: the vsi being configured
1798 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1800 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1802 struct i40e_mac_filter *f, *add_f;
1803 bool is_netdev, is_vf;
1805 is_vf = (vsi->type == I40E_VSI_SRIOV);
1806 is_netdev = !!(vsi->netdev);
1809 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1812 dev_info(&vsi->back->pdev->dev,
1813 "Could not add vlan filter %d for %pM\n",
1814 vid, vsi->netdev->dev_addr);
1819 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1820 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1822 dev_info(&vsi->back->pdev->dev,
1823 "Could not add vlan filter %d for %pM\n",
1829 /* Now if we add a vlan tag, make sure to check if it is the first
1830 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1831 * with 0, so we now accept untagged and specified tagged traffic
1832 * (and not any taged and untagged)
1835 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1837 is_vf, is_netdev)) {
1838 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1839 I40E_VLAN_ANY, is_vf, is_netdev);
1840 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1843 dev_info(&vsi->back->pdev->dev,
1844 "Could not add filter 0 for %pM\n",
1845 vsi->netdev->dev_addr);
1851 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1852 if (vid > 0 && !vsi->info.pvid) {
1853 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1854 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1855 is_vf, is_netdev)) {
1856 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1858 add_f = i40e_add_filter(vsi, f->macaddr,
1859 0, is_vf, is_netdev);
1861 dev_info(&vsi->back->pdev->dev,
1862 "Could not add filter 0 for %pM\n",
1870 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1871 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1874 return i40e_sync_vsi_filters(vsi);
1878 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1879 * @vsi: the vsi being configured
1880 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1882 * Return: 0 on success or negative otherwise
1884 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1886 struct net_device *netdev = vsi->netdev;
1887 struct i40e_mac_filter *f, *add_f;
1888 bool is_vf, is_netdev;
1889 int filter_count = 0;
1891 is_vf = (vsi->type == I40E_VSI_SRIOV);
1892 is_netdev = !!(netdev);
1895 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1897 list_for_each_entry(f, &vsi->mac_filter_list, list)
1898 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1900 /* go through all the filters for this VSI and if there is only
1901 * vid == 0 it means there are no other filters, so vid 0 must
1902 * be replaced with -1. This signifies that we should from now
1903 * on accept any traffic (with any tag present, or untagged)
1905 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1908 ether_addr_equal(netdev->dev_addr, f->macaddr))
1916 if (!filter_count && is_netdev) {
1917 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1918 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1921 dev_info(&vsi->back->pdev->dev,
1922 "Could not add filter %d for %pM\n",
1923 I40E_VLAN_ANY, netdev->dev_addr);
1928 if (!filter_count) {
1929 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1930 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1931 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1934 dev_info(&vsi->back->pdev->dev,
1935 "Could not add filter %d for %pM\n",
1936 I40E_VLAN_ANY, f->macaddr);
1942 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1943 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1946 return i40e_sync_vsi_filters(vsi);
1950 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1951 * @netdev: network interface to be adjusted
1952 * @vid: vlan id to be added
1954 * net_device_ops implementation for adding vlan ids
1956 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1957 __always_unused __be16 proto, u16 vid)
1959 struct i40e_netdev_priv *np = netdev_priv(netdev);
1960 struct i40e_vsi *vsi = np->vsi;
1966 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1968 /* If the network stack called us with vid = 0 then
1969 * it is asking to receive priority tagged packets with
1970 * vlan id 0. Our HW receives them by default when configured
1971 * to receive untagged packets so there is no need to add an
1972 * extra filter for vlan 0 tagged packets.
1975 ret = i40e_vsi_add_vlan(vsi, vid);
1977 if (!ret && (vid < VLAN_N_VID))
1978 set_bit(vid, vsi->active_vlans);
1984 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
1985 * @netdev: network interface to be adjusted
1986 * @vid: vlan id to be removed
1988 * net_device_ops implementation for adding vlan ids
1990 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
1991 __always_unused __be16 proto, u16 vid)
1993 struct i40e_netdev_priv *np = netdev_priv(netdev);
1994 struct i40e_vsi *vsi = np->vsi;
1996 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
1998 /* return code is ignored as there is nothing a user
1999 * can do about failure to remove and a log message was
2000 * already printed from the other function
2002 i40e_vsi_kill_vlan(vsi, vid);
2004 clear_bit(vid, vsi->active_vlans);
2010 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2011 * @vsi: the vsi being brought back up
2013 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2020 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2022 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2023 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2028 * i40e_vsi_add_pvid - Add pvid for the VSI
2029 * @vsi: the vsi being adjusted
2030 * @vid: the vlan id to set as a PVID
2032 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2034 struct i40e_vsi_context ctxt;
2037 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2038 vsi->info.pvid = cpu_to_le16(vid);
2039 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2040 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2041 I40E_AQ_VSI_PVLAN_EMOD_STR;
2043 ctxt.seid = vsi->seid;
2044 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2045 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2047 dev_info(&vsi->back->pdev->dev,
2048 "%s: update vsi failed, aq_err=%d\n",
2049 __func__, vsi->back->hw.aq.asq_last_status);
2057 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2058 * @vsi: the vsi being adjusted
2060 * Just use the vlan_rx_register() service to put it back to normal
2062 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2064 i40e_vlan_stripping_disable(vsi);
2070 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2071 * @vsi: ptr to the VSI
2073 * If this function returns with an error, then it's possible one or
2074 * more of the rings is populated (while the rest are not). It is the
2075 * callers duty to clean those orphaned rings.
2077 * Return 0 on success, negative on failure
2079 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2083 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2084 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2090 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2091 * @vsi: ptr to the VSI
2093 * Free VSI's transmit software resources
2095 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2102 for (i = 0; i < vsi->num_queue_pairs; i++)
2103 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2104 i40e_free_tx_resources(vsi->tx_rings[i]);
2108 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2109 * @vsi: ptr to the VSI
2111 * If this function returns with an error, then it's possible one or
2112 * more of the rings is populated (while the rest are not). It is the
2113 * callers duty to clean those orphaned rings.
2115 * Return 0 on success, negative on failure
2117 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2121 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2122 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2127 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2128 * @vsi: ptr to the VSI
2130 * Free all receive software resources
2132 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2139 for (i = 0; i < vsi->num_queue_pairs; i++)
2140 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2141 i40e_free_rx_resources(vsi->rx_rings[i]);
2145 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2146 * @ring: The Tx ring to configure
2148 * Configure the Tx descriptor ring in the HMC context.
2150 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2152 struct i40e_vsi *vsi = ring->vsi;
2153 u16 pf_q = vsi->base_queue + ring->queue_index;
2154 struct i40e_hw *hw = &vsi->back->hw;
2155 struct i40e_hmc_obj_txq tx_ctx;
2156 i40e_status err = 0;
2159 /* some ATR related tx ring init */
2160 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2161 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2162 ring->atr_count = 0;
2164 ring->atr_sample_rate = 0;
2167 /* initialize XPS */
2168 if (ring->q_vector && ring->netdev &&
2169 vsi->tc_config.numtc <= 1 &&
2170 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2171 netif_set_xps_queue(ring->netdev,
2172 &ring->q_vector->affinity_mask,
2175 /* clear the context structure first */
2176 memset(&tx_ctx, 0, sizeof(tx_ctx));
2178 tx_ctx.new_context = 1;
2179 tx_ctx.base = (ring->dma / 128);
2180 tx_ctx.qlen = ring->count;
2181 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2182 I40E_FLAG_FD_ATR_ENABLED));
2183 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2185 /* As part of VSI creation/update, FW allocates certain
2186 * Tx arbitration queue sets for each TC enabled for
2187 * the VSI. The FW returns the handles to these queue
2188 * sets as part of the response buffer to Add VSI,
2189 * Update VSI, etc. AQ commands. It is expected that
2190 * these queue set handles be associated with the Tx
2191 * queues by the driver as part of the TX queue context
2192 * initialization. This has to be done regardless of
2193 * DCB as by default everything is mapped to TC0.
2195 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2196 tx_ctx.rdylist_act = 0;
2198 /* clear the context in the HMC */
2199 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2201 dev_info(&vsi->back->pdev->dev,
2202 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2203 ring->queue_index, pf_q, err);
2207 /* set the context in the HMC */
2208 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2210 dev_info(&vsi->back->pdev->dev,
2211 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2212 ring->queue_index, pf_q, err);
2216 /* Now associate this queue with this PCI function */
2217 if (vsi->type == I40E_VSI_VMDQ2)
2218 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2220 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2221 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2222 I40E_QTX_CTL_PF_INDX_MASK);
2223 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2226 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2228 /* cache tail off for easier writes later */
2229 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2235 * i40e_configure_rx_ring - Configure a receive ring context
2236 * @ring: The Rx ring to configure
2238 * Configure the Rx descriptor ring in the HMC context.
2240 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2242 struct i40e_vsi *vsi = ring->vsi;
2243 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2244 u16 pf_q = vsi->base_queue + ring->queue_index;
2245 struct i40e_hw *hw = &vsi->back->hw;
2246 struct i40e_hmc_obj_rxq rx_ctx;
2247 i40e_status err = 0;
2251 /* clear the context structure first */
2252 memset(&rx_ctx, 0, sizeof(rx_ctx));
2254 ring->rx_buf_len = vsi->rx_buf_len;
2255 ring->rx_hdr_len = vsi->rx_hdr_len;
2257 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2258 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2260 rx_ctx.base = (ring->dma / 128);
2261 rx_ctx.qlen = ring->count;
2263 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2264 set_ring_16byte_desc_enabled(ring);
2270 rx_ctx.dtype = vsi->dtype;
2272 set_ring_ps_enabled(ring);
2273 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2275 I40E_RX_SPLIT_TCP_UDP |
2278 rx_ctx.hsplit_0 = 0;
2281 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2282 (chain_len * ring->rx_buf_len));
2283 rx_ctx.tphrdesc_ena = 1;
2284 rx_ctx.tphwdesc_ena = 1;
2285 rx_ctx.tphdata_ena = 1;
2286 rx_ctx.tphhead_ena = 1;
2287 if (hw->revision_id == 0)
2288 rx_ctx.lrxqthresh = 0;
2290 rx_ctx.lrxqthresh = 2;
2291 rx_ctx.crcstrip = 1;
2295 /* clear the context in the HMC */
2296 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2298 dev_info(&vsi->back->pdev->dev,
2299 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2300 ring->queue_index, pf_q, err);
2304 /* set the context in the HMC */
2305 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2307 dev_info(&vsi->back->pdev->dev,
2308 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2309 ring->queue_index, pf_q, err);
2313 /* cache tail for quicker writes, and clear the reg before use */
2314 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2315 writel(0, ring->tail);
2317 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2323 * i40e_vsi_configure_tx - Configure the VSI for Tx
2324 * @vsi: VSI structure describing this set of rings and resources
2326 * Configure the Tx VSI for operation.
2328 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2333 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2334 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2340 * i40e_vsi_configure_rx - Configure the VSI for Rx
2341 * @vsi: the VSI being configured
2343 * Configure the Rx VSI for operation.
2345 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2350 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2351 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2352 + ETH_FCS_LEN + VLAN_HLEN;
2354 vsi->max_frame = I40E_RXBUFFER_2048;
2356 /* figure out correct receive buffer length */
2357 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2358 I40E_FLAG_RX_PS_ENABLED)) {
2359 case I40E_FLAG_RX_1BUF_ENABLED:
2360 vsi->rx_hdr_len = 0;
2361 vsi->rx_buf_len = vsi->max_frame;
2362 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2364 case I40E_FLAG_RX_PS_ENABLED:
2365 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2366 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2367 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2370 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2371 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2372 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2376 /* round up for the chip's needs */
2377 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2378 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2379 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2380 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2382 /* set up individual rings */
2383 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2384 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2390 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2391 * @vsi: ptr to the VSI
2393 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2395 u16 qoffset, qcount;
2398 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2401 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2402 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2405 qoffset = vsi->tc_config.tc_info[n].qoffset;
2406 qcount = vsi->tc_config.tc_info[n].qcount;
2407 for (i = qoffset; i < (qoffset + qcount); i++) {
2408 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2409 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2410 rx_ring->dcb_tc = n;
2411 tx_ring->dcb_tc = n;
2417 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2418 * @vsi: ptr to the VSI
2420 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2423 i40e_set_rx_mode(vsi->netdev);
2427 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2428 * @vsi: Pointer to the targeted VSI
2430 * This function replays the hlist on the hw where all the SB Flow Director
2431 * filters were saved.
2433 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2435 struct i40e_fdir_filter *filter;
2436 struct i40e_pf *pf = vsi->back;
2437 struct hlist_node *node;
2439 hlist_for_each_entry_safe(filter, node,
2440 &pf->fdir_filter_list, fdir_node) {
2441 i40e_add_del_fdir(vsi, filter, true);
2446 * i40e_vsi_configure - Set up the VSI for action
2447 * @vsi: the VSI being configured
2449 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2453 i40e_set_vsi_rx_mode(vsi);
2454 i40e_restore_vlan(vsi);
2455 i40e_vsi_config_dcb_rings(vsi);
2456 if (vsi->type == I40E_VSI_FDIR)
2457 i40e_fdir_filter_restore(vsi);
2458 err = i40e_vsi_configure_tx(vsi);
2460 err = i40e_vsi_configure_rx(vsi);
2466 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2467 * @vsi: the VSI being configured
2469 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2471 struct i40e_pf *pf = vsi->back;
2472 struct i40e_q_vector *q_vector;
2473 struct i40e_hw *hw = &pf->hw;
2479 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2480 * and PFINT_LNKLSTn registers, e.g.:
2481 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2483 qp = vsi->base_queue;
2484 vector = vsi->base_vector;
2485 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2486 q_vector = vsi->q_vectors[i];
2487 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2488 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2489 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2491 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2492 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2493 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2496 /* Linked list for the queuepairs assigned to this vector */
2497 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2498 for (q = 0; q < q_vector->num_ringpairs; q++) {
2499 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2500 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2501 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2502 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2504 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2506 wr32(hw, I40E_QINT_RQCTL(qp), val);
2508 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2509 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2510 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2511 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2513 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2515 /* Terminate the linked list */
2516 if (q == (q_vector->num_ringpairs - 1))
2517 val |= (I40E_QUEUE_END_OF_LIST
2518 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2520 wr32(hw, I40E_QINT_TQCTL(qp), val);
2529 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2530 * @hw: ptr to the hardware info
2532 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2536 /* clear things first */
2537 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2538 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2540 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2541 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2542 I40E_PFINT_ICR0_ENA_GRST_MASK |
2543 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2544 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2545 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2546 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2547 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2548 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2549 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2551 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2553 /* SW_ITR_IDX = 0, but don't change INTENA */
2554 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2555 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2557 /* OTHER_ITR_IDX = 0 */
2558 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2562 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2563 * @vsi: the VSI being configured
2565 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2567 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2568 struct i40e_pf *pf = vsi->back;
2569 struct i40e_hw *hw = &pf->hw;
2572 /* set the ITR configuration */
2573 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2574 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2575 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2576 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2577 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2578 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2580 i40e_enable_misc_int_causes(hw);
2582 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2583 wr32(hw, I40E_PFINT_LNKLST0, 0);
2585 /* Associate the queue pair to the vector and enable the q int */
2586 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2587 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2588 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2590 wr32(hw, I40E_QINT_RQCTL(0), val);
2592 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2593 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2594 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2596 wr32(hw, I40E_QINT_TQCTL(0), val);
2601 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2602 * @pf: board private structure
2604 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2606 struct i40e_hw *hw = &pf->hw;
2608 wr32(hw, I40E_PFINT_DYN_CTL0,
2609 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2614 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2615 * @pf: board private structure
2617 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2619 struct i40e_hw *hw = &pf->hw;
2622 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2623 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2624 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2626 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2631 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2632 * @vsi: pointer to a vsi
2633 * @vector: enable a particular Hw Interrupt vector
2635 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2637 struct i40e_pf *pf = vsi->back;
2638 struct i40e_hw *hw = &pf->hw;
2641 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2642 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2643 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2644 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2645 /* skip the flush */
2649 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2650 * @irq: interrupt number
2651 * @data: pointer to a q_vector
2653 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2655 struct i40e_q_vector *q_vector = data;
2657 if (!q_vector->tx.ring && !q_vector->rx.ring)
2660 napi_schedule(&q_vector->napi);
2666 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2667 * @vsi: the VSI being configured
2668 * @basename: name for the vector
2670 * Allocates MSI-X vectors and requests interrupts from the kernel.
2672 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2674 int q_vectors = vsi->num_q_vectors;
2675 struct i40e_pf *pf = vsi->back;
2676 int base = vsi->base_vector;
2681 for (vector = 0; vector < q_vectors; vector++) {
2682 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2684 if (q_vector->tx.ring && q_vector->rx.ring) {
2685 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2686 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2688 } else if (q_vector->rx.ring) {
2689 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2690 "%s-%s-%d", basename, "rx", rx_int_idx++);
2691 } else if (q_vector->tx.ring) {
2692 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2693 "%s-%s-%d", basename, "tx", tx_int_idx++);
2695 /* skip this unused q_vector */
2698 err = request_irq(pf->msix_entries[base + vector].vector,
2704 dev_info(&pf->pdev->dev,
2705 "%s: request_irq failed, error: %d\n",
2707 goto free_queue_irqs;
2709 /* assign the mask for this irq */
2710 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2711 &q_vector->affinity_mask);
2719 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2721 free_irq(pf->msix_entries[base + vector].vector,
2722 &(vsi->q_vectors[vector]));
2728 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2729 * @vsi: the VSI being un-configured
2731 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2733 struct i40e_pf *pf = vsi->back;
2734 struct i40e_hw *hw = &pf->hw;
2735 int base = vsi->base_vector;
2738 for (i = 0; i < vsi->num_queue_pairs; i++) {
2739 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2740 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2743 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2744 for (i = vsi->base_vector;
2745 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2746 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2749 for (i = 0; i < vsi->num_q_vectors; i++)
2750 synchronize_irq(pf->msix_entries[i + base].vector);
2752 /* Legacy and MSI mode - this stops all interrupt handling */
2753 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2754 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2756 synchronize_irq(pf->pdev->irq);
2761 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2762 * @vsi: the VSI being configured
2764 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2766 struct i40e_pf *pf = vsi->back;
2769 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2770 for (i = vsi->base_vector;
2771 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2772 i40e_irq_dynamic_enable(vsi, i);
2774 i40e_irq_dynamic_enable_icr0(pf);
2777 i40e_flush(&pf->hw);
2782 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2783 * @pf: board private structure
2785 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2788 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2789 i40e_flush(&pf->hw);
2793 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2794 * @irq: interrupt number
2795 * @data: pointer to a q_vector
2797 * This is the handler used for all MSI/Legacy interrupts, and deals
2798 * with both queue and non-queue interrupts. This is also used in
2799 * MSIX mode to handle the non-queue interrupts.
2801 static irqreturn_t i40e_intr(int irq, void *data)
2803 struct i40e_pf *pf = (struct i40e_pf *)data;
2804 struct i40e_hw *hw = &pf->hw;
2805 irqreturn_t ret = IRQ_NONE;
2806 u32 icr0, icr0_remaining;
2809 icr0 = rd32(hw, I40E_PFINT_ICR0);
2810 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2812 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2813 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2816 /* if interrupt but no bits showing, must be SWINT */
2817 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2818 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2821 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2822 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2824 /* temporarily disable queue cause for NAPI processing */
2825 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2826 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2827 wr32(hw, I40E_QINT_RQCTL(0), qval);
2829 qval = rd32(hw, I40E_QINT_TQCTL(0));
2830 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2831 wr32(hw, I40E_QINT_TQCTL(0), qval);
2833 if (!test_bit(__I40E_DOWN, &pf->state))
2834 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2837 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2838 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2839 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2842 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2843 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2844 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2847 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2848 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2849 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2852 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2853 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2854 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2855 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2856 val = rd32(hw, I40E_GLGEN_RSTAT);
2857 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2858 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2859 if (val == I40E_RESET_CORER)
2861 else if (val == I40E_RESET_GLOBR)
2863 else if (val == I40E_RESET_EMPR)
2867 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2868 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2869 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2872 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
2873 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
2875 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
2876 ena_mask &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2877 i40e_ptp_tx_hwtstamp(pf);
2878 prttsyn_stat &= ~I40E_PRTTSYN_STAT_0_TXTIME_MASK;
2881 wr32(hw, I40E_PRTTSYN_STAT_0, prttsyn_stat);
2884 /* If a critical error is pending we have no choice but to reset the
2886 * Report and mask out any remaining unexpected interrupts.
2888 icr0_remaining = icr0 & ena_mask;
2889 if (icr0_remaining) {
2890 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2892 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2893 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2894 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) ||
2895 (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) {
2896 dev_info(&pf->pdev->dev, "device will be reset\n");
2897 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2898 i40e_service_event_schedule(pf);
2900 ena_mask &= ~icr0_remaining;
2905 /* re-enable interrupt causes */
2906 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2907 if (!test_bit(__I40E_DOWN, &pf->state)) {
2908 i40e_service_event_schedule(pf);
2909 i40e_irq_dynamic_enable_icr0(pf);
2916 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
2917 * @tx_ring: tx ring to clean
2918 * @budget: how many cleans we're allowed
2920 * Returns true if there's any budget left (e.g. the clean is finished)
2922 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
2924 struct i40e_vsi *vsi = tx_ring->vsi;
2925 u16 i = tx_ring->next_to_clean;
2926 struct i40e_tx_buffer *tx_buf;
2927 struct i40e_tx_desc *tx_desc;
2929 tx_buf = &tx_ring->tx_bi[i];
2930 tx_desc = I40E_TX_DESC(tx_ring, i);
2931 i -= tx_ring->count;
2934 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
2936 /* if next_to_watch is not set then there is no work pending */
2940 /* prevent any other reads prior to eop_desc */
2941 read_barrier_depends();
2943 /* if the descriptor isn't done, no work yet to do */
2944 if (!(eop_desc->cmd_type_offset_bsz &
2945 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
2948 /* clear next_to_watch to prevent false hangs */
2949 tx_buf->next_to_watch = NULL;
2951 /* unmap skb header data */
2952 dma_unmap_single(tx_ring->dev,
2953 dma_unmap_addr(tx_buf, dma),
2954 dma_unmap_len(tx_buf, len),
2957 dma_unmap_len_set(tx_buf, len, 0);
2960 /* move to the next desc and buffer to clean */
2965 i -= tx_ring->count;
2966 tx_buf = tx_ring->tx_bi;
2967 tx_desc = I40E_TX_DESC(tx_ring, 0);
2970 /* update budget accounting */
2972 } while (likely(budget));
2974 i += tx_ring->count;
2975 tx_ring->next_to_clean = i;
2977 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
2978 i40e_irq_dynamic_enable(vsi,
2979 tx_ring->q_vector->v_idx + vsi->base_vector);
2985 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
2986 * @irq: interrupt number
2987 * @data: pointer to a q_vector
2989 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
2991 struct i40e_q_vector *q_vector = data;
2992 struct i40e_vsi *vsi;
2994 if (!q_vector->tx.ring)
2997 vsi = q_vector->tx.ring->vsi;
2998 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3004 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3005 * @vsi: the VSI being configured
3006 * @v_idx: vector index
3007 * @qp_idx: queue pair index
3009 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3011 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3012 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3013 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3015 tx_ring->q_vector = q_vector;
3016 tx_ring->next = q_vector->tx.ring;
3017 q_vector->tx.ring = tx_ring;
3018 q_vector->tx.count++;
3020 rx_ring->q_vector = q_vector;
3021 rx_ring->next = q_vector->rx.ring;
3022 q_vector->rx.ring = rx_ring;
3023 q_vector->rx.count++;
3027 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3028 * @vsi: the VSI being configured
3030 * This function maps descriptor rings to the queue-specific vectors
3031 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3032 * one vector per queue pair, but on a constrained vector budget, we
3033 * group the queue pairs as "efficiently" as possible.
3035 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3037 int qp_remaining = vsi->num_queue_pairs;
3038 int q_vectors = vsi->num_q_vectors;
3043 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3044 * group them so there are multiple queues per vector.
3046 for (; v_start < q_vectors && qp_remaining; v_start++) {
3047 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3049 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3051 q_vector->num_ringpairs = num_ringpairs;
3053 q_vector->rx.count = 0;
3054 q_vector->tx.count = 0;
3055 q_vector->rx.ring = NULL;
3056 q_vector->tx.ring = NULL;
3058 while (num_ringpairs--) {
3059 map_vector_to_qp(vsi, v_start, qp_idx);
3067 * i40e_vsi_request_irq - Request IRQ from the OS
3068 * @vsi: the VSI being configured
3069 * @basename: name for the vector
3071 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3073 struct i40e_pf *pf = vsi->back;
3076 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3077 err = i40e_vsi_request_irq_msix(vsi, basename);
3078 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3079 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3080 pf->misc_int_name, pf);
3082 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3083 pf->misc_int_name, pf);
3086 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3091 #ifdef CONFIG_NET_POLL_CONTROLLER
3093 * i40e_netpoll - A Polling 'interrupt'handler
3094 * @netdev: network interface device structure
3096 * This is used by netconsole to send skbs without having to re-enable
3097 * interrupts. It's not called while the normal interrupt routine is executing.
3099 static void i40e_netpoll(struct net_device *netdev)
3101 struct i40e_netdev_priv *np = netdev_priv(netdev);
3102 struct i40e_vsi *vsi = np->vsi;
3103 struct i40e_pf *pf = vsi->back;
3106 /* if interface is down do nothing */
3107 if (test_bit(__I40E_DOWN, &vsi->state))
3110 pf->flags |= I40E_FLAG_IN_NETPOLL;
3111 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3112 for (i = 0; i < vsi->num_q_vectors; i++)
3113 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3115 i40e_intr(pf->pdev->irq, netdev);
3117 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3122 * i40e_vsi_control_tx - Start or stop a VSI's rings
3123 * @vsi: the VSI being configured
3124 * @enable: start or stop the rings
3126 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3128 struct i40e_pf *pf = vsi->back;
3129 struct i40e_hw *hw = &pf->hw;
3133 pf_q = vsi->base_queue;
3134 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3135 for (j = 0; j < 50; j++) {
3136 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3137 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3138 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3140 usleep_range(1000, 2000);
3142 /* Skip if the queue is already in the requested state */
3143 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3145 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3148 /* turn on/off the queue */
3150 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3151 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3153 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3156 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3158 /* wait for the change to finish */
3159 for (j = 0; j < 10; j++) {
3160 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3162 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3165 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3172 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3173 pf_q, (enable ? "en" : "dis"));
3178 if (hw->revision_id == 0)
3185 * i40e_vsi_control_rx - Start or stop a VSI's rings
3186 * @vsi: the VSI being configured
3187 * @enable: start or stop the rings
3189 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3191 struct i40e_pf *pf = vsi->back;
3192 struct i40e_hw *hw = &pf->hw;
3196 pf_q = vsi->base_queue;
3197 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3198 for (j = 0; j < 50; j++) {
3199 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3200 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3201 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3203 usleep_range(1000, 2000);
3208 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3211 /* is !STAT set ? */
3212 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3216 /* turn on/off the queue */
3218 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3220 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3221 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3223 /* wait for the change to finish */
3224 for (j = 0; j < 10; j++) {
3225 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3228 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3231 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3238 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3239 pf_q, (enable ? "en" : "dis"));
3248 * i40e_vsi_control_rings - Start or stop a VSI's rings
3249 * @vsi: the VSI being configured
3250 * @enable: start or stop the rings
3252 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3256 /* do rx first for enable and last for disable */
3258 ret = i40e_vsi_control_rx(vsi, request);
3261 ret = i40e_vsi_control_tx(vsi, request);
3263 /* Ignore return value, we need to shutdown whatever we can */
3264 i40e_vsi_control_tx(vsi, request);
3265 i40e_vsi_control_rx(vsi, request);
3272 * i40e_vsi_free_irq - Free the irq association with the OS
3273 * @vsi: the VSI being configured
3275 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3277 struct i40e_pf *pf = vsi->back;
3278 struct i40e_hw *hw = &pf->hw;
3279 int base = vsi->base_vector;
3283 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3284 if (!vsi->q_vectors)
3287 for (i = 0; i < vsi->num_q_vectors; i++) {
3288 u16 vector = i + base;
3290 /* free only the irqs that were actually requested */
3291 if (!vsi->q_vectors[i] ||
3292 !vsi->q_vectors[i]->num_ringpairs)
3295 /* clear the affinity_mask in the IRQ descriptor */
3296 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3298 free_irq(pf->msix_entries[vector].vector,
3301 /* Tear down the interrupt queue link list
3303 * We know that they come in pairs and always
3304 * the Rx first, then the Tx. To clear the
3305 * link list, stick the EOL value into the
3306 * next_q field of the registers.
3308 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3309 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3310 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3311 val |= I40E_QUEUE_END_OF_LIST
3312 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3313 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3315 while (qp != I40E_QUEUE_END_OF_LIST) {
3318 val = rd32(hw, I40E_QINT_RQCTL(qp));
3320 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3321 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3322 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3323 I40E_QINT_RQCTL_INTEVENT_MASK);
3325 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3326 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3328 wr32(hw, I40E_QINT_RQCTL(qp), val);
3330 val = rd32(hw, I40E_QINT_TQCTL(qp));
3332 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3333 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3335 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3336 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3337 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3338 I40E_QINT_TQCTL_INTEVENT_MASK);
3340 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3341 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3343 wr32(hw, I40E_QINT_TQCTL(qp), val);
3348 free_irq(pf->pdev->irq, pf);
3350 val = rd32(hw, I40E_PFINT_LNKLST0);
3351 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3352 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3353 val |= I40E_QUEUE_END_OF_LIST
3354 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3355 wr32(hw, I40E_PFINT_LNKLST0, val);
3357 val = rd32(hw, I40E_QINT_RQCTL(qp));
3358 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3359 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3360 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3361 I40E_QINT_RQCTL_INTEVENT_MASK);
3363 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3364 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3366 wr32(hw, I40E_QINT_RQCTL(qp), val);
3368 val = rd32(hw, I40E_QINT_TQCTL(qp));
3370 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3371 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3372 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3373 I40E_QINT_TQCTL_INTEVENT_MASK);
3375 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3376 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3378 wr32(hw, I40E_QINT_TQCTL(qp), val);
3383 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3384 * @vsi: the VSI being configured
3385 * @v_idx: Index of vector to be freed
3387 * This function frees the memory allocated to the q_vector. In addition if
3388 * NAPI is enabled it will delete any references to the NAPI struct prior
3389 * to freeing the q_vector.
3391 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3393 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3394 struct i40e_ring *ring;
3399 /* disassociate q_vector from rings */
3400 i40e_for_each_ring(ring, q_vector->tx)
3401 ring->q_vector = NULL;
3403 i40e_for_each_ring(ring, q_vector->rx)
3404 ring->q_vector = NULL;
3406 /* only VSI w/ an associated netdev is set up w/ NAPI */
3408 netif_napi_del(&q_vector->napi);
3410 vsi->q_vectors[v_idx] = NULL;
3412 kfree_rcu(q_vector, rcu);
3416 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3417 * @vsi: the VSI being un-configured
3419 * This frees the memory allocated to the q_vectors and
3420 * deletes references to the NAPI struct.
3422 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3426 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3427 i40e_free_q_vector(vsi, v_idx);
3431 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3432 * @pf: board private structure
3434 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3436 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3437 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3438 pci_disable_msix(pf->pdev);
3439 kfree(pf->msix_entries);
3440 pf->msix_entries = NULL;
3441 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3442 pci_disable_msi(pf->pdev);
3444 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3448 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3449 * @pf: board private structure
3451 * We go through and clear interrupt specific resources and reset the structure
3452 * to pre-load conditions
3454 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3458 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3459 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3461 i40e_vsi_free_q_vectors(pf->vsi[i]);
3462 i40e_reset_interrupt_capability(pf);
3466 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3467 * @vsi: the VSI being configured
3469 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3476 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3477 napi_enable(&vsi->q_vectors[q_idx]->napi);
3481 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3482 * @vsi: the VSI being configured
3484 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3491 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3492 napi_disable(&vsi->q_vectors[q_idx]->napi);
3496 * i40e_quiesce_vsi - Pause a given VSI
3497 * @vsi: the VSI being paused
3499 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3501 if (test_bit(__I40E_DOWN, &vsi->state))
3504 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3505 if (vsi->netdev && netif_running(vsi->netdev)) {
3506 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3508 set_bit(__I40E_DOWN, &vsi->state);
3514 * i40e_unquiesce_vsi - Resume a given VSI
3515 * @vsi: the VSI being resumed
3517 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3519 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3522 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3523 if (vsi->netdev && netif_running(vsi->netdev))
3524 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3526 i40e_up(vsi); /* this clears the DOWN bit */
3530 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3533 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3537 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3539 i40e_quiesce_vsi(pf->vsi[v]);
3544 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3547 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3551 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3553 i40e_unquiesce_vsi(pf->vsi[v]);
3558 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3559 * @dcbcfg: the corresponding DCBx configuration structure
3561 * Return the number of TCs from given DCBx configuration
3563 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3568 /* Scan the ETS Config Priority Table to find
3569 * traffic class enabled for a given priority
3570 * and use the traffic class index to get the
3571 * number of traffic classes enabled
3573 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3574 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3575 num_tc = dcbcfg->etscfg.prioritytable[i];
3578 /* Traffic class index starts from zero so
3579 * increment to return the actual count
3585 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3586 * @dcbcfg: the corresponding DCBx configuration structure
3588 * Query the current DCB configuration and return the number of
3589 * traffic classes enabled from the given DCBX config
3591 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3593 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3597 for (i = 0; i < num_tc; i++)
3598 enabled_tc |= 1 << i;
3604 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3605 * @pf: PF being queried
3607 * Return number of traffic classes enabled for the given PF
3609 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3611 struct i40e_hw *hw = &pf->hw;
3614 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3616 /* If DCB is not enabled then always in single TC */
3617 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3620 /* MFP mode return count of enabled TCs for this PF */
3621 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3622 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3623 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3624 if (enabled_tc & (1 << i))
3630 /* SFP mode will be enabled for all TCs on port */
3631 return i40e_dcb_get_num_tc(dcbcfg);
3635 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3636 * @pf: PF being queried
3638 * Return a bitmap for first enabled traffic class for this PF.
3640 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3642 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3646 return 0x1; /* TC0 */
3648 /* Find the first enabled TC */
3649 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3650 if (enabled_tc & (1 << i))
3658 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3659 * @pf: PF being queried
3661 * Return a bitmap for enabled traffic classes for this PF.
3663 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3665 /* If DCB is not enabled for this PF then just return default TC */
3666 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3667 return i40e_pf_get_default_tc(pf);
3669 /* MFP mode will have enabled TCs set by FW */
3670 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3671 return pf->hw.func_caps.enabled_tcmap;
3673 /* SFP mode we want PF to be enabled for all TCs */
3674 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3678 * i40e_vsi_get_bw_info - Query VSI BW Information
3679 * @vsi: the VSI being queried
3681 * Returns 0 on success, negative value on failure
3683 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3685 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3686 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3687 struct i40e_pf *pf = vsi->back;
3688 struct i40e_hw *hw = &pf->hw;
3693 /* Get the VSI level BW configuration */
3694 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3696 dev_info(&pf->pdev->dev,
3697 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3698 aq_ret, pf->hw.aq.asq_last_status);
3702 /* Get the VSI level BW configuration per TC */
3703 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3706 dev_info(&pf->pdev->dev,
3707 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3708 aq_ret, pf->hw.aq.asq_last_status);
3712 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3713 dev_info(&pf->pdev->dev,
3714 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3715 bw_config.tc_valid_bits,
3716 bw_ets_config.tc_valid_bits);
3717 /* Still continuing */
3720 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3721 vsi->bw_max_quanta = bw_config.max_bw;
3722 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3723 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3724 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3725 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3726 vsi->bw_ets_limit_credits[i] =
3727 le16_to_cpu(bw_ets_config.credits[i]);
3728 /* 3 bits out of 4 for each TC */
3729 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3736 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3737 * @vsi: the VSI being configured
3738 * @enabled_tc: TC bitmap
3739 * @bw_credits: BW shared credits per TC
3741 * Returns 0 on success, negative value on failure
3743 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3746 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3750 bw_data.tc_valid_bits = enabled_tc;
3751 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3752 bw_data.tc_bw_credits[i] = bw_share[i];
3754 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3757 dev_info(&vsi->back->pdev->dev,
3758 "%s: AQ command Config VSI BW allocation per TC failed = %d\n",
3759 __func__, vsi->back->hw.aq.asq_last_status);
3763 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3764 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3770 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3771 * @vsi: the VSI being configured
3772 * @enabled_tc: TC map to be enabled
3775 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3777 struct net_device *netdev = vsi->netdev;
3778 struct i40e_pf *pf = vsi->back;
3779 struct i40e_hw *hw = &pf->hw;
3782 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3788 netdev_reset_tc(netdev);
3792 /* Set up actual enabled TCs on the VSI */
3793 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3796 /* set per TC queues for the VSI */
3797 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3798 /* Only set TC queues for enabled tcs
3800 * e.g. For a VSI that has TC0 and TC3 enabled the
3801 * enabled_tc bitmap would be 0x00001001; the driver
3802 * will set the numtc for netdev as 2 that will be
3803 * referenced by the netdev layer as TC 0 and 1.
3805 if (vsi->tc_config.enabled_tc & (1 << i))
3806 netdev_set_tc_queue(netdev,
3807 vsi->tc_config.tc_info[i].netdev_tc,
3808 vsi->tc_config.tc_info[i].qcount,
3809 vsi->tc_config.tc_info[i].qoffset);
3812 /* Assign UP2TC map for the VSI */
3813 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3814 /* Get the actual TC# for the UP */
3815 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3816 /* Get the mapped netdev TC# for the UP */
3817 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3818 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3823 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3824 * @vsi: the VSI being configured
3825 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3827 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3828 struct i40e_vsi_context *ctxt)
3830 /* copy just the sections touched not the entire info
3831 * since not all sections are valid as returned by
3834 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3835 memcpy(&vsi->info.queue_mapping,
3836 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3837 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3838 sizeof(vsi->info.tc_mapping));
3842 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3843 * @vsi: VSI to be configured
3844 * @enabled_tc: TC bitmap
3846 * This configures a particular VSI for TCs that are mapped to the
3847 * given TC bitmap. It uses default bandwidth share for TCs across
3848 * VSIs to configure TC for a particular VSI.
3851 * It is expected that the VSI queues have been quisced before calling
3854 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3856 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3857 struct i40e_vsi_context ctxt;
3861 /* Check if enabled_tc is same as existing or new TCs */
3862 if (vsi->tc_config.enabled_tc == enabled_tc)
3865 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3866 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3867 if (enabled_tc & (1 << i))
3871 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3873 dev_info(&vsi->back->pdev->dev,
3874 "Failed configuring TC map %d for VSI %d\n",
3875 enabled_tc, vsi->seid);
3879 /* Update Queue Pairs Mapping for currently enabled UPs */
3880 ctxt.seid = vsi->seid;
3881 ctxt.pf_num = vsi->back->hw.pf_id;
3883 ctxt.uplink_seid = vsi->uplink_seid;
3884 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3885 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3887 /* Update the VSI after updating the VSI queue-mapping information */
3888 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3890 dev_info(&vsi->back->pdev->dev,
3891 "update vsi failed, aq_err=%d\n",
3892 vsi->back->hw.aq.asq_last_status);
3895 /* update the local VSI info with updated queue map */
3896 i40e_vsi_update_queue_map(vsi, &ctxt);
3897 vsi->info.valid_sections = 0;
3899 /* Update current VSI BW information */
3900 ret = i40e_vsi_get_bw_info(vsi);
3902 dev_info(&vsi->back->pdev->dev,
3903 "Failed updating vsi bw info, aq_err=%d\n",
3904 vsi->back->hw.aq.asq_last_status);
3908 /* Update the netdev TC setup */
3909 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3915 * i40e_veb_config_tc - Configure TCs for given VEB
3917 * @enabled_tc: TC bitmap
3919 * Configures given TC bitmap for VEB (switching) element
3921 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
3923 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
3924 struct i40e_pf *pf = veb->pf;
3928 /* No TCs or already enabled TCs just return */
3929 if (!enabled_tc || veb->enabled_tc == enabled_tc)
3932 bw_data.tc_valid_bits = enabled_tc;
3933 /* bw_data.absolute_credits is not set (relative) */
3935 /* Enable ETS TCs with equal BW Share for now */
3936 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3937 if (enabled_tc & (1 << i))
3938 bw_data.tc_bw_share_credits[i] = 1;
3941 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
3944 dev_info(&pf->pdev->dev,
3945 "veb bw config failed, aq_err=%d\n",
3946 pf->hw.aq.asq_last_status);
3950 /* Update the BW information */
3951 ret = i40e_veb_get_bw_info(veb);
3953 dev_info(&pf->pdev->dev,
3954 "Failed getting veb bw config, aq_err=%d\n",
3955 pf->hw.aq.asq_last_status);
3962 #ifdef CONFIG_I40E_DCB
3964 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
3967 * Reconfigure VEB/VSIs on a given PF; it is assumed that
3968 * the caller would've quiesce all the VSIs before calling
3971 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
3977 /* Enable the TCs available on PF to all VEBs */
3978 tc_map = i40e_pf_get_tc_map(pf);
3979 for (v = 0; v < I40E_MAX_VEB; v++) {
3982 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
3984 dev_info(&pf->pdev->dev,
3985 "Failed configuring TC for VEB seid=%d\n",
3987 /* Will try to configure as many components */
3991 /* Update each VSI */
3992 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3996 /* - Enable all TCs for the LAN VSI
3997 * - For all others keep them at TC0 for now
3999 if (v == pf->lan_vsi)
4000 tc_map = i40e_pf_get_tc_map(pf);
4002 tc_map = i40e_pf_get_default_tc(pf);
4004 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4006 dev_info(&pf->pdev->dev,
4007 "Failed configuring TC for VSI seid=%d\n",
4009 /* Will try to configure as many components */
4011 if (pf->vsi[v]->netdev)
4012 i40e_dcbnl_set_all(pf->vsi[v]);
4018 * i40e_init_pf_dcb - Initialize DCB configuration
4019 * @pf: PF being configured
4021 * Query the current DCB configuration and cache it
4022 * in the hardware structure
4024 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4026 struct i40e_hw *hw = &pf->hw;
4029 if (pf->hw.func_caps.npar_enable)
4032 /* Get the initial DCB configuration */
4033 err = i40e_init_dcb(hw);
4035 /* Device/Function is not DCBX capable */
4036 if ((!hw->func_caps.dcb) ||
4037 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4038 dev_info(&pf->pdev->dev,
4039 "DCBX offload is not supported or is disabled for this PF.\n");
4041 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4045 /* When status is not DISABLED then DCBX in FW */
4046 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4047 DCB_CAP_DCBX_VER_IEEE;
4048 pf->flags |= I40E_FLAG_DCB_ENABLED;
4055 #endif /* CONFIG_I40E_DCB */
4058 * i40e_up_complete - Finish the last steps of bringing up a connection
4059 * @vsi: the VSI being configured
4061 static int i40e_up_complete(struct i40e_vsi *vsi)
4063 struct i40e_pf *pf = vsi->back;
4066 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4067 i40e_vsi_configure_msix(vsi);
4069 i40e_configure_msi_and_legacy(vsi);
4072 err = i40e_vsi_control_rings(vsi, true);
4076 clear_bit(__I40E_DOWN, &vsi->state);
4077 i40e_napi_enable_all(vsi);
4078 i40e_vsi_enable_irq(vsi);
4080 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4082 netdev_info(vsi->netdev, "NIC Link is Up\n");
4083 netif_tx_start_all_queues(vsi->netdev);
4084 netif_carrier_on(vsi->netdev);
4085 } else if (vsi->netdev) {
4086 netdev_info(vsi->netdev, "NIC Link is Down\n");
4088 i40e_service_event_schedule(pf);
4094 * i40e_vsi_reinit_locked - Reset the VSI
4095 * @vsi: the VSI being configured
4097 * Rebuild the ring structs after some configuration
4098 * has changed, e.g. MTU size.
4100 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4102 struct i40e_pf *pf = vsi->back;
4104 WARN_ON(in_interrupt());
4105 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4106 usleep_range(1000, 2000);
4109 /* Give a VF some time to respond to the reset. The
4110 * two second wait is based upon the watchdog cycle in
4113 if (vsi->type == I40E_VSI_SRIOV)
4116 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4120 * i40e_up - Bring the connection back up after being down
4121 * @vsi: the VSI being configured
4123 int i40e_up(struct i40e_vsi *vsi)
4127 err = i40e_vsi_configure(vsi);
4129 err = i40e_up_complete(vsi);
4135 * i40e_down - Shutdown the connection processing
4136 * @vsi: the VSI being stopped
4138 void i40e_down(struct i40e_vsi *vsi)
4142 /* It is assumed that the caller of this function
4143 * sets the vsi->state __I40E_DOWN bit.
4146 netif_carrier_off(vsi->netdev);
4147 netif_tx_disable(vsi->netdev);
4149 i40e_vsi_disable_irq(vsi);
4150 i40e_vsi_control_rings(vsi, false);
4151 i40e_napi_disable_all(vsi);
4153 for (i = 0; i < vsi->num_queue_pairs; i++) {
4154 i40e_clean_tx_ring(vsi->tx_rings[i]);
4155 i40e_clean_rx_ring(vsi->rx_rings[i]);
4160 * i40e_setup_tc - configure multiple traffic classes
4161 * @netdev: net device to configure
4162 * @tc: number of traffic classes to enable
4164 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4166 struct i40e_netdev_priv *np = netdev_priv(netdev);
4167 struct i40e_vsi *vsi = np->vsi;
4168 struct i40e_pf *pf = vsi->back;
4173 /* Check if DCB enabled to continue */
4174 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4175 netdev_info(netdev, "DCB is not enabled for adapter\n");
4179 /* Check if MFP enabled */
4180 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4181 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4185 /* Check whether tc count is within enabled limit */
4186 if (tc > i40e_pf_get_num_tc(pf)) {
4187 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4191 /* Generate TC map for number of tc requested */
4192 for (i = 0; i < tc; i++)
4193 enabled_tc |= (1 << i);
4195 /* Requesting same TC configuration as already enabled */
4196 if (enabled_tc == vsi->tc_config.enabled_tc)
4199 /* Quiesce VSI queues */
4200 i40e_quiesce_vsi(vsi);
4202 /* Configure VSI for enabled TCs */
4203 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4205 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4211 i40e_unquiesce_vsi(vsi);
4218 * i40e_open - Called when a network interface is made active
4219 * @netdev: network interface device structure
4221 * The open entry point is called when a network interface is made
4222 * active by the system (IFF_UP). At this point all resources needed
4223 * for transmit and receive operations are allocated, the interrupt
4224 * handler is registered with the OS, the netdev watchdog subtask is
4225 * enabled, and the stack is notified that the interface is ready.
4227 * Returns 0 on success, negative value on failure
4229 static int i40e_open(struct net_device *netdev)
4231 struct i40e_netdev_priv *np = netdev_priv(netdev);
4232 struct i40e_vsi *vsi = np->vsi;
4233 struct i40e_pf *pf = vsi->back;
4234 char int_name[IFNAMSIZ];
4237 /* disallow open during test */
4238 if (test_bit(__I40E_TESTING, &pf->state))
4241 netif_carrier_off(netdev);
4243 /* allocate descriptors */
4244 err = i40e_vsi_setup_tx_resources(vsi);
4247 err = i40e_vsi_setup_rx_resources(vsi);
4251 err = i40e_vsi_configure(vsi);
4255 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4256 dev_driver_string(&pf->pdev->dev), netdev->name);
4257 err = i40e_vsi_request_irq(vsi, int_name);
4261 /* Notify the stack of the actual queue counts. */
4262 err = netif_set_real_num_tx_queues(netdev, vsi->num_queue_pairs);
4264 goto err_set_queues;
4266 err = netif_set_real_num_rx_queues(netdev, vsi->num_queue_pairs);
4268 goto err_set_queues;
4270 err = i40e_up_complete(vsi);
4272 goto err_up_complete;
4274 #ifdef CONFIG_I40E_VXLAN
4275 vxlan_get_rx_port(netdev);
4283 i40e_vsi_free_irq(vsi);
4285 i40e_vsi_free_rx_resources(vsi);
4287 i40e_vsi_free_tx_resources(vsi);
4288 if (vsi == pf->vsi[pf->lan_vsi])
4289 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4295 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4296 * @pf: Pointer to pf
4298 * This function destroys the hlist where all the Flow Director
4299 * filters were saved.
4301 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4303 struct i40e_fdir_filter *filter;
4304 struct hlist_node *node2;
4306 hlist_for_each_entry_safe(filter, node2,
4307 &pf->fdir_filter_list, fdir_node) {
4308 hlist_del(&filter->fdir_node);
4311 pf->fdir_pf_active_filters = 0;
4315 * i40e_close - Disables a network interface
4316 * @netdev: network interface device structure
4318 * The close entry point is called when an interface is de-activated
4319 * by the OS. The hardware is still under the driver's control, but
4320 * this netdev interface is disabled.
4322 * Returns 0, this is not allowed to fail
4324 static int i40e_close(struct net_device *netdev)
4326 struct i40e_netdev_priv *np = netdev_priv(netdev);
4327 struct i40e_vsi *vsi = np->vsi;
4329 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4333 i40e_vsi_free_irq(vsi);
4335 i40e_vsi_free_tx_resources(vsi);
4336 i40e_vsi_free_rx_resources(vsi);
4342 * i40e_do_reset - Start a PF or Core Reset sequence
4343 * @pf: board private structure
4344 * @reset_flags: which reset is requested
4346 * The essential difference in resets is that the PF Reset
4347 * doesn't clear the packet buffers, doesn't reset the PE
4348 * firmware, and doesn't bother the other PFs on the chip.
4350 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4354 WARN_ON(in_interrupt());
4356 /* do the biggest reset indicated */
4357 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4359 /* Request a Global Reset
4361 * This will start the chip's countdown to the actual full
4362 * chip reset event, and a warning interrupt to be sent
4363 * to all PFs, including the requestor. Our handler
4364 * for the warning interrupt will deal with the shutdown
4365 * and recovery of the switch setup.
4367 dev_info(&pf->pdev->dev, "GlobalR requested\n");
4368 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4369 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4370 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4372 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4374 /* Request a Core Reset
4376 * Same as Global Reset, except does *not* include the MAC/PHY
4378 dev_info(&pf->pdev->dev, "CoreR requested\n");
4379 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4380 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4381 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4382 i40e_flush(&pf->hw);
4384 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4386 /* Request a Firmware Reset
4388 * Same as Global reset, plus restarting the
4389 * embedded firmware engine.
4391 /* enable EMP Reset */
4392 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4393 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4394 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4396 /* force the reset */
4397 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4398 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4399 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4400 i40e_flush(&pf->hw);
4402 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4404 /* Request a PF Reset
4406 * Resets only the PF-specific registers
4408 * This goes directly to the tear-down and rebuild of
4409 * the switch, since we need to do all the recovery as
4410 * for the Core Reset.
4412 dev_info(&pf->pdev->dev, "PFR requested\n");
4413 i40e_handle_reset_warning(pf);
4415 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4418 /* Find the VSI(s) that requested a re-init */
4419 dev_info(&pf->pdev->dev,
4420 "VSI reinit requested\n");
4421 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4422 struct i40e_vsi *vsi = pf->vsi[v];
4424 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4425 i40e_vsi_reinit_locked(pf->vsi[v]);
4426 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4430 /* no further action needed, so return now */
4433 dev_info(&pf->pdev->dev,
4434 "bad reset request 0x%08x\n", reset_flags);
4439 #ifdef CONFIG_I40E_DCB
4441 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4442 * @pf: board private structure
4443 * @old_cfg: current DCB config
4444 * @new_cfg: new DCB config
4446 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4447 struct i40e_dcbx_config *old_cfg,
4448 struct i40e_dcbx_config *new_cfg)
4450 bool need_reconfig = false;
4452 /* Check if ETS configuration has changed */
4453 if (memcmp(&new_cfg->etscfg,
4455 sizeof(new_cfg->etscfg))) {
4456 /* If Priority Table has changed reconfig is needed */
4457 if (memcmp(&new_cfg->etscfg.prioritytable,
4458 &old_cfg->etscfg.prioritytable,
4459 sizeof(new_cfg->etscfg.prioritytable))) {
4460 need_reconfig = true;
4461 dev_info(&pf->pdev->dev, "ETS UP2TC changed.\n");
4464 if (memcmp(&new_cfg->etscfg.tcbwtable,
4465 &old_cfg->etscfg.tcbwtable,
4466 sizeof(new_cfg->etscfg.tcbwtable)))
4467 dev_info(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4469 if (memcmp(&new_cfg->etscfg.tsatable,
4470 &old_cfg->etscfg.tsatable,
4471 sizeof(new_cfg->etscfg.tsatable)))
4472 dev_info(&pf->pdev->dev, "ETS TSA Table changed.\n");
4475 /* Check if PFC configuration has changed */
4476 if (memcmp(&new_cfg->pfc,
4478 sizeof(new_cfg->pfc))) {
4479 need_reconfig = true;
4480 dev_info(&pf->pdev->dev, "PFC config change detected.\n");
4483 /* Check if APP Table has changed */
4484 if (memcmp(&new_cfg->app,
4486 sizeof(new_cfg->app))) {
4487 need_reconfig = true;
4488 dev_info(&pf->pdev->dev, "APP Table change detected.\n");
4491 return need_reconfig;
4495 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4496 * @pf: board private structure
4497 * @e: event info posted on ARQ
4499 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4500 struct i40e_arq_event_info *e)
4502 struct i40e_aqc_lldp_get_mib *mib =
4503 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4504 struct i40e_hw *hw = &pf->hw;
4505 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4506 struct i40e_dcbx_config tmp_dcbx_cfg;
4507 bool need_reconfig = false;
4511 /* Ignore if event is not for Nearest Bridge */
4512 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4513 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4514 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4517 /* Check MIB Type and return if event for Remote MIB update */
4518 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4519 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4520 /* Update the remote cached instance and return */
4521 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4522 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4523 &hw->remote_dcbx_config);
4527 /* Convert/store the DCBX data from LLDPDU temporarily */
4528 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4529 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4531 /* Error in LLDPDU parsing return */
4532 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4536 /* No change detected in DCBX configs */
4537 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4538 dev_info(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4542 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4544 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4546 /* Overwrite the new configuration */
4547 *dcbx_cfg = tmp_dcbx_cfg;
4552 /* Reconfiguration needed quiesce all VSIs */
4553 i40e_pf_quiesce_all_vsi(pf);
4555 /* Changes in configuration update VEB/VSI */
4556 i40e_dcb_reconfigure(pf);
4558 i40e_pf_unquiesce_all_vsi(pf);
4562 #endif /* CONFIG_I40E_DCB */
4565 * i40e_do_reset_safe - Protected reset path for userland calls.
4566 * @pf: board private structure
4567 * @reset_flags: which reset is requested
4570 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4573 i40e_do_reset(pf, reset_flags);
4578 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4579 * @pf: board private structure
4580 * @e: event info posted on ARQ
4582 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4585 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4586 struct i40e_arq_event_info *e)
4588 struct i40e_aqc_lan_overflow *data =
4589 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4590 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4591 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4592 struct i40e_hw *hw = &pf->hw;
4596 dev_info(&pf->pdev->dev, "%s: Rx Queue Number = %d QTX_CTL=0x%08x\n",
4597 __func__, queue, qtx_ctl);
4599 /* Queue belongs to VF, find the VF and issue VF reset */
4600 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4601 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4602 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4603 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4604 vf_id -= hw->func_caps.vf_base_id;
4605 vf = &pf->vf[vf_id];
4606 i40e_vc_notify_vf_reset(vf);
4607 /* Allow VF to process pending reset notification */
4609 i40e_reset_vf(vf, false);
4614 * i40e_service_event_complete - Finish up the service event
4615 * @pf: board private structure
4617 static void i40e_service_event_complete(struct i40e_pf *pf)
4619 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4621 /* flush memory to make sure state is correct before next watchog */
4622 smp_mb__before_clear_bit();
4623 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4627 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4628 * @pf: board private structure
4630 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4632 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4635 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4637 /* if interface is down do nothing */
4638 if (test_bit(__I40E_DOWN, &pf->state))
4643 * i40e_vsi_link_event - notify VSI of a link event
4644 * @vsi: vsi to be notified
4645 * @link_up: link up or down
4647 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4652 switch (vsi->type) {
4654 if (!vsi->netdev || !vsi->netdev_registered)
4658 netif_carrier_on(vsi->netdev);
4659 netif_tx_wake_all_queues(vsi->netdev);
4661 netif_carrier_off(vsi->netdev);
4662 netif_tx_stop_all_queues(vsi->netdev);
4666 case I40E_VSI_SRIOV:
4669 case I40E_VSI_VMDQ2:
4671 case I40E_VSI_MIRROR:
4673 /* there is no notification for other VSIs */
4679 * i40e_veb_link_event - notify elements on the veb of a link event
4680 * @veb: veb to be notified
4681 * @link_up: link up or down
4683 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4688 if (!veb || !veb->pf)
4692 /* depth first... */
4693 for (i = 0; i < I40E_MAX_VEB; i++)
4694 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4695 i40e_veb_link_event(pf->veb[i], link_up);
4697 /* ... now the local VSIs */
4698 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4699 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4700 i40e_vsi_link_event(pf->vsi[i], link_up);
4704 * i40e_link_event - Update netif_carrier status
4705 * @pf: board private structure
4707 static void i40e_link_event(struct i40e_pf *pf)
4709 bool new_link, old_link;
4711 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4712 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4714 if (new_link == old_link)
4717 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4718 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4719 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4721 /* Notify the base of the switch tree connected to
4722 * the link. Floating VEBs are not notified.
4724 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4725 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4727 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4730 i40e_vc_notify_link_state(pf);
4732 if (pf->flags & I40E_FLAG_PTP)
4733 i40e_ptp_set_increment(pf);
4737 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4738 * @pf: board private structure
4740 * Set the per-queue flags to request a check for stuck queues in the irq
4741 * clean functions, then force interrupts to be sure the irq clean is called.
4743 static void i40e_check_hang_subtask(struct i40e_pf *pf)
4747 /* If we're down or resetting, just bail */
4748 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4751 /* for each VSI/netdev
4753 * set the check flag
4755 * force an interrupt
4757 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4758 struct i40e_vsi *vsi = pf->vsi[v];
4762 test_bit(__I40E_DOWN, &vsi->state) ||
4763 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4766 for (i = 0; i < vsi->num_queue_pairs; i++) {
4767 set_check_for_tx_hang(vsi->tx_rings[i]);
4768 if (test_bit(__I40E_HANG_CHECK_ARMED,
4769 &vsi->tx_rings[i]->state))
4774 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4775 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4776 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4777 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4779 u16 vec = vsi->base_vector - 1;
4780 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4781 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4782 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4783 wr32(&vsi->back->hw,
4784 I40E_PFINT_DYN_CTLN(vec), val);
4786 i40e_flush(&vsi->back->hw);
4792 * i40e_watchdog_subtask - Check and bring link up
4793 * @pf: board private structure
4795 static void i40e_watchdog_subtask(struct i40e_pf *pf)
4799 /* if interface is down do nothing */
4800 if (test_bit(__I40E_DOWN, &pf->state) ||
4801 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4804 /* Update the stats for active netdevs so the network stack
4805 * can look at updated numbers whenever it cares to
4807 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4808 if (pf->vsi[i] && pf->vsi[i]->netdev)
4809 i40e_update_stats(pf->vsi[i]);
4811 /* Update the stats for the active switching components */
4812 for (i = 0; i < I40E_MAX_VEB; i++)
4814 i40e_update_veb_stats(pf->veb[i]);
4816 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
4820 * i40e_reset_subtask - Set up for resetting the device and driver
4821 * @pf: board private structure
4823 static void i40e_reset_subtask(struct i40e_pf *pf)
4825 u32 reset_flags = 0;
4828 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4829 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4830 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4832 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4833 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4834 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4836 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4837 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4838 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4840 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4841 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4842 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4845 /* If there's a recovery already waiting, it takes
4846 * precedence before starting a new reset sequence.
4848 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4849 i40e_handle_reset_warning(pf);
4853 /* If we're already down or resetting, just bail */
4855 !test_bit(__I40E_DOWN, &pf->state) &&
4856 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4857 i40e_do_reset(pf, reset_flags);
4864 * i40e_handle_link_event - Handle link event
4865 * @pf: board private structure
4866 * @e: event info posted on ARQ
4868 static void i40e_handle_link_event(struct i40e_pf *pf,
4869 struct i40e_arq_event_info *e)
4871 struct i40e_hw *hw = &pf->hw;
4872 struct i40e_aqc_get_link_status *status =
4873 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4874 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4876 /* save off old link status information */
4877 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4878 sizeof(pf->hw.phy.link_info_old));
4880 /* update link status */
4881 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4882 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4883 hw_link_info->link_info = status->link_info;
4884 hw_link_info->an_info = status->an_info;
4885 hw_link_info->ext_info = status->ext_info;
4886 hw_link_info->lse_enable =
4887 le16_to_cpu(status->command_flags) &
4890 /* process the event */
4891 i40e_link_event(pf);
4893 /* Do a new status request to re-enable LSE reporting
4894 * and load new status information into the hw struct,
4895 * then see if the status changed while processing the
4898 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
4899 i40e_link_event(pf);
4903 * i40e_clean_adminq_subtask - Clean the AdminQ rings
4904 * @pf: board private structure
4906 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
4908 struct i40e_arq_event_info event;
4909 struct i40e_hw *hw = &pf->hw;
4915 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
4918 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
4919 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
4924 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
4925 ret = i40e_clean_arq_element(hw, &event, &pending);
4926 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
4927 dev_info(&pf->pdev->dev, "No ARQ event found\n");
4930 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
4934 opcode = le16_to_cpu(event.desc.opcode);
4937 case i40e_aqc_opc_get_link_status:
4938 i40e_handle_link_event(pf, &event);
4940 case i40e_aqc_opc_send_msg_to_pf:
4941 ret = i40e_vc_process_vf_msg(pf,
4942 le16_to_cpu(event.desc.retval),
4943 le32_to_cpu(event.desc.cookie_high),
4944 le32_to_cpu(event.desc.cookie_low),
4948 case i40e_aqc_opc_lldp_update_mib:
4949 dev_info(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
4950 #ifdef CONFIG_I40E_DCB
4952 ret = i40e_handle_lldp_event(pf, &event);
4954 #endif /* CONFIG_I40E_DCB */
4956 case i40e_aqc_opc_event_lan_overflow:
4957 dev_info(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
4958 i40e_handle_lan_overflow_event(pf, &event);
4960 case i40e_aqc_opc_send_msg_to_peer:
4961 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
4964 dev_info(&pf->pdev->dev,
4965 "ARQ Error: Unknown event 0x%04x received\n",
4969 } while (pending && (i++ < pf->adminq_work_limit));
4971 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
4972 /* re-enable Admin queue interrupt cause */
4973 val = rd32(hw, I40E_PFINT_ICR0_ENA);
4974 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4975 wr32(hw, I40E_PFINT_ICR0_ENA, val);
4978 kfree(event.msg_buf);
4982 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
4983 * @veb: pointer to the VEB instance
4985 * This is a recursive function that first builds the attached VSIs then
4986 * recurses in to build the next layer of VEB. We track the connections
4987 * through our own index numbers because the seid's from the HW could
4988 * change across the reset.
4990 static int i40e_reconstitute_veb(struct i40e_veb *veb)
4992 struct i40e_vsi *ctl_vsi = NULL;
4993 struct i40e_pf *pf = veb->pf;
4997 /* build VSI that owns this VEB, temporarily attached to base VEB */
4998 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
5000 pf->vsi[v]->veb_idx == veb->idx &&
5001 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5002 ctl_vsi = pf->vsi[v];
5007 dev_info(&pf->pdev->dev,
5008 "missing owner VSI for veb_idx %d\n", veb->idx);
5010 goto end_reconstitute;
5012 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5013 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5014 ret = i40e_add_vsi(ctl_vsi);
5016 dev_info(&pf->pdev->dev,
5017 "rebuild of owner VSI failed: %d\n", ret);
5018 goto end_reconstitute;
5020 i40e_vsi_reset_stats(ctl_vsi);
5022 /* create the VEB in the switch and move the VSI onto the VEB */
5023 ret = i40e_add_veb(veb, ctl_vsi);
5025 goto end_reconstitute;
5027 /* create the remaining VSIs attached to this VEB */
5028 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5029 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5032 if (pf->vsi[v]->veb_idx == veb->idx) {
5033 struct i40e_vsi *vsi = pf->vsi[v];
5034 vsi->uplink_seid = veb->seid;
5035 ret = i40e_add_vsi(vsi);
5037 dev_info(&pf->pdev->dev,
5038 "rebuild of vsi_idx %d failed: %d\n",
5040 goto end_reconstitute;
5042 i40e_vsi_reset_stats(vsi);
5046 /* create any VEBs attached to this VEB - RECURSION */
5047 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5048 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5049 pf->veb[veb_idx]->uplink_seid = veb->seid;
5050 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5061 * i40e_get_capabilities - get info about the HW
5062 * @pf: the PF struct
5064 static int i40e_get_capabilities(struct i40e_pf *pf)
5066 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5071 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5073 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5077 /* this loads the data into the hw struct for us */
5078 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5080 i40e_aqc_opc_list_func_capabilities,
5082 /* data loaded, buffer no longer needed */
5085 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5086 /* retry with a larger buffer */
5087 buf_len = data_size;
5088 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5089 dev_info(&pf->pdev->dev,
5090 "capability discovery failed: aq=%d\n",
5091 pf->hw.aq.asq_last_status);
5096 /* increment MSI-X count because current FW skips one */
5097 pf->hw.func_caps.num_msix_vectors++;
5099 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5100 (pf->hw.aq.fw_maj_ver < 2)) {
5101 pf->hw.func_caps.num_msix_vectors++;
5102 pf->hw.func_caps.num_msix_vectors_vf++;
5105 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5106 dev_info(&pf->pdev->dev,
5107 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5108 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5109 pf->hw.func_caps.num_msix_vectors,
5110 pf->hw.func_caps.num_msix_vectors_vf,
5111 pf->hw.func_caps.fd_filters_guaranteed,
5112 pf->hw.func_caps.fd_filters_best_effort,
5113 pf->hw.func_caps.num_tx_qp,
5114 pf->hw.func_caps.num_vsis);
5116 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5117 + pf->hw.func_caps.num_vfs)
5118 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5119 dev_info(&pf->pdev->dev,
5120 "got num_vsis %d, setting num_vsis to %d\n",
5121 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5122 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5128 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5131 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5132 * @pf: board private structure
5134 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5136 struct i40e_vsi *vsi;
5137 bool new_vsi = false;
5140 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5143 /* find existing VSI and see if it needs configuring */
5145 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5146 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5152 /* create a new VSI if none exists */
5154 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5155 pf->vsi[pf->lan_vsi]->seid, 0);
5157 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5162 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5164 err = i40e_vsi_setup_tx_resources(vsi);
5167 err = i40e_vsi_setup_rx_resources(vsi);
5172 char int_name[IFNAMSIZ + 9];
5173 err = i40e_vsi_configure(vsi);
5176 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
5177 dev_driver_string(&pf->pdev->dev));
5178 err = i40e_vsi_request_irq(vsi, int_name);
5181 err = i40e_up_complete(vsi);
5183 goto err_up_complete;
5184 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
5191 i40e_vsi_free_irq(vsi);
5193 i40e_vsi_free_rx_resources(vsi);
5195 i40e_vsi_free_tx_resources(vsi);
5197 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5198 i40e_vsi_clear(vsi);
5202 * i40e_fdir_teardown - release the Flow Director resources
5203 * @pf: board private structure
5205 static void i40e_fdir_teardown(struct i40e_pf *pf)
5209 i40e_fdir_filter_exit(pf);
5210 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5211 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5212 i40e_vsi_release(pf->vsi[i]);
5219 * i40e_prep_for_reset - prep for the core to reset
5220 * @pf: board private structure
5222 * Close up the VFs and other things in prep for pf Reset.
5224 static int i40e_prep_for_reset(struct i40e_pf *pf)
5226 struct i40e_hw *hw = &pf->hw;
5230 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5231 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5234 dev_info(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5236 if (i40e_check_asq_alive(hw))
5237 i40e_vc_notify_reset(pf);
5239 /* quiesce the VSIs and their queues that are not already DOWN */
5240 i40e_pf_quiesce_all_vsi(pf);
5242 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5244 pf->vsi[v]->seid = 0;
5247 i40e_shutdown_adminq(&pf->hw);
5249 /* call shutdown HMC */
5250 ret = i40e_shutdown_lan_hmc(hw);
5252 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
5253 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5259 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5260 * @pf: board private structure
5261 * @reinit: if the Main VSI needs to re-initialized.
5263 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5265 struct i40e_driver_version dv;
5266 struct i40e_hw *hw = &pf->hw;
5270 /* Now we wait for GRST to settle out.
5271 * We don't have to delete the VEBs or VSIs from the hw switch
5272 * because the reset will make them disappear.
5274 ret = i40e_pf_reset(hw);
5276 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5279 if (test_bit(__I40E_DOWN, &pf->state))
5280 goto end_core_reset;
5281 dev_info(&pf->pdev->dev, "Rebuilding internal switch\n");
5283 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5284 ret = i40e_init_adminq(&pf->hw);
5286 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5287 goto end_core_reset;
5290 ret = i40e_get_capabilities(pf);
5292 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5294 goto end_core_reset;
5297 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5298 hw->func_caps.num_rx_qp,
5299 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5301 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5302 goto end_core_reset;
5304 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5306 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5307 goto end_core_reset;
5310 #ifdef CONFIG_I40E_DCB
5311 ret = i40e_init_pf_dcb(pf);
5313 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5314 goto end_core_reset;
5316 #endif /* CONFIG_I40E_DCB */
5318 /* do basic switch setup */
5319 ret = i40e_setup_pf_switch(pf, reinit);
5321 goto end_core_reset;
5323 /* Rebuild the VSIs and VEBs that existed before reset.
5324 * They are still in our local switch element arrays, so only
5325 * need to rebuild the switch model in the HW.
5327 * If there were VEBs but the reconstitution failed, we'll try
5328 * try to recover minimal use by getting the basic PF VSI working.
5330 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5331 dev_info(&pf->pdev->dev, "attempting to rebuild switch\n");
5332 /* find the one VEB connected to the MAC, and find orphans */
5333 for (v = 0; v < I40E_MAX_VEB; v++) {
5337 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5338 pf->veb[v]->uplink_seid == 0) {
5339 ret = i40e_reconstitute_veb(pf->veb[v]);
5344 /* If Main VEB failed, we're in deep doodoo,
5345 * so give up rebuilding the switch and set up
5346 * for minimal rebuild of PF VSI.
5347 * If orphan failed, we'll report the error
5348 * but try to keep going.
5350 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5351 dev_info(&pf->pdev->dev,
5352 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5354 pf->vsi[pf->lan_vsi]->uplink_seid
5357 } else if (pf->veb[v]->uplink_seid == 0) {
5358 dev_info(&pf->pdev->dev,
5359 "rebuild of orphan VEB failed: %d\n",
5366 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5367 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5368 /* no VEB, so rebuild only the Main VSI */
5369 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5371 dev_info(&pf->pdev->dev,
5372 "rebuild of Main VSI failed: %d\n", ret);
5373 goto end_core_reset;
5377 /* reinit the misc interrupt */
5378 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5379 ret = i40e_setup_misc_vector(pf);
5381 /* restart the VSIs that were rebuilt and running before the reset */
5382 i40e_pf_unquiesce_all_vsi(pf);
5384 if (pf->num_alloc_vfs) {
5385 for (v = 0; v < pf->num_alloc_vfs; v++)
5386 i40e_reset_vf(&pf->vf[v], true);
5389 /* tell the firmware that we're starting */
5390 dv.major_version = DRV_VERSION_MAJOR;
5391 dv.minor_version = DRV_VERSION_MINOR;
5392 dv.build_version = DRV_VERSION_BUILD;
5393 dv.subbuild_version = 0;
5394 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5396 dev_info(&pf->pdev->dev, "PF reset done\n");
5399 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5403 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5404 * @pf: board private structure
5406 * Close up the VFs and other things in prep for a Core Reset,
5407 * then get ready to rebuild the world.
5409 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5413 ret = i40e_prep_for_reset(pf);
5415 i40e_reset_and_rebuild(pf, false);
5419 * i40e_handle_mdd_event
5420 * @pf: pointer to the pf structure
5422 * Called from the MDD irq handler to identify possibly malicious vfs
5424 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5426 struct i40e_hw *hw = &pf->hw;
5427 bool mdd_detected = false;
5432 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5435 /* find what triggered the MDD event */
5436 reg = rd32(hw, I40E_GL_MDET_TX);
5437 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5438 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
5439 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
5440 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
5441 >> I40E_GL_MDET_TX_EVENT_SHIFT;
5442 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
5443 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
5444 dev_info(&pf->pdev->dev,
5445 "Malicious Driver Detection TX event 0x%02x on q %d of function 0x%02x\n",
5446 event, queue, func);
5447 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5448 mdd_detected = true;
5450 reg = rd32(hw, I40E_GL_MDET_RX);
5451 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5452 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
5453 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
5454 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
5455 >> I40E_GL_MDET_RX_EVENT_SHIFT;
5456 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
5457 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
5458 dev_info(&pf->pdev->dev,
5459 "Malicious Driver Detection RX event 0x%02x on q %d of function 0x%02x\n",
5460 event, queue, func);
5461 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5462 mdd_detected = true;
5465 /* see if one of the VFs needs its hand slapped */
5466 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5468 reg = rd32(hw, I40E_VP_MDET_TX(i));
5469 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5470 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5471 vf->num_mdd_events++;
5472 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5475 reg = rd32(hw, I40E_VP_MDET_RX(i));
5476 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5477 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5478 vf->num_mdd_events++;
5479 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5482 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5483 dev_info(&pf->pdev->dev,
5484 "Too many MDD events on VF %d, disabled\n", i);
5485 dev_info(&pf->pdev->dev,
5486 "Use PF Control I/F to re-enable the VF\n");
5487 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5491 /* re-enable mdd interrupt cause */
5492 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5493 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5494 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5495 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5499 #ifdef CONFIG_I40E_VXLAN
5501 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5502 * @pf: board private structure
5504 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5506 const int vxlan_hdr_qwords = 4;
5507 struct i40e_hw *hw = &pf->hw;
5513 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5516 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5518 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5519 if (pf->pending_vxlan_bitmap & (1 << i)) {
5520 pf->pending_vxlan_bitmap &= ~(1 << i);
5521 port = pf->vxlan_ports[i];
5523 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5525 I40E_AQC_TUNNEL_TYPE_VXLAN,
5526 &filter_index, NULL)
5527 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5530 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5531 port ? "adding" : "deleting",
5532 ntohs(port), port ? i : i);
5534 pf->vxlan_ports[i] = 0;
5536 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5537 port ? "Added" : "Deleted",
5538 ntohs(port), port ? i : filter_index);
5546 * i40e_service_task - Run the driver's async subtasks
5547 * @work: pointer to work_struct containing our data
5549 static void i40e_service_task(struct work_struct *work)
5551 struct i40e_pf *pf = container_of(work,
5554 unsigned long start_time = jiffies;
5556 i40e_reset_subtask(pf);
5557 i40e_handle_mdd_event(pf);
5558 i40e_vc_process_vflr_event(pf);
5559 i40e_watchdog_subtask(pf);
5560 i40e_fdir_reinit_subtask(pf);
5561 i40e_check_hang_subtask(pf);
5562 i40e_sync_filters_subtask(pf);
5563 #ifdef CONFIG_I40E_VXLAN
5564 i40e_sync_vxlan_filters_subtask(pf);
5566 i40e_clean_adminq_subtask(pf);
5568 i40e_service_event_complete(pf);
5570 /* If the tasks have taken longer than one timer cycle or there
5571 * is more work to be done, reschedule the service task now
5572 * rather than wait for the timer to tick again.
5574 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5575 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5576 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5577 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5578 i40e_service_event_schedule(pf);
5582 * i40e_service_timer - timer callback
5583 * @data: pointer to PF struct
5585 static void i40e_service_timer(unsigned long data)
5587 struct i40e_pf *pf = (struct i40e_pf *)data;
5589 mod_timer(&pf->service_timer,
5590 round_jiffies(jiffies + pf->service_timer_period));
5591 i40e_service_event_schedule(pf);
5595 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
5596 * @vsi: the VSI being configured
5598 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
5600 struct i40e_pf *pf = vsi->back;
5602 switch (vsi->type) {
5604 vsi->alloc_queue_pairs = pf->num_lan_qps;
5605 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5606 I40E_REQ_DESCRIPTOR_MULTIPLE);
5607 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5608 vsi->num_q_vectors = pf->num_lan_msix;
5610 vsi->num_q_vectors = 1;
5615 vsi->alloc_queue_pairs = 1;
5616 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
5617 I40E_REQ_DESCRIPTOR_MULTIPLE);
5618 vsi->num_q_vectors = 1;
5621 case I40E_VSI_VMDQ2:
5622 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
5623 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5624 I40E_REQ_DESCRIPTOR_MULTIPLE);
5625 vsi->num_q_vectors = pf->num_vmdq_msix;
5628 case I40E_VSI_SRIOV:
5629 vsi->alloc_queue_pairs = pf->num_vf_qps;
5630 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5631 I40E_REQ_DESCRIPTOR_MULTIPLE);
5643 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
5644 * @type: VSI pointer
5645 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
5647 * On error: returns error code (negative)
5648 * On success: returns 0
5650 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
5655 /* allocate memory for both Tx and Rx ring pointers */
5656 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5657 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
5660 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5662 if (alloc_qvectors) {
5663 /* allocate memory for q_vector pointers */
5664 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5665 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
5666 if (!vsi->q_vectors) {
5674 kfree(vsi->tx_rings);
5679 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5680 * @pf: board private structure
5681 * @type: type of VSI
5683 * On error: returns error code (negative)
5684 * On success: returns vsi index in PF (positive)
5686 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5689 struct i40e_vsi *vsi;
5693 /* Need to protect the allocation of the VSIs at the PF level */
5694 mutex_lock(&pf->switch_mutex);
5696 /* VSI list may be fragmented if VSI creation/destruction has
5697 * been happening. We can afford to do a quick scan to look
5698 * for any free VSIs in the list.
5700 * find next empty vsi slot, looping back around if necessary
5703 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5705 if (i >= pf->hw.func_caps.num_vsis) {
5707 while (i < pf->next_vsi && pf->vsi[i])
5711 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5712 vsi_idx = i; /* Found one! */
5715 goto unlock_pf; /* out of VSI slots! */
5719 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5726 set_bit(__I40E_DOWN, &vsi->state);
5729 vsi->rx_itr_setting = pf->rx_itr_default;
5730 vsi->tx_itr_setting = pf->tx_itr_default;
5731 vsi->netdev_registered = false;
5732 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5733 INIT_LIST_HEAD(&vsi->mac_filter_list);
5735 ret = i40e_set_num_rings_in_vsi(vsi);
5739 ret = i40e_vsi_alloc_arrays(vsi, true);
5743 /* Setup default MSIX irq handler for VSI */
5744 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5746 pf->vsi[vsi_idx] = vsi;
5751 pf->next_vsi = i - 1;
5754 mutex_unlock(&pf->switch_mutex);
5759 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
5760 * @type: VSI pointer
5761 * @free_qvectors: a bool to specify if q_vectors need to be freed.
5763 * On error: returns error code (negative)
5764 * On success: returns 0
5766 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
5768 /* free the ring and vector containers */
5769 if (free_qvectors) {
5770 kfree(vsi->q_vectors);
5771 vsi->q_vectors = NULL;
5773 kfree(vsi->tx_rings);
5774 vsi->tx_rings = NULL;
5775 vsi->rx_rings = NULL;
5779 * i40e_vsi_clear - Deallocate the VSI provided
5780 * @vsi: the VSI being un-configured
5782 static int i40e_vsi_clear(struct i40e_vsi *vsi)
5793 mutex_lock(&pf->switch_mutex);
5794 if (!pf->vsi[vsi->idx]) {
5795 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5796 vsi->idx, vsi->idx, vsi, vsi->type);
5800 if (pf->vsi[vsi->idx] != vsi) {
5801 dev_err(&pf->pdev->dev,
5802 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5803 pf->vsi[vsi->idx]->idx,
5805 pf->vsi[vsi->idx]->type,
5806 vsi->idx, vsi, vsi->type);
5810 /* updates the pf for this cleared vsi */
5811 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5812 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5814 i40e_vsi_free_arrays(vsi, true);
5816 pf->vsi[vsi->idx] = NULL;
5817 if (vsi->idx < pf->next_vsi)
5818 pf->next_vsi = vsi->idx;
5821 mutex_unlock(&pf->switch_mutex);
5829 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5830 * @vsi: the VSI being cleaned
5832 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5836 if (vsi->tx_rings && vsi->tx_rings[0]) {
5837 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5838 kfree_rcu(vsi->tx_rings[i], rcu);
5839 vsi->tx_rings[i] = NULL;
5840 vsi->rx_rings[i] = NULL;
5846 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5847 * @vsi: the VSI being configured
5849 static int i40e_alloc_rings(struct i40e_vsi *vsi)
5851 struct i40e_pf *pf = vsi->back;
5854 /* Set basic values in the rings to be used later during open() */
5855 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5856 struct i40e_ring *tx_ring;
5857 struct i40e_ring *rx_ring;
5859 /* allocate space for both Tx and Rx in one shot */
5860 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
5864 tx_ring->queue_index = i;
5865 tx_ring->reg_idx = vsi->base_queue + i;
5866 tx_ring->ring_active = false;
5868 tx_ring->netdev = vsi->netdev;
5869 tx_ring->dev = &pf->pdev->dev;
5870 tx_ring->count = vsi->num_desc;
5872 tx_ring->dcb_tc = 0;
5873 vsi->tx_rings[i] = tx_ring;
5875 rx_ring = &tx_ring[1];
5876 rx_ring->queue_index = i;
5877 rx_ring->reg_idx = vsi->base_queue + i;
5878 rx_ring->ring_active = false;
5880 rx_ring->netdev = vsi->netdev;
5881 rx_ring->dev = &pf->pdev->dev;
5882 rx_ring->count = vsi->num_desc;
5884 rx_ring->dcb_tc = 0;
5885 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
5886 set_ring_16byte_desc_enabled(rx_ring);
5888 clear_ring_16byte_desc_enabled(rx_ring);
5889 vsi->rx_rings[i] = rx_ring;
5895 i40e_vsi_clear_rings(vsi);
5900 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
5901 * @pf: board private structure
5902 * @vectors: the number of MSI-X vectors to request
5904 * Returns the number of vectors reserved, or error
5906 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
5908 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
5909 I40E_MIN_MSIX, vectors);
5911 dev_info(&pf->pdev->dev,
5912 "MSI-X vector reservation failed: %d\n", vectors);
5916 pf->num_msix_entries = vectors;
5922 * i40e_init_msix - Setup the MSIX capability
5923 * @pf: board private structure
5925 * Work with the OS to set up the MSIX vectors needed.
5927 * Returns 0 on success, negative on failure
5929 static int i40e_init_msix(struct i40e_pf *pf)
5931 i40e_status err = 0;
5932 struct i40e_hw *hw = &pf->hw;
5936 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
5939 /* The number of vectors we'll request will be comprised of:
5940 * - Add 1 for "other" cause for Admin Queue events, etc.
5941 * - The number of LAN queue pairs
5942 * - Queues being used for RSS.
5943 * We don't need as many as max_rss_size vectors.
5944 * use rss_size instead in the calculation since that
5945 * is governed by number of cpus in the system.
5946 * - assumes symmetric Tx/Rx pairing
5947 * - The number of VMDq pairs
5948 * Once we count this up, try the request.
5950 * If we can't get what we want, we'll simplify to nearly nothing
5951 * and try again. If that still fails, we punt.
5953 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
5954 pf->num_vmdq_msix = pf->num_vmdq_qps;
5955 v_budget = 1 + pf->num_lan_msix;
5956 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
5957 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
5960 /* Scale down if necessary, and the rings will share vectors */
5961 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
5963 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
5965 if (!pf->msix_entries)
5968 for (i = 0; i < v_budget; i++)
5969 pf->msix_entries[i].entry = i;
5970 vec = i40e_reserve_msix_vectors(pf, v_budget);
5971 if (vec < I40E_MIN_MSIX) {
5972 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
5973 kfree(pf->msix_entries);
5974 pf->msix_entries = NULL;
5977 } else if (vec == I40E_MIN_MSIX) {
5978 /* Adjust for minimal MSIX use */
5979 dev_info(&pf->pdev->dev, "Features disabled, not enough MSI-X vectors\n");
5980 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
5981 pf->num_vmdq_vsis = 0;
5982 pf->num_vmdq_qps = 0;
5983 pf->num_vmdq_msix = 0;
5984 pf->num_lan_qps = 1;
5985 pf->num_lan_msix = 1;
5987 } else if (vec != v_budget) {
5988 /* Scale vector usage down */
5989 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
5990 vec--; /* reserve the misc vector */
5992 /* partition out the remaining vectors */
5995 pf->num_vmdq_vsis = 1;
5996 pf->num_lan_msix = 1;
5999 pf->num_vmdq_vsis = 1;
6000 pf->num_lan_msix = 2;
6003 pf->num_lan_msix = min_t(int, (vec / 2),
6005 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6006 I40E_DEFAULT_NUM_VMDQ_VSI);
6015 * i40e_alloc_q_vector - Allocate memory for a single interrupt vector
6016 * @vsi: the VSI being configured
6017 * @v_idx: index of the vector in the vsi struct
6019 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6021 static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6023 struct i40e_q_vector *q_vector;
6025 /* allocate q_vector */
6026 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6030 q_vector->vsi = vsi;
6031 q_vector->v_idx = v_idx;
6032 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6034 netif_napi_add(vsi->netdev, &q_vector->napi,
6035 i40e_napi_poll, vsi->work_limit);
6037 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6038 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6040 /* tie q_vector and vsi together */
6041 vsi->q_vectors[v_idx] = q_vector;
6047 * i40e_alloc_q_vectors - Allocate memory for interrupt vectors
6048 * @vsi: the VSI being configured
6050 * We allocate one q_vector per queue interrupt. If allocation fails we
6053 static int i40e_alloc_q_vectors(struct i40e_vsi *vsi)
6055 struct i40e_pf *pf = vsi->back;
6056 int v_idx, num_q_vectors;
6059 /* if not MSIX, give the one vector only to the LAN VSI */
6060 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6061 num_q_vectors = vsi->num_q_vectors;
6062 else if (vsi == pf->vsi[pf->lan_vsi])
6067 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6068 err = i40e_alloc_q_vector(vsi, v_idx);
6077 i40e_free_q_vector(vsi, v_idx);
6083 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6084 * @pf: board private structure to initialize
6086 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6090 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6091 err = i40e_init_msix(pf);
6093 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6094 I40E_FLAG_RSS_ENABLED |
6095 I40E_FLAG_DCB_ENABLED |
6096 I40E_FLAG_SRIOV_ENABLED |
6097 I40E_FLAG_FD_SB_ENABLED |
6098 I40E_FLAG_FD_ATR_ENABLED |
6099 I40E_FLAG_VMDQ_ENABLED);
6101 /* rework the queue expectations without MSIX */
6102 i40e_determine_queue_usage(pf);
6106 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6107 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6108 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6109 err = pci_enable_msi(pf->pdev);
6111 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6112 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6116 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6117 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6119 /* track first vector for misc interrupts */
6120 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6124 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6125 * @pf: board private structure
6127 * This sets up the handler for MSIX 0, which is used to manage the
6128 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6129 * when in MSI or Legacy interrupt mode.
6131 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6133 struct i40e_hw *hw = &pf->hw;
6136 /* Only request the irq if this is the first time through, and
6137 * not when we're rebuilding after a Reset
6139 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6140 err = request_irq(pf->msix_entries[0].vector,
6141 i40e_intr, 0, pf->misc_int_name, pf);
6143 dev_info(&pf->pdev->dev,
6144 "request_irq for %s failed: %d\n",
6145 pf->misc_int_name, err);
6150 i40e_enable_misc_int_causes(hw);
6152 /* associate no queues to the misc vector */
6153 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6154 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6158 i40e_irq_dynamic_enable_icr0(pf);
6164 * i40e_config_rss - Prepare for RSS if used
6165 * @pf: board private structure
6167 static int i40e_config_rss(struct i40e_pf *pf)
6169 /* Set of random keys generated using kernel random number generator */
6170 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6171 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6172 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6173 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6174 struct i40e_hw *hw = &pf->hw;
6179 /* Fill out hash function seed */
6180 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6181 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6183 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6184 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6185 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6186 hena |= I40E_DEFAULT_RSS_HENA;
6187 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6188 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6190 /* Populate the LUT with max no. of queues in round robin fashion */
6191 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
6193 /* The assumption is that lan qp count will be the highest
6194 * qp count for any PF VSI that needs RSS.
6195 * If multiple VSIs need RSS support, all the qp counts
6196 * for those VSIs should be a power of 2 for RSS to work.
6197 * If LAN VSI is the only consumer for RSS then this requirement
6200 if (j == pf->rss_size)
6202 /* lut = 4-byte sliding window of 4 lut entries */
6203 lut = (lut << 8) | (j &
6204 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6205 /* On i = 3, we have 4 entries in lut; write to the register */
6207 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6215 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6216 * @pf: board private structure
6217 * @queue_count: the requested queue count for rss.
6219 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6220 * count which may be different from the requested queue count.
6222 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6224 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6227 queue_count = min_t(int, queue_count, pf->rss_size_max);
6228 queue_count = rounddown_pow_of_two(queue_count);
6230 if (queue_count != pf->rss_size) {
6231 i40e_prep_for_reset(pf);
6233 pf->rss_size = queue_count;
6235 i40e_reset_and_rebuild(pf, true);
6236 i40e_config_rss(pf);
6238 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6239 return pf->rss_size;
6243 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6244 * @pf: board private structure to initialize
6246 * i40e_sw_init initializes the Adapter private data structure.
6247 * Fields are initialized based on PCI device information and
6248 * OS network device settings (MTU size).
6250 static int i40e_sw_init(struct i40e_pf *pf)
6255 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6256 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6257 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6258 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6259 if (I40E_DEBUG_USER & debug)
6260 pf->hw.debug_mask = debug;
6261 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6262 I40E_DEFAULT_MSG_ENABLE);
6265 /* Set default capability flags */
6266 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6267 I40E_FLAG_MSI_ENABLED |
6268 I40E_FLAG_MSIX_ENABLED |
6269 I40E_FLAG_RX_1BUF_ENABLED;
6271 /* Depending on PF configurations, it is possible that the RSS
6272 * maximum might end up larger than the available queues
6274 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6275 pf->rss_size_max = min_t(int, pf->rss_size_max,
6276 pf->hw.func_caps.num_tx_qp);
6277 if (pf->hw.func_caps.rss) {
6278 pf->flags |= I40E_FLAG_RSS_ENABLED;
6279 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6280 pf->rss_size = rounddown_pow_of_two(pf->rss_size);
6285 /* MFP mode enabled */
6286 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6287 pf->flags |= I40E_FLAG_MFP_ENABLED;
6288 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6291 /* FW/NVM is not yet fixed in this regard */
6292 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6293 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6294 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6295 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6296 dev_info(&pf->pdev->dev,
6297 "Flow Director ATR mode Enabled\n");
6298 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6299 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6300 dev_info(&pf->pdev->dev,
6301 "Flow Director Side Band mode Enabled\n");
6303 dev_info(&pf->pdev->dev,
6304 "Flow Director Side Band mode Disabled in MFP mode\n");
6306 pf->fdir_pf_filter_count =
6307 pf->hw.func_caps.fd_filters_guaranteed;
6308 pf->hw.fdir_shared_filter_count =
6309 pf->hw.func_caps.fd_filters_best_effort;
6312 if (pf->hw.func_caps.vmdq) {
6313 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6314 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6315 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6318 #ifdef CONFIG_PCI_IOV
6319 if (pf->hw.func_caps.num_vfs) {
6320 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6321 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6322 pf->num_req_vfs = min_t(int,
6323 pf->hw.func_caps.num_vfs,
6325 dev_info(&pf->pdev->dev,
6326 "Number of VFs being requested for PF[%d] = %d\n",
6327 pf->hw.pf_id, pf->num_req_vfs);
6329 #endif /* CONFIG_PCI_IOV */
6330 pf->eeprom_version = 0xDEAD;
6331 pf->lan_veb = I40E_NO_VEB;
6332 pf->lan_vsi = I40E_NO_VSI;
6334 /* set up queue assignment tracking */
6335 size = sizeof(struct i40e_lump_tracking)
6336 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6337 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6342 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6343 pf->qp_pile->search_hint = 0;
6345 /* set up vector assignment tracking */
6346 size = sizeof(struct i40e_lump_tracking)
6347 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6348 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6349 if (!pf->irq_pile) {
6354 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6355 pf->irq_pile->search_hint = 0;
6357 mutex_init(&pf->switch_mutex);
6364 * i40e_set_features - set the netdev feature flags
6365 * @netdev: ptr to the netdev being adjusted
6366 * @features: the feature set that the stack is suggesting
6368 static int i40e_set_features(struct net_device *netdev,
6369 netdev_features_t features)
6371 struct i40e_netdev_priv *np = netdev_priv(netdev);
6372 struct i40e_vsi *vsi = np->vsi;
6374 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6375 i40e_vlan_stripping_enable(vsi);
6377 i40e_vlan_stripping_disable(vsi);
6382 #ifdef CONFIG_I40E_VXLAN
6384 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6385 * @pf: board private structure
6386 * @port: The UDP port to look up
6388 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6390 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6394 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6395 if (pf->vxlan_ports[i] == port)
6403 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6404 * @netdev: This physical port's netdev
6405 * @sa_family: Socket Family that VXLAN is notifying us about
6406 * @port: New UDP port number that VXLAN started listening to
6408 static void i40e_add_vxlan_port(struct net_device *netdev,
6409 sa_family_t sa_family, __be16 port)
6411 struct i40e_netdev_priv *np = netdev_priv(netdev);
6412 struct i40e_vsi *vsi = np->vsi;
6413 struct i40e_pf *pf = vsi->back;
6417 if (sa_family == AF_INET6)
6420 idx = i40e_get_vxlan_port_idx(pf, port);
6422 /* Check if port already exists */
6423 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6424 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6428 /* Now check if there is space to add the new port */
6429 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6431 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6432 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6437 /* New port: add it and mark its index in the bitmap */
6438 pf->vxlan_ports[next_idx] = port;
6439 pf->pending_vxlan_bitmap |= (1 << next_idx);
6441 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6445 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6446 * @netdev: This physical port's netdev
6447 * @sa_family: Socket Family that VXLAN is notifying us about
6448 * @port: UDP port number that VXLAN stopped listening to
6450 static void i40e_del_vxlan_port(struct net_device *netdev,
6451 sa_family_t sa_family, __be16 port)
6453 struct i40e_netdev_priv *np = netdev_priv(netdev);
6454 struct i40e_vsi *vsi = np->vsi;
6455 struct i40e_pf *pf = vsi->back;
6458 if (sa_family == AF_INET6)
6461 idx = i40e_get_vxlan_port_idx(pf, port);
6463 /* Check if port already exists */
6464 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6465 /* if port exists, set it to 0 (mark for deletion)
6466 * and make it pending
6468 pf->vxlan_ports[idx] = 0;
6470 pf->pending_vxlan_bitmap |= (1 << idx);
6472 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6474 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6480 static const struct net_device_ops i40e_netdev_ops = {
6481 .ndo_open = i40e_open,
6482 .ndo_stop = i40e_close,
6483 .ndo_start_xmit = i40e_lan_xmit_frame,
6484 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
6485 .ndo_set_rx_mode = i40e_set_rx_mode,
6486 .ndo_validate_addr = eth_validate_addr,
6487 .ndo_set_mac_address = i40e_set_mac,
6488 .ndo_change_mtu = i40e_change_mtu,
6489 .ndo_do_ioctl = i40e_ioctl,
6490 .ndo_tx_timeout = i40e_tx_timeout,
6491 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
6492 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
6493 #ifdef CONFIG_NET_POLL_CONTROLLER
6494 .ndo_poll_controller = i40e_netpoll,
6496 .ndo_setup_tc = i40e_setup_tc,
6497 .ndo_set_features = i40e_set_features,
6498 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6499 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6500 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
6501 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6502 #ifdef CONFIG_I40E_VXLAN
6503 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6504 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6509 * i40e_config_netdev - Setup the netdev flags
6510 * @vsi: the VSI being configured
6512 * Returns 0 on success, negative value on failure
6514 static int i40e_config_netdev(struct i40e_vsi *vsi)
6516 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6517 struct i40e_pf *pf = vsi->back;
6518 struct i40e_hw *hw = &pf->hw;
6519 struct i40e_netdev_priv *np;
6520 struct net_device *netdev;
6521 u8 mac_addr[ETH_ALEN];
6524 etherdev_size = sizeof(struct i40e_netdev_priv);
6525 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
6529 vsi->netdev = netdev;
6530 np = netdev_priv(netdev);
6533 netdev->hw_enc_features = NETIF_F_IP_CSUM |
6534 NETIF_F_GSO_UDP_TUNNEL |
6538 netdev->features = NETIF_F_SG |
6542 NETIF_F_GSO_UDP_TUNNEL |
6543 NETIF_F_HW_VLAN_CTAG_TX |
6544 NETIF_F_HW_VLAN_CTAG_RX |
6545 NETIF_F_HW_VLAN_CTAG_FILTER |
6553 /* copy netdev features into list of user selectable features */
6554 netdev->hw_features |= netdev->features;
6556 if (vsi->type == I40E_VSI_MAIN) {
6557 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6558 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
6560 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6561 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
6562 pf->vsi[pf->lan_vsi]->netdev->name);
6563 random_ether_addr(mac_addr);
6564 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
6566 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6568 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
6569 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
6570 /* vlan gets same features (except vlan offload)
6571 * after any tweaks for specific VSI types
6573 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
6574 NETIF_F_HW_VLAN_CTAG_RX |
6575 NETIF_F_HW_VLAN_CTAG_FILTER);
6576 netdev->priv_flags |= IFF_UNICAST_FLT;
6577 netdev->priv_flags |= IFF_SUPP_NOFCS;
6578 /* Setup netdev TC information */
6579 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
6581 netdev->netdev_ops = &i40e_netdev_ops;
6582 netdev->watchdog_timeo = 5 * HZ;
6583 i40e_set_ethtool_ops(netdev);
6589 * i40e_vsi_delete - Delete a VSI from the switch
6590 * @vsi: the VSI being removed
6592 * Returns 0 on success, negative value on failure
6594 static void i40e_vsi_delete(struct i40e_vsi *vsi)
6596 /* remove default VSI is not allowed */
6597 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
6600 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6605 * i40e_add_vsi - Add a VSI to the switch
6606 * @vsi: the VSI being configured
6608 * This initializes a VSI context depending on the VSI type to be added and
6609 * passes it down to the add_vsi aq command.
6611 static int i40e_add_vsi(struct i40e_vsi *vsi)
6614 struct i40e_mac_filter *f, *ftmp;
6615 struct i40e_pf *pf = vsi->back;
6616 struct i40e_hw *hw = &pf->hw;
6617 struct i40e_vsi_context ctxt;
6618 u8 enabled_tc = 0x1; /* TC0 enabled */
6621 memset(&ctxt, 0, sizeof(ctxt));
6622 switch (vsi->type) {
6624 /* The PF's main VSI is already setup as part of the
6625 * device initialization, so we'll not bother with
6626 * the add_vsi call, but we will retrieve the current
6629 ctxt.seid = pf->main_vsi_seid;
6630 ctxt.pf_num = pf->hw.pf_id;
6632 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6633 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6635 dev_info(&pf->pdev->dev,
6636 "couldn't get pf vsi config, err %d, aq_err %d\n",
6637 ret, pf->hw.aq.asq_last_status);
6640 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6641 vsi->info.valid_sections = 0;
6643 vsi->seid = ctxt.seid;
6644 vsi->id = ctxt.vsi_number;
6646 enabled_tc = i40e_pf_get_tc_map(pf);
6648 /* MFP mode setup queue map and update VSI */
6649 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6650 memset(&ctxt, 0, sizeof(ctxt));
6651 ctxt.seid = pf->main_vsi_seid;
6652 ctxt.pf_num = pf->hw.pf_id;
6654 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
6655 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
6657 dev_info(&pf->pdev->dev,
6658 "update vsi failed, aq_err=%d\n",
6659 pf->hw.aq.asq_last_status);
6663 /* update the local VSI info queue map */
6664 i40e_vsi_update_queue_map(vsi, &ctxt);
6665 vsi->info.valid_sections = 0;
6667 /* Default/Main VSI is only enabled for TC0
6668 * reconfigure it to enable all TCs that are
6669 * available on the port in SFP mode.
6671 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6673 dev_info(&pf->pdev->dev,
6674 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
6676 pf->hw.aq.asq_last_status);
6683 ctxt.pf_num = hw->pf_id;
6685 ctxt.uplink_seid = vsi->uplink_seid;
6686 ctxt.connection_type = 0x1; /* regular data port */
6687 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6688 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6691 case I40E_VSI_VMDQ2:
6692 ctxt.pf_num = hw->pf_id;
6694 ctxt.uplink_seid = vsi->uplink_seid;
6695 ctxt.connection_type = 0x1; /* regular data port */
6696 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6698 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6700 /* This VSI is connected to VEB so the switch_id
6701 * should be set to zero by default.
6703 ctxt.info.switch_id = 0;
6704 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
6705 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6707 /* Setup the VSI tx/rx queue map for TC0 only for now */
6708 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6711 case I40E_VSI_SRIOV:
6712 ctxt.pf_num = hw->pf_id;
6713 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
6714 ctxt.uplink_seid = vsi->uplink_seid;
6715 ctxt.connection_type = 0x1; /* regular data port */
6716 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
6718 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6720 /* This VSI is connected to VEB so the switch_id
6721 * should be set to zero by default.
6723 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6725 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6726 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
6727 /* Setup the VSI tx/rx queue map for TC0 only for now */
6728 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6735 if (vsi->type != I40E_VSI_MAIN) {
6736 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6738 dev_info(&vsi->back->pdev->dev,
6739 "add vsi failed, aq_err=%d\n",
6740 vsi->back->hw.aq.asq_last_status);
6744 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6745 vsi->info.valid_sections = 0;
6746 vsi->seid = ctxt.seid;
6747 vsi->id = ctxt.vsi_number;
6750 /* If macvlan filters already exist, force them to get loaded */
6751 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
6756 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
6757 pf->flags |= I40E_FLAG_FILTER_SYNC;
6760 /* Update VSI BW information */
6761 ret = i40e_vsi_get_bw_info(vsi);
6763 dev_info(&pf->pdev->dev,
6764 "couldn't get vsi bw info, err %d, aq_err %d\n",
6765 ret, pf->hw.aq.asq_last_status);
6766 /* VSI is already added so not tearing that up */
6775 * i40e_vsi_release - Delete a VSI and free its resources
6776 * @vsi: the VSI being removed
6778 * Returns 0 on success or < 0 on error
6780 int i40e_vsi_release(struct i40e_vsi *vsi)
6782 struct i40e_mac_filter *f, *ftmp;
6783 struct i40e_veb *veb = NULL;
6790 /* release of a VEB-owner or last VSI is not allowed */
6791 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6792 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6793 vsi->seid, vsi->uplink_seid);
6796 if (vsi == pf->vsi[pf->lan_vsi] &&
6797 !test_bit(__I40E_DOWN, &pf->state)) {
6798 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6802 uplink_seid = vsi->uplink_seid;
6803 if (vsi->type != I40E_VSI_SRIOV) {
6804 if (vsi->netdev_registered) {
6805 vsi->netdev_registered = false;
6807 /* results in a call to i40e_close() */
6808 unregister_netdev(vsi->netdev);
6809 free_netdev(vsi->netdev);
6813 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6815 i40e_vsi_free_irq(vsi);
6816 i40e_vsi_free_tx_resources(vsi);
6817 i40e_vsi_free_rx_resources(vsi);
6819 i40e_vsi_disable_irq(vsi);
6822 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6823 i40e_del_filter(vsi, f->macaddr, f->vlan,
6824 f->is_vf, f->is_netdev);
6825 i40e_sync_vsi_filters(vsi);
6827 i40e_vsi_delete(vsi);
6828 i40e_vsi_free_q_vectors(vsi);
6829 i40e_vsi_clear_rings(vsi);
6830 i40e_vsi_clear(vsi);
6832 /* If this was the last thing on the VEB, except for the
6833 * controlling VSI, remove the VEB, which puts the controlling
6834 * VSI onto the next level down in the switch.
6836 * Well, okay, there's one more exception here: don't remove
6837 * the orphan VEBs yet. We'll wait for an explicit remove request
6838 * from up the network stack.
6840 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6842 pf->vsi[i]->uplink_seid == uplink_seid &&
6843 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6844 n++; /* count the VSIs */
6847 for (i = 0; i < I40E_MAX_VEB; i++) {
6850 if (pf->veb[i]->uplink_seid == uplink_seid)
6851 n++; /* count the VEBs */
6852 if (pf->veb[i]->seid == uplink_seid)
6855 if (n == 0 && veb && veb->uplink_seid != 0)
6856 i40e_veb_release(veb);
6862 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
6863 * @vsi: ptr to the VSI
6865 * This should only be called after i40e_vsi_mem_alloc() which allocates the
6866 * corresponding SW VSI structure and initializes num_queue_pairs for the
6867 * newly allocated VSI.
6869 * Returns 0 on success or negative on failure
6871 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
6874 struct i40e_pf *pf = vsi->back;
6876 if (vsi->q_vectors[0]) {
6877 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
6882 if (vsi->base_vector) {
6883 dev_info(&pf->pdev->dev,
6884 "VSI %d has non-zero base vector %d\n",
6885 vsi->seid, vsi->base_vector);
6889 ret = i40e_alloc_q_vectors(vsi);
6891 dev_info(&pf->pdev->dev,
6892 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
6893 vsi->num_q_vectors, vsi->seid, ret);
6894 vsi->num_q_vectors = 0;
6895 goto vector_setup_out;
6898 if (vsi->num_q_vectors)
6899 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
6900 vsi->num_q_vectors, vsi->idx);
6901 if (vsi->base_vector < 0) {
6902 dev_info(&pf->pdev->dev,
6903 "failed to get q tracking for VSI %d, err=%d\n",
6904 vsi->seid, vsi->base_vector);
6905 i40e_vsi_free_q_vectors(vsi);
6907 goto vector_setup_out;
6915 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
6916 * @vsi: pointer to the vsi.
6918 * This re-allocates a vsi's queue resources.
6920 * Returns pointer to the successfully allocated and configured VSI sw struct
6921 * on success, otherwise returns NULL on failure.
6923 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
6925 struct i40e_pf *pf = vsi->back;
6929 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6930 i40e_vsi_clear_rings(vsi);
6932 i40e_vsi_free_arrays(vsi, false);
6933 i40e_set_num_rings_in_vsi(vsi);
6934 ret = i40e_vsi_alloc_arrays(vsi, false);
6938 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
6940 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
6944 vsi->base_queue = ret;
6946 /* Update the FW view of the VSI. Force a reset of TC and queue
6947 * layout configurations.
6949 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
6950 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
6951 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
6952 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
6954 /* assign it some queues */
6955 ret = i40e_alloc_rings(vsi);
6959 /* map all of the rings to the q_vectors */
6960 i40e_vsi_map_rings_to_vectors(vsi);
6964 i40e_vsi_free_q_vectors(vsi);
6965 if (vsi->netdev_registered) {
6966 vsi->netdev_registered = false;
6967 unregister_netdev(vsi->netdev);
6968 free_netdev(vsi->netdev);
6971 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
6973 i40e_vsi_clear(vsi);
6978 * i40e_vsi_setup - Set up a VSI by a given type
6979 * @pf: board private structure
6981 * @uplink_seid: the switch element to link to
6982 * @param1: usage depends upon VSI type. For VF types, indicates VF id
6984 * This allocates the sw VSI structure and its queue resources, then add a VSI
6985 * to the identified VEB.
6987 * Returns pointer to the successfully allocated and configure VSI sw struct on
6988 * success, otherwise returns NULL on failure.
6990 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
6991 u16 uplink_seid, u32 param1)
6993 struct i40e_vsi *vsi = NULL;
6994 struct i40e_veb *veb = NULL;
6998 /* The requested uplink_seid must be either
6999 * - the PF's port seid
7000 * no VEB is needed because this is the PF
7001 * or this is a Flow Director special case VSI
7002 * - seid of an existing VEB
7003 * - seid of a VSI that owns an existing VEB
7004 * - seid of a VSI that doesn't own a VEB
7005 * a new VEB is created and the VSI becomes the owner
7006 * - seid of the PF VSI, which is what creates the first VEB
7007 * this is a special case of the previous
7009 * Find which uplink_seid we were given and create a new VEB if needed
7011 for (i = 0; i < I40E_MAX_VEB; i++) {
7012 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7018 if (!veb && uplink_seid != pf->mac_seid) {
7020 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7021 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7027 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7032 if (vsi->uplink_seid == pf->mac_seid)
7033 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7034 vsi->tc_config.enabled_tc);
7035 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7036 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7037 vsi->tc_config.enabled_tc);
7039 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7040 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7044 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7048 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7049 uplink_seid = veb->seid;
7052 /* get vsi sw struct */
7053 v_idx = i40e_vsi_mem_alloc(pf, type);
7056 vsi = pf->vsi[v_idx];
7060 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7062 if (type == I40E_VSI_MAIN)
7063 pf->lan_vsi = v_idx;
7064 else if (type == I40E_VSI_SRIOV)
7065 vsi->vf_id = param1;
7066 /* assign it some queues */
7067 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7070 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7074 vsi->base_queue = ret;
7076 /* get a VSI from the hardware */
7077 vsi->uplink_seid = uplink_seid;
7078 ret = i40e_add_vsi(vsi);
7082 switch (vsi->type) {
7083 /* setup the netdev if needed */
7085 case I40E_VSI_VMDQ2:
7086 ret = i40e_config_netdev(vsi);
7089 ret = register_netdev(vsi->netdev);
7092 vsi->netdev_registered = true;
7093 netif_carrier_off(vsi->netdev);
7094 #ifdef CONFIG_I40E_DCB
7095 /* Setup DCB netlink interface */
7096 i40e_dcbnl_setup(vsi);
7097 #endif /* CONFIG_I40E_DCB */
7101 /* set up vectors and rings if needed */
7102 ret = i40e_vsi_setup_vectors(vsi);
7106 ret = i40e_alloc_rings(vsi);
7110 /* map all of the rings to the q_vectors */
7111 i40e_vsi_map_rings_to_vectors(vsi);
7113 i40e_vsi_reset_stats(vsi);
7117 /* no netdev or rings for the other VSI types */
7124 i40e_vsi_free_q_vectors(vsi);
7126 if (vsi->netdev_registered) {
7127 vsi->netdev_registered = false;
7128 unregister_netdev(vsi->netdev);
7129 free_netdev(vsi->netdev);
7133 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7135 i40e_vsi_clear(vsi);
7141 * i40e_veb_get_bw_info - Query VEB BW information
7142 * @veb: the veb to query
7144 * Query the Tx scheduler BW configuration data for given VEB
7146 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7148 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7149 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7150 struct i40e_pf *pf = veb->pf;
7151 struct i40e_hw *hw = &pf->hw;
7156 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7159 dev_info(&pf->pdev->dev,
7160 "query veb bw config failed, aq_err=%d\n",
7161 hw->aq.asq_last_status);
7165 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7168 dev_info(&pf->pdev->dev,
7169 "query veb bw ets config failed, aq_err=%d\n",
7170 hw->aq.asq_last_status);
7174 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7175 veb->bw_max_quanta = ets_data.tc_bw_max;
7176 veb->is_abs_credits = bw_data.absolute_credits_enable;
7177 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7178 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7179 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7180 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7181 veb->bw_tc_limit_credits[i] =
7182 le16_to_cpu(bw_data.tc_bw_limits[i]);
7183 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7191 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7192 * @pf: board private structure
7194 * On error: returns error code (negative)
7195 * On success: returns vsi index in PF (positive)
7197 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7200 struct i40e_veb *veb;
7203 /* Need to protect the allocation of switch elements at the PF level */
7204 mutex_lock(&pf->switch_mutex);
7206 /* VEB list may be fragmented if VEB creation/destruction has
7207 * been happening. We can afford to do a quick scan to look
7208 * for any free slots in the list.
7210 * find next empty veb slot, looping back around if necessary
7213 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7215 if (i >= I40E_MAX_VEB) {
7217 goto err_alloc_veb; /* out of VEB slots! */
7220 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7227 veb->enabled_tc = 1;
7232 mutex_unlock(&pf->switch_mutex);
7237 * i40e_switch_branch_release - Delete a branch of the switch tree
7238 * @branch: where to start deleting
7240 * This uses recursion to find the tips of the branch to be
7241 * removed, deleting until we get back to and can delete this VEB.
7243 static void i40e_switch_branch_release(struct i40e_veb *branch)
7245 struct i40e_pf *pf = branch->pf;
7246 u16 branch_seid = branch->seid;
7247 u16 veb_idx = branch->idx;
7250 /* release any VEBs on this VEB - RECURSION */
7251 for (i = 0; i < I40E_MAX_VEB; i++) {
7254 if (pf->veb[i]->uplink_seid == branch->seid)
7255 i40e_switch_branch_release(pf->veb[i]);
7258 /* Release the VSIs on this VEB, but not the owner VSI.
7260 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7261 * the VEB itself, so don't use (*branch) after this loop.
7263 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7266 if (pf->vsi[i]->uplink_seid == branch_seid &&
7267 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7268 i40e_vsi_release(pf->vsi[i]);
7272 /* There's one corner case where the VEB might not have been
7273 * removed, so double check it here and remove it if needed.
7274 * This case happens if the veb was created from the debugfs
7275 * commands and no VSIs were added to it.
7277 if (pf->veb[veb_idx])
7278 i40e_veb_release(pf->veb[veb_idx]);
7282 * i40e_veb_clear - remove veb struct
7283 * @veb: the veb to remove
7285 static void i40e_veb_clear(struct i40e_veb *veb)
7291 struct i40e_pf *pf = veb->pf;
7293 mutex_lock(&pf->switch_mutex);
7294 if (pf->veb[veb->idx] == veb)
7295 pf->veb[veb->idx] = NULL;
7296 mutex_unlock(&pf->switch_mutex);
7303 * i40e_veb_release - Delete a VEB and free its resources
7304 * @veb: the VEB being removed
7306 void i40e_veb_release(struct i40e_veb *veb)
7308 struct i40e_vsi *vsi = NULL;
7314 /* find the remaining VSI and check for extras */
7315 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7316 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7322 dev_info(&pf->pdev->dev,
7323 "can't remove VEB %d with %d VSIs left\n",
7328 /* move the remaining VSI to uplink veb */
7329 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7330 if (veb->uplink_seid) {
7331 vsi->uplink_seid = veb->uplink_seid;
7332 if (veb->uplink_seid == pf->mac_seid)
7333 vsi->veb_idx = I40E_NO_VEB;
7335 vsi->veb_idx = veb->veb_idx;
7338 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7339 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7342 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7343 i40e_veb_clear(veb);
7349 * i40e_add_veb - create the VEB in the switch
7350 * @veb: the VEB to be instantiated
7351 * @vsi: the controlling VSI
7353 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7355 bool is_default = false;
7356 bool is_cloud = false;
7359 /* get a VEB from the hardware */
7360 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
7361 veb->enabled_tc, is_default,
7362 is_cloud, &veb->seid, NULL);
7364 dev_info(&veb->pf->pdev->dev,
7365 "couldn't add VEB, err %d, aq_err %d\n",
7366 ret, veb->pf->hw.aq.asq_last_status);
7370 /* get statistics counter */
7371 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
7372 &veb->stats_idx, NULL, NULL, NULL);
7374 dev_info(&veb->pf->pdev->dev,
7375 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
7376 ret, veb->pf->hw.aq.asq_last_status);
7379 ret = i40e_veb_get_bw_info(veb);
7381 dev_info(&veb->pf->pdev->dev,
7382 "couldn't get VEB bw info, err %d, aq_err %d\n",
7383 ret, veb->pf->hw.aq.asq_last_status);
7384 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
7388 vsi->uplink_seid = veb->seid;
7389 vsi->veb_idx = veb->idx;
7390 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7396 * i40e_veb_setup - Set up a VEB
7397 * @pf: board private structure
7398 * @flags: VEB setup flags
7399 * @uplink_seid: the switch element to link to
7400 * @vsi_seid: the initial VSI seid
7401 * @enabled_tc: Enabled TC bit-map
7403 * This allocates the sw VEB structure and links it into the switch
7404 * It is possible and legal for this to be a duplicate of an already
7405 * existing VEB. It is also possible for both uplink and vsi seids
7406 * to be zero, in order to create a floating VEB.
7408 * Returns pointer to the successfully allocated VEB sw struct on
7409 * success, otherwise returns NULL on failure.
7411 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7412 u16 uplink_seid, u16 vsi_seid,
7415 struct i40e_veb *veb, *uplink_veb = NULL;
7416 int vsi_idx, veb_idx;
7419 /* if one seid is 0, the other must be 0 to create a floating relay */
7420 if ((uplink_seid == 0 || vsi_seid == 0) &&
7421 (uplink_seid + vsi_seid != 0)) {
7422 dev_info(&pf->pdev->dev,
7423 "one, not both seid's are 0: uplink=%d vsi=%d\n",
7424 uplink_seid, vsi_seid);
7428 /* make sure there is such a vsi and uplink */
7429 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
7430 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
7432 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
7433 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
7438 if (uplink_seid && uplink_seid != pf->mac_seid) {
7439 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
7440 if (pf->veb[veb_idx] &&
7441 pf->veb[veb_idx]->seid == uplink_seid) {
7442 uplink_veb = pf->veb[veb_idx];
7447 dev_info(&pf->pdev->dev,
7448 "uplink seid %d not found\n", uplink_seid);
7453 /* get veb sw struct */
7454 veb_idx = i40e_veb_mem_alloc(pf);
7457 veb = pf->veb[veb_idx];
7459 veb->uplink_seid = uplink_seid;
7460 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
7461 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
7463 /* create the VEB in the switch */
7464 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7471 i40e_veb_clear(veb);
7477 * i40e_setup_pf_switch_element - set pf vars based on switch type
7478 * @pf: board private structure
7479 * @ele: element we are building info from
7480 * @num_reported: total number of elements
7481 * @printconfig: should we print the contents
7483 * helper function to assist in extracting a few useful SEID values.
7485 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
7486 struct i40e_aqc_switch_config_element_resp *ele,
7487 u16 num_reported, bool printconfig)
7489 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
7490 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
7491 u8 element_type = ele->element_type;
7492 u16 seid = le16_to_cpu(ele->seid);
7495 dev_info(&pf->pdev->dev,
7496 "type=%d seid=%d uplink=%d downlink=%d\n",
7497 element_type, seid, uplink_seid, downlink_seid);
7499 switch (element_type) {
7500 case I40E_SWITCH_ELEMENT_TYPE_MAC:
7501 pf->mac_seid = seid;
7503 case I40E_SWITCH_ELEMENT_TYPE_VEB:
7505 if (uplink_seid != pf->mac_seid)
7507 if (pf->lan_veb == I40E_NO_VEB) {
7510 /* find existing or else empty VEB */
7511 for (v = 0; v < I40E_MAX_VEB; v++) {
7512 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
7517 if (pf->lan_veb == I40E_NO_VEB) {
7518 v = i40e_veb_mem_alloc(pf);
7525 pf->veb[pf->lan_veb]->seid = seid;
7526 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
7527 pf->veb[pf->lan_veb]->pf = pf;
7528 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
7530 case I40E_SWITCH_ELEMENT_TYPE_VSI:
7531 if (num_reported != 1)
7533 /* This is immediately after a reset so we can assume this is
7536 pf->mac_seid = uplink_seid;
7537 pf->pf_seid = downlink_seid;
7538 pf->main_vsi_seid = seid;
7540 dev_info(&pf->pdev->dev,
7541 "pf_seid=%d main_vsi_seid=%d\n",
7542 pf->pf_seid, pf->main_vsi_seid);
7544 case I40E_SWITCH_ELEMENT_TYPE_PF:
7545 case I40E_SWITCH_ELEMENT_TYPE_VF:
7546 case I40E_SWITCH_ELEMENT_TYPE_EMP:
7547 case I40E_SWITCH_ELEMENT_TYPE_BMC:
7548 case I40E_SWITCH_ELEMENT_TYPE_PE:
7549 case I40E_SWITCH_ELEMENT_TYPE_PA:
7550 /* ignore these for now */
7553 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
7554 element_type, seid);
7560 * i40e_fetch_switch_configuration - Get switch config from firmware
7561 * @pf: board private structure
7562 * @printconfig: should we print the contents
7564 * Get the current switch configuration from the device and
7565 * extract a few useful SEID values.
7567 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7569 struct i40e_aqc_get_switch_config_resp *sw_config;
7575 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
7579 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
7581 u16 num_reported, num_total;
7583 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
7587 dev_info(&pf->pdev->dev,
7588 "get switch config failed %d aq_err=%x\n",
7589 ret, pf->hw.aq.asq_last_status);
7594 num_reported = le16_to_cpu(sw_config->header.num_reported);
7595 num_total = le16_to_cpu(sw_config->header.num_total);
7598 dev_info(&pf->pdev->dev,
7599 "header: %d reported %d total\n",
7600 num_reported, num_total);
7603 int sz = sizeof(*sw_config) * num_reported;
7605 kfree(pf->sw_config);
7606 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7608 memcpy(pf->sw_config, sw_config, sz);
7611 for (i = 0; i < num_reported; i++) {
7612 struct i40e_aqc_switch_config_element_resp *ele =
7613 &sw_config->element[i];
7615 i40e_setup_pf_switch_element(pf, ele, num_reported,
7618 } while (next_seid != 0);
7625 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
7626 * @pf: board private structure
7627 * @reinit: if the Main VSI needs to re-initialized.
7629 * Returns 0 on success, negative value on failure
7631 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
7633 u32 rxfc = 0, txfc = 0, rxfc_reg;
7636 /* find out what's out there already */
7637 ret = i40e_fetch_switch_configuration(pf, false);
7639 dev_info(&pf->pdev->dev,
7640 "couldn't fetch switch config, err %d, aq_err %d\n",
7641 ret, pf->hw.aq.asq_last_status);
7644 i40e_pf_reset_stats(pf);
7646 /* first time setup */
7647 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
7648 struct i40e_vsi *vsi = NULL;
7651 /* Set up the PF VSI associated with the PF's main VSI
7652 * that is already in the HW switch
7654 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
7655 uplink_seid = pf->veb[pf->lan_veb]->seid;
7657 uplink_seid = pf->mac_seid;
7658 if (pf->lan_vsi == I40E_NO_VSI)
7659 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
7661 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
7663 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
7664 i40e_fdir_teardown(pf);
7668 /* force a reset of TC and queue layout configurations */
7669 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7670 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7671 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7672 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7674 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
7676 i40e_fdir_sb_setup(pf);
7678 /* Setup static PF queue filter control settings */
7679 ret = i40e_setup_pf_filter_control(pf);
7681 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
7683 /* Failure here should not stop continuing other steps */
7686 /* enable RSS in the HW, even for only one queue, as the stack can use
7689 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
7690 i40e_config_rss(pf);
7692 /* fill in link information and enable LSE reporting */
7693 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
7694 i40e_link_event(pf);
7696 /* Initialize user-specific link properties */
7697 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
7698 I40E_AQ_AN_COMPLETED) ? true : false);
7699 /* requested_mode is set in probe or by ethtool */
7700 if (!pf->fc_autoneg_status)
7703 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
7704 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
7705 pf->hw.fc.current_mode = I40E_FC_FULL;
7706 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
7707 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
7708 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
7709 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
7711 pf->hw.fc.current_mode = I40E_FC_NONE;
7713 /* sync the flow control settings with the auto-neg values */
7714 switch (pf->hw.fc.current_mode) {
7719 case I40E_FC_TX_PAUSE:
7723 case I40E_FC_RX_PAUSE:
7728 case I40E_FC_DEFAULT:
7735 /* no default case, we have to handle all possibilities here */
7738 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
7740 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7741 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
7742 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
7744 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
7749 /* disable L2 flow control, user can turn it on if they wish */
7750 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
7751 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7752 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
7761 * i40e_determine_queue_usage - Work out queue distribution
7762 * @pf: board private structure
7764 static void i40e_determine_queue_usage(struct i40e_pf *pf)
7768 pf->num_lan_qps = 0;
7770 /* Find the max queues to be put into basic use. We'll always be
7771 * using TC0, whether or not DCB is running, and TC0 will get the
7774 queues_left = pf->hw.func_caps.num_tx_qp;
7776 if ((queues_left == 1) ||
7777 !(pf->flags & I40E_FLAG_MSIX_ENABLED) ||
7778 !(pf->flags & (I40E_FLAG_RSS_ENABLED | I40E_FLAG_FD_SB_ENABLED |
7779 I40E_FLAG_DCB_ENABLED))) {
7780 /* one qp for PF, no queues for anything else */
7782 pf->rss_size = pf->num_lan_qps = 1;
7784 /* make sure all the fancies are disabled */
7785 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7786 I40E_FLAG_FD_SB_ENABLED |
7787 I40E_FLAG_FD_ATR_ENABLED |
7788 I40E_FLAG_DCB_ENABLED |
7789 I40E_FLAG_SRIOV_ENABLED |
7790 I40E_FLAG_VMDQ_ENABLED);
7792 /* Not enough queues for all TCs */
7793 if ((pf->flags & I40E_FLAG_DCB_ENABLED) &&
7794 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
7795 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7796 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
7798 pf->num_lan_qps = pf->rss_size_max;
7799 queues_left -= pf->num_lan_qps;
7802 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7803 if (queues_left > 1) {
7804 queues_left -= 1; /* save 1 queue for FD */
7806 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7807 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
7811 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7812 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
7813 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
7814 (queues_left / pf->num_vf_qps));
7815 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
7818 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7819 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
7820 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
7821 (queues_left / pf->num_vmdq_qps));
7822 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
7825 pf->queues_left = queues_left;
7830 * i40e_setup_pf_filter_control - Setup PF static filter control
7831 * @pf: PF to be setup
7833 * i40e_setup_pf_filter_control sets up a pf's initial filter control
7834 * settings. If PE/FCoE are enabled then it will also set the per PF
7835 * based filter sizes required for them. It also enables Flow director,
7836 * ethertype and macvlan type filter settings for the pf.
7838 * Returns 0 on success, negative on failure
7840 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
7842 struct i40e_filter_control_settings *settings = &pf->filter_settings;
7844 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
7846 /* Flow Director is enabled */
7847 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
7848 settings->enable_fdir = true;
7850 /* Ethtype and MACVLAN filters enabled for PF */
7851 settings->enable_ethtype = true;
7852 settings->enable_macvlan = true;
7854 if (i40e_set_filter_control(&pf->hw, settings))
7861 * i40e_probe - Device initialization routine
7862 * @pdev: PCI device information struct
7863 * @ent: entry in i40e_pci_tbl
7865 * i40e_probe initializes a pf identified by a pci_dev structure.
7866 * The OS initialization, configuring of the pf private structure,
7867 * and a hardware reset occur.
7869 * Returns 0 on success, negative on failure
7871 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7873 struct i40e_driver_version dv;
7876 static u16 pfs_found;
7881 err = pci_enable_device_mem(pdev);
7885 /* set up for high or low dma */
7886 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7887 /* coherent mask for the same size will always succeed if
7890 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
7891 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
7892 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7894 dev_err(&pdev->dev, "DMA configuration failed: %d\n", err);
7899 /* set up pci connections */
7900 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7901 IORESOURCE_MEM), i40e_driver_name);
7903 dev_info(&pdev->dev,
7904 "pci_request_selected_regions failed %d\n", err);
7908 pci_enable_pcie_error_reporting(pdev);
7909 pci_set_master(pdev);
7911 /* Now that we have a PCI connection, we need to do the
7912 * low level device setup. This is primarily setting up
7913 * the Admin Queue structures and then querying for the
7914 * device's current profile information.
7916 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
7923 set_bit(__I40E_DOWN, &pf->state);
7927 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7928 pci_resource_len(pdev, 0));
7931 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
7932 (unsigned int)pci_resource_start(pdev, 0),
7933 (unsigned int)pci_resource_len(pdev, 0), err);
7936 hw->vendor_id = pdev->vendor;
7937 hw->device_id = pdev->device;
7938 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
7939 hw->subsystem_vendor_id = pdev->subsystem_vendor;
7940 hw->subsystem_device_id = pdev->subsystem_device;
7941 hw->bus.device = PCI_SLOT(pdev->devfn);
7942 hw->bus.func = PCI_FUNC(pdev->devfn);
7943 pf->instance = pfs_found;
7945 /* do a special CORER for clearing PXE mode once at init */
7946 if (hw->revision_id == 0 &&
7947 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
7948 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
7953 i40e_clear_pxe_mode(hw);
7956 /* Reset here to make sure all is clean and to define PF 'n' */
7957 err = i40e_pf_reset(hw);
7959 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
7964 hw->aq.num_arq_entries = I40E_AQ_LEN;
7965 hw->aq.num_asq_entries = I40E_AQ_LEN;
7966 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7967 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7968 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
7969 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
7971 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
7973 err = i40e_init_shared_code(hw);
7975 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
7979 /* set up a default setting for link flow control */
7980 pf->hw.fc.requested_mode = I40E_FC_NONE;
7982 err = i40e_init_adminq(hw);
7983 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
7985 dev_info(&pdev->dev,
7986 "init_adminq failed: %d expecting API %02x.%02x\n",
7988 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
7992 i40e_clear_pxe_mode(hw);
7993 err = i40e_get_capabilities(pf);
7995 goto err_adminq_setup;
7997 err = i40e_sw_init(pf);
7999 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8003 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8004 hw->func_caps.num_rx_qp,
8005 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8007 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8008 goto err_init_lan_hmc;
8011 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8013 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8015 goto err_configure_lan_hmc;
8018 i40e_get_mac_addr(hw, hw->mac.addr);
8019 if (!is_valid_ether_addr(hw->mac.addr)) {
8020 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8024 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8025 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
8027 pci_set_drvdata(pdev, pf);
8028 pci_save_state(pdev);
8029 #ifdef CONFIG_I40E_DCB
8030 err = i40e_init_pf_dcb(pf);
8032 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8033 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8036 #endif /* CONFIG_I40E_DCB */
8038 /* set up periodic task facility */
8039 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8040 pf->service_timer_period = HZ;
8042 INIT_WORK(&pf->service_task, i40e_service_task);
8043 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8044 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8045 pf->link_check_timeout = jiffies;
8047 /* WoL defaults to disabled */
8049 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8051 /* set up the main switch operations */
8052 i40e_determine_queue_usage(pf);
8053 i40e_init_interrupt_scheme(pf);
8055 /* Set up the *vsi struct based on the number of VSIs in the HW,
8056 * and set up our local tracking of the MAIN PF vsi.
8058 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
8059 pf->vsi = kzalloc(len, GFP_KERNEL);
8062 goto err_switch_setup;
8065 err = i40e_setup_pf_switch(pf, false);
8067 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8071 /* The main driver is (mostly) up and happy. We need to set this state
8072 * before setting up the misc vector or we get a race and the vector
8073 * ends up disabled forever.
8075 clear_bit(__I40E_DOWN, &pf->state);
8077 /* In case of MSIX we are going to setup the misc vector right here
8078 * to handle admin queue events etc. In case of legacy and MSI
8079 * the misc functionality and queue processing is combined in
8080 * the same vector and that gets setup at open.
8082 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8083 err = i40e_setup_misc_vector(pf);
8085 dev_info(&pdev->dev,
8086 "setup of misc vector failed: %d\n", err);
8091 /* prep for VF support */
8092 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8093 (pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8096 /* disable link interrupts for VFs */
8097 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8098 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8099 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8102 if (pci_num_vf(pdev)) {
8103 dev_info(&pdev->dev,
8104 "Active VFs found, allocating resources.\n");
8105 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8107 dev_info(&pdev->dev,
8108 "Error %d allocating resources for existing VFs\n",
8115 i40e_dbg_pf_init(pf);
8117 /* tell the firmware that we're starting */
8118 dv.major_version = DRV_VERSION_MAJOR;
8119 dv.minor_version = DRV_VERSION_MINOR;
8120 dv.build_version = DRV_VERSION_BUILD;
8121 dv.subbuild_version = 0;
8122 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
8124 /* since everything's happy, start the service_task timer */
8125 mod_timer(&pf->service_timer,
8126 round_jiffies(jiffies + pf->service_timer_period));
8128 /* Get the negotiated link width and speed from PCI config space */
8129 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8131 i40e_set_pci_config_data(hw, link_status);
8133 dev_info(&pdev->dev, "PCI Express: %s %s\n",
8134 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8135 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8136 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8138 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8139 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8140 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8141 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8144 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8145 hw->bus.speed < i40e_bus_speed_8000) {
8146 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8147 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8152 /* Unwind what we've done if something failed in the setup */
8154 set_bit(__I40E_DOWN, &pf->state);
8155 i40e_clear_interrupt_scheme(pf);
8158 i40e_reset_interrupt_capability(pf);
8159 del_timer_sync(&pf->service_timer);
8160 #ifdef CONFIG_I40E_DCB
8162 #endif /* CONFIG_I40E_DCB */
8164 err_configure_lan_hmc:
8165 (void)i40e_shutdown_lan_hmc(hw);
8168 kfree(pf->irq_pile);
8171 (void)i40e_shutdown_adminq(hw);
8173 iounmap(hw->hw_addr);
8177 pci_disable_pcie_error_reporting(pdev);
8178 pci_release_selected_regions(pdev,
8179 pci_select_bars(pdev, IORESOURCE_MEM));
8182 pci_disable_device(pdev);
8187 * i40e_remove - Device removal routine
8188 * @pdev: PCI device information struct
8190 * i40e_remove is called by the PCI subsystem to alert the driver
8191 * that is should release a PCI device. This could be caused by a
8192 * Hot-Plug event, or because the driver is going to be removed from
8195 static void i40e_remove(struct pci_dev *pdev)
8197 struct i40e_pf *pf = pci_get_drvdata(pdev);
8198 i40e_status ret_code;
8202 i40e_dbg_pf_exit(pf);
8206 /* no more scheduling of any task */
8207 set_bit(__I40E_DOWN, &pf->state);
8208 del_timer_sync(&pf->service_timer);
8209 cancel_work_sync(&pf->service_task);
8211 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8213 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8216 i40e_fdir_teardown(pf);
8218 /* If there is a switch structure or any orphans, remove them.
8219 * This will leave only the PF's VSI remaining.
8221 for (i = 0; i < I40E_MAX_VEB; i++) {
8225 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8226 pf->veb[i]->uplink_seid == 0)
8227 i40e_switch_branch_release(pf->veb[i]);
8230 /* Now we can shutdown the PF's VSI, just before we kill
8233 if (pf->vsi[pf->lan_vsi])
8234 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8236 i40e_stop_misc_vector(pf);
8237 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8238 synchronize_irq(pf->msix_entries[0].vector);
8239 free_irq(pf->msix_entries[0].vector, pf);
8242 /* shutdown and destroy the HMC */
8243 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8245 dev_warn(&pdev->dev,
8246 "Failed to destroy the HMC resources: %d\n", ret_code);
8248 /* shutdown the adminq */
8249 ret_code = i40e_shutdown_adminq(&pf->hw);
8251 dev_warn(&pdev->dev,
8252 "Failed to destroy the Admin Queue resources: %d\n",
8255 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8256 i40e_clear_interrupt_scheme(pf);
8257 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
8259 i40e_vsi_clear_rings(pf->vsi[i]);
8260 i40e_vsi_clear(pf->vsi[i]);
8265 for (i = 0; i < I40E_MAX_VEB; i++) {
8271 kfree(pf->irq_pile);
8272 kfree(pf->sw_config);
8275 /* force a PF reset to clean anything leftover */
8276 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
8277 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
8278 i40e_flush(&pf->hw);
8280 iounmap(pf->hw.hw_addr);
8282 pci_release_selected_regions(pdev,
8283 pci_select_bars(pdev, IORESOURCE_MEM));
8285 pci_disable_pcie_error_reporting(pdev);
8286 pci_disable_device(pdev);
8290 * i40e_pci_error_detected - warning that something funky happened in PCI land
8291 * @pdev: PCI device information struct
8293 * Called to warn that something happened and the error handling steps
8294 * are in progress. Allows the driver to quiesce things, be ready for
8297 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
8298 enum pci_channel_state error)
8300 struct i40e_pf *pf = pci_get_drvdata(pdev);
8302 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
8304 /* shutdown all operations */
8305 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
8307 i40e_prep_for_reset(pf);
8311 /* Request a slot reset */
8312 return PCI_ERS_RESULT_NEED_RESET;
8316 * i40e_pci_error_slot_reset - a PCI slot reset just happened
8317 * @pdev: PCI device information struct
8319 * Called to find if the driver can work with the device now that
8320 * the pci slot has been reset. If a basic connection seems good
8321 * (registers are readable and have sane content) then return a
8322 * happy little PCI_ERS_RESULT_xxx.
8324 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
8326 struct i40e_pf *pf = pci_get_drvdata(pdev);
8327 pci_ers_result_t result;
8331 dev_info(&pdev->dev, "%s\n", __func__);
8332 if (pci_enable_device_mem(pdev)) {
8333 dev_info(&pdev->dev,
8334 "Cannot re-enable PCI device after reset.\n");
8335 result = PCI_ERS_RESULT_DISCONNECT;
8337 pci_set_master(pdev);
8338 pci_restore_state(pdev);
8339 pci_save_state(pdev);
8340 pci_wake_from_d3(pdev, false);
8342 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8344 result = PCI_ERS_RESULT_RECOVERED;
8346 result = PCI_ERS_RESULT_DISCONNECT;
8349 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8351 dev_info(&pdev->dev,
8352 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8354 /* non-fatal, continue */
8361 * i40e_pci_error_resume - restart operations after PCI error recovery
8362 * @pdev: PCI device information struct
8364 * Called to allow the driver to bring things back up after PCI error
8365 * and/or reset recovery has finished.
8367 static void i40e_pci_error_resume(struct pci_dev *pdev)
8369 struct i40e_pf *pf = pci_get_drvdata(pdev);
8371 dev_info(&pdev->dev, "%s\n", __func__);
8372 if (test_bit(__I40E_SUSPENDED, &pf->state))
8376 i40e_handle_reset_warning(pf);
8381 * i40e_shutdown - PCI callback for shutting down
8382 * @pdev: PCI device information struct
8384 static void i40e_shutdown(struct pci_dev *pdev)
8386 struct i40e_pf *pf = pci_get_drvdata(pdev);
8387 struct i40e_hw *hw = &pf->hw;
8389 set_bit(__I40E_SUSPENDED, &pf->state);
8390 set_bit(__I40E_DOWN, &pf->state);
8392 i40e_prep_for_reset(pf);
8395 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8396 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8398 if (system_state == SYSTEM_POWER_OFF) {
8399 pci_wake_from_d3(pdev, pf->wol_en);
8400 pci_set_power_state(pdev, PCI_D3hot);
8406 * i40e_suspend - PCI callback for moving to D3
8407 * @pdev: PCI device information struct
8409 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
8411 struct i40e_pf *pf = pci_get_drvdata(pdev);
8412 struct i40e_hw *hw = &pf->hw;
8414 set_bit(__I40E_SUSPENDED, &pf->state);
8415 set_bit(__I40E_DOWN, &pf->state);
8417 i40e_prep_for_reset(pf);
8420 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8421 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8423 pci_wake_from_d3(pdev, pf->wol_en);
8424 pci_set_power_state(pdev, PCI_D3hot);
8430 * i40e_resume - PCI callback for waking up from D3
8431 * @pdev: PCI device information struct
8433 static int i40e_resume(struct pci_dev *pdev)
8435 struct i40e_pf *pf = pci_get_drvdata(pdev);
8438 pci_set_power_state(pdev, PCI_D0);
8439 pci_restore_state(pdev);
8440 /* pci_restore_state() clears dev->state_saves, so
8441 * call pci_save_state() again to restore it.
8443 pci_save_state(pdev);
8445 err = pci_enable_device_mem(pdev);
8448 "%s: Cannot enable PCI device from suspend\n",
8452 pci_set_master(pdev);
8454 /* no wakeup events while running */
8455 pci_wake_from_d3(pdev, false);
8457 /* handling the reset will rebuild the device state */
8458 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
8459 clear_bit(__I40E_DOWN, &pf->state);
8461 i40e_reset_and_rebuild(pf, false);
8469 static const struct pci_error_handlers i40e_err_handler = {
8470 .error_detected = i40e_pci_error_detected,
8471 .slot_reset = i40e_pci_error_slot_reset,
8472 .resume = i40e_pci_error_resume,
8475 static struct pci_driver i40e_driver = {
8476 .name = i40e_driver_name,
8477 .id_table = i40e_pci_tbl,
8478 .probe = i40e_probe,
8479 .remove = i40e_remove,
8481 .suspend = i40e_suspend,
8482 .resume = i40e_resume,
8484 .shutdown = i40e_shutdown,
8485 .err_handler = &i40e_err_handler,
8486 .sriov_configure = i40e_pci_sriov_configure,
8490 * i40e_init_module - Driver registration routine
8492 * i40e_init_module is the first routine called when the driver is
8493 * loaded. All it does is register with the PCI subsystem.
8495 static int __init i40e_init_module(void)
8497 pr_info("%s: %s - version %s\n", i40e_driver_name,
8498 i40e_driver_string, i40e_driver_version_str);
8499 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
8501 return pci_register_driver(&i40e_driver);
8503 module_init(i40e_init_module);
8506 * i40e_exit_module - Driver exit cleanup routine
8508 * i40e_exit_module is called just before the driver is removed
8511 static void __exit i40e_exit_module(void)
8513 pci_unregister_driver(&i40e_driver);
8516 module_exit(i40e_exit_module);