1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
42 #define DRV_VERSION_MAJOR 2
43 #define DRV_VERSION_MINOR 1
44 #define DRV_VERSION_BUILD 7
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
90 /* required last entry */
93 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95 #define I40E_MAX_VF_COUNT 128
96 static int debug = -1;
97 module_param(debug, uint, 0);
98 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
100 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
101 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
105 static struct workqueue_struct *i40e_wq;
108 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
109 * @hw: pointer to the HW structure
110 * @mem: ptr to mem struct to fill out
111 * @size: size of memory requested
112 * @alignment: what to align the allocation to
114 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
115 u64 size, u32 alignment)
117 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
119 mem->size = ALIGN(size, alignment);
120 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
121 &mem->pa, GFP_KERNEL);
129 * i40e_free_dma_mem_d - OS specific memory free for shared code
130 * @hw: pointer to the HW structure
131 * @mem: ptr to mem struct to free
133 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
135 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
137 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
146 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
147 * @hw: pointer to the HW structure
148 * @mem: ptr to mem struct to fill out
149 * @size: size of memory requested
151 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
155 mem->va = kzalloc(size, GFP_KERNEL);
164 * i40e_free_virt_mem_d - OS specific memory free for shared code
165 * @hw: pointer to the HW structure
166 * @mem: ptr to mem struct to free
168 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
170 /* it's ok to kfree a NULL pointer */
179 * i40e_get_lump - find a lump of free generic resource
180 * @pf: board private structure
181 * @pile: the pile of resource to search
182 * @needed: the number of items needed
183 * @id: an owner id to stick on the items assigned
185 * Returns the base item index of the lump, or negative for error
187 * The search_hint trick and lack of advanced fit-finding only work
188 * because we're highly likely to have all the same size lump requests.
189 * Linear search time and any fragmentation should be minimal.
191 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
197 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
198 dev_info(&pf->pdev->dev,
199 "param err: pile=%p needed=%d id=0x%04x\n",
204 /* start the linear search with an imperfect hint */
205 i = pile->search_hint;
206 while (i < pile->num_entries) {
207 /* skip already allocated entries */
208 if (pile->list[i] & I40E_PILE_VALID_BIT) {
213 /* do we have enough in this lump? */
214 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
215 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
220 /* there was enough, so assign it to the requestor */
221 for (j = 0; j < needed; j++)
222 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
224 pile->search_hint = i + j;
228 /* not enough, so skip over it and continue looking */
236 * i40e_put_lump - return a lump of generic resource
237 * @pile: the pile of resource to search
238 * @index: the base item index
239 * @id: the owner id of the items assigned
241 * Returns the count of items in the lump
243 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
245 int valid_id = (id | I40E_PILE_VALID_BIT);
249 if (!pile || index >= pile->num_entries)
253 i < pile->num_entries && pile->list[i] == valid_id;
259 if (count && index < pile->search_hint)
260 pile->search_hint = index;
266 * i40e_find_vsi_from_id - searches for the vsi with the given id
267 * @pf - the pf structure to search for the vsi
268 * @id - id of the vsi it is searching for
270 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
274 for (i = 0; i < pf->num_alloc_vsi; i++)
275 if (pf->vsi[i] && (pf->vsi[i]->id == id))
282 * i40e_service_event_schedule - Schedule the service task to wake up
283 * @pf: board private structure
285 * If not already scheduled, this puts the task into the work queue
287 void i40e_service_event_schedule(struct i40e_pf *pf)
289 if (!test_bit(__I40E_DOWN, &pf->state) &&
290 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
303 void i40e_tx_timeout(struct net_device *netdev)
305 static void i40e_tx_timeout(struct net_device *netdev)
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
315 pf->tx_timeout_count++;
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
326 (trans_start + netdev->watchdog_timeo))) {
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
373 switch (pf->tx_timeout_recovery_level) {
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
401 return &vsi->net_stats;
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
414 void i40e_get_netdev_stats_struct(struct net_device *netdev,
415 struct rtnl_link_stats64 *stats)
417 struct i40e_netdev_priv *np = netdev_priv(netdev);
418 struct i40e_ring *tx_ring, *rx_ring;
419 struct i40e_vsi *vsi = np->vsi;
420 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
423 if (test_bit(__I40E_DOWN, &vsi->state))
430 for (i = 0; i < vsi->num_queue_pairs; i++) {
434 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
439 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
440 packets = tx_ring->stats.packets;
441 bytes = tx_ring->stats.bytes;
442 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
444 stats->tx_packets += packets;
445 stats->tx_bytes += bytes;
446 rx_ring = &tx_ring[1];
449 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
450 packets = rx_ring->stats.packets;
451 bytes = rx_ring->stats.bytes;
452 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
454 stats->rx_packets += packets;
455 stats->rx_bytes += bytes;
459 /* following stats updated by i40e_watchdog_subtask() */
460 stats->multicast = vsi_stats->multicast;
461 stats->tx_errors = vsi_stats->tx_errors;
462 stats->tx_dropped = vsi_stats->tx_dropped;
463 stats->rx_errors = vsi_stats->rx_errors;
464 stats->rx_dropped = vsi_stats->rx_dropped;
465 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
466 stats->rx_length_errors = vsi_stats->rx_length_errors;
470 * i40e_vsi_reset_stats - Resets all stats of the given vsi
471 * @vsi: the VSI to have its stats reset
473 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
475 struct rtnl_link_stats64 *ns;
481 ns = i40e_get_vsi_stats_struct(vsi);
482 memset(ns, 0, sizeof(*ns));
483 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
484 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
485 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
486 if (vsi->rx_rings && vsi->rx_rings[0]) {
487 for (i = 0; i < vsi->num_queue_pairs; i++) {
488 memset(&vsi->rx_rings[i]->stats, 0,
489 sizeof(vsi->rx_rings[i]->stats));
490 memset(&vsi->rx_rings[i]->rx_stats, 0,
491 sizeof(vsi->rx_rings[i]->rx_stats));
492 memset(&vsi->tx_rings[i]->stats, 0,
493 sizeof(vsi->tx_rings[i]->stats));
494 memset(&vsi->tx_rings[i]->tx_stats, 0,
495 sizeof(vsi->tx_rings[i]->tx_stats));
498 vsi->stat_offsets_loaded = false;
502 * i40e_pf_reset_stats - Reset all of the stats for the given PF
503 * @pf: the PF to be reset
505 void i40e_pf_reset_stats(struct i40e_pf *pf)
509 memset(&pf->stats, 0, sizeof(pf->stats));
510 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
511 pf->stat_offsets_loaded = false;
513 for (i = 0; i < I40E_MAX_VEB; i++) {
515 memset(&pf->veb[i]->stats, 0,
516 sizeof(pf->veb[i]->stats));
517 memset(&pf->veb[i]->stats_offsets, 0,
518 sizeof(pf->veb[i]->stats_offsets));
519 pf->veb[i]->stat_offsets_loaded = false;
522 pf->hw_csum_rx_error = 0;
526 * i40e_stat_update48 - read and update a 48 bit stat from the chip
527 * @hw: ptr to the hardware info
528 * @hireg: the high 32 bit reg to read
529 * @loreg: the low 32 bit reg to read
530 * @offset_loaded: has the initial offset been loaded yet
531 * @offset: ptr to current offset value
532 * @stat: ptr to the stat
534 * Since the device stats are not reset at PFReset, they likely will not
535 * be zeroed when the driver starts. We'll save the first values read
536 * and use them as offsets to be subtracted from the raw values in order
537 * to report stats that count from zero. In the process, we also manage
538 * the potential roll-over.
540 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
541 bool offset_loaded, u64 *offset, u64 *stat)
545 if (hw->device_id == I40E_DEV_ID_QEMU) {
546 new_data = rd32(hw, loreg);
547 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
549 new_data = rd64(hw, loreg);
553 if (likely(new_data >= *offset))
554 *stat = new_data - *offset;
556 *stat = (new_data + BIT_ULL(48)) - *offset;
557 *stat &= 0xFFFFFFFFFFFFULL;
561 * i40e_stat_update32 - read and update a 32 bit stat from the chip
562 * @hw: ptr to the hardware info
563 * @reg: the hw reg to read
564 * @offset_loaded: has the initial offset been loaded yet
565 * @offset: ptr to current offset value
566 * @stat: ptr to the stat
568 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
569 bool offset_loaded, u64 *offset, u64 *stat)
573 new_data = rd32(hw, reg);
576 if (likely(new_data >= *offset))
577 *stat = (u32)(new_data - *offset);
579 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
583 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
584 * @vsi: the VSI to be updated
586 void i40e_update_eth_stats(struct i40e_vsi *vsi)
588 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
589 struct i40e_pf *pf = vsi->back;
590 struct i40e_hw *hw = &pf->hw;
591 struct i40e_eth_stats *oes;
592 struct i40e_eth_stats *es; /* device's eth stats */
594 es = &vsi->eth_stats;
595 oes = &vsi->eth_stats_offsets;
597 /* Gather up the stats that the hw collects */
598 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
599 vsi->stat_offsets_loaded,
600 &oes->tx_errors, &es->tx_errors);
601 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
602 vsi->stat_offsets_loaded,
603 &oes->rx_discards, &es->rx_discards);
604 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
607 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->tx_errors, &es->tx_errors);
611 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
612 I40E_GLV_GORCL(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->rx_bytes, &es->rx_bytes);
615 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
616 I40E_GLV_UPRCL(stat_idx),
617 vsi->stat_offsets_loaded,
618 &oes->rx_unicast, &es->rx_unicast);
619 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
620 I40E_GLV_MPRCL(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_multicast, &es->rx_multicast);
623 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
624 I40E_GLV_BPRCL(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_broadcast, &es->rx_broadcast);
628 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
629 I40E_GLV_GOTCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->tx_bytes, &es->tx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
633 I40E_GLV_UPTCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->tx_unicast, &es->tx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
637 I40E_GLV_MPTCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_multicast, &es->tx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
641 I40E_GLV_BPTCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_broadcast, &es->tx_broadcast);
644 vsi->stat_offsets_loaded = true;
648 * i40e_update_veb_stats - Update Switch component statistics
649 * @veb: the VEB being updated
651 static void i40e_update_veb_stats(struct i40e_veb *veb)
653 struct i40e_pf *pf = veb->pf;
654 struct i40e_hw *hw = &pf->hw;
655 struct i40e_eth_stats *oes;
656 struct i40e_eth_stats *es; /* device's eth stats */
657 struct i40e_veb_tc_stats *veb_oes;
658 struct i40e_veb_tc_stats *veb_es;
661 idx = veb->stats_idx;
663 oes = &veb->stats_offsets;
664 veb_es = &veb->tc_stats;
665 veb_oes = &veb->tc_stats_offsets;
667 /* Gather up the stats that the hw collects */
668 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
669 veb->stat_offsets_loaded,
670 &oes->tx_discards, &es->tx_discards);
671 if (hw->revision_id > 0)
672 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
673 veb->stat_offsets_loaded,
674 &oes->rx_unknown_protocol,
675 &es->rx_unknown_protocol);
676 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
677 veb->stat_offsets_loaded,
678 &oes->rx_bytes, &es->rx_bytes);
679 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
680 veb->stat_offsets_loaded,
681 &oes->rx_unicast, &es->rx_unicast);
682 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_multicast, &es->rx_multicast);
685 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_broadcast, &es->rx_broadcast);
689 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
690 veb->stat_offsets_loaded,
691 &oes->tx_bytes, &es->tx_bytes);
692 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->tx_unicast, &es->tx_unicast);
695 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_multicast, &es->tx_multicast);
698 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_broadcast, &es->tx_broadcast);
701 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
702 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
703 I40E_GLVEBTC_RPCL(i, idx),
704 veb->stat_offsets_loaded,
705 &veb_oes->tc_rx_packets[i],
706 &veb_es->tc_rx_packets[i]);
707 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
708 I40E_GLVEBTC_RBCL(i, idx),
709 veb->stat_offsets_loaded,
710 &veb_oes->tc_rx_bytes[i],
711 &veb_es->tc_rx_bytes[i]);
712 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
713 I40E_GLVEBTC_TPCL(i, idx),
714 veb->stat_offsets_loaded,
715 &veb_oes->tc_tx_packets[i],
716 &veb_es->tc_tx_packets[i]);
717 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
718 I40E_GLVEBTC_TBCL(i, idx),
719 veb->stat_offsets_loaded,
720 &veb_oes->tc_tx_bytes[i],
721 &veb_es->tc_tx_bytes[i]);
723 veb->stat_offsets_loaded = true;
728 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
729 * @vsi: the VSI that is capable of doing FCoE
731 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
733 struct i40e_pf *pf = vsi->back;
734 struct i40e_hw *hw = &pf->hw;
735 struct i40e_fcoe_stats *ofs;
736 struct i40e_fcoe_stats *fs; /* device's eth stats */
739 if (vsi->type != I40E_VSI_FCOE)
742 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
743 fs = &vsi->fcoe_stats;
744 ofs = &vsi->fcoe_stats_offsets;
746 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
747 vsi->fcoe_stat_offsets_loaded,
748 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
749 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
750 vsi->fcoe_stat_offsets_loaded,
751 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
752 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
755 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
758 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
761 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
764 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->fcoe_last_error, &fs->fcoe_last_error);
767 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
771 vsi->fcoe_stat_offsets_loaded = true;
776 * i40e_update_vsi_stats - Update the vsi statistics counters.
777 * @vsi: the VSI to be updated
779 * There are a few instances where we store the same stat in a
780 * couple of different structs. This is partly because we have
781 * the netdev stats that need to be filled out, which is slightly
782 * different from the "eth_stats" defined by the chip and used in
783 * VF communications. We sort it out here.
785 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
787 struct i40e_pf *pf = vsi->back;
788 struct rtnl_link_stats64 *ons;
789 struct rtnl_link_stats64 *ns; /* netdev stats */
790 struct i40e_eth_stats *oes;
791 struct i40e_eth_stats *es; /* device's eth stats */
792 u32 tx_restart, tx_busy;
793 u64 tx_lost_interrupt;
804 if (test_bit(__I40E_DOWN, &vsi->state) ||
805 test_bit(__I40E_CONFIG_BUSY, &pf->state))
808 ns = i40e_get_vsi_stats_struct(vsi);
809 ons = &vsi->net_stats_offsets;
810 es = &vsi->eth_stats;
811 oes = &vsi->eth_stats_offsets;
813 /* Gather up the netdev and vsi stats that the driver collects
814 * on the fly during packet processing
818 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
819 tx_lost_interrupt = 0;
823 for (q = 0; q < vsi->num_queue_pairs; q++) {
825 p = ACCESS_ONCE(vsi->tx_rings[q]);
828 start = u64_stats_fetch_begin_irq(&p->syncp);
829 packets = p->stats.packets;
830 bytes = p->stats.bytes;
831 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
834 tx_restart += p->tx_stats.restart_queue;
835 tx_busy += p->tx_stats.tx_busy;
836 tx_linearize += p->tx_stats.tx_linearize;
837 tx_force_wb += p->tx_stats.tx_force_wb;
838 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
840 /* Rx queue is part of the same block as Tx queue */
843 start = u64_stats_fetch_begin_irq(&p->syncp);
844 packets = p->stats.packets;
845 bytes = p->stats.bytes;
846 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
849 rx_buf += p->rx_stats.alloc_buff_failed;
850 rx_page += p->rx_stats.alloc_page_failed;
853 vsi->tx_restart = tx_restart;
854 vsi->tx_busy = tx_busy;
855 vsi->tx_linearize = tx_linearize;
856 vsi->tx_force_wb = tx_force_wb;
857 vsi->tx_lost_interrupt = tx_lost_interrupt;
858 vsi->rx_page_failed = rx_page;
859 vsi->rx_buf_failed = rx_buf;
861 ns->rx_packets = rx_p;
863 ns->tx_packets = tx_p;
866 /* update netdev stats from eth stats */
867 i40e_update_eth_stats(vsi);
868 ons->tx_errors = oes->tx_errors;
869 ns->tx_errors = es->tx_errors;
870 ons->multicast = oes->rx_multicast;
871 ns->multicast = es->rx_multicast;
872 ons->rx_dropped = oes->rx_discards;
873 ns->rx_dropped = es->rx_discards;
874 ons->tx_dropped = oes->tx_discards;
875 ns->tx_dropped = es->tx_discards;
877 /* pull in a couple PF stats if this is the main vsi */
878 if (vsi == pf->vsi[pf->lan_vsi]) {
879 ns->rx_crc_errors = pf->stats.crc_errors;
880 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
881 ns->rx_length_errors = pf->stats.rx_length_errors;
886 * i40e_update_pf_stats - Update the PF statistics counters.
887 * @pf: the PF to be updated
889 static void i40e_update_pf_stats(struct i40e_pf *pf)
891 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
892 struct i40e_hw_port_stats *nsd = &pf->stats;
893 struct i40e_hw *hw = &pf->hw;
897 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
898 I40E_GLPRT_GORCL(hw->port),
899 pf->stat_offsets_loaded,
900 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
901 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
902 I40E_GLPRT_GOTCL(hw->port),
903 pf->stat_offsets_loaded,
904 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
905 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
906 pf->stat_offsets_loaded,
907 &osd->eth.rx_discards,
908 &nsd->eth.rx_discards);
909 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
910 I40E_GLPRT_UPRCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.rx_unicast,
913 &nsd->eth.rx_unicast);
914 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
915 I40E_GLPRT_MPRCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.rx_multicast,
918 &nsd->eth.rx_multicast);
919 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
920 I40E_GLPRT_BPRCL(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->eth.rx_broadcast,
923 &nsd->eth.rx_broadcast);
924 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
925 I40E_GLPRT_UPTCL(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->eth.tx_unicast,
928 &nsd->eth.tx_unicast);
929 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
930 I40E_GLPRT_MPTCL(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.tx_multicast,
933 &nsd->eth.tx_multicast);
934 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
935 I40E_GLPRT_BPTCL(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.tx_broadcast,
938 &nsd->eth.tx_broadcast);
940 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->tx_dropped_link_down,
943 &nsd->tx_dropped_link_down);
945 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->crc_errors, &nsd->crc_errors);
949 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->illegal_bytes, &nsd->illegal_bytes);
953 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->mac_local_faults,
956 &nsd->mac_local_faults);
957 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->mac_remote_faults,
960 &nsd->mac_remote_faults);
962 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_length_errors,
965 &nsd->rx_length_errors);
967 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->link_xon_rx, &nsd->link_xon_rx);
970 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->link_xon_tx, &nsd->link_xon_tx);
973 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xoff_rx, &nsd->link_xoff_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xoff_tx, &nsd->link_xoff_tx);
980 for (i = 0; i < 8; i++) {
981 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
982 pf->stat_offsets_loaded,
983 &osd->priority_xoff_rx[i],
984 &nsd->priority_xoff_rx[i]);
985 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
986 pf->stat_offsets_loaded,
987 &osd->priority_xon_rx[i],
988 &nsd->priority_xon_rx[i]);
989 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
990 pf->stat_offsets_loaded,
991 &osd->priority_xon_tx[i],
992 &nsd->priority_xon_tx[i]);
993 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
994 pf->stat_offsets_loaded,
995 &osd->priority_xoff_tx[i],
996 &nsd->priority_xoff_tx[i]);
997 i40e_stat_update32(hw,
998 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
999 pf->stat_offsets_loaded,
1000 &osd->priority_xon_2_xoff[i],
1001 &nsd->priority_xon_2_xoff[i]);
1004 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1005 I40E_GLPRT_PRC64L(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->rx_size_64, &nsd->rx_size_64);
1008 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1009 I40E_GLPRT_PRC127L(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->rx_size_127, &nsd->rx_size_127);
1012 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1013 I40E_GLPRT_PRC255L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->rx_size_255, &nsd->rx_size_255);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1017 I40E_GLPRT_PRC511L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_511, &nsd->rx_size_511);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1021 I40E_GLPRT_PRC1023L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_1023, &nsd->rx_size_1023);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1025 I40E_GLPRT_PRC1522L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_1522, &nsd->rx_size_1522);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1029 I40E_GLPRT_PRC9522L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_big, &nsd->rx_size_big);
1033 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1034 I40E_GLPRT_PTC64L(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->tx_size_64, &nsd->tx_size_64);
1037 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1038 I40E_GLPRT_PTC127L(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->tx_size_127, &nsd->tx_size_127);
1041 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1042 I40E_GLPRT_PTC255L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->tx_size_255, &nsd->tx_size_255);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1046 I40E_GLPRT_PTC511L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_511, &nsd->tx_size_511);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1050 I40E_GLPRT_PTC1023L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_1023, &nsd->tx_size_1023);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1054 I40E_GLPRT_PTC1522L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_1522, &nsd->tx_size_1522);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1058 I40E_GLPRT_PTC9522L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_big, &nsd->tx_size_big);
1062 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->rx_undersize, &nsd->rx_undersize);
1065 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->rx_fragments, &nsd->rx_fragments);
1068 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_oversize, &nsd->rx_oversize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_jabber, &nsd->rx_jabber);
1076 i40e_stat_update32(hw,
1077 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1078 pf->stat_offsets_loaded,
1079 &osd->fd_atr_match, &nsd->fd_atr_match);
1080 i40e_stat_update32(hw,
1081 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1082 pf->stat_offsets_loaded,
1083 &osd->fd_sb_match, &nsd->fd_sb_match);
1084 i40e_stat_update32(hw,
1085 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1086 pf->stat_offsets_loaded,
1087 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1089 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1090 nsd->tx_lpi_status =
1091 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1092 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1093 nsd->rx_lpi_status =
1094 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1095 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1096 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1097 pf->stat_offsets_loaded,
1098 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1099 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1100 pf->stat_offsets_loaded,
1101 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1103 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1104 !(pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED))
1105 nsd->fd_sb_status = true;
1107 nsd->fd_sb_status = false;
1109 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1110 !(pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED))
1111 nsd->fd_atr_status = true;
1113 nsd->fd_atr_status = false;
1115 pf->stat_offsets_loaded = true;
1119 * i40e_update_stats - Update the various statistics counters.
1120 * @vsi: the VSI to be updated
1122 * Update the various stats for this VSI and its related entities.
1124 void i40e_update_stats(struct i40e_vsi *vsi)
1126 struct i40e_pf *pf = vsi->back;
1128 if (vsi == pf->vsi[pf->lan_vsi])
1129 i40e_update_pf_stats(pf);
1131 i40e_update_vsi_stats(vsi);
1133 i40e_update_fcoe_stats(vsi);
1138 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1139 * @vsi: the VSI to be searched
1140 * @macaddr: the MAC address
1143 * Returns ptr to the filter object or NULL
1145 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1146 const u8 *macaddr, s16 vlan)
1148 struct i40e_mac_filter *f;
1151 if (!vsi || !macaddr)
1154 key = i40e_addr_to_hkey(macaddr);
1155 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1156 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 * i40e_find_mac - Find a mac addr in the macvlan filters list
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address we are searching for
1168 * Returns the first filter with the provided MAC address or NULL if
1169 * MAC address was not found
1171 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1173 struct i40e_mac_filter *f;
1176 if (!vsi || !macaddr)
1179 key = i40e_addr_to_hkey(macaddr);
1180 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1181 if ((ether_addr_equal(macaddr, f->macaddr)))
1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1189 * @vsi: the VSI to be searched
1191 * Returns true if VSI is in vlan mode or false otherwise
1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1195 /* If we have a PVID, always operate in VLAN mode */
1199 /* We need to operate in VLAN mode whenever we have any filters with
1200 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1201 * time, incurring search cost repeatedly. However, we can notice two
1204 * 1) the only place where we can gain a VLAN filter is in
1207 * 2) the only place where filters are actually removed is in
1208 * i40e_sync_filters_subtask.
1210 * Thus, we can simply use a boolean value, has_vlan_filters which we
1211 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1212 * we have to perform the full search after deleting filters in
1213 * i40e_sync_filters_subtask, but we already have to search
1214 * filters here and can perform the check at the same time. This
1215 * results in avoiding embedding a loop for VLAN mode inside another
1216 * loop over all the filters, and should maintain correctness as noted
1219 return vsi->has_vlan_filter;
1223 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1224 * @vsi: the VSI to configure
1225 * @tmp_add_list: list of filters ready to be added
1226 * @tmp_del_list: list of filters ready to be deleted
1227 * @vlan_filters: the number of active VLAN filters
1229 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1230 * behave as expected. If we have any active VLAN filters remaining or about
1231 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1232 * so that they only match against untagged traffic. If we no longer have any
1233 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1234 * so that they match against both tagged and untagged traffic. In this way,
1235 * we ensure that we correctly receive the desired traffic. This ensures that
1236 * when we have an active VLAN we will receive only untagged traffic and
1237 * traffic matching active VLANs. If we have no active VLANs then we will
1238 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1240 * Finally, in a similar fashion, this function also corrects filters when
1241 * there is an active PVID assigned to this VSI.
1243 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1245 * This function is only expected to be called from within
1246 * i40e_sync_vsi_filters.
1248 * NOTE: This function expects to be called while under the
1249 * mac_filter_hash_lock
1251 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1252 struct hlist_head *tmp_add_list,
1253 struct hlist_head *tmp_del_list,
1256 s16 pvid = le16_to_cpu(vsi->info.pvid);
1257 struct i40e_mac_filter *f, *add_head;
1258 struct i40e_new_mac_filter *new;
1259 struct hlist_node *h;
1262 /* To determine if a particular filter needs to be replaced we
1263 * have the three following conditions:
1265 * a) if we have a PVID assigned, then all filters which are
1266 * not marked as VLAN=PVID must be replaced with filters that
1268 * b) otherwise, if we have any active VLANS, all filters
1269 * which are marked as VLAN=-1 must be replaced with
1270 * filters marked as VLAN=0
1271 * c) finally, if we do not have any active VLANS, all filters
1272 * which are marked as VLAN=0 must be replaced with filters
1276 /* Update the filters about to be added in place */
1277 hlist_for_each_entry(new, tmp_add_list, hlist) {
1278 if (pvid && new->f->vlan != pvid)
1279 new->f->vlan = pvid;
1280 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1282 else if (!vlan_filters && new->f->vlan == 0)
1283 new->f->vlan = I40E_VLAN_ANY;
1286 /* Update the remaining active filters */
1287 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1288 /* Combine the checks for whether a filter needs to be changed
1289 * and then determine the new VLAN inside the if block, in
1290 * order to avoid duplicating code for adding the new filter
1291 * then deleting the old filter.
1293 if ((pvid && f->vlan != pvid) ||
1294 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1295 (!vlan_filters && f->vlan == 0)) {
1296 /* Determine the new vlan we will be adding */
1299 else if (vlan_filters)
1302 new_vlan = I40E_VLAN_ANY;
1304 /* Create the new filter */
1305 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1309 /* Create a temporary i40e_new_mac_filter */
1310 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1315 new->state = add_head->state;
1317 /* Add the new filter to the tmp list */
1318 hlist_add_head(&new->hlist, tmp_add_list);
1320 /* Put the original filter into the delete list */
1321 f->state = I40E_FILTER_REMOVE;
1322 hash_del(&f->hlist);
1323 hlist_add_head(&f->hlist, tmp_del_list);
1327 vsi->has_vlan_filter = !!vlan_filters;
1333 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1334 * @vsi: the PF Main VSI - inappropriate for any other VSI
1335 * @macaddr: the MAC address
1337 * Remove whatever filter the firmware set up so the driver can manage
1338 * its own filtering intelligently.
1340 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1342 struct i40e_aqc_remove_macvlan_element_data element;
1343 struct i40e_pf *pf = vsi->back;
1345 /* Only appropriate for the PF main VSI */
1346 if (vsi->type != I40E_VSI_MAIN)
1349 memset(&element, 0, sizeof(element));
1350 ether_addr_copy(element.mac_addr, macaddr);
1351 element.vlan_tag = 0;
1352 /* Ignore error returns, some firmware does it this way... */
1353 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1354 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1356 memset(&element, 0, sizeof(element));
1357 ether_addr_copy(element.mac_addr, macaddr);
1358 element.vlan_tag = 0;
1359 /* ...and some firmware does it this way. */
1360 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1361 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1362 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1366 * i40e_add_filter - Add a mac/vlan filter to the VSI
1367 * @vsi: the VSI to be searched
1368 * @macaddr: the MAC address
1371 * Returns ptr to the filter object or NULL when no memory available.
1373 * NOTE: This function is expected to be called with mac_filter_hash_lock
1376 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1377 const u8 *macaddr, s16 vlan)
1379 struct i40e_mac_filter *f;
1382 if (!vsi || !macaddr)
1385 f = i40e_find_filter(vsi, macaddr, vlan);
1387 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1391 /* Update the boolean indicating if we need to function in
1395 vsi->has_vlan_filter = true;
1397 ether_addr_copy(f->macaddr, macaddr);
1399 /* If we're in overflow promisc mode, set the state directly
1400 * to failed, so we don't bother to try sending the filter
1403 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1404 f->state = I40E_FILTER_FAILED;
1406 f->state = I40E_FILTER_NEW;
1407 INIT_HLIST_NODE(&f->hlist);
1409 key = i40e_addr_to_hkey(macaddr);
1410 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1412 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1413 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1416 /* If we're asked to add a filter that has been marked for removal, it
1417 * is safe to simply restore it to active state. __i40e_del_filter
1418 * will have simply deleted any filters which were previously marked
1419 * NEW or FAILED, so if it is currently marked REMOVE it must have
1420 * previously been ACTIVE. Since we haven't yet run the sync filters
1421 * task, just restore this filter to the ACTIVE state so that the
1422 * sync task leaves it in place
1424 if (f->state == I40E_FILTER_REMOVE)
1425 f->state = I40E_FILTER_ACTIVE;
1431 * __i40e_del_filter - Remove a specific filter from the VSI
1432 * @vsi: VSI to remove from
1433 * @f: the filter to remove from the list
1435 * This function should be called instead of i40e_del_filter only if you know
1436 * the exact filter you will remove already, such as via i40e_find_filter or
1439 * NOTE: This function is expected to be called with mac_filter_hash_lock
1441 * ANOTHER NOTE: This function MUST be called from within the context of
1442 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1443 * instead of list_for_each_entry().
1445 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1450 /* If the filter was never added to firmware then we can just delete it
1451 * directly and we don't want to set the status to remove or else an
1452 * admin queue command will unnecessarily fire.
1454 if ((f->state == I40E_FILTER_FAILED) ||
1455 (f->state == I40E_FILTER_NEW)) {
1456 hash_del(&f->hlist);
1459 f->state = I40E_FILTER_REMOVE;
1462 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1463 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1467 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1468 * @vsi: the VSI to be searched
1469 * @macaddr: the MAC address
1472 * NOTE: This function is expected to be called with mac_filter_hash_lock
1474 * ANOTHER NOTE: This function MUST be called from within the context of
1475 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1476 * instead of list_for_each_entry().
1478 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1480 struct i40e_mac_filter *f;
1482 if (!vsi || !macaddr)
1485 f = i40e_find_filter(vsi, macaddr, vlan);
1486 __i40e_del_filter(vsi, f);
1490 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1491 * @vsi: the VSI to be searched
1492 * @macaddr: the mac address to be filtered
1494 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1495 * go through all the macvlan filters and add a macvlan filter for each
1496 * unique vlan that already exists. If a PVID has been assigned, instead only
1497 * add the macaddr to that VLAN.
1499 * Returns last filter added on success, else NULL
1501 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1504 struct i40e_mac_filter *f, *add = NULL;
1505 struct hlist_node *h;
1509 return i40e_add_filter(vsi, macaddr,
1510 le16_to_cpu(vsi->info.pvid));
1512 if (!i40e_is_vsi_in_vlan(vsi))
1513 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1515 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1516 if (f->state == I40E_FILTER_REMOVE)
1518 add = i40e_add_filter(vsi, macaddr, f->vlan);
1527 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1528 * @vsi: the VSI to be searched
1529 * @macaddr: the mac address to be removed
1531 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1534 * Returns 0 for success, or error
1536 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1538 struct i40e_mac_filter *f;
1539 struct hlist_node *h;
1543 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock),
1544 "Missing mac_filter_hash_lock\n");
1545 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1546 if (ether_addr_equal(macaddr, f->macaddr)) {
1547 __i40e_del_filter(vsi, f);
1559 * i40e_set_mac - NDO callback to set mac address
1560 * @netdev: network interface device structure
1561 * @p: pointer to an address structure
1563 * Returns 0 on success, negative on failure
1566 int i40e_set_mac(struct net_device *netdev, void *p)
1568 static int i40e_set_mac(struct net_device *netdev, void *p)
1571 struct i40e_netdev_priv *np = netdev_priv(netdev);
1572 struct i40e_vsi *vsi = np->vsi;
1573 struct i40e_pf *pf = vsi->back;
1574 struct i40e_hw *hw = &pf->hw;
1575 struct sockaddr *addr = p;
1577 if (!is_valid_ether_addr(addr->sa_data))
1578 return -EADDRNOTAVAIL;
1580 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1581 netdev_info(netdev, "already using mac address %pM\n",
1586 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1587 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1588 return -EADDRNOTAVAIL;
1590 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1591 netdev_info(netdev, "returning to hw mac address %pM\n",
1594 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1596 spin_lock_bh(&vsi->mac_filter_hash_lock);
1597 i40e_del_mac_filter(vsi, netdev->dev_addr);
1598 i40e_add_mac_filter(vsi, addr->sa_data);
1599 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1600 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1601 if (vsi->type == I40E_VSI_MAIN) {
1604 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1605 I40E_AQC_WRITE_TYPE_LAA_WOL,
1606 addr->sa_data, NULL);
1608 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1609 i40e_stat_str(hw, ret),
1610 i40e_aq_str(hw, hw->aq.asq_last_status));
1613 /* schedule our worker thread which will take care of
1614 * applying the new filter changes
1616 i40e_service_event_schedule(vsi->back);
1621 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1622 * @vsi: the VSI being setup
1623 * @ctxt: VSI context structure
1624 * @enabled_tc: Enabled TCs bitmap
1625 * @is_add: True if called before Add VSI
1627 * Setup VSI queue mapping for enabled traffic classes.
1630 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1631 struct i40e_vsi_context *ctxt,
1635 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1636 struct i40e_vsi_context *ctxt,
1641 struct i40e_pf *pf = vsi->back;
1651 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1654 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1655 /* Find numtc from enabled TC bitmap */
1656 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1657 if (enabled_tc & BIT(i)) /* TC is enabled */
1661 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1665 /* At least TC0 is enabled in case of non-DCB case */
1669 vsi->tc_config.numtc = numtc;
1670 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1671 /* Number of queues per enabled TC */
1672 qcount = vsi->alloc_queue_pairs;
1674 num_tc_qps = qcount / numtc;
1675 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1677 /* Setup queue offset/count for all TCs for given VSI */
1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1679 /* See if the given TC is enabled for the given VSI */
1680 if (vsi->tc_config.enabled_tc & BIT(i)) {
1684 switch (vsi->type) {
1686 qcount = min_t(int, pf->alloc_rss_size,
1691 qcount = num_tc_qps;
1695 case I40E_VSI_SRIOV:
1696 case I40E_VSI_VMDQ2:
1698 qcount = num_tc_qps;
1702 vsi->tc_config.tc_info[i].qoffset = offset;
1703 vsi->tc_config.tc_info[i].qcount = qcount;
1705 /* find the next higher power-of-2 of num queue pairs */
1708 while (num_qps && (BIT_ULL(pow) < qcount)) {
1713 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1715 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1716 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1720 /* TC is not enabled so set the offset to
1721 * default queue and allocate one queue
1724 vsi->tc_config.tc_info[i].qoffset = 0;
1725 vsi->tc_config.tc_info[i].qcount = 1;
1726 vsi->tc_config.tc_info[i].netdev_tc = 0;
1730 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1733 /* Set actual Tx/Rx queue pairs */
1734 vsi->num_queue_pairs = offset;
1735 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1736 if (vsi->req_queue_pairs > 0)
1737 vsi->num_queue_pairs = vsi->req_queue_pairs;
1738 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1739 vsi->num_queue_pairs = pf->num_lan_msix;
1742 /* Scheduler section valid can only be set for ADD VSI */
1744 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1746 ctxt->info.up_enable_bits = enabled_tc;
1748 if (vsi->type == I40E_VSI_SRIOV) {
1749 ctxt->info.mapping_flags |=
1750 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1751 for (i = 0; i < vsi->num_queue_pairs; i++)
1752 ctxt->info.queue_mapping[i] =
1753 cpu_to_le16(vsi->base_queue + i);
1755 ctxt->info.mapping_flags |=
1756 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1757 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1759 ctxt->info.valid_sections |= cpu_to_le16(sections);
1763 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1764 * @netdev: the netdevice
1765 * @addr: address to add
1767 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1768 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1770 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1772 struct i40e_netdev_priv *np = netdev_priv(netdev);
1773 struct i40e_vsi *vsi = np->vsi;
1775 if (i40e_add_mac_filter(vsi, addr))
1782 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1783 * @netdev: the netdevice
1784 * @addr: address to add
1786 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1787 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1789 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1791 struct i40e_netdev_priv *np = netdev_priv(netdev);
1792 struct i40e_vsi *vsi = np->vsi;
1794 i40e_del_mac_filter(vsi, addr);
1800 * i40e_set_rx_mode - NDO callback to set the netdev filters
1801 * @netdev: network interface device structure
1804 void i40e_set_rx_mode(struct net_device *netdev)
1806 static void i40e_set_rx_mode(struct net_device *netdev)
1809 struct i40e_netdev_priv *np = netdev_priv(netdev);
1810 struct i40e_vsi *vsi = np->vsi;
1812 spin_lock_bh(&vsi->mac_filter_hash_lock);
1814 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1815 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1817 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1819 /* check for other flag changes */
1820 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1821 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1822 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1825 /* schedule our worker thread which will take care of
1826 * applying the new filter changes
1828 i40e_service_event_schedule(vsi->back);
1832 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1833 * @vsi: Pointer to VSI struct
1834 * @from: Pointer to list which contains MAC filter entries - changes to
1835 * those entries needs to be undone.
1837 * MAC filter entries from this list were slated for deletion.
1839 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1840 struct hlist_head *from)
1842 struct i40e_mac_filter *f;
1843 struct hlist_node *h;
1845 hlist_for_each_entry_safe(f, h, from, hlist) {
1846 u64 key = i40e_addr_to_hkey(f->macaddr);
1848 /* Move the element back into MAC filter list*/
1849 hlist_del(&f->hlist);
1850 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1855 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1856 * @vsi: Pointer to vsi struct
1857 * @from: Pointer to list which contains MAC filter entries - changes to
1858 * those entries needs to be undone.
1860 * MAC filter entries from this list were slated for addition.
1862 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1863 struct hlist_head *from)
1865 struct i40e_new_mac_filter *new;
1866 struct hlist_node *h;
1868 hlist_for_each_entry_safe(new, h, from, hlist) {
1869 /* We can simply free the wrapper structure */
1870 hlist_del(&new->hlist);
1876 * i40e_next_entry - Get the next non-broadcast filter from a list
1877 * @next: pointer to filter in list
1879 * Returns the next non-broadcast filter in the list. Required so that we
1880 * ignore broadcast filters within the list, since these are not handled via
1881 * the normal firmware update path.
1884 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
1887 next = hlist_entry(next->hlist.next,
1888 typeof(struct i40e_new_mac_filter),
1891 /* keep going if we found a broadcast filter */
1892 if (next && is_broadcast_ether_addr(next->f->macaddr))
1902 * i40e_update_filter_state - Update filter state based on return data
1904 * @count: Number of filters added
1905 * @add_list: return data from fw
1906 * @head: pointer to first filter in current batch
1908 * MAC filter entries from list were slated to be added to device. Returns
1909 * number of successful filters. Note that 0 does NOT mean success!
1912 i40e_update_filter_state(int count,
1913 struct i40e_aqc_add_macvlan_element_data *add_list,
1914 struct i40e_new_mac_filter *add_head)
1919 for (i = 0; i < count; i++) {
1920 /* Always check status of each filter. We don't need to check
1921 * the firmware return status because we pre-set the filter
1922 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
1923 * request to the adminq. Thus, if it no longer matches then
1924 * we know the filter is active.
1926 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
1927 add_head->state = I40E_FILTER_FAILED;
1929 add_head->state = I40E_FILTER_ACTIVE;
1933 add_head = i40e_next_filter(add_head);
1942 * i40e_aqc_del_filters - Request firmware to delete a set of filters
1943 * @vsi: ptr to the VSI
1944 * @vsi_name: name to display in messages
1945 * @list: the list of filters to send to firmware
1946 * @num_del: the number of filters to delete
1947 * @retval: Set to -EIO on failure to delete
1949 * Send a request to firmware via AdminQ to delete a set of filters. Uses
1950 * *retval instead of a return value so that success does not force ret_val to
1951 * be set to 0. This ensures that a sequence of calls to this function
1952 * preserve the previous value of *retval on successful delete.
1955 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
1956 struct i40e_aqc_remove_macvlan_element_data *list,
1957 int num_del, int *retval)
1959 struct i40e_hw *hw = &vsi->back->hw;
1963 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
1964 aq_err = hw->aq.asq_last_status;
1966 /* Explicitly ignore and do not report when firmware returns ENOENT */
1967 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1969 dev_info(&vsi->back->pdev->dev,
1970 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1971 vsi_name, i40e_stat_str(hw, aq_ret),
1972 i40e_aq_str(hw, aq_err));
1977 * i40e_aqc_add_filters - Request firmware to add a set of filters
1978 * @vsi: ptr to the VSI
1979 * @vsi_name: name to display in messages
1980 * @list: the list of filters to send to firmware
1981 * @add_head: Position in the add hlist
1982 * @num_add: the number of filters to add
1983 * @promisc_change: set to true on exit if promiscuous mode was forced on
1985 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
1986 * promisc_changed to true if the firmware has run out of space for more
1990 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
1991 struct i40e_aqc_add_macvlan_element_data *list,
1992 struct i40e_new_mac_filter *add_head,
1993 int num_add, bool *promisc_changed)
1995 struct i40e_hw *hw = &vsi->back->hw;
1998 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
1999 aq_err = hw->aq.asq_last_status;
2000 fcnt = i40e_update_filter_state(num_add, list, add_head);
2002 if (fcnt != num_add) {
2003 *promisc_changed = true;
2004 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2005 dev_warn(&vsi->back->pdev->dev,
2006 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2007 i40e_aq_str(hw, aq_err),
2013 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2014 * @vsi: pointer to the VSI
2017 * This function sets or clears the promiscuous broadcast flags for VLAN
2018 * filters in order to properly receive broadcast frames. Assumes that only
2019 * broadcast filters are passed.
2021 * Returns status indicating success or failure;
2024 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2025 struct i40e_mac_filter *f)
2027 bool enable = f->state == I40E_FILTER_NEW;
2028 struct i40e_hw *hw = &vsi->back->hw;
2031 if (f->vlan == I40E_VLAN_ANY) {
2032 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2037 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2045 dev_warn(&vsi->back->pdev->dev,
2046 "Error %s setting broadcast promiscuous mode on %s\n",
2047 i40e_aq_str(hw, hw->aq.asq_last_status),
2054 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2055 * @vsi: ptr to the VSI
2057 * Push any outstanding VSI filter changes through the AdminQ.
2059 * Returns 0 or error value
2061 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2063 struct hlist_head tmp_add_list, tmp_del_list;
2064 struct i40e_mac_filter *f;
2065 struct i40e_new_mac_filter *new, *add_head = NULL;
2066 struct i40e_hw *hw = &vsi->back->hw;
2067 unsigned int failed_filters = 0;
2068 unsigned int vlan_filters = 0;
2069 bool promisc_changed = false;
2070 char vsi_name[16] = "PF";
2071 int filter_list_len = 0;
2072 i40e_status aq_ret = 0;
2073 u32 changed_flags = 0;
2074 struct hlist_node *h;
2083 /* empty array typed pointers, kcalloc later */
2084 struct i40e_aqc_add_macvlan_element_data *add_list;
2085 struct i40e_aqc_remove_macvlan_element_data *del_list;
2087 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
2088 usleep_range(1000, 2000);
2092 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2093 vsi->current_netdev_flags = vsi->netdev->flags;
2096 INIT_HLIST_HEAD(&tmp_add_list);
2097 INIT_HLIST_HEAD(&tmp_del_list);
2099 if (vsi->type == I40E_VSI_SRIOV)
2100 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2101 else if (vsi->type != I40E_VSI_MAIN)
2102 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2104 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2105 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2107 spin_lock_bh(&vsi->mac_filter_hash_lock);
2108 /* Create a list of filters to delete. */
2109 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2110 if (f->state == I40E_FILTER_REMOVE) {
2111 /* Move the element into temporary del_list */
2112 hash_del(&f->hlist);
2113 hlist_add_head(&f->hlist, &tmp_del_list);
2115 /* Avoid counting removed filters */
2118 if (f->state == I40E_FILTER_NEW) {
2119 /* Create a temporary i40e_new_mac_filter */
2120 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2122 goto err_no_memory_locked;
2124 /* Store pointer to the real filter */
2126 new->state = f->state;
2128 /* Add it to the hash list */
2129 hlist_add_head(&new->hlist, &tmp_add_list);
2132 /* Count the number of active (current and new) VLAN
2133 * filters we have now. Does not count filters which
2134 * are marked for deletion.
2140 retval = i40e_correct_mac_vlan_filters(vsi,
2145 goto err_no_memory_locked;
2147 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2150 /* Now process 'del_list' outside the lock */
2151 if (!hlist_empty(&tmp_del_list)) {
2152 filter_list_len = hw->aq.asq_buf_size /
2153 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2154 list_size = filter_list_len *
2155 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2156 del_list = kzalloc(list_size, GFP_ATOMIC);
2160 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2163 /* handle broadcast filters by updating the broadcast
2164 * promiscuous flag and release filter list.
2166 if (is_broadcast_ether_addr(f->macaddr)) {
2167 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2169 hlist_del(&f->hlist);
2174 /* add to delete list */
2175 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2176 if (f->vlan == I40E_VLAN_ANY) {
2177 del_list[num_del].vlan_tag = 0;
2178 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2180 del_list[num_del].vlan_tag =
2181 cpu_to_le16((u16)(f->vlan));
2184 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2185 del_list[num_del].flags = cmd_flags;
2188 /* flush a full buffer */
2189 if (num_del == filter_list_len) {
2190 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2192 memset(del_list, 0, list_size);
2195 /* Release memory for MAC filter entries which were
2196 * synced up with HW.
2198 hlist_del(&f->hlist);
2203 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2211 if (!hlist_empty(&tmp_add_list)) {
2212 /* Do all the adds now. */
2213 filter_list_len = hw->aq.asq_buf_size /
2214 sizeof(struct i40e_aqc_add_macvlan_element_data);
2215 list_size = filter_list_len *
2216 sizeof(struct i40e_aqc_add_macvlan_element_data);
2217 add_list = kzalloc(list_size, GFP_ATOMIC);
2222 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2223 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2225 new->state = I40E_FILTER_FAILED;
2229 /* handle broadcast filters by updating the broadcast
2230 * promiscuous flag instead of adding a MAC filter.
2232 if (is_broadcast_ether_addr(new->f->macaddr)) {
2233 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2235 new->state = I40E_FILTER_FAILED;
2237 new->state = I40E_FILTER_ACTIVE;
2241 /* add to add array */
2245 ether_addr_copy(add_list[num_add].mac_addr,
2247 if (new->f->vlan == I40E_VLAN_ANY) {
2248 add_list[num_add].vlan_tag = 0;
2249 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2251 add_list[num_add].vlan_tag =
2252 cpu_to_le16((u16)(new->f->vlan));
2254 add_list[num_add].queue_number = 0;
2255 /* set invalid match method for later detection */
2256 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2257 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2258 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2261 /* flush a full buffer */
2262 if (num_add == filter_list_len) {
2263 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2266 memset(add_list, 0, list_size);
2271 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2272 num_add, &promisc_changed);
2274 /* Now move all of the filters from the temp add list back to
2277 spin_lock_bh(&vsi->mac_filter_hash_lock);
2278 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2279 /* Only update the state if we're still NEW */
2280 if (new->f->state == I40E_FILTER_NEW)
2281 new->f->state = new->state;
2282 hlist_del(&new->hlist);
2285 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2290 /* Determine the number of active and failed filters. */
2291 spin_lock_bh(&vsi->mac_filter_hash_lock);
2292 vsi->active_filters = 0;
2293 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2294 if (f->state == I40E_FILTER_ACTIVE)
2295 vsi->active_filters++;
2296 else if (f->state == I40E_FILTER_FAILED)
2299 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2301 /* If promiscuous mode has changed, we need to calculate a new
2302 * threshold for when we are safe to exit
2304 if (promisc_changed)
2305 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2307 /* Check if we are able to exit overflow promiscuous mode. We can
2308 * safely exit if we didn't just enter, we no longer have any failed
2309 * filters, and we have reduced filters below the threshold value.
2311 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2312 !promisc_changed && !failed_filters &&
2313 (vsi->active_filters < vsi->promisc_threshold)) {
2314 dev_info(&pf->pdev->dev,
2315 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2317 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2318 promisc_changed = true;
2319 vsi->promisc_threshold = 0;
2322 /* if the VF is not trusted do not do promisc */
2323 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2324 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2328 /* check for changes in promiscuous modes */
2329 if (changed_flags & IFF_ALLMULTI) {
2330 bool cur_multipromisc;
2332 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2333 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2338 retval = i40e_aq_rc_to_posix(aq_ret,
2339 hw->aq.asq_last_status);
2340 dev_info(&pf->pdev->dev,
2341 "set multi promisc failed on %s, err %s aq_err %s\n",
2343 i40e_stat_str(hw, aq_ret),
2344 i40e_aq_str(hw, hw->aq.asq_last_status));
2347 if ((changed_flags & IFF_PROMISC) ||
2349 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2352 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2353 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2355 if ((vsi->type == I40E_VSI_MAIN) &&
2356 (pf->lan_veb != I40E_NO_VEB) &&
2357 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2358 /* set defport ON for Main VSI instead of true promisc
2359 * this way we will get all unicast/multicast and VLAN
2360 * promisc behavior but will not get VF or VMDq traffic
2361 * replicated on the Main VSI.
2363 if (pf->cur_promisc != cur_promisc) {
2364 pf->cur_promisc = cur_promisc;
2367 i40e_aq_set_default_vsi(hw,
2372 i40e_aq_clear_default_vsi(hw,
2376 retval = i40e_aq_rc_to_posix(aq_ret,
2377 hw->aq.asq_last_status);
2378 dev_info(&pf->pdev->dev,
2379 "Set default VSI failed on %s, err %s, aq_err %s\n",
2381 i40e_stat_str(hw, aq_ret),
2383 hw->aq.asq_last_status));
2387 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2394 i40e_aq_rc_to_posix(aq_ret,
2395 hw->aq.asq_last_status);
2396 dev_info(&pf->pdev->dev,
2397 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2399 i40e_stat_str(hw, aq_ret),
2401 hw->aq.asq_last_status));
2403 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2409 i40e_aq_rc_to_posix(aq_ret,
2410 hw->aq.asq_last_status);
2411 dev_info(&pf->pdev->dev,
2412 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2414 i40e_stat_str(hw, aq_ret),
2416 hw->aq.asq_last_status));
2419 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2423 retval = i40e_aq_rc_to_posix(aq_ret,
2424 pf->hw.aq.asq_last_status);
2425 dev_info(&pf->pdev->dev,
2426 "set brdcast promisc failed, err %s, aq_err %s\n",
2427 i40e_stat_str(hw, aq_ret),
2429 hw->aq.asq_last_status));
2433 /* if something went wrong then set the changed flag so we try again */
2435 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2437 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2441 /* Restore elements on the temporary add and delete lists */
2442 spin_lock_bh(&vsi->mac_filter_hash_lock);
2443 err_no_memory_locked:
2444 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2445 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2446 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2448 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2449 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2454 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2455 * @pf: board private structure
2457 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2461 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2463 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2465 for (v = 0; v < pf->num_alloc_vsi; v++) {
2467 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2468 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2471 /* come back and try again later */
2472 pf->flags |= I40E_FLAG_FILTER_SYNC;
2480 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2481 * @netdev: network interface device structure
2482 * @new_mtu: new value for maximum frame size
2484 * Returns 0 on success, negative on failure
2486 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2488 struct i40e_netdev_priv *np = netdev_priv(netdev);
2489 struct i40e_vsi *vsi = np->vsi;
2490 struct i40e_pf *pf = vsi->back;
2492 netdev_info(netdev, "changing MTU from %d to %d\n",
2493 netdev->mtu, new_mtu);
2494 netdev->mtu = new_mtu;
2495 if (netif_running(netdev))
2496 i40e_vsi_reinit_locked(vsi);
2497 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
2498 I40E_FLAG_CLIENT_L2_CHANGE);
2503 * i40e_ioctl - Access the hwtstamp interface
2504 * @netdev: network interface device structure
2505 * @ifr: interface request data
2506 * @cmd: ioctl command
2508 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2510 struct i40e_netdev_priv *np = netdev_priv(netdev);
2511 struct i40e_pf *pf = np->vsi->back;
2515 return i40e_ptp_get_ts_config(pf, ifr);
2517 return i40e_ptp_set_ts_config(pf, ifr);
2524 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2525 * @vsi: the vsi being adjusted
2527 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2529 struct i40e_vsi_context ctxt;
2532 if ((vsi->info.valid_sections &
2533 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2534 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2535 return; /* already enabled */
2537 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2538 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2539 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2541 ctxt.seid = vsi->seid;
2542 ctxt.info = vsi->info;
2543 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2545 dev_info(&vsi->back->pdev->dev,
2546 "update vlan stripping failed, err %s aq_err %s\n",
2547 i40e_stat_str(&vsi->back->hw, ret),
2548 i40e_aq_str(&vsi->back->hw,
2549 vsi->back->hw.aq.asq_last_status));
2554 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2555 * @vsi: the vsi being adjusted
2557 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2559 struct i40e_vsi_context ctxt;
2562 if ((vsi->info.valid_sections &
2563 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2564 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2565 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2566 return; /* already disabled */
2568 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2569 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2570 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2572 ctxt.seid = vsi->seid;
2573 ctxt.info = vsi->info;
2574 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2576 dev_info(&vsi->back->pdev->dev,
2577 "update vlan stripping failed, err %s aq_err %s\n",
2578 i40e_stat_str(&vsi->back->hw, ret),
2579 i40e_aq_str(&vsi->back->hw,
2580 vsi->back->hw.aq.asq_last_status));
2585 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2586 * @netdev: network interface to be adjusted
2587 * @features: netdev features to test if VLAN offload is enabled or not
2589 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2591 struct i40e_netdev_priv *np = netdev_priv(netdev);
2592 struct i40e_vsi *vsi = np->vsi;
2594 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2595 i40e_vlan_stripping_enable(vsi);
2597 i40e_vlan_stripping_disable(vsi);
2601 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2602 * @vsi: the vsi being configured
2603 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2605 * This is a helper function for adding a new MAC/VLAN filter with the
2606 * specified VLAN for each existing MAC address already in the hash table.
2607 * This function does *not* perform any accounting to update filters based on
2610 * NOTE: this function expects to be called while under the
2611 * mac_filter_hash_lock
2613 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2615 struct i40e_mac_filter *f, *add_f;
2616 struct hlist_node *h;
2619 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2620 if (f->state == I40E_FILTER_REMOVE)
2622 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2624 dev_info(&vsi->back->pdev->dev,
2625 "Could not add vlan filter %d for %pM\n",
2635 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2636 * @vsi: the VSI being configured
2637 * @vid: VLAN id to be added
2639 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2643 if (!vid || vsi->info.pvid)
2646 /* Locked once because all functions invoked below iterates list*/
2647 spin_lock_bh(&vsi->mac_filter_hash_lock);
2648 err = i40e_add_vlan_all_mac(vsi, vid);
2649 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2653 /* schedule our worker thread which will take care of
2654 * applying the new filter changes
2656 i40e_service_event_schedule(vsi->back);
2661 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2662 * @vsi: the vsi being configured
2663 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2665 * This function should be used to remove all VLAN filters which match the
2666 * given VID. It does not schedule the service event and does not take the
2667 * mac_filter_hash_lock so it may be combined with other operations under
2668 * a single invocation of the mac_filter_hash_lock.
2670 * NOTE: this function expects to be called while under the
2671 * mac_filter_hash_lock
2673 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2675 struct i40e_mac_filter *f;
2676 struct hlist_node *h;
2679 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2681 __i40e_del_filter(vsi, f);
2686 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2687 * @vsi: the VSI being configured
2688 * @vid: VLAN id to be removed
2690 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2692 if (!vid || vsi->info.pvid)
2695 spin_lock_bh(&vsi->mac_filter_hash_lock);
2696 i40e_rm_vlan_all_mac(vsi, vid);
2697 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2699 /* schedule our worker thread which will take care of
2700 * applying the new filter changes
2702 i40e_service_event_schedule(vsi->back);
2706 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2707 * @netdev: network interface to be adjusted
2708 * @vid: vlan id to be added
2710 * net_device_ops implementation for adding vlan ids
2713 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2714 __always_unused __be16 proto, u16 vid)
2716 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2717 __always_unused __be16 proto, u16 vid)
2720 struct i40e_netdev_priv *np = netdev_priv(netdev);
2721 struct i40e_vsi *vsi = np->vsi;
2724 if (vid >= VLAN_N_VID)
2727 /* If the network stack called us with vid = 0 then
2728 * it is asking to receive priority tagged packets with
2729 * vlan id 0. Our HW receives them by default when configured
2730 * to receive untagged packets so there is no need to add an
2731 * extra filter for vlan 0 tagged packets.
2734 ret = i40e_vsi_add_vlan(vsi, vid);
2737 set_bit(vid, vsi->active_vlans);
2743 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2744 * @netdev: network interface to be adjusted
2745 * @vid: vlan id to be removed
2747 * net_device_ops implementation for removing vlan ids
2750 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2751 __always_unused __be16 proto, u16 vid)
2753 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2754 __always_unused __be16 proto, u16 vid)
2757 struct i40e_netdev_priv *np = netdev_priv(netdev);
2758 struct i40e_vsi *vsi = np->vsi;
2760 /* return code is ignored as there is nothing a user
2761 * can do about failure to remove and a log message was
2762 * already printed from the other function
2764 i40e_vsi_kill_vlan(vsi, vid);
2766 clear_bit(vid, vsi->active_vlans);
2772 * i40e_macaddr_init - explicitly write the mac address filters
2774 * @vsi: pointer to the vsi
2775 * @macaddr: the MAC address
2777 * This is needed when the macaddr has been obtained by other
2778 * means than the default, e.g., from Open Firmware or IDPROM.
2779 * Returns 0 on success, negative on failure
2781 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2784 struct i40e_aqc_add_macvlan_element_data element;
2786 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2787 I40E_AQC_WRITE_TYPE_LAA_WOL,
2790 dev_info(&vsi->back->pdev->dev,
2791 "Addr change for VSI failed: %d\n", ret);
2792 return -EADDRNOTAVAIL;
2795 memset(&element, 0, sizeof(element));
2796 ether_addr_copy(element.mac_addr, macaddr);
2797 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2798 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2800 dev_info(&vsi->back->pdev->dev,
2801 "add filter failed err %s aq_err %s\n",
2802 i40e_stat_str(&vsi->back->hw, ret),
2803 i40e_aq_str(&vsi->back->hw,
2804 vsi->back->hw.aq.asq_last_status));
2810 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2811 * @vsi: the vsi being brought back up
2813 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2820 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2822 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2823 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2828 * i40e_vsi_add_pvid - Add pvid for the VSI
2829 * @vsi: the vsi being adjusted
2830 * @vid: the vlan id to set as a PVID
2832 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2834 struct i40e_vsi_context ctxt;
2837 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2838 vsi->info.pvid = cpu_to_le16(vid);
2839 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2840 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2841 I40E_AQ_VSI_PVLAN_EMOD_STR;
2843 ctxt.seid = vsi->seid;
2844 ctxt.info = vsi->info;
2845 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2847 dev_info(&vsi->back->pdev->dev,
2848 "add pvid failed, err %s aq_err %s\n",
2849 i40e_stat_str(&vsi->back->hw, ret),
2850 i40e_aq_str(&vsi->back->hw,
2851 vsi->back->hw.aq.asq_last_status));
2859 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2860 * @vsi: the vsi being adjusted
2862 * Just use the vlan_rx_register() service to put it back to normal
2864 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2866 i40e_vlan_stripping_disable(vsi);
2872 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2873 * @vsi: ptr to the VSI
2875 * If this function returns with an error, then it's possible one or
2876 * more of the rings is populated (while the rest are not). It is the
2877 * callers duty to clean those orphaned rings.
2879 * Return 0 on success, negative on failure
2881 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2885 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2886 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2892 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2893 * @vsi: ptr to the VSI
2895 * Free VSI's transmit software resources
2897 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2904 for (i = 0; i < vsi->num_queue_pairs; i++)
2905 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2906 i40e_free_tx_resources(vsi->tx_rings[i]);
2910 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2911 * @vsi: ptr to the VSI
2913 * If this function returns with an error, then it's possible one or
2914 * more of the rings is populated (while the rest are not). It is the
2915 * callers duty to clean those orphaned rings.
2917 * Return 0 on success, negative on failure
2919 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2923 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2924 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2926 i40e_fcoe_setup_ddp_resources(vsi);
2932 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2933 * @vsi: ptr to the VSI
2935 * Free all receive software resources
2937 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2944 for (i = 0; i < vsi->num_queue_pairs; i++)
2945 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2946 i40e_free_rx_resources(vsi->rx_rings[i]);
2948 i40e_fcoe_free_ddp_resources(vsi);
2953 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2954 * @ring: The Tx ring to configure
2956 * This enables/disables XPS for a given Tx descriptor ring
2957 * based on the TCs enabled for the VSI that ring belongs to.
2959 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2961 struct i40e_vsi *vsi = ring->vsi;
2964 if (!ring->q_vector || !ring->netdev)
2967 /* Single TC mode enable XPS */
2968 if (vsi->tc_config.numtc <= 1) {
2969 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2970 netif_set_xps_queue(ring->netdev,
2971 &ring->q_vector->affinity_mask,
2973 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2974 /* Disable XPS to allow selection based on TC */
2975 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2976 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2977 free_cpumask_var(mask);
2980 /* schedule our worker thread which will take care of
2981 * applying the new filter changes
2983 i40e_service_event_schedule(vsi->back);
2987 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2988 * @ring: The Tx ring to configure
2990 * Configure the Tx descriptor ring in the HMC context.
2992 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2994 struct i40e_vsi *vsi = ring->vsi;
2995 u16 pf_q = vsi->base_queue + ring->queue_index;
2996 struct i40e_hw *hw = &vsi->back->hw;
2997 struct i40e_hmc_obj_txq tx_ctx;
2998 i40e_status err = 0;
3001 /* some ATR related tx ring init */
3002 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3003 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3004 ring->atr_count = 0;
3006 ring->atr_sample_rate = 0;
3010 i40e_config_xps_tx_ring(ring);
3012 /* clear the context structure first */
3013 memset(&tx_ctx, 0, sizeof(tx_ctx));
3015 tx_ctx.new_context = 1;
3016 tx_ctx.base = (ring->dma / 128);
3017 tx_ctx.qlen = ring->count;
3018 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3019 I40E_FLAG_FD_ATR_ENABLED));
3021 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
3023 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3024 /* FDIR VSI tx ring can still use RS bit and writebacks */
3025 if (vsi->type != I40E_VSI_FDIR)
3026 tx_ctx.head_wb_ena = 1;
3027 tx_ctx.head_wb_addr = ring->dma +
3028 (ring->count * sizeof(struct i40e_tx_desc));
3030 /* As part of VSI creation/update, FW allocates certain
3031 * Tx arbitration queue sets for each TC enabled for
3032 * the VSI. The FW returns the handles to these queue
3033 * sets as part of the response buffer to Add VSI,
3034 * Update VSI, etc. AQ commands. It is expected that
3035 * these queue set handles be associated with the Tx
3036 * queues by the driver as part of the TX queue context
3037 * initialization. This has to be done regardless of
3038 * DCB as by default everything is mapped to TC0.
3040 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3041 tx_ctx.rdylist_act = 0;
3043 /* clear the context in the HMC */
3044 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3046 dev_info(&vsi->back->pdev->dev,
3047 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3048 ring->queue_index, pf_q, err);
3052 /* set the context in the HMC */
3053 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3055 dev_info(&vsi->back->pdev->dev,
3056 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3057 ring->queue_index, pf_q, err);
3061 /* Now associate this queue with this PCI function */
3062 if (vsi->type == I40E_VSI_VMDQ2) {
3063 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3064 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3065 I40E_QTX_CTL_VFVM_INDX_MASK;
3067 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3070 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3071 I40E_QTX_CTL_PF_INDX_MASK);
3072 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3075 /* cache tail off for easier writes later */
3076 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3082 * i40e_configure_rx_ring - Configure a receive ring context
3083 * @ring: The Rx ring to configure
3085 * Configure the Rx descriptor ring in the HMC context.
3087 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3089 struct i40e_vsi *vsi = ring->vsi;
3090 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3091 u16 pf_q = vsi->base_queue + ring->queue_index;
3092 struct i40e_hw *hw = &vsi->back->hw;
3093 struct i40e_hmc_obj_rxq rx_ctx;
3094 i40e_status err = 0;
3098 /* clear the context structure first */
3099 memset(&rx_ctx, 0, sizeof(rx_ctx));
3101 ring->rx_buf_len = vsi->rx_buf_len;
3103 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
3105 rx_ctx.base = (ring->dma / 128);
3106 rx_ctx.qlen = ring->count;
3108 /* use 32 byte descriptors */
3111 /* descriptor type is always zero
3114 rx_ctx.hsplit_0 = 0;
3116 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3117 if (hw->revision_id == 0)
3118 rx_ctx.lrxqthresh = 0;
3120 rx_ctx.lrxqthresh = 2;
3121 rx_ctx.crcstrip = 1;
3123 /* this controls whether VLAN is stripped from inner headers */
3126 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
3128 /* set the prefena field to 1 because the manual says to */
3131 /* clear the context in the HMC */
3132 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3134 dev_info(&vsi->back->pdev->dev,
3135 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3136 ring->queue_index, pf_q, err);
3140 /* set the context in the HMC */
3141 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3143 dev_info(&vsi->back->pdev->dev,
3144 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3145 ring->queue_index, pf_q, err);
3149 /* cache tail for quicker writes, and clear the reg before use */
3150 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3151 writel(0, ring->tail);
3153 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3159 * i40e_vsi_configure_tx - Configure the VSI for Tx
3160 * @vsi: VSI structure describing this set of rings and resources
3162 * Configure the Tx VSI for operation.
3164 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3169 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3170 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3176 * i40e_vsi_configure_rx - Configure the VSI for Rx
3177 * @vsi: the VSI being configured
3179 * Configure the Rx VSI for operation.
3181 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3186 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3187 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3188 + ETH_FCS_LEN + VLAN_HLEN;
3190 vsi->max_frame = I40E_RXBUFFER_2048;
3192 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3195 /* setup rx buffer for FCoE */
3196 if ((vsi->type == I40E_VSI_FCOE) &&
3197 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3198 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3199 vsi->max_frame = I40E_RXBUFFER_3072;
3202 #endif /* I40E_FCOE */
3203 /* round up for the chip's needs */
3204 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3205 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3207 /* set up individual rings */
3208 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3209 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3215 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3216 * @vsi: ptr to the VSI
3218 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3220 struct i40e_ring *tx_ring, *rx_ring;
3221 u16 qoffset, qcount;
3224 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3225 /* Reset the TC information */
3226 for (i = 0; i < vsi->num_queue_pairs; i++) {
3227 rx_ring = vsi->rx_rings[i];
3228 tx_ring = vsi->tx_rings[i];
3229 rx_ring->dcb_tc = 0;
3230 tx_ring->dcb_tc = 0;
3234 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3235 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3238 qoffset = vsi->tc_config.tc_info[n].qoffset;
3239 qcount = vsi->tc_config.tc_info[n].qcount;
3240 for (i = qoffset; i < (qoffset + qcount); i++) {
3241 rx_ring = vsi->rx_rings[i];
3242 tx_ring = vsi->tx_rings[i];
3243 rx_ring->dcb_tc = n;
3244 tx_ring->dcb_tc = n;
3250 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3251 * @vsi: ptr to the VSI
3253 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3255 struct i40e_pf *pf = vsi->back;
3259 i40e_set_rx_mode(vsi->netdev);
3261 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3262 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3264 dev_warn(&pf->pdev->dev,
3265 "could not set up macaddr; err %d\n", err);
3271 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3272 * @vsi: Pointer to the targeted VSI
3274 * This function replays the hlist on the hw where all the SB Flow Director
3275 * filters were saved.
3277 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3279 struct i40e_fdir_filter *filter;
3280 struct i40e_pf *pf = vsi->back;
3281 struct hlist_node *node;
3283 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3286 hlist_for_each_entry_safe(filter, node,
3287 &pf->fdir_filter_list, fdir_node) {
3288 i40e_add_del_fdir(vsi, filter, true);
3293 * i40e_vsi_configure - Set up the VSI for action
3294 * @vsi: the VSI being configured
3296 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3300 i40e_set_vsi_rx_mode(vsi);
3301 i40e_restore_vlan(vsi);
3302 i40e_vsi_config_dcb_rings(vsi);
3303 err = i40e_vsi_configure_tx(vsi);
3305 err = i40e_vsi_configure_rx(vsi);
3311 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3312 * @vsi: the VSI being configured
3314 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3316 struct i40e_pf *pf = vsi->back;
3317 struct i40e_hw *hw = &pf->hw;
3322 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3323 * and PFINT_LNKLSTn registers, e.g.:
3324 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3326 qp = vsi->base_queue;
3327 vector = vsi->base_vector;
3328 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3329 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3331 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3332 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3333 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3334 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3336 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3337 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3338 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3340 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3341 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3343 /* Linked list for the queuepairs assigned to this vector */
3344 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3345 for (q = 0; q < q_vector->num_ringpairs; q++) {
3348 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3349 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3350 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3351 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3353 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3355 wr32(hw, I40E_QINT_RQCTL(qp), val);
3357 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3358 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3359 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3360 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3362 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3364 /* Terminate the linked list */
3365 if (q == (q_vector->num_ringpairs - 1))
3366 val |= (I40E_QUEUE_END_OF_LIST
3367 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3369 wr32(hw, I40E_QINT_TQCTL(qp), val);
3378 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3379 * @hw: ptr to the hardware info
3381 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3383 struct i40e_hw *hw = &pf->hw;
3386 /* clear things first */
3387 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3388 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3390 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3391 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3392 I40E_PFINT_ICR0_ENA_GRST_MASK |
3393 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3394 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3395 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3396 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3397 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3399 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3400 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3402 if (pf->flags & I40E_FLAG_PTP)
3403 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3405 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3407 /* SW_ITR_IDX = 0, but don't change INTENA */
3408 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3409 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3411 /* OTHER_ITR_IDX = 0 */
3412 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3416 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3417 * @vsi: the VSI being configured
3419 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3421 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3422 struct i40e_pf *pf = vsi->back;
3423 struct i40e_hw *hw = &pf->hw;
3426 /* set the ITR configuration */
3427 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3428 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3429 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3430 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3431 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3432 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3433 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3435 i40e_enable_misc_int_causes(pf);
3437 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3438 wr32(hw, I40E_PFINT_LNKLST0, 0);
3440 /* Associate the queue pair to the vector and enable the queue int */
3441 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3442 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3443 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3445 wr32(hw, I40E_QINT_RQCTL(0), val);
3447 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3448 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3449 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3451 wr32(hw, I40E_QINT_TQCTL(0), val);
3456 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3457 * @pf: board private structure
3459 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3461 struct i40e_hw *hw = &pf->hw;
3463 wr32(hw, I40E_PFINT_DYN_CTL0,
3464 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3469 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3470 * @pf: board private structure
3471 * @clearpba: true when all pending interrupt events should be cleared
3473 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3475 struct i40e_hw *hw = &pf->hw;
3478 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3479 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3480 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3482 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3487 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3488 * @irq: interrupt number
3489 * @data: pointer to a q_vector
3491 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3493 struct i40e_q_vector *q_vector = data;
3495 if (!q_vector->tx.ring && !q_vector->rx.ring)
3498 napi_schedule_irqoff(&q_vector->napi);
3504 * i40e_irq_affinity_notify - Callback for affinity changes
3505 * @notify: context as to what irq was changed
3506 * @mask: the new affinity mask
3508 * This is a callback function used by the irq_set_affinity_notifier function
3509 * so that we may register to receive changes to the irq affinity masks.
3511 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3512 const cpumask_t *mask)
3514 struct i40e_q_vector *q_vector =
3515 container_of(notify, struct i40e_q_vector, affinity_notify);
3517 q_vector->affinity_mask = *mask;
3521 * i40e_irq_affinity_release - Callback for affinity notifier release
3522 * @ref: internal core kernel usage
3524 * This is a callback function used by the irq_set_affinity_notifier function
3525 * to inform the current notification subscriber that they will no longer
3526 * receive notifications.
3528 static void i40e_irq_affinity_release(struct kref *ref) {}
3531 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3532 * @vsi: the VSI being configured
3533 * @basename: name for the vector
3535 * Allocates MSI-X vectors and requests interrupts from the kernel.
3537 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3539 int q_vectors = vsi->num_q_vectors;
3540 struct i40e_pf *pf = vsi->back;
3541 int base = vsi->base_vector;
3547 for (vector = 0; vector < q_vectors; vector++) {
3548 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3550 irq_num = pf->msix_entries[base + vector].vector;
3552 if (q_vector->tx.ring && q_vector->rx.ring) {
3553 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3554 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3556 } else if (q_vector->rx.ring) {
3557 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3558 "%s-%s-%d", basename, "rx", rx_int_idx++);
3559 } else if (q_vector->tx.ring) {
3560 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3561 "%s-%s-%d", basename, "tx", tx_int_idx++);
3563 /* skip this unused q_vector */
3566 err = request_irq(irq_num,
3572 dev_info(&pf->pdev->dev,
3573 "MSIX request_irq failed, error: %d\n", err);
3574 goto free_queue_irqs;
3577 /* register for affinity change notifications */
3578 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3579 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3580 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3581 /* assign the mask for this irq */
3582 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
3585 vsi->irqs_ready = true;
3591 irq_num = pf->msix_entries[base + vector].vector;
3592 irq_set_affinity_notifier(irq_num, NULL);
3593 irq_set_affinity_hint(irq_num, NULL);
3594 free_irq(irq_num, &vsi->q_vectors[vector]);
3600 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3601 * @vsi: the VSI being un-configured
3603 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3605 struct i40e_pf *pf = vsi->back;
3606 struct i40e_hw *hw = &pf->hw;
3607 int base = vsi->base_vector;
3610 for (i = 0; i < vsi->num_queue_pairs; i++) {
3611 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3612 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3615 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3616 for (i = vsi->base_vector;
3617 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3618 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3621 for (i = 0; i < vsi->num_q_vectors; i++)
3622 synchronize_irq(pf->msix_entries[i + base].vector);
3624 /* Legacy and MSI mode - this stops all interrupt handling */
3625 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3626 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3628 synchronize_irq(pf->pdev->irq);
3633 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3634 * @vsi: the VSI being configured
3636 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3638 struct i40e_pf *pf = vsi->back;
3641 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3642 for (i = 0; i < vsi->num_q_vectors; i++)
3643 i40e_irq_dynamic_enable(vsi, i);
3645 i40e_irq_dynamic_enable_icr0(pf, true);
3648 i40e_flush(&pf->hw);
3653 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3654 * @pf: board private structure
3656 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3659 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3660 i40e_flush(&pf->hw);
3664 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3665 * @irq: interrupt number
3666 * @data: pointer to a q_vector
3668 * This is the handler used for all MSI/Legacy interrupts, and deals
3669 * with both queue and non-queue interrupts. This is also used in
3670 * MSIX mode to handle the non-queue interrupts.
3672 static irqreturn_t i40e_intr(int irq, void *data)
3674 struct i40e_pf *pf = (struct i40e_pf *)data;
3675 struct i40e_hw *hw = &pf->hw;
3676 irqreturn_t ret = IRQ_NONE;
3677 u32 icr0, icr0_remaining;
3680 icr0 = rd32(hw, I40E_PFINT_ICR0);
3681 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3683 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3684 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3687 /* if interrupt but no bits showing, must be SWINT */
3688 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3689 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3692 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3693 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3694 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3695 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3696 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3699 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3700 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3701 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3702 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3704 /* We do not have a way to disarm Queue causes while leaving
3705 * interrupt enabled for all other causes, ideally
3706 * interrupt should be disabled while we are in NAPI but
3707 * this is not a performance path and napi_schedule()
3708 * can deal with rescheduling.
3710 if (!test_bit(__I40E_DOWN, &pf->state))
3711 napi_schedule_irqoff(&q_vector->napi);
3714 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3715 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3716 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3717 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3720 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3721 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3722 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3725 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3726 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3727 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3730 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3731 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3732 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3733 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3734 val = rd32(hw, I40E_GLGEN_RSTAT);
3735 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3736 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3737 if (val == I40E_RESET_CORER) {
3739 } else if (val == I40E_RESET_GLOBR) {
3741 } else if (val == I40E_RESET_EMPR) {
3743 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3747 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3748 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3749 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3750 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3751 rd32(hw, I40E_PFHMC_ERRORINFO),
3752 rd32(hw, I40E_PFHMC_ERRORDATA));
3755 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3756 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3758 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3759 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3760 i40e_ptp_tx_hwtstamp(pf);
3764 /* If a critical error is pending we have no choice but to reset the
3766 * Report and mask out any remaining unexpected interrupts.
3768 icr0_remaining = icr0 & ena_mask;
3769 if (icr0_remaining) {
3770 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3772 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3773 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3774 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3775 dev_info(&pf->pdev->dev, "device will be reset\n");
3776 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3777 i40e_service_event_schedule(pf);
3779 ena_mask &= ~icr0_remaining;
3784 /* re-enable interrupt causes */
3785 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3786 if (!test_bit(__I40E_DOWN, &pf->state)) {
3787 i40e_service_event_schedule(pf);
3788 i40e_irq_dynamic_enable_icr0(pf, false);
3795 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3796 * @tx_ring: tx ring to clean
3797 * @budget: how many cleans we're allowed
3799 * Returns true if there's any budget left (e.g. the clean is finished)
3801 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3803 struct i40e_vsi *vsi = tx_ring->vsi;
3804 u16 i = tx_ring->next_to_clean;
3805 struct i40e_tx_buffer *tx_buf;
3806 struct i40e_tx_desc *tx_desc;
3808 tx_buf = &tx_ring->tx_bi[i];
3809 tx_desc = I40E_TX_DESC(tx_ring, i);
3810 i -= tx_ring->count;
3813 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3815 /* if next_to_watch is not set then there is no work pending */
3819 /* prevent any other reads prior to eop_desc */
3820 read_barrier_depends();
3822 /* if the descriptor isn't done, no work yet to do */
3823 if (!(eop_desc->cmd_type_offset_bsz &
3824 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3827 /* clear next_to_watch to prevent false hangs */
3828 tx_buf->next_to_watch = NULL;
3830 tx_desc->buffer_addr = 0;
3831 tx_desc->cmd_type_offset_bsz = 0;
3832 /* move past filter desc */
3837 i -= tx_ring->count;
3838 tx_buf = tx_ring->tx_bi;
3839 tx_desc = I40E_TX_DESC(tx_ring, 0);
3841 /* unmap skb header data */
3842 dma_unmap_single(tx_ring->dev,
3843 dma_unmap_addr(tx_buf, dma),
3844 dma_unmap_len(tx_buf, len),
3846 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3847 kfree(tx_buf->raw_buf);
3849 tx_buf->raw_buf = NULL;
3850 tx_buf->tx_flags = 0;
3851 tx_buf->next_to_watch = NULL;
3852 dma_unmap_len_set(tx_buf, len, 0);
3853 tx_desc->buffer_addr = 0;
3854 tx_desc->cmd_type_offset_bsz = 0;
3856 /* move us past the eop_desc for start of next FD desc */
3861 i -= tx_ring->count;
3862 tx_buf = tx_ring->tx_bi;
3863 tx_desc = I40E_TX_DESC(tx_ring, 0);
3866 /* update budget accounting */
3868 } while (likely(budget));
3870 i += tx_ring->count;
3871 tx_ring->next_to_clean = i;
3873 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3874 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3880 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3881 * @irq: interrupt number
3882 * @data: pointer to a q_vector
3884 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3886 struct i40e_q_vector *q_vector = data;
3887 struct i40e_vsi *vsi;
3889 if (!q_vector->tx.ring)
3892 vsi = q_vector->tx.ring->vsi;
3893 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3899 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3900 * @vsi: the VSI being configured
3901 * @v_idx: vector index
3902 * @qp_idx: queue pair index
3904 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3906 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3907 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3908 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3910 tx_ring->q_vector = q_vector;
3911 tx_ring->next = q_vector->tx.ring;
3912 q_vector->tx.ring = tx_ring;
3913 q_vector->tx.count++;
3915 rx_ring->q_vector = q_vector;
3916 rx_ring->next = q_vector->rx.ring;
3917 q_vector->rx.ring = rx_ring;
3918 q_vector->rx.count++;
3922 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3923 * @vsi: the VSI being configured
3925 * This function maps descriptor rings to the queue-specific vectors
3926 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3927 * one vector per queue pair, but on a constrained vector budget, we
3928 * group the queue pairs as "efficiently" as possible.
3930 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3932 int qp_remaining = vsi->num_queue_pairs;
3933 int q_vectors = vsi->num_q_vectors;
3938 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3939 * group them so there are multiple queues per vector.
3940 * It is also important to go through all the vectors available to be
3941 * sure that if we don't use all the vectors, that the remaining vectors
3942 * are cleared. This is especially important when decreasing the
3943 * number of queues in use.
3945 for (; v_start < q_vectors; v_start++) {
3946 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3948 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3950 q_vector->num_ringpairs = num_ringpairs;
3952 q_vector->rx.count = 0;
3953 q_vector->tx.count = 0;
3954 q_vector->rx.ring = NULL;
3955 q_vector->tx.ring = NULL;
3957 while (num_ringpairs--) {
3958 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3966 * i40e_vsi_request_irq - Request IRQ from the OS
3967 * @vsi: the VSI being configured
3968 * @basename: name for the vector
3970 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3972 struct i40e_pf *pf = vsi->back;
3975 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3976 err = i40e_vsi_request_irq_msix(vsi, basename);
3977 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3978 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3981 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3985 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3990 #ifdef CONFIG_NET_POLL_CONTROLLER
3992 * i40e_netpoll - A Polling 'interrupt' handler
3993 * @netdev: network interface device structure
3995 * This is used by netconsole to send skbs without having to re-enable
3996 * interrupts. It's not called while the normal interrupt routine is executing.
3999 void i40e_netpoll(struct net_device *netdev)
4001 static void i40e_netpoll(struct net_device *netdev)
4004 struct i40e_netdev_priv *np = netdev_priv(netdev);
4005 struct i40e_vsi *vsi = np->vsi;
4006 struct i40e_pf *pf = vsi->back;
4009 /* if interface is down do nothing */
4010 if (test_bit(__I40E_DOWN, &vsi->state))
4013 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4014 for (i = 0; i < vsi->num_q_vectors; i++)
4015 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4017 i40e_intr(pf->pdev->irq, netdev);
4023 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4024 * @pf: the PF being configured
4025 * @pf_q: the PF queue
4026 * @enable: enable or disable state of the queue
4028 * This routine will wait for the given Tx queue of the PF to reach the
4029 * enabled or disabled state.
4030 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4031 * multiple retries; else will return 0 in case of success.
4033 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4038 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4039 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4040 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4043 usleep_range(10, 20);
4045 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4052 * i40e_vsi_control_tx - Start or stop a VSI's rings
4053 * @vsi: the VSI being configured
4054 * @enable: start or stop the rings
4056 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4058 struct i40e_pf *pf = vsi->back;
4059 struct i40e_hw *hw = &pf->hw;
4060 int i, j, pf_q, ret = 0;
4063 pf_q = vsi->base_queue;
4064 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4066 /* warn the TX unit of coming changes */
4067 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4069 usleep_range(10, 20);
4071 for (j = 0; j < 50; j++) {
4072 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4073 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4074 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4076 usleep_range(1000, 2000);
4078 /* Skip if the queue is already in the requested state */
4079 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4082 /* turn on/off the queue */
4084 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4085 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4087 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4090 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4091 /* No waiting for the Tx queue to disable */
4092 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4095 /* wait for the change to finish */
4096 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4098 dev_info(&pf->pdev->dev,
4099 "VSI seid %d Tx ring %d %sable timeout\n",
4100 vsi->seid, pf_q, (enable ? "en" : "dis"));
4105 if (hw->revision_id == 0)
4111 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4112 * @pf: the PF being configured
4113 * @pf_q: the PF queue
4114 * @enable: enable or disable state of the queue
4116 * This routine will wait for the given Rx queue of the PF to reach the
4117 * enabled or disabled state.
4118 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4119 * multiple retries; else will return 0 in case of success.
4121 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4126 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4127 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4128 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4131 usleep_range(10, 20);
4133 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4140 * i40e_vsi_control_rx - Start or stop a VSI's rings
4141 * @vsi: the VSI being configured
4142 * @enable: start or stop the rings
4144 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4146 struct i40e_pf *pf = vsi->back;
4147 struct i40e_hw *hw = &pf->hw;
4148 int i, j, pf_q, ret = 0;
4151 pf_q = vsi->base_queue;
4152 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4153 for (j = 0; j < 50; j++) {
4154 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4155 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4156 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4158 usleep_range(1000, 2000);
4161 /* Skip if the queue is already in the requested state */
4162 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4165 /* turn on/off the queue */
4167 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4169 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4170 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4171 /* No waiting for the Tx queue to disable */
4172 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4175 /* wait for the change to finish */
4176 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4178 dev_info(&pf->pdev->dev,
4179 "VSI seid %d Rx ring %d %sable timeout\n",
4180 vsi->seid, pf_q, (enable ? "en" : "dis"));
4189 * i40e_vsi_start_rings - Start a VSI's rings
4190 * @vsi: the VSI being configured
4192 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4196 /* do rx first for enable and last for disable */
4197 ret = i40e_vsi_control_rx(vsi, true);
4200 ret = i40e_vsi_control_tx(vsi, true);
4206 * i40e_vsi_stop_rings - Stop a VSI's rings
4207 * @vsi: the VSI being configured
4209 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4211 /* do rx first for enable and last for disable
4212 * Ignore return value, we need to shutdown whatever we can
4214 i40e_vsi_control_tx(vsi, false);
4215 i40e_vsi_control_rx(vsi, false);
4219 * i40e_vsi_free_irq - Free the irq association with the OS
4220 * @vsi: the VSI being configured
4222 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4224 struct i40e_pf *pf = vsi->back;
4225 struct i40e_hw *hw = &pf->hw;
4226 int base = vsi->base_vector;
4230 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4231 if (!vsi->q_vectors)
4234 if (!vsi->irqs_ready)
4237 vsi->irqs_ready = false;
4238 for (i = 0; i < vsi->num_q_vectors; i++) {
4243 irq_num = pf->msix_entries[vector].vector;
4245 /* free only the irqs that were actually requested */
4246 if (!vsi->q_vectors[i] ||
4247 !vsi->q_vectors[i]->num_ringpairs)
4250 /* clear the affinity notifier in the IRQ descriptor */
4251 irq_set_affinity_notifier(irq_num, NULL);
4252 /* clear the affinity_mask in the IRQ descriptor */
4253 irq_set_affinity_hint(irq_num, NULL);
4254 synchronize_irq(irq_num);
4255 free_irq(irq_num, vsi->q_vectors[i]);
4257 /* Tear down the interrupt queue link list
4259 * We know that they come in pairs and always
4260 * the Rx first, then the Tx. To clear the
4261 * link list, stick the EOL value into the
4262 * next_q field of the registers.
4264 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4265 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4266 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4267 val |= I40E_QUEUE_END_OF_LIST
4268 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4269 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4271 while (qp != I40E_QUEUE_END_OF_LIST) {
4274 val = rd32(hw, I40E_QINT_RQCTL(qp));
4276 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4277 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4278 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4279 I40E_QINT_RQCTL_INTEVENT_MASK);
4281 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4282 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4284 wr32(hw, I40E_QINT_RQCTL(qp), val);
4286 val = rd32(hw, I40E_QINT_TQCTL(qp));
4288 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4289 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4291 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4292 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4293 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4294 I40E_QINT_TQCTL_INTEVENT_MASK);
4296 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4297 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4299 wr32(hw, I40E_QINT_TQCTL(qp), val);
4304 free_irq(pf->pdev->irq, pf);
4306 val = rd32(hw, I40E_PFINT_LNKLST0);
4307 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4308 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4309 val |= I40E_QUEUE_END_OF_LIST
4310 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4311 wr32(hw, I40E_PFINT_LNKLST0, val);
4313 val = rd32(hw, I40E_QINT_RQCTL(qp));
4314 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4315 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4316 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4317 I40E_QINT_RQCTL_INTEVENT_MASK);
4319 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4320 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4322 wr32(hw, I40E_QINT_RQCTL(qp), val);
4324 val = rd32(hw, I40E_QINT_TQCTL(qp));
4326 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4327 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4328 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4329 I40E_QINT_TQCTL_INTEVENT_MASK);
4331 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4332 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4334 wr32(hw, I40E_QINT_TQCTL(qp), val);
4339 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4340 * @vsi: the VSI being configured
4341 * @v_idx: Index of vector to be freed
4343 * This function frees the memory allocated to the q_vector. In addition if
4344 * NAPI is enabled it will delete any references to the NAPI struct prior
4345 * to freeing the q_vector.
4347 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4349 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4350 struct i40e_ring *ring;
4355 /* disassociate q_vector from rings */
4356 i40e_for_each_ring(ring, q_vector->tx)
4357 ring->q_vector = NULL;
4359 i40e_for_each_ring(ring, q_vector->rx)
4360 ring->q_vector = NULL;
4362 /* only VSI w/ an associated netdev is set up w/ NAPI */
4364 netif_napi_del(&q_vector->napi);
4366 vsi->q_vectors[v_idx] = NULL;
4368 kfree_rcu(q_vector, rcu);
4372 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4373 * @vsi: the VSI being un-configured
4375 * This frees the memory allocated to the q_vectors and
4376 * deletes references to the NAPI struct.
4378 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4382 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4383 i40e_free_q_vector(vsi, v_idx);
4387 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4388 * @pf: board private structure
4390 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4392 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4393 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4394 pci_disable_msix(pf->pdev);
4395 kfree(pf->msix_entries);
4396 pf->msix_entries = NULL;
4397 kfree(pf->irq_pile);
4398 pf->irq_pile = NULL;
4399 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4400 pci_disable_msi(pf->pdev);
4402 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4406 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4407 * @pf: board private structure
4409 * We go through and clear interrupt specific resources and reset the structure
4410 * to pre-load conditions
4412 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4416 i40e_stop_misc_vector(pf);
4417 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4418 synchronize_irq(pf->msix_entries[0].vector);
4419 free_irq(pf->msix_entries[0].vector, pf);
4422 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4423 I40E_IWARP_IRQ_PILE_ID);
4425 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4426 for (i = 0; i < pf->num_alloc_vsi; i++)
4428 i40e_vsi_free_q_vectors(pf->vsi[i]);
4429 i40e_reset_interrupt_capability(pf);
4433 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4434 * @vsi: the VSI being configured
4436 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4443 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4444 napi_enable(&vsi->q_vectors[q_idx]->napi);
4448 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4449 * @vsi: the VSI being configured
4451 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4458 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4459 napi_disable(&vsi->q_vectors[q_idx]->napi);
4463 * i40e_vsi_close - Shut down a VSI
4464 * @vsi: the vsi to be quelled
4466 static void i40e_vsi_close(struct i40e_vsi *vsi)
4468 struct i40e_pf *pf = vsi->back;
4469 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4471 i40e_vsi_free_irq(vsi);
4472 i40e_vsi_free_tx_resources(vsi);
4473 i40e_vsi_free_rx_resources(vsi);
4474 vsi->current_netdev_flags = 0;
4475 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
4476 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
4477 pf->flags |= I40E_FLAG_CLIENT_RESET;
4481 * i40e_quiesce_vsi - Pause a given VSI
4482 * @vsi: the VSI being paused
4484 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4486 if (test_bit(__I40E_DOWN, &vsi->state))
4489 /* No need to disable FCoE VSI when Tx suspended */
4490 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4491 vsi->type == I40E_VSI_FCOE) {
4492 dev_dbg(&vsi->back->pdev->dev,
4493 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4497 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4498 if (vsi->netdev && netif_running(vsi->netdev))
4499 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4501 i40e_vsi_close(vsi);
4505 * i40e_unquiesce_vsi - Resume a given VSI
4506 * @vsi: the VSI being resumed
4508 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4510 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4513 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4514 if (vsi->netdev && netif_running(vsi->netdev))
4515 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4517 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4521 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4524 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4528 for (v = 0; v < pf->num_alloc_vsi; v++) {
4530 i40e_quiesce_vsi(pf->vsi[v]);
4535 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4538 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4542 for (v = 0; v < pf->num_alloc_vsi; v++) {
4544 i40e_unquiesce_vsi(pf->vsi[v]);
4548 #ifdef CONFIG_I40E_DCB
4550 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4551 * @vsi: the VSI being configured
4553 * This function waits for the given VSI's queues to be disabled.
4555 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4557 struct i40e_pf *pf = vsi->back;
4560 pf_q = vsi->base_queue;
4561 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4562 /* Check and wait for the disable status of the queue */
4563 ret = i40e_pf_txq_wait(pf, pf_q, false);
4565 dev_info(&pf->pdev->dev,
4566 "VSI seid %d Tx ring %d disable timeout\n",
4572 pf_q = vsi->base_queue;
4573 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4574 /* Check and wait for the disable status of the queue */
4575 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4577 dev_info(&pf->pdev->dev,
4578 "VSI seid %d Rx ring %d disable timeout\n",
4588 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4591 * This function waits for the queues to be in disabled state for all the
4592 * VSIs that are managed by this PF.
4594 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4598 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4599 /* No need to wait for FCoE VSI queues */
4600 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4601 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4613 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4614 * @q_idx: TX queue number
4615 * @vsi: Pointer to VSI struct
4617 * This function checks specified queue for given VSI. Detects hung condition.
4618 * Sets hung bit since it is two step process. Before next run of service task
4619 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4620 * hung condition remain unchanged and during subsequent run, this function
4621 * issues SW interrupt to recover from hung condition.
4623 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4625 struct i40e_ring *tx_ring = NULL;
4627 u32 head, val, tx_pending_hw;
4632 /* now that we have an index, find the tx_ring struct */
4633 for (i = 0; i < vsi->num_queue_pairs; i++) {
4634 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4635 if (q_idx == vsi->tx_rings[i]->queue_index) {
4636 tx_ring = vsi->tx_rings[i];
4645 /* Read interrupt register */
4646 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4648 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4649 tx_ring->vsi->base_vector - 1));
4651 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4653 head = i40e_get_head(tx_ring);
4655 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4657 /* HW is done executing descriptors, updated HEAD write back,
4658 * but SW hasn't processed those descriptors. If interrupt is
4659 * not generated from this point ON, it could result into
4660 * dev_watchdog detecting timeout on those netdev_queue,
4661 * hence proactively trigger SW interrupt.
4663 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4664 /* NAPI Poll didn't run and clear since it was set */
4665 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4666 &tx_ring->q_vector->hung_detected)) {
4667 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4668 vsi->seid, q_idx, tx_pending_hw,
4669 tx_ring->next_to_clean, head,
4670 tx_ring->next_to_use,
4671 readl(tx_ring->tail));
4672 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4673 vsi->seid, q_idx, val);
4674 i40e_force_wb(vsi, tx_ring->q_vector);
4676 /* First Chance - detected possible hung */
4677 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4678 &tx_ring->q_vector->hung_detected);
4682 /* This is the case where we have interrupts missing,
4683 * so the tx_pending in HW will most likely be 0, but we
4684 * will have tx_pending in SW since the WB happened but the
4685 * interrupt got lost.
4687 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4688 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4690 if (napi_reschedule(&tx_ring->q_vector->napi))
4691 tx_ring->tx_stats.tx_lost_interrupt++;
4697 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4698 * @pf: pointer to PF struct
4700 * LAN VSI has netdev and netdev has TX queues. This function is to check
4701 * each of those TX queues if they are hung, trigger recovery by issuing
4704 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4706 struct net_device *netdev;
4707 struct i40e_vsi *vsi;
4710 /* Only for LAN VSI */
4711 vsi = pf->vsi[pf->lan_vsi];
4716 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4717 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4718 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4721 /* Make sure type is MAIN VSI */
4722 if (vsi->type != I40E_VSI_MAIN)
4725 netdev = vsi->netdev;
4729 /* Bail out if netif_carrier is not OK */
4730 if (!netif_carrier_ok(netdev))
4733 /* Go thru' TX queues for netdev */
4734 for (i = 0; i < netdev->num_tx_queues; i++) {
4735 struct netdev_queue *q;
4737 q = netdev_get_tx_queue(netdev, i);
4739 i40e_detect_recover_hung_queue(i, vsi);
4744 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4745 * @pf: pointer to PF
4747 * Get TC map for ISCSI PF type that will include iSCSI TC
4750 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4752 struct i40e_dcb_app_priority_table app;
4753 struct i40e_hw *hw = &pf->hw;
4754 u8 enabled_tc = 1; /* TC0 is always enabled */
4756 /* Get the iSCSI APP TLV */
4757 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4759 for (i = 0; i < dcbcfg->numapps; i++) {
4760 app = dcbcfg->app[i];
4761 if (app.selector == I40E_APP_SEL_TCPIP &&
4762 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4763 tc = dcbcfg->etscfg.prioritytable[app.priority];
4764 enabled_tc |= BIT(tc);
4773 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4774 * @dcbcfg: the corresponding DCBx configuration structure
4776 * Return the number of TCs from given DCBx configuration
4778 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4780 int i, tc_unused = 0;
4784 /* Scan the ETS Config Priority Table to find
4785 * traffic class enabled for a given priority
4786 * and create a bitmask of enabled TCs
4788 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4789 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4791 /* Now scan the bitmask to check for
4792 * contiguous TCs starting with TC0
4794 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4795 if (num_tc & BIT(i)) {
4799 pr_err("Non-contiguous TC - Disabling DCB\n");
4807 /* There is always at least TC0 */
4815 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4816 * @dcbcfg: the corresponding DCBx configuration structure
4818 * Query the current DCB configuration and return the number of
4819 * traffic classes enabled from the given DCBX config
4821 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4823 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4827 for (i = 0; i < num_tc; i++)
4828 enabled_tc |= BIT(i);
4834 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4835 * @pf: PF being queried
4837 * Return number of traffic classes enabled for the given PF
4839 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4841 struct i40e_hw *hw = &pf->hw;
4842 u8 i, enabled_tc = 1;
4844 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4846 /* If DCB is not enabled then always in single TC */
4847 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4850 /* SFP mode will be enabled for all TCs on port */
4851 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4852 return i40e_dcb_get_num_tc(dcbcfg);
4854 /* MFP mode return count of enabled TCs for this PF */
4855 if (pf->hw.func_caps.iscsi)
4856 enabled_tc = i40e_get_iscsi_tc_map(pf);
4858 return 1; /* Only TC0 */
4860 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4861 if (enabled_tc & BIT(i))
4868 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4869 * @pf: PF being queried
4871 * Return a bitmap for enabled traffic classes for this PF.
4873 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4875 /* If DCB is not enabled for this PF then just return default TC */
4876 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4877 return I40E_DEFAULT_TRAFFIC_CLASS;
4879 /* SFP mode we want PF to be enabled for all TCs */
4880 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4881 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4883 /* MFP enabled and iSCSI PF type */
4884 if (pf->hw.func_caps.iscsi)
4885 return i40e_get_iscsi_tc_map(pf);
4887 return I40E_DEFAULT_TRAFFIC_CLASS;
4891 * i40e_vsi_get_bw_info - Query VSI BW Information
4892 * @vsi: the VSI being queried
4894 * Returns 0 on success, negative value on failure
4896 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4898 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4899 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4900 struct i40e_pf *pf = vsi->back;
4901 struct i40e_hw *hw = &pf->hw;
4906 /* Get the VSI level BW configuration */
4907 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4909 dev_info(&pf->pdev->dev,
4910 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4911 i40e_stat_str(&pf->hw, ret),
4912 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4916 /* Get the VSI level BW configuration per TC */
4917 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4920 dev_info(&pf->pdev->dev,
4921 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4922 i40e_stat_str(&pf->hw, ret),
4923 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4927 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4928 dev_info(&pf->pdev->dev,
4929 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4930 bw_config.tc_valid_bits,
4931 bw_ets_config.tc_valid_bits);
4932 /* Still continuing */
4935 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4936 vsi->bw_max_quanta = bw_config.max_bw;
4937 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4938 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4939 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4940 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4941 vsi->bw_ets_limit_credits[i] =
4942 le16_to_cpu(bw_ets_config.credits[i]);
4943 /* 3 bits out of 4 for each TC */
4944 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4951 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4952 * @vsi: the VSI being configured
4953 * @enabled_tc: TC bitmap
4954 * @bw_credits: BW shared credits per TC
4956 * Returns 0 on success, negative value on failure
4958 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4961 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4965 bw_data.tc_valid_bits = enabled_tc;
4966 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4967 bw_data.tc_bw_credits[i] = bw_share[i];
4969 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4972 dev_info(&vsi->back->pdev->dev,
4973 "AQ command Config VSI BW allocation per TC failed = %d\n",
4974 vsi->back->hw.aq.asq_last_status);
4978 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4979 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4985 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4986 * @vsi: the VSI being configured
4987 * @enabled_tc: TC map to be enabled
4990 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4992 struct net_device *netdev = vsi->netdev;
4993 struct i40e_pf *pf = vsi->back;
4994 struct i40e_hw *hw = &pf->hw;
4997 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5003 netdev_reset_tc(netdev);
5007 /* Set up actual enabled TCs on the VSI */
5008 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5011 /* set per TC queues for the VSI */
5012 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5013 /* Only set TC queues for enabled tcs
5015 * e.g. For a VSI that has TC0 and TC3 enabled the
5016 * enabled_tc bitmap would be 0x00001001; the driver
5017 * will set the numtc for netdev as 2 that will be
5018 * referenced by the netdev layer as TC 0 and 1.
5020 if (vsi->tc_config.enabled_tc & BIT(i))
5021 netdev_set_tc_queue(netdev,
5022 vsi->tc_config.tc_info[i].netdev_tc,
5023 vsi->tc_config.tc_info[i].qcount,
5024 vsi->tc_config.tc_info[i].qoffset);
5027 /* Assign UP2TC map for the VSI */
5028 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5029 /* Get the actual TC# for the UP */
5030 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5031 /* Get the mapped netdev TC# for the UP */
5032 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5033 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5038 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5039 * @vsi: the VSI being configured
5040 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5042 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5043 struct i40e_vsi_context *ctxt)
5045 /* copy just the sections touched not the entire info
5046 * since not all sections are valid as returned by
5049 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5050 memcpy(&vsi->info.queue_mapping,
5051 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5052 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5053 sizeof(vsi->info.tc_mapping));
5057 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5058 * @vsi: VSI to be configured
5059 * @enabled_tc: TC bitmap
5061 * This configures a particular VSI for TCs that are mapped to the
5062 * given TC bitmap. It uses default bandwidth share for TCs across
5063 * VSIs to configure TC for a particular VSI.
5066 * It is expected that the VSI queues have been quisced before calling
5069 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5071 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5072 struct i40e_vsi_context ctxt;
5076 /* Check if enabled_tc is same as existing or new TCs */
5077 if (vsi->tc_config.enabled_tc == enabled_tc)
5080 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5081 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5082 if (enabled_tc & BIT(i))
5086 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5088 dev_info(&vsi->back->pdev->dev,
5089 "Failed configuring TC map %d for VSI %d\n",
5090 enabled_tc, vsi->seid);
5094 /* Update Queue Pairs Mapping for currently enabled UPs */
5095 ctxt.seid = vsi->seid;
5096 ctxt.pf_num = vsi->back->hw.pf_id;
5098 ctxt.uplink_seid = vsi->uplink_seid;
5099 ctxt.info = vsi->info;
5100 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5102 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5103 ctxt.info.valid_sections |=
5104 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5105 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5108 /* Update the VSI after updating the VSI queue-mapping information */
5109 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
5111 dev_info(&vsi->back->pdev->dev,
5112 "Update vsi tc config failed, err %s aq_err %s\n",
5113 i40e_stat_str(&vsi->back->hw, ret),
5114 i40e_aq_str(&vsi->back->hw,
5115 vsi->back->hw.aq.asq_last_status));
5118 /* update the local VSI info with updated queue map */
5119 i40e_vsi_update_queue_map(vsi, &ctxt);
5120 vsi->info.valid_sections = 0;
5122 /* Update current VSI BW information */
5123 ret = i40e_vsi_get_bw_info(vsi);
5125 dev_info(&vsi->back->pdev->dev,
5126 "Failed updating vsi bw info, err %s aq_err %s\n",
5127 i40e_stat_str(&vsi->back->hw, ret),
5128 i40e_aq_str(&vsi->back->hw,
5129 vsi->back->hw.aq.asq_last_status));
5133 /* Update the netdev TC setup */
5134 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5140 * i40e_veb_config_tc - Configure TCs for given VEB
5142 * @enabled_tc: TC bitmap
5144 * Configures given TC bitmap for VEB (switching) element
5146 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
5148 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
5149 struct i40e_pf *pf = veb->pf;
5153 /* No TCs or already enabled TCs just return */
5154 if (!enabled_tc || veb->enabled_tc == enabled_tc)
5157 bw_data.tc_valid_bits = enabled_tc;
5158 /* bw_data.absolute_credits is not set (relative) */
5160 /* Enable ETS TCs with equal BW Share for now */
5161 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5162 if (enabled_tc & BIT(i))
5163 bw_data.tc_bw_share_credits[i] = 1;
5166 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
5169 dev_info(&pf->pdev->dev,
5170 "VEB bw config failed, err %s aq_err %s\n",
5171 i40e_stat_str(&pf->hw, ret),
5172 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5176 /* Update the BW information */
5177 ret = i40e_veb_get_bw_info(veb);
5179 dev_info(&pf->pdev->dev,
5180 "Failed getting veb bw config, err %s aq_err %s\n",
5181 i40e_stat_str(&pf->hw, ret),
5182 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5189 #ifdef CONFIG_I40E_DCB
5191 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
5194 * Reconfigure VEB/VSIs on a given PF; it is assumed that
5195 * the caller would've quiesce all the VSIs before calling
5198 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5204 /* Enable the TCs available on PF to all VEBs */
5205 tc_map = i40e_pf_get_tc_map(pf);
5206 for (v = 0; v < I40E_MAX_VEB; v++) {
5209 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5211 dev_info(&pf->pdev->dev,
5212 "Failed configuring TC for VEB seid=%d\n",
5214 /* Will try to configure as many components */
5218 /* Update each VSI */
5219 for (v = 0; v < pf->num_alloc_vsi; v++) {
5223 /* - Enable all TCs for the LAN VSI
5225 * - For FCoE VSI only enable the TC configured
5226 * as per the APP TLV
5228 * - For all others keep them at TC0 for now
5230 if (v == pf->lan_vsi)
5231 tc_map = i40e_pf_get_tc_map(pf);
5233 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5235 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5236 tc_map = i40e_get_fcoe_tc_map(pf);
5237 #endif /* #ifdef I40E_FCOE */
5239 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5241 dev_info(&pf->pdev->dev,
5242 "Failed configuring TC for VSI seid=%d\n",
5244 /* Will try to configure as many components */
5246 /* Re-configure VSI vectors based on updated TC map */
5247 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5248 if (pf->vsi[v]->netdev)
5249 i40e_dcbnl_set_all(pf->vsi[v]);
5255 * i40e_resume_port_tx - Resume port Tx
5258 * Resume a port's Tx and issue a PF reset in case of failure to
5261 static int i40e_resume_port_tx(struct i40e_pf *pf)
5263 struct i40e_hw *hw = &pf->hw;
5266 ret = i40e_aq_resume_port_tx(hw, NULL);
5268 dev_info(&pf->pdev->dev,
5269 "Resume Port Tx failed, err %s aq_err %s\n",
5270 i40e_stat_str(&pf->hw, ret),
5271 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5272 /* Schedule PF reset to recover */
5273 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5274 i40e_service_event_schedule(pf);
5281 * i40e_init_pf_dcb - Initialize DCB configuration
5282 * @pf: PF being configured
5284 * Query the current DCB configuration and cache it
5285 * in the hardware structure
5287 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5289 struct i40e_hw *hw = &pf->hw;
5292 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5293 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5296 /* Get the initial DCB configuration */
5297 err = i40e_init_dcb(hw);
5299 /* Device/Function is not DCBX capable */
5300 if ((!hw->func_caps.dcb) ||
5301 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5302 dev_info(&pf->pdev->dev,
5303 "DCBX offload is not supported or is disabled for this PF.\n");
5305 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5309 /* When status is not DISABLED then DCBX in FW */
5310 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5311 DCB_CAP_DCBX_VER_IEEE;
5313 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5314 /* Enable DCB tagging only when more than one TC
5315 * or explicitly disable if only one TC
5317 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5318 pf->flags |= I40E_FLAG_DCB_ENABLED;
5320 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5321 dev_dbg(&pf->pdev->dev,
5322 "DCBX offload is supported for this PF.\n");
5325 dev_info(&pf->pdev->dev,
5326 "Query for DCB configuration failed, err %s aq_err %s\n",
5327 i40e_stat_str(&pf->hw, err),
5328 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5334 #endif /* CONFIG_I40E_DCB */
5335 #define SPEED_SIZE 14
5338 * i40e_print_link_message - print link up or down
5339 * @vsi: the VSI for which link needs a message
5341 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5343 enum i40e_aq_link_speed new_speed;
5344 char *speed = "Unknown";
5345 char *fc = "Unknown";
5349 new_speed = vsi->back->hw.phy.link_info.link_speed;
5351 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
5353 vsi->current_isup = isup;
5354 vsi->current_speed = new_speed;
5356 netdev_info(vsi->netdev, "NIC Link is Down\n");
5360 /* Warn user if link speed on NPAR enabled partition is not at
5363 if (vsi->back->hw.func_caps.npar_enable &&
5364 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5365 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5366 netdev_warn(vsi->netdev,
5367 "The partition detected link speed that is less than 10Gbps\n");
5369 switch (vsi->back->hw.phy.link_info.link_speed) {
5370 case I40E_LINK_SPEED_40GB:
5373 case I40E_LINK_SPEED_20GB:
5376 case I40E_LINK_SPEED_25GB:
5379 case I40E_LINK_SPEED_10GB:
5382 case I40E_LINK_SPEED_1GB:
5385 case I40E_LINK_SPEED_100MB:
5392 switch (vsi->back->hw.fc.current_mode) {
5396 case I40E_FC_TX_PAUSE:
5399 case I40E_FC_RX_PAUSE:
5407 if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
5408 fec = ", FEC: None";
5409 an = ", Autoneg: False";
5411 if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
5412 an = ", Autoneg: True";
5414 if (vsi->back->hw.phy.link_info.fec_info &
5415 I40E_AQ_CONFIG_FEC_KR_ENA)
5416 fec = ", FEC: CL74 FC-FEC/BASE-R";
5417 else if (vsi->back->hw.phy.link_info.fec_info &
5418 I40E_AQ_CONFIG_FEC_RS_ENA)
5419 fec = ", FEC: CL108 RS-FEC";
5422 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n",
5423 speed, fec, an, fc);
5427 * i40e_up_complete - Finish the last steps of bringing up a connection
5428 * @vsi: the VSI being configured
5430 static int i40e_up_complete(struct i40e_vsi *vsi)
5432 struct i40e_pf *pf = vsi->back;
5435 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5436 i40e_vsi_configure_msix(vsi);
5438 i40e_configure_msi_and_legacy(vsi);
5441 err = i40e_vsi_start_rings(vsi);
5445 clear_bit(__I40E_DOWN, &vsi->state);
5446 i40e_napi_enable_all(vsi);
5447 i40e_vsi_enable_irq(vsi);
5449 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5451 i40e_print_link_message(vsi, true);
5452 netif_tx_start_all_queues(vsi->netdev);
5453 netif_carrier_on(vsi->netdev);
5454 } else if (vsi->netdev) {
5455 i40e_print_link_message(vsi, false);
5456 /* need to check for qualified module here*/
5457 if ((pf->hw.phy.link_info.link_info &
5458 I40E_AQ_MEDIA_AVAILABLE) &&
5459 (!(pf->hw.phy.link_info.an_info &
5460 I40E_AQ_QUALIFIED_MODULE)))
5461 netdev_err(vsi->netdev,
5462 "the driver failed to link because an unqualified module was detected.");
5465 /* replay FDIR SB filters */
5466 if (vsi->type == I40E_VSI_FDIR) {
5467 /* reset fd counters */
5468 pf->fd_add_err = pf->fd_atr_cnt = 0;
5469 i40e_fdir_filter_restore(vsi);
5472 /* On the next run of the service_task, notify any clients of the new
5475 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5476 i40e_service_event_schedule(pf);
5482 * i40e_vsi_reinit_locked - Reset the VSI
5483 * @vsi: the VSI being configured
5485 * Rebuild the ring structs after some configuration
5486 * has changed, e.g. MTU size.
5488 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5490 struct i40e_pf *pf = vsi->back;
5492 WARN_ON(in_interrupt());
5493 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5494 usleep_range(1000, 2000);
5498 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5502 * i40e_up - Bring the connection back up after being down
5503 * @vsi: the VSI being configured
5505 int i40e_up(struct i40e_vsi *vsi)
5509 err = i40e_vsi_configure(vsi);
5511 err = i40e_up_complete(vsi);
5517 * i40e_down - Shutdown the connection processing
5518 * @vsi: the VSI being stopped
5520 void i40e_down(struct i40e_vsi *vsi)
5524 /* It is assumed that the caller of this function
5525 * sets the vsi->state __I40E_DOWN bit.
5528 netif_carrier_off(vsi->netdev);
5529 netif_tx_disable(vsi->netdev);
5531 i40e_vsi_disable_irq(vsi);
5532 i40e_vsi_stop_rings(vsi);
5533 i40e_napi_disable_all(vsi);
5535 for (i = 0; i < vsi->num_queue_pairs; i++) {
5536 i40e_clean_tx_ring(vsi->tx_rings[i]);
5537 i40e_clean_rx_ring(vsi->rx_rings[i]);
5543 * i40e_setup_tc - configure multiple traffic classes
5544 * @netdev: net device to configure
5545 * @tc: number of traffic classes to enable
5547 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5549 struct i40e_netdev_priv *np = netdev_priv(netdev);
5550 struct i40e_vsi *vsi = np->vsi;
5551 struct i40e_pf *pf = vsi->back;
5556 /* Check if DCB enabled to continue */
5557 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5558 netdev_info(netdev, "DCB is not enabled for adapter\n");
5562 /* Check if MFP enabled */
5563 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5564 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5568 /* Check whether tc count is within enabled limit */
5569 if (tc > i40e_pf_get_num_tc(pf)) {
5570 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5574 /* Generate TC map for number of tc requested */
5575 for (i = 0; i < tc; i++)
5576 enabled_tc |= BIT(i);
5578 /* Requesting same TC configuration as already enabled */
5579 if (enabled_tc == vsi->tc_config.enabled_tc)
5582 /* Quiesce VSI queues */
5583 i40e_quiesce_vsi(vsi);
5585 /* Configure VSI for enabled TCs */
5586 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5588 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5594 i40e_unquiesce_vsi(vsi);
5601 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5602 struct tc_to_netdev *tc)
5604 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5605 struct tc_to_netdev *tc)
5608 if (tc->type != TC_SETUP_MQPRIO)
5611 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
5613 return i40e_setup_tc(netdev, tc->mqprio->num_tc);
5617 * i40e_open - Called when a network interface is made active
5618 * @netdev: network interface device structure
5620 * The open entry point is called when a network interface is made
5621 * active by the system (IFF_UP). At this point all resources needed
5622 * for transmit and receive operations are allocated, the interrupt
5623 * handler is registered with the OS, the netdev watchdog subtask is
5624 * enabled, and the stack is notified that the interface is ready.
5626 * Returns 0 on success, negative value on failure
5628 int i40e_open(struct net_device *netdev)
5630 struct i40e_netdev_priv *np = netdev_priv(netdev);
5631 struct i40e_vsi *vsi = np->vsi;
5632 struct i40e_pf *pf = vsi->back;
5635 /* disallow open during test or if eeprom is broken */
5636 if (test_bit(__I40E_TESTING, &pf->state) ||
5637 test_bit(__I40E_BAD_EEPROM, &pf->state))
5640 netif_carrier_off(netdev);
5642 err = i40e_vsi_open(vsi);
5646 /* configure global TSO hardware offload settings */
5647 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5648 TCP_FLAG_FIN) >> 16);
5649 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5651 TCP_FLAG_CWR) >> 16);
5652 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5654 udp_tunnel_get_rx_info(netdev);
5661 * @vsi: the VSI to open
5663 * Finish initialization of the VSI.
5665 * Returns 0 on success, negative value on failure
5667 int i40e_vsi_open(struct i40e_vsi *vsi)
5669 struct i40e_pf *pf = vsi->back;
5670 char int_name[I40E_INT_NAME_STR_LEN];
5673 /* allocate descriptors */
5674 err = i40e_vsi_setup_tx_resources(vsi);
5677 err = i40e_vsi_setup_rx_resources(vsi);
5681 err = i40e_vsi_configure(vsi);
5686 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5687 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5688 err = i40e_vsi_request_irq(vsi, int_name);
5692 /* Notify the stack of the actual queue counts. */
5693 err = netif_set_real_num_tx_queues(vsi->netdev,
5694 vsi->num_queue_pairs);
5696 goto err_set_queues;
5698 err = netif_set_real_num_rx_queues(vsi->netdev,
5699 vsi->num_queue_pairs);
5701 goto err_set_queues;
5703 } else if (vsi->type == I40E_VSI_FDIR) {
5704 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5705 dev_driver_string(&pf->pdev->dev),
5706 dev_name(&pf->pdev->dev));
5707 err = i40e_vsi_request_irq(vsi, int_name);
5714 err = i40e_up_complete(vsi);
5716 goto err_up_complete;
5723 i40e_vsi_free_irq(vsi);
5725 i40e_vsi_free_rx_resources(vsi);
5727 i40e_vsi_free_tx_resources(vsi);
5728 if (vsi == pf->vsi[pf->lan_vsi])
5729 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5735 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5736 * @pf: Pointer to PF
5738 * This function destroys the hlist where all the Flow Director
5739 * filters were saved.
5741 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5743 struct i40e_fdir_filter *filter;
5744 struct hlist_node *node2;
5746 hlist_for_each_entry_safe(filter, node2,
5747 &pf->fdir_filter_list, fdir_node) {
5748 hlist_del(&filter->fdir_node);
5751 pf->fdir_pf_active_filters = 0;
5755 * i40e_close - Disables a network interface
5756 * @netdev: network interface device structure
5758 * The close entry point is called when an interface is de-activated
5759 * by the OS. The hardware is still under the driver's control, but
5760 * this netdev interface is disabled.
5762 * Returns 0, this is not allowed to fail
5764 int i40e_close(struct net_device *netdev)
5766 struct i40e_netdev_priv *np = netdev_priv(netdev);
5767 struct i40e_vsi *vsi = np->vsi;
5769 i40e_vsi_close(vsi);
5775 * i40e_do_reset - Start a PF or Core Reset sequence
5776 * @pf: board private structure
5777 * @reset_flags: which reset is requested
5779 * The essential difference in resets is that the PF Reset
5780 * doesn't clear the packet buffers, doesn't reset the PE
5781 * firmware, and doesn't bother the other PFs on the chip.
5783 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5787 WARN_ON(in_interrupt());
5790 /* do the biggest reset indicated */
5791 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5793 /* Request a Global Reset
5795 * This will start the chip's countdown to the actual full
5796 * chip reset event, and a warning interrupt to be sent
5797 * to all PFs, including the requestor. Our handler
5798 * for the warning interrupt will deal with the shutdown
5799 * and recovery of the switch setup.
5801 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5802 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5803 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5804 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5806 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5808 /* Request a Core Reset
5810 * Same as Global Reset, except does *not* include the MAC/PHY
5812 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5813 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5814 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5815 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5816 i40e_flush(&pf->hw);
5818 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5820 /* Request a PF Reset
5822 * Resets only the PF-specific registers
5824 * This goes directly to the tear-down and rebuild of
5825 * the switch, since we need to do all the recovery as
5826 * for the Core Reset.
5828 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5829 i40e_handle_reset_warning(pf);
5831 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5834 /* Find the VSI(s) that requested a re-init */
5835 dev_info(&pf->pdev->dev,
5836 "VSI reinit requested\n");
5837 for (v = 0; v < pf->num_alloc_vsi; v++) {
5838 struct i40e_vsi *vsi = pf->vsi[v];
5841 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5842 i40e_vsi_reinit_locked(pf->vsi[v]);
5843 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5846 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5849 /* Find the VSI(s) that needs to be brought down */
5850 dev_info(&pf->pdev->dev, "VSI down requested\n");
5851 for (v = 0; v < pf->num_alloc_vsi; v++) {
5852 struct i40e_vsi *vsi = pf->vsi[v];
5855 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5856 set_bit(__I40E_DOWN, &vsi->state);
5858 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5862 dev_info(&pf->pdev->dev,
5863 "bad reset request 0x%08x\n", reset_flags);
5867 #ifdef CONFIG_I40E_DCB
5869 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5870 * @pf: board private structure
5871 * @old_cfg: current DCB config
5872 * @new_cfg: new DCB config
5874 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5875 struct i40e_dcbx_config *old_cfg,
5876 struct i40e_dcbx_config *new_cfg)
5878 bool need_reconfig = false;
5880 /* Check if ETS configuration has changed */
5881 if (memcmp(&new_cfg->etscfg,
5883 sizeof(new_cfg->etscfg))) {
5884 /* If Priority Table has changed reconfig is needed */
5885 if (memcmp(&new_cfg->etscfg.prioritytable,
5886 &old_cfg->etscfg.prioritytable,
5887 sizeof(new_cfg->etscfg.prioritytable))) {
5888 need_reconfig = true;
5889 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5892 if (memcmp(&new_cfg->etscfg.tcbwtable,
5893 &old_cfg->etscfg.tcbwtable,
5894 sizeof(new_cfg->etscfg.tcbwtable)))
5895 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5897 if (memcmp(&new_cfg->etscfg.tsatable,
5898 &old_cfg->etscfg.tsatable,
5899 sizeof(new_cfg->etscfg.tsatable)))
5900 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5903 /* Check if PFC configuration has changed */
5904 if (memcmp(&new_cfg->pfc,
5906 sizeof(new_cfg->pfc))) {
5907 need_reconfig = true;
5908 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5911 /* Check if APP Table has changed */
5912 if (memcmp(&new_cfg->app,
5914 sizeof(new_cfg->app))) {
5915 need_reconfig = true;
5916 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5919 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5920 return need_reconfig;
5924 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5925 * @pf: board private structure
5926 * @e: event info posted on ARQ
5928 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5929 struct i40e_arq_event_info *e)
5931 struct i40e_aqc_lldp_get_mib *mib =
5932 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5933 struct i40e_hw *hw = &pf->hw;
5934 struct i40e_dcbx_config tmp_dcbx_cfg;
5935 bool need_reconfig = false;
5939 /* Not DCB capable or capability disabled */
5940 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5943 /* Ignore if event is not for Nearest Bridge */
5944 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5945 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5946 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5947 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5950 /* Check MIB Type and return if event for Remote MIB update */
5951 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5952 dev_dbg(&pf->pdev->dev,
5953 "LLDP event mib type %s\n", type ? "remote" : "local");
5954 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5955 /* Update the remote cached instance and return */
5956 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5957 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5958 &hw->remote_dcbx_config);
5962 /* Store the old configuration */
5963 tmp_dcbx_cfg = hw->local_dcbx_config;
5965 /* Reset the old DCBx configuration data */
5966 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5967 /* Get updated DCBX data from firmware */
5968 ret = i40e_get_dcb_config(&pf->hw);
5970 dev_info(&pf->pdev->dev,
5971 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5972 i40e_stat_str(&pf->hw, ret),
5973 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5977 /* No change detected in DCBX configs */
5978 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5979 sizeof(tmp_dcbx_cfg))) {
5980 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5984 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5985 &hw->local_dcbx_config);
5987 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5992 /* Enable DCB tagging only when more than one TC */
5993 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5994 pf->flags |= I40E_FLAG_DCB_ENABLED;
5996 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5998 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5999 /* Reconfiguration needed quiesce all VSIs */
6000 i40e_pf_quiesce_all_vsi(pf);
6002 /* Changes in configuration update VEB/VSI */
6003 i40e_dcb_reconfigure(pf);
6005 ret = i40e_resume_port_tx(pf);
6007 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
6008 /* In case of error no point in resuming VSIs */
6012 /* Wait for the PF's queues to be disabled */
6013 ret = i40e_pf_wait_queues_disabled(pf);
6015 /* Schedule PF reset to recover */
6016 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6017 i40e_service_event_schedule(pf);
6019 i40e_pf_unquiesce_all_vsi(pf);
6020 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
6021 I40E_FLAG_CLIENT_L2_CHANGE);
6027 #endif /* CONFIG_I40E_DCB */
6030 * i40e_do_reset_safe - Protected reset path for userland calls.
6031 * @pf: board private structure
6032 * @reset_flags: which reset is requested
6035 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
6038 i40e_do_reset(pf, reset_flags);
6043 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
6044 * @pf: board private structure
6045 * @e: event info posted on ARQ
6047 * Handler for LAN Queue Overflow Event generated by the firmware for PF
6050 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
6051 struct i40e_arq_event_info *e)
6053 struct i40e_aqc_lan_overflow *data =
6054 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
6055 u32 queue = le32_to_cpu(data->prtdcb_rupto);
6056 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
6057 struct i40e_hw *hw = &pf->hw;
6061 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
6064 /* Queue belongs to VF, find the VF and issue VF reset */
6065 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
6066 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
6067 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
6068 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
6069 vf_id -= hw->func_caps.vf_base_id;
6070 vf = &pf->vf[vf_id];
6071 i40e_vc_notify_vf_reset(vf);
6072 /* Allow VF to process pending reset notification */
6074 i40e_reset_vf(vf, false);
6079 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
6080 * @pf: board private structure
6082 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
6086 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6087 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
6092 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
6093 * @pf: board private structure
6095 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
6099 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6100 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
6101 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
6102 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
6107 * i40e_get_global_fd_count - Get total FD filters programmed on device
6108 * @pf: board private structure
6110 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
6114 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
6115 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
6116 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
6117 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
6122 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
6123 * @pf: board private structure
6125 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
6127 struct i40e_fdir_filter *filter;
6128 u32 fcnt_prog, fcnt_avail;
6129 struct hlist_node *node;
6131 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6134 /* Check if, FD SB or ATR was auto disabled and if there is enough room
6137 fcnt_prog = i40e_get_global_fd_count(pf);
6138 fcnt_avail = pf->fdir_pf_filter_count;
6139 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
6140 (pf->fd_add_err == 0) ||
6141 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
6142 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
6143 (pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED)) {
6144 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
6145 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6146 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
6150 /* Wait for some more space to be available to turn on ATR. We also
6151 * must check that no existing ntuple rules for TCP are in effect
6153 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
6154 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
6155 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED) &&
6156 (pf->fd_tcp_rule == 0)) {
6157 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6158 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6159 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
6163 /* if hw had a problem adding a filter, delete it */
6164 if (pf->fd_inv > 0) {
6165 hlist_for_each_entry_safe(filter, node,
6166 &pf->fdir_filter_list, fdir_node) {
6167 if (filter->fd_id == pf->fd_inv) {
6168 hlist_del(&filter->fdir_node);
6170 pf->fdir_pf_active_filters--;
6176 #define I40E_MIN_FD_FLUSH_INTERVAL 10
6177 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
6179 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
6180 * @pf: board private structure
6182 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
6184 unsigned long min_flush_time;
6185 int flush_wait_retry = 50;
6186 bool disable_atr = false;
6190 if (!time_after(jiffies, pf->fd_flush_timestamp +
6191 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
6194 /* If the flush is happening too quick and we have mostly SB rules we
6195 * should not re-enable ATR for some time.
6197 min_flush_time = pf->fd_flush_timestamp +
6198 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
6199 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
6201 if (!(time_after(jiffies, min_flush_time)) &&
6202 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
6203 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6204 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
6208 pf->fd_flush_timestamp = jiffies;
6209 pf->hw_disabled_flags |= I40E_FLAG_FD_ATR_ENABLED;
6210 /* flush all filters */
6211 wr32(&pf->hw, I40E_PFQF_CTL_1,
6212 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6213 i40e_flush(&pf->hw);
6217 /* Check FD flush status every 5-6msec */
6218 usleep_range(5000, 6000);
6219 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6220 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6222 } while (flush_wait_retry--);
6223 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6224 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6226 /* replay sideband filters */
6227 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6229 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6230 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6231 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6232 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6237 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6238 * @pf: board private structure
6240 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6242 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6245 /* We can see up to 256 filter programming desc in transit if the filters are
6246 * being applied really fast; before we see the first
6247 * filter miss error on Rx queue 0. Accumulating enough error messages before
6248 * reacting will make sure we don't cause flush too often.
6250 #define I40E_MAX_FD_PROGRAM_ERROR 256
6253 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6254 * @pf: board private structure
6256 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6259 /* if interface is down do nothing */
6260 if (test_bit(__I40E_DOWN, &pf->state))
6263 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6264 i40e_fdir_flush_and_replay(pf);
6266 i40e_fdir_check_and_reenable(pf);
6271 * i40e_vsi_link_event - notify VSI of a link event
6272 * @vsi: vsi to be notified
6273 * @link_up: link up or down
6275 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6277 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6280 switch (vsi->type) {
6285 if (!vsi->netdev || !vsi->netdev_registered)
6289 netif_carrier_on(vsi->netdev);
6290 netif_tx_wake_all_queues(vsi->netdev);
6292 netif_carrier_off(vsi->netdev);
6293 netif_tx_stop_all_queues(vsi->netdev);
6297 case I40E_VSI_SRIOV:
6298 case I40E_VSI_VMDQ2:
6300 case I40E_VSI_IWARP:
6301 case I40E_VSI_MIRROR:
6303 /* there is no notification for other VSIs */
6309 * i40e_veb_link_event - notify elements on the veb of a link event
6310 * @veb: veb to be notified
6311 * @link_up: link up or down
6313 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6318 if (!veb || !veb->pf)
6322 /* depth first... */
6323 for (i = 0; i < I40E_MAX_VEB; i++)
6324 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6325 i40e_veb_link_event(pf->veb[i], link_up);
6327 /* ... now the local VSIs */
6328 for (i = 0; i < pf->num_alloc_vsi; i++)
6329 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6330 i40e_vsi_link_event(pf->vsi[i], link_up);
6334 * i40e_link_event - Update netif_carrier status
6335 * @pf: board private structure
6337 static void i40e_link_event(struct i40e_pf *pf)
6339 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6340 u8 new_link_speed, old_link_speed;
6342 bool new_link, old_link;
6344 /* save off old link status information */
6345 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6347 /* set this to force the get_link_status call to refresh state */
6348 pf->hw.phy.get_link_info = true;
6350 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6352 status = i40e_get_link_status(&pf->hw, &new_link);
6354 /* On success, disable temp link polling */
6355 if (status == I40E_SUCCESS) {
6356 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)
6357 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING;
6359 /* Enable link polling temporarily until i40e_get_link_status
6360 * returns I40E_SUCCESS
6362 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING;
6363 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6368 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6369 new_link_speed = pf->hw.phy.link_info.link_speed;
6371 if (new_link == old_link &&
6372 new_link_speed == old_link_speed &&
6373 (test_bit(__I40E_DOWN, &vsi->state) ||
6374 new_link == netif_carrier_ok(vsi->netdev)))
6377 if (!test_bit(__I40E_DOWN, &vsi->state))
6378 i40e_print_link_message(vsi, new_link);
6380 /* Notify the base of the switch tree connected to
6381 * the link. Floating VEBs are not notified.
6383 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6384 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6386 i40e_vsi_link_event(vsi, new_link);
6389 i40e_vc_notify_link_state(pf);
6391 if (pf->flags & I40E_FLAG_PTP)
6392 i40e_ptp_set_increment(pf);
6396 * i40e_watchdog_subtask - periodic checks not using event driven response
6397 * @pf: board private structure
6399 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6403 /* if interface is down do nothing */
6404 if (test_bit(__I40E_DOWN, &pf->state) ||
6405 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6408 /* make sure we don't do these things too often */
6409 if (time_before(jiffies, (pf->service_timer_previous +
6410 pf->service_timer_period)))
6412 pf->service_timer_previous = jiffies;
6414 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
6415 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING))
6416 i40e_link_event(pf);
6418 /* Update the stats for active netdevs so the network stack
6419 * can look at updated numbers whenever it cares to
6421 for (i = 0; i < pf->num_alloc_vsi; i++)
6422 if (pf->vsi[i] && pf->vsi[i]->netdev)
6423 i40e_update_stats(pf->vsi[i]);
6425 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6426 /* Update the stats for the active switching components */
6427 for (i = 0; i < I40E_MAX_VEB; i++)
6429 i40e_update_veb_stats(pf->veb[i]);
6432 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6436 * i40e_reset_subtask - Set up for resetting the device and driver
6437 * @pf: board private structure
6439 static void i40e_reset_subtask(struct i40e_pf *pf)
6441 u32 reset_flags = 0;
6444 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6445 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6446 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6448 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6449 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6450 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6452 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6453 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6454 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6456 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6457 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6458 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6460 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6461 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6462 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6465 /* If there's a recovery already waiting, it takes
6466 * precedence before starting a new reset sequence.
6468 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6469 i40e_handle_reset_warning(pf);
6473 /* If we're already down or resetting, just bail */
6475 !test_bit(__I40E_DOWN, &pf->state) &&
6476 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6477 i40e_do_reset(pf, reset_flags);
6484 * i40e_handle_link_event - Handle link event
6485 * @pf: board private structure
6486 * @e: event info posted on ARQ
6488 static void i40e_handle_link_event(struct i40e_pf *pf,
6489 struct i40e_arq_event_info *e)
6491 struct i40e_aqc_get_link_status *status =
6492 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6494 /* Do a new status request to re-enable LSE reporting
6495 * and load new status information into the hw struct
6496 * This completely ignores any state information
6497 * in the ARQ event info, instead choosing to always
6498 * issue the AQ update link status command.
6500 i40e_link_event(pf);
6502 /* check for unqualified module, if link is down */
6503 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6504 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6505 (!(status->link_info & I40E_AQ_LINK_UP)))
6506 dev_err(&pf->pdev->dev,
6507 "The driver failed to link because an unqualified module was detected.\n");
6511 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6512 * @pf: board private structure
6514 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6516 struct i40e_arq_event_info event;
6517 struct i40e_hw *hw = &pf->hw;
6524 /* Do not run clean AQ when PF reset fails */
6525 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6528 /* check for error indications */
6529 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6531 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6532 if (hw->debug_mask & I40E_DEBUG_AQ)
6533 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6534 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6536 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6537 if (hw->debug_mask & I40E_DEBUG_AQ)
6538 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6539 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6540 pf->arq_overflows++;
6542 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6543 if (hw->debug_mask & I40E_DEBUG_AQ)
6544 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6545 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6548 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6550 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6552 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6553 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6554 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6555 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6557 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6558 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6559 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6560 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6562 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6563 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6564 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6565 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6568 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6570 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6571 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6576 ret = i40e_clean_arq_element(hw, &event, &pending);
6577 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6580 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6584 opcode = le16_to_cpu(event.desc.opcode);
6587 case i40e_aqc_opc_get_link_status:
6588 i40e_handle_link_event(pf, &event);
6590 case i40e_aqc_opc_send_msg_to_pf:
6591 ret = i40e_vc_process_vf_msg(pf,
6592 le16_to_cpu(event.desc.retval),
6593 le32_to_cpu(event.desc.cookie_high),
6594 le32_to_cpu(event.desc.cookie_low),
6598 case i40e_aqc_opc_lldp_update_mib:
6599 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6600 #ifdef CONFIG_I40E_DCB
6602 ret = i40e_handle_lldp_event(pf, &event);
6604 #endif /* CONFIG_I40E_DCB */
6606 case i40e_aqc_opc_event_lan_overflow:
6607 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6608 i40e_handle_lan_overflow_event(pf, &event);
6610 case i40e_aqc_opc_send_msg_to_peer:
6611 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6613 case i40e_aqc_opc_nvm_erase:
6614 case i40e_aqc_opc_nvm_update:
6615 case i40e_aqc_opc_oem_post_update:
6616 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6617 "ARQ NVM operation 0x%04x completed\n",
6621 dev_info(&pf->pdev->dev,
6622 "ARQ: Unknown event 0x%04x ignored\n",
6626 } while (pending && (i++ < pf->adminq_work_limit));
6628 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6629 /* re-enable Admin queue interrupt cause */
6630 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6631 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6632 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6635 kfree(event.msg_buf);
6639 * i40e_verify_eeprom - make sure eeprom is good to use
6640 * @pf: board private structure
6642 static void i40e_verify_eeprom(struct i40e_pf *pf)
6646 err = i40e_diag_eeprom_test(&pf->hw);
6648 /* retry in case of garbage read */
6649 err = i40e_diag_eeprom_test(&pf->hw);
6651 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6653 set_bit(__I40E_BAD_EEPROM, &pf->state);
6657 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6658 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6659 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6664 * i40e_enable_pf_switch_lb
6665 * @pf: pointer to the PF structure
6667 * enable switch loop back or die - no point in a return value
6669 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6671 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6672 struct i40e_vsi_context ctxt;
6675 ctxt.seid = pf->main_vsi_seid;
6676 ctxt.pf_num = pf->hw.pf_id;
6678 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6680 dev_info(&pf->pdev->dev,
6681 "couldn't get PF vsi config, err %s aq_err %s\n",
6682 i40e_stat_str(&pf->hw, ret),
6683 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6686 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6687 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6688 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6690 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6692 dev_info(&pf->pdev->dev,
6693 "update vsi switch failed, err %s aq_err %s\n",
6694 i40e_stat_str(&pf->hw, ret),
6695 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6700 * i40e_disable_pf_switch_lb
6701 * @pf: pointer to the PF structure
6703 * disable switch loop back or die - no point in a return value
6705 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6707 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6708 struct i40e_vsi_context ctxt;
6711 ctxt.seid = pf->main_vsi_seid;
6712 ctxt.pf_num = pf->hw.pf_id;
6714 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6716 dev_info(&pf->pdev->dev,
6717 "couldn't get PF vsi config, err %s aq_err %s\n",
6718 i40e_stat_str(&pf->hw, ret),
6719 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6722 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6723 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6724 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6726 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6728 dev_info(&pf->pdev->dev,
6729 "update vsi switch failed, err %s aq_err %s\n",
6730 i40e_stat_str(&pf->hw, ret),
6731 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6736 * i40e_config_bridge_mode - Configure the HW bridge mode
6737 * @veb: pointer to the bridge instance
6739 * Configure the loop back mode for the LAN VSI that is downlink to the
6740 * specified HW bridge instance. It is expected this function is called
6741 * when a new HW bridge is instantiated.
6743 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6745 struct i40e_pf *pf = veb->pf;
6747 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6748 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6749 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6750 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6751 i40e_disable_pf_switch_lb(pf);
6753 i40e_enable_pf_switch_lb(pf);
6757 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6758 * @veb: pointer to the VEB instance
6760 * This is a recursive function that first builds the attached VSIs then
6761 * recurses in to build the next layer of VEB. We track the connections
6762 * through our own index numbers because the seid's from the HW could
6763 * change across the reset.
6765 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6767 struct i40e_vsi *ctl_vsi = NULL;
6768 struct i40e_pf *pf = veb->pf;
6772 /* build VSI that owns this VEB, temporarily attached to base VEB */
6773 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6775 pf->vsi[v]->veb_idx == veb->idx &&
6776 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6777 ctl_vsi = pf->vsi[v];
6782 dev_info(&pf->pdev->dev,
6783 "missing owner VSI for veb_idx %d\n", veb->idx);
6785 goto end_reconstitute;
6787 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6788 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6789 ret = i40e_add_vsi(ctl_vsi);
6791 dev_info(&pf->pdev->dev,
6792 "rebuild of veb_idx %d owner VSI failed: %d\n",
6794 goto end_reconstitute;
6796 i40e_vsi_reset_stats(ctl_vsi);
6798 /* create the VEB in the switch and move the VSI onto the VEB */
6799 ret = i40e_add_veb(veb, ctl_vsi);
6801 goto end_reconstitute;
6803 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6804 veb->bridge_mode = BRIDGE_MODE_VEB;
6806 veb->bridge_mode = BRIDGE_MODE_VEPA;
6807 i40e_config_bridge_mode(veb);
6809 /* create the remaining VSIs attached to this VEB */
6810 for (v = 0; v < pf->num_alloc_vsi; v++) {
6811 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6814 if (pf->vsi[v]->veb_idx == veb->idx) {
6815 struct i40e_vsi *vsi = pf->vsi[v];
6817 vsi->uplink_seid = veb->seid;
6818 ret = i40e_add_vsi(vsi);
6820 dev_info(&pf->pdev->dev,
6821 "rebuild of vsi_idx %d failed: %d\n",
6823 goto end_reconstitute;
6825 i40e_vsi_reset_stats(vsi);
6829 /* create any VEBs attached to this VEB - RECURSION */
6830 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6831 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6832 pf->veb[veb_idx]->uplink_seid = veb->seid;
6833 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6844 * i40e_get_capabilities - get info about the HW
6845 * @pf: the PF struct
6847 static int i40e_get_capabilities(struct i40e_pf *pf)
6849 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6854 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6856 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6860 /* this loads the data into the hw struct for us */
6861 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6863 i40e_aqc_opc_list_func_capabilities,
6865 /* data loaded, buffer no longer needed */
6868 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6869 /* retry with a larger buffer */
6870 buf_len = data_size;
6871 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6872 dev_info(&pf->pdev->dev,
6873 "capability discovery failed, err %s aq_err %s\n",
6874 i40e_stat_str(&pf->hw, err),
6875 i40e_aq_str(&pf->hw,
6876 pf->hw.aq.asq_last_status));
6881 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6882 dev_info(&pf->pdev->dev,
6883 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6884 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6885 pf->hw.func_caps.num_msix_vectors,
6886 pf->hw.func_caps.num_msix_vectors_vf,
6887 pf->hw.func_caps.fd_filters_guaranteed,
6888 pf->hw.func_caps.fd_filters_best_effort,
6889 pf->hw.func_caps.num_tx_qp,
6890 pf->hw.func_caps.num_vsis);
6892 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6893 + pf->hw.func_caps.num_vfs)
6894 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6895 dev_info(&pf->pdev->dev,
6896 "got num_vsis %d, setting num_vsis to %d\n",
6897 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6898 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6904 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6907 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6908 * @pf: board private structure
6910 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6912 struct i40e_vsi *vsi;
6914 /* quick workaround for an NVM issue that leaves a critical register
6917 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6918 static const u32 hkey[] = {
6919 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6920 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6921 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6925 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6926 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6929 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6932 /* find existing VSI and see if it needs configuring */
6933 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6935 /* create a new VSI if none exists */
6937 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6938 pf->vsi[pf->lan_vsi]->seid, 0);
6940 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6941 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6946 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6950 * i40e_fdir_teardown - release the Flow Director resources
6951 * @pf: board private structure
6953 static void i40e_fdir_teardown(struct i40e_pf *pf)
6955 struct i40e_vsi *vsi;
6957 i40e_fdir_filter_exit(pf);
6958 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6960 i40e_vsi_release(vsi);
6964 * i40e_prep_for_reset - prep for the core to reset
6965 * @pf: board private structure
6967 * Close up the VFs and other things in prep for PF Reset.
6969 static void i40e_prep_for_reset(struct i40e_pf *pf)
6971 struct i40e_hw *hw = &pf->hw;
6972 i40e_status ret = 0;
6975 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6976 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6978 if (i40e_check_asq_alive(&pf->hw))
6979 i40e_vc_notify_reset(pf);
6981 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6983 /* quiesce the VSIs and their queues that are not already DOWN */
6984 i40e_pf_quiesce_all_vsi(pf);
6986 for (v = 0; v < pf->num_alloc_vsi; v++) {
6988 pf->vsi[v]->seid = 0;
6991 i40e_shutdown_adminq(&pf->hw);
6993 /* call shutdown HMC */
6994 if (hw->hmc.hmc_obj) {
6995 ret = i40e_shutdown_lan_hmc(hw);
6997 dev_warn(&pf->pdev->dev,
6998 "shutdown_lan_hmc failed: %d\n", ret);
7003 * i40e_send_version - update firmware with driver version
7006 static void i40e_send_version(struct i40e_pf *pf)
7008 struct i40e_driver_version dv;
7010 dv.major_version = DRV_VERSION_MAJOR;
7011 dv.minor_version = DRV_VERSION_MINOR;
7012 dv.build_version = DRV_VERSION_BUILD;
7013 dv.subbuild_version = 0;
7014 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
7015 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
7019 * i40e_reset_and_rebuild - reset and rebuild using a saved config
7020 * @pf: board private structure
7021 * @reinit: if the Main VSI needs to re-initialized.
7023 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
7025 struct i40e_hw *hw = &pf->hw;
7026 u8 set_fc_aq_fail = 0;
7031 /* Now we wait for GRST to settle out.
7032 * We don't have to delete the VEBs or VSIs from the hw switch
7033 * because the reset will make them disappear.
7035 ret = i40e_pf_reset(hw);
7037 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
7038 set_bit(__I40E_RESET_FAILED, &pf->state);
7039 goto clear_recovery;
7043 if (test_bit(__I40E_DOWN, &pf->state))
7044 goto clear_recovery;
7045 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
7047 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
7048 ret = i40e_init_adminq(&pf->hw);
7050 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
7051 i40e_stat_str(&pf->hw, ret),
7052 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7053 goto clear_recovery;
7056 /* re-verify the eeprom if we just had an EMP reset */
7057 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
7058 i40e_verify_eeprom(pf);
7060 i40e_clear_pxe_mode(hw);
7061 ret = i40e_get_capabilities(pf);
7063 goto end_core_reset;
7065 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7066 hw->func_caps.num_rx_qp,
7067 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
7069 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
7070 goto end_core_reset;
7072 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7074 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
7075 goto end_core_reset;
7078 #ifdef CONFIG_I40E_DCB
7079 ret = i40e_init_pf_dcb(pf);
7081 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
7082 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
7083 /* Continue without DCB enabled */
7085 #endif /* CONFIG_I40E_DCB */
7087 i40e_init_pf_fcoe(pf);
7090 /* do basic switch setup */
7091 ret = i40e_setup_pf_switch(pf, reinit);
7093 goto end_core_reset;
7095 /* The driver only wants link up/down and module qualification
7096 * reports from firmware. Note the negative logic.
7098 ret = i40e_aq_set_phy_int_mask(&pf->hw,
7099 ~(I40E_AQ_EVENT_LINK_UPDOWN |
7100 I40E_AQ_EVENT_MEDIA_NA |
7101 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
7103 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
7104 i40e_stat_str(&pf->hw, ret),
7105 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7107 /* make sure our flow control settings are restored */
7108 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
7110 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
7111 i40e_stat_str(&pf->hw, ret),
7112 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7114 /* Rebuild the VSIs and VEBs that existed before reset.
7115 * They are still in our local switch element arrays, so only
7116 * need to rebuild the switch model in the HW.
7118 * If there were VEBs but the reconstitution failed, we'll try
7119 * try to recover minimal use by getting the basic PF VSI working.
7121 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
7122 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
7123 /* find the one VEB connected to the MAC, and find orphans */
7124 for (v = 0; v < I40E_MAX_VEB; v++) {
7128 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
7129 pf->veb[v]->uplink_seid == 0) {
7130 ret = i40e_reconstitute_veb(pf->veb[v]);
7135 /* If Main VEB failed, we're in deep doodoo,
7136 * so give up rebuilding the switch and set up
7137 * for minimal rebuild of PF VSI.
7138 * If orphan failed, we'll report the error
7139 * but try to keep going.
7141 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
7142 dev_info(&pf->pdev->dev,
7143 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
7145 pf->vsi[pf->lan_vsi]->uplink_seid
7148 } else if (pf->veb[v]->uplink_seid == 0) {
7149 dev_info(&pf->pdev->dev,
7150 "rebuild of orphan VEB failed: %d\n",
7157 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
7158 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
7159 /* no VEB, so rebuild only the Main VSI */
7160 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
7162 dev_info(&pf->pdev->dev,
7163 "rebuild of Main VSI failed: %d\n", ret);
7164 goto end_core_reset;
7168 /* Reconfigure hardware for allowing smaller MSS in the case
7169 * of TSO, so that we avoid the MDD being fired and causing
7170 * a reset in the case of small MSS+TSO.
7172 #define I40E_REG_MSS 0x000E64DC
7173 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
7174 #define I40E_64BYTE_MSS 0x400000
7175 val = rd32(hw, I40E_REG_MSS);
7176 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
7177 val &= ~I40E_REG_MSS_MIN_MASK;
7178 val |= I40E_64BYTE_MSS;
7179 wr32(hw, I40E_REG_MSS, val);
7182 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
7184 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
7186 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
7187 i40e_stat_str(&pf->hw, ret),
7188 i40e_aq_str(&pf->hw,
7189 pf->hw.aq.asq_last_status));
7191 /* reinit the misc interrupt */
7192 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7193 ret = i40e_setup_misc_vector(pf);
7195 /* Add a filter to drop all Flow control frames from any VSI from being
7196 * transmitted. By doing so we stop a malicious VF from sending out
7197 * PAUSE or PFC frames and potentially controlling traffic for other
7199 * The FW can still send Flow control frames if enabled.
7201 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
7204 /* restart the VSIs that were rebuilt and running before the reset */
7205 i40e_pf_unquiesce_all_vsi(pf);
7207 if (pf->num_alloc_vfs) {
7208 for (v = 0; v < pf->num_alloc_vfs; v++)
7209 i40e_reset_vf(&pf->vf[v], true);
7212 /* tell the firmware that we're starting */
7213 i40e_send_version(pf);
7216 clear_bit(__I40E_RESET_FAILED, &pf->state);
7218 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7222 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7223 * @pf: board private structure
7225 * Close up the VFs and other things in prep for a Core Reset,
7226 * then get ready to rebuild the world.
7228 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7230 i40e_prep_for_reset(pf);
7231 i40e_reset_and_rebuild(pf, false);
7235 * i40e_handle_mdd_event
7236 * @pf: pointer to the PF structure
7238 * Called from the MDD irq handler to identify possibly malicious vfs
7240 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7242 struct i40e_hw *hw = &pf->hw;
7243 bool mdd_detected = false;
7244 bool pf_mdd_detected = false;
7249 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7252 /* find what triggered the MDD event */
7253 reg = rd32(hw, I40E_GL_MDET_TX);
7254 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7255 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7256 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7257 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7258 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7259 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7260 I40E_GL_MDET_TX_EVENT_SHIFT;
7261 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7262 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7263 pf->hw.func_caps.base_queue;
7264 if (netif_msg_tx_err(pf))
7265 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7266 event, queue, pf_num, vf_num);
7267 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7268 mdd_detected = true;
7270 reg = rd32(hw, I40E_GL_MDET_RX);
7271 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7272 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7273 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7274 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7275 I40E_GL_MDET_RX_EVENT_SHIFT;
7276 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7277 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7278 pf->hw.func_caps.base_queue;
7279 if (netif_msg_rx_err(pf))
7280 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7281 event, queue, func);
7282 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7283 mdd_detected = true;
7287 reg = rd32(hw, I40E_PF_MDET_TX);
7288 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7289 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7290 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7291 pf_mdd_detected = true;
7293 reg = rd32(hw, I40E_PF_MDET_RX);
7294 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7295 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7296 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7297 pf_mdd_detected = true;
7299 /* Queue belongs to the PF, initiate a reset */
7300 if (pf_mdd_detected) {
7301 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7302 i40e_service_event_schedule(pf);
7306 /* see if one of the VFs needs its hand slapped */
7307 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7309 reg = rd32(hw, I40E_VP_MDET_TX(i));
7310 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7311 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7312 vf->num_mdd_events++;
7313 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7317 reg = rd32(hw, I40E_VP_MDET_RX(i));
7318 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7319 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7320 vf->num_mdd_events++;
7321 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7325 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7326 dev_info(&pf->pdev->dev,
7327 "Too many MDD events on VF %d, disabled\n", i);
7328 dev_info(&pf->pdev->dev,
7329 "Use PF Control I/F to re-enable the VF\n");
7330 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7334 /* re-enable mdd interrupt cause */
7335 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7336 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7337 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7338 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7343 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7344 * @pf: board private structure
7346 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7348 struct i40e_hw *hw = &pf->hw;
7353 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7356 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7358 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7359 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7360 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7361 port = pf->udp_ports[i].index;
7363 ret = i40e_aq_add_udp_tunnel(hw, port,
7364 pf->udp_ports[i].type,
7367 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7370 dev_dbg(&pf->pdev->dev,
7371 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7372 pf->udp_ports[i].type ? "vxlan" : "geneve",
7373 port ? "add" : "delete",
7375 i40e_stat_str(&pf->hw, ret),
7376 i40e_aq_str(&pf->hw,
7377 pf->hw.aq.asq_last_status));
7378 pf->udp_ports[i].index = 0;
7385 * i40e_service_task - Run the driver's async subtasks
7386 * @work: pointer to work_struct containing our data
7388 static void i40e_service_task(struct work_struct *work)
7390 struct i40e_pf *pf = container_of(work,
7393 unsigned long start_time = jiffies;
7395 /* don't bother with service tasks if a reset is in progress */
7396 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7400 if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
7403 i40e_detect_recover_hung(pf);
7404 i40e_sync_filters_subtask(pf);
7405 i40e_reset_subtask(pf);
7406 i40e_handle_mdd_event(pf);
7407 i40e_vc_process_vflr_event(pf);
7408 i40e_watchdog_subtask(pf);
7409 i40e_fdir_reinit_subtask(pf);
7410 if (pf->flags & I40E_FLAG_CLIENT_RESET) {
7411 /* Client subtask will reopen next time through. */
7412 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true);
7413 pf->flags &= ~I40E_FLAG_CLIENT_RESET;
7415 i40e_client_subtask(pf);
7416 if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) {
7417 i40e_notify_client_of_l2_param_changes(
7418 pf->vsi[pf->lan_vsi]);
7419 pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE;
7422 i40e_sync_filters_subtask(pf);
7423 i40e_sync_udp_filters_subtask(pf);
7424 i40e_clean_adminq_subtask(pf);
7426 /* flush memory to make sure state is correct before next watchdog */
7427 smp_mb__before_atomic();
7428 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7430 /* If the tasks have taken longer than one timer cycle or there
7431 * is more work to be done, reschedule the service task now
7432 * rather than wait for the timer to tick again.
7434 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7435 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7436 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7437 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7438 i40e_service_event_schedule(pf);
7442 * i40e_service_timer - timer callback
7443 * @data: pointer to PF struct
7445 static void i40e_service_timer(unsigned long data)
7447 struct i40e_pf *pf = (struct i40e_pf *)data;
7449 mod_timer(&pf->service_timer,
7450 round_jiffies(jiffies + pf->service_timer_period));
7451 i40e_service_event_schedule(pf);
7455 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7456 * @vsi: the VSI being configured
7458 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7460 struct i40e_pf *pf = vsi->back;
7462 switch (vsi->type) {
7464 vsi->alloc_queue_pairs = pf->num_lan_qps;
7465 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7466 I40E_REQ_DESCRIPTOR_MULTIPLE);
7467 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7468 vsi->num_q_vectors = pf->num_lan_msix;
7470 vsi->num_q_vectors = 1;
7475 vsi->alloc_queue_pairs = 1;
7476 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7477 I40E_REQ_DESCRIPTOR_MULTIPLE);
7478 vsi->num_q_vectors = pf->num_fdsb_msix;
7481 case I40E_VSI_VMDQ2:
7482 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7483 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7484 I40E_REQ_DESCRIPTOR_MULTIPLE);
7485 vsi->num_q_vectors = pf->num_vmdq_msix;
7488 case I40E_VSI_SRIOV:
7489 vsi->alloc_queue_pairs = pf->num_vf_qps;
7490 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7491 I40E_REQ_DESCRIPTOR_MULTIPLE);
7496 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7497 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7498 I40E_REQ_DESCRIPTOR_MULTIPLE);
7499 vsi->num_q_vectors = pf->num_fcoe_msix;
7502 #endif /* I40E_FCOE */
7512 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7513 * @type: VSI pointer
7514 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7516 * On error: returns error code (negative)
7517 * On success: returns 0
7519 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7524 /* allocate memory for both Tx and Rx ring pointers */
7525 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7526 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7529 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7531 if (alloc_qvectors) {
7532 /* allocate memory for q_vector pointers */
7533 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7534 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7535 if (!vsi->q_vectors) {
7543 kfree(vsi->tx_rings);
7548 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7549 * @pf: board private structure
7550 * @type: type of VSI
7552 * On error: returns error code (negative)
7553 * On success: returns vsi index in PF (positive)
7555 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7558 struct i40e_vsi *vsi;
7562 /* Need to protect the allocation of the VSIs at the PF level */
7563 mutex_lock(&pf->switch_mutex);
7565 /* VSI list may be fragmented if VSI creation/destruction has
7566 * been happening. We can afford to do a quick scan to look
7567 * for any free VSIs in the list.
7569 * find next empty vsi slot, looping back around if necessary
7572 while (i < pf->num_alloc_vsi && pf->vsi[i])
7574 if (i >= pf->num_alloc_vsi) {
7576 while (i < pf->next_vsi && pf->vsi[i])
7580 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7581 vsi_idx = i; /* Found one! */
7584 goto unlock_pf; /* out of VSI slots! */
7588 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7595 set_bit(__I40E_DOWN, &vsi->state);
7598 vsi->int_rate_limit = 0;
7599 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7600 pf->rss_table_size : 64;
7601 vsi->netdev_registered = false;
7602 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7603 hash_init(vsi->mac_filter_hash);
7604 vsi->irqs_ready = false;
7606 ret = i40e_set_num_rings_in_vsi(vsi);
7610 ret = i40e_vsi_alloc_arrays(vsi, true);
7614 /* Setup default MSIX irq handler for VSI */
7615 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7617 /* Initialize VSI lock */
7618 spin_lock_init(&vsi->mac_filter_hash_lock);
7619 pf->vsi[vsi_idx] = vsi;
7624 pf->next_vsi = i - 1;
7627 mutex_unlock(&pf->switch_mutex);
7632 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7633 * @type: VSI pointer
7634 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7636 * On error: returns error code (negative)
7637 * On success: returns 0
7639 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7641 /* free the ring and vector containers */
7642 if (free_qvectors) {
7643 kfree(vsi->q_vectors);
7644 vsi->q_vectors = NULL;
7646 kfree(vsi->tx_rings);
7647 vsi->tx_rings = NULL;
7648 vsi->rx_rings = NULL;
7652 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7654 * @vsi: Pointer to VSI structure
7656 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7661 kfree(vsi->rss_hkey_user);
7662 vsi->rss_hkey_user = NULL;
7664 kfree(vsi->rss_lut_user);
7665 vsi->rss_lut_user = NULL;
7669 * i40e_vsi_clear - Deallocate the VSI provided
7670 * @vsi: the VSI being un-configured
7672 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7683 mutex_lock(&pf->switch_mutex);
7684 if (!pf->vsi[vsi->idx]) {
7685 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7686 vsi->idx, vsi->idx, vsi, vsi->type);
7690 if (pf->vsi[vsi->idx] != vsi) {
7691 dev_err(&pf->pdev->dev,
7692 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7693 pf->vsi[vsi->idx]->idx,
7695 pf->vsi[vsi->idx]->type,
7696 vsi->idx, vsi, vsi->type);
7700 /* updates the PF for this cleared vsi */
7701 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7702 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7704 i40e_vsi_free_arrays(vsi, true);
7705 i40e_clear_rss_config_user(vsi);
7707 pf->vsi[vsi->idx] = NULL;
7708 if (vsi->idx < pf->next_vsi)
7709 pf->next_vsi = vsi->idx;
7712 mutex_unlock(&pf->switch_mutex);
7720 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7721 * @vsi: the VSI being cleaned
7723 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7727 if (vsi->tx_rings && vsi->tx_rings[0]) {
7728 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7729 kfree_rcu(vsi->tx_rings[i], rcu);
7730 vsi->tx_rings[i] = NULL;
7731 vsi->rx_rings[i] = NULL;
7737 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7738 * @vsi: the VSI being configured
7740 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7742 struct i40e_ring *tx_ring, *rx_ring;
7743 struct i40e_pf *pf = vsi->back;
7746 /* Set basic values in the rings to be used later during open() */
7747 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7748 /* allocate space for both Tx and Rx in one shot */
7749 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7753 tx_ring->queue_index = i;
7754 tx_ring->reg_idx = vsi->base_queue + i;
7755 tx_ring->ring_active = false;
7757 tx_ring->netdev = vsi->netdev;
7758 tx_ring->dev = &pf->pdev->dev;
7759 tx_ring->count = vsi->num_desc;
7761 tx_ring->dcb_tc = 0;
7762 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7763 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7764 tx_ring->tx_itr_setting = pf->tx_itr_default;
7765 vsi->tx_rings[i] = tx_ring;
7767 rx_ring = &tx_ring[1];
7768 rx_ring->queue_index = i;
7769 rx_ring->reg_idx = vsi->base_queue + i;
7770 rx_ring->ring_active = false;
7772 rx_ring->netdev = vsi->netdev;
7773 rx_ring->dev = &pf->pdev->dev;
7774 rx_ring->count = vsi->num_desc;
7776 rx_ring->dcb_tc = 0;
7777 rx_ring->rx_itr_setting = pf->rx_itr_default;
7778 vsi->rx_rings[i] = rx_ring;
7784 i40e_vsi_clear_rings(vsi);
7789 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7790 * @pf: board private structure
7791 * @vectors: the number of MSI-X vectors to request
7793 * Returns the number of vectors reserved, or error
7795 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7797 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7798 I40E_MIN_MSIX, vectors);
7800 dev_info(&pf->pdev->dev,
7801 "MSI-X vector reservation failed: %d\n", vectors);
7809 * i40e_init_msix - Setup the MSIX capability
7810 * @pf: board private structure
7812 * Work with the OS to set up the MSIX vectors needed.
7814 * Returns the number of vectors reserved or negative on failure
7816 static int i40e_init_msix(struct i40e_pf *pf)
7818 struct i40e_hw *hw = &pf->hw;
7819 int cpus, extra_vectors;
7823 int iwarp_requested = 0;
7825 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7828 /* The number of vectors we'll request will be comprised of:
7829 * - Add 1 for "other" cause for Admin Queue events, etc.
7830 * - The number of LAN queue pairs
7831 * - Queues being used for RSS.
7832 * We don't need as many as max_rss_size vectors.
7833 * use rss_size instead in the calculation since that
7834 * is governed by number of cpus in the system.
7835 * - assumes symmetric Tx/Rx pairing
7836 * - The number of VMDq pairs
7837 * - The CPU count within the NUMA node if iWARP is enabled
7839 * - The number of FCOE qps.
7841 * Once we count this up, try the request.
7843 * If we can't get what we want, we'll simplify to nearly nothing
7844 * and try again. If that still fails, we punt.
7846 vectors_left = hw->func_caps.num_msix_vectors;
7849 /* reserve one vector for miscellaneous handler */
7855 /* reserve some vectors for the main PF traffic queues. Initially we
7856 * only reserve at most 50% of the available vectors, in the case that
7857 * the number of online CPUs is large. This ensures that we can enable
7858 * extra features as well. Once we've enabled the other features, we
7859 * will use any remaining vectors to reach as close as we can to the
7860 * number of online CPUs.
7862 cpus = num_online_cpus();
7863 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
7864 vectors_left -= pf->num_lan_msix;
7866 /* reserve one vector for sideband flow director */
7867 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7869 pf->num_fdsb_msix = 1;
7873 pf->num_fdsb_msix = 0;
7878 /* can we reserve enough for FCoE? */
7879 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7881 pf->num_fcoe_msix = 0;
7882 else if (vectors_left >= pf->num_fcoe_qps)
7883 pf->num_fcoe_msix = pf->num_fcoe_qps;
7885 pf->num_fcoe_msix = 1;
7886 v_budget += pf->num_fcoe_msix;
7887 vectors_left -= pf->num_fcoe_msix;
7891 /* can we reserve enough for iWARP? */
7892 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7893 iwarp_requested = pf->num_iwarp_msix;
7896 pf->num_iwarp_msix = 0;
7897 else if (vectors_left < pf->num_iwarp_msix)
7898 pf->num_iwarp_msix = 1;
7899 v_budget += pf->num_iwarp_msix;
7900 vectors_left -= pf->num_iwarp_msix;
7903 /* any vectors left over go for VMDq support */
7904 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7905 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7906 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7908 if (!vectors_left) {
7909 pf->num_vmdq_msix = 0;
7910 pf->num_vmdq_qps = 0;
7912 /* if we're short on vectors for what's desired, we limit
7913 * the queues per vmdq. If this is still more than are
7914 * available, the user will need to change the number of
7915 * queues/vectors used by the PF later with the ethtool
7918 if (vmdq_vecs < vmdq_vecs_wanted)
7919 pf->num_vmdq_qps = 1;
7920 pf->num_vmdq_msix = pf->num_vmdq_qps;
7922 v_budget += vmdq_vecs;
7923 vectors_left -= vmdq_vecs;
7927 /* On systems with a large number of SMP cores, we previously limited
7928 * the number of vectors for num_lan_msix to be at most 50% of the
7929 * available vectors, to allow for other features. Now, we add back
7930 * the remaining vectors. However, we ensure that the total
7931 * num_lan_msix will not exceed num_online_cpus(). To do this, we
7932 * calculate the number of vectors we can add without going over the
7933 * cap of CPUs. For systems with a small number of CPUs this will be
7936 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
7937 pf->num_lan_msix += extra_vectors;
7938 vectors_left -= extra_vectors;
7940 WARN(vectors_left < 0,
7941 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
7943 v_budget += pf->num_lan_msix;
7944 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7946 if (!pf->msix_entries)
7949 for (i = 0; i < v_budget; i++)
7950 pf->msix_entries[i].entry = i;
7951 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7953 if (v_actual < I40E_MIN_MSIX) {
7954 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7955 kfree(pf->msix_entries);
7956 pf->msix_entries = NULL;
7957 pci_disable_msix(pf->pdev);
7960 } else if (v_actual == I40E_MIN_MSIX) {
7961 /* Adjust for minimal MSIX use */
7962 pf->num_vmdq_vsis = 0;
7963 pf->num_vmdq_qps = 0;
7964 pf->num_lan_qps = 1;
7965 pf->num_lan_msix = 1;
7967 } else if (!vectors_left) {
7968 /* If we have limited resources, we will start with no vectors
7969 * for the special features and then allocate vectors to some
7970 * of these features based on the policy and at the end disable
7971 * the features that did not get any vectors.
7975 dev_info(&pf->pdev->dev,
7976 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7977 /* reserve the misc vector */
7980 /* Scale vector usage down */
7981 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7982 pf->num_vmdq_vsis = 1;
7983 pf->num_vmdq_qps = 1;
7985 pf->num_fcoe_qps = 0;
7986 pf->num_fcoe_msix = 0;
7989 /* partition out the remaining vectors */
7992 pf->num_lan_msix = 1;
7995 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7996 pf->num_lan_msix = 1;
7997 pf->num_iwarp_msix = 1;
7999 pf->num_lan_msix = 2;
8002 /* give one vector to FCoE */
8003 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8004 pf->num_lan_msix = 1;
8005 pf->num_fcoe_msix = 1;
8010 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
8011 pf->num_iwarp_msix = min_t(int, (vec / 3),
8013 pf->num_vmdq_vsis = min_t(int, (vec / 3),
8014 I40E_DEFAULT_NUM_VMDQ_VSI);
8016 pf->num_vmdq_vsis = min_t(int, (vec / 2),
8017 I40E_DEFAULT_NUM_VMDQ_VSI);
8019 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8020 pf->num_fdsb_msix = 1;
8023 pf->num_lan_msix = min_t(int,
8024 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
8026 pf->num_lan_qps = pf->num_lan_msix;
8028 /* give one vector to FCoE */
8029 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8030 pf->num_fcoe_msix = 1;
8038 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8039 (pf->num_fdsb_msix == 0)) {
8040 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
8041 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8043 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8044 (pf->num_vmdq_msix == 0)) {
8045 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
8046 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
8049 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
8050 (pf->num_iwarp_msix == 0)) {
8051 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
8052 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
8056 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
8057 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
8058 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
8061 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
8062 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
8064 pf->num_vmdq_msix * pf->num_vmdq_vsis,
8066 pf->num_iwarp_msix);
8072 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
8073 * @vsi: the VSI being configured
8074 * @v_idx: index of the vector in the vsi struct
8075 * @cpu: cpu to be used on affinity_mask
8077 * We allocate one q_vector. If allocation fails we return -ENOMEM.
8079 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
8081 struct i40e_q_vector *q_vector;
8083 /* allocate q_vector */
8084 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
8088 q_vector->vsi = vsi;
8089 q_vector->v_idx = v_idx;
8090 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
8093 netif_napi_add(vsi->netdev, &q_vector->napi,
8094 i40e_napi_poll, NAPI_POLL_WEIGHT);
8096 q_vector->rx.latency_range = I40E_LOW_LATENCY;
8097 q_vector->tx.latency_range = I40E_LOW_LATENCY;
8099 /* tie q_vector and vsi together */
8100 vsi->q_vectors[v_idx] = q_vector;
8106 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
8107 * @vsi: the VSI being configured
8109 * We allocate one q_vector per queue interrupt. If allocation fails we
8112 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
8114 struct i40e_pf *pf = vsi->back;
8115 int err, v_idx, num_q_vectors, current_cpu;
8117 /* if not MSIX, give the one vector only to the LAN VSI */
8118 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
8119 num_q_vectors = vsi->num_q_vectors;
8120 else if (vsi == pf->vsi[pf->lan_vsi])
8125 current_cpu = cpumask_first(cpu_online_mask);
8127 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
8128 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
8131 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
8132 if (unlikely(current_cpu >= nr_cpu_ids))
8133 current_cpu = cpumask_first(cpu_online_mask);
8140 i40e_free_q_vector(vsi, v_idx);
8146 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
8147 * @pf: board private structure to initialize
8149 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
8154 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8155 vectors = i40e_init_msix(pf);
8157 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
8158 I40E_FLAG_IWARP_ENABLED |
8160 I40E_FLAG_FCOE_ENABLED |
8162 I40E_FLAG_RSS_ENABLED |
8163 I40E_FLAG_DCB_CAPABLE |
8164 I40E_FLAG_DCB_ENABLED |
8165 I40E_FLAG_SRIOV_ENABLED |
8166 I40E_FLAG_FD_SB_ENABLED |
8167 I40E_FLAG_FD_ATR_ENABLED |
8168 I40E_FLAG_VMDQ_ENABLED);
8170 /* rework the queue expectations without MSIX */
8171 i40e_determine_queue_usage(pf);
8175 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8176 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
8177 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
8178 vectors = pci_enable_msi(pf->pdev);
8180 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
8182 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
8184 vectors = 1; /* one MSI or Legacy vector */
8187 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
8188 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
8190 /* set up vector assignment tracking */
8191 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
8192 pf->irq_pile = kzalloc(size, GFP_KERNEL);
8193 if (!pf->irq_pile) {
8194 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
8197 pf->irq_pile->num_entries = vectors;
8198 pf->irq_pile->search_hint = 0;
8200 /* track first vector for misc interrupts, ignore return */
8201 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
8207 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
8208 * @pf: board private structure
8210 * This sets up the handler for MSIX 0, which is used to manage the
8211 * non-queue interrupts, e.g. AdminQ and errors. This is not used
8212 * when in MSI or Legacy interrupt mode.
8214 static int i40e_setup_misc_vector(struct i40e_pf *pf)
8216 struct i40e_hw *hw = &pf->hw;
8219 /* Only request the irq if this is the first time through, and
8220 * not when we're rebuilding after a Reset
8222 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
8223 err = request_irq(pf->msix_entries[0].vector,
8224 i40e_intr, 0, pf->int_name, pf);
8226 dev_info(&pf->pdev->dev,
8227 "request_irq for %s failed: %d\n",
8233 i40e_enable_misc_int_causes(pf);
8235 /* associate no queues to the misc vector */
8236 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
8237 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
8241 i40e_irq_dynamic_enable_icr0(pf, true);
8247 * i40e_config_rss_aq - Prepare for RSS using AQ commands
8248 * @vsi: vsi structure
8249 * @seed: RSS hash seed
8251 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8252 u8 *lut, u16 lut_size)
8254 struct i40e_pf *pf = vsi->back;
8255 struct i40e_hw *hw = &pf->hw;
8259 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8260 (struct i40e_aqc_get_set_rss_key_data *)seed;
8261 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8263 dev_info(&pf->pdev->dev,
8264 "Cannot set RSS key, err %s aq_err %s\n",
8265 i40e_stat_str(hw, ret),
8266 i40e_aq_str(hw, hw->aq.asq_last_status));
8271 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8273 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8275 dev_info(&pf->pdev->dev,
8276 "Cannot set RSS lut, err %s aq_err %s\n",
8277 i40e_stat_str(hw, ret),
8278 i40e_aq_str(hw, hw->aq.asq_last_status));
8286 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8287 * @vsi: Pointer to vsi structure
8288 * @seed: Buffter to store the hash keys
8289 * @lut: Buffer to store the lookup table entries
8290 * @lut_size: Size of buffer to store the lookup table entries
8292 * Return 0 on success, negative on failure
8294 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8295 u8 *lut, u16 lut_size)
8297 struct i40e_pf *pf = vsi->back;
8298 struct i40e_hw *hw = &pf->hw;
8302 ret = i40e_aq_get_rss_key(hw, vsi->id,
8303 (struct i40e_aqc_get_set_rss_key_data *)seed);
8305 dev_info(&pf->pdev->dev,
8306 "Cannot get RSS key, err %s aq_err %s\n",
8307 i40e_stat_str(&pf->hw, ret),
8308 i40e_aq_str(&pf->hw,
8309 pf->hw.aq.asq_last_status));
8315 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8317 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8319 dev_info(&pf->pdev->dev,
8320 "Cannot get RSS lut, err %s aq_err %s\n",
8321 i40e_stat_str(&pf->hw, ret),
8322 i40e_aq_str(&pf->hw,
8323 pf->hw.aq.asq_last_status));
8332 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8333 * @vsi: VSI structure
8335 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8337 u8 seed[I40E_HKEY_ARRAY_SIZE];
8338 struct i40e_pf *pf = vsi->back;
8342 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8346 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8347 vsi->num_queue_pairs);
8351 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8354 /* Use the user configured hash keys and lookup table if there is one,
8355 * otherwise use default
8357 if (vsi->rss_lut_user)
8358 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8360 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8361 if (vsi->rss_hkey_user)
8362 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8364 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8365 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8372 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8373 * @vsi: Pointer to vsi structure
8374 * @seed: RSS hash seed
8375 * @lut: Lookup table
8376 * @lut_size: Lookup table size
8378 * Returns 0 on success, negative on failure
8380 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8381 const u8 *lut, u16 lut_size)
8383 struct i40e_pf *pf = vsi->back;
8384 struct i40e_hw *hw = &pf->hw;
8385 u16 vf_id = vsi->vf_id;
8388 /* Fill out hash function seed */
8390 u32 *seed_dw = (u32 *)seed;
8392 if (vsi->type == I40E_VSI_MAIN) {
8393 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8394 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8395 } else if (vsi->type == I40E_VSI_SRIOV) {
8396 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8397 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
8399 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8404 u32 *lut_dw = (u32 *)lut;
8406 if (vsi->type == I40E_VSI_MAIN) {
8407 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8409 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8410 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8411 } else if (vsi->type == I40E_VSI_SRIOV) {
8412 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8414 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8415 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
8417 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8426 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8427 * @vsi: Pointer to VSI structure
8428 * @seed: Buffer to store the keys
8429 * @lut: Buffer to store the lookup table entries
8430 * @lut_size: Size of buffer to store the lookup table entries
8432 * Returns 0 on success, negative on failure
8434 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8435 u8 *lut, u16 lut_size)
8437 struct i40e_pf *pf = vsi->back;
8438 struct i40e_hw *hw = &pf->hw;
8442 u32 *seed_dw = (u32 *)seed;
8444 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8445 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8448 u32 *lut_dw = (u32 *)lut;
8450 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8452 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8453 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8460 * i40e_config_rss - Configure RSS keys and lut
8461 * @vsi: Pointer to VSI structure
8462 * @seed: RSS hash seed
8463 * @lut: Lookup table
8464 * @lut_size: Lookup table size
8466 * Returns 0 on success, negative on failure
8468 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8470 struct i40e_pf *pf = vsi->back;
8472 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8473 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8475 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8479 * i40e_get_rss - Get RSS keys and lut
8480 * @vsi: Pointer to VSI structure
8481 * @seed: Buffer to store the keys
8482 * @lut: Buffer to store the lookup table entries
8483 * lut_size: Size of buffer to store the lookup table entries
8485 * Returns 0 on success, negative on failure
8487 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8489 struct i40e_pf *pf = vsi->back;
8491 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8492 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8494 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8498 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8499 * @pf: Pointer to board private structure
8500 * @lut: Lookup table
8501 * @rss_table_size: Lookup table size
8502 * @rss_size: Range of queue number for hashing
8504 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8505 u16 rss_table_size, u16 rss_size)
8509 for (i = 0; i < rss_table_size; i++)
8510 lut[i] = i % rss_size;
8514 * i40e_pf_config_rss - Prepare for RSS if used
8515 * @pf: board private structure
8517 static int i40e_pf_config_rss(struct i40e_pf *pf)
8519 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8520 u8 seed[I40E_HKEY_ARRAY_SIZE];
8522 struct i40e_hw *hw = &pf->hw;
8527 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8528 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8529 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8530 hena |= i40e_pf_get_default_rss_hena(pf);
8532 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8533 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8535 /* Determine the RSS table size based on the hardware capabilities */
8536 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8537 reg_val = (pf->rss_table_size == 512) ?
8538 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8539 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8540 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8542 /* Determine the RSS size of the VSI */
8544 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8545 vsi->num_queue_pairs);
8549 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8553 /* Use user configured lut if there is one, otherwise use default */
8554 if (vsi->rss_lut_user)
8555 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8557 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8559 /* Use user configured hash key if there is one, otherwise
8562 if (vsi->rss_hkey_user)
8563 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8565 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8566 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8573 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8574 * @pf: board private structure
8575 * @queue_count: the requested queue count for rss.
8577 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8578 * count which may be different from the requested queue count.
8580 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8582 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8585 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8588 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8590 if (queue_count != vsi->num_queue_pairs) {
8591 vsi->req_queue_pairs = queue_count;
8592 i40e_prep_for_reset(pf);
8594 pf->alloc_rss_size = new_rss_size;
8596 i40e_reset_and_rebuild(pf, true);
8598 /* Discard the user configured hash keys and lut, if less
8599 * queues are enabled.
8601 if (queue_count < vsi->rss_size) {
8602 i40e_clear_rss_config_user(vsi);
8603 dev_dbg(&pf->pdev->dev,
8604 "discard user configured hash keys and lut\n");
8607 /* Reset vsi->rss_size, as number of enabled queues changed */
8608 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8609 vsi->num_queue_pairs);
8611 i40e_pf_config_rss(pf);
8613 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
8614 vsi->req_queue_pairs, pf->rss_size_max);
8615 return pf->alloc_rss_size;
8619 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8620 * @pf: board private structure
8622 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8625 bool min_valid, max_valid;
8628 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8629 &min_valid, &max_valid);
8633 pf->npar_min_bw = min_bw;
8635 pf->npar_max_bw = max_bw;
8642 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8643 * @pf: board private structure
8645 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8647 struct i40e_aqc_configure_partition_bw_data bw_data;
8650 /* Set the valid bit for this PF */
8651 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8652 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8653 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8655 /* Set the new bandwidths */
8656 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8662 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8663 * @pf: board private structure
8665 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8667 /* Commit temporary BW setting to permanent NVM image */
8668 enum i40e_admin_queue_err last_aq_status;
8672 if (pf->hw.partition_id != 1) {
8673 dev_info(&pf->pdev->dev,
8674 "Commit BW only works on partition 1! This is partition %d",
8675 pf->hw.partition_id);
8676 ret = I40E_NOT_SUPPORTED;
8680 /* Acquire NVM for read access */
8681 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8682 last_aq_status = pf->hw.aq.asq_last_status;
8684 dev_info(&pf->pdev->dev,
8685 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8686 i40e_stat_str(&pf->hw, ret),
8687 i40e_aq_str(&pf->hw, last_aq_status));
8691 /* Read word 0x10 of NVM - SW compatibility word 1 */
8692 ret = i40e_aq_read_nvm(&pf->hw,
8693 I40E_SR_NVM_CONTROL_WORD,
8694 0x10, sizeof(nvm_word), &nvm_word,
8696 /* Save off last admin queue command status before releasing
8699 last_aq_status = pf->hw.aq.asq_last_status;
8700 i40e_release_nvm(&pf->hw);
8702 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8703 i40e_stat_str(&pf->hw, ret),
8704 i40e_aq_str(&pf->hw, last_aq_status));
8708 /* Wait a bit for NVM release to complete */
8711 /* Acquire NVM for write access */
8712 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8713 last_aq_status = pf->hw.aq.asq_last_status;
8715 dev_info(&pf->pdev->dev,
8716 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8717 i40e_stat_str(&pf->hw, ret),
8718 i40e_aq_str(&pf->hw, last_aq_status));
8721 /* Write it back out unchanged to initiate update NVM,
8722 * which will force a write of the shadow (alt) RAM to
8723 * the NVM - thus storing the bandwidth values permanently.
8725 ret = i40e_aq_update_nvm(&pf->hw,
8726 I40E_SR_NVM_CONTROL_WORD,
8727 0x10, sizeof(nvm_word),
8728 &nvm_word, true, NULL);
8729 /* Save off last admin queue command status before releasing
8732 last_aq_status = pf->hw.aq.asq_last_status;
8733 i40e_release_nvm(&pf->hw);
8735 dev_info(&pf->pdev->dev,
8736 "BW settings NOT SAVED, err %s aq_err %s\n",
8737 i40e_stat_str(&pf->hw, ret),
8738 i40e_aq_str(&pf->hw, last_aq_status));
8745 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8746 * @pf: board private structure to initialize
8748 * i40e_sw_init initializes the Adapter private data structure.
8749 * Fields are initialized based on PCI device information and
8750 * OS network device settings (MTU size).
8752 static int i40e_sw_init(struct i40e_pf *pf)
8757 /* Set default capability flags */
8758 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8759 I40E_FLAG_MSI_ENABLED |
8760 I40E_FLAG_MSIX_ENABLED;
8762 /* Set default ITR */
8763 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8764 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8766 /* Depending on PF configurations, it is possible that the RSS
8767 * maximum might end up larger than the available queues
8769 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8770 pf->alloc_rss_size = 1;
8771 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8772 pf->rss_size_max = min_t(int, pf->rss_size_max,
8773 pf->hw.func_caps.num_tx_qp);
8774 if (pf->hw.func_caps.rss) {
8775 pf->flags |= I40E_FLAG_RSS_ENABLED;
8776 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8780 /* MFP mode enabled */
8781 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8782 pf->flags |= I40E_FLAG_MFP_ENABLED;
8783 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8784 if (i40e_get_npar_bw_setting(pf))
8785 dev_warn(&pf->pdev->dev,
8786 "Could not get NPAR bw settings\n");
8788 dev_info(&pf->pdev->dev,
8789 "Min BW = %8.8x, Max BW = %8.8x\n",
8790 pf->npar_min_bw, pf->npar_max_bw);
8793 /* FW/NVM is not yet fixed in this regard */
8794 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8795 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8796 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8797 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8798 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8799 pf->hw.num_partitions > 1)
8800 dev_info(&pf->pdev->dev,
8801 "Flow Director Sideband mode Disabled in MFP mode\n");
8803 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8804 pf->fdir_pf_filter_count =
8805 pf->hw.func_caps.fd_filters_guaranteed;
8806 pf->hw.fdir_shared_filter_count =
8807 pf->hw.func_caps.fd_filters_best_effort;
8810 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8811 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8812 (pf->hw.aq.fw_maj_ver < 4))) {
8813 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8814 /* No DCB support for FW < v4.33 */
8815 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8818 /* Disable FW LLDP if FW < v4.3 */
8819 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8820 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8821 (pf->hw.aq.fw_maj_ver < 4)))
8822 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8824 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8825 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8826 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8827 (pf->hw.aq.fw_maj_ver >= 5)))
8828 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8830 if (pf->hw.func_caps.vmdq) {
8831 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8832 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8833 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8836 if (pf->hw.func_caps.iwarp) {
8837 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8838 /* IWARP needs one extra vector for CQP just like MISC.*/
8839 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8843 i40e_init_pf_fcoe(pf);
8845 #endif /* I40E_FCOE */
8846 #ifdef CONFIG_PCI_IOV
8847 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8848 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8849 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8850 pf->num_req_vfs = min_t(int,
8851 pf->hw.func_caps.num_vfs,
8854 #endif /* CONFIG_PCI_IOV */
8855 if (pf->hw.mac.type == I40E_MAC_X722) {
8856 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE
8857 | I40E_FLAG_128_QP_RSS_CAPABLE
8858 | I40E_FLAG_HW_ATR_EVICT_CAPABLE
8859 | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE
8860 | I40E_FLAG_WB_ON_ITR_CAPABLE
8861 | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE
8862 | I40E_FLAG_NO_PCI_LINK_CHECK
8863 | I40E_FLAG_USE_SET_LLDP_MIB
8864 | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE
8865 | I40E_FLAG_PTP_L4_CAPABLE
8866 | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE;
8867 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8868 ((pf->hw.aq.api_maj_ver == 1) &&
8869 (pf->hw.aq.api_min_ver > 4))) {
8870 /* Supported in FW API version higher than 1.4 */
8871 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8872 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8874 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8877 pf->eeprom_version = 0xDEAD;
8878 pf->lan_veb = I40E_NO_VEB;
8879 pf->lan_vsi = I40E_NO_VSI;
8881 /* By default FW has this off for performance reasons */
8882 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8884 /* set up queue assignment tracking */
8885 size = sizeof(struct i40e_lump_tracking)
8886 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8887 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8892 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8893 pf->qp_pile->search_hint = 0;
8895 pf->tx_timeout_recovery_level = 1;
8897 mutex_init(&pf->switch_mutex);
8899 /* If NPAR is enabled nudge the Tx scheduler */
8900 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8901 i40e_set_npar_bw_setting(pf);
8908 * i40e_set_ntuple - set the ntuple feature flag and take action
8909 * @pf: board private structure to initialize
8910 * @features: the feature set that the stack is suggesting
8912 * returns a bool to indicate if reset needs to happen
8914 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8916 bool need_reset = false;
8918 /* Check if Flow Director n-tuple support was enabled or disabled. If
8919 * the state changed, we need to reset.
8921 if (features & NETIF_F_NTUPLE) {
8922 /* Enable filters and mark for reset */
8923 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8925 /* enable FD_SB only if there is MSI-X vector */
8926 if (pf->num_fdsb_msix > 0)
8927 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8929 /* turn off filters, mark for reset and clear SW filter list */
8930 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8932 i40e_fdir_filter_exit(pf);
8934 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8935 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8936 /* reset fd counters */
8937 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8938 pf->fdir_pf_active_filters = 0;
8939 /* if ATR was auto disabled it can be re-enabled. */
8940 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8941 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8942 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8943 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8944 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8951 * i40e_clear_rss_lut - clear the rx hash lookup table
8952 * @vsi: the VSI being configured
8954 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8956 struct i40e_pf *pf = vsi->back;
8957 struct i40e_hw *hw = &pf->hw;
8958 u16 vf_id = vsi->vf_id;
8961 if (vsi->type == I40E_VSI_MAIN) {
8962 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8963 wr32(hw, I40E_PFQF_HLUT(i), 0);
8964 } else if (vsi->type == I40E_VSI_SRIOV) {
8965 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8966 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8968 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8973 * i40e_set_features - set the netdev feature flags
8974 * @netdev: ptr to the netdev being adjusted
8975 * @features: the feature set that the stack is suggesting
8977 static int i40e_set_features(struct net_device *netdev,
8978 netdev_features_t features)
8980 struct i40e_netdev_priv *np = netdev_priv(netdev);
8981 struct i40e_vsi *vsi = np->vsi;
8982 struct i40e_pf *pf = vsi->back;
8985 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8986 i40e_pf_config_rss(pf);
8987 else if (!(features & NETIF_F_RXHASH) &&
8988 netdev->features & NETIF_F_RXHASH)
8989 i40e_clear_rss_lut(vsi);
8991 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8992 i40e_vlan_stripping_enable(vsi);
8994 i40e_vlan_stripping_disable(vsi);
8996 need_reset = i40e_set_ntuple(pf, features);
8999 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9005 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
9006 * @pf: board private structure
9007 * @port: The UDP port to look up
9009 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
9011 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
9015 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
9016 if (pf->udp_ports[i].index == port)
9024 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
9025 * @netdev: This physical port's netdev
9026 * @ti: Tunnel endpoint information
9028 static void i40e_udp_tunnel_add(struct net_device *netdev,
9029 struct udp_tunnel_info *ti)
9031 struct i40e_netdev_priv *np = netdev_priv(netdev);
9032 struct i40e_vsi *vsi = np->vsi;
9033 struct i40e_pf *pf = vsi->back;
9034 u16 port = ntohs(ti->port);
9038 idx = i40e_get_udp_port_idx(pf, port);
9040 /* Check if port already exists */
9041 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
9042 netdev_info(netdev, "port %d already offloaded\n", port);
9046 /* Now check if there is space to add the new port */
9047 next_idx = i40e_get_udp_port_idx(pf, 0);
9049 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
9050 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
9056 case UDP_TUNNEL_TYPE_VXLAN:
9057 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
9059 case UDP_TUNNEL_TYPE_GENEVE:
9060 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
9062 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
9068 /* New port: add it and mark its index in the bitmap */
9069 pf->udp_ports[next_idx].index = port;
9070 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
9071 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9075 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
9076 * @netdev: This physical port's netdev
9077 * @ti: Tunnel endpoint information
9079 static void i40e_udp_tunnel_del(struct net_device *netdev,
9080 struct udp_tunnel_info *ti)
9082 struct i40e_netdev_priv *np = netdev_priv(netdev);
9083 struct i40e_vsi *vsi = np->vsi;
9084 struct i40e_pf *pf = vsi->back;
9085 u16 port = ntohs(ti->port);
9088 idx = i40e_get_udp_port_idx(pf, port);
9090 /* Check if port already exists */
9091 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
9095 case UDP_TUNNEL_TYPE_VXLAN:
9096 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
9099 case UDP_TUNNEL_TYPE_GENEVE:
9100 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
9107 /* if port exists, set it to 0 (mark for deletion)
9108 * and make it pending
9110 pf->udp_ports[idx].index = 0;
9111 pf->pending_udp_bitmap |= BIT_ULL(idx);
9112 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9116 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
9120 static int i40e_get_phys_port_id(struct net_device *netdev,
9121 struct netdev_phys_item_id *ppid)
9123 struct i40e_netdev_priv *np = netdev_priv(netdev);
9124 struct i40e_pf *pf = np->vsi->back;
9125 struct i40e_hw *hw = &pf->hw;
9127 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
9130 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
9131 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
9137 * i40e_ndo_fdb_add - add an entry to the hardware database
9138 * @ndm: the input from the stack
9139 * @tb: pointer to array of nladdr (unused)
9140 * @dev: the net device pointer
9141 * @addr: the MAC address entry being added
9142 * @flags: instructions from stack about fdb operation
9144 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9145 struct net_device *dev,
9146 const unsigned char *addr, u16 vid,
9149 struct i40e_netdev_priv *np = netdev_priv(dev);
9150 struct i40e_pf *pf = np->vsi->back;
9153 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
9157 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
9161 /* Hardware does not support aging addresses so if a
9162 * ndm_state is given only allow permanent addresses
9164 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
9165 netdev_info(dev, "FDB only supports static addresses\n");
9169 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
9170 err = dev_uc_add_excl(dev, addr);
9171 else if (is_multicast_ether_addr(addr))
9172 err = dev_mc_add_excl(dev, addr);
9176 /* Only return duplicate errors if NLM_F_EXCL is set */
9177 if (err == -EEXIST && !(flags & NLM_F_EXCL))
9184 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
9185 * @dev: the netdev being configured
9186 * @nlh: RTNL message
9188 * Inserts a new hardware bridge if not already created and
9189 * enables the bridging mode requested (VEB or VEPA). If the
9190 * hardware bridge has already been inserted and the request
9191 * is to change the mode then that requires a PF reset to
9192 * allow rebuild of the components with required hardware
9193 * bridge mode enabled.
9195 static int i40e_ndo_bridge_setlink(struct net_device *dev,
9196 struct nlmsghdr *nlh,
9199 struct i40e_netdev_priv *np = netdev_priv(dev);
9200 struct i40e_vsi *vsi = np->vsi;
9201 struct i40e_pf *pf = vsi->back;
9202 struct i40e_veb *veb = NULL;
9203 struct nlattr *attr, *br_spec;
9206 /* Only for PF VSI for now */
9207 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9210 /* Find the HW bridge for PF VSI */
9211 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9212 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9216 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9218 nla_for_each_nested(attr, br_spec, rem) {
9221 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9224 mode = nla_get_u16(attr);
9225 if ((mode != BRIDGE_MODE_VEPA) &&
9226 (mode != BRIDGE_MODE_VEB))
9229 /* Insert a new HW bridge */
9231 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9232 vsi->tc_config.enabled_tc);
9234 veb->bridge_mode = mode;
9235 i40e_config_bridge_mode(veb);
9237 /* No Bridge HW offload available */
9241 } else if (mode != veb->bridge_mode) {
9242 /* Existing HW bridge but different mode needs reset */
9243 veb->bridge_mode = mode;
9244 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9245 if (mode == BRIDGE_MODE_VEB)
9246 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9248 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9249 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9258 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9261 * @seq: RTNL message seq #
9262 * @dev: the netdev being configured
9263 * @filter_mask: unused
9264 * @nlflags: netlink flags passed in
9266 * Return the mode in which the hardware bridge is operating in
9269 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9270 struct net_device *dev,
9271 u32 __always_unused filter_mask,
9274 struct i40e_netdev_priv *np = netdev_priv(dev);
9275 struct i40e_vsi *vsi = np->vsi;
9276 struct i40e_pf *pf = vsi->back;
9277 struct i40e_veb *veb = NULL;
9280 /* Only for PF VSI for now */
9281 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9284 /* Find the HW bridge for the PF VSI */
9285 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9286 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9293 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9294 0, 0, nlflags, filter_mask, NULL);
9298 * i40e_features_check - Validate encapsulated packet conforms to limits
9300 * @dev: This physical port's netdev
9301 * @features: Offload features that the stack believes apply
9303 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9304 struct net_device *dev,
9305 netdev_features_t features)
9309 /* No point in doing any of this if neither checksum nor GSO are
9310 * being requested for this frame. We can rule out both by just
9311 * checking for CHECKSUM_PARTIAL
9313 if (skb->ip_summed != CHECKSUM_PARTIAL)
9316 /* We cannot support GSO if the MSS is going to be less than
9317 * 64 bytes. If it is then we need to drop support for GSO.
9319 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
9320 features &= ~NETIF_F_GSO_MASK;
9322 /* MACLEN can support at most 63 words */
9323 len = skb_network_header(skb) - skb->data;
9324 if (len & ~(63 * 2))
9327 /* IPLEN and EIPLEN can support at most 127 dwords */
9328 len = skb_transport_header(skb) - skb_network_header(skb);
9329 if (len & ~(127 * 4))
9332 if (skb->encapsulation) {
9333 /* L4TUNLEN can support 127 words */
9334 len = skb_inner_network_header(skb) - skb_transport_header(skb);
9335 if (len & ~(127 * 2))
9338 /* IPLEN can support at most 127 dwords */
9339 len = skb_inner_transport_header(skb) -
9340 skb_inner_network_header(skb);
9341 if (len & ~(127 * 4))
9345 /* No need to validate L4LEN as TCP is the only protocol with a
9346 * a flexible value and we support all possible values supported
9347 * by TCP, which is at most 15 dwords
9352 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9355 static const struct net_device_ops i40e_netdev_ops = {
9356 .ndo_open = i40e_open,
9357 .ndo_stop = i40e_close,
9358 .ndo_start_xmit = i40e_lan_xmit_frame,
9359 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9360 .ndo_set_rx_mode = i40e_set_rx_mode,
9361 .ndo_validate_addr = eth_validate_addr,
9362 .ndo_set_mac_address = i40e_set_mac,
9363 .ndo_change_mtu = i40e_change_mtu,
9364 .ndo_do_ioctl = i40e_ioctl,
9365 .ndo_tx_timeout = i40e_tx_timeout,
9366 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9367 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9368 #ifdef CONFIG_NET_POLL_CONTROLLER
9369 .ndo_poll_controller = i40e_netpoll,
9371 .ndo_setup_tc = __i40e_setup_tc,
9373 .ndo_fcoe_enable = i40e_fcoe_enable,
9374 .ndo_fcoe_disable = i40e_fcoe_disable,
9376 .ndo_set_features = i40e_set_features,
9377 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9378 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9379 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9380 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9381 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9382 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9383 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9384 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9385 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9386 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9387 .ndo_fdb_add = i40e_ndo_fdb_add,
9388 .ndo_features_check = i40e_features_check,
9389 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9390 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9394 * i40e_config_netdev - Setup the netdev flags
9395 * @vsi: the VSI being configured
9397 * Returns 0 on success, negative value on failure
9399 static int i40e_config_netdev(struct i40e_vsi *vsi)
9401 struct i40e_pf *pf = vsi->back;
9402 struct i40e_hw *hw = &pf->hw;
9403 struct i40e_netdev_priv *np;
9404 struct net_device *netdev;
9405 u8 broadcast[ETH_ALEN];
9406 u8 mac_addr[ETH_ALEN];
9409 etherdev_size = sizeof(struct i40e_netdev_priv);
9410 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9414 vsi->netdev = netdev;
9415 np = netdev_priv(netdev);
9418 netdev->hw_enc_features |= NETIF_F_SG |
9422 NETIF_F_SOFT_FEATURES |
9427 NETIF_F_GSO_GRE_CSUM |
9428 NETIF_F_GSO_IPXIP4 |
9429 NETIF_F_GSO_IPXIP6 |
9430 NETIF_F_GSO_UDP_TUNNEL |
9431 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9432 NETIF_F_GSO_PARTIAL |
9438 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9439 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9441 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9443 /* record features VLANs can make use of */
9444 netdev->vlan_features |= netdev->hw_enc_features |
9445 NETIF_F_TSO_MANGLEID;
9447 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9448 netdev->hw_features |= NETIF_F_NTUPLE;
9450 netdev->hw_features |= netdev->hw_enc_features |
9451 NETIF_F_HW_VLAN_CTAG_TX |
9452 NETIF_F_HW_VLAN_CTAG_RX;
9454 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9455 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9457 if (vsi->type == I40E_VSI_MAIN) {
9458 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9459 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9460 /* The following steps are necessary to properly keep track of
9461 * MAC-VLAN filters loaded into firmware - first we remove
9462 * filter that is automatically generated by firmware and then
9463 * add new filter both to the driver hash table and firmware.
9465 i40e_rm_default_mac_filter(vsi, mac_addr);
9466 spin_lock_bh(&vsi->mac_filter_hash_lock);
9467 i40e_add_mac_filter(vsi, mac_addr);
9468 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9470 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9471 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9472 pf->vsi[pf->lan_vsi]->netdev->name);
9473 random_ether_addr(mac_addr);
9475 spin_lock_bh(&vsi->mac_filter_hash_lock);
9476 i40e_add_mac_filter(vsi, mac_addr);
9477 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9480 /* Add the broadcast filter so that we initially will receive
9481 * broadcast packets. Note that when a new VLAN is first added the
9482 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
9483 * specific filters as part of transitioning into "vlan" operation.
9484 * When more VLANs are added, the driver will copy each existing MAC
9485 * filter and add it for the new VLAN.
9487 * Broadcast filters are handled specially by
9488 * i40e_sync_filters_subtask, as the driver must to set the broadcast
9489 * promiscuous bit instead of adding this directly as a MAC/VLAN
9490 * filter. The subtask will update the correct broadcast promiscuous
9491 * bits as VLANs become active or inactive.
9493 eth_broadcast_addr(broadcast);
9494 spin_lock_bh(&vsi->mac_filter_hash_lock);
9495 i40e_add_mac_filter(vsi, broadcast);
9496 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9498 ether_addr_copy(netdev->dev_addr, mac_addr);
9499 ether_addr_copy(netdev->perm_addr, mac_addr);
9501 netdev->priv_flags |= IFF_UNICAST_FLT;
9502 netdev->priv_flags |= IFF_SUPP_NOFCS;
9503 /* Setup netdev TC information */
9504 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9506 netdev->netdev_ops = &i40e_netdev_ops;
9507 netdev->watchdog_timeo = 5 * HZ;
9508 i40e_set_ethtool_ops(netdev);
9510 i40e_fcoe_config_netdev(netdev, vsi);
9513 /* MTU range: 68 - 9706 */
9514 netdev->min_mtu = ETH_MIN_MTU;
9515 netdev->max_mtu = I40E_MAX_RXBUFFER -
9516 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9522 * i40e_vsi_delete - Delete a VSI from the switch
9523 * @vsi: the VSI being removed
9525 * Returns 0 on success, negative value on failure
9527 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9529 /* remove default VSI is not allowed */
9530 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9533 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9537 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9538 * @vsi: the VSI being queried
9540 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9542 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9544 struct i40e_veb *veb;
9545 struct i40e_pf *pf = vsi->back;
9547 /* Uplink is not a bridge so default to VEB */
9548 if (vsi->veb_idx == I40E_NO_VEB)
9551 veb = pf->veb[vsi->veb_idx];
9553 dev_info(&pf->pdev->dev,
9554 "There is no veb associated with the bridge\n");
9558 /* Uplink is a bridge in VEPA mode */
9559 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9562 /* Uplink is a bridge in VEB mode */
9566 /* VEPA is now default bridge, so return 0 */
9571 * i40e_add_vsi - Add a VSI to the switch
9572 * @vsi: the VSI being configured
9574 * This initializes a VSI context depending on the VSI type to be added and
9575 * passes it down to the add_vsi aq command.
9577 static int i40e_add_vsi(struct i40e_vsi *vsi)
9580 struct i40e_pf *pf = vsi->back;
9581 struct i40e_hw *hw = &pf->hw;
9582 struct i40e_vsi_context ctxt;
9583 struct i40e_mac_filter *f;
9584 struct hlist_node *h;
9587 u8 enabled_tc = 0x1; /* TC0 enabled */
9590 memset(&ctxt, 0, sizeof(ctxt));
9591 switch (vsi->type) {
9593 /* The PF's main VSI is already setup as part of the
9594 * device initialization, so we'll not bother with
9595 * the add_vsi call, but we will retrieve the current
9598 ctxt.seid = pf->main_vsi_seid;
9599 ctxt.pf_num = pf->hw.pf_id;
9601 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9602 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9604 dev_info(&pf->pdev->dev,
9605 "couldn't get PF vsi config, err %s aq_err %s\n",
9606 i40e_stat_str(&pf->hw, ret),
9607 i40e_aq_str(&pf->hw,
9608 pf->hw.aq.asq_last_status));
9611 vsi->info = ctxt.info;
9612 vsi->info.valid_sections = 0;
9614 vsi->seid = ctxt.seid;
9615 vsi->id = ctxt.vsi_number;
9617 enabled_tc = i40e_pf_get_tc_map(pf);
9619 /* MFP mode setup queue map and update VSI */
9620 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9621 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9622 memset(&ctxt, 0, sizeof(ctxt));
9623 ctxt.seid = pf->main_vsi_seid;
9624 ctxt.pf_num = pf->hw.pf_id;
9626 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9627 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9629 dev_info(&pf->pdev->dev,
9630 "update vsi failed, err %s aq_err %s\n",
9631 i40e_stat_str(&pf->hw, ret),
9632 i40e_aq_str(&pf->hw,
9633 pf->hw.aq.asq_last_status));
9637 /* update the local VSI info queue map */
9638 i40e_vsi_update_queue_map(vsi, &ctxt);
9639 vsi->info.valid_sections = 0;
9641 /* Default/Main VSI is only enabled for TC0
9642 * reconfigure it to enable all TCs that are
9643 * available on the port in SFP mode.
9644 * For MFP case the iSCSI PF would use this
9645 * flow to enable LAN+iSCSI TC.
9647 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9649 dev_info(&pf->pdev->dev,
9650 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9652 i40e_stat_str(&pf->hw, ret),
9653 i40e_aq_str(&pf->hw,
9654 pf->hw.aq.asq_last_status));
9661 ctxt.pf_num = hw->pf_id;
9663 ctxt.uplink_seid = vsi->uplink_seid;
9664 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9665 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9666 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9667 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9668 ctxt.info.valid_sections |=
9669 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9670 ctxt.info.switch_id =
9671 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9673 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9676 case I40E_VSI_VMDQ2:
9677 ctxt.pf_num = hw->pf_id;
9679 ctxt.uplink_seid = vsi->uplink_seid;
9680 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9681 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9683 /* This VSI is connected to VEB so the switch_id
9684 * should be set to zero by default.
9686 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9687 ctxt.info.valid_sections |=
9688 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9689 ctxt.info.switch_id =
9690 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9693 /* Setup the VSI tx/rx queue map for TC0 only for now */
9694 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9697 case I40E_VSI_SRIOV:
9698 ctxt.pf_num = hw->pf_id;
9699 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9700 ctxt.uplink_seid = vsi->uplink_seid;
9701 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9702 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9704 /* This VSI is connected to VEB so the switch_id
9705 * should be set to zero by default.
9707 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9708 ctxt.info.valid_sections |=
9709 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9710 ctxt.info.switch_id =
9711 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9714 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9715 ctxt.info.valid_sections |=
9716 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9717 ctxt.info.queueing_opt_flags |=
9718 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9719 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9722 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9723 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9724 if (pf->vf[vsi->vf_id].spoofchk) {
9725 ctxt.info.valid_sections |=
9726 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9727 ctxt.info.sec_flags |=
9728 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9729 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9731 /* Setup the VSI tx/rx queue map for TC0 only for now */
9732 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9737 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9739 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9744 #endif /* I40E_FCOE */
9745 case I40E_VSI_IWARP:
9746 /* send down message to iWARP */
9753 if (vsi->type != I40E_VSI_MAIN) {
9754 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9756 dev_info(&vsi->back->pdev->dev,
9757 "add vsi failed, err %s aq_err %s\n",
9758 i40e_stat_str(&pf->hw, ret),
9759 i40e_aq_str(&pf->hw,
9760 pf->hw.aq.asq_last_status));
9764 vsi->info = ctxt.info;
9765 vsi->info.valid_sections = 0;
9766 vsi->seid = ctxt.seid;
9767 vsi->id = ctxt.vsi_number;
9770 vsi->active_filters = 0;
9771 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9772 spin_lock_bh(&vsi->mac_filter_hash_lock);
9773 /* If macvlan filters already exist, force them to get loaded */
9774 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
9775 f->state = I40E_FILTER_NEW;
9778 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9781 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9782 pf->flags |= I40E_FLAG_FILTER_SYNC;
9785 /* Update VSI BW information */
9786 ret = i40e_vsi_get_bw_info(vsi);
9788 dev_info(&pf->pdev->dev,
9789 "couldn't get vsi bw info, err %s aq_err %s\n",
9790 i40e_stat_str(&pf->hw, ret),
9791 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9792 /* VSI is already added so not tearing that up */
9801 * i40e_vsi_release - Delete a VSI and free its resources
9802 * @vsi: the VSI being removed
9804 * Returns 0 on success or < 0 on error
9806 int i40e_vsi_release(struct i40e_vsi *vsi)
9808 struct i40e_mac_filter *f;
9809 struct hlist_node *h;
9810 struct i40e_veb *veb = NULL;
9817 /* release of a VEB-owner or last VSI is not allowed */
9818 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9819 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9820 vsi->seid, vsi->uplink_seid);
9823 if (vsi == pf->vsi[pf->lan_vsi] &&
9824 !test_bit(__I40E_DOWN, &pf->state)) {
9825 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9829 uplink_seid = vsi->uplink_seid;
9830 if (vsi->type != I40E_VSI_SRIOV) {
9831 if (vsi->netdev_registered) {
9832 vsi->netdev_registered = false;
9834 /* results in a call to i40e_close() */
9835 unregister_netdev(vsi->netdev);
9838 i40e_vsi_close(vsi);
9840 i40e_vsi_disable_irq(vsi);
9843 spin_lock_bh(&vsi->mac_filter_hash_lock);
9845 /* clear the sync flag on all filters */
9847 __dev_uc_unsync(vsi->netdev, NULL);
9848 __dev_mc_unsync(vsi->netdev, NULL);
9851 /* make sure any remaining filters are marked for deletion */
9852 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
9853 __i40e_del_filter(vsi, f);
9855 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9857 i40e_sync_vsi_filters(vsi);
9859 i40e_vsi_delete(vsi);
9860 i40e_vsi_free_q_vectors(vsi);
9862 free_netdev(vsi->netdev);
9865 i40e_vsi_clear_rings(vsi);
9866 i40e_vsi_clear(vsi);
9868 /* If this was the last thing on the VEB, except for the
9869 * controlling VSI, remove the VEB, which puts the controlling
9870 * VSI onto the next level down in the switch.
9872 * Well, okay, there's one more exception here: don't remove
9873 * the orphan VEBs yet. We'll wait for an explicit remove request
9874 * from up the network stack.
9876 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9878 pf->vsi[i]->uplink_seid == uplink_seid &&
9879 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9880 n++; /* count the VSIs */
9883 for (i = 0; i < I40E_MAX_VEB; i++) {
9886 if (pf->veb[i]->uplink_seid == uplink_seid)
9887 n++; /* count the VEBs */
9888 if (pf->veb[i]->seid == uplink_seid)
9891 if (n == 0 && veb && veb->uplink_seid != 0)
9892 i40e_veb_release(veb);
9898 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9899 * @vsi: ptr to the VSI
9901 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9902 * corresponding SW VSI structure and initializes num_queue_pairs for the
9903 * newly allocated VSI.
9905 * Returns 0 on success or negative on failure
9907 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9910 struct i40e_pf *pf = vsi->back;
9912 if (vsi->q_vectors[0]) {
9913 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9918 if (vsi->base_vector) {
9919 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9920 vsi->seid, vsi->base_vector);
9924 ret = i40e_vsi_alloc_q_vectors(vsi);
9926 dev_info(&pf->pdev->dev,
9927 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9928 vsi->num_q_vectors, vsi->seid, ret);
9929 vsi->num_q_vectors = 0;
9930 goto vector_setup_out;
9933 /* In Legacy mode, we do not have to get any other vector since we
9934 * piggyback on the misc/ICR0 for queue interrupts.
9936 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9938 if (vsi->num_q_vectors)
9939 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9940 vsi->num_q_vectors, vsi->idx);
9941 if (vsi->base_vector < 0) {
9942 dev_info(&pf->pdev->dev,
9943 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9944 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9945 i40e_vsi_free_q_vectors(vsi);
9947 goto vector_setup_out;
9955 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9956 * @vsi: pointer to the vsi.
9958 * This re-allocates a vsi's queue resources.
9960 * Returns pointer to the successfully allocated and configured VSI sw struct
9961 * on success, otherwise returns NULL on failure.
9963 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9974 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9975 i40e_vsi_clear_rings(vsi);
9977 i40e_vsi_free_arrays(vsi, false);
9978 i40e_set_num_rings_in_vsi(vsi);
9979 ret = i40e_vsi_alloc_arrays(vsi, false);
9983 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9985 dev_info(&pf->pdev->dev,
9986 "failed to get tracking for %d queues for VSI %d err %d\n",
9987 vsi->alloc_queue_pairs, vsi->seid, ret);
9990 vsi->base_queue = ret;
9992 /* Update the FW view of the VSI. Force a reset of TC and queue
9993 * layout configurations.
9995 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9996 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9997 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9998 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9999 if (vsi->type == I40E_VSI_MAIN)
10000 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
10002 /* assign it some queues */
10003 ret = i40e_alloc_rings(vsi);
10007 /* map all of the rings to the q_vectors */
10008 i40e_vsi_map_rings_to_vectors(vsi);
10012 i40e_vsi_free_q_vectors(vsi);
10013 if (vsi->netdev_registered) {
10014 vsi->netdev_registered = false;
10015 unregister_netdev(vsi->netdev);
10016 free_netdev(vsi->netdev);
10017 vsi->netdev = NULL;
10019 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10021 i40e_vsi_clear(vsi);
10026 * i40e_vsi_setup - Set up a VSI by a given type
10027 * @pf: board private structure
10029 * @uplink_seid: the switch element to link to
10030 * @param1: usage depends upon VSI type. For VF types, indicates VF id
10032 * This allocates the sw VSI structure and its queue resources, then add a VSI
10033 * to the identified VEB.
10035 * Returns pointer to the successfully allocated and configure VSI sw struct on
10036 * success, otherwise returns NULL on failure.
10038 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
10039 u16 uplink_seid, u32 param1)
10041 struct i40e_vsi *vsi = NULL;
10042 struct i40e_veb *veb = NULL;
10046 /* The requested uplink_seid must be either
10047 * - the PF's port seid
10048 * no VEB is needed because this is the PF
10049 * or this is a Flow Director special case VSI
10050 * - seid of an existing VEB
10051 * - seid of a VSI that owns an existing VEB
10052 * - seid of a VSI that doesn't own a VEB
10053 * a new VEB is created and the VSI becomes the owner
10054 * - seid of the PF VSI, which is what creates the first VEB
10055 * this is a special case of the previous
10057 * Find which uplink_seid we were given and create a new VEB if needed
10059 for (i = 0; i < I40E_MAX_VEB; i++) {
10060 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
10066 if (!veb && uplink_seid != pf->mac_seid) {
10068 for (i = 0; i < pf->num_alloc_vsi; i++) {
10069 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
10075 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
10080 if (vsi->uplink_seid == pf->mac_seid)
10081 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
10082 vsi->tc_config.enabled_tc);
10083 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
10084 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
10085 vsi->tc_config.enabled_tc);
10087 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
10088 dev_info(&vsi->back->pdev->dev,
10089 "New VSI creation error, uplink seid of LAN VSI expected.\n");
10092 /* We come up by default in VEPA mode if SRIOV is not
10093 * already enabled, in which case we can't force VEPA
10096 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
10097 veb->bridge_mode = BRIDGE_MODE_VEPA;
10098 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
10100 i40e_config_bridge_mode(veb);
10102 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
10103 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
10107 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
10111 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10112 uplink_seid = veb->seid;
10115 /* get vsi sw struct */
10116 v_idx = i40e_vsi_mem_alloc(pf, type);
10119 vsi = pf->vsi[v_idx];
10123 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
10125 if (type == I40E_VSI_MAIN)
10126 pf->lan_vsi = v_idx;
10127 else if (type == I40E_VSI_SRIOV)
10128 vsi->vf_id = param1;
10129 /* assign it some queues */
10130 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
10133 dev_info(&pf->pdev->dev,
10134 "failed to get tracking for %d queues for VSI %d err=%d\n",
10135 vsi->alloc_queue_pairs, vsi->seid, ret);
10138 vsi->base_queue = ret;
10140 /* get a VSI from the hardware */
10141 vsi->uplink_seid = uplink_seid;
10142 ret = i40e_add_vsi(vsi);
10146 switch (vsi->type) {
10147 /* setup the netdev if needed */
10148 case I40E_VSI_MAIN:
10149 /* Apply relevant filters if a platform-specific mac
10150 * address was selected.
10152 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
10153 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
10155 dev_warn(&pf->pdev->dev,
10156 "could not set up macaddr; err %d\n",
10160 case I40E_VSI_VMDQ2:
10161 case I40E_VSI_FCOE:
10162 ret = i40e_config_netdev(vsi);
10165 ret = register_netdev(vsi->netdev);
10168 vsi->netdev_registered = true;
10169 netif_carrier_off(vsi->netdev);
10170 #ifdef CONFIG_I40E_DCB
10171 /* Setup DCB netlink interface */
10172 i40e_dcbnl_setup(vsi);
10173 #endif /* CONFIG_I40E_DCB */
10176 case I40E_VSI_FDIR:
10177 /* set up vectors and rings if needed */
10178 ret = i40e_vsi_setup_vectors(vsi);
10182 ret = i40e_alloc_rings(vsi);
10186 /* map all of the rings to the q_vectors */
10187 i40e_vsi_map_rings_to_vectors(vsi);
10189 i40e_vsi_reset_stats(vsi);
10193 /* no netdev or rings for the other VSI types */
10197 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
10198 (vsi->type == I40E_VSI_VMDQ2)) {
10199 ret = i40e_vsi_config_rss(vsi);
10204 i40e_vsi_free_q_vectors(vsi);
10206 if (vsi->netdev_registered) {
10207 vsi->netdev_registered = false;
10208 unregister_netdev(vsi->netdev);
10209 free_netdev(vsi->netdev);
10210 vsi->netdev = NULL;
10213 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10215 i40e_vsi_clear(vsi);
10221 * i40e_veb_get_bw_info - Query VEB BW information
10222 * @veb: the veb to query
10224 * Query the Tx scheduler BW configuration data for given VEB
10226 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
10228 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
10229 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
10230 struct i40e_pf *pf = veb->pf;
10231 struct i40e_hw *hw = &pf->hw;
10236 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
10239 dev_info(&pf->pdev->dev,
10240 "query veb bw config failed, err %s aq_err %s\n",
10241 i40e_stat_str(&pf->hw, ret),
10242 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10246 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
10249 dev_info(&pf->pdev->dev,
10250 "query veb bw ets config failed, err %s aq_err %s\n",
10251 i40e_stat_str(&pf->hw, ret),
10252 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10256 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10257 veb->bw_max_quanta = ets_data.tc_bw_max;
10258 veb->is_abs_credits = bw_data.absolute_credits_enable;
10259 veb->enabled_tc = ets_data.tc_valid_bits;
10260 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10261 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10262 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10263 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10264 veb->bw_tc_limit_credits[i] =
10265 le16_to_cpu(bw_data.tc_bw_limits[i]);
10266 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10274 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10275 * @pf: board private structure
10277 * On error: returns error code (negative)
10278 * On success: returns vsi index in PF (positive)
10280 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10283 struct i40e_veb *veb;
10286 /* Need to protect the allocation of switch elements at the PF level */
10287 mutex_lock(&pf->switch_mutex);
10289 /* VEB list may be fragmented if VEB creation/destruction has
10290 * been happening. We can afford to do a quick scan to look
10291 * for any free slots in the list.
10293 * find next empty veb slot, looping back around if necessary
10296 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10298 if (i >= I40E_MAX_VEB) {
10300 goto err_alloc_veb; /* out of VEB slots! */
10303 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10306 goto err_alloc_veb;
10310 veb->enabled_tc = 1;
10315 mutex_unlock(&pf->switch_mutex);
10320 * i40e_switch_branch_release - Delete a branch of the switch tree
10321 * @branch: where to start deleting
10323 * This uses recursion to find the tips of the branch to be
10324 * removed, deleting until we get back to and can delete this VEB.
10326 static void i40e_switch_branch_release(struct i40e_veb *branch)
10328 struct i40e_pf *pf = branch->pf;
10329 u16 branch_seid = branch->seid;
10330 u16 veb_idx = branch->idx;
10333 /* release any VEBs on this VEB - RECURSION */
10334 for (i = 0; i < I40E_MAX_VEB; i++) {
10337 if (pf->veb[i]->uplink_seid == branch->seid)
10338 i40e_switch_branch_release(pf->veb[i]);
10341 /* Release the VSIs on this VEB, but not the owner VSI.
10343 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10344 * the VEB itself, so don't use (*branch) after this loop.
10346 for (i = 0; i < pf->num_alloc_vsi; i++) {
10349 if (pf->vsi[i]->uplink_seid == branch_seid &&
10350 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10351 i40e_vsi_release(pf->vsi[i]);
10355 /* There's one corner case where the VEB might not have been
10356 * removed, so double check it here and remove it if needed.
10357 * This case happens if the veb was created from the debugfs
10358 * commands and no VSIs were added to it.
10360 if (pf->veb[veb_idx])
10361 i40e_veb_release(pf->veb[veb_idx]);
10365 * i40e_veb_clear - remove veb struct
10366 * @veb: the veb to remove
10368 static void i40e_veb_clear(struct i40e_veb *veb)
10374 struct i40e_pf *pf = veb->pf;
10376 mutex_lock(&pf->switch_mutex);
10377 if (pf->veb[veb->idx] == veb)
10378 pf->veb[veb->idx] = NULL;
10379 mutex_unlock(&pf->switch_mutex);
10386 * i40e_veb_release - Delete a VEB and free its resources
10387 * @veb: the VEB being removed
10389 void i40e_veb_release(struct i40e_veb *veb)
10391 struct i40e_vsi *vsi = NULL;
10392 struct i40e_pf *pf;
10397 /* find the remaining VSI and check for extras */
10398 for (i = 0; i < pf->num_alloc_vsi; i++) {
10399 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10405 dev_info(&pf->pdev->dev,
10406 "can't remove VEB %d with %d VSIs left\n",
10411 /* move the remaining VSI to uplink veb */
10412 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10413 if (veb->uplink_seid) {
10414 vsi->uplink_seid = veb->uplink_seid;
10415 if (veb->uplink_seid == pf->mac_seid)
10416 vsi->veb_idx = I40E_NO_VEB;
10418 vsi->veb_idx = veb->veb_idx;
10421 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10422 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10425 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10426 i40e_veb_clear(veb);
10430 * i40e_add_veb - create the VEB in the switch
10431 * @veb: the VEB to be instantiated
10432 * @vsi: the controlling VSI
10434 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10436 struct i40e_pf *pf = veb->pf;
10437 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10440 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10441 veb->enabled_tc, false,
10442 &veb->seid, enable_stats, NULL);
10444 /* get a VEB from the hardware */
10446 dev_info(&pf->pdev->dev,
10447 "couldn't add VEB, err %s aq_err %s\n",
10448 i40e_stat_str(&pf->hw, ret),
10449 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10453 /* get statistics counter */
10454 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10455 &veb->stats_idx, NULL, NULL, NULL);
10457 dev_info(&pf->pdev->dev,
10458 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10459 i40e_stat_str(&pf->hw, ret),
10460 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10463 ret = i40e_veb_get_bw_info(veb);
10465 dev_info(&pf->pdev->dev,
10466 "couldn't get VEB bw info, err %s aq_err %s\n",
10467 i40e_stat_str(&pf->hw, ret),
10468 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10469 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10473 vsi->uplink_seid = veb->seid;
10474 vsi->veb_idx = veb->idx;
10475 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10481 * i40e_veb_setup - Set up a VEB
10482 * @pf: board private structure
10483 * @flags: VEB setup flags
10484 * @uplink_seid: the switch element to link to
10485 * @vsi_seid: the initial VSI seid
10486 * @enabled_tc: Enabled TC bit-map
10488 * This allocates the sw VEB structure and links it into the switch
10489 * It is possible and legal for this to be a duplicate of an already
10490 * existing VEB. It is also possible for both uplink and vsi seids
10491 * to be zero, in order to create a floating VEB.
10493 * Returns pointer to the successfully allocated VEB sw struct on
10494 * success, otherwise returns NULL on failure.
10496 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10497 u16 uplink_seid, u16 vsi_seid,
10500 struct i40e_veb *veb, *uplink_veb = NULL;
10501 int vsi_idx, veb_idx;
10504 /* if one seid is 0, the other must be 0 to create a floating relay */
10505 if ((uplink_seid == 0 || vsi_seid == 0) &&
10506 (uplink_seid + vsi_seid != 0)) {
10507 dev_info(&pf->pdev->dev,
10508 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10509 uplink_seid, vsi_seid);
10513 /* make sure there is such a vsi and uplink */
10514 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10515 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10517 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10518 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10523 if (uplink_seid && uplink_seid != pf->mac_seid) {
10524 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10525 if (pf->veb[veb_idx] &&
10526 pf->veb[veb_idx]->seid == uplink_seid) {
10527 uplink_veb = pf->veb[veb_idx];
10532 dev_info(&pf->pdev->dev,
10533 "uplink seid %d not found\n", uplink_seid);
10538 /* get veb sw struct */
10539 veb_idx = i40e_veb_mem_alloc(pf);
10542 veb = pf->veb[veb_idx];
10543 veb->flags = flags;
10544 veb->uplink_seid = uplink_seid;
10545 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10546 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10548 /* create the VEB in the switch */
10549 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10552 if (vsi_idx == pf->lan_vsi)
10553 pf->lan_veb = veb->idx;
10558 i40e_veb_clear(veb);
10564 * i40e_setup_pf_switch_element - set PF vars based on switch type
10565 * @pf: board private structure
10566 * @ele: element we are building info from
10567 * @num_reported: total number of elements
10568 * @printconfig: should we print the contents
10570 * helper function to assist in extracting a few useful SEID values.
10572 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10573 struct i40e_aqc_switch_config_element_resp *ele,
10574 u16 num_reported, bool printconfig)
10576 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10577 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10578 u8 element_type = ele->element_type;
10579 u16 seid = le16_to_cpu(ele->seid);
10582 dev_info(&pf->pdev->dev,
10583 "type=%d seid=%d uplink=%d downlink=%d\n",
10584 element_type, seid, uplink_seid, downlink_seid);
10586 switch (element_type) {
10587 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10588 pf->mac_seid = seid;
10590 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10592 if (uplink_seid != pf->mac_seid)
10594 if (pf->lan_veb == I40E_NO_VEB) {
10597 /* find existing or else empty VEB */
10598 for (v = 0; v < I40E_MAX_VEB; v++) {
10599 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10604 if (pf->lan_veb == I40E_NO_VEB) {
10605 v = i40e_veb_mem_alloc(pf);
10612 pf->veb[pf->lan_veb]->seid = seid;
10613 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10614 pf->veb[pf->lan_veb]->pf = pf;
10615 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10617 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10618 if (num_reported != 1)
10620 /* This is immediately after a reset so we can assume this is
10623 pf->mac_seid = uplink_seid;
10624 pf->pf_seid = downlink_seid;
10625 pf->main_vsi_seid = seid;
10627 dev_info(&pf->pdev->dev,
10628 "pf_seid=%d main_vsi_seid=%d\n",
10629 pf->pf_seid, pf->main_vsi_seid);
10631 case I40E_SWITCH_ELEMENT_TYPE_PF:
10632 case I40E_SWITCH_ELEMENT_TYPE_VF:
10633 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10634 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10635 case I40E_SWITCH_ELEMENT_TYPE_PE:
10636 case I40E_SWITCH_ELEMENT_TYPE_PA:
10637 /* ignore these for now */
10640 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10641 element_type, seid);
10647 * i40e_fetch_switch_configuration - Get switch config from firmware
10648 * @pf: board private structure
10649 * @printconfig: should we print the contents
10651 * Get the current switch configuration from the device and
10652 * extract a few useful SEID values.
10654 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10656 struct i40e_aqc_get_switch_config_resp *sw_config;
10662 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10666 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10668 u16 num_reported, num_total;
10670 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10674 dev_info(&pf->pdev->dev,
10675 "get switch config failed err %s aq_err %s\n",
10676 i40e_stat_str(&pf->hw, ret),
10677 i40e_aq_str(&pf->hw,
10678 pf->hw.aq.asq_last_status));
10683 num_reported = le16_to_cpu(sw_config->header.num_reported);
10684 num_total = le16_to_cpu(sw_config->header.num_total);
10687 dev_info(&pf->pdev->dev,
10688 "header: %d reported %d total\n",
10689 num_reported, num_total);
10691 for (i = 0; i < num_reported; i++) {
10692 struct i40e_aqc_switch_config_element_resp *ele =
10693 &sw_config->element[i];
10695 i40e_setup_pf_switch_element(pf, ele, num_reported,
10698 } while (next_seid != 0);
10705 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10706 * @pf: board private structure
10707 * @reinit: if the Main VSI needs to re-initialized.
10709 * Returns 0 on success, negative value on failure
10711 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10716 /* find out what's out there already */
10717 ret = i40e_fetch_switch_configuration(pf, false);
10719 dev_info(&pf->pdev->dev,
10720 "couldn't fetch switch config, err %s aq_err %s\n",
10721 i40e_stat_str(&pf->hw, ret),
10722 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10725 i40e_pf_reset_stats(pf);
10727 /* set the switch config bit for the whole device to
10728 * support limited promisc or true promisc
10729 * when user requests promisc. The default is limited
10733 if ((pf->hw.pf_id == 0) &&
10734 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10735 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10737 if (pf->hw.pf_id == 0) {
10740 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10741 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10743 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10744 dev_info(&pf->pdev->dev,
10745 "couldn't set switch config bits, err %s aq_err %s\n",
10746 i40e_stat_str(&pf->hw, ret),
10747 i40e_aq_str(&pf->hw,
10748 pf->hw.aq.asq_last_status));
10749 /* not a fatal problem, just keep going */
10753 /* first time setup */
10754 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10755 struct i40e_vsi *vsi = NULL;
10758 /* Set up the PF VSI associated with the PF's main VSI
10759 * that is already in the HW switch
10761 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10762 uplink_seid = pf->veb[pf->lan_veb]->seid;
10764 uplink_seid = pf->mac_seid;
10765 if (pf->lan_vsi == I40E_NO_VSI)
10766 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10768 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10770 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10771 i40e_fdir_teardown(pf);
10775 /* force a reset of TC and queue layout configurations */
10776 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10778 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10779 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10780 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10782 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10784 i40e_fdir_sb_setup(pf);
10786 /* Setup static PF queue filter control settings */
10787 ret = i40e_setup_pf_filter_control(pf);
10789 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10791 /* Failure here should not stop continuing other steps */
10794 /* enable RSS in the HW, even for only one queue, as the stack can use
10797 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10798 i40e_pf_config_rss(pf);
10800 /* fill in link information and enable LSE reporting */
10801 i40e_link_event(pf);
10803 /* Initialize user-specific link properties */
10804 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10805 I40E_AQ_AN_COMPLETED) ? true : false);
10813 * i40e_determine_queue_usage - Work out queue distribution
10814 * @pf: board private structure
10816 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10820 pf->num_lan_qps = 0;
10822 pf->num_fcoe_qps = 0;
10825 /* Find the max queues to be put into basic use. We'll always be
10826 * using TC0, whether or not DCB is running, and TC0 will get the
10829 queues_left = pf->hw.func_caps.num_tx_qp;
10831 if ((queues_left == 1) ||
10832 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10833 /* one qp for PF, no queues for anything else */
10835 pf->alloc_rss_size = pf->num_lan_qps = 1;
10837 /* make sure all the fancies are disabled */
10838 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10839 I40E_FLAG_IWARP_ENABLED |
10841 I40E_FLAG_FCOE_ENABLED |
10843 I40E_FLAG_FD_SB_ENABLED |
10844 I40E_FLAG_FD_ATR_ENABLED |
10845 I40E_FLAG_DCB_CAPABLE |
10846 I40E_FLAG_DCB_ENABLED |
10847 I40E_FLAG_SRIOV_ENABLED |
10848 I40E_FLAG_VMDQ_ENABLED);
10849 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10850 I40E_FLAG_FD_SB_ENABLED |
10851 I40E_FLAG_FD_ATR_ENABLED |
10852 I40E_FLAG_DCB_CAPABLE))) {
10853 /* one qp for PF */
10854 pf->alloc_rss_size = pf->num_lan_qps = 1;
10855 queues_left -= pf->num_lan_qps;
10857 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10858 I40E_FLAG_IWARP_ENABLED |
10860 I40E_FLAG_FCOE_ENABLED |
10862 I40E_FLAG_FD_SB_ENABLED |
10863 I40E_FLAG_FD_ATR_ENABLED |
10864 I40E_FLAG_DCB_ENABLED |
10865 I40E_FLAG_VMDQ_ENABLED);
10867 /* Not enough queues for all TCs */
10868 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10869 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10870 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10871 I40E_FLAG_DCB_ENABLED);
10872 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10874 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10875 num_online_cpus());
10876 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10877 pf->hw.func_caps.num_tx_qp);
10879 queues_left -= pf->num_lan_qps;
10883 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10884 if (I40E_DEFAULT_FCOE <= queues_left) {
10885 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10886 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10887 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10889 pf->num_fcoe_qps = 0;
10890 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10891 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10894 queues_left -= pf->num_fcoe_qps;
10898 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10899 if (queues_left > 1) {
10900 queues_left -= 1; /* save 1 queue for FD */
10902 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10903 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10907 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10908 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10909 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10910 (queues_left / pf->num_vf_qps));
10911 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10914 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10915 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10916 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10917 (queues_left / pf->num_vmdq_qps));
10918 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10921 pf->queues_left = queues_left;
10922 dev_dbg(&pf->pdev->dev,
10923 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10924 pf->hw.func_caps.num_tx_qp,
10925 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10926 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10927 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10930 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10935 * i40e_setup_pf_filter_control - Setup PF static filter control
10936 * @pf: PF to be setup
10938 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10939 * settings. If PE/FCoE are enabled then it will also set the per PF
10940 * based filter sizes required for them. It also enables Flow director,
10941 * ethertype and macvlan type filter settings for the pf.
10943 * Returns 0 on success, negative on failure
10945 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10947 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10949 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10951 /* Flow Director is enabled */
10952 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10953 settings->enable_fdir = true;
10955 /* Ethtype and MACVLAN filters enabled for PF */
10956 settings->enable_ethtype = true;
10957 settings->enable_macvlan = true;
10959 if (i40e_set_filter_control(&pf->hw, settings))
10965 #define INFO_STRING_LEN 255
10966 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10967 static void i40e_print_features(struct i40e_pf *pf)
10969 struct i40e_hw *hw = &pf->hw;
10973 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10977 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10978 #ifdef CONFIG_PCI_IOV
10979 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10981 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10982 pf->hw.func_caps.num_vsis,
10983 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10984 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10985 i += snprintf(&buf[i], REMAIN(i), " RSS");
10986 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10987 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10988 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10989 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10990 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10992 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10993 i += snprintf(&buf[i], REMAIN(i), " DCB");
10994 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10995 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10996 if (pf->flags & I40E_FLAG_PTP)
10997 i += snprintf(&buf[i], REMAIN(i), " PTP");
10999 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
11000 i += snprintf(&buf[i], REMAIN(i), " FCOE");
11002 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
11003 i += snprintf(&buf[i], REMAIN(i), " VEB");
11005 i += snprintf(&buf[i], REMAIN(i), " VEPA");
11007 dev_info(&pf->pdev->dev, "%s\n", buf);
11009 WARN_ON(i > INFO_STRING_LEN);
11013 * i40e_get_platform_mac_addr - get platform-specific MAC address
11015 * @pdev: PCI device information struct
11016 * @pf: board private structure
11018 * Look up the MAC address in Open Firmware on systems that support it,
11019 * and use IDPROM on SPARC if no OF address is found. On return, the
11020 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
11021 * has been selected.
11023 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
11025 pf->flags &= ~I40E_FLAG_PF_MAC;
11026 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
11027 pf->flags |= I40E_FLAG_PF_MAC;
11031 * i40e_probe - Device initialization routine
11032 * @pdev: PCI device information struct
11033 * @ent: entry in i40e_pci_tbl
11035 * i40e_probe initializes a PF identified by a pci_dev structure.
11036 * The OS initialization, configuring of the PF private structure,
11037 * and a hardware reset occur.
11039 * Returns 0 on success, negative on failure
11041 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
11043 struct i40e_aq_get_phy_abilities_resp abilities;
11044 struct i40e_pf *pf;
11045 struct i40e_hw *hw;
11046 static u16 pfs_found;
11054 err = pci_enable_device_mem(pdev);
11058 /* set up for high or low dma */
11059 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11061 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11063 dev_err(&pdev->dev,
11064 "DMA configuration failed: 0x%x\n", err);
11069 /* set up pci connections */
11070 err = pci_request_mem_regions(pdev, i40e_driver_name);
11072 dev_info(&pdev->dev,
11073 "pci_request_selected_regions failed %d\n", err);
11077 pci_enable_pcie_error_reporting(pdev);
11078 pci_set_master(pdev);
11080 /* Now that we have a PCI connection, we need to do the
11081 * low level device setup. This is primarily setting up
11082 * the Admin Queue structures and then querying for the
11083 * device's current profile information.
11085 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
11092 set_bit(__I40E_DOWN, &pf->state);
11097 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
11098 I40E_MAX_CSR_SPACE);
11100 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
11101 if (!hw->hw_addr) {
11103 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
11104 (unsigned int)pci_resource_start(pdev, 0),
11105 pf->ioremap_len, err);
11108 hw->vendor_id = pdev->vendor;
11109 hw->device_id = pdev->device;
11110 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
11111 hw->subsystem_vendor_id = pdev->subsystem_vendor;
11112 hw->subsystem_device_id = pdev->subsystem_device;
11113 hw->bus.device = PCI_SLOT(pdev->devfn);
11114 hw->bus.func = PCI_FUNC(pdev->devfn);
11115 hw->bus.bus_id = pdev->bus->number;
11116 pf->instance = pfs_found;
11118 /* set up the locks for the AQ, do this only once in probe
11119 * and destroy them only once in remove
11121 mutex_init(&hw->aq.asq_mutex);
11122 mutex_init(&hw->aq.arq_mutex);
11124 pf->msg_enable = netif_msg_init(debug,
11129 pf->hw.debug_mask = debug;
11131 /* do a special CORER for clearing PXE mode once at init */
11132 if (hw->revision_id == 0 &&
11133 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
11134 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
11139 i40e_clear_pxe_mode(hw);
11142 /* Reset here to make sure all is clean and to define PF 'n' */
11144 err = i40e_pf_reset(hw);
11146 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
11151 hw->aq.num_arq_entries = I40E_AQ_LEN;
11152 hw->aq.num_asq_entries = I40E_AQ_LEN;
11153 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11154 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11155 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
11157 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
11159 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
11161 err = i40e_init_shared_code(hw);
11163 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
11168 /* set up a default setting for link flow control */
11169 pf->hw.fc.requested_mode = I40E_FC_NONE;
11171 err = i40e_init_adminq(hw);
11173 if (err == I40E_ERR_FIRMWARE_API_VERSION)
11174 dev_info(&pdev->dev,
11175 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
11177 dev_info(&pdev->dev,
11178 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
11183 /* provide nvm, fw, api versions */
11184 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
11185 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
11186 hw->aq.api_maj_ver, hw->aq.api_min_ver,
11187 i40e_nvm_version_str(hw));
11189 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
11190 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
11191 dev_info(&pdev->dev,
11192 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
11193 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
11194 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
11195 dev_info(&pdev->dev,
11196 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
11198 i40e_verify_eeprom(pf);
11200 /* Rev 0 hardware was never productized */
11201 if (hw->revision_id < 1)
11202 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
11204 i40e_clear_pxe_mode(hw);
11205 err = i40e_get_capabilities(pf);
11207 goto err_adminq_setup;
11209 err = i40e_sw_init(pf);
11211 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
11215 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
11216 hw->func_caps.num_rx_qp,
11217 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
11219 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
11220 goto err_init_lan_hmc;
11223 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
11225 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
11227 goto err_configure_lan_hmc;
11230 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
11231 * Ignore error return codes because if it was already disabled via
11232 * hardware settings this will fail
11234 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
11235 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
11236 i40e_aq_stop_lldp(hw, true, NULL);
11239 i40e_get_mac_addr(hw, hw->mac.addr);
11240 /* allow a platform config to override the HW addr */
11241 i40e_get_platform_mac_addr(pdev, pf);
11242 if (!is_valid_ether_addr(hw->mac.addr)) {
11243 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
11247 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
11248 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
11249 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
11250 if (is_valid_ether_addr(hw->mac.port_addr))
11251 pf->flags |= I40E_FLAG_PORT_ID_VALID;
11253 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
11255 dev_info(&pdev->dev,
11256 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
11257 if (!is_valid_ether_addr(hw->mac.san_addr)) {
11258 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
11260 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
11262 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
11263 #endif /* I40E_FCOE */
11265 pci_set_drvdata(pdev, pf);
11266 pci_save_state(pdev);
11267 #ifdef CONFIG_I40E_DCB
11268 err = i40e_init_pf_dcb(pf);
11270 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
11271 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
11272 /* Continue without DCB enabled */
11274 #endif /* CONFIG_I40E_DCB */
11276 /* set up periodic task facility */
11277 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11278 pf->service_timer_period = HZ;
11280 INIT_WORK(&pf->service_task, i40e_service_task);
11281 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11282 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
11284 /* NVM bit on means WoL disabled for the port */
11285 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11286 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11287 pf->wol_en = false;
11290 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11292 /* set up the main switch operations */
11293 i40e_determine_queue_usage(pf);
11294 err = i40e_init_interrupt_scheme(pf);
11296 goto err_switch_setup;
11298 /* The number of VSIs reported by the FW is the minimum guaranteed
11299 * to us; HW supports far more and we share the remaining pool with
11300 * the other PFs. We allocate space for more than the guarantee with
11301 * the understanding that we might not get them all later.
11303 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11304 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11306 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11308 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11309 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11313 goto err_switch_setup;
11316 #ifdef CONFIG_PCI_IOV
11317 /* prep for VF support */
11318 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11319 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11320 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11321 if (pci_num_vf(pdev))
11322 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11325 err = i40e_setup_pf_switch(pf, false);
11327 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11331 /* Make sure flow control is set according to current settings */
11332 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11333 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11334 dev_dbg(&pf->pdev->dev,
11335 "Set fc with err %s aq_err %s on get_phy_cap\n",
11336 i40e_stat_str(hw, err),
11337 i40e_aq_str(hw, hw->aq.asq_last_status));
11338 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11339 dev_dbg(&pf->pdev->dev,
11340 "Set fc with err %s aq_err %s on set_phy_config\n",
11341 i40e_stat_str(hw, err),
11342 i40e_aq_str(hw, hw->aq.asq_last_status));
11343 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11344 dev_dbg(&pf->pdev->dev,
11345 "Set fc with err %s aq_err %s on get_link_info\n",
11346 i40e_stat_str(hw, err),
11347 i40e_aq_str(hw, hw->aq.asq_last_status));
11349 /* if FDIR VSI was set up, start it now */
11350 for (i = 0; i < pf->num_alloc_vsi; i++) {
11351 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11352 i40e_vsi_open(pf->vsi[i]);
11357 /* The driver only wants link up/down and module qualification
11358 * reports from firmware. Note the negative logic.
11360 err = i40e_aq_set_phy_int_mask(&pf->hw,
11361 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11362 I40E_AQ_EVENT_MEDIA_NA |
11363 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11365 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11366 i40e_stat_str(&pf->hw, err),
11367 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11369 /* Reconfigure hardware for allowing smaller MSS in the case
11370 * of TSO, so that we avoid the MDD being fired and causing
11371 * a reset in the case of small MSS+TSO.
11373 val = rd32(hw, I40E_REG_MSS);
11374 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11375 val &= ~I40E_REG_MSS_MIN_MASK;
11376 val |= I40E_64BYTE_MSS;
11377 wr32(hw, I40E_REG_MSS, val);
11380 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11382 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11384 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11385 i40e_stat_str(&pf->hw, err),
11386 i40e_aq_str(&pf->hw,
11387 pf->hw.aq.asq_last_status));
11389 /* The main driver is (mostly) up and happy. We need to set this state
11390 * before setting up the misc vector or we get a race and the vector
11391 * ends up disabled forever.
11393 clear_bit(__I40E_DOWN, &pf->state);
11395 /* In case of MSIX we are going to setup the misc vector right here
11396 * to handle admin queue events etc. In case of legacy and MSI
11397 * the misc functionality and queue processing is combined in
11398 * the same vector and that gets setup at open.
11400 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11401 err = i40e_setup_misc_vector(pf);
11403 dev_info(&pdev->dev,
11404 "setup of misc vector failed: %d\n", err);
11409 #ifdef CONFIG_PCI_IOV
11410 /* prep for VF support */
11411 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11412 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11413 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11414 /* disable link interrupts for VFs */
11415 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11416 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11417 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11420 if (pci_num_vf(pdev)) {
11421 dev_info(&pdev->dev,
11422 "Active VFs found, allocating resources.\n");
11423 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11425 dev_info(&pdev->dev,
11426 "Error %d allocating resources for existing VFs\n",
11430 #endif /* CONFIG_PCI_IOV */
11432 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11433 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11434 pf->num_iwarp_msix,
11435 I40E_IWARP_IRQ_PILE_ID);
11436 if (pf->iwarp_base_vector < 0) {
11437 dev_info(&pdev->dev,
11438 "failed to get tracking for %d vectors for IWARP err=%d\n",
11439 pf->num_iwarp_msix, pf->iwarp_base_vector);
11440 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11444 i40e_dbg_pf_init(pf);
11446 /* tell the firmware that we're starting */
11447 i40e_send_version(pf);
11449 /* since everything's happy, start the service_task timer */
11450 mod_timer(&pf->service_timer,
11451 round_jiffies(jiffies + pf->service_timer_period));
11453 /* add this PF to client device list and launch a client service task */
11454 err = i40e_lan_add_device(pf);
11456 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11460 /* create FCoE interface */
11461 i40e_fcoe_vsi_setup(pf);
11464 #define PCI_SPEED_SIZE 8
11465 #define PCI_WIDTH_SIZE 8
11466 /* Devices on the IOSF bus do not have this information
11467 * and will report PCI Gen 1 x 1 by default so don't bother
11470 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11471 char speed[PCI_SPEED_SIZE] = "Unknown";
11472 char width[PCI_WIDTH_SIZE] = "Unknown";
11474 /* Get the negotiated link width and speed from PCI config
11477 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11480 i40e_set_pci_config_data(hw, link_status);
11482 switch (hw->bus.speed) {
11483 case i40e_bus_speed_8000:
11484 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11485 case i40e_bus_speed_5000:
11486 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11487 case i40e_bus_speed_2500:
11488 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11492 switch (hw->bus.width) {
11493 case i40e_bus_width_pcie_x8:
11494 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11495 case i40e_bus_width_pcie_x4:
11496 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11497 case i40e_bus_width_pcie_x2:
11498 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11499 case i40e_bus_width_pcie_x1:
11500 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11505 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11508 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11509 hw->bus.speed < i40e_bus_speed_8000) {
11510 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11511 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11515 /* get the requested speeds from the fw */
11516 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11518 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11519 i40e_stat_str(&pf->hw, err),
11520 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11521 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11523 /* get the supported phy types from the fw */
11524 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11526 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11527 i40e_stat_str(&pf->hw, err),
11528 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11530 /* Add a filter to drop all Flow control frames from any VSI from being
11531 * transmitted. By doing so we stop a malicious VF from sending out
11532 * PAUSE or PFC frames and potentially controlling traffic for other
11534 * The FW can still send Flow control frames if enabled.
11536 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11537 pf->main_vsi_seid);
11539 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11540 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11541 pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS;
11542 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
11543 pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER;
11544 /* print a string summarizing features */
11545 i40e_print_features(pf);
11549 /* Unwind what we've done if something failed in the setup */
11551 set_bit(__I40E_DOWN, &pf->state);
11552 i40e_clear_interrupt_scheme(pf);
11555 i40e_reset_interrupt_capability(pf);
11556 del_timer_sync(&pf->service_timer);
11558 err_configure_lan_hmc:
11559 (void)i40e_shutdown_lan_hmc(hw);
11561 kfree(pf->qp_pile);
11565 iounmap(hw->hw_addr);
11569 pci_disable_pcie_error_reporting(pdev);
11570 pci_release_mem_regions(pdev);
11573 pci_disable_device(pdev);
11578 * i40e_remove - Device removal routine
11579 * @pdev: PCI device information struct
11581 * i40e_remove is called by the PCI subsystem to alert the driver
11582 * that is should release a PCI device. This could be caused by a
11583 * Hot-Plug event, or because the driver is going to be removed from
11586 static void i40e_remove(struct pci_dev *pdev)
11588 struct i40e_pf *pf = pci_get_drvdata(pdev);
11589 struct i40e_hw *hw = &pf->hw;
11590 i40e_status ret_code;
11593 i40e_dbg_pf_exit(pf);
11597 /* Disable RSS in hw */
11598 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11599 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11601 /* no more scheduling of any task */
11602 set_bit(__I40E_SUSPENDED, &pf->state);
11603 set_bit(__I40E_DOWN, &pf->state);
11604 if (pf->service_timer.data)
11605 del_timer_sync(&pf->service_timer);
11606 if (pf->service_task.func)
11607 cancel_work_sync(&pf->service_task);
11609 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11611 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11614 i40e_fdir_teardown(pf);
11616 /* If there is a switch structure or any orphans, remove them.
11617 * This will leave only the PF's VSI remaining.
11619 for (i = 0; i < I40E_MAX_VEB; i++) {
11623 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11624 pf->veb[i]->uplink_seid == 0)
11625 i40e_switch_branch_release(pf->veb[i]);
11628 /* Now we can shutdown the PF's VSI, just before we kill
11631 if (pf->vsi[pf->lan_vsi])
11632 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11634 /* remove attached clients */
11635 ret_code = i40e_lan_del_device(pf);
11637 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11641 /* shutdown and destroy the HMC */
11642 if (hw->hmc.hmc_obj) {
11643 ret_code = i40e_shutdown_lan_hmc(hw);
11645 dev_warn(&pdev->dev,
11646 "Failed to destroy the HMC resources: %d\n",
11650 /* shutdown the adminq */
11651 i40e_shutdown_adminq(hw);
11653 /* destroy the locks only once, here */
11654 mutex_destroy(&hw->aq.arq_mutex);
11655 mutex_destroy(&hw->aq.asq_mutex);
11657 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11658 i40e_clear_interrupt_scheme(pf);
11659 for (i = 0; i < pf->num_alloc_vsi; i++) {
11661 i40e_vsi_clear_rings(pf->vsi[i]);
11662 i40e_vsi_clear(pf->vsi[i]);
11667 for (i = 0; i < I40E_MAX_VEB; i++) {
11672 kfree(pf->qp_pile);
11675 iounmap(hw->hw_addr);
11677 pci_release_mem_regions(pdev);
11679 pci_disable_pcie_error_reporting(pdev);
11680 pci_disable_device(pdev);
11684 * i40e_pci_error_detected - warning that something funky happened in PCI land
11685 * @pdev: PCI device information struct
11687 * Called to warn that something happened and the error handling steps
11688 * are in progress. Allows the driver to quiesce things, be ready for
11691 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11692 enum pci_channel_state error)
11694 struct i40e_pf *pf = pci_get_drvdata(pdev);
11696 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11699 dev_info(&pdev->dev,
11700 "Cannot recover - error happened during device probe\n");
11701 return PCI_ERS_RESULT_DISCONNECT;
11704 /* shutdown all operations */
11705 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11707 i40e_prep_for_reset(pf);
11711 /* Request a slot reset */
11712 return PCI_ERS_RESULT_NEED_RESET;
11716 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11717 * @pdev: PCI device information struct
11719 * Called to find if the driver can work with the device now that
11720 * the pci slot has been reset. If a basic connection seems good
11721 * (registers are readable and have sane content) then return a
11722 * happy little PCI_ERS_RESULT_xxx.
11724 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11726 struct i40e_pf *pf = pci_get_drvdata(pdev);
11727 pci_ers_result_t result;
11731 dev_dbg(&pdev->dev, "%s\n", __func__);
11732 if (pci_enable_device_mem(pdev)) {
11733 dev_info(&pdev->dev,
11734 "Cannot re-enable PCI device after reset.\n");
11735 result = PCI_ERS_RESULT_DISCONNECT;
11737 pci_set_master(pdev);
11738 pci_restore_state(pdev);
11739 pci_save_state(pdev);
11740 pci_wake_from_d3(pdev, false);
11742 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11744 result = PCI_ERS_RESULT_RECOVERED;
11746 result = PCI_ERS_RESULT_DISCONNECT;
11749 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11751 dev_info(&pdev->dev,
11752 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11754 /* non-fatal, continue */
11761 * i40e_pci_error_resume - restart operations after PCI error recovery
11762 * @pdev: PCI device information struct
11764 * Called to allow the driver to bring things back up after PCI error
11765 * and/or reset recovery has finished.
11767 static void i40e_pci_error_resume(struct pci_dev *pdev)
11769 struct i40e_pf *pf = pci_get_drvdata(pdev);
11771 dev_dbg(&pdev->dev, "%s\n", __func__);
11772 if (test_bit(__I40E_SUSPENDED, &pf->state))
11776 i40e_handle_reset_warning(pf);
11781 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
11782 * using the mac_address_write admin q function
11783 * @pf: pointer to i40e_pf struct
11785 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
11787 struct i40e_hw *hw = &pf->hw;
11792 /* Get current MAC address in case it's an LAA */
11793 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
11794 ether_addr_copy(mac_addr,
11795 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
11797 dev_err(&pf->pdev->dev,
11798 "Failed to retrieve MAC address; using default\n");
11799 ether_addr_copy(mac_addr, hw->mac.addr);
11802 /* The FW expects the mac address write cmd to first be called with
11803 * one of these flags before calling it again with the multicast
11806 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
11808 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
11809 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
11811 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11813 dev_err(&pf->pdev->dev,
11814 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
11818 flags = I40E_AQC_MC_MAG_EN
11819 | I40E_AQC_WOL_PRESERVE_ON_PFR
11820 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
11821 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11823 dev_err(&pf->pdev->dev,
11824 "Failed to enable Multicast Magic Packet wake up\n");
11828 * i40e_shutdown - PCI callback for shutting down
11829 * @pdev: PCI device information struct
11831 static void i40e_shutdown(struct pci_dev *pdev)
11833 struct i40e_pf *pf = pci_get_drvdata(pdev);
11834 struct i40e_hw *hw = &pf->hw;
11836 set_bit(__I40E_SUSPENDED, &pf->state);
11837 set_bit(__I40E_DOWN, &pf->state);
11839 i40e_prep_for_reset(pf);
11842 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11843 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11845 del_timer_sync(&pf->service_timer);
11846 cancel_work_sync(&pf->service_task);
11847 i40e_fdir_teardown(pf);
11849 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11850 i40e_enable_mc_magic_wake(pf);
11853 i40e_prep_for_reset(pf);
11856 wr32(hw, I40E_PFPM_APM,
11857 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11858 wr32(hw, I40E_PFPM_WUFC,
11859 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11861 i40e_clear_interrupt_scheme(pf);
11863 if (system_state == SYSTEM_POWER_OFF) {
11864 pci_wake_from_d3(pdev, pf->wol_en);
11865 pci_set_power_state(pdev, PCI_D3hot);
11871 * i40e_suspend - PCI callback for moving to D3
11872 * @pdev: PCI device information struct
11874 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11876 struct i40e_pf *pf = pci_get_drvdata(pdev);
11877 struct i40e_hw *hw = &pf->hw;
11880 set_bit(__I40E_SUSPENDED, &pf->state);
11881 set_bit(__I40E_DOWN, &pf->state);
11883 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11884 i40e_enable_mc_magic_wake(pf);
11887 i40e_prep_for_reset(pf);
11890 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11891 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11893 i40e_stop_misc_vector(pf);
11895 retval = pci_save_state(pdev);
11899 pci_wake_from_d3(pdev, pf->wol_en);
11900 pci_set_power_state(pdev, PCI_D3hot);
11906 * i40e_resume - PCI callback for waking up from D3
11907 * @pdev: PCI device information struct
11909 static int i40e_resume(struct pci_dev *pdev)
11911 struct i40e_pf *pf = pci_get_drvdata(pdev);
11914 pci_set_power_state(pdev, PCI_D0);
11915 pci_restore_state(pdev);
11916 /* pci_restore_state() clears dev->state_saves, so
11917 * call pci_save_state() again to restore it.
11919 pci_save_state(pdev);
11921 err = pci_enable_device_mem(pdev);
11923 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11926 pci_set_master(pdev);
11928 /* no wakeup events while running */
11929 pci_wake_from_d3(pdev, false);
11931 /* handling the reset will rebuild the device state */
11932 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11933 clear_bit(__I40E_DOWN, &pf->state);
11935 i40e_reset_and_rebuild(pf, false);
11943 static const struct pci_error_handlers i40e_err_handler = {
11944 .error_detected = i40e_pci_error_detected,
11945 .slot_reset = i40e_pci_error_slot_reset,
11946 .resume = i40e_pci_error_resume,
11949 static struct pci_driver i40e_driver = {
11950 .name = i40e_driver_name,
11951 .id_table = i40e_pci_tbl,
11952 .probe = i40e_probe,
11953 .remove = i40e_remove,
11955 .suspend = i40e_suspend,
11956 .resume = i40e_resume,
11958 .shutdown = i40e_shutdown,
11959 .err_handler = &i40e_err_handler,
11960 .sriov_configure = i40e_pci_sriov_configure,
11964 * i40e_init_module - Driver registration routine
11966 * i40e_init_module is the first routine called when the driver is
11967 * loaded. All it does is register with the PCI subsystem.
11969 static int __init i40e_init_module(void)
11971 pr_info("%s: %s - version %s\n", i40e_driver_name,
11972 i40e_driver_string, i40e_driver_version_str);
11973 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11975 /* we will see if single thread per module is enough for now,
11976 * it can't be any worse than using the system workqueue which
11977 * was already single threaded
11979 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11982 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11987 return pci_register_driver(&i40e_driver);
11989 module_init(i40e_init_module);
11992 * i40e_exit_module - Driver exit cleanup routine
11994 * i40e_exit_module is called just before the driver is removed
11997 static void __exit i40e_exit_module(void)
11999 pci_unregister_driver(&i40e_driver);
12000 destroy_workqueue(i40e_wq);
12003 module_exit(i40e_exit_module);