1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35 /* All i40e tracepoints are defined by the include below, which
36 * must be included exactly once across the whole kernel with
37 * CREATE_TRACE_POINTS defined
39 #define CREATE_TRACE_POINTS
40 #include "i40e_trace.h"
42 const char i40e_driver_name[] = "i40e";
43 static const char i40e_driver_string[] =
44 "Intel(R) Ethernet Connection XL710 Network Driver";
48 #define DRV_VERSION_MAJOR 2
49 #define DRV_VERSION_MINOR 1
50 #define DRV_VERSION_BUILD 7
51 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
52 __stringify(DRV_VERSION_MINOR) "." \
53 __stringify(DRV_VERSION_BUILD) DRV_KERN
54 const char i40e_driver_version_str[] = DRV_VERSION;
55 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
57 /* a bit of forward declarations */
58 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
59 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
60 static int i40e_add_vsi(struct i40e_vsi *vsi);
61 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
62 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
63 static int i40e_setup_misc_vector(struct i40e_pf *pf);
64 static void i40e_determine_queue_usage(struct i40e_pf *pf);
65 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
66 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired);
67 static int i40e_reset(struct i40e_pf *pf);
68 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
69 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
70 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
72 /* i40e_pci_tbl - PCI Device ID Table
74 * Last entry must be all 0s
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
79 static const struct pci_device_id i40e_pci_tbl[] = {
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
98 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
99 /* required last entry */
102 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
104 #define I40E_MAX_VF_COUNT 128
105 static int debug = -1;
106 module_param(debug, uint, 0);
107 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
109 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
110 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
111 MODULE_LICENSE("GPL");
112 MODULE_VERSION(DRV_VERSION);
114 static struct workqueue_struct *i40e_wq;
117 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
118 * @hw: pointer to the HW structure
119 * @mem: ptr to mem struct to fill out
120 * @size: size of memory requested
121 * @alignment: what to align the allocation to
123 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
124 u64 size, u32 alignment)
126 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
128 mem->size = ALIGN(size, alignment);
129 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
130 &mem->pa, GFP_KERNEL);
138 * i40e_free_dma_mem_d - OS specific memory free for shared code
139 * @hw: pointer to the HW structure
140 * @mem: ptr to mem struct to free
142 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
144 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
146 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
155 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
156 * @hw: pointer to the HW structure
157 * @mem: ptr to mem struct to fill out
158 * @size: size of memory requested
160 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
164 mem->va = kzalloc(size, GFP_KERNEL);
173 * i40e_free_virt_mem_d - OS specific memory free for shared code
174 * @hw: pointer to the HW structure
175 * @mem: ptr to mem struct to free
177 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
179 /* it's ok to kfree a NULL pointer */
188 * i40e_get_lump - find a lump of free generic resource
189 * @pf: board private structure
190 * @pile: the pile of resource to search
191 * @needed: the number of items needed
192 * @id: an owner id to stick on the items assigned
194 * Returns the base item index of the lump, or negative for error
196 * The search_hint trick and lack of advanced fit-finding only work
197 * because we're highly likely to have all the same size lump requests.
198 * Linear search time and any fragmentation should be minimal.
200 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
206 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
207 dev_info(&pf->pdev->dev,
208 "param err: pile=%p needed=%d id=0x%04x\n",
213 /* start the linear search with an imperfect hint */
214 i = pile->search_hint;
215 while (i < pile->num_entries) {
216 /* skip already allocated entries */
217 if (pile->list[i] & I40E_PILE_VALID_BIT) {
222 /* do we have enough in this lump? */
223 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
224 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
229 /* there was enough, so assign it to the requestor */
230 for (j = 0; j < needed; j++)
231 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
233 pile->search_hint = i + j;
237 /* not enough, so skip over it and continue looking */
245 * i40e_put_lump - return a lump of generic resource
246 * @pile: the pile of resource to search
247 * @index: the base item index
248 * @id: the owner id of the items assigned
250 * Returns the count of items in the lump
252 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
254 int valid_id = (id | I40E_PILE_VALID_BIT);
258 if (!pile || index >= pile->num_entries)
262 i < pile->num_entries && pile->list[i] == valid_id;
268 if (count && index < pile->search_hint)
269 pile->search_hint = index;
275 * i40e_find_vsi_from_id - searches for the vsi with the given id
276 * @pf - the pf structure to search for the vsi
277 * @id - id of the vsi it is searching for
279 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
283 for (i = 0; i < pf->num_alloc_vsi; i++)
284 if (pf->vsi[i] && (pf->vsi[i]->id == id))
291 * i40e_service_event_schedule - Schedule the service task to wake up
292 * @pf: board private structure
294 * If not already scheduled, this puts the task into the work queue
296 void i40e_service_event_schedule(struct i40e_pf *pf)
298 if (!test_bit(__I40E_DOWN, &pf->state) &&
299 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
300 queue_work(i40e_wq, &pf->service_task);
304 * i40e_tx_timeout - Respond to a Tx Hang
305 * @netdev: network interface device structure
307 * If any port has noticed a Tx timeout, it is likely that the whole
308 * device is munged, not just the one netdev port, so go for the full
311 static void i40e_tx_timeout(struct net_device *netdev)
313 struct i40e_netdev_priv *np = netdev_priv(netdev);
314 struct i40e_vsi *vsi = np->vsi;
315 struct i40e_pf *pf = vsi->back;
316 struct i40e_ring *tx_ring = NULL;
317 unsigned int i, hung_queue = 0;
320 pf->tx_timeout_count++;
322 /* find the stopped queue the same way the stack does */
323 for (i = 0; i < netdev->num_tx_queues; i++) {
324 struct netdev_queue *q;
325 unsigned long trans_start;
327 q = netdev_get_tx_queue(netdev, i);
328 trans_start = q->trans_start;
329 if (netif_xmit_stopped(q) &&
331 (trans_start + netdev->watchdog_timeo))) {
337 if (i == netdev->num_tx_queues) {
338 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
340 /* now that we have an index, find the tx_ring struct */
341 for (i = 0; i < vsi->num_queue_pairs; i++) {
342 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
344 vsi->tx_rings[i]->queue_index) {
345 tx_ring = vsi->tx_rings[i];
352 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
353 pf->tx_timeout_recovery_level = 1; /* reset after some time */
354 else if (time_before(jiffies,
355 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
356 return; /* don't do any new action before the next timeout */
359 head = i40e_get_head(tx_ring);
360 /* Read interrupt register */
361 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
363 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
364 tx_ring->vsi->base_vector - 1));
366 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
368 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
369 vsi->seid, hung_queue, tx_ring->next_to_clean,
370 head, tx_ring->next_to_use,
371 readl(tx_ring->tail), val);
374 pf->tx_timeout_last_recovery = jiffies;
375 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
376 pf->tx_timeout_recovery_level, hung_queue);
378 switch (pf->tx_timeout_recovery_level) {
380 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
383 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
386 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
389 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
393 i40e_service_event_schedule(pf);
394 pf->tx_timeout_recovery_level++;
398 * i40e_get_vsi_stats_struct - Get System Network Statistics
399 * @vsi: the VSI we care about
401 * Returns the address of the device statistics structure.
402 * The statistics are actually updated from the service task.
404 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
406 return &vsi->net_stats;
410 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
411 * @netdev: network interface device structure
413 * Returns the address of the device statistics structure.
414 * The statistics are actually updated from the service task.
416 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
417 struct rtnl_link_stats64 *stats)
419 struct i40e_netdev_priv *np = netdev_priv(netdev);
420 struct i40e_ring *tx_ring, *rx_ring;
421 struct i40e_vsi *vsi = np->vsi;
422 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
425 if (test_bit(__I40E_DOWN, &vsi->state))
432 for (i = 0; i < vsi->num_queue_pairs; i++) {
436 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
441 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
442 packets = tx_ring->stats.packets;
443 bytes = tx_ring->stats.bytes;
444 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
446 stats->tx_packets += packets;
447 stats->tx_bytes += bytes;
448 rx_ring = &tx_ring[1];
451 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
452 packets = rx_ring->stats.packets;
453 bytes = rx_ring->stats.bytes;
454 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
456 stats->rx_packets += packets;
457 stats->rx_bytes += bytes;
461 /* following stats updated by i40e_watchdog_subtask() */
462 stats->multicast = vsi_stats->multicast;
463 stats->tx_errors = vsi_stats->tx_errors;
464 stats->tx_dropped = vsi_stats->tx_dropped;
465 stats->rx_errors = vsi_stats->rx_errors;
466 stats->rx_dropped = vsi_stats->rx_dropped;
467 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
468 stats->rx_length_errors = vsi_stats->rx_length_errors;
472 * i40e_vsi_reset_stats - Resets all stats of the given vsi
473 * @vsi: the VSI to have its stats reset
475 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
477 struct rtnl_link_stats64 *ns;
483 ns = i40e_get_vsi_stats_struct(vsi);
484 memset(ns, 0, sizeof(*ns));
485 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
486 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
487 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
488 if (vsi->rx_rings && vsi->rx_rings[0]) {
489 for (i = 0; i < vsi->num_queue_pairs; i++) {
490 memset(&vsi->rx_rings[i]->stats, 0,
491 sizeof(vsi->rx_rings[i]->stats));
492 memset(&vsi->rx_rings[i]->rx_stats, 0,
493 sizeof(vsi->rx_rings[i]->rx_stats));
494 memset(&vsi->tx_rings[i]->stats, 0,
495 sizeof(vsi->tx_rings[i]->stats));
496 memset(&vsi->tx_rings[i]->tx_stats, 0,
497 sizeof(vsi->tx_rings[i]->tx_stats));
500 vsi->stat_offsets_loaded = false;
504 * i40e_pf_reset_stats - Reset all of the stats for the given PF
505 * @pf: the PF to be reset
507 void i40e_pf_reset_stats(struct i40e_pf *pf)
511 memset(&pf->stats, 0, sizeof(pf->stats));
512 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
513 pf->stat_offsets_loaded = false;
515 for (i = 0; i < I40E_MAX_VEB; i++) {
517 memset(&pf->veb[i]->stats, 0,
518 sizeof(pf->veb[i]->stats));
519 memset(&pf->veb[i]->stats_offsets, 0,
520 sizeof(pf->veb[i]->stats_offsets));
521 pf->veb[i]->stat_offsets_loaded = false;
524 pf->hw_csum_rx_error = 0;
528 * i40e_stat_update48 - read and update a 48 bit stat from the chip
529 * @hw: ptr to the hardware info
530 * @hireg: the high 32 bit reg to read
531 * @loreg: the low 32 bit reg to read
532 * @offset_loaded: has the initial offset been loaded yet
533 * @offset: ptr to current offset value
534 * @stat: ptr to the stat
536 * Since the device stats are not reset at PFReset, they likely will not
537 * be zeroed when the driver starts. We'll save the first values read
538 * and use them as offsets to be subtracted from the raw values in order
539 * to report stats that count from zero. In the process, we also manage
540 * the potential roll-over.
542 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
543 bool offset_loaded, u64 *offset, u64 *stat)
547 if (hw->device_id == I40E_DEV_ID_QEMU) {
548 new_data = rd32(hw, loreg);
549 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
551 new_data = rd64(hw, loreg);
555 if (likely(new_data >= *offset))
556 *stat = new_data - *offset;
558 *stat = (new_data + BIT_ULL(48)) - *offset;
559 *stat &= 0xFFFFFFFFFFFFULL;
563 * i40e_stat_update32 - read and update a 32 bit stat from the chip
564 * @hw: ptr to the hardware info
565 * @reg: the hw reg to read
566 * @offset_loaded: has the initial offset been loaded yet
567 * @offset: ptr to current offset value
568 * @stat: ptr to the stat
570 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
571 bool offset_loaded, u64 *offset, u64 *stat)
575 new_data = rd32(hw, reg);
578 if (likely(new_data >= *offset))
579 *stat = (u32)(new_data - *offset);
581 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
585 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
586 * @vsi: the VSI to be updated
588 void i40e_update_eth_stats(struct i40e_vsi *vsi)
590 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
591 struct i40e_pf *pf = vsi->back;
592 struct i40e_hw *hw = &pf->hw;
593 struct i40e_eth_stats *oes;
594 struct i40e_eth_stats *es; /* device's eth stats */
596 es = &vsi->eth_stats;
597 oes = &vsi->eth_stats_offsets;
599 /* Gather up the stats that the hw collects */
600 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
601 vsi->stat_offsets_loaded,
602 &oes->tx_errors, &es->tx_errors);
603 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
604 vsi->stat_offsets_loaded,
605 &oes->rx_discards, &es->rx_discards);
606 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
607 vsi->stat_offsets_loaded,
608 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
609 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
610 vsi->stat_offsets_loaded,
611 &oes->tx_errors, &es->tx_errors);
613 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
614 I40E_GLV_GORCL(stat_idx),
615 vsi->stat_offsets_loaded,
616 &oes->rx_bytes, &es->rx_bytes);
617 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
618 I40E_GLV_UPRCL(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_unicast, &es->rx_unicast);
621 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
622 I40E_GLV_MPRCL(stat_idx),
623 vsi->stat_offsets_loaded,
624 &oes->rx_multicast, &es->rx_multicast);
625 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
626 I40E_GLV_BPRCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_broadcast, &es->rx_broadcast);
630 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
631 I40E_GLV_GOTCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->tx_bytes, &es->tx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
635 I40E_GLV_UPTCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_unicast, &es->tx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
639 I40E_GLV_MPTCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->tx_multicast, &es->tx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
643 I40E_GLV_BPTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_broadcast, &es->tx_broadcast);
646 vsi->stat_offsets_loaded = true;
650 * i40e_update_veb_stats - Update Switch component statistics
651 * @veb: the VEB being updated
653 static void i40e_update_veb_stats(struct i40e_veb *veb)
655 struct i40e_pf *pf = veb->pf;
656 struct i40e_hw *hw = &pf->hw;
657 struct i40e_eth_stats *oes;
658 struct i40e_eth_stats *es; /* device's eth stats */
659 struct i40e_veb_tc_stats *veb_oes;
660 struct i40e_veb_tc_stats *veb_es;
663 idx = veb->stats_idx;
665 oes = &veb->stats_offsets;
666 veb_es = &veb->tc_stats;
667 veb_oes = &veb->tc_stats_offsets;
669 /* Gather up the stats that the hw collects */
670 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
671 veb->stat_offsets_loaded,
672 &oes->tx_discards, &es->tx_discards);
673 if (hw->revision_id > 0)
674 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
675 veb->stat_offsets_loaded,
676 &oes->rx_unknown_protocol,
677 &es->rx_unknown_protocol);
678 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
679 veb->stat_offsets_loaded,
680 &oes->rx_bytes, &es->rx_bytes);
681 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
682 veb->stat_offsets_loaded,
683 &oes->rx_unicast, &es->rx_unicast);
684 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
685 veb->stat_offsets_loaded,
686 &oes->rx_multicast, &es->rx_multicast);
687 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
688 veb->stat_offsets_loaded,
689 &oes->rx_broadcast, &es->rx_broadcast);
691 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
692 veb->stat_offsets_loaded,
693 &oes->tx_bytes, &es->tx_bytes);
694 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
695 veb->stat_offsets_loaded,
696 &oes->tx_unicast, &es->tx_unicast);
697 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
698 veb->stat_offsets_loaded,
699 &oes->tx_multicast, &es->tx_multicast);
700 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
701 veb->stat_offsets_loaded,
702 &oes->tx_broadcast, &es->tx_broadcast);
703 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
704 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
705 I40E_GLVEBTC_RPCL(i, idx),
706 veb->stat_offsets_loaded,
707 &veb_oes->tc_rx_packets[i],
708 &veb_es->tc_rx_packets[i]);
709 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
710 I40E_GLVEBTC_RBCL(i, idx),
711 veb->stat_offsets_loaded,
712 &veb_oes->tc_rx_bytes[i],
713 &veb_es->tc_rx_bytes[i]);
714 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
715 I40E_GLVEBTC_TPCL(i, idx),
716 veb->stat_offsets_loaded,
717 &veb_oes->tc_tx_packets[i],
718 &veb_es->tc_tx_packets[i]);
719 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
720 I40E_GLVEBTC_TBCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_tx_bytes[i],
723 &veb_es->tc_tx_bytes[i]);
725 veb->stat_offsets_loaded = true;
729 * i40e_update_vsi_stats - Update the vsi statistics counters.
730 * @vsi: the VSI to be updated
732 * There are a few instances where we store the same stat in a
733 * couple of different structs. This is partly because we have
734 * the netdev stats that need to be filled out, which is slightly
735 * different from the "eth_stats" defined by the chip and used in
736 * VF communications. We sort it out here.
738 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
740 struct i40e_pf *pf = vsi->back;
741 struct rtnl_link_stats64 *ons;
742 struct rtnl_link_stats64 *ns; /* netdev stats */
743 struct i40e_eth_stats *oes;
744 struct i40e_eth_stats *es; /* device's eth stats */
745 u32 tx_restart, tx_busy;
756 if (test_bit(__I40E_DOWN, &vsi->state) ||
757 test_bit(__I40E_CONFIG_BUSY, &pf->state))
760 ns = i40e_get_vsi_stats_struct(vsi);
761 ons = &vsi->net_stats_offsets;
762 es = &vsi->eth_stats;
763 oes = &vsi->eth_stats_offsets;
765 /* Gather up the netdev and vsi stats that the driver collects
766 * on the fly during packet processing
770 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
774 for (q = 0; q < vsi->num_queue_pairs; q++) {
776 p = ACCESS_ONCE(vsi->tx_rings[q]);
779 start = u64_stats_fetch_begin_irq(&p->syncp);
780 packets = p->stats.packets;
781 bytes = p->stats.bytes;
782 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
785 tx_restart += p->tx_stats.restart_queue;
786 tx_busy += p->tx_stats.tx_busy;
787 tx_linearize += p->tx_stats.tx_linearize;
788 tx_force_wb += p->tx_stats.tx_force_wb;
790 /* Rx queue is part of the same block as Tx queue */
793 start = u64_stats_fetch_begin_irq(&p->syncp);
794 packets = p->stats.packets;
795 bytes = p->stats.bytes;
796 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
799 rx_buf += p->rx_stats.alloc_buff_failed;
800 rx_page += p->rx_stats.alloc_page_failed;
803 vsi->tx_restart = tx_restart;
804 vsi->tx_busy = tx_busy;
805 vsi->tx_linearize = tx_linearize;
806 vsi->tx_force_wb = tx_force_wb;
807 vsi->rx_page_failed = rx_page;
808 vsi->rx_buf_failed = rx_buf;
810 ns->rx_packets = rx_p;
812 ns->tx_packets = tx_p;
815 /* update netdev stats from eth stats */
816 i40e_update_eth_stats(vsi);
817 ons->tx_errors = oes->tx_errors;
818 ns->tx_errors = es->tx_errors;
819 ons->multicast = oes->rx_multicast;
820 ns->multicast = es->rx_multicast;
821 ons->rx_dropped = oes->rx_discards;
822 ns->rx_dropped = es->rx_discards;
823 ons->tx_dropped = oes->tx_discards;
824 ns->tx_dropped = es->tx_discards;
826 /* pull in a couple PF stats if this is the main vsi */
827 if (vsi == pf->vsi[pf->lan_vsi]) {
828 ns->rx_crc_errors = pf->stats.crc_errors;
829 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
830 ns->rx_length_errors = pf->stats.rx_length_errors;
835 * i40e_update_pf_stats - Update the PF statistics counters.
836 * @pf: the PF to be updated
838 static void i40e_update_pf_stats(struct i40e_pf *pf)
840 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
841 struct i40e_hw_port_stats *nsd = &pf->stats;
842 struct i40e_hw *hw = &pf->hw;
846 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
847 I40E_GLPRT_GORCL(hw->port),
848 pf->stat_offsets_loaded,
849 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
850 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
851 I40E_GLPRT_GOTCL(hw->port),
852 pf->stat_offsets_loaded,
853 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
854 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
855 pf->stat_offsets_loaded,
856 &osd->eth.rx_discards,
857 &nsd->eth.rx_discards);
858 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
859 I40E_GLPRT_UPRCL(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->eth.rx_unicast,
862 &nsd->eth.rx_unicast);
863 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
864 I40E_GLPRT_MPRCL(hw->port),
865 pf->stat_offsets_loaded,
866 &osd->eth.rx_multicast,
867 &nsd->eth.rx_multicast);
868 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
869 I40E_GLPRT_BPRCL(hw->port),
870 pf->stat_offsets_loaded,
871 &osd->eth.rx_broadcast,
872 &nsd->eth.rx_broadcast);
873 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
874 I40E_GLPRT_UPTCL(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->eth.tx_unicast,
877 &nsd->eth.tx_unicast);
878 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
879 I40E_GLPRT_MPTCL(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->eth.tx_multicast,
882 &nsd->eth.tx_multicast);
883 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
884 I40E_GLPRT_BPTCL(hw->port),
885 pf->stat_offsets_loaded,
886 &osd->eth.tx_broadcast,
887 &nsd->eth.tx_broadcast);
889 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
890 pf->stat_offsets_loaded,
891 &osd->tx_dropped_link_down,
892 &nsd->tx_dropped_link_down);
894 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
895 pf->stat_offsets_loaded,
896 &osd->crc_errors, &nsd->crc_errors);
898 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
899 pf->stat_offsets_loaded,
900 &osd->illegal_bytes, &nsd->illegal_bytes);
902 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
903 pf->stat_offsets_loaded,
904 &osd->mac_local_faults,
905 &nsd->mac_local_faults);
906 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->mac_remote_faults,
909 &nsd->mac_remote_faults);
911 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->rx_length_errors,
914 &nsd->rx_length_errors);
916 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->link_xon_rx, &nsd->link_xon_rx);
919 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
920 pf->stat_offsets_loaded,
921 &osd->link_xon_tx, &nsd->link_xon_tx);
922 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->link_xoff_rx, &nsd->link_xoff_rx);
925 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->link_xoff_tx, &nsd->link_xoff_tx);
929 for (i = 0; i < 8; i++) {
930 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
931 pf->stat_offsets_loaded,
932 &osd->priority_xoff_rx[i],
933 &nsd->priority_xoff_rx[i]);
934 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
935 pf->stat_offsets_loaded,
936 &osd->priority_xon_rx[i],
937 &nsd->priority_xon_rx[i]);
938 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
939 pf->stat_offsets_loaded,
940 &osd->priority_xon_tx[i],
941 &nsd->priority_xon_tx[i]);
942 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
943 pf->stat_offsets_loaded,
944 &osd->priority_xoff_tx[i],
945 &nsd->priority_xoff_tx[i]);
946 i40e_stat_update32(hw,
947 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
948 pf->stat_offsets_loaded,
949 &osd->priority_xon_2_xoff[i],
950 &nsd->priority_xon_2_xoff[i]);
953 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
954 I40E_GLPRT_PRC64L(hw->port),
955 pf->stat_offsets_loaded,
956 &osd->rx_size_64, &nsd->rx_size_64);
957 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
958 I40E_GLPRT_PRC127L(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->rx_size_127, &nsd->rx_size_127);
961 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
962 I40E_GLPRT_PRC255L(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_size_255, &nsd->rx_size_255);
965 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
966 I40E_GLPRT_PRC511L(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_size_511, &nsd->rx_size_511);
969 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
970 I40E_GLPRT_PRC1023L(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_size_1023, &nsd->rx_size_1023);
973 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
974 I40E_GLPRT_PRC1522L(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_size_1522, &nsd->rx_size_1522);
977 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
978 I40E_GLPRT_PRC9522L(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->rx_size_big, &nsd->rx_size_big);
982 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
983 I40E_GLPRT_PTC64L(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->tx_size_64, &nsd->tx_size_64);
986 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
987 I40E_GLPRT_PTC127L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->tx_size_127, &nsd->tx_size_127);
990 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
991 I40E_GLPRT_PTC255L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->tx_size_255, &nsd->tx_size_255);
994 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
995 I40E_GLPRT_PTC511L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->tx_size_511, &nsd->tx_size_511);
998 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
999 I40E_GLPRT_PTC1023L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->tx_size_1023, &nsd->tx_size_1023);
1002 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1003 I40E_GLPRT_PTC1522L(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->tx_size_1522, &nsd->tx_size_1522);
1006 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1007 I40E_GLPRT_PTC9522L(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->tx_size_big, &nsd->tx_size_big);
1011 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_undersize, &nsd->rx_undersize);
1014 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->rx_fragments, &nsd->rx_fragments);
1017 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_oversize, &nsd->rx_oversize);
1020 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_jabber, &nsd->rx_jabber);
1025 i40e_stat_update32(hw,
1026 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1027 pf->stat_offsets_loaded,
1028 &osd->fd_atr_match, &nsd->fd_atr_match);
1029 i40e_stat_update32(hw,
1030 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1031 pf->stat_offsets_loaded,
1032 &osd->fd_sb_match, &nsd->fd_sb_match);
1033 i40e_stat_update32(hw,
1034 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1035 pf->stat_offsets_loaded,
1036 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1038 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1039 nsd->tx_lpi_status =
1040 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1041 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1042 nsd->rx_lpi_status =
1043 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1044 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1045 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1046 pf->stat_offsets_loaded,
1047 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1048 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1049 pf->stat_offsets_loaded,
1050 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1052 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1053 !(pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED))
1054 nsd->fd_sb_status = true;
1056 nsd->fd_sb_status = false;
1058 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1059 !(pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED))
1060 nsd->fd_atr_status = true;
1062 nsd->fd_atr_status = false;
1064 pf->stat_offsets_loaded = true;
1068 * i40e_update_stats - Update the various statistics counters.
1069 * @vsi: the VSI to be updated
1071 * Update the various stats for this VSI and its related entities.
1073 void i40e_update_stats(struct i40e_vsi *vsi)
1075 struct i40e_pf *pf = vsi->back;
1077 if (vsi == pf->vsi[pf->lan_vsi])
1078 i40e_update_pf_stats(pf);
1080 i40e_update_vsi_stats(vsi);
1084 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1085 * @vsi: the VSI to be searched
1086 * @macaddr: the MAC address
1089 * Returns ptr to the filter object or NULL
1091 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1092 const u8 *macaddr, s16 vlan)
1094 struct i40e_mac_filter *f;
1097 if (!vsi || !macaddr)
1100 key = i40e_addr_to_hkey(macaddr);
1101 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1102 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1110 * i40e_find_mac - Find a mac addr in the macvlan filters list
1111 * @vsi: the VSI to be searched
1112 * @macaddr: the MAC address we are searching for
1114 * Returns the first filter with the provided MAC address or NULL if
1115 * MAC address was not found
1117 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1119 struct i40e_mac_filter *f;
1122 if (!vsi || !macaddr)
1125 key = i40e_addr_to_hkey(macaddr);
1126 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1127 if ((ether_addr_equal(macaddr, f->macaddr)))
1134 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1135 * @vsi: the VSI to be searched
1137 * Returns true if VSI is in vlan mode or false otherwise
1139 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1141 /* If we have a PVID, always operate in VLAN mode */
1145 /* We need to operate in VLAN mode whenever we have any filters with
1146 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1147 * time, incurring search cost repeatedly. However, we can notice two
1150 * 1) the only place where we can gain a VLAN filter is in
1153 * 2) the only place where filters are actually removed is in
1154 * i40e_sync_filters_subtask.
1156 * Thus, we can simply use a boolean value, has_vlan_filters which we
1157 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1158 * we have to perform the full search after deleting filters in
1159 * i40e_sync_filters_subtask, but we already have to search
1160 * filters here and can perform the check at the same time. This
1161 * results in avoiding embedding a loop for VLAN mode inside another
1162 * loop over all the filters, and should maintain correctness as noted
1165 return vsi->has_vlan_filter;
1169 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1170 * @vsi: the VSI to configure
1171 * @tmp_add_list: list of filters ready to be added
1172 * @tmp_del_list: list of filters ready to be deleted
1173 * @vlan_filters: the number of active VLAN filters
1175 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1176 * behave as expected. If we have any active VLAN filters remaining or about
1177 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1178 * so that they only match against untagged traffic. If we no longer have any
1179 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1180 * so that they match against both tagged and untagged traffic. In this way,
1181 * we ensure that we correctly receive the desired traffic. This ensures that
1182 * when we have an active VLAN we will receive only untagged traffic and
1183 * traffic matching active VLANs. If we have no active VLANs then we will
1184 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1186 * Finally, in a similar fashion, this function also corrects filters when
1187 * there is an active PVID assigned to this VSI.
1189 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1191 * This function is only expected to be called from within
1192 * i40e_sync_vsi_filters.
1194 * NOTE: This function expects to be called while under the
1195 * mac_filter_hash_lock
1197 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1198 struct hlist_head *tmp_add_list,
1199 struct hlist_head *tmp_del_list,
1202 s16 pvid = le16_to_cpu(vsi->info.pvid);
1203 struct i40e_mac_filter *f, *add_head;
1204 struct i40e_new_mac_filter *new;
1205 struct hlist_node *h;
1208 /* To determine if a particular filter needs to be replaced we
1209 * have the three following conditions:
1211 * a) if we have a PVID assigned, then all filters which are
1212 * not marked as VLAN=PVID must be replaced with filters that
1214 * b) otherwise, if we have any active VLANS, all filters
1215 * which are marked as VLAN=-1 must be replaced with
1216 * filters marked as VLAN=0
1217 * c) finally, if we do not have any active VLANS, all filters
1218 * which are marked as VLAN=0 must be replaced with filters
1222 /* Update the filters about to be added in place */
1223 hlist_for_each_entry(new, tmp_add_list, hlist) {
1224 if (pvid && new->f->vlan != pvid)
1225 new->f->vlan = pvid;
1226 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1228 else if (!vlan_filters && new->f->vlan == 0)
1229 new->f->vlan = I40E_VLAN_ANY;
1232 /* Update the remaining active filters */
1233 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1234 /* Combine the checks for whether a filter needs to be changed
1235 * and then determine the new VLAN inside the if block, in
1236 * order to avoid duplicating code for adding the new filter
1237 * then deleting the old filter.
1239 if ((pvid && f->vlan != pvid) ||
1240 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1241 (!vlan_filters && f->vlan == 0)) {
1242 /* Determine the new vlan we will be adding */
1245 else if (vlan_filters)
1248 new_vlan = I40E_VLAN_ANY;
1250 /* Create the new filter */
1251 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1255 /* Create a temporary i40e_new_mac_filter */
1256 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1261 new->state = add_head->state;
1263 /* Add the new filter to the tmp list */
1264 hlist_add_head(&new->hlist, tmp_add_list);
1266 /* Put the original filter into the delete list */
1267 f->state = I40E_FILTER_REMOVE;
1268 hash_del(&f->hlist);
1269 hlist_add_head(&f->hlist, tmp_del_list);
1273 vsi->has_vlan_filter = !!vlan_filters;
1279 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1280 * @vsi: the PF Main VSI - inappropriate for any other VSI
1281 * @macaddr: the MAC address
1283 * Remove whatever filter the firmware set up so the driver can manage
1284 * its own filtering intelligently.
1286 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1288 struct i40e_aqc_remove_macvlan_element_data element;
1289 struct i40e_pf *pf = vsi->back;
1291 /* Only appropriate for the PF main VSI */
1292 if (vsi->type != I40E_VSI_MAIN)
1295 memset(&element, 0, sizeof(element));
1296 ether_addr_copy(element.mac_addr, macaddr);
1297 element.vlan_tag = 0;
1298 /* Ignore error returns, some firmware does it this way... */
1299 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1300 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1302 memset(&element, 0, sizeof(element));
1303 ether_addr_copy(element.mac_addr, macaddr);
1304 element.vlan_tag = 0;
1305 /* ...and some firmware does it this way. */
1306 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1307 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1308 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1312 * i40e_add_filter - Add a mac/vlan filter to the VSI
1313 * @vsi: the VSI to be searched
1314 * @macaddr: the MAC address
1317 * Returns ptr to the filter object or NULL when no memory available.
1319 * NOTE: This function is expected to be called with mac_filter_hash_lock
1322 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1323 const u8 *macaddr, s16 vlan)
1325 struct i40e_mac_filter *f;
1328 if (!vsi || !macaddr)
1331 f = i40e_find_filter(vsi, macaddr, vlan);
1333 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1337 /* Update the boolean indicating if we need to function in
1341 vsi->has_vlan_filter = true;
1343 ether_addr_copy(f->macaddr, macaddr);
1345 /* If we're in overflow promisc mode, set the state directly
1346 * to failed, so we don't bother to try sending the filter
1349 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1350 f->state = I40E_FILTER_FAILED;
1352 f->state = I40E_FILTER_NEW;
1353 INIT_HLIST_NODE(&f->hlist);
1355 key = i40e_addr_to_hkey(macaddr);
1356 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1358 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1359 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1362 /* If we're asked to add a filter that has been marked for removal, it
1363 * is safe to simply restore it to active state. __i40e_del_filter
1364 * will have simply deleted any filters which were previously marked
1365 * NEW or FAILED, so if it is currently marked REMOVE it must have
1366 * previously been ACTIVE. Since we haven't yet run the sync filters
1367 * task, just restore this filter to the ACTIVE state so that the
1368 * sync task leaves it in place
1370 if (f->state == I40E_FILTER_REMOVE)
1371 f->state = I40E_FILTER_ACTIVE;
1377 * __i40e_del_filter - Remove a specific filter from the VSI
1378 * @vsi: VSI to remove from
1379 * @f: the filter to remove from the list
1381 * This function should be called instead of i40e_del_filter only if you know
1382 * the exact filter you will remove already, such as via i40e_find_filter or
1385 * NOTE: This function is expected to be called with mac_filter_hash_lock
1387 * ANOTHER NOTE: This function MUST be called from within the context of
1388 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1389 * instead of list_for_each_entry().
1391 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1396 /* If the filter was never added to firmware then we can just delete it
1397 * directly and we don't want to set the status to remove or else an
1398 * admin queue command will unnecessarily fire.
1400 if ((f->state == I40E_FILTER_FAILED) ||
1401 (f->state == I40E_FILTER_NEW)) {
1402 hash_del(&f->hlist);
1405 f->state = I40E_FILTER_REMOVE;
1408 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1409 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1413 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1414 * @vsi: the VSI to be searched
1415 * @macaddr: the MAC address
1418 * NOTE: This function is expected to be called with mac_filter_hash_lock
1420 * ANOTHER NOTE: This function MUST be called from within the context of
1421 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1422 * instead of list_for_each_entry().
1424 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1426 struct i40e_mac_filter *f;
1428 if (!vsi || !macaddr)
1431 f = i40e_find_filter(vsi, macaddr, vlan);
1432 __i40e_del_filter(vsi, f);
1436 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1437 * @vsi: the VSI to be searched
1438 * @macaddr: the mac address to be filtered
1440 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1441 * go through all the macvlan filters and add a macvlan filter for each
1442 * unique vlan that already exists. If a PVID has been assigned, instead only
1443 * add the macaddr to that VLAN.
1445 * Returns last filter added on success, else NULL
1447 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1450 struct i40e_mac_filter *f, *add = NULL;
1451 struct hlist_node *h;
1455 return i40e_add_filter(vsi, macaddr,
1456 le16_to_cpu(vsi->info.pvid));
1458 if (!i40e_is_vsi_in_vlan(vsi))
1459 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1461 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1462 if (f->state == I40E_FILTER_REMOVE)
1464 add = i40e_add_filter(vsi, macaddr, f->vlan);
1473 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1474 * @vsi: the VSI to be searched
1475 * @macaddr: the mac address to be removed
1477 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1480 * Returns 0 for success, or error
1482 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1484 struct i40e_mac_filter *f;
1485 struct hlist_node *h;
1489 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock),
1490 "Missing mac_filter_hash_lock\n");
1491 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1492 if (ether_addr_equal(macaddr, f->macaddr)) {
1493 __i40e_del_filter(vsi, f);
1505 * i40e_set_mac - NDO callback to set mac address
1506 * @netdev: network interface device structure
1507 * @p: pointer to an address structure
1509 * Returns 0 on success, negative on failure
1511 static int i40e_set_mac(struct net_device *netdev, void *p)
1513 struct i40e_netdev_priv *np = netdev_priv(netdev);
1514 struct i40e_vsi *vsi = np->vsi;
1515 struct i40e_pf *pf = vsi->back;
1516 struct i40e_hw *hw = &pf->hw;
1517 struct sockaddr *addr = p;
1519 if (!is_valid_ether_addr(addr->sa_data))
1520 return -EADDRNOTAVAIL;
1522 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1523 netdev_info(netdev, "already using mac address %pM\n",
1528 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1529 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1530 return -EADDRNOTAVAIL;
1532 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1533 netdev_info(netdev, "returning to hw mac address %pM\n",
1536 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1538 spin_lock_bh(&vsi->mac_filter_hash_lock);
1539 i40e_del_mac_filter(vsi, netdev->dev_addr);
1540 i40e_add_mac_filter(vsi, addr->sa_data);
1541 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1542 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1543 if (vsi->type == I40E_VSI_MAIN) {
1546 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1547 I40E_AQC_WRITE_TYPE_LAA_WOL,
1548 addr->sa_data, NULL);
1550 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1551 i40e_stat_str(hw, ret),
1552 i40e_aq_str(hw, hw->aq.asq_last_status));
1555 /* schedule our worker thread which will take care of
1556 * applying the new filter changes
1558 i40e_service_event_schedule(vsi->back);
1563 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1564 * @vsi: the VSI being setup
1565 * @ctxt: VSI context structure
1566 * @enabled_tc: Enabled TCs bitmap
1567 * @is_add: True if called before Add VSI
1569 * Setup VSI queue mapping for enabled traffic classes.
1571 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1572 struct i40e_vsi_context *ctxt,
1576 struct i40e_pf *pf = vsi->back;
1586 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1589 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1590 /* Find numtc from enabled TC bitmap */
1591 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1592 if (enabled_tc & BIT(i)) /* TC is enabled */
1596 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1600 /* At least TC0 is enabled in case of non-DCB case */
1604 vsi->tc_config.numtc = numtc;
1605 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1606 /* Number of queues per enabled TC */
1607 qcount = vsi->alloc_queue_pairs;
1609 num_tc_qps = qcount / numtc;
1610 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1612 /* Setup queue offset/count for all TCs for given VSI */
1613 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1614 /* See if the given TC is enabled for the given VSI */
1615 if (vsi->tc_config.enabled_tc & BIT(i)) {
1619 switch (vsi->type) {
1621 qcount = min_t(int, pf->alloc_rss_size,
1625 case I40E_VSI_SRIOV:
1626 case I40E_VSI_VMDQ2:
1628 qcount = num_tc_qps;
1632 vsi->tc_config.tc_info[i].qoffset = offset;
1633 vsi->tc_config.tc_info[i].qcount = qcount;
1635 /* find the next higher power-of-2 of num queue pairs */
1638 while (num_qps && (BIT_ULL(pow) < qcount)) {
1643 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1645 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1646 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1650 /* TC is not enabled so set the offset to
1651 * default queue and allocate one queue
1654 vsi->tc_config.tc_info[i].qoffset = 0;
1655 vsi->tc_config.tc_info[i].qcount = 1;
1656 vsi->tc_config.tc_info[i].netdev_tc = 0;
1660 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1663 /* Set actual Tx/Rx queue pairs */
1664 vsi->num_queue_pairs = offset;
1665 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1666 if (vsi->req_queue_pairs > 0)
1667 vsi->num_queue_pairs = vsi->req_queue_pairs;
1668 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1669 vsi->num_queue_pairs = pf->num_lan_msix;
1672 /* Scheduler section valid can only be set for ADD VSI */
1674 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1676 ctxt->info.up_enable_bits = enabled_tc;
1678 if (vsi->type == I40E_VSI_SRIOV) {
1679 ctxt->info.mapping_flags |=
1680 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1681 for (i = 0; i < vsi->num_queue_pairs; i++)
1682 ctxt->info.queue_mapping[i] =
1683 cpu_to_le16(vsi->base_queue + i);
1685 ctxt->info.mapping_flags |=
1686 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1687 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1689 ctxt->info.valid_sections |= cpu_to_le16(sections);
1693 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1694 * @netdev: the netdevice
1695 * @addr: address to add
1697 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1698 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1700 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1702 struct i40e_netdev_priv *np = netdev_priv(netdev);
1703 struct i40e_vsi *vsi = np->vsi;
1705 if (i40e_add_mac_filter(vsi, addr))
1712 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1713 * @netdev: the netdevice
1714 * @addr: address to add
1716 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1717 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1719 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1721 struct i40e_netdev_priv *np = netdev_priv(netdev);
1722 struct i40e_vsi *vsi = np->vsi;
1724 i40e_del_mac_filter(vsi, addr);
1730 * i40e_set_rx_mode - NDO callback to set the netdev filters
1731 * @netdev: network interface device structure
1733 static void i40e_set_rx_mode(struct net_device *netdev)
1735 struct i40e_netdev_priv *np = netdev_priv(netdev);
1736 struct i40e_vsi *vsi = np->vsi;
1738 spin_lock_bh(&vsi->mac_filter_hash_lock);
1740 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1741 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1743 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1745 /* check for other flag changes */
1746 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1747 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1748 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1751 /* schedule our worker thread which will take care of
1752 * applying the new filter changes
1754 i40e_service_event_schedule(vsi->back);
1758 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1759 * @vsi: Pointer to VSI struct
1760 * @from: Pointer to list which contains MAC filter entries - changes to
1761 * those entries needs to be undone.
1763 * MAC filter entries from this list were slated for deletion.
1765 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1766 struct hlist_head *from)
1768 struct i40e_mac_filter *f;
1769 struct hlist_node *h;
1771 hlist_for_each_entry_safe(f, h, from, hlist) {
1772 u64 key = i40e_addr_to_hkey(f->macaddr);
1774 /* Move the element back into MAC filter list*/
1775 hlist_del(&f->hlist);
1776 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1781 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1782 * @vsi: Pointer to vsi struct
1783 * @from: Pointer to list which contains MAC filter entries - changes to
1784 * those entries needs to be undone.
1786 * MAC filter entries from this list were slated for addition.
1788 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1789 struct hlist_head *from)
1791 struct i40e_new_mac_filter *new;
1792 struct hlist_node *h;
1794 hlist_for_each_entry_safe(new, h, from, hlist) {
1795 /* We can simply free the wrapper structure */
1796 hlist_del(&new->hlist);
1802 * i40e_next_entry - Get the next non-broadcast filter from a list
1803 * @next: pointer to filter in list
1805 * Returns the next non-broadcast filter in the list. Required so that we
1806 * ignore broadcast filters within the list, since these are not handled via
1807 * the normal firmware update path.
1810 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
1812 hlist_for_each_entry_continue(next, hlist) {
1813 if (!is_broadcast_ether_addr(next->f->macaddr))
1821 * i40e_update_filter_state - Update filter state based on return data
1823 * @count: Number of filters added
1824 * @add_list: return data from fw
1825 * @head: pointer to first filter in current batch
1827 * MAC filter entries from list were slated to be added to device. Returns
1828 * number of successful filters. Note that 0 does NOT mean success!
1831 i40e_update_filter_state(int count,
1832 struct i40e_aqc_add_macvlan_element_data *add_list,
1833 struct i40e_new_mac_filter *add_head)
1838 for (i = 0; i < count; i++) {
1839 /* Always check status of each filter. We don't need to check
1840 * the firmware return status because we pre-set the filter
1841 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
1842 * request to the adminq. Thus, if it no longer matches then
1843 * we know the filter is active.
1845 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
1846 add_head->state = I40E_FILTER_FAILED;
1848 add_head->state = I40E_FILTER_ACTIVE;
1852 add_head = i40e_next_filter(add_head);
1861 * i40e_aqc_del_filters - Request firmware to delete a set of filters
1862 * @vsi: ptr to the VSI
1863 * @vsi_name: name to display in messages
1864 * @list: the list of filters to send to firmware
1865 * @num_del: the number of filters to delete
1866 * @retval: Set to -EIO on failure to delete
1868 * Send a request to firmware via AdminQ to delete a set of filters. Uses
1869 * *retval instead of a return value so that success does not force ret_val to
1870 * be set to 0. This ensures that a sequence of calls to this function
1871 * preserve the previous value of *retval on successful delete.
1874 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
1875 struct i40e_aqc_remove_macvlan_element_data *list,
1876 int num_del, int *retval)
1878 struct i40e_hw *hw = &vsi->back->hw;
1882 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
1883 aq_err = hw->aq.asq_last_status;
1885 /* Explicitly ignore and do not report when firmware returns ENOENT */
1886 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1888 dev_info(&vsi->back->pdev->dev,
1889 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1890 vsi_name, i40e_stat_str(hw, aq_ret),
1891 i40e_aq_str(hw, aq_err));
1896 * i40e_aqc_add_filters - Request firmware to add a set of filters
1897 * @vsi: ptr to the VSI
1898 * @vsi_name: name to display in messages
1899 * @list: the list of filters to send to firmware
1900 * @add_head: Position in the add hlist
1901 * @num_add: the number of filters to add
1902 * @promisc_change: set to true on exit if promiscuous mode was forced on
1904 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
1905 * promisc_changed to true if the firmware has run out of space for more
1909 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
1910 struct i40e_aqc_add_macvlan_element_data *list,
1911 struct i40e_new_mac_filter *add_head,
1912 int num_add, bool *promisc_changed)
1914 struct i40e_hw *hw = &vsi->back->hw;
1917 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
1918 aq_err = hw->aq.asq_last_status;
1919 fcnt = i40e_update_filter_state(num_add, list, add_head);
1921 if (fcnt != num_add) {
1922 *promisc_changed = true;
1923 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
1924 dev_warn(&vsi->back->pdev->dev,
1925 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
1926 i40e_aq_str(hw, aq_err),
1932 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
1933 * @vsi: pointer to the VSI
1936 * This function sets or clears the promiscuous broadcast flags for VLAN
1937 * filters in order to properly receive broadcast frames. Assumes that only
1938 * broadcast filters are passed.
1940 * Returns status indicating success or failure;
1943 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
1944 struct i40e_mac_filter *f)
1946 bool enable = f->state == I40E_FILTER_NEW;
1947 struct i40e_hw *hw = &vsi->back->hw;
1950 if (f->vlan == I40E_VLAN_ANY) {
1951 aq_ret = i40e_aq_set_vsi_broadcast(hw,
1956 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
1964 dev_warn(&vsi->back->pdev->dev,
1965 "Error %s setting broadcast promiscuous mode on %s\n",
1966 i40e_aq_str(hw, hw->aq.asq_last_status),
1973 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1974 * @vsi: ptr to the VSI
1976 * Push any outstanding VSI filter changes through the AdminQ.
1978 * Returns 0 or error value
1980 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1982 struct hlist_head tmp_add_list, tmp_del_list;
1983 struct i40e_mac_filter *f;
1984 struct i40e_new_mac_filter *new, *add_head = NULL;
1985 struct i40e_hw *hw = &vsi->back->hw;
1986 unsigned int failed_filters = 0;
1987 unsigned int vlan_filters = 0;
1988 bool promisc_changed = false;
1989 char vsi_name[16] = "PF";
1990 int filter_list_len = 0;
1991 i40e_status aq_ret = 0;
1992 u32 changed_flags = 0;
1993 struct hlist_node *h;
2002 /* empty array typed pointers, kcalloc later */
2003 struct i40e_aqc_add_macvlan_element_data *add_list;
2004 struct i40e_aqc_remove_macvlan_element_data *del_list;
2006 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
2007 usleep_range(1000, 2000);
2011 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2012 vsi->current_netdev_flags = vsi->netdev->flags;
2015 INIT_HLIST_HEAD(&tmp_add_list);
2016 INIT_HLIST_HEAD(&tmp_del_list);
2018 if (vsi->type == I40E_VSI_SRIOV)
2019 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2020 else if (vsi->type != I40E_VSI_MAIN)
2021 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2023 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2024 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2026 spin_lock_bh(&vsi->mac_filter_hash_lock);
2027 /* Create a list of filters to delete. */
2028 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2029 if (f->state == I40E_FILTER_REMOVE) {
2030 /* Move the element into temporary del_list */
2031 hash_del(&f->hlist);
2032 hlist_add_head(&f->hlist, &tmp_del_list);
2034 /* Avoid counting removed filters */
2037 if (f->state == I40E_FILTER_NEW) {
2038 /* Create a temporary i40e_new_mac_filter */
2039 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2041 goto err_no_memory_locked;
2043 /* Store pointer to the real filter */
2045 new->state = f->state;
2047 /* Add it to the hash list */
2048 hlist_add_head(&new->hlist, &tmp_add_list);
2051 /* Count the number of active (current and new) VLAN
2052 * filters we have now. Does not count filters which
2053 * are marked for deletion.
2059 retval = i40e_correct_mac_vlan_filters(vsi,
2064 goto err_no_memory_locked;
2066 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2069 /* Now process 'del_list' outside the lock */
2070 if (!hlist_empty(&tmp_del_list)) {
2071 filter_list_len = hw->aq.asq_buf_size /
2072 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2073 list_size = filter_list_len *
2074 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2075 del_list = kzalloc(list_size, GFP_ATOMIC);
2079 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2082 /* handle broadcast filters by updating the broadcast
2083 * promiscuous flag and release filter list.
2085 if (is_broadcast_ether_addr(f->macaddr)) {
2086 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2088 hlist_del(&f->hlist);
2093 /* add to delete list */
2094 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2095 if (f->vlan == I40E_VLAN_ANY) {
2096 del_list[num_del].vlan_tag = 0;
2097 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2099 del_list[num_del].vlan_tag =
2100 cpu_to_le16((u16)(f->vlan));
2103 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2104 del_list[num_del].flags = cmd_flags;
2107 /* flush a full buffer */
2108 if (num_del == filter_list_len) {
2109 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2111 memset(del_list, 0, list_size);
2114 /* Release memory for MAC filter entries which were
2115 * synced up with HW.
2117 hlist_del(&f->hlist);
2122 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2130 if (!hlist_empty(&tmp_add_list)) {
2131 /* Do all the adds now. */
2132 filter_list_len = hw->aq.asq_buf_size /
2133 sizeof(struct i40e_aqc_add_macvlan_element_data);
2134 list_size = filter_list_len *
2135 sizeof(struct i40e_aqc_add_macvlan_element_data);
2136 add_list = kzalloc(list_size, GFP_ATOMIC);
2141 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2142 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2144 new->state = I40E_FILTER_FAILED;
2148 /* handle broadcast filters by updating the broadcast
2149 * promiscuous flag instead of adding a MAC filter.
2151 if (is_broadcast_ether_addr(new->f->macaddr)) {
2152 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2154 new->state = I40E_FILTER_FAILED;
2156 new->state = I40E_FILTER_ACTIVE;
2160 /* add to add array */
2164 ether_addr_copy(add_list[num_add].mac_addr,
2166 if (new->f->vlan == I40E_VLAN_ANY) {
2167 add_list[num_add].vlan_tag = 0;
2168 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2170 add_list[num_add].vlan_tag =
2171 cpu_to_le16((u16)(new->f->vlan));
2173 add_list[num_add].queue_number = 0;
2174 /* set invalid match method for later detection */
2175 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2176 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2177 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2180 /* flush a full buffer */
2181 if (num_add == filter_list_len) {
2182 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2185 memset(add_list, 0, list_size);
2190 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2191 num_add, &promisc_changed);
2193 /* Now move all of the filters from the temp add list back to
2196 spin_lock_bh(&vsi->mac_filter_hash_lock);
2197 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2198 /* Only update the state if we're still NEW */
2199 if (new->f->state == I40E_FILTER_NEW)
2200 new->f->state = new->state;
2201 hlist_del(&new->hlist);
2204 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2209 /* Determine the number of active and failed filters. */
2210 spin_lock_bh(&vsi->mac_filter_hash_lock);
2211 vsi->active_filters = 0;
2212 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2213 if (f->state == I40E_FILTER_ACTIVE)
2214 vsi->active_filters++;
2215 else if (f->state == I40E_FILTER_FAILED)
2218 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2220 /* If promiscuous mode has changed, we need to calculate a new
2221 * threshold for when we are safe to exit
2223 if (promisc_changed)
2224 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2226 /* Check if we are able to exit overflow promiscuous mode. We can
2227 * safely exit if we didn't just enter, we no longer have any failed
2228 * filters, and we have reduced filters below the threshold value.
2230 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2231 !promisc_changed && !failed_filters &&
2232 (vsi->active_filters < vsi->promisc_threshold)) {
2233 dev_info(&pf->pdev->dev,
2234 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2236 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2237 promisc_changed = true;
2238 vsi->promisc_threshold = 0;
2241 /* if the VF is not trusted do not do promisc */
2242 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2243 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2247 /* check for changes in promiscuous modes */
2248 if (changed_flags & IFF_ALLMULTI) {
2249 bool cur_multipromisc;
2251 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2252 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2257 retval = i40e_aq_rc_to_posix(aq_ret,
2258 hw->aq.asq_last_status);
2259 dev_info(&pf->pdev->dev,
2260 "set multi promisc failed on %s, err %s aq_err %s\n",
2262 i40e_stat_str(hw, aq_ret),
2263 i40e_aq_str(hw, hw->aq.asq_last_status));
2266 if ((changed_flags & IFF_PROMISC) ||
2268 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2271 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2272 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2274 if ((vsi->type == I40E_VSI_MAIN) &&
2275 (pf->lan_veb != I40E_NO_VEB) &&
2276 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2277 /* set defport ON for Main VSI instead of true promisc
2278 * this way we will get all unicast/multicast and VLAN
2279 * promisc behavior but will not get VF or VMDq traffic
2280 * replicated on the Main VSI.
2282 if (pf->cur_promisc != cur_promisc) {
2283 pf->cur_promisc = cur_promisc;
2286 i40e_aq_set_default_vsi(hw,
2291 i40e_aq_clear_default_vsi(hw,
2295 retval = i40e_aq_rc_to_posix(aq_ret,
2296 hw->aq.asq_last_status);
2297 dev_info(&pf->pdev->dev,
2298 "Set default VSI failed on %s, err %s, aq_err %s\n",
2300 i40e_stat_str(hw, aq_ret),
2302 hw->aq.asq_last_status));
2306 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2313 i40e_aq_rc_to_posix(aq_ret,
2314 hw->aq.asq_last_status);
2315 dev_info(&pf->pdev->dev,
2316 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2318 i40e_stat_str(hw, aq_ret),
2320 hw->aq.asq_last_status));
2322 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2328 i40e_aq_rc_to_posix(aq_ret,
2329 hw->aq.asq_last_status);
2330 dev_info(&pf->pdev->dev,
2331 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2333 i40e_stat_str(hw, aq_ret),
2335 hw->aq.asq_last_status));
2338 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2342 retval = i40e_aq_rc_to_posix(aq_ret,
2343 pf->hw.aq.asq_last_status);
2344 dev_info(&pf->pdev->dev,
2345 "set brdcast promisc failed, err %s, aq_err %s\n",
2346 i40e_stat_str(hw, aq_ret),
2348 hw->aq.asq_last_status));
2352 /* if something went wrong then set the changed flag so we try again */
2354 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2356 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2360 /* Restore elements on the temporary add and delete lists */
2361 spin_lock_bh(&vsi->mac_filter_hash_lock);
2362 err_no_memory_locked:
2363 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2364 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2365 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2367 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2368 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2373 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2374 * @pf: board private structure
2376 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2380 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2382 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2384 for (v = 0; v < pf->num_alloc_vsi; v++) {
2386 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2387 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2390 /* come back and try again later */
2391 pf->flags |= I40E_FLAG_FILTER_SYNC;
2399 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2400 * @netdev: network interface device structure
2401 * @new_mtu: new value for maximum frame size
2403 * Returns 0 on success, negative on failure
2405 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2407 struct i40e_netdev_priv *np = netdev_priv(netdev);
2408 struct i40e_vsi *vsi = np->vsi;
2409 struct i40e_pf *pf = vsi->back;
2411 netdev_info(netdev, "changing MTU from %d to %d\n",
2412 netdev->mtu, new_mtu);
2413 netdev->mtu = new_mtu;
2414 if (netif_running(netdev))
2415 i40e_vsi_reinit_locked(vsi);
2416 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
2417 I40E_FLAG_CLIENT_L2_CHANGE);
2422 * i40e_ioctl - Access the hwtstamp interface
2423 * @netdev: network interface device structure
2424 * @ifr: interface request data
2425 * @cmd: ioctl command
2427 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2429 struct i40e_netdev_priv *np = netdev_priv(netdev);
2430 struct i40e_pf *pf = np->vsi->back;
2434 return i40e_ptp_get_ts_config(pf, ifr);
2436 return i40e_ptp_set_ts_config(pf, ifr);
2443 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2444 * @vsi: the vsi being adjusted
2446 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2448 struct i40e_vsi_context ctxt;
2451 if ((vsi->info.valid_sections &
2452 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2453 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2454 return; /* already enabled */
2456 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2457 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2458 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2460 ctxt.seid = vsi->seid;
2461 ctxt.info = vsi->info;
2462 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2464 dev_info(&vsi->back->pdev->dev,
2465 "update vlan stripping failed, err %s aq_err %s\n",
2466 i40e_stat_str(&vsi->back->hw, ret),
2467 i40e_aq_str(&vsi->back->hw,
2468 vsi->back->hw.aq.asq_last_status));
2473 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2474 * @vsi: the vsi being adjusted
2476 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2478 struct i40e_vsi_context ctxt;
2481 if ((vsi->info.valid_sections &
2482 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2483 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2484 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2485 return; /* already disabled */
2487 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2488 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2489 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2491 ctxt.seid = vsi->seid;
2492 ctxt.info = vsi->info;
2493 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2495 dev_info(&vsi->back->pdev->dev,
2496 "update vlan stripping failed, err %s aq_err %s\n",
2497 i40e_stat_str(&vsi->back->hw, ret),
2498 i40e_aq_str(&vsi->back->hw,
2499 vsi->back->hw.aq.asq_last_status));
2504 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2505 * @netdev: network interface to be adjusted
2506 * @features: netdev features to test if VLAN offload is enabled or not
2508 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2510 struct i40e_netdev_priv *np = netdev_priv(netdev);
2511 struct i40e_vsi *vsi = np->vsi;
2513 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2514 i40e_vlan_stripping_enable(vsi);
2516 i40e_vlan_stripping_disable(vsi);
2520 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2521 * @vsi: the vsi being configured
2522 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2524 * This is a helper function for adding a new MAC/VLAN filter with the
2525 * specified VLAN for each existing MAC address already in the hash table.
2526 * This function does *not* perform any accounting to update filters based on
2529 * NOTE: this function expects to be called while under the
2530 * mac_filter_hash_lock
2532 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2534 struct i40e_mac_filter *f, *add_f;
2535 struct hlist_node *h;
2538 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2539 if (f->state == I40E_FILTER_REMOVE)
2541 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2543 dev_info(&vsi->back->pdev->dev,
2544 "Could not add vlan filter %d for %pM\n",
2554 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2555 * @vsi: the VSI being configured
2556 * @vid: VLAN id to be added
2558 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2562 if (!vid || vsi->info.pvid)
2565 /* Locked once because all functions invoked below iterates list*/
2566 spin_lock_bh(&vsi->mac_filter_hash_lock);
2567 err = i40e_add_vlan_all_mac(vsi, vid);
2568 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2572 /* schedule our worker thread which will take care of
2573 * applying the new filter changes
2575 i40e_service_event_schedule(vsi->back);
2580 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2581 * @vsi: the vsi being configured
2582 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2584 * This function should be used to remove all VLAN filters which match the
2585 * given VID. It does not schedule the service event and does not take the
2586 * mac_filter_hash_lock so it may be combined with other operations under
2587 * a single invocation of the mac_filter_hash_lock.
2589 * NOTE: this function expects to be called while under the
2590 * mac_filter_hash_lock
2592 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2594 struct i40e_mac_filter *f;
2595 struct hlist_node *h;
2598 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2600 __i40e_del_filter(vsi, f);
2605 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2606 * @vsi: the VSI being configured
2607 * @vid: VLAN id to be removed
2609 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2611 if (!vid || vsi->info.pvid)
2614 spin_lock_bh(&vsi->mac_filter_hash_lock);
2615 i40e_rm_vlan_all_mac(vsi, vid);
2616 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2618 /* schedule our worker thread which will take care of
2619 * applying the new filter changes
2621 i40e_service_event_schedule(vsi->back);
2625 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2626 * @netdev: network interface to be adjusted
2627 * @vid: vlan id to be added
2629 * net_device_ops implementation for adding vlan ids
2631 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2632 __always_unused __be16 proto, u16 vid)
2634 struct i40e_netdev_priv *np = netdev_priv(netdev);
2635 struct i40e_vsi *vsi = np->vsi;
2638 if (vid >= VLAN_N_VID)
2641 /* If the network stack called us with vid = 0 then
2642 * it is asking to receive priority tagged packets with
2643 * vlan id 0. Our HW receives them by default when configured
2644 * to receive untagged packets so there is no need to add an
2645 * extra filter for vlan 0 tagged packets.
2648 ret = i40e_vsi_add_vlan(vsi, vid);
2651 set_bit(vid, vsi->active_vlans);
2657 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2658 * @netdev: network interface to be adjusted
2659 * @vid: vlan id to be removed
2661 * net_device_ops implementation for removing vlan ids
2663 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2664 __always_unused __be16 proto, u16 vid)
2666 struct i40e_netdev_priv *np = netdev_priv(netdev);
2667 struct i40e_vsi *vsi = np->vsi;
2669 /* return code is ignored as there is nothing a user
2670 * can do about failure to remove and a log message was
2671 * already printed from the other function
2673 i40e_vsi_kill_vlan(vsi, vid);
2675 clear_bit(vid, vsi->active_vlans);
2681 * i40e_macaddr_init - explicitly write the mac address filters
2683 * @vsi: pointer to the vsi
2684 * @macaddr: the MAC address
2686 * This is needed when the macaddr has been obtained by other
2687 * means than the default, e.g., from Open Firmware or IDPROM.
2688 * Returns 0 on success, negative on failure
2690 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2693 struct i40e_aqc_add_macvlan_element_data element;
2695 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2696 I40E_AQC_WRITE_TYPE_LAA_WOL,
2699 dev_info(&vsi->back->pdev->dev,
2700 "Addr change for VSI failed: %d\n", ret);
2701 return -EADDRNOTAVAIL;
2704 memset(&element, 0, sizeof(element));
2705 ether_addr_copy(element.mac_addr, macaddr);
2706 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2707 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2709 dev_info(&vsi->back->pdev->dev,
2710 "add filter failed err %s aq_err %s\n",
2711 i40e_stat_str(&vsi->back->hw, ret),
2712 i40e_aq_str(&vsi->back->hw,
2713 vsi->back->hw.aq.asq_last_status));
2719 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2720 * @vsi: the vsi being brought back up
2722 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2729 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2731 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2732 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2737 * i40e_vsi_add_pvid - Add pvid for the VSI
2738 * @vsi: the vsi being adjusted
2739 * @vid: the vlan id to set as a PVID
2741 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2743 struct i40e_vsi_context ctxt;
2746 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2747 vsi->info.pvid = cpu_to_le16(vid);
2748 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2749 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2750 I40E_AQ_VSI_PVLAN_EMOD_STR;
2752 ctxt.seid = vsi->seid;
2753 ctxt.info = vsi->info;
2754 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2756 dev_info(&vsi->back->pdev->dev,
2757 "add pvid failed, err %s aq_err %s\n",
2758 i40e_stat_str(&vsi->back->hw, ret),
2759 i40e_aq_str(&vsi->back->hw,
2760 vsi->back->hw.aq.asq_last_status));
2768 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2769 * @vsi: the vsi being adjusted
2771 * Just use the vlan_rx_register() service to put it back to normal
2773 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2775 i40e_vlan_stripping_disable(vsi);
2781 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2782 * @vsi: ptr to the VSI
2784 * If this function returns with an error, then it's possible one or
2785 * more of the rings is populated (while the rest are not). It is the
2786 * callers duty to clean those orphaned rings.
2788 * Return 0 on success, negative on failure
2790 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2794 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2795 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2801 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2802 * @vsi: ptr to the VSI
2804 * Free VSI's transmit software resources
2806 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2813 for (i = 0; i < vsi->num_queue_pairs; i++)
2814 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2815 i40e_free_tx_resources(vsi->tx_rings[i]);
2819 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2820 * @vsi: ptr to the VSI
2822 * If this function returns with an error, then it's possible one or
2823 * more of the rings is populated (while the rest are not). It is the
2824 * callers duty to clean those orphaned rings.
2826 * Return 0 on success, negative on failure
2828 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2832 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2833 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2838 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2839 * @vsi: ptr to the VSI
2841 * Free all receive software resources
2843 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2850 for (i = 0; i < vsi->num_queue_pairs; i++)
2851 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2852 i40e_free_rx_resources(vsi->rx_rings[i]);
2856 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2857 * @ring: The Tx ring to configure
2859 * This enables/disables XPS for a given Tx descriptor ring
2860 * based on the TCs enabled for the VSI that ring belongs to.
2862 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2864 struct i40e_vsi *vsi = ring->vsi;
2867 if (!ring->q_vector || !ring->netdev)
2870 /* Single TC mode enable XPS */
2871 if (vsi->tc_config.numtc <= 1) {
2872 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2873 netif_set_xps_queue(ring->netdev,
2874 &ring->q_vector->affinity_mask,
2876 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2877 /* Disable XPS to allow selection based on TC */
2878 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2879 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2880 free_cpumask_var(mask);
2883 /* schedule our worker thread which will take care of
2884 * applying the new filter changes
2886 i40e_service_event_schedule(vsi->back);
2890 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2891 * @ring: The Tx ring to configure
2893 * Configure the Tx descriptor ring in the HMC context.
2895 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2897 struct i40e_vsi *vsi = ring->vsi;
2898 u16 pf_q = vsi->base_queue + ring->queue_index;
2899 struct i40e_hw *hw = &vsi->back->hw;
2900 struct i40e_hmc_obj_txq tx_ctx;
2901 i40e_status err = 0;
2904 /* some ATR related tx ring init */
2905 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2906 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2907 ring->atr_count = 0;
2909 ring->atr_sample_rate = 0;
2913 i40e_config_xps_tx_ring(ring);
2915 /* clear the context structure first */
2916 memset(&tx_ctx, 0, sizeof(tx_ctx));
2918 tx_ctx.new_context = 1;
2919 tx_ctx.base = (ring->dma / 128);
2920 tx_ctx.qlen = ring->count;
2921 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2922 I40E_FLAG_FD_ATR_ENABLED));
2923 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2924 /* FDIR VSI tx ring can still use RS bit and writebacks */
2925 if (vsi->type != I40E_VSI_FDIR)
2926 tx_ctx.head_wb_ena = 1;
2927 tx_ctx.head_wb_addr = ring->dma +
2928 (ring->count * sizeof(struct i40e_tx_desc));
2930 /* As part of VSI creation/update, FW allocates certain
2931 * Tx arbitration queue sets for each TC enabled for
2932 * the VSI. The FW returns the handles to these queue
2933 * sets as part of the response buffer to Add VSI,
2934 * Update VSI, etc. AQ commands. It is expected that
2935 * these queue set handles be associated with the Tx
2936 * queues by the driver as part of the TX queue context
2937 * initialization. This has to be done regardless of
2938 * DCB as by default everything is mapped to TC0.
2940 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2941 tx_ctx.rdylist_act = 0;
2943 /* clear the context in the HMC */
2944 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2946 dev_info(&vsi->back->pdev->dev,
2947 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2948 ring->queue_index, pf_q, err);
2952 /* set the context in the HMC */
2953 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2955 dev_info(&vsi->back->pdev->dev,
2956 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2957 ring->queue_index, pf_q, err);
2961 /* Now associate this queue with this PCI function */
2962 if (vsi->type == I40E_VSI_VMDQ2) {
2963 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2964 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2965 I40E_QTX_CTL_VFVM_INDX_MASK;
2967 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2970 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2971 I40E_QTX_CTL_PF_INDX_MASK);
2972 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2975 /* cache tail off for easier writes later */
2976 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2982 * i40e_configure_rx_ring - Configure a receive ring context
2983 * @ring: The Rx ring to configure
2985 * Configure the Rx descriptor ring in the HMC context.
2987 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2989 struct i40e_vsi *vsi = ring->vsi;
2990 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2991 u16 pf_q = vsi->base_queue + ring->queue_index;
2992 struct i40e_hw *hw = &vsi->back->hw;
2993 struct i40e_hmc_obj_rxq rx_ctx;
2994 i40e_status err = 0;
2998 /* clear the context structure first */
2999 memset(&rx_ctx, 0, sizeof(rx_ctx));
3001 ring->rx_buf_len = vsi->rx_buf_len;
3003 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3004 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3006 rx_ctx.base = (ring->dma / 128);
3007 rx_ctx.qlen = ring->count;
3009 /* use 32 byte descriptors */
3012 /* descriptor type is always zero
3015 rx_ctx.hsplit_0 = 0;
3017 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3018 if (hw->revision_id == 0)
3019 rx_ctx.lrxqthresh = 0;
3021 rx_ctx.lrxqthresh = 2;
3022 rx_ctx.crcstrip = 1;
3024 /* this controls whether VLAN is stripped from inner headers */
3026 /* set the prefena field to 1 because the manual says to */
3029 /* clear the context in the HMC */
3030 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3032 dev_info(&vsi->back->pdev->dev,
3033 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3034 ring->queue_index, pf_q, err);
3038 /* set the context in the HMC */
3039 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3041 dev_info(&vsi->back->pdev->dev,
3042 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3043 ring->queue_index, pf_q, err);
3047 /* configure Rx buffer alignment */
3048 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3049 clear_ring_build_skb_enabled(ring);
3051 set_ring_build_skb_enabled(ring);
3053 /* cache tail for quicker writes, and clear the reg before use */
3054 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3055 writel(0, ring->tail);
3057 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3063 * i40e_vsi_configure_tx - Configure the VSI for Tx
3064 * @vsi: VSI structure describing this set of rings and resources
3066 * Configure the Tx VSI for operation.
3068 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3073 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3074 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3080 * i40e_vsi_configure_rx - Configure the VSI for Rx
3081 * @vsi: the VSI being configured
3083 * Configure the Rx VSI for operation.
3085 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3090 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3091 vsi->max_frame = I40E_MAX_RXBUFFER;
3092 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3093 #if (PAGE_SIZE < 8192)
3094 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3095 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3096 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3097 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3100 vsi->max_frame = I40E_MAX_RXBUFFER;
3101 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3105 /* set up individual rings */
3106 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3107 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3113 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3114 * @vsi: ptr to the VSI
3116 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3118 struct i40e_ring *tx_ring, *rx_ring;
3119 u16 qoffset, qcount;
3122 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3123 /* Reset the TC information */
3124 for (i = 0; i < vsi->num_queue_pairs; i++) {
3125 rx_ring = vsi->rx_rings[i];
3126 tx_ring = vsi->tx_rings[i];
3127 rx_ring->dcb_tc = 0;
3128 tx_ring->dcb_tc = 0;
3132 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3133 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3136 qoffset = vsi->tc_config.tc_info[n].qoffset;
3137 qcount = vsi->tc_config.tc_info[n].qcount;
3138 for (i = qoffset; i < (qoffset + qcount); i++) {
3139 rx_ring = vsi->rx_rings[i];
3140 tx_ring = vsi->tx_rings[i];
3141 rx_ring->dcb_tc = n;
3142 tx_ring->dcb_tc = n;
3148 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3149 * @vsi: ptr to the VSI
3151 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3153 struct i40e_pf *pf = vsi->back;
3157 i40e_set_rx_mode(vsi->netdev);
3159 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3160 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3162 dev_warn(&pf->pdev->dev,
3163 "could not set up macaddr; err %d\n", err);
3169 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3170 * @vsi: Pointer to the targeted VSI
3172 * This function replays the hlist on the hw where all the SB Flow Director
3173 * filters were saved.
3175 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3177 struct i40e_fdir_filter *filter;
3178 struct i40e_pf *pf = vsi->back;
3179 struct hlist_node *node;
3181 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3184 /* Reset FDir counters as we're replaying all existing filters */
3185 pf->fd_tcp4_filter_cnt = 0;
3186 pf->fd_udp4_filter_cnt = 0;
3187 pf->fd_sctp4_filter_cnt = 0;
3188 pf->fd_ip4_filter_cnt = 0;
3190 hlist_for_each_entry_safe(filter, node,
3191 &pf->fdir_filter_list, fdir_node) {
3192 i40e_add_del_fdir(vsi, filter, true);
3197 * i40e_vsi_configure - Set up the VSI for action
3198 * @vsi: the VSI being configured
3200 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3204 i40e_set_vsi_rx_mode(vsi);
3205 i40e_restore_vlan(vsi);
3206 i40e_vsi_config_dcb_rings(vsi);
3207 err = i40e_vsi_configure_tx(vsi);
3209 err = i40e_vsi_configure_rx(vsi);
3215 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3216 * @vsi: the VSI being configured
3218 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3220 struct i40e_pf *pf = vsi->back;
3221 struct i40e_hw *hw = &pf->hw;
3226 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3227 * and PFINT_LNKLSTn registers, e.g.:
3228 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3230 qp = vsi->base_queue;
3231 vector = vsi->base_vector;
3232 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3233 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3235 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3236 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3237 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3238 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3240 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3241 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3242 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3244 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3245 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3247 /* Linked list for the queuepairs assigned to this vector */
3248 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3249 for (q = 0; q < q_vector->num_ringpairs; q++) {
3252 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3253 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3254 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3255 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3257 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3259 wr32(hw, I40E_QINT_RQCTL(qp), val);
3261 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3262 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3263 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3264 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3266 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3268 /* Terminate the linked list */
3269 if (q == (q_vector->num_ringpairs - 1))
3270 val |= (I40E_QUEUE_END_OF_LIST
3271 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3273 wr32(hw, I40E_QINT_TQCTL(qp), val);
3282 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3283 * @hw: ptr to the hardware info
3285 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3287 struct i40e_hw *hw = &pf->hw;
3290 /* clear things first */
3291 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3292 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3294 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3295 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3296 I40E_PFINT_ICR0_ENA_GRST_MASK |
3297 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3298 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3299 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3300 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3301 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3303 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3304 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3306 if (pf->flags & I40E_FLAG_PTP)
3307 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3309 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3311 /* SW_ITR_IDX = 0, but don't change INTENA */
3312 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3313 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3315 /* OTHER_ITR_IDX = 0 */
3316 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3320 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3321 * @vsi: the VSI being configured
3323 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3325 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3326 struct i40e_pf *pf = vsi->back;
3327 struct i40e_hw *hw = &pf->hw;
3330 /* set the ITR configuration */
3331 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3332 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3333 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3334 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3335 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3336 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3337 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3339 i40e_enable_misc_int_causes(pf);
3341 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3342 wr32(hw, I40E_PFINT_LNKLST0, 0);
3344 /* Associate the queue pair to the vector and enable the queue int */
3345 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3346 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3347 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3349 wr32(hw, I40E_QINT_RQCTL(0), val);
3351 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3352 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3353 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3355 wr32(hw, I40E_QINT_TQCTL(0), val);
3360 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3361 * @pf: board private structure
3363 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3365 struct i40e_hw *hw = &pf->hw;
3367 wr32(hw, I40E_PFINT_DYN_CTL0,
3368 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3373 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3374 * @pf: board private structure
3375 * @clearpba: true when all pending interrupt events should be cleared
3377 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3379 struct i40e_hw *hw = &pf->hw;
3382 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3383 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3384 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3386 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3391 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3392 * @irq: interrupt number
3393 * @data: pointer to a q_vector
3395 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3397 struct i40e_q_vector *q_vector = data;
3399 if (!q_vector->tx.ring && !q_vector->rx.ring)
3402 napi_schedule_irqoff(&q_vector->napi);
3408 * i40e_irq_affinity_notify - Callback for affinity changes
3409 * @notify: context as to what irq was changed
3410 * @mask: the new affinity mask
3412 * This is a callback function used by the irq_set_affinity_notifier function
3413 * so that we may register to receive changes to the irq affinity masks.
3415 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3416 const cpumask_t *mask)
3418 struct i40e_q_vector *q_vector =
3419 container_of(notify, struct i40e_q_vector, affinity_notify);
3421 q_vector->affinity_mask = *mask;
3425 * i40e_irq_affinity_release - Callback for affinity notifier release
3426 * @ref: internal core kernel usage
3428 * This is a callback function used by the irq_set_affinity_notifier function
3429 * to inform the current notification subscriber that they will no longer
3430 * receive notifications.
3432 static void i40e_irq_affinity_release(struct kref *ref) {}
3435 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3436 * @vsi: the VSI being configured
3437 * @basename: name for the vector
3439 * Allocates MSI-X vectors and requests interrupts from the kernel.
3441 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3443 int q_vectors = vsi->num_q_vectors;
3444 struct i40e_pf *pf = vsi->back;
3445 int base = vsi->base_vector;
3451 for (vector = 0; vector < q_vectors; vector++) {
3452 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3454 irq_num = pf->msix_entries[base + vector].vector;
3456 if (q_vector->tx.ring && q_vector->rx.ring) {
3457 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3458 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3460 } else if (q_vector->rx.ring) {
3461 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3462 "%s-%s-%d", basename, "rx", rx_int_idx++);
3463 } else if (q_vector->tx.ring) {
3464 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3465 "%s-%s-%d", basename, "tx", tx_int_idx++);
3467 /* skip this unused q_vector */
3470 err = request_irq(irq_num,
3476 dev_info(&pf->pdev->dev,
3477 "MSIX request_irq failed, error: %d\n", err);
3478 goto free_queue_irqs;
3481 /* register for affinity change notifications */
3482 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3483 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3484 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3485 /* assign the mask for this irq */
3486 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
3489 vsi->irqs_ready = true;
3495 irq_num = pf->msix_entries[base + vector].vector;
3496 irq_set_affinity_notifier(irq_num, NULL);
3497 irq_set_affinity_hint(irq_num, NULL);
3498 free_irq(irq_num, &vsi->q_vectors[vector]);
3504 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3505 * @vsi: the VSI being un-configured
3507 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3509 struct i40e_pf *pf = vsi->back;
3510 struct i40e_hw *hw = &pf->hw;
3511 int base = vsi->base_vector;
3514 for (i = 0; i < vsi->num_queue_pairs; i++) {
3515 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3516 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3519 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3520 for (i = vsi->base_vector;
3521 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3522 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3525 for (i = 0; i < vsi->num_q_vectors; i++)
3526 synchronize_irq(pf->msix_entries[i + base].vector);
3528 /* Legacy and MSI mode - this stops all interrupt handling */
3529 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3530 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3532 synchronize_irq(pf->pdev->irq);
3537 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3538 * @vsi: the VSI being configured
3540 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3542 struct i40e_pf *pf = vsi->back;
3545 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3546 for (i = 0; i < vsi->num_q_vectors; i++)
3547 i40e_irq_dynamic_enable(vsi, i);
3549 i40e_irq_dynamic_enable_icr0(pf, true);
3552 i40e_flush(&pf->hw);
3557 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3558 * @pf: board private structure
3560 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3563 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3564 i40e_flush(&pf->hw);
3568 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3569 * @irq: interrupt number
3570 * @data: pointer to a q_vector
3572 * This is the handler used for all MSI/Legacy interrupts, and deals
3573 * with both queue and non-queue interrupts. This is also used in
3574 * MSIX mode to handle the non-queue interrupts.
3576 static irqreturn_t i40e_intr(int irq, void *data)
3578 struct i40e_pf *pf = (struct i40e_pf *)data;
3579 struct i40e_hw *hw = &pf->hw;
3580 irqreturn_t ret = IRQ_NONE;
3581 u32 icr0, icr0_remaining;
3584 icr0 = rd32(hw, I40E_PFINT_ICR0);
3585 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3587 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3588 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3591 /* if interrupt but no bits showing, must be SWINT */
3592 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3593 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3596 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3597 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3598 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3599 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3600 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3603 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3604 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3605 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3606 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3608 /* We do not have a way to disarm Queue causes while leaving
3609 * interrupt enabled for all other causes, ideally
3610 * interrupt should be disabled while we are in NAPI but
3611 * this is not a performance path and napi_schedule()
3612 * can deal with rescheduling.
3614 if (!test_bit(__I40E_DOWN, &pf->state))
3615 napi_schedule_irqoff(&q_vector->napi);
3618 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3619 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3620 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3621 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3624 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3625 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3626 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3629 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3630 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3631 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3634 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3635 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3636 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3637 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3638 val = rd32(hw, I40E_GLGEN_RSTAT);
3639 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3640 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3641 if (val == I40E_RESET_CORER) {
3643 } else if (val == I40E_RESET_GLOBR) {
3645 } else if (val == I40E_RESET_EMPR) {
3647 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3651 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3652 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3653 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3654 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3655 rd32(hw, I40E_PFHMC_ERRORINFO),
3656 rd32(hw, I40E_PFHMC_ERRORDATA));
3659 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3660 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3662 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3663 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3664 i40e_ptp_tx_hwtstamp(pf);
3668 /* If a critical error is pending we have no choice but to reset the
3670 * Report and mask out any remaining unexpected interrupts.
3672 icr0_remaining = icr0 & ena_mask;
3673 if (icr0_remaining) {
3674 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3676 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3677 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3678 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3679 dev_info(&pf->pdev->dev, "device will be reset\n");
3680 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3681 i40e_service_event_schedule(pf);
3683 ena_mask &= ~icr0_remaining;
3688 /* re-enable interrupt causes */
3689 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3690 if (!test_bit(__I40E_DOWN, &pf->state)) {
3691 i40e_service_event_schedule(pf);
3692 i40e_irq_dynamic_enable_icr0(pf, false);
3699 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3700 * @tx_ring: tx ring to clean
3701 * @budget: how many cleans we're allowed
3703 * Returns true if there's any budget left (e.g. the clean is finished)
3705 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3707 struct i40e_vsi *vsi = tx_ring->vsi;
3708 u16 i = tx_ring->next_to_clean;
3709 struct i40e_tx_buffer *tx_buf;
3710 struct i40e_tx_desc *tx_desc;
3712 tx_buf = &tx_ring->tx_bi[i];
3713 tx_desc = I40E_TX_DESC(tx_ring, i);
3714 i -= tx_ring->count;
3717 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3719 /* if next_to_watch is not set then there is no work pending */
3723 /* prevent any other reads prior to eop_desc */
3724 read_barrier_depends();
3726 /* if the descriptor isn't done, no work yet to do */
3727 if (!(eop_desc->cmd_type_offset_bsz &
3728 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3731 /* clear next_to_watch to prevent false hangs */
3732 tx_buf->next_to_watch = NULL;
3734 tx_desc->buffer_addr = 0;
3735 tx_desc->cmd_type_offset_bsz = 0;
3736 /* move past filter desc */
3741 i -= tx_ring->count;
3742 tx_buf = tx_ring->tx_bi;
3743 tx_desc = I40E_TX_DESC(tx_ring, 0);
3745 /* unmap skb header data */
3746 dma_unmap_single(tx_ring->dev,
3747 dma_unmap_addr(tx_buf, dma),
3748 dma_unmap_len(tx_buf, len),
3750 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3751 kfree(tx_buf->raw_buf);
3753 tx_buf->raw_buf = NULL;
3754 tx_buf->tx_flags = 0;
3755 tx_buf->next_to_watch = NULL;
3756 dma_unmap_len_set(tx_buf, len, 0);
3757 tx_desc->buffer_addr = 0;
3758 tx_desc->cmd_type_offset_bsz = 0;
3760 /* move us past the eop_desc for start of next FD desc */
3765 i -= tx_ring->count;
3766 tx_buf = tx_ring->tx_bi;
3767 tx_desc = I40E_TX_DESC(tx_ring, 0);
3770 /* update budget accounting */
3772 } while (likely(budget));
3774 i += tx_ring->count;
3775 tx_ring->next_to_clean = i;
3777 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3778 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3784 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3785 * @irq: interrupt number
3786 * @data: pointer to a q_vector
3788 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3790 struct i40e_q_vector *q_vector = data;
3791 struct i40e_vsi *vsi;
3793 if (!q_vector->tx.ring)
3796 vsi = q_vector->tx.ring->vsi;
3797 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3803 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3804 * @vsi: the VSI being configured
3805 * @v_idx: vector index
3806 * @qp_idx: queue pair index
3808 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3810 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3811 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3812 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3814 tx_ring->q_vector = q_vector;
3815 tx_ring->next = q_vector->tx.ring;
3816 q_vector->tx.ring = tx_ring;
3817 q_vector->tx.count++;
3819 rx_ring->q_vector = q_vector;
3820 rx_ring->next = q_vector->rx.ring;
3821 q_vector->rx.ring = rx_ring;
3822 q_vector->rx.count++;
3826 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3827 * @vsi: the VSI being configured
3829 * This function maps descriptor rings to the queue-specific vectors
3830 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3831 * one vector per queue pair, but on a constrained vector budget, we
3832 * group the queue pairs as "efficiently" as possible.
3834 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3836 int qp_remaining = vsi->num_queue_pairs;
3837 int q_vectors = vsi->num_q_vectors;
3842 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3843 * group them so there are multiple queues per vector.
3844 * It is also important to go through all the vectors available to be
3845 * sure that if we don't use all the vectors, that the remaining vectors
3846 * are cleared. This is especially important when decreasing the
3847 * number of queues in use.
3849 for (; v_start < q_vectors; v_start++) {
3850 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3852 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3854 q_vector->num_ringpairs = num_ringpairs;
3856 q_vector->rx.count = 0;
3857 q_vector->tx.count = 0;
3858 q_vector->rx.ring = NULL;
3859 q_vector->tx.ring = NULL;
3861 while (num_ringpairs--) {
3862 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3870 * i40e_vsi_request_irq - Request IRQ from the OS
3871 * @vsi: the VSI being configured
3872 * @basename: name for the vector
3874 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3876 struct i40e_pf *pf = vsi->back;
3879 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3880 err = i40e_vsi_request_irq_msix(vsi, basename);
3881 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3882 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3885 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3889 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3894 #ifdef CONFIG_NET_POLL_CONTROLLER
3896 * i40e_netpoll - A Polling 'interrupt' handler
3897 * @netdev: network interface device structure
3899 * This is used by netconsole to send skbs without having to re-enable
3900 * interrupts. It's not called while the normal interrupt routine is executing.
3902 static void i40e_netpoll(struct net_device *netdev)
3904 struct i40e_netdev_priv *np = netdev_priv(netdev);
3905 struct i40e_vsi *vsi = np->vsi;
3906 struct i40e_pf *pf = vsi->back;
3909 /* if interface is down do nothing */
3910 if (test_bit(__I40E_DOWN, &vsi->state))
3913 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3914 for (i = 0; i < vsi->num_q_vectors; i++)
3915 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3917 i40e_intr(pf->pdev->irq, netdev);
3923 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3924 * @pf: the PF being configured
3925 * @pf_q: the PF queue
3926 * @enable: enable or disable state of the queue
3928 * This routine will wait for the given Tx queue of the PF to reach the
3929 * enabled or disabled state.
3930 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3931 * multiple retries; else will return 0 in case of success.
3933 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3938 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3939 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3940 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3943 usleep_range(10, 20);
3945 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3952 * i40e_vsi_control_tx - Start or stop a VSI's rings
3953 * @vsi: the VSI being configured
3954 * @enable: start or stop the rings
3956 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3958 struct i40e_pf *pf = vsi->back;
3959 struct i40e_hw *hw = &pf->hw;
3960 int i, j, pf_q, ret = 0;
3963 pf_q = vsi->base_queue;
3964 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3966 /* warn the TX unit of coming changes */
3967 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3969 usleep_range(10, 20);
3971 for (j = 0; j < 50; j++) {
3972 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3973 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3974 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3976 usleep_range(1000, 2000);
3978 /* Skip if the queue is already in the requested state */
3979 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3982 /* turn on/off the queue */
3984 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3985 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3987 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3990 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3991 /* No waiting for the Tx queue to disable */
3992 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3995 /* wait for the change to finish */
3996 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3998 dev_info(&pf->pdev->dev,
3999 "VSI seid %d Tx ring %d %sable timeout\n",
4000 vsi->seid, pf_q, (enable ? "en" : "dis"));
4009 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4010 * @pf: the PF being configured
4011 * @pf_q: the PF queue
4012 * @enable: enable or disable state of the queue
4014 * This routine will wait for the given Rx queue of the PF to reach the
4015 * enabled or disabled state.
4016 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4017 * multiple retries; else will return 0 in case of success.
4019 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4024 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4025 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4026 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4029 usleep_range(10, 20);
4031 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4038 * i40e_vsi_control_rx - Start or stop a VSI's rings
4039 * @vsi: the VSI being configured
4040 * @enable: start or stop the rings
4042 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4044 struct i40e_pf *pf = vsi->back;
4045 struct i40e_hw *hw = &pf->hw;
4046 int i, j, pf_q, ret = 0;
4049 pf_q = vsi->base_queue;
4050 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4051 for (j = 0; j < 50; j++) {
4052 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4053 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4054 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4056 usleep_range(1000, 2000);
4059 /* Skip if the queue is already in the requested state */
4060 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4063 /* turn on/off the queue */
4065 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4067 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4068 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4069 /* No waiting for the Tx queue to disable */
4070 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4073 /* wait for the change to finish */
4074 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4076 dev_info(&pf->pdev->dev,
4077 "VSI seid %d Rx ring %d %sable timeout\n",
4078 vsi->seid, pf_q, (enable ? "en" : "dis"));
4083 /* Due to HW errata, on Rx disable only, the register can indicate done
4084 * before it really is. Needs 50ms to be sure
4093 * i40e_vsi_start_rings - Start a VSI's rings
4094 * @vsi: the VSI being configured
4096 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4100 /* do rx first for enable and last for disable */
4101 ret = i40e_vsi_control_rx(vsi, true);
4104 ret = i40e_vsi_control_tx(vsi, true);
4110 * i40e_vsi_stop_rings - Stop a VSI's rings
4111 * @vsi: the VSI being configured
4113 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4115 /* do rx first for enable and last for disable
4116 * Ignore return value, we need to shutdown whatever we can
4118 i40e_vsi_control_tx(vsi, false);
4119 i40e_vsi_control_rx(vsi, false);
4123 * i40e_vsi_free_irq - Free the irq association with the OS
4124 * @vsi: the VSI being configured
4126 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4128 struct i40e_pf *pf = vsi->back;
4129 struct i40e_hw *hw = &pf->hw;
4130 int base = vsi->base_vector;
4134 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4135 if (!vsi->q_vectors)
4138 if (!vsi->irqs_ready)
4141 vsi->irqs_ready = false;
4142 for (i = 0; i < vsi->num_q_vectors; i++) {
4147 irq_num = pf->msix_entries[vector].vector;
4149 /* free only the irqs that were actually requested */
4150 if (!vsi->q_vectors[i] ||
4151 !vsi->q_vectors[i]->num_ringpairs)
4154 /* clear the affinity notifier in the IRQ descriptor */
4155 irq_set_affinity_notifier(irq_num, NULL);
4156 /* clear the affinity_mask in the IRQ descriptor */
4157 irq_set_affinity_hint(irq_num, NULL);
4158 synchronize_irq(irq_num);
4159 free_irq(irq_num, vsi->q_vectors[i]);
4161 /* Tear down the interrupt queue link list
4163 * We know that they come in pairs and always
4164 * the Rx first, then the Tx. To clear the
4165 * link list, stick the EOL value into the
4166 * next_q field of the registers.
4168 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4169 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4170 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4171 val |= I40E_QUEUE_END_OF_LIST
4172 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4173 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4175 while (qp != I40E_QUEUE_END_OF_LIST) {
4178 val = rd32(hw, I40E_QINT_RQCTL(qp));
4180 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4181 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4182 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4183 I40E_QINT_RQCTL_INTEVENT_MASK);
4185 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4186 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4188 wr32(hw, I40E_QINT_RQCTL(qp), val);
4190 val = rd32(hw, I40E_QINT_TQCTL(qp));
4192 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4193 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4195 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4196 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4197 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4198 I40E_QINT_TQCTL_INTEVENT_MASK);
4200 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4201 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4203 wr32(hw, I40E_QINT_TQCTL(qp), val);
4208 free_irq(pf->pdev->irq, pf);
4210 val = rd32(hw, I40E_PFINT_LNKLST0);
4211 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4212 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4213 val |= I40E_QUEUE_END_OF_LIST
4214 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4215 wr32(hw, I40E_PFINT_LNKLST0, val);
4217 val = rd32(hw, I40E_QINT_RQCTL(qp));
4218 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4219 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4220 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4221 I40E_QINT_RQCTL_INTEVENT_MASK);
4223 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4224 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4226 wr32(hw, I40E_QINT_RQCTL(qp), val);
4228 val = rd32(hw, I40E_QINT_TQCTL(qp));
4230 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4231 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4232 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4233 I40E_QINT_TQCTL_INTEVENT_MASK);
4235 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4236 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4238 wr32(hw, I40E_QINT_TQCTL(qp), val);
4243 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4244 * @vsi: the VSI being configured
4245 * @v_idx: Index of vector to be freed
4247 * This function frees the memory allocated to the q_vector. In addition if
4248 * NAPI is enabled it will delete any references to the NAPI struct prior
4249 * to freeing the q_vector.
4251 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4253 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4254 struct i40e_ring *ring;
4259 /* disassociate q_vector from rings */
4260 i40e_for_each_ring(ring, q_vector->tx)
4261 ring->q_vector = NULL;
4263 i40e_for_each_ring(ring, q_vector->rx)
4264 ring->q_vector = NULL;
4266 /* only VSI w/ an associated netdev is set up w/ NAPI */
4268 netif_napi_del(&q_vector->napi);
4270 vsi->q_vectors[v_idx] = NULL;
4272 kfree_rcu(q_vector, rcu);
4276 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4277 * @vsi: the VSI being un-configured
4279 * This frees the memory allocated to the q_vectors and
4280 * deletes references to the NAPI struct.
4282 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4286 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4287 i40e_free_q_vector(vsi, v_idx);
4291 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4292 * @pf: board private structure
4294 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4296 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4297 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4298 pci_disable_msix(pf->pdev);
4299 kfree(pf->msix_entries);
4300 pf->msix_entries = NULL;
4301 kfree(pf->irq_pile);
4302 pf->irq_pile = NULL;
4303 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4304 pci_disable_msi(pf->pdev);
4306 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4310 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4311 * @pf: board private structure
4313 * We go through and clear interrupt specific resources and reset the structure
4314 * to pre-load conditions
4316 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4320 i40e_stop_misc_vector(pf);
4321 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4322 synchronize_irq(pf->msix_entries[0].vector);
4323 free_irq(pf->msix_entries[0].vector, pf);
4326 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4327 I40E_IWARP_IRQ_PILE_ID);
4329 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4330 for (i = 0; i < pf->num_alloc_vsi; i++)
4332 i40e_vsi_free_q_vectors(pf->vsi[i]);
4333 i40e_reset_interrupt_capability(pf);
4337 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4338 * @vsi: the VSI being configured
4340 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4347 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4348 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4350 if (q_vector->rx.ring || q_vector->tx.ring)
4351 napi_enable(&q_vector->napi);
4356 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4357 * @vsi: the VSI being configured
4359 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4366 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4367 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4369 if (q_vector->rx.ring || q_vector->tx.ring)
4370 napi_disable(&q_vector->napi);
4375 * i40e_vsi_close - Shut down a VSI
4376 * @vsi: the vsi to be quelled
4378 static void i40e_vsi_close(struct i40e_vsi *vsi)
4380 struct i40e_pf *pf = vsi->back;
4381 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4383 i40e_vsi_free_irq(vsi);
4384 i40e_vsi_free_tx_resources(vsi);
4385 i40e_vsi_free_rx_resources(vsi);
4386 vsi->current_netdev_flags = 0;
4387 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
4388 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
4389 pf->flags |= I40E_FLAG_CLIENT_RESET;
4393 * i40e_quiesce_vsi - Pause a given VSI
4394 * @vsi: the VSI being paused
4396 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4398 if (test_bit(__I40E_DOWN, &vsi->state))
4401 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4402 if (vsi->netdev && netif_running(vsi->netdev))
4403 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4405 i40e_vsi_close(vsi);
4409 * i40e_unquiesce_vsi - Resume a given VSI
4410 * @vsi: the VSI being resumed
4412 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4414 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4417 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4418 if (vsi->netdev && netif_running(vsi->netdev))
4419 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4421 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4425 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4428 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4432 for (v = 0; v < pf->num_alloc_vsi; v++) {
4434 i40e_quiesce_vsi(pf->vsi[v]);
4439 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4442 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4446 for (v = 0; v < pf->num_alloc_vsi; v++) {
4448 i40e_unquiesce_vsi(pf->vsi[v]);
4452 #ifdef CONFIG_I40E_DCB
4454 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4455 * @vsi: the VSI being configured
4457 * Wait until all queues on a given VSI have been disabled.
4459 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4461 struct i40e_pf *pf = vsi->back;
4464 pf_q = vsi->base_queue;
4465 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4466 /* Check and wait for the Tx queue */
4467 ret = i40e_pf_txq_wait(pf, pf_q, false);
4469 dev_info(&pf->pdev->dev,
4470 "VSI seid %d Tx ring %d disable timeout\n",
4474 /* Check and wait for the Tx queue */
4475 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4477 dev_info(&pf->pdev->dev,
4478 "VSI seid %d Rx ring %d disable timeout\n",
4488 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4491 * This function waits for the queues to be in disabled state for all the
4492 * VSIs that are managed by this PF.
4494 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4498 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4500 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4512 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4513 * @q_idx: TX queue number
4514 * @vsi: Pointer to VSI struct
4516 * This function checks specified queue for given VSI. Detects hung condition.
4517 * We proactively detect hung TX queues by checking if interrupts are disabled
4518 * but there are pending descriptors. If it appears hung, attempt to recover
4519 * by triggering a SW interrupt.
4521 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4523 struct i40e_ring *tx_ring = NULL;
4525 u32 val, tx_pending;
4530 /* now that we have an index, find the tx_ring struct */
4531 for (i = 0; i < vsi->num_queue_pairs; i++) {
4532 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4533 if (q_idx == vsi->tx_rings[i]->queue_index) {
4534 tx_ring = vsi->tx_rings[i];
4543 /* Read interrupt register */
4544 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4546 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4547 tx_ring->vsi->base_vector - 1));
4549 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4551 tx_pending = i40e_get_tx_pending(tx_ring);
4553 /* Interrupts are disabled and TX pending is non-zero,
4554 * trigger the SW interrupt (don't wait). Worst case
4555 * there will be one extra interrupt which may result
4556 * into not cleaning any queues because queues are cleaned.
4558 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4559 i40e_force_wb(vsi, tx_ring->q_vector);
4563 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4564 * @pf: pointer to PF struct
4566 * LAN VSI has netdev and netdev has TX queues. This function is to check
4567 * each of those TX queues if they are hung, trigger recovery by issuing
4570 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4572 struct net_device *netdev;
4573 struct i40e_vsi *vsi;
4576 /* Only for LAN VSI */
4577 vsi = pf->vsi[pf->lan_vsi];
4582 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4583 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4584 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4587 /* Make sure type is MAIN VSI */
4588 if (vsi->type != I40E_VSI_MAIN)
4591 netdev = vsi->netdev;
4595 /* Bail out if netif_carrier is not OK */
4596 if (!netif_carrier_ok(netdev))
4599 /* Go thru' TX queues for netdev */
4600 for (i = 0; i < netdev->num_tx_queues; i++) {
4601 struct netdev_queue *q;
4603 q = netdev_get_tx_queue(netdev, i);
4605 i40e_detect_recover_hung_queue(i, vsi);
4610 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4611 * @pf: pointer to PF
4613 * Get TC map for ISCSI PF type that will include iSCSI TC
4616 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4618 struct i40e_dcb_app_priority_table app;
4619 struct i40e_hw *hw = &pf->hw;
4620 u8 enabled_tc = 1; /* TC0 is always enabled */
4622 /* Get the iSCSI APP TLV */
4623 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4625 for (i = 0; i < dcbcfg->numapps; i++) {
4626 app = dcbcfg->app[i];
4627 if (app.selector == I40E_APP_SEL_TCPIP &&
4628 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4629 tc = dcbcfg->etscfg.prioritytable[app.priority];
4630 enabled_tc |= BIT(tc);
4639 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4640 * @dcbcfg: the corresponding DCBx configuration structure
4642 * Return the number of TCs from given DCBx configuration
4644 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4646 int i, tc_unused = 0;
4650 /* Scan the ETS Config Priority Table to find
4651 * traffic class enabled for a given priority
4652 * and create a bitmask of enabled TCs
4654 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4655 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4657 /* Now scan the bitmask to check for
4658 * contiguous TCs starting with TC0
4660 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4661 if (num_tc & BIT(i)) {
4665 pr_err("Non-contiguous TC - Disabling DCB\n");
4673 /* There is always at least TC0 */
4681 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4682 * @dcbcfg: the corresponding DCBx configuration structure
4684 * Query the current DCB configuration and return the number of
4685 * traffic classes enabled from the given DCBX config
4687 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4689 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4693 for (i = 0; i < num_tc; i++)
4694 enabled_tc |= BIT(i);
4700 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4701 * @pf: PF being queried
4703 * Return number of traffic classes enabled for the given PF
4705 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4707 struct i40e_hw *hw = &pf->hw;
4708 u8 i, enabled_tc = 1;
4710 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4712 /* If DCB is not enabled then always in single TC */
4713 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4716 /* SFP mode will be enabled for all TCs on port */
4717 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4718 return i40e_dcb_get_num_tc(dcbcfg);
4720 /* MFP mode return count of enabled TCs for this PF */
4721 if (pf->hw.func_caps.iscsi)
4722 enabled_tc = i40e_get_iscsi_tc_map(pf);
4724 return 1; /* Only TC0 */
4726 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4727 if (enabled_tc & BIT(i))
4734 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4735 * @pf: PF being queried
4737 * Return a bitmap for enabled traffic classes for this PF.
4739 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4741 /* If DCB is not enabled for this PF then just return default TC */
4742 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4743 return I40E_DEFAULT_TRAFFIC_CLASS;
4745 /* SFP mode we want PF to be enabled for all TCs */
4746 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4747 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4749 /* MFP enabled and iSCSI PF type */
4750 if (pf->hw.func_caps.iscsi)
4751 return i40e_get_iscsi_tc_map(pf);
4753 return I40E_DEFAULT_TRAFFIC_CLASS;
4757 * i40e_vsi_get_bw_info - Query VSI BW Information
4758 * @vsi: the VSI being queried
4760 * Returns 0 on success, negative value on failure
4762 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4764 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4765 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4766 struct i40e_pf *pf = vsi->back;
4767 struct i40e_hw *hw = &pf->hw;
4772 /* Get the VSI level BW configuration */
4773 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4775 dev_info(&pf->pdev->dev,
4776 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4777 i40e_stat_str(&pf->hw, ret),
4778 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4782 /* Get the VSI level BW configuration per TC */
4783 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4786 dev_info(&pf->pdev->dev,
4787 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4788 i40e_stat_str(&pf->hw, ret),
4789 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4793 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4794 dev_info(&pf->pdev->dev,
4795 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4796 bw_config.tc_valid_bits,
4797 bw_ets_config.tc_valid_bits);
4798 /* Still continuing */
4801 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4802 vsi->bw_max_quanta = bw_config.max_bw;
4803 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4804 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4805 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4806 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4807 vsi->bw_ets_limit_credits[i] =
4808 le16_to_cpu(bw_ets_config.credits[i]);
4809 /* 3 bits out of 4 for each TC */
4810 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4817 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4818 * @vsi: the VSI being configured
4819 * @enabled_tc: TC bitmap
4820 * @bw_credits: BW shared credits per TC
4822 * Returns 0 on success, negative value on failure
4824 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4827 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4831 bw_data.tc_valid_bits = enabled_tc;
4832 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4833 bw_data.tc_bw_credits[i] = bw_share[i];
4835 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4838 dev_info(&vsi->back->pdev->dev,
4839 "AQ command Config VSI BW allocation per TC failed = %d\n",
4840 vsi->back->hw.aq.asq_last_status);
4844 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4845 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4851 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4852 * @vsi: the VSI being configured
4853 * @enabled_tc: TC map to be enabled
4856 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4858 struct net_device *netdev = vsi->netdev;
4859 struct i40e_pf *pf = vsi->back;
4860 struct i40e_hw *hw = &pf->hw;
4863 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4869 netdev_reset_tc(netdev);
4873 /* Set up actual enabled TCs on the VSI */
4874 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4877 /* set per TC queues for the VSI */
4878 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4879 /* Only set TC queues for enabled tcs
4881 * e.g. For a VSI that has TC0 and TC3 enabled the
4882 * enabled_tc bitmap would be 0x00001001; the driver
4883 * will set the numtc for netdev as 2 that will be
4884 * referenced by the netdev layer as TC 0 and 1.
4886 if (vsi->tc_config.enabled_tc & BIT(i))
4887 netdev_set_tc_queue(netdev,
4888 vsi->tc_config.tc_info[i].netdev_tc,
4889 vsi->tc_config.tc_info[i].qcount,
4890 vsi->tc_config.tc_info[i].qoffset);
4893 /* Assign UP2TC map for the VSI */
4894 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4895 /* Get the actual TC# for the UP */
4896 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4897 /* Get the mapped netdev TC# for the UP */
4898 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4899 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4904 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4905 * @vsi: the VSI being configured
4906 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4908 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4909 struct i40e_vsi_context *ctxt)
4911 /* copy just the sections touched not the entire info
4912 * since not all sections are valid as returned by
4915 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4916 memcpy(&vsi->info.queue_mapping,
4917 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4918 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4919 sizeof(vsi->info.tc_mapping));
4923 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4924 * @vsi: VSI to be configured
4925 * @enabled_tc: TC bitmap
4927 * This configures a particular VSI for TCs that are mapped to the
4928 * given TC bitmap. It uses default bandwidth share for TCs across
4929 * VSIs to configure TC for a particular VSI.
4932 * It is expected that the VSI queues have been quisced before calling
4935 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4937 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4938 struct i40e_vsi_context ctxt;
4942 /* Check if enabled_tc is same as existing or new TCs */
4943 if (vsi->tc_config.enabled_tc == enabled_tc)
4946 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4947 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4948 if (enabled_tc & BIT(i))
4952 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4954 dev_info(&vsi->back->pdev->dev,
4955 "Failed configuring TC map %d for VSI %d\n",
4956 enabled_tc, vsi->seid);
4960 /* Update Queue Pairs Mapping for currently enabled UPs */
4961 ctxt.seid = vsi->seid;
4962 ctxt.pf_num = vsi->back->hw.pf_id;
4964 ctxt.uplink_seid = vsi->uplink_seid;
4965 ctxt.info = vsi->info;
4966 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4968 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4969 ctxt.info.valid_sections |=
4970 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4971 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4974 /* Update the VSI after updating the VSI queue-mapping information */
4975 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4977 dev_info(&vsi->back->pdev->dev,
4978 "Update vsi tc config failed, err %s aq_err %s\n",
4979 i40e_stat_str(&vsi->back->hw, ret),
4980 i40e_aq_str(&vsi->back->hw,
4981 vsi->back->hw.aq.asq_last_status));
4984 /* update the local VSI info with updated queue map */
4985 i40e_vsi_update_queue_map(vsi, &ctxt);
4986 vsi->info.valid_sections = 0;
4988 /* Update current VSI BW information */
4989 ret = i40e_vsi_get_bw_info(vsi);
4991 dev_info(&vsi->back->pdev->dev,
4992 "Failed updating vsi bw info, err %s aq_err %s\n",
4993 i40e_stat_str(&vsi->back->hw, ret),
4994 i40e_aq_str(&vsi->back->hw,
4995 vsi->back->hw.aq.asq_last_status));
4999 /* Update the netdev TC setup */
5000 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5006 * i40e_veb_config_tc - Configure TCs for given VEB
5008 * @enabled_tc: TC bitmap
5010 * Configures given TC bitmap for VEB (switching) element
5012 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
5014 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
5015 struct i40e_pf *pf = veb->pf;
5019 /* No TCs or already enabled TCs just return */
5020 if (!enabled_tc || veb->enabled_tc == enabled_tc)
5023 bw_data.tc_valid_bits = enabled_tc;
5024 /* bw_data.absolute_credits is not set (relative) */
5026 /* Enable ETS TCs with equal BW Share for now */
5027 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5028 if (enabled_tc & BIT(i))
5029 bw_data.tc_bw_share_credits[i] = 1;
5032 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
5035 dev_info(&pf->pdev->dev,
5036 "VEB bw config failed, err %s aq_err %s\n",
5037 i40e_stat_str(&pf->hw, ret),
5038 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5042 /* Update the BW information */
5043 ret = i40e_veb_get_bw_info(veb);
5045 dev_info(&pf->pdev->dev,
5046 "Failed getting veb bw config, err %s aq_err %s\n",
5047 i40e_stat_str(&pf->hw, ret),
5048 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5055 #ifdef CONFIG_I40E_DCB
5057 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
5060 * Reconfigure VEB/VSIs on a given PF; it is assumed that
5061 * the caller would've quiesce all the VSIs before calling
5064 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5070 /* Enable the TCs available on PF to all VEBs */
5071 tc_map = i40e_pf_get_tc_map(pf);
5072 for (v = 0; v < I40E_MAX_VEB; v++) {
5075 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5077 dev_info(&pf->pdev->dev,
5078 "Failed configuring TC for VEB seid=%d\n",
5080 /* Will try to configure as many components */
5084 /* Update each VSI */
5085 for (v = 0; v < pf->num_alloc_vsi; v++) {
5089 /* - Enable all TCs for the LAN VSI
5090 * - For all others keep them at TC0 for now
5092 if (v == pf->lan_vsi)
5093 tc_map = i40e_pf_get_tc_map(pf);
5095 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5097 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5099 dev_info(&pf->pdev->dev,
5100 "Failed configuring TC for VSI seid=%d\n",
5102 /* Will try to configure as many components */
5104 /* Re-configure VSI vectors based on updated TC map */
5105 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5106 if (pf->vsi[v]->netdev)
5107 i40e_dcbnl_set_all(pf->vsi[v]);
5113 * i40e_resume_port_tx - Resume port Tx
5116 * Resume a port's Tx and issue a PF reset in case of failure to
5119 static int i40e_resume_port_tx(struct i40e_pf *pf)
5121 struct i40e_hw *hw = &pf->hw;
5124 ret = i40e_aq_resume_port_tx(hw, NULL);
5126 dev_info(&pf->pdev->dev,
5127 "Resume Port Tx failed, err %s aq_err %s\n",
5128 i40e_stat_str(&pf->hw, ret),
5129 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5130 /* Schedule PF reset to recover */
5131 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5132 i40e_service_event_schedule(pf);
5139 * i40e_init_pf_dcb - Initialize DCB configuration
5140 * @pf: PF being configured
5142 * Query the current DCB configuration and cache it
5143 * in the hardware structure
5145 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5147 struct i40e_hw *hw = &pf->hw;
5150 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5151 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5154 /* Get the initial DCB configuration */
5155 err = i40e_init_dcb(hw);
5157 /* Device/Function is not DCBX capable */
5158 if ((!hw->func_caps.dcb) ||
5159 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5160 dev_info(&pf->pdev->dev,
5161 "DCBX offload is not supported or is disabled for this PF.\n");
5163 /* When status is not DISABLED then DCBX in FW */
5164 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5165 DCB_CAP_DCBX_VER_IEEE;
5167 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5168 /* Enable DCB tagging only when more than one TC
5169 * or explicitly disable if only one TC
5171 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5172 pf->flags |= I40E_FLAG_DCB_ENABLED;
5174 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5175 dev_dbg(&pf->pdev->dev,
5176 "DCBX offload is supported for this PF.\n");
5179 dev_info(&pf->pdev->dev,
5180 "Query for DCB configuration failed, err %s aq_err %s\n",
5181 i40e_stat_str(&pf->hw, err),
5182 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5188 #endif /* CONFIG_I40E_DCB */
5189 #define SPEED_SIZE 14
5192 * i40e_print_link_message - print link up or down
5193 * @vsi: the VSI for which link needs a message
5195 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5197 enum i40e_aq_link_speed new_speed;
5198 char *speed = "Unknown";
5199 char *fc = "Unknown";
5203 new_speed = vsi->back->hw.phy.link_info.link_speed;
5205 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
5207 vsi->current_isup = isup;
5208 vsi->current_speed = new_speed;
5210 netdev_info(vsi->netdev, "NIC Link is Down\n");
5214 /* Warn user if link speed on NPAR enabled partition is not at
5217 if (vsi->back->hw.func_caps.npar_enable &&
5218 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5219 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5220 netdev_warn(vsi->netdev,
5221 "The partition detected link speed that is less than 10Gbps\n");
5223 switch (vsi->back->hw.phy.link_info.link_speed) {
5224 case I40E_LINK_SPEED_40GB:
5227 case I40E_LINK_SPEED_20GB:
5230 case I40E_LINK_SPEED_25GB:
5233 case I40E_LINK_SPEED_10GB:
5236 case I40E_LINK_SPEED_1GB:
5239 case I40E_LINK_SPEED_100MB:
5246 switch (vsi->back->hw.fc.current_mode) {
5250 case I40E_FC_TX_PAUSE:
5253 case I40E_FC_RX_PAUSE:
5261 if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
5262 fec = ", FEC: None";
5263 an = ", Autoneg: False";
5265 if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
5266 an = ", Autoneg: True";
5268 if (vsi->back->hw.phy.link_info.fec_info &
5269 I40E_AQ_CONFIG_FEC_KR_ENA)
5270 fec = ", FEC: CL74 FC-FEC/BASE-R";
5271 else if (vsi->back->hw.phy.link_info.fec_info &
5272 I40E_AQ_CONFIG_FEC_RS_ENA)
5273 fec = ", FEC: CL108 RS-FEC";
5276 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n",
5277 speed, fec, an, fc);
5281 * i40e_up_complete - Finish the last steps of bringing up a connection
5282 * @vsi: the VSI being configured
5284 static int i40e_up_complete(struct i40e_vsi *vsi)
5286 struct i40e_pf *pf = vsi->back;
5289 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5290 i40e_vsi_configure_msix(vsi);
5292 i40e_configure_msi_and_legacy(vsi);
5295 err = i40e_vsi_start_rings(vsi);
5299 clear_bit(__I40E_DOWN, &vsi->state);
5300 i40e_napi_enable_all(vsi);
5301 i40e_vsi_enable_irq(vsi);
5303 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5305 i40e_print_link_message(vsi, true);
5306 netif_tx_start_all_queues(vsi->netdev);
5307 netif_carrier_on(vsi->netdev);
5308 } else if (vsi->netdev) {
5309 i40e_print_link_message(vsi, false);
5310 /* need to check for qualified module here*/
5311 if ((pf->hw.phy.link_info.link_info &
5312 I40E_AQ_MEDIA_AVAILABLE) &&
5313 (!(pf->hw.phy.link_info.an_info &
5314 I40E_AQ_QUALIFIED_MODULE)))
5315 netdev_err(vsi->netdev,
5316 "the driver failed to link because an unqualified module was detected.");
5319 /* replay FDIR SB filters */
5320 if (vsi->type == I40E_VSI_FDIR) {
5321 /* reset fd counters */
5324 i40e_fdir_filter_restore(vsi);
5327 /* On the next run of the service_task, notify any clients of the new
5330 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5331 i40e_service_event_schedule(pf);
5337 * i40e_vsi_reinit_locked - Reset the VSI
5338 * @vsi: the VSI being configured
5340 * Rebuild the ring structs after some configuration
5341 * has changed, e.g. MTU size.
5343 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5345 struct i40e_pf *pf = vsi->back;
5347 WARN_ON(in_interrupt());
5348 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5349 usleep_range(1000, 2000);
5353 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5357 * i40e_up - Bring the connection back up after being down
5358 * @vsi: the VSI being configured
5360 int i40e_up(struct i40e_vsi *vsi)
5364 err = i40e_vsi_configure(vsi);
5366 err = i40e_up_complete(vsi);
5372 * i40e_down - Shutdown the connection processing
5373 * @vsi: the VSI being stopped
5375 void i40e_down(struct i40e_vsi *vsi)
5379 /* It is assumed that the caller of this function
5380 * sets the vsi->state __I40E_DOWN bit.
5383 netif_carrier_off(vsi->netdev);
5384 netif_tx_disable(vsi->netdev);
5386 i40e_vsi_disable_irq(vsi);
5387 i40e_vsi_stop_rings(vsi);
5388 i40e_napi_disable_all(vsi);
5390 for (i = 0; i < vsi->num_queue_pairs; i++) {
5391 i40e_clean_tx_ring(vsi->tx_rings[i]);
5392 i40e_clean_rx_ring(vsi->rx_rings[i]);
5398 * i40e_setup_tc - configure multiple traffic classes
5399 * @netdev: net device to configure
5400 * @tc: number of traffic classes to enable
5402 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5404 struct i40e_netdev_priv *np = netdev_priv(netdev);
5405 struct i40e_vsi *vsi = np->vsi;
5406 struct i40e_pf *pf = vsi->back;
5411 /* Check if DCB enabled to continue */
5412 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5413 netdev_info(netdev, "DCB is not enabled for adapter\n");
5417 /* Check if MFP enabled */
5418 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5419 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5423 /* Check whether tc count is within enabled limit */
5424 if (tc > i40e_pf_get_num_tc(pf)) {
5425 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5429 /* Generate TC map for number of tc requested */
5430 for (i = 0; i < tc; i++)
5431 enabled_tc |= BIT(i);
5433 /* Requesting same TC configuration as already enabled */
5434 if (enabled_tc == vsi->tc_config.enabled_tc)
5437 /* Quiesce VSI queues */
5438 i40e_quiesce_vsi(vsi);
5440 /* Configure VSI for enabled TCs */
5441 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5443 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5449 i40e_unquiesce_vsi(vsi);
5455 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5456 struct tc_to_netdev *tc)
5458 if (tc->type != TC_SETUP_MQPRIO)
5461 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
5463 return i40e_setup_tc(netdev, tc->mqprio->num_tc);
5467 * i40e_open - Called when a network interface is made active
5468 * @netdev: network interface device structure
5470 * The open entry point is called when a network interface is made
5471 * active by the system (IFF_UP). At this point all resources needed
5472 * for transmit and receive operations are allocated, the interrupt
5473 * handler is registered with the OS, the netdev watchdog subtask is
5474 * enabled, and the stack is notified that the interface is ready.
5476 * Returns 0 on success, negative value on failure
5478 int i40e_open(struct net_device *netdev)
5480 struct i40e_netdev_priv *np = netdev_priv(netdev);
5481 struct i40e_vsi *vsi = np->vsi;
5482 struct i40e_pf *pf = vsi->back;
5485 /* disallow open during test or if eeprom is broken */
5486 if (test_bit(__I40E_TESTING, &pf->state) ||
5487 test_bit(__I40E_BAD_EEPROM, &pf->state))
5490 netif_carrier_off(netdev);
5492 err = i40e_vsi_open(vsi);
5496 /* configure global TSO hardware offload settings */
5497 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5498 TCP_FLAG_FIN) >> 16);
5499 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5501 TCP_FLAG_CWR) >> 16);
5502 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5504 udp_tunnel_get_rx_info(netdev);
5511 * @vsi: the VSI to open
5513 * Finish initialization of the VSI.
5515 * Returns 0 on success, negative value on failure
5517 * Note: expects to be called while under rtnl_lock()
5519 int i40e_vsi_open(struct i40e_vsi *vsi)
5521 struct i40e_pf *pf = vsi->back;
5522 char int_name[I40E_INT_NAME_STR_LEN];
5525 /* allocate descriptors */
5526 err = i40e_vsi_setup_tx_resources(vsi);
5529 err = i40e_vsi_setup_rx_resources(vsi);
5533 err = i40e_vsi_configure(vsi);
5538 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5539 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5540 err = i40e_vsi_request_irq(vsi, int_name);
5544 /* Notify the stack of the actual queue counts. */
5545 err = netif_set_real_num_tx_queues(vsi->netdev,
5546 vsi->num_queue_pairs);
5548 goto err_set_queues;
5550 err = netif_set_real_num_rx_queues(vsi->netdev,
5551 vsi->num_queue_pairs);
5553 goto err_set_queues;
5555 } else if (vsi->type == I40E_VSI_FDIR) {
5556 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5557 dev_driver_string(&pf->pdev->dev),
5558 dev_name(&pf->pdev->dev));
5559 err = i40e_vsi_request_irq(vsi, int_name);
5566 err = i40e_up_complete(vsi);
5568 goto err_up_complete;
5575 i40e_vsi_free_irq(vsi);
5577 i40e_vsi_free_rx_resources(vsi);
5579 i40e_vsi_free_tx_resources(vsi);
5580 if (vsi == pf->vsi[pf->lan_vsi])
5581 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), true);
5587 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5588 * @pf: Pointer to PF
5590 * This function destroys the hlist where all the Flow Director
5591 * filters were saved.
5593 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5595 struct i40e_fdir_filter *filter;
5596 struct i40e_flex_pit *pit_entry, *tmp;
5597 struct hlist_node *node2;
5599 hlist_for_each_entry_safe(filter, node2,
5600 &pf->fdir_filter_list, fdir_node) {
5601 hlist_del(&filter->fdir_node);
5605 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
5606 list_del(&pit_entry->list);
5609 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
5611 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
5612 list_del(&pit_entry->list);
5615 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
5617 pf->fdir_pf_active_filters = 0;
5618 pf->fd_tcp4_filter_cnt = 0;
5619 pf->fd_udp4_filter_cnt = 0;
5620 pf->fd_sctp4_filter_cnt = 0;
5621 pf->fd_ip4_filter_cnt = 0;
5623 /* Reprogram the default input set for TCP/IPv4 */
5624 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
5625 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5626 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5628 /* Reprogram the default input set for UDP/IPv4 */
5629 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
5630 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5631 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5633 /* Reprogram the default input set for SCTP/IPv4 */
5634 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
5635 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5636 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5638 /* Reprogram the default input set for Other/IPv4 */
5639 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
5640 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
5644 * i40e_close - Disables a network interface
5645 * @netdev: network interface device structure
5647 * The close entry point is called when an interface is de-activated
5648 * by the OS. The hardware is still under the driver's control, but
5649 * this netdev interface is disabled.
5651 * Returns 0, this is not allowed to fail
5653 int i40e_close(struct net_device *netdev)
5655 struct i40e_netdev_priv *np = netdev_priv(netdev);
5656 struct i40e_vsi *vsi = np->vsi;
5658 i40e_vsi_close(vsi);
5664 * i40e_do_reset - Start a PF or Core Reset sequence
5665 * @pf: board private structure
5666 * @reset_flags: which reset is requested
5667 * @lock_acquired: indicates whether or not the lock has been acquired
5668 * before this function was called.
5670 * The essential difference in resets is that the PF Reset
5671 * doesn't clear the packet buffers, doesn't reset the PE
5672 * firmware, and doesn't bother the other PFs on the chip.
5674 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
5678 WARN_ON(in_interrupt());
5681 /* do the biggest reset indicated */
5682 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5684 /* Request a Global Reset
5686 * This will start the chip's countdown to the actual full
5687 * chip reset event, and a warning interrupt to be sent
5688 * to all PFs, including the requestor. Our handler
5689 * for the warning interrupt will deal with the shutdown
5690 * and recovery of the switch setup.
5692 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5693 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5694 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5695 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5697 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5699 /* Request a Core Reset
5701 * Same as Global Reset, except does *not* include the MAC/PHY
5703 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5704 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5705 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5706 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5707 i40e_flush(&pf->hw);
5709 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5711 /* Request a PF Reset
5713 * Resets only the PF-specific registers
5715 * This goes directly to the tear-down and rebuild of
5716 * the switch, since we need to do all the recovery as
5717 * for the Core Reset.
5719 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5720 i40e_handle_reset_warning(pf, lock_acquired);
5722 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5725 /* Find the VSI(s) that requested a re-init */
5726 dev_info(&pf->pdev->dev,
5727 "VSI reinit requested\n");
5728 for (v = 0; v < pf->num_alloc_vsi; v++) {
5729 struct i40e_vsi *vsi = pf->vsi[v];
5732 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5733 i40e_vsi_reinit_locked(pf->vsi[v]);
5734 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5737 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5740 /* Find the VSI(s) that needs to be brought down */
5741 dev_info(&pf->pdev->dev, "VSI down requested\n");
5742 for (v = 0; v < pf->num_alloc_vsi; v++) {
5743 struct i40e_vsi *vsi = pf->vsi[v];
5746 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5747 set_bit(__I40E_DOWN, &vsi->state);
5749 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5753 dev_info(&pf->pdev->dev,
5754 "bad reset request 0x%08x\n", reset_flags);
5758 #ifdef CONFIG_I40E_DCB
5760 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5761 * @pf: board private structure
5762 * @old_cfg: current DCB config
5763 * @new_cfg: new DCB config
5765 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5766 struct i40e_dcbx_config *old_cfg,
5767 struct i40e_dcbx_config *new_cfg)
5769 bool need_reconfig = false;
5771 /* Check if ETS configuration has changed */
5772 if (memcmp(&new_cfg->etscfg,
5774 sizeof(new_cfg->etscfg))) {
5775 /* If Priority Table has changed reconfig is needed */
5776 if (memcmp(&new_cfg->etscfg.prioritytable,
5777 &old_cfg->etscfg.prioritytable,
5778 sizeof(new_cfg->etscfg.prioritytable))) {
5779 need_reconfig = true;
5780 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5783 if (memcmp(&new_cfg->etscfg.tcbwtable,
5784 &old_cfg->etscfg.tcbwtable,
5785 sizeof(new_cfg->etscfg.tcbwtable)))
5786 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5788 if (memcmp(&new_cfg->etscfg.tsatable,
5789 &old_cfg->etscfg.tsatable,
5790 sizeof(new_cfg->etscfg.tsatable)))
5791 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5794 /* Check if PFC configuration has changed */
5795 if (memcmp(&new_cfg->pfc,
5797 sizeof(new_cfg->pfc))) {
5798 need_reconfig = true;
5799 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5802 /* Check if APP Table has changed */
5803 if (memcmp(&new_cfg->app,
5805 sizeof(new_cfg->app))) {
5806 need_reconfig = true;
5807 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5810 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5811 return need_reconfig;
5815 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5816 * @pf: board private structure
5817 * @e: event info posted on ARQ
5819 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5820 struct i40e_arq_event_info *e)
5822 struct i40e_aqc_lldp_get_mib *mib =
5823 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5824 struct i40e_hw *hw = &pf->hw;
5825 struct i40e_dcbx_config tmp_dcbx_cfg;
5826 bool need_reconfig = false;
5830 /* Not DCB capable or capability disabled */
5831 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5834 /* Ignore if event is not for Nearest Bridge */
5835 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5836 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5837 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5838 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5841 /* Check MIB Type and return if event for Remote MIB update */
5842 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5843 dev_dbg(&pf->pdev->dev,
5844 "LLDP event mib type %s\n", type ? "remote" : "local");
5845 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5846 /* Update the remote cached instance and return */
5847 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5848 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5849 &hw->remote_dcbx_config);
5853 /* Store the old configuration */
5854 tmp_dcbx_cfg = hw->local_dcbx_config;
5856 /* Reset the old DCBx configuration data */
5857 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5858 /* Get updated DCBX data from firmware */
5859 ret = i40e_get_dcb_config(&pf->hw);
5861 dev_info(&pf->pdev->dev,
5862 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5863 i40e_stat_str(&pf->hw, ret),
5864 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5868 /* No change detected in DCBX configs */
5869 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5870 sizeof(tmp_dcbx_cfg))) {
5871 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5875 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5876 &hw->local_dcbx_config);
5878 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5883 /* Enable DCB tagging only when more than one TC */
5884 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5885 pf->flags |= I40E_FLAG_DCB_ENABLED;
5887 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5889 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5890 /* Reconfiguration needed quiesce all VSIs */
5891 i40e_pf_quiesce_all_vsi(pf);
5893 /* Changes in configuration update VEB/VSI */
5894 i40e_dcb_reconfigure(pf);
5896 ret = i40e_resume_port_tx(pf);
5898 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5899 /* In case of error no point in resuming VSIs */
5903 /* Wait for the PF's queues to be disabled */
5904 ret = i40e_pf_wait_queues_disabled(pf);
5906 /* Schedule PF reset to recover */
5907 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5908 i40e_service_event_schedule(pf);
5910 i40e_pf_unquiesce_all_vsi(pf);
5911 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
5912 I40E_FLAG_CLIENT_L2_CHANGE);
5918 #endif /* CONFIG_I40E_DCB */
5921 * i40e_do_reset_safe - Protected reset path for userland calls.
5922 * @pf: board private structure
5923 * @reset_flags: which reset is requested
5926 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5929 i40e_do_reset(pf, reset_flags, true);
5934 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5935 * @pf: board private structure
5936 * @e: event info posted on ARQ
5938 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5941 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5942 struct i40e_arq_event_info *e)
5944 struct i40e_aqc_lan_overflow *data =
5945 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5946 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5947 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5948 struct i40e_hw *hw = &pf->hw;
5952 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5955 /* Queue belongs to VF, find the VF and issue VF reset */
5956 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5957 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5958 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5959 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5960 vf_id -= hw->func_caps.vf_base_id;
5961 vf = &pf->vf[vf_id];
5962 i40e_vc_notify_vf_reset(vf);
5963 /* Allow VF to process pending reset notification */
5965 i40e_reset_vf(vf, false);
5970 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5971 * @pf: board private structure
5973 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5977 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5978 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5983 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5984 * @pf: board private structure
5986 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5990 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5991 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5992 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5993 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5998 * i40e_get_global_fd_count - Get total FD filters programmed on device
5999 * @pf: board private structure
6001 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
6005 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
6006 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
6007 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
6008 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
6013 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
6014 * @pf: board private structure
6016 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
6018 struct i40e_fdir_filter *filter;
6019 u32 fcnt_prog, fcnt_avail;
6020 struct hlist_node *node;
6022 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6025 /* Check if, FD SB or ATR was auto disabled and if there is enough room
6028 fcnt_prog = i40e_get_global_fd_count(pf);
6029 fcnt_avail = pf->fdir_pf_filter_count;
6030 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
6031 (pf->fd_add_err == 0) ||
6032 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
6033 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
6034 (pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED)) {
6035 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
6036 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6037 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
6041 /* Wait for some more space to be available to turn on ATR. We also
6042 * must check that no existing ntuple rules for TCP are in effect
6044 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
6045 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
6046 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED) &&
6047 (pf->fd_tcp4_filter_cnt == 0)) {
6048 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6049 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6050 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
6054 /* if hw had a problem adding a filter, delete it */
6055 if (pf->fd_inv > 0) {
6056 hlist_for_each_entry_safe(filter, node,
6057 &pf->fdir_filter_list, fdir_node) {
6058 if (filter->fd_id == pf->fd_inv) {
6059 hlist_del(&filter->fdir_node);
6061 pf->fdir_pf_active_filters--;
6067 #define I40E_MIN_FD_FLUSH_INTERVAL 10
6068 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
6070 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
6071 * @pf: board private structure
6073 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
6075 unsigned long min_flush_time;
6076 int flush_wait_retry = 50;
6077 bool disable_atr = false;
6081 if (!time_after(jiffies, pf->fd_flush_timestamp +
6082 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
6085 /* If the flush is happening too quick and we have mostly SB rules we
6086 * should not re-enable ATR for some time.
6088 min_flush_time = pf->fd_flush_timestamp +
6089 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
6090 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
6092 if (!(time_after(jiffies, min_flush_time)) &&
6093 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
6094 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6095 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
6099 pf->fd_flush_timestamp = jiffies;
6100 pf->hw_disabled_flags |= I40E_FLAG_FD_ATR_ENABLED;
6101 /* flush all filters */
6102 wr32(&pf->hw, I40E_PFQF_CTL_1,
6103 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6104 i40e_flush(&pf->hw);
6108 /* Check FD flush status every 5-6msec */
6109 usleep_range(5000, 6000);
6110 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6111 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6113 } while (flush_wait_retry--);
6114 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6115 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6117 /* replay sideband filters */
6118 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6119 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
6120 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6121 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6122 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6123 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6128 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6129 * @pf: board private structure
6131 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6133 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6136 /* We can see up to 256 filter programming desc in transit if the filters are
6137 * being applied really fast; before we see the first
6138 * filter miss error on Rx queue 0. Accumulating enough error messages before
6139 * reacting will make sure we don't cause flush too often.
6141 #define I40E_MAX_FD_PROGRAM_ERROR 256
6144 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6145 * @pf: board private structure
6147 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6150 /* if interface is down do nothing */
6151 if (test_bit(__I40E_DOWN, &pf->state))
6154 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6155 i40e_fdir_flush_and_replay(pf);
6157 i40e_fdir_check_and_reenable(pf);
6162 * i40e_vsi_link_event - notify VSI of a link event
6163 * @vsi: vsi to be notified
6164 * @link_up: link up or down
6166 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6168 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6171 switch (vsi->type) {
6173 if (!vsi->netdev || !vsi->netdev_registered)
6177 netif_carrier_on(vsi->netdev);
6178 netif_tx_wake_all_queues(vsi->netdev);
6180 netif_carrier_off(vsi->netdev);
6181 netif_tx_stop_all_queues(vsi->netdev);
6185 case I40E_VSI_SRIOV:
6186 case I40E_VSI_VMDQ2:
6188 case I40E_VSI_IWARP:
6189 case I40E_VSI_MIRROR:
6191 /* there is no notification for other VSIs */
6197 * i40e_veb_link_event - notify elements on the veb of a link event
6198 * @veb: veb to be notified
6199 * @link_up: link up or down
6201 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6206 if (!veb || !veb->pf)
6210 /* depth first... */
6211 for (i = 0; i < I40E_MAX_VEB; i++)
6212 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6213 i40e_veb_link_event(pf->veb[i], link_up);
6215 /* ... now the local VSIs */
6216 for (i = 0; i < pf->num_alloc_vsi; i++)
6217 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6218 i40e_vsi_link_event(pf->vsi[i], link_up);
6222 * i40e_link_event - Update netif_carrier status
6223 * @pf: board private structure
6225 static void i40e_link_event(struct i40e_pf *pf)
6227 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6228 u8 new_link_speed, old_link_speed;
6230 bool new_link, old_link;
6232 /* save off old link status information */
6233 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6235 /* set this to force the get_link_status call to refresh state */
6236 pf->hw.phy.get_link_info = true;
6238 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6240 status = i40e_get_link_status(&pf->hw, &new_link);
6242 /* On success, disable temp link polling */
6243 if (status == I40E_SUCCESS) {
6244 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)
6245 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING;
6247 /* Enable link polling temporarily until i40e_get_link_status
6248 * returns I40E_SUCCESS
6250 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING;
6251 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6256 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6257 new_link_speed = pf->hw.phy.link_info.link_speed;
6259 if (new_link == old_link &&
6260 new_link_speed == old_link_speed &&
6261 (test_bit(__I40E_DOWN, &vsi->state) ||
6262 new_link == netif_carrier_ok(vsi->netdev)))
6265 if (!test_bit(__I40E_DOWN, &vsi->state))
6266 i40e_print_link_message(vsi, new_link);
6268 /* Notify the base of the switch tree connected to
6269 * the link. Floating VEBs are not notified.
6271 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6272 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6274 i40e_vsi_link_event(vsi, new_link);
6277 i40e_vc_notify_link_state(pf);
6279 if (pf->flags & I40E_FLAG_PTP)
6280 i40e_ptp_set_increment(pf);
6284 * i40e_watchdog_subtask - periodic checks not using event driven response
6285 * @pf: board private structure
6287 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6291 /* if interface is down do nothing */
6292 if (test_bit(__I40E_DOWN, &pf->state) ||
6293 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6296 /* make sure we don't do these things too often */
6297 if (time_before(jiffies, (pf->service_timer_previous +
6298 pf->service_timer_period)))
6300 pf->service_timer_previous = jiffies;
6302 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
6303 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING))
6304 i40e_link_event(pf);
6306 /* Update the stats for active netdevs so the network stack
6307 * can look at updated numbers whenever it cares to
6309 for (i = 0; i < pf->num_alloc_vsi; i++)
6310 if (pf->vsi[i] && pf->vsi[i]->netdev)
6311 i40e_update_stats(pf->vsi[i]);
6313 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6314 /* Update the stats for the active switching components */
6315 for (i = 0; i < I40E_MAX_VEB; i++)
6317 i40e_update_veb_stats(pf->veb[i]);
6320 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6324 * i40e_reset_subtask - Set up for resetting the device and driver
6325 * @pf: board private structure
6327 static void i40e_reset_subtask(struct i40e_pf *pf)
6329 u32 reset_flags = 0;
6331 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6332 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6333 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6335 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6336 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6337 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6339 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6340 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6341 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6343 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6344 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6345 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6347 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6348 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6349 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6352 /* If there's a recovery already waiting, it takes
6353 * precedence before starting a new reset sequence.
6355 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6356 i40e_prep_for_reset(pf, false);
6358 i40e_rebuild(pf, false, false);
6361 /* If we're already down or resetting, just bail */
6363 !test_bit(__I40E_DOWN, &pf->state) &&
6364 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) {
6366 i40e_do_reset(pf, reset_flags, true);
6372 * i40e_handle_link_event - Handle link event
6373 * @pf: board private structure
6374 * @e: event info posted on ARQ
6376 static void i40e_handle_link_event(struct i40e_pf *pf,
6377 struct i40e_arq_event_info *e)
6379 struct i40e_aqc_get_link_status *status =
6380 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6382 /* Do a new status request to re-enable LSE reporting
6383 * and load new status information into the hw struct
6384 * This completely ignores any state information
6385 * in the ARQ event info, instead choosing to always
6386 * issue the AQ update link status command.
6388 i40e_link_event(pf);
6390 /* check for unqualified module, if link is down */
6391 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6392 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6393 (!(status->link_info & I40E_AQ_LINK_UP)))
6394 dev_err(&pf->pdev->dev,
6395 "The driver failed to link because an unqualified module was detected.\n");
6399 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6400 * @pf: board private structure
6402 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6404 struct i40e_arq_event_info event;
6405 struct i40e_hw *hw = &pf->hw;
6412 /* Do not run clean AQ when PF reset fails */
6413 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6416 /* check for error indications */
6417 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6419 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6420 if (hw->debug_mask & I40E_DEBUG_AQ)
6421 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6422 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6424 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6425 if (hw->debug_mask & I40E_DEBUG_AQ)
6426 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6427 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6428 pf->arq_overflows++;
6430 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6431 if (hw->debug_mask & I40E_DEBUG_AQ)
6432 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6433 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6436 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6438 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6440 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6441 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6442 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6443 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6445 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6446 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6447 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6448 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6450 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6451 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6452 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6453 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6456 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6458 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6459 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6464 ret = i40e_clean_arq_element(hw, &event, &pending);
6465 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6468 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6472 opcode = le16_to_cpu(event.desc.opcode);
6475 case i40e_aqc_opc_get_link_status:
6476 i40e_handle_link_event(pf, &event);
6478 case i40e_aqc_opc_send_msg_to_pf:
6479 ret = i40e_vc_process_vf_msg(pf,
6480 le16_to_cpu(event.desc.retval),
6481 le32_to_cpu(event.desc.cookie_high),
6482 le32_to_cpu(event.desc.cookie_low),
6486 case i40e_aqc_opc_lldp_update_mib:
6487 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6488 #ifdef CONFIG_I40E_DCB
6490 ret = i40e_handle_lldp_event(pf, &event);
6492 #endif /* CONFIG_I40E_DCB */
6494 case i40e_aqc_opc_event_lan_overflow:
6495 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6496 i40e_handle_lan_overflow_event(pf, &event);
6498 case i40e_aqc_opc_send_msg_to_peer:
6499 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6501 case i40e_aqc_opc_nvm_erase:
6502 case i40e_aqc_opc_nvm_update:
6503 case i40e_aqc_opc_oem_post_update:
6504 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6505 "ARQ NVM operation 0x%04x completed\n",
6509 dev_info(&pf->pdev->dev,
6510 "ARQ: Unknown event 0x%04x ignored\n",
6514 } while (i++ < pf->adminq_work_limit);
6516 if (i < pf->adminq_work_limit)
6517 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6519 /* re-enable Admin queue interrupt cause */
6520 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6521 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6522 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6525 kfree(event.msg_buf);
6529 * i40e_verify_eeprom - make sure eeprom is good to use
6530 * @pf: board private structure
6532 static void i40e_verify_eeprom(struct i40e_pf *pf)
6536 err = i40e_diag_eeprom_test(&pf->hw);
6538 /* retry in case of garbage read */
6539 err = i40e_diag_eeprom_test(&pf->hw);
6541 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6543 set_bit(__I40E_BAD_EEPROM, &pf->state);
6547 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6548 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6549 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6554 * i40e_enable_pf_switch_lb
6555 * @pf: pointer to the PF structure
6557 * enable switch loop back or die - no point in a return value
6559 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6561 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6562 struct i40e_vsi_context ctxt;
6565 ctxt.seid = pf->main_vsi_seid;
6566 ctxt.pf_num = pf->hw.pf_id;
6568 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6570 dev_info(&pf->pdev->dev,
6571 "couldn't get PF vsi config, err %s aq_err %s\n",
6572 i40e_stat_str(&pf->hw, ret),
6573 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6576 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6577 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6578 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6580 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6582 dev_info(&pf->pdev->dev,
6583 "update vsi switch failed, err %s aq_err %s\n",
6584 i40e_stat_str(&pf->hw, ret),
6585 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6590 * i40e_disable_pf_switch_lb
6591 * @pf: pointer to the PF structure
6593 * disable switch loop back or die - no point in a return value
6595 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6597 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6598 struct i40e_vsi_context ctxt;
6601 ctxt.seid = pf->main_vsi_seid;
6602 ctxt.pf_num = pf->hw.pf_id;
6604 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6606 dev_info(&pf->pdev->dev,
6607 "couldn't get PF vsi config, err %s aq_err %s\n",
6608 i40e_stat_str(&pf->hw, ret),
6609 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6612 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6613 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6614 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6616 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6618 dev_info(&pf->pdev->dev,
6619 "update vsi switch failed, err %s aq_err %s\n",
6620 i40e_stat_str(&pf->hw, ret),
6621 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6626 * i40e_config_bridge_mode - Configure the HW bridge mode
6627 * @veb: pointer to the bridge instance
6629 * Configure the loop back mode for the LAN VSI that is downlink to the
6630 * specified HW bridge instance. It is expected this function is called
6631 * when a new HW bridge is instantiated.
6633 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6635 struct i40e_pf *pf = veb->pf;
6637 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6638 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6639 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6640 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6641 i40e_disable_pf_switch_lb(pf);
6643 i40e_enable_pf_switch_lb(pf);
6647 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6648 * @veb: pointer to the VEB instance
6650 * This is a recursive function that first builds the attached VSIs then
6651 * recurses in to build the next layer of VEB. We track the connections
6652 * through our own index numbers because the seid's from the HW could
6653 * change across the reset.
6655 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6657 struct i40e_vsi *ctl_vsi = NULL;
6658 struct i40e_pf *pf = veb->pf;
6662 /* build VSI that owns this VEB, temporarily attached to base VEB */
6663 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6665 pf->vsi[v]->veb_idx == veb->idx &&
6666 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6667 ctl_vsi = pf->vsi[v];
6672 dev_info(&pf->pdev->dev,
6673 "missing owner VSI for veb_idx %d\n", veb->idx);
6675 goto end_reconstitute;
6677 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6678 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6679 ret = i40e_add_vsi(ctl_vsi);
6681 dev_info(&pf->pdev->dev,
6682 "rebuild of veb_idx %d owner VSI failed: %d\n",
6684 goto end_reconstitute;
6686 i40e_vsi_reset_stats(ctl_vsi);
6688 /* create the VEB in the switch and move the VSI onto the VEB */
6689 ret = i40e_add_veb(veb, ctl_vsi);
6691 goto end_reconstitute;
6693 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6694 veb->bridge_mode = BRIDGE_MODE_VEB;
6696 veb->bridge_mode = BRIDGE_MODE_VEPA;
6697 i40e_config_bridge_mode(veb);
6699 /* create the remaining VSIs attached to this VEB */
6700 for (v = 0; v < pf->num_alloc_vsi; v++) {
6701 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6704 if (pf->vsi[v]->veb_idx == veb->idx) {
6705 struct i40e_vsi *vsi = pf->vsi[v];
6707 vsi->uplink_seid = veb->seid;
6708 ret = i40e_add_vsi(vsi);
6710 dev_info(&pf->pdev->dev,
6711 "rebuild of vsi_idx %d failed: %d\n",
6713 goto end_reconstitute;
6715 i40e_vsi_reset_stats(vsi);
6719 /* create any VEBs attached to this VEB - RECURSION */
6720 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6721 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6722 pf->veb[veb_idx]->uplink_seid = veb->seid;
6723 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6734 * i40e_get_capabilities - get info about the HW
6735 * @pf: the PF struct
6737 static int i40e_get_capabilities(struct i40e_pf *pf)
6739 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6744 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6746 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6750 /* this loads the data into the hw struct for us */
6751 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6753 i40e_aqc_opc_list_func_capabilities,
6755 /* data loaded, buffer no longer needed */
6758 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6759 /* retry with a larger buffer */
6760 buf_len = data_size;
6761 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6762 dev_info(&pf->pdev->dev,
6763 "capability discovery failed, err %s aq_err %s\n",
6764 i40e_stat_str(&pf->hw, err),
6765 i40e_aq_str(&pf->hw,
6766 pf->hw.aq.asq_last_status));
6771 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6772 dev_info(&pf->pdev->dev,
6773 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6774 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6775 pf->hw.func_caps.num_msix_vectors,
6776 pf->hw.func_caps.num_msix_vectors_vf,
6777 pf->hw.func_caps.fd_filters_guaranteed,
6778 pf->hw.func_caps.fd_filters_best_effort,
6779 pf->hw.func_caps.num_tx_qp,
6780 pf->hw.func_caps.num_vsis);
6782 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6783 + pf->hw.func_caps.num_vfs)
6784 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6785 dev_info(&pf->pdev->dev,
6786 "got num_vsis %d, setting num_vsis to %d\n",
6787 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6788 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6794 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6797 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6798 * @pf: board private structure
6800 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6802 struct i40e_vsi *vsi;
6804 /* quick workaround for an NVM issue that leaves a critical register
6807 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6808 static const u32 hkey[] = {
6809 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6810 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6811 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6815 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6816 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6819 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6822 /* find existing VSI and see if it needs configuring */
6823 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6825 /* create a new VSI if none exists */
6827 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6828 pf->vsi[pf->lan_vsi]->seid, 0);
6830 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6831 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6836 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6840 * i40e_fdir_teardown - release the Flow Director resources
6841 * @pf: board private structure
6843 static void i40e_fdir_teardown(struct i40e_pf *pf)
6845 struct i40e_vsi *vsi;
6847 i40e_fdir_filter_exit(pf);
6848 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6850 i40e_vsi_release(vsi);
6854 * i40e_prep_for_reset - prep for the core to reset
6855 * @pf: board private structure
6856 * @lock_acquired: indicates whether or not the lock has been acquired
6857 * before this function was called.
6859 * Close up the VFs and other things in prep for PF Reset.
6861 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired)
6863 struct i40e_hw *hw = &pf->hw;
6864 i40e_status ret = 0;
6867 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6868 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6870 if (i40e_check_asq_alive(&pf->hw))
6871 i40e_vc_notify_reset(pf);
6873 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6875 /* quiesce the VSIs and their queues that are not already DOWN */
6876 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
6879 i40e_pf_quiesce_all_vsi(pf);
6883 for (v = 0; v < pf->num_alloc_vsi; v++) {
6885 pf->vsi[v]->seid = 0;
6888 i40e_shutdown_adminq(&pf->hw);
6890 /* call shutdown HMC */
6891 if (hw->hmc.hmc_obj) {
6892 ret = i40e_shutdown_lan_hmc(hw);
6894 dev_warn(&pf->pdev->dev,
6895 "shutdown_lan_hmc failed: %d\n", ret);
6900 * i40e_send_version - update firmware with driver version
6903 static void i40e_send_version(struct i40e_pf *pf)
6905 struct i40e_driver_version dv;
6907 dv.major_version = DRV_VERSION_MAJOR;
6908 dv.minor_version = DRV_VERSION_MINOR;
6909 dv.build_version = DRV_VERSION_BUILD;
6910 dv.subbuild_version = 0;
6911 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6912 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6916 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
6917 * @pf: board private structure
6919 static int i40e_reset(struct i40e_pf *pf)
6921 struct i40e_hw *hw = &pf->hw;
6924 ret = i40e_pf_reset(hw);
6926 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6927 set_bit(__I40E_RESET_FAILED, &pf->state);
6928 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6936 * i40e_rebuild - rebuild using a saved config
6937 * @pf: board private structure
6938 * @reinit: if the Main VSI needs to re-initialized.
6939 * @lock_acquired: indicates whether or not the lock has been acquired
6940 * before this function was called.
6942 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
6944 struct i40e_hw *hw = &pf->hw;
6945 u8 set_fc_aq_fail = 0;
6950 if (test_bit(__I40E_DOWN, &pf->state))
6951 goto clear_recovery;
6952 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6954 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6955 ret = i40e_init_adminq(&pf->hw);
6957 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6958 i40e_stat_str(&pf->hw, ret),
6959 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6960 goto clear_recovery;
6963 /* re-verify the eeprom if we just had an EMP reset */
6964 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6965 i40e_verify_eeprom(pf);
6967 i40e_clear_pxe_mode(hw);
6968 ret = i40e_get_capabilities(pf);
6970 goto end_core_reset;
6972 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6973 hw->func_caps.num_rx_qp, 0, 0);
6975 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6976 goto end_core_reset;
6978 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6980 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6981 goto end_core_reset;
6984 #ifdef CONFIG_I40E_DCB
6985 ret = i40e_init_pf_dcb(pf);
6987 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6988 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6989 /* Continue without DCB enabled */
6991 #endif /* CONFIG_I40E_DCB */
6992 /* do basic switch setup */
6995 ret = i40e_setup_pf_switch(pf, reinit);
6999 /* The driver only wants link up/down and module qualification
7000 * reports from firmware. Note the negative logic.
7002 ret = i40e_aq_set_phy_int_mask(&pf->hw,
7003 ~(I40E_AQ_EVENT_LINK_UPDOWN |
7004 I40E_AQ_EVENT_MEDIA_NA |
7005 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
7007 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
7008 i40e_stat_str(&pf->hw, ret),
7009 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7011 /* make sure our flow control settings are restored */
7012 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
7014 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
7015 i40e_stat_str(&pf->hw, ret),
7016 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7018 /* Rebuild the VSIs and VEBs that existed before reset.
7019 * They are still in our local switch element arrays, so only
7020 * need to rebuild the switch model in the HW.
7022 * If there were VEBs but the reconstitution failed, we'll try
7023 * try to recover minimal use by getting the basic PF VSI working.
7025 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
7026 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
7027 /* find the one VEB connected to the MAC, and find orphans */
7028 for (v = 0; v < I40E_MAX_VEB; v++) {
7032 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
7033 pf->veb[v]->uplink_seid == 0) {
7034 ret = i40e_reconstitute_veb(pf->veb[v]);
7039 /* If Main VEB failed, we're in deep doodoo,
7040 * so give up rebuilding the switch and set up
7041 * for minimal rebuild of PF VSI.
7042 * If orphan failed, we'll report the error
7043 * but try to keep going.
7045 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
7046 dev_info(&pf->pdev->dev,
7047 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
7049 pf->vsi[pf->lan_vsi]->uplink_seid
7052 } else if (pf->veb[v]->uplink_seid == 0) {
7053 dev_info(&pf->pdev->dev,
7054 "rebuild of orphan VEB failed: %d\n",
7061 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
7062 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
7063 /* no VEB, so rebuild only the Main VSI */
7064 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
7066 dev_info(&pf->pdev->dev,
7067 "rebuild of Main VSI failed: %d\n", ret);
7072 /* Reconfigure hardware for allowing smaller MSS in the case
7073 * of TSO, so that we avoid the MDD being fired and causing
7074 * a reset in the case of small MSS+TSO.
7076 #define I40E_REG_MSS 0x000E64DC
7077 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
7078 #define I40E_64BYTE_MSS 0x400000
7079 val = rd32(hw, I40E_REG_MSS);
7080 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
7081 val &= ~I40E_REG_MSS_MIN_MASK;
7082 val |= I40E_64BYTE_MSS;
7083 wr32(hw, I40E_REG_MSS, val);
7086 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
7088 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
7090 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
7091 i40e_stat_str(&pf->hw, ret),
7092 i40e_aq_str(&pf->hw,
7093 pf->hw.aq.asq_last_status));
7095 /* reinit the misc interrupt */
7096 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7097 ret = i40e_setup_misc_vector(pf);
7099 /* Add a filter to drop all Flow control frames from any VSI from being
7100 * transmitted. By doing so we stop a malicious VF from sending out
7101 * PAUSE or PFC frames and potentially controlling traffic for other
7103 * The FW can still send Flow control frames if enabled.
7105 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
7108 /* restart the VSIs that were rebuilt and running before the reset */
7109 i40e_pf_unquiesce_all_vsi(pf);
7111 /* Release the RTNL lock before we start resetting VFs */
7115 if (pf->num_alloc_vfs) {
7116 for (v = 0; v < pf->num_alloc_vfs; v++)
7117 i40e_reset_vf(&pf->vf[v], true);
7120 /* tell the firmware that we're starting */
7121 i40e_send_version(pf);
7123 /* We've already released the lock, so don't do it again */
7124 goto end_core_reset;
7130 clear_bit(__I40E_RESET_FAILED, &pf->state);
7132 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7136 * i40e_reset_and_rebuild - reset and rebuild using a saved config
7137 * @pf: board private structure
7138 * @reinit: if the Main VSI needs to re-initialized.
7139 * @lock_acquired: indicates whether or not the lock has been acquired
7140 * before this function was called.
7142 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
7146 /* Now we wait for GRST to settle out.
7147 * We don't have to delete the VEBs or VSIs from the hw switch
7148 * because the reset will make them disappear.
7150 ret = i40e_reset(pf);
7152 i40e_rebuild(pf, reinit, lock_acquired);
7156 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7157 * @pf: board private structure
7159 * Close up the VFs and other things in prep for a Core Reset,
7160 * then get ready to rebuild the world.
7161 * @lock_acquired: indicates whether or not the lock has been acquired
7162 * before this function was called.
7164 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
7166 i40e_prep_for_reset(pf, lock_acquired);
7167 i40e_reset_and_rebuild(pf, false, lock_acquired);
7171 * i40e_handle_mdd_event
7172 * @pf: pointer to the PF structure
7174 * Called from the MDD irq handler to identify possibly malicious vfs
7176 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7178 struct i40e_hw *hw = &pf->hw;
7179 bool mdd_detected = false;
7180 bool pf_mdd_detected = false;
7185 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7188 /* find what triggered the MDD event */
7189 reg = rd32(hw, I40E_GL_MDET_TX);
7190 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7191 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7192 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7193 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7194 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7195 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7196 I40E_GL_MDET_TX_EVENT_SHIFT;
7197 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7198 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7199 pf->hw.func_caps.base_queue;
7200 if (netif_msg_tx_err(pf))
7201 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7202 event, queue, pf_num, vf_num);
7203 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7204 mdd_detected = true;
7206 reg = rd32(hw, I40E_GL_MDET_RX);
7207 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7208 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7209 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7210 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7211 I40E_GL_MDET_RX_EVENT_SHIFT;
7212 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7213 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7214 pf->hw.func_caps.base_queue;
7215 if (netif_msg_rx_err(pf))
7216 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7217 event, queue, func);
7218 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7219 mdd_detected = true;
7223 reg = rd32(hw, I40E_PF_MDET_TX);
7224 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7225 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7226 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7227 pf_mdd_detected = true;
7229 reg = rd32(hw, I40E_PF_MDET_RX);
7230 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7231 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7232 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7233 pf_mdd_detected = true;
7235 /* Queue belongs to the PF, initiate a reset */
7236 if (pf_mdd_detected) {
7237 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7238 i40e_service_event_schedule(pf);
7242 /* see if one of the VFs needs its hand slapped */
7243 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7245 reg = rd32(hw, I40E_VP_MDET_TX(i));
7246 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7247 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7248 vf->num_mdd_events++;
7249 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7253 reg = rd32(hw, I40E_VP_MDET_RX(i));
7254 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7255 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7256 vf->num_mdd_events++;
7257 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7261 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7262 dev_info(&pf->pdev->dev,
7263 "Too many MDD events on VF %d, disabled\n", i);
7264 dev_info(&pf->pdev->dev,
7265 "Use PF Control I/F to re-enable the VF\n");
7266 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7270 /* re-enable mdd interrupt cause */
7271 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7272 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7273 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7274 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7279 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7280 * @pf: board private structure
7282 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7284 struct i40e_hw *hw = &pf->hw;
7289 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7292 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7294 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7295 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7296 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7297 port = pf->udp_ports[i].index;
7299 ret = i40e_aq_add_udp_tunnel(hw, port,
7300 pf->udp_ports[i].type,
7303 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7306 dev_dbg(&pf->pdev->dev,
7307 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7308 pf->udp_ports[i].type ? "vxlan" : "geneve",
7309 port ? "add" : "delete",
7311 i40e_stat_str(&pf->hw, ret),
7312 i40e_aq_str(&pf->hw,
7313 pf->hw.aq.asq_last_status));
7314 pf->udp_ports[i].index = 0;
7321 * i40e_service_task - Run the driver's async subtasks
7322 * @work: pointer to work_struct containing our data
7324 static void i40e_service_task(struct work_struct *work)
7326 struct i40e_pf *pf = container_of(work,
7329 unsigned long start_time = jiffies;
7331 /* don't bother with service tasks if a reset is in progress */
7332 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7336 if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
7339 i40e_detect_recover_hung(pf);
7340 i40e_sync_filters_subtask(pf);
7341 i40e_reset_subtask(pf);
7342 i40e_handle_mdd_event(pf);
7343 i40e_vc_process_vflr_event(pf);
7344 i40e_watchdog_subtask(pf);
7345 i40e_fdir_reinit_subtask(pf);
7346 if (pf->flags & I40E_FLAG_CLIENT_RESET) {
7347 /* Client subtask will reopen next time through. */
7348 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true);
7349 pf->flags &= ~I40E_FLAG_CLIENT_RESET;
7351 i40e_client_subtask(pf);
7352 if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) {
7353 i40e_notify_client_of_l2_param_changes(
7354 pf->vsi[pf->lan_vsi]);
7355 pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE;
7358 i40e_sync_filters_subtask(pf);
7359 i40e_sync_udp_filters_subtask(pf);
7360 i40e_clean_adminq_subtask(pf);
7362 /* flush memory to make sure state is correct before next watchdog */
7363 smp_mb__before_atomic();
7364 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7366 /* If the tasks have taken longer than one timer cycle or there
7367 * is more work to be done, reschedule the service task now
7368 * rather than wait for the timer to tick again.
7370 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7371 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7372 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7373 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7374 i40e_service_event_schedule(pf);
7378 * i40e_service_timer - timer callback
7379 * @data: pointer to PF struct
7381 static void i40e_service_timer(unsigned long data)
7383 struct i40e_pf *pf = (struct i40e_pf *)data;
7385 mod_timer(&pf->service_timer,
7386 round_jiffies(jiffies + pf->service_timer_period));
7387 i40e_service_event_schedule(pf);
7391 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7392 * @vsi: the VSI being configured
7394 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7396 struct i40e_pf *pf = vsi->back;
7398 switch (vsi->type) {
7400 vsi->alloc_queue_pairs = pf->num_lan_qps;
7401 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7402 I40E_REQ_DESCRIPTOR_MULTIPLE);
7403 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7404 vsi->num_q_vectors = pf->num_lan_msix;
7406 vsi->num_q_vectors = 1;
7411 vsi->alloc_queue_pairs = 1;
7412 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7413 I40E_REQ_DESCRIPTOR_MULTIPLE);
7414 vsi->num_q_vectors = pf->num_fdsb_msix;
7417 case I40E_VSI_VMDQ2:
7418 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7419 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7420 I40E_REQ_DESCRIPTOR_MULTIPLE);
7421 vsi->num_q_vectors = pf->num_vmdq_msix;
7424 case I40E_VSI_SRIOV:
7425 vsi->alloc_queue_pairs = pf->num_vf_qps;
7426 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7427 I40E_REQ_DESCRIPTOR_MULTIPLE);
7439 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7440 * @type: VSI pointer
7441 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7443 * On error: returns error code (negative)
7444 * On success: returns 0
7446 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7451 /* allocate memory for both Tx and Rx ring pointers */
7452 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7453 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7456 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7458 if (alloc_qvectors) {
7459 /* allocate memory for q_vector pointers */
7460 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7461 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7462 if (!vsi->q_vectors) {
7470 kfree(vsi->tx_rings);
7475 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7476 * @pf: board private structure
7477 * @type: type of VSI
7479 * On error: returns error code (negative)
7480 * On success: returns vsi index in PF (positive)
7482 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7485 struct i40e_vsi *vsi;
7489 /* Need to protect the allocation of the VSIs at the PF level */
7490 mutex_lock(&pf->switch_mutex);
7492 /* VSI list may be fragmented if VSI creation/destruction has
7493 * been happening. We can afford to do a quick scan to look
7494 * for any free VSIs in the list.
7496 * find next empty vsi slot, looping back around if necessary
7499 while (i < pf->num_alloc_vsi && pf->vsi[i])
7501 if (i >= pf->num_alloc_vsi) {
7503 while (i < pf->next_vsi && pf->vsi[i])
7507 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7508 vsi_idx = i; /* Found one! */
7511 goto unlock_pf; /* out of VSI slots! */
7515 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7522 set_bit(__I40E_DOWN, &vsi->state);
7525 vsi->int_rate_limit = 0;
7526 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7527 pf->rss_table_size : 64;
7528 vsi->netdev_registered = false;
7529 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7530 hash_init(vsi->mac_filter_hash);
7531 vsi->irqs_ready = false;
7533 ret = i40e_set_num_rings_in_vsi(vsi);
7537 ret = i40e_vsi_alloc_arrays(vsi, true);
7541 /* Setup default MSIX irq handler for VSI */
7542 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7544 /* Initialize VSI lock */
7545 spin_lock_init(&vsi->mac_filter_hash_lock);
7546 pf->vsi[vsi_idx] = vsi;
7551 pf->next_vsi = i - 1;
7554 mutex_unlock(&pf->switch_mutex);
7559 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7560 * @type: VSI pointer
7561 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7563 * On error: returns error code (negative)
7564 * On success: returns 0
7566 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7568 /* free the ring and vector containers */
7569 if (free_qvectors) {
7570 kfree(vsi->q_vectors);
7571 vsi->q_vectors = NULL;
7573 kfree(vsi->tx_rings);
7574 vsi->tx_rings = NULL;
7575 vsi->rx_rings = NULL;
7579 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7581 * @vsi: Pointer to VSI structure
7583 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7588 kfree(vsi->rss_hkey_user);
7589 vsi->rss_hkey_user = NULL;
7591 kfree(vsi->rss_lut_user);
7592 vsi->rss_lut_user = NULL;
7596 * i40e_vsi_clear - Deallocate the VSI provided
7597 * @vsi: the VSI being un-configured
7599 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7610 mutex_lock(&pf->switch_mutex);
7611 if (!pf->vsi[vsi->idx]) {
7612 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7613 vsi->idx, vsi->idx, vsi, vsi->type);
7617 if (pf->vsi[vsi->idx] != vsi) {
7618 dev_err(&pf->pdev->dev,
7619 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7620 pf->vsi[vsi->idx]->idx,
7622 pf->vsi[vsi->idx]->type,
7623 vsi->idx, vsi, vsi->type);
7627 /* updates the PF for this cleared vsi */
7628 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7629 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7631 i40e_vsi_free_arrays(vsi, true);
7632 i40e_clear_rss_config_user(vsi);
7634 pf->vsi[vsi->idx] = NULL;
7635 if (vsi->idx < pf->next_vsi)
7636 pf->next_vsi = vsi->idx;
7639 mutex_unlock(&pf->switch_mutex);
7647 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7648 * @vsi: the VSI being cleaned
7650 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7654 if (vsi->tx_rings && vsi->tx_rings[0]) {
7655 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7656 kfree_rcu(vsi->tx_rings[i], rcu);
7657 vsi->tx_rings[i] = NULL;
7658 vsi->rx_rings[i] = NULL;
7664 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7665 * @vsi: the VSI being configured
7667 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7669 struct i40e_ring *tx_ring, *rx_ring;
7670 struct i40e_pf *pf = vsi->back;
7673 /* Set basic values in the rings to be used later during open() */
7674 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7675 /* allocate space for both Tx and Rx in one shot */
7676 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7680 tx_ring->queue_index = i;
7681 tx_ring->reg_idx = vsi->base_queue + i;
7682 tx_ring->ring_active = false;
7684 tx_ring->netdev = vsi->netdev;
7685 tx_ring->dev = &pf->pdev->dev;
7686 tx_ring->count = vsi->num_desc;
7688 tx_ring->dcb_tc = 0;
7689 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7690 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7691 tx_ring->tx_itr_setting = pf->tx_itr_default;
7692 vsi->tx_rings[i] = tx_ring;
7694 rx_ring = &tx_ring[1];
7695 rx_ring->queue_index = i;
7696 rx_ring->reg_idx = vsi->base_queue + i;
7697 rx_ring->ring_active = false;
7699 rx_ring->netdev = vsi->netdev;
7700 rx_ring->dev = &pf->pdev->dev;
7701 rx_ring->count = vsi->num_desc;
7703 rx_ring->dcb_tc = 0;
7704 rx_ring->rx_itr_setting = pf->rx_itr_default;
7705 vsi->rx_rings[i] = rx_ring;
7711 i40e_vsi_clear_rings(vsi);
7716 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7717 * @pf: board private structure
7718 * @vectors: the number of MSI-X vectors to request
7720 * Returns the number of vectors reserved, or error
7722 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7724 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7725 I40E_MIN_MSIX, vectors);
7727 dev_info(&pf->pdev->dev,
7728 "MSI-X vector reservation failed: %d\n", vectors);
7736 * i40e_init_msix - Setup the MSIX capability
7737 * @pf: board private structure
7739 * Work with the OS to set up the MSIX vectors needed.
7741 * Returns the number of vectors reserved or negative on failure
7743 static int i40e_init_msix(struct i40e_pf *pf)
7745 struct i40e_hw *hw = &pf->hw;
7746 int cpus, extra_vectors;
7750 int iwarp_requested = 0;
7752 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7755 /* The number of vectors we'll request will be comprised of:
7756 * - Add 1 for "other" cause for Admin Queue events, etc.
7757 * - The number of LAN queue pairs
7758 * - Queues being used for RSS.
7759 * We don't need as many as max_rss_size vectors.
7760 * use rss_size instead in the calculation since that
7761 * is governed by number of cpus in the system.
7762 * - assumes symmetric Tx/Rx pairing
7763 * - The number of VMDq pairs
7764 * - The CPU count within the NUMA node if iWARP is enabled
7765 * Once we count this up, try the request.
7767 * If we can't get what we want, we'll simplify to nearly nothing
7768 * and try again. If that still fails, we punt.
7770 vectors_left = hw->func_caps.num_msix_vectors;
7773 /* reserve one vector for miscellaneous handler */
7779 /* reserve some vectors for the main PF traffic queues. Initially we
7780 * only reserve at most 50% of the available vectors, in the case that
7781 * the number of online CPUs is large. This ensures that we can enable
7782 * extra features as well. Once we've enabled the other features, we
7783 * will use any remaining vectors to reach as close as we can to the
7784 * number of online CPUs.
7786 cpus = num_online_cpus();
7787 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
7788 vectors_left -= pf->num_lan_msix;
7790 /* reserve one vector for sideband flow director */
7791 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7793 pf->num_fdsb_msix = 1;
7797 pf->num_fdsb_msix = 0;
7801 /* can we reserve enough for iWARP? */
7802 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7803 iwarp_requested = pf->num_iwarp_msix;
7806 pf->num_iwarp_msix = 0;
7807 else if (vectors_left < pf->num_iwarp_msix)
7808 pf->num_iwarp_msix = 1;
7809 v_budget += pf->num_iwarp_msix;
7810 vectors_left -= pf->num_iwarp_msix;
7813 /* any vectors left over go for VMDq support */
7814 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7815 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7816 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7818 if (!vectors_left) {
7819 pf->num_vmdq_msix = 0;
7820 pf->num_vmdq_qps = 0;
7822 /* if we're short on vectors for what's desired, we limit
7823 * the queues per vmdq. If this is still more than are
7824 * available, the user will need to change the number of
7825 * queues/vectors used by the PF later with the ethtool
7828 if (vmdq_vecs < vmdq_vecs_wanted)
7829 pf->num_vmdq_qps = 1;
7830 pf->num_vmdq_msix = pf->num_vmdq_qps;
7832 v_budget += vmdq_vecs;
7833 vectors_left -= vmdq_vecs;
7837 /* On systems with a large number of SMP cores, we previously limited
7838 * the number of vectors for num_lan_msix to be at most 50% of the
7839 * available vectors, to allow for other features. Now, we add back
7840 * the remaining vectors. However, we ensure that the total
7841 * num_lan_msix will not exceed num_online_cpus(). To do this, we
7842 * calculate the number of vectors we can add without going over the
7843 * cap of CPUs. For systems with a small number of CPUs this will be
7846 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
7847 pf->num_lan_msix += extra_vectors;
7848 vectors_left -= extra_vectors;
7850 WARN(vectors_left < 0,
7851 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
7853 v_budget += pf->num_lan_msix;
7854 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7856 if (!pf->msix_entries)
7859 for (i = 0; i < v_budget; i++)
7860 pf->msix_entries[i].entry = i;
7861 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7863 if (v_actual < I40E_MIN_MSIX) {
7864 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7865 kfree(pf->msix_entries);
7866 pf->msix_entries = NULL;
7867 pci_disable_msix(pf->pdev);
7870 } else if (v_actual == I40E_MIN_MSIX) {
7871 /* Adjust for minimal MSIX use */
7872 pf->num_vmdq_vsis = 0;
7873 pf->num_vmdq_qps = 0;
7874 pf->num_lan_qps = 1;
7875 pf->num_lan_msix = 1;
7877 } else if (!vectors_left) {
7878 /* If we have limited resources, we will start with no vectors
7879 * for the special features and then allocate vectors to some
7880 * of these features based on the policy and at the end disable
7881 * the features that did not get any vectors.
7885 dev_info(&pf->pdev->dev,
7886 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7887 /* reserve the misc vector */
7890 /* Scale vector usage down */
7891 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7892 pf->num_vmdq_vsis = 1;
7893 pf->num_vmdq_qps = 1;
7895 /* partition out the remaining vectors */
7898 pf->num_lan_msix = 1;
7901 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7902 pf->num_lan_msix = 1;
7903 pf->num_iwarp_msix = 1;
7905 pf->num_lan_msix = 2;
7909 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7910 pf->num_iwarp_msix = min_t(int, (vec / 3),
7912 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7913 I40E_DEFAULT_NUM_VMDQ_VSI);
7915 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7916 I40E_DEFAULT_NUM_VMDQ_VSI);
7918 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7919 pf->num_fdsb_msix = 1;
7922 pf->num_lan_msix = min_t(int,
7923 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7925 pf->num_lan_qps = pf->num_lan_msix;
7930 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
7931 (pf->num_fdsb_msix == 0)) {
7932 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
7933 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7935 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7936 (pf->num_vmdq_msix == 0)) {
7937 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7938 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7941 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7942 (pf->num_iwarp_msix == 0)) {
7943 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7944 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7946 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
7947 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
7949 pf->num_vmdq_msix * pf->num_vmdq_vsis,
7951 pf->num_iwarp_msix);
7957 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7958 * @vsi: the VSI being configured
7959 * @v_idx: index of the vector in the vsi struct
7960 * @cpu: cpu to be used on affinity_mask
7962 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7964 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7966 struct i40e_q_vector *q_vector;
7968 /* allocate q_vector */
7969 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7973 q_vector->vsi = vsi;
7974 q_vector->v_idx = v_idx;
7975 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7978 netif_napi_add(vsi->netdev, &q_vector->napi,
7979 i40e_napi_poll, NAPI_POLL_WEIGHT);
7981 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7982 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7984 /* tie q_vector and vsi together */
7985 vsi->q_vectors[v_idx] = q_vector;
7991 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7992 * @vsi: the VSI being configured
7994 * We allocate one q_vector per queue interrupt. If allocation fails we
7997 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7999 struct i40e_pf *pf = vsi->back;
8000 int err, v_idx, num_q_vectors, current_cpu;
8002 /* if not MSIX, give the one vector only to the LAN VSI */
8003 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
8004 num_q_vectors = vsi->num_q_vectors;
8005 else if (vsi == pf->vsi[pf->lan_vsi])
8010 current_cpu = cpumask_first(cpu_online_mask);
8012 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
8013 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
8016 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
8017 if (unlikely(current_cpu >= nr_cpu_ids))
8018 current_cpu = cpumask_first(cpu_online_mask);
8025 i40e_free_q_vector(vsi, v_idx);
8031 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
8032 * @pf: board private structure to initialize
8034 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
8039 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8040 vectors = i40e_init_msix(pf);
8042 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
8043 I40E_FLAG_IWARP_ENABLED |
8044 I40E_FLAG_RSS_ENABLED |
8045 I40E_FLAG_DCB_CAPABLE |
8046 I40E_FLAG_DCB_ENABLED |
8047 I40E_FLAG_SRIOV_ENABLED |
8048 I40E_FLAG_FD_SB_ENABLED |
8049 I40E_FLAG_FD_ATR_ENABLED |
8050 I40E_FLAG_VMDQ_ENABLED);
8052 /* rework the queue expectations without MSIX */
8053 i40e_determine_queue_usage(pf);
8057 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8058 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
8059 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
8060 vectors = pci_enable_msi(pf->pdev);
8062 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
8064 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
8066 vectors = 1; /* one MSI or Legacy vector */
8069 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
8070 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
8072 /* set up vector assignment tracking */
8073 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
8074 pf->irq_pile = kzalloc(size, GFP_KERNEL);
8075 if (!pf->irq_pile) {
8076 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
8079 pf->irq_pile->num_entries = vectors;
8080 pf->irq_pile->search_hint = 0;
8082 /* track first vector for misc interrupts, ignore return */
8083 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
8089 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
8090 * @pf: board private structure
8092 * This sets up the handler for MSIX 0, which is used to manage the
8093 * non-queue interrupts, e.g. AdminQ and errors. This is not used
8094 * when in MSI or Legacy interrupt mode.
8096 static int i40e_setup_misc_vector(struct i40e_pf *pf)
8098 struct i40e_hw *hw = &pf->hw;
8101 /* Only request the irq if this is the first time through, and
8102 * not when we're rebuilding after a Reset
8104 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
8105 err = request_irq(pf->msix_entries[0].vector,
8106 i40e_intr, 0, pf->int_name, pf);
8108 dev_info(&pf->pdev->dev,
8109 "request_irq for %s failed: %d\n",
8115 i40e_enable_misc_int_causes(pf);
8117 /* associate no queues to the misc vector */
8118 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
8119 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
8123 i40e_irq_dynamic_enable_icr0(pf, true);
8129 * i40e_config_rss_aq - Prepare for RSS using AQ commands
8130 * @vsi: vsi structure
8131 * @seed: RSS hash seed
8133 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8134 u8 *lut, u16 lut_size)
8136 struct i40e_pf *pf = vsi->back;
8137 struct i40e_hw *hw = &pf->hw;
8141 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8142 (struct i40e_aqc_get_set_rss_key_data *)seed;
8143 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8145 dev_info(&pf->pdev->dev,
8146 "Cannot set RSS key, err %s aq_err %s\n",
8147 i40e_stat_str(hw, ret),
8148 i40e_aq_str(hw, hw->aq.asq_last_status));
8153 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8155 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8157 dev_info(&pf->pdev->dev,
8158 "Cannot set RSS lut, err %s aq_err %s\n",
8159 i40e_stat_str(hw, ret),
8160 i40e_aq_str(hw, hw->aq.asq_last_status));
8168 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8169 * @vsi: Pointer to vsi structure
8170 * @seed: Buffter to store the hash keys
8171 * @lut: Buffer to store the lookup table entries
8172 * @lut_size: Size of buffer to store the lookup table entries
8174 * Return 0 on success, negative on failure
8176 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8177 u8 *lut, u16 lut_size)
8179 struct i40e_pf *pf = vsi->back;
8180 struct i40e_hw *hw = &pf->hw;
8184 ret = i40e_aq_get_rss_key(hw, vsi->id,
8185 (struct i40e_aqc_get_set_rss_key_data *)seed);
8187 dev_info(&pf->pdev->dev,
8188 "Cannot get RSS key, err %s aq_err %s\n",
8189 i40e_stat_str(&pf->hw, ret),
8190 i40e_aq_str(&pf->hw,
8191 pf->hw.aq.asq_last_status));
8197 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8199 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8201 dev_info(&pf->pdev->dev,
8202 "Cannot get RSS lut, err %s aq_err %s\n",
8203 i40e_stat_str(&pf->hw, ret),
8204 i40e_aq_str(&pf->hw,
8205 pf->hw.aq.asq_last_status));
8214 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8215 * @vsi: VSI structure
8217 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8219 u8 seed[I40E_HKEY_ARRAY_SIZE];
8220 struct i40e_pf *pf = vsi->back;
8224 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8228 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8229 vsi->num_queue_pairs);
8233 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8236 /* Use the user configured hash keys and lookup table if there is one,
8237 * otherwise use default
8239 if (vsi->rss_lut_user)
8240 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8242 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8243 if (vsi->rss_hkey_user)
8244 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8246 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8247 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8254 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8255 * @vsi: Pointer to vsi structure
8256 * @seed: RSS hash seed
8257 * @lut: Lookup table
8258 * @lut_size: Lookup table size
8260 * Returns 0 on success, negative on failure
8262 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8263 const u8 *lut, u16 lut_size)
8265 struct i40e_pf *pf = vsi->back;
8266 struct i40e_hw *hw = &pf->hw;
8267 u16 vf_id = vsi->vf_id;
8270 /* Fill out hash function seed */
8272 u32 *seed_dw = (u32 *)seed;
8274 if (vsi->type == I40E_VSI_MAIN) {
8275 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8276 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8277 } else if (vsi->type == I40E_VSI_SRIOV) {
8278 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8279 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
8281 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8286 u32 *lut_dw = (u32 *)lut;
8288 if (vsi->type == I40E_VSI_MAIN) {
8289 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8291 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8292 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8293 } else if (vsi->type == I40E_VSI_SRIOV) {
8294 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8296 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8297 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
8299 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8308 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8309 * @vsi: Pointer to VSI structure
8310 * @seed: Buffer to store the keys
8311 * @lut: Buffer to store the lookup table entries
8312 * @lut_size: Size of buffer to store the lookup table entries
8314 * Returns 0 on success, negative on failure
8316 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8317 u8 *lut, u16 lut_size)
8319 struct i40e_pf *pf = vsi->back;
8320 struct i40e_hw *hw = &pf->hw;
8324 u32 *seed_dw = (u32 *)seed;
8326 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8327 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8330 u32 *lut_dw = (u32 *)lut;
8332 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8334 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8335 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8342 * i40e_config_rss - Configure RSS keys and lut
8343 * @vsi: Pointer to VSI structure
8344 * @seed: RSS hash seed
8345 * @lut: Lookup table
8346 * @lut_size: Lookup table size
8348 * Returns 0 on success, negative on failure
8350 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8352 struct i40e_pf *pf = vsi->back;
8354 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8355 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8357 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8361 * i40e_get_rss - Get RSS keys and lut
8362 * @vsi: Pointer to VSI structure
8363 * @seed: Buffer to store the keys
8364 * @lut: Buffer to store the lookup table entries
8365 * lut_size: Size of buffer to store the lookup table entries
8367 * Returns 0 on success, negative on failure
8369 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8371 struct i40e_pf *pf = vsi->back;
8373 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8374 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8376 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8380 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8381 * @pf: Pointer to board private structure
8382 * @lut: Lookup table
8383 * @rss_table_size: Lookup table size
8384 * @rss_size: Range of queue number for hashing
8386 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8387 u16 rss_table_size, u16 rss_size)
8391 for (i = 0; i < rss_table_size; i++)
8392 lut[i] = i % rss_size;
8396 * i40e_pf_config_rss - Prepare for RSS if used
8397 * @pf: board private structure
8399 static int i40e_pf_config_rss(struct i40e_pf *pf)
8401 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8402 u8 seed[I40E_HKEY_ARRAY_SIZE];
8404 struct i40e_hw *hw = &pf->hw;
8409 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8410 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8411 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8412 hena |= i40e_pf_get_default_rss_hena(pf);
8414 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8415 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8417 /* Determine the RSS table size based on the hardware capabilities */
8418 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8419 reg_val = (pf->rss_table_size == 512) ?
8420 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8421 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8422 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8424 /* Determine the RSS size of the VSI */
8425 if (!vsi->rss_size) {
8428 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
8429 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
8434 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8438 /* Use user configured lut if there is one, otherwise use default */
8439 if (vsi->rss_lut_user)
8440 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8442 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8444 /* Use user configured hash key if there is one, otherwise
8447 if (vsi->rss_hkey_user)
8448 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8450 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8451 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8458 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8459 * @pf: board private structure
8460 * @queue_count: the requested queue count for rss.
8462 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8463 * count which may be different from the requested queue count.
8464 * Note: expects to be called while under rtnl_lock()
8466 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8468 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8471 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8474 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8476 if (queue_count != vsi->num_queue_pairs) {
8479 vsi->req_queue_pairs = queue_count;
8480 i40e_prep_for_reset(pf, true);
8482 pf->alloc_rss_size = new_rss_size;
8484 i40e_reset_and_rebuild(pf, true, true);
8486 /* Discard the user configured hash keys and lut, if less
8487 * queues are enabled.
8489 if (queue_count < vsi->rss_size) {
8490 i40e_clear_rss_config_user(vsi);
8491 dev_dbg(&pf->pdev->dev,
8492 "discard user configured hash keys and lut\n");
8495 /* Reset vsi->rss_size, as number of enabled queues changed */
8496 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
8497 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
8499 i40e_pf_config_rss(pf);
8501 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
8502 vsi->req_queue_pairs, pf->rss_size_max);
8503 return pf->alloc_rss_size;
8507 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8508 * @pf: board private structure
8510 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8513 bool min_valid, max_valid;
8516 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8517 &min_valid, &max_valid);
8521 pf->npar_min_bw = min_bw;
8523 pf->npar_max_bw = max_bw;
8530 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8531 * @pf: board private structure
8533 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8535 struct i40e_aqc_configure_partition_bw_data bw_data;
8538 /* Set the valid bit for this PF */
8539 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8540 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8541 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8543 /* Set the new bandwidths */
8544 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8550 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8551 * @pf: board private structure
8553 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8555 /* Commit temporary BW setting to permanent NVM image */
8556 enum i40e_admin_queue_err last_aq_status;
8560 if (pf->hw.partition_id != 1) {
8561 dev_info(&pf->pdev->dev,
8562 "Commit BW only works on partition 1! This is partition %d",
8563 pf->hw.partition_id);
8564 ret = I40E_NOT_SUPPORTED;
8568 /* Acquire NVM for read access */
8569 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8570 last_aq_status = pf->hw.aq.asq_last_status;
8572 dev_info(&pf->pdev->dev,
8573 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8574 i40e_stat_str(&pf->hw, ret),
8575 i40e_aq_str(&pf->hw, last_aq_status));
8579 /* Read word 0x10 of NVM - SW compatibility word 1 */
8580 ret = i40e_aq_read_nvm(&pf->hw,
8581 I40E_SR_NVM_CONTROL_WORD,
8582 0x10, sizeof(nvm_word), &nvm_word,
8584 /* Save off last admin queue command status before releasing
8587 last_aq_status = pf->hw.aq.asq_last_status;
8588 i40e_release_nvm(&pf->hw);
8590 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8591 i40e_stat_str(&pf->hw, ret),
8592 i40e_aq_str(&pf->hw, last_aq_status));
8596 /* Wait a bit for NVM release to complete */
8599 /* Acquire NVM for write access */
8600 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8601 last_aq_status = pf->hw.aq.asq_last_status;
8603 dev_info(&pf->pdev->dev,
8604 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8605 i40e_stat_str(&pf->hw, ret),
8606 i40e_aq_str(&pf->hw, last_aq_status));
8609 /* Write it back out unchanged to initiate update NVM,
8610 * which will force a write of the shadow (alt) RAM to
8611 * the NVM - thus storing the bandwidth values permanently.
8613 ret = i40e_aq_update_nvm(&pf->hw,
8614 I40E_SR_NVM_CONTROL_WORD,
8615 0x10, sizeof(nvm_word),
8616 &nvm_word, true, NULL);
8617 /* Save off last admin queue command status before releasing
8620 last_aq_status = pf->hw.aq.asq_last_status;
8621 i40e_release_nvm(&pf->hw);
8623 dev_info(&pf->pdev->dev,
8624 "BW settings NOT SAVED, err %s aq_err %s\n",
8625 i40e_stat_str(&pf->hw, ret),
8626 i40e_aq_str(&pf->hw, last_aq_status));
8633 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8634 * @pf: board private structure to initialize
8636 * i40e_sw_init initializes the Adapter private data structure.
8637 * Fields are initialized based on PCI device information and
8638 * OS network device settings (MTU size).
8640 static int i40e_sw_init(struct i40e_pf *pf)
8645 /* Set default capability flags */
8646 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8647 I40E_FLAG_MSI_ENABLED |
8648 I40E_FLAG_MSIX_ENABLED;
8650 /* Set default ITR */
8651 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8652 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8654 /* Depending on PF configurations, it is possible that the RSS
8655 * maximum might end up larger than the available queues
8657 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8658 pf->alloc_rss_size = 1;
8659 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8660 pf->rss_size_max = min_t(int, pf->rss_size_max,
8661 pf->hw.func_caps.num_tx_qp);
8662 if (pf->hw.func_caps.rss) {
8663 pf->flags |= I40E_FLAG_RSS_ENABLED;
8664 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8668 /* MFP mode enabled */
8669 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8670 pf->flags |= I40E_FLAG_MFP_ENABLED;
8671 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8672 if (i40e_get_npar_bw_setting(pf))
8673 dev_warn(&pf->pdev->dev,
8674 "Could not get NPAR bw settings\n");
8676 dev_info(&pf->pdev->dev,
8677 "Min BW = %8.8x, Max BW = %8.8x\n",
8678 pf->npar_min_bw, pf->npar_max_bw);
8681 /* FW/NVM is not yet fixed in this regard */
8682 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8683 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8684 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8685 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8686 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8687 pf->hw.num_partitions > 1)
8688 dev_info(&pf->pdev->dev,
8689 "Flow Director Sideband mode Disabled in MFP mode\n");
8691 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8692 pf->fdir_pf_filter_count =
8693 pf->hw.func_caps.fd_filters_guaranteed;
8694 pf->hw.fdir_shared_filter_count =
8695 pf->hw.func_caps.fd_filters_best_effort;
8698 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8699 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8700 (pf->hw.aq.fw_maj_ver < 4))) {
8701 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8702 /* No DCB support for FW < v4.33 */
8703 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8706 /* Disable FW LLDP if FW < v4.3 */
8707 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8708 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8709 (pf->hw.aq.fw_maj_ver < 4)))
8710 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8712 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8713 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8714 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8715 (pf->hw.aq.fw_maj_ver >= 5)))
8716 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8718 if (pf->hw.func_caps.vmdq) {
8719 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8720 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8721 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8724 if (pf->hw.func_caps.iwarp) {
8725 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8726 /* IWARP needs one extra vector for CQP just like MISC.*/
8727 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8730 #ifdef CONFIG_PCI_IOV
8731 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8732 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8733 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8734 pf->num_req_vfs = min_t(int,
8735 pf->hw.func_caps.num_vfs,
8738 #endif /* CONFIG_PCI_IOV */
8739 if (pf->hw.mac.type == I40E_MAC_X722) {
8740 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE
8741 | I40E_FLAG_128_QP_RSS_CAPABLE
8742 | I40E_FLAG_HW_ATR_EVICT_CAPABLE
8743 | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE
8744 | I40E_FLAG_WB_ON_ITR_CAPABLE
8745 | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE
8746 | I40E_FLAG_NO_PCI_LINK_CHECK
8747 | I40E_FLAG_USE_SET_LLDP_MIB
8748 | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE
8749 | I40E_FLAG_PTP_L4_CAPABLE
8750 | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE;
8751 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8752 ((pf->hw.aq.api_maj_ver == 1) &&
8753 (pf->hw.aq.api_min_ver > 4))) {
8754 /* Supported in FW API version higher than 1.4 */
8755 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8756 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8758 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8761 pf->eeprom_version = 0xDEAD;
8762 pf->lan_veb = I40E_NO_VEB;
8763 pf->lan_vsi = I40E_NO_VSI;
8765 /* By default FW has this off for performance reasons */
8766 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8768 /* set up queue assignment tracking */
8769 size = sizeof(struct i40e_lump_tracking)
8770 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8771 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8776 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8777 pf->qp_pile->search_hint = 0;
8779 pf->tx_timeout_recovery_level = 1;
8781 mutex_init(&pf->switch_mutex);
8783 /* If NPAR is enabled nudge the Tx scheduler */
8784 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8785 i40e_set_npar_bw_setting(pf);
8792 * i40e_set_ntuple - set the ntuple feature flag and take action
8793 * @pf: board private structure to initialize
8794 * @features: the feature set that the stack is suggesting
8796 * returns a bool to indicate if reset needs to happen
8798 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8800 bool need_reset = false;
8802 /* Check if Flow Director n-tuple support was enabled or disabled. If
8803 * the state changed, we need to reset.
8805 if (features & NETIF_F_NTUPLE) {
8806 /* Enable filters and mark for reset */
8807 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8809 /* enable FD_SB only if there is MSI-X vector */
8810 if (pf->num_fdsb_msix > 0)
8811 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8813 /* turn off filters, mark for reset and clear SW filter list */
8814 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8816 i40e_fdir_filter_exit(pf);
8818 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8819 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8820 /* reset fd counters */
8823 /* if ATR was auto disabled it can be re-enabled. */
8824 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8825 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8826 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8827 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8828 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8835 * i40e_clear_rss_lut - clear the rx hash lookup table
8836 * @vsi: the VSI being configured
8838 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8840 struct i40e_pf *pf = vsi->back;
8841 struct i40e_hw *hw = &pf->hw;
8842 u16 vf_id = vsi->vf_id;
8845 if (vsi->type == I40E_VSI_MAIN) {
8846 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8847 wr32(hw, I40E_PFQF_HLUT(i), 0);
8848 } else if (vsi->type == I40E_VSI_SRIOV) {
8849 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8850 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8852 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8857 * i40e_set_features - set the netdev feature flags
8858 * @netdev: ptr to the netdev being adjusted
8859 * @features: the feature set that the stack is suggesting
8860 * Note: expects to be called while under rtnl_lock()
8862 static int i40e_set_features(struct net_device *netdev,
8863 netdev_features_t features)
8865 struct i40e_netdev_priv *np = netdev_priv(netdev);
8866 struct i40e_vsi *vsi = np->vsi;
8867 struct i40e_pf *pf = vsi->back;
8870 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8871 i40e_pf_config_rss(pf);
8872 else if (!(features & NETIF_F_RXHASH) &&
8873 netdev->features & NETIF_F_RXHASH)
8874 i40e_clear_rss_lut(vsi);
8876 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8877 i40e_vlan_stripping_enable(vsi);
8879 i40e_vlan_stripping_disable(vsi);
8881 need_reset = i40e_set_ntuple(pf, features);
8884 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), true);
8890 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8891 * @pf: board private structure
8892 * @port: The UDP port to look up
8894 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8896 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
8900 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8901 if (pf->udp_ports[i].index == port)
8909 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8910 * @netdev: This physical port's netdev
8911 * @ti: Tunnel endpoint information
8913 static void i40e_udp_tunnel_add(struct net_device *netdev,
8914 struct udp_tunnel_info *ti)
8916 struct i40e_netdev_priv *np = netdev_priv(netdev);
8917 struct i40e_vsi *vsi = np->vsi;
8918 struct i40e_pf *pf = vsi->back;
8919 u16 port = ntohs(ti->port);
8923 idx = i40e_get_udp_port_idx(pf, port);
8925 /* Check if port already exists */
8926 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8927 netdev_info(netdev, "port %d already offloaded\n", port);
8931 /* Now check if there is space to add the new port */
8932 next_idx = i40e_get_udp_port_idx(pf, 0);
8934 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8935 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8941 case UDP_TUNNEL_TYPE_VXLAN:
8942 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8944 case UDP_TUNNEL_TYPE_GENEVE:
8945 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8947 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8953 /* New port: add it and mark its index in the bitmap */
8954 pf->udp_ports[next_idx].index = port;
8955 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8956 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8960 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8961 * @netdev: This physical port's netdev
8962 * @ti: Tunnel endpoint information
8964 static void i40e_udp_tunnel_del(struct net_device *netdev,
8965 struct udp_tunnel_info *ti)
8967 struct i40e_netdev_priv *np = netdev_priv(netdev);
8968 struct i40e_vsi *vsi = np->vsi;
8969 struct i40e_pf *pf = vsi->back;
8970 u16 port = ntohs(ti->port);
8973 idx = i40e_get_udp_port_idx(pf, port);
8975 /* Check if port already exists */
8976 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8980 case UDP_TUNNEL_TYPE_VXLAN:
8981 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8984 case UDP_TUNNEL_TYPE_GENEVE:
8985 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8992 /* if port exists, set it to 0 (mark for deletion)
8993 * and make it pending
8995 pf->udp_ports[idx].index = 0;
8996 pf->pending_udp_bitmap |= BIT_ULL(idx);
8997 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9001 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
9005 static int i40e_get_phys_port_id(struct net_device *netdev,
9006 struct netdev_phys_item_id *ppid)
9008 struct i40e_netdev_priv *np = netdev_priv(netdev);
9009 struct i40e_pf *pf = np->vsi->back;
9010 struct i40e_hw *hw = &pf->hw;
9012 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
9015 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
9016 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
9022 * i40e_ndo_fdb_add - add an entry to the hardware database
9023 * @ndm: the input from the stack
9024 * @tb: pointer to array of nladdr (unused)
9025 * @dev: the net device pointer
9026 * @addr: the MAC address entry being added
9027 * @flags: instructions from stack about fdb operation
9029 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9030 struct net_device *dev,
9031 const unsigned char *addr, u16 vid,
9034 struct i40e_netdev_priv *np = netdev_priv(dev);
9035 struct i40e_pf *pf = np->vsi->back;
9038 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
9042 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
9046 /* Hardware does not support aging addresses so if a
9047 * ndm_state is given only allow permanent addresses
9049 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
9050 netdev_info(dev, "FDB only supports static addresses\n");
9054 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
9055 err = dev_uc_add_excl(dev, addr);
9056 else if (is_multicast_ether_addr(addr))
9057 err = dev_mc_add_excl(dev, addr);
9061 /* Only return duplicate errors if NLM_F_EXCL is set */
9062 if (err == -EEXIST && !(flags & NLM_F_EXCL))
9069 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
9070 * @dev: the netdev being configured
9071 * @nlh: RTNL message
9073 * Inserts a new hardware bridge if not already created and
9074 * enables the bridging mode requested (VEB or VEPA). If the
9075 * hardware bridge has already been inserted and the request
9076 * is to change the mode then that requires a PF reset to
9077 * allow rebuild of the components with required hardware
9078 * bridge mode enabled.
9080 * Note: expects to be called while under rtnl_lock()
9082 static int i40e_ndo_bridge_setlink(struct net_device *dev,
9083 struct nlmsghdr *nlh,
9086 struct i40e_netdev_priv *np = netdev_priv(dev);
9087 struct i40e_vsi *vsi = np->vsi;
9088 struct i40e_pf *pf = vsi->back;
9089 struct i40e_veb *veb = NULL;
9090 struct nlattr *attr, *br_spec;
9093 /* Only for PF VSI for now */
9094 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9097 /* Find the HW bridge for PF VSI */
9098 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9099 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9103 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9105 nla_for_each_nested(attr, br_spec, rem) {
9108 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9111 mode = nla_get_u16(attr);
9112 if ((mode != BRIDGE_MODE_VEPA) &&
9113 (mode != BRIDGE_MODE_VEB))
9116 /* Insert a new HW bridge */
9118 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9119 vsi->tc_config.enabled_tc);
9121 veb->bridge_mode = mode;
9122 i40e_config_bridge_mode(veb);
9124 /* No Bridge HW offload available */
9128 } else if (mode != veb->bridge_mode) {
9129 /* Existing HW bridge but different mode needs reset */
9130 veb->bridge_mode = mode;
9131 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9132 if (mode == BRIDGE_MODE_VEB)
9133 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9135 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9136 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED),
9146 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9149 * @seq: RTNL message seq #
9150 * @dev: the netdev being configured
9151 * @filter_mask: unused
9152 * @nlflags: netlink flags passed in
9154 * Return the mode in which the hardware bridge is operating in
9157 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9158 struct net_device *dev,
9159 u32 __always_unused filter_mask,
9162 struct i40e_netdev_priv *np = netdev_priv(dev);
9163 struct i40e_vsi *vsi = np->vsi;
9164 struct i40e_pf *pf = vsi->back;
9165 struct i40e_veb *veb = NULL;
9168 /* Only for PF VSI for now */
9169 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9172 /* Find the HW bridge for the PF VSI */
9173 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9174 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9181 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9182 0, 0, nlflags, filter_mask, NULL);
9186 * i40e_features_check - Validate encapsulated packet conforms to limits
9188 * @dev: This physical port's netdev
9189 * @features: Offload features that the stack believes apply
9191 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9192 struct net_device *dev,
9193 netdev_features_t features)
9197 /* No point in doing any of this if neither checksum nor GSO are
9198 * being requested for this frame. We can rule out both by just
9199 * checking for CHECKSUM_PARTIAL
9201 if (skb->ip_summed != CHECKSUM_PARTIAL)
9204 /* We cannot support GSO if the MSS is going to be less than
9205 * 64 bytes. If it is then we need to drop support for GSO.
9207 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
9208 features &= ~NETIF_F_GSO_MASK;
9210 /* MACLEN can support at most 63 words */
9211 len = skb_network_header(skb) - skb->data;
9212 if (len & ~(63 * 2))
9215 /* IPLEN and EIPLEN can support at most 127 dwords */
9216 len = skb_transport_header(skb) - skb_network_header(skb);
9217 if (len & ~(127 * 4))
9220 if (skb->encapsulation) {
9221 /* L4TUNLEN can support 127 words */
9222 len = skb_inner_network_header(skb) - skb_transport_header(skb);
9223 if (len & ~(127 * 2))
9226 /* IPLEN can support at most 127 dwords */
9227 len = skb_inner_transport_header(skb) -
9228 skb_inner_network_header(skb);
9229 if (len & ~(127 * 4))
9233 /* No need to validate L4LEN as TCP is the only protocol with a
9234 * a flexible value and we support all possible values supported
9235 * by TCP, which is at most 15 dwords
9240 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9243 static const struct net_device_ops i40e_netdev_ops = {
9244 .ndo_open = i40e_open,
9245 .ndo_stop = i40e_close,
9246 .ndo_start_xmit = i40e_lan_xmit_frame,
9247 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9248 .ndo_set_rx_mode = i40e_set_rx_mode,
9249 .ndo_validate_addr = eth_validate_addr,
9250 .ndo_set_mac_address = i40e_set_mac,
9251 .ndo_change_mtu = i40e_change_mtu,
9252 .ndo_do_ioctl = i40e_ioctl,
9253 .ndo_tx_timeout = i40e_tx_timeout,
9254 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9255 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9256 #ifdef CONFIG_NET_POLL_CONTROLLER
9257 .ndo_poll_controller = i40e_netpoll,
9259 .ndo_setup_tc = __i40e_setup_tc,
9260 .ndo_set_features = i40e_set_features,
9261 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9262 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9263 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9264 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9265 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9266 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9267 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9268 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9269 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9270 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9271 .ndo_fdb_add = i40e_ndo_fdb_add,
9272 .ndo_features_check = i40e_features_check,
9273 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9274 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9278 * i40e_config_netdev - Setup the netdev flags
9279 * @vsi: the VSI being configured
9281 * Returns 0 on success, negative value on failure
9283 static int i40e_config_netdev(struct i40e_vsi *vsi)
9285 struct i40e_pf *pf = vsi->back;
9286 struct i40e_hw *hw = &pf->hw;
9287 struct i40e_netdev_priv *np;
9288 struct net_device *netdev;
9289 u8 broadcast[ETH_ALEN];
9290 u8 mac_addr[ETH_ALEN];
9292 netdev_features_t hw_enc_features;
9293 netdev_features_t hw_features;
9295 etherdev_size = sizeof(struct i40e_netdev_priv);
9296 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9300 vsi->netdev = netdev;
9301 np = netdev_priv(netdev);
9304 hw_enc_features = NETIF_F_SG |
9308 NETIF_F_SOFT_FEATURES |
9313 NETIF_F_GSO_GRE_CSUM |
9314 NETIF_F_GSO_PARTIAL |
9315 NETIF_F_GSO_UDP_TUNNEL |
9316 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9322 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9323 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9325 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9327 netdev->hw_enc_features |= hw_enc_features;
9329 /* record features VLANs can make use of */
9330 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
9332 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9333 netdev->hw_features |= NETIF_F_NTUPLE;
9334 hw_features = hw_enc_features |
9335 NETIF_F_HW_VLAN_CTAG_TX |
9336 NETIF_F_HW_VLAN_CTAG_RX;
9338 netdev->hw_features |= hw_features;
9340 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9341 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9343 if (vsi->type == I40E_VSI_MAIN) {
9344 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9345 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9346 /* The following steps are necessary for two reasons. First,
9347 * some older NVM configurations load a default MAC-VLAN
9348 * filter that will accept any tagged packet, and we want to
9349 * replace this with a normal filter. Additionally, it is
9350 * possible our MAC address was provided by the platform using
9351 * Open Firmware or similar.
9353 * Thus, we need to remove the default filter and install one
9354 * specific to the MAC address.
9356 i40e_rm_default_mac_filter(vsi, mac_addr);
9357 spin_lock_bh(&vsi->mac_filter_hash_lock);
9358 i40e_add_mac_filter(vsi, mac_addr);
9359 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9361 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9362 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9363 pf->vsi[pf->lan_vsi]->netdev->name);
9364 random_ether_addr(mac_addr);
9366 spin_lock_bh(&vsi->mac_filter_hash_lock);
9367 i40e_add_mac_filter(vsi, mac_addr);
9368 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9371 /* Add the broadcast filter so that we initially will receive
9372 * broadcast packets. Note that when a new VLAN is first added the
9373 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
9374 * specific filters as part of transitioning into "vlan" operation.
9375 * When more VLANs are added, the driver will copy each existing MAC
9376 * filter and add it for the new VLAN.
9378 * Broadcast filters are handled specially by
9379 * i40e_sync_filters_subtask, as the driver must to set the broadcast
9380 * promiscuous bit instead of adding this directly as a MAC/VLAN
9381 * filter. The subtask will update the correct broadcast promiscuous
9382 * bits as VLANs become active or inactive.
9384 eth_broadcast_addr(broadcast);
9385 spin_lock_bh(&vsi->mac_filter_hash_lock);
9386 i40e_add_mac_filter(vsi, broadcast);
9387 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9389 ether_addr_copy(netdev->dev_addr, mac_addr);
9390 ether_addr_copy(netdev->perm_addr, mac_addr);
9392 netdev->priv_flags |= IFF_UNICAST_FLT;
9393 netdev->priv_flags |= IFF_SUPP_NOFCS;
9394 /* Setup netdev TC information */
9395 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9397 netdev->netdev_ops = &i40e_netdev_ops;
9398 netdev->watchdog_timeo = 5 * HZ;
9399 i40e_set_ethtool_ops(netdev);
9401 /* MTU range: 68 - 9706 */
9402 netdev->min_mtu = ETH_MIN_MTU;
9403 netdev->max_mtu = I40E_MAX_RXBUFFER -
9404 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9410 * i40e_vsi_delete - Delete a VSI from the switch
9411 * @vsi: the VSI being removed
9413 * Returns 0 on success, negative value on failure
9415 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9417 /* remove default VSI is not allowed */
9418 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9421 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9425 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9426 * @vsi: the VSI being queried
9428 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9430 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9432 struct i40e_veb *veb;
9433 struct i40e_pf *pf = vsi->back;
9435 /* Uplink is not a bridge so default to VEB */
9436 if (vsi->veb_idx == I40E_NO_VEB)
9439 veb = pf->veb[vsi->veb_idx];
9441 dev_info(&pf->pdev->dev,
9442 "There is no veb associated with the bridge\n");
9446 /* Uplink is a bridge in VEPA mode */
9447 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9450 /* Uplink is a bridge in VEB mode */
9454 /* VEPA is now default bridge, so return 0 */
9459 * i40e_add_vsi - Add a VSI to the switch
9460 * @vsi: the VSI being configured
9462 * This initializes a VSI context depending on the VSI type to be added and
9463 * passes it down to the add_vsi aq command.
9465 static int i40e_add_vsi(struct i40e_vsi *vsi)
9468 struct i40e_pf *pf = vsi->back;
9469 struct i40e_hw *hw = &pf->hw;
9470 struct i40e_vsi_context ctxt;
9471 struct i40e_mac_filter *f;
9472 struct hlist_node *h;
9475 u8 enabled_tc = 0x1; /* TC0 enabled */
9478 memset(&ctxt, 0, sizeof(ctxt));
9479 switch (vsi->type) {
9481 /* The PF's main VSI is already setup as part of the
9482 * device initialization, so we'll not bother with
9483 * the add_vsi call, but we will retrieve the current
9486 ctxt.seid = pf->main_vsi_seid;
9487 ctxt.pf_num = pf->hw.pf_id;
9489 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9490 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9492 dev_info(&pf->pdev->dev,
9493 "couldn't get PF vsi config, err %s aq_err %s\n",
9494 i40e_stat_str(&pf->hw, ret),
9495 i40e_aq_str(&pf->hw,
9496 pf->hw.aq.asq_last_status));
9499 vsi->info = ctxt.info;
9500 vsi->info.valid_sections = 0;
9502 vsi->seid = ctxt.seid;
9503 vsi->id = ctxt.vsi_number;
9505 enabled_tc = i40e_pf_get_tc_map(pf);
9507 /* MFP mode setup queue map and update VSI */
9508 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9509 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9510 memset(&ctxt, 0, sizeof(ctxt));
9511 ctxt.seid = pf->main_vsi_seid;
9512 ctxt.pf_num = pf->hw.pf_id;
9514 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9515 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9517 dev_info(&pf->pdev->dev,
9518 "update vsi failed, err %s aq_err %s\n",
9519 i40e_stat_str(&pf->hw, ret),
9520 i40e_aq_str(&pf->hw,
9521 pf->hw.aq.asq_last_status));
9525 /* update the local VSI info queue map */
9526 i40e_vsi_update_queue_map(vsi, &ctxt);
9527 vsi->info.valid_sections = 0;
9529 /* Default/Main VSI is only enabled for TC0
9530 * reconfigure it to enable all TCs that are
9531 * available on the port in SFP mode.
9532 * For MFP case the iSCSI PF would use this
9533 * flow to enable LAN+iSCSI TC.
9535 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9537 dev_info(&pf->pdev->dev,
9538 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9540 i40e_stat_str(&pf->hw, ret),
9541 i40e_aq_str(&pf->hw,
9542 pf->hw.aq.asq_last_status));
9549 ctxt.pf_num = hw->pf_id;
9551 ctxt.uplink_seid = vsi->uplink_seid;
9552 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9553 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9554 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9555 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9556 ctxt.info.valid_sections |=
9557 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9558 ctxt.info.switch_id =
9559 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9561 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9564 case I40E_VSI_VMDQ2:
9565 ctxt.pf_num = hw->pf_id;
9567 ctxt.uplink_seid = vsi->uplink_seid;
9568 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9569 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9571 /* This VSI is connected to VEB so the switch_id
9572 * should be set to zero by default.
9574 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9575 ctxt.info.valid_sections |=
9576 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9577 ctxt.info.switch_id =
9578 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9581 /* Setup the VSI tx/rx queue map for TC0 only for now */
9582 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9585 case I40E_VSI_SRIOV:
9586 ctxt.pf_num = hw->pf_id;
9587 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9588 ctxt.uplink_seid = vsi->uplink_seid;
9589 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9590 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9592 /* This VSI is connected to VEB so the switch_id
9593 * should be set to zero by default.
9595 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9596 ctxt.info.valid_sections |=
9597 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9598 ctxt.info.switch_id =
9599 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9602 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9603 ctxt.info.valid_sections |=
9604 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9605 ctxt.info.queueing_opt_flags |=
9606 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9607 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9610 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9611 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9612 if (pf->vf[vsi->vf_id].spoofchk) {
9613 ctxt.info.valid_sections |=
9614 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9615 ctxt.info.sec_flags |=
9616 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9617 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9619 /* Setup the VSI tx/rx queue map for TC0 only for now */
9620 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9623 case I40E_VSI_IWARP:
9624 /* send down message to iWARP */
9631 if (vsi->type != I40E_VSI_MAIN) {
9632 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9634 dev_info(&vsi->back->pdev->dev,
9635 "add vsi failed, err %s aq_err %s\n",
9636 i40e_stat_str(&pf->hw, ret),
9637 i40e_aq_str(&pf->hw,
9638 pf->hw.aq.asq_last_status));
9642 vsi->info = ctxt.info;
9643 vsi->info.valid_sections = 0;
9644 vsi->seid = ctxt.seid;
9645 vsi->id = ctxt.vsi_number;
9648 vsi->active_filters = 0;
9649 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9650 spin_lock_bh(&vsi->mac_filter_hash_lock);
9651 /* If macvlan filters already exist, force them to get loaded */
9652 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
9653 f->state = I40E_FILTER_NEW;
9656 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9659 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9660 pf->flags |= I40E_FLAG_FILTER_SYNC;
9663 /* Update VSI BW information */
9664 ret = i40e_vsi_get_bw_info(vsi);
9666 dev_info(&pf->pdev->dev,
9667 "couldn't get vsi bw info, err %s aq_err %s\n",
9668 i40e_stat_str(&pf->hw, ret),
9669 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9670 /* VSI is already added so not tearing that up */
9679 * i40e_vsi_release - Delete a VSI and free its resources
9680 * @vsi: the VSI being removed
9682 * Returns 0 on success or < 0 on error
9684 int i40e_vsi_release(struct i40e_vsi *vsi)
9686 struct i40e_mac_filter *f;
9687 struct hlist_node *h;
9688 struct i40e_veb *veb = NULL;
9695 /* release of a VEB-owner or last VSI is not allowed */
9696 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9697 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9698 vsi->seid, vsi->uplink_seid);
9701 if (vsi == pf->vsi[pf->lan_vsi] &&
9702 !test_bit(__I40E_DOWN, &pf->state)) {
9703 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9707 uplink_seid = vsi->uplink_seid;
9708 if (vsi->type != I40E_VSI_SRIOV) {
9709 if (vsi->netdev_registered) {
9710 vsi->netdev_registered = false;
9712 /* results in a call to i40e_close() */
9713 unregister_netdev(vsi->netdev);
9716 i40e_vsi_close(vsi);
9718 i40e_vsi_disable_irq(vsi);
9721 spin_lock_bh(&vsi->mac_filter_hash_lock);
9723 /* clear the sync flag on all filters */
9725 __dev_uc_unsync(vsi->netdev, NULL);
9726 __dev_mc_unsync(vsi->netdev, NULL);
9729 /* make sure any remaining filters are marked for deletion */
9730 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
9731 __i40e_del_filter(vsi, f);
9733 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9735 i40e_sync_vsi_filters(vsi);
9737 i40e_vsi_delete(vsi);
9738 i40e_vsi_free_q_vectors(vsi);
9740 free_netdev(vsi->netdev);
9743 i40e_vsi_clear_rings(vsi);
9744 i40e_vsi_clear(vsi);
9746 /* If this was the last thing on the VEB, except for the
9747 * controlling VSI, remove the VEB, which puts the controlling
9748 * VSI onto the next level down in the switch.
9750 * Well, okay, there's one more exception here: don't remove
9751 * the orphan VEBs yet. We'll wait for an explicit remove request
9752 * from up the network stack.
9754 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9756 pf->vsi[i]->uplink_seid == uplink_seid &&
9757 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9758 n++; /* count the VSIs */
9761 for (i = 0; i < I40E_MAX_VEB; i++) {
9764 if (pf->veb[i]->uplink_seid == uplink_seid)
9765 n++; /* count the VEBs */
9766 if (pf->veb[i]->seid == uplink_seid)
9769 if (n == 0 && veb && veb->uplink_seid != 0)
9770 i40e_veb_release(veb);
9776 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9777 * @vsi: ptr to the VSI
9779 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9780 * corresponding SW VSI structure and initializes num_queue_pairs for the
9781 * newly allocated VSI.
9783 * Returns 0 on success or negative on failure
9785 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9788 struct i40e_pf *pf = vsi->back;
9790 if (vsi->q_vectors[0]) {
9791 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9796 if (vsi->base_vector) {
9797 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9798 vsi->seid, vsi->base_vector);
9802 ret = i40e_vsi_alloc_q_vectors(vsi);
9804 dev_info(&pf->pdev->dev,
9805 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9806 vsi->num_q_vectors, vsi->seid, ret);
9807 vsi->num_q_vectors = 0;
9808 goto vector_setup_out;
9811 /* In Legacy mode, we do not have to get any other vector since we
9812 * piggyback on the misc/ICR0 for queue interrupts.
9814 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9816 if (vsi->num_q_vectors)
9817 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9818 vsi->num_q_vectors, vsi->idx);
9819 if (vsi->base_vector < 0) {
9820 dev_info(&pf->pdev->dev,
9821 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9822 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9823 i40e_vsi_free_q_vectors(vsi);
9825 goto vector_setup_out;
9833 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9834 * @vsi: pointer to the vsi.
9836 * This re-allocates a vsi's queue resources.
9838 * Returns pointer to the successfully allocated and configured VSI sw struct
9839 * on success, otherwise returns NULL on failure.
9841 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9852 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9853 i40e_vsi_clear_rings(vsi);
9855 i40e_vsi_free_arrays(vsi, false);
9856 i40e_set_num_rings_in_vsi(vsi);
9857 ret = i40e_vsi_alloc_arrays(vsi, false);
9861 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9863 dev_info(&pf->pdev->dev,
9864 "failed to get tracking for %d queues for VSI %d err %d\n",
9865 vsi->alloc_queue_pairs, vsi->seid, ret);
9868 vsi->base_queue = ret;
9870 /* Update the FW view of the VSI. Force a reset of TC and queue
9871 * layout configurations.
9873 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9874 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9875 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9876 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9877 if (vsi->type == I40E_VSI_MAIN)
9878 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9880 /* assign it some queues */
9881 ret = i40e_alloc_rings(vsi);
9885 /* map all of the rings to the q_vectors */
9886 i40e_vsi_map_rings_to_vectors(vsi);
9890 i40e_vsi_free_q_vectors(vsi);
9891 if (vsi->netdev_registered) {
9892 vsi->netdev_registered = false;
9893 unregister_netdev(vsi->netdev);
9894 free_netdev(vsi->netdev);
9897 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9899 i40e_vsi_clear(vsi);
9904 * i40e_vsi_setup - Set up a VSI by a given type
9905 * @pf: board private structure
9907 * @uplink_seid: the switch element to link to
9908 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9910 * This allocates the sw VSI structure and its queue resources, then add a VSI
9911 * to the identified VEB.
9913 * Returns pointer to the successfully allocated and configure VSI sw struct on
9914 * success, otherwise returns NULL on failure.
9916 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9917 u16 uplink_seid, u32 param1)
9919 struct i40e_vsi *vsi = NULL;
9920 struct i40e_veb *veb = NULL;
9924 /* The requested uplink_seid must be either
9925 * - the PF's port seid
9926 * no VEB is needed because this is the PF
9927 * or this is a Flow Director special case VSI
9928 * - seid of an existing VEB
9929 * - seid of a VSI that owns an existing VEB
9930 * - seid of a VSI that doesn't own a VEB
9931 * a new VEB is created and the VSI becomes the owner
9932 * - seid of the PF VSI, which is what creates the first VEB
9933 * this is a special case of the previous
9935 * Find which uplink_seid we were given and create a new VEB if needed
9937 for (i = 0; i < I40E_MAX_VEB; i++) {
9938 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9944 if (!veb && uplink_seid != pf->mac_seid) {
9946 for (i = 0; i < pf->num_alloc_vsi; i++) {
9947 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9953 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9958 if (vsi->uplink_seid == pf->mac_seid)
9959 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9960 vsi->tc_config.enabled_tc);
9961 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9962 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9963 vsi->tc_config.enabled_tc);
9965 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9966 dev_info(&vsi->back->pdev->dev,
9967 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9970 /* We come up by default in VEPA mode if SRIOV is not
9971 * already enabled, in which case we can't force VEPA
9974 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9975 veb->bridge_mode = BRIDGE_MODE_VEPA;
9976 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9978 i40e_config_bridge_mode(veb);
9980 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9981 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9985 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9989 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9990 uplink_seid = veb->seid;
9993 /* get vsi sw struct */
9994 v_idx = i40e_vsi_mem_alloc(pf, type);
9997 vsi = pf->vsi[v_idx];
10001 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
10003 if (type == I40E_VSI_MAIN)
10004 pf->lan_vsi = v_idx;
10005 else if (type == I40E_VSI_SRIOV)
10006 vsi->vf_id = param1;
10007 /* assign it some queues */
10008 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
10011 dev_info(&pf->pdev->dev,
10012 "failed to get tracking for %d queues for VSI %d err=%d\n",
10013 vsi->alloc_queue_pairs, vsi->seid, ret);
10016 vsi->base_queue = ret;
10018 /* get a VSI from the hardware */
10019 vsi->uplink_seid = uplink_seid;
10020 ret = i40e_add_vsi(vsi);
10024 switch (vsi->type) {
10025 /* setup the netdev if needed */
10026 case I40E_VSI_MAIN:
10027 /* Apply relevant filters if a platform-specific mac
10028 * address was selected.
10030 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
10031 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
10033 dev_warn(&pf->pdev->dev,
10034 "could not set up macaddr; err %d\n",
10038 case I40E_VSI_VMDQ2:
10039 ret = i40e_config_netdev(vsi);
10042 ret = register_netdev(vsi->netdev);
10045 vsi->netdev_registered = true;
10046 netif_carrier_off(vsi->netdev);
10047 #ifdef CONFIG_I40E_DCB
10048 /* Setup DCB netlink interface */
10049 i40e_dcbnl_setup(vsi);
10050 #endif /* CONFIG_I40E_DCB */
10053 case I40E_VSI_FDIR:
10054 /* set up vectors and rings if needed */
10055 ret = i40e_vsi_setup_vectors(vsi);
10059 ret = i40e_alloc_rings(vsi);
10063 /* map all of the rings to the q_vectors */
10064 i40e_vsi_map_rings_to_vectors(vsi);
10066 i40e_vsi_reset_stats(vsi);
10070 /* no netdev or rings for the other VSI types */
10074 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
10075 (vsi->type == I40E_VSI_VMDQ2)) {
10076 ret = i40e_vsi_config_rss(vsi);
10081 i40e_vsi_free_q_vectors(vsi);
10083 if (vsi->netdev_registered) {
10084 vsi->netdev_registered = false;
10085 unregister_netdev(vsi->netdev);
10086 free_netdev(vsi->netdev);
10087 vsi->netdev = NULL;
10090 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10092 i40e_vsi_clear(vsi);
10098 * i40e_veb_get_bw_info - Query VEB BW information
10099 * @veb: the veb to query
10101 * Query the Tx scheduler BW configuration data for given VEB
10103 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
10105 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
10106 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
10107 struct i40e_pf *pf = veb->pf;
10108 struct i40e_hw *hw = &pf->hw;
10113 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
10116 dev_info(&pf->pdev->dev,
10117 "query veb bw config failed, err %s aq_err %s\n",
10118 i40e_stat_str(&pf->hw, ret),
10119 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10123 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
10126 dev_info(&pf->pdev->dev,
10127 "query veb bw ets config failed, err %s aq_err %s\n",
10128 i40e_stat_str(&pf->hw, ret),
10129 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10133 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10134 veb->bw_max_quanta = ets_data.tc_bw_max;
10135 veb->is_abs_credits = bw_data.absolute_credits_enable;
10136 veb->enabled_tc = ets_data.tc_valid_bits;
10137 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10138 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10139 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10140 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10141 veb->bw_tc_limit_credits[i] =
10142 le16_to_cpu(bw_data.tc_bw_limits[i]);
10143 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10151 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10152 * @pf: board private structure
10154 * On error: returns error code (negative)
10155 * On success: returns vsi index in PF (positive)
10157 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10160 struct i40e_veb *veb;
10163 /* Need to protect the allocation of switch elements at the PF level */
10164 mutex_lock(&pf->switch_mutex);
10166 /* VEB list may be fragmented if VEB creation/destruction has
10167 * been happening. We can afford to do a quick scan to look
10168 * for any free slots in the list.
10170 * find next empty veb slot, looping back around if necessary
10173 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10175 if (i >= I40E_MAX_VEB) {
10177 goto err_alloc_veb; /* out of VEB slots! */
10180 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10183 goto err_alloc_veb;
10187 veb->enabled_tc = 1;
10192 mutex_unlock(&pf->switch_mutex);
10197 * i40e_switch_branch_release - Delete a branch of the switch tree
10198 * @branch: where to start deleting
10200 * This uses recursion to find the tips of the branch to be
10201 * removed, deleting until we get back to and can delete this VEB.
10203 static void i40e_switch_branch_release(struct i40e_veb *branch)
10205 struct i40e_pf *pf = branch->pf;
10206 u16 branch_seid = branch->seid;
10207 u16 veb_idx = branch->idx;
10210 /* release any VEBs on this VEB - RECURSION */
10211 for (i = 0; i < I40E_MAX_VEB; i++) {
10214 if (pf->veb[i]->uplink_seid == branch->seid)
10215 i40e_switch_branch_release(pf->veb[i]);
10218 /* Release the VSIs on this VEB, but not the owner VSI.
10220 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10221 * the VEB itself, so don't use (*branch) after this loop.
10223 for (i = 0; i < pf->num_alloc_vsi; i++) {
10226 if (pf->vsi[i]->uplink_seid == branch_seid &&
10227 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10228 i40e_vsi_release(pf->vsi[i]);
10232 /* There's one corner case where the VEB might not have been
10233 * removed, so double check it here and remove it if needed.
10234 * This case happens if the veb was created from the debugfs
10235 * commands and no VSIs were added to it.
10237 if (pf->veb[veb_idx])
10238 i40e_veb_release(pf->veb[veb_idx]);
10242 * i40e_veb_clear - remove veb struct
10243 * @veb: the veb to remove
10245 static void i40e_veb_clear(struct i40e_veb *veb)
10251 struct i40e_pf *pf = veb->pf;
10253 mutex_lock(&pf->switch_mutex);
10254 if (pf->veb[veb->idx] == veb)
10255 pf->veb[veb->idx] = NULL;
10256 mutex_unlock(&pf->switch_mutex);
10263 * i40e_veb_release - Delete a VEB and free its resources
10264 * @veb: the VEB being removed
10266 void i40e_veb_release(struct i40e_veb *veb)
10268 struct i40e_vsi *vsi = NULL;
10269 struct i40e_pf *pf;
10274 /* find the remaining VSI and check for extras */
10275 for (i = 0; i < pf->num_alloc_vsi; i++) {
10276 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10282 dev_info(&pf->pdev->dev,
10283 "can't remove VEB %d with %d VSIs left\n",
10288 /* move the remaining VSI to uplink veb */
10289 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10290 if (veb->uplink_seid) {
10291 vsi->uplink_seid = veb->uplink_seid;
10292 if (veb->uplink_seid == pf->mac_seid)
10293 vsi->veb_idx = I40E_NO_VEB;
10295 vsi->veb_idx = veb->veb_idx;
10298 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10299 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10302 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10303 i40e_veb_clear(veb);
10307 * i40e_add_veb - create the VEB in the switch
10308 * @veb: the VEB to be instantiated
10309 * @vsi: the controlling VSI
10311 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10313 struct i40e_pf *pf = veb->pf;
10314 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10317 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10318 veb->enabled_tc, false,
10319 &veb->seid, enable_stats, NULL);
10321 /* get a VEB from the hardware */
10323 dev_info(&pf->pdev->dev,
10324 "couldn't add VEB, err %s aq_err %s\n",
10325 i40e_stat_str(&pf->hw, ret),
10326 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10330 /* get statistics counter */
10331 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10332 &veb->stats_idx, NULL, NULL, NULL);
10334 dev_info(&pf->pdev->dev,
10335 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10336 i40e_stat_str(&pf->hw, ret),
10337 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10340 ret = i40e_veb_get_bw_info(veb);
10342 dev_info(&pf->pdev->dev,
10343 "couldn't get VEB bw info, err %s aq_err %s\n",
10344 i40e_stat_str(&pf->hw, ret),
10345 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10346 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10350 vsi->uplink_seid = veb->seid;
10351 vsi->veb_idx = veb->idx;
10352 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10358 * i40e_veb_setup - Set up a VEB
10359 * @pf: board private structure
10360 * @flags: VEB setup flags
10361 * @uplink_seid: the switch element to link to
10362 * @vsi_seid: the initial VSI seid
10363 * @enabled_tc: Enabled TC bit-map
10365 * This allocates the sw VEB structure and links it into the switch
10366 * It is possible and legal for this to be a duplicate of an already
10367 * existing VEB. It is also possible for both uplink and vsi seids
10368 * to be zero, in order to create a floating VEB.
10370 * Returns pointer to the successfully allocated VEB sw struct on
10371 * success, otherwise returns NULL on failure.
10373 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10374 u16 uplink_seid, u16 vsi_seid,
10377 struct i40e_veb *veb, *uplink_veb = NULL;
10378 int vsi_idx, veb_idx;
10381 /* if one seid is 0, the other must be 0 to create a floating relay */
10382 if ((uplink_seid == 0 || vsi_seid == 0) &&
10383 (uplink_seid + vsi_seid != 0)) {
10384 dev_info(&pf->pdev->dev,
10385 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10386 uplink_seid, vsi_seid);
10390 /* make sure there is such a vsi and uplink */
10391 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10392 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10394 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10395 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10400 if (uplink_seid && uplink_seid != pf->mac_seid) {
10401 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10402 if (pf->veb[veb_idx] &&
10403 pf->veb[veb_idx]->seid == uplink_seid) {
10404 uplink_veb = pf->veb[veb_idx];
10409 dev_info(&pf->pdev->dev,
10410 "uplink seid %d not found\n", uplink_seid);
10415 /* get veb sw struct */
10416 veb_idx = i40e_veb_mem_alloc(pf);
10419 veb = pf->veb[veb_idx];
10420 veb->flags = flags;
10421 veb->uplink_seid = uplink_seid;
10422 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10423 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10425 /* create the VEB in the switch */
10426 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10429 if (vsi_idx == pf->lan_vsi)
10430 pf->lan_veb = veb->idx;
10435 i40e_veb_clear(veb);
10441 * i40e_setup_pf_switch_element - set PF vars based on switch type
10442 * @pf: board private structure
10443 * @ele: element we are building info from
10444 * @num_reported: total number of elements
10445 * @printconfig: should we print the contents
10447 * helper function to assist in extracting a few useful SEID values.
10449 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10450 struct i40e_aqc_switch_config_element_resp *ele,
10451 u16 num_reported, bool printconfig)
10453 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10454 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10455 u8 element_type = ele->element_type;
10456 u16 seid = le16_to_cpu(ele->seid);
10459 dev_info(&pf->pdev->dev,
10460 "type=%d seid=%d uplink=%d downlink=%d\n",
10461 element_type, seid, uplink_seid, downlink_seid);
10463 switch (element_type) {
10464 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10465 pf->mac_seid = seid;
10467 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10469 if (uplink_seid != pf->mac_seid)
10471 if (pf->lan_veb == I40E_NO_VEB) {
10474 /* find existing or else empty VEB */
10475 for (v = 0; v < I40E_MAX_VEB; v++) {
10476 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10481 if (pf->lan_veb == I40E_NO_VEB) {
10482 v = i40e_veb_mem_alloc(pf);
10489 pf->veb[pf->lan_veb]->seid = seid;
10490 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10491 pf->veb[pf->lan_veb]->pf = pf;
10492 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10494 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10495 if (num_reported != 1)
10497 /* This is immediately after a reset so we can assume this is
10500 pf->mac_seid = uplink_seid;
10501 pf->pf_seid = downlink_seid;
10502 pf->main_vsi_seid = seid;
10504 dev_info(&pf->pdev->dev,
10505 "pf_seid=%d main_vsi_seid=%d\n",
10506 pf->pf_seid, pf->main_vsi_seid);
10508 case I40E_SWITCH_ELEMENT_TYPE_PF:
10509 case I40E_SWITCH_ELEMENT_TYPE_VF:
10510 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10511 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10512 case I40E_SWITCH_ELEMENT_TYPE_PE:
10513 case I40E_SWITCH_ELEMENT_TYPE_PA:
10514 /* ignore these for now */
10517 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10518 element_type, seid);
10524 * i40e_fetch_switch_configuration - Get switch config from firmware
10525 * @pf: board private structure
10526 * @printconfig: should we print the contents
10528 * Get the current switch configuration from the device and
10529 * extract a few useful SEID values.
10531 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10533 struct i40e_aqc_get_switch_config_resp *sw_config;
10539 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10543 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10545 u16 num_reported, num_total;
10547 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10551 dev_info(&pf->pdev->dev,
10552 "get switch config failed err %s aq_err %s\n",
10553 i40e_stat_str(&pf->hw, ret),
10554 i40e_aq_str(&pf->hw,
10555 pf->hw.aq.asq_last_status));
10560 num_reported = le16_to_cpu(sw_config->header.num_reported);
10561 num_total = le16_to_cpu(sw_config->header.num_total);
10564 dev_info(&pf->pdev->dev,
10565 "header: %d reported %d total\n",
10566 num_reported, num_total);
10568 for (i = 0; i < num_reported; i++) {
10569 struct i40e_aqc_switch_config_element_resp *ele =
10570 &sw_config->element[i];
10572 i40e_setup_pf_switch_element(pf, ele, num_reported,
10575 } while (next_seid != 0);
10582 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10583 * @pf: board private structure
10584 * @reinit: if the Main VSI needs to re-initialized.
10586 * Returns 0 on success, negative value on failure
10588 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10593 /* find out what's out there already */
10594 ret = i40e_fetch_switch_configuration(pf, false);
10596 dev_info(&pf->pdev->dev,
10597 "couldn't fetch switch config, err %s aq_err %s\n",
10598 i40e_stat_str(&pf->hw, ret),
10599 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10602 i40e_pf_reset_stats(pf);
10604 /* set the switch config bit for the whole device to
10605 * support limited promisc or true promisc
10606 * when user requests promisc. The default is limited
10610 if ((pf->hw.pf_id == 0) &&
10611 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10612 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10614 if (pf->hw.pf_id == 0) {
10617 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10618 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10620 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10621 dev_info(&pf->pdev->dev,
10622 "couldn't set switch config bits, err %s aq_err %s\n",
10623 i40e_stat_str(&pf->hw, ret),
10624 i40e_aq_str(&pf->hw,
10625 pf->hw.aq.asq_last_status));
10626 /* not a fatal problem, just keep going */
10630 /* first time setup */
10631 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10632 struct i40e_vsi *vsi = NULL;
10635 /* Set up the PF VSI associated with the PF's main VSI
10636 * that is already in the HW switch
10638 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10639 uplink_seid = pf->veb[pf->lan_veb]->seid;
10641 uplink_seid = pf->mac_seid;
10642 if (pf->lan_vsi == I40E_NO_VSI)
10643 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10645 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10647 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10648 i40e_fdir_teardown(pf);
10652 /* force a reset of TC and queue layout configurations */
10653 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10655 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10656 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10657 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10659 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10661 i40e_fdir_sb_setup(pf);
10663 /* Setup static PF queue filter control settings */
10664 ret = i40e_setup_pf_filter_control(pf);
10666 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10668 /* Failure here should not stop continuing other steps */
10671 /* enable RSS in the HW, even for only one queue, as the stack can use
10674 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10675 i40e_pf_config_rss(pf);
10677 /* fill in link information and enable LSE reporting */
10678 i40e_link_event(pf);
10680 /* Initialize user-specific link properties */
10681 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10682 I40E_AQ_AN_COMPLETED) ? true : false);
10690 * i40e_determine_queue_usage - Work out queue distribution
10691 * @pf: board private structure
10693 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10697 pf->num_lan_qps = 0;
10699 /* Find the max queues to be put into basic use. We'll always be
10700 * using TC0, whether or not DCB is running, and TC0 will get the
10703 queues_left = pf->hw.func_caps.num_tx_qp;
10705 if ((queues_left == 1) ||
10706 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10707 /* one qp for PF, no queues for anything else */
10709 pf->alloc_rss_size = pf->num_lan_qps = 1;
10711 /* make sure all the fancies are disabled */
10712 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10713 I40E_FLAG_IWARP_ENABLED |
10714 I40E_FLAG_FD_SB_ENABLED |
10715 I40E_FLAG_FD_ATR_ENABLED |
10716 I40E_FLAG_DCB_CAPABLE |
10717 I40E_FLAG_DCB_ENABLED |
10718 I40E_FLAG_SRIOV_ENABLED |
10719 I40E_FLAG_VMDQ_ENABLED);
10720 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10721 I40E_FLAG_FD_SB_ENABLED |
10722 I40E_FLAG_FD_ATR_ENABLED |
10723 I40E_FLAG_DCB_CAPABLE))) {
10724 /* one qp for PF */
10725 pf->alloc_rss_size = pf->num_lan_qps = 1;
10726 queues_left -= pf->num_lan_qps;
10728 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10729 I40E_FLAG_IWARP_ENABLED |
10730 I40E_FLAG_FD_SB_ENABLED |
10731 I40E_FLAG_FD_ATR_ENABLED |
10732 I40E_FLAG_DCB_ENABLED |
10733 I40E_FLAG_VMDQ_ENABLED);
10735 /* Not enough queues for all TCs */
10736 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10737 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10738 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10739 I40E_FLAG_DCB_ENABLED);
10740 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10742 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10743 num_online_cpus());
10744 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10745 pf->hw.func_caps.num_tx_qp);
10747 queues_left -= pf->num_lan_qps;
10750 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10751 if (queues_left > 1) {
10752 queues_left -= 1; /* save 1 queue for FD */
10754 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10755 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10759 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10760 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10761 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10762 (queues_left / pf->num_vf_qps));
10763 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10766 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10767 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10768 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10769 (queues_left / pf->num_vmdq_qps));
10770 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10773 pf->queues_left = queues_left;
10774 dev_dbg(&pf->pdev->dev,
10775 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10776 pf->hw.func_caps.num_tx_qp,
10777 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10778 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10779 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10784 * i40e_setup_pf_filter_control - Setup PF static filter control
10785 * @pf: PF to be setup
10787 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10788 * settings. If PE/FCoE are enabled then it will also set the per PF
10789 * based filter sizes required for them. It also enables Flow director,
10790 * ethertype and macvlan type filter settings for the pf.
10792 * Returns 0 on success, negative on failure
10794 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10796 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10798 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10800 /* Flow Director is enabled */
10801 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10802 settings->enable_fdir = true;
10804 /* Ethtype and MACVLAN filters enabled for PF */
10805 settings->enable_ethtype = true;
10806 settings->enable_macvlan = true;
10808 if (i40e_set_filter_control(&pf->hw, settings))
10814 #define INFO_STRING_LEN 255
10815 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10816 static void i40e_print_features(struct i40e_pf *pf)
10818 struct i40e_hw *hw = &pf->hw;
10822 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10826 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10827 #ifdef CONFIG_PCI_IOV
10828 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10830 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10831 pf->hw.func_caps.num_vsis,
10832 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10833 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10834 i += snprintf(&buf[i], REMAIN(i), " RSS");
10835 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10836 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10837 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10838 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10839 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10841 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10842 i += snprintf(&buf[i], REMAIN(i), " DCB");
10843 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10844 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10845 if (pf->flags & I40E_FLAG_PTP)
10846 i += snprintf(&buf[i], REMAIN(i), " PTP");
10847 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10848 i += snprintf(&buf[i], REMAIN(i), " VEB");
10850 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10852 dev_info(&pf->pdev->dev, "%s\n", buf);
10854 WARN_ON(i > INFO_STRING_LEN);
10858 * i40e_get_platform_mac_addr - get platform-specific MAC address
10859 * @pdev: PCI device information struct
10860 * @pf: board private structure
10862 * Look up the MAC address for the device. First we'll try
10863 * eth_platform_get_mac_address, which will check Open Firmware, or arch
10864 * specific fallback. Otherwise, we'll default to the stored value in
10867 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10869 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10870 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
10874 * i40e_probe - Device initialization routine
10875 * @pdev: PCI device information struct
10876 * @ent: entry in i40e_pci_tbl
10878 * i40e_probe initializes a PF identified by a pci_dev structure.
10879 * The OS initialization, configuring of the PF private structure,
10880 * and a hardware reset occur.
10882 * Returns 0 on success, negative on failure
10884 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10886 struct i40e_aq_get_phy_abilities_resp abilities;
10887 struct i40e_pf *pf;
10888 struct i40e_hw *hw;
10889 static u16 pfs_found;
10897 err = pci_enable_device_mem(pdev);
10901 /* set up for high or low dma */
10902 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10904 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10906 dev_err(&pdev->dev,
10907 "DMA configuration failed: 0x%x\n", err);
10912 /* set up pci connections */
10913 err = pci_request_mem_regions(pdev, i40e_driver_name);
10915 dev_info(&pdev->dev,
10916 "pci_request_selected_regions failed %d\n", err);
10920 pci_enable_pcie_error_reporting(pdev);
10921 pci_set_master(pdev);
10923 /* Now that we have a PCI connection, we need to do the
10924 * low level device setup. This is primarily setting up
10925 * the Admin Queue structures and then querying for the
10926 * device's current profile information.
10928 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10935 set_bit(__I40E_DOWN, &pf->state);
10940 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10941 I40E_MAX_CSR_SPACE);
10943 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10944 if (!hw->hw_addr) {
10946 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10947 (unsigned int)pci_resource_start(pdev, 0),
10948 pf->ioremap_len, err);
10951 hw->vendor_id = pdev->vendor;
10952 hw->device_id = pdev->device;
10953 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10954 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10955 hw->subsystem_device_id = pdev->subsystem_device;
10956 hw->bus.device = PCI_SLOT(pdev->devfn);
10957 hw->bus.func = PCI_FUNC(pdev->devfn);
10958 hw->bus.bus_id = pdev->bus->number;
10959 pf->instance = pfs_found;
10961 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
10962 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
10964 /* set up the locks for the AQ, do this only once in probe
10965 * and destroy them only once in remove
10967 mutex_init(&hw->aq.asq_mutex);
10968 mutex_init(&hw->aq.arq_mutex);
10970 pf->msg_enable = netif_msg_init(debug,
10975 pf->hw.debug_mask = debug;
10977 /* do a special CORER for clearing PXE mode once at init */
10978 if (hw->revision_id == 0 &&
10979 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10980 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10985 i40e_clear_pxe_mode(hw);
10988 /* Reset here to make sure all is clean and to define PF 'n' */
10990 err = i40e_pf_reset(hw);
10992 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10997 hw->aq.num_arq_entries = I40E_AQ_LEN;
10998 hw->aq.num_asq_entries = I40E_AQ_LEN;
10999 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11000 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11001 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
11003 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
11005 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
11007 err = i40e_init_shared_code(hw);
11009 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
11014 /* set up a default setting for link flow control */
11015 pf->hw.fc.requested_mode = I40E_FC_NONE;
11017 err = i40e_init_adminq(hw);
11019 if (err == I40E_ERR_FIRMWARE_API_VERSION)
11020 dev_info(&pdev->dev,
11021 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
11023 dev_info(&pdev->dev,
11024 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
11029 /* provide nvm, fw, api versions */
11030 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
11031 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
11032 hw->aq.api_maj_ver, hw->aq.api_min_ver,
11033 i40e_nvm_version_str(hw));
11035 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
11036 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
11037 dev_info(&pdev->dev,
11038 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
11039 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
11040 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
11041 dev_info(&pdev->dev,
11042 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
11044 i40e_verify_eeprom(pf);
11046 /* Rev 0 hardware was never productized */
11047 if (hw->revision_id < 1)
11048 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
11050 i40e_clear_pxe_mode(hw);
11051 err = i40e_get_capabilities(pf);
11053 goto err_adminq_setup;
11055 err = i40e_sw_init(pf);
11057 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
11061 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
11062 hw->func_caps.num_rx_qp, 0, 0);
11064 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
11065 goto err_init_lan_hmc;
11068 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
11070 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
11072 goto err_configure_lan_hmc;
11075 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
11076 * Ignore error return codes because if it was already disabled via
11077 * hardware settings this will fail
11079 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
11080 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
11081 i40e_aq_stop_lldp(hw, true, NULL);
11084 /* allow a platform config to override the HW addr */
11085 i40e_get_platform_mac_addr(pdev, pf);
11087 if (!is_valid_ether_addr(hw->mac.addr)) {
11088 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
11092 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
11093 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
11094 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
11095 if (is_valid_ether_addr(hw->mac.port_addr))
11096 pf->flags |= I40E_FLAG_PORT_ID_VALID;
11098 pci_set_drvdata(pdev, pf);
11099 pci_save_state(pdev);
11100 #ifdef CONFIG_I40E_DCB
11101 err = i40e_init_pf_dcb(pf);
11103 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
11104 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
11105 /* Continue without DCB enabled */
11107 #endif /* CONFIG_I40E_DCB */
11109 /* set up periodic task facility */
11110 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11111 pf->service_timer_period = HZ;
11113 INIT_WORK(&pf->service_task, i40e_service_task);
11114 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11116 /* NVM bit on means WoL disabled for the port */
11117 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11118 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11119 pf->wol_en = false;
11122 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11124 /* set up the main switch operations */
11125 i40e_determine_queue_usage(pf);
11126 err = i40e_init_interrupt_scheme(pf);
11128 goto err_switch_setup;
11130 /* The number of VSIs reported by the FW is the minimum guaranteed
11131 * to us; HW supports far more and we share the remaining pool with
11132 * the other PFs. We allocate space for more than the guarantee with
11133 * the understanding that we might not get them all later.
11135 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11136 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11138 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11140 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11141 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11145 goto err_switch_setup;
11148 #ifdef CONFIG_PCI_IOV
11149 /* prep for VF support */
11150 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11151 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11152 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11153 if (pci_num_vf(pdev))
11154 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11157 err = i40e_setup_pf_switch(pf, false);
11159 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11163 /* Make sure flow control is set according to current settings */
11164 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11165 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11166 dev_dbg(&pf->pdev->dev,
11167 "Set fc with err %s aq_err %s on get_phy_cap\n",
11168 i40e_stat_str(hw, err),
11169 i40e_aq_str(hw, hw->aq.asq_last_status));
11170 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11171 dev_dbg(&pf->pdev->dev,
11172 "Set fc with err %s aq_err %s on set_phy_config\n",
11173 i40e_stat_str(hw, err),
11174 i40e_aq_str(hw, hw->aq.asq_last_status));
11175 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11176 dev_dbg(&pf->pdev->dev,
11177 "Set fc with err %s aq_err %s on get_link_info\n",
11178 i40e_stat_str(hw, err),
11179 i40e_aq_str(hw, hw->aq.asq_last_status));
11181 /* if FDIR VSI was set up, start it now */
11182 for (i = 0; i < pf->num_alloc_vsi; i++) {
11183 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11184 i40e_vsi_open(pf->vsi[i]);
11189 /* The driver only wants link up/down and module qualification
11190 * reports from firmware. Note the negative logic.
11192 err = i40e_aq_set_phy_int_mask(&pf->hw,
11193 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11194 I40E_AQ_EVENT_MEDIA_NA |
11195 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11197 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11198 i40e_stat_str(&pf->hw, err),
11199 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11201 /* Reconfigure hardware for allowing smaller MSS in the case
11202 * of TSO, so that we avoid the MDD being fired and causing
11203 * a reset in the case of small MSS+TSO.
11205 val = rd32(hw, I40E_REG_MSS);
11206 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11207 val &= ~I40E_REG_MSS_MIN_MASK;
11208 val |= I40E_64BYTE_MSS;
11209 wr32(hw, I40E_REG_MSS, val);
11212 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11214 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11216 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11217 i40e_stat_str(&pf->hw, err),
11218 i40e_aq_str(&pf->hw,
11219 pf->hw.aq.asq_last_status));
11221 /* The main driver is (mostly) up and happy. We need to set this state
11222 * before setting up the misc vector or we get a race and the vector
11223 * ends up disabled forever.
11225 clear_bit(__I40E_DOWN, &pf->state);
11227 /* In case of MSIX we are going to setup the misc vector right here
11228 * to handle admin queue events etc. In case of legacy and MSI
11229 * the misc functionality and queue processing is combined in
11230 * the same vector and that gets setup at open.
11232 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11233 err = i40e_setup_misc_vector(pf);
11235 dev_info(&pdev->dev,
11236 "setup of misc vector failed: %d\n", err);
11241 #ifdef CONFIG_PCI_IOV
11242 /* prep for VF support */
11243 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11244 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11245 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11246 /* disable link interrupts for VFs */
11247 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11248 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11249 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11252 if (pci_num_vf(pdev)) {
11253 dev_info(&pdev->dev,
11254 "Active VFs found, allocating resources.\n");
11255 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11257 dev_info(&pdev->dev,
11258 "Error %d allocating resources for existing VFs\n",
11262 #endif /* CONFIG_PCI_IOV */
11264 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11265 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11266 pf->num_iwarp_msix,
11267 I40E_IWARP_IRQ_PILE_ID);
11268 if (pf->iwarp_base_vector < 0) {
11269 dev_info(&pdev->dev,
11270 "failed to get tracking for %d vectors for IWARP err=%d\n",
11271 pf->num_iwarp_msix, pf->iwarp_base_vector);
11272 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11276 i40e_dbg_pf_init(pf);
11278 /* tell the firmware that we're starting */
11279 i40e_send_version(pf);
11281 /* since everything's happy, start the service_task timer */
11282 mod_timer(&pf->service_timer,
11283 round_jiffies(jiffies + pf->service_timer_period));
11285 /* add this PF to client device list and launch a client service task */
11286 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11287 err = i40e_lan_add_device(pf);
11289 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11293 #define PCI_SPEED_SIZE 8
11294 #define PCI_WIDTH_SIZE 8
11295 /* Devices on the IOSF bus do not have this information
11296 * and will report PCI Gen 1 x 1 by default so don't bother
11299 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11300 char speed[PCI_SPEED_SIZE] = "Unknown";
11301 char width[PCI_WIDTH_SIZE] = "Unknown";
11303 /* Get the negotiated link width and speed from PCI config
11306 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11309 i40e_set_pci_config_data(hw, link_status);
11311 switch (hw->bus.speed) {
11312 case i40e_bus_speed_8000:
11313 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11314 case i40e_bus_speed_5000:
11315 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11316 case i40e_bus_speed_2500:
11317 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11321 switch (hw->bus.width) {
11322 case i40e_bus_width_pcie_x8:
11323 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11324 case i40e_bus_width_pcie_x4:
11325 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11326 case i40e_bus_width_pcie_x2:
11327 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11328 case i40e_bus_width_pcie_x1:
11329 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11334 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11337 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11338 hw->bus.speed < i40e_bus_speed_8000) {
11339 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11340 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11344 /* get the requested speeds from the fw */
11345 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11347 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11348 i40e_stat_str(&pf->hw, err),
11349 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11350 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11352 /* get the supported phy types from the fw */
11353 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11355 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11356 i40e_stat_str(&pf->hw, err),
11357 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11359 /* Add a filter to drop all Flow control frames from any VSI from being
11360 * transmitted. By doing so we stop a malicious VF from sending out
11361 * PAUSE or PFC frames and potentially controlling traffic for other
11363 * The FW can still send Flow control frames if enabled.
11365 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11366 pf->main_vsi_seid);
11368 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11369 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11370 pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS;
11371 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
11372 pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER;
11373 /* print a string summarizing features */
11374 i40e_print_features(pf);
11378 /* Unwind what we've done if something failed in the setup */
11380 set_bit(__I40E_DOWN, &pf->state);
11381 i40e_clear_interrupt_scheme(pf);
11384 i40e_reset_interrupt_capability(pf);
11385 del_timer_sync(&pf->service_timer);
11387 err_configure_lan_hmc:
11388 (void)i40e_shutdown_lan_hmc(hw);
11390 kfree(pf->qp_pile);
11394 iounmap(hw->hw_addr);
11398 pci_disable_pcie_error_reporting(pdev);
11399 pci_release_mem_regions(pdev);
11402 pci_disable_device(pdev);
11407 * i40e_remove - Device removal routine
11408 * @pdev: PCI device information struct
11410 * i40e_remove is called by the PCI subsystem to alert the driver
11411 * that is should release a PCI device. This could be caused by a
11412 * Hot-Plug event, or because the driver is going to be removed from
11415 static void i40e_remove(struct pci_dev *pdev)
11417 struct i40e_pf *pf = pci_get_drvdata(pdev);
11418 struct i40e_hw *hw = &pf->hw;
11419 i40e_status ret_code;
11422 i40e_dbg_pf_exit(pf);
11426 /* Disable RSS in hw */
11427 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11428 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11430 /* no more scheduling of any task */
11431 set_bit(__I40E_SUSPENDED, &pf->state);
11432 set_bit(__I40E_DOWN, &pf->state);
11433 if (pf->service_timer.data)
11434 del_timer_sync(&pf->service_timer);
11435 if (pf->service_task.func)
11436 cancel_work_sync(&pf->service_task);
11438 /* Client close must be called explicitly here because the timer
11439 * has been stopped.
11441 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
11443 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11445 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11448 i40e_fdir_teardown(pf);
11450 /* If there is a switch structure or any orphans, remove them.
11451 * This will leave only the PF's VSI remaining.
11453 for (i = 0; i < I40E_MAX_VEB; i++) {
11457 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11458 pf->veb[i]->uplink_seid == 0)
11459 i40e_switch_branch_release(pf->veb[i]);
11462 /* Now we can shutdown the PF's VSI, just before we kill
11465 if (pf->vsi[pf->lan_vsi])
11466 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11468 /* remove attached clients */
11469 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11470 ret_code = i40e_lan_del_device(pf);
11472 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11476 /* shutdown and destroy the HMC */
11477 if (hw->hmc.hmc_obj) {
11478 ret_code = i40e_shutdown_lan_hmc(hw);
11480 dev_warn(&pdev->dev,
11481 "Failed to destroy the HMC resources: %d\n",
11485 /* shutdown the adminq */
11486 i40e_shutdown_adminq(hw);
11488 /* destroy the locks only once, here */
11489 mutex_destroy(&hw->aq.arq_mutex);
11490 mutex_destroy(&hw->aq.asq_mutex);
11492 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11493 i40e_clear_interrupt_scheme(pf);
11494 for (i = 0; i < pf->num_alloc_vsi; i++) {
11496 i40e_vsi_clear_rings(pf->vsi[i]);
11497 i40e_vsi_clear(pf->vsi[i]);
11502 for (i = 0; i < I40E_MAX_VEB; i++) {
11507 kfree(pf->qp_pile);
11510 iounmap(hw->hw_addr);
11512 pci_release_mem_regions(pdev);
11514 pci_disable_pcie_error_reporting(pdev);
11515 pci_disable_device(pdev);
11519 * i40e_pci_error_detected - warning that something funky happened in PCI land
11520 * @pdev: PCI device information struct
11522 * Called to warn that something happened and the error handling steps
11523 * are in progress. Allows the driver to quiesce things, be ready for
11526 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11527 enum pci_channel_state error)
11529 struct i40e_pf *pf = pci_get_drvdata(pdev);
11531 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11534 dev_info(&pdev->dev,
11535 "Cannot recover - error happened during device probe\n");
11536 return PCI_ERS_RESULT_DISCONNECT;
11539 /* shutdown all operations */
11540 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11542 i40e_prep_for_reset(pf, true);
11546 /* Request a slot reset */
11547 return PCI_ERS_RESULT_NEED_RESET;
11551 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11552 * @pdev: PCI device information struct
11554 * Called to find if the driver can work with the device now that
11555 * the pci slot has been reset. If a basic connection seems good
11556 * (registers are readable and have sane content) then return a
11557 * happy little PCI_ERS_RESULT_xxx.
11559 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11561 struct i40e_pf *pf = pci_get_drvdata(pdev);
11562 pci_ers_result_t result;
11566 dev_dbg(&pdev->dev, "%s\n", __func__);
11567 if (pci_enable_device_mem(pdev)) {
11568 dev_info(&pdev->dev,
11569 "Cannot re-enable PCI device after reset.\n");
11570 result = PCI_ERS_RESULT_DISCONNECT;
11572 pci_set_master(pdev);
11573 pci_restore_state(pdev);
11574 pci_save_state(pdev);
11575 pci_wake_from_d3(pdev, false);
11577 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11579 result = PCI_ERS_RESULT_RECOVERED;
11581 result = PCI_ERS_RESULT_DISCONNECT;
11584 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11586 dev_info(&pdev->dev,
11587 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11589 /* non-fatal, continue */
11596 * i40e_pci_error_resume - restart operations after PCI error recovery
11597 * @pdev: PCI device information struct
11599 * Called to allow the driver to bring things back up after PCI error
11600 * and/or reset recovery has finished.
11602 static void i40e_pci_error_resume(struct pci_dev *pdev)
11604 struct i40e_pf *pf = pci_get_drvdata(pdev);
11606 dev_dbg(&pdev->dev, "%s\n", __func__);
11607 if (test_bit(__I40E_SUSPENDED, &pf->state))
11611 i40e_handle_reset_warning(pf, true);
11616 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
11617 * using the mac_address_write admin q function
11618 * @pf: pointer to i40e_pf struct
11620 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
11622 struct i40e_hw *hw = &pf->hw;
11627 /* Get current MAC address in case it's an LAA */
11628 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
11629 ether_addr_copy(mac_addr,
11630 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
11632 dev_err(&pf->pdev->dev,
11633 "Failed to retrieve MAC address; using default\n");
11634 ether_addr_copy(mac_addr, hw->mac.addr);
11637 /* The FW expects the mac address write cmd to first be called with
11638 * one of these flags before calling it again with the multicast
11641 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
11643 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
11644 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
11646 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11648 dev_err(&pf->pdev->dev,
11649 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
11653 flags = I40E_AQC_MC_MAG_EN
11654 | I40E_AQC_WOL_PRESERVE_ON_PFR
11655 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
11656 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11658 dev_err(&pf->pdev->dev,
11659 "Failed to enable Multicast Magic Packet wake up\n");
11663 * i40e_shutdown - PCI callback for shutting down
11664 * @pdev: PCI device information struct
11666 static void i40e_shutdown(struct pci_dev *pdev)
11668 struct i40e_pf *pf = pci_get_drvdata(pdev);
11669 struct i40e_hw *hw = &pf->hw;
11671 set_bit(__I40E_SUSPENDED, &pf->state);
11672 set_bit(__I40E_DOWN, &pf->state);
11674 i40e_prep_for_reset(pf, true);
11677 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11678 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11680 del_timer_sync(&pf->service_timer);
11681 cancel_work_sync(&pf->service_task);
11682 i40e_fdir_teardown(pf);
11684 /* Client close must be called explicitly here because the timer
11685 * has been stopped.
11687 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
11689 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11690 i40e_enable_mc_magic_wake(pf);
11693 i40e_prep_for_reset(pf, true);
11696 wr32(hw, I40E_PFPM_APM,
11697 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11698 wr32(hw, I40E_PFPM_WUFC,
11699 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11701 i40e_clear_interrupt_scheme(pf);
11703 if (system_state == SYSTEM_POWER_OFF) {
11704 pci_wake_from_d3(pdev, pf->wol_en);
11705 pci_set_power_state(pdev, PCI_D3hot);
11711 * i40e_suspend - PCI callback for moving to D3
11712 * @pdev: PCI device information struct
11714 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11716 struct i40e_pf *pf = pci_get_drvdata(pdev);
11717 struct i40e_hw *hw = &pf->hw;
11720 set_bit(__I40E_SUSPENDED, &pf->state);
11721 set_bit(__I40E_DOWN, &pf->state);
11723 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11724 i40e_enable_mc_magic_wake(pf);
11727 i40e_prep_for_reset(pf, true);
11730 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11731 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11733 i40e_stop_misc_vector(pf);
11735 retval = pci_save_state(pdev);
11739 pci_wake_from_d3(pdev, pf->wol_en);
11740 pci_set_power_state(pdev, PCI_D3hot);
11746 * i40e_resume - PCI callback for waking up from D3
11747 * @pdev: PCI device information struct
11749 static int i40e_resume(struct pci_dev *pdev)
11751 struct i40e_pf *pf = pci_get_drvdata(pdev);
11754 pci_set_power_state(pdev, PCI_D0);
11755 pci_restore_state(pdev);
11756 /* pci_restore_state() clears dev->state_saves, so
11757 * call pci_save_state() again to restore it.
11759 pci_save_state(pdev);
11761 err = pci_enable_device_mem(pdev);
11763 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11766 pci_set_master(pdev);
11768 /* no wakeup events while running */
11769 pci_wake_from_d3(pdev, false);
11771 /* handling the reset will rebuild the device state */
11772 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11773 clear_bit(__I40E_DOWN, &pf->state);
11775 i40e_reset_and_rebuild(pf, false, true);
11783 static const struct pci_error_handlers i40e_err_handler = {
11784 .error_detected = i40e_pci_error_detected,
11785 .slot_reset = i40e_pci_error_slot_reset,
11786 .resume = i40e_pci_error_resume,
11789 static struct pci_driver i40e_driver = {
11790 .name = i40e_driver_name,
11791 .id_table = i40e_pci_tbl,
11792 .probe = i40e_probe,
11793 .remove = i40e_remove,
11795 .suspend = i40e_suspend,
11796 .resume = i40e_resume,
11798 .shutdown = i40e_shutdown,
11799 .err_handler = &i40e_err_handler,
11800 .sriov_configure = i40e_pci_sriov_configure,
11804 * i40e_init_module - Driver registration routine
11806 * i40e_init_module is the first routine called when the driver is
11807 * loaded. All it does is register with the PCI subsystem.
11809 static int __init i40e_init_module(void)
11811 pr_info("%s: %s - version %s\n", i40e_driver_name,
11812 i40e_driver_string, i40e_driver_version_str);
11813 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11815 /* we will see if single thread per module is enough for now,
11816 * it can't be any worse than using the system workqueue which
11817 * was already single threaded
11819 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11822 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11827 return pci_register_driver(&i40e_driver);
11829 module_init(i40e_init_module);
11832 * i40e_exit_module - Driver exit cleanup routine
11834 * i40e_exit_module is called just before the driver is removed
11837 static void __exit i40e_exit_module(void)
11839 pci_unregister_driver(&i40e_driver);
11840 destroy_workqueue(i40e_wq);
11843 module_exit(i40e_exit_module);