1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
32 #include <asm/idprom.h>
38 #include "i40e_diag.h"
39 #if IS_ENABLED(CONFIG_VXLAN)
40 #include <net/vxlan.h>
42 #if IS_ENABLED(CONFIG_GENEVE)
43 #include <net/geneve.h>
46 const char i40e_driver_name[] = "i40e";
47 static const char i40e_driver_string[] =
48 "Intel(R) Ethernet Connection XL710 Network Driver";
52 #define DRV_VERSION_MAJOR 1
53 #define DRV_VERSION_MINOR 4
54 #define DRV_VERSION_BUILD 8
55 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
56 __stringify(DRV_VERSION_MINOR) "." \
57 __stringify(DRV_VERSION_BUILD) DRV_KERN
58 const char i40e_driver_version_str[] = DRV_VERSION;
59 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
61 /* a bit of forward declarations */
62 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
63 static void i40e_handle_reset_warning(struct i40e_pf *pf);
64 static int i40e_add_vsi(struct i40e_vsi *vsi);
65 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
66 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
67 static int i40e_setup_misc_vector(struct i40e_pf *pf);
68 static void i40e_determine_queue_usage(struct i40e_pf *pf);
69 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
70 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
71 u16 rss_table_size, u16 rss_size);
72 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
73 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
75 /* i40e_pci_tbl - PCI Device ID Table
77 * Last entry must be all 0s
79 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
80 * Class, Class Mask, private data (not used) }
82 static const struct pci_device_id i40e_pci_tbl[] = {
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
98 /* required last entry */
101 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
103 #define I40E_MAX_VF_COUNT 128
104 static int debug = -1;
105 module_param(debug, int, 0);
106 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
108 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
109 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
110 MODULE_LICENSE("GPL");
111 MODULE_VERSION(DRV_VERSION);
114 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to fill out
117 * @size: size of memory requested
118 * @alignment: what to align the allocation to
120 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
121 u64 size, u32 alignment)
123 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
125 mem->size = ALIGN(size, alignment);
126 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
127 &mem->pa, GFP_KERNEL);
135 * i40e_free_dma_mem_d - OS specific memory free for shared code
136 * @hw: pointer to the HW structure
137 * @mem: ptr to mem struct to free
139 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
141 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
143 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
152 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
153 * @hw: pointer to the HW structure
154 * @mem: ptr to mem struct to fill out
155 * @size: size of memory requested
157 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
161 mem->va = kzalloc(size, GFP_KERNEL);
170 * i40e_free_virt_mem_d - OS specific memory free for shared code
171 * @hw: pointer to the HW structure
172 * @mem: ptr to mem struct to free
174 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
176 /* it's ok to kfree a NULL pointer */
185 * i40e_get_lump - find a lump of free generic resource
186 * @pf: board private structure
187 * @pile: the pile of resource to search
188 * @needed: the number of items needed
189 * @id: an owner id to stick on the items assigned
191 * Returns the base item index of the lump, or negative for error
193 * The search_hint trick and lack of advanced fit-finding only work
194 * because we're highly likely to have all the same size lump requests.
195 * Linear search time and any fragmentation should be minimal.
197 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
203 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
204 dev_info(&pf->pdev->dev,
205 "param err: pile=%p needed=%d id=0x%04x\n",
210 /* start the linear search with an imperfect hint */
211 i = pile->search_hint;
212 while (i < pile->num_entries) {
213 /* skip already allocated entries */
214 if (pile->list[i] & I40E_PILE_VALID_BIT) {
219 /* do we have enough in this lump? */
220 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
221 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
226 /* there was enough, so assign it to the requestor */
227 for (j = 0; j < needed; j++)
228 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
230 pile->search_hint = i + j;
234 /* not enough, so skip over it and continue looking */
242 * i40e_put_lump - return a lump of generic resource
243 * @pile: the pile of resource to search
244 * @index: the base item index
245 * @id: the owner id of the items assigned
247 * Returns the count of items in the lump
249 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
251 int valid_id = (id | I40E_PILE_VALID_BIT);
255 if (!pile || index >= pile->num_entries)
259 i < pile->num_entries && pile->list[i] == valid_id;
265 if (count && index < pile->search_hint)
266 pile->search_hint = index;
272 * i40e_find_vsi_from_id - searches for the vsi with the given id
273 * @pf - the pf structure to search for the vsi
274 * @id - id of the vsi it is searching for
276 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
280 for (i = 0; i < pf->num_alloc_vsi; i++)
281 if (pf->vsi[i] && (pf->vsi[i]->id == id))
288 * i40e_service_event_schedule - Schedule the service task to wake up
289 * @pf: board private structure
291 * If not already scheduled, this puts the task into the work queue
293 static void i40e_service_event_schedule(struct i40e_pf *pf)
295 if (!test_bit(__I40E_DOWN, &pf->state) &&
296 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
297 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
298 schedule_work(&pf->service_task);
302 * i40e_tx_timeout - Respond to a Tx Hang
303 * @netdev: network interface device structure
305 * If any port has noticed a Tx timeout, it is likely that the whole
306 * device is munged, not just the one netdev port, so go for the full
310 void i40e_tx_timeout(struct net_device *netdev)
312 static void i40e_tx_timeout(struct net_device *netdev)
315 struct i40e_netdev_priv *np = netdev_priv(netdev);
316 struct i40e_vsi *vsi = np->vsi;
317 struct i40e_pf *pf = vsi->back;
318 struct i40e_ring *tx_ring = NULL;
319 unsigned int i, hung_queue = 0;
322 pf->tx_timeout_count++;
324 /* find the stopped queue the same way the stack does */
325 for (i = 0; i < netdev->num_tx_queues; i++) {
326 struct netdev_queue *q;
327 unsigned long trans_start;
329 q = netdev_get_tx_queue(netdev, i);
330 trans_start = q->trans_start ? : netdev->trans_start;
331 if (netif_xmit_stopped(q) &&
333 (trans_start + netdev->watchdog_timeo))) {
339 if (i == netdev->num_tx_queues) {
340 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
342 /* now that we have an index, find the tx_ring struct */
343 for (i = 0; i < vsi->num_queue_pairs; i++) {
344 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
346 vsi->tx_rings[i]->queue_index) {
347 tx_ring = vsi->tx_rings[i];
354 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
355 pf->tx_timeout_recovery_level = 1; /* reset after some time */
356 else if (time_before(jiffies,
357 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
358 return; /* don't do any new action before the next timeout */
361 head = i40e_get_head(tx_ring);
362 /* Read interrupt register */
363 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
365 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
366 tx_ring->vsi->base_vector - 1));
368 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
370 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
371 vsi->seid, hung_queue, tx_ring->next_to_clean,
372 head, tx_ring->next_to_use,
373 readl(tx_ring->tail), val);
376 pf->tx_timeout_last_recovery = jiffies;
377 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
378 pf->tx_timeout_recovery_level, hung_queue);
380 switch (pf->tx_timeout_recovery_level) {
382 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
385 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
388 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
391 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
395 i40e_service_event_schedule(pf);
396 pf->tx_timeout_recovery_level++;
400 * i40e_release_rx_desc - Store the new tail and head values
401 * @rx_ring: ring to bump
402 * @val: new head index
404 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
406 rx_ring->next_to_use = val;
408 /* Force memory writes to complete before letting h/w
409 * know there are new descriptors to fetch. (Only
410 * applicable for weak-ordered memory model archs,
414 writel(val, rx_ring->tail);
418 * i40e_get_vsi_stats_struct - Get System Network Statistics
419 * @vsi: the VSI we care about
421 * Returns the address of the device statistics structure.
422 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
426 return &vsi->net_stats;
430 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
431 * @netdev: network interface device structure
433 * Returns the address of the device statistics structure.
434 * The statistics are actually updated from the service task.
437 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
438 struct net_device *netdev,
439 struct rtnl_link_stats64 *stats)
441 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
442 struct net_device *netdev,
443 struct rtnl_link_stats64 *stats)
446 struct i40e_netdev_priv *np = netdev_priv(netdev);
447 struct i40e_ring *tx_ring, *rx_ring;
448 struct i40e_vsi *vsi = np->vsi;
449 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
452 if (test_bit(__I40E_DOWN, &vsi->state))
459 for (i = 0; i < vsi->num_queue_pairs; i++) {
463 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
468 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
469 packets = tx_ring->stats.packets;
470 bytes = tx_ring->stats.bytes;
471 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
473 stats->tx_packets += packets;
474 stats->tx_bytes += bytes;
475 rx_ring = &tx_ring[1];
478 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
479 packets = rx_ring->stats.packets;
480 bytes = rx_ring->stats.bytes;
481 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
483 stats->rx_packets += packets;
484 stats->rx_bytes += bytes;
488 /* following stats updated by i40e_watchdog_subtask() */
489 stats->multicast = vsi_stats->multicast;
490 stats->tx_errors = vsi_stats->tx_errors;
491 stats->tx_dropped = vsi_stats->tx_dropped;
492 stats->rx_errors = vsi_stats->rx_errors;
493 stats->rx_dropped = vsi_stats->rx_dropped;
494 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
495 stats->rx_length_errors = vsi_stats->rx_length_errors;
501 * i40e_vsi_reset_stats - Resets all stats of the given vsi
502 * @vsi: the VSI to have its stats reset
504 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
506 struct rtnl_link_stats64 *ns;
512 ns = i40e_get_vsi_stats_struct(vsi);
513 memset(ns, 0, sizeof(*ns));
514 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
515 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
516 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
517 if (vsi->rx_rings && vsi->rx_rings[0]) {
518 for (i = 0; i < vsi->num_queue_pairs; i++) {
519 memset(&vsi->rx_rings[i]->stats, 0,
520 sizeof(vsi->rx_rings[i]->stats));
521 memset(&vsi->rx_rings[i]->rx_stats, 0,
522 sizeof(vsi->rx_rings[i]->rx_stats));
523 memset(&vsi->tx_rings[i]->stats, 0,
524 sizeof(vsi->tx_rings[i]->stats));
525 memset(&vsi->tx_rings[i]->tx_stats, 0,
526 sizeof(vsi->tx_rings[i]->tx_stats));
529 vsi->stat_offsets_loaded = false;
533 * i40e_pf_reset_stats - Reset all of the stats for the given PF
534 * @pf: the PF to be reset
536 void i40e_pf_reset_stats(struct i40e_pf *pf)
540 memset(&pf->stats, 0, sizeof(pf->stats));
541 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
542 pf->stat_offsets_loaded = false;
544 for (i = 0; i < I40E_MAX_VEB; i++) {
546 memset(&pf->veb[i]->stats, 0,
547 sizeof(pf->veb[i]->stats));
548 memset(&pf->veb[i]->stats_offsets, 0,
549 sizeof(pf->veb[i]->stats_offsets));
550 pf->veb[i]->stat_offsets_loaded = false;
556 * i40e_stat_update48 - read and update a 48 bit stat from the chip
557 * @hw: ptr to the hardware info
558 * @hireg: the high 32 bit reg to read
559 * @loreg: the low 32 bit reg to read
560 * @offset_loaded: has the initial offset been loaded yet
561 * @offset: ptr to current offset value
562 * @stat: ptr to the stat
564 * Since the device stats are not reset at PFReset, they likely will not
565 * be zeroed when the driver starts. We'll save the first values read
566 * and use them as offsets to be subtracted from the raw values in order
567 * to report stats that count from zero. In the process, we also manage
568 * the potential roll-over.
570 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
571 bool offset_loaded, u64 *offset, u64 *stat)
575 if (hw->device_id == I40E_DEV_ID_QEMU) {
576 new_data = rd32(hw, loreg);
577 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
579 new_data = rd64(hw, loreg);
583 if (likely(new_data >= *offset))
584 *stat = new_data - *offset;
586 *stat = (new_data + BIT_ULL(48)) - *offset;
587 *stat &= 0xFFFFFFFFFFFFULL;
591 * i40e_stat_update32 - read and update a 32 bit stat from the chip
592 * @hw: ptr to the hardware info
593 * @reg: the hw reg to read
594 * @offset_loaded: has the initial offset been loaded yet
595 * @offset: ptr to current offset value
596 * @stat: ptr to the stat
598 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
599 bool offset_loaded, u64 *offset, u64 *stat)
603 new_data = rd32(hw, reg);
606 if (likely(new_data >= *offset))
607 *stat = (u32)(new_data - *offset);
609 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
613 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
614 * @vsi: the VSI to be updated
616 void i40e_update_eth_stats(struct i40e_vsi *vsi)
618 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
619 struct i40e_pf *pf = vsi->back;
620 struct i40e_hw *hw = &pf->hw;
621 struct i40e_eth_stats *oes;
622 struct i40e_eth_stats *es; /* device's eth stats */
624 es = &vsi->eth_stats;
625 oes = &vsi->eth_stats_offsets;
627 /* Gather up the stats that the hw collects */
628 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
629 vsi->stat_offsets_loaded,
630 &oes->tx_errors, &es->tx_errors);
631 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_discards, &es->rx_discards);
634 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
635 vsi->stat_offsets_loaded,
636 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
637 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_errors, &es->tx_errors);
641 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
642 I40E_GLV_GORCL(stat_idx),
643 vsi->stat_offsets_loaded,
644 &oes->rx_bytes, &es->rx_bytes);
645 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
646 I40E_GLV_UPRCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->rx_unicast, &es->rx_unicast);
649 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
650 I40E_GLV_MPRCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->rx_multicast, &es->rx_multicast);
653 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
654 I40E_GLV_BPRCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->rx_broadcast, &es->rx_broadcast);
658 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
659 I40E_GLV_GOTCL(stat_idx),
660 vsi->stat_offsets_loaded,
661 &oes->tx_bytes, &es->tx_bytes);
662 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
663 I40E_GLV_UPTCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->tx_unicast, &es->tx_unicast);
666 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
667 I40E_GLV_MPTCL(stat_idx),
668 vsi->stat_offsets_loaded,
669 &oes->tx_multicast, &es->tx_multicast);
670 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
671 I40E_GLV_BPTCL(stat_idx),
672 vsi->stat_offsets_loaded,
673 &oes->tx_broadcast, &es->tx_broadcast);
674 vsi->stat_offsets_loaded = true;
678 * i40e_update_veb_stats - Update Switch component statistics
679 * @veb: the VEB being updated
681 static void i40e_update_veb_stats(struct i40e_veb *veb)
683 struct i40e_pf *pf = veb->pf;
684 struct i40e_hw *hw = &pf->hw;
685 struct i40e_eth_stats *oes;
686 struct i40e_eth_stats *es; /* device's eth stats */
687 struct i40e_veb_tc_stats *veb_oes;
688 struct i40e_veb_tc_stats *veb_es;
691 idx = veb->stats_idx;
693 oes = &veb->stats_offsets;
694 veb_es = &veb->tc_stats;
695 veb_oes = &veb->tc_stats_offsets;
697 /* Gather up the stats that the hw collects */
698 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_discards, &es->tx_discards);
701 if (hw->revision_id > 0)
702 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_unknown_protocol,
705 &es->rx_unknown_protocol);
706 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->rx_bytes, &es->rx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->rx_unicast, &es->rx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->rx_multicast, &es->rx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->rx_broadcast, &es->rx_broadcast);
719 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
720 veb->stat_offsets_loaded,
721 &oes->tx_bytes, &es->tx_bytes);
722 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
723 veb->stat_offsets_loaded,
724 &oes->tx_unicast, &es->tx_unicast);
725 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
726 veb->stat_offsets_loaded,
727 &oes->tx_multicast, &es->tx_multicast);
728 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
729 veb->stat_offsets_loaded,
730 &oes->tx_broadcast, &es->tx_broadcast);
731 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
732 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
733 I40E_GLVEBTC_RPCL(i, idx),
734 veb->stat_offsets_loaded,
735 &veb_oes->tc_rx_packets[i],
736 &veb_es->tc_rx_packets[i]);
737 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
738 I40E_GLVEBTC_RBCL(i, idx),
739 veb->stat_offsets_loaded,
740 &veb_oes->tc_rx_bytes[i],
741 &veb_es->tc_rx_bytes[i]);
742 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
743 I40E_GLVEBTC_TPCL(i, idx),
744 veb->stat_offsets_loaded,
745 &veb_oes->tc_tx_packets[i],
746 &veb_es->tc_tx_packets[i]);
747 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
748 I40E_GLVEBTC_TBCL(i, idx),
749 veb->stat_offsets_loaded,
750 &veb_oes->tc_tx_bytes[i],
751 &veb_es->tc_tx_bytes[i]);
753 veb->stat_offsets_loaded = true;
758 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
759 * @vsi: the VSI that is capable of doing FCoE
761 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
763 struct i40e_pf *pf = vsi->back;
764 struct i40e_hw *hw = &pf->hw;
765 struct i40e_fcoe_stats *ofs;
766 struct i40e_fcoe_stats *fs; /* device's eth stats */
769 if (vsi->type != I40E_VSI_FCOE)
772 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
773 fs = &vsi->fcoe_stats;
774 ofs = &vsi->fcoe_stats_offsets;
776 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
777 vsi->fcoe_stat_offsets_loaded,
778 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
779 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
780 vsi->fcoe_stat_offsets_loaded,
781 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
782 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
783 vsi->fcoe_stat_offsets_loaded,
784 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
785 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
786 vsi->fcoe_stat_offsets_loaded,
787 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
788 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
789 vsi->fcoe_stat_offsets_loaded,
790 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
791 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
792 vsi->fcoe_stat_offsets_loaded,
793 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
794 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
795 vsi->fcoe_stat_offsets_loaded,
796 &ofs->fcoe_last_error, &fs->fcoe_last_error);
797 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
798 vsi->fcoe_stat_offsets_loaded,
799 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
801 vsi->fcoe_stat_offsets_loaded = true;
806 * i40e_update_vsi_stats - Update the vsi statistics counters.
807 * @vsi: the VSI to be updated
809 * There are a few instances where we store the same stat in a
810 * couple of different structs. This is partly because we have
811 * the netdev stats that need to be filled out, which is slightly
812 * different from the "eth_stats" defined by the chip and used in
813 * VF communications. We sort it out here.
815 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
817 struct i40e_pf *pf = vsi->back;
818 struct rtnl_link_stats64 *ons;
819 struct rtnl_link_stats64 *ns; /* netdev stats */
820 struct i40e_eth_stats *oes;
821 struct i40e_eth_stats *es; /* device's eth stats */
822 u32 tx_restart, tx_busy;
833 if (test_bit(__I40E_DOWN, &vsi->state) ||
834 test_bit(__I40E_CONFIG_BUSY, &pf->state))
837 ns = i40e_get_vsi_stats_struct(vsi);
838 ons = &vsi->net_stats_offsets;
839 es = &vsi->eth_stats;
840 oes = &vsi->eth_stats_offsets;
842 /* Gather up the netdev and vsi stats that the driver collects
843 * on the fly during packet processing
847 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
851 for (q = 0; q < vsi->num_queue_pairs; q++) {
853 p = ACCESS_ONCE(vsi->tx_rings[q]);
856 start = u64_stats_fetch_begin_irq(&p->syncp);
857 packets = p->stats.packets;
858 bytes = p->stats.bytes;
859 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
862 tx_restart += p->tx_stats.restart_queue;
863 tx_busy += p->tx_stats.tx_busy;
864 tx_linearize += p->tx_stats.tx_linearize;
865 tx_force_wb += p->tx_stats.tx_force_wb;
867 /* Rx queue is part of the same block as Tx queue */
870 start = u64_stats_fetch_begin_irq(&p->syncp);
871 packets = p->stats.packets;
872 bytes = p->stats.bytes;
873 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
876 rx_buf += p->rx_stats.alloc_buff_failed;
877 rx_page += p->rx_stats.alloc_page_failed;
880 vsi->tx_restart = tx_restart;
881 vsi->tx_busy = tx_busy;
882 vsi->tx_linearize = tx_linearize;
883 vsi->tx_force_wb = tx_force_wb;
884 vsi->rx_page_failed = rx_page;
885 vsi->rx_buf_failed = rx_buf;
887 ns->rx_packets = rx_p;
889 ns->tx_packets = tx_p;
892 /* update netdev stats from eth stats */
893 i40e_update_eth_stats(vsi);
894 ons->tx_errors = oes->tx_errors;
895 ns->tx_errors = es->tx_errors;
896 ons->multicast = oes->rx_multicast;
897 ns->multicast = es->rx_multicast;
898 ons->rx_dropped = oes->rx_discards;
899 ns->rx_dropped = es->rx_discards;
900 ons->tx_dropped = oes->tx_discards;
901 ns->tx_dropped = es->tx_discards;
903 /* pull in a couple PF stats if this is the main vsi */
904 if (vsi == pf->vsi[pf->lan_vsi]) {
905 ns->rx_crc_errors = pf->stats.crc_errors;
906 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
907 ns->rx_length_errors = pf->stats.rx_length_errors;
912 * i40e_update_pf_stats - Update the PF statistics counters.
913 * @pf: the PF to be updated
915 static void i40e_update_pf_stats(struct i40e_pf *pf)
917 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
918 struct i40e_hw_port_stats *nsd = &pf->stats;
919 struct i40e_hw *hw = &pf->hw;
923 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
924 I40E_GLPRT_GORCL(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
927 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
928 I40E_GLPRT_GOTCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
931 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.rx_discards,
934 &nsd->eth.rx_discards);
935 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
936 I40E_GLPRT_UPRCL(hw->port),
937 pf->stat_offsets_loaded,
938 &osd->eth.rx_unicast,
939 &nsd->eth.rx_unicast);
940 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
941 I40E_GLPRT_MPRCL(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->eth.rx_multicast,
944 &nsd->eth.rx_multicast);
945 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
946 I40E_GLPRT_BPRCL(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->eth.rx_broadcast,
949 &nsd->eth.rx_broadcast);
950 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
951 I40E_GLPRT_UPTCL(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->eth.tx_unicast,
954 &nsd->eth.tx_unicast);
955 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
956 I40E_GLPRT_MPTCL(hw->port),
957 pf->stat_offsets_loaded,
958 &osd->eth.tx_multicast,
959 &nsd->eth.tx_multicast);
960 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
961 I40E_GLPRT_BPTCL(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->eth.tx_broadcast,
964 &nsd->eth.tx_broadcast);
966 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->tx_dropped_link_down,
969 &nsd->tx_dropped_link_down);
971 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->crc_errors, &nsd->crc_errors);
975 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->illegal_bytes, &nsd->illegal_bytes);
979 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->mac_local_faults,
982 &nsd->mac_local_faults);
983 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->mac_remote_faults,
986 &nsd->mac_remote_faults);
988 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->rx_length_errors,
991 &nsd->rx_length_errors);
993 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
994 pf->stat_offsets_loaded,
995 &osd->link_xon_rx, &nsd->link_xon_rx);
996 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
997 pf->stat_offsets_loaded,
998 &osd->link_xon_tx, &nsd->link_xon_tx);
999 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1002 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1006 for (i = 0; i < 8; i++) {
1007 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1008 pf->stat_offsets_loaded,
1009 &osd->priority_xoff_rx[i],
1010 &nsd->priority_xoff_rx[i]);
1011 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xon_rx[i],
1014 &nsd->priority_xon_rx[i]);
1015 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1016 pf->stat_offsets_loaded,
1017 &osd->priority_xon_tx[i],
1018 &nsd->priority_xon_tx[i]);
1019 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1020 pf->stat_offsets_loaded,
1021 &osd->priority_xoff_tx[i],
1022 &nsd->priority_xoff_tx[i]);
1023 i40e_stat_update32(hw,
1024 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1025 pf->stat_offsets_loaded,
1026 &osd->priority_xon_2_xoff[i],
1027 &nsd->priority_xon_2_xoff[i]);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1031 I40E_GLPRT_PRC64L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_64, &nsd->rx_size_64);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1035 I40E_GLPRT_PRC127L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_127, &nsd->rx_size_127);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1039 I40E_GLPRT_PRC255L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_255, &nsd->rx_size_255);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1043 I40E_GLPRT_PRC511L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_511, &nsd->rx_size_511);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1047 I40E_GLPRT_PRC1023L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_1023, &nsd->rx_size_1023);
1050 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1051 I40E_GLPRT_PRC1522L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->rx_size_1522, &nsd->rx_size_1522);
1054 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1055 I40E_GLPRT_PRC9522L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_size_big, &nsd->rx_size_big);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1060 I40E_GLPRT_PTC64L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_64, &nsd->tx_size_64);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1064 I40E_GLPRT_PTC127L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_127, &nsd->tx_size_127);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1068 I40E_GLPRT_PTC255L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_255, &nsd->tx_size_255);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1072 I40E_GLPRT_PTC511L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_511, &nsd->tx_size_511);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1076 I40E_GLPRT_PTC1023L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_1023, &nsd->tx_size_1023);
1079 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1080 I40E_GLPRT_PTC1522L(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->tx_size_1522, &nsd->tx_size_1522);
1083 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1084 I40E_GLPRT_PTC9522L(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->tx_size_big, &nsd->tx_size_big);
1088 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->rx_undersize, &nsd->rx_undersize);
1091 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_fragments, &nsd->rx_fragments);
1094 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_oversize, &nsd->rx_oversize);
1097 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_jabber, &nsd->rx_jabber);
1102 i40e_stat_update32(hw,
1103 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1104 pf->stat_offsets_loaded,
1105 &osd->fd_atr_match, &nsd->fd_atr_match);
1106 i40e_stat_update32(hw,
1107 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1108 pf->stat_offsets_loaded,
1109 &osd->fd_sb_match, &nsd->fd_sb_match);
1110 i40e_stat_update32(hw,
1111 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1112 pf->stat_offsets_loaded,
1113 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1115 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1116 nsd->tx_lpi_status =
1117 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1118 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1119 nsd->rx_lpi_status =
1120 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1121 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1122 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1123 pf->stat_offsets_loaded,
1124 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1125 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1126 pf->stat_offsets_loaded,
1127 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1129 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1130 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1131 nsd->fd_sb_status = true;
1133 nsd->fd_sb_status = false;
1135 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1136 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1137 nsd->fd_atr_status = true;
1139 nsd->fd_atr_status = false;
1141 pf->stat_offsets_loaded = true;
1145 * i40e_update_stats - Update the various statistics counters.
1146 * @vsi: the VSI to be updated
1148 * Update the various stats for this VSI and its related entities.
1150 void i40e_update_stats(struct i40e_vsi *vsi)
1152 struct i40e_pf *pf = vsi->back;
1154 if (vsi == pf->vsi[pf->lan_vsi])
1155 i40e_update_pf_stats(pf);
1157 i40e_update_vsi_stats(vsi);
1159 i40e_update_fcoe_stats(vsi);
1164 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address
1168 * @is_vf: make sure its a VF filter, else doesn't matter
1169 * @is_netdev: make sure its a netdev filter, else doesn't matter
1171 * Returns ptr to the filter object or NULL
1173 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1174 u8 *macaddr, s16 vlan,
1175 bool is_vf, bool is_netdev)
1177 struct i40e_mac_filter *f;
1179 if (!vsi || !macaddr)
1182 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1183 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1184 (vlan == f->vlan) &&
1185 (!is_vf || f->is_vf) &&
1186 (!is_netdev || f->is_netdev))
1193 * i40e_find_mac - Find a mac addr in the macvlan filters list
1194 * @vsi: the VSI to be searched
1195 * @macaddr: the MAC address we are searching for
1196 * @is_vf: make sure its a VF filter, else doesn't matter
1197 * @is_netdev: make sure its a netdev filter, else doesn't matter
1199 * Returns the first filter with the provided MAC address or NULL if
1200 * MAC address was not found
1202 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1203 bool is_vf, bool is_netdev)
1205 struct i40e_mac_filter *f;
1207 if (!vsi || !macaddr)
1210 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1211 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1212 (!is_vf || f->is_vf) &&
1213 (!is_netdev || f->is_netdev))
1220 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1221 * @vsi: the VSI to be searched
1223 * Returns true if VSI is in vlan mode or false otherwise
1225 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1227 struct i40e_mac_filter *f;
1229 /* Only -1 for all the filters denotes not in vlan mode
1230 * so we have to go through all the list in order to make sure
1232 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1233 if (f->vlan >= 0 || vsi->info.pvid)
1241 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1242 * @vsi: the VSI to be searched
1243 * @macaddr: the mac address to be filtered
1244 * @is_vf: true if it is a VF
1245 * @is_netdev: true if it is a netdev
1247 * Goes through all the macvlan filters and adds a
1248 * macvlan filter for each unique vlan that already exists
1250 * Returns first filter found on success, else NULL
1252 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1253 bool is_vf, bool is_netdev)
1255 struct i40e_mac_filter *f;
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1259 f->vlan = le16_to_cpu(vsi->info.pvid);
1260 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1261 is_vf, is_netdev)) {
1262 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1268 return list_first_entry_or_null(&vsi->mac_filter_list,
1269 struct i40e_mac_filter, list);
1273 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1274 * @vsi: the VSI to be searched
1275 * @macaddr: the mac address to be removed
1276 * @is_vf: true if it is a VF
1277 * @is_netdev: true if it is a netdev
1279 * Removes a given MAC address from a VSI, regardless of VLAN
1281 * Returns 0 for success, or error
1283 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1284 bool is_vf, bool is_netdev)
1286 struct i40e_mac_filter *f = NULL;
1289 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1290 "Missing mac_filter_list_lock\n");
1291 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1292 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1293 (is_vf == f->is_vf) &&
1294 (is_netdev == f->is_netdev)) {
1301 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1302 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1309 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1310 * @vsi: the PF Main VSI - inappropriate for any other VSI
1311 * @macaddr: the MAC address
1313 * Some older firmware configurations set up a default promiscuous VLAN
1314 * filter that needs to be removed.
1316 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1318 struct i40e_aqc_remove_macvlan_element_data element;
1319 struct i40e_pf *pf = vsi->back;
1322 /* Only appropriate for the PF main VSI */
1323 if (vsi->type != I40E_VSI_MAIN)
1326 memset(&element, 0, sizeof(element));
1327 ether_addr_copy(element.mac_addr, macaddr);
1328 element.vlan_tag = 0;
1329 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1330 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1331 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1339 * i40e_add_filter - Add a mac/vlan filter to the VSI
1340 * @vsi: the VSI to be searched
1341 * @macaddr: the MAC address
1343 * @is_vf: make sure its a VF filter, else doesn't matter
1344 * @is_netdev: make sure its a netdev filter, else doesn't matter
1346 * Returns ptr to the filter object or NULL when no memory available.
1348 * NOTE: This function is expected to be called with mac_filter_list_lock
1351 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1352 u8 *macaddr, s16 vlan,
1353 bool is_vf, bool is_netdev)
1355 struct i40e_mac_filter *f;
1357 if (!vsi || !macaddr)
1360 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1362 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1364 goto add_filter_out;
1366 ether_addr_copy(f->macaddr, macaddr);
1370 INIT_LIST_HEAD(&f->list);
1371 list_add(&f->list, &vsi->mac_filter_list);
1374 /* increment counter and add a new flag if needed */
1380 } else if (is_netdev) {
1381 if (!f->is_netdev) {
1382 f->is_netdev = true;
1389 /* changed tells sync_filters_subtask to
1390 * push the filter down to the firmware
1393 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1394 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1402 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1403 * @vsi: the VSI to be searched
1404 * @macaddr: the MAC address
1406 * @is_vf: make sure it's a VF filter, else doesn't matter
1407 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1409 * NOTE: This function is expected to be called with mac_filter_list_lock
1412 void i40e_del_filter(struct i40e_vsi *vsi,
1413 u8 *macaddr, s16 vlan,
1414 bool is_vf, bool is_netdev)
1416 struct i40e_mac_filter *f;
1418 if (!vsi || !macaddr)
1421 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1422 if (!f || f->counter == 0)
1430 } else if (is_netdev) {
1432 f->is_netdev = false;
1436 /* make sure we don't remove a filter in use by VF or netdev */
1439 min_f += (f->is_vf ? 1 : 0);
1440 min_f += (f->is_netdev ? 1 : 0);
1442 if (f->counter > min_f)
1446 /* counter == 0 tells sync_filters_subtask to
1447 * remove the filter from the firmware's list
1449 if (f->counter == 0) {
1451 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1452 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1457 * i40e_set_mac - NDO callback to set mac address
1458 * @netdev: network interface device structure
1459 * @p: pointer to an address structure
1461 * Returns 0 on success, negative on failure
1464 int i40e_set_mac(struct net_device *netdev, void *p)
1466 static int i40e_set_mac(struct net_device *netdev, void *p)
1469 struct i40e_netdev_priv *np = netdev_priv(netdev);
1470 struct i40e_vsi *vsi = np->vsi;
1471 struct i40e_pf *pf = vsi->back;
1472 struct i40e_hw *hw = &pf->hw;
1473 struct sockaddr *addr = p;
1474 struct i40e_mac_filter *f;
1476 if (!is_valid_ether_addr(addr->sa_data))
1477 return -EADDRNOTAVAIL;
1479 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1480 netdev_info(netdev, "already using mac address %pM\n",
1485 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1486 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1487 return -EADDRNOTAVAIL;
1489 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1490 netdev_info(netdev, "returning to hw mac address %pM\n",
1493 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1495 if (vsi->type == I40E_VSI_MAIN) {
1498 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1499 I40E_AQC_WRITE_TYPE_LAA_WOL,
1500 addr->sa_data, NULL);
1503 "Addr change for Main VSI failed: %d\n",
1505 return -EADDRNOTAVAIL;
1509 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1510 struct i40e_aqc_remove_macvlan_element_data element;
1512 memset(&element, 0, sizeof(element));
1513 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1514 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1515 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1517 spin_lock_bh(&vsi->mac_filter_list_lock);
1518 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1520 spin_unlock_bh(&vsi->mac_filter_list_lock);
1523 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1524 struct i40e_aqc_add_macvlan_element_data element;
1526 memset(&element, 0, sizeof(element));
1527 ether_addr_copy(element.mac_addr, hw->mac.addr);
1528 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1529 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1531 spin_lock_bh(&vsi->mac_filter_list_lock);
1532 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1536 spin_unlock_bh(&vsi->mac_filter_list_lock);
1539 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1541 return i40e_sync_vsi_filters(vsi);
1545 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1546 * @vsi: the VSI being setup
1547 * @ctxt: VSI context structure
1548 * @enabled_tc: Enabled TCs bitmap
1549 * @is_add: True if called before Add VSI
1551 * Setup VSI queue mapping for enabled traffic classes.
1554 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1555 struct i40e_vsi_context *ctxt,
1559 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1560 struct i40e_vsi_context *ctxt,
1565 struct i40e_pf *pf = vsi->back;
1575 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1578 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1579 /* Find numtc from enabled TC bitmap */
1580 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1581 if (enabled_tc & BIT(i)) /* TC is enabled */
1585 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1589 /* At least TC0 is enabled in case of non-DCB case */
1593 vsi->tc_config.numtc = numtc;
1594 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1595 /* Number of queues per enabled TC */
1596 /* In MFP case we can have a much lower count of MSIx
1597 * vectors available and so we need to lower the used
1600 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1601 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1603 qcount = vsi->alloc_queue_pairs;
1604 num_tc_qps = qcount / numtc;
1605 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1607 /* Setup queue offset/count for all TCs for given VSI */
1608 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1609 /* See if the given TC is enabled for the given VSI */
1610 if (vsi->tc_config.enabled_tc & BIT(i)) {
1614 switch (vsi->type) {
1616 qcount = min_t(int, pf->alloc_rss_size,
1621 qcount = num_tc_qps;
1625 case I40E_VSI_SRIOV:
1626 case I40E_VSI_VMDQ2:
1628 qcount = num_tc_qps;
1632 vsi->tc_config.tc_info[i].qoffset = offset;
1633 vsi->tc_config.tc_info[i].qcount = qcount;
1635 /* find the next higher power-of-2 of num queue pairs */
1638 while (num_qps && (BIT_ULL(pow) < qcount)) {
1643 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1645 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1646 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1650 /* TC is not enabled so set the offset to
1651 * default queue and allocate one queue
1654 vsi->tc_config.tc_info[i].qoffset = 0;
1655 vsi->tc_config.tc_info[i].qcount = 1;
1656 vsi->tc_config.tc_info[i].netdev_tc = 0;
1660 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1663 /* Set actual Tx/Rx queue pairs */
1664 vsi->num_queue_pairs = offset;
1665 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1666 if (vsi->req_queue_pairs > 0)
1667 vsi->num_queue_pairs = vsi->req_queue_pairs;
1668 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1669 vsi->num_queue_pairs = pf->num_lan_msix;
1672 /* Scheduler section valid can only be set for ADD VSI */
1674 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1676 ctxt->info.up_enable_bits = enabled_tc;
1678 if (vsi->type == I40E_VSI_SRIOV) {
1679 ctxt->info.mapping_flags |=
1680 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1681 for (i = 0; i < vsi->num_queue_pairs; i++)
1682 ctxt->info.queue_mapping[i] =
1683 cpu_to_le16(vsi->base_queue + i);
1685 ctxt->info.mapping_flags |=
1686 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1687 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1689 ctxt->info.valid_sections |= cpu_to_le16(sections);
1693 * i40e_set_rx_mode - NDO callback to set the netdev filters
1694 * @netdev: network interface device structure
1697 void i40e_set_rx_mode(struct net_device *netdev)
1699 static void i40e_set_rx_mode(struct net_device *netdev)
1702 struct i40e_netdev_priv *np = netdev_priv(netdev);
1703 struct i40e_mac_filter *f, *ftmp;
1704 struct i40e_vsi *vsi = np->vsi;
1705 struct netdev_hw_addr *uca;
1706 struct netdev_hw_addr *mca;
1707 struct netdev_hw_addr *ha;
1709 spin_lock_bh(&vsi->mac_filter_list_lock);
1711 /* add addr if not already in the filter list */
1712 netdev_for_each_uc_addr(uca, netdev) {
1713 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1714 if (i40e_is_vsi_in_vlan(vsi))
1715 i40e_put_mac_in_vlan(vsi, uca->addr,
1718 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1723 netdev_for_each_mc_addr(mca, netdev) {
1724 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1725 if (i40e_is_vsi_in_vlan(vsi))
1726 i40e_put_mac_in_vlan(vsi, mca->addr,
1729 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1734 /* remove filter if not in netdev list */
1735 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1740 netdev_for_each_mc_addr(mca, netdev)
1741 if (ether_addr_equal(mca->addr, f->macaddr))
1742 goto bottom_of_search_loop;
1744 netdev_for_each_uc_addr(uca, netdev)
1745 if (ether_addr_equal(uca->addr, f->macaddr))
1746 goto bottom_of_search_loop;
1748 for_each_dev_addr(netdev, ha)
1749 if (ether_addr_equal(ha->addr, f->macaddr))
1750 goto bottom_of_search_loop;
1752 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1753 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1755 bottom_of_search_loop:
1758 spin_unlock_bh(&vsi->mac_filter_list_lock);
1760 /* check for other flag changes */
1761 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1762 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1763 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1768 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1769 * @src: source MAC filter entry to be clones
1771 * Returns the pointer to newly cloned MAC filter entry or NULL
1774 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1775 struct i40e_mac_filter *src)
1777 struct i40e_mac_filter *f;
1779 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1784 INIT_LIST_HEAD(&f->list);
1790 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1791 * @vsi: pointer to vsi struct
1792 * @from: Pointer to list which contains MAC filter entries - changes to
1793 * those entries needs to be undone.
1795 * MAC filter entries from list were slated to be removed from device.
1797 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1798 struct list_head *from)
1800 struct i40e_mac_filter *f, *ftmp;
1802 list_for_each_entry_safe(f, ftmp, from, list) {
1804 /* Move the element back into MAC filter list*/
1805 list_move_tail(&f->list, &vsi->mac_filter_list);
1810 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1811 * @vsi: pointer to vsi struct
1813 * MAC filter entries from list were slated to be added from device.
1815 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1817 struct i40e_mac_filter *f, *ftmp;
1819 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1820 if (!f->changed && f->counter)
1826 * i40e_cleanup_add_list - Deletes the element from add list and release
1828 * @add_list: Pointer to list which contains MAC filter entries
1830 static void i40e_cleanup_add_list(struct list_head *add_list)
1832 struct i40e_mac_filter *f, *ftmp;
1834 list_for_each_entry_safe(f, ftmp, add_list, list) {
1841 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1842 * @vsi: ptr to the VSI
1844 * Push any outstanding VSI filter changes through the AdminQ.
1846 * Returns 0 or error value
1848 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1850 struct list_head tmp_del_list, tmp_add_list;
1851 struct i40e_mac_filter *f, *ftmp, *fclone;
1852 bool promisc_forced_on = false;
1853 bool add_happened = false;
1854 int filter_list_len = 0;
1855 u32 changed_flags = 0;
1856 i40e_status aq_ret = 0;
1857 bool err_cond = false;
1865 /* empty array typed pointers, kcalloc later */
1866 struct i40e_aqc_add_macvlan_element_data *add_list;
1867 struct i40e_aqc_remove_macvlan_element_data *del_list;
1869 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1870 usleep_range(1000, 2000);
1874 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1875 vsi->current_netdev_flags = vsi->netdev->flags;
1878 INIT_LIST_HEAD(&tmp_del_list);
1879 INIT_LIST_HEAD(&tmp_add_list);
1881 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1882 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1884 spin_lock_bh(&vsi->mac_filter_list_lock);
1885 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1889 if (f->counter != 0)
1893 /* Move the element into temporary del_list */
1894 list_move_tail(&f->list, &tmp_del_list);
1897 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1901 if (f->counter == 0)
1905 /* Clone MAC filter entry and add into temporary list */
1906 fclone = i40e_mac_filter_entry_clone(f);
1911 list_add_tail(&fclone->list, &tmp_add_list);
1914 /* if failed to clone MAC filter entry - undo */
1916 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1917 i40e_undo_add_filter_entries(vsi);
1919 spin_unlock_bh(&vsi->mac_filter_list_lock);
1922 i40e_cleanup_add_list(&tmp_add_list);
1928 /* Now process 'del_list' outside the lock */
1929 if (!list_empty(&tmp_del_list)) {
1932 filter_list_len = pf->hw.aq.asq_buf_size /
1933 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1934 del_list_size = filter_list_len *
1935 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1936 del_list = kzalloc(del_list_size, GFP_KERNEL);
1938 i40e_cleanup_add_list(&tmp_add_list);
1940 /* Undo VSI's MAC filter entry element updates */
1941 spin_lock_bh(&vsi->mac_filter_list_lock);
1942 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1943 i40e_undo_add_filter_entries(vsi);
1944 spin_unlock_bh(&vsi->mac_filter_list_lock);
1949 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1952 /* add to delete list */
1953 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1954 del_list[num_del].vlan_tag =
1955 cpu_to_le16((u16)(f->vlan ==
1956 I40E_VLAN_ANY ? 0 : f->vlan));
1958 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1959 del_list[num_del].flags = cmd_flags;
1962 /* flush a full buffer */
1963 if (num_del == filter_list_len) {
1964 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1969 aq_err = pf->hw.aq.asq_last_status;
1971 memset(del_list, 0, del_list_size);
1973 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1975 dev_err(&pf->pdev->dev,
1976 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1977 i40e_stat_str(&pf->hw, aq_ret),
1978 i40e_aq_str(&pf->hw, aq_err));
1981 /* Release memory for MAC filter entries which were
1982 * synced up with HW.
1989 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1992 aq_err = pf->hw.aq.asq_last_status;
1995 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1996 dev_info(&pf->pdev->dev,
1997 "ignoring delete macvlan error, err %s aq_err %s\n",
1998 i40e_stat_str(&pf->hw, aq_ret),
1999 i40e_aq_str(&pf->hw, aq_err));
2006 if (!list_empty(&tmp_add_list)) {
2009 /* do all the adds now */
2010 filter_list_len = pf->hw.aq.asq_buf_size /
2011 sizeof(struct i40e_aqc_add_macvlan_element_data),
2012 add_list_size = filter_list_len *
2013 sizeof(struct i40e_aqc_add_macvlan_element_data);
2014 add_list = kzalloc(add_list_size, GFP_KERNEL);
2016 /* Purge element from temporary lists */
2017 i40e_cleanup_add_list(&tmp_add_list);
2019 /* Undo add filter entries from VSI MAC filter list */
2020 spin_lock_bh(&vsi->mac_filter_list_lock);
2021 i40e_undo_add_filter_entries(vsi);
2022 spin_unlock_bh(&vsi->mac_filter_list_lock);
2027 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2029 add_happened = true;
2032 /* add to add array */
2033 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2034 add_list[num_add].vlan_tag =
2036 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2037 add_list[num_add].queue_number = 0;
2039 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2040 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2043 /* flush a full buffer */
2044 if (num_add == filter_list_len) {
2045 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2048 aq_err = pf->hw.aq.asq_last_status;
2053 memset(add_list, 0, add_list_size);
2055 /* Entries from tmp_add_list were cloned from MAC
2056 * filter list, hence clean those cloned entries
2063 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2064 add_list, num_add, NULL);
2065 aq_err = pf->hw.aq.asq_last_status;
2071 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2072 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2073 dev_info(&pf->pdev->dev,
2074 "add filter failed, err %s aq_err %s\n",
2075 i40e_stat_str(&pf->hw, aq_ret),
2076 i40e_aq_str(&pf->hw, aq_err));
2077 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2078 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2080 promisc_forced_on = true;
2081 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2083 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2088 /* check for changes in promiscuous modes */
2089 if (changed_flags & IFF_ALLMULTI) {
2090 bool cur_multipromisc;
2092 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2093 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2098 retval = i40e_aq_rc_to_posix(aq_ret,
2099 pf->hw.aq.asq_last_status);
2100 dev_info(&pf->pdev->dev,
2101 "set multi promisc failed, err %s aq_err %s\n",
2102 i40e_stat_str(&pf->hw, aq_ret),
2103 i40e_aq_str(&pf->hw,
2104 pf->hw.aq.asq_last_status));
2107 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2110 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2111 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2113 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2114 /* set defport ON for Main VSI instead of true promisc
2115 * this way we will get all unicast/multicast and VLAN
2116 * promisc behavior but will not get VF or VMDq traffic
2117 * replicated on the Main VSI.
2119 if (pf->cur_promisc != cur_promisc) {
2120 pf->cur_promisc = cur_promisc;
2121 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2124 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2130 i40e_aq_rc_to_posix(aq_ret,
2131 pf->hw.aq.asq_last_status);
2132 dev_info(&pf->pdev->dev,
2133 "set unicast promisc failed, err %d, aq_err %d\n",
2134 aq_ret, pf->hw.aq.asq_last_status);
2136 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2142 i40e_aq_rc_to_posix(aq_ret,
2143 pf->hw.aq.asq_last_status);
2144 dev_info(&pf->pdev->dev,
2145 "set multicast promisc failed, err %d, aq_err %d\n",
2146 aq_ret, pf->hw.aq.asq_last_status);
2149 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2153 retval = i40e_aq_rc_to_posix(aq_ret,
2154 pf->hw.aq.asq_last_status);
2155 dev_info(&pf->pdev->dev,
2156 "set brdcast promisc failed, err %s, aq_err %s\n",
2157 i40e_stat_str(&pf->hw, aq_ret),
2158 i40e_aq_str(&pf->hw,
2159 pf->hw.aq.asq_last_status));
2163 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2168 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2169 * @pf: board private structure
2171 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2175 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2177 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2179 for (v = 0; v < pf->num_alloc_vsi; v++) {
2181 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2182 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2185 /* come back and try again later */
2186 pf->flags |= I40E_FLAG_FILTER_SYNC;
2194 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2195 * @netdev: network interface device structure
2196 * @new_mtu: new value for maximum frame size
2198 * Returns 0 on success, negative on failure
2200 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2202 struct i40e_netdev_priv *np = netdev_priv(netdev);
2203 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2204 struct i40e_vsi *vsi = np->vsi;
2206 /* MTU < 68 is an error and causes problems on some kernels */
2207 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2210 netdev_info(netdev, "changing MTU from %d to %d\n",
2211 netdev->mtu, new_mtu);
2212 netdev->mtu = new_mtu;
2213 if (netif_running(netdev))
2214 i40e_vsi_reinit_locked(vsi);
2220 * i40e_ioctl - Access the hwtstamp interface
2221 * @netdev: network interface device structure
2222 * @ifr: interface request data
2223 * @cmd: ioctl command
2225 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2227 struct i40e_netdev_priv *np = netdev_priv(netdev);
2228 struct i40e_pf *pf = np->vsi->back;
2232 return i40e_ptp_get_ts_config(pf, ifr);
2234 return i40e_ptp_set_ts_config(pf, ifr);
2241 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2242 * @vsi: the vsi being adjusted
2244 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2246 struct i40e_vsi_context ctxt;
2249 if ((vsi->info.valid_sections &
2250 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2251 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2252 return; /* already enabled */
2254 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2255 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2256 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2258 ctxt.seid = vsi->seid;
2259 ctxt.info = vsi->info;
2260 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2262 dev_info(&vsi->back->pdev->dev,
2263 "update vlan stripping failed, err %s aq_err %s\n",
2264 i40e_stat_str(&vsi->back->hw, ret),
2265 i40e_aq_str(&vsi->back->hw,
2266 vsi->back->hw.aq.asq_last_status));
2271 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2272 * @vsi: the vsi being adjusted
2274 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2276 struct i40e_vsi_context ctxt;
2279 if ((vsi->info.valid_sections &
2280 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2281 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2282 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2283 return; /* already disabled */
2285 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2286 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2287 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2289 ctxt.seid = vsi->seid;
2290 ctxt.info = vsi->info;
2291 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2293 dev_info(&vsi->back->pdev->dev,
2294 "update vlan stripping failed, err %s aq_err %s\n",
2295 i40e_stat_str(&vsi->back->hw, ret),
2296 i40e_aq_str(&vsi->back->hw,
2297 vsi->back->hw.aq.asq_last_status));
2302 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2303 * @netdev: network interface to be adjusted
2304 * @features: netdev features to test if VLAN offload is enabled or not
2306 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2308 struct i40e_netdev_priv *np = netdev_priv(netdev);
2309 struct i40e_vsi *vsi = np->vsi;
2311 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2312 i40e_vlan_stripping_enable(vsi);
2314 i40e_vlan_stripping_disable(vsi);
2318 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2319 * @vsi: the vsi being configured
2320 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2322 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2324 struct i40e_mac_filter *f, *add_f;
2325 bool is_netdev, is_vf;
2327 is_vf = (vsi->type == I40E_VSI_SRIOV);
2328 is_netdev = !!(vsi->netdev);
2330 /* Locked once because all functions invoked below iterates list*/
2331 spin_lock_bh(&vsi->mac_filter_list_lock);
2334 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2337 dev_info(&vsi->back->pdev->dev,
2338 "Could not add vlan filter %d for %pM\n",
2339 vid, vsi->netdev->dev_addr);
2340 spin_unlock_bh(&vsi->mac_filter_list_lock);
2345 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2346 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2348 dev_info(&vsi->back->pdev->dev,
2349 "Could not add vlan filter %d for %pM\n",
2351 spin_unlock_bh(&vsi->mac_filter_list_lock);
2356 /* Now if we add a vlan tag, make sure to check if it is the first
2357 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2358 * with 0, so we now accept untagged and specified tagged traffic
2359 * (and not any taged and untagged)
2362 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2364 is_vf, is_netdev)) {
2365 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2366 I40E_VLAN_ANY, is_vf, is_netdev);
2367 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2370 dev_info(&vsi->back->pdev->dev,
2371 "Could not add filter 0 for %pM\n",
2372 vsi->netdev->dev_addr);
2373 spin_unlock_bh(&vsi->mac_filter_list_lock);
2379 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2380 if (vid > 0 && !vsi->info.pvid) {
2381 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2382 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2385 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2387 add_f = i40e_add_filter(vsi, f->macaddr,
2388 0, is_vf, is_netdev);
2390 dev_info(&vsi->back->pdev->dev,
2391 "Could not add filter 0 for %pM\n",
2393 spin_unlock_bh(&vsi->mac_filter_list_lock);
2399 spin_unlock_bh(&vsi->mac_filter_list_lock);
2401 /* schedule our worker thread which will take care of
2402 * applying the new filter changes
2404 i40e_service_event_schedule(vsi->back);
2409 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2410 * @vsi: the vsi being configured
2411 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2413 * Return: 0 on success or negative otherwise
2415 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2417 struct net_device *netdev = vsi->netdev;
2418 struct i40e_mac_filter *f, *add_f;
2419 bool is_vf, is_netdev;
2420 int filter_count = 0;
2422 is_vf = (vsi->type == I40E_VSI_SRIOV);
2423 is_netdev = !!(netdev);
2425 /* Locked once because all functions invoked below iterates list */
2426 spin_lock_bh(&vsi->mac_filter_list_lock);
2429 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2431 list_for_each_entry(f, &vsi->mac_filter_list, list)
2432 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2434 /* go through all the filters for this VSI and if there is only
2435 * vid == 0 it means there are no other filters, so vid 0 must
2436 * be replaced with -1. This signifies that we should from now
2437 * on accept any traffic (with any tag present, or untagged)
2439 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2442 ether_addr_equal(netdev->dev_addr, f->macaddr))
2450 if (!filter_count && is_netdev) {
2451 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2452 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2455 dev_info(&vsi->back->pdev->dev,
2456 "Could not add filter %d for %pM\n",
2457 I40E_VLAN_ANY, netdev->dev_addr);
2458 spin_unlock_bh(&vsi->mac_filter_list_lock);
2463 if (!filter_count) {
2464 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2465 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2466 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2469 dev_info(&vsi->back->pdev->dev,
2470 "Could not add filter %d for %pM\n",
2471 I40E_VLAN_ANY, f->macaddr);
2472 spin_unlock_bh(&vsi->mac_filter_list_lock);
2478 spin_unlock_bh(&vsi->mac_filter_list_lock);
2480 /* schedule our worker thread which will take care of
2481 * applying the new filter changes
2483 i40e_service_event_schedule(vsi->back);
2488 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2489 * @netdev: network interface to be adjusted
2490 * @vid: vlan id to be added
2492 * net_device_ops implementation for adding vlan ids
2495 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2496 __always_unused __be16 proto, u16 vid)
2498 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2499 __always_unused __be16 proto, u16 vid)
2502 struct i40e_netdev_priv *np = netdev_priv(netdev);
2503 struct i40e_vsi *vsi = np->vsi;
2509 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2511 /* If the network stack called us with vid = 0 then
2512 * it is asking to receive priority tagged packets with
2513 * vlan id 0. Our HW receives them by default when configured
2514 * to receive untagged packets so there is no need to add an
2515 * extra filter for vlan 0 tagged packets.
2518 ret = i40e_vsi_add_vlan(vsi, vid);
2520 if (!ret && (vid < VLAN_N_VID))
2521 set_bit(vid, vsi->active_vlans);
2527 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2528 * @netdev: network interface to be adjusted
2529 * @vid: vlan id to be removed
2531 * net_device_ops implementation for removing vlan ids
2534 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2535 __always_unused __be16 proto, u16 vid)
2537 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2538 __always_unused __be16 proto, u16 vid)
2541 struct i40e_netdev_priv *np = netdev_priv(netdev);
2542 struct i40e_vsi *vsi = np->vsi;
2544 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2546 /* return code is ignored as there is nothing a user
2547 * can do about failure to remove and a log message was
2548 * already printed from the other function
2550 i40e_vsi_kill_vlan(vsi, vid);
2552 clear_bit(vid, vsi->active_vlans);
2558 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2559 * @vsi: the vsi being brought back up
2561 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2568 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2570 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2571 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2576 * i40e_vsi_add_pvid - Add pvid for the VSI
2577 * @vsi: the vsi being adjusted
2578 * @vid: the vlan id to set as a PVID
2580 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2582 struct i40e_vsi_context ctxt;
2585 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2586 vsi->info.pvid = cpu_to_le16(vid);
2587 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2588 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2589 I40E_AQ_VSI_PVLAN_EMOD_STR;
2591 ctxt.seid = vsi->seid;
2592 ctxt.info = vsi->info;
2593 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2595 dev_info(&vsi->back->pdev->dev,
2596 "add pvid failed, err %s aq_err %s\n",
2597 i40e_stat_str(&vsi->back->hw, ret),
2598 i40e_aq_str(&vsi->back->hw,
2599 vsi->back->hw.aq.asq_last_status));
2607 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2608 * @vsi: the vsi being adjusted
2610 * Just use the vlan_rx_register() service to put it back to normal
2612 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2614 i40e_vlan_stripping_disable(vsi);
2620 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2621 * @vsi: ptr to the VSI
2623 * If this function returns with an error, then it's possible one or
2624 * more of the rings is populated (while the rest are not). It is the
2625 * callers duty to clean those orphaned rings.
2627 * Return 0 on success, negative on failure
2629 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2633 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2634 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2640 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2641 * @vsi: ptr to the VSI
2643 * Free VSI's transmit software resources
2645 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2652 for (i = 0; i < vsi->num_queue_pairs; i++)
2653 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2654 i40e_free_tx_resources(vsi->tx_rings[i]);
2658 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2659 * @vsi: ptr to the VSI
2661 * If this function returns with an error, then it's possible one or
2662 * more of the rings is populated (while the rest are not). It is the
2663 * callers duty to clean those orphaned rings.
2665 * Return 0 on success, negative on failure
2667 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2671 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2672 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2674 i40e_fcoe_setup_ddp_resources(vsi);
2680 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2681 * @vsi: ptr to the VSI
2683 * Free all receive software resources
2685 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2692 for (i = 0; i < vsi->num_queue_pairs; i++)
2693 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2694 i40e_free_rx_resources(vsi->rx_rings[i]);
2696 i40e_fcoe_free_ddp_resources(vsi);
2701 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2702 * @ring: The Tx ring to configure
2704 * This enables/disables XPS for a given Tx descriptor ring
2705 * based on the TCs enabled for the VSI that ring belongs to.
2707 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2709 struct i40e_vsi *vsi = ring->vsi;
2712 if (!ring->q_vector || !ring->netdev)
2715 /* Single TC mode enable XPS */
2716 if (vsi->tc_config.numtc <= 1) {
2717 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2718 netif_set_xps_queue(ring->netdev,
2719 &ring->q_vector->affinity_mask,
2721 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2722 /* Disable XPS to allow selection based on TC */
2723 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2724 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2725 free_cpumask_var(mask);
2728 /* schedule our worker thread which will take care of
2729 * applying the new filter changes
2731 i40e_service_event_schedule(vsi->back);
2735 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2736 * @ring: The Tx ring to configure
2738 * Configure the Tx descriptor ring in the HMC context.
2740 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2742 struct i40e_vsi *vsi = ring->vsi;
2743 u16 pf_q = vsi->base_queue + ring->queue_index;
2744 struct i40e_hw *hw = &vsi->back->hw;
2745 struct i40e_hmc_obj_txq tx_ctx;
2746 i40e_status err = 0;
2749 /* some ATR related tx ring init */
2750 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2751 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2752 ring->atr_count = 0;
2754 ring->atr_sample_rate = 0;
2758 i40e_config_xps_tx_ring(ring);
2760 /* clear the context structure first */
2761 memset(&tx_ctx, 0, sizeof(tx_ctx));
2763 tx_ctx.new_context = 1;
2764 tx_ctx.base = (ring->dma / 128);
2765 tx_ctx.qlen = ring->count;
2766 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2767 I40E_FLAG_FD_ATR_ENABLED));
2769 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2771 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2772 /* FDIR VSI tx ring can still use RS bit and writebacks */
2773 if (vsi->type != I40E_VSI_FDIR)
2774 tx_ctx.head_wb_ena = 1;
2775 tx_ctx.head_wb_addr = ring->dma +
2776 (ring->count * sizeof(struct i40e_tx_desc));
2778 /* As part of VSI creation/update, FW allocates certain
2779 * Tx arbitration queue sets for each TC enabled for
2780 * the VSI. The FW returns the handles to these queue
2781 * sets as part of the response buffer to Add VSI,
2782 * Update VSI, etc. AQ commands. It is expected that
2783 * these queue set handles be associated with the Tx
2784 * queues by the driver as part of the TX queue context
2785 * initialization. This has to be done regardless of
2786 * DCB as by default everything is mapped to TC0.
2788 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2789 tx_ctx.rdylist_act = 0;
2791 /* clear the context in the HMC */
2792 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2794 dev_info(&vsi->back->pdev->dev,
2795 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2796 ring->queue_index, pf_q, err);
2800 /* set the context in the HMC */
2801 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2803 dev_info(&vsi->back->pdev->dev,
2804 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2805 ring->queue_index, pf_q, err);
2809 /* Now associate this queue with this PCI function */
2810 if (vsi->type == I40E_VSI_VMDQ2) {
2811 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2812 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2813 I40E_QTX_CTL_VFVM_INDX_MASK;
2815 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2818 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2819 I40E_QTX_CTL_PF_INDX_MASK);
2820 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2823 /* cache tail off for easier writes later */
2824 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2830 * i40e_configure_rx_ring - Configure a receive ring context
2831 * @ring: The Rx ring to configure
2833 * Configure the Rx descriptor ring in the HMC context.
2835 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2837 struct i40e_vsi *vsi = ring->vsi;
2838 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2839 u16 pf_q = vsi->base_queue + ring->queue_index;
2840 struct i40e_hw *hw = &vsi->back->hw;
2841 struct i40e_hmc_obj_rxq rx_ctx;
2842 i40e_status err = 0;
2846 /* clear the context structure first */
2847 memset(&rx_ctx, 0, sizeof(rx_ctx));
2849 ring->rx_buf_len = vsi->rx_buf_len;
2850 ring->rx_hdr_len = vsi->rx_hdr_len;
2852 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2853 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2855 rx_ctx.base = (ring->dma / 128);
2856 rx_ctx.qlen = ring->count;
2858 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2859 set_ring_16byte_desc_enabled(ring);
2865 rx_ctx.dtype = vsi->dtype;
2867 set_ring_ps_enabled(ring);
2868 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2870 I40E_RX_SPLIT_TCP_UDP |
2873 rx_ctx.hsplit_0 = 0;
2876 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2877 (chain_len * ring->rx_buf_len));
2878 if (hw->revision_id == 0)
2879 rx_ctx.lrxqthresh = 0;
2881 rx_ctx.lrxqthresh = 2;
2882 rx_ctx.crcstrip = 1;
2884 /* this controls whether VLAN is stripped from inner headers */
2887 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2889 /* set the prefena field to 1 because the manual says to */
2892 /* clear the context in the HMC */
2893 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2895 dev_info(&vsi->back->pdev->dev,
2896 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2897 ring->queue_index, pf_q, err);
2901 /* set the context in the HMC */
2902 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2904 dev_info(&vsi->back->pdev->dev,
2905 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2906 ring->queue_index, pf_q, err);
2910 /* cache tail for quicker writes, and clear the reg before use */
2911 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2912 writel(0, ring->tail);
2914 if (ring_is_ps_enabled(ring)) {
2915 i40e_alloc_rx_headers(ring);
2916 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2918 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2925 * i40e_vsi_configure_tx - Configure the VSI for Tx
2926 * @vsi: VSI structure describing this set of rings and resources
2928 * Configure the Tx VSI for operation.
2930 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2935 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2936 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2942 * i40e_vsi_configure_rx - Configure the VSI for Rx
2943 * @vsi: the VSI being configured
2945 * Configure the Rx VSI for operation.
2947 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2952 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2953 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2954 + ETH_FCS_LEN + VLAN_HLEN;
2956 vsi->max_frame = I40E_RXBUFFER_2048;
2958 /* figure out correct receive buffer length */
2959 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2960 I40E_FLAG_RX_PS_ENABLED)) {
2961 case I40E_FLAG_RX_1BUF_ENABLED:
2962 vsi->rx_hdr_len = 0;
2963 vsi->rx_buf_len = vsi->max_frame;
2964 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2966 case I40E_FLAG_RX_PS_ENABLED:
2967 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2968 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2969 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2972 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2973 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2974 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2979 /* setup rx buffer for FCoE */
2980 if ((vsi->type == I40E_VSI_FCOE) &&
2981 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2982 vsi->rx_hdr_len = 0;
2983 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2984 vsi->max_frame = I40E_RXBUFFER_3072;
2985 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2988 #endif /* I40E_FCOE */
2989 /* round up for the chip's needs */
2990 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2991 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2992 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2993 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2995 /* set up individual rings */
2996 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2997 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3003 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3004 * @vsi: ptr to the VSI
3006 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3008 struct i40e_ring *tx_ring, *rx_ring;
3009 u16 qoffset, qcount;
3012 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3013 /* Reset the TC information */
3014 for (i = 0; i < vsi->num_queue_pairs; i++) {
3015 rx_ring = vsi->rx_rings[i];
3016 tx_ring = vsi->tx_rings[i];
3017 rx_ring->dcb_tc = 0;
3018 tx_ring->dcb_tc = 0;
3022 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3023 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3026 qoffset = vsi->tc_config.tc_info[n].qoffset;
3027 qcount = vsi->tc_config.tc_info[n].qcount;
3028 for (i = qoffset; i < (qoffset + qcount); i++) {
3029 rx_ring = vsi->rx_rings[i];
3030 tx_ring = vsi->tx_rings[i];
3031 rx_ring->dcb_tc = n;
3032 tx_ring->dcb_tc = n;
3038 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3039 * @vsi: ptr to the VSI
3041 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3044 i40e_set_rx_mode(vsi->netdev);
3048 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3049 * @vsi: Pointer to the targeted VSI
3051 * This function replays the hlist on the hw where all the SB Flow Director
3052 * filters were saved.
3054 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3056 struct i40e_fdir_filter *filter;
3057 struct i40e_pf *pf = vsi->back;
3058 struct hlist_node *node;
3060 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3063 hlist_for_each_entry_safe(filter, node,
3064 &pf->fdir_filter_list, fdir_node) {
3065 i40e_add_del_fdir(vsi, filter, true);
3070 * i40e_vsi_configure - Set up the VSI for action
3071 * @vsi: the VSI being configured
3073 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3077 i40e_set_vsi_rx_mode(vsi);
3078 i40e_restore_vlan(vsi);
3079 i40e_vsi_config_dcb_rings(vsi);
3080 err = i40e_vsi_configure_tx(vsi);
3082 err = i40e_vsi_configure_rx(vsi);
3088 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3089 * @vsi: the VSI being configured
3091 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3093 struct i40e_pf *pf = vsi->back;
3094 struct i40e_hw *hw = &pf->hw;
3099 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3100 * and PFINT_LNKLSTn registers, e.g.:
3101 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3103 qp = vsi->base_queue;
3104 vector = vsi->base_vector;
3105 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3106 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3108 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3109 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3110 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3111 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3113 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3114 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3115 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3117 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3118 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3120 /* Linked list for the queuepairs assigned to this vector */
3121 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3122 for (q = 0; q < q_vector->num_ringpairs; q++) {
3125 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3126 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3127 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3128 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3130 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3132 wr32(hw, I40E_QINT_RQCTL(qp), val);
3134 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3135 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3136 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3137 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3139 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3141 /* Terminate the linked list */
3142 if (q == (q_vector->num_ringpairs - 1))
3143 val |= (I40E_QUEUE_END_OF_LIST
3144 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3146 wr32(hw, I40E_QINT_TQCTL(qp), val);
3155 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3156 * @hw: ptr to the hardware info
3158 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3160 struct i40e_hw *hw = &pf->hw;
3163 /* clear things first */
3164 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3165 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3167 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3168 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3169 I40E_PFINT_ICR0_ENA_GRST_MASK |
3170 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3171 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3172 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3173 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3174 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3176 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3177 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3179 if (pf->flags & I40E_FLAG_PTP)
3180 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3182 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3184 /* SW_ITR_IDX = 0, but don't change INTENA */
3185 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3186 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3188 /* OTHER_ITR_IDX = 0 */
3189 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3193 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3194 * @vsi: the VSI being configured
3196 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3198 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3199 struct i40e_pf *pf = vsi->back;
3200 struct i40e_hw *hw = &pf->hw;
3203 /* set the ITR configuration */
3204 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3205 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3206 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3207 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3208 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3209 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3210 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3212 i40e_enable_misc_int_causes(pf);
3214 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3215 wr32(hw, I40E_PFINT_LNKLST0, 0);
3217 /* Associate the queue pair to the vector and enable the queue int */
3218 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3219 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3220 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3222 wr32(hw, I40E_QINT_RQCTL(0), val);
3224 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3225 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3226 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3228 wr32(hw, I40E_QINT_TQCTL(0), val);
3233 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3234 * @pf: board private structure
3236 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3238 struct i40e_hw *hw = &pf->hw;
3240 wr32(hw, I40E_PFINT_DYN_CTL0,
3241 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3246 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3247 * @pf: board private structure
3249 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3251 struct i40e_hw *hw = &pf->hw;
3254 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3255 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3256 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3258 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3263 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3264 * @vsi: pointer to a vsi
3265 * @vector: disable a particular Hw Interrupt vector
3267 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3269 struct i40e_pf *pf = vsi->back;
3270 struct i40e_hw *hw = &pf->hw;
3273 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3274 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3279 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3280 * @irq: interrupt number
3281 * @data: pointer to a q_vector
3283 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3285 struct i40e_q_vector *q_vector = data;
3287 if (!q_vector->tx.ring && !q_vector->rx.ring)
3290 napi_schedule_irqoff(&q_vector->napi);
3296 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3297 * @vsi: the VSI being configured
3298 * @basename: name for the vector
3300 * Allocates MSI-X vectors and requests interrupts from the kernel.
3302 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3304 int q_vectors = vsi->num_q_vectors;
3305 struct i40e_pf *pf = vsi->back;
3306 int base = vsi->base_vector;
3311 for (vector = 0; vector < q_vectors; vector++) {
3312 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3314 if (q_vector->tx.ring && q_vector->rx.ring) {
3315 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3316 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3318 } else if (q_vector->rx.ring) {
3319 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3320 "%s-%s-%d", basename, "rx", rx_int_idx++);
3321 } else if (q_vector->tx.ring) {
3322 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3323 "%s-%s-%d", basename, "tx", tx_int_idx++);
3325 /* skip this unused q_vector */
3328 err = request_irq(pf->msix_entries[base + vector].vector,
3334 dev_info(&pf->pdev->dev,
3335 "MSIX request_irq failed, error: %d\n", err);
3336 goto free_queue_irqs;
3338 /* assign the mask for this irq */
3339 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3340 &q_vector->affinity_mask);
3343 vsi->irqs_ready = true;
3349 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3351 free_irq(pf->msix_entries[base + vector].vector,
3352 &(vsi->q_vectors[vector]));
3358 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3359 * @vsi: the VSI being un-configured
3361 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3363 struct i40e_pf *pf = vsi->back;
3364 struct i40e_hw *hw = &pf->hw;
3365 int base = vsi->base_vector;
3368 for (i = 0; i < vsi->num_queue_pairs; i++) {
3369 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3370 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3373 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3374 for (i = vsi->base_vector;
3375 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3376 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3379 for (i = 0; i < vsi->num_q_vectors; i++)
3380 synchronize_irq(pf->msix_entries[i + base].vector);
3382 /* Legacy and MSI mode - this stops all interrupt handling */
3383 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3384 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3386 synchronize_irq(pf->pdev->irq);
3391 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3392 * @vsi: the VSI being configured
3394 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3396 struct i40e_pf *pf = vsi->back;
3399 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3400 for (i = 0; i < vsi->num_q_vectors; i++)
3401 i40e_irq_dynamic_enable(vsi, i);
3403 i40e_irq_dynamic_enable_icr0(pf);
3406 i40e_flush(&pf->hw);
3411 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3412 * @pf: board private structure
3414 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3417 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3418 i40e_flush(&pf->hw);
3422 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3423 * @irq: interrupt number
3424 * @data: pointer to a q_vector
3426 * This is the handler used for all MSI/Legacy interrupts, and deals
3427 * with both queue and non-queue interrupts. This is also used in
3428 * MSIX mode to handle the non-queue interrupts.
3430 static irqreturn_t i40e_intr(int irq, void *data)
3432 struct i40e_pf *pf = (struct i40e_pf *)data;
3433 struct i40e_hw *hw = &pf->hw;
3434 irqreturn_t ret = IRQ_NONE;
3435 u32 icr0, icr0_remaining;
3438 icr0 = rd32(hw, I40E_PFINT_ICR0);
3439 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3441 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3442 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3445 /* if interrupt but no bits showing, must be SWINT */
3446 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3447 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3450 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3451 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3452 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3453 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3454 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3457 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3458 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3459 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3460 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3462 /* temporarily disable queue cause for NAPI processing */
3463 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3465 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3466 wr32(hw, I40E_QINT_RQCTL(0), qval);
3468 qval = rd32(hw, I40E_QINT_TQCTL(0));
3469 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3470 wr32(hw, I40E_QINT_TQCTL(0), qval);
3472 if (!test_bit(__I40E_DOWN, &pf->state))
3473 napi_schedule_irqoff(&q_vector->napi);
3476 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3477 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3478 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3481 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3482 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3483 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3486 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3487 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3488 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3491 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3492 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3493 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3494 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3495 val = rd32(hw, I40E_GLGEN_RSTAT);
3496 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3497 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3498 if (val == I40E_RESET_CORER) {
3500 } else if (val == I40E_RESET_GLOBR) {
3502 } else if (val == I40E_RESET_EMPR) {
3504 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3508 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3509 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3510 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3511 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3512 rd32(hw, I40E_PFHMC_ERRORINFO),
3513 rd32(hw, I40E_PFHMC_ERRORDATA));
3516 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3517 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3519 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3520 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3521 i40e_ptp_tx_hwtstamp(pf);
3525 /* If a critical error is pending we have no choice but to reset the
3527 * Report and mask out any remaining unexpected interrupts.
3529 icr0_remaining = icr0 & ena_mask;
3530 if (icr0_remaining) {
3531 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3533 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3534 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3535 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3536 dev_info(&pf->pdev->dev, "device will be reset\n");
3537 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3538 i40e_service_event_schedule(pf);
3540 ena_mask &= ~icr0_remaining;
3545 /* re-enable interrupt causes */
3546 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3547 if (!test_bit(__I40E_DOWN, &pf->state)) {
3548 i40e_service_event_schedule(pf);
3549 i40e_irq_dynamic_enable_icr0(pf);
3556 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3557 * @tx_ring: tx ring to clean
3558 * @budget: how many cleans we're allowed
3560 * Returns true if there's any budget left (e.g. the clean is finished)
3562 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3564 struct i40e_vsi *vsi = tx_ring->vsi;
3565 u16 i = tx_ring->next_to_clean;
3566 struct i40e_tx_buffer *tx_buf;
3567 struct i40e_tx_desc *tx_desc;
3569 tx_buf = &tx_ring->tx_bi[i];
3570 tx_desc = I40E_TX_DESC(tx_ring, i);
3571 i -= tx_ring->count;
3574 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3576 /* if next_to_watch is not set then there is no work pending */
3580 /* prevent any other reads prior to eop_desc */
3581 read_barrier_depends();
3583 /* if the descriptor isn't done, no work yet to do */
3584 if (!(eop_desc->cmd_type_offset_bsz &
3585 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3588 /* clear next_to_watch to prevent false hangs */
3589 tx_buf->next_to_watch = NULL;
3591 tx_desc->buffer_addr = 0;
3592 tx_desc->cmd_type_offset_bsz = 0;
3593 /* move past filter desc */
3598 i -= tx_ring->count;
3599 tx_buf = tx_ring->tx_bi;
3600 tx_desc = I40E_TX_DESC(tx_ring, 0);
3602 /* unmap skb header data */
3603 dma_unmap_single(tx_ring->dev,
3604 dma_unmap_addr(tx_buf, dma),
3605 dma_unmap_len(tx_buf, len),
3607 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3608 kfree(tx_buf->raw_buf);
3610 tx_buf->raw_buf = NULL;
3611 tx_buf->tx_flags = 0;
3612 tx_buf->next_to_watch = NULL;
3613 dma_unmap_len_set(tx_buf, len, 0);
3614 tx_desc->buffer_addr = 0;
3615 tx_desc->cmd_type_offset_bsz = 0;
3617 /* move us past the eop_desc for start of next FD desc */
3622 i -= tx_ring->count;
3623 tx_buf = tx_ring->tx_bi;
3624 tx_desc = I40E_TX_DESC(tx_ring, 0);
3627 /* update budget accounting */
3629 } while (likely(budget));
3631 i += tx_ring->count;
3632 tx_ring->next_to_clean = i;
3634 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3635 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3641 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3642 * @irq: interrupt number
3643 * @data: pointer to a q_vector
3645 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3647 struct i40e_q_vector *q_vector = data;
3648 struct i40e_vsi *vsi;
3650 if (!q_vector->tx.ring)
3653 vsi = q_vector->tx.ring->vsi;
3654 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3660 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3661 * @vsi: the VSI being configured
3662 * @v_idx: vector index
3663 * @qp_idx: queue pair index
3665 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3667 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3668 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3669 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3671 tx_ring->q_vector = q_vector;
3672 tx_ring->next = q_vector->tx.ring;
3673 q_vector->tx.ring = tx_ring;
3674 q_vector->tx.count++;
3676 rx_ring->q_vector = q_vector;
3677 rx_ring->next = q_vector->rx.ring;
3678 q_vector->rx.ring = rx_ring;
3679 q_vector->rx.count++;
3683 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3684 * @vsi: the VSI being configured
3686 * This function maps descriptor rings to the queue-specific vectors
3687 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3688 * one vector per queue pair, but on a constrained vector budget, we
3689 * group the queue pairs as "efficiently" as possible.
3691 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3693 int qp_remaining = vsi->num_queue_pairs;
3694 int q_vectors = vsi->num_q_vectors;
3699 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3700 * group them so there are multiple queues per vector.
3701 * It is also important to go through all the vectors available to be
3702 * sure that if we don't use all the vectors, that the remaining vectors
3703 * are cleared. This is especially important when decreasing the
3704 * number of queues in use.
3706 for (; v_start < q_vectors; v_start++) {
3707 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3709 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3711 q_vector->num_ringpairs = num_ringpairs;
3713 q_vector->rx.count = 0;
3714 q_vector->tx.count = 0;
3715 q_vector->rx.ring = NULL;
3716 q_vector->tx.ring = NULL;
3718 while (num_ringpairs--) {
3719 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3727 * i40e_vsi_request_irq - Request IRQ from the OS
3728 * @vsi: the VSI being configured
3729 * @basename: name for the vector
3731 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3733 struct i40e_pf *pf = vsi->back;
3736 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3737 err = i40e_vsi_request_irq_msix(vsi, basename);
3738 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3739 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3742 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3746 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3751 #ifdef CONFIG_NET_POLL_CONTROLLER
3753 * i40e_netpoll - A Polling 'interrupt'handler
3754 * @netdev: network interface device structure
3756 * This is used by netconsole to send skbs without having to re-enable
3757 * interrupts. It's not called while the normal interrupt routine is executing.
3760 void i40e_netpoll(struct net_device *netdev)
3762 static void i40e_netpoll(struct net_device *netdev)
3765 struct i40e_netdev_priv *np = netdev_priv(netdev);
3766 struct i40e_vsi *vsi = np->vsi;
3767 struct i40e_pf *pf = vsi->back;
3770 /* if interface is down do nothing */
3771 if (test_bit(__I40E_DOWN, &vsi->state))
3774 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3775 for (i = 0; i < vsi->num_q_vectors; i++)
3776 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3778 i40e_intr(pf->pdev->irq, netdev);
3784 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3785 * @pf: the PF being configured
3786 * @pf_q: the PF queue
3787 * @enable: enable or disable state of the queue
3789 * This routine will wait for the given Tx queue of the PF to reach the
3790 * enabled or disabled state.
3791 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3792 * multiple retries; else will return 0 in case of success.
3794 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3799 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3800 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3801 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3804 usleep_range(10, 20);
3806 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3813 * i40e_vsi_control_tx - Start or stop a VSI's rings
3814 * @vsi: the VSI being configured
3815 * @enable: start or stop the rings
3817 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3819 struct i40e_pf *pf = vsi->back;
3820 struct i40e_hw *hw = &pf->hw;
3821 int i, j, pf_q, ret = 0;
3824 pf_q = vsi->base_queue;
3825 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3827 /* warn the TX unit of coming changes */
3828 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3830 usleep_range(10, 20);
3832 for (j = 0; j < 50; j++) {
3833 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3834 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3835 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3837 usleep_range(1000, 2000);
3839 /* Skip if the queue is already in the requested state */
3840 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3843 /* turn on/off the queue */
3845 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3846 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3848 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3851 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3852 /* No waiting for the Tx queue to disable */
3853 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3856 /* wait for the change to finish */
3857 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3859 dev_info(&pf->pdev->dev,
3860 "VSI seid %d Tx ring %d %sable timeout\n",
3861 vsi->seid, pf_q, (enable ? "en" : "dis"));
3866 if (hw->revision_id == 0)
3872 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3873 * @pf: the PF being configured
3874 * @pf_q: the PF queue
3875 * @enable: enable or disable state of the queue
3877 * This routine will wait for the given Rx queue of the PF to reach the
3878 * enabled or disabled state.
3879 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3880 * multiple retries; else will return 0 in case of success.
3882 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3887 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3888 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3889 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3892 usleep_range(10, 20);
3894 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3901 * i40e_vsi_control_rx - Start or stop a VSI's rings
3902 * @vsi: the VSI being configured
3903 * @enable: start or stop the rings
3905 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3907 struct i40e_pf *pf = vsi->back;
3908 struct i40e_hw *hw = &pf->hw;
3909 int i, j, pf_q, ret = 0;
3912 pf_q = vsi->base_queue;
3913 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3914 for (j = 0; j < 50; j++) {
3915 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3916 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3917 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3919 usleep_range(1000, 2000);
3922 /* Skip if the queue is already in the requested state */
3923 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3926 /* turn on/off the queue */
3928 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3930 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3931 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3933 /* wait for the change to finish */
3934 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3936 dev_info(&pf->pdev->dev,
3937 "VSI seid %d Rx ring %d %sable timeout\n",
3938 vsi->seid, pf_q, (enable ? "en" : "dis"));
3947 * i40e_vsi_control_rings - Start or stop a VSI's rings
3948 * @vsi: the VSI being configured
3949 * @enable: start or stop the rings
3951 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3955 /* do rx first for enable and last for disable */
3957 ret = i40e_vsi_control_rx(vsi, request);
3960 ret = i40e_vsi_control_tx(vsi, request);
3962 /* Ignore return value, we need to shutdown whatever we can */
3963 i40e_vsi_control_tx(vsi, request);
3964 i40e_vsi_control_rx(vsi, request);
3971 * i40e_vsi_free_irq - Free the irq association with the OS
3972 * @vsi: the VSI being configured
3974 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3976 struct i40e_pf *pf = vsi->back;
3977 struct i40e_hw *hw = &pf->hw;
3978 int base = vsi->base_vector;
3982 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3983 if (!vsi->q_vectors)
3986 if (!vsi->irqs_ready)
3989 vsi->irqs_ready = false;
3990 for (i = 0; i < vsi->num_q_vectors; i++) {
3991 u16 vector = i + base;
3993 /* free only the irqs that were actually requested */
3994 if (!vsi->q_vectors[i] ||
3995 !vsi->q_vectors[i]->num_ringpairs)
3998 /* clear the affinity_mask in the IRQ descriptor */
3999 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4001 free_irq(pf->msix_entries[vector].vector,
4004 /* Tear down the interrupt queue link list
4006 * We know that they come in pairs and always
4007 * the Rx first, then the Tx. To clear the
4008 * link list, stick the EOL value into the
4009 * next_q field of the registers.
4011 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4012 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4013 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4014 val |= I40E_QUEUE_END_OF_LIST
4015 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4016 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4018 while (qp != I40E_QUEUE_END_OF_LIST) {
4021 val = rd32(hw, I40E_QINT_RQCTL(qp));
4023 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4024 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4025 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4026 I40E_QINT_RQCTL_INTEVENT_MASK);
4028 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4029 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4031 wr32(hw, I40E_QINT_RQCTL(qp), val);
4033 val = rd32(hw, I40E_QINT_TQCTL(qp));
4035 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4036 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4038 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4039 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4040 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4041 I40E_QINT_TQCTL_INTEVENT_MASK);
4043 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4044 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4046 wr32(hw, I40E_QINT_TQCTL(qp), val);
4051 free_irq(pf->pdev->irq, pf);
4053 val = rd32(hw, I40E_PFINT_LNKLST0);
4054 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4055 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4056 val |= I40E_QUEUE_END_OF_LIST
4057 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4058 wr32(hw, I40E_PFINT_LNKLST0, val);
4060 val = rd32(hw, I40E_QINT_RQCTL(qp));
4061 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4062 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4063 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4064 I40E_QINT_RQCTL_INTEVENT_MASK);
4066 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4067 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4069 wr32(hw, I40E_QINT_RQCTL(qp), val);
4071 val = rd32(hw, I40E_QINT_TQCTL(qp));
4073 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4074 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4075 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4076 I40E_QINT_TQCTL_INTEVENT_MASK);
4078 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4079 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4081 wr32(hw, I40E_QINT_TQCTL(qp), val);
4086 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4087 * @vsi: the VSI being configured
4088 * @v_idx: Index of vector to be freed
4090 * This function frees the memory allocated to the q_vector. In addition if
4091 * NAPI is enabled it will delete any references to the NAPI struct prior
4092 * to freeing the q_vector.
4094 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4096 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4097 struct i40e_ring *ring;
4102 /* disassociate q_vector from rings */
4103 i40e_for_each_ring(ring, q_vector->tx)
4104 ring->q_vector = NULL;
4106 i40e_for_each_ring(ring, q_vector->rx)
4107 ring->q_vector = NULL;
4109 /* only VSI w/ an associated netdev is set up w/ NAPI */
4111 netif_napi_del(&q_vector->napi);
4113 vsi->q_vectors[v_idx] = NULL;
4115 kfree_rcu(q_vector, rcu);
4119 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4120 * @vsi: the VSI being un-configured
4122 * This frees the memory allocated to the q_vectors and
4123 * deletes references to the NAPI struct.
4125 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4129 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4130 i40e_free_q_vector(vsi, v_idx);
4134 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4135 * @pf: board private structure
4137 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4139 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4140 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4141 pci_disable_msix(pf->pdev);
4142 kfree(pf->msix_entries);
4143 pf->msix_entries = NULL;
4144 kfree(pf->irq_pile);
4145 pf->irq_pile = NULL;
4146 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4147 pci_disable_msi(pf->pdev);
4149 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4153 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4154 * @pf: board private structure
4156 * We go through and clear interrupt specific resources and reset the structure
4157 * to pre-load conditions
4159 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4163 i40e_stop_misc_vector(pf);
4164 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4165 synchronize_irq(pf->msix_entries[0].vector);
4166 free_irq(pf->msix_entries[0].vector, pf);
4169 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4170 for (i = 0; i < pf->num_alloc_vsi; i++)
4172 i40e_vsi_free_q_vectors(pf->vsi[i]);
4173 i40e_reset_interrupt_capability(pf);
4177 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4178 * @vsi: the VSI being configured
4180 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4187 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4188 napi_enable(&vsi->q_vectors[q_idx]->napi);
4192 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4193 * @vsi: the VSI being configured
4195 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4202 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4203 napi_disable(&vsi->q_vectors[q_idx]->napi);
4207 * i40e_vsi_close - Shut down a VSI
4208 * @vsi: the vsi to be quelled
4210 static void i40e_vsi_close(struct i40e_vsi *vsi)
4212 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4214 i40e_vsi_free_irq(vsi);
4215 i40e_vsi_free_tx_resources(vsi);
4216 i40e_vsi_free_rx_resources(vsi);
4217 vsi->current_netdev_flags = 0;
4221 * i40e_quiesce_vsi - Pause a given VSI
4222 * @vsi: the VSI being paused
4224 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4226 if (test_bit(__I40E_DOWN, &vsi->state))
4229 /* No need to disable FCoE VSI when Tx suspended */
4230 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4231 vsi->type == I40E_VSI_FCOE) {
4232 dev_dbg(&vsi->back->pdev->dev,
4233 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4237 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4238 if (vsi->netdev && netif_running(vsi->netdev))
4239 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4241 i40e_vsi_close(vsi);
4245 * i40e_unquiesce_vsi - Resume a given VSI
4246 * @vsi: the VSI being resumed
4248 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4250 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4253 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4254 if (vsi->netdev && netif_running(vsi->netdev))
4255 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4257 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4261 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4264 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4268 for (v = 0; v < pf->num_alloc_vsi; v++) {
4270 i40e_quiesce_vsi(pf->vsi[v]);
4275 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4278 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4282 for (v = 0; v < pf->num_alloc_vsi; v++) {
4284 i40e_unquiesce_vsi(pf->vsi[v]);
4288 #ifdef CONFIG_I40E_DCB
4290 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4291 * @vsi: the VSI being configured
4293 * This function waits for the given VSI's Tx queues to be disabled.
4295 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4297 struct i40e_pf *pf = vsi->back;
4300 pf_q = vsi->base_queue;
4301 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4302 /* Check and wait for the disable status of the queue */
4303 ret = i40e_pf_txq_wait(pf, pf_q, false);
4305 dev_info(&pf->pdev->dev,
4306 "VSI seid %d Tx ring %d disable timeout\n",
4316 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4319 * This function waits for the Tx queues to be in disabled state for all the
4320 * VSIs that are managed by this PF.
4322 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4326 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4327 /* No need to wait for FCoE VSI queues */
4328 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4329 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4341 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4342 * @q_idx: TX queue number
4343 * @vsi: Pointer to VSI struct
4345 * This function checks specified queue for given VSI. Detects hung condition.
4346 * Sets hung bit since it is two step process. Before next run of service task
4347 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4348 * hung condition remain unchanged and during subsequent run, this function
4349 * issues SW interrupt to recover from hung condition.
4351 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4353 struct i40e_ring *tx_ring = NULL;
4355 u32 head, val, tx_pending;
4360 /* now that we have an index, find the tx_ring struct */
4361 for (i = 0; i < vsi->num_queue_pairs; i++) {
4362 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4363 if (q_idx == vsi->tx_rings[i]->queue_index) {
4364 tx_ring = vsi->tx_rings[i];
4373 /* Read interrupt register */
4374 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4376 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4377 tx_ring->vsi->base_vector - 1));
4379 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4381 /* Bail out if interrupts are disabled because napi_poll
4382 * execution in-progress or will get scheduled soon.
4383 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4385 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4388 head = i40e_get_head(tx_ring);
4390 tx_pending = i40e_get_tx_pending(tx_ring);
4392 /* HW is done executing descriptors, updated HEAD write back,
4393 * but SW hasn't processed those descriptors. If interrupt is
4394 * not generated from this point ON, it could result into
4395 * dev_watchdog detecting timeout on those netdev_queue,
4396 * hence proactively trigger SW interrupt.
4399 /* NAPI Poll didn't run and clear since it was set */
4400 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4401 &tx_ring->q_vector->hung_detected)) {
4402 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4403 vsi->seid, q_idx, tx_pending,
4404 tx_ring->next_to_clean, head,
4405 tx_ring->next_to_use,
4406 readl(tx_ring->tail));
4407 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4408 vsi->seid, q_idx, val);
4409 i40e_force_wb(vsi, tx_ring->q_vector);
4411 /* First Chance - detected possible hung */
4412 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4413 &tx_ring->q_vector->hung_detected);
4419 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4420 * @pf: pointer to PF struct
4422 * LAN VSI has netdev and netdev has TX queues. This function is to check
4423 * each of those TX queues if they are hung, trigger recovery by issuing
4426 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4428 struct net_device *netdev;
4429 struct i40e_vsi *vsi;
4432 /* Only for LAN VSI */
4433 vsi = pf->vsi[pf->lan_vsi];
4438 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4439 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4440 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4443 /* Make sure type is MAIN VSI */
4444 if (vsi->type != I40E_VSI_MAIN)
4447 netdev = vsi->netdev;
4451 /* Bail out if netif_carrier is not OK */
4452 if (!netif_carrier_ok(netdev))
4455 /* Go thru' TX queues for netdev */
4456 for (i = 0; i < netdev->num_tx_queues; i++) {
4457 struct netdev_queue *q;
4459 q = netdev_get_tx_queue(netdev, i);
4461 i40e_detect_recover_hung_queue(i, vsi);
4466 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4467 * @pf: pointer to PF
4469 * Get TC map for ISCSI PF type that will include iSCSI TC
4472 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4474 struct i40e_dcb_app_priority_table app;
4475 struct i40e_hw *hw = &pf->hw;
4476 u8 enabled_tc = 1; /* TC0 is always enabled */
4478 /* Get the iSCSI APP TLV */
4479 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4481 for (i = 0; i < dcbcfg->numapps; i++) {
4482 app = dcbcfg->app[i];
4483 if (app.selector == I40E_APP_SEL_TCPIP &&
4484 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4485 tc = dcbcfg->etscfg.prioritytable[app.priority];
4486 enabled_tc |= BIT(tc);
4495 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4496 * @dcbcfg: the corresponding DCBx configuration structure
4498 * Return the number of TCs from given DCBx configuration
4500 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4505 /* Scan the ETS Config Priority Table to find
4506 * traffic class enabled for a given priority
4507 * and use the traffic class index to get the
4508 * number of traffic classes enabled
4510 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4511 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4512 num_tc = dcbcfg->etscfg.prioritytable[i];
4515 /* Traffic class index starts from zero so
4516 * increment to return the actual count
4522 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4523 * @dcbcfg: the corresponding DCBx configuration structure
4525 * Query the current DCB configuration and return the number of
4526 * traffic classes enabled from the given DCBX config
4528 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4530 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4534 for (i = 0; i < num_tc; i++)
4535 enabled_tc |= BIT(i);
4541 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4542 * @pf: PF being queried
4544 * Return number of traffic classes enabled for the given PF
4546 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4548 struct i40e_hw *hw = &pf->hw;
4551 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4553 /* If DCB is not enabled then always in single TC */
4554 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4557 /* SFP mode will be enabled for all TCs on port */
4558 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4559 return i40e_dcb_get_num_tc(dcbcfg);
4561 /* MFP mode return count of enabled TCs for this PF */
4562 if (pf->hw.func_caps.iscsi)
4563 enabled_tc = i40e_get_iscsi_tc_map(pf);
4565 return 1; /* Only TC0 */
4567 /* At least have TC0 */
4568 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4569 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4570 if (enabled_tc & BIT(i))
4577 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4578 * @pf: PF being queried
4580 * Return a bitmap for first enabled traffic class for this PF.
4582 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4584 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4588 return 0x1; /* TC0 */
4590 /* Find the first enabled TC */
4591 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4592 if (enabled_tc & BIT(i))
4600 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4601 * @pf: PF being queried
4603 * Return a bitmap for enabled traffic classes for this PF.
4605 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4607 /* If DCB is not enabled for this PF then just return default TC */
4608 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4609 return i40e_pf_get_default_tc(pf);
4611 /* SFP mode we want PF to be enabled for all TCs */
4612 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4613 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4615 /* MFP enabled and iSCSI PF type */
4616 if (pf->hw.func_caps.iscsi)
4617 return i40e_get_iscsi_tc_map(pf);
4619 return i40e_pf_get_default_tc(pf);
4623 * i40e_vsi_get_bw_info - Query VSI BW Information
4624 * @vsi: the VSI being queried
4626 * Returns 0 on success, negative value on failure
4628 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4630 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4631 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4632 struct i40e_pf *pf = vsi->back;
4633 struct i40e_hw *hw = &pf->hw;
4638 /* Get the VSI level BW configuration */
4639 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4641 dev_info(&pf->pdev->dev,
4642 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4643 i40e_stat_str(&pf->hw, ret),
4644 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4648 /* Get the VSI level BW configuration per TC */
4649 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4652 dev_info(&pf->pdev->dev,
4653 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4654 i40e_stat_str(&pf->hw, ret),
4655 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4659 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4660 dev_info(&pf->pdev->dev,
4661 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4662 bw_config.tc_valid_bits,
4663 bw_ets_config.tc_valid_bits);
4664 /* Still continuing */
4667 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4668 vsi->bw_max_quanta = bw_config.max_bw;
4669 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4670 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4671 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4672 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4673 vsi->bw_ets_limit_credits[i] =
4674 le16_to_cpu(bw_ets_config.credits[i]);
4675 /* 3 bits out of 4 for each TC */
4676 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4683 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4684 * @vsi: the VSI being configured
4685 * @enabled_tc: TC bitmap
4686 * @bw_credits: BW shared credits per TC
4688 * Returns 0 on success, negative value on failure
4690 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4693 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4697 bw_data.tc_valid_bits = enabled_tc;
4698 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4699 bw_data.tc_bw_credits[i] = bw_share[i];
4701 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4704 dev_info(&vsi->back->pdev->dev,
4705 "AQ command Config VSI BW allocation per TC failed = %d\n",
4706 vsi->back->hw.aq.asq_last_status);
4710 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4711 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4717 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4718 * @vsi: the VSI being configured
4719 * @enabled_tc: TC map to be enabled
4722 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4724 struct net_device *netdev = vsi->netdev;
4725 struct i40e_pf *pf = vsi->back;
4726 struct i40e_hw *hw = &pf->hw;
4729 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4735 netdev_reset_tc(netdev);
4739 /* Set up actual enabled TCs on the VSI */
4740 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4743 /* set per TC queues for the VSI */
4744 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4745 /* Only set TC queues for enabled tcs
4747 * e.g. For a VSI that has TC0 and TC3 enabled the
4748 * enabled_tc bitmap would be 0x00001001; the driver
4749 * will set the numtc for netdev as 2 that will be
4750 * referenced by the netdev layer as TC 0 and 1.
4752 if (vsi->tc_config.enabled_tc & BIT(i))
4753 netdev_set_tc_queue(netdev,
4754 vsi->tc_config.tc_info[i].netdev_tc,
4755 vsi->tc_config.tc_info[i].qcount,
4756 vsi->tc_config.tc_info[i].qoffset);
4759 /* Assign UP2TC map for the VSI */
4760 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4761 /* Get the actual TC# for the UP */
4762 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4763 /* Get the mapped netdev TC# for the UP */
4764 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4765 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4770 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4771 * @vsi: the VSI being configured
4772 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4774 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4775 struct i40e_vsi_context *ctxt)
4777 /* copy just the sections touched not the entire info
4778 * since not all sections are valid as returned by
4781 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4782 memcpy(&vsi->info.queue_mapping,
4783 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4784 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4785 sizeof(vsi->info.tc_mapping));
4789 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4790 * @vsi: VSI to be configured
4791 * @enabled_tc: TC bitmap
4793 * This configures a particular VSI for TCs that are mapped to the
4794 * given TC bitmap. It uses default bandwidth share for TCs across
4795 * VSIs to configure TC for a particular VSI.
4798 * It is expected that the VSI queues have been quisced before calling
4801 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4803 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4804 struct i40e_vsi_context ctxt;
4808 /* Check if enabled_tc is same as existing or new TCs */
4809 if (vsi->tc_config.enabled_tc == enabled_tc)
4812 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4813 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4814 if (enabled_tc & BIT(i))
4818 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4820 dev_info(&vsi->back->pdev->dev,
4821 "Failed configuring TC map %d for VSI %d\n",
4822 enabled_tc, vsi->seid);
4826 /* Update Queue Pairs Mapping for currently enabled UPs */
4827 ctxt.seid = vsi->seid;
4828 ctxt.pf_num = vsi->back->hw.pf_id;
4830 ctxt.uplink_seid = vsi->uplink_seid;
4831 ctxt.info = vsi->info;
4832 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4834 /* Update the VSI after updating the VSI queue-mapping information */
4835 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4837 dev_info(&vsi->back->pdev->dev,
4838 "Update vsi tc config failed, err %s aq_err %s\n",
4839 i40e_stat_str(&vsi->back->hw, ret),
4840 i40e_aq_str(&vsi->back->hw,
4841 vsi->back->hw.aq.asq_last_status));
4844 /* update the local VSI info with updated queue map */
4845 i40e_vsi_update_queue_map(vsi, &ctxt);
4846 vsi->info.valid_sections = 0;
4848 /* Update current VSI BW information */
4849 ret = i40e_vsi_get_bw_info(vsi);
4851 dev_info(&vsi->back->pdev->dev,
4852 "Failed updating vsi bw info, err %s aq_err %s\n",
4853 i40e_stat_str(&vsi->back->hw, ret),
4854 i40e_aq_str(&vsi->back->hw,
4855 vsi->back->hw.aq.asq_last_status));
4859 /* Update the netdev TC setup */
4860 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4866 * i40e_veb_config_tc - Configure TCs for given VEB
4868 * @enabled_tc: TC bitmap
4870 * Configures given TC bitmap for VEB (switching) element
4872 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4874 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4875 struct i40e_pf *pf = veb->pf;
4879 /* No TCs or already enabled TCs just return */
4880 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4883 bw_data.tc_valid_bits = enabled_tc;
4884 /* bw_data.absolute_credits is not set (relative) */
4886 /* Enable ETS TCs with equal BW Share for now */
4887 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4888 if (enabled_tc & BIT(i))
4889 bw_data.tc_bw_share_credits[i] = 1;
4892 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4895 dev_info(&pf->pdev->dev,
4896 "VEB bw config failed, err %s aq_err %s\n",
4897 i40e_stat_str(&pf->hw, ret),
4898 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4902 /* Update the BW information */
4903 ret = i40e_veb_get_bw_info(veb);
4905 dev_info(&pf->pdev->dev,
4906 "Failed getting veb bw config, err %s aq_err %s\n",
4907 i40e_stat_str(&pf->hw, ret),
4908 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4915 #ifdef CONFIG_I40E_DCB
4917 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4920 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4921 * the caller would've quiesce all the VSIs before calling
4924 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4930 /* Enable the TCs available on PF to all VEBs */
4931 tc_map = i40e_pf_get_tc_map(pf);
4932 for (v = 0; v < I40E_MAX_VEB; v++) {
4935 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4937 dev_info(&pf->pdev->dev,
4938 "Failed configuring TC for VEB seid=%d\n",
4940 /* Will try to configure as many components */
4944 /* Update each VSI */
4945 for (v = 0; v < pf->num_alloc_vsi; v++) {
4949 /* - Enable all TCs for the LAN VSI
4951 * - For FCoE VSI only enable the TC configured
4952 * as per the APP TLV
4954 * - For all others keep them at TC0 for now
4956 if (v == pf->lan_vsi)
4957 tc_map = i40e_pf_get_tc_map(pf);
4959 tc_map = i40e_pf_get_default_tc(pf);
4961 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4962 tc_map = i40e_get_fcoe_tc_map(pf);
4963 #endif /* #ifdef I40E_FCOE */
4965 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4967 dev_info(&pf->pdev->dev,
4968 "Failed configuring TC for VSI seid=%d\n",
4970 /* Will try to configure as many components */
4972 /* Re-configure VSI vectors based on updated TC map */
4973 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4974 if (pf->vsi[v]->netdev)
4975 i40e_dcbnl_set_all(pf->vsi[v]);
4981 * i40e_resume_port_tx - Resume port Tx
4984 * Resume a port's Tx and issue a PF reset in case of failure to
4987 static int i40e_resume_port_tx(struct i40e_pf *pf)
4989 struct i40e_hw *hw = &pf->hw;
4992 ret = i40e_aq_resume_port_tx(hw, NULL);
4994 dev_info(&pf->pdev->dev,
4995 "Resume Port Tx failed, err %s aq_err %s\n",
4996 i40e_stat_str(&pf->hw, ret),
4997 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4998 /* Schedule PF reset to recover */
4999 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5000 i40e_service_event_schedule(pf);
5007 * i40e_init_pf_dcb - Initialize DCB configuration
5008 * @pf: PF being configured
5010 * Query the current DCB configuration and cache it
5011 * in the hardware structure
5013 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5015 struct i40e_hw *hw = &pf->hw;
5018 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5019 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5020 (pf->hw.aq.fw_maj_ver < 4))
5023 /* Get the initial DCB configuration */
5024 err = i40e_init_dcb(hw);
5026 /* Device/Function is not DCBX capable */
5027 if ((!hw->func_caps.dcb) ||
5028 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5029 dev_info(&pf->pdev->dev,
5030 "DCBX offload is not supported or is disabled for this PF.\n");
5032 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5036 /* When status is not DISABLED then DCBX in FW */
5037 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5038 DCB_CAP_DCBX_VER_IEEE;
5040 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5041 /* Enable DCB tagging only when more than one TC */
5042 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5043 pf->flags |= I40E_FLAG_DCB_ENABLED;
5044 dev_dbg(&pf->pdev->dev,
5045 "DCBX offload is supported for this PF.\n");
5048 dev_info(&pf->pdev->dev,
5049 "Query for DCB configuration failed, err %s aq_err %s\n",
5050 i40e_stat_str(&pf->hw, err),
5051 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5057 #endif /* CONFIG_I40E_DCB */
5058 #define SPEED_SIZE 14
5061 * i40e_print_link_message - print link up or down
5062 * @vsi: the VSI for which link needs a message
5064 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5066 char *speed = "Unknown";
5067 char *fc = "Unknown";
5069 if (vsi->current_isup == isup)
5071 vsi->current_isup = isup;
5073 netdev_info(vsi->netdev, "NIC Link is Down\n");
5077 /* Warn user if link speed on NPAR enabled partition is not at
5080 if (vsi->back->hw.func_caps.npar_enable &&
5081 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5082 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5083 netdev_warn(vsi->netdev,
5084 "The partition detected link speed that is less than 10Gbps\n");
5086 switch (vsi->back->hw.phy.link_info.link_speed) {
5087 case I40E_LINK_SPEED_40GB:
5090 case I40E_LINK_SPEED_20GB:
5093 case I40E_LINK_SPEED_10GB:
5096 case I40E_LINK_SPEED_1GB:
5099 case I40E_LINK_SPEED_100MB:
5106 switch (vsi->back->hw.fc.current_mode) {
5110 case I40E_FC_TX_PAUSE:
5113 case I40E_FC_RX_PAUSE:
5121 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5126 * i40e_up_complete - Finish the last steps of bringing up a connection
5127 * @vsi: the VSI being configured
5129 static int i40e_up_complete(struct i40e_vsi *vsi)
5131 struct i40e_pf *pf = vsi->back;
5134 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5135 i40e_vsi_configure_msix(vsi);
5137 i40e_configure_msi_and_legacy(vsi);
5140 err = i40e_vsi_control_rings(vsi, true);
5144 clear_bit(__I40E_DOWN, &vsi->state);
5145 i40e_napi_enable_all(vsi);
5146 i40e_vsi_enable_irq(vsi);
5148 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5150 i40e_print_link_message(vsi, true);
5151 netif_tx_start_all_queues(vsi->netdev);
5152 netif_carrier_on(vsi->netdev);
5153 } else if (vsi->netdev) {
5154 i40e_print_link_message(vsi, false);
5155 /* need to check for qualified module here*/
5156 if ((pf->hw.phy.link_info.link_info &
5157 I40E_AQ_MEDIA_AVAILABLE) &&
5158 (!(pf->hw.phy.link_info.an_info &
5159 I40E_AQ_QUALIFIED_MODULE)))
5160 netdev_err(vsi->netdev,
5161 "the driver failed to link because an unqualified module was detected.");
5164 /* replay FDIR SB filters */
5165 if (vsi->type == I40E_VSI_FDIR) {
5166 /* reset fd counters */
5167 pf->fd_add_err = pf->fd_atr_cnt = 0;
5168 if (pf->fd_tcp_rule > 0) {
5169 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5170 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5171 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5172 pf->fd_tcp_rule = 0;
5174 i40e_fdir_filter_restore(vsi);
5176 i40e_service_event_schedule(pf);
5182 * i40e_vsi_reinit_locked - Reset the VSI
5183 * @vsi: the VSI being configured
5185 * Rebuild the ring structs after some configuration
5186 * has changed, e.g. MTU size.
5188 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5190 struct i40e_pf *pf = vsi->back;
5192 WARN_ON(in_interrupt());
5193 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5194 usleep_range(1000, 2000);
5197 /* Give a VF some time to respond to the reset. The
5198 * two second wait is based upon the watchdog cycle in
5201 if (vsi->type == I40E_VSI_SRIOV)
5204 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5208 * i40e_up - Bring the connection back up after being down
5209 * @vsi: the VSI being configured
5211 int i40e_up(struct i40e_vsi *vsi)
5215 err = i40e_vsi_configure(vsi);
5217 err = i40e_up_complete(vsi);
5223 * i40e_down - Shutdown the connection processing
5224 * @vsi: the VSI being stopped
5226 void i40e_down(struct i40e_vsi *vsi)
5230 /* It is assumed that the caller of this function
5231 * sets the vsi->state __I40E_DOWN bit.
5234 netif_carrier_off(vsi->netdev);
5235 netif_tx_disable(vsi->netdev);
5237 i40e_vsi_disable_irq(vsi);
5238 i40e_vsi_control_rings(vsi, false);
5239 i40e_napi_disable_all(vsi);
5241 for (i = 0; i < vsi->num_queue_pairs; i++) {
5242 i40e_clean_tx_ring(vsi->tx_rings[i]);
5243 i40e_clean_rx_ring(vsi->rx_rings[i]);
5248 * i40e_setup_tc - configure multiple traffic classes
5249 * @netdev: net device to configure
5250 * @tc: number of traffic classes to enable
5253 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5255 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5258 struct i40e_netdev_priv *np = netdev_priv(netdev);
5259 struct i40e_vsi *vsi = np->vsi;
5260 struct i40e_pf *pf = vsi->back;
5265 /* Check if DCB enabled to continue */
5266 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5267 netdev_info(netdev, "DCB is not enabled for adapter\n");
5271 /* Check if MFP enabled */
5272 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5273 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5277 /* Check whether tc count is within enabled limit */
5278 if (tc > i40e_pf_get_num_tc(pf)) {
5279 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5283 /* Generate TC map for number of tc requested */
5284 for (i = 0; i < tc; i++)
5285 enabled_tc |= BIT(i);
5287 /* Requesting same TC configuration as already enabled */
5288 if (enabled_tc == vsi->tc_config.enabled_tc)
5291 /* Quiesce VSI queues */
5292 i40e_quiesce_vsi(vsi);
5294 /* Configure VSI for enabled TCs */
5295 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5297 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5303 i40e_unquiesce_vsi(vsi);
5310 * i40e_open - Called when a network interface is made active
5311 * @netdev: network interface device structure
5313 * The open entry point is called when a network interface is made
5314 * active by the system (IFF_UP). At this point all resources needed
5315 * for transmit and receive operations are allocated, the interrupt
5316 * handler is registered with the OS, the netdev watchdog subtask is
5317 * enabled, and the stack is notified that the interface is ready.
5319 * Returns 0 on success, negative value on failure
5321 int i40e_open(struct net_device *netdev)
5323 struct i40e_netdev_priv *np = netdev_priv(netdev);
5324 struct i40e_vsi *vsi = np->vsi;
5325 struct i40e_pf *pf = vsi->back;
5328 /* disallow open during test or if eeprom is broken */
5329 if (test_bit(__I40E_TESTING, &pf->state) ||
5330 test_bit(__I40E_BAD_EEPROM, &pf->state))
5333 netif_carrier_off(netdev);
5335 err = i40e_vsi_open(vsi);
5339 /* configure global TSO hardware offload settings */
5340 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5341 TCP_FLAG_FIN) >> 16);
5342 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5344 TCP_FLAG_CWR) >> 16);
5345 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5347 #ifdef CONFIG_I40E_VXLAN
5348 vxlan_get_rx_port(netdev);
5350 #ifdef CONFIG_I40E_GENEVE
5351 geneve_get_rx_port(netdev);
5359 * @vsi: the VSI to open
5361 * Finish initialization of the VSI.
5363 * Returns 0 on success, negative value on failure
5365 int i40e_vsi_open(struct i40e_vsi *vsi)
5367 struct i40e_pf *pf = vsi->back;
5368 char int_name[I40E_INT_NAME_STR_LEN];
5371 /* allocate descriptors */
5372 err = i40e_vsi_setup_tx_resources(vsi);
5375 err = i40e_vsi_setup_rx_resources(vsi);
5379 err = i40e_vsi_configure(vsi);
5384 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5385 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5386 err = i40e_vsi_request_irq(vsi, int_name);
5390 /* Notify the stack of the actual queue counts. */
5391 err = netif_set_real_num_tx_queues(vsi->netdev,
5392 vsi->num_queue_pairs);
5394 goto err_set_queues;
5396 err = netif_set_real_num_rx_queues(vsi->netdev,
5397 vsi->num_queue_pairs);
5399 goto err_set_queues;
5401 } else if (vsi->type == I40E_VSI_FDIR) {
5402 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5403 dev_driver_string(&pf->pdev->dev),
5404 dev_name(&pf->pdev->dev));
5405 err = i40e_vsi_request_irq(vsi, int_name);
5412 err = i40e_up_complete(vsi);
5414 goto err_up_complete;
5421 i40e_vsi_free_irq(vsi);
5423 i40e_vsi_free_rx_resources(vsi);
5425 i40e_vsi_free_tx_resources(vsi);
5426 if (vsi == pf->vsi[pf->lan_vsi])
5427 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5433 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5434 * @pf: Pointer to PF
5436 * This function destroys the hlist where all the Flow Director
5437 * filters were saved.
5439 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5441 struct i40e_fdir_filter *filter;
5442 struct hlist_node *node2;
5444 hlist_for_each_entry_safe(filter, node2,
5445 &pf->fdir_filter_list, fdir_node) {
5446 hlist_del(&filter->fdir_node);
5449 pf->fdir_pf_active_filters = 0;
5453 * i40e_close - Disables a network interface
5454 * @netdev: network interface device structure
5456 * The close entry point is called when an interface is de-activated
5457 * by the OS. The hardware is still under the driver's control, but
5458 * this netdev interface is disabled.
5460 * Returns 0, this is not allowed to fail
5463 int i40e_close(struct net_device *netdev)
5465 static int i40e_close(struct net_device *netdev)
5468 struct i40e_netdev_priv *np = netdev_priv(netdev);
5469 struct i40e_vsi *vsi = np->vsi;
5471 i40e_vsi_close(vsi);
5477 * i40e_do_reset - Start a PF or Core Reset sequence
5478 * @pf: board private structure
5479 * @reset_flags: which reset is requested
5481 * The essential difference in resets is that the PF Reset
5482 * doesn't clear the packet buffers, doesn't reset the PE
5483 * firmware, and doesn't bother the other PFs on the chip.
5485 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5489 WARN_ON(in_interrupt());
5491 if (i40e_check_asq_alive(&pf->hw))
5492 i40e_vc_notify_reset(pf);
5494 /* do the biggest reset indicated */
5495 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5497 /* Request a Global Reset
5499 * This will start the chip's countdown to the actual full
5500 * chip reset event, and a warning interrupt to be sent
5501 * to all PFs, including the requestor. Our handler
5502 * for the warning interrupt will deal with the shutdown
5503 * and recovery of the switch setup.
5505 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5506 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5507 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5508 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5510 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5512 /* Request a Core Reset
5514 * Same as Global Reset, except does *not* include the MAC/PHY
5516 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5517 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5518 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5519 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5520 i40e_flush(&pf->hw);
5522 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5524 /* Request a PF Reset
5526 * Resets only the PF-specific registers
5528 * This goes directly to the tear-down and rebuild of
5529 * the switch, since we need to do all the recovery as
5530 * for the Core Reset.
5532 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5533 i40e_handle_reset_warning(pf);
5535 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5538 /* Find the VSI(s) that requested a re-init */
5539 dev_info(&pf->pdev->dev,
5540 "VSI reinit requested\n");
5541 for (v = 0; v < pf->num_alloc_vsi; v++) {
5542 struct i40e_vsi *vsi = pf->vsi[v];
5545 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5546 i40e_vsi_reinit_locked(pf->vsi[v]);
5547 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5550 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5553 /* Find the VSI(s) that needs to be brought down */
5554 dev_info(&pf->pdev->dev, "VSI down requested\n");
5555 for (v = 0; v < pf->num_alloc_vsi; v++) {
5556 struct i40e_vsi *vsi = pf->vsi[v];
5559 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5560 set_bit(__I40E_DOWN, &vsi->state);
5562 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5566 dev_info(&pf->pdev->dev,
5567 "bad reset request 0x%08x\n", reset_flags);
5571 #ifdef CONFIG_I40E_DCB
5573 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5574 * @pf: board private structure
5575 * @old_cfg: current DCB config
5576 * @new_cfg: new DCB config
5578 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5579 struct i40e_dcbx_config *old_cfg,
5580 struct i40e_dcbx_config *new_cfg)
5582 bool need_reconfig = false;
5584 /* Check if ETS configuration has changed */
5585 if (memcmp(&new_cfg->etscfg,
5587 sizeof(new_cfg->etscfg))) {
5588 /* If Priority Table has changed reconfig is needed */
5589 if (memcmp(&new_cfg->etscfg.prioritytable,
5590 &old_cfg->etscfg.prioritytable,
5591 sizeof(new_cfg->etscfg.prioritytable))) {
5592 need_reconfig = true;
5593 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5596 if (memcmp(&new_cfg->etscfg.tcbwtable,
5597 &old_cfg->etscfg.tcbwtable,
5598 sizeof(new_cfg->etscfg.tcbwtable)))
5599 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5601 if (memcmp(&new_cfg->etscfg.tsatable,
5602 &old_cfg->etscfg.tsatable,
5603 sizeof(new_cfg->etscfg.tsatable)))
5604 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5607 /* Check if PFC configuration has changed */
5608 if (memcmp(&new_cfg->pfc,
5610 sizeof(new_cfg->pfc))) {
5611 need_reconfig = true;
5612 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5615 /* Check if APP Table has changed */
5616 if (memcmp(&new_cfg->app,
5618 sizeof(new_cfg->app))) {
5619 need_reconfig = true;
5620 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5623 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5624 return need_reconfig;
5628 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5629 * @pf: board private structure
5630 * @e: event info posted on ARQ
5632 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5633 struct i40e_arq_event_info *e)
5635 struct i40e_aqc_lldp_get_mib *mib =
5636 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5637 struct i40e_hw *hw = &pf->hw;
5638 struct i40e_dcbx_config tmp_dcbx_cfg;
5639 bool need_reconfig = false;
5643 /* Not DCB capable or capability disabled */
5644 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5647 /* Ignore if event is not for Nearest Bridge */
5648 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5649 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5650 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5651 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5654 /* Check MIB Type and return if event for Remote MIB update */
5655 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5656 dev_dbg(&pf->pdev->dev,
5657 "LLDP event mib type %s\n", type ? "remote" : "local");
5658 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5659 /* Update the remote cached instance and return */
5660 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5661 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5662 &hw->remote_dcbx_config);
5666 /* Store the old configuration */
5667 tmp_dcbx_cfg = hw->local_dcbx_config;
5669 /* Reset the old DCBx configuration data */
5670 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5671 /* Get updated DCBX data from firmware */
5672 ret = i40e_get_dcb_config(&pf->hw);
5674 dev_info(&pf->pdev->dev,
5675 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5676 i40e_stat_str(&pf->hw, ret),
5677 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5681 /* No change detected in DCBX configs */
5682 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5683 sizeof(tmp_dcbx_cfg))) {
5684 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5688 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5689 &hw->local_dcbx_config);
5691 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5696 /* Enable DCB tagging only when more than one TC */
5697 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5698 pf->flags |= I40E_FLAG_DCB_ENABLED;
5700 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5702 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5703 /* Reconfiguration needed quiesce all VSIs */
5704 i40e_pf_quiesce_all_vsi(pf);
5706 /* Changes in configuration update VEB/VSI */
5707 i40e_dcb_reconfigure(pf);
5709 ret = i40e_resume_port_tx(pf);
5711 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5712 /* In case of error no point in resuming VSIs */
5716 /* Wait for the PF's Tx queues to be disabled */
5717 ret = i40e_pf_wait_txq_disabled(pf);
5719 /* Schedule PF reset to recover */
5720 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5721 i40e_service_event_schedule(pf);
5723 i40e_pf_unquiesce_all_vsi(pf);
5729 #endif /* CONFIG_I40E_DCB */
5732 * i40e_do_reset_safe - Protected reset path for userland calls.
5733 * @pf: board private structure
5734 * @reset_flags: which reset is requested
5737 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5740 i40e_do_reset(pf, reset_flags);
5745 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5746 * @pf: board private structure
5747 * @e: event info posted on ARQ
5749 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5752 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5753 struct i40e_arq_event_info *e)
5755 struct i40e_aqc_lan_overflow *data =
5756 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5757 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5758 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5759 struct i40e_hw *hw = &pf->hw;
5763 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5766 /* Queue belongs to VF, find the VF and issue VF reset */
5767 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5768 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5769 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5770 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5771 vf_id -= hw->func_caps.vf_base_id;
5772 vf = &pf->vf[vf_id];
5773 i40e_vc_notify_vf_reset(vf);
5774 /* Allow VF to process pending reset notification */
5776 i40e_reset_vf(vf, false);
5781 * i40e_service_event_complete - Finish up the service event
5782 * @pf: board private structure
5784 static void i40e_service_event_complete(struct i40e_pf *pf)
5786 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5788 /* flush memory to make sure state is correct before next watchog */
5789 smp_mb__before_atomic();
5790 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5794 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5795 * @pf: board private structure
5797 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5801 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5802 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5807 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5808 * @pf: board private structure
5810 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5814 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5815 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5816 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5817 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5822 * i40e_get_global_fd_count - Get total FD filters programmed on device
5823 * @pf: board private structure
5825 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5829 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5830 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5831 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5832 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5837 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5838 * @pf: board private structure
5840 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5842 struct i40e_fdir_filter *filter;
5843 u32 fcnt_prog, fcnt_avail;
5844 struct hlist_node *node;
5846 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5849 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5852 fcnt_prog = i40e_get_global_fd_count(pf);
5853 fcnt_avail = pf->fdir_pf_filter_count;
5854 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5855 (pf->fd_add_err == 0) ||
5856 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5857 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5858 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5859 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5860 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5861 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5864 /* Wait for some more space to be available to turn on ATR */
5865 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5866 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5867 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5868 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5869 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5870 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5874 /* if hw had a problem adding a filter, delete it */
5875 if (pf->fd_inv > 0) {
5876 hlist_for_each_entry_safe(filter, node,
5877 &pf->fdir_filter_list, fdir_node) {
5878 if (filter->fd_id == pf->fd_inv) {
5879 hlist_del(&filter->fdir_node);
5881 pf->fdir_pf_active_filters--;
5887 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5888 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5890 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5891 * @pf: board private structure
5893 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5895 unsigned long min_flush_time;
5896 int flush_wait_retry = 50;
5897 bool disable_atr = false;
5901 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5904 if (!time_after(jiffies, pf->fd_flush_timestamp +
5905 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5908 /* If the flush is happening too quick and we have mostly SB rules we
5909 * should not re-enable ATR for some time.
5911 min_flush_time = pf->fd_flush_timestamp +
5912 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5913 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5915 if (!(time_after(jiffies, min_flush_time)) &&
5916 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5917 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5918 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5922 pf->fd_flush_timestamp = jiffies;
5923 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5924 /* flush all filters */
5925 wr32(&pf->hw, I40E_PFQF_CTL_1,
5926 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5927 i40e_flush(&pf->hw);
5931 /* Check FD flush status every 5-6msec */
5932 usleep_range(5000, 6000);
5933 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5934 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5936 } while (flush_wait_retry--);
5937 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5938 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5940 /* replay sideband filters */
5941 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5943 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5944 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5945 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5946 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5952 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5953 * @pf: board private structure
5955 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5957 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5960 /* We can see up to 256 filter programming desc in transit if the filters are
5961 * being applied really fast; before we see the first
5962 * filter miss error on Rx queue 0. Accumulating enough error messages before
5963 * reacting will make sure we don't cause flush too often.
5965 #define I40E_MAX_FD_PROGRAM_ERROR 256
5968 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5969 * @pf: board private structure
5971 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5974 /* if interface is down do nothing */
5975 if (test_bit(__I40E_DOWN, &pf->state))
5978 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5981 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5982 i40e_fdir_flush_and_replay(pf);
5984 i40e_fdir_check_and_reenable(pf);
5989 * i40e_vsi_link_event - notify VSI of a link event
5990 * @vsi: vsi to be notified
5991 * @link_up: link up or down
5993 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5995 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5998 switch (vsi->type) {
6003 if (!vsi->netdev || !vsi->netdev_registered)
6007 netif_carrier_on(vsi->netdev);
6008 netif_tx_wake_all_queues(vsi->netdev);
6010 netif_carrier_off(vsi->netdev);
6011 netif_tx_stop_all_queues(vsi->netdev);
6015 case I40E_VSI_SRIOV:
6016 case I40E_VSI_VMDQ2:
6018 case I40E_VSI_MIRROR:
6020 /* there is no notification for other VSIs */
6026 * i40e_veb_link_event - notify elements on the veb of a link event
6027 * @veb: veb to be notified
6028 * @link_up: link up or down
6030 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6035 if (!veb || !veb->pf)
6039 /* depth first... */
6040 for (i = 0; i < I40E_MAX_VEB; i++)
6041 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6042 i40e_veb_link_event(pf->veb[i], link_up);
6044 /* ... now the local VSIs */
6045 for (i = 0; i < pf->num_alloc_vsi; i++)
6046 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6047 i40e_vsi_link_event(pf->vsi[i], link_up);
6051 * i40e_link_event - Update netif_carrier status
6052 * @pf: board private structure
6054 static void i40e_link_event(struct i40e_pf *pf)
6056 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6057 u8 new_link_speed, old_link_speed;
6059 bool new_link, old_link;
6061 /* save off old link status information */
6062 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6064 /* set this to force the get_link_status call to refresh state */
6065 pf->hw.phy.get_link_info = true;
6067 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6069 status = i40e_get_link_status(&pf->hw, &new_link);
6071 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6076 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6077 new_link_speed = pf->hw.phy.link_info.link_speed;
6079 if (new_link == old_link &&
6080 new_link_speed == old_link_speed &&
6081 (test_bit(__I40E_DOWN, &vsi->state) ||
6082 new_link == netif_carrier_ok(vsi->netdev)))
6085 if (!test_bit(__I40E_DOWN, &vsi->state))
6086 i40e_print_link_message(vsi, new_link);
6088 /* Notify the base of the switch tree connected to
6089 * the link. Floating VEBs are not notified.
6091 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6092 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6094 i40e_vsi_link_event(vsi, new_link);
6097 i40e_vc_notify_link_state(pf);
6099 if (pf->flags & I40E_FLAG_PTP)
6100 i40e_ptp_set_increment(pf);
6104 * i40e_watchdog_subtask - periodic checks not using event driven response
6105 * @pf: board private structure
6107 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6111 /* if interface is down do nothing */
6112 if (test_bit(__I40E_DOWN, &pf->state) ||
6113 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6116 /* make sure we don't do these things too often */
6117 if (time_before(jiffies, (pf->service_timer_previous +
6118 pf->service_timer_period)))
6120 pf->service_timer_previous = jiffies;
6122 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6123 i40e_link_event(pf);
6125 /* Update the stats for active netdevs so the network stack
6126 * can look at updated numbers whenever it cares to
6128 for (i = 0; i < pf->num_alloc_vsi; i++)
6129 if (pf->vsi[i] && pf->vsi[i]->netdev)
6130 i40e_update_stats(pf->vsi[i]);
6132 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6133 /* Update the stats for the active switching components */
6134 for (i = 0; i < I40E_MAX_VEB; i++)
6136 i40e_update_veb_stats(pf->veb[i]);
6139 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6143 * i40e_reset_subtask - Set up for resetting the device and driver
6144 * @pf: board private structure
6146 static void i40e_reset_subtask(struct i40e_pf *pf)
6148 u32 reset_flags = 0;
6151 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6152 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6153 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6155 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6156 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6157 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6159 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6160 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6161 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6163 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6164 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6165 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6167 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6168 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6169 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6172 /* If there's a recovery already waiting, it takes
6173 * precedence before starting a new reset sequence.
6175 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6176 i40e_handle_reset_warning(pf);
6180 /* If we're already down or resetting, just bail */
6182 !test_bit(__I40E_DOWN, &pf->state) &&
6183 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6184 i40e_do_reset(pf, reset_flags);
6191 * i40e_handle_link_event - Handle link event
6192 * @pf: board private structure
6193 * @e: event info posted on ARQ
6195 static void i40e_handle_link_event(struct i40e_pf *pf,
6196 struct i40e_arq_event_info *e)
6198 struct i40e_aqc_get_link_status *status =
6199 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6201 /* Do a new status request to re-enable LSE reporting
6202 * and load new status information into the hw struct
6203 * This completely ignores any state information
6204 * in the ARQ event info, instead choosing to always
6205 * issue the AQ update link status command.
6207 i40e_link_event(pf);
6209 /* check for unqualified module, if link is down */
6210 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6211 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6212 (!(status->link_info & I40E_AQ_LINK_UP)))
6213 dev_err(&pf->pdev->dev,
6214 "The driver failed to link because an unqualified module was detected.\n");
6218 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6219 * @pf: board private structure
6221 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6223 struct i40e_arq_event_info event;
6224 struct i40e_hw *hw = &pf->hw;
6231 /* Do not run clean AQ when PF reset fails */
6232 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6235 /* check for error indications */
6236 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6238 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6239 if (hw->debug_mask & I40E_DEBUG_AQ)
6240 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6241 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6243 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6244 if (hw->debug_mask & I40E_DEBUG_AQ)
6245 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6246 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6248 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6249 if (hw->debug_mask & I40E_DEBUG_AQ)
6250 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6251 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6254 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6256 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6258 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6259 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6260 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6261 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6263 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6264 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6265 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6266 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6268 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6269 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6270 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6271 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6274 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6276 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6277 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6282 ret = i40e_clean_arq_element(hw, &event, &pending);
6283 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6286 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6290 opcode = le16_to_cpu(event.desc.opcode);
6293 case i40e_aqc_opc_get_link_status:
6294 i40e_handle_link_event(pf, &event);
6296 case i40e_aqc_opc_send_msg_to_pf:
6297 ret = i40e_vc_process_vf_msg(pf,
6298 le16_to_cpu(event.desc.retval),
6299 le32_to_cpu(event.desc.cookie_high),
6300 le32_to_cpu(event.desc.cookie_low),
6304 case i40e_aqc_opc_lldp_update_mib:
6305 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6306 #ifdef CONFIG_I40E_DCB
6308 ret = i40e_handle_lldp_event(pf, &event);
6310 #endif /* CONFIG_I40E_DCB */
6312 case i40e_aqc_opc_event_lan_overflow:
6313 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6314 i40e_handle_lan_overflow_event(pf, &event);
6316 case i40e_aqc_opc_send_msg_to_peer:
6317 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6319 case i40e_aqc_opc_nvm_erase:
6320 case i40e_aqc_opc_nvm_update:
6321 case i40e_aqc_opc_oem_post_update:
6322 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6325 dev_info(&pf->pdev->dev,
6326 "ARQ Error: Unknown event 0x%04x received\n",
6330 } while (pending && (i++ < pf->adminq_work_limit));
6332 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6333 /* re-enable Admin queue interrupt cause */
6334 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6335 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6336 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6339 kfree(event.msg_buf);
6343 * i40e_verify_eeprom - make sure eeprom is good to use
6344 * @pf: board private structure
6346 static void i40e_verify_eeprom(struct i40e_pf *pf)
6350 err = i40e_diag_eeprom_test(&pf->hw);
6352 /* retry in case of garbage read */
6353 err = i40e_diag_eeprom_test(&pf->hw);
6355 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6357 set_bit(__I40E_BAD_EEPROM, &pf->state);
6361 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6362 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6363 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6368 * i40e_enable_pf_switch_lb
6369 * @pf: pointer to the PF structure
6371 * enable switch loop back or die - no point in a return value
6373 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6375 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6376 struct i40e_vsi_context ctxt;
6379 ctxt.seid = pf->main_vsi_seid;
6380 ctxt.pf_num = pf->hw.pf_id;
6382 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6384 dev_info(&pf->pdev->dev,
6385 "couldn't get PF vsi config, err %s aq_err %s\n",
6386 i40e_stat_str(&pf->hw, ret),
6387 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6390 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6391 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6392 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6394 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6396 dev_info(&pf->pdev->dev,
6397 "update vsi switch failed, err %s aq_err %s\n",
6398 i40e_stat_str(&pf->hw, ret),
6399 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6404 * i40e_disable_pf_switch_lb
6405 * @pf: pointer to the PF structure
6407 * disable switch loop back or die - no point in a return value
6409 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6411 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6412 struct i40e_vsi_context ctxt;
6415 ctxt.seid = pf->main_vsi_seid;
6416 ctxt.pf_num = pf->hw.pf_id;
6418 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6420 dev_info(&pf->pdev->dev,
6421 "couldn't get PF vsi config, err %s aq_err %s\n",
6422 i40e_stat_str(&pf->hw, ret),
6423 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6426 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6427 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6428 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6430 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6432 dev_info(&pf->pdev->dev,
6433 "update vsi switch failed, err %s aq_err %s\n",
6434 i40e_stat_str(&pf->hw, ret),
6435 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6440 * i40e_config_bridge_mode - Configure the HW bridge mode
6441 * @veb: pointer to the bridge instance
6443 * Configure the loop back mode for the LAN VSI that is downlink to the
6444 * specified HW bridge instance. It is expected this function is called
6445 * when a new HW bridge is instantiated.
6447 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6449 struct i40e_pf *pf = veb->pf;
6451 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6452 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6453 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6454 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6455 i40e_disable_pf_switch_lb(pf);
6457 i40e_enable_pf_switch_lb(pf);
6461 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6462 * @veb: pointer to the VEB instance
6464 * This is a recursive function that first builds the attached VSIs then
6465 * recurses in to build the next layer of VEB. We track the connections
6466 * through our own index numbers because the seid's from the HW could
6467 * change across the reset.
6469 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6471 struct i40e_vsi *ctl_vsi = NULL;
6472 struct i40e_pf *pf = veb->pf;
6476 /* build VSI that owns this VEB, temporarily attached to base VEB */
6477 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6479 pf->vsi[v]->veb_idx == veb->idx &&
6480 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6481 ctl_vsi = pf->vsi[v];
6486 dev_info(&pf->pdev->dev,
6487 "missing owner VSI for veb_idx %d\n", veb->idx);
6489 goto end_reconstitute;
6491 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6492 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6493 ret = i40e_add_vsi(ctl_vsi);
6495 dev_info(&pf->pdev->dev,
6496 "rebuild of veb_idx %d owner VSI failed: %d\n",
6498 goto end_reconstitute;
6500 i40e_vsi_reset_stats(ctl_vsi);
6502 /* create the VEB in the switch and move the VSI onto the VEB */
6503 ret = i40e_add_veb(veb, ctl_vsi);
6505 goto end_reconstitute;
6507 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6508 veb->bridge_mode = BRIDGE_MODE_VEB;
6510 veb->bridge_mode = BRIDGE_MODE_VEPA;
6511 i40e_config_bridge_mode(veb);
6513 /* create the remaining VSIs attached to this VEB */
6514 for (v = 0; v < pf->num_alloc_vsi; v++) {
6515 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6518 if (pf->vsi[v]->veb_idx == veb->idx) {
6519 struct i40e_vsi *vsi = pf->vsi[v];
6521 vsi->uplink_seid = veb->seid;
6522 ret = i40e_add_vsi(vsi);
6524 dev_info(&pf->pdev->dev,
6525 "rebuild of vsi_idx %d failed: %d\n",
6527 goto end_reconstitute;
6529 i40e_vsi_reset_stats(vsi);
6533 /* create any VEBs attached to this VEB - RECURSION */
6534 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6535 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6536 pf->veb[veb_idx]->uplink_seid = veb->seid;
6537 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6548 * i40e_get_capabilities - get info about the HW
6549 * @pf: the PF struct
6551 static int i40e_get_capabilities(struct i40e_pf *pf)
6553 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6558 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6560 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6564 /* this loads the data into the hw struct for us */
6565 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6567 i40e_aqc_opc_list_func_capabilities,
6569 /* data loaded, buffer no longer needed */
6572 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6573 /* retry with a larger buffer */
6574 buf_len = data_size;
6575 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6576 dev_info(&pf->pdev->dev,
6577 "capability discovery failed, err %s aq_err %s\n",
6578 i40e_stat_str(&pf->hw, err),
6579 i40e_aq_str(&pf->hw,
6580 pf->hw.aq.asq_last_status));
6585 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6586 dev_info(&pf->pdev->dev,
6587 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6588 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6589 pf->hw.func_caps.num_msix_vectors,
6590 pf->hw.func_caps.num_msix_vectors_vf,
6591 pf->hw.func_caps.fd_filters_guaranteed,
6592 pf->hw.func_caps.fd_filters_best_effort,
6593 pf->hw.func_caps.num_tx_qp,
6594 pf->hw.func_caps.num_vsis);
6596 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6597 + pf->hw.func_caps.num_vfs)
6598 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6599 dev_info(&pf->pdev->dev,
6600 "got num_vsis %d, setting num_vsis to %d\n",
6601 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6602 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6608 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6611 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6612 * @pf: board private structure
6614 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6616 struct i40e_vsi *vsi;
6619 /* quick workaround for an NVM issue that leaves a critical register
6622 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6623 static const u32 hkey[] = {
6624 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6625 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6626 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6629 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6630 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6633 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6636 /* find existing VSI and see if it needs configuring */
6638 for (i = 0; i < pf->num_alloc_vsi; i++) {
6639 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6645 /* create a new VSI if none exists */
6647 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6648 pf->vsi[pf->lan_vsi]->seid, 0);
6650 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6651 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6656 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6660 * i40e_fdir_teardown - release the Flow Director resources
6661 * @pf: board private structure
6663 static void i40e_fdir_teardown(struct i40e_pf *pf)
6667 i40e_fdir_filter_exit(pf);
6668 for (i = 0; i < pf->num_alloc_vsi; i++) {
6669 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6670 i40e_vsi_release(pf->vsi[i]);
6677 * i40e_prep_for_reset - prep for the core to reset
6678 * @pf: board private structure
6680 * Close up the VFs and other things in prep for PF Reset.
6682 static void i40e_prep_for_reset(struct i40e_pf *pf)
6684 struct i40e_hw *hw = &pf->hw;
6685 i40e_status ret = 0;
6688 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6689 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6692 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6694 /* quiesce the VSIs and their queues that are not already DOWN */
6695 i40e_pf_quiesce_all_vsi(pf);
6697 for (v = 0; v < pf->num_alloc_vsi; v++) {
6699 pf->vsi[v]->seid = 0;
6702 i40e_shutdown_adminq(&pf->hw);
6704 /* call shutdown HMC */
6705 if (hw->hmc.hmc_obj) {
6706 ret = i40e_shutdown_lan_hmc(hw);
6708 dev_warn(&pf->pdev->dev,
6709 "shutdown_lan_hmc failed: %d\n", ret);
6714 * i40e_send_version - update firmware with driver version
6717 static void i40e_send_version(struct i40e_pf *pf)
6719 struct i40e_driver_version dv;
6721 dv.major_version = DRV_VERSION_MAJOR;
6722 dv.minor_version = DRV_VERSION_MINOR;
6723 dv.build_version = DRV_VERSION_BUILD;
6724 dv.subbuild_version = 0;
6725 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6726 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6730 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6731 * @pf: board private structure
6732 * @reinit: if the Main VSI needs to re-initialized.
6734 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6736 struct i40e_hw *hw = &pf->hw;
6737 u8 set_fc_aq_fail = 0;
6742 /* Now we wait for GRST to settle out.
6743 * We don't have to delete the VEBs or VSIs from the hw switch
6744 * because the reset will make them disappear.
6746 ret = i40e_pf_reset(hw);
6748 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6749 set_bit(__I40E_RESET_FAILED, &pf->state);
6750 goto clear_recovery;
6754 if (test_bit(__I40E_DOWN, &pf->state))
6755 goto clear_recovery;
6756 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6758 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6759 ret = i40e_init_adminq(&pf->hw);
6761 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6762 i40e_stat_str(&pf->hw, ret),
6763 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6764 goto clear_recovery;
6767 /* re-verify the eeprom if we just had an EMP reset */
6768 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6769 i40e_verify_eeprom(pf);
6771 i40e_clear_pxe_mode(hw);
6772 ret = i40e_get_capabilities(pf);
6774 goto end_core_reset;
6776 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6777 hw->func_caps.num_rx_qp,
6778 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6780 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6781 goto end_core_reset;
6783 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6785 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6786 goto end_core_reset;
6789 #ifdef CONFIG_I40E_DCB
6790 ret = i40e_init_pf_dcb(pf);
6792 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6793 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6794 /* Continue without DCB enabled */
6796 #endif /* CONFIG_I40E_DCB */
6798 i40e_init_pf_fcoe(pf);
6801 /* do basic switch setup */
6802 ret = i40e_setup_pf_switch(pf, reinit);
6804 goto end_core_reset;
6806 /* driver is only interested in link up/down and module qualification
6807 * reports from firmware
6809 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6810 I40E_AQ_EVENT_LINK_UPDOWN |
6811 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6813 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6814 i40e_stat_str(&pf->hw, ret),
6815 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6817 /* make sure our flow control settings are restored */
6818 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6820 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6821 i40e_stat_str(&pf->hw, ret),
6822 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6824 /* Rebuild the VSIs and VEBs that existed before reset.
6825 * They are still in our local switch element arrays, so only
6826 * need to rebuild the switch model in the HW.
6828 * If there were VEBs but the reconstitution failed, we'll try
6829 * try to recover minimal use by getting the basic PF VSI working.
6831 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6832 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6833 /* find the one VEB connected to the MAC, and find orphans */
6834 for (v = 0; v < I40E_MAX_VEB; v++) {
6838 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6839 pf->veb[v]->uplink_seid == 0) {
6840 ret = i40e_reconstitute_veb(pf->veb[v]);
6845 /* If Main VEB failed, we're in deep doodoo,
6846 * so give up rebuilding the switch and set up
6847 * for minimal rebuild of PF VSI.
6848 * If orphan failed, we'll report the error
6849 * but try to keep going.
6851 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6852 dev_info(&pf->pdev->dev,
6853 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6855 pf->vsi[pf->lan_vsi]->uplink_seid
6858 } else if (pf->veb[v]->uplink_seid == 0) {
6859 dev_info(&pf->pdev->dev,
6860 "rebuild of orphan VEB failed: %d\n",
6867 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6868 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6869 /* no VEB, so rebuild only the Main VSI */
6870 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6872 dev_info(&pf->pdev->dev,
6873 "rebuild of Main VSI failed: %d\n", ret);
6874 goto end_core_reset;
6878 /* Reconfigure hardware for allowing smaller MSS in the case
6879 * of TSO, so that we avoid the MDD being fired and causing
6880 * a reset in the case of small MSS+TSO.
6882 #define I40E_REG_MSS 0x000E64DC
6883 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6884 #define I40E_64BYTE_MSS 0x400000
6885 val = rd32(hw, I40E_REG_MSS);
6886 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6887 val &= ~I40E_REG_MSS_MIN_MASK;
6888 val |= I40E_64BYTE_MSS;
6889 wr32(hw, I40E_REG_MSS, val);
6892 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6893 (pf->hw.aq.fw_maj_ver < 4)) {
6895 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6897 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6898 i40e_stat_str(&pf->hw, ret),
6899 i40e_aq_str(&pf->hw,
6900 pf->hw.aq.asq_last_status));
6902 /* reinit the misc interrupt */
6903 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6904 ret = i40e_setup_misc_vector(pf);
6906 /* Add a filter to drop all Flow control frames from any VSI from being
6907 * transmitted. By doing so we stop a malicious VF from sending out
6908 * PAUSE or PFC frames and potentially controlling traffic for other
6910 * The FW can still send Flow control frames if enabled.
6912 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6915 /* restart the VSIs that were rebuilt and running before the reset */
6916 i40e_pf_unquiesce_all_vsi(pf);
6918 if (pf->num_alloc_vfs) {
6919 for (v = 0; v < pf->num_alloc_vfs; v++)
6920 i40e_reset_vf(&pf->vf[v], true);
6923 /* tell the firmware that we're starting */
6924 i40e_send_version(pf);
6927 clear_bit(__I40E_RESET_FAILED, &pf->state);
6929 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6933 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6934 * @pf: board private structure
6936 * Close up the VFs and other things in prep for a Core Reset,
6937 * then get ready to rebuild the world.
6939 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6941 i40e_prep_for_reset(pf);
6942 i40e_reset_and_rebuild(pf, false);
6946 * i40e_handle_mdd_event
6947 * @pf: pointer to the PF structure
6949 * Called from the MDD irq handler to identify possibly malicious vfs
6951 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6953 struct i40e_hw *hw = &pf->hw;
6954 bool mdd_detected = false;
6955 bool pf_mdd_detected = false;
6960 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6963 /* find what triggered the MDD event */
6964 reg = rd32(hw, I40E_GL_MDET_TX);
6965 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6966 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6967 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6968 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6969 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6970 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6971 I40E_GL_MDET_TX_EVENT_SHIFT;
6972 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6973 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6974 pf->hw.func_caps.base_queue;
6975 if (netif_msg_tx_err(pf))
6976 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6977 event, queue, pf_num, vf_num);
6978 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6979 mdd_detected = true;
6981 reg = rd32(hw, I40E_GL_MDET_RX);
6982 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6983 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6984 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6985 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6986 I40E_GL_MDET_RX_EVENT_SHIFT;
6987 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6988 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6989 pf->hw.func_caps.base_queue;
6990 if (netif_msg_rx_err(pf))
6991 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6992 event, queue, func);
6993 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6994 mdd_detected = true;
6998 reg = rd32(hw, I40E_PF_MDET_TX);
6999 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7000 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7001 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7002 pf_mdd_detected = true;
7004 reg = rd32(hw, I40E_PF_MDET_RX);
7005 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7006 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7007 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7008 pf_mdd_detected = true;
7010 /* Queue belongs to the PF, initiate a reset */
7011 if (pf_mdd_detected) {
7012 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7013 i40e_service_event_schedule(pf);
7017 /* see if one of the VFs needs its hand slapped */
7018 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7020 reg = rd32(hw, I40E_VP_MDET_TX(i));
7021 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7022 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7023 vf->num_mdd_events++;
7024 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7028 reg = rd32(hw, I40E_VP_MDET_RX(i));
7029 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7030 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7031 vf->num_mdd_events++;
7032 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7036 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7037 dev_info(&pf->pdev->dev,
7038 "Too many MDD events on VF %d, disabled\n", i);
7039 dev_info(&pf->pdev->dev,
7040 "Use PF Control I/F to re-enable the VF\n");
7041 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7045 /* re-enable mdd interrupt cause */
7046 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7047 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7048 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7049 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7054 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7055 * @pf: board private structure
7057 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7059 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7060 struct i40e_hw *hw = &pf->hw;
7065 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7068 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7070 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7071 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7072 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7073 port = pf->udp_ports[i].index;
7075 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7076 pf->udp_ports[i].type,
7079 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7082 dev_info(&pf->pdev->dev,
7083 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7084 port ? "add" : "delete",
7086 i40e_stat_str(&pf->hw, ret),
7087 i40e_aq_str(&pf->hw,
7088 pf->hw.aq.asq_last_status));
7089 pf->udp_ports[i].index = 0;
7097 * i40e_service_task - Run the driver's async subtasks
7098 * @work: pointer to work_struct containing our data
7100 static void i40e_service_task(struct work_struct *work)
7102 struct i40e_pf *pf = container_of(work,
7105 unsigned long start_time = jiffies;
7107 /* don't bother with service tasks if a reset is in progress */
7108 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7109 i40e_service_event_complete(pf);
7113 i40e_detect_recover_hung(pf);
7114 i40e_reset_subtask(pf);
7115 i40e_handle_mdd_event(pf);
7116 i40e_vc_process_vflr_event(pf);
7117 i40e_watchdog_subtask(pf);
7118 i40e_fdir_reinit_subtask(pf);
7119 i40e_sync_filters_subtask(pf);
7120 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7121 i40e_sync_udp_filters_subtask(pf);
7123 i40e_clean_adminq_subtask(pf);
7125 i40e_service_event_complete(pf);
7127 /* If the tasks have taken longer than one timer cycle or there
7128 * is more work to be done, reschedule the service task now
7129 * rather than wait for the timer to tick again.
7131 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7132 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7133 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7134 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7135 i40e_service_event_schedule(pf);
7139 * i40e_service_timer - timer callback
7140 * @data: pointer to PF struct
7142 static void i40e_service_timer(unsigned long data)
7144 struct i40e_pf *pf = (struct i40e_pf *)data;
7146 mod_timer(&pf->service_timer,
7147 round_jiffies(jiffies + pf->service_timer_period));
7148 i40e_service_event_schedule(pf);
7152 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7153 * @vsi: the VSI being configured
7155 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7157 struct i40e_pf *pf = vsi->back;
7159 switch (vsi->type) {
7161 vsi->alloc_queue_pairs = pf->num_lan_qps;
7162 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7163 I40E_REQ_DESCRIPTOR_MULTIPLE);
7164 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7165 vsi->num_q_vectors = pf->num_lan_msix;
7167 vsi->num_q_vectors = 1;
7172 vsi->alloc_queue_pairs = 1;
7173 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7174 I40E_REQ_DESCRIPTOR_MULTIPLE);
7175 vsi->num_q_vectors = 1;
7178 case I40E_VSI_VMDQ2:
7179 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7180 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7181 I40E_REQ_DESCRIPTOR_MULTIPLE);
7182 vsi->num_q_vectors = pf->num_vmdq_msix;
7185 case I40E_VSI_SRIOV:
7186 vsi->alloc_queue_pairs = pf->num_vf_qps;
7187 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7188 I40E_REQ_DESCRIPTOR_MULTIPLE);
7193 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7194 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7195 I40E_REQ_DESCRIPTOR_MULTIPLE);
7196 vsi->num_q_vectors = pf->num_fcoe_msix;
7199 #endif /* I40E_FCOE */
7209 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7210 * @type: VSI pointer
7211 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7213 * On error: returns error code (negative)
7214 * On success: returns 0
7216 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7221 /* allocate memory for both Tx and Rx ring pointers */
7222 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7223 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7226 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7228 if (alloc_qvectors) {
7229 /* allocate memory for q_vector pointers */
7230 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7231 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7232 if (!vsi->q_vectors) {
7240 kfree(vsi->tx_rings);
7245 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7246 * @pf: board private structure
7247 * @type: type of VSI
7249 * On error: returns error code (negative)
7250 * On success: returns vsi index in PF (positive)
7252 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7255 struct i40e_vsi *vsi;
7259 /* Need to protect the allocation of the VSIs at the PF level */
7260 mutex_lock(&pf->switch_mutex);
7262 /* VSI list may be fragmented if VSI creation/destruction has
7263 * been happening. We can afford to do a quick scan to look
7264 * for any free VSIs in the list.
7266 * find next empty vsi slot, looping back around if necessary
7269 while (i < pf->num_alloc_vsi && pf->vsi[i])
7271 if (i >= pf->num_alloc_vsi) {
7273 while (i < pf->next_vsi && pf->vsi[i])
7277 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7278 vsi_idx = i; /* Found one! */
7281 goto unlock_pf; /* out of VSI slots! */
7285 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7292 set_bit(__I40E_DOWN, &vsi->state);
7295 vsi->rx_itr_setting = pf->rx_itr_default;
7296 vsi->tx_itr_setting = pf->tx_itr_default;
7297 vsi->int_rate_limit = 0;
7298 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7299 pf->rss_table_size : 64;
7300 vsi->netdev_registered = false;
7301 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7302 INIT_LIST_HEAD(&vsi->mac_filter_list);
7303 vsi->irqs_ready = false;
7305 ret = i40e_set_num_rings_in_vsi(vsi);
7309 ret = i40e_vsi_alloc_arrays(vsi, true);
7313 /* Setup default MSIX irq handler for VSI */
7314 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7316 /* Initialize VSI lock */
7317 spin_lock_init(&vsi->mac_filter_list_lock);
7318 pf->vsi[vsi_idx] = vsi;
7323 pf->next_vsi = i - 1;
7326 mutex_unlock(&pf->switch_mutex);
7331 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7332 * @type: VSI pointer
7333 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7335 * On error: returns error code (negative)
7336 * On success: returns 0
7338 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7340 /* free the ring and vector containers */
7341 if (free_qvectors) {
7342 kfree(vsi->q_vectors);
7343 vsi->q_vectors = NULL;
7345 kfree(vsi->tx_rings);
7346 vsi->tx_rings = NULL;
7347 vsi->rx_rings = NULL;
7351 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7353 * @vsi: Pointer to VSI structure
7355 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7360 kfree(vsi->rss_hkey_user);
7361 vsi->rss_hkey_user = NULL;
7363 kfree(vsi->rss_lut_user);
7364 vsi->rss_lut_user = NULL;
7368 * i40e_vsi_clear - Deallocate the VSI provided
7369 * @vsi: the VSI being un-configured
7371 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7382 mutex_lock(&pf->switch_mutex);
7383 if (!pf->vsi[vsi->idx]) {
7384 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7385 vsi->idx, vsi->idx, vsi, vsi->type);
7389 if (pf->vsi[vsi->idx] != vsi) {
7390 dev_err(&pf->pdev->dev,
7391 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7392 pf->vsi[vsi->idx]->idx,
7394 pf->vsi[vsi->idx]->type,
7395 vsi->idx, vsi, vsi->type);
7399 /* updates the PF for this cleared vsi */
7400 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7401 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7403 i40e_vsi_free_arrays(vsi, true);
7404 i40e_clear_rss_config_user(vsi);
7406 pf->vsi[vsi->idx] = NULL;
7407 if (vsi->idx < pf->next_vsi)
7408 pf->next_vsi = vsi->idx;
7411 mutex_unlock(&pf->switch_mutex);
7419 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7420 * @vsi: the VSI being cleaned
7422 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7426 if (vsi->tx_rings && vsi->tx_rings[0]) {
7427 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7428 kfree_rcu(vsi->tx_rings[i], rcu);
7429 vsi->tx_rings[i] = NULL;
7430 vsi->rx_rings[i] = NULL;
7436 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7437 * @vsi: the VSI being configured
7439 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7441 struct i40e_ring *tx_ring, *rx_ring;
7442 struct i40e_pf *pf = vsi->back;
7445 /* Set basic values in the rings to be used later during open() */
7446 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7447 /* allocate space for both Tx and Rx in one shot */
7448 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7452 tx_ring->queue_index = i;
7453 tx_ring->reg_idx = vsi->base_queue + i;
7454 tx_ring->ring_active = false;
7456 tx_ring->netdev = vsi->netdev;
7457 tx_ring->dev = &pf->pdev->dev;
7458 tx_ring->count = vsi->num_desc;
7460 tx_ring->dcb_tc = 0;
7461 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7462 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7463 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7464 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7465 vsi->tx_rings[i] = tx_ring;
7467 rx_ring = &tx_ring[1];
7468 rx_ring->queue_index = i;
7469 rx_ring->reg_idx = vsi->base_queue + i;
7470 rx_ring->ring_active = false;
7472 rx_ring->netdev = vsi->netdev;
7473 rx_ring->dev = &pf->pdev->dev;
7474 rx_ring->count = vsi->num_desc;
7476 rx_ring->dcb_tc = 0;
7477 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7478 set_ring_16byte_desc_enabled(rx_ring);
7480 clear_ring_16byte_desc_enabled(rx_ring);
7481 vsi->rx_rings[i] = rx_ring;
7487 i40e_vsi_clear_rings(vsi);
7492 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7493 * @pf: board private structure
7494 * @vectors: the number of MSI-X vectors to request
7496 * Returns the number of vectors reserved, or error
7498 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7500 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7501 I40E_MIN_MSIX, vectors);
7503 dev_info(&pf->pdev->dev,
7504 "MSI-X vector reservation failed: %d\n", vectors);
7512 * i40e_init_msix - Setup the MSIX capability
7513 * @pf: board private structure
7515 * Work with the OS to set up the MSIX vectors needed.
7517 * Returns the number of vectors reserved or negative on failure
7519 static int i40e_init_msix(struct i40e_pf *pf)
7521 struct i40e_hw *hw = &pf->hw;
7526 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7529 /* The number of vectors we'll request will be comprised of:
7530 * - Add 1 for "other" cause for Admin Queue events, etc.
7531 * - The number of LAN queue pairs
7532 * - Queues being used for RSS.
7533 * We don't need as many as max_rss_size vectors.
7534 * use rss_size instead in the calculation since that
7535 * is governed by number of cpus in the system.
7536 * - assumes symmetric Tx/Rx pairing
7537 * - The number of VMDq pairs
7539 * - The number of FCOE qps.
7541 * Once we count this up, try the request.
7543 * If we can't get what we want, we'll simplify to nearly nothing
7544 * and try again. If that still fails, we punt.
7546 vectors_left = hw->func_caps.num_msix_vectors;
7549 /* reserve one vector for miscellaneous handler */
7555 /* reserve vectors for the main PF traffic queues */
7556 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7557 vectors_left -= pf->num_lan_msix;
7558 v_budget += pf->num_lan_msix;
7560 /* reserve one vector for sideband flow director */
7561 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7566 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7571 /* can we reserve enough for FCoE? */
7572 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7574 pf->num_fcoe_msix = 0;
7575 else if (vectors_left >= pf->num_fcoe_qps)
7576 pf->num_fcoe_msix = pf->num_fcoe_qps;
7578 pf->num_fcoe_msix = 1;
7579 v_budget += pf->num_fcoe_msix;
7580 vectors_left -= pf->num_fcoe_msix;
7584 /* any vectors left over go for VMDq support */
7585 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7586 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7587 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7589 /* if we're short on vectors for what's desired, we limit
7590 * the queues per vmdq. If this is still more than are
7591 * available, the user will need to change the number of
7592 * queues/vectors used by the PF later with the ethtool
7595 if (vmdq_vecs < vmdq_vecs_wanted)
7596 pf->num_vmdq_qps = 1;
7597 pf->num_vmdq_msix = pf->num_vmdq_qps;
7599 v_budget += vmdq_vecs;
7600 vectors_left -= vmdq_vecs;
7603 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7605 if (!pf->msix_entries)
7608 for (i = 0; i < v_budget; i++)
7609 pf->msix_entries[i].entry = i;
7610 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7612 if (v_actual != v_budget) {
7613 /* If we have limited resources, we will start with no vectors
7614 * for the special features and then allocate vectors to some
7615 * of these features based on the policy and at the end disable
7616 * the features that did not get any vectors.
7619 pf->num_fcoe_qps = 0;
7620 pf->num_fcoe_msix = 0;
7622 pf->num_vmdq_msix = 0;
7625 if (v_actual < I40E_MIN_MSIX) {
7626 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7627 kfree(pf->msix_entries);
7628 pf->msix_entries = NULL;
7631 } else if (v_actual == I40E_MIN_MSIX) {
7632 /* Adjust for minimal MSIX use */
7633 pf->num_vmdq_vsis = 0;
7634 pf->num_vmdq_qps = 0;
7635 pf->num_lan_qps = 1;
7636 pf->num_lan_msix = 1;
7638 } else if (v_actual != v_budget) {
7641 /* reserve the misc vector */
7644 /* Scale vector usage down */
7645 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7646 pf->num_vmdq_vsis = 1;
7647 pf->num_vmdq_qps = 1;
7648 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7650 /* partition out the remaining vectors */
7653 pf->num_lan_msix = 1;
7657 /* give one vector to FCoE */
7658 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7659 pf->num_lan_msix = 1;
7660 pf->num_fcoe_msix = 1;
7663 pf->num_lan_msix = 2;
7668 /* give one vector to FCoE */
7669 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7670 pf->num_fcoe_msix = 1;
7674 /* give the rest to the PF */
7675 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7680 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7681 (pf->num_vmdq_msix == 0)) {
7682 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7683 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7687 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7688 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7689 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7696 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7697 * @vsi: the VSI being configured
7698 * @v_idx: index of the vector in the vsi struct
7700 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7702 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7704 struct i40e_q_vector *q_vector;
7706 /* allocate q_vector */
7707 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7711 q_vector->vsi = vsi;
7712 q_vector->v_idx = v_idx;
7713 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7715 netif_napi_add(vsi->netdev, &q_vector->napi,
7716 i40e_napi_poll, NAPI_POLL_WEIGHT);
7718 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7719 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7721 /* tie q_vector and vsi together */
7722 vsi->q_vectors[v_idx] = q_vector;
7728 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7729 * @vsi: the VSI being configured
7731 * We allocate one q_vector per queue interrupt. If allocation fails we
7734 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7736 struct i40e_pf *pf = vsi->back;
7737 int v_idx, num_q_vectors;
7740 /* if not MSIX, give the one vector only to the LAN VSI */
7741 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7742 num_q_vectors = vsi->num_q_vectors;
7743 else if (vsi == pf->vsi[pf->lan_vsi])
7748 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7749 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7758 i40e_free_q_vector(vsi, v_idx);
7764 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7765 * @pf: board private structure to initialize
7767 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7772 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7773 vectors = i40e_init_msix(pf);
7775 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7777 I40E_FLAG_FCOE_ENABLED |
7779 I40E_FLAG_RSS_ENABLED |
7780 I40E_FLAG_DCB_CAPABLE |
7781 I40E_FLAG_SRIOV_ENABLED |
7782 I40E_FLAG_FD_SB_ENABLED |
7783 I40E_FLAG_FD_ATR_ENABLED |
7784 I40E_FLAG_VMDQ_ENABLED);
7786 /* rework the queue expectations without MSIX */
7787 i40e_determine_queue_usage(pf);
7791 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7792 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7793 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7794 vectors = pci_enable_msi(pf->pdev);
7796 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7798 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7800 vectors = 1; /* one MSI or Legacy vector */
7803 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7804 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7806 /* set up vector assignment tracking */
7807 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7808 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7809 if (!pf->irq_pile) {
7810 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7813 pf->irq_pile->num_entries = vectors;
7814 pf->irq_pile->search_hint = 0;
7816 /* track first vector for misc interrupts, ignore return */
7817 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7823 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7824 * @pf: board private structure
7826 * This sets up the handler for MSIX 0, which is used to manage the
7827 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7828 * when in MSI or Legacy interrupt mode.
7830 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7832 struct i40e_hw *hw = &pf->hw;
7835 /* Only request the irq if this is the first time through, and
7836 * not when we're rebuilding after a Reset
7838 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7839 err = request_irq(pf->msix_entries[0].vector,
7840 i40e_intr, 0, pf->int_name, pf);
7842 dev_info(&pf->pdev->dev,
7843 "request_irq for %s failed: %d\n",
7849 i40e_enable_misc_int_causes(pf);
7851 /* associate no queues to the misc vector */
7852 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7853 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7857 i40e_irq_dynamic_enable_icr0(pf);
7863 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7864 * @vsi: vsi structure
7865 * @seed: RSS hash seed
7867 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7868 u8 *lut, u16 lut_size)
7870 struct i40e_aqc_get_set_rss_key_data rss_key;
7871 struct i40e_pf *pf = vsi->back;
7872 struct i40e_hw *hw = &pf->hw;
7873 bool pf_lut = false;
7877 memset(&rss_key, 0, sizeof(rss_key));
7878 memcpy(&rss_key, seed, sizeof(rss_key));
7880 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7884 /* Populate the LUT with max no. of queues in round robin fashion */
7885 for (i = 0; i < vsi->rss_table_size; i++)
7886 rss_lut[i] = i % vsi->rss_size;
7888 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7890 dev_info(&pf->pdev->dev,
7891 "Cannot set RSS key, err %s aq_err %s\n",
7892 i40e_stat_str(&pf->hw, ret),
7893 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7894 goto config_rss_aq_out;
7897 if (vsi->type == I40E_VSI_MAIN)
7900 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7901 vsi->rss_table_size);
7903 dev_info(&pf->pdev->dev,
7904 "Cannot set RSS lut, err %s aq_err %s\n",
7905 i40e_stat_str(&pf->hw, ret),
7906 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7914 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7915 * @vsi: VSI structure
7917 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7919 u8 seed[I40E_HKEY_ARRAY_SIZE];
7920 struct i40e_pf *pf = vsi->back;
7924 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7927 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7931 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7932 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7933 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7934 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7941 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7942 * @vsi: Pointer to vsi structure
7943 * @seed: RSS hash seed
7944 * @lut: Lookup table
7945 * @lut_size: Lookup table size
7947 * Returns 0 on success, negative on failure
7949 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7950 const u8 *lut, u16 lut_size)
7952 struct i40e_pf *pf = vsi->back;
7953 struct i40e_hw *hw = &pf->hw;
7956 /* Fill out hash function seed */
7958 u32 *seed_dw = (u32 *)seed;
7960 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7961 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7965 u32 *lut_dw = (u32 *)lut;
7967 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7970 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7971 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
7979 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
7980 * @vsi: Pointer to VSI structure
7981 * @seed: Buffer to store the keys
7982 * @lut: Buffer to store the lookup table entries
7983 * @lut_size: Size of buffer to store the lookup table entries
7985 * Returns 0 on success, negative on failure
7987 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
7988 u8 *lut, u16 lut_size)
7990 struct i40e_pf *pf = vsi->back;
7991 struct i40e_hw *hw = &pf->hw;
7995 u32 *seed_dw = (u32 *)seed;
7997 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7998 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
8001 u32 *lut_dw = (u32 *)lut;
8003 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8005 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8006 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8013 * i40e_config_rss - Configure RSS keys and lut
8014 * @vsi: Pointer to VSI structure
8015 * @seed: RSS hash seed
8016 * @lut: Lookup table
8017 * @lut_size: Lookup table size
8019 * Returns 0 on success, negative on failure
8021 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8023 struct i40e_pf *pf = vsi->back;
8025 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8026 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8028 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8032 * i40e_get_rss - Get RSS keys and lut
8033 * @vsi: Pointer to VSI structure
8034 * @seed: Buffer to store the keys
8035 * @lut: Buffer to store the lookup table entries
8036 * lut_size: Size of buffer to store the lookup table entries
8038 * Returns 0 on success, negative on failure
8040 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8042 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8046 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8047 * @pf: Pointer to board private structure
8048 * @lut: Lookup table
8049 * @rss_table_size: Lookup table size
8050 * @rss_size: Range of queue number for hashing
8052 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8053 u16 rss_table_size, u16 rss_size)
8057 for (i = 0; i < rss_table_size; i++)
8058 lut[i] = i % rss_size;
8062 * i40e_pf_config_rss - Prepare for RSS if used
8063 * @pf: board private structure
8065 static int i40e_pf_config_rss(struct i40e_pf *pf)
8067 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8068 u8 seed[I40E_HKEY_ARRAY_SIZE];
8070 struct i40e_hw *hw = &pf->hw;
8075 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8076 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8077 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8078 hena |= i40e_pf_get_default_rss_hena(pf);
8080 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8081 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8083 /* Determine the RSS table size based on the hardware capabilities */
8084 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8085 reg_val = (pf->rss_table_size == 512) ?
8086 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8087 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8088 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8090 /* Determine the RSS size of the VSI */
8092 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8093 vsi->num_queue_pairs);
8095 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8099 /* Use user configured lut if there is one, otherwise use default */
8100 if (vsi->rss_lut_user)
8101 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8103 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8105 /* Use user configured hash key if there is one, otherwise
8108 if (vsi->rss_hkey_user)
8109 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8111 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8112 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8119 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8120 * @pf: board private structure
8121 * @queue_count: the requested queue count for rss.
8123 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8124 * count which may be different from the requested queue count.
8126 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8128 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8131 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8134 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8136 if (queue_count != vsi->num_queue_pairs) {
8137 vsi->req_queue_pairs = queue_count;
8138 i40e_prep_for_reset(pf);
8140 pf->alloc_rss_size = new_rss_size;
8142 i40e_reset_and_rebuild(pf, true);
8144 /* Discard the user configured hash keys and lut, if less
8145 * queues are enabled.
8147 if (queue_count < vsi->rss_size) {
8148 i40e_clear_rss_config_user(vsi);
8149 dev_dbg(&pf->pdev->dev,
8150 "discard user configured hash keys and lut\n");
8153 /* Reset vsi->rss_size, as number of enabled queues changed */
8154 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8155 vsi->num_queue_pairs);
8157 i40e_pf_config_rss(pf);
8159 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8160 pf->alloc_rss_size, pf->rss_size_max);
8161 return pf->alloc_rss_size;
8165 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8166 * @pf: board private structure
8168 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8171 bool min_valid, max_valid;
8174 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8175 &min_valid, &max_valid);
8179 pf->npar_min_bw = min_bw;
8181 pf->npar_max_bw = max_bw;
8188 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8189 * @pf: board private structure
8191 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8193 struct i40e_aqc_configure_partition_bw_data bw_data;
8196 /* Set the valid bit for this PF */
8197 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8198 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8199 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8201 /* Set the new bandwidths */
8202 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8208 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8209 * @pf: board private structure
8211 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8213 /* Commit temporary BW setting to permanent NVM image */
8214 enum i40e_admin_queue_err last_aq_status;
8218 if (pf->hw.partition_id != 1) {
8219 dev_info(&pf->pdev->dev,
8220 "Commit BW only works on partition 1! This is partition %d",
8221 pf->hw.partition_id);
8222 ret = I40E_NOT_SUPPORTED;
8226 /* Acquire NVM for read access */
8227 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8228 last_aq_status = pf->hw.aq.asq_last_status;
8230 dev_info(&pf->pdev->dev,
8231 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8232 i40e_stat_str(&pf->hw, ret),
8233 i40e_aq_str(&pf->hw, last_aq_status));
8237 /* Read word 0x10 of NVM - SW compatibility word 1 */
8238 ret = i40e_aq_read_nvm(&pf->hw,
8239 I40E_SR_NVM_CONTROL_WORD,
8240 0x10, sizeof(nvm_word), &nvm_word,
8242 /* Save off last admin queue command status before releasing
8245 last_aq_status = pf->hw.aq.asq_last_status;
8246 i40e_release_nvm(&pf->hw);
8248 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8249 i40e_stat_str(&pf->hw, ret),
8250 i40e_aq_str(&pf->hw, last_aq_status));
8254 /* Wait a bit for NVM release to complete */
8257 /* Acquire NVM for write access */
8258 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8259 last_aq_status = pf->hw.aq.asq_last_status;
8261 dev_info(&pf->pdev->dev,
8262 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8263 i40e_stat_str(&pf->hw, ret),
8264 i40e_aq_str(&pf->hw, last_aq_status));
8267 /* Write it back out unchanged to initiate update NVM,
8268 * which will force a write of the shadow (alt) RAM to
8269 * the NVM - thus storing the bandwidth values permanently.
8271 ret = i40e_aq_update_nvm(&pf->hw,
8272 I40E_SR_NVM_CONTROL_WORD,
8273 0x10, sizeof(nvm_word),
8274 &nvm_word, true, NULL);
8275 /* Save off last admin queue command status before releasing
8278 last_aq_status = pf->hw.aq.asq_last_status;
8279 i40e_release_nvm(&pf->hw);
8281 dev_info(&pf->pdev->dev,
8282 "BW settings NOT SAVED, err %s aq_err %s\n",
8283 i40e_stat_str(&pf->hw, ret),
8284 i40e_aq_str(&pf->hw, last_aq_status));
8291 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8292 * @pf: board private structure to initialize
8294 * i40e_sw_init initializes the Adapter private data structure.
8295 * Fields are initialized based on PCI device information and
8296 * OS network device settings (MTU size).
8298 static int i40e_sw_init(struct i40e_pf *pf)
8303 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8304 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8305 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8306 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8307 if (I40E_DEBUG_USER & debug)
8308 pf->hw.debug_mask = debug;
8309 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8310 I40E_DEFAULT_MSG_ENABLE);
8313 /* Set default capability flags */
8314 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8315 I40E_FLAG_MSI_ENABLED |
8316 I40E_FLAG_LINK_POLLING_ENABLED |
8317 I40E_FLAG_MSIX_ENABLED;
8319 if (iommu_present(&pci_bus_type))
8320 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8322 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8324 /* Set default ITR */
8325 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8326 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8328 /* Depending on PF configurations, it is possible that the RSS
8329 * maximum might end up larger than the available queues
8331 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8332 pf->alloc_rss_size = 1;
8333 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8334 pf->rss_size_max = min_t(int, pf->rss_size_max,
8335 pf->hw.func_caps.num_tx_qp);
8336 if (pf->hw.func_caps.rss) {
8337 pf->flags |= I40E_FLAG_RSS_ENABLED;
8338 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8342 /* MFP mode enabled */
8343 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8344 pf->flags |= I40E_FLAG_MFP_ENABLED;
8345 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8346 if (i40e_get_npar_bw_setting(pf))
8347 dev_warn(&pf->pdev->dev,
8348 "Could not get NPAR bw settings\n");
8350 dev_info(&pf->pdev->dev,
8351 "Min BW = %8.8x, Max BW = %8.8x\n",
8352 pf->npar_min_bw, pf->npar_max_bw);
8355 /* FW/NVM is not yet fixed in this regard */
8356 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8357 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8358 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8359 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8360 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8361 pf->hw.num_partitions > 1)
8362 dev_info(&pf->pdev->dev,
8363 "Flow Director Sideband mode Disabled in MFP mode\n");
8365 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8366 pf->fdir_pf_filter_count =
8367 pf->hw.func_caps.fd_filters_guaranteed;
8368 pf->hw.fdir_shared_filter_count =
8369 pf->hw.func_caps.fd_filters_best_effort;
8372 if (pf->hw.func_caps.vmdq) {
8373 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8374 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8375 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8379 i40e_init_pf_fcoe(pf);
8381 #endif /* I40E_FCOE */
8382 #ifdef CONFIG_PCI_IOV
8383 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8384 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8385 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8386 pf->num_req_vfs = min_t(int,
8387 pf->hw.func_caps.num_vfs,
8390 #endif /* CONFIG_PCI_IOV */
8391 if (pf->hw.mac.type == I40E_MAC_X722) {
8392 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8393 I40E_FLAG_128_QP_RSS_CAPABLE |
8394 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8395 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8396 I40E_FLAG_WB_ON_ITR_CAPABLE |
8397 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8398 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8400 pf->eeprom_version = 0xDEAD;
8401 pf->lan_veb = I40E_NO_VEB;
8402 pf->lan_vsi = I40E_NO_VSI;
8404 /* By default FW has this off for performance reasons */
8405 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8407 /* set up queue assignment tracking */
8408 size = sizeof(struct i40e_lump_tracking)
8409 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8410 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8415 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8416 pf->qp_pile->search_hint = 0;
8418 pf->tx_timeout_recovery_level = 1;
8420 mutex_init(&pf->switch_mutex);
8422 /* If NPAR is enabled nudge the Tx scheduler */
8423 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8424 i40e_set_npar_bw_setting(pf);
8431 * i40e_set_ntuple - set the ntuple feature flag and take action
8432 * @pf: board private structure to initialize
8433 * @features: the feature set that the stack is suggesting
8435 * returns a bool to indicate if reset needs to happen
8437 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8439 bool need_reset = false;
8441 /* Check if Flow Director n-tuple support was enabled or disabled. If
8442 * the state changed, we need to reset.
8444 if (features & NETIF_F_NTUPLE) {
8445 /* Enable filters and mark for reset */
8446 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8448 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8450 /* turn off filters, mark for reset and clear SW filter list */
8451 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8453 i40e_fdir_filter_exit(pf);
8455 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8456 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8457 /* reset fd counters */
8458 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8459 pf->fdir_pf_active_filters = 0;
8460 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8461 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8462 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8463 /* if ATR was auto disabled it can be re-enabled. */
8464 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8465 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8466 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8472 * i40e_set_features - set the netdev feature flags
8473 * @netdev: ptr to the netdev being adjusted
8474 * @features: the feature set that the stack is suggesting
8476 static int i40e_set_features(struct net_device *netdev,
8477 netdev_features_t features)
8479 struct i40e_netdev_priv *np = netdev_priv(netdev);
8480 struct i40e_vsi *vsi = np->vsi;
8481 struct i40e_pf *pf = vsi->back;
8484 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8485 i40e_vlan_stripping_enable(vsi);
8487 i40e_vlan_stripping_disable(vsi);
8489 need_reset = i40e_set_ntuple(pf, features);
8492 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8497 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8499 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8500 * @pf: board private structure
8501 * @port: The UDP port to look up
8503 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8505 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8509 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8510 if (pf->udp_ports[i].index == port)
8519 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8520 * @netdev: This physical port's netdev
8521 * @sa_family: Socket Family that VXLAN is notifying us about
8522 * @port: New UDP port number that VXLAN started listening to
8524 static void i40e_add_vxlan_port(struct net_device *netdev,
8525 sa_family_t sa_family, __be16 port)
8527 #if IS_ENABLED(CONFIG_VXLAN)
8528 struct i40e_netdev_priv *np = netdev_priv(netdev);
8529 struct i40e_vsi *vsi = np->vsi;
8530 struct i40e_pf *pf = vsi->back;
8534 if (sa_family == AF_INET6)
8537 idx = i40e_get_udp_port_idx(pf, port);
8539 /* Check if port already exists */
8540 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8541 netdev_info(netdev, "vxlan port %d already offloaded\n",
8546 /* Now check if there is space to add the new port */
8547 next_idx = i40e_get_udp_port_idx(pf, 0);
8549 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8550 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8555 /* New port: add it and mark its index in the bitmap */
8556 pf->udp_ports[next_idx].index = port;
8557 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8558 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8559 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8564 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8565 * @netdev: This physical port's netdev
8566 * @sa_family: Socket Family that VXLAN is notifying us about
8567 * @port: UDP port number that VXLAN stopped listening to
8569 static void i40e_del_vxlan_port(struct net_device *netdev,
8570 sa_family_t sa_family, __be16 port)
8572 #if IS_ENABLED(CONFIG_VXLAN)
8573 struct i40e_netdev_priv *np = netdev_priv(netdev);
8574 struct i40e_vsi *vsi = np->vsi;
8575 struct i40e_pf *pf = vsi->back;
8578 if (sa_family == AF_INET6)
8581 idx = i40e_get_udp_port_idx(pf, port);
8583 /* Check if port already exists */
8584 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8585 /* if port exists, set it to 0 (mark for deletion)
8586 * and make it pending
8588 pf->udp_ports[idx].index = 0;
8589 pf->pending_udp_bitmap |= BIT_ULL(idx);
8590 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8592 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8599 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8600 * @netdev: This physical port's netdev
8601 * @sa_family: Socket Family that GENEVE is notifying us about
8602 * @port: New UDP port number that GENEVE started listening to
8604 static void i40e_add_geneve_port(struct net_device *netdev,
8605 sa_family_t sa_family, __be16 port)
8607 #if IS_ENABLED(CONFIG_GENEVE)
8608 struct i40e_netdev_priv *np = netdev_priv(netdev);
8609 struct i40e_vsi *vsi = np->vsi;
8610 struct i40e_pf *pf = vsi->back;
8614 if (sa_family == AF_INET6)
8617 idx = i40e_get_udp_port_idx(pf, port);
8619 /* Check if port already exists */
8620 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8621 netdev_info(netdev, "udp port %d already offloaded\n",
8626 /* Now check if there is space to add the new port */
8627 next_idx = i40e_get_udp_port_idx(pf, 0);
8629 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8630 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8635 /* New port: add it and mark its index in the bitmap */
8636 pf->udp_ports[next_idx].index = port;
8637 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8638 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8639 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8641 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8646 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8647 * @netdev: This physical port's netdev
8648 * @sa_family: Socket Family that GENEVE is notifying us about
8649 * @port: UDP port number that GENEVE stopped listening to
8651 static void i40e_del_geneve_port(struct net_device *netdev,
8652 sa_family_t sa_family, __be16 port)
8654 #if IS_ENABLED(CONFIG_GENEVE)
8655 struct i40e_netdev_priv *np = netdev_priv(netdev);
8656 struct i40e_vsi *vsi = np->vsi;
8657 struct i40e_pf *pf = vsi->back;
8660 if (sa_family == AF_INET6)
8663 idx = i40e_get_udp_port_idx(pf, port);
8665 /* Check if port already exists */
8666 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8667 /* if port exists, set it to 0 (mark for deletion)
8668 * and make it pending
8670 pf->udp_ports[idx].index = 0;
8671 pf->pending_udp_bitmap |= BIT_ULL(idx);
8672 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8674 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8677 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8683 static int i40e_get_phys_port_id(struct net_device *netdev,
8684 struct netdev_phys_item_id *ppid)
8686 struct i40e_netdev_priv *np = netdev_priv(netdev);
8687 struct i40e_pf *pf = np->vsi->back;
8688 struct i40e_hw *hw = &pf->hw;
8690 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8693 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8694 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8700 * i40e_ndo_fdb_add - add an entry to the hardware database
8701 * @ndm: the input from the stack
8702 * @tb: pointer to array of nladdr (unused)
8703 * @dev: the net device pointer
8704 * @addr: the MAC address entry being added
8705 * @flags: instructions from stack about fdb operation
8707 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8708 struct net_device *dev,
8709 const unsigned char *addr, u16 vid,
8712 struct i40e_netdev_priv *np = netdev_priv(dev);
8713 struct i40e_pf *pf = np->vsi->back;
8716 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8720 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8724 /* Hardware does not support aging addresses so if a
8725 * ndm_state is given only allow permanent addresses
8727 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8728 netdev_info(dev, "FDB only supports static addresses\n");
8732 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8733 err = dev_uc_add_excl(dev, addr);
8734 else if (is_multicast_ether_addr(addr))
8735 err = dev_mc_add_excl(dev, addr);
8739 /* Only return duplicate errors if NLM_F_EXCL is set */
8740 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8747 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8748 * @dev: the netdev being configured
8749 * @nlh: RTNL message
8751 * Inserts a new hardware bridge if not already created and
8752 * enables the bridging mode requested (VEB or VEPA). If the
8753 * hardware bridge has already been inserted and the request
8754 * is to change the mode then that requires a PF reset to
8755 * allow rebuild of the components with required hardware
8756 * bridge mode enabled.
8758 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8759 struct nlmsghdr *nlh,
8762 struct i40e_netdev_priv *np = netdev_priv(dev);
8763 struct i40e_vsi *vsi = np->vsi;
8764 struct i40e_pf *pf = vsi->back;
8765 struct i40e_veb *veb = NULL;
8766 struct nlattr *attr, *br_spec;
8769 /* Only for PF VSI for now */
8770 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8773 /* Find the HW bridge for PF VSI */
8774 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8775 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8779 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8781 nla_for_each_nested(attr, br_spec, rem) {
8784 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8787 mode = nla_get_u16(attr);
8788 if ((mode != BRIDGE_MODE_VEPA) &&
8789 (mode != BRIDGE_MODE_VEB))
8792 /* Insert a new HW bridge */
8794 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8795 vsi->tc_config.enabled_tc);
8797 veb->bridge_mode = mode;
8798 i40e_config_bridge_mode(veb);
8800 /* No Bridge HW offload available */
8804 } else if (mode != veb->bridge_mode) {
8805 /* Existing HW bridge but different mode needs reset */
8806 veb->bridge_mode = mode;
8807 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8808 if (mode == BRIDGE_MODE_VEB)
8809 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8811 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8812 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8821 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8824 * @seq: RTNL message seq #
8825 * @dev: the netdev being configured
8826 * @filter_mask: unused
8827 * @nlflags: netlink flags passed in
8829 * Return the mode in which the hardware bridge is operating in
8832 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8833 struct net_device *dev,
8834 u32 __always_unused filter_mask,
8837 struct i40e_netdev_priv *np = netdev_priv(dev);
8838 struct i40e_vsi *vsi = np->vsi;
8839 struct i40e_pf *pf = vsi->back;
8840 struct i40e_veb *veb = NULL;
8843 /* Only for PF VSI for now */
8844 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8847 /* Find the HW bridge for the PF VSI */
8848 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8849 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8856 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8857 nlflags, 0, 0, filter_mask, NULL);
8860 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8861 * inner mac plus all inner ethertypes.
8863 #define I40E_MAX_TUNNEL_HDR_LEN 128
8865 * i40e_features_check - Validate encapsulated packet conforms to limits
8867 * @dev: This physical port's netdev
8868 * @features: Offload features that the stack believes apply
8870 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8871 struct net_device *dev,
8872 netdev_features_t features)
8874 if (skb->encapsulation &&
8875 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8876 I40E_MAX_TUNNEL_HDR_LEN))
8877 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8882 static const struct net_device_ops i40e_netdev_ops = {
8883 .ndo_open = i40e_open,
8884 .ndo_stop = i40e_close,
8885 .ndo_start_xmit = i40e_lan_xmit_frame,
8886 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8887 .ndo_set_rx_mode = i40e_set_rx_mode,
8888 .ndo_validate_addr = eth_validate_addr,
8889 .ndo_set_mac_address = i40e_set_mac,
8890 .ndo_change_mtu = i40e_change_mtu,
8891 .ndo_do_ioctl = i40e_ioctl,
8892 .ndo_tx_timeout = i40e_tx_timeout,
8893 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8894 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8895 #ifdef CONFIG_NET_POLL_CONTROLLER
8896 .ndo_poll_controller = i40e_netpoll,
8898 .ndo_setup_tc = i40e_setup_tc,
8900 .ndo_fcoe_enable = i40e_fcoe_enable,
8901 .ndo_fcoe_disable = i40e_fcoe_disable,
8903 .ndo_set_features = i40e_set_features,
8904 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8905 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8906 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8907 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8908 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8909 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8910 #if IS_ENABLED(CONFIG_VXLAN)
8911 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8912 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8914 #if IS_ENABLED(CONFIG_GENEVE)
8915 .ndo_add_geneve_port = i40e_add_geneve_port,
8916 .ndo_del_geneve_port = i40e_del_geneve_port,
8918 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8919 .ndo_fdb_add = i40e_ndo_fdb_add,
8920 .ndo_features_check = i40e_features_check,
8921 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8922 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8926 * i40e_config_netdev - Setup the netdev flags
8927 * @vsi: the VSI being configured
8929 * Returns 0 on success, negative value on failure
8931 static int i40e_config_netdev(struct i40e_vsi *vsi)
8933 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8934 struct i40e_pf *pf = vsi->back;
8935 struct i40e_hw *hw = &pf->hw;
8936 struct i40e_netdev_priv *np;
8937 struct net_device *netdev;
8938 u8 mac_addr[ETH_ALEN];
8941 etherdev_size = sizeof(struct i40e_netdev_priv);
8942 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8946 vsi->netdev = netdev;
8947 np = netdev_priv(netdev);
8950 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8952 NETIF_F_GSO_UDP_TUNNEL |
8956 netdev->features = NETIF_F_SG |
8960 NETIF_F_GSO_UDP_TUNNEL |
8962 NETIF_F_HW_VLAN_CTAG_TX |
8963 NETIF_F_HW_VLAN_CTAG_RX |
8964 NETIF_F_HW_VLAN_CTAG_FILTER |
8973 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8974 netdev->features |= NETIF_F_NTUPLE;
8976 /* copy netdev features into list of user selectable features */
8977 netdev->hw_features |= netdev->features;
8979 if (vsi->type == I40E_VSI_MAIN) {
8980 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8981 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8982 /* The following steps are necessary to prevent reception
8983 * of tagged packets - some older NVM configurations load a
8984 * default a MAC-VLAN filter that accepts any tagged packet
8985 * which must be replaced by a normal filter.
8987 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8988 spin_lock_bh(&vsi->mac_filter_list_lock);
8989 i40e_add_filter(vsi, mac_addr,
8990 I40E_VLAN_ANY, false, true);
8991 spin_unlock_bh(&vsi->mac_filter_list_lock);
8994 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8995 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8996 pf->vsi[pf->lan_vsi]->netdev->name);
8997 random_ether_addr(mac_addr);
8999 spin_lock_bh(&vsi->mac_filter_list_lock);
9000 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9001 spin_unlock_bh(&vsi->mac_filter_list_lock);
9004 spin_lock_bh(&vsi->mac_filter_list_lock);
9005 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9006 spin_unlock_bh(&vsi->mac_filter_list_lock);
9008 ether_addr_copy(netdev->dev_addr, mac_addr);
9009 ether_addr_copy(netdev->perm_addr, mac_addr);
9010 /* vlan gets same features (except vlan offload)
9011 * after any tweaks for specific VSI types
9013 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
9014 NETIF_F_HW_VLAN_CTAG_RX |
9015 NETIF_F_HW_VLAN_CTAG_FILTER);
9016 netdev->priv_flags |= IFF_UNICAST_FLT;
9017 netdev->priv_flags |= IFF_SUPP_NOFCS;
9018 /* Setup netdev TC information */
9019 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9021 netdev->netdev_ops = &i40e_netdev_ops;
9022 netdev->watchdog_timeo = 5 * HZ;
9023 i40e_set_ethtool_ops(netdev);
9025 i40e_fcoe_config_netdev(netdev, vsi);
9032 * i40e_vsi_delete - Delete a VSI from the switch
9033 * @vsi: the VSI being removed
9035 * Returns 0 on success, negative value on failure
9037 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9039 /* remove default VSI is not allowed */
9040 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9043 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9047 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9048 * @vsi: the VSI being queried
9050 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9052 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9054 struct i40e_veb *veb;
9055 struct i40e_pf *pf = vsi->back;
9057 /* Uplink is not a bridge so default to VEB */
9058 if (vsi->veb_idx == I40E_NO_VEB)
9061 veb = pf->veb[vsi->veb_idx];
9063 dev_info(&pf->pdev->dev,
9064 "There is no veb associated with the bridge\n");
9068 /* Uplink is a bridge in VEPA mode */
9069 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9072 /* Uplink is a bridge in VEB mode */
9076 /* VEPA is now default bridge, so return 0 */
9081 * i40e_add_vsi - Add a VSI to the switch
9082 * @vsi: the VSI being configured
9084 * This initializes a VSI context depending on the VSI type to be added and
9085 * passes it down to the add_vsi aq command.
9087 static int i40e_add_vsi(struct i40e_vsi *vsi)
9090 u8 laa_macaddr[ETH_ALEN];
9091 bool found_laa_mac_filter = false;
9092 struct i40e_pf *pf = vsi->back;
9093 struct i40e_hw *hw = &pf->hw;
9094 struct i40e_vsi_context ctxt;
9095 struct i40e_mac_filter *f, *ftmp;
9097 u8 enabled_tc = 0x1; /* TC0 enabled */
9100 memset(&ctxt, 0, sizeof(ctxt));
9101 switch (vsi->type) {
9103 /* The PF's main VSI is already setup as part of the
9104 * device initialization, so we'll not bother with
9105 * the add_vsi call, but we will retrieve the current
9108 ctxt.seid = pf->main_vsi_seid;
9109 ctxt.pf_num = pf->hw.pf_id;
9111 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9112 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9114 dev_info(&pf->pdev->dev,
9115 "couldn't get PF vsi config, err %s aq_err %s\n",
9116 i40e_stat_str(&pf->hw, ret),
9117 i40e_aq_str(&pf->hw,
9118 pf->hw.aq.asq_last_status));
9121 vsi->info = ctxt.info;
9122 vsi->info.valid_sections = 0;
9124 vsi->seid = ctxt.seid;
9125 vsi->id = ctxt.vsi_number;
9127 enabled_tc = i40e_pf_get_tc_map(pf);
9129 /* MFP mode setup queue map and update VSI */
9130 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9131 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9132 memset(&ctxt, 0, sizeof(ctxt));
9133 ctxt.seid = pf->main_vsi_seid;
9134 ctxt.pf_num = pf->hw.pf_id;
9136 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9137 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9139 dev_info(&pf->pdev->dev,
9140 "update vsi failed, err %s aq_err %s\n",
9141 i40e_stat_str(&pf->hw, ret),
9142 i40e_aq_str(&pf->hw,
9143 pf->hw.aq.asq_last_status));
9147 /* update the local VSI info queue map */
9148 i40e_vsi_update_queue_map(vsi, &ctxt);
9149 vsi->info.valid_sections = 0;
9151 /* Default/Main VSI is only enabled for TC0
9152 * reconfigure it to enable all TCs that are
9153 * available on the port in SFP mode.
9154 * For MFP case the iSCSI PF would use this
9155 * flow to enable LAN+iSCSI TC.
9157 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9159 dev_info(&pf->pdev->dev,
9160 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9162 i40e_stat_str(&pf->hw, ret),
9163 i40e_aq_str(&pf->hw,
9164 pf->hw.aq.asq_last_status));
9171 ctxt.pf_num = hw->pf_id;
9173 ctxt.uplink_seid = vsi->uplink_seid;
9174 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9175 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9176 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9177 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9178 ctxt.info.valid_sections |=
9179 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9180 ctxt.info.switch_id =
9181 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9183 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9186 case I40E_VSI_VMDQ2:
9187 ctxt.pf_num = hw->pf_id;
9189 ctxt.uplink_seid = vsi->uplink_seid;
9190 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9191 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9193 /* This VSI is connected to VEB so the switch_id
9194 * should be set to zero by default.
9196 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9197 ctxt.info.valid_sections |=
9198 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9199 ctxt.info.switch_id =
9200 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9203 /* Setup the VSI tx/rx queue map for TC0 only for now */
9204 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9207 case I40E_VSI_SRIOV:
9208 ctxt.pf_num = hw->pf_id;
9209 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9210 ctxt.uplink_seid = vsi->uplink_seid;
9211 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9212 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9214 /* This VSI is connected to VEB so the switch_id
9215 * should be set to zero by default.
9217 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9218 ctxt.info.valid_sections |=
9219 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9220 ctxt.info.switch_id =
9221 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9224 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9225 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9226 if (pf->vf[vsi->vf_id].spoofchk) {
9227 ctxt.info.valid_sections |=
9228 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9229 ctxt.info.sec_flags |=
9230 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9231 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9233 /* Setup the VSI tx/rx queue map for TC0 only for now */
9234 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9239 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9241 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9246 #endif /* I40E_FCOE */
9251 if (vsi->type != I40E_VSI_MAIN) {
9252 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9254 dev_info(&vsi->back->pdev->dev,
9255 "add vsi failed, err %s aq_err %s\n",
9256 i40e_stat_str(&pf->hw, ret),
9257 i40e_aq_str(&pf->hw,
9258 pf->hw.aq.asq_last_status));
9262 vsi->info = ctxt.info;
9263 vsi->info.valid_sections = 0;
9264 vsi->seid = ctxt.seid;
9265 vsi->id = ctxt.vsi_number;
9268 spin_lock_bh(&vsi->mac_filter_list_lock);
9269 /* If macvlan filters already exist, force them to get loaded */
9270 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9274 /* Expected to have only one MAC filter entry for LAA in list */
9275 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9276 ether_addr_copy(laa_macaddr, f->macaddr);
9277 found_laa_mac_filter = true;
9280 spin_unlock_bh(&vsi->mac_filter_list_lock);
9282 if (found_laa_mac_filter) {
9283 struct i40e_aqc_remove_macvlan_element_data element;
9285 memset(&element, 0, sizeof(element));
9286 ether_addr_copy(element.mac_addr, laa_macaddr);
9287 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9288 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9291 /* some older FW has a different default */
9293 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9294 i40e_aq_remove_macvlan(hw, vsi->seid,
9298 i40e_aq_mac_address_write(hw,
9299 I40E_AQC_WRITE_TYPE_LAA_WOL,
9304 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9305 pf->flags |= I40E_FLAG_FILTER_SYNC;
9308 /* Update VSI BW information */
9309 ret = i40e_vsi_get_bw_info(vsi);
9311 dev_info(&pf->pdev->dev,
9312 "couldn't get vsi bw info, err %s aq_err %s\n",
9313 i40e_stat_str(&pf->hw, ret),
9314 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9315 /* VSI is already added so not tearing that up */
9324 * i40e_vsi_release - Delete a VSI and free its resources
9325 * @vsi: the VSI being removed
9327 * Returns 0 on success or < 0 on error
9329 int i40e_vsi_release(struct i40e_vsi *vsi)
9331 struct i40e_mac_filter *f, *ftmp;
9332 struct i40e_veb *veb = NULL;
9339 /* release of a VEB-owner or last VSI is not allowed */
9340 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9341 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9342 vsi->seid, vsi->uplink_seid);
9345 if (vsi == pf->vsi[pf->lan_vsi] &&
9346 !test_bit(__I40E_DOWN, &pf->state)) {
9347 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9351 uplink_seid = vsi->uplink_seid;
9352 if (vsi->type != I40E_VSI_SRIOV) {
9353 if (vsi->netdev_registered) {
9354 vsi->netdev_registered = false;
9356 /* results in a call to i40e_close() */
9357 unregister_netdev(vsi->netdev);
9360 i40e_vsi_close(vsi);
9362 i40e_vsi_disable_irq(vsi);
9365 spin_lock_bh(&vsi->mac_filter_list_lock);
9366 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9367 i40e_del_filter(vsi, f->macaddr, f->vlan,
9368 f->is_vf, f->is_netdev);
9369 spin_unlock_bh(&vsi->mac_filter_list_lock);
9371 i40e_sync_vsi_filters(vsi);
9373 i40e_vsi_delete(vsi);
9374 i40e_vsi_free_q_vectors(vsi);
9376 free_netdev(vsi->netdev);
9379 i40e_vsi_clear_rings(vsi);
9380 i40e_vsi_clear(vsi);
9382 /* If this was the last thing on the VEB, except for the
9383 * controlling VSI, remove the VEB, which puts the controlling
9384 * VSI onto the next level down in the switch.
9386 * Well, okay, there's one more exception here: don't remove
9387 * the orphan VEBs yet. We'll wait for an explicit remove request
9388 * from up the network stack.
9390 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9392 pf->vsi[i]->uplink_seid == uplink_seid &&
9393 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9394 n++; /* count the VSIs */
9397 for (i = 0; i < I40E_MAX_VEB; i++) {
9400 if (pf->veb[i]->uplink_seid == uplink_seid)
9401 n++; /* count the VEBs */
9402 if (pf->veb[i]->seid == uplink_seid)
9405 if (n == 0 && veb && veb->uplink_seid != 0)
9406 i40e_veb_release(veb);
9412 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9413 * @vsi: ptr to the VSI
9415 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9416 * corresponding SW VSI structure and initializes num_queue_pairs for the
9417 * newly allocated VSI.
9419 * Returns 0 on success or negative on failure
9421 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9424 struct i40e_pf *pf = vsi->back;
9426 if (vsi->q_vectors[0]) {
9427 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9432 if (vsi->base_vector) {
9433 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9434 vsi->seid, vsi->base_vector);
9438 ret = i40e_vsi_alloc_q_vectors(vsi);
9440 dev_info(&pf->pdev->dev,
9441 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9442 vsi->num_q_vectors, vsi->seid, ret);
9443 vsi->num_q_vectors = 0;
9444 goto vector_setup_out;
9447 /* In Legacy mode, we do not have to get any other vector since we
9448 * piggyback on the misc/ICR0 for queue interrupts.
9450 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9452 if (vsi->num_q_vectors)
9453 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9454 vsi->num_q_vectors, vsi->idx);
9455 if (vsi->base_vector < 0) {
9456 dev_info(&pf->pdev->dev,
9457 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9458 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9459 i40e_vsi_free_q_vectors(vsi);
9461 goto vector_setup_out;
9469 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9470 * @vsi: pointer to the vsi.
9472 * This re-allocates a vsi's queue resources.
9474 * Returns pointer to the successfully allocated and configured VSI sw struct
9475 * on success, otherwise returns NULL on failure.
9477 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9479 struct i40e_pf *pf = vsi->back;
9483 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9484 i40e_vsi_clear_rings(vsi);
9486 i40e_vsi_free_arrays(vsi, false);
9487 i40e_set_num_rings_in_vsi(vsi);
9488 ret = i40e_vsi_alloc_arrays(vsi, false);
9492 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9494 dev_info(&pf->pdev->dev,
9495 "failed to get tracking for %d queues for VSI %d err %d\n",
9496 vsi->alloc_queue_pairs, vsi->seid, ret);
9499 vsi->base_queue = ret;
9501 /* Update the FW view of the VSI. Force a reset of TC and queue
9502 * layout configurations.
9504 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9505 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9506 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9507 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9509 /* assign it some queues */
9510 ret = i40e_alloc_rings(vsi);
9514 /* map all of the rings to the q_vectors */
9515 i40e_vsi_map_rings_to_vectors(vsi);
9519 i40e_vsi_free_q_vectors(vsi);
9520 if (vsi->netdev_registered) {
9521 vsi->netdev_registered = false;
9522 unregister_netdev(vsi->netdev);
9523 free_netdev(vsi->netdev);
9526 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9528 i40e_vsi_clear(vsi);
9533 * i40e_macaddr_init - explicitly write the mac address filters.
9535 * @vsi: pointer to the vsi.
9536 * @macaddr: the MAC address
9538 * This is needed when the macaddr has been obtained by other
9539 * means than the default, e.g., from Open Firmware or IDPROM.
9540 * Returns 0 on success, negative on failure
9542 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9545 struct i40e_aqc_add_macvlan_element_data element;
9547 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9548 I40E_AQC_WRITE_TYPE_LAA_WOL,
9551 dev_info(&vsi->back->pdev->dev,
9552 "Addr change for VSI failed: %d\n", ret);
9553 return -EADDRNOTAVAIL;
9556 memset(&element, 0, sizeof(element));
9557 ether_addr_copy(element.mac_addr, macaddr);
9558 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9559 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9561 dev_info(&vsi->back->pdev->dev,
9562 "add filter failed err %s aq_err %s\n",
9563 i40e_stat_str(&vsi->back->hw, ret),
9564 i40e_aq_str(&vsi->back->hw,
9565 vsi->back->hw.aq.asq_last_status));
9571 * i40e_vsi_setup - Set up a VSI by a given type
9572 * @pf: board private structure
9574 * @uplink_seid: the switch element to link to
9575 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9577 * This allocates the sw VSI structure and its queue resources, then add a VSI
9578 * to the identified VEB.
9580 * Returns pointer to the successfully allocated and configure VSI sw struct on
9581 * success, otherwise returns NULL on failure.
9583 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9584 u16 uplink_seid, u32 param1)
9586 struct i40e_vsi *vsi = NULL;
9587 struct i40e_veb *veb = NULL;
9591 /* The requested uplink_seid must be either
9592 * - the PF's port seid
9593 * no VEB is needed because this is the PF
9594 * or this is a Flow Director special case VSI
9595 * - seid of an existing VEB
9596 * - seid of a VSI that owns an existing VEB
9597 * - seid of a VSI that doesn't own a VEB
9598 * a new VEB is created and the VSI becomes the owner
9599 * - seid of the PF VSI, which is what creates the first VEB
9600 * this is a special case of the previous
9602 * Find which uplink_seid we were given and create a new VEB if needed
9604 for (i = 0; i < I40E_MAX_VEB; i++) {
9605 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9611 if (!veb && uplink_seid != pf->mac_seid) {
9613 for (i = 0; i < pf->num_alloc_vsi; i++) {
9614 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9620 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9625 if (vsi->uplink_seid == pf->mac_seid)
9626 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9627 vsi->tc_config.enabled_tc);
9628 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9629 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9630 vsi->tc_config.enabled_tc);
9632 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9633 dev_info(&vsi->back->pdev->dev,
9634 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9637 /* We come up by default in VEPA mode if SRIOV is not
9638 * already enabled, in which case we can't force VEPA
9641 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9642 veb->bridge_mode = BRIDGE_MODE_VEPA;
9643 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9645 i40e_config_bridge_mode(veb);
9647 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9648 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9652 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9656 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9657 uplink_seid = veb->seid;
9660 /* get vsi sw struct */
9661 v_idx = i40e_vsi_mem_alloc(pf, type);
9664 vsi = pf->vsi[v_idx];
9668 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9670 if (type == I40E_VSI_MAIN)
9671 pf->lan_vsi = v_idx;
9672 else if (type == I40E_VSI_SRIOV)
9673 vsi->vf_id = param1;
9674 /* assign it some queues */
9675 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9678 dev_info(&pf->pdev->dev,
9679 "failed to get tracking for %d queues for VSI %d err=%d\n",
9680 vsi->alloc_queue_pairs, vsi->seid, ret);
9683 vsi->base_queue = ret;
9685 /* get a VSI from the hardware */
9686 vsi->uplink_seid = uplink_seid;
9687 ret = i40e_add_vsi(vsi);
9691 switch (vsi->type) {
9692 /* setup the netdev if needed */
9694 /* Apply relevant filters if a platform-specific mac
9695 * address was selected.
9697 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9698 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9700 dev_warn(&pf->pdev->dev,
9701 "could not set up macaddr; err %d\n",
9705 case I40E_VSI_VMDQ2:
9707 ret = i40e_config_netdev(vsi);
9710 ret = register_netdev(vsi->netdev);
9713 vsi->netdev_registered = true;
9714 netif_carrier_off(vsi->netdev);
9715 #ifdef CONFIG_I40E_DCB
9716 /* Setup DCB netlink interface */
9717 i40e_dcbnl_setup(vsi);
9718 #endif /* CONFIG_I40E_DCB */
9722 /* set up vectors and rings if needed */
9723 ret = i40e_vsi_setup_vectors(vsi);
9727 ret = i40e_alloc_rings(vsi);
9731 /* map all of the rings to the q_vectors */
9732 i40e_vsi_map_rings_to_vectors(vsi);
9734 i40e_vsi_reset_stats(vsi);
9738 /* no netdev or rings for the other VSI types */
9742 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9743 (vsi->type == I40E_VSI_VMDQ2)) {
9744 ret = i40e_vsi_config_rss(vsi);
9749 i40e_vsi_free_q_vectors(vsi);
9751 if (vsi->netdev_registered) {
9752 vsi->netdev_registered = false;
9753 unregister_netdev(vsi->netdev);
9754 free_netdev(vsi->netdev);
9758 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9760 i40e_vsi_clear(vsi);
9766 * i40e_veb_get_bw_info - Query VEB BW information
9767 * @veb: the veb to query
9769 * Query the Tx scheduler BW configuration data for given VEB
9771 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9773 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9774 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9775 struct i40e_pf *pf = veb->pf;
9776 struct i40e_hw *hw = &pf->hw;
9781 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9784 dev_info(&pf->pdev->dev,
9785 "query veb bw config failed, err %s aq_err %s\n",
9786 i40e_stat_str(&pf->hw, ret),
9787 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9791 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9794 dev_info(&pf->pdev->dev,
9795 "query veb bw ets config failed, err %s aq_err %s\n",
9796 i40e_stat_str(&pf->hw, ret),
9797 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9801 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9802 veb->bw_max_quanta = ets_data.tc_bw_max;
9803 veb->is_abs_credits = bw_data.absolute_credits_enable;
9804 veb->enabled_tc = ets_data.tc_valid_bits;
9805 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9806 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9807 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9808 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9809 veb->bw_tc_limit_credits[i] =
9810 le16_to_cpu(bw_data.tc_bw_limits[i]);
9811 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9819 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9820 * @pf: board private structure
9822 * On error: returns error code (negative)
9823 * On success: returns vsi index in PF (positive)
9825 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9828 struct i40e_veb *veb;
9831 /* Need to protect the allocation of switch elements at the PF level */
9832 mutex_lock(&pf->switch_mutex);
9834 /* VEB list may be fragmented if VEB creation/destruction has
9835 * been happening. We can afford to do a quick scan to look
9836 * for any free slots in the list.
9838 * find next empty veb slot, looping back around if necessary
9841 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9843 if (i >= I40E_MAX_VEB) {
9845 goto err_alloc_veb; /* out of VEB slots! */
9848 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9855 veb->enabled_tc = 1;
9860 mutex_unlock(&pf->switch_mutex);
9865 * i40e_switch_branch_release - Delete a branch of the switch tree
9866 * @branch: where to start deleting
9868 * This uses recursion to find the tips of the branch to be
9869 * removed, deleting until we get back to and can delete this VEB.
9871 static void i40e_switch_branch_release(struct i40e_veb *branch)
9873 struct i40e_pf *pf = branch->pf;
9874 u16 branch_seid = branch->seid;
9875 u16 veb_idx = branch->idx;
9878 /* release any VEBs on this VEB - RECURSION */
9879 for (i = 0; i < I40E_MAX_VEB; i++) {
9882 if (pf->veb[i]->uplink_seid == branch->seid)
9883 i40e_switch_branch_release(pf->veb[i]);
9886 /* Release the VSIs on this VEB, but not the owner VSI.
9888 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9889 * the VEB itself, so don't use (*branch) after this loop.
9891 for (i = 0; i < pf->num_alloc_vsi; i++) {
9894 if (pf->vsi[i]->uplink_seid == branch_seid &&
9895 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9896 i40e_vsi_release(pf->vsi[i]);
9900 /* There's one corner case where the VEB might not have been
9901 * removed, so double check it here and remove it if needed.
9902 * This case happens if the veb was created from the debugfs
9903 * commands and no VSIs were added to it.
9905 if (pf->veb[veb_idx])
9906 i40e_veb_release(pf->veb[veb_idx]);
9910 * i40e_veb_clear - remove veb struct
9911 * @veb: the veb to remove
9913 static void i40e_veb_clear(struct i40e_veb *veb)
9919 struct i40e_pf *pf = veb->pf;
9921 mutex_lock(&pf->switch_mutex);
9922 if (pf->veb[veb->idx] == veb)
9923 pf->veb[veb->idx] = NULL;
9924 mutex_unlock(&pf->switch_mutex);
9931 * i40e_veb_release - Delete a VEB and free its resources
9932 * @veb: the VEB being removed
9934 void i40e_veb_release(struct i40e_veb *veb)
9936 struct i40e_vsi *vsi = NULL;
9942 /* find the remaining VSI and check for extras */
9943 for (i = 0; i < pf->num_alloc_vsi; i++) {
9944 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9950 dev_info(&pf->pdev->dev,
9951 "can't remove VEB %d with %d VSIs left\n",
9956 /* move the remaining VSI to uplink veb */
9957 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9958 if (veb->uplink_seid) {
9959 vsi->uplink_seid = veb->uplink_seid;
9960 if (veb->uplink_seid == pf->mac_seid)
9961 vsi->veb_idx = I40E_NO_VEB;
9963 vsi->veb_idx = veb->veb_idx;
9966 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9967 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9970 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9971 i40e_veb_clear(veb);
9975 * i40e_add_veb - create the VEB in the switch
9976 * @veb: the VEB to be instantiated
9977 * @vsi: the controlling VSI
9979 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9981 struct i40e_pf *pf = veb->pf;
9982 bool is_default = veb->pf->cur_promisc;
9983 bool is_cloud = false;
9986 /* get a VEB from the hardware */
9987 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9988 veb->enabled_tc, is_default,
9989 is_cloud, &veb->seid, NULL);
9991 dev_info(&pf->pdev->dev,
9992 "couldn't add VEB, err %s aq_err %s\n",
9993 i40e_stat_str(&pf->hw, ret),
9994 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9998 /* get statistics counter */
9999 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10000 &veb->stats_idx, NULL, NULL, NULL);
10002 dev_info(&pf->pdev->dev,
10003 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10004 i40e_stat_str(&pf->hw, ret),
10005 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10008 ret = i40e_veb_get_bw_info(veb);
10010 dev_info(&pf->pdev->dev,
10011 "couldn't get VEB bw info, err %s aq_err %s\n",
10012 i40e_stat_str(&pf->hw, ret),
10013 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10014 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10018 vsi->uplink_seid = veb->seid;
10019 vsi->veb_idx = veb->idx;
10020 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10026 * i40e_veb_setup - Set up a VEB
10027 * @pf: board private structure
10028 * @flags: VEB setup flags
10029 * @uplink_seid: the switch element to link to
10030 * @vsi_seid: the initial VSI seid
10031 * @enabled_tc: Enabled TC bit-map
10033 * This allocates the sw VEB structure and links it into the switch
10034 * It is possible and legal for this to be a duplicate of an already
10035 * existing VEB. It is also possible for both uplink and vsi seids
10036 * to be zero, in order to create a floating VEB.
10038 * Returns pointer to the successfully allocated VEB sw struct on
10039 * success, otherwise returns NULL on failure.
10041 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10042 u16 uplink_seid, u16 vsi_seid,
10045 struct i40e_veb *veb, *uplink_veb = NULL;
10046 int vsi_idx, veb_idx;
10049 /* if one seid is 0, the other must be 0 to create a floating relay */
10050 if ((uplink_seid == 0 || vsi_seid == 0) &&
10051 (uplink_seid + vsi_seid != 0)) {
10052 dev_info(&pf->pdev->dev,
10053 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10054 uplink_seid, vsi_seid);
10058 /* make sure there is such a vsi and uplink */
10059 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10060 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10062 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10063 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10068 if (uplink_seid && uplink_seid != pf->mac_seid) {
10069 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10070 if (pf->veb[veb_idx] &&
10071 pf->veb[veb_idx]->seid == uplink_seid) {
10072 uplink_veb = pf->veb[veb_idx];
10077 dev_info(&pf->pdev->dev,
10078 "uplink seid %d not found\n", uplink_seid);
10083 /* get veb sw struct */
10084 veb_idx = i40e_veb_mem_alloc(pf);
10087 veb = pf->veb[veb_idx];
10088 veb->flags = flags;
10089 veb->uplink_seid = uplink_seid;
10090 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10091 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10093 /* create the VEB in the switch */
10094 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10097 if (vsi_idx == pf->lan_vsi)
10098 pf->lan_veb = veb->idx;
10103 i40e_veb_clear(veb);
10109 * i40e_setup_pf_switch_element - set PF vars based on switch type
10110 * @pf: board private structure
10111 * @ele: element we are building info from
10112 * @num_reported: total number of elements
10113 * @printconfig: should we print the contents
10115 * helper function to assist in extracting a few useful SEID values.
10117 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10118 struct i40e_aqc_switch_config_element_resp *ele,
10119 u16 num_reported, bool printconfig)
10121 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10122 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10123 u8 element_type = ele->element_type;
10124 u16 seid = le16_to_cpu(ele->seid);
10127 dev_info(&pf->pdev->dev,
10128 "type=%d seid=%d uplink=%d downlink=%d\n",
10129 element_type, seid, uplink_seid, downlink_seid);
10131 switch (element_type) {
10132 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10133 pf->mac_seid = seid;
10135 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10137 if (uplink_seid != pf->mac_seid)
10139 if (pf->lan_veb == I40E_NO_VEB) {
10142 /* find existing or else empty VEB */
10143 for (v = 0; v < I40E_MAX_VEB; v++) {
10144 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10149 if (pf->lan_veb == I40E_NO_VEB) {
10150 v = i40e_veb_mem_alloc(pf);
10157 pf->veb[pf->lan_veb]->seid = seid;
10158 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10159 pf->veb[pf->lan_veb]->pf = pf;
10160 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10162 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10163 if (num_reported != 1)
10165 /* This is immediately after a reset so we can assume this is
10168 pf->mac_seid = uplink_seid;
10169 pf->pf_seid = downlink_seid;
10170 pf->main_vsi_seid = seid;
10172 dev_info(&pf->pdev->dev,
10173 "pf_seid=%d main_vsi_seid=%d\n",
10174 pf->pf_seid, pf->main_vsi_seid);
10176 case I40E_SWITCH_ELEMENT_TYPE_PF:
10177 case I40E_SWITCH_ELEMENT_TYPE_VF:
10178 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10179 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10180 case I40E_SWITCH_ELEMENT_TYPE_PE:
10181 case I40E_SWITCH_ELEMENT_TYPE_PA:
10182 /* ignore these for now */
10185 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10186 element_type, seid);
10192 * i40e_fetch_switch_configuration - Get switch config from firmware
10193 * @pf: board private structure
10194 * @printconfig: should we print the contents
10196 * Get the current switch configuration from the device and
10197 * extract a few useful SEID values.
10199 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10201 struct i40e_aqc_get_switch_config_resp *sw_config;
10207 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10211 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10213 u16 num_reported, num_total;
10215 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10219 dev_info(&pf->pdev->dev,
10220 "get switch config failed err %s aq_err %s\n",
10221 i40e_stat_str(&pf->hw, ret),
10222 i40e_aq_str(&pf->hw,
10223 pf->hw.aq.asq_last_status));
10228 num_reported = le16_to_cpu(sw_config->header.num_reported);
10229 num_total = le16_to_cpu(sw_config->header.num_total);
10232 dev_info(&pf->pdev->dev,
10233 "header: %d reported %d total\n",
10234 num_reported, num_total);
10236 for (i = 0; i < num_reported; i++) {
10237 struct i40e_aqc_switch_config_element_resp *ele =
10238 &sw_config->element[i];
10240 i40e_setup_pf_switch_element(pf, ele, num_reported,
10243 } while (next_seid != 0);
10250 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10251 * @pf: board private structure
10252 * @reinit: if the Main VSI needs to re-initialized.
10254 * Returns 0 on success, negative value on failure
10256 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10260 /* find out what's out there already */
10261 ret = i40e_fetch_switch_configuration(pf, false);
10263 dev_info(&pf->pdev->dev,
10264 "couldn't fetch switch config, err %s aq_err %s\n",
10265 i40e_stat_str(&pf->hw, ret),
10266 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10269 i40e_pf_reset_stats(pf);
10271 /* first time setup */
10272 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10273 struct i40e_vsi *vsi = NULL;
10276 /* Set up the PF VSI associated with the PF's main VSI
10277 * that is already in the HW switch
10279 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10280 uplink_seid = pf->veb[pf->lan_veb]->seid;
10282 uplink_seid = pf->mac_seid;
10283 if (pf->lan_vsi == I40E_NO_VSI)
10284 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10286 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10288 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10289 i40e_fdir_teardown(pf);
10293 /* force a reset of TC and queue layout configurations */
10294 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10296 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10297 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10298 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10300 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10302 i40e_fdir_sb_setup(pf);
10304 /* Setup static PF queue filter control settings */
10305 ret = i40e_setup_pf_filter_control(pf);
10307 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10309 /* Failure here should not stop continuing other steps */
10312 /* enable RSS in the HW, even for only one queue, as the stack can use
10315 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10316 i40e_pf_config_rss(pf);
10318 /* fill in link information and enable LSE reporting */
10319 i40e_update_link_info(&pf->hw);
10320 i40e_link_event(pf);
10322 /* Initialize user-specific link properties */
10323 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10324 I40E_AQ_AN_COMPLETED) ? true : false);
10332 * i40e_determine_queue_usage - Work out queue distribution
10333 * @pf: board private structure
10335 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10339 pf->num_lan_qps = 0;
10341 pf->num_fcoe_qps = 0;
10344 /* Find the max queues to be put into basic use. We'll always be
10345 * using TC0, whether or not DCB is running, and TC0 will get the
10348 queues_left = pf->hw.func_caps.num_tx_qp;
10350 if ((queues_left == 1) ||
10351 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10352 /* one qp for PF, no queues for anything else */
10354 pf->alloc_rss_size = pf->num_lan_qps = 1;
10356 /* make sure all the fancies are disabled */
10357 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10359 I40E_FLAG_FCOE_ENABLED |
10361 I40E_FLAG_FD_SB_ENABLED |
10362 I40E_FLAG_FD_ATR_ENABLED |
10363 I40E_FLAG_DCB_CAPABLE |
10364 I40E_FLAG_SRIOV_ENABLED |
10365 I40E_FLAG_VMDQ_ENABLED);
10366 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10367 I40E_FLAG_FD_SB_ENABLED |
10368 I40E_FLAG_FD_ATR_ENABLED |
10369 I40E_FLAG_DCB_CAPABLE))) {
10370 /* one qp for PF */
10371 pf->alloc_rss_size = pf->num_lan_qps = 1;
10372 queues_left -= pf->num_lan_qps;
10374 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10376 I40E_FLAG_FCOE_ENABLED |
10378 I40E_FLAG_FD_SB_ENABLED |
10379 I40E_FLAG_FD_ATR_ENABLED |
10380 I40E_FLAG_DCB_ENABLED |
10381 I40E_FLAG_VMDQ_ENABLED);
10383 /* Not enough queues for all TCs */
10384 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10385 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10386 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10387 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10389 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10390 num_online_cpus());
10391 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10392 pf->hw.func_caps.num_tx_qp);
10394 queues_left -= pf->num_lan_qps;
10398 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10399 if (I40E_DEFAULT_FCOE <= queues_left) {
10400 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10401 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10402 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10404 pf->num_fcoe_qps = 0;
10405 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10406 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10409 queues_left -= pf->num_fcoe_qps;
10413 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10414 if (queues_left > 1) {
10415 queues_left -= 1; /* save 1 queue for FD */
10417 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10418 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10422 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10423 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10424 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10425 (queues_left / pf->num_vf_qps));
10426 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10429 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10430 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10431 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10432 (queues_left / pf->num_vmdq_qps));
10433 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10436 pf->queues_left = queues_left;
10437 dev_dbg(&pf->pdev->dev,
10438 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10439 pf->hw.func_caps.num_tx_qp,
10440 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10441 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10442 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10445 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10450 * i40e_setup_pf_filter_control - Setup PF static filter control
10451 * @pf: PF to be setup
10453 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10454 * settings. If PE/FCoE are enabled then it will also set the per PF
10455 * based filter sizes required for them. It also enables Flow director,
10456 * ethertype and macvlan type filter settings for the pf.
10458 * Returns 0 on success, negative on failure
10460 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10462 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10464 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10466 /* Flow Director is enabled */
10467 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10468 settings->enable_fdir = true;
10470 /* Ethtype and MACVLAN filters enabled for PF */
10471 settings->enable_ethtype = true;
10472 settings->enable_macvlan = true;
10474 if (i40e_set_filter_control(&pf->hw, settings))
10480 #define INFO_STRING_LEN 255
10481 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10482 static void i40e_print_features(struct i40e_pf *pf)
10484 struct i40e_hw *hw = &pf->hw;
10488 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10492 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10493 #ifdef CONFIG_PCI_IOV
10494 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10496 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10497 pf->hw.func_caps.num_vsis,
10498 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10499 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10501 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10502 i += snprintf(&buf[i], REMAIN(i), " RSS");
10503 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10504 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10505 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10506 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10507 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10509 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10510 i += snprintf(&buf[i], REMAIN(i), " DCB");
10511 #if IS_ENABLED(CONFIG_VXLAN)
10512 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10514 #if IS_ENABLED(CONFIG_GENEVE)
10515 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10517 if (pf->flags & I40E_FLAG_PTP)
10518 i += snprintf(&buf[i], REMAIN(i), " PTP");
10520 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10521 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10523 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10524 i += snprintf(&buf[i], REMAIN(i), " VEB");
10526 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10528 dev_info(&pf->pdev->dev, "%s\n", buf);
10530 WARN_ON(i > INFO_STRING_LEN);
10534 * i40e_get_platform_mac_addr - get platform-specific MAC address
10536 * @pdev: PCI device information struct
10537 * @pf: board private structure
10539 * Look up the MAC address in Open Firmware on systems that support it,
10540 * and use IDPROM on SPARC if no OF address is found. On return, the
10541 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10542 * has been selected.
10544 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10546 struct device_node *dp = pci_device_to_OF_node(pdev);
10547 const unsigned char *addr;
10548 u8 *mac_addr = pf->hw.mac.addr;
10550 pf->flags &= ~I40E_FLAG_PF_MAC;
10551 addr = of_get_mac_address(dp);
10553 ether_addr_copy(mac_addr, addr);
10554 pf->flags |= I40E_FLAG_PF_MAC;
10555 #ifdef CONFIG_SPARC
10557 ether_addr_copy(mac_addr, idprom->id_ethaddr);
10558 pf->flags |= I40E_FLAG_PF_MAC;
10559 #endif /* CONFIG_SPARC */
10564 * i40e_probe - Device initialization routine
10565 * @pdev: PCI device information struct
10566 * @ent: entry in i40e_pci_tbl
10568 * i40e_probe initializes a PF identified by a pci_dev structure.
10569 * The OS initialization, configuring of the PF private structure,
10570 * and a hardware reset occur.
10572 * Returns 0 on success, negative on failure
10574 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10576 struct i40e_aq_get_phy_abilities_resp abilities;
10577 struct i40e_pf *pf;
10578 struct i40e_hw *hw;
10579 static u16 pfs_found;
10588 err = pci_enable_device_mem(pdev);
10592 /* set up for high or low dma */
10593 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10595 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10597 dev_err(&pdev->dev,
10598 "DMA configuration failed: 0x%x\n", err);
10603 /* set up pci connections */
10604 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10605 IORESOURCE_MEM), i40e_driver_name);
10607 dev_info(&pdev->dev,
10608 "pci_request_selected_regions failed %d\n", err);
10612 pci_enable_pcie_error_reporting(pdev);
10613 pci_set_master(pdev);
10615 /* Now that we have a PCI connection, we need to do the
10616 * low level device setup. This is primarily setting up
10617 * the Admin Queue structures and then querying for the
10618 * device's current profile information.
10620 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10627 set_bit(__I40E_DOWN, &pf->state);
10632 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10633 I40E_MAX_CSR_SPACE);
10635 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10636 if (!hw->hw_addr) {
10638 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10639 (unsigned int)pci_resource_start(pdev, 0),
10640 pf->ioremap_len, err);
10643 hw->vendor_id = pdev->vendor;
10644 hw->device_id = pdev->device;
10645 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10646 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10647 hw->subsystem_device_id = pdev->subsystem_device;
10648 hw->bus.device = PCI_SLOT(pdev->devfn);
10649 hw->bus.func = PCI_FUNC(pdev->devfn);
10650 pf->instance = pfs_found;
10653 pf->msg_enable = pf->hw.debug_mask;
10654 pf->msg_enable = debug;
10657 /* do a special CORER for clearing PXE mode once at init */
10658 if (hw->revision_id == 0 &&
10659 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10660 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10665 i40e_clear_pxe_mode(hw);
10668 /* Reset here to make sure all is clean and to define PF 'n' */
10670 err = i40e_pf_reset(hw);
10672 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10677 hw->aq.num_arq_entries = I40E_AQ_LEN;
10678 hw->aq.num_asq_entries = I40E_AQ_LEN;
10679 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10680 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10681 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10683 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10685 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10687 err = i40e_init_shared_code(hw);
10689 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10694 /* set up a default setting for link flow control */
10695 pf->hw.fc.requested_mode = I40E_FC_NONE;
10697 /* set up the locks for the AQ, do this only once in probe
10698 * and destroy them only once in remove
10700 mutex_init(&hw->aq.asq_mutex);
10701 mutex_init(&hw->aq.arq_mutex);
10703 err = i40e_init_adminq(hw);
10705 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10706 dev_info(&pdev->dev,
10707 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10709 dev_info(&pdev->dev,
10710 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10715 /* provide nvm, fw, api versions */
10716 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10717 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10718 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10719 i40e_nvm_version_str(hw));
10721 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10722 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10723 dev_info(&pdev->dev,
10724 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10725 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10726 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10727 dev_info(&pdev->dev,
10728 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10730 i40e_verify_eeprom(pf);
10732 /* Rev 0 hardware was never productized */
10733 if (hw->revision_id < 1)
10734 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10736 i40e_clear_pxe_mode(hw);
10737 err = i40e_get_capabilities(pf);
10739 goto err_adminq_setup;
10741 err = i40e_sw_init(pf);
10743 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10747 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10748 hw->func_caps.num_rx_qp,
10749 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10751 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10752 goto err_init_lan_hmc;
10755 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10757 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10759 goto err_configure_lan_hmc;
10762 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10763 * Ignore error return codes because if it was already disabled via
10764 * hardware settings this will fail
10766 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10767 (pf->hw.aq.fw_maj_ver < 4)) {
10768 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10769 i40e_aq_stop_lldp(hw, true, NULL);
10772 i40e_get_mac_addr(hw, hw->mac.addr);
10773 /* allow a platform config to override the HW addr */
10774 i40e_get_platform_mac_addr(pdev, pf);
10775 if (!is_valid_ether_addr(hw->mac.addr)) {
10776 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10780 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10781 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10782 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10783 if (is_valid_ether_addr(hw->mac.port_addr))
10784 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10786 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10788 dev_info(&pdev->dev,
10789 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10790 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10791 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10793 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10795 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10796 #endif /* I40E_FCOE */
10798 pci_set_drvdata(pdev, pf);
10799 pci_save_state(pdev);
10800 #ifdef CONFIG_I40E_DCB
10801 err = i40e_init_pf_dcb(pf);
10803 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10804 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10805 /* Continue without DCB enabled */
10807 #endif /* CONFIG_I40E_DCB */
10809 /* set up periodic task facility */
10810 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10811 pf->service_timer_period = HZ;
10813 INIT_WORK(&pf->service_task, i40e_service_task);
10814 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10815 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10817 /* NVM bit on means WoL disabled for the port */
10818 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10819 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10820 pf->wol_en = false;
10823 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10825 /* set up the main switch operations */
10826 i40e_determine_queue_usage(pf);
10827 err = i40e_init_interrupt_scheme(pf);
10829 goto err_switch_setup;
10831 /* The number of VSIs reported by the FW is the minimum guaranteed
10832 * to us; HW supports far more and we share the remaining pool with
10833 * the other PFs. We allocate space for more than the guarantee with
10834 * the understanding that we might not get them all later.
10836 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10837 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10839 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10841 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10842 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10843 pf->vsi = kzalloc(len, GFP_KERNEL);
10846 goto err_switch_setup;
10849 #ifdef CONFIG_PCI_IOV
10850 /* prep for VF support */
10851 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10852 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10853 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10854 if (pci_num_vf(pdev))
10855 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10858 err = i40e_setup_pf_switch(pf, false);
10860 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10864 /* Make sure flow control is set according to current settings */
10865 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10866 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10867 dev_dbg(&pf->pdev->dev,
10868 "Set fc with err %s aq_err %s on get_phy_cap\n",
10869 i40e_stat_str(hw, err),
10870 i40e_aq_str(hw, hw->aq.asq_last_status));
10871 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10872 dev_dbg(&pf->pdev->dev,
10873 "Set fc with err %s aq_err %s on set_phy_config\n",
10874 i40e_stat_str(hw, err),
10875 i40e_aq_str(hw, hw->aq.asq_last_status));
10876 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10877 dev_dbg(&pf->pdev->dev,
10878 "Set fc with err %s aq_err %s on get_link_info\n",
10879 i40e_stat_str(hw, err),
10880 i40e_aq_str(hw, hw->aq.asq_last_status));
10882 /* if FDIR VSI was set up, start it now */
10883 for (i = 0; i < pf->num_alloc_vsi; i++) {
10884 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10885 i40e_vsi_open(pf->vsi[i]);
10890 /* driver is only interested in link up/down and module qualification
10891 * reports from firmware
10893 err = i40e_aq_set_phy_int_mask(&pf->hw,
10894 I40E_AQ_EVENT_LINK_UPDOWN |
10895 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10897 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10898 i40e_stat_str(&pf->hw, err),
10899 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10901 /* Reconfigure hardware for allowing smaller MSS in the case
10902 * of TSO, so that we avoid the MDD being fired and causing
10903 * a reset in the case of small MSS+TSO.
10905 val = rd32(hw, I40E_REG_MSS);
10906 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10907 val &= ~I40E_REG_MSS_MIN_MASK;
10908 val |= I40E_64BYTE_MSS;
10909 wr32(hw, I40E_REG_MSS, val);
10912 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10913 (pf->hw.aq.fw_maj_ver < 4)) {
10915 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10917 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10918 i40e_stat_str(&pf->hw, err),
10919 i40e_aq_str(&pf->hw,
10920 pf->hw.aq.asq_last_status));
10922 /* The main driver is (mostly) up and happy. We need to set this state
10923 * before setting up the misc vector or we get a race and the vector
10924 * ends up disabled forever.
10926 clear_bit(__I40E_DOWN, &pf->state);
10928 /* In case of MSIX we are going to setup the misc vector right here
10929 * to handle admin queue events etc. In case of legacy and MSI
10930 * the misc functionality and queue processing is combined in
10931 * the same vector and that gets setup at open.
10933 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10934 err = i40e_setup_misc_vector(pf);
10936 dev_info(&pdev->dev,
10937 "setup of misc vector failed: %d\n", err);
10942 #ifdef CONFIG_PCI_IOV
10943 /* prep for VF support */
10944 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10945 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10946 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10949 /* disable link interrupts for VFs */
10950 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10951 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10952 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10955 if (pci_num_vf(pdev)) {
10956 dev_info(&pdev->dev,
10957 "Active VFs found, allocating resources.\n");
10958 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10960 dev_info(&pdev->dev,
10961 "Error %d allocating resources for existing VFs\n",
10965 #endif /* CONFIG_PCI_IOV */
10969 i40e_dbg_pf_init(pf);
10971 /* tell the firmware that we're starting */
10972 i40e_send_version(pf);
10974 /* since everything's happy, start the service_task timer */
10975 mod_timer(&pf->service_timer,
10976 round_jiffies(jiffies + pf->service_timer_period));
10979 /* create FCoE interface */
10980 i40e_fcoe_vsi_setup(pf);
10983 #define PCI_SPEED_SIZE 8
10984 #define PCI_WIDTH_SIZE 8
10985 /* Devices on the IOSF bus do not have this information
10986 * and will report PCI Gen 1 x 1 by default so don't bother
10989 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10990 char speed[PCI_SPEED_SIZE] = "Unknown";
10991 char width[PCI_WIDTH_SIZE] = "Unknown";
10993 /* Get the negotiated link width and speed from PCI config
10996 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10999 i40e_set_pci_config_data(hw, link_status);
11001 switch (hw->bus.speed) {
11002 case i40e_bus_speed_8000:
11003 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11004 case i40e_bus_speed_5000:
11005 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11006 case i40e_bus_speed_2500:
11007 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11011 switch (hw->bus.width) {
11012 case i40e_bus_width_pcie_x8:
11013 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11014 case i40e_bus_width_pcie_x4:
11015 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11016 case i40e_bus_width_pcie_x2:
11017 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11018 case i40e_bus_width_pcie_x1:
11019 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11024 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11027 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11028 hw->bus.speed < i40e_bus_speed_8000) {
11029 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11030 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11034 /* get the requested speeds from the fw */
11035 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11037 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11038 i40e_stat_str(&pf->hw, err),
11039 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11040 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11042 /* get the supported phy types from the fw */
11043 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11045 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11046 i40e_stat_str(&pf->hw, err),
11047 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11048 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11050 /* Add a filter to drop all Flow control frames from any VSI from being
11051 * transmitted. By doing so we stop a malicious VF from sending out
11052 * PAUSE or PFC frames and potentially controlling traffic for other
11054 * The FW can still send Flow control frames if enabled.
11056 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11057 pf->main_vsi_seid);
11059 /* print a string summarizing features */
11060 i40e_print_features(pf);
11064 /* Unwind what we've done if something failed in the setup */
11066 set_bit(__I40E_DOWN, &pf->state);
11067 i40e_clear_interrupt_scheme(pf);
11070 i40e_reset_interrupt_capability(pf);
11071 del_timer_sync(&pf->service_timer);
11073 err_configure_lan_hmc:
11074 (void)i40e_shutdown_lan_hmc(hw);
11076 kfree(pf->qp_pile);
11079 (void)i40e_shutdown_adminq(hw);
11081 iounmap(hw->hw_addr);
11085 pci_disable_pcie_error_reporting(pdev);
11086 pci_release_selected_regions(pdev,
11087 pci_select_bars(pdev, IORESOURCE_MEM));
11090 pci_disable_device(pdev);
11095 * i40e_remove - Device removal routine
11096 * @pdev: PCI device information struct
11098 * i40e_remove is called by the PCI subsystem to alert the driver
11099 * that is should release a PCI device. This could be caused by a
11100 * Hot-Plug event, or because the driver is going to be removed from
11103 static void i40e_remove(struct pci_dev *pdev)
11105 struct i40e_pf *pf = pci_get_drvdata(pdev);
11106 struct i40e_hw *hw = &pf->hw;
11107 i40e_status ret_code;
11110 i40e_dbg_pf_exit(pf);
11114 /* Disable RSS in hw */
11115 wr32(hw, I40E_PFQF_HENA(0), 0);
11116 wr32(hw, I40E_PFQF_HENA(1), 0);
11118 /* no more scheduling of any task */
11119 set_bit(__I40E_DOWN, &pf->state);
11120 del_timer_sync(&pf->service_timer);
11121 cancel_work_sync(&pf->service_task);
11123 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11125 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11128 i40e_fdir_teardown(pf);
11130 /* If there is a switch structure or any orphans, remove them.
11131 * This will leave only the PF's VSI remaining.
11133 for (i = 0; i < I40E_MAX_VEB; i++) {
11137 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11138 pf->veb[i]->uplink_seid == 0)
11139 i40e_switch_branch_release(pf->veb[i]);
11142 /* Now we can shutdown the PF's VSI, just before we kill
11145 if (pf->vsi[pf->lan_vsi])
11146 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11148 /* shutdown and destroy the HMC */
11149 if (pf->hw.hmc.hmc_obj) {
11150 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
11152 dev_warn(&pdev->dev,
11153 "Failed to destroy the HMC resources: %d\n",
11157 /* shutdown the adminq */
11158 ret_code = i40e_shutdown_adminq(&pf->hw);
11160 dev_warn(&pdev->dev,
11161 "Failed to destroy the Admin Queue resources: %d\n",
11164 /* destroy the locks only once, here */
11165 mutex_destroy(&hw->aq.arq_mutex);
11166 mutex_destroy(&hw->aq.asq_mutex);
11168 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11169 i40e_clear_interrupt_scheme(pf);
11170 for (i = 0; i < pf->num_alloc_vsi; i++) {
11172 i40e_vsi_clear_rings(pf->vsi[i]);
11173 i40e_vsi_clear(pf->vsi[i]);
11178 for (i = 0; i < I40E_MAX_VEB; i++) {
11183 kfree(pf->qp_pile);
11186 iounmap(pf->hw.hw_addr);
11188 pci_release_selected_regions(pdev,
11189 pci_select_bars(pdev, IORESOURCE_MEM));
11191 pci_disable_pcie_error_reporting(pdev);
11192 pci_disable_device(pdev);
11196 * i40e_pci_error_detected - warning that something funky happened in PCI land
11197 * @pdev: PCI device information struct
11199 * Called to warn that something happened and the error handling steps
11200 * are in progress. Allows the driver to quiesce things, be ready for
11203 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11204 enum pci_channel_state error)
11206 struct i40e_pf *pf = pci_get_drvdata(pdev);
11208 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11210 /* shutdown all operations */
11211 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11213 i40e_prep_for_reset(pf);
11217 /* Request a slot reset */
11218 return PCI_ERS_RESULT_NEED_RESET;
11222 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11223 * @pdev: PCI device information struct
11225 * Called to find if the driver can work with the device now that
11226 * the pci slot has been reset. If a basic connection seems good
11227 * (registers are readable and have sane content) then return a
11228 * happy little PCI_ERS_RESULT_xxx.
11230 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11232 struct i40e_pf *pf = pci_get_drvdata(pdev);
11233 pci_ers_result_t result;
11237 dev_dbg(&pdev->dev, "%s\n", __func__);
11238 if (pci_enable_device_mem(pdev)) {
11239 dev_info(&pdev->dev,
11240 "Cannot re-enable PCI device after reset.\n");
11241 result = PCI_ERS_RESULT_DISCONNECT;
11243 pci_set_master(pdev);
11244 pci_restore_state(pdev);
11245 pci_save_state(pdev);
11246 pci_wake_from_d3(pdev, false);
11248 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11250 result = PCI_ERS_RESULT_RECOVERED;
11252 result = PCI_ERS_RESULT_DISCONNECT;
11255 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11257 dev_info(&pdev->dev,
11258 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11260 /* non-fatal, continue */
11267 * i40e_pci_error_resume - restart operations after PCI error recovery
11268 * @pdev: PCI device information struct
11270 * Called to allow the driver to bring things back up after PCI error
11271 * and/or reset recovery has finished.
11273 static void i40e_pci_error_resume(struct pci_dev *pdev)
11275 struct i40e_pf *pf = pci_get_drvdata(pdev);
11277 dev_dbg(&pdev->dev, "%s\n", __func__);
11278 if (test_bit(__I40E_SUSPENDED, &pf->state))
11282 i40e_handle_reset_warning(pf);
11287 * i40e_shutdown - PCI callback for shutting down
11288 * @pdev: PCI device information struct
11290 static void i40e_shutdown(struct pci_dev *pdev)
11292 struct i40e_pf *pf = pci_get_drvdata(pdev);
11293 struct i40e_hw *hw = &pf->hw;
11295 set_bit(__I40E_SUSPENDED, &pf->state);
11296 set_bit(__I40E_DOWN, &pf->state);
11298 i40e_prep_for_reset(pf);
11301 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11302 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11304 del_timer_sync(&pf->service_timer);
11305 cancel_work_sync(&pf->service_task);
11306 i40e_fdir_teardown(pf);
11309 i40e_prep_for_reset(pf);
11312 wr32(hw, I40E_PFPM_APM,
11313 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11314 wr32(hw, I40E_PFPM_WUFC,
11315 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11317 i40e_clear_interrupt_scheme(pf);
11319 if (system_state == SYSTEM_POWER_OFF) {
11320 pci_wake_from_d3(pdev, pf->wol_en);
11321 pci_set_power_state(pdev, PCI_D3hot);
11327 * i40e_suspend - PCI callback for moving to D3
11328 * @pdev: PCI device information struct
11330 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11332 struct i40e_pf *pf = pci_get_drvdata(pdev);
11333 struct i40e_hw *hw = &pf->hw;
11335 set_bit(__I40E_SUSPENDED, &pf->state);
11336 set_bit(__I40E_DOWN, &pf->state);
11339 i40e_prep_for_reset(pf);
11342 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11343 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11345 pci_wake_from_d3(pdev, pf->wol_en);
11346 pci_set_power_state(pdev, PCI_D3hot);
11352 * i40e_resume - PCI callback for waking up from D3
11353 * @pdev: PCI device information struct
11355 static int i40e_resume(struct pci_dev *pdev)
11357 struct i40e_pf *pf = pci_get_drvdata(pdev);
11360 pci_set_power_state(pdev, PCI_D0);
11361 pci_restore_state(pdev);
11362 /* pci_restore_state() clears dev->state_saves, so
11363 * call pci_save_state() again to restore it.
11365 pci_save_state(pdev);
11367 err = pci_enable_device_mem(pdev);
11369 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11372 pci_set_master(pdev);
11374 /* no wakeup events while running */
11375 pci_wake_from_d3(pdev, false);
11377 /* handling the reset will rebuild the device state */
11378 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11379 clear_bit(__I40E_DOWN, &pf->state);
11381 i40e_reset_and_rebuild(pf, false);
11389 static const struct pci_error_handlers i40e_err_handler = {
11390 .error_detected = i40e_pci_error_detected,
11391 .slot_reset = i40e_pci_error_slot_reset,
11392 .resume = i40e_pci_error_resume,
11395 static struct pci_driver i40e_driver = {
11396 .name = i40e_driver_name,
11397 .id_table = i40e_pci_tbl,
11398 .probe = i40e_probe,
11399 .remove = i40e_remove,
11401 .suspend = i40e_suspend,
11402 .resume = i40e_resume,
11404 .shutdown = i40e_shutdown,
11405 .err_handler = &i40e_err_handler,
11406 .sriov_configure = i40e_pci_sriov_configure,
11410 * i40e_init_module - Driver registration routine
11412 * i40e_init_module is the first routine called when the driver is
11413 * loaded. All it does is register with the PCI subsystem.
11415 static int __init i40e_init_module(void)
11417 pr_info("%s: %s - version %s\n", i40e_driver_name,
11418 i40e_driver_string, i40e_driver_version_str);
11419 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11422 return pci_register_driver(&i40e_driver);
11424 module_init(i40e_init_module);
11427 * i40e_exit_module - Driver exit cleanup routine
11429 * i40e_exit_module is called just before the driver is removed
11432 static void __exit i40e_exit_module(void)
11434 pci_unregister_driver(&i40e_driver);
11437 module_exit(i40e_exit_module);