1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 2
42 #define DRV_VERSION_BUILD 10
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
274 void i40e_tx_timeout(struct net_device *netdev)
276 static void i40e_tx_timeout(struct net_device *netdev)
279 struct i40e_netdev_priv *np = netdev_priv(netdev);
280 struct i40e_vsi *vsi = np->vsi;
281 struct i40e_pf *pf = vsi->back;
283 pf->tx_timeout_count++;
285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
286 pf->tx_timeout_recovery_level = 1;
287 pf->tx_timeout_last_recovery = jiffies;
288 netdev_info(netdev, "tx_timeout recovery level %d\n",
289 pf->tx_timeout_recovery_level);
291 switch (pf->tx_timeout_recovery_level) {
293 /* disable and re-enable queues for the VSI */
294 if (in_interrupt()) {
295 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
298 i40e_vsi_reinit_locked(vsi);
302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
312 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
316 i40e_service_event_schedule(pf);
317 pf->tx_timeout_recovery_level++;
321 * i40e_release_rx_desc - Store the new tail and head values
322 * @rx_ring: ring to bump
323 * @val: new head index
325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
327 rx_ring->next_to_use = val;
329 /* Force memory writes to complete before letting h/w
330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
335 writel(val, rx_ring->tail);
339 * i40e_get_vsi_stats_struct - Get System Network Statistics
340 * @vsi: the VSI we care about
342 * Returns the address of the device statistics structure.
343 * The statistics are actually updated from the service task.
345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
347 return &vsi->net_stats;
351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
352 * @netdev: network interface device structure
354 * Returns the address of the device statistics structure.
355 * The statistics are actually updated from the service task.
358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
359 struct net_device *netdev,
360 struct rtnl_link_stats64 *stats)
362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
363 struct net_device *netdev,
364 struct rtnl_link_stats64 *stats)
367 struct i40e_netdev_priv *np = netdev_priv(netdev);
368 struct i40e_ring *tx_ring, *rx_ring;
369 struct i40e_vsi *vsi = np->vsi;
370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
373 if (test_bit(__I40E_DOWN, &vsi->state))
380 for (i = 0; i < vsi->num_queue_pairs; i++) {
384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
390 packets = tx_ring->stats.packets;
391 bytes = tx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
394 stats->tx_packets += packets;
395 stats->tx_bytes += bytes;
396 rx_ring = &tx_ring[1];
399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
400 packets = rx_ring->stats.packets;
401 bytes = rx_ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
404 stats->rx_packets += packets;
405 stats->rx_bytes += bytes;
409 /* following stats updated by i40e_watchdog_subtask() */
410 stats->multicast = vsi_stats->multicast;
411 stats->tx_errors = vsi_stats->tx_errors;
412 stats->tx_dropped = vsi_stats->tx_dropped;
413 stats->rx_errors = vsi_stats->rx_errors;
414 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
415 stats->rx_length_errors = vsi_stats->rx_length_errors;
421 * i40e_vsi_reset_stats - Resets all stats of the given vsi
422 * @vsi: the VSI to have its stats reset
424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
426 struct rtnl_link_stats64 *ns;
432 ns = i40e_get_vsi_stats_struct(vsi);
433 memset(ns, 0, sizeof(*ns));
434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
437 if (vsi->rx_rings && vsi->rx_rings[0]) {
438 for (i = 0; i < vsi->num_queue_pairs; i++) {
439 memset(&vsi->rx_rings[i]->stats, 0 ,
440 sizeof(vsi->rx_rings[i]->stats));
441 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
442 sizeof(vsi->rx_rings[i]->rx_stats));
443 memset(&vsi->tx_rings[i]->stats, 0 ,
444 sizeof(vsi->tx_rings[i]->stats));
445 memset(&vsi->tx_rings[i]->tx_stats, 0,
446 sizeof(vsi->tx_rings[i]->tx_stats));
449 vsi->stat_offsets_loaded = false;
453 * i40e_pf_reset_stats - Reset all of the stats for the given pf
454 * @pf: the PF to be reset
456 void i40e_pf_reset_stats(struct i40e_pf *pf)
460 memset(&pf->stats, 0, sizeof(pf->stats));
461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
462 pf->stat_offsets_loaded = false;
464 for (i = 0; i < I40E_MAX_VEB; i++) {
466 memset(&pf->veb[i]->stats, 0,
467 sizeof(pf->veb[i]->stats));
468 memset(&pf->veb[i]->stats_offsets, 0,
469 sizeof(pf->veb[i]->stats_offsets));
470 pf->veb[i]->stat_offsets_loaded = false;
476 * i40e_stat_update48 - read and update a 48 bit stat from the chip
477 * @hw: ptr to the hardware info
478 * @hireg: the high 32 bit reg to read
479 * @loreg: the low 32 bit reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
484 * Since the device stats are not reset at PFReset, they likely will not
485 * be zeroed when the driver starts. We'll save the first values read
486 * and use them as offsets to be subtracted from the raw values in order
487 * to report stats that count from zero. In the process, we also manage
488 * the potential roll-over.
490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
491 bool offset_loaded, u64 *offset, u64 *stat)
495 if (hw->device_id == I40E_DEV_ID_QEMU) {
496 new_data = rd32(hw, loreg);
497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
499 new_data = rd64(hw, loreg);
503 if (likely(new_data >= *offset))
504 *stat = new_data - *offset;
506 *stat = (new_data + ((u64)1 << 48)) - *offset;
507 *stat &= 0xFFFFFFFFFFFFULL;
511 * i40e_stat_update32 - read and update a 32 bit stat from the chip
512 * @hw: ptr to the hardware info
513 * @reg: the hw reg to read
514 * @offset_loaded: has the initial offset been loaded yet
515 * @offset: ptr to current offset value
516 * @stat: ptr to the stat
518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
519 bool offset_loaded, u64 *offset, u64 *stat)
523 new_data = rd32(hw, reg);
526 if (likely(new_data >= *offset))
527 *stat = (u32)(new_data - *offset);
529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
534 * @vsi: the VSI to be updated
536 void i40e_update_eth_stats(struct i40e_vsi *vsi)
538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
539 struct i40e_pf *pf = vsi->back;
540 struct i40e_hw *hw = &pf->hw;
541 struct i40e_eth_stats *oes;
542 struct i40e_eth_stats *es; /* device's eth stats */
544 es = &vsi->eth_stats;
545 oes = &vsi->eth_stats_offsets;
547 /* Gather up the stats that the hw collects */
548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
549 vsi->stat_offsets_loaded,
550 &oes->tx_errors, &es->tx_errors);
551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_discards, &es->rx_discards);
554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
555 vsi->stat_offsets_loaded,
556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_errors, &es->tx_errors);
561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
562 I40E_GLV_GORCL(stat_idx),
563 vsi->stat_offsets_loaded,
564 &oes->rx_bytes, &es->rx_bytes);
565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
566 I40E_GLV_UPRCL(stat_idx),
567 vsi->stat_offsets_loaded,
568 &oes->rx_unicast, &es->rx_unicast);
569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
570 I40E_GLV_MPRCL(stat_idx),
571 vsi->stat_offsets_loaded,
572 &oes->rx_multicast, &es->rx_multicast);
573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
574 I40E_GLV_BPRCL(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_broadcast, &es->rx_broadcast);
578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
579 I40E_GLV_GOTCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->tx_bytes, &es->tx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
583 I40E_GLV_UPTCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->tx_unicast, &es->tx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
587 I40E_GLV_MPTCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->tx_multicast, &es->tx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
591 I40E_GLV_BPTCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->tx_broadcast, &es->tx_broadcast);
594 vsi->stat_offsets_loaded = true;
598 * i40e_update_veb_stats - Update Switch component statistics
599 * @veb: the VEB being updated
601 static void i40e_update_veb_stats(struct i40e_veb *veb)
603 struct i40e_pf *pf = veb->pf;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
609 idx = veb->stats_idx;
611 oes = &veb->stats_offsets;
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_discards, &es->tx_discards);
617 if (hw->revision_id > 0)
618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
619 veb->stat_offsets_loaded,
620 &oes->rx_unknown_protocol,
621 &es->rx_unknown_protocol);
622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
623 veb->stat_offsets_loaded,
624 &oes->rx_bytes, &es->rx_bytes);
625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
626 veb->stat_offsets_loaded,
627 &oes->rx_unicast, &es->rx_unicast);
628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
629 veb->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
632 veb->stat_offsets_loaded,
633 &oes->rx_broadcast, &es->rx_broadcast);
635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
636 veb->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_unicast, &es->tx_unicast);
641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
642 veb->stat_offsets_loaded,
643 &oes->tx_multicast, &es->tx_multicast);
644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
645 veb->stat_offsets_loaded,
646 &oes->tx_broadcast, &es->tx_broadcast);
647 veb->stat_offsets_loaded = true;
652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
653 * @vsi: the VSI that is capable of doing FCoE
655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
657 struct i40e_pf *pf = vsi->back;
658 struct i40e_hw *hw = &pf->hw;
659 struct i40e_fcoe_stats *ofs;
660 struct i40e_fcoe_stats *fs; /* device's eth stats */
663 if (vsi->type != I40E_VSI_FCOE)
666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
667 fs = &vsi->fcoe_stats;
668 ofs = &vsi->fcoe_stats_offsets;
670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
671 vsi->fcoe_stat_offsets_loaded,
672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
674 vsi->fcoe_stat_offsets_loaded,
675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
677 vsi->fcoe_stat_offsets_loaded,
678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
680 vsi->fcoe_stat_offsets_loaded,
681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
683 vsi->fcoe_stat_offsets_loaded,
684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
686 vsi->fcoe_stat_offsets_loaded,
687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
689 vsi->fcoe_stat_offsets_loaded,
690 &ofs->fcoe_last_error, &fs->fcoe_last_error);
691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
692 vsi->fcoe_stat_offsets_loaded,
693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
695 vsi->fcoe_stat_offsets_loaded = true;
700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
701 * @pf: the corresponding PF
703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
707 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
708 struct i40e_hw_port_stats *nsd = &pf->stats;
709 struct i40e_hw *hw = &pf->hw;
713 if ((hw->fc.current_mode != I40E_FC_FULL) &&
714 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
717 xoff = nsd->link_xoff_rx;
718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
719 pf->stat_offsets_loaded,
720 &osd->link_xoff_rx, &nsd->link_xoff_rx);
722 /* No new LFC xoff rx */
723 if (!(nsd->link_xoff_rx - xoff))
726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
727 for (v = 0; v < pf->num_alloc_vsi; v++) {
728 struct i40e_vsi *vsi = pf->vsi[v];
730 if (!vsi || !vsi->tx_rings[0])
733 for (i = 0; i < vsi->num_queue_pairs; i++) {
734 struct i40e_ring *ring = vsi->tx_rings[i];
735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
742 * @pf: the corresponding PF
744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
748 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
749 struct i40e_hw_port_stats *nsd = &pf->stats;
750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
751 struct i40e_dcbx_config *dcb_cfg;
752 struct i40e_hw *hw = &pf->hw;
756 dcb_cfg = &hw->local_dcbx_config;
758 /* See if DCB enabled with PFC TC */
759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
760 !(dcb_cfg->pfc.pfcenable)) {
761 i40e_update_link_xoff_rx(pf);
765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
766 u64 prio_xoff = nsd->priority_xoff_rx[i];
767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
768 pf->stat_offsets_loaded,
769 &osd->priority_xoff_rx[i],
770 &nsd->priority_xoff_rx[i]);
772 /* No new PFC xoff rx */
773 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
775 /* Get the TC for given priority */
776 tc = dcb_cfg->etscfg.prioritytable[i];
780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
781 for (v = 0; v < pf->num_alloc_vsi; v++) {
782 struct i40e_vsi *vsi = pf->vsi[v];
784 if (!vsi || !vsi->tx_rings[0])
787 for (i = 0; i < vsi->num_queue_pairs; i++) {
788 struct i40e_ring *ring = vsi->tx_rings[i];
792 clear_bit(__I40E_HANG_CHECK_ARMED,
799 * i40e_update_vsi_stats - Update the vsi statistics counters.
800 * @vsi: the VSI to be updated
802 * There are a few instances where we store the same stat in a
803 * couple of different structs. This is partly because we have
804 * the netdev stats that need to be filled out, which is slightly
805 * different from the "eth_stats" defined by the chip and used in
806 * VF communications. We sort it out here.
808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
810 struct i40e_pf *pf = vsi->back;
811 struct rtnl_link_stats64 *ons;
812 struct rtnl_link_stats64 *ns; /* netdev stats */
813 struct i40e_eth_stats *oes;
814 struct i40e_eth_stats *es; /* device's eth stats */
815 u32 tx_restart, tx_busy;
824 if (test_bit(__I40E_DOWN, &vsi->state) ||
825 test_bit(__I40E_CONFIG_BUSY, &pf->state))
828 ns = i40e_get_vsi_stats_struct(vsi);
829 ons = &vsi->net_stats_offsets;
830 es = &vsi->eth_stats;
831 oes = &vsi->eth_stats_offsets;
833 /* Gather up the netdev and vsi stats that the driver collects
834 * on the fly during packet processing
838 tx_restart = tx_busy = 0;
842 for (q = 0; q < vsi->num_queue_pairs; q++) {
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
856 /* Rx queue is part of the same block as Tx queue */
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
874 ns->rx_packets = rx_p;
876 ns->tx_packets = tx_p;
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
923 I40E_GLPRT_UPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_unicast,
926 &nsd->eth.rx_unicast);
927 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
928 I40E_GLPRT_MPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_multicast,
931 &nsd->eth.rx_multicast);
932 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
933 I40E_GLPRT_BPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_broadcast,
936 &nsd->eth.rx_broadcast);
937 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
938 I40E_GLPRT_UPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_unicast,
941 &nsd->eth.tx_unicast);
942 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
943 I40E_GLPRT_MPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_multicast,
946 &nsd->eth.tx_multicast);
947 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
948 I40E_GLPRT_BPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_broadcast,
951 &nsd->eth.tx_broadcast);
953 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_dropped_link_down,
956 &nsd->tx_dropped_link_down);
958 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->crc_errors, &nsd->crc_errors);
962 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->illegal_bytes, &nsd->illegal_bytes);
966 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->mac_local_faults,
969 &nsd->mac_local_faults);
970 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->mac_remote_faults,
973 &nsd->mac_remote_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->rx_length_errors,
978 &nsd->rx_length_errors);
980 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->link_xon_rx, &nsd->link_xon_rx);
983 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->link_xon_tx, &nsd->link_xon_tx);
986 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
987 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->link_xoff_tx, &nsd->link_xoff_tx);
991 for (i = 0; i < 8; i++) {
992 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
993 pf->stat_offsets_loaded,
994 &osd->priority_xon_rx[i],
995 &nsd->priority_xon_rx[i]);
996 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
997 pf->stat_offsets_loaded,
998 &osd->priority_xon_tx[i],
999 &nsd->priority_xon_tx[i]);
1000 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1001 pf->stat_offsets_loaded,
1002 &osd->priority_xoff_tx[i],
1003 &nsd->priority_xoff_tx[i]);
1004 i40e_stat_update32(hw,
1005 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xon_2_xoff[i],
1008 &nsd->priority_xon_2_xoff[i]);
1011 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1012 I40E_GLPRT_PRC64L(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->rx_size_64, &nsd->rx_size_64);
1015 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1016 I40E_GLPRT_PRC127L(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->rx_size_127, &nsd->rx_size_127);
1019 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1020 I40E_GLPRT_PRC255L(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_size_255, &nsd->rx_size_255);
1023 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1024 I40E_GLPRT_PRC511L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_size_511, &nsd->rx_size_511);
1027 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1028 I40E_GLPRT_PRC1023L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->rx_size_1023, &nsd->rx_size_1023);
1031 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1032 I40E_GLPRT_PRC1522L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_size_1522, &nsd->rx_size_1522);
1035 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1036 I40E_GLPRT_PRC9522L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_size_big, &nsd->rx_size_big);
1040 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1041 I40E_GLPRT_PTC64L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->tx_size_64, &nsd->tx_size_64);
1044 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1045 I40E_GLPRT_PTC127L(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->tx_size_127, &nsd->tx_size_127);
1048 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1049 I40E_GLPRT_PTC255L(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->tx_size_255, &nsd->tx_size_255);
1052 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1053 I40E_GLPRT_PTC511L(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->tx_size_511, &nsd->tx_size_511);
1056 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1057 I40E_GLPRT_PTC1023L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->tx_size_1023, &nsd->tx_size_1023);
1060 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1061 I40E_GLPRT_PTC1522L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->tx_size_1522, &nsd->tx_size_1522);
1064 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1065 I40E_GLPRT_PTC9522L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->tx_size_big, &nsd->tx_size_big);
1069 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->rx_undersize, &nsd->rx_undersize);
1072 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->rx_fragments, &nsd->rx_fragments);
1075 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->rx_oversize, &nsd->rx_oversize);
1078 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_jabber, &nsd->rx_jabber);
1083 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1087 pf->stat_offsets_loaded,
1088 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1091 nsd->tx_lpi_status =
1092 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1093 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1094 nsd->rx_lpi_status =
1095 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1096 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1097 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1098 pf->stat_offsets_loaded,
1099 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1100 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1101 pf->stat_offsets_loaded,
1102 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1104 pf->stat_offsets_loaded = true;
1108 * i40e_update_stats - Update the various statistics counters.
1109 * @vsi: the VSI to be updated
1111 * Update the various stats for this VSI and its related entities.
1113 void i40e_update_stats(struct i40e_vsi *vsi)
1115 struct i40e_pf *pf = vsi->back;
1117 if (vsi == pf->vsi[pf->lan_vsi])
1118 i40e_update_pf_stats(pf);
1120 i40e_update_vsi_stats(vsi);
1122 i40e_update_fcoe_stats(vsi);
1127 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1128 * @vsi: the VSI to be searched
1129 * @macaddr: the MAC address
1131 * @is_vf: make sure its a vf filter, else doesn't matter
1132 * @is_netdev: make sure its a netdev filter, else doesn't matter
1134 * Returns ptr to the filter object or NULL
1136 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1137 u8 *macaddr, s16 vlan,
1138 bool is_vf, bool is_netdev)
1140 struct i40e_mac_filter *f;
1142 if (!vsi || !macaddr)
1145 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1146 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1147 (vlan == f->vlan) &&
1148 (!is_vf || f->is_vf) &&
1149 (!is_netdev || f->is_netdev))
1156 * i40e_find_mac - Find a mac addr in the macvlan filters list
1157 * @vsi: the VSI to be searched
1158 * @macaddr: the MAC address we are searching for
1159 * @is_vf: make sure its a vf filter, else doesn't matter
1160 * @is_netdev: make sure its a netdev filter, else doesn't matter
1162 * Returns the first filter with the provided MAC address or NULL if
1163 * MAC address was not found
1165 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1166 bool is_vf, bool is_netdev)
1168 struct i40e_mac_filter *f;
1170 if (!vsi || !macaddr)
1173 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1174 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1175 (!is_vf || f->is_vf) &&
1176 (!is_netdev || f->is_netdev))
1183 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1184 * @vsi: the VSI to be searched
1186 * Returns true if VSI is in vlan mode or false otherwise
1188 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1190 struct i40e_mac_filter *f;
1192 /* Only -1 for all the filters denotes not in vlan mode
1193 * so we have to go through all the list in order to make sure
1195 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1204 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1205 * @vsi: the VSI to be searched
1206 * @macaddr: the mac address to be filtered
1207 * @is_vf: true if it is a vf
1208 * @is_netdev: true if it is a netdev
1210 * Goes through all the macvlan filters and adds a
1211 * macvlan filter for each unique vlan that already exists
1213 * Returns first filter found on success, else NULL
1215 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1216 bool is_vf, bool is_netdev)
1218 struct i40e_mac_filter *f;
1220 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1221 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1222 is_vf, is_netdev)) {
1223 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1229 return list_first_entry_or_null(&vsi->mac_filter_list,
1230 struct i40e_mac_filter, list);
1234 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1235 * @vsi: the PF Main VSI - inappropriate for any other VSI
1236 * @macaddr: the MAC address
1238 * Some older firmware configurations set up a default promiscuous VLAN
1239 * filter that needs to be removed.
1241 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1243 struct i40e_aqc_remove_macvlan_element_data element;
1244 struct i40e_pf *pf = vsi->back;
1247 /* Only appropriate for the PF main VSI */
1248 if (vsi->type != I40E_VSI_MAIN)
1251 memset(&element, 0, sizeof(element));
1252 ether_addr_copy(element.mac_addr, macaddr);
1253 element.vlan_tag = 0;
1254 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1255 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1256 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1264 * i40e_add_filter - Add a mac/vlan filter to the VSI
1265 * @vsi: the VSI to be searched
1266 * @macaddr: the MAC address
1268 * @is_vf: make sure its a vf filter, else doesn't matter
1269 * @is_netdev: make sure its a netdev filter, else doesn't matter
1271 * Returns ptr to the filter object or NULL when no memory available.
1273 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1274 u8 *macaddr, s16 vlan,
1275 bool is_vf, bool is_netdev)
1277 struct i40e_mac_filter *f;
1279 if (!vsi || !macaddr)
1282 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1284 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1286 goto add_filter_out;
1288 ether_addr_copy(f->macaddr, macaddr);
1292 INIT_LIST_HEAD(&f->list);
1293 list_add(&f->list, &vsi->mac_filter_list);
1296 /* increment counter and add a new flag if needed */
1302 } else if (is_netdev) {
1303 if (!f->is_netdev) {
1304 f->is_netdev = true;
1311 /* changed tells sync_filters_subtask to
1312 * push the filter down to the firmware
1315 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1316 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1324 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1325 * @vsi: the VSI to be searched
1326 * @macaddr: the MAC address
1328 * @is_vf: make sure it's a vf filter, else doesn't matter
1329 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1331 void i40e_del_filter(struct i40e_vsi *vsi,
1332 u8 *macaddr, s16 vlan,
1333 bool is_vf, bool is_netdev)
1335 struct i40e_mac_filter *f;
1337 if (!vsi || !macaddr)
1340 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1341 if (!f || f->counter == 0)
1349 } else if (is_netdev) {
1351 f->is_netdev = false;
1355 /* make sure we don't remove a filter in use by vf or netdev */
1357 min_f += (f->is_vf ? 1 : 0);
1358 min_f += (f->is_netdev ? 1 : 0);
1360 if (f->counter > min_f)
1364 /* counter == 0 tells sync_filters_subtask to
1365 * remove the filter from the firmware's list
1367 if (f->counter == 0) {
1369 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1370 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1375 * i40e_set_mac - NDO callback to set mac address
1376 * @netdev: network interface device structure
1377 * @p: pointer to an address structure
1379 * Returns 0 on success, negative on failure
1382 int i40e_set_mac(struct net_device *netdev, void *p)
1384 static int i40e_set_mac(struct net_device *netdev, void *p)
1387 struct i40e_netdev_priv *np = netdev_priv(netdev);
1388 struct i40e_vsi *vsi = np->vsi;
1389 struct i40e_pf *pf = vsi->back;
1390 struct i40e_hw *hw = &pf->hw;
1391 struct sockaddr *addr = p;
1392 struct i40e_mac_filter *f;
1394 if (!is_valid_ether_addr(addr->sa_data))
1395 return -EADDRNOTAVAIL;
1397 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1398 netdev_info(netdev, "already using mac address %pM\n",
1403 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1404 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1405 return -EADDRNOTAVAIL;
1407 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1408 netdev_info(netdev, "returning to hw mac address %pM\n",
1411 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1413 if (vsi->type == I40E_VSI_MAIN) {
1415 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1416 I40E_AQC_WRITE_TYPE_LAA_WOL,
1417 addr->sa_data, NULL);
1420 "Addr change for Main VSI failed: %d\n",
1422 return -EADDRNOTAVAIL;
1426 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1427 struct i40e_aqc_remove_macvlan_element_data element;
1429 memset(&element, 0, sizeof(element));
1430 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1431 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1432 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1434 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1438 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1439 struct i40e_aqc_add_macvlan_element_data element;
1441 memset(&element, 0, sizeof(element));
1442 ether_addr_copy(element.mac_addr, hw->mac.addr);
1443 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1444 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1446 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1452 i40e_sync_vsi_filters(vsi);
1453 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1459 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1460 * @vsi: the VSI being setup
1461 * @ctxt: VSI context structure
1462 * @enabled_tc: Enabled TCs bitmap
1463 * @is_add: True if called before Add VSI
1465 * Setup VSI queue mapping for enabled traffic classes.
1468 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1469 struct i40e_vsi_context *ctxt,
1473 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1479 struct i40e_pf *pf = vsi->back;
1489 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1492 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1493 /* Find numtc from enabled TC bitmap */
1494 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1495 if (enabled_tc & (1 << i)) /* TC is enabled */
1499 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1503 /* At least TC0 is enabled in case of non-DCB case */
1507 vsi->tc_config.numtc = numtc;
1508 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1509 /* Number of queues per enabled TC */
1510 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1511 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1513 /* Setup queue offset/count for all TCs for given VSI */
1514 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1515 /* See if the given TC is enabled for the given VSI */
1516 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1519 switch (vsi->type) {
1521 qcount = min_t(int, pf->rss_size, num_tc_qps);
1525 qcount = num_tc_qps;
1529 case I40E_VSI_SRIOV:
1530 case I40E_VSI_VMDQ2:
1532 qcount = num_tc_qps;
1536 vsi->tc_config.tc_info[i].qoffset = offset;
1537 vsi->tc_config.tc_info[i].qcount = qcount;
1539 /* find the power-of-2 of the number of queue pairs */
1542 while (num_qps && ((1 << pow) < qcount)) {
1547 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1549 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1550 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1554 /* TC is not enabled so set the offset to
1555 * default queue and allocate one queue
1558 vsi->tc_config.tc_info[i].qoffset = 0;
1559 vsi->tc_config.tc_info[i].qcount = 1;
1560 vsi->tc_config.tc_info[i].netdev_tc = 0;
1564 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1567 /* Set actual Tx/Rx queue pairs */
1568 vsi->num_queue_pairs = offset;
1569 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1570 if (vsi->req_queue_pairs > 0)
1571 vsi->num_queue_pairs = vsi->req_queue_pairs;
1573 vsi->num_queue_pairs = pf->num_lan_msix;
1576 /* Scheduler section valid can only be set for ADD VSI */
1578 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1580 ctxt->info.up_enable_bits = enabled_tc;
1582 if (vsi->type == I40E_VSI_SRIOV) {
1583 ctxt->info.mapping_flags |=
1584 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1585 for (i = 0; i < vsi->num_queue_pairs; i++)
1586 ctxt->info.queue_mapping[i] =
1587 cpu_to_le16(vsi->base_queue + i);
1589 ctxt->info.mapping_flags |=
1590 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1591 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1593 ctxt->info.valid_sections |= cpu_to_le16(sections);
1597 * i40e_set_rx_mode - NDO callback to set the netdev filters
1598 * @netdev: network interface device structure
1601 void i40e_set_rx_mode(struct net_device *netdev)
1603 static void i40e_set_rx_mode(struct net_device *netdev)
1606 struct i40e_netdev_priv *np = netdev_priv(netdev);
1607 struct i40e_mac_filter *f, *ftmp;
1608 struct i40e_vsi *vsi = np->vsi;
1609 struct netdev_hw_addr *uca;
1610 struct netdev_hw_addr *mca;
1611 struct netdev_hw_addr *ha;
1613 /* add addr if not already in the filter list */
1614 netdev_for_each_uc_addr(uca, netdev) {
1615 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1616 if (i40e_is_vsi_in_vlan(vsi))
1617 i40e_put_mac_in_vlan(vsi, uca->addr,
1620 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1625 netdev_for_each_mc_addr(mca, netdev) {
1626 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1627 if (i40e_is_vsi_in_vlan(vsi))
1628 i40e_put_mac_in_vlan(vsi, mca->addr,
1631 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1636 /* remove filter if not in netdev list */
1637 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1643 if (is_multicast_ether_addr(f->macaddr)) {
1644 netdev_for_each_mc_addr(mca, netdev) {
1645 if (ether_addr_equal(mca->addr, f->macaddr)) {
1651 netdev_for_each_uc_addr(uca, netdev) {
1652 if (ether_addr_equal(uca->addr, f->macaddr)) {
1658 for_each_dev_addr(netdev, ha) {
1659 if (ether_addr_equal(ha->addr, f->macaddr)) {
1667 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1670 /* check for other flag changes */
1671 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1672 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1673 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1678 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1679 * @vsi: ptr to the VSI
1681 * Push any outstanding VSI filter changes through the AdminQ.
1683 * Returns 0 or error value
1685 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1687 struct i40e_mac_filter *f, *ftmp;
1688 bool promisc_forced_on = false;
1689 bool add_happened = false;
1690 int filter_list_len = 0;
1691 u32 changed_flags = 0;
1692 i40e_status aq_ret = 0;
1698 /* empty array typed pointers, kcalloc later */
1699 struct i40e_aqc_add_macvlan_element_data *add_list;
1700 struct i40e_aqc_remove_macvlan_element_data *del_list;
1702 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1703 usleep_range(1000, 2000);
1707 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1708 vsi->current_netdev_flags = vsi->netdev->flags;
1711 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1712 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1714 filter_list_len = pf->hw.aq.asq_buf_size /
1715 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1716 del_list = kcalloc(filter_list_len,
1717 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1722 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1726 if (f->counter != 0)
1731 /* add to delete list */
1732 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1733 del_list[num_del].vlan_tag =
1734 cpu_to_le16((u16)(f->vlan ==
1735 I40E_VLAN_ANY ? 0 : f->vlan));
1737 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1738 del_list[num_del].flags = cmd_flags;
1741 /* unlink from filter list */
1745 /* flush a full buffer */
1746 if (num_del == filter_list_len) {
1747 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1748 vsi->seid, del_list, num_del,
1751 memset(del_list, 0, sizeof(*del_list));
1754 pf->hw.aq.asq_last_status !=
1756 dev_info(&pf->pdev->dev,
1757 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1759 pf->hw.aq.asq_last_status);
1763 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1764 del_list, num_del, NULL);
1768 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1769 dev_info(&pf->pdev->dev,
1770 "ignoring delete macvlan error, err %d, aq_err %d\n",
1771 aq_ret, pf->hw.aq.asq_last_status);
1777 /* do all the adds now */
1778 filter_list_len = pf->hw.aq.asq_buf_size /
1779 sizeof(struct i40e_aqc_add_macvlan_element_data),
1780 add_list = kcalloc(filter_list_len,
1781 sizeof(struct i40e_aqc_add_macvlan_element_data),
1786 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1790 if (f->counter == 0)
1793 add_happened = true;
1796 /* add to add array */
1797 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1798 add_list[num_add].vlan_tag =
1800 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1801 add_list[num_add].queue_number = 0;
1803 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1804 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1807 /* flush a full buffer */
1808 if (num_add == filter_list_len) {
1809 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1816 memset(add_list, 0, sizeof(*add_list));
1820 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1821 add_list, num_add, NULL);
1827 if (add_happened && aq_ret &&
1828 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1829 dev_info(&pf->pdev->dev,
1830 "add filter failed, err %d, aq_err %d\n",
1831 aq_ret, pf->hw.aq.asq_last_status);
1832 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1833 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1835 promisc_forced_on = true;
1836 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1838 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1843 /* check for changes in promiscuous modes */
1844 if (changed_flags & IFF_ALLMULTI) {
1845 bool cur_multipromisc;
1846 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1847 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1852 dev_info(&pf->pdev->dev,
1853 "set multi promisc failed, err %d, aq_err %d\n",
1854 aq_ret, pf->hw.aq.asq_last_status);
1856 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1858 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1859 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1861 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1865 dev_info(&pf->pdev->dev,
1866 "set uni promisc failed, err %d, aq_err %d\n",
1867 aq_ret, pf->hw.aq.asq_last_status);
1868 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1872 dev_info(&pf->pdev->dev,
1873 "set brdcast promisc failed, err %d, aq_err %d\n",
1874 aq_ret, pf->hw.aq.asq_last_status);
1877 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1882 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1883 * @pf: board private structure
1885 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1889 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1891 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1893 for (v = 0; v < pf->num_alloc_vsi; v++) {
1895 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1896 i40e_sync_vsi_filters(pf->vsi[v]);
1901 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1902 * @netdev: network interface device structure
1903 * @new_mtu: new value for maximum frame size
1905 * Returns 0 on success, negative on failure
1907 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1909 struct i40e_netdev_priv *np = netdev_priv(netdev);
1910 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1911 struct i40e_vsi *vsi = np->vsi;
1913 /* MTU < 68 is an error and causes problems on some kernels */
1914 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1917 netdev_info(netdev, "changing MTU from %d to %d\n",
1918 netdev->mtu, new_mtu);
1919 netdev->mtu = new_mtu;
1920 if (netif_running(netdev))
1921 i40e_vsi_reinit_locked(vsi);
1927 * i40e_ioctl - Access the hwtstamp interface
1928 * @netdev: network interface device structure
1929 * @ifr: interface request data
1930 * @cmd: ioctl command
1932 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1934 struct i40e_netdev_priv *np = netdev_priv(netdev);
1935 struct i40e_pf *pf = np->vsi->back;
1939 return i40e_ptp_get_ts_config(pf, ifr);
1941 return i40e_ptp_set_ts_config(pf, ifr);
1948 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1949 * @vsi: the vsi being adjusted
1951 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1953 struct i40e_vsi_context ctxt;
1956 if ((vsi->info.valid_sections &
1957 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1958 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1959 return; /* already enabled */
1961 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1962 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1963 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1965 ctxt.seid = vsi->seid;
1966 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1967 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1969 dev_info(&vsi->back->pdev->dev,
1970 "%s: update vsi failed, aq_err=%d\n",
1971 __func__, vsi->back->hw.aq.asq_last_status);
1976 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1977 * @vsi: the vsi being adjusted
1979 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1981 struct i40e_vsi_context ctxt;
1984 if ((vsi->info.valid_sections &
1985 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1986 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1987 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1988 return; /* already disabled */
1990 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1991 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1992 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1994 ctxt.seid = vsi->seid;
1995 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1996 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1998 dev_info(&vsi->back->pdev->dev,
1999 "%s: update vsi failed, aq_err=%d\n",
2000 __func__, vsi->back->hw.aq.asq_last_status);
2005 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2006 * @netdev: network interface to be adjusted
2007 * @features: netdev features to test if VLAN offload is enabled or not
2009 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2011 struct i40e_netdev_priv *np = netdev_priv(netdev);
2012 struct i40e_vsi *vsi = np->vsi;
2014 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2015 i40e_vlan_stripping_enable(vsi);
2017 i40e_vlan_stripping_disable(vsi);
2021 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2022 * @vsi: the vsi being configured
2023 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2025 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2027 struct i40e_mac_filter *f, *add_f;
2028 bool is_netdev, is_vf;
2030 is_vf = (vsi->type == I40E_VSI_SRIOV);
2031 is_netdev = !!(vsi->netdev);
2034 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2037 dev_info(&vsi->back->pdev->dev,
2038 "Could not add vlan filter %d for %pM\n",
2039 vid, vsi->netdev->dev_addr);
2044 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2045 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2047 dev_info(&vsi->back->pdev->dev,
2048 "Could not add vlan filter %d for %pM\n",
2054 /* Now if we add a vlan tag, make sure to check if it is the first
2055 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2056 * with 0, so we now accept untagged and specified tagged traffic
2057 * (and not any taged and untagged)
2060 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2062 is_vf, is_netdev)) {
2063 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2064 I40E_VLAN_ANY, is_vf, is_netdev);
2065 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2068 dev_info(&vsi->back->pdev->dev,
2069 "Could not add filter 0 for %pM\n",
2070 vsi->netdev->dev_addr);
2076 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2077 if (vid > 0 && !vsi->info.pvid) {
2078 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2079 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2080 is_vf, is_netdev)) {
2081 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2083 add_f = i40e_add_filter(vsi, f->macaddr,
2084 0, is_vf, is_netdev);
2086 dev_info(&vsi->back->pdev->dev,
2087 "Could not add filter 0 for %pM\n",
2095 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2096 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2099 return i40e_sync_vsi_filters(vsi);
2103 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2104 * @vsi: the vsi being configured
2105 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2107 * Return: 0 on success or negative otherwise
2109 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2111 struct net_device *netdev = vsi->netdev;
2112 struct i40e_mac_filter *f, *add_f;
2113 bool is_vf, is_netdev;
2114 int filter_count = 0;
2116 is_vf = (vsi->type == I40E_VSI_SRIOV);
2117 is_netdev = !!(netdev);
2120 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2122 list_for_each_entry(f, &vsi->mac_filter_list, list)
2123 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2125 /* go through all the filters for this VSI and if there is only
2126 * vid == 0 it means there are no other filters, so vid 0 must
2127 * be replaced with -1. This signifies that we should from now
2128 * on accept any traffic (with any tag present, or untagged)
2130 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2133 ether_addr_equal(netdev->dev_addr, f->macaddr))
2141 if (!filter_count && is_netdev) {
2142 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2143 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2146 dev_info(&vsi->back->pdev->dev,
2147 "Could not add filter %d for %pM\n",
2148 I40E_VLAN_ANY, netdev->dev_addr);
2153 if (!filter_count) {
2154 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2155 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2156 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2159 dev_info(&vsi->back->pdev->dev,
2160 "Could not add filter %d for %pM\n",
2161 I40E_VLAN_ANY, f->macaddr);
2167 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2168 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2171 return i40e_sync_vsi_filters(vsi);
2175 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2176 * @netdev: network interface to be adjusted
2177 * @vid: vlan id to be added
2179 * net_device_ops implementation for adding vlan ids
2182 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2183 __always_unused __be16 proto, u16 vid)
2185 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2186 __always_unused __be16 proto, u16 vid)
2189 struct i40e_netdev_priv *np = netdev_priv(netdev);
2190 struct i40e_vsi *vsi = np->vsi;
2196 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2198 /* If the network stack called us with vid = 0 then
2199 * it is asking to receive priority tagged packets with
2200 * vlan id 0. Our HW receives them by default when configured
2201 * to receive untagged packets so there is no need to add an
2202 * extra filter for vlan 0 tagged packets.
2205 ret = i40e_vsi_add_vlan(vsi, vid);
2207 if (!ret && (vid < VLAN_N_VID))
2208 set_bit(vid, vsi->active_vlans);
2214 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2215 * @netdev: network interface to be adjusted
2216 * @vid: vlan id to be removed
2218 * net_device_ops implementation for removing vlan ids
2221 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2222 __always_unused __be16 proto, u16 vid)
2224 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2225 __always_unused __be16 proto, u16 vid)
2228 struct i40e_netdev_priv *np = netdev_priv(netdev);
2229 struct i40e_vsi *vsi = np->vsi;
2231 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2233 /* return code is ignored as there is nothing a user
2234 * can do about failure to remove and a log message was
2235 * already printed from the other function
2237 i40e_vsi_kill_vlan(vsi, vid);
2239 clear_bit(vid, vsi->active_vlans);
2245 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2246 * @vsi: the vsi being brought back up
2248 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2255 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2257 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2258 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2263 * i40e_vsi_add_pvid - Add pvid for the VSI
2264 * @vsi: the vsi being adjusted
2265 * @vid: the vlan id to set as a PVID
2267 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2269 struct i40e_vsi_context ctxt;
2272 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2273 vsi->info.pvid = cpu_to_le16(vid);
2274 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2275 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2276 I40E_AQ_VSI_PVLAN_EMOD_STR;
2278 ctxt.seid = vsi->seid;
2279 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2280 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2282 dev_info(&vsi->back->pdev->dev,
2283 "%s: update vsi failed, aq_err=%d\n",
2284 __func__, vsi->back->hw.aq.asq_last_status);
2292 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2293 * @vsi: the vsi being adjusted
2295 * Just use the vlan_rx_register() service to put it back to normal
2297 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2299 i40e_vlan_stripping_disable(vsi);
2305 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2306 * @vsi: ptr to the VSI
2308 * If this function returns with an error, then it's possible one or
2309 * more of the rings is populated (while the rest are not). It is the
2310 * callers duty to clean those orphaned rings.
2312 * Return 0 on success, negative on failure
2314 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2318 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2319 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2325 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2326 * @vsi: ptr to the VSI
2328 * Free VSI's transmit software resources
2330 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2337 for (i = 0; i < vsi->num_queue_pairs; i++)
2338 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2339 i40e_free_tx_resources(vsi->tx_rings[i]);
2343 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2344 * @vsi: ptr to the VSI
2346 * If this function returns with an error, then it's possible one or
2347 * more of the rings is populated (while the rest are not). It is the
2348 * callers duty to clean those orphaned rings.
2350 * Return 0 on success, negative on failure
2352 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2356 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2357 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2359 i40e_fcoe_setup_ddp_resources(vsi);
2365 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2366 * @vsi: ptr to the VSI
2368 * Free all receive software resources
2370 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2377 for (i = 0; i < vsi->num_queue_pairs; i++)
2378 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2379 i40e_free_rx_resources(vsi->rx_rings[i]);
2381 i40e_fcoe_free_ddp_resources(vsi);
2386 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2387 * @ring: The Tx ring to configure
2389 * This enables/disables XPS for a given Tx descriptor ring
2390 * based on the TCs enabled for the VSI that ring belongs to.
2392 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2394 struct i40e_vsi *vsi = ring->vsi;
2397 if (ring->q_vector && ring->netdev) {
2398 /* Single TC mode enable XPS */
2399 if (vsi->tc_config.numtc <= 1 &&
2400 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) {
2401 netif_set_xps_queue(ring->netdev,
2402 &ring->q_vector->affinity_mask,
2404 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2405 /* Disable XPS to allow selection based on TC */
2406 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2407 netif_set_xps_queue(ring->netdev, mask,
2409 free_cpumask_var(mask);
2415 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2416 * @ring: The Tx ring to configure
2418 * Configure the Tx descriptor ring in the HMC context.
2420 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2422 struct i40e_vsi *vsi = ring->vsi;
2423 u16 pf_q = vsi->base_queue + ring->queue_index;
2424 struct i40e_hw *hw = &vsi->back->hw;
2425 struct i40e_hmc_obj_txq tx_ctx;
2426 i40e_status err = 0;
2429 /* some ATR related tx ring init */
2430 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2431 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2432 ring->atr_count = 0;
2434 ring->atr_sample_rate = 0;
2438 i40e_config_xps_tx_ring(ring);
2440 /* clear the context structure first */
2441 memset(&tx_ctx, 0, sizeof(tx_ctx));
2443 tx_ctx.new_context = 1;
2444 tx_ctx.base = (ring->dma / 128);
2445 tx_ctx.qlen = ring->count;
2446 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2447 I40E_FLAG_FD_ATR_ENABLED));
2449 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2451 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2452 /* FDIR VSI tx ring can still use RS bit and writebacks */
2453 if (vsi->type != I40E_VSI_FDIR)
2454 tx_ctx.head_wb_ena = 1;
2455 tx_ctx.head_wb_addr = ring->dma +
2456 (ring->count * sizeof(struct i40e_tx_desc));
2458 /* As part of VSI creation/update, FW allocates certain
2459 * Tx arbitration queue sets for each TC enabled for
2460 * the VSI. The FW returns the handles to these queue
2461 * sets as part of the response buffer to Add VSI,
2462 * Update VSI, etc. AQ commands. It is expected that
2463 * these queue set handles be associated with the Tx
2464 * queues by the driver as part of the TX queue context
2465 * initialization. This has to be done regardless of
2466 * DCB as by default everything is mapped to TC0.
2468 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2469 tx_ctx.rdylist_act = 0;
2471 /* clear the context in the HMC */
2472 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2474 dev_info(&vsi->back->pdev->dev,
2475 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2476 ring->queue_index, pf_q, err);
2480 /* set the context in the HMC */
2481 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2483 dev_info(&vsi->back->pdev->dev,
2484 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2485 ring->queue_index, pf_q, err);
2489 /* Now associate this queue with this PCI function */
2490 if (vsi->type == I40E_VSI_VMDQ2) {
2491 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2492 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2493 I40E_QTX_CTL_VFVM_INDX_MASK;
2495 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2498 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2499 I40E_QTX_CTL_PF_INDX_MASK);
2500 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2503 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2505 /* cache tail off for easier writes later */
2506 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2512 * i40e_configure_rx_ring - Configure a receive ring context
2513 * @ring: The Rx ring to configure
2515 * Configure the Rx descriptor ring in the HMC context.
2517 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2519 struct i40e_vsi *vsi = ring->vsi;
2520 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2521 u16 pf_q = vsi->base_queue + ring->queue_index;
2522 struct i40e_hw *hw = &vsi->back->hw;
2523 struct i40e_hmc_obj_rxq rx_ctx;
2524 i40e_status err = 0;
2528 /* clear the context structure first */
2529 memset(&rx_ctx, 0, sizeof(rx_ctx));
2531 ring->rx_buf_len = vsi->rx_buf_len;
2532 ring->rx_hdr_len = vsi->rx_hdr_len;
2534 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2535 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2537 rx_ctx.base = (ring->dma / 128);
2538 rx_ctx.qlen = ring->count;
2540 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2541 set_ring_16byte_desc_enabled(ring);
2547 rx_ctx.dtype = vsi->dtype;
2549 set_ring_ps_enabled(ring);
2550 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2552 I40E_RX_SPLIT_TCP_UDP |
2555 rx_ctx.hsplit_0 = 0;
2558 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2559 (chain_len * ring->rx_buf_len));
2560 if (hw->revision_id == 0)
2561 rx_ctx.lrxqthresh = 0;
2563 rx_ctx.lrxqthresh = 2;
2564 rx_ctx.crcstrip = 1;
2568 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2570 /* set the prefena field to 1 because the manual says to */
2573 /* clear the context in the HMC */
2574 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2576 dev_info(&vsi->back->pdev->dev,
2577 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2578 ring->queue_index, pf_q, err);
2582 /* set the context in the HMC */
2583 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2585 dev_info(&vsi->back->pdev->dev,
2586 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2587 ring->queue_index, pf_q, err);
2591 /* cache tail for quicker writes, and clear the reg before use */
2592 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2593 writel(0, ring->tail);
2595 if (ring_is_ps_enabled(ring)) {
2596 i40e_alloc_rx_headers(ring);
2597 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2599 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2606 * i40e_vsi_configure_tx - Configure the VSI for Tx
2607 * @vsi: VSI structure describing this set of rings and resources
2609 * Configure the Tx VSI for operation.
2611 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2616 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2617 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2623 * i40e_vsi_configure_rx - Configure the VSI for Rx
2624 * @vsi: the VSI being configured
2626 * Configure the Rx VSI for operation.
2628 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2633 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2634 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2635 + ETH_FCS_LEN + VLAN_HLEN;
2637 vsi->max_frame = I40E_RXBUFFER_2048;
2639 /* figure out correct receive buffer length */
2640 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2641 I40E_FLAG_RX_PS_ENABLED)) {
2642 case I40E_FLAG_RX_1BUF_ENABLED:
2643 vsi->rx_hdr_len = 0;
2644 vsi->rx_buf_len = vsi->max_frame;
2645 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2647 case I40E_FLAG_RX_PS_ENABLED:
2648 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2649 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2650 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2653 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2654 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2655 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2660 /* setup rx buffer for FCoE */
2661 if ((vsi->type == I40E_VSI_FCOE) &&
2662 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2663 vsi->rx_hdr_len = 0;
2664 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2665 vsi->max_frame = I40E_RXBUFFER_3072;
2666 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2669 #endif /* I40E_FCOE */
2670 /* round up for the chip's needs */
2671 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2672 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2673 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2674 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2676 /* set up individual rings */
2677 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2678 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2684 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2685 * @vsi: ptr to the VSI
2687 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2689 struct i40e_ring *tx_ring, *rx_ring;
2690 u16 qoffset, qcount;
2693 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2696 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2697 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2700 qoffset = vsi->tc_config.tc_info[n].qoffset;
2701 qcount = vsi->tc_config.tc_info[n].qcount;
2702 for (i = qoffset; i < (qoffset + qcount); i++) {
2703 rx_ring = vsi->rx_rings[i];
2704 tx_ring = vsi->tx_rings[i];
2705 rx_ring->dcb_tc = n;
2706 tx_ring->dcb_tc = n;
2712 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2713 * @vsi: ptr to the VSI
2715 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2718 i40e_set_rx_mode(vsi->netdev);
2722 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2723 * @vsi: Pointer to the targeted VSI
2725 * This function replays the hlist on the hw where all the SB Flow Director
2726 * filters were saved.
2728 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2730 struct i40e_fdir_filter *filter;
2731 struct i40e_pf *pf = vsi->back;
2732 struct hlist_node *node;
2734 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2737 hlist_for_each_entry_safe(filter, node,
2738 &pf->fdir_filter_list, fdir_node) {
2739 i40e_add_del_fdir(vsi, filter, true);
2744 * i40e_vsi_configure - Set up the VSI for action
2745 * @vsi: the VSI being configured
2747 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2751 i40e_set_vsi_rx_mode(vsi);
2752 i40e_restore_vlan(vsi);
2753 i40e_vsi_config_dcb_rings(vsi);
2754 err = i40e_vsi_configure_tx(vsi);
2756 err = i40e_vsi_configure_rx(vsi);
2762 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2763 * @vsi: the VSI being configured
2765 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2767 struct i40e_pf *pf = vsi->back;
2768 struct i40e_q_vector *q_vector;
2769 struct i40e_hw *hw = &pf->hw;
2775 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2776 * and PFINT_LNKLSTn registers, e.g.:
2777 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2779 qp = vsi->base_queue;
2780 vector = vsi->base_vector;
2781 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2782 q_vector = vsi->q_vectors[i];
2783 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2784 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2785 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2787 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2788 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2789 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2792 /* Linked list for the queuepairs assigned to this vector */
2793 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2794 for (q = 0; q < q_vector->num_ringpairs; q++) {
2795 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2796 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2797 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2798 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2800 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2802 wr32(hw, I40E_QINT_RQCTL(qp), val);
2804 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2805 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2806 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2807 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2809 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2811 /* Terminate the linked list */
2812 if (q == (q_vector->num_ringpairs - 1))
2813 val |= (I40E_QUEUE_END_OF_LIST
2814 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2816 wr32(hw, I40E_QINT_TQCTL(qp), val);
2825 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2826 * @hw: ptr to the hardware info
2828 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2830 struct i40e_hw *hw = &pf->hw;
2833 /* clear things first */
2834 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2835 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2837 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2838 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2839 I40E_PFINT_ICR0_ENA_GRST_MASK |
2840 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2841 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2842 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2843 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2844 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2846 if (pf->flags & I40E_FLAG_PTP)
2847 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2849 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2851 /* SW_ITR_IDX = 0, but don't change INTENA */
2852 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2853 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2855 /* OTHER_ITR_IDX = 0 */
2856 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2860 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2861 * @vsi: the VSI being configured
2863 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2865 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2866 struct i40e_pf *pf = vsi->back;
2867 struct i40e_hw *hw = &pf->hw;
2870 /* set the ITR configuration */
2871 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2872 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2873 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2874 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2875 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2876 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2878 i40e_enable_misc_int_causes(pf);
2880 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2881 wr32(hw, I40E_PFINT_LNKLST0, 0);
2883 /* Associate the queue pair to the vector and enable the queue int */
2884 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2885 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2886 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2888 wr32(hw, I40E_QINT_RQCTL(0), val);
2890 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2891 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2892 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2894 wr32(hw, I40E_QINT_TQCTL(0), val);
2899 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2900 * @pf: board private structure
2902 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2904 struct i40e_hw *hw = &pf->hw;
2906 wr32(hw, I40E_PFINT_DYN_CTL0,
2907 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2912 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2913 * @pf: board private structure
2915 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2917 struct i40e_hw *hw = &pf->hw;
2920 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2921 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2922 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2924 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2929 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2930 * @vsi: pointer to a vsi
2931 * @vector: enable a particular Hw Interrupt vector
2933 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2935 struct i40e_pf *pf = vsi->back;
2936 struct i40e_hw *hw = &pf->hw;
2939 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2940 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2941 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2942 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2943 /* skip the flush */
2947 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2948 * @vsi: pointer to a vsi
2949 * @vector: disable a particular Hw Interrupt vector
2951 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2953 struct i40e_pf *pf = vsi->back;
2954 struct i40e_hw *hw = &pf->hw;
2957 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2958 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2963 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2964 * @irq: interrupt number
2965 * @data: pointer to a q_vector
2967 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2969 struct i40e_q_vector *q_vector = data;
2971 if (!q_vector->tx.ring && !q_vector->rx.ring)
2974 napi_schedule(&q_vector->napi);
2980 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2981 * @vsi: the VSI being configured
2982 * @basename: name for the vector
2984 * Allocates MSI-X vectors and requests interrupts from the kernel.
2986 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2988 int q_vectors = vsi->num_q_vectors;
2989 struct i40e_pf *pf = vsi->back;
2990 int base = vsi->base_vector;
2995 for (vector = 0; vector < q_vectors; vector++) {
2996 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2998 if (q_vector->tx.ring && q_vector->rx.ring) {
2999 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3000 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3002 } else if (q_vector->rx.ring) {
3003 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3004 "%s-%s-%d", basename, "rx", rx_int_idx++);
3005 } else if (q_vector->tx.ring) {
3006 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3007 "%s-%s-%d", basename, "tx", tx_int_idx++);
3009 /* skip this unused q_vector */
3012 err = request_irq(pf->msix_entries[base + vector].vector,
3018 dev_info(&pf->pdev->dev,
3019 "%s: request_irq failed, error: %d\n",
3021 goto free_queue_irqs;
3023 /* assign the mask for this irq */
3024 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3025 &q_vector->affinity_mask);
3028 vsi->irqs_ready = true;
3034 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3036 free_irq(pf->msix_entries[base + vector].vector,
3037 &(vsi->q_vectors[vector]));
3043 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3044 * @vsi: the VSI being un-configured
3046 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3048 struct i40e_pf *pf = vsi->back;
3049 struct i40e_hw *hw = &pf->hw;
3050 int base = vsi->base_vector;
3053 for (i = 0; i < vsi->num_queue_pairs; i++) {
3054 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3055 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3058 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3059 for (i = vsi->base_vector;
3060 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3061 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3064 for (i = 0; i < vsi->num_q_vectors; i++)
3065 synchronize_irq(pf->msix_entries[i + base].vector);
3067 /* Legacy and MSI mode - this stops all interrupt handling */
3068 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3069 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3071 synchronize_irq(pf->pdev->irq);
3076 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3077 * @vsi: the VSI being configured
3079 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3081 struct i40e_pf *pf = vsi->back;
3084 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3085 for (i = vsi->base_vector;
3086 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3087 i40e_irq_dynamic_enable(vsi, i);
3089 i40e_irq_dynamic_enable_icr0(pf);
3092 i40e_flush(&pf->hw);
3097 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3098 * @pf: board private structure
3100 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3103 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3104 i40e_flush(&pf->hw);
3108 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3109 * @irq: interrupt number
3110 * @data: pointer to a q_vector
3112 * This is the handler used for all MSI/Legacy interrupts, and deals
3113 * with both queue and non-queue interrupts. This is also used in
3114 * MSIX mode to handle the non-queue interrupts.
3116 static irqreturn_t i40e_intr(int irq, void *data)
3118 struct i40e_pf *pf = (struct i40e_pf *)data;
3119 struct i40e_hw *hw = &pf->hw;
3120 irqreturn_t ret = IRQ_NONE;
3121 u32 icr0, icr0_remaining;
3124 icr0 = rd32(hw, I40E_PFINT_ICR0);
3125 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3127 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3128 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3131 /* if interrupt but no bits showing, must be SWINT */
3132 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3133 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3136 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3137 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3139 /* temporarily disable queue cause for NAPI processing */
3140 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3141 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3142 wr32(hw, I40E_QINT_RQCTL(0), qval);
3144 qval = rd32(hw, I40E_QINT_TQCTL(0));
3145 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3146 wr32(hw, I40E_QINT_TQCTL(0), qval);
3148 if (!test_bit(__I40E_DOWN, &pf->state))
3149 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3152 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3153 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3154 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3157 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3158 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3159 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3162 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3163 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3164 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3167 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3168 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3169 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3170 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3171 val = rd32(hw, I40E_GLGEN_RSTAT);
3172 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3173 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3174 if (val == I40E_RESET_CORER) {
3176 } else if (val == I40E_RESET_GLOBR) {
3178 } else if (val == I40E_RESET_EMPR) {
3180 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3184 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3185 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3186 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3189 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3190 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3192 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3193 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3194 i40e_ptp_tx_hwtstamp(pf);
3198 /* If a critical error is pending we have no choice but to reset the
3200 * Report and mask out any remaining unexpected interrupts.
3202 icr0_remaining = icr0 & ena_mask;
3203 if (icr0_remaining) {
3204 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3206 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3207 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3208 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3209 dev_info(&pf->pdev->dev, "device will be reset\n");
3210 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3211 i40e_service_event_schedule(pf);
3213 ena_mask &= ~icr0_remaining;
3218 /* re-enable interrupt causes */
3219 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3220 if (!test_bit(__I40E_DOWN, &pf->state)) {
3221 i40e_service_event_schedule(pf);
3222 i40e_irq_dynamic_enable_icr0(pf);
3229 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3230 * @tx_ring: tx ring to clean
3231 * @budget: how many cleans we're allowed
3233 * Returns true if there's any budget left (e.g. the clean is finished)
3235 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3237 struct i40e_vsi *vsi = tx_ring->vsi;
3238 u16 i = tx_ring->next_to_clean;
3239 struct i40e_tx_buffer *tx_buf;
3240 struct i40e_tx_desc *tx_desc;
3242 tx_buf = &tx_ring->tx_bi[i];
3243 tx_desc = I40E_TX_DESC(tx_ring, i);
3244 i -= tx_ring->count;
3247 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3249 /* if next_to_watch is not set then there is no work pending */
3253 /* prevent any other reads prior to eop_desc */
3254 read_barrier_depends();
3256 /* if the descriptor isn't done, no work yet to do */
3257 if (!(eop_desc->cmd_type_offset_bsz &
3258 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3261 /* clear next_to_watch to prevent false hangs */
3262 tx_buf->next_to_watch = NULL;
3264 tx_desc->buffer_addr = 0;
3265 tx_desc->cmd_type_offset_bsz = 0;
3266 /* move past filter desc */
3271 i -= tx_ring->count;
3272 tx_buf = tx_ring->tx_bi;
3273 tx_desc = I40E_TX_DESC(tx_ring, 0);
3275 /* unmap skb header data */
3276 dma_unmap_single(tx_ring->dev,
3277 dma_unmap_addr(tx_buf, dma),
3278 dma_unmap_len(tx_buf, len),
3280 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3281 kfree(tx_buf->raw_buf);
3283 tx_buf->raw_buf = NULL;
3284 tx_buf->tx_flags = 0;
3285 tx_buf->next_to_watch = NULL;
3286 dma_unmap_len_set(tx_buf, len, 0);
3287 tx_desc->buffer_addr = 0;
3288 tx_desc->cmd_type_offset_bsz = 0;
3290 /* move us past the eop_desc for start of next FD desc */
3295 i -= tx_ring->count;
3296 tx_buf = tx_ring->tx_bi;
3297 tx_desc = I40E_TX_DESC(tx_ring, 0);
3300 /* update budget accounting */
3302 } while (likely(budget));
3304 i += tx_ring->count;
3305 tx_ring->next_to_clean = i;
3307 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3308 i40e_irq_dynamic_enable(vsi,
3309 tx_ring->q_vector->v_idx + vsi->base_vector);
3315 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3316 * @irq: interrupt number
3317 * @data: pointer to a q_vector
3319 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3321 struct i40e_q_vector *q_vector = data;
3322 struct i40e_vsi *vsi;
3324 if (!q_vector->tx.ring)
3327 vsi = q_vector->tx.ring->vsi;
3328 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3334 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3335 * @vsi: the VSI being configured
3336 * @v_idx: vector index
3337 * @qp_idx: queue pair index
3339 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3341 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3342 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3343 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3345 tx_ring->q_vector = q_vector;
3346 tx_ring->next = q_vector->tx.ring;
3347 q_vector->tx.ring = tx_ring;
3348 q_vector->tx.count++;
3350 rx_ring->q_vector = q_vector;
3351 rx_ring->next = q_vector->rx.ring;
3352 q_vector->rx.ring = rx_ring;
3353 q_vector->rx.count++;
3357 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3358 * @vsi: the VSI being configured
3360 * This function maps descriptor rings to the queue-specific vectors
3361 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3362 * one vector per queue pair, but on a constrained vector budget, we
3363 * group the queue pairs as "efficiently" as possible.
3365 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3367 int qp_remaining = vsi->num_queue_pairs;
3368 int q_vectors = vsi->num_q_vectors;
3373 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3374 * group them so there are multiple queues per vector.
3375 * It is also important to go through all the vectors available to be
3376 * sure that if we don't use all the vectors, that the remaining vectors
3377 * are cleared. This is especially important when decreasing the
3378 * number of queues in use.
3380 for (; v_start < q_vectors; v_start++) {
3381 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3383 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3385 q_vector->num_ringpairs = num_ringpairs;
3387 q_vector->rx.count = 0;
3388 q_vector->tx.count = 0;
3389 q_vector->rx.ring = NULL;
3390 q_vector->tx.ring = NULL;
3392 while (num_ringpairs--) {
3393 map_vector_to_qp(vsi, v_start, qp_idx);
3401 * i40e_vsi_request_irq - Request IRQ from the OS
3402 * @vsi: the VSI being configured
3403 * @basename: name for the vector
3405 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3407 struct i40e_pf *pf = vsi->back;
3410 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3411 err = i40e_vsi_request_irq_msix(vsi, basename);
3412 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3413 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3416 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3420 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3425 #ifdef CONFIG_NET_POLL_CONTROLLER
3427 * i40e_netpoll - A Polling 'interrupt'handler
3428 * @netdev: network interface device structure
3430 * This is used by netconsole to send skbs without having to re-enable
3431 * interrupts. It's not called while the normal interrupt routine is executing.
3434 void i40e_netpoll(struct net_device *netdev)
3436 static void i40e_netpoll(struct net_device *netdev)
3439 struct i40e_netdev_priv *np = netdev_priv(netdev);
3440 struct i40e_vsi *vsi = np->vsi;
3441 struct i40e_pf *pf = vsi->back;
3444 /* if interface is down do nothing */
3445 if (test_bit(__I40E_DOWN, &vsi->state))
3448 pf->flags |= I40E_FLAG_IN_NETPOLL;
3449 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3450 for (i = 0; i < vsi->num_q_vectors; i++)
3451 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3453 i40e_intr(pf->pdev->irq, netdev);
3455 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3460 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3461 * @pf: the PF being configured
3462 * @pf_q: the PF queue
3463 * @enable: enable or disable state of the queue
3465 * This routine will wait for the given Tx queue of the PF to reach the
3466 * enabled or disabled state.
3467 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3468 * multiple retries; else will return 0 in case of success.
3470 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3475 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3476 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3477 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3480 usleep_range(10, 20);
3482 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3489 * i40e_vsi_control_tx - Start or stop a VSI's rings
3490 * @vsi: the VSI being configured
3491 * @enable: start or stop the rings
3493 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3495 struct i40e_pf *pf = vsi->back;
3496 struct i40e_hw *hw = &pf->hw;
3497 int i, j, pf_q, ret = 0;
3500 pf_q = vsi->base_queue;
3501 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3503 /* warn the TX unit of coming changes */
3504 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3506 usleep_range(10, 20);
3508 for (j = 0; j < 50; j++) {
3509 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3510 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3511 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3513 usleep_range(1000, 2000);
3515 /* Skip if the queue is already in the requested state */
3516 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3519 /* turn on/off the queue */
3521 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3522 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3524 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3527 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3528 /* No waiting for the Tx queue to disable */
3529 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3532 /* wait for the change to finish */
3533 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3535 dev_info(&pf->pdev->dev,
3536 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3537 __func__, vsi->seid, pf_q,
3538 (enable ? "en" : "dis"));
3543 if (hw->revision_id == 0)
3549 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3550 * @pf: the PF being configured
3551 * @pf_q: the PF queue
3552 * @enable: enable or disable state of the queue
3554 * This routine will wait for the given Rx queue of the PF to reach the
3555 * enabled or disabled state.
3556 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3557 * multiple retries; else will return 0 in case of success.
3559 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3564 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3565 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3566 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3569 usleep_range(10, 20);
3571 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3578 * i40e_vsi_control_rx - Start or stop a VSI's rings
3579 * @vsi: the VSI being configured
3580 * @enable: start or stop the rings
3582 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3584 struct i40e_pf *pf = vsi->back;
3585 struct i40e_hw *hw = &pf->hw;
3586 int i, j, pf_q, ret = 0;
3589 pf_q = vsi->base_queue;
3590 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3591 for (j = 0; j < 50; j++) {
3592 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3593 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3594 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3596 usleep_range(1000, 2000);
3599 /* Skip if the queue is already in the requested state */
3600 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3603 /* turn on/off the queue */
3605 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3607 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3608 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3610 /* wait for the change to finish */
3611 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3613 dev_info(&pf->pdev->dev,
3614 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3615 __func__, vsi->seid, pf_q,
3616 (enable ? "en" : "dis"));
3625 * i40e_vsi_control_rings - Start or stop a VSI's rings
3626 * @vsi: the VSI being configured
3627 * @enable: start or stop the rings
3629 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3633 /* do rx first for enable and last for disable */
3635 ret = i40e_vsi_control_rx(vsi, request);
3638 ret = i40e_vsi_control_tx(vsi, request);
3640 /* Ignore return value, we need to shutdown whatever we can */
3641 i40e_vsi_control_tx(vsi, request);
3642 i40e_vsi_control_rx(vsi, request);
3649 * i40e_vsi_free_irq - Free the irq association with the OS
3650 * @vsi: the VSI being configured
3652 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3654 struct i40e_pf *pf = vsi->back;
3655 struct i40e_hw *hw = &pf->hw;
3656 int base = vsi->base_vector;
3660 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3661 if (!vsi->q_vectors)
3664 if (!vsi->irqs_ready)
3667 vsi->irqs_ready = false;
3668 for (i = 0; i < vsi->num_q_vectors; i++) {
3669 u16 vector = i + base;
3671 /* free only the irqs that were actually requested */
3672 if (!vsi->q_vectors[i] ||
3673 !vsi->q_vectors[i]->num_ringpairs)
3676 /* clear the affinity_mask in the IRQ descriptor */
3677 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3679 free_irq(pf->msix_entries[vector].vector,
3682 /* Tear down the interrupt queue link list
3684 * We know that they come in pairs and always
3685 * the Rx first, then the Tx. To clear the
3686 * link list, stick the EOL value into the
3687 * next_q field of the registers.
3689 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3690 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3691 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3692 val |= I40E_QUEUE_END_OF_LIST
3693 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3694 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3696 while (qp != I40E_QUEUE_END_OF_LIST) {
3699 val = rd32(hw, I40E_QINT_RQCTL(qp));
3701 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3702 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3703 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3704 I40E_QINT_RQCTL_INTEVENT_MASK);
3706 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3707 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3709 wr32(hw, I40E_QINT_RQCTL(qp), val);
3711 val = rd32(hw, I40E_QINT_TQCTL(qp));
3713 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3714 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3716 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3717 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3718 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3719 I40E_QINT_TQCTL_INTEVENT_MASK);
3721 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3722 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3724 wr32(hw, I40E_QINT_TQCTL(qp), val);
3729 free_irq(pf->pdev->irq, pf);
3731 val = rd32(hw, I40E_PFINT_LNKLST0);
3732 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3733 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3734 val |= I40E_QUEUE_END_OF_LIST
3735 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3736 wr32(hw, I40E_PFINT_LNKLST0, val);
3738 val = rd32(hw, I40E_QINT_RQCTL(qp));
3739 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3740 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3741 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3742 I40E_QINT_RQCTL_INTEVENT_MASK);
3744 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3745 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3747 wr32(hw, I40E_QINT_RQCTL(qp), val);
3749 val = rd32(hw, I40E_QINT_TQCTL(qp));
3751 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3752 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3753 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3754 I40E_QINT_TQCTL_INTEVENT_MASK);
3756 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3757 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3759 wr32(hw, I40E_QINT_TQCTL(qp), val);
3764 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3765 * @vsi: the VSI being configured
3766 * @v_idx: Index of vector to be freed
3768 * This function frees the memory allocated to the q_vector. In addition if
3769 * NAPI is enabled it will delete any references to the NAPI struct prior
3770 * to freeing the q_vector.
3772 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3774 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3775 struct i40e_ring *ring;
3780 /* disassociate q_vector from rings */
3781 i40e_for_each_ring(ring, q_vector->tx)
3782 ring->q_vector = NULL;
3784 i40e_for_each_ring(ring, q_vector->rx)
3785 ring->q_vector = NULL;
3787 /* only VSI w/ an associated netdev is set up w/ NAPI */
3789 netif_napi_del(&q_vector->napi);
3791 vsi->q_vectors[v_idx] = NULL;
3793 kfree_rcu(q_vector, rcu);
3797 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3798 * @vsi: the VSI being un-configured
3800 * This frees the memory allocated to the q_vectors and
3801 * deletes references to the NAPI struct.
3803 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3807 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3808 i40e_free_q_vector(vsi, v_idx);
3812 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3813 * @pf: board private structure
3815 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3817 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3818 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3819 pci_disable_msix(pf->pdev);
3820 kfree(pf->msix_entries);
3821 pf->msix_entries = NULL;
3822 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3823 pci_disable_msi(pf->pdev);
3825 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3829 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3830 * @pf: board private structure
3832 * We go through and clear interrupt specific resources and reset the structure
3833 * to pre-load conditions
3835 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3839 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3840 for (i = 0; i < pf->num_alloc_vsi; i++)
3842 i40e_vsi_free_q_vectors(pf->vsi[i]);
3843 i40e_reset_interrupt_capability(pf);
3847 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3848 * @vsi: the VSI being configured
3850 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3857 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3858 napi_enable(&vsi->q_vectors[q_idx]->napi);
3862 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3863 * @vsi: the VSI being configured
3865 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3872 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3873 napi_disable(&vsi->q_vectors[q_idx]->napi);
3877 * i40e_vsi_close - Shut down a VSI
3878 * @vsi: the vsi to be quelled
3880 static void i40e_vsi_close(struct i40e_vsi *vsi)
3882 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3884 i40e_vsi_free_irq(vsi);
3885 i40e_vsi_free_tx_resources(vsi);
3886 i40e_vsi_free_rx_resources(vsi);
3890 * i40e_quiesce_vsi - Pause a given VSI
3891 * @vsi: the VSI being paused
3893 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3895 if (test_bit(__I40E_DOWN, &vsi->state))
3898 /* No need to disable FCoE VSI when Tx suspended */
3899 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3900 vsi->type == I40E_VSI_FCOE) {
3901 dev_dbg(&vsi->back->pdev->dev,
3902 "%s: VSI seid %d skipping FCoE VSI disable\n",
3903 __func__, vsi->seid);
3907 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3908 if (vsi->netdev && netif_running(vsi->netdev)) {
3909 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3911 i40e_vsi_close(vsi);
3916 * i40e_unquiesce_vsi - Resume a given VSI
3917 * @vsi: the VSI being resumed
3919 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3921 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3924 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3925 if (vsi->netdev && netif_running(vsi->netdev))
3926 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3928 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3932 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3935 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3939 for (v = 0; v < pf->num_alloc_vsi; v++) {
3941 i40e_quiesce_vsi(pf->vsi[v]);
3946 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3949 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3953 for (v = 0; v < pf->num_alloc_vsi; v++) {
3955 i40e_unquiesce_vsi(pf->vsi[v]);
3959 #ifdef CONFIG_I40E_DCB
3961 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
3962 * @vsi: the VSI being configured
3964 * This function waits for the given VSI's Tx queues to be disabled.
3966 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
3968 struct i40e_pf *pf = vsi->back;
3971 pf_q = vsi->base_queue;
3972 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3973 /* Check and wait for the disable status of the queue */
3974 ret = i40e_pf_txq_wait(pf, pf_q, false);
3976 dev_info(&pf->pdev->dev,
3977 "%s: VSI seid %d Tx ring %d disable timeout\n",
3978 __func__, vsi->seid, pf_q);
3987 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
3990 * This function waits for the Tx queues to be in disabled state for all the
3991 * VSIs that are managed by this PF.
3993 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
3997 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3998 /* No need to wait for FCoE VSI queues */
3999 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4000 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4011 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4012 * @pf: pointer to pf
4014 * Get TC map for ISCSI PF type that will include iSCSI TC
4017 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4019 struct i40e_dcb_app_priority_table app;
4020 struct i40e_hw *hw = &pf->hw;
4021 u8 enabled_tc = 1; /* TC0 is always enabled */
4023 /* Get the iSCSI APP TLV */
4024 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4026 for (i = 0; i < dcbcfg->numapps; i++) {
4027 app = dcbcfg->app[i];
4028 if (app.selector == I40E_APP_SEL_TCPIP &&
4029 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4030 tc = dcbcfg->etscfg.prioritytable[app.priority];
4031 enabled_tc |= (1 << tc);
4040 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4041 * @dcbcfg: the corresponding DCBx configuration structure
4043 * Return the number of TCs from given DCBx configuration
4045 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4050 /* Scan the ETS Config Priority Table to find
4051 * traffic class enabled for a given priority
4052 * and use the traffic class index to get the
4053 * number of traffic classes enabled
4055 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4056 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4057 num_tc = dcbcfg->etscfg.prioritytable[i];
4060 /* Traffic class index starts from zero so
4061 * increment to return the actual count
4067 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4068 * @dcbcfg: the corresponding DCBx configuration structure
4070 * Query the current DCB configuration and return the number of
4071 * traffic classes enabled from the given DCBX config
4073 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4075 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4079 for (i = 0; i < num_tc; i++)
4080 enabled_tc |= 1 << i;
4086 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4087 * @pf: PF being queried
4089 * Return number of traffic classes enabled for the given PF
4091 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4093 struct i40e_hw *hw = &pf->hw;
4096 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4098 /* If DCB is not enabled then always in single TC */
4099 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4102 /* SFP mode will be enabled for all TCs on port */
4103 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4104 return i40e_dcb_get_num_tc(dcbcfg);
4106 /* MFP mode return count of enabled TCs for this PF */
4107 if (pf->hw.func_caps.iscsi)
4108 enabled_tc = i40e_get_iscsi_tc_map(pf);
4110 return 1; /* Only TC0 */
4112 /* At least have TC0 */
4113 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4114 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4115 if (enabled_tc & (1 << i))
4122 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4123 * @pf: PF being queried
4125 * Return a bitmap for first enabled traffic class for this PF.
4127 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4129 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4133 return 0x1; /* TC0 */
4135 /* Find the first enabled TC */
4136 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4137 if (enabled_tc & (1 << i))
4145 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4146 * @pf: PF being queried
4148 * Return a bitmap for enabled traffic classes for this PF.
4150 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4152 /* If DCB is not enabled for this PF then just return default TC */
4153 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4154 return i40e_pf_get_default_tc(pf);
4156 /* SFP mode we want PF to be enabled for all TCs */
4157 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4158 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4160 /* MFP enabled and iSCSI PF type */
4161 if (pf->hw.func_caps.iscsi)
4162 return i40e_get_iscsi_tc_map(pf);
4164 return i40e_pf_get_default_tc(pf);
4168 * i40e_vsi_get_bw_info - Query VSI BW Information
4169 * @vsi: the VSI being queried
4171 * Returns 0 on success, negative value on failure
4173 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4175 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4176 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4177 struct i40e_pf *pf = vsi->back;
4178 struct i40e_hw *hw = &pf->hw;
4183 /* Get the VSI level BW configuration */
4184 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4186 dev_info(&pf->pdev->dev,
4187 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4188 aq_ret, pf->hw.aq.asq_last_status);
4192 /* Get the VSI level BW configuration per TC */
4193 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4196 dev_info(&pf->pdev->dev,
4197 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4198 aq_ret, pf->hw.aq.asq_last_status);
4202 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4203 dev_info(&pf->pdev->dev,
4204 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4205 bw_config.tc_valid_bits,
4206 bw_ets_config.tc_valid_bits);
4207 /* Still continuing */
4210 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4211 vsi->bw_max_quanta = bw_config.max_bw;
4212 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4213 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4214 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4215 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4216 vsi->bw_ets_limit_credits[i] =
4217 le16_to_cpu(bw_ets_config.credits[i]);
4218 /* 3 bits out of 4 for each TC */
4219 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4226 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4227 * @vsi: the VSI being configured
4228 * @enabled_tc: TC bitmap
4229 * @bw_credits: BW shared credits per TC
4231 * Returns 0 on success, negative value on failure
4233 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4236 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4240 bw_data.tc_valid_bits = enabled_tc;
4241 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4242 bw_data.tc_bw_credits[i] = bw_share[i];
4244 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4247 dev_info(&vsi->back->pdev->dev,
4248 "AQ command Config VSI BW allocation per TC failed = %d\n",
4249 vsi->back->hw.aq.asq_last_status);
4253 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4254 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4260 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4261 * @vsi: the VSI being configured
4262 * @enabled_tc: TC map to be enabled
4265 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4267 struct net_device *netdev = vsi->netdev;
4268 struct i40e_pf *pf = vsi->back;
4269 struct i40e_hw *hw = &pf->hw;
4272 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4278 netdev_reset_tc(netdev);
4282 /* Set up actual enabled TCs on the VSI */
4283 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4286 /* set per TC queues for the VSI */
4287 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4288 /* Only set TC queues for enabled tcs
4290 * e.g. For a VSI that has TC0 and TC3 enabled the
4291 * enabled_tc bitmap would be 0x00001001; the driver
4292 * will set the numtc for netdev as 2 that will be
4293 * referenced by the netdev layer as TC 0 and 1.
4295 if (vsi->tc_config.enabled_tc & (1 << i))
4296 netdev_set_tc_queue(netdev,
4297 vsi->tc_config.tc_info[i].netdev_tc,
4298 vsi->tc_config.tc_info[i].qcount,
4299 vsi->tc_config.tc_info[i].qoffset);
4302 /* Assign UP2TC map for the VSI */
4303 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4304 /* Get the actual TC# for the UP */
4305 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4306 /* Get the mapped netdev TC# for the UP */
4307 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4308 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4313 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4314 * @vsi: the VSI being configured
4315 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4317 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4318 struct i40e_vsi_context *ctxt)
4320 /* copy just the sections touched not the entire info
4321 * since not all sections are valid as returned by
4324 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4325 memcpy(&vsi->info.queue_mapping,
4326 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4327 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4328 sizeof(vsi->info.tc_mapping));
4332 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4333 * @vsi: VSI to be configured
4334 * @enabled_tc: TC bitmap
4336 * This configures a particular VSI for TCs that are mapped to the
4337 * given TC bitmap. It uses default bandwidth share for TCs across
4338 * VSIs to configure TC for a particular VSI.
4341 * It is expected that the VSI queues have been quisced before calling
4344 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4346 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4347 struct i40e_vsi_context ctxt;
4351 /* Check if enabled_tc is same as existing or new TCs */
4352 if (vsi->tc_config.enabled_tc == enabled_tc)
4355 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4356 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4357 if (enabled_tc & (1 << i))
4361 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4363 dev_info(&vsi->back->pdev->dev,
4364 "Failed configuring TC map %d for VSI %d\n",
4365 enabled_tc, vsi->seid);
4369 /* Update Queue Pairs Mapping for currently enabled UPs */
4370 ctxt.seid = vsi->seid;
4371 ctxt.pf_num = vsi->back->hw.pf_id;
4373 ctxt.uplink_seid = vsi->uplink_seid;
4374 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4375 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4377 /* Update the VSI after updating the VSI queue-mapping information */
4378 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4380 dev_info(&vsi->back->pdev->dev,
4381 "update vsi failed, aq_err=%d\n",
4382 vsi->back->hw.aq.asq_last_status);
4385 /* update the local VSI info with updated queue map */
4386 i40e_vsi_update_queue_map(vsi, &ctxt);
4387 vsi->info.valid_sections = 0;
4389 /* Update current VSI BW information */
4390 ret = i40e_vsi_get_bw_info(vsi);
4392 dev_info(&vsi->back->pdev->dev,
4393 "Failed updating vsi bw info, aq_err=%d\n",
4394 vsi->back->hw.aq.asq_last_status);
4398 /* Update the netdev TC setup */
4399 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4405 * i40e_veb_config_tc - Configure TCs for given VEB
4407 * @enabled_tc: TC bitmap
4409 * Configures given TC bitmap for VEB (switching) element
4411 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4413 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4414 struct i40e_pf *pf = veb->pf;
4418 /* No TCs or already enabled TCs just return */
4419 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4422 bw_data.tc_valid_bits = enabled_tc;
4423 /* bw_data.absolute_credits is not set (relative) */
4425 /* Enable ETS TCs with equal BW Share for now */
4426 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4427 if (enabled_tc & (1 << i))
4428 bw_data.tc_bw_share_credits[i] = 1;
4431 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4434 dev_info(&pf->pdev->dev,
4435 "veb bw config failed, aq_err=%d\n",
4436 pf->hw.aq.asq_last_status);
4440 /* Update the BW information */
4441 ret = i40e_veb_get_bw_info(veb);
4443 dev_info(&pf->pdev->dev,
4444 "Failed getting veb bw config, aq_err=%d\n",
4445 pf->hw.aq.asq_last_status);
4452 #ifdef CONFIG_I40E_DCB
4454 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4457 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4458 * the caller would've quiesce all the VSIs before calling
4461 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4467 /* Enable the TCs available on PF to all VEBs */
4468 tc_map = i40e_pf_get_tc_map(pf);
4469 for (v = 0; v < I40E_MAX_VEB; v++) {
4472 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4474 dev_info(&pf->pdev->dev,
4475 "Failed configuring TC for VEB seid=%d\n",
4477 /* Will try to configure as many components */
4481 /* Update each VSI */
4482 for (v = 0; v < pf->num_alloc_vsi; v++) {
4486 /* - Enable all TCs for the LAN VSI
4488 * - For FCoE VSI only enable the TC configured
4489 * as per the APP TLV
4491 * - For all others keep them at TC0 for now
4493 if (v == pf->lan_vsi)
4494 tc_map = i40e_pf_get_tc_map(pf);
4496 tc_map = i40e_pf_get_default_tc(pf);
4498 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4499 tc_map = i40e_get_fcoe_tc_map(pf);
4500 #endif /* #ifdef I40E_FCOE */
4502 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4504 dev_info(&pf->pdev->dev,
4505 "Failed configuring TC for VSI seid=%d\n",
4507 /* Will try to configure as many components */
4509 /* Re-configure VSI vectors based on updated TC map */
4510 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4511 if (pf->vsi[v]->netdev)
4512 i40e_dcbnl_set_all(pf->vsi[v]);
4518 * i40e_resume_port_tx - Resume port Tx
4521 * Resume a port's Tx and issue a PF reset in case of failure to
4524 static int i40e_resume_port_tx(struct i40e_pf *pf)
4526 struct i40e_hw *hw = &pf->hw;
4529 ret = i40e_aq_resume_port_tx(hw, NULL);
4531 dev_info(&pf->pdev->dev,
4532 "AQ command Resume Port Tx failed = %d\n",
4533 pf->hw.aq.asq_last_status);
4534 /* Schedule PF reset to recover */
4535 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4536 i40e_service_event_schedule(pf);
4543 * i40e_init_pf_dcb - Initialize DCB configuration
4544 * @pf: PF being configured
4546 * Query the current DCB configuration and cache it
4547 * in the hardware structure
4549 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4551 struct i40e_hw *hw = &pf->hw;
4554 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4555 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4556 (pf->hw.aq.fw_maj_ver < 4))
4559 /* Get the initial DCB configuration */
4560 err = i40e_init_dcb(hw);
4562 /* Device/Function is not DCBX capable */
4563 if ((!hw->func_caps.dcb) ||
4564 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4565 dev_info(&pf->pdev->dev,
4566 "DCBX offload is not supported or is disabled for this PF.\n");
4568 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4572 /* When status is not DISABLED then DCBX in FW */
4573 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4574 DCB_CAP_DCBX_VER_IEEE;
4576 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4577 /* Enable DCB tagging only when more than one TC */
4578 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4579 pf->flags |= I40E_FLAG_DCB_ENABLED;
4580 dev_dbg(&pf->pdev->dev,
4581 "DCBX offload is supported for this PF.\n");
4584 dev_info(&pf->pdev->dev,
4585 "AQ Querying DCB configuration failed: aq_err %d\n",
4586 pf->hw.aq.asq_last_status);
4592 #endif /* CONFIG_I40E_DCB */
4593 #define SPEED_SIZE 14
4596 * i40e_print_link_message - print link up or down
4597 * @vsi: the VSI for which link needs a message
4599 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4601 char speed[SPEED_SIZE] = "Unknown";
4602 char fc[FC_SIZE] = "RX/TX";
4605 netdev_info(vsi->netdev, "NIC Link is Down\n");
4609 /* Warn user if link speed on NPAR enabled partition is not at
4612 if (vsi->back->hw.func_caps.npar_enable &&
4613 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4614 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4615 netdev_warn(vsi->netdev,
4616 "The partition detected link speed that is less than 10Gbps\n");
4618 switch (vsi->back->hw.phy.link_info.link_speed) {
4619 case I40E_LINK_SPEED_40GB:
4620 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4622 case I40E_LINK_SPEED_10GB:
4623 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4625 case I40E_LINK_SPEED_1GB:
4626 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4628 case I40E_LINK_SPEED_100MB:
4629 strncpy(speed, "100 Mbps", SPEED_SIZE);
4635 switch (vsi->back->hw.fc.current_mode) {
4637 strlcpy(fc, "RX/TX", FC_SIZE);
4639 case I40E_FC_TX_PAUSE:
4640 strlcpy(fc, "TX", FC_SIZE);
4642 case I40E_FC_RX_PAUSE:
4643 strlcpy(fc, "RX", FC_SIZE);
4646 strlcpy(fc, "None", FC_SIZE);
4650 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4655 * i40e_up_complete - Finish the last steps of bringing up a connection
4656 * @vsi: the VSI being configured
4658 static int i40e_up_complete(struct i40e_vsi *vsi)
4660 struct i40e_pf *pf = vsi->back;
4663 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4664 i40e_vsi_configure_msix(vsi);
4666 i40e_configure_msi_and_legacy(vsi);
4669 err = i40e_vsi_control_rings(vsi, true);
4673 clear_bit(__I40E_DOWN, &vsi->state);
4674 i40e_napi_enable_all(vsi);
4675 i40e_vsi_enable_irq(vsi);
4677 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4679 i40e_print_link_message(vsi, true);
4680 netif_tx_start_all_queues(vsi->netdev);
4681 netif_carrier_on(vsi->netdev);
4682 } else if (vsi->netdev) {
4683 i40e_print_link_message(vsi, false);
4684 /* need to check for qualified module here*/
4685 if ((pf->hw.phy.link_info.link_info &
4686 I40E_AQ_MEDIA_AVAILABLE) &&
4687 (!(pf->hw.phy.link_info.an_info &
4688 I40E_AQ_QUALIFIED_MODULE)))
4689 netdev_err(vsi->netdev,
4690 "the driver failed to link because an unqualified module was detected.");
4693 /* replay FDIR SB filters */
4694 if (vsi->type == I40E_VSI_FDIR) {
4695 /* reset fd counters */
4696 pf->fd_add_err = pf->fd_atr_cnt = 0;
4697 if (pf->fd_tcp_rule > 0) {
4698 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4699 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4700 pf->fd_tcp_rule = 0;
4702 i40e_fdir_filter_restore(vsi);
4704 i40e_service_event_schedule(pf);
4710 * i40e_vsi_reinit_locked - Reset the VSI
4711 * @vsi: the VSI being configured
4713 * Rebuild the ring structs after some configuration
4714 * has changed, e.g. MTU size.
4716 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4718 struct i40e_pf *pf = vsi->back;
4720 WARN_ON(in_interrupt());
4721 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4722 usleep_range(1000, 2000);
4725 /* Give a VF some time to respond to the reset. The
4726 * two second wait is based upon the watchdog cycle in
4729 if (vsi->type == I40E_VSI_SRIOV)
4732 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4736 * i40e_up - Bring the connection back up after being down
4737 * @vsi: the VSI being configured
4739 int i40e_up(struct i40e_vsi *vsi)
4743 err = i40e_vsi_configure(vsi);
4745 err = i40e_up_complete(vsi);
4751 * i40e_down - Shutdown the connection processing
4752 * @vsi: the VSI being stopped
4754 void i40e_down(struct i40e_vsi *vsi)
4758 /* It is assumed that the caller of this function
4759 * sets the vsi->state __I40E_DOWN bit.
4762 netif_carrier_off(vsi->netdev);
4763 netif_tx_disable(vsi->netdev);
4765 i40e_vsi_disable_irq(vsi);
4766 i40e_vsi_control_rings(vsi, false);
4767 i40e_napi_disable_all(vsi);
4769 for (i = 0; i < vsi->num_queue_pairs; i++) {
4770 i40e_clean_tx_ring(vsi->tx_rings[i]);
4771 i40e_clean_rx_ring(vsi->rx_rings[i]);
4776 * i40e_setup_tc - configure multiple traffic classes
4777 * @netdev: net device to configure
4778 * @tc: number of traffic classes to enable
4781 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4783 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4786 struct i40e_netdev_priv *np = netdev_priv(netdev);
4787 struct i40e_vsi *vsi = np->vsi;
4788 struct i40e_pf *pf = vsi->back;
4793 /* Check if DCB enabled to continue */
4794 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4795 netdev_info(netdev, "DCB is not enabled for adapter\n");
4799 /* Check if MFP enabled */
4800 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4801 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4805 /* Check whether tc count is within enabled limit */
4806 if (tc > i40e_pf_get_num_tc(pf)) {
4807 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4811 /* Generate TC map for number of tc requested */
4812 for (i = 0; i < tc; i++)
4813 enabled_tc |= (1 << i);
4815 /* Requesting same TC configuration as already enabled */
4816 if (enabled_tc == vsi->tc_config.enabled_tc)
4819 /* Quiesce VSI queues */
4820 i40e_quiesce_vsi(vsi);
4822 /* Configure VSI for enabled TCs */
4823 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4825 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4831 i40e_unquiesce_vsi(vsi);
4838 * i40e_open - Called when a network interface is made active
4839 * @netdev: network interface device structure
4841 * The open entry point is called when a network interface is made
4842 * active by the system (IFF_UP). At this point all resources needed
4843 * for transmit and receive operations are allocated, the interrupt
4844 * handler is registered with the OS, the netdev watchdog subtask is
4845 * enabled, and the stack is notified that the interface is ready.
4847 * Returns 0 on success, negative value on failure
4849 int i40e_open(struct net_device *netdev)
4851 struct i40e_netdev_priv *np = netdev_priv(netdev);
4852 struct i40e_vsi *vsi = np->vsi;
4853 struct i40e_pf *pf = vsi->back;
4856 /* disallow open during test or if eeprom is broken */
4857 if (test_bit(__I40E_TESTING, &pf->state) ||
4858 test_bit(__I40E_BAD_EEPROM, &pf->state))
4861 netif_carrier_off(netdev);
4863 err = i40e_vsi_open(vsi);
4867 /* configure global TSO hardware offload settings */
4868 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4869 TCP_FLAG_FIN) >> 16);
4870 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4872 TCP_FLAG_CWR) >> 16);
4873 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4875 #ifdef CONFIG_I40E_VXLAN
4876 vxlan_get_rx_port(netdev);
4884 * @vsi: the VSI to open
4886 * Finish initialization of the VSI.
4888 * Returns 0 on success, negative value on failure
4890 int i40e_vsi_open(struct i40e_vsi *vsi)
4892 struct i40e_pf *pf = vsi->back;
4893 char int_name[I40E_INT_NAME_STR_LEN];
4896 /* allocate descriptors */
4897 err = i40e_vsi_setup_tx_resources(vsi);
4900 err = i40e_vsi_setup_rx_resources(vsi);
4904 err = i40e_vsi_configure(vsi);
4909 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4910 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4911 err = i40e_vsi_request_irq(vsi, int_name);
4915 /* Notify the stack of the actual queue counts. */
4916 err = netif_set_real_num_tx_queues(vsi->netdev,
4917 vsi->num_queue_pairs);
4919 goto err_set_queues;
4921 err = netif_set_real_num_rx_queues(vsi->netdev,
4922 vsi->num_queue_pairs);
4924 goto err_set_queues;
4926 } else if (vsi->type == I40E_VSI_FDIR) {
4927 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
4928 dev_driver_string(&pf->pdev->dev),
4929 dev_name(&pf->pdev->dev));
4930 err = i40e_vsi_request_irq(vsi, int_name);
4937 err = i40e_up_complete(vsi);
4939 goto err_up_complete;
4946 i40e_vsi_free_irq(vsi);
4948 i40e_vsi_free_rx_resources(vsi);
4950 i40e_vsi_free_tx_resources(vsi);
4951 if (vsi == pf->vsi[pf->lan_vsi])
4952 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4958 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4959 * @pf: Pointer to pf
4961 * This function destroys the hlist where all the Flow Director
4962 * filters were saved.
4964 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4966 struct i40e_fdir_filter *filter;
4967 struct hlist_node *node2;
4969 hlist_for_each_entry_safe(filter, node2,
4970 &pf->fdir_filter_list, fdir_node) {
4971 hlist_del(&filter->fdir_node);
4974 pf->fdir_pf_active_filters = 0;
4978 * i40e_close - Disables a network interface
4979 * @netdev: network interface device structure
4981 * The close entry point is called when an interface is de-activated
4982 * by the OS. The hardware is still under the driver's control, but
4983 * this netdev interface is disabled.
4985 * Returns 0, this is not allowed to fail
4988 int i40e_close(struct net_device *netdev)
4990 static int i40e_close(struct net_device *netdev)
4993 struct i40e_netdev_priv *np = netdev_priv(netdev);
4994 struct i40e_vsi *vsi = np->vsi;
4996 i40e_vsi_close(vsi);
5002 * i40e_do_reset - Start a PF or Core Reset sequence
5003 * @pf: board private structure
5004 * @reset_flags: which reset is requested
5006 * The essential difference in resets is that the PF Reset
5007 * doesn't clear the packet buffers, doesn't reset the PE
5008 * firmware, and doesn't bother the other PFs on the chip.
5010 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5014 WARN_ON(in_interrupt());
5016 if (i40e_check_asq_alive(&pf->hw))
5017 i40e_vc_notify_reset(pf);
5019 /* do the biggest reset indicated */
5020 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
5022 /* Request a Global Reset
5024 * This will start the chip's countdown to the actual full
5025 * chip reset event, and a warning interrupt to be sent
5026 * to all PFs, including the requestor. Our handler
5027 * for the warning interrupt will deal with the shutdown
5028 * and recovery of the switch setup.
5030 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5031 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5032 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5033 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5035 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
5037 /* Request a Core Reset
5039 * Same as Global Reset, except does *not* include the MAC/PHY
5041 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5042 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5043 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5044 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5045 i40e_flush(&pf->hw);
5047 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
5049 /* Request a PF Reset
5051 * Resets only the PF-specific registers
5053 * This goes directly to the tear-down and rebuild of
5054 * the switch, since we need to do all the recovery as
5055 * for the Core Reset.
5057 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5058 i40e_handle_reset_warning(pf);
5060 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
5063 /* Find the VSI(s) that requested a re-init */
5064 dev_info(&pf->pdev->dev,
5065 "VSI reinit requested\n");
5066 for (v = 0; v < pf->num_alloc_vsi; v++) {
5067 struct i40e_vsi *vsi = pf->vsi[v];
5069 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5070 i40e_vsi_reinit_locked(pf->vsi[v]);
5071 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5075 /* no further action needed, so return now */
5077 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
5080 /* Find the VSI(s) that needs to be brought down */
5081 dev_info(&pf->pdev->dev, "VSI down requested\n");
5082 for (v = 0; v < pf->num_alloc_vsi; v++) {
5083 struct i40e_vsi *vsi = pf->vsi[v];
5085 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5086 set_bit(__I40E_DOWN, &vsi->state);
5088 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5092 /* no further action needed, so return now */
5095 dev_info(&pf->pdev->dev,
5096 "bad reset request 0x%08x\n", reset_flags);
5101 #ifdef CONFIG_I40E_DCB
5103 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5104 * @pf: board private structure
5105 * @old_cfg: current DCB config
5106 * @new_cfg: new DCB config
5108 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5109 struct i40e_dcbx_config *old_cfg,
5110 struct i40e_dcbx_config *new_cfg)
5112 bool need_reconfig = false;
5114 /* Check if ETS configuration has changed */
5115 if (memcmp(&new_cfg->etscfg,
5117 sizeof(new_cfg->etscfg))) {
5118 /* If Priority Table has changed reconfig is needed */
5119 if (memcmp(&new_cfg->etscfg.prioritytable,
5120 &old_cfg->etscfg.prioritytable,
5121 sizeof(new_cfg->etscfg.prioritytable))) {
5122 need_reconfig = true;
5123 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5126 if (memcmp(&new_cfg->etscfg.tcbwtable,
5127 &old_cfg->etscfg.tcbwtable,
5128 sizeof(new_cfg->etscfg.tcbwtable)))
5129 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5131 if (memcmp(&new_cfg->etscfg.tsatable,
5132 &old_cfg->etscfg.tsatable,
5133 sizeof(new_cfg->etscfg.tsatable)))
5134 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5137 /* Check if PFC configuration has changed */
5138 if (memcmp(&new_cfg->pfc,
5140 sizeof(new_cfg->pfc))) {
5141 need_reconfig = true;
5142 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5145 /* Check if APP Table has changed */
5146 if (memcmp(&new_cfg->app,
5148 sizeof(new_cfg->app))) {
5149 need_reconfig = true;
5150 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5153 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5155 return need_reconfig;
5159 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5160 * @pf: board private structure
5161 * @e: event info posted on ARQ
5163 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5164 struct i40e_arq_event_info *e)
5166 struct i40e_aqc_lldp_get_mib *mib =
5167 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5168 struct i40e_hw *hw = &pf->hw;
5169 struct i40e_dcbx_config tmp_dcbx_cfg;
5170 bool need_reconfig = false;
5174 /* Not DCB capable or capability disabled */
5175 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5178 /* Ignore if event is not for Nearest Bridge */
5179 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5180 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5181 dev_dbg(&pf->pdev->dev,
5182 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5183 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5186 /* Check MIB Type and return if event for Remote MIB update */
5187 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5188 dev_dbg(&pf->pdev->dev,
5189 "%s: LLDP event mib type %s\n", __func__,
5190 type ? "remote" : "local");
5191 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5192 /* Update the remote cached instance and return */
5193 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5194 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5195 &hw->remote_dcbx_config);
5199 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5200 /* Store the old configuration */
5201 memcpy(&tmp_dcbx_cfg, &hw->local_dcbx_config, sizeof(tmp_dcbx_cfg));
5203 /* Reset the old DCBx configuration data */
5204 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5205 /* Get updated DCBX data from firmware */
5206 ret = i40e_get_dcb_config(&pf->hw);
5208 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n");
5212 /* No change detected in DCBX configs */
5213 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5214 sizeof(tmp_dcbx_cfg))) {
5215 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5219 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5220 &hw->local_dcbx_config);
5222 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5227 /* Enable DCB tagging only when more than one TC */
5228 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5229 pf->flags |= I40E_FLAG_DCB_ENABLED;
5231 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5233 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5234 /* Reconfiguration needed quiesce all VSIs */
5235 i40e_pf_quiesce_all_vsi(pf);
5237 /* Changes in configuration update VEB/VSI */
5238 i40e_dcb_reconfigure(pf);
5240 ret = i40e_resume_port_tx(pf);
5242 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5243 /* In case of error no point in resuming VSIs */
5247 /* Wait for the PF's Tx queues to be disabled */
5248 ret = i40e_pf_wait_txq_disabled(pf);
5250 i40e_pf_unquiesce_all_vsi(pf);
5254 #endif /* CONFIG_I40E_DCB */
5257 * i40e_do_reset_safe - Protected reset path for userland calls.
5258 * @pf: board private structure
5259 * @reset_flags: which reset is requested
5262 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5265 i40e_do_reset(pf, reset_flags);
5270 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5271 * @pf: board private structure
5272 * @e: event info posted on ARQ
5274 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5277 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5278 struct i40e_arq_event_info *e)
5280 struct i40e_aqc_lan_overflow *data =
5281 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5282 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5283 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5284 struct i40e_hw *hw = &pf->hw;
5288 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5291 /* Queue belongs to VF, find the VF and issue VF reset */
5292 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5293 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5294 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5295 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5296 vf_id -= hw->func_caps.vf_base_id;
5297 vf = &pf->vf[vf_id];
5298 i40e_vc_notify_vf_reset(vf);
5299 /* Allow VF to process pending reset notification */
5301 i40e_reset_vf(vf, false);
5306 * i40e_service_event_complete - Finish up the service event
5307 * @pf: board private structure
5309 static void i40e_service_event_complete(struct i40e_pf *pf)
5311 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5313 /* flush memory to make sure state is correct before next watchog */
5314 smp_mb__before_atomic();
5315 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5319 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5320 * @pf: board private structure
5322 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5326 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5327 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5332 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5333 * @pf: board private structure
5335 int i40e_get_current_fd_count(struct i40e_pf *pf)
5338 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5339 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5340 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5341 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5346 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5347 * @pf: board private structure
5349 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5351 u32 fcnt_prog, fcnt_avail;
5353 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5356 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5359 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5360 fcnt_avail = pf->fdir_pf_filter_count;
5361 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5362 (pf->fd_add_err == 0) ||
5363 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5364 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5365 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5366 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5367 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5370 /* Wait for some more space to be available to turn on ATR */
5371 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5372 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5373 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5374 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5375 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5380 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5382 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5383 * @pf: board private structure
5385 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5387 int flush_wait_retry = 50;
5390 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5393 if (time_after(jiffies, pf->fd_flush_timestamp +
5394 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5395 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5396 pf->fd_flush_timestamp = jiffies;
5397 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5398 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5399 /* flush all filters */
5400 wr32(&pf->hw, I40E_PFQF_CTL_1,
5401 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5402 i40e_flush(&pf->hw);
5406 /* Check FD flush status every 5-6msec */
5407 usleep_range(5000, 6000);
5408 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5409 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5411 } while (flush_wait_retry--);
5412 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5413 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5415 /* replay sideband filters */
5416 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5418 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5419 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5420 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5421 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5422 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5428 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5429 * @pf: board private structure
5431 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5433 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5436 /* We can see up to 256 filter programming desc in transit if the filters are
5437 * being applied really fast; before we see the first
5438 * filter miss error on Rx queue 0. Accumulating enough error messages before
5439 * reacting will make sure we don't cause flush too often.
5441 #define I40E_MAX_FD_PROGRAM_ERROR 256
5444 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5445 * @pf: board private structure
5447 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5450 /* if interface is down do nothing */
5451 if (test_bit(__I40E_DOWN, &pf->state))
5454 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5457 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5458 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5459 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5460 i40e_fdir_flush_and_replay(pf);
5462 i40e_fdir_check_and_reenable(pf);
5467 * i40e_vsi_link_event - notify VSI of a link event
5468 * @vsi: vsi to be notified
5469 * @link_up: link up or down
5471 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5473 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5476 switch (vsi->type) {
5481 if (!vsi->netdev || !vsi->netdev_registered)
5485 netif_carrier_on(vsi->netdev);
5486 netif_tx_wake_all_queues(vsi->netdev);
5488 netif_carrier_off(vsi->netdev);
5489 netif_tx_stop_all_queues(vsi->netdev);
5493 case I40E_VSI_SRIOV:
5494 case I40E_VSI_VMDQ2:
5496 case I40E_VSI_MIRROR:
5498 /* there is no notification for other VSIs */
5504 * i40e_veb_link_event - notify elements on the veb of a link event
5505 * @veb: veb to be notified
5506 * @link_up: link up or down
5508 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5513 if (!veb || !veb->pf)
5517 /* depth first... */
5518 for (i = 0; i < I40E_MAX_VEB; i++)
5519 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5520 i40e_veb_link_event(pf->veb[i], link_up);
5522 /* ... now the local VSIs */
5523 for (i = 0; i < pf->num_alloc_vsi; i++)
5524 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5525 i40e_vsi_link_event(pf->vsi[i], link_up);
5529 * i40e_link_event - Update netif_carrier status
5530 * @pf: board private structure
5532 static void i40e_link_event(struct i40e_pf *pf)
5534 bool new_link, old_link;
5535 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5536 u8 new_link_speed, old_link_speed;
5538 /* set this to force the get_link_status call to refresh state */
5539 pf->hw.phy.get_link_info = true;
5541 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5542 new_link = i40e_get_link_status(&pf->hw);
5543 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5544 new_link_speed = pf->hw.phy.link_info.link_speed;
5546 if (new_link == old_link &&
5547 new_link_speed == old_link_speed &&
5548 (test_bit(__I40E_DOWN, &vsi->state) ||
5549 new_link == netif_carrier_ok(vsi->netdev)))
5552 if (!test_bit(__I40E_DOWN, &vsi->state))
5553 i40e_print_link_message(vsi, new_link);
5555 /* Notify the base of the switch tree connected to
5556 * the link. Floating VEBs are not notified.
5558 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5559 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5561 i40e_vsi_link_event(vsi, new_link);
5564 i40e_vc_notify_link_state(pf);
5566 if (pf->flags & I40E_FLAG_PTP)
5567 i40e_ptp_set_increment(pf);
5571 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5572 * @pf: board private structure
5574 * Set the per-queue flags to request a check for stuck queues in the irq
5575 * clean functions, then force interrupts to be sure the irq clean is called.
5577 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5581 /* If we're down or resetting, just bail */
5582 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5585 /* for each VSI/netdev
5587 * set the check flag
5589 * force an interrupt
5591 for (v = 0; v < pf->num_alloc_vsi; v++) {
5592 struct i40e_vsi *vsi = pf->vsi[v];
5596 test_bit(__I40E_DOWN, &vsi->state) ||
5597 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5600 for (i = 0; i < vsi->num_queue_pairs; i++) {
5601 set_check_for_tx_hang(vsi->tx_rings[i]);
5602 if (test_bit(__I40E_HANG_CHECK_ARMED,
5603 &vsi->tx_rings[i]->state))
5608 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5609 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5610 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5611 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5612 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5613 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5614 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5616 u16 vec = vsi->base_vector - 1;
5617 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5618 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5619 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5620 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5621 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5622 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5623 wr32(&vsi->back->hw,
5624 I40E_PFINT_DYN_CTLN(vec), val);
5626 i40e_flush(&vsi->back->hw);
5632 * i40e_watchdog_subtask - periodic checks not using event driven response
5633 * @pf: board private structure
5635 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5639 /* if interface is down do nothing */
5640 if (test_bit(__I40E_DOWN, &pf->state) ||
5641 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5644 /* make sure we don't do these things too often */
5645 if (time_before(jiffies, (pf->service_timer_previous +
5646 pf->service_timer_period)))
5648 pf->service_timer_previous = jiffies;
5650 i40e_check_hang_subtask(pf);
5651 i40e_link_event(pf);
5653 /* Update the stats for active netdevs so the network stack
5654 * can look at updated numbers whenever it cares to
5656 for (i = 0; i < pf->num_alloc_vsi; i++)
5657 if (pf->vsi[i] && pf->vsi[i]->netdev)
5658 i40e_update_stats(pf->vsi[i]);
5660 /* Update the stats for the active switching components */
5661 for (i = 0; i < I40E_MAX_VEB; i++)
5663 i40e_update_veb_stats(pf->veb[i]);
5665 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5669 * i40e_reset_subtask - Set up for resetting the device and driver
5670 * @pf: board private structure
5672 static void i40e_reset_subtask(struct i40e_pf *pf)
5674 u32 reset_flags = 0;
5677 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5678 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5679 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5681 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5682 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5683 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5685 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5686 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5687 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5689 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5690 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5691 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5693 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5694 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5695 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5698 /* If there's a recovery already waiting, it takes
5699 * precedence before starting a new reset sequence.
5701 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5702 i40e_handle_reset_warning(pf);
5706 /* If we're already down or resetting, just bail */
5708 !test_bit(__I40E_DOWN, &pf->state) &&
5709 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5710 i40e_do_reset(pf, reset_flags);
5717 * i40e_handle_link_event - Handle link event
5718 * @pf: board private structure
5719 * @e: event info posted on ARQ
5721 static void i40e_handle_link_event(struct i40e_pf *pf,
5722 struct i40e_arq_event_info *e)
5724 struct i40e_hw *hw = &pf->hw;
5725 struct i40e_aqc_get_link_status *status =
5726 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5727 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5729 /* save off old link status information */
5730 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5731 sizeof(pf->hw.phy.link_info_old));
5733 /* Do a new status request to re-enable LSE reporting
5734 * and load new status information into the hw struct
5735 * This completely ignores any state information
5736 * in the ARQ event info, instead choosing to always
5737 * issue the AQ update link status command.
5739 i40e_link_event(pf);
5741 /* check for unqualified module, if link is down */
5742 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5743 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5744 (!(status->link_info & I40E_AQ_LINK_UP)))
5745 dev_err(&pf->pdev->dev,
5746 "The driver failed to link because an unqualified module was detected.\n");
5750 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5751 * @pf: board private structure
5753 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5755 struct i40e_arq_event_info event;
5756 struct i40e_hw *hw = &pf->hw;
5763 /* Do not run clean AQ when PF reset fails */
5764 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5767 /* check for error indications */
5768 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5770 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5771 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5772 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5774 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5775 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5776 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5778 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5779 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5780 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5783 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5785 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5787 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5788 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5789 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5791 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5792 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5793 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5795 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5796 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5797 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5800 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5802 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5803 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5808 ret = i40e_clean_arq_element(hw, &event, &pending);
5809 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5812 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5816 opcode = le16_to_cpu(event.desc.opcode);
5819 case i40e_aqc_opc_get_link_status:
5820 i40e_handle_link_event(pf, &event);
5822 case i40e_aqc_opc_send_msg_to_pf:
5823 ret = i40e_vc_process_vf_msg(pf,
5824 le16_to_cpu(event.desc.retval),
5825 le32_to_cpu(event.desc.cookie_high),
5826 le32_to_cpu(event.desc.cookie_low),
5830 case i40e_aqc_opc_lldp_update_mib:
5831 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5832 #ifdef CONFIG_I40E_DCB
5834 ret = i40e_handle_lldp_event(pf, &event);
5836 #endif /* CONFIG_I40E_DCB */
5838 case i40e_aqc_opc_event_lan_overflow:
5839 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5840 i40e_handle_lan_overflow_event(pf, &event);
5842 case i40e_aqc_opc_send_msg_to_peer:
5843 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5846 dev_info(&pf->pdev->dev,
5847 "ARQ Error: Unknown event 0x%04x received\n",
5851 } while (pending && (i++ < pf->adminq_work_limit));
5853 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5854 /* re-enable Admin queue interrupt cause */
5855 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5856 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5857 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5860 kfree(event.msg_buf);
5864 * i40e_verify_eeprom - make sure eeprom is good to use
5865 * @pf: board private structure
5867 static void i40e_verify_eeprom(struct i40e_pf *pf)
5871 err = i40e_diag_eeprom_test(&pf->hw);
5873 /* retry in case of garbage read */
5874 err = i40e_diag_eeprom_test(&pf->hw);
5876 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5878 set_bit(__I40E_BAD_EEPROM, &pf->state);
5882 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5883 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5884 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5889 * i40e_config_bridge_mode - Configure the HW bridge mode
5890 * @veb: pointer to the bridge instance
5892 * Configure the loop back mode for the LAN VSI that is downlink to the
5893 * specified HW bridge instance. It is expected this function is called
5894 * when a new HW bridge is instantiated.
5896 static void i40e_config_bridge_mode(struct i40e_veb *veb)
5898 struct i40e_pf *pf = veb->pf;
5900 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
5901 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
5902 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
5903 i40e_disable_pf_switch_lb(pf);
5905 i40e_enable_pf_switch_lb(pf);
5909 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5910 * @veb: pointer to the VEB instance
5912 * This is a recursive function that first builds the attached VSIs then
5913 * recurses in to build the next layer of VEB. We track the connections
5914 * through our own index numbers because the seid's from the HW could
5915 * change across the reset.
5917 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5919 struct i40e_vsi *ctl_vsi = NULL;
5920 struct i40e_pf *pf = veb->pf;
5924 /* build VSI that owns this VEB, temporarily attached to base VEB */
5925 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5927 pf->vsi[v]->veb_idx == veb->idx &&
5928 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5929 ctl_vsi = pf->vsi[v];
5934 dev_info(&pf->pdev->dev,
5935 "missing owner VSI for veb_idx %d\n", veb->idx);
5937 goto end_reconstitute;
5939 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5940 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5941 ret = i40e_add_vsi(ctl_vsi);
5943 dev_info(&pf->pdev->dev,
5944 "rebuild of owner VSI failed: %d\n", ret);
5945 goto end_reconstitute;
5947 i40e_vsi_reset_stats(ctl_vsi);
5949 /* create the VEB in the switch and move the VSI onto the VEB */
5950 ret = i40e_add_veb(veb, ctl_vsi);
5952 goto end_reconstitute;
5954 i40e_config_bridge_mode(veb);
5956 /* create the remaining VSIs attached to this VEB */
5957 for (v = 0; v < pf->num_alloc_vsi; v++) {
5958 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5961 if (pf->vsi[v]->veb_idx == veb->idx) {
5962 struct i40e_vsi *vsi = pf->vsi[v];
5963 vsi->uplink_seid = veb->seid;
5964 ret = i40e_add_vsi(vsi);
5966 dev_info(&pf->pdev->dev,
5967 "rebuild of vsi_idx %d failed: %d\n",
5969 goto end_reconstitute;
5971 i40e_vsi_reset_stats(vsi);
5975 /* create any VEBs attached to this VEB - RECURSION */
5976 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5977 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5978 pf->veb[veb_idx]->uplink_seid = veb->seid;
5979 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5990 * i40e_get_capabilities - get info about the HW
5991 * @pf: the PF struct
5993 static int i40e_get_capabilities(struct i40e_pf *pf)
5995 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6000 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6002 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6006 /* this loads the data into the hw struct for us */
6007 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6009 i40e_aqc_opc_list_func_capabilities,
6011 /* data loaded, buffer no longer needed */
6014 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6015 /* retry with a larger buffer */
6016 buf_len = data_size;
6017 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6018 dev_info(&pf->pdev->dev,
6019 "capability discovery failed: aq=%d\n",
6020 pf->hw.aq.asq_last_status);
6025 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6026 (pf->hw.aq.fw_maj_ver < 2)) {
6027 pf->hw.func_caps.num_msix_vectors++;
6028 pf->hw.func_caps.num_msix_vectors_vf++;
6031 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6032 dev_info(&pf->pdev->dev,
6033 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6034 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6035 pf->hw.func_caps.num_msix_vectors,
6036 pf->hw.func_caps.num_msix_vectors_vf,
6037 pf->hw.func_caps.fd_filters_guaranteed,
6038 pf->hw.func_caps.fd_filters_best_effort,
6039 pf->hw.func_caps.num_tx_qp,
6040 pf->hw.func_caps.num_vsis);
6042 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6043 + pf->hw.func_caps.num_vfs)
6044 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6045 dev_info(&pf->pdev->dev,
6046 "got num_vsis %d, setting num_vsis to %d\n",
6047 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6048 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6054 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6057 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6058 * @pf: board private structure
6060 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6062 struct i40e_vsi *vsi;
6065 /* quick workaround for an NVM issue that leaves a critical register
6068 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6069 static const u32 hkey[] = {
6070 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6071 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6072 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6075 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6076 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6079 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6082 /* find existing VSI and see if it needs configuring */
6084 for (i = 0; i < pf->num_alloc_vsi; i++) {
6085 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6091 /* create a new VSI if none exists */
6093 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6094 pf->vsi[pf->lan_vsi]->seid, 0);
6096 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6097 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6102 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6106 * i40e_fdir_teardown - release the Flow Director resources
6107 * @pf: board private structure
6109 static void i40e_fdir_teardown(struct i40e_pf *pf)
6113 i40e_fdir_filter_exit(pf);
6114 for (i = 0; i < pf->num_alloc_vsi; i++) {
6115 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6116 i40e_vsi_release(pf->vsi[i]);
6123 * i40e_prep_for_reset - prep for the core to reset
6124 * @pf: board private structure
6126 * Close up the VFs and other things in prep for pf Reset.
6128 static void i40e_prep_for_reset(struct i40e_pf *pf)
6130 struct i40e_hw *hw = &pf->hw;
6131 i40e_status ret = 0;
6134 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6135 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6138 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6140 /* quiesce the VSIs and their queues that are not already DOWN */
6141 i40e_pf_quiesce_all_vsi(pf);
6143 for (v = 0; v < pf->num_alloc_vsi; v++) {
6145 pf->vsi[v]->seid = 0;
6148 i40e_shutdown_adminq(&pf->hw);
6150 /* call shutdown HMC */
6151 if (hw->hmc.hmc_obj) {
6152 ret = i40e_shutdown_lan_hmc(hw);
6154 dev_warn(&pf->pdev->dev,
6155 "shutdown_lan_hmc failed: %d\n", ret);
6160 * i40e_send_version - update firmware with driver version
6163 static void i40e_send_version(struct i40e_pf *pf)
6165 struct i40e_driver_version dv;
6167 dv.major_version = DRV_VERSION_MAJOR;
6168 dv.minor_version = DRV_VERSION_MINOR;
6169 dv.build_version = DRV_VERSION_BUILD;
6170 dv.subbuild_version = 0;
6171 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6172 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6176 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6177 * @pf: board private structure
6178 * @reinit: if the Main VSI needs to re-initialized.
6180 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6182 struct i40e_hw *hw = &pf->hw;
6183 u8 set_fc_aq_fail = 0;
6187 /* Now we wait for GRST to settle out.
6188 * We don't have to delete the VEBs or VSIs from the hw switch
6189 * because the reset will make them disappear.
6191 ret = i40e_pf_reset(hw);
6193 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6194 set_bit(__I40E_RESET_FAILED, &pf->state);
6195 goto clear_recovery;
6199 if (test_bit(__I40E_DOWN, &pf->state))
6200 goto clear_recovery;
6201 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6203 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6204 ret = i40e_init_adminq(&pf->hw);
6206 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6207 goto clear_recovery;
6210 /* re-verify the eeprom if we just had an EMP reset */
6211 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6212 i40e_verify_eeprom(pf);
6214 i40e_clear_pxe_mode(hw);
6215 ret = i40e_get_capabilities(pf);
6217 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6219 goto end_core_reset;
6222 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6223 hw->func_caps.num_rx_qp,
6224 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6226 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6227 goto end_core_reset;
6229 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6231 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6232 goto end_core_reset;
6235 #ifdef CONFIG_I40E_DCB
6236 ret = i40e_init_pf_dcb(pf);
6238 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6239 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6240 /* Continue without DCB enabled */
6242 #endif /* CONFIG_I40E_DCB */
6244 ret = i40e_init_pf_fcoe(pf);
6246 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6249 /* do basic switch setup */
6250 ret = i40e_setup_pf_switch(pf, reinit);
6252 goto end_core_reset;
6254 /* driver is only interested in link up/down and module qualification
6255 * reports from firmware
6257 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6258 I40E_AQ_EVENT_LINK_UPDOWN |
6259 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6261 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6263 /* make sure our flow control settings are restored */
6264 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6266 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6268 /* Rebuild the VSIs and VEBs that existed before reset.
6269 * They are still in our local switch element arrays, so only
6270 * need to rebuild the switch model in the HW.
6272 * If there were VEBs but the reconstitution failed, we'll try
6273 * try to recover minimal use by getting the basic PF VSI working.
6275 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6276 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6277 /* find the one VEB connected to the MAC, and find orphans */
6278 for (v = 0; v < I40E_MAX_VEB; v++) {
6282 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6283 pf->veb[v]->uplink_seid == 0) {
6284 ret = i40e_reconstitute_veb(pf->veb[v]);
6289 /* If Main VEB failed, we're in deep doodoo,
6290 * so give up rebuilding the switch and set up
6291 * for minimal rebuild of PF VSI.
6292 * If orphan failed, we'll report the error
6293 * but try to keep going.
6295 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6296 dev_info(&pf->pdev->dev,
6297 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6299 pf->vsi[pf->lan_vsi]->uplink_seid
6302 } else if (pf->veb[v]->uplink_seid == 0) {
6303 dev_info(&pf->pdev->dev,
6304 "rebuild of orphan VEB failed: %d\n",
6311 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6312 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6313 /* no VEB, so rebuild only the Main VSI */
6314 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6316 dev_info(&pf->pdev->dev,
6317 "rebuild of Main VSI failed: %d\n", ret);
6318 goto end_core_reset;
6322 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6323 (pf->hw.aq.fw_maj_ver < 4)) {
6325 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6327 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6328 pf->hw.aq.asq_last_status);
6330 /* reinit the misc interrupt */
6331 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6332 ret = i40e_setup_misc_vector(pf);
6334 /* restart the VSIs that were rebuilt and running before the reset */
6335 i40e_pf_unquiesce_all_vsi(pf);
6337 if (pf->num_alloc_vfs) {
6338 for (v = 0; v < pf->num_alloc_vfs; v++)
6339 i40e_reset_vf(&pf->vf[v], true);
6342 /* tell the firmware that we're starting */
6343 i40e_send_version(pf);
6346 clear_bit(__I40E_RESET_FAILED, &pf->state);
6348 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6352 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6353 * @pf: board private structure
6355 * Close up the VFs and other things in prep for a Core Reset,
6356 * then get ready to rebuild the world.
6358 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6360 i40e_prep_for_reset(pf);
6361 i40e_reset_and_rebuild(pf, false);
6365 * i40e_handle_mdd_event
6366 * @pf: pointer to the pf structure
6368 * Called from the MDD irq handler to identify possibly malicious vfs
6370 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6372 struct i40e_hw *hw = &pf->hw;
6373 bool mdd_detected = false;
6374 bool pf_mdd_detected = false;
6379 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6382 /* find what triggered the MDD event */
6383 reg = rd32(hw, I40E_GL_MDET_TX);
6384 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6385 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6386 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6387 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6388 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6389 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6390 I40E_GL_MDET_TX_EVENT_SHIFT;
6391 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6392 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6393 pf->hw.func_caps.base_queue;
6394 if (netif_msg_tx_err(pf))
6395 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6396 event, queue, pf_num, vf_num);
6397 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6398 mdd_detected = true;
6400 reg = rd32(hw, I40E_GL_MDET_RX);
6401 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6402 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6403 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6404 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6405 I40E_GL_MDET_RX_EVENT_SHIFT;
6406 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6407 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6408 pf->hw.func_caps.base_queue;
6409 if (netif_msg_rx_err(pf))
6410 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6411 event, queue, func);
6412 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6413 mdd_detected = true;
6417 reg = rd32(hw, I40E_PF_MDET_TX);
6418 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6419 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6420 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6421 pf_mdd_detected = true;
6423 reg = rd32(hw, I40E_PF_MDET_RX);
6424 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6425 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6426 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6427 pf_mdd_detected = true;
6429 /* Queue belongs to the PF, initiate a reset */
6430 if (pf_mdd_detected) {
6431 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6432 i40e_service_event_schedule(pf);
6436 /* see if one of the VFs needs its hand slapped */
6437 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6439 reg = rd32(hw, I40E_VP_MDET_TX(i));
6440 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6441 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6442 vf->num_mdd_events++;
6443 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6447 reg = rd32(hw, I40E_VP_MDET_RX(i));
6448 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6449 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6450 vf->num_mdd_events++;
6451 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6455 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6456 dev_info(&pf->pdev->dev,
6457 "Too many MDD events on VF %d, disabled\n", i);
6458 dev_info(&pf->pdev->dev,
6459 "Use PF Control I/F to re-enable the VF\n");
6460 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6464 /* re-enable mdd interrupt cause */
6465 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6466 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6467 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6468 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6472 #ifdef CONFIG_I40E_VXLAN
6474 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6475 * @pf: board private structure
6477 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6479 struct i40e_hw *hw = &pf->hw;
6485 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6488 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6490 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6491 if (pf->pending_vxlan_bitmap & (1 << i)) {
6492 pf->pending_vxlan_bitmap &= ~(1 << i);
6493 port = pf->vxlan_ports[i];
6495 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6496 I40E_AQC_TUNNEL_TYPE_VXLAN,
6497 &filter_index, NULL)
6498 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6501 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6502 port ? "adding" : "deleting",
6503 ntohs(port), port ? i : i);
6505 pf->vxlan_ports[i] = 0;
6507 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6508 port ? "Added" : "Deleted",
6509 ntohs(port), port ? i : filter_index);
6517 * i40e_service_task - Run the driver's async subtasks
6518 * @work: pointer to work_struct containing our data
6520 static void i40e_service_task(struct work_struct *work)
6522 struct i40e_pf *pf = container_of(work,
6525 unsigned long start_time = jiffies;
6527 /* don't bother with service tasks if a reset is in progress */
6528 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6529 i40e_service_event_complete(pf);
6533 i40e_reset_subtask(pf);
6534 i40e_handle_mdd_event(pf);
6535 i40e_vc_process_vflr_event(pf);
6536 i40e_watchdog_subtask(pf);
6537 i40e_fdir_reinit_subtask(pf);
6538 i40e_sync_filters_subtask(pf);
6539 #ifdef CONFIG_I40E_VXLAN
6540 i40e_sync_vxlan_filters_subtask(pf);
6542 i40e_clean_adminq_subtask(pf);
6544 i40e_service_event_complete(pf);
6546 /* If the tasks have taken longer than one timer cycle or there
6547 * is more work to be done, reschedule the service task now
6548 * rather than wait for the timer to tick again.
6550 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6551 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6552 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6553 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6554 i40e_service_event_schedule(pf);
6558 * i40e_service_timer - timer callback
6559 * @data: pointer to PF struct
6561 static void i40e_service_timer(unsigned long data)
6563 struct i40e_pf *pf = (struct i40e_pf *)data;
6565 mod_timer(&pf->service_timer,
6566 round_jiffies(jiffies + pf->service_timer_period));
6567 i40e_service_event_schedule(pf);
6571 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6572 * @vsi: the VSI being configured
6574 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6576 struct i40e_pf *pf = vsi->back;
6578 switch (vsi->type) {
6580 vsi->alloc_queue_pairs = pf->num_lan_qps;
6581 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6582 I40E_REQ_DESCRIPTOR_MULTIPLE);
6583 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6584 vsi->num_q_vectors = pf->num_lan_msix;
6586 vsi->num_q_vectors = 1;
6591 vsi->alloc_queue_pairs = 1;
6592 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6593 I40E_REQ_DESCRIPTOR_MULTIPLE);
6594 vsi->num_q_vectors = 1;
6597 case I40E_VSI_VMDQ2:
6598 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6599 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6600 I40E_REQ_DESCRIPTOR_MULTIPLE);
6601 vsi->num_q_vectors = pf->num_vmdq_msix;
6604 case I40E_VSI_SRIOV:
6605 vsi->alloc_queue_pairs = pf->num_vf_qps;
6606 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6607 I40E_REQ_DESCRIPTOR_MULTIPLE);
6612 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6613 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6614 I40E_REQ_DESCRIPTOR_MULTIPLE);
6615 vsi->num_q_vectors = pf->num_fcoe_msix;
6618 #endif /* I40E_FCOE */
6628 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6629 * @type: VSI pointer
6630 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6632 * On error: returns error code (negative)
6633 * On success: returns 0
6635 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6640 /* allocate memory for both Tx and Rx ring pointers */
6641 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6642 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6645 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6647 if (alloc_qvectors) {
6648 /* allocate memory for q_vector pointers */
6649 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6650 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6651 if (!vsi->q_vectors) {
6659 kfree(vsi->tx_rings);
6664 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6665 * @pf: board private structure
6666 * @type: type of VSI
6668 * On error: returns error code (negative)
6669 * On success: returns vsi index in PF (positive)
6671 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6674 struct i40e_vsi *vsi;
6678 /* Need to protect the allocation of the VSIs at the PF level */
6679 mutex_lock(&pf->switch_mutex);
6681 /* VSI list may be fragmented if VSI creation/destruction has
6682 * been happening. We can afford to do a quick scan to look
6683 * for any free VSIs in the list.
6685 * find next empty vsi slot, looping back around if necessary
6688 while (i < pf->num_alloc_vsi && pf->vsi[i])
6690 if (i >= pf->num_alloc_vsi) {
6692 while (i < pf->next_vsi && pf->vsi[i])
6696 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6697 vsi_idx = i; /* Found one! */
6700 goto unlock_pf; /* out of VSI slots! */
6704 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6711 set_bit(__I40E_DOWN, &vsi->state);
6714 vsi->rx_itr_setting = pf->rx_itr_default;
6715 vsi->tx_itr_setting = pf->tx_itr_default;
6716 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6717 pf->rss_table_size : 64;
6718 vsi->netdev_registered = false;
6719 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6720 INIT_LIST_HEAD(&vsi->mac_filter_list);
6721 vsi->irqs_ready = false;
6723 ret = i40e_set_num_rings_in_vsi(vsi);
6727 ret = i40e_vsi_alloc_arrays(vsi, true);
6731 /* Setup default MSIX irq handler for VSI */
6732 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6734 pf->vsi[vsi_idx] = vsi;
6739 pf->next_vsi = i - 1;
6742 mutex_unlock(&pf->switch_mutex);
6747 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6748 * @type: VSI pointer
6749 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6751 * On error: returns error code (negative)
6752 * On success: returns 0
6754 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6756 /* free the ring and vector containers */
6757 if (free_qvectors) {
6758 kfree(vsi->q_vectors);
6759 vsi->q_vectors = NULL;
6761 kfree(vsi->tx_rings);
6762 vsi->tx_rings = NULL;
6763 vsi->rx_rings = NULL;
6767 * i40e_vsi_clear - Deallocate the VSI provided
6768 * @vsi: the VSI being un-configured
6770 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6781 mutex_lock(&pf->switch_mutex);
6782 if (!pf->vsi[vsi->idx]) {
6783 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6784 vsi->idx, vsi->idx, vsi, vsi->type);
6788 if (pf->vsi[vsi->idx] != vsi) {
6789 dev_err(&pf->pdev->dev,
6790 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6791 pf->vsi[vsi->idx]->idx,
6793 pf->vsi[vsi->idx]->type,
6794 vsi->idx, vsi, vsi->type);
6798 /* updates the pf for this cleared vsi */
6799 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6800 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6802 i40e_vsi_free_arrays(vsi, true);
6804 pf->vsi[vsi->idx] = NULL;
6805 if (vsi->idx < pf->next_vsi)
6806 pf->next_vsi = vsi->idx;
6809 mutex_unlock(&pf->switch_mutex);
6817 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6818 * @vsi: the VSI being cleaned
6820 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6824 if (vsi->tx_rings && vsi->tx_rings[0]) {
6825 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6826 kfree_rcu(vsi->tx_rings[i], rcu);
6827 vsi->tx_rings[i] = NULL;
6828 vsi->rx_rings[i] = NULL;
6834 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6835 * @vsi: the VSI being configured
6837 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6839 struct i40e_ring *tx_ring, *rx_ring;
6840 struct i40e_pf *pf = vsi->back;
6843 /* Set basic values in the rings to be used later during open() */
6844 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6845 /* allocate space for both Tx and Rx in one shot */
6846 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6850 tx_ring->queue_index = i;
6851 tx_ring->reg_idx = vsi->base_queue + i;
6852 tx_ring->ring_active = false;
6854 tx_ring->netdev = vsi->netdev;
6855 tx_ring->dev = &pf->pdev->dev;
6856 tx_ring->count = vsi->num_desc;
6858 tx_ring->dcb_tc = 0;
6859 vsi->tx_rings[i] = tx_ring;
6861 rx_ring = &tx_ring[1];
6862 rx_ring->queue_index = i;
6863 rx_ring->reg_idx = vsi->base_queue + i;
6864 rx_ring->ring_active = false;
6866 rx_ring->netdev = vsi->netdev;
6867 rx_ring->dev = &pf->pdev->dev;
6868 rx_ring->count = vsi->num_desc;
6870 rx_ring->dcb_tc = 0;
6871 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6872 set_ring_16byte_desc_enabled(rx_ring);
6874 clear_ring_16byte_desc_enabled(rx_ring);
6875 vsi->rx_rings[i] = rx_ring;
6881 i40e_vsi_clear_rings(vsi);
6886 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6887 * @pf: board private structure
6888 * @vectors: the number of MSI-X vectors to request
6890 * Returns the number of vectors reserved, or error
6892 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6894 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6895 I40E_MIN_MSIX, vectors);
6897 dev_info(&pf->pdev->dev,
6898 "MSI-X vector reservation failed: %d\n", vectors);
6906 * i40e_init_msix - Setup the MSIX capability
6907 * @pf: board private structure
6909 * Work with the OS to set up the MSIX vectors needed.
6911 * Returns 0 on success, negative on failure
6913 static int i40e_init_msix(struct i40e_pf *pf)
6915 i40e_status err = 0;
6916 struct i40e_hw *hw = &pf->hw;
6921 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6924 /* The number of vectors we'll request will be comprised of:
6925 * - Add 1 for "other" cause for Admin Queue events, etc.
6926 * - The number of LAN queue pairs
6927 * - Queues being used for RSS.
6928 * We don't need as many as max_rss_size vectors.
6929 * use rss_size instead in the calculation since that
6930 * is governed by number of cpus in the system.
6931 * - assumes symmetric Tx/Rx pairing
6932 * - The number of VMDq pairs
6934 * - The number of FCOE qps.
6936 * Once we count this up, try the request.
6938 * If we can't get what we want, we'll simplify to nearly nothing
6939 * and try again. If that still fails, we punt.
6941 pf->num_lan_msix = min_t(int, num_online_cpus(),
6942 hw->func_caps.num_msix_vectors);
6943 pf->num_vmdq_msix = pf->num_vmdq_qps;
6945 other_vecs += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6946 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6949 /* Scale down if necessary, and the rings will share vectors */
6950 pf->num_lan_msix = min_t(int, pf->num_lan_msix,
6951 (hw->func_caps.num_msix_vectors - other_vecs));
6952 v_budget = pf->num_lan_msix + other_vecs;
6955 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6956 pf->num_fcoe_msix = pf->num_fcoe_qps;
6957 v_budget += pf->num_fcoe_msix;
6961 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6963 if (!pf->msix_entries)
6966 for (i = 0; i < v_budget; i++)
6967 pf->msix_entries[i].entry = i;
6968 vec = i40e_reserve_msix_vectors(pf, v_budget);
6970 if (vec != v_budget) {
6971 /* If we have limited resources, we will start with no vectors
6972 * for the special features and then allocate vectors to some
6973 * of these features based on the policy and at the end disable
6974 * the features that did not get any vectors.
6977 pf->num_fcoe_qps = 0;
6978 pf->num_fcoe_msix = 0;
6980 pf->num_vmdq_msix = 0;
6983 if (vec < I40E_MIN_MSIX) {
6984 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6985 kfree(pf->msix_entries);
6986 pf->msix_entries = NULL;
6989 } else if (vec == I40E_MIN_MSIX) {
6990 /* Adjust for minimal MSIX use */
6991 pf->num_vmdq_vsis = 0;
6992 pf->num_vmdq_qps = 0;
6993 pf->num_lan_qps = 1;
6994 pf->num_lan_msix = 1;
6996 } else if (vec != v_budget) {
6997 /* reserve the misc vector */
7000 /* Scale vector usage down */
7001 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7002 pf->num_vmdq_vsis = 1;
7004 /* partition out the remaining vectors */
7007 pf->num_lan_msix = 1;
7011 /* give one vector to FCoE */
7012 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7013 pf->num_lan_msix = 1;
7014 pf->num_fcoe_msix = 1;
7017 pf->num_lan_msix = 2;
7022 /* give one vector to FCoE */
7023 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7024 pf->num_fcoe_msix = 1;
7028 pf->num_lan_msix = min_t(int, (vec / 2),
7030 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
7031 I40E_DEFAULT_NUM_VMDQ_VSI);
7036 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7037 (pf->num_vmdq_msix == 0)) {
7038 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7039 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7043 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7044 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7045 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7052 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7053 * @vsi: the VSI being configured
7054 * @v_idx: index of the vector in the vsi struct
7056 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7058 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7060 struct i40e_q_vector *q_vector;
7062 /* allocate q_vector */
7063 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7067 q_vector->vsi = vsi;
7068 q_vector->v_idx = v_idx;
7069 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7071 netif_napi_add(vsi->netdev, &q_vector->napi,
7072 i40e_napi_poll, NAPI_POLL_WEIGHT);
7074 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7075 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7077 /* tie q_vector and vsi together */
7078 vsi->q_vectors[v_idx] = q_vector;
7084 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7085 * @vsi: the VSI being configured
7087 * We allocate one q_vector per queue interrupt. If allocation fails we
7090 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7092 struct i40e_pf *pf = vsi->back;
7093 int v_idx, num_q_vectors;
7096 /* if not MSIX, give the one vector only to the LAN VSI */
7097 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7098 num_q_vectors = vsi->num_q_vectors;
7099 else if (vsi == pf->vsi[pf->lan_vsi])
7104 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7105 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7114 i40e_free_q_vector(vsi, v_idx);
7120 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7121 * @pf: board private structure to initialize
7123 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
7127 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7128 err = i40e_init_msix(pf);
7130 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7132 I40E_FLAG_FCOE_ENABLED |
7134 I40E_FLAG_RSS_ENABLED |
7135 I40E_FLAG_DCB_CAPABLE |
7136 I40E_FLAG_SRIOV_ENABLED |
7137 I40E_FLAG_FD_SB_ENABLED |
7138 I40E_FLAG_FD_ATR_ENABLED |
7139 I40E_FLAG_VMDQ_ENABLED);
7141 /* rework the queue expectations without MSIX */
7142 i40e_determine_queue_usage(pf);
7146 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7147 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7148 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7149 err = pci_enable_msi(pf->pdev);
7151 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
7152 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7156 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7157 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7159 /* track first vector for misc interrupts */
7160 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
7164 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7165 * @pf: board private structure
7167 * This sets up the handler for MSIX 0, which is used to manage the
7168 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7169 * when in MSI or Legacy interrupt mode.
7171 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7173 struct i40e_hw *hw = &pf->hw;
7176 /* Only request the irq if this is the first time through, and
7177 * not when we're rebuilding after a Reset
7179 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7180 err = request_irq(pf->msix_entries[0].vector,
7181 i40e_intr, 0, pf->int_name, pf);
7183 dev_info(&pf->pdev->dev,
7184 "request_irq for %s failed: %d\n",
7190 i40e_enable_misc_int_causes(pf);
7192 /* associate no queues to the misc vector */
7193 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7194 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7198 i40e_irq_dynamic_enable_icr0(pf);
7204 * i40e_config_rss - Prepare for RSS if used
7205 * @pf: board private structure
7207 static int i40e_config_rss(struct i40e_pf *pf)
7209 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1];
7210 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7211 struct i40e_hw *hw = &pf->hw;
7217 netdev_rss_key_fill(rss_key, sizeof(rss_key));
7218 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7219 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]);
7221 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7222 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7223 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7224 hena |= I40E_DEFAULT_RSS_HENA;
7225 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7226 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7228 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7230 /* Check capability and Set table size and register per hw expectation*/
7231 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7232 if (hw->func_caps.rss_table_size == 512) {
7233 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7234 pf->rss_table_size = 512;
7236 pf->rss_table_size = 128;
7237 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7239 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7241 /* Populate the LUT with max no. of queues in round robin fashion */
7242 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7244 /* The assumption is that lan qp count will be the highest
7245 * qp count for any PF VSI that needs RSS.
7246 * If multiple VSIs need RSS support, all the qp counts
7247 * for those VSIs should be a power of 2 for RSS to work.
7248 * If LAN VSI is the only consumer for RSS then this requirement
7251 if (j == vsi->rss_size)
7253 /* lut = 4-byte sliding window of 4 lut entries */
7254 lut = (lut << 8) | (j &
7255 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7256 /* On i = 3, we have 4 entries in lut; write to the register */
7258 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7266 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7267 * @pf: board private structure
7268 * @queue_count: the requested queue count for rss.
7270 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7271 * count which may be different from the requested queue count.
7273 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7275 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7278 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7281 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7283 if (queue_count != vsi->num_queue_pairs) {
7284 vsi->req_queue_pairs = queue_count;
7285 i40e_prep_for_reset(pf);
7287 pf->rss_size = new_rss_size;
7289 i40e_reset_and_rebuild(pf, true);
7290 i40e_config_rss(pf);
7292 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7293 return pf->rss_size;
7297 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7298 * @pf: board private structure
7300 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7303 bool min_valid, max_valid;
7306 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7307 &min_valid, &max_valid);
7311 pf->npar_min_bw = min_bw;
7313 pf->npar_max_bw = max_bw;
7320 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7321 * @pf: board private structure
7323 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7325 struct i40e_aqc_configure_partition_bw_data bw_data;
7328 /* Set the valid bit for this pf */
7329 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id);
7330 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7331 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7333 /* Set the new bandwidths */
7334 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7340 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7341 * @pf: board private structure
7343 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7345 /* Commit temporary BW setting to permanent NVM image */
7346 enum i40e_admin_queue_err last_aq_status;
7350 if (pf->hw.partition_id != 1) {
7351 dev_info(&pf->pdev->dev,
7352 "Commit BW only works on partition 1! This is partition %d",
7353 pf->hw.partition_id);
7354 ret = I40E_NOT_SUPPORTED;
7358 /* Acquire NVM for read access */
7359 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7360 last_aq_status = pf->hw.aq.asq_last_status;
7362 dev_info(&pf->pdev->dev,
7363 "Cannot acquire NVM for read access, err %d: aq_err %d\n",
7364 ret, last_aq_status);
7368 /* Read word 0x10 of NVM - SW compatibility word 1 */
7369 ret = i40e_aq_read_nvm(&pf->hw,
7370 I40E_SR_NVM_CONTROL_WORD,
7371 0x10, sizeof(nvm_word), &nvm_word,
7373 /* Save off last admin queue command status before releasing
7376 last_aq_status = pf->hw.aq.asq_last_status;
7377 i40e_release_nvm(&pf->hw);
7379 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n",
7380 ret, last_aq_status);
7384 /* Wait a bit for NVM release to complete */
7387 /* Acquire NVM for write access */
7388 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7389 last_aq_status = pf->hw.aq.asq_last_status;
7391 dev_info(&pf->pdev->dev,
7392 "Cannot acquire NVM for write access, err %d: aq_err %d\n",
7393 ret, last_aq_status);
7396 /* Write it back out unchanged to initiate update NVM,
7397 * which will force a write of the shadow (alt) RAM to
7398 * the NVM - thus storing the bandwidth values permanently.
7400 ret = i40e_aq_update_nvm(&pf->hw,
7401 I40E_SR_NVM_CONTROL_WORD,
7402 0x10, sizeof(nvm_word),
7403 &nvm_word, true, NULL);
7404 /* Save off last admin queue command status before releasing
7407 last_aq_status = pf->hw.aq.asq_last_status;
7408 i40e_release_nvm(&pf->hw);
7410 dev_info(&pf->pdev->dev,
7411 "BW settings NOT SAVED, err %d aq_err %d\n",
7412 ret, last_aq_status);
7419 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7420 * @pf: board private structure to initialize
7422 * i40e_sw_init initializes the Adapter private data structure.
7423 * Fields are initialized based on PCI device information and
7424 * OS network device settings (MTU size).
7426 static int i40e_sw_init(struct i40e_pf *pf)
7431 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7432 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7433 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7434 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7435 if (I40E_DEBUG_USER & debug)
7436 pf->hw.debug_mask = debug;
7437 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7438 I40E_DEFAULT_MSG_ENABLE);
7441 /* Set default capability flags */
7442 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7443 I40E_FLAG_MSI_ENABLED |
7444 I40E_FLAG_MSIX_ENABLED;
7446 if (iommu_present(&pci_bus_type))
7447 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7449 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7451 /* Set default ITR */
7452 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7453 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7455 /* Depending on PF configurations, it is possible that the RSS
7456 * maximum might end up larger than the available queues
7458 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7460 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7461 pf->rss_size_max = min_t(int, pf->rss_size_max,
7462 pf->hw.func_caps.num_tx_qp);
7463 if (pf->hw.func_caps.rss) {
7464 pf->flags |= I40E_FLAG_RSS_ENABLED;
7465 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7468 /* MFP mode enabled */
7469 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7470 pf->flags |= I40E_FLAG_MFP_ENABLED;
7471 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7472 if (i40e_get_npar_bw_setting(pf))
7473 dev_warn(&pf->pdev->dev,
7474 "Could not get NPAR bw settings\n");
7476 dev_info(&pf->pdev->dev,
7477 "Min BW = %8.8x, Max BW = %8.8x\n",
7478 pf->npar_min_bw, pf->npar_max_bw);
7481 /* FW/NVM is not yet fixed in this regard */
7482 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7483 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7484 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7485 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7486 /* Setup a counter for fd_atr per pf */
7487 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7488 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7489 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7490 /* Setup a counter for fd_sb per pf */
7491 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7493 dev_info(&pf->pdev->dev,
7494 "Flow Director Sideband mode Disabled in MFP mode\n");
7496 pf->fdir_pf_filter_count =
7497 pf->hw.func_caps.fd_filters_guaranteed;
7498 pf->hw.fdir_shared_filter_count =
7499 pf->hw.func_caps.fd_filters_best_effort;
7502 if (pf->hw.func_caps.vmdq) {
7503 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7504 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7505 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7509 err = i40e_init_pf_fcoe(pf);
7511 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7513 #endif /* I40E_FCOE */
7514 #ifdef CONFIG_PCI_IOV
7515 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7516 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7517 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7518 pf->num_req_vfs = min_t(int,
7519 pf->hw.func_caps.num_vfs,
7522 #endif /* CONFIG_PCI_IOV */
7523 pf->eeprom_version = 0xDEAD;
7524 pf->lan_veb = I40E_NO_VEB;
7525 pf->lan_vsi = I40E_NO_VSI;
7527 /* set up queue assignment tracking */
7528 size = sizeof(struct i40e_lump_tracking)
7529 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7530 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7535 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7536 pf->qp_pile->search_hint = 0;
7538 /* set up vector assignment tracking */
7539 size = sizeof(struct i40e_lump_tracking)
7540 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
7541 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7542 if (!pf->irq_pile) {
7547 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
7548 pf->irq_pile->search_hint = 0;
7550 pf->tx_timeout_recovery_level = 1;
7552 mutex_init(&pf->switch_mutex);
7559 * i40e_set_ntuple - set the ntuple feature flag and take action
7560 * @pf: board private structure to initialize
7561 * @features: the feature set that the stack is suggesting
7563 * returns a bool to indicate if reset needs to happen
7565 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7567 bool need_reset = false;
7569 /* Check if Flow Director n-tuple support was enabled or disabled. If
7570 * the state changed, we need to reset.
7572 if (features & NETIF_F_NTUPLE) {
7573 /* Enable filters and mark for reset */
7574 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7576 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7578 /* turn off filters, mark for reset and clear SW filter list */
7579 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7581 i40e_fdir_filter_exit(pf);
7583 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7584 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7585 /* reset fd counters */
7586 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7587 pf->fdir_pf_active_filters = 0;
7588 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7589 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7590 /* if ATR was auto disabled it can be re-enabled. */
7591 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7592 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7593 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7599 * i40e_set_features - set the netdev feature flags
7600 * @netdev: ptr to the netdev being adjusted
7601 * @features: the feature set that the stack is suggesting
7603 static int i40e_set_features(struct net_device *netdev,
7604 netdev_features_t features)
7606 struct i40e_netdev_priv *np = netdev_priv(netdev);
7607 struct i40e_vsi *vsi = np->vsi;
7608 struct i40e_pf *pf = vsi->back;
7611 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7612 i40e_vlan_stripping_enable(vsi);
7614 i40e_vlan_stripping_disable(vsi);
7616 need_reset = i40e_set_ntuple(pf, features);
7619 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7624 #ifdef CONFIG_I40E_VXLAN
7626 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7627 * @pf: board private structure
7628 * @port: The UDP port to look up
7630 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7632 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7636 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7637 if (pf->vxlan_ports[i] == port)
7645 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7646 * @netdev: This physical port's netdev
7647 * @sa_family: Socket Family that VXLAN is notifying us about
7648 * @port: New UDP port number that VXLAN started listening to
7650 static void i40e_add_vxlan_port(struct net_device *netdev,
7651 sa_family_t sa_family, __be16 port)
7653 struct i40e_netdev_priv *np = netdev_priv(netdev);
7654 struct i40e_vsi *vsi = np->vsi;
7655 struct i40e_pf *pf = vsi->back;
7659 if (sa_family == AF_INET6)
7662 idx = i40e_get_vxlan_port_idx(pf, port);
7664 /* Check if port already exists */
7665 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7666 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7670 /* Now check if there is space to add the new port */
7671 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7673 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7674 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7679 /* New port: add it and mark its index in the bitmap */
7680 pf->vxlan_ports[next_idx] = port;
7681 pf->pending_vxlan_bitmap |= (1 << next_idx);
7683 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7687 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7688 * @netdev: This physical port's netdev
7689 * @sa_family: Socket Family that VXLAN is notifying us about
7690 * @port: UDP port number that VXLAN stopped listening to
7692 static void i40e_del_vxlan_port(struct net_device *netdev,
7693 sa_family_t sa_family, __be16 port)
7695 struct i40e_netdev_priv *np = netdev_priv(netdev);
7696 struct i40e_vsi *vsi = np->vsi;
7697 struct i40e_pf *pf = vsi->back;
7700 if (sa_family == AF_INET6)
7703 idx = i40e_get_vxlan_port_idx(pf, port);
7705 /* Check if port already exists */
7706 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7707 /* if port exists, set it to 0 (mark for deletion)
7708 * and make it pending
7710 pf->vxlan_ports[idx] = 0;
7712 pf->pending_vxlan_bitmap |= (1 << idx);
7714 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7716 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7722 static int i40e_get_phys_port_id(struct net_device *netdev,
7723 struct netdev_phys_item_id *ppid)
7725 struct i40e_netdev_priv *np = netdev_priv(netdev);
7726 struct i40e_pf *pf = np->vsi->back;
7727 struct i40e_hw *hw = &pf->hw;
7729 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7732 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7733 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7739 * i40e_ndo_fdb_add - add an entry to the hardware database
7740 * @ndm: the input from the stack
7741 * @tb: pointer to array of nladdr (unused)
7742 * @dev: the net device pointer
7743 * @addr: the MAC address entry being added
7744 * @flags: instructions from stack about fdb operation
7746 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7747 struct net_device *dev,
7748 const unsigned char *addr, u16 vid,
7751 struct i40e_netdev_priv *np = netdev_priv(dev);
7752 struct i40e_pf *pf = np->vsi->back;
7755 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7759 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
7763 /* Hardware does not support aging addresses so if a
7764 * ndm_state is given only allow permanent addresses
7766 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7767 netdev_info(dev, "FDB only supports static addresses\n");
7771 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7772 err = dev_uc_add_excl(dev, addr);
7773 else if (is_multicast_ether_addr(addr))
7774 err = dev_mc_add_excl(dev, addr);
7778 /* Only return duplicate errors if NLM_F_EXCL is set */
7779 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7785 #ifdef HAVE_BRIDGE_ATTRIBS
7787 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
7788 * @dev: the netdev being configured
7789 * @nlh: RTNL message
7791 * Inserts a new hardware bridge if not already created and
7792 * enables the bridging mode requested (VEB or VEPA). If the
7793 * hardware bridge has already been inserted and the request
7794 * is to change the mode then that requires a PF reset to
7795 * allow rebuild of the components with required hardware
7796 * bridge mode enabled.
7798 static int i40e_ndo_bridge_setlink(struct net_device *dev,
7799 struct nlmsghdr *nlh)
7801 struct i40e_netdev_priv *np = netdev_priv(dev);
7802 struct i40e_vsi *vsi = np->vsi;
7803 struct i40e_pf *pf = vsi->back;
7804 struct i40e_veb *veb = NULL;
7805 struct nlattr *attr, *br_spec;
7808 /* Only for PF VSI for now */
7809 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7812 /* Find the HW bridge for PF VSI */
7813 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7814 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7818 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7820 nla_for_each_nested(attr, br_spec, rem) {
7823 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7826 mode = nla_get_u16(attr);
7827 if ((mode != BRIDGE_MODE_VEPA) &&
7828 (mode != BRIDGE_MODE_VEB))
7831 /* Insert a new HW bridge */
7833 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7834 vsi->tc_config.enabled_tc);
7836 veb->bridge_mode = mode;
7837 i40e_config_bridge_mode(veb);
7839 /* No Bridge HW offload available */
7843 } else if (mode != veb->bridge_mode) {
7844 /* Existing HW bridge but different mode needs reset */
7845 veb->bridge_mode = mode;
7846 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7855 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
7858 * @seq: RTNL message seq #
7859 * @dev: the netdev being configured
7860 * @filter_mask: unused
7862 * Return the mode in which the hardware bridge is operating in
7865 #ifdef HAVE_BRIDGE_FILTER
7866 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7867 struct net_device *dev,
7868 u32 __always_unused filter_mask)
7870 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7871 struct net_device *dev)
7872 #endif /* HAVE_BRIDGE_FILTER */
7874 struct i40e_netdev_priv *np = netdev_priv(dev);
7875 struct i40e_vsi *vsi = np->vsi;
7876 struct i40e_pf *pf = vsi->back;
7877 struct i40e_veb *veb = NULL;
7880 /* Only for PF VSI for now */
7881 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7884 /* Find the HW bridge for the PF VSI */
7885 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7886 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7893 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode);
7895 #endif /* HAVE_BRIDGE_ATTRIBS */
7897 const struct net_device_ops i40e_netdev_ops = {
7898 .ndo_open = i40e_open,
7899 .ndo_stop = i40e_close,
7900 .ndo_start_xmit = i40e_lan_xmit_frame,
7901 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7902 .ndo_set_rx_mode = i40e_set_rx_mode,
7903 .ndo_validate_addr = eth_validate_addr,
7904 .ndo_set_mac_address = i40e_set_mac,
7905 .ndo_change_mtu = i40e_change_mtu,
7906 .ndo_do_ioctl = i40e_ioctl,
7907 .ndo_tx_timeout = i40e_tx_timeout,
7908 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7909 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7910 #ifdef CONFIG_NET_POLL_CONTROLLER
7911 .ndo_poll_controller = i40e_netpoll,
7913 .ndo_setup_tc = i40e_setup_tc,
7915 .ndo_fcoe_enable = i40e_fcoe_enable,
7916 .ndo_fcoe_disable = i40e_fcoe_disable,
7918 .ndo_set_features = i40e_set_features,
7919 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7920 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7921 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7922 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7923 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7924 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7925 #ifdef CONFIG_I40E_VXLAN
7926 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7927 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7929 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7930 .ndo_fdb_add = i40e_ndo_fdb_add,
7931 #ifdef HAVE_BRIDGE_ATTRIBS
7932 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
7933 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
7934 #endif /* HAVE_BRIDGE_ATTRIBS */
7938 * i40e_config_netdev - Setup the netdev flags
7939 * @vsi: the VSI being configured
7941 * Returns 0 on success, negative value on failure
7943 static int i40e_config_netdev(struct i40e_vsi *vsi)
7945 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7946 struct i40e_pf *pf = vsi->back;
7947 struct i40e_hw *hw = &pf->hw;
7948 struct i40e_netdev_priv *np;
7949 struct net_device *netdev;
7950 u8 mac_addr[ETH_ALEN];
7953 etherdev_size = sizeof(struct i40e_netdev_priv);
7954 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7958 vsi->netdev = netdev;
7959 np = netdev_priv(netdev);
7962 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7963 NETIF_F_GSO_UDP_TUNNEL |
7966 netdev->features = NETIF_F_SG |
7970 NETIF_F_GSO_UDP_TUNNEL |
7971 NETIF_F_HW_VLAN_CTAG_TX |
7972 NETIF_F_HW_VLAN_CTAG_RX |
7973 NETIF_F_HW_VLAN_CTAG_FILTER |
7982 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7983 netdev->features |= NETIF_F_NTUPLE;
7985 /* copy netdev features into list of user selectable features */
7986 netdev->hw_features |= netdev->features;
7988 if (vsi->type == I40E_VSI_MAIN) {
7989 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7990 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7991 /* The following steps are necessary to prevent reception
7992 * of tagged packets - some older NVM configurations load a
7993 * default a MAC-VLAN filter that accepts any tagged packet
7994 * which must be replaced by a normal filter.
7996 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
7997 i40e_add_filter(vsi, mac_addr,
7998 I40E_VLAN_ANY, false, true);
8000 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8001 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8002 pf->vsi[pf->lan_vsi]->netdev->name);
8003 random_ether_addr(mac_addr);
8004 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8006 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8008 ether_addr_copy(netdev->dev_addr, mac_addr);
8009 ether_addr_copy(netdev->perm_addr, mac_addr);
8010 /* vlan gets same features (except vlan offload)
8011 * after any tweaks for specific VSI types
8013 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8014 NETIF_F_HW_VLAN_CTAG_RX |
8015 NETIF_F_HW_VLAN_CTAG_FILTER);
8016 netdev->priv_flags |= IFF_UNICAST_FLT;
8017 netdev->priv_flags |= IFF_SUPP_NOFCS;
8018 /* Setup netdev TC information */
8019 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8021 netdev->netdev_ops = &i40e_netdev_ops;
8022 netdev->watchdog_timeo = 5 * HZ;
8023 i40e_set_ethtool_ops(netdev);
8025 i40e_fcoe_config_netdev(netdev, vsi);
8032 * i40e_vsi_delete - Delete a VSI from the switch
8033 * @vsi: the VSI being removed
8035 * Returns 0 on success, negative value on failure
8037 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8039 /* remove default VSI is not allowed */
8040 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8043 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8047 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8048 * @vsi: the VSI being queried
8050 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8052 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8054 struct i40e_veb *veb;
8055 struct i40e_pf *pf = vsi->back;
8057 /* Uplink is not a bridge so default to VEB */
8058 if (vsi->veb_idx == I40E_NO_VEB)
8061 veb = pf->veb[vsi->veb_idx];
8062 /* Uplink is a bridge in VEPA mode */
8063 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8066 /* Uplink is a bridge in VEB mode */
8071 * i40e_add_vsi - Add a VSI to the switch
8072 * @vsi: the VSI being configured
8074 * This initializes a VSI context depending on the VSI type to be added and
8075 * passes it down to the add_vsi aq command.
8077 static int i40e_add_vsi(struct i40e_vsi *vsi)
8080 struct i40e_mac_filter *f, *ftmp;
8081 struct i40e_pf *pf = vsi->back;
8082 struct i40e_hw *hw = &pf->hw;
8083 struct i40e_vsi_context ctxt;
8084 u8 enabled_tc = 0x1; /* TC0 enabled */
8087 memset(&ctxt, 0, sizeof(ctxt));
8088 switch (vsi->type) {
8090 /* The PF's main VSI is already setup as part of the
8091 * device initialization, so we'll not bother with
8092 * the add_vsi call, but we will retrieve the current
8095 ctxt.seid = pf->main_vsi_seid;
8096 ctxt.pf_num = pf->hw.pf_id;
8098 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8099 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8101 dev_info(&pf->pdev->dev,
8102 "couldn't get pf vsi config, err %d, aq_err %d\n",
8103 ret, pf->hw.aq.asq_last_status);
8106 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8107 vsi->info.valid_sections = 0;
8109 vsi->seid = ctxt.seid;
8110 vsi->id = ctxt.vsi_number;
8112 enabled_tc = i40e_pf_get_tc_map(pf);
8114 /* MFP mode setup queue map and update VSI */
8115 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8116 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8117 memset(&ctxt, 0, sizeof(ctxt));
8118 ctxt.seid = pf->main_vsi_seid;
8119 ctxt.pf_num = pf->hw.pf_id;
8121 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8122 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8124 dev_info(&pf->pdev->dev,
8125 "update vsi failed, aq_err=%d\n",
8126 pf->hw.aq.asq_last_status);
8130 /* update the local VSI info queue map */
8131 i40e_vsi_update_queue_map(vsi, &ctxt);
8132 vsi->info.valid_sections = 0;
8134 /* Default/Main VSI is only enabled for TC0
8135 * reconfigure it to enable all TCs that are
8136 * available on the port in SFP mode.
8137 * For MFP case the iSCSI PF would use this
8138 * flow to enable LAN+iSCSI TC.
8140 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8142 dev_info(&pf->pdev->dev,
8143 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
8145 pf->hw.aq.asq_last_status);
8152 ctxt.pf_num = hw->pf_id;
8154 ctxt.uplink_seid = vsi->uplink_seid;
8155 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8156 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8157 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8158 ctxt.info.valid_sections |=
8159 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8160 ctxt.info.switch_id =
8161 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8163 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8166 case I40E_VSI_VMDQ2:
8167 ctxt.pf_num = hw->pf_id;
8169 ctxt.uplink_seid = vsi->uplink_seid;
8170 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8171 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8173 /* This VSI is connected to VEB so the switch_id
8174 * should be set to zero by default.
8176 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8177 ctxt.info.valid_sections |=
8178 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8179 ctxt.info.switch_id =
8180 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8183 /* Setup the VSI tx/rx queue map for TC0 only for now */
8184 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8187 case I40E_VSI_SRIOV:
8188 ctxt.pf_num = hw->pf_id;
8189 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8190 ctxt.uplink_seid = vsi->uplink_seid;
8191 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8192 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8194 /* This VSI is connected to VEB so the switch_id
8195 * should be set to zero by default.
8197 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8198 ctxt.info.valid_sections |=
8199 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8200 ctxt.info.switch_id =
8201 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8204 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8205 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8206 if (pf->vf[vsi->vf_id].spoofchk) {
8207 ctxt.info.valid_sections |=
8208 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8209 ctxt.info.sec_flags |=
8210 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8211 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8213 /* Setup the VSI tx/rx queue map for TC0 only for now */
8214 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8219 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8221 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8226 #endif /* I40E_FCOE */
8231 if (vsi->type != I40E_VSI_MAIN) {
8232 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8234 dev_info(&vsi->back->pdev->dev,
8235 "add vsi failed, aq_err=%d\n",
8236 vsi->back->hw.aq.asq_last_status);
8240 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8241 vsi->info.valid_sections = 0;
8242 vsi->seid = ctxt.seid;
8243 vsi->id = ctxt.vsi_number;
8246 /* If macvlan filters already exist, force them to get loaded */
8247 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8251 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8252 struct i40e_aqc_remove_macvlan_element_data element;
8254 memset(&element, 0, sizeof(element));
8255 ether_addr_copy(element.mac_addr, f->macaddr);
8256 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8257 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8260 /* some older FW has a different default */
8262 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8263 i40e_aq_remove_macvlan(hw, vsi->seid,
8267 i40e_aq_mac_address_write(hw,
8268 I40E_AQC_WRITE_TYPE_LAA_WOL,
8273 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8274 pf->flags |= I40E_FLAG_FILTER_SYNC;
8277 /* Update VSI BW information */
8278 ret = i40e_vsi_get_bw_info(vsi);
8280 dev_info(&pf->pdev->dev,
8281 "couldn't get vsi bw info, err %d, aq_err %d\n",
8282 ret, pf->hw.aq.asq_last_status);
8283 /* VSI is already added so not tearing that up */
8292 * i40e_vsi_release - Delete a VSI and free its resources
8293 * @vsi: the VSI being removed
8295 * Returns 0 on success or < 0 on error
8297 int i40e_vsi_release(struct i40e_vsi *vsi)
8299 struct i40e_mac_filter *f, *ftmp;
8300 struct i40e_veb *veb = NULL;
8307 /* release of a VEB-owner or last VSI is not allowed */
8308 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8309 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8310 vsi->seid, vsi->uplink_seid);
8313 if (vsi == pf->vsi[pf->lan_vsi] &&
8314 !test_bit(__I40E_DOWN, &pf->state)) {
8315 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8319 uplink_seid = vsi->uplink_seid;
8320 if (vsi->type != I40E_VSI_SRIOV) {
8321 if (vsi->netdev_registered) {
8322 vsi->netdev_registered = false;
8324 /* results in a call to i40e_close() */
8325 unregister_netdev(vsi->netdev);
8328 i40e_vsi_close(vsi);
8330 i40e_vsi_disable_irq(vsi);
8333 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8334 i40e_del_filter(vsi, f->macaddr, f->vlan,
8335 f->is_vf, f->is_netdev);
8336 i40e_sync_vsi_filters(vsi);
8338 i40e_vsi_delete(vsi);
8339 i40e_vsi_free_q_vectors(vsi);
8341 free_netdev(vsi->netdev);
8344 i40e_vsi_clear_rings(vsi);
8345 i40e_vsi_clear(vsi);
8347 /* If this was the last thing on the VEB, except for the
8348 * controlling VSI, remove the VEB, which puts the controlling
8349 * VSI onto the next level down in the switch.
8351 * Well, okay, there's one more exception here: don't remove
8352 * the orphan VEBs yet. We'll wait for an explicit remove request
8353 * from up the network stack.
8355 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8357 pf->vsi[i]->uplink_seid == uplink_seid &&
8358 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8359 n++; /* count the VSIs */
8362 for (i = 0; i < I40E_MAX_VEB; i++) {
8365 if (pf->veb[i]->uplink_seid == uplink_seid)
8366 n++; /* count the VEBs */
8367 if (pf->veb[i]->seid == uplink_seid)
8370 if (n == 0 && veb && veb->uplink_seid != 0)
8371 i40e_veb_release(veb);
8377 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8378 * @vsi: ptr to the VSI
8380 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8381 * corresponding SW VSI structure and initializes num_queue_pairs for the
8382 * newly allocated VSI.
8384 * Returns 0 on success or negative on failure
8386 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8389 struct i40e_pf *pf = vsi->back;
8391 if (vsi->q_vectors[0]) {
8392 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8397 if (vsi->base_vector) {
8398 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8399 vsi->seid, vsi->base_vector);
8403 ret = i40e_vsi_alloc_q_vectors(vsi);
8405 dev_info(&pf->pdev->dev,
8406 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8407 vsi->num_q_vectors, vsi->seid, ret);
8408 vsi->num_q_vectors = 0;
8409 goto vector_setup_out;
8412 if (vsi->num_q_vectors)
8413 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8414 vsi->num_q_vectors, vsi->idx);
8415 if (vsi->base_vector < 0) {
8416 dev_info(&pf->pdev->dev,
8417 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8418 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8419 i40e_vsi_free_q_vectors(vsi);
8421 goto vector_setup_out;
8429 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8430 * @vsi: pointer to the vsi.
8432 * This re-allocates a vsi's queue resources.
8434 * Returns pointer to the successfully allocated and configured VSI sw struct
8435 * on success, otherwise returns NULL on failure.
8437 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8439 struct i40e_pf *pf = vsi->back;
8443 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8444 i40e_vsi_clear_rings(vsi);
8446 i40e_vsi_free_arrays(vsi, false);
8447 i40e_set_num_rings_in_vsi(vsi);
8448 ret = i40e_vsi_alloc_arrays(vsi, false);
8452 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8454 dev_info(&pf->pdev->dev,
8455 "failed to get tracking for %d queues for VSI %d err=%d\n",
8456 vsi->alloc_queue_pairs, vsi->seid, ret);
8459 vsi->base_queue = ret;
8461 /* Update the FW view of the VSI. Force a reset of TC and queue
8462 * layout configurations.
8464 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8465 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8466 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8467 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8469 /* assign it some queues */
8470 ret = i40e_alloc_rings(vsi);
8474 /* map all of the rings to the q_vectors */
8475 i40e_vsi_map_rings_to_vectors(vsi);
8479 i40e_vsi_free_q_vectors(vsi);
8480 if (vsi->netdev_registered) {
8481 vsi->netdev_registered = false;
8482 unregister_netdev(vsi->netdev);
8483 free_netdev(vsi->netdev);
8486 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8488 i40e_vsi_clear(vsi);
8493 * i40e_vsi_setup - Set up a VSI by a given type
8494 * @pf: board private structure
8496 * @uplink_seid: the switch element to link to
8497 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8499 * This allocates the sw VSI structure and its queue resources, then add a VSI
8500 * to the identified VEB.
8502 * Returns pointer to the successfully allocated and configure VSI sw struct on
8503 * success, otherwise returns NULL on failure.
8505 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8506 u16 uplink_seid, u32 param1)
8508 struct i40e_vsi *vsi = NULL;
8509 struct i40e_veb *veb = NULL;
8513 /* The requested uplink_seid must be either
8514 * - the PF's port seid
8515 * no VEB is needed because this is the PF
8516 * or this is a Flow Director special case VSI
8517 * - seid of an existing VEB
8518 * - seid of a VSI that owns an existing VEB
8519 * - seid of a VSI that doesn't own a VEB
8520 * a new VEB is created and the VSI becomes the owner
8521 * - seid of the PF VSI, which is what creates the first VEB
8522 * this is a special case of the previous
8524 * Find which uplink_seid we were given and create a new VEB if needed
8526 for (i = 0; i < I40E_MAX_VEB; i++) {
8527 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8533 if (!veb && uplink_seid != pf->mac_seid) {
8535 for (i = 0; i < pf->num_alloc_vsi; i++) {
8536 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8542 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8547 if (vsi->uplink_seid == pf->mac_seid)
8548 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8549 vsi->tc_config.enabled_tc);
8550 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8551 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8552 vsi->tc_config.enabled_tc);
8554 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8555 dev_info(&vsi->back->pdev->dev,
8556 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8560 i40e_config_bridge_mode(veb);
8562 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8563 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8567 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8571 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8572 uplink_seid = veb->seid;
8575 /* get vsi sw struct */
8576 v_idx = i40e_vsi_mem_alloc(pf, type);
8579 vsi = pf->vsi[v_idx];
8583 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8585 if (type == I40E_VSI_MAIN)
8586 pf->lan_vsi = v_idx;
8587 else if (type == I40E_VSI_SRIOV)
8588 vsi->vf_id = param1;
8589 /* assign it some queues */
8590 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8593 dev_info(&pf->pdev->dev,
8594 "failed to get tracking for %d queues for VSI %d err=%d\n",
8595 vsi->alloc_queue_pairs, vsi->seid, ret);
8598 vsi->base_queue = ret;
8600 /* get a VSI from the hardware */
8601 vsi->uplink_seid = uplink_seid;
8602 ret = i40e_add_vsi(vsi);
8606 switch (vsi->type) {
8607 /* setup the netdev if needed */
8609 case I40E_VSI_VMDQ2:
8611 ret = i40e_config_netdev(vsi);
8614 ret = register_netdev(vsi->netdev);
8617 vsi->netdev_registered = true;
8618 netif_carrier_off(vsi->netdev);
8619 #ifdef CONFIG_I40E_DCB
8620 /* Setup DCB netlink interface */
8621 i40e_dcbnl_setup(vsi);
8622 #endif /* CONFIG_I40E_DCB */
8626 /* set up vectors and rings if needed */
8627 ret = i40e_vsi_setup_vectors(vsi);
8631 ret = i40e_alloc_rings(vsi);
8635 /* map all of the rings to the q_vectors */
8636 i40e_vsi_map_rings_to_vectors(vsi);
8638 i40e_vsi_reset_stats(vsi);
8642 /* no netdev or rings for the other VSI types */
8649 i40e_vsi_free_q_vectors(vsi);
8651 if (vsi->netdev_registered) {
8652 vsi->netdev_registered = false;
8653 unregister_netdev(vsi->netdev);
8654 free_netdev(vsi->netdev);
8658 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8660 i40e_vsi_clear(vsi);
8666 * i40e_veb_get_bw_info - Query VEB BW information
8667 * @veb: the veb to query
8669 * Query the Tx scheduler BW configuration data for given VEB
8671 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8673 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8674 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8675 struct i40e_pf *pf = veb->pf;
8676 struct i40e_hw *hw = &pf->hw;
8681 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8684 dev_info(&pf->pdev->dev,
8685 "query veb bw config failed, aq_err=%d\n",
8686 hw->aq.asq_last_status);
8690 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8693 dev_info(&pf->pdev->dev,
8694 "query veb bw ets config failed, aq_err=%d\n",
8695 hw->aq.asq_last_status);
8699 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8700 veb->bw_max_quanta = ets_data.tc_bw_max;
8701 veb->is_abs_credits = bw_data.absolute_credits_enable;
8702 veb->enabled_tc = ets_data.tc_valid_bits;
8703 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8704 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8705 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8706 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8707 veb->bw_tc_limit_credits[i] =
8708 le16_to_cpu(bw_data.tc_bw_limits[i]);
8709 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8717 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8718 * @pf: board private structure
8720 * On error: returns error code (negative)
8721 * On success: returns vsi index in PF (positive)
8723 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8726 struct i40e_veb *veb;
8729 /* Need to protect the allocation of switch elements at the PF level */
8730 mutex_lock(&pf->switch_mutex);
8732 /* VEB list may be fragmented if VEB creation/destruction has
8733 * been happening. We can afford to do a quick scan to look
8734 * for any free slots in the list.
8736 * find next empty veb slot, looping back around if necessary
8739 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8741 if (i >= I40E_MAX_VEB) {
8743 goto err_alloc_veb; /* out of VEB slots! */
8746 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8753 veb->enabled_tc = 1;
8758 mutex_unlock(&pf->switch_mutex);
8763 * i40e_switch_branch_release - Delete a branch of the switch tree
8764 * @branch: where to start deleting
8766 * This uses recursion to find the tips of the branch to be
8767 * removed, deleting until we get back to and can delete this VEB.
8769 static void i40e_switch_branch_release(struct i40e_veb *branch)
8771 struct i40e_pf *pf = branch->pf;
8772 u16 branch_seid = branch->seid;
8773 u16 veb_idx = branch->idx;
8776 /* release any VEBs on this VEB - RECURSION */
8777 for (i = 0; i < I40E_MAX_VEB; i++) {
8780 if (pf->veb[i]->uplink_seid == branch->seid)
8781 i40e_switch_branch_release(pf->veb[i]);
8784 /* Release the VSIs on this VEB, but not the owner VSI.
8786 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8787 * the VEB itself, so don't use (*branch) after this loop.
8789 for (i = 0; i < pf->num_alloc_vsi; i++) {
8792 if (pf->vsi[i]->uplink_seid == branch_seid &&
8793 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8794 i40e_vsi_release(pf->vsi[i]);
8798 /* There's one corner case where the VEB might not have been
8799 * removed, so double check it here and remove it if needed.
8800 * This case happens if the veb was created from the debugfs
8801 * commands and no VSIs were added to it.
8803 if (pf->veb[veb_idx])
8804 i40e_veb_release(pf->veb[veb_idx]);
8808 * i40e_veb_clear - remove veb struct
8809 * @veb: the veb to remove
8811 static void i40e_veb_clear(struct i40e_veb *veb)
8817 struct i40e_pf *pf = veb->pf;
8819 mutex_lock(&pf->switch_mutex);
8820 if (pf->veb[veb->idx] == veb)
8821 pf->veb[veb->idx] = NULL;
8822 mutex_unlock(&pf->switch_mutex);
8829 * i40e_veb_release - Delete a VEB and free its resources
8830 * @veb: the VEB being removed
8832 void i40e_veb_release(struct i40e_veb *veb)
8834 struct i40e_vsi *vsi = NULL;
8840 /* find the remaining VSI and check for extras */
8841 for (i = 0; i < pf->num_alloc_vsi; i++) {
8842 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8848 dev_info(&pf->pdev->dev,
8849 "can't remove VEB %d with %d VSIs left\n",
8854 /* move the remaining VSI to uplink veb */
8855 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8856 if (veb->uplink_seid) {
8857 vsi->uplink_seid = veb->uplink_seid;
8858 if (veb->uplink_seid == pf->mac_seid)
8859 vsi->veb_idx = I40E_NO_VEB;
8861 vsi->veb_idx = veb->veb_idx;
8864 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8865 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8868 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8869 i40e_veb_clear(veb);
8873 * i40e_add_veb - create the VEB in the switch
8874 * @veb: the VEB to be instantiated
8875 * @vsi: the controlling VSI
8877 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8879 bool is_default = false;
8880 bool is_cloud = false;
8883 /* get a VEB from the hardware */
8884 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8885 veb->enabled_tc, is_default,
8886 is_cloud, &veb->seid, NULL);
8888 dev_info(&veb->pf->pdev->dev,
8889 "couldn't add VEB, err %d, aq_err %d\n",
8890 ret, veb->pf->hw.aq.asq_last_status);
8894 /* get statistics counter */
8895 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8896 &veb->stats_idx, NULL, NULL, NULL);
8898 dev_info(&veb->pf->pdev->dev,
8899 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8900 ret, veb->pf->hw.aq.asq_last_status);
8903 ret = i40e_veb_get_bw_info(veb);
8905 dev_info(&veb->pf->pdev->dev,
8906 "couldn't get VEB bw info, err %d, aq_err %d\n",
8907 ret, veb->pf->hw.aq.asq_last_status);
8908 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8912 vsi->uplink_seid = veb->seid;
8913 vsi->veb_idx = veb->idx;
8914 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8920 * i40e_veb_setup - Set up a VEB
8921 * @pf: board private structure
8922 * @flags: VEB setup flags
8923 * @uplink_seid: the switch element to link to
8924 * @vsi_seid: the initial VSI seid
8925 * @enabled_tc: Enabled TC bit-map
8927 * This allocates the sw VEB structure and links it into the switch
8928 * It is possible and legal for this to be a duplicate of an already
8929 * existing VEB. It is also possible for both uplink and vsi seids
8930 * to be zero, in order to create a floating VEB.
8932 * Returns pointer to the successfully allocated VEB sw struct on
8933 * success, otherwise returns NULL on failure.
8935 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8936 u16 uplink_seid, u16 vsi_seid,
8939 struct i40e_veb *veb, *uplink_veb = NULL;
8940 int vsi_idx, veb_idx;
8943 /* if one seid is 0, the other must be 0 to create a floating relay */
8944 if ((uplink_seid == 0 || vsi_seid == 0) &&
8945 (uplink_seid + vsi_seid != 0)) {
8946 dev_info(&pf->pdev->dev,
8947 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8948 uplink_seid, vsi_seid);
8952 /* make sure there is such a vsi and uplink */
8953 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8954 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8956 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8957 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8962 if (uplink_seid && uplink_seid != pf->mac_seid) {
8963 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8964 if (pf->veb[veb_idx] &&
8965 pf->veb[veb_idx]->seid == uplink_seid) {
8966 uplink_veb = pf->veb[veb_idx];
8971 dev_info(&pf->pdev->dev,
8972 "uplink seid %d not found\n", uplink_seid);
8977 /* get veb sw struct */
8978 veb_idx = i40e_veb_mem_alloc(pf);
8981 veb = pf->veb[veb_idx];
8983 veb->uplink_seid = uplink_seid;
8984 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8985 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8987 /* create the VEB in the switch */
8988 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8991 if (vsi_idx == pf->lan_vsi)
8992 pf->lan_veb = veb->idx;
8997 i40e_veb_clear(veb);
9003 * i40e_setup_pf_switch_element - set pf vars based on switch type
9004 * @pf: board private structure
9005 * @ele: element we are building info from
9006 * @num_reported: total number of elements
9007 * @printconfig: should we print the contents
9009 * helper function to assist in extracting a few useful SEID values.
9011 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9012 struct i40e_aqc_switch_config_element_resp *ele,
9013 u16 num_reported, bool printconfig)
9015 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9016 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9017 u8 element_type = ele->element_type;
9018 u16 seid = le16_to_cpu(ele->seid);
9021 dev_info(&pf->pdev->dev,
9022 "type=%d seid=%d uplink=%d downlink=%d\n",
9023 element_type, seid, uplink_seid, downlink_seid);
9025 switch (element_type) {
9026 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9027 pf->mac_seid = seid;
9029 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9031 if (uplink_seid != pf->mac_seid)
9033 if (pf->lan_veb == I40E_NO_VEB) {
9036 /* find existing or else empty VEB */
9037 for (v = 0; v < I40E_MAX_VEB; v++) {
9038 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9043 if (pf->lan_veb == I40E_NO_VEB) {
9044 v = i40e_veb_mem_alloc(pf);
9051 pf->veb[pf->lan_veb]->seid = seid;
9052 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9053 pf->veb[pf->lan_veb]->pf = pf;
9054 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9056 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9057 if (num_reported != 1)
9059 /* This is immediately after a reset so we can assume this is
9062 pf->mac_seid = uplink_seid;
9063 pf->pf_seid = downlink_seid;
9064 pf->main_vsi_seid = seid;
9066 dev_info(&pf->pdev->dev,
9067 "pf_seid=%d main_vsi_seid=%d\n",
9068 pf->pf_seid, pf->main_vsi_seid);
9070 case I40E_SWITCH_ELEMENT_TYPE_PF:
9071 case I40E_SWITCH_ELEMENT_TYPE_VF:
9072 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9073 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9074 case I40E_SWITCH_ELEMENT_TYPE_PE:
9075 case I40E_SWITCH_ELEMENT_TYPE_PA:
9076 /* ignore these for now */
9079 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9080 element_type, seid);
9086 * i40e_fetch_switch_configuration - Get switch config from firmware
9087 * @pf: board private structure
9088 * @printconfig: should we print the contents
9090 * Get the current switch configuration from the device and
9091 * extract a few useful SEID values.
9093 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9095 struct i40e_aqc_get_switch_config_resp *sw_config;
9101 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9105 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9107 u16 num_reported, num_total;
9109 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9113 dev_info(&pf->pdev->dev,
9114 "get switch config failed %d aq_err=%x\n",
9115 ret, pf->hw.aq.asq_last_status);
9120 num_reported = le16_to_cpu(sw_config->header.num_reported);
9121 num_total = le16_to_cpu(sw_config->header.num_total);
9124 dev_info(&pf->pdev->dev,
9125 "header: %d reported %d total\n",
9126 num_reported, num_total);
9128 for (i = 0; i < num_reported; i++) {
9129 struct i40e_aqc_switch_config_element_resp *ele =
9130 &sw_config->element[i];
9132 i40e_setup_pf_switch_element(pf, ele, num_reported,
9135 } while (next_seid != 0);
9142 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9143 * @pf: board private structure
9144 * @reinit: if the Main VSI needs to re-initialized.
9146 * Returns 0 on success, negative value on failure
9148 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9152 /* find out what's out there already */
9153 ret = i40e_fetch_switch_configuration(pf, false);
9155 dev_info(&pf->pdev->dev,
9156 "couldn't fetch switch config, err %d, aq_err %d\n",
9157 ret, pf->hw.aq.asq_last_status);
9160 i40e_pf_reset_stats(pf);
9162 /* first time setup */
9163 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9164 struct i40e_vsi *vsi = NULL;
9167 /* Set up the PF VSI associated with the PF's main VSI
9168 * that is already in the HW switch
9170 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9171 uplink_seid = pf->veb[pf->lan_veb]->seid;
9173 uplink_seid = pf->mac_seid;
9174 if (pf->lan_vsi == I40E_NO_VSI)
9175 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9177 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9179 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9180 i40e_fdir_teardown(pf);
9184 /* force a reset of TC and queue layout configurations */
9185 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9186 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9187 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9188 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9190 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9192 i40e_fdir_sb_setup(pf);
9194 /* Setup static PF queue filter control settings */
9195 ret = i40e_setup_pf_filter_control(pf);
9197 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9199 /* Failure here should not stop continuing other steps */
9202 /* enable RSS in the HW, even for only one queue, as the stack can use
9205 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9206 i40e_config_rss(pf);
9208 /* fill in link information and enable LSE reporting */
9209 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9210 i40e_link_event(pf);
9212 /* Initialize user-specific link properties */
9213 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9214 I40E_AQ_AN_COMPLETED) ? true : false);
9216 /* fill in link information and enable LSE reporting */
9217 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9218 i40e_link_event(pf);
9220 /* Initialize user-specific link properties */
9221 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9222 I40E_AQ_AN_COMPLETED) ? true : false);
9230 * i40e_determine_queue_usage - Work out queue distribution
9231 * @pf: board private structure
9233 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9237 pf->num_lan_qps = 0;
9239 pf->num_fcoe_qps = 0;
9242 /* Find the max queues to be put into basic use. We'll always be
9243 * using TC0, whether or not DCB is running, and TC0 will get the
9246 queues_left = pf->hw.func_caps.num_tx_qp;
9248 if ((queues_left == 1) ||
9249 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9250 /* one qp for PF, no queues for anything else */
9252 pf->rss_size = pf->num_lan_qps = 1;
9254 /* make sure all the fancies are disabled */
9255 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9257 I40E_FLAG_FCOE_ENABLED |
9259 I40E_FLAG_FD_SB_ENABLED |
9260 I40E_FLAG_FD_ATR_ENABLED |
9261 I40E_FLAG_DCB_CAPABLE |
9262 I40E_FLAG_SRIOV_ENABLED |
9263 I40E_FLAG_VMDQ_ENABLED);
9264 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9265 I40E_FLAG_FD_SB_ENABLED |
9266 I40E_FLAG_FD_ATR_ENABLED |
9267 I40E_FLAG_DCB_CAPABLE))) {
9269 pf->rss_size = pf->num_lan_qps = 1;
9270 queues_left -= pf->num_lan_qps;
9272 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9274 I40E_FLAG_FCOE_ENABLED |
9276 I40E_FLAG_FD_SB_ENABLED |
9277 I40E_FLAG_FD_ATR_ENABLED |
9278 I40E_FLAG_DCB_ENABLED |
9279 I40E_FLAG_VMDQ_ENABLED);
9281 /* Not enough queues for all TCs */
9282 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9283 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9284 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9285 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9287 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9289 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9290 pf->hw.func_caps.num_tx_qp);
9292 queues_left -= pf->num_lan_qps;
9296 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9297 if (I40E_DEFAULT_FCOE <= queues_left) {
9298 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9299 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9300 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9302 pf->num_fcoe_qps = 0;
9303 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9304 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9307 queues_left -= pf->num_fcoe_qps;
9311 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9312 if (queues_left > 1) {
9313 queues_left -= 1; /* save 1 queue for FD */
9315 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9316 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9320 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9321 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9322 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9323 (queues_left / pf->num_vf_qps));
9324 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9327 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9328 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9329 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9330 (queues_left / pf->num_vmdq_qps));
9331 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9334 pf->queues_left = queues_left;
9336 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9341 * i40e_setup_pf_filter_control - Setup PF static filter control
9342 * @pf: PF to be setup
9344 * i40e_setup_pf_filter_control sets up a pf's initial filter control
9345 * settings. If PE/FCoE are enabled then it will also set the per PF
9346 * based filter sizes required for them. It also enables Flow director,
9347 * ethertype and macvlan type filter settings for the pf.
9349 * Returns 0 on success, negative on failure
9351 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9353 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9355 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9357 /* Flow Director is enabled */
9358 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9359 settings->enable_fdir = true;
9361 /* Ethtype and MACVLAN filters enabled for PF */
9362 settings->enable_ethtype = true;
9363 settings->enable_macvlan = true;
9365 if (i40e_set_filter_control(&pf->hw, settings))
9371 #define INFO_STRING_LEN 255
9372 static void i40e_print_features(struct i40e_pf *pf)
9374 struct i40e_hw *hw = &pf->hw;
9377 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9379 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9385 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9386 #ifdef CONFIG_PCI_IOV
9387 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9389 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9390 pf->hw.func_caps.num_vsis,
9391 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9392 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9394 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9395 buf += sprintf(buf, "RSS ");
9396 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9397 buf += sprintf(buf, "FD_ATR ");
9398 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9399 buf += sprintf(buf, "FD_SB ");
9400 buf += sprintf(buf, "NTUPLE ");
9402 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9403 buf += sprintf(buf, "DCB ");
9404 if (pf->flags & I40E_FLAG_PTP)
9405 buf += sprintf(buf, "PTP ");
9407 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9408 buf += sprintf(buf, "FCOE ");
9411 BUG_ON(buf > (string + INFO_STRING_LEN));
9412 dev_info(&pf->pdev->dev, "%s\n", string);
9417 * i40e_probe - Device initialization routine
9418 * @pdev: PCI device information struct
9419 * @ent: entry in i40e_pci_tbl
9421 * i40e_probe initializes a pf identified by a pci_dev structure.
9422 * The OS initialization, configuring of the pf private structure,
9423 * and a hardware reset occur.
9425 * Returns 0 on success, negative on failure
9427 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9429 struct i40e_aq_get_phy_abilities_resp abilities;
9432 static u16 pfs_found;
9438 err = pci_enable_device_mem(pdev);
9442 /* set up for high or low dma */
9443 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9445 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9448 "DMA configuration failed: 0x%x\n", err);
9453 /* set up pci connections */
9454 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9455 IORESOURCE_MEM), i40e_driver_name);
9457 dev_info(&pdev->dev,
9458 "pci_request_selected_regions failed %d\n", err);
9462 pci_enable_pcie_error_reporting(pdev);
9463 pci_set_master(pdev);
9465 /* Now that we have a PCI connection, we need to do the
9466 * low level device setup. This is primarily setting up
9467 * the Admin Queue structures and then querying for the
9468 * device's current profile information.
9470 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9477 set_bit(__I40E_DOWN, &pf->state);
9481 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9482 pci_resource_len(pdev, 0));
9485 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9486 (unsigned int)pci_resource_start(pdev, 0),
9487 (unsigned int)pci_resource_len(pdev, 0), err);
9490 hw->vendor_id = pdev->vendor;
9491 hw->device_id = pdev->device;
9492 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9493 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9494 hw->subsystem_device_id = pdev->subsystem_device;
9495 hw->bus.device = PCI_SLOT(pdev->devfn);
9496 hw->bus.func = PCI_FUNC(pdev->devfn);
9497 pf->instance = pfs_found;
9500 pf->msg_enable = pf->hw.debug_mask;
9501 pf->msg_enable = debug;
9504 /* do a special CORER for clearing PXE mode once at init */
9505 if (hw->revision_id == 0 &&
9506 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9507 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9512 i40e_clear_pxe_mode(hw);
9515 /* Reset here to make sure all is clean and to define PF 'n' */
9517 err = i40e_pf_reset(hw);
9519 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9524 hw->aq.num_arq_entries = I40E_AQ_LEN;
9525 hw->aq.num_asq_entries = I40E_AQ_LEN;
9526 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9527 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9528 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9530 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9532 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9534 err = i40e_init_shared_code(hw);
9536 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9540 /* set up a default setting for link flow control */
9541 pf->hw.fc.requested_mode = I40E_FC_NONE;
9543 err = i40e_init_adminq(hw);
9544 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9546 dev_info(&pdev->dev,
9547 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9551 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9552 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9553 dev_info(&pdev->dev,
9554 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9555 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9556 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9557 dev_info(&pdev->dev,
9558 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9561 i40e_verify_eeprom(pf);
9563 /* Rev 0 hardware was never productized */
9564 if (hw->revision_id < 1)
9565 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9567 i40e_clear_pxe_mode(hw);
9568 err = i40e_get_capabilities(pf);
9570 goto err_adminq_setup;
9572 err = i40e_sw_init(pf);
9574 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9578 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9579 hw->func_caps.num_rx_qp,
9580 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9582 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9583 goto err_init_lan_hmc;
9586 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9588 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9590 goto err_configure_lan_hmc;
9593 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
9594 * Ignore error return codes because if it was already disabled via
9595 * hardware settings this will fail
9597 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
9598 (pf->hw.aq.fw_maj_ver < 4)) {
9599 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
9600 i40e_aq_stop_lldp(hw, true, NULL);
9603 i40e_get_mac_addr(hw, hw->mac.addr);
9604 if (!is_valid_ether_addr(hw->mac.addr)) {
9605 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9609 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9610 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9611 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9612 if (is_valid_ether_addr(hw->mac.port_addr))
9613 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9615 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9617 dev_info(&pdev->dev,
9618 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9619 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9620 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9622 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9624 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9625 #endif /* I40E_FCOE */
9627 pci_set_drvdata(pdev, pf);
9628 pci_save_state(pdev);
9629 #ifdef CONFIG_I40E_DCB
9630 err = i40e_init_pf_dcb(pf);
9632 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
9633 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9634 /* Continue without DCB enabled */
9636 #endif /* CONFIG_I40E_DCB */
9638 /* set up periodic task facility */
9639 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9640 pf->service_timer_period = HZ;
9642 INIT_WORK(&pf->service_task, i40e_service_task);
9643 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9644 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9645 pf->link_check_timeout = jiffies;
9647 /* WoL defaults to disabled */
9649 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9651 /* set up the main switch operations */
9652 i40e_determine_queue_usage(pf);
9653 i40e_init_interrupt_scheme(pf);
9655 /* The number of VSIs reported by the FW is the minimum guaranteed
9656 * to us; HW supports far more and we share the remaining pool with
9657 * the other PFs. We allocate space for more than the guarantee with
9658 * the understanding that we might not get them all later.
9660 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9661 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9663 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9665 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9666 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9667 pf->vsi = kzalloc(len, GFP_KERNEL);
9670 goto err_switch_setup;
9673 err = i40e_setup_pf_switch(pf, false);
9675 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9678 /* if FDIR VSI was set up, start it now */
9679 for (i = 0; i < pf->num_alloc_vsi; i++) {
9680 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9681 i40e_vsi_open(pf->vsi[i]);
9686 /* driver is only interested in link up/down and module qualification
9687 * reports from firmware
9689 err = i40e_aq_set_phy_int_mask(&pf->hw,
9690 I40E_AQ_EVENT_LINK_UPDOWN |
9691 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9693 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9695 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
9696 (pf->hw.aq.fw_maj_ver < 4)) {
9698 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9700 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9701 pf->hw.aq.asq_last_status);
9703 /* The main driver is (mostly) up and happy. We need to set this state
9704 * before setting up the misc vector or we get a race and the vector
9705 * ends up disabled forever.
9707 clear_bit(__I40E_DOWN, &pf->state);
9709 /* In case of MSIX we are going to setup the misc vector right here
9710 * to handle admin queue events etc. In case of legacy and MSI
9711 * the misc functionality and queue processing is combined in
9712 * the same vector and that gets setup at open.
9714 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9715 err = i40e_setup_misc_vector(pf);
9717 dev_info(&pdev->dev,
9718 "setup of misc vector failed: %d\n", err);
9723 #ifdef CONFIG_PCI_IOV
9724 /* prep for VF support */
9725 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9726 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9727 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9730 /* disable link interrupts for VFs */
9731 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9732 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9733 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9736 if (pci_num_vf(pdev)) {
9737 dev_info(&pdev->dev,
9738 "Active VFs found, allocating resources.\n");
9739 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9741 dev_info(&pdev->dev,
9742 "Error %d allocating resources for existing VFs\n",
9746 #endif /* CONFIG_PCI_IOV */
9750 i40e_dbg_pf_init(pf);
9752 /* tell the firmware that we're starting */
9753 i40e_send_version(pf);
9755 /* since everything's happy, start the service_task timer */
9756 mod_timer(&pf->service_timer,
9757 round_jiffies(jiffies + pf->service_timer_period));
9760 /* create FCoE interface */
9761 i40e_fcoe_vsi_setup(pf);
9764 /* Get the negotiated link width and speed from PCI config space */
9765 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9767 i40e_set_pci_config_data(hw, link_status);
9769 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9770 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9771 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9772 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9774 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9775 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9776 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9777 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9780 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9781 hw->bus.speed < i40e_bus_speed_8000) {
9782 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9783 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9786 /* get the requested speeds from the fw */
9787 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
9789 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n",
9791 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
9793 /* print a string summarizing features */
9794 i40e_print_features(pf);
9798 /* Unwind what we've done if something failed in the setup */
9800 set_bit(__I40E_DOWN, &pf->state);
9801 i40e_clear_interrupt_scheme(pf);
9804 i40e_reset_interrupt_capability(pf);
9805 del_timer_sync(&pf->service_timer);
9807 err_configure_lan_hmc:
9808 (void)i40e_shutdown_lan_hmc(hw);
9811 kfree(pf->irq_pile);
9814 (void)i40e_shutdown_adminq(hw);
9816 iounmap(hw->hw_addr);
9820 pci_disable_pcie_error_reporting(pdev);
9821 pci_release_selected_regions(pdev,
9822 pci_select_bars(pdev, IORESOURCE_MEM));
9825 pci_disable_device(pdev);
9830 * i40e_remove - Device removal routine
9831 * @pdev: PCI device information struct
9833 * i40e_remove is called by the PCI subsystem to alert the driver
9834 * that is should release a PCI device. This could be caused by a
9835 * Hot-Plug event, or because the driver is going to be removed from
9838 static void i40e_remove(struct pci_dev *pdev)
9840 struct i40e_pf *pf = pci_get_drvdata(pdev);
9841 i40e_status ret_code;
9844 i40e_dbg_pf_exit(pf);
9848 /* no more scheduling of any task */
9849 set_bit(__I40E_DOWN, &pf->state);
9850 del_timer_sync(&pf->service_timer);
9851 cancel_work_sync(&pf->service_task);
9853 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9855 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9858 i40e_fdir_teardown(pf);
9860 /* If there is a switch structure or any orphans, remove them.
9861 * This will leave only the PF's VSI remaining.
9863 for (i = 0; i < I40E_MAX_VEB; i++) {
9867 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9868 pf->veb[i]->uplink_seid == 0)
9869 i40e_switch_branch_release(pf->veb[i]);
9872 /* Now we can shutdown the PF's VSI, just before we kill
9875 if (pf->vsi[pf->lan_vsi])
9876 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9878 i40e_stop_misc_vector(pf);
9879 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9880 synchronize_irq(pf->msix_entries[0].vector);
9881 free_irq(pf->msix_entries[0].vector, pf);
9884 /* shutdown and destroy the HMC */
9885 if (pf->hw.hmc.hmc_obj) {
9886 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9888 dev_warn(&pdev->dev,
9889 "Failed to destroy the HMC resources: %d\n",
9893 /* shutdown the adminq */
9894 ret_code = i40e_shutdown_adminq(&pf->hw);
9896 dev_warn(&pdev->dev,
9897 "Failed to destroy the Admin Queue resources: %d\n",
9900 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9901 i40e_clear_interrupt_scheme(pf);
9902 for (i = 0; i < pf->num_alloc_vsi; i++) {
9904 i40e_vsi_clear_rings(pf->vsi[i]);
9905 i40e_vsi_clear(pf->vsi[i]);
9910 for (i = 0; i < I40E_MAX_VEB; i++) {
9916 kfree(pf->irq_pile);
9919 iounmap(pf->hw.hw_addr);
9921 pci_release_selected_regions(pdev,
9922 pci_select_bars(pdev, IORESOURCE_MEM));
9924 pci_disable_pcie_error_reporting(pdev);
9925 pci_disable_device(pdev);
9929 * i40e_pci_error_detected - warning that something funky happened in PCI land
9930 * @pdev: PCI device information struct
9932 * Called to warn that something happened and the error handling steps
9933 * are in progress. Allows the driver to quiesce things, be ready for
9936 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9937 enum pci_channel_state error)
9939 struct i40e_pf *pf = pci_get_drvdata(pdev);
9941 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9943 /* shutdown all operations */
9944 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9946 i40e_prep_for_reset(pf);
9950 /* Request a slot reset */
9951 return PCI_ERS_RESULT_NEED_RESET;
9955 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9956 * @pdev: PCI device information struct
9958 * Called to find if the driver can work with the device now that
9959 * the pci slot has been reset. If a basic connection seems good
9960 * (registers are readable and have sane content) then return a
9961 * happy little PCI_ERS_RESULT_xxx.
9963 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9965 struct i40e_pf *pf = pci_get_drvdata(pdev);
9966 pci_ers_result_t result;
9970 dev_info(&pdev->dev, "%s\n", __func__);
9971 if (pci_enable_device_mem(pdev)) {
9972 dev_info(&pdev->dev,
9973 "Cannot re-enable PCI device after reset.\n");
9974 result = PCI_ERS_RESULT_DISCONNECT;
9976 pci_set_master(pdev);
9977 pci_restore_state(pdev);
9978 pci_save_state(pdev);
9979 pci_wake_from_d3(pdev, false);
9981 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9983 result = PCI_ERS_RESULT_RECOVERED;
9985 result = PCI_ERS_RESULT_DISCONNECT;
9988 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9990 dev_info(&pdev->dev,
9991 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9993 /* non-fatal, continue */
10000 * i40e_pci_error_resume - restart operations after PCI error recovery
10001 * @pdev: PCI device information struct
10003 * Called to allow the driver to bring things back up after PCI error
10004 * and/or reset recovery has finished.
10006 static void i40e_pci_error_resume(struct pci_dev *pdev)
10008 struct i40e_pf *pf = pci_get_drvdata(pdev);
10010 dev_info(&pdev->dev, "%s\n", __func__);
10011 if (test_bit(__I40E_SUSPENDED, &pf->state))
10015 i40e_handle_reset_warning(pf);
10020 * i40e_shutdown - PCI callback for shutting down
10021 * @pdev: PCI device information struct
10023 static void i40e_shutdown(struct pci_dev *pdev)
10025 struct i40e_pf *pf = pci_get_drvdata(pdev);
10026 struct i40e_hw *hw = &pf->hw;
10028 set_bit(__I40E_SUSPENDED, &pf->state);
10029 set_bit(__I40E_DOWN, &pf->state);
10031 i40e_prep_for_reset(pf);
10034 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10035 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10037 if (system_state == SYSTEM_POWER_OFF) {
10038 pci_wake_from_d3(pdev, pf->wol_en);
10039 pci_set_power_state(pdev, PCI_D3hot);
10045 * i40e_suspend - PCI callback for moving to D3
10046 * @pdev: PCI device information struct
10048 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10050 struct i40e_pf *pf = pci_get_drvdata(pdev);
10051 struct i40e_hw *hw = &pf->hw;
10053 set_bit(__I40E_SUSPENDED, &pf->state);
10054 set_bit(__I40E_DOWN, &pf->state);
10055 del_timer_sync(&pf->service_timer);
10056 cancel_work_sync(&pf->service_task);
10058 i40e_prep_for_reset(pf);
10061 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10062 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10064 pci_wake_from_d3(pdev, pf->wol_en);
10065 pci_set_power_state(pdev, PCI_D3hot);
10071 * i40e_resume - PCI callback for waking up from D3
10072 * @pdev: PCI device information struct
10074 static int i40e_resume(struct pci_dev *pdev)
10076 struct i40e_pf *pf = pci_get_drvdata(pdev);
10079 pci_set_power_state(pdev, PCI_D0);
10080 pci_restore_state(pdev);
10081 /* pci_restore_state() clears dev->state_saves, so
10082 * call pci_save_state() again to restore it.
10084 pci_save_state(pdev);
10086 err = pci_enable_device_mem(pdev);
10088 dev_err(&pdev->dev,
10089 "%s: Cannot enable PCI device from suspend\n",
10093 pci_set_master(pdev);
10095 /* no wakeup events while running */
10096 pci_wake_from_d3(pdev, false);
10098 /* handling the reset will rebuild the device state */
10099 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10100 clear_bit(__I40E_DOWN, &pf->state);
10102 i40e_reset_and_rebuild(pf, false);
10110 static const struct pci_error_handlers i40e_err_handler = {
10111 .error_detected = i40e_pci_error_detected,
10112 .slot_reset = i40e_pci_error_slot_reset,
10113 .resume = i40e_pci_error_resume,
10116 static struct pci_driver i40e_driver = {
10117 .name = i40e_driver_name,
10118 .id_table = i40e_pci_tbl,
10119 .probe = i40e_probe,
10120 .remove = i40e_remove,
10122 .suspend = i40e_suspend,
10123 .resume = i40e_resume,
10125 .shutdown = i40e_shutdown,
10126 .err_handler = &i40e_err_handler,
10127 .sriov_configure = i40e_pci_sriov_configure,
10131 * i40e_init_module - Driver registration routine
10133 * i40e_init_module is the first routine called when the driver is
10134 * loaded. All it does is register with the PCI subsystem.
10136 static int __init i40e_init_module(void)
10138 pr_info("%s: %s - version %s\n", i40e_driver_name,
10139 i40e_driver_string, i40e_driver_version_str);
10140 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10142 #if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
10143 i40e_configfs_init();
10144 #endif /* CONFIG_I40E_CONFIGFS_FS */
10146 return pci_register_driver(&i40e_driver);
10148 module_init(i40e_init_module);
10151 * i40e_exit_module - Driver exit cleanup routine
10153 * i40e_exit_module is called just before the driver is removed
10156 static void __exit i40e_exit_module(void)
10158 pci_unregister_driver(&i40e_driver);
10160 #if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
10161 i40e_configfs_exit();
10162 #endif /* CONFIG_I40E_CONFIGFS_FS */
10164 module_exit(i40e_exit_module);