1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35 /* All i40e tracepoints are defined by the include below, which
36 * must be included exactly once across the whole kernel with
37 * CREATE_TRACE_POINTS defined
39 #define CREATE_TRACE_POINTS
40 #include "i40e_trace.h"
42 const char i40e_driver_name[] = "i40e";
43 static const char i40e_driver_string[] =
44 "Intel(R) Ethernet Connection XL710 Network Driver";
48 #define DRV_VERSION_MAJOR 2
49 #define DRV_VERSION_MINOR 1
50 #define DRV_VERSION_BUILD 7
51 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
52 __stringify(DRV_VERSION_MINOR) "." \
53 __stringify(DRV_VERSION_BUILD) DRV_KERN
54 const char i40e_driver_version_str[] = DRV_VERSION;
55 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
57 /* a bit of forward declarations */
58 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
59 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
60 static int i40e_add_vsi(struct i40e_vsi *vsi);
61 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
62 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
63 static int i40e_setup_misc_vector(struct i40e_pf *pf);
64 static void i40e_determine_queue_usage(struct i40e_pf *pf);
65 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
66 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired);
67 static int i40e_reset(struct i40e_pf *pf);
68 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
69 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
70 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
72 /* i40e_pci_tbl - PCI Device ID Table
74 * Last entry must be all 0s
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
79 static const struct pci_device_id i40e_pci_tbl[] = {
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
98 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
99 /* required last entry */
102 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
104 #define I40E_MAX_VF_COUNT 128
105 static int debug = -1;
106 module_param(debug, uint, 0);
107 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
109 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
110 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
111 MODULE_LICENSE("GPL");
112 MODULE_VERSION(DRV_VERSION);
114 static struct workqueue_struct *i40e_wq;
117 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
118 * @hw: pointer to the HW structure
119 * @mem: ptr to mem struct to fill out
120 * @size: size of memory requested
121 * @alignment: what to align the allocation to
123 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
124 u64 size, u32 alignment)
126 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
128 mem->size = ALIGN(size, alignment);
129 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
130 &mem->pa, GFP_KERNEL);
138 * i40e_free_dma_mem_d - OS specific memory free for shared code
139 * @hw: pointer to the HW structure
140 * @mem: ptr to mem struct to free
142 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
144 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
146 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
155 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
156 * @hw: pointer to the HW structure
157 * @mem: ptr to mem struct to fill out
158 * @size: size of memory requested
160 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
164 mem->va = kzalloc(size, GFP_KERNEL);
173 * i40e_free_virt_mem_d - OS specific memory free for shared code
174 * @hw: pointer to the HW structure
175 * @mem: ptr to mem struct to free
177 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
179 /* it's ok to kfree a NULL pointer */
188 * i40e_get_lump - find a lump of free generic resource
189 * @pf: board private structure
190 * @pile: the pile of resource to search
191 * @needed: the number of items needed
192 * @id: an owner id to stick on the items assigned
194 * Returns the base item index of the lump, or negative for error
196 * The search_hint trick and lack of advanced fit-finding only work
197 * because we're highly likely to have all the same size lump requests.
198 * Linear search time and any fragmentation should be minimal.
200 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
206 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
207 dev_info(&pf->pdev->dev,
208 "param err: pile=%p needed=%d id=0x%04x\n",
213 /* start the linear search with an imperfect hint */
214 i = pile->search_hint;
215 while (i < pile->num_entries) {
216 /* skip already allocated entries */
217 if (pile->list[i] & I40E_PILE_VALID_BIT) {
222 /* do we have enough in this lump? */
223 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
224 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
229 /* there was enough, so assign it to the requestor */
230 for (j = 0; j < needed; j++)
231 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
233 pile->search_hint = i + j;
237 /* not enough, so skip over it and continue looking */
245 * i40e_put_lump - return a lump of generic resource
246 * @pile: the pile of resource to search
247 * @index: the base item index
248 * @id: the owner id of the items assigned
250 * Returns the count of items in the lump
252 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
254 int valid_id = (id | I40E_PILE_VALID_BIT);
258 if (!pile || index >= pile->num_entries)
262 i < pile->num_entries && pile->list[i] == valid_id;
268 if (count && index < pile->search_hint)
269 pile->search_hint = index;
275 * i40e_find_vsi_from_id - searches for the vsi with the given id
276 * @pf - the pf structure to search for the vsi
277 * @id - id of the vsi it is searching for
279 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
283 for (i = 0; i < pf->num_alloc_vsi; i++)
284 if (pf->vsi[i] && (pf->vsi[i]->id == id))
291 * i40e_service_event_schedule - Schedule the service task to wake up
292 * @pf: board private structure
294 * If not already scheduled, this puts the task into the work queue
296 void i40e_service_event_schedule(struct i40e_pf *pf)
298 if (!test_bit(__I40E_DOWN, &pf->state) &&
299 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
300 queue_work(i40e_wq, &pf->service_task);
304 * i40e_tx_timeout - Respond to a Tx Hang
305 * @netdev: network interface device structure
307 * If any port has noticed a Tx timeout, it is likely that the whole
308 * device is munged, not just the one netdev port, so go for the full
311 static void i40e_tx_timeout(struct net_device *netdev)
313 struct i40e_netdev_priv *np = netdev_priv(netdev);
314 struct i40e_vsi *vsi = np->vsi;
315 struct i40e_pf *pf = vsi->back;
316 struct i40e_ring *tx_ring = NULL;
317 unsigned int i, hung_queue = 0;
320 pf->tx_timeout_count++;
322 /* find the stopped queue the same way the stack does */
323 for (i = 0; i < netdev->num_tx_queues; i++) {
324 struct netdev_queue *q;
325 unsigned long trans_start;
327 q = netdev_get_tx_queue(netdev, i);
328 trans_start = q->trans_start;
329 if (netif_xmit_stopped(q) &&
331 (trans_start + netdev->watchdog_timeo))) {
337 if (i == netdev->num_tx_queues) {
338 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
340 /* now that we have an index, find the tx_ring struct */
341 for (i = 0; i < vsi->num_queue_pairs; i++) {
342 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
344 vsi->tx_rings[i]->queue_index) {
345 tx_ring = vsi->tx_rings[i];
352 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
353 pf->tx_timeout_recovery_level = 1; /* reset after some time */
354 else if (time_before(jiffies,
355 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
356 return; /* don't do any new action before the next timeout */
359 head = i40e_get_head(tx_ring);
360 /* Read interrupt register */
361 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
363 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
364 tx_ring->vsi->base_vector - 1));
366 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
368 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
369 vsi->seid, hung_queue, tx_ring->next_to_clean,
370 head, tx_ring->next_to_use,
371 readl(tx_ring->tail), val);
374 pf->tx_timeout_last_recovery = jiffies;
375 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
376 pf->tx_timeout_recovery_level, hung_queue);
378 switch (pf->tx_timeout_recovery_level) {
380 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
383 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
386 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
389 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
393 i40e_service_event_schedule(pf);
394 pf->tx_timeout_recovery_level++;
398 * i40e_get_vsi_stats_struct - Get System Network Statistics
399 * @vsi: the VSI we care about
401 * Returns the address of the device statistics structure.
402 * The statistics are actually updated from the service task.
404 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
406 return &vsi->net_stats;
410 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
411 * @netdev: network interface device structure
413 * Returns the address of the device statistics structure.
414 * The statistics are actually updated from the service task.
416 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
417 struct rtnl_link_stats64 *stats)
419 struct i40e_netdev_priv *np = netdev_priv(netdev);
420 struct i40e_ring *tx_ring, *rx_ring;
421 struct i40e_vsi *vsi = np->vsi;
422 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
425 if (test_bit(__I40E_DOWN, &vsi->state))
432 for (i = 0; i < vsi->num_queue_pairs; i++) {
436 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
441 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
442 packets = tx_ring->stats.packets;
443 bytes = tx_ring->stats.bytes;
444 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
446 stats->tx_packets += packets;
447 stats->tx_bytes += bytes;
448 rx_ring = &tx_ring[1];
451 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
452 packets = rx_ring->stats.packets;
453 bytes = rx_ring->stats.bytes;
454 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
456 stats->rx_packets += packets;
457 stats->rx_bytes += bytes;
461 /* following stats updated by i40e_watchdog_subtask() */
462 stats->multicast = vsi_stats->multicast;
463 stats->tx_errors = vsi_stats->tx_errors;
464 stats->tx_dropped = vsi_stats->tx_dropped;
465 stats->rx_errors = vsi_stats->rx_errors;
466 stats->rx_dropped = vsi_stats->rx_dropped;
467 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
468 stats->rx_length_errors = vsi_stats->rx_length_errors;
472 * i40e_vsi_reset_stats - Resets all stats of the given vsi
473 * @vsi: the VSI to have its stats reset
475 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
477 struct rtnl_link_stats64 *ns;
483 ns = i40e_get_vsi_stats_struct(vsi);
484 memset(ns, 0, sizeof(*ns));
485 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
486 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
487 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
488 if (vsi->rx_rings && vsi->rx_rings[0]) {
489 for (i = 0; i < vsi->num_queue_pairs; i++) {
490 memset(&vsi->rx_rings[i]->stats, 0,
491 sizeof(vsi->rx_rings[i]->stats));
492 memset(&vsi->rx_rings[i]->rx_stats, 0,
493 sizeof(vsi->rx_rings[i]->rx_stats));
494 memset(&vsi->tx_rings[i]->stats, 0,
495 sizeof(vsi->tx_rings[i]->stats));
496 memset(&vsi->tx_rings[i]->tx_stats, 0,
497 sizeof(vsi->tx_rings[i]->tx_stats));
500 vsi->stat_offsets_loaded = false;
504 * i40e_pf_reset_stats - Reset all of the stats for the given PF
505 * @pf: the PF to be reset
507 void i40e_pf_reset_stats(struct i40e_pf *pf)
511 memset(&pf->stats, 0, sizeof(pf->stats));
512 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
513 pf->stat_offsets_loaded = false;
515 for (i = 0; i < I40E_MAX_VEB; i++) {
517 memset(&pf->veb[i]->stats, 0,
518 sizeof(pf->veb[i]->stats));
519 memset(&pf->veb[i]->stats_offsets, 0,
520 sizeof(pf->veb[i]->stats_offsets));
521 pf->veb[i]->stat_offsets_loaded = false;
524 pf->hw_csum_rx_error = 0;
528 * i40e_stat_update48 - read and update a 48 bit stat from the chip
529 * @hw: ptr to the hardware info
530 * @hireg: the high 32 bit reg to read
531 * @loreg: the low 32 bit reg to read
532 * @offset_loaded: has the initial offset been loaded yet
533 * @offset: ptr to current offset value
534 * @stat: ptr to the stat
536 * Since the device stats are not reset at PFReset, they likely will not
537 * be zeroed when the driver starts. We'll save the first values read
538 * and use them as offsets to be subtracted from the raw values in order
539 * to report stats that count from zero. In the process, we also manage
540 * the potential roll-over.
542 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
543 bool offset_loaded, u64 *offset, u64 *stat)
547 if (hw->device_id == I40E_DEV_ID_QEMU) {
548 new_data = rd32(hw, loreg);
549 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
551 new_data = rd64(hw, loreg);
555 if (likely(new_data >= *offset))
556 *stat = new_data - *offset;
558 *stat = (new_data + BIT_ULL(48)) - *offset;
559 *stat &= 0xFFFFFFFFFFFFULL;
563 * i40e_stat_update32 - read and update a 32 bit stat from the chip
564 * @hw: ptr to the hardware info
565 * @reg: the hw reg to read
566 * @offset_loaded: has the initial offset been loaded yet
567 * @offset: ptr to current offset value
568 * @stat: ptr to the stat
570 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
571 bool offset_loaded, u64 *offset, u64 *stat)
575 new_data = rd32(hw, reg);
578 if (likely(new_data >= *offset))
579 *stat = (u32)(new_data - *offset);
581 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
585 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
586 * @vsi: the VSI to be updated
588 void i40e_update_eth_stats(struct i40e_vsi *vsi)
590 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
591 struct i40e_pf *pf = vsi->back;
592 struct i40e_hw *hw = &pf->hw;
593 struct i40e_eth_stats *oes;
594 struct i40e_eth_stats *es; /* device's eth stats */
596 es = &vsi->eth_stats;
597 oes = &vsi->eth_stats_offsets;
599 /* Gather up the stats that the hw collects */
600 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
601 vsi->stat_offsets_loaded,
602 &oes->tx_errors, &es->tx_errors);
603 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
604 vsi->stat_offsets_loaded,
605 &oes->rx_discards, &es->rx_discards);
606 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
607 vsi->stat_offsets_loaded,
608 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
609 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
610 vsi->stat_offsets_loaded,
611 &oes->tx_errors, &es->tx_errors);
613 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
614 I40E_GLV_GORCL(stat_idx),
615 vsi->stat_offsets_loaded,
616 &oes->rx_bytes, &es->rx_bytes);
617 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
618 I40E_GLV_UPRCL(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_unicast, &es->rx_unicast);
621 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
622 I40E_GLV_MPRCL(stat_idx),
623 vsi->stat_offsets_loaded,
624 &oes->rx_multicast, &es->rx_multicast);
625 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
626 I40E_GLV_BPRCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_broadcast, &es->rx_broadcast);
630 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
631 I40E_GLV_GOTCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->tx_bytes, &es->tx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
635 I40E_GLV_UPTCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_unicast, &es->tx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
639 I40E_GLV_MPTCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->tx_multicast, &es->tx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
643 I40E_GLV_BPTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_broadcast, &es->tx_broadcast);
646 vsi->stat_offsets_loaded = true;
650 * i40e_update_veb_stats - Update Switch component statistics
651 * @veb: the VEB being updated
653 static void i40e_update_veb_stats(struct i40e_veb *veb)
655 struct i40e_pf *pf = veb->pf;
656 struct i40e_hw *hw = &pf->hw;
657 struct i40e_eth_stats *oes;
658 struct i40e_eth_stats *es; /* device's eth stats */
659 struct i40e_veb_tc_stats *veb_oes;
660 struct i40e_veb_tc_stats *veb_es;
663 idx = veb->stats_idx;
665 oes = &veb->stats_offsets;
666 veb_es = &veb->tc_stats;
667 veb_oes = &veb->tc_stats_offsets;
669 /* Gather up the stats that the hw collects */
670 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
671 veb->stat_offsets_loaded,
672 &oes->tx_discards, &es->tx_discards);
673 if (hw->revision_id > 0)
674 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
675 veb->stat_offsets_loaded,
676 &oes->rx_unknown_protocol,
677 &es->rx_unknown_protocol);
678 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
679 veb->stat_offsets_loaded,
680 &oes->rx_bytes, &es->rx_bytes);
681 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
682 veb->stat_offsets_loaded,
683 &oes->rx_unicast, &es->rx_unicast);
684 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
685 veb->stat_offsets_loaded,
686 &oes->rx_multicast, &es->rx_multicast);
687 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
688 veb->stat_offsets_loaded,
689 &oes->rx_broadcast, &es->rx_broadcast);
691 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
692 veb->stat_offsets_loaded,
693 &oes->tx_bytes, &es->tx_bytes);
694 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
695 veb->stat_offsets_loaded,
696 &oes->tx_unicast, &es->tx_unicast);
697 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
698 veb->stat_offsets_loaded,
699 &oes->tx_multicast, &es->tx_multicast);
700 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
701 veb->stat_offsets_loaded,
702 &oes->tx_broadcast, &es->tx_broadcast);
703 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
704 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
705 I40E_GLVEBTC_RPCL(i, idx),
706 veb->stat_offsets_loaded,
707 &veb_oes->tc_rx_packets[i],
708 &veb_es->tc_rx_packets[i]);
709 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
710 I40E_GLVEBTC_RBCL(i, idx),
711 veb->stat_offsets_loaded,
712 &veb_oes->tc_rx_bytes[i],
713 &veb_es->tc_rx_bytes[i]);
714 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
715 I40E_GLVEBTC_TPCL(i, idx),
716 veb->stat_offsets_loaded,
717 &veb_oes->tc_tx_packets[i],
718 &veb_es->tc_tx_packets[i]);
719 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
720 I40E_GLVEBTC_TBCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_tx_bytes[i],
723 &veb_es->tc_tx_bytes[i]);
725 veb->stat_offsets_loaded = true;
729 * i40e_update_vsi_stats - Update the vsi statistics counters.
730 * @vsi: the VSI to be updated
732 * There are a few instances where we store the same stat in a
733 * couple of different structs. This is partly because we have
734 * the netdev stats that need to be filled out, which is slightly
735 * different from the "eth_stats" defined by the chip and used in
736 * VF communications. We sort it out here.
738 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
740 struct i40e_pf *pf = vsi->back;
741 struct rtnl_link_stats64 *ons;
742 struct rtnl_link_stats64 *ns; /* netdev stats */
743 struct i40e_eth_stats *oes;
744 struct i40e_eth_stats *es; /* device's eth stats */
745 u32 tx_restart, tx_busy;
756 if (test_bit(__I40E_DOWN, &vsi->state) ||
757 test_bit(__I40E_CONFIG_BUSY, &pf->state))
760 ns = i40e_get_vsi_stats_struct(vsi);
761 ons = &vsi->net_stats_offsets;
762 es = &vsi->eth_stats;
763 oes = &vsi->eth_stats_offsets;
765 /* Gather up the netdev and vsi stats that the driver collects
766 * on the fly during packet processing
770 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
774 for (q = 0; q < vsi->num_queue_pairs; q++) {
776 p = ACCESS_ONCE(vsi->tx_rings[q]);
779 start = u64_stats_fetch_begin_irq(&p->syncp);
780 packets = p->stats.packets;
781 bytes = p->stats.bytes;
782 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
785 tx_restart += p->tx_stats.restart_queue;
786 tx_busy += p->tx_stats.tx_busy;
787 tx_linearize += p->tx_stats.tx_linearize;
788 tx_force_wb += p->tx_stats.tx_force_wb;
790 /* Rx queue is part of the same block as Tx queue */
793 start = u64_stats_fetch_begin_irq(&p->syncp);
794 packets = p->stats.packets;
795 bytes = p->stats.bytes;
796 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
799 rx_buf += p->rx_stats.alloc_buff_failed;
800 rx_page += p->rx_stats.alloc_page_failed;
803 vsi->tx_restart = tx_restart;
804 vsi->tx_busy = tx_busy;
805 vsi->tx_linearize = tx_linearize;
806 vsi->tx_force_wb = tx_force_wb;
807 vsi->rx_page_failed = rx_page;
808 vsi->rx_buf_failed = rx_buf;
810 ns->rx_packets = rx_p;
812 ns->tx_packets = tx_p;
815 /* update netdev stats from eth stats */
816 i40e_update_eth_stats(vsi);
817 ons->tx_errors = oes->tx_errors;
818 ns->tx_errors = es->tx_errors;
819 ons->multicast = oes->rx_multicast;
820 ns->multicast = es->rx_multicast;
821 ons->rx_dropped = oes->rx_discards;
822 ns->rx_dropped = es->rx_discards;
823 ons->tx_dropped = oes->tx_discards;
824 ns->tx_dropped = es->tx_discards;
826 /* pull in a couple PF stats if this is the main vsi */
827 if (vsi == pf->vsi[pf->lan_vsi]) {
828 ns->rx_crc_errors = pf->stats.crc_errors;
829 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
830 ns->rx_length_errors = pf->stats.rx_length_errors;
835 * i40e_update_pf_stats - Update the PF statistics counters.
836 * @pf: the PF to be updated
838 static void i40e_update_pf_stats(struct i40e_pf *pf)
840 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
841 struct i40e_hw_port_stats *nsd = &pf->stats;
842 struct i40e_hw *hw = &pf->hw;
846 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
847 I40E_GLPRT_GORCL(hw->port),
848 pf->stat_offsets_loaded,
849 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
850 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
851 I40E_GLPRT_GOTCL(hw->port),
852 pf->stat_offsets_loaded,
853 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
854 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
855 pf->stat_offsets_loaded,
856 &osd->eth.rx_discards,
857 &nsd->eth.rx_discards);
858 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
859 I40E_GLPRT_UPRCL(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->eth.rx_unicast,
862 &nsd->eth.rx_unicast);
863 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
864 I40E_GLPRT_MPRCL(hw->port),
865 pf->stat_offsets_loaded,
866 &osd->eth.rx_multicast,
867 &nsd->eth.rx_multicast);
868 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
869 I40E_GLPRT_BPRCL(hw->port),
870 pf->stat_offsets_loaded,
871 &osd->eth.rx_broadcast,
872 &nsd->eth.rx_broadcast);
873 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
874 I40E_GLPRT_UPTCL(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->eth.tx_unicast,
877 &nsd->eth.tx_unicast);
878 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
879 I40E_GLPRT_MPTCL(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->eth.tx_multicast,
882 &nsd->eth.tx_multicast);
883 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
884 I40E_GLPRT_BPTCL(hw->port),
885 pf->stat_offsets_loaded,
886 &osd->eth.tx_broadcast,
887 &nsd->eth.tx_broadcast);
889 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
890 pf->stat_offsets_loaded,
891 &osd->tx_dropped_link_down,
892 &nsd->tx_dropped_link_down);
894 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
895 pf->stat_offsets_loaded,
896 &osd->crc_errors, &nsd->crc_errors);
898 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
899 pf->stat_offsets_loaded,
900 &osd->illegal_bytes, &nsd->illegal_bytes);
902 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
903 pf->stat_offsets_loaded,
904 &osd->mac_local_faults,
905 &nsd->mac_local_faults);
906 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->mac_remote_faults,
909 &nsd->mac_remote_faults);
911 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->rx_length_errors,
914 &nsd->rx_length_errors);
916 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->link_xon_rx, &nsd->link_xon_rx);
919 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
920 pf->stat_offsets_loaded,
921 &osd->link_xon_tx, &nsd->link_xon_tx);
922 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->link_xoff_rx, &nsd->link_xoff_rx);
925 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->link_xoff_tx, &nsd->link_xoff_tx);
929 for (i = 0; i < 8; i++) {
930 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
931 pf->stat_offsets_loaded,
932 &osd->priority_xoff_rx[i],
933 &nsd->priority_xoff_rx[i]);
934 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
935 pf->stat_offsets_loaded,
936 &osd->priority_xon_rx[i],
937 &nsd->priority_xon_rx[i]);
938 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
939 pf->stat_offsets_loaded,
940 &osd->priority_xon_tx[i],
941 &nsd->priority_xon_tx[i]);
942 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
943 pf->stat_offsets_loaded,
944 &osd->priority_xoff_tx[i],
945 &nsd->priority_xoff_tx[i]);
946 i40e_stat_update32(hw,
947 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
948 pf->stat_offsets_loaded,
949 &osd->priority_xon_2_xoff[i],
950 &nsd->priority_xon_2_xoff[i]);
953 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
954 I40E_GLPRT_PRC64L(hw->port),
955 pf->stat_offsets_loaded,
956 &osd->rx_size_64, &nsd->rx_size_64);
957 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
958 I40E_GLPRT_PRC127L(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->rx_size_127, &nsd->rx_size_127);
961 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
962 I40E_GLPRT_PRC255L(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_size_255, &nsd->rx_size_255);
965 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
966 I40E_GLPRT_PRC511L(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_size_511, &nsd->rx_size_511);
969 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
970 I40E_GLPRT_PRC1023L(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_size_1023, &nsd->rx_size_1023);
973 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
974 I40E_GLPRT_PRC1522L(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_size_1522, &nsd->rx_size_1522);
977 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
978 I40E_GLPRT_PRC9522L(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->rx_size_big, &nsd->rx_size_big);
982 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
983 I40E_GLPRT_PTC64L(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->tx_size_64, &nsd->tx_size_64);
986 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
987 I40E_GLPRT_PTC127L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->tx_size_127, &nsd->tx_size_127);
990 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
991 I40E_GLPRT_PTC255L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->tx_size_255, &nsd->tx_size_255);
994 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
995 I40E_GLPRT_PTC511L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->tx_size_511, &nsd->tx_size_511);
998 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
999 I40E_GLPRT_PTC1023L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->tx_size_1023, &nsd->tx_size_1023);
1002 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1003 I40E_GLPRT_PTC1522L(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->tx_size_1522, &nsd->tx_size_1522);
1006 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1007 I40E_GLPRT_PTC9522L(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->tx_size_big, &nsd->tx_size_big);
1011 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_undersize, &nsd->rx_undersize);
1014 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->rx_fragments, &nsd->rx_fragments);
1017 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_oversize, &nsd->rx_oversize);
1020 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_jabber, &nsd->rx_jabber);
1025 i40e_stat_update32(hw,
1026 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1027 pf->stat_offsets_loaded,
1028 &osd->fd_atr_match, &nsd->fd_atr_match);
1029 i40e_stat_update32(hw,
1030 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1031 pf->stat_offsets_loaded,
1032 &osd->fd_sb_match, &nsd->fd_sb_match);
1033 i40e_stat_update32(hw,
1034 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1035 pf->stat_offsets_loaded,
1036 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1038 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1039 nsd->tx_lpi_status =
1040 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1041 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1042 nsd->rx_lpi_status =
1043 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1044 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1045 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1046 pf->stat_offsets_loaded,
1047 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1048 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1049 pf->stat_offsets_loaded,
1050 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1052 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1053 !(pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED))
1054 nsd->fd_sb_status = true;
1056 nsd->fd_sb_status = false;
1058 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1059 !(pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED))
1060 nsd->fd_atr_status = true;
1062 nsd->fd_atr_status = false;
1064 pf->stat_offsets_loaded = true;
1068 * i40e_update_stats - Update the various statistics counters.
1069 * @vsi: the VSI to be updated
1071 * Update the various stats for this VSI and its related entities.
1073 void i40e_update_stats(struct i40e_vsi *vsi)
1075 struct i40e_pf *pf = vsi->back;
1077 if (vsi == pf->vsi[pf->lan_vsi])
1078 i40e_update_pf_stats(pf);
1080 i40e_update_vsi_stats(vsi);
1084 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1085 * @vsi: the VSI to be searched
1086 * @macaddr: the MAC address
1089 * Returns ptr to the filter object or NULL
1091 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1092 const u8 *macaddr, s16 vlan)
1094 struct i40e_mac_filter *f;
1097 if (!vsi || !macaddr)
1100 key = i40e_addr_to_hkey(macaddr);
1101 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1102 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1110 * i40e_find_mac - Find a mac addr in the macvlan filters list
1111 * @vsi: the VSI to be searched
1112 * @macaddr: the MAC address we are searching for
1114 * Returns the first filter with the provided MAC address or NULL if
1115 * MAC address was not found
1117 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1119 struct i40e_mac_filter *f;
1122 if (!vsi || !macaddr)
1125 key = i40e_addr_to_hkey(macaddr);
1126 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1127 if ((ether_addr_equal(macaddr, f->macaddr)))
1134 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1135 * @vsi: the VSI to be searched
1137 * Returns true if VSI is in vlan mode or false otherwise
1139 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1141 /* If we have a PVID, always operate in VLAN mode */
1145 /* We need to operate in VLAN mode whenever we have any filters with
1146 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1147 * time, incurring search cost repeatedly. However, we can notice two
1150 * 1) the only place where we can gain a VLAN filter is in
1153 * 2) the only place where filters are actually removed is in
1154 * i40e_sync_filters_subtask.
1156 * Thus, we can simply use a boolean value, has_vlan_filters which we
1157 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1158 * we have to perform the full search after deleting filters in
1159 * i40e_sync_filters_subtask, but we already have to search
1160 * filters here and can perform the check at the same time. This
1161 * results in avoiding embedding a loop for VLAN mode inside another
1162 * loop over all the filters, and should maintain correctness as noted
1165 return vsi->has_vlan_filter;
1169 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1170 * @vsi: the VSI to configure
1171 * @tmp_add_list: list of filters ready to be added
1172 * @tmp_del_list: list of filters ready to be deleted
1173 * @vlan_filters: the number of active VLAN filters
1175 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1176 * behave as expected. If we have any active VLAN filters remaining or about
1177 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1178 * so that they only match against untagged traffic. If we no longer have any
1179 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1180 * so that they match against both tagged and untagged traffic. In this way,
1181 * we ensure that we correctly receive the desired traffic. This ensures that
1182 * when we have an active VLAN we will receive only untagged traffic and
1183 * traffic matching active VLANs. If we have no active VLANs then we will
1184 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1186 * Finally, in a similar fashion, this function also corrects filters when
1187 * there is an active PVID assigned to this VSI.
1189 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1191 * This function is only expected to be called from within
1192 * i40e_sync_vsi_filters.
1194 * NOTE: This function expects to be called while under the
1195 * mac_filter_hash_lock
1197 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1198 struct hlist_head *tmp_add_list,
1199 struct hlist_head *tmp_del_list,
1202 s16 pvid = le16_to_cpu(vsi->info.pvid);
1203 struct i40e_mac_filter *f, *add_head;
1204 struct i40e_new_mac_filter *new;
1205 struct hlist_node *h;
1208 /* To determine if a particular filter needs to be replaced we
1209 * have the three following conditions:
1211 * a) if we have a PVID assigned, then all filters which are
1212 * not marked as VLAN=PVID must be replaced with filters that
1214 * b) otherwise, if we have any active VLANS, all filters
1215 * which are marked as VLAN=-1 must be replaced with
1216 * filters marked as VLAN=0
1217 * c) finally, if we do not have any active VLANS, all filters
1218 * which are marked as VLAN=0 must be replaced with filters
1222 /* Update the filters about to be added in place */
1223 hlist_for_each_entry(new, tmp_add_list, hlist) {
1224 if (pvid && new->f->vlan != pvid)
1225 new->f->vlan = pvid;
1226 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1228 else if (!vlan_filters && new->f->vlan == 0)
1229 new->f->vlan = I40E_VLAN_ANY;
1232 /* Update the remaining active filters */
1233 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1234 /* Combine the checks for whether a filter needs to be changed
1235 * and then determine the new VLAN inside the if block, in
1236 * order to avoid duplicating code for adding the new filter
1237 * then deleting the old filter.
1239 if ((pvid && f->vlan != pvid) ||
1240 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1241 (!vlan_filters && f->vlan == 0)) {
1242 /* Determine the new vlan we will be adding */
1245 else if (vlan_filters)
1248 new_vlan = I40E_VLAN_ANY;
1250 /* Create the new filter */
1251 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1255 /* Create a temporary i40e_new_mac_filter */
1256 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1261 new->state = add_head->state;
1263 /* Add the new filter to the tmp list */
1264 hlist_add_head(&new->hlist, tmp_add_list);
1266 /* Put the original filter into the delete list */
1267 f->state = I40E_FILTER_REMOVE;
1268 hash_del(&f->hlist);
1269 hlist_add_head(&f->hlist, tmp_del_list);
1273 vsi->has_vlan_filter = !!vlan_filters;
1279 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1280 * @vsi: the PF Main VSI - inappropriate for any other VSI
1281 * @macaddr: the MAC address
1283 * Remove whatever filter the firmware set up so the driver can manage
1284 * its own filtering intelligently.
1286 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1288 struct i40e_aqc_remove_macvlan_element_data element;
1289 struct i40e_pf *pf = vsi->back;
1291 /* Only appropriate for the PF main VSI */
1292 if (vsi->type != I40E_VSI_MAIN)
1295 memset(&element, 0, sizeof(element));
1296 ether_addr_copy(element.mac_addr, macaddr);
1297 element.vlan_tag = 0;
1298 /* Ignore error returns, some firmware does it this way... */
1299 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1300 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1302 memset(&element, 0, sizeof(element));
1303 ether_addr_copy(element.mac_addr, macaddr);
1304 element.vlan_tag = 0;
1305 /* ...and some firmware does it this way. */
1306 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1307 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1308 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1312 * i40e_add_filter - Add a mac/vlan filter to the VSI
1313 * @vsi: the VSI to be searched
1314 * @macaddr: the MAC address
1317 * Returns ptr to the filter object or NULL when no memory available.
1319 * NOTE: This function is expected to be called with mac_filter_hash_lock
1322 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1323 const u8 *macaddr, s16 vlan)
1325 struct i40e_mac_filter *f;
1328 if (!vsi || !macaddr)
1331 f = i40e_find_filter(vsi, macaddr, vlan);
1333 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1337 /* Update the boolean indicating if we need to function in
1341 vsi->has_vlan_filter = true;
1343 ether_addr_copy(f->macaddr, macaddr);
1345 /* If we're in overflow promisc mode, set the state directly
1346 * to failed, so we don't bother to try sending the filter
1349 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1350 f->state = I40E_FILTER_FAILED;
1352 f->state = I40E_FILTER_NEW;
1353 INIT_HLIST_NODE(&f->hlist);
1355 key = i40e_addr_to_hkey(macaddr);
1356 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1358 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1359 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1362 /* If we're asked to add a filter that has been marked for removal, it
1363 * is safe to simply restore it to active state. __i40e_del_filter
1364 * will have simply deleted any filters which were previously marked
1365 * NEW or FAILED, so if it is currently marked REMOVE it must have
1366 * previously been ACTIVE. Since we haven't yet run the sync filters
1367 * task, just restore this filter to the ACTIVE state so that the
1368 * sync task leaves it in place
1370 if (f->state == I40E_FILTER_REMOVE)
1371 f->state = I40E_FILTER_ACTIVE;
1377 * __i40e_del_filter - Remove a specific filter from the VSI
1378 * @vsi: VSI to remove from
1379 * @f: the filter to remove from the list
1381 * This function should be called instead of i40e_del_filter only if you know
1382 * the exact filter you will remove already, such as via i40e_find_filter or
1385 * NOTE: This function is expected to be called with mac_filter_hash_lock
1387 * ANOTHER NOTE: This function MUST be called from within the context of
1388 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1389 * instead of list_for_each_entry().
1391 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1396 /* If the filter was never added to firmware then we can just delete it
1397 * directly and we don't want to set the status to remove or else an
1398 * admin queue command will unnecessarily fire.
1400 if ((f->state == I40E_FILTER_FAILED) ||
1401 (f->state == I40E_FILTER_NEW)) {
1402 hash_del(&f->hlist);
1405 f->state = I40E_FILTER_REMOVE;
1408 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1409 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1413 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1414 * @vsi: the VSI to be searched
1415 * @macaddr: the MAC address
1418 * NOTE: This function is expected to be called with mac_filter_hash_lock
1420 * ANOTHER NOTE: This function MUST be called from within the context of
1421 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1422 * instead of list_for_each_entry().
1424 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1426 struct i40e_mac_filter *f;
1428 if (!vsi || !macaddr)
1431 f = i40e_find_filter(vsi, macaddr, vlan);
1432 __i40e_del_filter(vsi, f);
1436 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1437 * @vsi: the VSI to be searched
1438 * @macaddr: the mac address to be filtered
1440 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1441 * go through all the macvlan filters and add a macvlan filter for each
1442 * unique vlan that already exists. If a PVID has been assigned, instead only
1443 * add the macaddr to that VLAN.
1445 * Returns last filter added on success, else NULL
1447 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1450 struct i40e_mac_filter *f, *add = NULL;
1451 struct hlist_node *h;
1455 return i40e_add_filter(vsi, macaddr,
1456 le16_to_cpu(vsi->info.pvid));
1458 if (!i40e_is_vsi_in_vlan(vsi))
1459 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1461 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1462 if (f->state == I40E_FILTER_REMOVE)
1464 add = i40e_add_filter(vsi, macaddr, f->vlan);
1473 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1474 * @vsi: the VSI to be searched
1475 * @macaddr: the mac address to be removed
1477 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1480 * Returns 0 for success, or error
1482 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1484 struct i40e_mac_filter *f;
1485 struct hlist_node *h;
1489 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock),
1490 "Missing mac_filter_hash_lock\n");
1491 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1492 if (ether_addr_equal(macaddr, f->macaddr)) {
1493 __i40e_del_filter(vsi, f);
1505 * i40e_set_mac - NDO callback to set mac address
1506 * @netdev: network interface device structure
1507 * @p: pointer to an address structure
1509 * Returns 0 on success, negative on failure
1511 static int i40e_set_mac(struct net_device *netdev, void *p)
1513 struct i40e_netdev_priv *np = netdev_priv(netdev);
1514 struct i40e_vsi *vsi = np->vsi;
1515 struct i40e_pf *pf = vsi->back;
1516 struct i40e_hw *hw = &pf->hw;
1517 struct sockaddr *addr = p;
1519 if (!is_valid_ether_addr(addr->sa_data))
1520 return -EADDRNOTAVAIL;
1522 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1523 netdev_info(netdev, "already using mac address %pM\n",
1528 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1529 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1530 return -EADDRNOTAVAIL;
1532 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1533 netdev_info(netdev, "returning to hw mac address %pM\n",
1536 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1538 spin_lock_bh(&vsi->mac_filter_hash_lock);
1539 i40e_del_mac_filter(vsi, netdev->dev_addr);
1540 i40e_add_mac_filter(vsi, addr->sa_data);
1541 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1542 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1543 if (vsi->type == I40E_VSI_MAIN) {
1546 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1547 I40E_AQC_WRITE_TYPE_LAA_WOL,
1548 addr->sa_data, NULL);
1550 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1551 i40e_stat_str(hw, ret),
1552 i40e_aq_str(hw, hw->aq.asq_last_status));
1555 /* schedule our worker thread which will take care of
1556 * applying the new filter changes
1558 i40e_service_event_schedule(vsi->back);
1563 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1564 * @vsi: the VSI being setup
1565 * @ctxt: VSI context structure
1566 * @enabled_tc: Enabled TCs bitmap
1567 * @is_add: True if called before Add VSI
1569 * Setup VSI queue mapping for enabled traffic classes.
1571 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1572 struct i40e_vsi_context *ctxt,
1576 struct i40e_pf *pf = vsi->back;
1586 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1589 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1590 /* Find numtc from enabled TC bitmap */
1591 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1592 if (enabled_tc & BIT(i)) /* TC is enabled */
1596 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1600 /* At least TC0 is enabled in case of non-DCB case */
1604 vsi->tc_config.numtc = numtc;
1605 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1606 /* Number of queues per enabled TC */
1607 qcount = vsi->alloc_queue_pairs;
1609 num_tc_qps = qcount / numtc;
1610 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1612 /* Setup queue offset/count for all TCs for given VSI */
1613 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1614 /* See if the given TC is enabled for the given VSI */
1615 if (vsi->tc_config.enabled_tc & BIT(i)) {
1619 switch (vsi->type) {
1621 qcount = min_t(int, pf->alloc_rss_size,
1625 case I40E_VSI_SRIOV:
1626 case I40E_VSI_VMDQ2:
1628 qcount = num_tc_qps;
1632 vsi->tc_config.tc_info[i].qoffset = offset;
1633 vsi->tc_config.tc_info[i].qcount = qcount;
1635 /* find the next higher power-of-2 of num queue pairs */
1638 while (num_qps && (BIT_ULL(pow) < qcount)) {
1643 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1645 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1646 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1650 /* TC is not enabled so set the offset to
1651 * default queue and allocate one queue
1654 vsi->tc_config.tc_info[i].qoffset = 0;
1655 vsi->tc_config.tc_info[i].qcount = 1;
1656 vsi->tc_config.tc_info[i].netdev_tc = 0;
1660 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1663 /* Set actual Tx/Rx queue pairs */
1664 vsi->num_queue_pairs = offset;
1665 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1666 if (vsi->req_queue_pairs > 0)
1667 vsi->num_queue_pairs = vsi->req_queue_pairs;
1668 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1669 vsi->num_queue_pairs = pf->num_lan_msix;
1672 /* Scheduler section valid can only be set for ADD VSI */
1674 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1676 ctxt->info.up_enable_bits = enabled_tc;
1678 if (vsi->type == I40E_VSI_SRIOV) {
1679 ctxt->info.mapping_flags |=
1680 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1681 for (i = 0; i < vsi->num_queue_pairs; i++)
1682 ctxt->info.queue_mapping[i] =
1683 cpu_to_le16(vsi->base_queue + i);
1685 ctxt->info.mapping_flags |=
1686 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1687 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1689 ctxt->info.valid_sections |= cpu_to_le16(sections);
1693 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1694 * @netdev: the netdevice
1695 * @addr: address to add
1697 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1698 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1700 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1702 struct i40e_netdev_priv *np = netdev_priv(netdev);
1703 struct i40e_vsi *vsi = np->vsi;
1705 if (i40e_add_mac_filter(vsi, addr))
1712 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1713 * @netdev: the netdevice
1714 * @addr: address to add
1716 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1717 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1719 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1721 struct i40e_netdev_priv *np = netdev_priv(netdev);
1722 struct i40e_vsi *vsi = np->vsi;
1724 i40e_del_mac_filter(vsi, addr);
1730 * i40e_set_rx_mode - NDO callback to set the netdev filters
1731 * @netdev: network interface device structure
1733 static void i40e_set_rx_mode(struct net_device *netdev)
1735 struct i40e_netdev_priv *np = netdev_priv(netdev);
1736 struct i40e_vsi *vsi = np->vsi;
1738 spin_lock_bh(&vsi->mac_filter_hash_lock);
1740 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1741 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1743 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1745 /* check for other flag changes */
1746 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1747 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1748 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1751 /* schedule our worker thread which will take care of
1752 * applying the new filter changes
1754 i40e_service_event_schedule(vsi->back);
1758 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1759 * @vsi: Pointer to VSI struct
1760 * @from: Pointer to list which contains MAC filter entries - changes to
1761 * those entries needs to be undone.
1763 * MAC filter entries from this list were slated for deletion.
1765 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1766 struct hlist_head *from)
1768 struct i40e_mac_filter *f;
1769 struct hlist_node *h;
1771 hlist_for_each_entry_safe(f, h, from, hlist) {
1772 u64 key = i40e_addr_to_hkey(f->macaddr);
1774 /* Move the element back into MAC filter list*/
1775 hlist_del(&f->hlist);
1776 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1781 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1782 * @vsi: Pointer to vsi struct
1783 * @from: Pointer to list which contains MAC filter entries - changes to
1784 * those entries needs to be undone.
1786 * MAC filter entries from this list were slated for addition.
1788 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1789 struct hlist_head *from)
1791 struct i40e_new_mac_filter *new;
1792 struct hlist_node *h;
1794 hlist_for_each_entry_safe(new, h, from, hlist) {
1795 /* We can simply free the wrapper structure */
1796 hlist_del(&new->hlist);
1802 * i40e_next_entry - Get the next non-broadcast filter from a list
1803 * @next: pointer to filter in list
1805 * Returns the next non-broadcast filter in the list. Required so that we
1806 * ignore broadcast filters within the list, since these are not handled via
1807 * the normal firmware update path.
1810 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
1812 hlist_for_each_entry_continue(next, hlist) {
1813 if (!is_broadcast_ether_addr(next->f->macaddr))
1821 * i40e_update_filter_state - Update filter state based on return data
1823 * @count: Number of filters added
1824 * @add_list: return data from fw
1825 * @head: pointer to first filter in current batch
1827 * MAC filter entries from list were slated to be added to device. Returns
1828 * number of successful filters. Note that 0 does NOT mean success!
1831 i40e_update_filter_state(int count,
1832 struct i40e_aqc_add_macvlan_element_data *add_list,
1833 struct i40e_new_mac_filter *add_head)
1838 for (i = 0; i < count; i++) {
1839 /* Always check status of each filter. We don't need to check
1840 * the firmware return status because we pre-set the filter
1841 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
1842 * request to the adminq. Thus, if it no longer matches then
1843 * we know the filter is active.
1845 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
1846 add_head->state = I40E_FILTER_FAILED;
1848 add_head->state = I40E_FILTER_ACTIVE;
1852 add_head = i40e_next_filter(add_head);
1861 * i40e_aqc_del_filters - Request firmware to delete a set of filters
1862 * @vsi: ptr to the VSI
1863 * @vsi_name: name to display in messages
1864 * @list: the list of filters to send to firmware
1865 * @num_del: the number of filters to delete
1866 * @retval: Set to -EIO on failure to delete
1868 * Send a request to firmware via AdminQ to delete a set of filters. Uses
1869 * *retval instead of a return value so that success does not force ret_val to
1870 * be set to 0. This ensures that a sequence of calls to this function
1871 * preserve the previous value of *retval on successful delete.
1874 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
1875 struct i40e_aqc_remove_macvlan_element_data *list,
1876 int num_del, int *retval)
1878 struct i40e_hw *hw = &vsi->back->hw;
1882 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
1883 aq_err = hw->aq.asq_last_status;
1885 /* Explicitly ignore and do not report when firmware returns ENOENT */
1886 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1888 dev_info(&vsi->back->pdev->dev,
1889 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1890 vsi_name, i40e_stat_str(hw, aq_ret),
1891 i40e_aq_str(hw, aq_err));
1896 * i40e_aqc_add_filters - Request firmware to add a set of filters
1897 * @vsi: ptr to the VSI
1898 * @vsi_name: name to display in messages
1899 * @list: the list of filters to send to firmware
1900 * @add_head: Position in the add hlist
1901 * @num_add: the number of filters to add
1902 * @promisc_change: set to true on exit if promiscuous mode was forced on
1904 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
1905 * promisc_changed to true if the firmware has run out of space for more
1909 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
1910 struct i40e_aqc_add_macvlan_element_data *list,
1911 struct i40e_new_mac_filter *add_head,
1912 int num_add, bool *promisc_changed)
1914 struct i40e_hw *hw = &vsi->back->hw;
1917 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
1918 aq_err = hw->aq.asq_last_status;
1919 fcnt = i40e_update_filter_state(num_add, list, add_head);
1921 if (fcnt != num_add) {
1922 *promisc_changed = true;
1923 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
1924 dev_warn(&vsi->back->pdev->dev,
1925 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
1926 i40e_aq_str(hw, aq_err),
1932 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
1933 * @vsi: pointer to the VSI
1936 * This function sets or clears the promiscuous broadcast flags for VLAN
1937 * filters in order to properly receive broadcast frames. Assumes that only
1938 * broadcast filters are passed.
1940 * Returns status indicating success or failure;
1943 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
1944 struct i40e_mac_filter *f)
1946 bool enable = f->state == I40E_FILTER_NEW;
1947 struct i40e_hw *hw = &vsi->back->hw;
1950 if (f->vlan == I40E_VLAN_ANY) {
1951 aq_ret = i40e_aq_set_vsi_broadcast(hw,
1956 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
1964 dev_warn(&vsi->back->pdev->dev,
1965 "Error %s setting broadcast promiscuous mode on %s\n",
1966 i40e_aq_str(hw, hw->aq.asq_last_status),
1973 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1974 * @vsi: ptr to the VSI
1976 * Push any outstanding VSI filter changes through the AdminQ.
1978 * Returns 0 or error value
1980 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1982 struct hlist_head tmp_add_list, tmp_del_list;
1983 struct i40e_mac_filter *f;
1984 struct i40e_new_mac_filter *new, *add_head = NULL;
1985 struct i40e_hw *hw = &vsi->back->hw;
1986 unsigned int failed_filters = 0;
1987 unsigned int vlan_filters = 0;
1988 bool promisc_changed = false;
1989 char vsi_name[16] = "PF";
1990 int filter_list_len = 0;
1991 i40e_status aq_ret = 0;
1992 u32 changed_flags = 0;
1993 struct hlist_node *h;
2002 /* empty array typed pointers, kcalloc later */
2003 struct i40e_aqc_add_macvlan_element_data *add_list;
2004 struct i40e_aqc_remove_macvlan_element_data *del_list;
2006 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
2007 usleep_range(1000, 2000);
2011 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2012 vsi->current_netdev_flags = vsi->netdev->flags;
2015 INIT_HLIST_HEAD(&tmp_add_list);
2016 INIT_HLIST_HEAD(&tmp_del_list);
2018 if (vsi->type == I40E_VSI_SRIOV)
2019 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2020 else if (vsi->type != I40E_VSI_MAIN)
2021 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2023 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2024 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2026 spin_lock_bh(&vsi->mac_filter_hash_lock);
2027 /* Create a list of filters to delete. */
2028 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2029 if (f->state == I40E_FILTER_REMOVE) {
2030 /* Move the element into temporary del_list */
2031 hash_del(&f->hlist);
2032 hlist_add_head(&f->hlist, &tmp_del_list);
2034 /* Avoid counting removed filters */
2037 if (f->state == I40E_FILTER_NEW) {
2038 /* Create a temporary i40e_new_mac_filter */
2039 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2041 goto err_no_memory_locked;
2043 /* Store pointer to the real filter */
2045 new->state = f->state;
2047 /* Add it to the hash list */
2048 hlist_add_head(&new->hlist, &tmp_add_list);
2051 /* Count the number of active (current and new) VLAN
2052 * filters we have now. Does not count filters which
2053 * are marked for deletion.
2059 retval = i40e_correct_mac_vlan_filters(vsi,
2064 goto err_no_memory_locked;
2066 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2069 /* Now process 'del_list' outside the lock */
2070 if (!hlist_empty(&tmp_del_list)) {
2071 filter_list_len = hw->aq.asq_buf_size /
2072 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2073 list_size = filter_list_len *
2074 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2075 del_list = kzalloc(list_size, GFP_ATOMIC);
2079 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2082 /* handle broadcast filters by updating the broadcast
2083 * promiscuous flag and release filter list.
2085 if (is_broadcast_ether_addr(f->macaddr)) {
2086 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2088 hlist_del(&f->hlist);
2093 /* add to delete list */
2094 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2095 if (f->vlan == I40E_VLAN_ANY) {
2096 del_list[num_del].vlan_tag = 0;
2097 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2099 del_list[num_del].vlan_tag =
2100 cpu_to_le16((u16)(f->vlan));
2103 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2104 del_list[num_del].flags = cmd_flags;
2107 /* flush a full buffer */
2108 if (num_del == filter_list_len) {
2109 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2111 memset(del_list, 0, list_size);
2114 /* Release memory for MAC filter entries which were
2115 * synced up with HW.
2117 hlist_del(&f->hlist);
2122 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2130 if (!hlist_empty(&tmp_add_list)) {
2131 /* Do all the adds now. */
2132 filter_list_len = hw->aq.asq_buf_size /
2133 sizeof(struct i40e_aqc_add_macvlan_element_data);
2134 list_size = filter_list_len *
2135 sizeof(struct i40e_aqc_add_macvlan_element_data);
2136 add_list = kzalloc(list_size, GFP_ATOMIC);
2141 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2142 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2144 new->state = I40E_FILTER_FAILED;
2148 /* handle broadcast filters by updating the broadcast
2149 * promiscuous flag instead of adding a MAC filter.
2151 if (is_broadcast_ether_addr(new->f->macaddr)) {
2152 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2154 new->state = I40E_FILTER_FAILED;
2156 new->state = I40E_FILTER_ACTIVE;
2160 /* add to add array */
2164 ether_addr_copy(add_list[num_add].mac_addr,
2166 if (new->f->vlan == I40E_VLAN_ANY) {
2167 add_list[num_add].vlan_tag = 0;
2168 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2170 add_list[num_add].vlan_tag =
2171 cpu_to_le16((u16)(new->f->vlan));
2173 add_list[num_add].queue_number = 0;
2174 /* set invalid match method for later detection */
2175 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2176 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2177 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2180 /* flush a full buffer */
2181 if (num_add == filter_list_len) {
2182 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2185 memset(add_list, 0, list_size);
2190 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2191 num_add, &promisc_changed);
2193 /* Now move all of the filters from the temp add list back to
2196 spin_lock_bh(&vsi->mac_filter_hash_lock);
2197 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2198 /* Only update the state if we're still NEW */
2199 if (new->f->state == I40E_FILTER_NEW)
2200 new->f->state = new->state;
2201 hlist_del(&new->hlist);
2204 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2209 /* Determine the number of active and failed filters. */
2210 spin_lock_bh(&vsi->mac_filter_hash_lock);
2211 vsi->active_filters = 0;
2212 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2213 if (f->state == I40E_FILTER_ACTIVE)
2214 vsi->active_filters++;
2215 else if (f->state == I40E_FILTER_FAILED)
2218 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2220 /* If promiscuous mode has changed, we need to calculate a new
2221 * threshold for when we are safe to exit
2223 if (promisc_changed)
2224 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2226 /* Check if we are able to exit overflow promiscuous mode. We can
2227 * safely exit if we didn't just enter, we no longer have any failed
2228 * filters, and we have reduced filters below the threshold value.
2230 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2231 !promisc_changed && !failed_filters &&
2232 (vsi->active_filters < vsi->promisc_threshold)) {
2233 dev_info(&pf->pdev->dev,
2234 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2236 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2237 promisc_changed = true;
2238 vsi->promisc_threshold = 0;
2241 /* if the VF is not trusted do not do promisc */
2242 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2243 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2247 /* check for changes in promiscuous modes */
2248 if (changed_flags & IFF_ALLMULTI) {
2249 bool cur_multipromisc;
2251 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2252 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2257 retval = i40e_aq_rc_to_posix(aq_ret,
2258 hw->aq.asq_last_status);
2259 dev_info(&pf->pdev->dev,
2260 "set multi promisc failed on %s, err %s aq_err %s\n",
2262 i40e_stat_str(hw, aq_ret),
2263 i40e_aq_str(hw, hw->aq.asq_last_status));
2266 if ((changed_flags & IFF_PROMISC) ||
2268 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2271 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2272 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2274 if ((vsi->type == I40E_VSI_MAIN) &&
2275 (pf->lan_veb != I40E_NO_VEB) &&
2276 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2277 /* set defport ON for Main VSI instead of true promisc
2278 * this way we will get all unicast/multicast and VLAN
2279 * promisc behavior but will not get VF or VMDq traffic
2280 * replicated on the Main VSI.
2282 if (pf->cur_promisc != cur_promisc) {
2283 pf->cur_promisc = cur_promisc;
2286 i40e_aq_set_default_vsi(hw,
2291 i40e_aq_clear_default_vsi(hw,
2295 retval = i40e_aq_rc_to_posix(aq_ret,
2296 hw->aq.asq_last_status);
2297 dev_info(&pf->pdev->dev,
2298 "Set default VSI failed on %s, err %s, aq_err %s\n",
2300 i40e_stat_str(hw, aq_ret),
2302 hw->aq.asq_last_status));
2306 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2313 i40e_aq_rc_to_posix(aq_ret,
2314 hw->aq.asq_last_status);
2315 dev_info(&pf->pdev->dev,
2316 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2318 i40e_stat_str(hw, aq_ret),
2320 hw->aq.asq_last_status));
2322 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2328 i40e_aq_rc_to_posix(aq_ret,
2329 hw->aq.asq_last_status);
2330 dev_info(&pf->pdev->dev,
2331 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2333 i40e_stat_str(hw, aq_ret),
2335 hw->aq.asq_last_status));
2338 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2342 retval = i40e_aq_rc_to_posix(aq_ret,
2343 pf->hw.aq.asq_last_status);
2344 dev_info(&pf->pdev->dev,
2345 "set brdcast promisc failed, err %s, aq_err %s\n",
2346 i40e_stat_str(hw, aq_ret),
2348 hw->aq.asq_last_status));
2352 /* if something went wrong then set the changed flag so we try again */
2354 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2356 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2360 /* Restore elements on the temporary add and delete lists */
2361 spin_lock_bh(&vsi->mac_filter_hash_lock);
2362 err_no_memory_locked:
2363 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2364 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2365 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2367 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2368 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2373 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2374 * @pf: board private structure
2376 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2380 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2382 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2384 for (v = 0; v < pf->num_alloc_vsi; v++) {
2386 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2387 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2390 /* come back and try again later */
2391 pf->flags |= I40E_FLAG_FILTER_SYNC;
2399 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2400 * @netdev: network interface device structure
2401 * @new_mtu: new value for maximum frame size
2403 * Returns 0 on success, negative on failure
2405 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2407 struct i40e_netdev_priv *np = netdev_priv(netdev);
2408 struct i40e_vsi *vsi = np->vsi;
2409 struct i40e_pf *pf = vsi->back;
2411 netdev_info(netdev, "changing MTU from %d to %d\n",
2412 netdev->mtu, new_mtu);
2413 netdev->mtu = new_mtu;
2414 if (netif_running(netdev))
2415 i40e_vsi_reinit_locked(vsi);
2416 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
2417 I40E_FLAG_CLIENT_L2_CHANGE);
2422 * i40e_ioctl - Access the hwtstamp interface
2423 * @netdev: network interface device structure
2424 * @ifr: interface request data
2425 * @cmd: ioctl command
2427 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2429 struct i40e_netdev_priv *np = netdev_priv(netdev);
2430 struct i40e_pf *pf = np->vsi->back;
2434 return i40e_ptp_get_ts_config(pf, ifr);
2436 return i40e_ptp_set_ts_config(pf, ifr);
2443 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2444 * @vsi: the vsi being adjusted
2446 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2448 struct i40e_vsi_context ctxt;
2451 if ((vsi->info.valid_sections &
2452 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2453 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2454 return; /* already enabled */
2456 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2457 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2458 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2460 ctxt.seid = vsi->seid;
2461 ctxt.info = vsi->info;
2462 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2464 dev_info(&vsi->back->pdev->dev,
2465 "update vlan stripping failed, err %s aq_err %s\n",
2466 i40e_stat_str(&vsi->back->hw, ret),
2467 i40e_aq_str(&vsi->back->hw,
2468 vsi->back->hw.aq.asq_last_status));
2473 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2474 * @vsi: the vsi being adjusted
2476 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2478 struct i40e_vsi_context ctxt;
2481 if ((vsi->info.valid_sections &
2482 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2483 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2484 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2485 return; /* already disabled */
2487 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2488 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2489 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2491 ctxt.seid = vsi->seid;
2492 ctxt.info = vsi->info;
2493 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2495 dev_info(&vsi->back->pdev->dev,
2496 "update vlan stripping failed, err %s aq_err %s\n",
2497 i40e_stat_str(&vsi->back->hw, ret),
2498 i40e_aq_str(&vsi->back->hw,
2499 vsi->back->hw.aq.asq_last_status));
2504 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2505 * @netdev: network interface to be adjusted
2506 * @features: netdev features to test if VLAN offload is enabled or not
2508 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2510 struct i40e_netdev_priv *np = netdev_priv(netdev);
2511 struct i40e_vsi *vsi = np->vsi;
2513 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2514 i40e_vlan_stripping_enable(vsi);
2516 i40e_vlan_stripping_disable(vsi);
2520 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2521 * @vsi: the vsi being configured
2522 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2524 * This is a helper function for adding a new MAC/VLAN filter with the
2525 * specified VLAN for each existing MAC address already in the hash table.
2526 * This function does *not* perform any accounting to update filters based on
2529 * NOTE: this function expects to be called while under the
2530 * mac_filter_hash_lock
2532 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2534 struct i40e_mac_filter *f, *add_f;
2535 struct hlist_node *h;
2538 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2539 if (f->state == I40E_FILTER_REMOVE)
2541 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2543 dev_info(&vsi->back->pdev->dev,
2544 "Could not add vlan filter %d for %pM\n",
2554 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2555 * @vsi: the VSI being configured
2556 * @vid: VLAN id to be added
2558 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2562 if (!vid || vsi->info.pvid)
2565 /* Locked once because all functions invoked below iterates list*/
2566 spin_lock_bh(&vsi->mac_filter_hash_lock);
2567 err = i40e_add_vlan_all_mac(vsi, vid);
2568 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2572 /* schedule our worker thread which will take care of
2573 * applying the new filter changes
2575 i40e_service_event_schedule(vsi->back);
2580 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2581 * @vsi: the vsi being configured
2582 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2584 * This function should be used to remove all VLAN filters which match the
2585 * given VID. It does not schedule the service event and does not take the
2586 * mac_filter_hash_lock so it may be combined with other operations under
2587 * a single invocation of the mac_filter_hash_lock.
2589 * NOTE: this function expects to be called while under the
2590 * mac_filter_hash_lock
2592 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2594 struct i40e_mac_filter *f;
2595 struct hlist_node *h;
2598 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2600 __i40e_del_filter(vsi, f);
2605 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2606 * @vsi: the VSI being configured
2607 * @vid: VLAN id to be removed
2609 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2611 if (!vid || vsi->info.pvid)
2614 spin_lock_bh(&vsi->mac_filter_hash_lock);
2615 i40e_rm_vlan_all_mac(vsi, vid);
2616 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2618 /* schedule our worker thread which will take care of
2619 * applying the new filter changes
2621 i40e_service_event_schedule(vsi->back);
2625 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2626 * @netdev: network interface to be adjusted
2627 * @vid: vlan id to be added
2629 * net_device_ops implementation for adding vlan ids
2631 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2632 __always_unused __be16 proto, u16 vid)
2634 struct i40e_netdev_priv *np = netdev_priv(netdev);
2635 struct i40e_vsi *vsi = np->vsi;
2638 if (vid >= VLAN_N_VID)
2641 /* If the network stack called us with vid = 0 then
2642 * it is asking to receive priority tagged packets with
2643 * vlan id 0. Our HW receives them by default when configured
2644 * to receive untagged packets so there is no need to add an
2645 * extra filter for vlan 0 tagged packets.
2648 ret = i40e_vsi_add_vlan(vsi, vid);
2651 set_bit(vid, vsi->active_vlans);
2657 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2658 * @netdev: network interface to be adjusted
2659 * @vid: vlan id to be removed
2661 * net_device_ops implementation for removing vlan ids
2663 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2664 __always_unused __be16 proto, u16 vid)
2666 struct i40e_netdev_priv *np = netdev_priv(netdev);
2667 struct i40e_vsi *vsi = np->vsi;
2669 /* return code is ignored as there is nothing a user
2670 * can do about failure to remove and a log message was
2671 * already printed from the other function
2673 i40e_vsi_kill_vlan(vsi, vid);
2675 clear_bit(vid, vsi->active_vlans);
2681 * i40e_macaddr_init - explicitly write the mac address filters
2683 * @vsi: pointer to the vsi
2684 * @macaddr: the MAC address
2686 * This is needed when the macaddr has been obtained by other
2687 * means than the default, e.g., from Open Firmware or IDPROM.
2688 * Returns 0 on success, negative on failure
2690 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2693 struct i40e_aqc_add_macvlan_element_data element;
2695 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2696 I40E_AQC_WRITE_TYPE_LAA_WOL,
2699 dev_info(&vsi->back->pdev->dev,
2700 "Addr change for VSI failed: %d\n", ret);
2701 return -EADDRNOTAVAIL;
2704 memset(&element, 0, sizeof(element));
2705 ether_addr_copy(element.mac_addr, macaddr);
2706 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2707 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2709 dev_info(&vsi->back->pdev->dev,
2710 "add filter failed err %s aq_err %s\n",
2711 i40e_stat_str(&vsi->back->hw, ret),
2712 i40e_aq_str(&vsi->back->hw,
2713 vsi->back->hw.aq.asq_last_status));
2719 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2720 * @vsi: the vsi being brought back up
2722 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2729 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2731 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2732 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2737 * i40e_vsi_add_pvid - Add pvid for the VSI
2738 * @vsi: the vsi being adjusted
2739 * @vid: the vlan id to set as a PVID
2741 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2743 struct i40e_vsi_context ctxt;
2746 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2747 vsi->info.pvid = cpu_to_le16(vid);
2748 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2749 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2750 I40E_AQ_VSI_PVLAN_EMOD_STR;
2752 ctxt.seid = vsi->seid;
2753 ctxt.info = vsi->info;
2754 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2756 dev_info(&vsi->back->pdev->dev,
2757 "add pvid failed, err %s aq_err %s\n",
2758 i40e_stat_str(&vsi->back->hw, ret),
2759 i40e_aq_str(&vsi->back->hw,
2760 vsi->back->hw.aq.asq_last_status));
2768 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2769 * @vsi: the vsi being adjusted
2771 * Just use the vlan_rx_register() service to put it back to normal
2773 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2775 i40e_vlan_stripping_disable(vsi);
2781 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2782 * @vsi: ptr to the VSI
2784 * If this function returns with an error, then it's possible one or
2785 * more of the rings is populated (while the rest are not). It is the
2786 * callers duty to clean those orphaned rings.
2788 * Return 0 on success, negative on failure
2790 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2794 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2795 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2801 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2802 * @vsi: ptr to the VSI
2804 * Free VSI's transmit software resources
2806 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2813 for (i = 0; i < vsi->num_queue_pairs; i++)
2814 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2815 i40e_free_tx_resources(vsi->tx_rings[i]);
2819 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2820 * @vsi: ptr to the VSI
2822 * If this function returns with an error, then it's possible one or
2823 * more of the rings is populated (while the rest are not). It is the
2824 * callers duty to clean those orphaned rings.
2826 * Return 0 on success, negative on failure
2828 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2832 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2833 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2838 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2839 * @vsi: ptr to the VSI
2841 * Free all receive software resources
2843 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2850 for (i = 0; i < vsi->num_queue_pairs; i++)
2851 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2852 i40e_free_rx_resources(vsi->rx_rings[i]);
2856 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2857 * @ring: The Tx ring to configure
2859 * This enables/disables XPS for a given Tx descriptor ring
2860 * based on the TCs enabled for the VSI that ring belongs to.
2862 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2864 struct i40e_vsi *vsi = ring->vsi;
2867 if (!ring->q_vector || !ring->netdev)
2870 /* Single TC mode enable XPS */
2871 if (vsi->tc_config.numtc <= 1) {
2872 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2873 netif_set_xps_queue(ring->netdev,
2874 &ring->q_vector->affinity_mask,
2876 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2877 /* Disable XPS to allow selection based on TC */
2878 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2879 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2880 free_cpumask_var(mask);
2883 /* schedule our worker thread which will take care of
2884 * applying the new filter changes
2886 i40e_service_event_schedule(vsi->back);
2890 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2891 * @ring: The Tx ring to configure
2893 * Configure the Tx descriptor ring in the HMC context.
2895 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2897 struct i40e_vsi *vsi = ring->vsi;
2898 u16 pf_q = vsi->base_queue + ring->queue_index;
2899 struct i40e_hw *hw = &vsi->back->hw;
2900 struct i40e_hmc_obj_txq tx_ctx;
2901 i40e_status err = 0;
2904 /* some ATR related tx ring init */
2905 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2906 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2907 ring->atr_count = 0;
2909 ring->atr_sample_rate = 0;
2913 i40e_config_xps_tx_ring(ring);
2915 /* clear the context structure first */
2916 memset(&tx_ctx, 0, sizeof(tx_ctx));
2918 tx_ctx.new_context = 1;
2919 tx_ctx.base = (ring->dma / 128);
2920 tx_ctx.qlen = ring->count;
2921 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2922 I40E_FLAG_FD_ATR_ENABLED));
2923 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2924 /* FDIR VSI tx ring can still use RS bit and writebacks */
2925 if (vsi->type != I40E_VSI_FDIR)
2926 tx_ctx.head_wb_ena = 1;
2927 tx_ctx.head_wb_addr = ring->dma +
2928 (ring->count * sizeof(struct i40e_tx_desc));
2930 /* As part of VSI creation/update, FW allocates certain
2931 * Tx arbitration queue sets for each TC enabled for
2932 * the VSI. The FW returns the handles to these queue
2933 * sets as part of the response buffer to Add VSI,
2934 * Update VSI, etc. AQ commands. It is expected that
2935 * these queue set handles be associated with the Tx
2936 * queues by the driver as part of the TX queue context
2937 * initialization. This has to be done regardless of
2938 * DCB as by default everything is mapped to TC0.
2940 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2941 tx_ctx.rdylist_act = 0;
2943 /* clear the context in the HMC */
2944 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2946 dev_info(&vsi->back->pdev->dev,
2947 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2948 ring->queue_index, pf_q, err);
2952 /* set the context in the HMC */
2953 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2955 dev_info(&vsi->back->pdev->dev,
2956 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2957 ring->queue_index, pf_q, err);
2961 /* Now associate this queue with this PCI function */
2962 if (vsi->type == I40E_VSI_VMDQ2) {
2963 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2964 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2965 I40E_QTX_CTL_VFVM_INDX_MASK;
2967 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2970 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2971 I40E_QTX_CTL_PF_INDX_MASK);
2972 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2975 /* cache tail off for easier writes later */
2976 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2982 * i40e_configure_rx_ring - Configure a receive ring context
2983 * @ring: The Rx ring to configure
2985 * Configure the Rx descriptor ring in the HMC context.
2987 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2989 struct i40e_vsi *vsi = ring->vsi;
2990 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2991 u16 pf_q = vsi->base_queue + ring->queue_index;
2992 struct i40e_hw *hw = &vsi->back->hw;
2993 struct i40e_hmc_obj_rxq rx_ctx;
2994 i40e_status err = 0;
2998 /* clear the context structure first */
2999 memset(&rx_ctx, 0, sizeof(rx_ctx));
3001 ring->rx_buf_len = vsi->rx_buf_len;
3003 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3004 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3006 rx_ctx.base = (ring->dma / 128);
3007 rx_ctx.qlen = ring->count;
3009 /* use 32 byte descriptors */
3012 /* descriptor type is always zero
3015 rx_ctx.hsplit_0 = 0;
3017 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3018 if (hw->revision_id == 0)
3019 rx_ctx.lrxqthresh = 0;
3021 rx_ctx.lrxqthresh = 2;
3022 rx_ctx.crcstrip = 1;
3024 /* this controls whether VLAN is stripped from inner headers */
3026 /* set the prefena field to 1 because the manual says to */
3029 /* clear the context in the HMC */
3030 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3032 dev_info(&vsi->back->pdev->dev,
3033 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3034 ring->queue_index, pf_q, err);
3038 /* set the context in the HMC */
3039 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3041 dev_info(&vsi->back->pdev->dev,
3042 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3043 ring->queue_index, pf_q, err);
3047 /* configure Rx buffer alignment */
3048 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3049 clear_ring_build_skb_enabled(ring);
3051 set_ring_build_skb_enabled(ring);
3053 /* cache tail for quicker writes, and clear the reg before use */
3054 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3055 writel(0, ring->tail);
3057 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3063 * i40e_vsi_configure_tx - Configure the VSI for Tx
3064 * @vsi: VSI structure describing this set of rings and resources
3066 * Configure the Tx VSI for operation.
3068 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3073 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3074 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3080 * i40e_vsi_configure_rx - Configure the VSI for Rx
3081 * @vsi: the VSI being configured
3083 * Configure the Rx VSI for operation.
3085 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3090 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3091 vsi->max_frame = I40E_MAX_RXBUFFER;
3092 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3093 #if (PAGE_SIZE < 8192)
3094 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3095 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3096 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3097 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3100 vsi->max_frame = I40E_MAX_RXBUFFER;
3101 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3105 /* set up individual rings */
3106 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3107 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3113 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3114 * @vsi: ptr to the VSI
3116 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3118 struct i40e_ring *tx_ring, *rx_ring;
3119 u16 qoffset, qcount;
3122 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3123 /* Reset the TC information */
3124 for (i = 0; i < vsi->num_queue_pairs; i++) {
3125 rx_ring = vsi->rx_rings[i];
3126 tx_ring = vsi->tx_rings[i];
3127 rx_ring->dcb_tc = 0;
3128 tx_ring->dcb_tc = 0;
3132 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3133 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3136 qoffset = vsi->tc_config.tc_info[n].qoffset;
3137 qcount = vsi->tc_config.tc_info[n].qcount;
3138 for (i = qoffset; i < (qoffset + qcount); i++) {
3139 rx_ring = vsi->rx_rings[i];
3140 tx_ring = vsi->tx_rings[i];
3141 rx_ring->dcb_tc = n;
3142 tx_ring->dcb_tc = n;
3148 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3149 * @vsi: ptr to the VSI
3151 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3153 struct i40e_pf *pf = vsi->back;
3157 i40e_set_rx_mode(vsi->netdev);
3159 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3160 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3162 dev_warn(&pf->pdev->dev,
3163 "could not set up macaddr; err %d\n", err);
3169 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3170 * @vsi: Pointer to the targeted VSI
3172 * This function replays the hlist on the hw where all the SB Flow Director
3173 * filters were saved.
3175 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3177 struct i40e_fdir_filter *filter;
3178 struct i40e_pf *pf = vsi->back;
3179 struct hlist_node *node;
3181 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3184 /* Reset FDir counters as we're replaying all existing filters */
3185 pf->fd_tcp4_filter_cnt = 0;
3186 pf->fd_udp4_filter_cnt = 0;
3187 pf->fd_sctp4_filter_cnt = 0;
3188 pf->fd_ip4_filter_cnt = 0;
3190 hlist_for_each_entry_safe(filter, node,
3191 &pf->fdir_filter_list, fdir_node) {
3192 i40e_add_del_fdir(vsi, filter, true);
3197 * i40e_vsi_configure - Set up the VSI for action
3198 * @vsi: the VSI being configured
3200 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3204 i40e_set_vsi_rx_mode(vsi);
3205 i40e_restore_vlan(vsi);
3206 i40e_vsi_config_dcb_rings(vsi);
3207 err = i40e_vsi_configure_tx(vsi);
3209 err = i40e_vsi_configure_rx(vsi);
3215 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3216 * @vsi: the VSI being configured
3218 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3220 struct i40e_pf *pf = vsi->back;
3221 struct i40e_hw *hw = &pf->hw;
3226 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3227 * and PFINT_LNKLSTn registers, e.g.:
3228 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3230 qp = vsi->base_queue;
3231 vector = vsi->base_vector;
3232 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3233 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3235 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3236 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3237 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3238 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3240 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3241 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3242 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3244 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3245 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3247 /* Linked list for the queuepairs assigned to this vector */
3248 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3249 for (q = 0; q < q_vector->num_ringpairs; q++) {
3252 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3253 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3254 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3255 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3257 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3259 wr32(hw, I40E_QINT_RQCTL(qp), val);
3261 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3262 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3263 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3264 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3266 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3268 /* Terminate the linked list */
3269 if (q == (q_vector->num_ringpairs - 1))
3270 val |= (I40E_QUEUE_END_OF_LIST
3271 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3273 wr32(hw, I40E_QINT_TQCTL(qp), val);
3282 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3283 * @hw: ptr to the hardware info
3285 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3287 struct i40e_hw *hw = &pf->hw;
3290 /* clear things first */
3291 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3292 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3294 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3295 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3296 I40E_PFINT_ICR0_ENA_GRST_MASK |
3297 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3298 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3299 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3300 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3301 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3303 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3304 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3306 if (pf->flags & I40E_FLAG_PTP)
3307 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3309 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3311 /* SW_ITR_IDX = 0, but don't change INTENA */
3312 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3313 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3315 /* OTHER_ITR_IDX = 0 */
3316 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3320 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3321 * @vsi: the VSI being configured
3323 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3325 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3326 struct i40e_pf *pf = vsi->back;
3327 struct i40e_hw *hw = &pf->hw;
3330 /* set the ITR configuration */
3331 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3332 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3333 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3334 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3335 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3336 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3337 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3339 i40e_enable_misc_int_causes(pf);
3341 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3342 wr32(hw, I40E_PFINT_LNKLST0, 0);
3344 /* Associate the queue pair to the vector and enable the queue int */
3345 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3346 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3347 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3349 wr32(hw, I40E_QINT_RQCTL(0), val);
3351 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3352 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3353 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3355 wr32(hw, I40E_QINT_TQCTL(0), val);
3360 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3361 * @pf: board private structure
3363 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3365 struct i40e_hw *hw = &pf->hw;
3367 wr32(hw, I40E_PFINT_DYN_CTL0,
3368 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3373 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3374 * @pf: board private structure
3375 * @clearpba: true when all pending interrupt events should be cleared
3377 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3379 struct i40e_hw *hw = &pf->hw;
3382 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3383 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3384 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3386 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3391 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3392 * @irq: interrupt number
3393 * @data: pointer to a q_vector
3395 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3397 struct i40e_q_vector *q_vector = data;
3399 if (!q_vector->tx.ring && !q_vector->rx.ring)
3402 napi_schedule_irqoff(&q_vector->napi);
3408 * i40e_irq_affinity_notify - Callback for affinity changes
3409 * @notify: context as to what irq was changed
3410 * @mask: the new affinity mask
3412 * This is a callback function used by the irq_set_affinity_notifier function
3413 * so that we may register to receive changes to the irq affinity masks.
3415 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3416 const cpumask_t *mask)
3418 struct i40e_q_vector *q_vector =
3419 container_of(notify, struct i40e_q_vector, affinity_notify);
3421 q_vector->affinity_mask = *mask;
3425 * i40e_irq_affinity_release - Callback for affinity notifier release
3426 * @ref: internal core kernel usage
3428 * This is a callback function used by the irq_set_affinity_notifier function
3429 * to inform the current notification subscriber that they will no longer
3430 * receive notifications.
3432 static void i40e_irq_affinity_release(struct kref *ref) {}
3435 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3436 * @vsi: the VSI being configured
3437 * @basename: name for the vector
3439 * Allocates MSI-X vectors and requests interrupts from the kernel.
3441 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3443 int q_vectors = vsi->num_q_vectors;
3444 struct i40e_pf *pf = vsi->back;
3445 int base = vsi->base_vector;
3451 for (vector = 0; vector < q_vectors; vector++) {
3452 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3454 irq_num = pf->msix_entries[base + vector].vector;
3456 if (q_vector->tx.ring && q_vector->rx.ring) {
3457 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3458 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3460 } else if (q_vector->rx.ring) {
3461 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3462 "%s-%s-%d", basename, "rx", rx_int_idx++);
3463 } else if (q_vector->tx.ring) {
3464 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3465 "%s-%s-%d", basename, "tx", tx_int_idx++);
3467 /* skip this unused q_vector */
3470 err = request_irq(irq_num,
3476 dev_info(&pf->pdev->dev,
3477 "MSIX request_irq failed, error: %d\n", err);
3478 goto free_queue_irqs;
3481 /* register for affinity change notifications */
3482 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3483 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3484 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3485 /* assign the mask for this irq */
3486 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
3489 vsi->irqs_ready = true;
3495 irq_num = pf->msix_entries[base + vector].vector;
3496 irq_set_affinity_notifier(irq_num, NULL);
3497 irq_set_affinity_hint(irq_num, NULL);
3498 free_irq(irq_num, &vsi->q_vectors[vector]);
3504 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3505 * @vsi: the VSI being un-configured
3507 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3509 struct i40e_pf *pf = vsi->back;
3510 struct i40e_hw *hw = &pf->hw;
3511 int base = vsi->base_vector;
3514 for (i = 0; i < vsi->num_queue_pairs; i++) {
3515 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3516 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3519 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3520 for (i = vsi->base_vector;
3521 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3522 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3525 for (i = 0; i < vsi->num_q_vectors; i++)
3526 synchronize_irq(pf->msix_entries[i + base].vector);
3528 /* Legacy and MSI mode - this stops all interrupt handling */
3529 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3530 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3532 synchronize_irq(pf->pdev->irq);
3537 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3538 * @vsi: the VSI being configured
3540 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3542 struct i40e_pf *pf = vsi->back;
3545 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3546 for (i = 0; i < vsi->num_q_vectors; i++)
3547 i40e_irq_dynamic_enable(vsi, i);
3549 i40e_irq_dynamic_enable_icr0(pf, true);
3552 i40e_flush(&pf->hw);
3557 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3558 * @pf: board private structure
3560 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3563 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3564 i40e_flush(&pf->hw);
3568 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3569 * @irq: interrupt number
3570 * @data: pointer to a q_vector
3572 * This is the handler used for all MSI/Legacy interrupts, and deals
3573 * with both queue and non-queue interrupts. This is also used in
3574 * MSIX mode to handle the non-queue interrupts.
3576 static irqreturn_t i40e_intr(int irq, void *data)
3578 struct i40e_pf *pf = (struct i40e_pf *)data;
3579 struct i40e_hw *hw = &pf->hw;
3580 irqreturn_t ret = IRQ_NONE;
3581 u32 icr0, icr0_remaining;
3584 icr0 = rd32(hw, I40E_PFINT_ICR0);
3585 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3587 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3588 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3591 /* if interrupt but no bits showing, must be SWINT */
3592 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3593 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3596 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3597 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3598 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3599 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3600 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3603 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3604 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3605 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3606 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3608 /* We do not have a way to disarm Queue causes while leaving
3609 * interrupt enabled for all other causes, ideally
3610 * interrupt should be disabled while we are in NAPI but
3611 * this is not a performance path and napi_schedule()
3612 * can deal with rescheduling.
3614 if (!test_bit(__I40E_DOWN, &pf->state))
3615 napi_schedule_irqoff(&q_vector->napi);
3618 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3619 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3620 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3621 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3624 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3625 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3626 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3629 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3630 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3631 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3634 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3635 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3636 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3637 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3638 val = rd32(hw, I40E_GLGEN_RSTAT);
3639 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3640 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3641 if (val == I40E_RESET_CORER) {
3643 } else if (val == I40E_RESET_GLOBR) {
3645 } else if (val == I40E_RESET_EMPR) {
3647 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3651 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3652 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3653 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3654 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3655 rd32(hw, I40E_PFHMC_ERRORINFO),
3656 rd32(hw, I40E_PFHMC_ERRORDATA));
3659 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3660 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3662 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3663 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3664 i40e_ptp_tx_hwtstamp(pf);
3668 /* If a critical error is pending we have no choice but to reset the
3670 * Report and mask out any remaining unexpected interrupts.
3672 icr0_remaining = icr0 & ena_mask;
3673 if (icr0_remaining) {
3674 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3676 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3677 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3678 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3679 dev_info(&pf->pdev->dev, "device will be reset\n");
3680 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3681 i40e_service_event_schedule(pf);
3683 ena_mask &= ~icr0_remaining;
3688 /* re-enable interrupt causes */
3689 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3690 if (!test_bit(__I40E_DOWN, &pf->state)) {
3691 i40e_service_event_schedule(pf);
3692 i40e_irq_dynamic_enable_icr0(pf, false);
3699 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3700 * @tx_ring: tx ring to clean
3701 * @budget: how many cleans we're allowed
3703 * Returns true if there's any budget left (e.g. the clean is finished)
3705 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3707 struct i40e_vsi *vsi = tx_ring->vsi;
3708 u16 i = tx_ring->next_to_clean;
3709 struct i40e_tx_buffer *tx_buf;
3710 struct i40e_tx_desc *tx_desc;
3712 tx_buf = &tx_ring->tx_bi[i];
3713 tx_desc = I40E_TX_DESC(tx_ring, i);
3714 i -= tx_ring->count;
3717 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3719 /* if next_to_watch is not set then there is no work pending */
3723 /* prevent any other reads prior to eop_desc */
3724 read_barrier_depends();
3726 /* if the descriptor isn't done, no work yet to do */
3727 if (!(eop_desc->cmd_type_offset_bsz &
3728 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3731 /* clear next_to_watch to prevent false hangs */
3732 tx_buf->next_to_watch = NULL;
3734 tx_desc->buffer_addr = 0;
3735 tx_desc->cmd_type_offset_bsz = 0;
3736 /* move past filter desc */
3741 i -= tx_ring->count;
3742 tx_buf = tx_ring->tx_bi;
3743 tx_desc = I40E_TX_DESC(tx_ring, 0);
3745 /* unmap skb header data */
3746 dma_unmap_single(tx_ring->dev,
3747 dma_unmap_addr(tx_buf, dma),
3748 dma_unmap_len(tx_buf, len),
3750 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3751 kfree(tx_buf->raw_buf);
3753 tx_buf->raw_buf = NULL;
3754 tx_buf->tx_flags = 0;
3755 tx_buf->next_to_watch = NULL;
3756 dma_unmap_len_set(tx_buf, len, 0);
3757 tx_desc->buffer_addr = 0;
3758 tx_desc->cmd_type_offset_bsz = 0;
3760 /* move us past the eop_desc for start of next FD desc */
3765 i -= tx_ring->count;
3766 tx_buf = tx_ring->tx_bi;
3767 tx_desc = I40E_TX_DESC(tx_ring, 0);
3770 /* update budget accounting */
3772 } while (likely(budget));
3774 i += tx_ring->count;
3775 tx_ring->next_to_clean = i;
3777 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3778 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3784 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3785 * @irq: interrupt number
3786 * @data: pointer to a q_vector
3788 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3790 struct i40e_q_vector *q_vector = data;
3791 struct i40e_vsi *vsi;
3793 if (!q_vector->tx.ring)
3796 vsi = q_vector->tx.ring->vsi;
3797 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3803 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3804 * @vsi: the VSI being configured
3805 * @v_idx: vector index
3806 * @qp_idx: queue pair index
3808 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3810 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3811 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3812 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3814 tx_ring->q_vector = q_vector;
3815 tx_ring->next = q_vector->tx.ring;
3816 q_vector->tx.ring = tx_ring;
3817 q_vector->tx.count++;
3819 rx_ring->q_vector = q_vector;
3820 rx_ring->next = q_vector->rx.ring;
3821 q_vector->rx.ring = rx_ring;
3822 q_vector->rx.count++;
3826 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3827 * @vsi: the VSI being configured
3829 * This function maps descriptor rings to the queue-specific vectors
3830 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3831 * one vector per queue pair, but on a constrained vector budget, we
3832 * group the queue pairs as "efficiently" as possible.
3834 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3836 int qp_remaining = vsi->num_queue_pairs;
3837 int q_vectors = vsi->num_q_vectors;
3842 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3843 * group them so there are multiple queues per vector.
3844 * It is also important to go through all the vectors available to be
3845 * sure that if we don't use all the vectors, that the remaining vectors
3846 * are cleared. This is especially important when decreasing the
3847 * number of queues in use.
3849 for (; v_start < q_vectors; v_start++) {
3850 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3852 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3854 q_vector->num_ringpairs = num_ringpairs;
3856 q_vector->rx.count = 0;
3857 q_vector->tx.count = 0;
3858 q_vector->rx.ring = NULL;
3859 q_vector->tx.ring = NULL;
3861 while (num_ringpairs--) {
3862 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3870 * i40e_vsi_request_irq - Request IRQ from the OS
3871 * @vsi: the VSI being configured
3872 * @basename: name for the vector
3874 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3876 struct i40e_pf *pf = vsi->back;
3879 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3880 err = i40e_vsi_request_irq_msix(vsi, basename);
3881 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3882 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3885 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3889 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3894 #ifdef CONFIG_NET_POLL_CONTROLLER
3896 * i40e_netpoll - A Polling 'interrupt' handler
3897 * @netdev: network interface device structure
3899 * This is used by netconsole to send skbs without having to re-enable
3900 * interrupts. It's not called while the normal interrupt routine is executing.
3902 static void i40e_netpoll(struct net_device *netdev)
3904 struct i40e_netdev_priv *np = netdev_priv(netdev);
3905 struct i40e_vsi *vsi = np->vsi;
3906 struct i40e_pf *pf = vsi->back;
3909 /* if interface is down do nothing */
3910 if (test_bit(__I40E_DOWN, &vsi->state))
3913 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3914 for (i = 0; i < vsi->num_q_vectors; i++)
3915 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3917 i40e_intr(pf->pdev->irq, netdev);
3922 #define I40E_QTX_ENA_WAIT_COUNT 50
3925 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3926 * @pf: the PF being configured
3927 * @pf_q: the PF queue
3928 * @enable: enable or disable state of the queue
3930 * This routine will wait for the given Tx queue of the PF to reach the
3931 * enabled or disabled state.
3932 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3933 * multiple retries; else will return 0 in case of success.
3935 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3940 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3941 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3942 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3945 usleep_range(10, 20);
3947 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3954 * i40e_control_tx_q - Start or stop a particular Tx queue
3955 * @pf: the PF structure
3956 * @pf_q: the PF queue to configure
3957 * @enable: start or stop the queue
3959 * This function enables or disables a single queue. Note that any delay
3960 * required after the operation is expected to be handled by the caller of
3963 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
3965 struct i40e_hw *hw = &pf->hw;
3969 /* warn the TX unit of coming changes */
3970 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3972 usleep_range(10, 20);
3974 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
3975 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3976 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3977 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3979 usleep_range(1000, 2000);
3982 /* Skip if the queue is already in the requested state */
3983 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3986 /* turn on/off the queue */
3988 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3989 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3991 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3994 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3998 * i40e_vsi_control_tx - Start or stop a VSI's rings
3999 * @vsi: the VSI being configured
4000 * @enable: start or stop the rings
4002 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4004 struct i40e_pf *pf = vsi->back;
4005 int i, pf_q, ret = 0;
4007 pf_q = vsi->base_queue;
4008 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4009 i40e_control_tx_q(pf, pf_q, enable);
4011 /* wait for the change to finish */
4012 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4014 dev_info(&pf->pdev->dev,
4015 "VSI seid %d Tx ring %d %sable timeout\n",
4016 vsi->seid, pf_q, (enable ? "en" : "dis"));
4025 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4026 * @pf: the PF being configured
4027 * @pf_q: the PF queue
4028 * @enable: enable or disable state of the queue
4030 * This routine will wait for the given Rx queue of the PF to reach the
4031 * enabled or disabled state.
4032 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4033 * multiple retries; else will return 0 in case of success.
4035 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4040 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4041 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4042 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4045 usleep_range(10, 20);
4047 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4054 * i40e_control_rx_q - Start or stop a particular Rx queue
4055 * @pf: the PF structure
4056 * @pf_q: the PF queue to configure
4057 * @enable: start or stop the queue
4059 * This function enables or disables a single queue. Note that any delay
4060 * required after the operation is expected to be handled by the caller of
4063 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4065 struct i40e_hw *hw = &pf->hw;
4069 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4070 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4071 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4072 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4074 usleep_range(1000, 2000);
4077 /* Skip if the queue is already in the requested state */
4078 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4081 /* turn on/off the queue */
4083 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4085 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4087 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4091 * i40e_vsi_control_rx - Start or stop a VSI's rings
4092 * @vsi: the VSI being configured
4093 * @enable: start or stop the rings
4095 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4097 struct i40e_pf *pf = vsi->back;
4098 int i, pf_q, ret = 0;
4100 pf_q = vsi->base_queue;
4101 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4102 i40e_control_rx_q(pf, pf_q, enable);
4104 /* wait for the change to finish */
4105 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4107 dev_info(&pf->pdev->dev,
4108 "VSI seid %d Rx ring %d %sable timeout\n",
4109 vsi->seid, pf_q, (enable ? "en" : "dis"));
4114 /* Due to HW errata, on Rx disable only, the register can indicate done
4115 * before it really is. Needs 50ms to be sure
4124 * i40e_vsi_start_rings - Start a VSI's rings
4125 * @vsi: the VSI being configured
4127 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4131 /* do rx first for enable and last for disable */
4132 ret = i40e_vsi_control_rx(vsi, true);
4135 ret = i40e_vsi_control_tx(vsi, true);
4141 * i40e_vsi_stop_rings - Stop a VSI's rings
4142 * @vsi: the VSI being configured
4144 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4146 /* When port TX is suspended, don't wait */
4147 if (test_bit(__I40E_PORT_SUSPENDED, &vsi->back->state))
4148 return i40e_vsi_stop_rings_no_wait(vsi);
4150 /* do rx first for enable and last for disable
4151 * Ignore return value, we need to shutdown whatever we can
4153 i40e_vsi_control_tx(vsi, false);
4154 i40e_vsi_control_rx(vsi, false);
4158 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4159 * @vsi: the VSI being shutdown
4161 * This function stops all the rings for a VSI but does not delay to verify
4162 * that rings have been disabled. It is expected that the caller is shutting
4163 * down multiple VSIs at once and will delay together for all the VSIs after
4164 * initiating the shutdown. This is particularly useful for shutting down lots
4165 * of VFs together. Otherwise, a large delay can be incurred while configuring
4166 * each VSI in serial.
4168 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4170 struct i40e_pf *pf = vsi->back;
4173 pf_q = vsi->base_queue;
4174 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4175 i40e_control_tx_q(pf, pf_q, false);
4176 i40e_control_rx_q(pf, pf_q, false);
4181 * i40e_vsi_free_irq - Free the irq association with the OS
4182 * @vsi: the VSI being configured
4184 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4186 struct i40e_pf *pf = vsi->back;
4187 struct i40e_hw *hw = &pf->hw;
4188 int base = vsi->base_vector;
4192 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4193 if (!vsi->q_vectors)
4196 if (!vsi->irqs_ready)
4199 vsi->irqs_ready = false;
4200 for (i = 0; i < vsi->num_q_vectors; i++) {
4205 irq_num = pf->msix_entries[vector].vector;
4207 /* free only the irqs that were actually requested */
4208 if (!vsi->q_vectors[i] ||
4209 !vsi->q_vectors[i]->num_ringpairs)
4212 /* clear the affinity notifier in the IRQ descriptor */
4213 irq_set_affinity_notifier(irq_num, NULL);
4214 /* clear the affinity_mask in the IRQ descriptor */
4215 irq_set_affinity_hint(irq_num, NULL);
4216 synchronize_irq(irq_num);
4217 free_irq(irq_num, vsi->q_vectors[i]);
4219 /* Tear down the interrupt queue link list
4221 * We know that they come in pairs and always
4222 * the Rx first, then the Tx. To clear the
4223 * link list, stick the EOL value into the
4224 * next_q field of the registers.
4226 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4227 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4228 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4229 val |= I40E_QUEUE_END_OF_LIST
4230 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4231 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4233 while (qp != I40E_QUEUE_END_OF_LIST) {
4236 val = rd32(hw, I40E_QINT_RQCTL(qp));
4238 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4239 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4240 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4241 I40E_QINT_RQCTL_INTEVENT_MASK);
4243 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4244 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4246 wr32(hw, I40E_QINT_RQCTL(qp), val);
4248 val = rd32(hw, I40E_QINT_TQCTL(qp));
4250 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4251 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4253 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4254 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4255 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4256 I40E_QINT_TQCTL_INTEVENT_MASK);
4258 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4259 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4261 wr32(hw, I40E_QINT_TQCTL(qp), val);
4266 free_irq(pf->pdev->irq, pf);
4268 val = rd32(hw, I40E_PFINT_LNKLST0);
4269 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4270 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4271 val |= I40E_QUEUE_END_OF_LIST
4272 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4273 wr32(hw, I40E_PFINT_LNKLST0, val);
4275 val = rd32(hw, I40E_QINT_RQCTL(qp));
4276 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4277 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4278 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4279 I40E_QINT_RQCTL_INTEVENT_MASK);
4281 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4282 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4284 wr32(hw, I40E_QINT_RQCTL(qp), val);
4286 val = rd32(hw, I40E_QINT_TQCTL(qp));
4288 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4289 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4290 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4291 I40E_QINT_TQCTL_INTEVENT_MASK);
4293 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4294 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4296 wr32(hw, I40E_QINT_TQCTL(qp), val);
4301 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4302 * @vsi: the VSI being configured
4303 * @v_idx: Index of vector to be freed
4305 * This function frees the memory allocated to the q_vector. In addition if
4306 * NAPI is enabled it will delete any references to the NAPI struct prior
4307 * to freeing the q_vector.
4309 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4311 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4312 struct i40e_ring *ring;
4317 /* disassociate q_vector from rings */
4318 i40e_for_each_ring(ring, q_vector->tx)
4319 ring->q_vector = NULL;
4321 i40e_for_each_ring(ring, q_vector->rx)
4322 ring->q_vector = NULL;
4324 /* only VSI w/ an associated netdev is set up w/ NAPI */
4326 netif_napi_del(&q_vector->napi);
4328 vsi->q_vectors[v_idx] = NULL;
4330 kfree_rcu(q_vector, rcu);
4334 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4335 * @vsi: the VSI being un-configured
4337 * This frees the memory allocated to the q_vectors and
4338 * deletes references to the NAPI struct.
4340 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4344 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4345 i40e_free_q_vector(vsi, v_idx);
4349 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4350 * @pf: board private structure
4352 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4354 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4355 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4356 pci_disable_msix(pf->pdev);
4357 kfree(pf->msix_entries);
4358 pf->msix_entries = NULL;
4359 kfree(pf->irq_pile);
4360 pf->irq_pile = NULL;
4361 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4362 pci_disable_msi(pf->pdev);
4364 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4368 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4369 * @pf: board private structure
4371 * We go through and clear interrupt specific resources and reset the structure
4372 * to pre-load conditions
4374 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4378 i40e_stop_misc_vector(pf);
4379 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4380 synchronize_irq(pf->msix_entries[0].vector);
4381 free_irq(pf->msix_entries[0].vector, pf);
4384 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4385 I40E_IWARP_IRQ_PILE_ID);
4387 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4388 for (i = 0; i < pf->num_alloc_vsi; i++)
4390 i40e_vsi_free_q_vectors(pf->vsi[i]);
4391 i40e_reset_interrupt_capability(pf);
4395 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4396 * @vsi: the VSI being configured
4398 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4405 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4406 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4408 if (q_vector->rx.ring || q_vector->tx.ring)
4409 napi_enable(&q_vector->napi);
4414 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4415 * @vsi: the VSI being configured
4417 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4424 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4425 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4427 if (q_vector->rx.ring || q_vector->tx.ring)
4428 napi_disable(&q_vector->napi);
4433 * i40e_vsi_close - Shut down a VSI
4434 * @vsi: the vsi to be quelled
4436 static void i40e_vsi_close(struct i40e_vsi *vsi)
4438 struct i40e_pf *pf = vsi->back;
4439 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4441 i40e_vsi_free_irq(vsi);
4442 i40e_vsi_free_tx_resources(vsi);
4443 i40e_vsi_free_rx_resources(vsi);
4444 vsi->current_netdev_flags = 0;
4445 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
4446 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
4447 pf->flags |= I40E_FLAG_CLIENT_RESET;
4451 * i40e_quiesce_vsi - Pause a given VSI
4452 * @vsi: the VSI being paused
4454 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4456 if (test_bit(__I40E_DOWN, &vsi->state))
4459 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4460 if (vsi->netdev && netif_running(vsi->netdev))
4461 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4463 i40e_vsi_close(vsi);
4467 * i40e_unquiesce_vsi - Resume a given VSI
4468 * @vsi: the VSI being resumed
4470 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4472 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4475 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4476 if (vsi->netdev && netif_running(vsi->netdev))
4477 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4479 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4483 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4486 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4490 for (v = 0; v < pf->num_alloc_vsi; v++) {
4492 i40e_quiesce_vsi(pf->vsi[v]);
4497 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4500 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4504 for (v = 0; v < pf->num_alloc_vsi; v++) {
4506 i40e_unquiesce_vsi(pf->vsi[v]);
4511 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4512 * @vsi: the VSI being configured
4514 * Wait until all queues on a given VSI have been disabled.
4516 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4518 struct i40e_pf *pf = vsi->back;
4521 pf_q = vsi->base_queue;
4522 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4523 /* Check and wait for the Tx queue */
4524 ret = i40e_pf_txq_wait(pf, pf_q, false);
4526 dev_info(&pf->pdev->dev,
4527 "VSI seid %d Tx ring %d disable timeout\n",
4531 /* Check and wait for the Tx queue */
4532 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4534 dev_info(&pf->pdev->dev,
4535 "VSI seid %d Rx ring %d disable timeout\n",
4544 #ifdef CONFIG_I40E_DCB
4546 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4549 * This function waits for the queues to be in disabled state for all the
4550 * VSIs that are managed by this PF.
4552 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4556 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4558 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4570 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4571 * @q_idx: TX queue number
4572 * @vsi: Pointer to VSI struct
4574 * This function checks specified queue for given VSI. Detects hung condition.
4575 * We proactively detect hung TX queues by checking if interrupts are disabled
4576 * but there are pending descriptors. If it appears hung, attempt to recover
4577 * by triggering a SW interrupt.
4579 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4581 struct i40e_ring *tx_ring = NULL;
4583 u32 val, tx_pending;
4588 /* now that we have an index, find the tx_ring struct */
4589 for (i = 0; i < vsi->num_queue_pairs; i++) {
4590 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4591 if (q_idx == vsi->tx_rings[i]->queue_index) {
4592 tx_ring = vsi->tx_rings[i];
4601 /* Read interrupt register */
4602 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4604 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4605 tx_ring->vsi->base_vector - 1));
4607 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4609 tx_pending = i40e_get_tx_pending(tx_ring);
4611 /* Interrupts are disabled and TX pending is non-zero,
4612 * trigger the SW interrupt (don't wait). Worst case
4613 * there will be one extra interrupt which may result
4614 * into not cleaning any queues because queues are cleaned.
4616 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4617 i40e_force_wb(vsi, tx_ring->q_vector);
4621 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4622 * @pf: pointer to PF struct
4624 * LAN VSI has netdev and netdev has TX queues. This function is to check
4625 * each of those TX queues if they are hung, trigger recovery by issuing
4628 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4630 struct net_device *netdev;
4631 struct i40e_vsi *vsi;
4634 /* Only for LAN VSI */
4635 vsi = pf->vsi[pf->lan_vsi];
4640 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4641 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4642 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4645 /* Make sure type is MAIN VSI */
4646 if (vsi->type != I40E_VSI_MAIN)
4649 netdev = vsi->netdev;
4653 /* Bail out if netif_carrier is not OK */
4654 if (!netif_carrier_ok(netdev))
4657 /* Go thru' TX queues for netdev */
4658 for (i = 0; i < netdev->num_tx_queues; i++) {
4659 struct netdev_queue *q;
4661 q = netdev_get_tx_queue(netdev, i);
4663 i40e_detect_recover_hung_queue(i, vsi);
4668 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4669 * @pf: pointer to PF
4671 * Get TC map for ISCSI PF type that will include iSCSI TC
4674 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4676 struct i40e_dcb_app_priority_table app;
4677 struct i40e_hw *hw = &pf->hw;
4678 u8 enabled_tc = 1; /* TC0 is always enabled */
4680 /* Get the iSCSI APP TLV */
4681 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4683 for (i = 0; i < dcbcfg->numapps; i++) {
4684 app = dcbcfg->app[i];
4685 if (app.selector == I40E_APP_SEL_TCPIP &&
4686 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4687 tc = dcbcfg->etscfg.prioritytable[app.priority];
4688 enabled_tc |= BIT(tc);
4697 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4698 * @dcbcfg: the corresponding DCBx configuration structure
4700 * Return the number of TCs from given DCBx configuration
4702 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4704 int i, tc_unused = 0;
4708 /* Scan the ETS Config Priority Table to find
4709 * traffic class enabled for a given priority
4710 * and create a bitmask of enabled TCs
4712 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4713 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4715 /* Now scan the bitmask to check for
4716 * contiguous TCs starting with TC0
4718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4719 if (num_tc & BIT(i)) {
4723 pr_err("Non-contiguous TC - Disabling DCB\n");
4731 /* There is always at least TC0 */
4739 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4740 * @dcbcfg: the corresponding DCBx configuration structure
4742 * Query the current DCB configuration and return the number of
4743 * traffic classes enabled from the given DCBX config
4745 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4747 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4751 for (i = 0; i < num_tc; i++)
4752 enabled_tc |= BIT(i);
4758 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4759 * @pf: PF being queried
4761 * Return number of traffic classes enabled for the given PF
4763 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4765 struct i40e_hw *hw = &pf->hw;
4766 u8 i, enabled_tc = 1;
4768 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4770 /* If DCB is not enabled then always in single TC */
4771 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4774 /* SFP mode will be enabled for all TCs on port */
4775 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4776 return i40e_dcb_get_num_tc(dcbcfg);
4778 /* MFP mode return count of enabled TCs for this PF */
4779 if (pf->hw.func_caps.iscsi)
4780 enabled_tc = i40e_get_iscsi_tc_map(pf);
4782 return 1; /* Only TC0 */
4784 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4785 if (enabled_tc & BIT(i))
4792 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4793 * @pf: PF being queried
4795 * Return a bitmap for enabled traffic classes for this PF.
4797 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4799 /* If DCB is not enabled for this PF then just return default TC */
4800 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4801 return I40E_DEFAULT_TRAFFIC_CLASS;
4803 /* SFP mode we want PF to be enabled for all TCs */
4804 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4805 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4807 /* MFP enabled and iSCSI PF type */
4808 if (pf->hw.func_caps.iscsi)
4809 return i40e_get_iscsi_tc_map(pf);
4811 return I40E_DEFAULT_TRAFFIC_CLASS;
4815 * i40e_vsi_get_bw_info - Query VSI BW Information
4816 * @vsi: the VSI being queried
4818 * Returns 0 on success, negative value on failure
4820 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4822 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4823 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4824 struct i40e_pf *pf = vsi->back;
4825 struct i40e_hw *hw = &pf->hw;
4830 /* Get the VSI level BW configuration */
4831 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4833 dev_info(&pf->pdev->dev,
4834 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4835 i40e_stat_str(&pf->hw, ret),
4836 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4840 /* Get the VSI level BW configuration per TC */
4841 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4844 dev_info(&pf->pdev->dev,
4845 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4846 i40e_stat_str(&pf->hw, ret),
4847 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4851 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4852 dev_info(&pf->pdev->dev,
4853 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4854 bw_config.tc_valid_bits,
4855 bw_ets_config.tc_valid_bits);
4856 /* Still continuing */
4859 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4860 vsi->bw_max_quanta = bw_config.max_bw;
4861 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4862 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4863 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4864 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4865 vsi->bw_ets_limit_credits[i] =
4866 le16_to_cpu(bw_ets_config.credits[i]);
4867 /* 3 bits out of 4 for each TC */
4868 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4875 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4876 * @vsi: the VSI being configured
4877 * @enabled_tc: TC bitmap
4878 * @bw_credits: BW shared credits per TC
4880 * Returns 0 on success, negative value on failure
4882 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4885 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4889 bw_data.tc_valid_bits = enabled_tc;
4890 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4891 bw_data.tc_bw_credits[i] = bw_share[i];
4893 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4896 dev_info(&vsi->back->pdev->dev,
4897 "AQ command Config VSI BW allocation per TC failed = %d\n",
4898 vsi->back->hw.aq.asq_last_status);
4902 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4903 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4909 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4910 * @vsi: the VSI being configured
4911 * @enabled_tc: TC map to be enabled
4914 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4916 struct net_device *netdev = vsi->netdev;
4917 struct i40e_pf *pf = vsi->back;
4918 struct i40e_hw *hw = &pf->hw;
4921 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4927 netdev_reset_tc(netdev);
4931 /* Set up actual enabled TCs on the VSI */
4932 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4935 /* set per TC queues for the VSI */
4936 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4937 /* Only set TC queues for enabled tcs
4939 * e.g. For a VSI that has TC0 and TC3 enabled the
4940 * enabled_tc bitmap would be 0x00001001; the driver
4941 * will set the numtc for netdev as 2 that will be
4942 * referenced by the netdev layer as TC 0 and 1.
4944 if (vsi->tc_config.enabled_tc & BIT(i))
4945 netdev_set_tc_queue(netdev,
4946 vsi->tc_config.tc_info[i].netdev_tc,
4947 vsi->tc_config.tc_info[i].qcount,
4948 vsi->tc_config.tc_info[i].qoffset);
4951 /* Assign UP2TC map for the VSI */
4952 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4953 /* Get the actual TC# for the UP */
4954 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4955 /* Get the mapped netdev TC# for the UP */
4956 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4957 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4962 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4963 * @vsi: the VSI being configured
4964 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4966 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4967 struct i40e_vsi_context *ctxt)
4969 /* copy just the sections touched not the entire info
4970 * since not all sections are valid as returned by
4973 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4974 memcpy(&vsi->info.queue_mapping,
4975 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4976 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4977 sizeof(vsi->info.tc_mapping));
4981 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4982 * @vsi: VSI to be configured
4983 * @enabled_tc: TC bitmap
4985 * This configures a particular VSI for TCs that are mapped to the
4986 * given TC bitmap. It uses default bandwidth share for TCs across
4987 * VSIs to configure TC for a particular VSI.
4990 * It is expected that the VSI queues have been quisced before calling
4993 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4995 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4996 struct i40e_vsi_context ctxt;
5000 /* Check if enabled_tc is same as existing or new TCs */
5001 if (vsi->tc_config.enabled_tc == enabled_tc)
5004 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5005 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5006 if (enabled_tc & BIT(i))
5010 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5012 dev_info(&vsi->back->pdev->dev,
5013 "Failed configuring TC map %d for VSI %d\n",
5014 enabled_tc, vsi->seid);
5018 /* Update Queue Pairs Mapping for currently enabled UPs */
5019 ctxt.seid = vsi->seid;
5020 ctxt.pf_num = vsi->back->hw.pf_id;
5022 ctxt.uplink_seid = vsi->uplink_seid;
5023 ctxt.info = vsi->info;
5024 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5026 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5027 ctxt.info.valid_sections |=
5028 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5029 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5032 /* Update the VSI after updating the VSI queue-mapping information */
5033 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
5035 dev_info(&vsi->back->pdev->dev,
5036 "Update vsi tc config failed, err %s aq_err %s\n",
5037 i40e_stat_str(&vsi->back->hw, ret),
5038 i40e_aq_str(&vsi->back->hw,
5039 vsi->back->hw.aq.asq_last_status));
5042 /* update the local VSI info with updated queue map */
5043 i40e_vsi_update_queue_map(vsi, &ctxt);
5044 vsi->info.valid_sections = 0;
5046 /* Update current VSI BW information */
5047 ret = i40e_vsi_get_bw_info(vsi);
5049 dev_info(&vsi->back->pdev->dev,
5050 "Failed updating vsi bw info, err %s aq_err %s\n",
5051 i40e_stat_str(&vsi->back->hw, ret),
5052 i40e_aq_str(&vsi->back->hw,
5053 vsi->back->hw.aq.asq_last_status));
5057 /* Update the netdev TC setup */
5058 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5064 * i40e_veb_config_tc - Configure TCs for given VEB
5066 * @enabled_tc: TC bitmap
5068 * Configures given TC bitmap for VEB (switching) element
5070 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
5072 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
5073 struct i40e_pf *pf = veb->pf;
5077 /* No TCs or already enabled TCs just return */
5078 if (!enabled_tc || veb->enabled_tc == enabled_tc)
5081 bw_data.tc_valid_bits = enabled_tc;
5082 /* bw_data.absolute_credits is not set (relative) */
5084 /* Enable ETS TCs with equal BW Share for now */
5085 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5086 if (enabled_tc & BIT(i))
5087 bw_data.tc_bw_share_credits[i] = 1;
5090 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
5093 dev_info(&pf->pdev->dev,
5094 "VEB bw config failed, err %s aq_err %s\n",
5095 i40e_stat_str(&pf->hw, ret),
5096 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5100 /* Update the BW information */
5101 ret = i40e_veb_get_bw_info(veb);
5103 dev_info(&pf->pdev->dev,
5104 "Failed getting veb bw config, err %s aq_err %s\n",
5105 i40e_stat_str(&pf->hw, ret),
5106 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5113 #ifdef CONFIG_I40E_DCB
5115 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
5118 * Reconfigure VEB/VSIs on a given PF; it is assumed that
5119 * the caller would've quiesce all the VSIs before calling
5122 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5128 /* Enable the TCs available on PF to all VEBs */
5129 tc_map = i40e_pf_get_tc_map(pf);
5130 for (v = 0; v < I40E_MAX_VEB; v++) {
5133 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5135 dev_info(&pf->pdev->dev,
5136 "Failed configuring TC for VEB seid=%d\n",
5138 /* Will try to configure as many components */
5142 /* Update each VSI */
5143 for (v = 0; v < pf->num_alloc_vsi; v++) {
5147 /* - Enable all TCs for the LAN VSI
5148 * - For all others keep them at TC0 for now
5150 if (v == pf->lan_vsi)
5151 tc_map = i40e_pf_get_tc_map(pf);
5153 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5155 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5157 dev_info(&pf->pdev->dev,
5158 "Failed configuring TC for VSI seid=%d\n",
5160 /* Will try to configure as many components */
5162 /* Re-configure VSI vectors based on updated TC map */
5163 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5164 if (pf->vsi[v]->netdev)
5165 i40e_dcbnl_set_all(pf->vsi[v]);
5171 * i40e_resume_port_tx - Resume port Tx
5174 * Resume a port's Tx and issue a PF reset in case of failure to
5177 static int i40e_resume_port_tx(struct i40e_pf *pf)
5179 struct i40e_hw *hw = &pf->hw;
5182 ret = i40e_aq_resume_port_tx(hw, NULL);
5184 dev_info(&pf->pdev->dev,
5185 "Resume Port Tx failed, err %s aq_err %s\n",
5186 i40e_stat_str(&pf->hw, ret),
5187 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5188 /* Schedule PF reset to recover */
5189 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5190 i40e_service_event_schedule(pf);
5197 * i40e_init_pf_dcb - Initialize DCB configuration
5198 * @pf: PF being configured
5200 * Query the current DCB configuration and cache it
5201 * in the hardware structure
5203 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5205 struct i40e_hw *hw = &pf->hw;
5208 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5209 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5212 /* Get the initial DCB configuration */
5213 err = i40e_init_dcb(hw);
5215 /* Device/Function is not DCBX capable */
5216 if ((!hw->func_caps.dcb) ||
5217 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5218 dev_info(&pf->pdev->dev,
5219 "DCBX offload is not supported or is disabled for this PF.\n");
5221 /* When status is not DISABLED then DCBX in FW */
5222 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5223 DCB_CAP_DCBX_VER_IEEE;
5225 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5226 /* Enable DCB tagging only when more than one TC
5227 * or explicitly disable if only one TC
5229 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5230 pf->flags |= I40E_FLAG_DCB_ENABLED;
5232 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5233 dev_dbg(&pf->pdev->dev,
5234 "DCBX offload is supported for this PF.\n");
5237 dev_info(&pf->pdev->dev,
5238 "Query for DCB configuration failed, err %s aq_err %s\n",
5239 i40e_stat_str(&pf->hw, err),
5240 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5246 #endif /* CONFIG_I40E_DCB */
5247 #define SPEED_SIZE 14
5250 * i40e_print_link_message - print link up or down
5251 * @vsi: the VSI for which link needs a message
5253 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5255 enum i40e_aq_link_speed new_speed;
5256 char *speed = "Unknown";
5257 char *fc = "Unknown";
5261 new_speed = vsi->back->hw.phy.link_info.link_speed;
5263 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
5265 vsi->current_isup = isup;
5266 vsi->current_speed = new_speed;
5268 netdev_info(vsi->netdev, "NIC Link is Down\n");
5272 /* Warn user if link speed on NPAR enabled partition is not at
5275 if (vsi->back->hw.func_caps.npar_enable &&
5276 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5277 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5278 netdev_warn(vsi->netdev,
5279 "The partition detected link speed that is less than 10Gbps\n");
5281 switch (vsi->back->hw.phy.link_info.link_speed) {
5282 case I40E_LINK_SPEED_40GB:
5285 case I40E_LINK_SPEED_20GB:
5288 case I40E_LINK_SPEED_25GB:
5291 case I40E_LINK_SPEED_10GB:
5294 case I40E_LINK_SPEED_1GB:
5297 case I40E_LINK_SPEED_100MB:
5304 switch (vsi->back->hw.fc.current_mode) {
5308 case I40E_FC_TX_PAUSE:
5311 case I40E_FC_RX_PAUSE:
5319 if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
5320 fec = ", FEC: None";
5321 an = ", Autoneg: False";
5323 if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
5324 an = ", Autoneg: True";
5326 if (vsi->back->hw.phy.link_info.fec_info &
5327 I40E_AQ_CONFIG_FEC_KR_ENA)
5328 fec = ", FEC: CL74 FC-FEC/BASE-R";
5329 else if (vsi->back->hw.phy.link_info.fec_info &
5330 I40E_AQ_CONFIG_FEC_RS_ENA)
5331 fec = ", FEC: CL108 RS-FEC";
5334 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n",
5335 speed, fec, an, fc);
5339 * i40e_up_complete - Finish the last steps of bringing up a connection
5340 * @vsi: the VSI being configured
5342 static int i40e_up_complete(struct i40e_vsi *vsi)
5344 struct i40e_pf *pf = vsi->back;
5347 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5348 i40e_vsi_configure_msix(vsi);
5350 i40e_configure_msi_and_legacy(vsi);
5353 err = i40e_vsi_start_rings(vsi);
5357 clear_bit(__I40E_DOWN, &vsi->state);
5358 i40e_napi_enable_all(vsi);
5359 i40e_vsi_enable_irq(vsi);
5361 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5363 i40e_print_link_message(vsi, true);
5364 netif_tx_start_all_queues(vsi->netdev);
5365 netif_carrier_on(vsi->netdev);
5366 } else if (vsi->netdev) {
5367 i40e_print_link_message(vsi, false);
5368 /* need to check for qualified module here*/
5369 if ((pf->hw.phy.link_info.link_info &
5370 I40E_AQ_MEDIA_AVAILABLE) &&
5371 (!(pf->hw.phy.link_info.an_info &
5372 I40E_AQ_QUALIFIED_MODULE)))
5373 netdev_err(vsi->netdev,
5374 "the driver failed to link because an unqualified module was detected.");
5377 /* replay FDIR SB filters */
5378 if (vsi->type == I40E_VSI_FDIR) {
5379 /* reset fd counters */
5382 i40e_fdir_filter_restore(vsi);
5385 /* On the next run of the service_task, notify any clients of the new
5388 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5389 i40e_service_event_schedule(pf);
5395 * i40e_vsi_reinit_locked - Reset the VSI
5396 * @vsi: the VSI being configured
5398 * Rebuild the ring structs after some configuration
5399 * has changed, e.g. MTU size.
5401 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5403 struct i40e_pf *pf = vsi->back;
5405 WARN_ON(in_interrupt());
5406 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5407 usleep_range(1000, 2000);
5411 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5415 * i40e_up - Bring the connection back up after being down
5416 * @vsi: the VSI being configured
5418 int i40e_up(struct i40e_vsi *vsi)
5422 err = i40e_vsi_configure(vsi);
5424 err = i40e_up_complete(vsi);
5430 * i40e_down - Shutdown the connection processing
5431 * @vsi: the VSI being stopped
5433 void i40e_down(struct i40e_vsi *vsi)
5437 /* It is assumed that the caller of this function
5438 * sets the vsi->state __I40E_DOWN bit.
5441 netif_carrier_off(vsi->netdev);
5442 netif_tx_disable(vsi->netdev);
5444 i40e_vsi_disable_irq(vsi);
5445 i40e_vsi_stop_rings(vsi);
5446 i40e_napi_disable_all(vsi);
5448 for (i = 0; i < vsi->num_queue_pairs; i++) {
5449 i40e_clean_tx_ring(vsi->tx_rings[i]);
5450 i40e_clean_rx_ring(vsi->rx_rings[i]);
5456 * i40e_setup_tc - configure multiple traffic classes
5457 * @netdev: net device to configure
5458 * @tc: number of traffic classes to enable
5460 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5462 struct i40e_netdev_priv *np = netdev_priv(netdev);
5463 struct i40e_vsi *vsi = np->vsi;
5464 struct i40e_pf *pf = vsi->back;
5469 /* Check if DCB enabled to continue */
5470 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5471 netdev_info(netdev, "DCB is not enabled for adapter\n");
5475 /* Check if MFP enabled */
5476 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5477 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5481 /* Check whether tc count is within enabled limit */
5482 if (tc > i40e_pf_get_num_tc(pf)) {
5483 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5487 /* Generate TC map for number of tc requested */
5488 for (i = 0; i < tc; i++)
5489 enabled_tc |= BIT(i);
5491 /* Requesting same TC configuration as already enabled */
5492 if (enabled_tc == vsi->tc_config.enabled_tc)
5495 /* Quiesce VSI queues */
5496 i40e_quiesce_vsi(vsi);
5498 /* Configure VSI for enabled TCs */
5499 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5501 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5507 i40e_unquiesce_vsi(vsi);
5513 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5514 struct tc_to_netdev *tc)
5516 if (tc->type != TC_SETUP_MQPRIO)
5519 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
5521 return i40e_setup_tc(netdev, tc->mqprio->num_tc);
5525 * i40e_open - Called when a network interface is made active
5526 * @netdev: network interface device structure
5528 * The open entry point is called when a network interface is made
5529 * active by the system (IFF_UP). At this point all resources needed
5530 * for transmit and receive operations are allocated, the interrupt
5531 * handler is registered with the OS, the netdev watchdog subtask is
5532 * enabled, and the stack is notified that the interface is ready.
5534 * Returns 0 on success, negative value on failure
5536 int i40e_open(struct net_device *netdev)
5538 struct i40e_netdev_priv *np = netdev_priv(netdev);
5539 struct i40e_vsi *vsi = np->vsi;
5540 struct i40e_pf *pf = vsi->back;
5543 /* disallow open during test or if eeprom is broken */
5544 if (test_bit(__I40E_TESTING, &pf->state) ||
5545 test_bit(__I40E_BAD_EEPROM, &pf->state))
5548 netif_carrier_off(netdev);
5550 err = i40e_vsi_open(vsi);
5554 /* configure global TSO hardware offload settings */
5555 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5556 TCP_FLAG_FIN) >> 16);
5557 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5559 TCP_FLAG_CWR) >> 16);
5560 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5562 udp_tunnel_get_rx_info(netdev);
5569 * @vsi: the VSI to open
5571 * Finish initialization of the VSI.
5573 * Returns 0 on success, negative value on failure
5575 * Note: expects to be called while under rtnl_lock()
5577 int i40e_vsi_open(struct i40e_vsi *vsi)
5579 struct i40e_pf *pf = vsi->back;
5580 char int_name[I40E_INT_NAME_STR_LEN];
5583 /* allocate descriptors */
5584 err = i40e_vsi_setup_tx_resources(vsi);
5587 err = i40e_vsi_setup_rx_resources(vsi);
5591 err = i40e_vsi_configure(vsi);
5596 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5597 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5598 err = i40e_vsi_request_irq(vsi, int_name);
5602 /* Notify the stack of the actual queue counts. */
5603 err = netif_set_real_num_tx_queues(vsi->netdev,
5604 vsi->num_queue_pairs);
5606 goto err_set_queues;
5608 err = netif_set_real_num_rx_queues(vsi->netdev,
5609 vsi->num_queue_pairs);
5611 goto err_set_queues;
5613 } else if (vsi->type == I40E_VSI_FDIR) {
5614 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5615 dev_driver_string(&pf->pdev->dev),
5616 dev_name(&pf->pdev->dev));
5617 err = i40e_vsi_request_irq(vsi, int_name);
5624 err = i40e_up_complete(vsi);
5626 goto err_up_complete;
5633 i40e_vsi_free_irq(vsi);
5635 i40e_vsi_free_rx_resources(vsi);
5637 i40e_vsi_free_tx_resources(vsi);
5638 if (vsi == pf->vsi[pf->lan_vsi])
5639 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), true);
5645 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5646 * @pf: Pointer to PF
5648 * This function destroys the hlist where all the Flow Director
5649 * filters were saved.
5651 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5653 struct i40e_fdir_filter *filter;
5654 struct i40e_flex_pit *pit_entry, *tmp;
5655 struct hlist_node *node2;
5657 hlist_for_each_entry_safe(filter, node2,
5658 &pf->fdir_filter_list, fdir_node) {
5659 hlist_del(&filter->fdir_node);
5663 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
5664 list_del(&pit_entry->list);
5667 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
5669 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
5670 list_del(&pit_entry->list);
5673 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
5675 pf->fdir_pf_active_filters = 0;
5676 pf->fd_tcp4_filter_cnt = 0;
5677 pf->fd_udp4_filter_cnt = 0;
5678 pf->fd_sctp4_filter_cnt = 0;
5679 pf->fd_ip4_filter_cnt = 0;
5681 /* Reprogram the default input set for TCP/IPv4 */
5682 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
5683 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5684 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5686 /* Reprogram the default input set for UDP/IPv4 */
5687 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
5688 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5689 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5691 /* Reprogram the default input set for SCTP/IPv4 */
5692 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
5693 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5694 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5696 /* Reprogram the default input set for Other/IPv4 */
5697 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
5698 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
5702 * i40e_close - Disables a network interface
5703 * @netdev: network interface device structure
5705 * The close entry point is called when an interface is de-activated
5706 * by the OS. The hardware is still under the driver's control, but
5707 * this netdev interface is disabled.
5709 * Returns 0, this is not allowed to fail
5711 int i40e_close(struct net_device *netdev)
5713 struct i40e_netdev_priv *np = netdev_priv(netdev);
5714 struct i40e_vsi *vsi = np->vsi;
5716 i40e_vsi_close(vsi);
5722 * i40e_do_reset - Start a PF or Core Reset sequence
5723 * @pf: board private structure
5724 * @reset_flags: which reset is requested
5725 * @lock_acquired: indicates whether or not the lock has been acquired
5726 * before this function was called.
5728 * The essential difference in resets is that the PF Reset
5729 * doesn't clear the packet buffers, doesn't reset the PE
5730 * firmware, and doesn't bother the other PFs on the chip.
5732 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
5736 WARN_ON(in_interrupt());
5739 /* do the biggest reset indicated */
5740 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5742 /* Request a Global Reset
5744 * This will start the chip's countdown to the actual full
5745 * chip reset event, and a warning interrupt to be sent
5746 * to all PFs, including the requestor. Our handler
5747 * for the warning interrupt will deal with the shutdown
5748 * and recovery of the switch setup.
5750 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5751 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5752 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5753 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5755 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5757 /* Request a Core Reset
5759 * Same as Global Reset, except does *not* include the MAC/PHY
5761 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5762 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5763 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5764 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5765 i40e_flush(&pf->hw);
5767 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5769 /* Request a PF Reset
5771 * Resets only the PF-specific registers
5773 * This goes directly to the tear-down and rebuild of
5774 * the switch, since we need to do all the recovery as
5775 * for the Core Reset.
5777 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5778 i40e_handle_reset_warning(pf, lock_acquired);
5780 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5783 /* Find the VSI(s) that requested a re-init */
5784 dev_info(&pf->pdev->dev,
5785 "VSI reinit requested\n");
5786 for (v = 0; v < pf->num_alloc_vsi; v++) {
5787 struct i40e_vsi *vsi = pf->vsi[v];
5790 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5791 i40e_vsi_reinit_locked(pf->vsi[v]);
5792 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5795 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5798 /* Find the VSI(s) that needs to be brought down */
5799 dev_info(&pf->pdev->dev, "VSI down requested\n");
5800 for (v = 0; v < pf->num_alloc_vsi; v++) {
5801 struct i40e_vsi *vsi = pf->vsi[v];
5804 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5805 set_bit(__I40E_DOWN, &vsi->state);
5807 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5811 dev_info(&pf->pdev->dev,
5812 "bad reset request 0x%08x\n", reset_flags);
5816 #ifdef CONFIG_I40E_DCB
5818 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5819 * @pf: board private structure
5820 * @old_cfg: current DCB config
5821 * @new_cfg: new DCB config
5823 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5824 struct i40e_dcbx_config *old_cfg,
5825 struct i40e_dcbx_config *new_cfg)
5827 bool need_reconfig = false;
5829 /* Check if ETS configuration has changed */
5830 if (memcmp(&new_cfg->etscfg,
5832 sizeof(new_cfg->etscfg))) {
5833 /* If Priority Table has changed reconfig is needed */
5834 if (memcmp(&new_cfg->etscfg.prioritytable,
5835 &old_cfg->etscfg.prioritytable,
5836 sizeof(new_cfg->etscfg.prioritytable))) {
5837 need_reconfig = true;
5838 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5841 if (memcmp(&new_cfg->etscfg.tcbwtable,
5842 &old_cfg->etscfg.tcbwtable,
5843 sizeof(new_cfg->etscfg.tcbwtable)))
5844 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5846 if (memcmp(&new_cfg->etscfg.tsatable,
5847 &old_cfg->etscfg.tsatable,
5848 sizeof(new_cfg->etscfg.tsatable)))
5849 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5852 /* Check if PFC configuration has changed */
5853 if (memcmp(&new_cfg->pfc,
5855 sizeof(new_cfg->pfc))) {
5856 need_reconfig = true;
5857 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5860 /* Check if APP Table has changed */
5861 if (memcmp(&new_cfg->app,
5863 sizeof(new_cfg->app))) {
5864 need_reconfig = true;
5865 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5868 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5869 return need_reconfig;
5873 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5874 * @pf: board private structure
5875 * @e: event info posted on ARQ
5877 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5878 struct i40e_arq_event_info *e)
5880 struct i40e_aqc_lldp_get_mib *mib =
5881 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5882 struct i40e_hw *hw = &pf->hw;
5883 struct i40e_dcbx_config tmp_dcbx_cfg;
5884 bool need_reconfig = false;
5888 /* Not DCB capable or capability disabled */
5889 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5892 /* Ignore if event is not for Nearest Bridge */
5893 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5894 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5895 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5896 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5899 /* Check MIB Type and return if event for Remote MIB update */
5900 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5901 dev_dbg(&pf->pdev->dev,
5902 "LLDP event mib type %s\n", type ? "remote" : "local");
5903 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5904 /* Update the remote cached instance and return */
5905 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5906 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5907 &hw->remote_dcbx_config);
5911 /* Store the old configuration */
5912 tmp_dcbx_cfg = hw->local_dcbx_config;
5914 /* Reset the old DCBx configuration data */
5915 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5916 /* Get updated DCBX data from firmware */
5917 ret = i40e_get_dcb_config(&pf->hw);
5919 dev_info(&pf->pdev->dev,
5920 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5921 i40e_stat_str(&pf->hw, ret),
5922 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5926 /* No change detected in DCBX configs */
5927 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5928 sizeof(tmp_dcbx_cfg))) {
5929 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5933 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5934 &hw->local_dcbx_config);
5936 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5941 /* Enable DCB tagging only when more than one TC */
5942 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5943 pf->flags |= I40E_FLAG_DCB_ENABLED;
5945 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5947 set_bit(__I40E_PORT_SUSPENDED, &pf->state);
5948 /* Reconfiguration needed quiesce all VSIs */
5949 i40e_pf_quiesce_all_vsi(pf);
5951 /* Changes in configuration update VEB/VSI */
5952 i40e_dcb_reconfigure(pf);
5954 ret = i40e_resume_port_tx(pf);
5956 clear_bit(__I40E_PORT_SUSPENDED, &pf->state);
5957 /* In case of error no point in resuming VSIs */
5961 /* Wait for the PF's queues to be disabled */
5962 ret = i40e_pf_wait_queues_disabled(pf);
5964 /* Schedule PF reset to recover */
5965 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5966 i40e_service_event_schedule(pf);
5968 i40e_pf_unquiesce_all_vsi(pf);
5969 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
5970 I40E_FLAG_CLIENT_L2_CHANGE);
5976 #endif /* CONFIG_I40E_DCB */
5979 * i40e_do_reset_safe - Protected reset path for userland calls.
5980 * @pf: board private structure
5981 * @reset_flags: which reset is requested
5984 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5987 i40e_do_reset(pf, reset_flags, true);
5992 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5993 * @pf: board private structure
5994 * @e: event info posted on ARQ
5996 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5999 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
6000 struct i40e_arq_event_info *e)
6002 struct i40e_aqc_lan_overflow *data =
6003 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
6004 u32 queue = le32_to_cpu(data->prtdcb_rupto);
6005 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
6006 struct i40e_hw *hw = &pf->hw;
6010 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
6013 /* Queue belongs to VF, find the VF and issue VF reset */
6014 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
6015 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
6016 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
6017 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
6018 vf_id -= hw->func_caps.vf_base_id;
6019 vf = &pf->vf[vf_id];
6020 i40e_vc_notify_vf_reset(vf);
6021 /* Allow VF to process pending reset notification */
6023 i40e_reset_vf(vf, false);
6028 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
6029 * @pf: board private structure
6031 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
6035 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6036 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
6041 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
6042 * @pf: board private structure
6044 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
6048 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6049 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
6050 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
6051 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
6056 * i40e_get_global_fd_count - Get total FD filters programmed on device
6057 * @pf: board private structure
6059 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
6063 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
6064 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
6065 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
6066 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
6071 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
6072 * @pf: board private structure
6074 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
6076 struct i40e_fdir_filter *filter;
6077 u32 fcnt_prog, fcnt_avail;
6078 struct hlist_node *node;
6080 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6083 /* Check if, FD SB or ATR was auto disabled and if there is enough room
6086 fcnt_prog = i40e_get_global_fd_count(pf);
6087 fcnt_avail = pf->fdir_pf_filter_count;
6088 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
6089 (pf->fd_add_err == 0) ||
6090 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
6091 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
6092 (pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED)) {
6093 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
6094 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6095 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
6099 /* Wait for some more space to be available to turn on ATR. We also
6100 * must check that no existing ntuple rules for TCP are in effect
6102 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
6103 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
6104 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED) &&
6105 (pf->fd_tcp4_filter_cnt == 0)) {
6106 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6107 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6108 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
6112 /* if hw had a problem adding a filter, delete it */
6113 if (pf->fd_inv > 0) {
6114 hlist_for_each_entry_safe(filter, node,
6115 &pf->fdir_filter_list, fdir_node) {
6116 if (filter->fd_id == pf->fd_inv) {
6117 hlist_del(&filter->fdir_node);
6119 pf->fdir_pf_active_filters--;
6125 #define I40E_MIN_FD_FLUSH_INTERVAL 10
6126 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
6128 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
6129 * @pf: board private structure
6131 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
6133 unsigned long min_flush_time;
6134 int flush_wait_retry = 50;
6135 bool disable_atr = false;
6139 if (!time_after(jiffies, pf->fd_flush_timestamp +
6140 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
6143 /* If the flush is happening too quick and we have mostly SB rules we
6144 * should not re-enable ATR for some time.
6146 min_flush_time = pf->fd_flush_timestamp +
6147 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
6148 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
6150 if (!(time_after(jiffies, min_flush_time)) &&
6151 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
6152 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6153 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
6157 pf->fd_flush_timestamp = jiffies;
6158 pf->hw_disabled_flags |= I40E_FLAG_FD_ATR_ENABLED;
6159 /* flush all filters */
6160 wr32(&pf->hw, I40E_PFQF_CTL_1,
6161 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6162 i40e_flush(&pf->hw);
6166 /* Check FD flush status every 5-6msec */
6167 usleep_range(5000, 6000);
6168 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6169 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6171 } while (flush_wait_retry--);
6172 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6173 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6175 /* replay sideband filters */
6176 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6177 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
6178 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6179 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6180 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6181 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6186 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6187 * @pf: board private structure
6189 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6191 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6194 /* We can see up to 256 filter programming desc in transit if the filters are
6195 * being applied really fast; before we see the first
6196 * filter miss error on Rx queue 0. Accumulating enough error messages before
6197 * reacting will make sure we don't cause flush too often.
6199 #define I40E_MAX_FD_PROGRAM_ERROR 256
6202 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6203 * @pf: board private structure
6205 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6208 /* if interface is down do nothing */
6209 if (test_bit(__I40E_DOWN, &pf->state))
6212 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6213 i40e_fdir_flush_and_replay(pf);
6215 i40e_fdir_check_and_reenable(pf);
6220 * i40e_vsi_link_event - notify VSI of a link event
6221 * @vsi: vsi to be notified
6222 * @link_up: link up or down
6224 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6226 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6229 switch (vsi->type) {
6231 if (!vsi->netdev || !vsi->netdev_registered)
6235 netif_carrier_on(vsi->netdev);
6236 netif_tx_wake_all_queues(vsi->netdev);
6238 netif_carrier_off(vsi->netdev);
6239 netif_tx_stop_all_queues(vsi->netdev);
6243 case I40E_VSI_SRIOV:
6244 case I40E_VSI_VMDQ2:
6246 case I40E_VSI_IWARP:
6247 case I40E_VSI_MIRROR:
6249 /* there is no notification for other VSIs */
6255 * i40e_veb_link_event - notify elements on the veb of a link event
6256 * @veb: veb to be notified
6257 * @link_up: link up or down
6259 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6264 if (!veb || !veb->pf)
6268 /* depth first... */
6269 for (i = 0; i < I40E_MAX_VEB; i++)
6270 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6271 i40e_veb_link_event(pf->veb[i], link_up);
6273 /* ... now the local VSIs */
6274 for (i = 0; i < pf->num_alloc_vsi; i++)
6275 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6276 i40e_vsi_link_event(pf->vsi[i], link_up);
6280 * i40e_link_event - Update netif_carrier status
6281 * @pf: board private structure
6283 static void i40e_link_event(struct i40e_pf *pf)
6285 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6286 u8 new_link_speed, old_link_speed;
6288 bool new_link, old_link;
6290 /* save off old link status information */
6291 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6293 /* set this to force the get_link_status call to refresh state */
6294 pf->hw.phy.get_link_info = true;
6296 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6298 status = i40e_get_link_status(&pf->hw, &new_link);
6300 /* On success, disable temp link polling */
6301 if (status == I40E_SUCCESS) {
6302 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)
6303 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING;
6305 /* Enable link polling temporarily until i40e_get_link_status
6306 * returns I40E_SUCCESS
6308 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING;
6309 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6314 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6315 new_link_speed = pf->hw.phy.link_info.link_speed;
6317 if (new_link == old_link &&
6318 new_link_speed == old_link_speed &&
6319 (test_bit(__I40E_DOWN, &vsi->state) ||
6320 new_link == netif_carrier_ok(vsi->netdev)))
6323 if (!test_bit(__I40E_DOWN, &vsi->state))
6324 i40e_print_link_message(vsi, new_link);
6326 /* Notify the base of the switch tree connected to
6327 * the link. Floating VEBs are not notified.
6329 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6330 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6332 i40e_vsi_link_event(vsi, new_link);
6335 i40e_vc_notify_link_state(pf);
6337 if (pf->flags & I40E_FLAG_PTP)
6338 i40e_ptp_set_increment(pf);
6342 * i40e_watchdog_subtask - periodic checks not using event driven response
6343 * @pf: board private structure
6345 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6349 /* if interface is down do nothing */
6350 if (test_bit(__I40E_DOWN, &pf->state) ||
6351 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6354 /* make sure we don't do these things too often */
6355 if (time_before(jiffies, (pf->service_timer_previous +
6356 pf->service_timer_period)))
6358 pf->service_timer_previous = jiffies;
6360 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
6361 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING))
6362 i40e_link_event(pf);
6364 /* Update the stats for active netdevs so the network stack
6365 * can look at updated numbers whenever it cares to
6367 for (i = 0; i < pf->num_alloc_vsi; i++)
6368 if (pf->vsi[i] && pf->vsi[i]->netdev)
6369 i40e_update_stats(pf->vsi[i]);
6371 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6372 /* Update the stats for the active switching components */
6373 for (i = 0; i < I40E_MAX_VEB; i++)
6375 i40e_update_veb_stats(pf->veb[i]);
6378 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6382 * i40e_reset_subtask - Set up for resetting the device and driver
6383 * @pf: board private structure
6385 static void i40e_reset_subtask(struct i40e_pf *pf)
6387 u32 reset_flags = 0;
6389 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6390 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6391 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6393 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6394 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6395 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6397 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6398 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6399 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6401 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6402 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6403 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6405 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6406 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6407 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6410 /* If there's a recovery already waiting, it takes
6411 * precedence before starting a new reset sequence.
6413 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6414 i40e_prep_for_reset(pf, false);
6416 i40e_rebuild(pf, false, false);
6419 /* If we're already down or resetting, just bail */
6421 !test_bit(__I40E_DOWN, &pf->state) &&
6422 !test_bit(__I40E_CONFIG_BUSY, &pf->state)) {
6424 i40e_do_reset(pf, reset_flags, true);
6430 * i40e_handle_link_event - Handle link event
6431 * @pf: board private structure
6432 * @e: event info posted on ARQ
6434 static void i40e_handle_link_event(struct i40e_pf *pf,
6435 struct i40e_arq_event_info *e)
6437 struct i40e_aqc_get_link_status *status =
6438 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6440 /* Do a new status request to re-enable LSE reporting
6441 * and load new status information into the hw struct
6442 * This completely ignores any state information
6443 * in the ARQ event info, instead choosing to always
6444 * issue the AQ update link status command.
6446 i40e_link_event(pf);
6448 /* check for unqualified module, if link is down */
6449 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6450 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6451 (!(status->link_info & I40E_AQ_LINK_UP)))
6452 dev_err(&pf->pdev->dev,
6453 "The driver failed to link because an unqualified module was detected.\n");
6457 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6458 * @pf: board private structure
6460 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6462 struct i40e_arq_event_info event;
6463 struct i40e_hw *hw = &pf->hw;
6470 /* Do not run clean AQ when PF reset fails */
6471 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6474 /* check for error indications */
6475 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6477 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6478 if (hw->debug_mask & I40E_DEBUG_AQ)
6479 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6480 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6482 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6483 if (hw->debug_mask & I40E_DEBUG_AQ)
6484 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6485 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6486 pf->arq_overflows++;
6488 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6489 if (hw->debug_mask & I40E_DEBUG_AQ)
6490 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6491 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6494 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6496 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6498 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6499 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6500 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6501 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6503 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6504 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6505 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6506 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6508 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6509 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6510 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6511 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6514 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6516 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6517 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6522 ret = i40e_clean_arq_element(hw, &event, &pending);
6523 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6526 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6530 opcode = le16_to_cpu(event.desc.opcode);
6533 case i40e_aqc_opc_get_link_status:
6534 i40e_handle_link_event(pf, &event);
6536 case i40e_aqc_opc_send_msg_to_pf:
6537 ret = i40e_vc_process_vf_msg(pf,
6538 le16_to_cpu(event.desc.retval),
6539 le32_to_cpu(event.desc.cookie_high),
6540 le32_to_cpu(event.desc.cookie_low),
6544 case i40e_aqc_opc_lldp_update_mib:
6545 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6546 #ifdef CONFIG_I40E_DCB
6548 ret = i40e_handle_lldp_event(pf, &event);
6550 #endif /* CONFIG_I40E_DCB */
6552 case i40e_aqc_opc_event_lan_overflow:
6553 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6554 i40e_handle_lan_overflow_event(pf, &event);
6556 case i40e_aqc_opc_send_msg_to_peer:
6557 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6559 case i40e_aqc_opc_nvm_erase:
6560 case i40e_aqc_opc_nvm_update:
6561 case i40e_aqc_opc_oem_post_update:
6562 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6563 "ARQ NVM operation 0x%04x completed\n",
6567 dev_info(&pf->pdev->dev,
6568 "ARQ: Unknown event 0x%04x ignored\n",
6572 } while (i++ < pf->adminq_work_limit);
6574 if (i < pf->adminq_work_limit)
6575 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6577 /* re-enable Admin queue interrupt cause */
6578 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6579 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6580 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6583 kfree(event.msg_buf);
6587 * i40e_verify_eeprom - make sure eeprom is good to use
6588 * @pf: board private structure
6590 static void i40e_verify_eeprom(struct i40e_pf *pf)
6594 err = i40e_diag_eeprom_test(&pf->hw);
6596 /* retry in case of garbage read */
6597 err = i40e_diag_eeprom_test(&pf->hw);
6599 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6601 set_bit(__I40E_BAD_EEPROM, &pf->state);
6605 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6606 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6607 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6612 * i40e_enable_pf_switch_lb
6613 * @pf: pointer to the PF structure
6615 * enable switch loop back or die - no point in a return value
6617 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6619 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6620 struct i40e_vsi_context ctxt;
6623 ctxt.seid = pf->main_vsi_seid;
6624 ctxt.pf_num = pf->hw.pf_id;
6626 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6628 dev_info(&pf->pdev->dev,
6629 "couldn't get PF vsi config, err %s aq_err %s\n",
6630 i40e_stat_str(&pf->hw, ret),
6631 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6634 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6635 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6636 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6638 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6640 dev_info(&pf->pdev->dev,
6641 "update vsi switch failed, err %s aq_err %s\n",
6642 i40e_stat_str(&pf->hw, ret),
6643 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6648 * i40e_disable_pf_switch_lb
6649 * @pf: pointer to the PF structure
6651 * disable switch loop back or die - no point in a return value
6653 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6655 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6656 struct i40e_vsi_context ctxt;
6659 ctxt.seid = pf->main_vsi_seid;
6660 ctxt.pf_num = pf->hw.pf_id;
6662 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6664 dev_info(&pf->pdev->dev,
6665 "couldn't get PF vsi config, err %s aq_err %s\n",
6666 i40e_stat_str(&pf->hw, ret),
6667 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6670 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6671 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6672 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6674 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6676 dev_info(&pf->pdev->dev,
6677 "update vsi switch failed, err %s aq_err %s\n",
6678 i40e_stat_str(&pf->hw, ret),
6679 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6684 * i40e_config_bridge_mode - Configure the HW bridge mode
6685 * @veb: pointer to the bridge instance
6687 * Configure the loop back mode for the LAN VSI that is downlink to the
6688 * specified HW bridge instance. It is expected this function is called
6689 * when a new HW bridge is instantiated.
6691 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6693 struct i40e_pf *pf = veb->pf;
6695 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6696 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6697 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6698 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6699 i40e_disable_pf_switch_lb(pf);
6701 i40e_enable_pf_switch_lb(pf);
6705 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6706 * @veb: pointer to the VEB instance
6708 * This is a recursive function that first builds the attached VSIs then
6709 * recurses in to build the next layer of VEB. We track the connections
6710 * through our own index numbers because the seid's from the HW could
6711 * change across the reset.
6713 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6715 struct i40e_vsi *ctl_vsi = NULL;
6716 struct i40e_pf *pf = veb->pf;
6720 /* build VSI that owns this VEB, temporarily attached to base VEB */
6721 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6723 pf->vsi[v]->veb_idx == veb->idx &&
6724 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6725 ctl_vsi = pf->vsi[v];
6730 dev_info(&pf->pdev->dev,
6731 "missing owner VSI for veb_idx %d\n", veb->idx);
6733 goto end_reconstitute;
6735 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6736 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6737 ret = i40e_add_vsi(ctl_vsi);
6739 dev_info(&pf->pdev->dev,
6740 "rebuild of veb_idx %d owner VSI failed: %d\n",
6742 goto end_reconstitute;
6744 i40e_vsi_reset_stats(ctl_vsi);
6746 /* create the VEB in the switch and move the VSI onto the VEB */
6747 ret = i40e_add_veb(veb, ctl_vsi);
6749 goto end_reconstitute;
6751 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6752 veb->bridge_mode = BRIDGE_MODE_VEB;
6754 veb->bridge_mode = BRIDGE_MODE_VEPA;
6755 i40e_config_bridge_mode(veb);
6757 /* create the remaining VSIs attached to this VEB */
6758 for (v = 0; v < pf->num_alloc_vsi; v++) {
6759 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6762 if (pf->vsi[v]->veb_idx == veb->idx) {
6763 struct i40e_vsi *vsi = pf->vsi[v];
6765 vsi->uplink_seid = veb->seid;
6766 ret = i40e_add_vsi(vsi);
6768 dev_info(&pf->pdev->dev,
6769 "rebuild of vsi_idx %d failed: %d\n",
6771 goto end_reconstitute;
6773 i40e_vsi_reset_stats(vsi);
6777 /* create any VEBs attached to this VEB - RECURSION */
6778 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6779 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6780 pf->veb[veb_idx]->uplink_seid = veb->seid;
6781 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6792 * i40e_get_capabilities - get info about the HW
6793 * @pf: the PF struct
6795 static int i40e_get_capabilities(struct i40e_pf *pf)
6797 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6802 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6804 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6808 /* this loads the data into the hw struct for us */
6809 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6811 i40e_aqc_opc_list_func_capabilities,
6813 /* data loaded, buffer no longer needed */
6816 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6817 /* retry with a larger buffer */
6818 buf_len = data_size;
6819 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6820 dev_info(&pf->pdev->dev,
6821 "capability discovery failed, err %s aq_err %s\n",
6822 i40e_stat_str(&pf->hw, err),
6823 i40e_aq_str(&pf->hw,
6824 pf->hw.aq.asq_last_status));
6829 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6830 dev_info(&pf->pdev->dev,
6831 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6832 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6833 pf->hw.func_caps.num_msix_vectors,
6834 pf->hw.func_caps.num_msix_vectors_vf,
6835 pf->hw.func_caps.fd_filters_guaranteed,
6836 pf->hw.func_caps.fd_filters_best_effort,
6837 pf->hw.func_caps.num_tx_qp,
6838 pf->hw.func_caps.num_vsis);
6840 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6841 + pf->hw.func_caps.num_vfs)
6842 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6843 dev_info(&pf->pdev->dev,
6844 "got num_vsis %d, setting num_vsis to %d\n",
6845 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6846 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6852 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6855 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6856 * @pf: board private structure
6858 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6860 struct i40e_vsi *vsi;
6862 /* quick workaround for an NVM issue that leaves a critical register
6865 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6866 static const u32 hkey[] = {
6867 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6868 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6869 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6873 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6874 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6877 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6880 /* find existing VSI and see if it needs configuring */
6881 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6883 /* create a new VSI if none exists */
6885 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6886 pf->vsi[pf->lan_vsi]->seid, 0);
6888 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6889 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6894 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6898 * i40e_fdir_teardown - release the Flow Director resources
6899 * @pf: board private structure
6901 static void i40e_fdir_teardown(struct i40e_pf *pf)
6903 struct i40e_vsi *vsi;
6905 i40e_fdir_filter_exit(pf);
6906 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6908 i40e_vsi_release(vsi);
6912 * i40e_prep_for_reset - prep for the core to reset
6913 * @pf: board private structure
6914 * @lock_acquired: indicates whether or not the lock has been acquired
6915 * before this function was called.
6917 * Close up the VFs and other things in prep for PF Reset.
6919 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired)
6921 struct i40e_hw *hw = &pf->hw;
6922 i40e_status ret = 0;
6925 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6926 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6928 if (i40e_check_asq_alive(&pf->hw))
6929 i40e_vc_notify_reset(pf);
6931 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6933 /* quiesce the VSIs and their queues that are not already DOWN */
6934 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
6937 i40e_pf_quiesce_all_vsi(pf);
6941 for (v = 0; v < pf->num_alloc_vsi; v++) {
6943 pf->vsi[v]->seid = 0;
6946 i40e_shutdown_adminq(&pf->hw);
6948 /* call shutdown HMC */
6949 if (hw->hmc.hmc_obj) {
6950 ret = i40e_shutdown_lan_hmc(hw);
6952 dev_warn(&pf->pdev->dev,
6953 "shutdown_lan_hmc failed: %d\n", ret);
6958 * i40e_send_version - update firmware with driver version
6961 static void i40e_send_version(struct i40e_pf *pf)
6963 struct i40e_driver_version dv;
6965 dv.major_version = DRV_VERSION_MAJOR;
6966 dv.minor_version = DRV_VERSION_MINOR;
6967 dv.build_version = DRV_VERSION_BUILD;
6968 dv.subbuild_version = 0;
6969 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6970 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6974 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
6975 * @pf: board private structure
6977 static int i40e_reset(struct i40e_pf *pf)
6979 struct i40e_hw *hw = &pf->hw;
6982 ret = i40e_pf_reset(hw);
6984 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6985 set_bit(__I40E_RESET_FAILED, &pf->state);
6986 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6994 * i40e_rebuild - rebuild using a saved config
6995 * @pf: board private structure
6996 * @reinit: if the Main VSI needs to re-initialized.
6997 * @lock_acquired: indicates whether or not the lock has been acquired
6998 * before this function was called.
7000 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
7002 struct i40e_hw *hw = &pf->hw;
7003 u8 set_fc_aq_fail = 0;
7008 if (test_bit(__I40E_DOWN, &pf->state))
7009 goto clear_recovery;
7010 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
7012 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
7013 ret = i40e_init_adminq(&pf->hw);
7015 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
7016 i40e_stat_str(&pf->hw, ret),
7017 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7018 goto clear_recovery;
7021 /* re-verify the eeprom if we just had an EMP reset */
7022 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
7023 i40e_verify_eeprom(pf);
7025 i40e_clear_pxe_mode(hw);
7026 ret = i40e_get_capabilities(pf);
7028 goto end_core_reset;
7030 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7031 hw->func_caps.num_rx_qp, 0, 0);
7033 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
7034 goto end_core_reset;
7036 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7038 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
7039 goto end_core_reset;
7042 #ifdef CONFIG_I40E_DCB
7043 ret = i40e_init_pf_dcb(pf);
7045 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
7046 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
7047 /* Continue without DCB enabled */
7049 #endif /* CONFIG_I40E_DCB */
7050 /* do basic switch setup */
7053 ret = i40e_setup_pf_switch(pf, reinit);
7057 /* The driver only wants link up/down and module qualification
7058 * reports from firmware. Note the negative logic.
7060 ret = i40e_aq_set_phy_int_mask(&pf->hw,
7061 ~(I40E_AQ_EVENT_LINK_UPDOWN |
7062 I40E_AQ_EVENT_MEDIA_NA |
7063 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
7065 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
7066 i40e_stat_str(&pf->hw, ret),
7067 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7069 /* make sure our flow control settings are restored */
7070 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
7072 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
7073 i40e_stat_str(&pf->hw, ret),
7074 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7076 /* Rebuild the VSIs and VEBs that existed before reset.
7077 * They are still in our local switch element arrays, so only
7078 * need to rebuild the switch model in the HW.
7080 * If there were VEBs but the reconstitution failed, we'll try
7081 * try to recover minimal use by getting the basic PF VSI working.
7083 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
7084 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
7085 /* find the one VEB connected to the MAC, and find orphans */
7086 for (v = 0; v < I40E_MAX_VEB; v++) {
7090 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
7091 pf->veb[v]->uplink_seid == 0) {
7092 ret = i40e_reconstitute_veb(pf->veb[v]);
7097 /* If Main VEB failed, we're in deep doodoo,
7098 * so give up rebuilding the switch and set up
7099 * for minimal rebuild of PF VSI.
7100 * If orphan failed, we'll report the error
7101 * but try to keep going.
7103 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
7104 dev_info(&pf->pdev->dev,
7105 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
7107 pf->vsi[pf->lan_vsi]->uplink_seid
7110 } else if (pf->veb[v]->uplink_seid == 0) {
7111 dev_info(&pf->pdev->dev,
7112 "rebuild of orphan VEB failed: %d\n",
7119 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
7120 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
7121 /* no VEB, so rebuild only the Main VSI */
7122 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
7124 dev_info(&pf->pdev->dev,
7125 "rebuild of Main VSI failed: %d\n", ret);
7130 /* Reconfigure hardware for allowing smaller MSS in the case
7131 * of TSO, so that we avoid the MDD being fired and causing
7132 * a reset in the case of small MSS+TSO.
7134 #define I40E_REG_MSS 0x000E64DC
7135 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
7136 #define I40E_64BYTE_MSS 0x400000
7137 val = rd32(hw, I40E_REG_MSS);
7138 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
7139 val &= ~I40E_REG_MSS_MIN_MASK;
7140 val |= I40E_64BYTE_MSS;
7141 wr32(hw, I40E_REG_MSS, val);
7144 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
7146 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
7148 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
7149 i40e_stat_str(&pf->hw, ret),
7150 i40e_aq_str(&pf->hw,
7151 pf->hw.aq.asq_last_status));
7153 /* reinit the misc interrupt */
7154 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7155 ret = i40e_setup_misc_vector(pf);
7157 /* Add a filter to drop all Flow control frames from any VSI from being
7158 * transmitted. By doing so we stop a malicious VF from sending out
7159 * PAUSE or PFC frames and potentially controlling traffic for other
7161 * The FW can still send Flow control frames if enabled.
7163 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
7166 /* restart the VSIs that were rebuilt and running before the reset */
7167 i40e_pf_unquiesce_all_vsi(pf);
7169 /* Release the RTNL lock before we start resetting VFs */
7173 i40e_reset_all_vfs(pf, true);
7175 /* tell the firmware that we're starting */
7176 i40e_send_version(pf);
7178 /* We've already released the lock, so don't do it again */
7179 goto end_core_reset;
7185 clear_bit(__I40E_RESET_FAILED, &pf->state);
7187 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7191 * i40e_reset_and_rebuild - reset and rebuild using a saved config
7192 * @pf: board private structure
7193 * @reinit: if the Main VSI needs to re-initialized.
7194 * @lock_acquired: indicates whether or not the lock has been acquired
7195 * before this function was called.
7197 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
7201 /* Now we wait for GRST to settle out.
7202 * We don't have to delete the VEBs or VSIs from the hw switch
7203 * because the reset will make them disappear.
7205 ret = i40e_reset(pf);
7207 i40e_rebuild(pf, reinit, lock_acquired);
7211 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7212 * @pf: board private structure
7214 * Close up the VFs and other things in prep for a Core Reset,
7215 * then get ready to rebuild the world.
7216 * @lock_acquired: indicates whether or not the lock has been acquired
7217 * before this function was called.
7219 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
7221 i40e_prep_for_reset(pf, lock_acquired);
7222 i40e_reset_and_rebuild(pf, false, lock_acquired);
7226 * i40e_handle_mdd_event
7227 * @pf: pointer to the PF structure
7229 * Called from the MDD irq handler to identify possibly malicious vfs
7231 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7233 struct i40e_hw *hw = &pf->hw;
7234 bool mdd_detected = false;
7235 bool pf_mdd_detected = false;
7240 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7243 /* find what triggered the MDD event */
7244 reg = rd32(hw, I40E_GL_MDET_TX);
7245 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7246 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7247 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7248 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7249 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7250 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7251 I40E_GL_MDET_TX_EVENT_SHIFT;
7252 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7253 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7254 pf->hw.func_caps.base_queue;
7255 if (netif_msg_tx_err(pf))
7256 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7257 event, queue, pf_num, vf_num);
7258 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7259 mdd_detected = true;
7261 reg = rd32(hw, I40E_GL_MDET_RX);
7262 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7263 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7264 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7265 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7266 I40E_GL_MDET_RX_EVENT_SHIFT;
7267 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7268 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7269 pf->hw.func_caps.base_queue;
7270 if (netif_msg_rx_err(pf))
7271 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7272 event, queue, func);
7273 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7274 mdd_detected = true;
7278 reg = rd32(hw, I40E_PF_MDET_TX);
7279 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7280 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7281 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7282 pf_mdd_detected = true;
7284 reg = rd32(hw, I40E_PF_MDET_RX);
7285 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7286 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7287 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7288 pf_mdd_detected = true;
7290 /* Queue belongs to the PF, initiate a reset */
7291 if (pf_mdd_detected) {
7292 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7293 i40e_service_event_schedule(pf);
7297 /* see if one of the VFs needs its hand slapped */
7298 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7300 reg = rd32(hw, I40E_VP_MDET_TX(i));
7301 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7302 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7303 vf->num_mdd_events++;
7304 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7308 reg = rd32(hw, I40E_VP_MDET_RX(i));
7309 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7310 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7311 vf->num_mdd_events++;
7312 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7316 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7317 dev_info(&pf->pdev->dev,
7318 "Too many MDD events on VF %d, disabled\n", i);
7319 dev_info(&pf->pdev->dev,
7320 "Use PF Control I/F to re-enable the VF\n");
7321 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
7325 /* re-enable mdd interrupt cause */
7326 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7327 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7328 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7329 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7334 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7335 * @pf: board private structure
7337 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7339 struct i40e_hw *hw = &pf->hw;
7344 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7347 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7349 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7350 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7351 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7352 port = pf->udp_ports[i].port;
7354 ret = i40e_aq_add_udp_tunnel(hw, port,
7355 pf->udp_ports[i].type,
7358 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7361 dev_dbg(&pf->pdev->dev,
7362 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7363 pf->udp_ports[i].type ? "vxlan" : "geneve",
7364 port ? "add" : "delete",
7366 i40e_stat_str(&pf->hw, ret),
7367 i40e_aq_str(&pf->hw,
7368 pf->hw.aq.asq_last_status));
7369 pf->udp_ports[i].port = 0;
7376 * i40e_service_task - Run the driver's async subtasks
7377 * @work: pointer to work_struct containing our data
7379 static void i40e_service_task(struct work_struct *work)
7381 struct i40e_pf *pf = container_of(work,
7384 unsigned long start_time = jiffies;
7386 /* don't bother with service tasks if a reset is in progress */
7387 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7391 if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
7394 i40e_detect_recover_hung(pf);
7395 i40e_sync_filters_subtask(pf);
7396 i40e_reset_subtask(pf);
7397 i40e_handle_mdd_event(pf);
7398 i40e_vc_process_vflr_event(pf);
7399 i40e_watchdog_subtask(pf);
7400 i40e_fdir_reinit_subtask(pf);
7401 if (pf->flags & I40E_FLAG_CLIENT_RESET) {
7402 /* Client subtask will reopen next time through. */
7403 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true);
7404 pf->flags &= ~I40E_FLAG_CLIENT_RESET;
7406 i40e_client_subtask(pf);
7407 if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) {
7408 i40e_notify_client_of_l2_param_changes(
7409 pf->vsi[pf->lan_vsi]);
7410 pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE;
7413 i40e_sync_filters_subtask(pf);
7414 i40e_sync_udp_filters_subtask(pf);
7415 i40e_clean_adminq_subtask(pf);
7417 /* flush memory to make sure state is correct before next watchdog */
7418 smp_mb__before_atomic();
7419 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7421 /* If the tasks have taken longer than one timer cycle or there
7422 * is more work to be done, reschedule the service task now
7423 * rather than wait for the timer to tick again.
7425 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7426 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7427 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7428 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7429 i40e_service_event_schedule(pf);
7433 * i40e_service_timer - timer callback
7434 * @data: pointer to PF struct
7436 static void i40e_service_timer(unsigned long data)
7438 struct i40e_pf *pf = (struct i40e_pf *)data;
7440 mod_timer(&pf->service_timer,
7441 round_jiffies(jiffies + pf->service_timer_period));
7442 i40e_service_event_schedule(pf);
7446 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7447 * @vsi: the VSI being configured
7449 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7451 struct i40e_pf *pf = vsi->back;
7453 switch (vsi->type) {
7455 vsi->alloc_queue_pairs = pf->num_lan_qps;
7456 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7457 I40E_REQ_DESCRIPTOR_MULTIPLE);
7458 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7459 vsi->num_q_vectors = pf->num_lan_msix;
7461 vsi->num_q_vectors = 1;
7466 vsi->alloc_queue_pairs = 1;
7467 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7468 I40E_REQ_DESCRIPTOR_MULTIPLE);
7469 vsi->num_q_vectors = pf->num_fdsb_msix;
7472 case I40E_VSI_VMDQ2:
7473 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7474 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7475 I40E_REQ_DESCRIPTOR_MULTIPLE);
7476 vsi->num_q_vectors = pf->num_vmdq_msix;
7479 case I40E_VSI_SRIOV:
7480 vsi->alloc_queue_pairs = pf->num_vf_qps;
7481 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7482 I40E_REQ_DESCRIPTOR_MULTIPLE);
7494 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7495 * @type: VSI pointer
7496 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7498 * On error: returns error code (negative)
7499 * On success: returns 0
7501 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7506 /* allocate memory for both Tx and Rx ring pointers */
7507 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7508 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7511 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7513 if (alloc_qvectors) {
7514 /* allocate memory for q_vector pointers */
7515 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7516 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7517 if (!vsi->q_vectors) {
7525 kfree(vsi->tx_rings);
7530 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7531 * @pf: board private structure
7532 * @type: type of VSI
7534 * On error: returns error code (negative)
7535 * On success: returns vsi index in PF (positive)
7537 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7540 struct i40e_vsi *vsi;
7544 /* Need to protect the allocation of the VSIs at the PF level */
7545 mutex_lock(&pf->switch_mutex);
7547 /* VSI list may be fragmented if VSI creation/destruction has
7548 * been happening. We can afford to do a quick scan to look
7549 * for any free VSIs in the list.
7551 * find next empty vsi slot, looping back around if necessary
7554 while (i < pf->num_alloc_vsi && pf->vsi[i])
7556 if (i >= pf->num_alloc_vsi) {
7558 while (i < pf->next_vsi && pf->vsi[i])
7562 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7563 vsi_idx = i; /* Found one! */
7566 goto unlock_pf; /* out of VSI slots! */
7570 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7577 set_bit(__I40E_DOWN, &vsi->state);
7580 vsi->int_rate_limit = 0;
7581 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7582 pf->rss_table_size : 64;
7583 vsi->netdev_registered = false;
7584 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7585 hash_init(vsi->mac_filter_hash);
7586 vsi->irqs_ready = false;
7588 ret = i40e_set_num_rings_in_vsi(vsi);
7592 ret = i40e_vsi_alloc_arrays(vsi, true);
7596 /* Setup default MSIX irq handler for VSI */
7597 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7599 /* Initialize VSI lock */
7600 spin_lock_init(&vsi->mac_filter_hash_lock);
7601 pf->vsi[vsi_idx] = vsi;
7606 pf->next_vsi = i - 1;
7609 mutex_unlock(&pf->switch_mutex);
7614 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7615 * @type: VSI pointer
7616 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7618 * On error: returns error code (negative)
7619 * On success: returns 0
7621 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7623 /* free the ring and vector containers */
7624 if (free_qvectors) {
7625 kfree(vsi->q_vectors);
7626 vsi->q_vectors = NULL;
7628 kfree(vsi->tx_rings);
7629 vsi->tx_rings = NULL;
7630 vsi->rx_rings = NULL;
7634 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7636 * @vsi: Pointer to VSI structure
7638 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7643 kfree(vsi->rss_hkey_user);
7644 vsi->rss_hkey_user = NULL;
7646 kfree(vsi->rss_lut_user);
7647 vsi->rss_lut_user = NULL;
7651 * i40e_vsi_clear - Deallocate the VSI provided
7652 * @vsi: the VSI being un-configured
7654 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7665 mutex_lock(&pf->switch_mutex);
7666 if (!pf->vsi[vsi->idx]) {
7667 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7668 vsi->idx, vsi->idx, vsi, vsi->type);
7672 if (pf->vsi[vsi->idx] != vsi) {
7673 dev_err(&pf->pdev->dev,
7674 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7675 pf->vsi[vsi->idx]->idx,
7677 pf->vsi[vsi->idx]->type,
7678 vsi->idx, vsi, vsi->type);
7682 /* updates the PF for this cleared vsi */
7683 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7684 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7686 i40e_vsi_free_arrays(vsi, true);
7687 i40e_clear_rss_config_user(vsi);
7689 pf->vsi[vsi->idx] = NULL;
7690 if (vsi->idx < pf->next_vsi)
7691 pf->next_vsi = vsi->idx;
7694 mutex_unlock(&pf->switch_mutex);
7702 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7703 * @vsi: the VSI being cleaned
7705 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7709 if (vsi->tx_rings && vsi->tx_rings[0]) {
7710 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7711 kfree_rcu(vsi->tx_rings[i], rcu);
7712 vsi->tx_rings[i] = NULL;
7713 vsi->rx_rings[i] = NULL;
7719 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7720 * @vsi: the VSI being configured
7722 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7724 struct i40e_ring *tx_ring, *rx_ring;
7725 struct i40e_pf *pf = vsi->back;
7728 /* Set basic values in the rings to be used later during open() */
7729 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7730 /* allocate space for both Tx and Rx in one shot */
7731 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7735 tx_ring->queue_index = i;
7736 tx_ring->reg_idx = vsi->base_queue + i;
7737 tx_ring->ring_active = false;
7739 tx_ring->netdev = vsi->netdev;
7740 tx_ring->dev = &pf->pdev->dev;
7741 tx_ring->count = vsi->num_desc;
7743 tx_ring->dcb_tc = 0;
7744 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7745 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7746 tx_ring->tx_itr_setting = pf->tx_itr_default;
7747 vsi->tx_rings[i] = tx_ring;
7749 rx_ring = &tx_ring[1];
7750 rx_ring->queue_index = i;
7751 rx_ring->reg_idx = vsi->base_queue + i;
7752 rx_ring->ring_active = false;
7754 rx_ring->netdev = vsi->netdev;
7755 rx_ring->dev = &pf->pdev->dev;
7756 rx_ring->count = vsi->num_desc;
7758 rx_ring->dcb_tc = 0;
7759 rx_ring->rx_itr_setting = pf->rx_itr_default;
7760 vsi->rx_rings[i] = rx_ring;
7766 i40e_vsi_clear_rings(vsi);
7771 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7772 * @pf: board private structure
7773 * @vectors: the number of MSI-X vectors to request
7775 * Returns the number of vectors reserved, or error
7777 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7779 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7780 I40E_MIN_MSIX, vectors);
7782 dev_info(&pf->pdev->dev,
7783 "MSI-X vector reservation failed: %d\n", vectors);
7791 * i40e_init_msix - Setup the MSIX capability
7792 * @pf: board private structure
7794 * Work with the OS to set up the MSIX vectors needed.
7796 * Returns the number of vectors reserved or negative on failure
7798 static int i40e_init_msix(struct i40e_pf *pf)
7800 struct i40e_hw *hw = &pf->hw;
7801 int cpus, extra_vectors;
7805 int iwarp_requested = 0;
7807 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7810 /* The number of vectors we'll request will be comprised of:
7811 * - Add 1 for "other" cause for Admin Queue events, etc.
7812 * - The number of LAN queue pairs
7813 * - Queues being used for RSS.
7814 * We don't need as many as max_rss_size vectors.
7815 * use rss_size instead in the calculation since that
7816 * is governed by number of cpus in the system.
7817 * - assumes symmetric Tx/Rx pairing
7818 * - The number of VMDq pairs
7819 * - The CPU count within the NUMA node if iWARP is enabled
7820 * Once we count this up, try the request.
7822 * If we can't get what we want, we'll simplify to nearly nothing
7823 * and try again. If that still fails, we punt.
7825 vectors_left = hw->func_caps.num_msix_vectors;
7828 /* reserve one vector for miscellaneous handler */
7834 /* reserve some vectors for the main PF traffic queues. Initially we
7835 * only reserve at most 50% of the available vectors, in the case that
7836 * the number of online CPUs is large. This ensures that we can enable
7837 * extra features as well. Once we've enabled the other features, we
7838 * will use any remaining vectors to reach as close as we can to the
7839 * number of online CPUs.
7841 cpus = num_online_cpus();
7842 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
7843 vectors_left -= pf->num_lan_msix;
7845 /* reserve one vector for sideband flow director */
7846 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7848 pf->num_fdsb_msix = 1;
7852 pf->num_fdsb_msix = 0;
7856 /* can we reserve enough for iWARP? */
7857 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7858 iwarp_requested = pf->num_iwarp_msix;
7861 pf->num_iwarp_msix = 0;
7862 else if (vectors_left < pf->num_iwarp_msix)
7863 pf->num_iwarp_msix = 1;
7864 v_budget += pf->num_iwarp_msix;
7865 vectors_left -= pf->num_iwarp_msix;
7868 /* any vectors left over go for VMDq support */
7869 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7870 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7871 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7873 if (!vectors_left) {
7874 pf->num_vmdq_msix = 0;
7875 pf->num_vmdq_qps = 0;
7877 /* if we're short on vectors for what's desired, we limit
7878 * the queues per vmdq. If this is still more than are
7879 * available, the user will need to change the number of
7880 * queues/vectors used by the PF later with the ethtool
7883 if (vmdq_vecs < vmdq_vecs_wanted)
7884 pf->num_vmdq_qps = 1;
7885 pf->num_vmdq_msix = pf->num_vmdq_qps;
7887 v_budget += vmdq_vecs;
7888 vectors_left -= vmdq_vecs;
7892 /* On systems with a large number of SMP cores, we previously limited
7893 * the number of vectors for num_lan_msix to be at most 50% of the
7894 * available vectors, to allow for other features. Now, we add back
7895 * the remaining vectors. However, we ensure that the total
7896 * num_lan_msix will not exceed num_online_cpus(). To do this, we
7897 * calculate the number of vectors we can add without going over the
7898 * cap of CPUs. For systems with a small number of CPUs this will be
7901 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
7902 pf->num_lan_msix += extra_vectors;
7903 vectors_left -= extra_vectors;
7905 WARN(vectors_left < 0,
7906 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
7908 v_budget += pf->num_lan_msix;
7909 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7911 if (!pf->msix_entries)
7914 for (i = 0; i < v_budget; i++)
7915 pf->msix_entries[i].entry = i;
7916 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7918 if (v_actual < I40E_MIN_MSIX) {
7919 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7920 kfree(pf->msix_entries);
7921 pf->msix_entries = NULL;
7922 pci_disable_msix(pf->pdev);
7925 } else if (v_actual == I40E_MIN_MSIX) {
7926 /* Adjust for minimal MSIX use */
7927 pf->num_vmdq_vsis = 0;
7928 pf->num_vmdq_qps = 0;
7929 pf->num_lan_qps = 1;
7930 pf->num_lan_msix = 1;
7932 } else if (!vectors_left) {
7933 /* If we have limited resources, we will start with no vectors
7934 * for the special features and then allocate vectors to some
7935 * of these features based on the policy and at the end disable
7936 * the features that did not get any vectors.
7940 dev_info(&pf->pdev->dev,
7941 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7942 /* reserve the misc vector */
7945 /* Scale vector usage down */
7946 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7947 pf->num_vmdq_vsis = 1;
7948 pf->num_vmdq_qps = 1;
7950 /* partition out the remaining vectors */
7953 pf->num_lan_msix = 1;
7956 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7957 pf->num_lan_msix = 1;
7958 pf->num_iwarp_msix = 1;
7960 pf->num_lan_msix = 2;
7964 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7965 pf->num_iwarp_msix = min_t(int, (vec / 3),
7967 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7968 I40E_DEFAULT_NUM_VMDQ_VSI);
7970 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7971 I40E_DEFAULT_NUM_VMDQ_VSI);
7973 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7974 pf->num_fdsb_msix = 1;
7977 pf->num_lan_msix = min_t(int,
7978 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7980 pf->num_lan_qps = pf->num_lan_msix;
7985 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
7986 (pf->num_fdsb_msix == 0)) {
7987 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
7988 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7990 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7991 (pf->num_vmdq_msix == 0)) {
7992 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7993 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7996 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7997 (pf->num_iwarp_msix == 0)) {
7998 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7999 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
8001 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
8002 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
8004 pf->num_vmdq_msix * pf->num_vmdq_vsis,
8006 pf->num_iwarp_msix);
8012 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
8013 * @vsi: the VSI being configured
8014 * @v_idx: index of the vector in the vsi struct
8015 * @cpu: cpu to be used on affinity_mask
8017 * We allocate one q_vector. If allocation fails we return -ENOMEM.
8019 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
8021 struct i40e_q_vector *q_vector;
8023 /* allocate q_vector */
8024 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
8028 q_vector->vsi = vsi;
8029 q_vector->v_idx = v_idx;
8030 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
8033 netif_napi_add(vsi->netdev, &q_vector->napi,
8034 i40e_napi_poll, NAPI_POLL_WEIGHT);
8036 q_vector->rx.latency_range = I40E_LOW_LATENCY;
8037 q_vector->tx.latency_range = I40E_LOW_LATENCY;
8039 /* tie q_vector and vsi together */
8040 vsi->q_vectors[v_idx] = q_vector;
8046 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
8047 * @vsi: the VSI being configured
8049 * We allocate one q_vector per queue interrupt. If allocation fails we
8052 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
8054 struct i40e_pf *pf = vsi->back;
8055 int err, v_idx, num_q_vectors, current_cpu;
8057 /* if not MSIX, give the one vector only to the LAN VSI */
8058 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
8059 num_q_vectors = vsi->num_q_vectors;
8060 else if (vsi == pf->vsi[pf->lan_vsi])
8065 current_cpu = cpumask_first(cpu_online_mask);
8067 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
8068 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
8071 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
8072 if (unlikely(current_cpu >= nr_cpu_ids))
8073 current_cpu = cpumask_first(cpu_online_mask);
8080 i40e_free_q_vector(vsi, v_idx);
8086 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
8087 * @pf: board private structure to initialize
8089 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
8094 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8095 vectors = i40e_init_msix(pf);
8097 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
8098 I40E_FLAG_IWARP_ENABLED |
8099 I40E_FLAG_RSS_ENABLED |
8100 I40E_FLAG_DCB_CAPABLE |
8101 I40E_FLAG_DCB_ENABLED |
8102 I40E_FLAG_SRIOV_ENABLED |
8103 I40E_FLAG_FD_SB_ENABLED |
8104 I40E_FLAG_FD_ATR_ENABLED |
8105 I40E_FLAG_VMDQ_ENABLED);
8107 /* rework the queue expectations without MSIX */
8108 i40e_determine_queue_usage(pf);
8112 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8113 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
8114 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
8115 vectors = pci_enable_msi(pf->pdev);
8117 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
8119 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
8121 vectors = 1; /* one MSI or Legacy vector */
8124 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
8125 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
8127 /* set up vector assignment tracking */
8128 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
8129 pf->irq_pile = kzalloc(size, GFP_KERNEL);
8130 if (!pf->irq_pile) {
8131 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
8134 pf->irq_pile->num_entries = vectors;
8135 pf->irq_pile->search_hint = 0;
8137 /* track first vector for misc interrupts, ignore return */
8138 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
8144 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
8145 * @pf: board private structure
8147 * This sets up the handler for MSIX 0, which is used to manage the
8148 * non-queue interrupts, e.g. AdminQ and errors. This is not used
8149 * when in MSI or Legacy interrupt mode.
8151 static int i40e_setup_misc_vector(struct i40e_pf *pf)
8153 struct i40e_hw *hw = &pf->hw;
8156 /* Only request the irq if this is the first time through, and
8157 * not when we're rebuilding after a Reset
8159 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
8160 err = request_irq(pf->msix_entries[0].vector,
8161 i40e_intr, 0, pf->int_name, pf);
8163 dev_info(&pf->pdev->dev,
8164 "request_irq for %s failed: %d\n",
8170 i40e_enable_misc_int_causes(pf);
8172 /* associate no queues to the misc vector */
8173 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
8174 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
8178 i40e_irq_dynamic_enable_icr0(pf, true);
8184 * i40e_config_rss_aq - Prepare for RSS using AQ commands
8185 * @vsi: vsi structure
8186 * @seed: RSS hash seed
8188 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8189 u8 *lut, u16 lut_size)
8191 struct i40e_pf *pf = vsi->back;
8192 struct i40e_hw *hw = &pf->hw;
8196 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8197 (struct i40e_aqc_get_set_rss_key_data *)seed;
8198 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8200 dev_info(&pf->pdev->dev,
8201 "Cannot set RSS key, err %s aq_err %s\n",
8202 i40e_stat_str(hw, ret),
8203 i40e_aq_str(hw, hw->aq.asq_last_status));
8208 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8210 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8212 dev_info(&pf->pdev->dev,
8213 "Cannot set RSS lut, err %s aq_err %s\n",
8214 i40e_stat_str(hw, ret),
8215 i40e_aq_str(hw, hw->aq.asq_last_status));
8223 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8224 * @vsi: Pointer to vsi structure
8225 * @seed: Buffter to store the hash keys
8226 * @lut: Buffer to store the lookup table entries
8227 * @lut_size: Size of buffer to store the lookup table entries
8229 * Return 0 on success, negative on failure
8231 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8232 u8 *lut, u16 lut_size)
8234 struct i40e_pf *pf = vsi->back;
8235 struct i40e_hw *hw = &pf->hw;
8239 ret = i40e_aq_get_rss_key(hw, vsi->id,
8240 (struct i40e_aqc_get_set_rss_key_data *)seed);
8242 dev_info(&pf->pdev->dev,
8243 "Cannot get RSS key, err %s aq_err %s\n",
8244 i40e_stat_str(&pf->hw, ret),
8245 i40e_aq_str(&pf->hw,
8246 pf->hw.aq.asq_last_status));
8252 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8254 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8256 dev_info(&pf->pdev->dev,
8257 "Cannot get RSS lut, err %s aq_err %s\n",
8258 i40e_stat_str(&pf->hw, ret),
8259 i40e_aq_str(&pf->hw,
8260 pf->hw.aq.asq_last_status));
8269 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8270 * @vsi: VSI structure
8272 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8274 u8 seed[I40E_HKEY_ARRAY_SIZE];
8275 struct i40e_pf *pf = vsi->back;
8279 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8283 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8284 vsi->num_queue_pairs);
8288 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8291 /* Use the user configured hash keys and lookup table if there is one,
8292 * otherwise use default
8294 if (vsi->rss_lut_user)
8295 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8297 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8298 if (vsi->rss_hkey_user)
8299 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8301 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8302 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8309 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8310 * @vsi: Pointer to vsi structure
8311 * @seed: RSS hash seed
8312 * @lut: Lookup table
8313 * @lut_size: Lookup table size
8315 * Returns 0 on success, negative on failure
8317 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8318 const u8 *lut, u16 lut_size)
8320 struct i40e_pf *pf = vsi->back;
8321 struct i40e_hw *hw = &pf->hw;
8322 u16 vf_id = vsi->vf_id;
8325 /* Fill out hash function seed */
8327 u32 *seed_dw = (u32 *)seed;
8329 if (vsi->type == I40E_VSI_MAIN) {
8330 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8331 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8332 } else if (vsi->type == I40E_VSI_SRIOV) {
8333 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8334 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
8336 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8341 u32 *lut_dw = (u32 *)lut;
8343 if (vsi->type == I40E_VSI_MAIN) {
8344 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8346 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8347 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8348 } else if (vsi->type == I40E_VSI_SRIOV) {
8349 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8351 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8352 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
8354 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8363 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8364 * @vsi: Pointer to VSI structure
8365 * @seed: Buffer to store the keys
8366 * @lut: Buffer to store the lookup table entries
8367 * @lut_size: Size of buffer to store the lookup table entries
8369 * Returns 0 on success, negative on failure
8371 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8372 u8 *lut, u16 lut_size)
8374 struct i40e_pf *pf = vsi->back;
8375 struct i40e_hw *hw = &pf->hw;
8379 u32 *seed_dw = (u32 *)seed;
8381 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8382 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8385 u32 *lut_dw = (u32 *)lut;
8387 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8389 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8390 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8397 * i40e_config_rss - Configure RSS keys and lut
8398 * @vsi: Pointer to VSI structure
8399 * @seed: RSS hash seed
8400 * @lut: Lookup table
8401 * @lut_size: Lookup table size
8403 * Returns 0 on success, negative on failure
8405 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8407 struct i40e_pf *pf = vsi->back;
8409 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8410 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8412 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8416 * i40e_get_rss - Get RSS keys and lut
8417 * @vsi: Pointer to VSI structure
8418 * @seed: Buffer to store the keys
8419 * @lut: Buffer to store the lookup table entries
8420 * lut_size: Size of buffer to store the lookup table entries
8422 * Returns 0 on success, negative on failure
8424 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8426 struct i40e_pf *pf = vsi->back;
8428 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8429 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8431 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8435 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8436 * @pf: Pointer to board private structure
8437 * @lut: Lookup table
8438 * @rss_table_size: Lookup table size
8439 * @rss_size: Range of queue number for hashing
8441 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8442 u16 rss_table_size, u16 rss_size)
8446 for (i = 0; i < rss_table_size; i++)
8447 lut[i] = i % rss_size;
8451 * i40e_pf_config_rss - Prepare for RSS if used
8452 * @pf: board private structure
8454 static int i40e_pf_config_rss(struct i40e_pf *pf)
8456 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8457 u8 seed[I40E_HKEY_ARRAY_SIZE];
8459 struct i40e_hw *hw = &pf->hw;
8464 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8465 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8466 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8467 hena |= i40e_pf_get_default_rss_hena(pf);
8469 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8470 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8472 /* Determine the RSS table size based on the hardware capabilities */
8473 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8474 reg_val = (pf->rss_table_size == 512) ?
8475 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8476 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8477 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8479 /* Determine the RSS size of the VSI */
8480 if (!vsi->rss_size) {
8483 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
8484 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
8489 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8493 /* Use user configured lut if there is one, otherwise use default */
8494 if (vsi->rss_lut_user)
8495 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8497 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8499 /* Use user configured hash key if there is one, otherwise
8502 if (vsi->rss_hkey_user)
8503 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8505 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8506 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8513 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8514 * @pf: board private structure
8515 * @queue_count: the requested queue count for rss.
8517 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8518 * count which may be different from the requested queue count.
8519 * Note: expects to be called while under rtnl_lock()
8521 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8523 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8526 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8529 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8531 if (queue_count != vsi->num_queue_pairs) {
8534 vsi->req_queue_pairs = queue_count;
8535 i40e_prep_for_reset(pf, true);
8537 pf->alloc_rss_size = new_rss_size;
8539 i40e_reset_and_rebuild(pf, true, true);
8541 /* Discard the user configured hash keys and lut, if less
8542 * queues are enabled.
8544 if (queue_count < vsi->rss_size) {
8545 i40e_clear_rss_config_user(vsi);
8546 dev_dbg(&pf->pdev->dev,
8547 "discard user configured hash keys and lut\n");
8550 /* Reset vsi->rss_size, as number of enabled queues changed */
8551 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
8552 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
8554 i40e_pf_config_rss(pf);
8556 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
8557 vsi->req_queue_pairs, pf->rss_size_max);
8558 return pf->alloc_rss_size;
8562 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8563 * @pf: board private structure
8565 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8568 bool min_valid, max_valid;
8571 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8572 &min_valid, &max_valid);
8576 pf->npar_min_bw = min_bw;
8578 pf->npar_max_bw = max_bw;
8585 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8586 * @pf: board private structure
8588 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8590 struct i40e_aqc_configure_partition_bw_data bw_data;
8593 /* Set the valid bit for this PF */
8594 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8595 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8596 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8598 /* Set the new bandwidths */
8599 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8605 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8606 * @pf: board private structure
8608 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8610 /* Commit temporary BW setting to permanent NVM image */
8611 enum i40e_admin_queue_err last_aq_status;
8615 if (pf->hw.partition_id != 1) {
8616 dev_info(&pf->pdev->dev,
8617 "Commit BW only works on partition 1! This is partition %d",
8618 pf->hw.partition_id);
8619 ret = I40E_NOT_SUPPORTED;
8623 /* Acquire NVM for read access */
8624 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8625 last_aq_status = pf->hw.aq.asq_last_status;
8627 dev_info(&pf->pdev->dev,
8628 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8629 i40e_stat_str(&pf->hw, ret),
8630 i40e_aq_str(&pf->hw, last_aq_status));
8634 /* Read word 0x10 of NVM - SW compatibility word 1 */
8635 ret = i40e_aq_read_nvm(&pf->hw,
8636 I40E_SR_NVM_CONTROL_WORD,
8637 0x10, sizeof(nvm_word), &nvm_word,
8639 /* Save off last admin queue command status before releasing
8642 last_aq_status = pf->hw.aq.asq_last_status;
8643 i40e_release_nvm(&pf->hw);
8645 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8646 i40e_stat_str(&pf->hw, ret),
8647 i40e_aq_str(&pf->hw, last_aq_status));
8651 /* Wait a bit for NVM release to complete */
8654 /* Acquire NVM for write access */
8655 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8656 last_aq_status = pf->hw.aq.asq_last_status;
8658 dev_info(&pf->pdev->dev,
8659 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8660 i40e_stat_str(&pf->hw, ret),
8661 i40e_aq_str(&pf->hw, last_aq_status));
8664 /* Write it back out unchanged to initiate update NVM,
8665 * which will force a write of the shadow (alt) RAM to
8666 * the NVM - thus storing the bandwidth values permanently.
8668 ret = i40e_aq_update_nvm(&pf->hw,
8669 I40E_SR_NVM_CONTROL_WORD,
8670 0x10, sizeof(nvm_word),
8671 &nvm_word, true, NULL);
8672 /* Save off last admin queue command status before releasing
8675 last_aq_status = pf->hw.aq.asq_last_status;
8676 i40e_release_nvm(&pf->hw);
8678 dev_info(&pf->pdev->dev,
8679 "BW settings NOT SAVED, err %s aq_err %s\n",
8680 i40e_stat_str(&pf->hw, ret),
8681 i40e_aq_str(&pf->hw, last_aq_status));
8688 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8689 * @pf: board private structure to initialize
8691 * i40e_sw_init initializes the Adapter private data structure.
8692 * Fields are initialized based on PCI device information and
8693 * OS network device settings (MTU size).
8695 static int i40e_sw_init(struct i40e_pf *pf)
8700 /* Set default capability flags */
8701 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8702 I40E_FLAG_MSI_ENABLED |
8703 I40E_FLAG_MSIX_ENABLED;
8705 /* Set default ITR */
8706 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8707 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8709 /* Depending on PF configurations, it is possible that the RSS
8710 * maximum might end up larger than the available queues
8712 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8713 pf->alloc_rss_size = 1;
8714 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8715 pf->rss_size_max = min_t(int, pf->rss_size_max,
8716 pf->hw.func_caps.num_tx_qp);
8717 if (pf->hw.func_caps.rss) {
8718 pf->flags |= I40E_FLAG_RSS_ENABLED;
8719 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8723 /* MFP mode enabled */
8724 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8725 pf->flags |= I40E_FLAG_MFP_ENABLED;
8726 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8727 if (i40e_get_npar_bw_setting(pf))
8728 dev_warn(&pf->pdev->dev,
8729 "Could not get NPAR bw settings\n");
8731 dev_info(&pf->pdev->dev,
8732 "Min BW = %8.8x, Max BW = %8.8x\n",
8733 pf->npar_min_bw, pf->npar_max_bw);
8736 /* FW/NVM is not yet fixed in this regard */
8737 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8738 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8739 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8740 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8741 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8742 pf->hw.num_partitions > 1)
8743 dev_info(&pf->pdev->dev,
8744 "Flow Director Sideband mode Disabled in MFP mode\n");
8746 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8747 pf->fdir_pf_filter_count =
8748 pf->hw.func_caps.fd_filters_guaranteed;
8749 pf->hw.fdir_shared_filter_count =
8750 pf->hw.func_caps.fd_filters_best_effort;
8753 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8754 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8755 (pf->hw.aq.fw_maj_ver < 4))) {
8756 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8757 /* No DCB support for FW < v4.33 */
8758 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8761 /* Disable FW LLDP if FW < v4.3 */
8762 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8763 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8764 (pf->hw.aq.fw_maj_ver < 4)))
8765 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8767 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8768 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8769 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8770 (pf->hw.aq.fw_maj_ver >= 5)))
8771 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8773 if (pf->hw.func_caps.vmdq) {
8774 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8775 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8776 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8779 if (pf->hw.func_caps.iwarp) {
8780 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8781 /* IWARP needs one extra vector for CQP just like MISC.*/
8782 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8785 #ifdef CONFIG_PCI_IOV
8786 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8787 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8788 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8789 pf->num_req_vfs = min_t(int,
8790 pf->hw.func_caps.num_vfs,
8793 #endif /* CONFIG_PCI_IOV */
8794 if (pf->hw.mac.type == I40E_MAC_X722) {
8795 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE
8796 | I40E_FLAG_128_QP_RSS_CAPABLE
8797 | I40E_FLAG_HW_ATR_EVICT_CAPABLE
8798 | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE
8799 | I40E_FLAG_WB_ON_ITR_CAPABLE
8800 | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE
8801 | I40E_FLAG_NO_PCI_LINK_CHECK
8802 | I40E_FLAG_USE_SET_LLDP_MIB
8803 | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE
8804 | I40E_FLAG_PTP_L4_CAPABLE
8805 | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE;
8806 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8807 ((pf->hw.aq.api_maj_ver == 1) &&
8808 (pf->hw.aq.api_min_ver > 4))) {
8809 /* Supported in FW API version higher than 1.4 */
8810 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8811 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8813 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8816 pf->eeprom_version = 0xDEAD;
8817 pf->lan_veb = I40E_NO_VEB;
8818 pf->lan_vsi = I40E_NO_VSI;
8820 /* By default FW has this off for performance reasons */
8821 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8823 /* set up queue assignment tracking */
8824 size = sizeof(struct i40e_lump_tracking)
8825 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8826 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8831 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8832 pf->qp_pile->search_hint = 0;
8834 pf->tx_timeout_recovery_level = 1;
8836 mutex_init(&pf->switch_mutex);
8838 /* If NPAR is enabled nudge the Tx scheduler */
8839 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8840 i40e_set_npar_bw_setting(pf);
8847 * i40e_set_ntuple - set the ntuple feature flag and take action
8848 * @pf: board private structure to initialize
8849 * @features: the feature set that the stack is suggesting
8851 * returns a bool to indicate if reset needs to happen
8853 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8855 bool need_reset = false;
8857 /* Check if Flow Director n-tuple support was enabled or disabled. If
8858 * the state changed, we need to reset.
8860 if (features & NETIF_F_NTUPLE) {
8861 /* Enable filters and mark for reset */
8862 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8864 /* enable FD_SB only if there is MSI-X vector */
8865 if (pf->num_fdsb_msix > 0)
8866 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8868 /* turn off filters, mark for reset and clear SW filter list */
8869 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8871 i40e_fdir_filter_exit(pf);
8873 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8874 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8875 /* reset fd counters */
8878 /* if ATR was auto disabled it can be re-enabled. */
8879 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8880 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8881 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8882 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8883 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8890 * i40e_clear_rss_lut - clear the rx hash lookup table
8891 * @vsi: the VSI being configured
8893 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8895 struct i40e_pf *pf = vsi->back;
8896 struct i40e_hw *hw = &pf->hw;
8897 u16 vf_id = vsi->vf_id;
8900 if (vsi->type == I40E_VSI_MAIN) {
8901 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8902 wr32(hw, I40E_PFQF_HLUT(i), 0);
8903 } else if (vsi->type == I40E_VSI_SRIOV) {
8904 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8905 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8907 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8912 * i40e_set_features - set the netdev feature flags
8913 * @netdev: ptr to the netdev being adjusted
8914 * @features: the feature set that the stack is suggesting
8915 * Note: expects to be called while under rtnl_lock()
8917 static int i40e_set_features(struct net_device *netdev,
8918 netdev_features_t features)
8920 struct i40e_netdev_priv *np = netdev_priv(netdev);
8921 struct i40e_vsi *vsi = np->vsi;
8922 struct i40e_pf *pf = vsi->back;
8925 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8926 i40e_pf_config_rss(pf);
8927 else if (!(features & NETIF_F_RXHASH) &&
8928 netdev->features & NETIF_F_RXHASH)
8929 i40e_clear_rss_lut(vsi);
8931 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8932 i40e_vlan_stripping_enable(vsi);
8934 i40e_vlan_stripping_disable(vsi);
8936 need_reset = i40e_set_ntuple(pf, features);
8939 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED), true);
8945 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8946 * @pf: board private structure
8947 * @port: The UDP port to look up
8949 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8951 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
8955 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8956 if (pf->udp_ports[i].port == port)
8964 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8965 * @netdev: This physical port's netdev
8966 * @ti: Tunnel endpoint information
8968 static void i40e_udp_tunnel_add(struct net_device *netdev,
8969 struct udp_tunnel_info *ti)
8971 struct i40e_netdev_priv *np = netdev_priv(netdev);
8972 struct i40e_vsi *vsi = np->vsi;
8973 struct i40e_pf *pf = vsi->back;
8974 u16 port = ntohs(ti->port);
8978 idx = i40e_get_udp_port_idx(pf, port);
8980 /* Check if port already exists */
8981 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8982 netdev_info(netdev, "port %d already offloaded\n", port);
8986 /* Now check if there is space to add the new port */
8987 next_idx = i40e_get_udp_port_idx(pf, 0);
8989 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8990 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8996 case UDP_TUNNEL_TYPE_VXLAN:
8997 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8999 case UDP_TUNNEL_TYPE_GENEVE:
9000 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
9002 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
9008 /* New port: add it and mark its index in the bitmap */
9009 pf->udp_ports[next_idx].port = port;
9010 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
9011 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9015 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
9016 * @netdev: This physical port's netdev
9017 * @ti: Tunnel endpoint information
9019 static void i40e_udp_tunnel_del(struct net_device *netdev,
9020 struct udp_tunnel_info *ti)
9022 struct i40e_netdev_priv *np = netdev_priv(netdev);
9023 struct i40e_vsi *vsi = np->vsi;
9024 struct i40e_pf *pf = vsi->back;
9025 u16 port = ntohs(ti->port);
9028 idx = i40e_get_udp_port_idx(pf, port);
9030 /* Check if port already exists */
9031 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
9035 case UDP_TUNNEL_TYPE_VXLAN:
9036 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
9039 case UDP_TUNNEL_TYPE_GENEVE:
9040 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
9047 /* if port exists, set it to 0 (mark for deletion)
9048 * and make it pending
9050 pf->udp_ports[idx].port = 0;
9051 pf->pending_udp_bitmap |= BIT_ULL(idx);
9052 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9056 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
9060 static int i40e_get_phys_port_id(struct net_device *netdev,
9061 struct netdev_phys_item_id *ppid)
9063 struct i40e_netdev_priv *np = netdev_priv(netdev);
9064 struct i40e_pf *pf = np->vsi->back;
9065 struct i40e_hw *hw = &pf->hw;
9067 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
9070 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
9071 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
9077 * i40e_ndo_fdb_add - add an entry to the hardware database
9078 * @ndm: the input from the stack
9079 * @tb: pointer to array of nladdr (unused)
9080 * @dev: the net device pointer
9081 * @addr: the MAC address entry being added
9082 * @flags: instructions from stack about fdb operation
9084 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9085 struct net_device *dev,
9086 const unsigned char *addr, u16 vid,
9089 struct i40e_netdev_priv *np = netdev_priv(dev);
9090 struct i40e_pf *pf = np->vsi->back;
9093 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
9097 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
9101 /* Hardware does not support aging addresses so if a
9102 * ndm_state is given only allow permanent addresses
9104 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
9105 netdev_info(dev, "FDB only supports static addresses\n");
9109 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
9110 err = dev_uc_add_excl(dev, addr);
9111 else if (is_multicast_ether_addr(addr))
9112 err = dev_mc_add_excl(dev, addr);
9116 /* Only return duplicate errors if NLM_F_EXCL is set */
9117 if (err == -EEXIST && !(flags & NLM_F_EXCL))
9124 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
9125 * @dev: the netdev being configured
9126 * @nlh: RTNL message
9128 * Inserts a new hardware bridge if not already created and
9129 * enables the bridging mode requested (VEB or VEPA). If the
9130 * hardware bridge has already been inserted and the request
9131 * is to change the mode then that requires a PF reset to
9132 * allow rebuild of the components with required hardware
9133 * bridge mode enabled.
9135 * Note: expects to be called while under rtnl_lock()
9137 static int i40e_ndo_bridge_setlink(struct net_device *dev,
9138 struct nlmsghdr *nlh,
9141 struct i40e_netdev_priv *np = netdev_priv(dev);
9142 struct i40e_vsi *vsi = np->vsi;
9143 struct i40e_pf *pf = vsi->back;
9144 struct i40e_veb *veb = NULL;
9145 struct nlattr *attr, *br_spec;
9148 /* Only for PF VSI for now */
9149 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9152 /* Find the HW bridge for PF VSI */
9153 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9154 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9158 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9160 nla_for_each_nested(attr, br_spec, rem) {
9163 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9166 mode = nla_get_u16(attr);
9167 if ((mode != BRIDGE_MODE_VEPA) &&
9168 (mode != BRIDGE_MODE_VEB))
9171 /* Insert a new HW bridge */
9173 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9174 vsi->tc_config.enabled_tc);
9176 veb->bridge_mode = mode;
9177 i40e_config_bridge_mode(veb);
9179 /* No Bridge HW offload available */
9183 } else if (mode != veb->bridge_mode) {
9184 /* Existing HW bridge but different mode needs reset */
9185 veb->bridge_mode = mode;
9186 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9187 if (mode == BRIDGE_MODE_VEB)
9188 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9190 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9191 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED),
9201 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9204 * @seq: RTNL message seq #
9205 * @dev: the netdev being configured
9206 * @filter_mask: unused
9207 * @nlflags: netlink flags passed in
9209 * Return the mode in which the hardware bridge is operating in
9212 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9213 struct net_device *dev,
9214 u32 __always_unused filter_mask,
9217 struct i40e_netdev_priv *np = netdev_priv(dev);
9218 struct i40e_vsi *vsi = np->vsi;
9219 struct i40e_pf *pf = vsi->back;
9220 struct i40e_veb *veb = NULL;
9223 /* Only for PF VSI for now */
9224 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9227 /* Find the HW bridge for the PF VSI */
9228 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9229 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9236 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9237 0, 0, nlflags, filter_mask, NULL);
9241 * i40e_features_check - Validate encapsulated packet conforms to limits
9243 * @dev: This physical port's netdev
9244 * @features: Offload features that the stack believes apply
9246 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9247 struct net_device *dev,
9248 netdev_features_t features)
9252 /* No point in doing any of this if neither checksum nor GSO are
9253 * being requested for this frame. We can rule out both by just
9254 * checking for CHECKSUM_PARTIAL
9256 if (skb->ip_summed != CHECKSUM_PARTIAL)
9259 /* We cannot support GSO if the MSS is going to be less than
9260 * 64 bytes. If it is then we need to drop support for GSO.
9262 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
9263 features &= ~NETIF_F_GSO_MASK;
9265 /* MACLEN can support at most 63 words */
9266 len = skb_network_header(skb) - skb->data;
9267 if (len & ~(63 * 2))
9270 /* IPLEN and EIPLEN can support at most 127 dwords */
9271 len = skb_transport_header(skb) - skb_network_header(skb);
9272 if (len & ~(127 * 4))
9275 if (skb->encapsulation) {
9276 /* L4TUNLEN can support 127 words */
9277 len = skb_inner_network_header(skb) - skb_transport_header(skb);
9278 if (len & ~(127 * 2))
9281 /* IPLEN can support at most 127 dwords */
9282 len = skb_inner_transport_header(skb) -
9283 skb_inner_network_header(skb);
9284 if (len & ~(127 * 4))
9288 /* No need to validate L4LEN as TCP is the only protocol with a
9289 * a flexible value and we support all possible values supported
9290 * by TCP, which is at most 15 dwords
9295 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9298 static const struct net_device_ops i40e_netdev_ops = {
9299 .ndo_open = i40e_open,
9300 .ndo_stop = i40e_close,
9301 .ndo_start_xmit = i40e_lan_xmit_frame,
9302 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9303 .ndo_set_rx_mode = i40e_set_rx_mode,
9304 .ndo_validate_addr = eth_validate_addr,
9305 .ndo_set_mac_address = i40e_set_mac,
9306 .ndo_change_mtu = i40e_change_mtu,
9307 .ndo_do_ioctl = i40e_ioctl,
9308 .ndo_tx_timeout = i40e_tx_timeout,
9309 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9310 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9311 #ifdef CONFIG_NET_POLL_CONTROLLER
9312 .ndo_poll_controller = i40e_netpoll,
9314 .ndo_setup_tc = __i40e_setup_tc,
9315 .ndo_set_features = i40e_set_features,
9316 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9317 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9318 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9319 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9320 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9321 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9322 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9323 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9324 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9325 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9326 .ndo_fdb_add = i40e_ndo_fdb_add,
9327 .ndo_features_check = i40e_features_check,
9328 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9329 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9333 * i40e_config_netdev - Setup the netdev flags
9334 * @vsi: the VSI being configured
9336 * Returns 0 on success, negative value on failure
9338 static int i40e_config_netdev(struct i40e_vsi *vsi)
9340 struct i40e_pf *pf = vsi->back;
9341 struct i40e_hw *hw = &pf->hw;
9342 struct i40e_netdev_priv *np;
9343 struct net_device *netdev;
9344 u8 broadcast[ETH_ALEN];
9345 u8 mac_addr[ETH_ALEN];
9347 netdev_features_t hw_enc_features;
9348 netdev_features_t hw_features;
9350 etherdev_size = sizeof(struct i40e_netdev_priv);
9351 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9355 vsi->netdev = netdev;
9356 np = netdev_priv(netdev);
9359 hw_enc_features = NETIF_F_SG |
9363 NETIF_F_SOFT_FEATURES |
9368 NETIF_F_GSO_GRE_CSUM |
9369 NETIF_F_GSO_PARTIAL |
9370 NETIF_F_GSO_UDP_TUNNEL |
9371 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9377 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9378 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9380 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9382 netdev->hw_enc_features |= hw_enc_features;
9384 /* record features VLANs can make use of */
9385 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
9387 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9388 netdev->hw_features |= NETIF_F_NTUPLE;
9389 hw_features = hw_enc_features |
9390 NETIF_F_HW_VLAN_CTAG_TX |
9391 NETIF_F_HW_VLAN_CTAG_RX;
9393 netdev->hw_features |= hw_features;
9395 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9396 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9398 if (vsi->type == I40E_VSI_MAIN) {
9399 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9400 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9401 /* The following steps are necessary for two reasons. First,
9402 * some older NVM configurations load a default MAC-VLAN
9403 * filter that will accept any tagged packet, and we want to
9404 * replace this with a normal filter. Additionally, it is
9405 * possible our MAC address was provided by the platform using
9406 * Open Firmware or similar.
9408 * Thus, we need to remove the default filter and install one
9409 * specific to the MAC address.
9411 i40e_rm_default_mac_filter(vsi, mac_addr);
9412 spin_lock_bh(&vsi->mac_filter_hash_lock);
9413 i40e_add_mac_filter(vsi, mac_addr);
9414 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9416 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9417 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9418 pf->vsi[pf->lan_vsi]->netdev->name);
9419 random_ether_addr(mac_addr);
9421 spin_lock_bh(&vsi->mac_filter_hash_lock);
9422 i40e_add_mac_filter(vsi, mac_addr);
9423 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9426 /* Add the broadcast filter so that we initially will receive
9427 * broadcast packets. Note that when a new VLAN is first added the
9428 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
9429 * specific filters as part of transitioning into "vlan" operation.
9430 * When more VLANs are added, the driver will copy each existing MAC
9431 * filter and add it for the new VLAN.
9433 * Broadcast filters are handled specially by
9434 * i40e_sync_filters_subtask, as the driver must to set the broadcast
9435 * promiscuous bit instead of adding this directly as a MAC/VLAN
9436 * filter. The subtask will update the correct broadcast promiscuous
9437 * bits as VLANs become active or inactive.
9439 eth_broadcast_addr(broadcast);
9440 spin_lock_bh(&vsi->mac_filter_hash_lock);
9441 i40e_add_mac_filter(vsi, broadcast);
9442 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9444 ether_addr_copy(netdev->dev_addr, mac_addr);
9445 ether_addr_copy(netdev->perm_addr, mac_addr);
9447 netdev->priv_flags |= IFF_UNICAST_FLT;
9448 netdev->priv_flags |= IFF_SUPP_NOFCS;
9449 /* Setup netdev TC information */
9450 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9452 netdev->netdev_ops = &i40e_netdev_ops;
9453 netdev->watchdog_timeo = 5 * HZ;
9454 i40e_set_ethtool_ops(netdev);
9456 /* MTU range: 68 - 9706 */
9457 netdev->min_mtu = ETH_MIN_MTU;
9458 netdev->max_mtu = I40E_MAX_RXBUFFER -
9459 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9465 * i40e_vsi_delete - Delete a VSI from the switch
9466 * @vsi: the VSI being removed
9468 * Returns 0 on success, negative value on failure
9470 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9472 /* remove default VSI is not allowed */
9473 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9476 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9480 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9481 * @vsi: the VSI being queried
9483 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9485 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9487 struct i40e_veb *veb;
9488 struct i40e_pf *pf = vsi->back;
9490 /* Uplink is not a bridge so default to VEB */
9491 if (vsi->veb_idx == I40E_NO_VEB)
9494 veb = pf->veb[vsi->veb_idx];
9496 dev_info(&pf->pdev->dev,
9497 "There is no veb associated with the bridge\n");
9501 /* Uplink is a bridge in VEPA mode */
9502 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9505 /* Uplink is a bridge in VEB mode */
9509 /* VEPA is now default bridge, so return 0 */
9514 * i40e_add_vsi - Add a VSI to the switch
9515 * @vsi: the VSI being configured
9517 * This initializes a VSI context depending on the VSI type to be added and
9518 * passes it down to the add_vsi aq command.
9520 static int i40e_add_vsi(struct i40e_vsi *vsi)
9523 struct i40e_pf *pf = vsi->back;
9524 struct i40e_hw *hw = &pf->hw;
9525 struct i40e_vsi_context ctxt;
9526 struct i40e_mac_filter *f;
9527 struct hlist_node *h;
9530 u8 enabled_tc = 0x1; /* TC0 enabled */
9533 memset(&ctxt, 0, sizeof(ctxt));
9534 switch (vsi->type) {
9536 /* The PF's main VSI is already setup as part of the
9537 * device initialization, so we'll not bother with
9538 * the add_vsi call, but we will retrieve the current
9541 ctxt.seid = pf->main_vsi_seid;
9542 ctxt.pf_num = pf->hw.pf_id;
9544 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9545 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9547 dev_info(&pf->pdev->dev,
9548 "couldn't get PF vsi config, err %s aq_err %s\n",
9549 i40e_stat_str(&pf->hw, ret),
9550 i40e_aq_str(&pf->hw,
9551 pf->hw.aq.asq_last_status));
9554 vsi->info = ctxt.info;
9555 vsi->info.valid_sections = 0;
9557 vsi->seid = ctxt.seid;
9558 vsi->id = ctxt.vsi_number;
9560 enabled_tc = i40e_pf_get_tc_map(pf);
9562 /* MFP mode setup queue map and update VSI */
9563 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9564 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9565 memset(&ctxt, 0, sizeof(ctxt));
9566 ctxt.seid = pf->main_vsi_seid;
9567 ctxt.pf_num = pf->hw.pf_id;
9569 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9570 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9572 dev_info(&pf->pdev->dev,
9573 "update vsi failed, err %s aq_err %s\n",
9574 i40e_stat_str(&pf->hw, ret),
9575 i40e_aq_str(&pf->hw,
9576 pf->hw.aq.asq_last_status));
9580 /* update the local VSI info queue map */
9581 i40e_vsi_update_queue_map(vsi, &ctxt);
9582 vsi->info.valid_sections = 0;
9584 /* Default/Main VSI is only enabled for TC0
9585 * reconfigure it to enable all TCs that are
9586 * available on the port in SFP mode.
9587 * For MFP case the iSCSI PF would use this
9588 * flow to enable LAN+iSCSI TC.
9590 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9592 dev_info(&pf->pdev->dev,
9593 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9595 i40e_stat_str(&pf->hw, ret),
9596 i40e_aq_str(&pf->hw,
9597 pf->hw.aq.asq_last_status));
9604 ctxt.pf_num = hw->pf_id;
9606 ctxt.uplink_seid = vsi->uplink_seid;
9607 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9608 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9609 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9610 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9611 ctxt.info.valid_sections |=
9612 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9613 ctxt.info.switch_id =
9614 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9616 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9619 case I40E_VSI_VMDQ2:
9620 ctxt.pf_num = hw->pf_id;
9622 ctxt.uplink_seid = vsi->uplink_seid;
9623 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9624 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9626 /* This VSI is connected to VEB so the switch_id
9627 * should be set to zero by default.
9629 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9630 ctxt.info.valid_sections |=
9631 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9632 ctxt.info.switch_id =
9633 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9636 /* Setup the VSI tx/rx queue map for TC0 only for now */
9637 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9640 case I40E_VSI_SRIOV:
9641 ctxt.pf_num = hw->pf_id;
9642 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9643 ctxt.uplink_seid = vsi->uplink_seid;
9644 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9645 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9647 /* This VSI is connected to VEB so the switch_id
9648 * should be set to zero by default.
9650 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9651 ctxt.info.valid_sections |=
9652 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9653 ctxt.info.switch_id =
9654 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9657 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9658 ctxt.info.valid_sections |=
9659 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9660 ctxt.info.queueing_opt_flags |=
9661 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9662 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9665 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9666 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9667 if (pf->vf[vsi->vf_id].spoofchk) {
9668 ctxt.info.valid_sections |=
9669 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9670 ctxt.info.sec_flags |=
9671 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9672 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9674 /* Setup the VSI tx/rx queue map for TC0 only for now */
9675 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9678 case I40E_VSI_IWARP:
9679 /* send down message to iWARP */
9686 if (vsi->type != I40E_VSI_MAIN) {
9687 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9689 dev_info(&vsi->back->pdev->dev,
9690 "add vsi failed, err %s aq_err %s\n",
9691 i40e_stat_str(&pf->hw, ret),
9692 i40e_aq_str(&pf->hw,
9693 pf->hw.aq.asq_last_status));
9697 vsi->info = ctxt.info;
9698 vsi->info.valid_sections = 0;
9699 vsi->seid = ctxt.seid;
9700 vsi->id = ctxt.vsi_number;
9703 vsi->active_filters = 0;
9704 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9705 spin_lock_bh(&vsi->mac_filter_hash_lock);
9706 /* If macvlan filters already exist, force them to get loaded */
9707 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
9708 f->state = I40E_FILTER_NEW;
9711 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9714 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9715 pf->flags |= I40E_FLAG_FILTER_SYNC;
9718 /* Update VSI BW information */
9719 ret = i40e_vsi_get_bw_info(vsi);
9721 dev_info(&pf->pdev->dev,
9722 "couldn't get vsi bw info, err %s aq_err %s\n",
9723 i40e_stat_str(&pf->hw, ret),
9724 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9725 /* VSI is already added so not tearing that up */
9734 * i40e_vsi_release - Delete a VSI and free its resources
9735 * @vsi: the VSI being removed
9737 * Returns 0 on success or < 0 on error
9739 int i40e_vsi_release(struct i40e_vsi *vsi)
9741 struct i40e_mac_filter *f;
9742 struct hlist_node *h;
9743 struct i40e_veb *veb = NULL;
9750 /* release of a VEB-owner or last VSI is not allowed */
9751 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9752 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9753 vsi->seid, vsi->uplink_seid);
9756 if (vsi == pf->vsi[pf->lan_vsi] &&
9757 !test_bit(__I40E_DOWN, &pf->state)) {
9758 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9762 uplink_seid = vsi->uplink_seid;
9763 if (vsi->type != I40E_VSI_SRIOV) {
9764 if (vsi->netdev_registered) {
9765 vsi->netdev_registered = false;
9767 /* results in a call to i40e_close() */
9768 unregister_netdev(vsi->netdev);
9771 i40e_vsi_close(vsi);
9773 i40e_vsi_disable_irq(vsi);
9776 spin_lock_bh(&vsi->mac_filter_hash_lock);
9778 /* clear the sync flag on all filters */
9780 __dev_uc_unsync(vsi->netdev, NULL);
9781 __dev_mc_unsync(vsi->netdev, NULL);
9784 /* make sure any remaining filters are marked for deletion */
9785 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
9786 __i40e_del_filter(vsi, f);
9788 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9790 i40e_sync_vsi_filters(vsi);
9792 i40e_vsi_delete(vsi);
9793 i40e_vsi_free_q_vectors(vsi);
9795 free_netdev(vsi->netdev);
9798 i40e_vsi_clear_rings(vsi);
9799 i40e_vsi_clear(vsi);
9801 /* If this was the last thing on the VEB, except for the
9802 * controlling VSI, remove the VEB, which puts the controlling
9803 * VSI onto the next level down in the switch.
9805 * Well, okay, there's one more exception here: don't remove
9806 * the orphan VEBs yet. We'll wait for an explicit remove request
9807 * from up the network stack.
9809 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9811 pf->vsi[i]->uplink_seid == uplink_seid &&
9812 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9813 n++; /* count the VSIs */
9816 for (i = 0; i < I40E_MAX_VEB; i++) {
9819 if (pf->veb[i]->uplink_seid == uplink_seid)
9820 n++; /* count the VEBs */
9821 if (pf->veb[i]->seid == uplink_seid)
9824 if (n == 0 && veb && veb->uplink_seid != 0)
9825 i40e_veb_release(veb);
9831 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9832 * @vsi: ptr to the VSI
9834 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9835 * corresponding SW VSI structure and initializes num_queue_pairs for the
9836 * newly allocated VSI.
9838 * Returns 0 on success or negative on failure
9840 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9843 struct i40e_pf *pf = vsi->back;
9845 if (vsi->q_vectors[0]) {
9846 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9851 if (vsi->base_vector) {
9852 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9853 vsi->seid, vsi->base_vector);
9857 ret = i40e_vsi_alloc_q_vectors(vsi);
9859 dev_info(&pf->pdev->dev,
9860 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9861 vsi->num_q_vectors, vsi->seid, ret);
9862 vsi->num_q_vectors = 0;
9863 goto vector_setup_out;
9866 /* In Legacy mode, we do not have to get any other vector since we
9867 * piggyback on the misc/ICR0 for queue interrupts.
9869 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9871 if (vsi->num_q_vectors)
9872 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9873 vsi->num_q_vectors, vsi->idx);
9874 if (vsi->base_vector < 0) {
9875 dev_info(&pf->pdev->dev,
9876 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9877 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9878 i40e_vsi_free_q_vectors(vsi);
9880 goto vector_setup_out;
9888 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9889 * @vsi: pointer to the vsi.
9891 * This re-allocates a vsi's queue resources.
9893 * Returns pointer to the successfully allocated and configured VSI sw struct
9894 * on success, otherwise returns NULL on failure.
9896 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9907 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9908 i40e_vsi_clear_rings(vsi);
9910 i40e_vsi_free_arrays(vsi, false);
9911 i40e_set_num_rings_in_vsi(vsi);
9912 ret = i40e_vsi_alloc_arrays(vsi, false);
9916 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9918 dev_info(&pf->pdev->dev,
9919 "failed to get tracking for %d queues for VSI %d err %d\n",
9920 vsi->alloc_queue_pairs, vsi->seid, ret);
9923 vsi->base_queue = ret;
9925 /* Update the FW view of the VSI. Force a reset of TC and queue
9926 * layout configurations.
9928 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9929 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9930 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9931 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9932 if (vsi->type == I40E_VSI_MAIN)
9933 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9935 /* assign it some queues */
9936 ret = i40e_alloc_rings(vsi);
9940 /* map all of the rings to the q_vectors */
9941 i40e_vsi_map_rings_to_vectors(vsi);
9945 i40e_vsi_free_q_vectors(vsi);
9946 if (vsi->netdev_registered) {
9947 vsi->netdev_registered = false;
9948 unregister_netdev(vsi->netdev);
9949 free_netdev(vsi->netdev);
9952 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9954 i40e_vsi_clear(vsi);
9959 * i40e_vsi_setup - Set up a VSI by a given type
9960 * @pf: board private structure
9962 * @uplink_seid: the switch element to link to
9963 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9965 * This allocates the sw VSI structure and its queue resources, then add a VSI
9966 * to the identified VEB.
9968 * Returns pointer to the successfully allocated and configure VSI sw struct on
9969 * success, otherwise returns NULL on failure.
9971 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9972 u16 uplink_seid, u32 param1)
9974 struct i40e_vsi *vsi = NULL;
9975 struct i40e_veb *veb = NULL;
9979 /* The requested uplink_seid must be either
9980 * - the PF's port seid
9981 * no VEB is needed because this is the PF
9982 * or this is a Flow Director special case VSI
9983 * - seid of an existing VEB
9984 * - seid of a VSI that owns an existing VEB
9985 * - seid of a VSI that doesn't own a VEB
9986 * a new VEB is created and the VSI becomes the owner
9987 * - seid of the PF VSI, which is what creates the first VEB
9988 * this is a special case of the previous
9990 * Find which uplink_seid we were given and create a new VEB if needed
9992 for (i = 0; i < I40E_MAX_VEB; i++) {
9993 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9999 if (!veb && uplink_seid != pf->mac_seid) {
10001 for (i = 0; i < pf->num_alloc_vsi; i++) {
10002 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
10008 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
10013 if (vsi->uplink_seid == pf->mac_seid)
10014 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
10015 vsi->tc_config.enabled_tc);
10016 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
10017 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
10018 vsi->tc_config.enabled_tc);
10020 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
10021 dev_info(&vsi->back->pdev->dev,
10022 "New VSI creation error, uplink seid of LAN VSI expected.\n");
10025 /* We come up by default in VEPA mode if SRIOV is not
10026 * already enabled, in which case we can't force VEPA
10029 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
10030 veb->bridge_mode = BRIDGE_MODE_VEPA;
10031 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
10033 i40e_config_bridge_mode(veb);
10035 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
10036 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
10040 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
10044 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10045 uplink_seid = veb->seid;
10048 /* get vsi sw struct */
10049 v_idx = i40e_vsi_mem_alloc(pf, type);
10052 vsi = pf->vsi[v_idx];
10056 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
10058 if (type == I40E_VSI_MAIN)
10059 pf->lan_vsi = v_idx;
10060 else if (type == I40E_VSI_SRIOV)
10061 vsi->vf_id = param1;
10062 /* assign it some queues */
10063 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
10066 dev_info(&pf->pdev->dev,
10067 "failed to get tracking for %d queues for VSI %d err=%d\n",
10068 vsi->alloc_queue_pairs, vsi->seid, ret);
10071 vsi->base_queue = ret;
10073 /* get a VSI from the hardware */
10074 vsi->uplink_seid = uplink_seid;
10075 ret = i40e_add_vsi(vsi);
10079 switch (vsi->type) {
10080 /* setup the netdev if needed */
10081 case I40E_VSI_MAIN:
10082 /* Apply relevant filters if a platform-specific mac
10083 * address was selected.
10085 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
10086 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
10088 dev_warn(&pf->pdev->dev,
10089 "could not set up macaddr; err %d\n",
10093 case I40E_VSI_VMDQ2:
10094 ret = i40e_config_netdev(vsi);
10097 ret = register_netdev(vsi->netdev);
10100 vsi->netdev_registered = true;
10101 netif_carrier_off(vsi->netdev);
10102 #ifdef CONFIG_I40E_DCB
10103 /* Setup DCB netlink interface */
10104 i40e_dcbnl_setup(vsi);
10105 #endif /* CONFIG_I40E_DCB */
10108 case I40E_VSI_FDIR:
10109 /* set up vectors and rings if needed */
10110 ret = i40e_vsi_setup_vectors(vsi);
10114 ret = i40e_alloc_rings(vsi);
10118 /* map all of the rings to the q_vectors */
10119 i40e_vsi_map_rings_to_vectors(vsi);
10121 i40e_vsi_reset_stats(vsi);
10125 /* no netdev or rings for the other VSI types */
10129 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
10130 (vsi->type == I40E_VSI_VMDQ2)) {
10131 ret = i40e_vsi_config_rss(vsi);
10136 i40e_vsi_free_q_vectors(vsi);
10138 if (vsi->netdev_registered) {
10139 vsi->netdev_registered = false;
10140 unregister_netdev(vsi->netdev);
10141 free_netdev(vsi->netdev);
10142 vsi->netdev = NULL;
10145 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10147 i40e_vsi_clear(vsi);
10153 * i40e_veb_get_bw_info - Query VEB BW information
10154 * @veb: the veb to query
10156 * Query the Tx scheduler BW configuration data for given VEB
10158 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
10160 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
10161 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
10162 struct i40e_pf *pf = veb->pf;
10163 struct i40e_hw *hw = &pf->hw;
10168 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
10171 dev_info(&pf->pdev->dev,
10172 "query veb bw config failed, err %s aq_err %s\n",
10173 i40e_stat_str(&pf->hw, ret),
10174 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10178 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
10181 dev_info(&pf->pdev->dev,
10182 "query veb bw ets config failed, err %s aq_err %s\n",
10183 i40e_stat_str(&pf->hw, ret),
10184 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10188 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10189 veb->bw_max_quanta = ets_data.tc_bw_max;
10190 veb->is_abs_credits = bw_data.absolute_credits_enable;
10191 veb->enabled_tc = ets_data.tc_valid_bits;
10192 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10193 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10194 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10195 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10196 veb->bw_tc_limit_credits[i] =
10197 le16_to_cpu(bw_data.tc_bw_limits[i]);
10198 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10206 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10207 * @pf: board private structure
10209 * On error: returns error code (negative)
10210 * On success: returns vsi index in PF (positive)
10212 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10215 struct i40e_veb *veb;
10218 /* Need to protect the allocation of switch elements at the PF level */
10219 mutex_lock(&pf->switch_mutex);
10221 /* VEB list may be fragmented if VEB creation/destruction has
10222 * been happening. We can afford to do a quick scan to look
10223 * for any free slots in the list.
10225 * find next empty veb slot, looping back around if necessary
10228 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10230 if (i >= I40E_MAX_VEB) {
10232 goto err_alloc_veb; /* out of VEB slots! */
10235 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10238 goto err_alloc_veb;
10242 veb->enabled_tc = 1;
10247 mutex_unlock(&pf->switch_mutex);
10252 * i40e_switch_branch_release - Delete a branch of the switch tree
10253 * @branch: where to start deleting
10255 * This uses recursion to find the tips of the branch to be
10256 * removed, deleting until we get back to and can delete this VEB.
10258 static void i40e_switch_branch_release(struct i40e_veb *branch)
10260 struct i40e_pf *pf = branch->pf;
10261 u16 branch_seid = branch->seid;
10262 u16 veb_idx = branch->idx;
10265 /* release any VEBs on this VEB - RECURSION */
10266 for (i = 0; i < I40E_MAX_VEB; i++) {
10269 if (pf->veb[i]->uplink_seid == branch->seid)
10270 i40e_switch_branch_release(pf->veb[i]);
10273 /* Release the VSIs on this VEB, but not the owner VSI.
10275 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10276 * the VEB itself, so don't use (*branch) after this loop.
10278 for (i = 0; i < pf->num_alloc_vsi; i++) {
10281 if (pf->vsi[i]->uplink_seid == branch_seid &&
10282 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10283 i40e_vsi_release(pf->vsi[i]);
10287 /* There's one corner case where the VEB might not have been
10288 * removed, so double check it here and remove it if needed.
10289 * This case happens if the veb was created from the debugfs
10290 * commands and no VSIs were added to it.
10292 if (pf->veb[veb_idx])
10293 i40e_veb_release(pf->veb[veb_idx]);
10297 * i40e_veb_clear - remove veb struct
10298 * @veb: the veb to remove
10300 static void i40e_veb_clear(struct i40e_veb *veb)
10306 struct i40e_pf *pf = veb->pf;
10308 mutex_lock(&pf->switch_mutex);
10309 if (pf->veb[veb->idx] == veb)
10310 pf->veb[veb->idx] = NULL;
10311 mutex_unlock(&pf->switch_mutex);
10318 * i40e_veb_release - Delete a VEB and free its resources
10319 * @veb: the VEB being removed
10321 void i40e_veb_release(struct i40e_veb *veb)
10323 struct i40e_vsi *vsi = NULL;
10324 struct i40e_pf *pf;
10329 /* find the remaining VSI and check for extras */
10330 for (i = 0; i < pf->num_alloc_vsi; i++) {
10331 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10337 dev_info(&pf->pdev->dev,
10338 "can't remove VEB %d with %d VSIs left\n",
10343 /* move the remaining VSI to uplink veb */
10344 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10345 if (veb->uplink_seid) {
10346 vsi->uplink_seid = veb->uplink_seid;
10347 if (veb->uplink_seid == pf->mac_seid)
10348 vsi->veb_idx = I40E_NO_VEB;
10350 vsi->veb_idx = veb->veb_idx;
10353 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10354 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10357 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10358 i40e_veb_clear(veb);
10362 * i40e_add_veb - create the VEB in the switch
10363 * @veb: the VEB to be instantiated
10364 * @vsi: the controlling VSI
10366 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10368 struct i40e_pf *pf = veb->pf;
10369 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10372 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10373 veb->enabled_tc, false,
10374 &veb->seid, enable_stats, NULL);
10376 /* get a VEB from the hardware */
10378 dev_info(&pf->pdev->dev,
10379 "couldn't add VEB, err %s aq_err %s\n",
10380 i40e_stat_str(&pf->hw, ret),
10381 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10385 /* get statistics counter */
10386 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10387 &veb->stats_idx, NULL, NULL, NULL);
10389 dev_info(&pf->pdev->dev,
10390 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10391 i40e_stat_str(&pf->hw, ret),
10392 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10395 ret = i40e_veb_get_bw_info(veb);
10397 dev_info(&pf->pdev->dev,
10398 "couldn't get VEB bw info, err %s aq_err %s\n",
10399 i40e_stat_str(&pf->hw, ret),
10400 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10401 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10405 vsi->uplink_seid = veb->seid;
10406 vsi->veb_idx = veb->idx;
10407 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10413 * i40e_veb_setup - Set up a VEB
10414 * @pf: board private structure
10415 * @flags: VEB setup flags
10416 * @uplink_seid: the switch element to link to
10417 * @vsi_seid: the initial VSI seid
10418 * @enabled_tc: Enabled TC bit-map
10420 * This allocates the sw VEB structure and links it into the switch
10421 * It is possible and legal for this to be a duplicate of an already
10422 * existing VEB. It is also possible for both uplink and vsi seids
10423 * to be zero, in order to create a floating VEB.
10425 * Returns pointer to the successfully allocated VEB sw struct on
10426 * success, otherwise returns NULL on failure.
10428 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10429 u16 uplink_seid, u16 vsi_seid,
10432 struct i40e_veb *veb, *uplink_veb = NULL;
10433 int vsi_idx, veb_idx;
10436 /* if one seid is 0, the other must be 0 to create a floating relay */
10437 if ((uplink_seid == 0 || vsi_seid == 0) &&
10438 (uplink_seid + vsi_seid != 0)) {
10439 dev_info(&pf->pdev->dev,
10440 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10441 uplink_seid, vsi_seid);
10445 /* make sure there is such a vsi and uplink */
10446 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10447 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10449 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10450 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10455 if (uplink_seid && uplink_seid != pf->mac_seid) {
10456 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10457 if (pf->veb[veb_idx] &&
10458 pf->veb[veb_idx]->seid == uplink_seid) {
10459 uplink_veb = pf->veb[veb_idx];
10464 dev_info(&pf->pdev->dev,
10465 "uplink seid %d not found\n", uplink_seid);
10470 /* get veb sw struct */
10471 veb_idx = i40e_veb_mem_alloc(pf);
10474 veb = pf->veb[veb_idx];
10475 veb->flags = flags;
10476 veb->uplink_seid = uplink_seid;
10477 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10478 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10480 /* create the VEB in the switch */
10481 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10484 if (vsi_idx == pf->lan_vsi)
10485 pf->lan_veb = veb->idx;
10490 i40e_veb_clear(veb);
10496 * i40e_setup_pf_switch_element - set PF vars based on switch type
10497 * @pf: board private structure
10498 * @ele: element we are building info from
10499 * @num_reported: total number of elements
10500 * @printconfig: should we print the contents
10502 * helper function to assist in extracting a few useful SEID values.
10504 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10505 struct i40e_aqc_switch_config_element_resp *ele,
10506 u16 num_reported, bool printconfig)
10508 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10509 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10510 u8 element_type = ele->element_type;
10511 u16 seid = le16_to_cpu(ele->seid);
10514 dev_info(&pf->pdev->dev,
10515 "type=%d seid=%d uplink=%d downlink=%d\n",
10516 element_type, seid, uplink_seid, downlink_seid);
10518 switch (element_type) {
10519 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10520 pf->mac_seid = seid;
10522 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10524 if (uplink_seid != pf->mac_seid)
10526 if (pf->lan_veb == I40E_NO_VEB) {
10529 /* find existing or else empty VEB */
10530 for (v = 0; v < I40E_MAX_VEB; v++) {
10531 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10536 if (pf->lan_veb == I40E_NO_VEB) {
10537 v = i40e_veb_mem_alloc(pf);
10544 pf->veb[pf->lan_veb]->seid = seid;
10545 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10546 pf->veb[pf->lan_veb]->pf = pf;
10547 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10549 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10550 if (num_reported != 1)
10552 /* This is immediately after a reset so we can assume this is
10555 pf->mac_seid = uplink_seid;
10556 pf->pf_seid = downlink_seid;
10557 pf->main_vsi_seid = seid;
10559 dev_info(&pf->pdev->dev,
10560 "pf_seid=%d main_vsi_seid=%d\n",
10561 pf->pf_seid, pf->main_vsi_seid);
10563 case I40E_SWITCH_ELEMENT_TYPE_PF:
10564 case I40E_SWITCH_ELEMENT_TYPE_VF:
10565 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10566 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10567 case I40E_SWITCH_ELEMENT_TYPE_PE:
10568 case I40E_SWITCH_ELEMENT_TYPE_PA:
10569 /* ignore these for now */
10572 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10573 element_type, seid);
10579 * i40e_fetch_switch_configuration - Get switch config from firmware
10580 * @pf: board private structure
10581 * @printconfig: should we print the contents
10583 * Get the current switch configuration from the device and
10584 * extract a few useful SEID values.
10586 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10588 struct i40e_aqc_get_switch_config_resp *sw_config;
10594 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10598 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10600 u16 num_reported, num_total;
10602 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10606 dev_info(&pf->pdev->dev,
10607 "get switch config failed err %s aq_err %s\n",
10608 i40e_stat_str(&pf->hw, ret),
10609 i40e_aq_str(&pf->hw,
10610 pf->hw.aq.asq_last_status));
10615 num_reported = le16_to_cpu(sw_config->header.num_reported);
10616 num_total = le16_to_cpu(sw_config->header.num_total);
10619 dev_info(&pf->pdev->dev,
10620 "header: %d reported %d total\n",
10621 num_reported, num_total);
10623 for (i = 0; i < num_reported; i++) {
10624 struct i40e_aqc_switch_config_element_resp *ele =
10625 &sw_config->element[i];
10627 i40e_setup_pf_switch_element(pf, ele, num_reported,
10630 } while (next_seid != 0);
10637 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10638 * @pf: board private structure
10639 * @reinit: if the Main VSI needs to re-initialized.
10641 * Returns 0 on success, negative value on failure
10643 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10648 /* find out what's out there already */
10649 ret = i40e_fetch_switch_configuration(pf, false);
10651 dev_info(&pf->pdev->dev,
10652 "couldn't fetch switch config, err %s aq_err %s\n",
10653 i40e_stat_str(&pf->hw, ret),
10654 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10657 i40e_pf_reset_stats(pf);
10659 /* set the switch config bit for the whole device to
10660 * support limited promisc or true promisc
10661 * when user requests promisc. The default is limited
10665 if ((pf->hw.pf_id == 0) &&
10666 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10667 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10669 if (pf->hw.pf_id == 0) {
10672 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10673 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10675 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10676 dev_info(&pf->pdev->dev,
10677 "couldn't set switch config bits, err %s aq_err %s\n",
10678 i40e_stat_str(&pf->hw, ret),
10679 i40e_aq_str(&pf->hw,
10680 pf->hw.aq.asq_last_status));
10681 /* not a fatal problem, just keep going */
10685 /* first time setup */
10686 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10687 struct i40e_vsi *vsi = NULL;
10690 /* Set up the PF VSI associated with the PF's main VSI
10691 * that is already in the HW switch
10693 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10694 uplink_seid = pf->veb[pf->lan_veb]->seid;
10696 uplink_seid = pf->mac_seid;
10697 if (pf->lan_vsi == I40E_NO_VSI)
10698 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10700 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10702 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10703 i40e_fdir_teardown(pf);
10707 /* force a reset of TC and queue layout configurations */
10708 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10710 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10711 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10712 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10714 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10716 i40e_fdir_sb_setup(pf);
10718 /* Setup static PF queue filter control settings */
10719 ret = i40e_setup_pf_filter_control(pf);
10721 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10723 /* Failure here should not stop continuing other steps */
10726 /* enable RSS in the HW, even for only one queue, as the stack can use
10729 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10730 i40e_pf_config_rss(pf);
10732 /* fill in link information and enable LSE reporting */
10733 i40e_link_event(pf);
10735 /* Initialize user-specific link properties */
10736 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10737 I40E_AQ_AN_COMPLETED) ? true : false);
10745 * i40e_determine_queue_usage - Work out queue distribution
10746 * @pf: board private structure
10748 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10752 pf->num_lan_qps = 0;
10754 /* Find the max queues to be put into basic use. We'll always be
10755 * using TC0, whether or not DCB is running, and TC0 will get the
10758 queues_left = pf->hw.func_caps.num_tx_qp;
10760 if ((queues_left == 1) ||
10761 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10762 /* one qp for PF, no queues for anything else */
10764 pf->alloc_rss_size = pf->num_lan_qps = 1;
10766 /* make sure all the fancies are disabled */
10767 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10768 I40E_FLAG_IWARP_ENABLED |
10769 I40E_FLAG_FD_SB_ENABLED |
10770 I40E_FLAG_FD_ATR_ENABLED |
10771 I40E_FLAG_DCB_CAPABLE |
10772 I40E_FLAG_DCB_ENABLED |
10773 I40E_FLAG_SRIOV_ENABLED |
10774 I40E_FLAG_VMDQ_ENABLED);
10775 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10776 I40E_FLAG_FD_SB_ENABLED |
10777 I40E_FLAG_FD_ATR_ENABLED |
10778 I40E_FLAG_DCB_CAPABLE))) {
10779 /* one qp for PF */
10780 pf->alloc_rss_size = pf->num_lan_qps = 1;
10781 queues_left -= pf->num_lan_qps;
10783 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10784 I40E_FLAG_IWARP_ENABLED |
10785 I40E_FLAG_FD_SB_ENABLED |
10786 I40E_FLAG_FD_ATR_ENABLED |
10787 I40E_FLAG_DCB_ENABLED |
10788 I40E_FLAG_VMDQ_ENABLED);
10790 /* Not enough queues for all TCs */
10791 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10792 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10793 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10794 I40E_FLAG_DCB_ENABLED);
10795 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10797 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10798 num_online_cpus());
10799 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10800 pf->hw.func_caps.num_tx_qp);
10802 queues_left -= pf->num_lan_qps;
10805 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10806 if (queues_left > 1) {
10807 queues_left -= 1; /* save 1 queue for FD */
10809 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10810 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10814 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10815 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10816 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10817 (queues_left / pf->num_vf_qps));
10818 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10821 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10822 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10823 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10824 (queues_left / pf->num_vmdq_qps));
10825 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10828 pf->queues_left = queues_left;
10829 dev_dbg(&pf->pdev->dev,
10830 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10831 pf->hw.func_caps.num_tx_qp,
10832 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10833 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10834 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10839 * i40e_setup_pf_filter_control - Setup PF static filter control
10840 * @pf: PF to be setup
10842 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10843 * settings. If PE/FCoE are enabled then it will also set the per PF
10844 * based filter sizes required for them. It also enables Flow director,
10845 * ethertype and macvlan type filter settings for the pf.
10847 * Returns 0 on success, negative on failure
10849 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10851 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10853 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10855 /* Flow Director is enabled */
10856 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10857 settings->enable_fdir = true;
10859 /* Ethtype and MACVLAN filters enabled for PF */
10860 settings->enable_ethtype = true;
10861 settings->enable_macvlan = true;
10863 if (i40e_set_filter_control(&pf->hw, settings))
10869 #define INFO_STRING_LEN 255
10870 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10871 static void i40e_print_features(struct i40e_pf *pf)
10873 struct i40e_hw *hw = &pf->hw;
10877 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10881 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10882 #ifdef CONFIG_PCI_IOV
10883 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10885 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10886 pf->hw.func_caps.num_vsis,
10887 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10888 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10889 i += snprintf(&buf[i], REMAIN(i), " RSS");
10890 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10891 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10892 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10893 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10894 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10896 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10897 i += snprintf(&buf[i], REMAIN(i), " DCB");
10898 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10899 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10900 if (pf->flags & I40E_FLAG_PTP)
10901 i += snprintf(&buf[i], REMAIN(i), " PTP");
10902 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10903 i += snprintf(&buf[i], REMAIN(i), " VEB");
10905 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10907 dev_info(&pf->pdev->dev, "%s\n", buf);
10909 WARN_ON(i > INFO_STRING_LEN);
10913 * i40e_get_platform_mac_addr - get platform-specific MAC address
10914 * @pdev: PCI device information struct
10915 * @pf: board private structure
10917 * Look up the MAC address for the device. First we'll try
10918 * eth_platform_get_mac_address, which will check Open Firmware, or arch
10919 * specific fallback. Otherwise, we'll default to the stored value in
10922 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10924 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10925 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
10929 * i40e_probe - Device initialization routine
10930 * @pdev: PCI device information struct
10931 * @ent: entry in i40e_pci_tbl
10933 * i40e_probe initializes a PF identified by a pci_dev structure.
10934 * The OS initialization, configuring of the PF private structure,
10935 * and a hardware reset occur.
10937 * Returns 0 on success, negative on failure
10939 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10941 struct i40e_aq_get_phy_abilities_resp abilities;
10942 struct i40e_pf *pf;
10943 struct i40e_hw *hw;
10944 static u16 pfs_found;
10952 err = pci_enable_device_mem(pdev);
10956 /* set up for high or low dma */
10957 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10959 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10961 dev_err(&pdev->dev,
10962 "DMA configuration failed: 0x%x\n", err);
10967 /* set up pci connections */
10968 err = pci_request_mem_regions(pdev, i40e_driver_name);
10970 dev_info(&pdev->dev,
10971 "pci_request_selected_regions failed %d\n", err);
10975 pci_enable_pcie_error_reporting(pdev);
10976 pci_set_master(pdev);
10978 /* Now that we have a PCI connection, we need to do the
10979 * low level device setup. This is primarily setting up
10980 * the Admin Queue structures and then querying for the
10981 * device's current profile information.
10983 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10990 set_bit(__I40E_DOWN, &pf->state);
10995 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10996 I40E_MAX_CSR_SPACE);
10998 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10999 if (!hw->hw_addr) {
11001 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
11002 (unsigned int)pci_resource_start(pdev, 0),
11003 pf->ioremap_len, err);
11006 hw->vendor_id = pdev->vendor;
11007 hw->device_id = pdev->device;
11008 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
11009 hw->subsystem_vendor_id = pdev->subsystem_vendor;
11010 hw->subsystem_device_id = pdev->subsystem_device;
11011 hw->bus.device = PCI_SLOT(pdev->devfn);
11012 hw->bus.func = PCI_FUNC(pdev->devfn);
11013 hw->bus.bus_id = pdev->bus->number;
11014 pf->instance = pfs_found;
11016 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
11017 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
11019 /* set up the locks for the AQ, do this only once in probe
11020 * and destroy them only once in remove
11022 mutex_init(&hw->aq.asq_mutex);
11023 mutex_init(&hw->aq.arq_mutex);
11025 pf->msg_enable = netif_msg_init(debug,
11030 pf->hw.debug_mask = debug;
11032 /* do a special CORER for clearing PXE mode once at init */
11033 if (hw->revision_id == 0 &&
11034 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
11035 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
11040 i40e_clear_pxe_mode(hw);
11043 /* Reset here to make sure all is clean and to define PF 'n' */
11045 err = i40e_pf_reset(hw);
11047 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
11052 hw->aq.num_arq_entries = I40E_AQ_LEN;
11053 hw->aq.num_asq_entries = I40E_AQ_LEN;
11054 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11055 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11056 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
11058 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
11060 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
11062 err = i40e_init_shared_code(hw);
11064 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
11069 /* set up a default setting for link flow control */
11070 pf->hw.fc.requested_mode = I40E_FC_NONE;
11072 err = i40e_init_adminq(hw);
11074 if (err == I40E_ERR_FIRMWARE_API_VERSION)
11075 dev_info(&pdev->dev,
11076 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
11078 dev_info(&pdev->dev,
11079 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
11084 /* provide nvm, fw, api versions */
11085 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
11086 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
11087 hw->aq.api_maj_ver, hw->aq.api_min_ver,
11088 i40e_nvm_version_str(hw));
11090 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
11091 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
11092 dev_info(&pdev->dev,
11093 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
11094 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
11095 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
11096 dev_info(&pdev->dev,
11097 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
11099 i40e_verify_eeprom(pf);
11101 /* Rev 0 hardware was never productized */
11102 if (hw->revision_id < 1)
11103 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
11105 i40e_clear_pxe_mode(hw);
11106 err = i40e_get_capabilities(pf);
11108 goto err_adminq_setup;
11110 err = i40e_sw_init(pf);
11112 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
11116 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
11117 hw->func_caps.num_rx_qp, 0, 0);
11119 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
11120 goto err_init_lan_hmc;
11123 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
11125 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
11127 goto err_configure_lan_hmc;
11130 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
11131 * Ignore error return codes because if it was already disabled via
11132 * hardware settings this will fail
11134 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
11135 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
11136 i40e_aq_stop_lldp(hw, true, NULL);
11139 /* allow a platform config to override the HW addr */
11140 i40e_get_platform_mac_addr(pdev, pf);
11142 if (!is_valid_ether_addr(hw->mac.addr)) {
11143 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
11147 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
11148 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
11149 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
11150 if (is_valid_ether_addr(hw->mac.port_addr))
11151 pf->flags |= I40E_FLAG_PORT_ID_VALID;
11153 pci_set_drvdata(pdev, pf);
11154 pci_save_state(pdev);
11155 #ifdef CONFIG_I40E_DCB
11156 err = i40e_init_pf_dcb(pf);
11158 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
11159 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
11160 /* Continue without DCB enabled */
11162 #endif /* CONFIG_I40E_DCB */
11164 /* set up periodic task facility */
11165 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11166 pf->service_timer_period = HZ;
11168 INIT_WORK(&pf->service_task, i40e_service_task);
11169 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11171 /* NVM bit on means WoL disabled for the port */
11172 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11173 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11174 pf->wol_en = false;
11177 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11179 /* set up the main switch operations */
11180 i40e_determine_queue_usage(pf);
11181 err = i40e_init_interrupt_scheme(pf);
11183 goto err_switch_setup;
11185 /* The number of VSIs reported by the FW is the minimum guaranteed
11186 * to us; HW supports far more and we share the remaining pool with
11187 * the other PFs. We allocate space for more than the guarantee with
11188 * the understanding that we might not get them all later.
11190 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11191 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11193 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11195 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11196 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11200 goto err_switch_setup;
11203 #ifdef CONFIG_PCI_IOV
11204 /* prep for VF support */
11205 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11206 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11207 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11208 if (pci_num_vf(pdev))
11209 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11212 err = i40e_setup_pf_switch(pf, false);
11214 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11218 /* Make sure flow control is set according to current settings */
11219 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11220 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11221 dev_dbg(&pf->pdev->dev,
11222 "Set fc with err %s aq_err %s on get_phy_cap\n",
11223 i40e_stat_str(hw, err),
11224 i40e_aq_str(hw, hw->aq.asq_last_status));
11225 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11226 dev_dbg(&pf->pdev->dev,
11227 "Set fc with err %s aq_err %s on set_phy_config\n",
11228 i40e_stat_str(hw, err),
11229 i40e_aq_str(hw, hw->aq.asq_last_status));
11230 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11231 dev_dbg(&pf->pdev->dev,
11232 "Set fc with err %s aq_err %s on get_link_info\n",
11233 i40e_stat_str(hw, err),
11234 i40e_aq_str(hw, hw->aq.asq_last_status));
11236 /* if FDIR VSI was set up, start it now */
11237 for (i = 0; i < pf->num_alloc_vsi; i++) {
11238 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11239 i40e_vsi_open(pf->vsi[i]);
11244 /* The driver only wants link up/down and module qualification
11245 * reports from firmware. Note the negative logic.
11247 err = i40e_aq_set_phy_int_mask(&pf->hw,
11248 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11249 I40E_AQ_EVENT_MEDIA_NA |
11250 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11252 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11253 i40e_stat_str(&pf->hw, err),
11254 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11256 /* Reconfigure hardware for allowing smaller MSS in the case
11257 * of TSO, so that we avoid the MDD being fired and causing
11258 * a reset in the case of small MSS+TSO.
11260 val = rd32(hw, I40E_REG_MSS);
11261 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11262 val &= ~I40E_REG_MSS_MIN_MASK;
11263 val |= I40E_64BYTE_MSS;
11264 wr32(hw, I40E_REG_MSS, val);
11267 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11269 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11271 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11272 i40e_stat_str(&pf->hw, err),
11273 i40e_aq_str(&pf->hw,
11274 pf->hw.aq.asq_last_status));
11276 /* The main driver is (mostly) up and happy. We need to set this state
11277 * before setting up the misc vector or we get a race and the vector
11278 * ends up disabled forever.
11280 clear_bit(__I40E_DOWN, &pf->state);
11282 /* In case of MSIX we are going to setup the misc vector right here
11283 * to handle admin queue events etc. In case of legacy and MSI
11284 * the misc functionality and queue processing is combined in
11285 * the same vector and that gets setup at open.
11287 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11288 err = i40e_setup_misc_vector(pf);
11290 dev_info(&pdev->dev,
11291 "setup of misc vector failed: %d\n", err);
11296 #ifdef CONFIG_PCI_IOV
11297 /* prep for VF support */
11298 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11299 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11300 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11301 /* disable link interrupts for VFs */
11302 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11303 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11304 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11307 if (pci_num_vf(pdev)) {
11308 dev_info(&pdev->dev,
11309 "Active VFs found, allocating resources.\n");
11310 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11312 dev_info(&pdev->dev,
11313 "Error %d allocating resources for existing VFs\n",
11317 #endif /* CONFIG_PCI_IOV */
11319 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11320 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11321 pf->num_iwarp_msix,
11322 I40E_IWARP_IRQ_PILE_ID);
11323 if (pf->iwarp_base_vector < 0) {
11324 dev_info(&pdev->dev,
11325 "failed to get tracking for %d vectors for IWARP err=%d\n",
11326 pf->num_iwarp_msix, pf->iwarp_base_vector);
11327 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11331 i40e_dbg_pf_init(pf);
11333 /* tell the firmware that we're starting */
11334 i40e_send_version(pf);
11336 /* since everything's happy, start the service_task timer */
11337 mod_timer(&pf->service_timer,
11338 round_jiffies(jiffies + pf->service_timer_period));
11340 /* add this PF to client device list and launch a client service task */
11341 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11342 err = i40e_lan_add_device(pf);
11344 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11348 #define PCI_SPEED_SIZE 8
11349 #define PCI_WIDTH_SIZE 8
11350 /* Devices on the IOSF bus do not have this information
11351 * and will report PCI Gen 1 x 1 by default so don't bother
11354 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11355 char speed[PCI_SPEED_SIZE] = "Unknown";
11356 char width[PCI_WIDTH_SIZE] = "Unknown";
11358 /* Get the negotiated link width and speed from PCI config
11361 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11364 i40e_set_pci_config_data(hw, link_status);
11366 switch (hw->bus.speed) {
11367 case i40e_bus_speed_8000:
11368 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11369 case i40e_bus_speed_5000:
11370 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11371 case i40e_bus_speed_2500:
11372 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11376 switch (hw->bus.width) {
11377 case i40e_bus_width_pcie_x8:
11378 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11379 case i40e_bus_width_pcie_x4:
11380 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11381 case i40e_bus_width_pcie_x2:
11382 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11383 case i40e_bus_width_pcie_x1:
11384 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11389 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11392 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11393 hw->bus.speed < i40e_bus_speed_8000) {
11394 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11395 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11399 /* get the requested speeds from the fw */
11400 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11402 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11403 i40e_stat_str(&pf->hw, err),
11404 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11405 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11407 /* get the supported phy types from the fw */
11408 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11410 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11411 i40e_stat_str(&pf->hw, err),
11412 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11414 /* Add a filter to drop all Flow control frames from any VSI from being
11415 * transmitted. By doing so we stop a malicious VF from sending out
11416 * PAUSE or PFC frames and potentially controlling traffic for other
11418 * The FW can still send Flow control frames if enabled.
11420 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11421 pf->main_vsi_seid);
11423 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11424 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11425 pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS;
11426 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
11427 pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER;
11428 /* print a string summarizing features */
11429 i40e_print_features(pf);
11433 /* Unwind what we've done if something failed in the setup */
11435 set_bit(__I40E_DOWN, &pf->state);
11436 i40e_clear_interrupt_scheme(pf);
11439 i40e_reset_interrupt_capability(pf);
11440 del_timer_sync(&pf->service_timer);
11442 err_configure_lan_hmc:
11443 (void)i40e_shutdown_lan_hmc(hw);
11445 kfree(pf->qp_pile);
11449 iounmap(hw->hw_addr);
11453 pci_disable_pcie_error_reporting(pdev);
11454 pci_release_mem_regions(pdev);
11457 pci_disable_device(pdev);
11462 * i40e_remove - Device removal routine
11463 * @pdev: PCI device information struct
11465 * i40e_remove is called by the PCI subsystem to alert the driver
11466 * that is should release a PCI device. This could be caused by a
11467 * Hot-Plug event, or because the driver is going to be removed from
11470 static void i40e_remove(struct pci_dev *pdev)
11472 struct i40e_pf *pf = pci_get_drvdata(pdev);
11473 struct i40e_hw *hw = &pf->hw;
11474 i40e_status ret_code;
11477 i40e_dbg_pf_exit(pf);
11481 /* Disable RSS in hw */
11482 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11483 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11485 /* no more scheduling of any task */
11486 set_bit(__I40E_SUSPENDED, &pf->state);
11487 set_bit(__I40E_DOWN, &pf->state);
11488 if (pf->service_timer.data)
11489 del_timer_sync(&pf->service_timer);
11490 if (pf->service_task.func)
11491 cancel_work_sync(&pf->service_task);
11493 /* Client close must be called explicitly here because the timer
11494 * has been stopped.
11496 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
11498 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11500 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11503 i40e_fdir_teardown(pf);
11505 /* If there is a switch structure or any orphans, remove them.
11506 * This will leave only the PF's VSI remaining.
11508 for (i = 0; i < I40E_MAX_VEB; i++) {
11512 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11513 pf->veb[i]->uplink_seid == 0)
11514 i40e_switch_branch_release(pf->veb[i]);
11517 /* Now we can shutdown the PF's VSI, just before we kill
11520 if (pf->vsi[pf->lan_vsi])
11521 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11523 /* remove attached clients */
11524 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11525 ret_code = i40e_lan_del_device(pf);
11527 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11531 /* shutdown and destroy the HMC */
11532 if (hw->hmc.hmc_obj) {
11533 ret_code = i40e_shutdown_lan_hmc(hw);
11535 dev_warn(&pdev->dev,
11536 "Failed to destroy the HMC resources: %d\n",
11540 /* shutdown the adminq */
11541 i40e_shutdown_adminq(hw);
11543 /* destroy the locks only once, here */
11544 mutex_destroy(&hw->aq.arq_mutex);
11545 mutex_destroy(&hw->aq.asq_mutex);
11547 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11548 i40e_clear_interrupt_scheme(pf);
11549 for (i = 0; i < pf->num_alloc_vsi; i++) {
11551 i40e_vsi_clear_rings(pf->vsi[i]);
11552 i40e_vsi_clear(pf->vsi[i]);
11557 for (i = 0; i < I40E_MAX_VEB; i++) {
11562 kfree(pf->qp_pile);
11565 iounmap(hw->hw_addr);
11567 pci_release_mem_regions(pdev);
11569 pci_disable_pcie_error_reporting(pdev);
11570 pci_disable_device(pdev);
11574 * i40e_pci_error_detected - warning that something funky happened in PCI land
11575 * @pdev: PCI device information struct
11577 * Called to warn that something happened and the error handling steps
11578 * are in progress. Allows the driver to quiesce things, be ready for
11581 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11582 enum pci_channel_state error)
11584 struct i40e_pf *pf = pci_get_drvdata(pdev);
11586 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11589 dev_info(&pdev->dev,
11590 "Cannot recover - error happened during device probe\n");
11591 return PCI_ERS_RESULT_DISCONNECT;
11594 /* shutdown all operations */
11595 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11597 i40e_prep_for_reset(pf, true);
11601 /* Request a slot reset */
11602 return PCI_ERS_RESULT_NEED_RESET;
11606 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11607 * @pdev: PCI device information struct
11609 * Called to find if the driver can work with the device now that
11610 * the pci slot has been reset. If a basic connection seems good
11611 * (registers are readable and have sane content) then return a
11612 * happy little PCI_ERS_RESULT_xxx.
11614 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11616 struct i40e_pf *pf = pci_get_drvdata(pdev);
11617 pci_ers_result_t result;
11621 dev_dbg(&pdev->dev, "%s\n", __func__);
11622 if (pci_enable_device_mem(pdev)) {
11623 dev_info(&pdev->dev,
11624 "Cannot re-enable PCI device after reset.\n");
11625 result = PCI_ERS_RESULT_DISCONNECT;
11627 pci_set_master(pdev);
11628 pci_restore_state(pdev);
11629 pci_save_state(pdev);
11630 pci_wake_from_d3(pdev, false);
11632 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11634 result = PCI_ERS_RESULT_RECOVERED;
11636 result = PCI_ERS_RESULT_DISCONNECT;
11639 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11641 dev_info(&pdev->dev,
11642 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11644 /* non-fatal, continue */
11651 * i40e_pci_error_resume - restart operations after PCI error recovery
11652 * @pdev: PCI device information struct
11654 * Called to allow the driver to bring things back up after PCI error
11655 * and/or reset recovery has finished.
11657 static void i40e_pci_error_resume(struct pci_dev *pdev)
11659 struct i40e_pf *pf = pci_get_drvdata(pdev);
11661 dev_dbg(&pdev->dev, "%s\n", __func__);
11662 if (test_bit(__I40E_SUSPENDED, &pf->state))
11666 i40e_handle_reset_warning(pf, true);
11671 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
11672 * using the mac_address_write admin q function
11673 * @pf: pointer to i40e_pf struct
11675 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
11677 struct i40e_hw *hw = &pf->hw;
11682 /* Get current MAC address in case it's an LAA */
11683 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
11684 ether_addr_copy(mac_addr,
11685 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
11687 dev_err(&pf->pdev->dev,
11688 "Failed to retrieve MAC address; using default\n");
11689 ether_addr_copy(mac_addr, hw->mac.addr);
11692 /* The FW expects the mac address write cmd to first be called with
11693 * one of these flags before calling it again with the multicast
11696 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
11698 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
11699 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
11701 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11703 dev_err(&pf->pdev->dev,
11704 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
11708 flags = I40E_AQC_MC_MAG_EN
11709 | I40E_AQC_WOL_PRESERVE_ON_PFR
11710 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
11711 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11713 dev_err(&pf->pdev->dev,
11714 "Failed to enable Multicast Magic Packet wake up\n");
11718 * i40e_shutdown - PCI callback for shutting down
11719 * @pdev: PCI device information struct
11721 static void i40e_shutdown(struct pci_dev *pdev)
11723 struct i40e_pf *pf = pci_get_drvdata(pdev);
11724 struct i40e_hw *hw = &pf->hw;
11726 set_bit(__I40E_SUSPENDED, &pf->state);
11727 set_bit(__I40E_DOWN, &pf->state);
11729 i40e_prep_for_reset(pf, true);
11732 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11733 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11735 del_timer_sync(&pf->service_timer);
11736 cancel_work_sync(&pf->service_task);
11737 i40e_fdir_teardown(pf);
11739 /* Client close must be called explicitly here because the timer
11740 * has been stopped.
11742 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
11744 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11745 i40e_enable_mc_magic_wake(pf);
11748 i40e_prep_for_reset(pf, true);
11751 wr32(hw, I40E_PFPM_APM,
11752 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11753 wr32(hw, I40E_PFPM_WUFC,
11754 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11756 i40e_clear_interrupt_scheme(pf);
11758 if (system_state == SYSTEM_POWER_OFF) {
11759 pci_wake_from_d3(pdev, pf->wol_en);
11760 pci_set_power_state(pdev, PCI_D3hot);
11766 * i40e_suspend - PCI callback for moving to D3
11767 * @pdev: PCI device information struct
11769 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11771 struct i40e_pf *pf = pci_get_drvdata(pdev);
11772 struct i40e_hw *hw = &pf->hw;
11775 set_bit(__I40E_SUSPENDED, &pf->state);
11776 set_bit(__I40E_DOWN, &pf->state);
11778 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11779 i40e_enable_mc_magic_wake(pf);
11782 i40e_prep_for_reset(pf, true);
11785 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11786 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11788 i40e_stop_misc_vector(pf);
11790 retval = pci_save_state(pdev);
11794 pci_wake_from_d3(pdev, pf->wol_en);
11795 pci_set_power_state(pdev, PCI_D3hot);
11801 * i40e_resume - PCI callback for waking up from D3
11802 * @pdev: PCI device information struct
11804 static int i40e_resume(struct pci_dev *pdev)
11806 struct i40e_pf *pf = pci_get_drvdata(pdev);
11809 pci_set_power_state(pdev, PCI_D0);
11810 pci_restore_state(pdev);
11811 /* pci_restore_state() clears dev->state_saves, so
11812 * call pci_save_state() again to restore it.
11814 pci_save_state(pdev);
11816 err = pci_enable_device_mem(pdev);
11818 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11821 pci_set_master(pdev);
11823 /* no wakeup events while running */
11824 pci_wake_from_d3(pdev, false);
11826 /* handling the reset will rebuild the device state */
11827 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11828 clear_bit(__I40E_DOWN, &pf->state);
11830 i40e_reset_and_rebuild(pf, false, true);
11838 static const struct pci_error_handlers i40e_err_handler = {
11839 .error_detected = i40e_pci_error_detected,
11840 .slot_reset = i40e_pci_error_slot_reset,
11841 .resume = i40e_pci_error_resume,
11844 static struct pci_driver i40e_driver = {
11845 .name = i40e_driver_name,
11846 .id_table = i40e_pci_tbl,
11847 .probe = i40e_probe,
11848 .remove = i40e_remove,
11850 .suspend = i40e_suspend,
11851 .resume = i40e_resume,
11853 .shutdown = i40e_shutdown,
11854 .err_handler = &i40e_err_handler,
11855 .sriov_configure = i40e_pci_sriov_configure,
11859 * i40e_init_module - Driver registration routine
11861 * i40e_init_module is the first routine called when the driver is
11862 * loaded. All it does is register with the PCI subsystem.
11864 static int __init i40e_init_module(void)
11866 pr_info("%s: %s - version %s\n", i40e_driver_name,
11867 i40e_driver_string, i40e_driver_version_str);
11868 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11870 /* we will see if single thread per module is enough for now,
11871 * it can't be any worse than using the system workqueue which
11872 * was already single threaded
11874 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11877 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11882 return pci_register_driver(&i40e_driver);
11884 module_init(i40e_init_module);
11887 * i40e_exit_module - Driver exit cleanup routine
11889 * i40e_exit_module is called just before the driver is removed
11892 static void __exit i40e_exit_module(void)
11894 pci_unregister_driver(&i40e_driver);
11895 destroy_workqueue(i40e_wq);
11898 module_exit(i40e_exit_module);