1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 27
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
90 /* required last entry */
93 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95 #define I40E_MAX_VF_COUNT 128
96 static int debug = -1;
97 module_param(debug, uint, 0);
98 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
100 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
101 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
105 static struct workqueue_struct *i40e_wq;
108 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
109 * @hw: pointer to the HW structure
110 * @mem: ptr to mem struct to fill out
111 * @size: size of memory requested
112 * @alignment: what to align the allocation to
114 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
115 u64 size, u32 alignment)
117 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
119 mem->size = ALIGN(size, alignment);
120 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
121 &mem->pa, GFP_KERNEL);
129 * i40e_free_dma_mem_d - OS specific memory free for shared code
130 * @hw: pointer to the HW structure
131 * @mem: ptr to mem struct to free
133 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
135 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
137 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
146 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
147 * @hw: pointer to the HW structure
148 * @mem: ptr to mem struct to fill out
149 * @size: size of memory requested
151 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
155 mem->va = kzalloc(size, GFP_KERNEL);
164 * i40e_free_virt_mem_d - OS specific memory free for shared code
165 * @hw: pointer to the HW structure
166 * @mem: ptr to mem struct to free
168 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
170 /* it's ok to kfree a NULL pointer */
179 * i40e_get_lump - find a lump of free generic resource
180 * @pf: board private structure
181 * @pile: the pile of resource to search
182 * @needed: the number of items needed
183 * @id: an owner id to stick on the items assigned
185 * Returns the base item index of the lump, or negative for error
187 * The search_hint trick and lack of advanced fit-finding only work
188 * because we're highly likely to have all the same size lump requests.
189 * Linear search time and any fragmentation should be minimal.
191 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
197 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
198 dev_info(&pf->pdev->dev,
199 "param err: pile=%p needed=%d id=0x%04x\n",
204 /* start the linear search with an imperfect hint */
205 i = pile->search_hint;
206 while (i < pile->num_entries) {
207 /* skip already allocated entries */
208 if (pile->list[i] & I40E_PILE_VALID_BIT) {
213 /* do we have enough in this lump? */
214 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
215 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
220 /* there was enough, so assign it to the requestor */
221 for (j = 0; j < needed; j++)
222 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
224 pile->search_hint = i + j;
228 /* not enough, so skip over it and continue looking */
236 * i40e_put_lump - return a lump of generic resource
237 * @pile: the pile of resource to search
238 * @index: the base item index
239 * @id: the owner id of the items assigned
241 * Returns the count of items in the lump
243 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
245 int valid_id = (id | I40E_PILE_VALID_BIT);
249 if (!pile || index >= pile->num_entries)
253 i < pile->num_entries && pile->list[i] == valid_id;
259 if (count && index < pile->search_hint)
260 pile->search_hint = index;
266 * i40e_find_vsi_from_id - searches for the vsi with the given id
267 * @pf - the pf structure to search for the vsi
268 * @id - id of the vsi it is searching for
270 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
274 for (i = 0; i < pf->num_alloc_vsi; i++)
275 if (pf->vsi[i] && (pf->vsi[i]->id == id))
282 * i40e_service_event_schedule - Schedule the service task to wake up
283 * @pf: board private structure
285 * If not already scheduled, this puts the task into the work queue
287 void i40e_service_event_schedule(struct i40e_pf *pf)
289 if (!test_bit(__I40E_DOWN, &pf->state) &&
290 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
303 void i40e_tx_timeout(struct net_device *netdev)
305 static void i40e_tx_timeout(struct net_device *netdev)
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
315 pf->tx_timeout_count++;
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
326 (trans_start + netdev->watchdog_timeo))) {
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
373 switch (pf->tx_timeout_recovery_level) {
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
401 return &vsi->net_stats;
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
414 void i40e_get_netdev_stats_struct(struct net_device *netdev,
415 struct rtnl_link_stats64 *stats)
417 struct i40e_netdev_priv *np = netdev_priv(netdev);
418 struct i40e_ring *tx_ring, *rx_ring;
419 struct i40e_vsi *vsi = np->vsi;
420 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
423 if (test_bit(__I40E_DOWN, &vsi->state))
430 for (i = 0; i < vsi->num_queue_pairs; i++) {
434 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
439 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
440 packets = tx_ring->stats.packets;
441 bytes = tx_ring->stats.bytes;
442 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
444 stats->tx_packets += packets;
445 stats->tx_bytes += bytes;
446 rx_ring = &tx_ring[1];
449 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
450 packets = rx_ring->stats.packets;
451 bytes = rx_ring->stats.bytes;
452 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
454 stats->rx_packets += packets;
455 stats->rx_bytes += bytes;
459 /* following stats updated by i40e_watchdog_subtask() */
460 stats->multicast = vsi_stats->multicast;
461 stats->tx_errors = vsi_stats->tx_errors;
462 stats->tx_dropped = vsi_stats->tx_dropped;
463 stats->rx_errors = vsi_stats->rx_errors;
464 stats->rx_dropped = vsi_stats->rx_dropped;
465 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
466 stats->rx_length_errors = vsi_stats->rx_length_errors;
470 * i40e_vsi_reset_stats - Resets all stats of the given vsi
471 * @vsi: the VSI to have its stats reset
473 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
475 struct rtnl_link_stats64 *ns;
481 ns = i40e_get_vsi_stats_struct(vsi);
482 memset(ns, 0, sizeof(*ns));
483 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
484 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
485 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
486 if (vsi->rx_rings && vsi->rx_rings[0]) {
487 for (i = 0; i < vsi->num_queue_pairs; i++) {
488 memset(&vsi->rx_rings[i]->stats, 0,
489 sizeof(vsi->rx_rings[i]->stats));
490 memset(&vsi->rx_rings[i]->rx_stats, 0,
491 sizeof(vsi->rx_rings[i]->rx_stats));
492 memset(&vsi->tx_rings[i]->stats, 0,
493 sizeof(vsi->tx_rings[i]->stats));
494 memset(&vsi->tx_rings[i]->tx_stats, 0,
495 sizeof(vsi->tx_rings[i]->tx_stats));
498 vsi->stat_offsets_loaded = false;
502 * i40e_pf_reset_stats - Reset all of the stats for the given PF
503 * @pf: the PF to be reset
505 void i40e_pf_reset_stats(struct i40e_pf *pf)
509 memset(&pf->stats, 0, sizeof(pf->stats));
510 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
511 pf->stat_offsets_loaded = false;
513 for (i = 0; i < I40E_MAX_VEB; i++) {
515 memset(&pf->veb[i]->stats, 0,
516 sizeof(pf->veb[i]->stats));
517 memset(&pf->veb[i]->stats_offsets, 0,
518 sizeof(pf->veb[i]->stats_offsets));
519 pf->veb[i]->stat_offsets_loaded = false;
522 pf->hw_csum_rx_error = 0;
526 * i40e_stat_update48 - read and update a 48 bit stat from the chip
527 * @hw: ptr to the hardware info
528 * @hireg: the high 32 bit reg to read
529 * @loreg: the low 32 bit reg to read
530 * @offset_loaded: has the initial offset been loaded yet
531 * @offset: ptr to current offset value
532 * @stat: ptr to the stat
534 * Since the device stats are not reset at PFReset, they likely will not
535 * be zeroed when the driver starts. We'll save the first values read
536 * and use them as offsets to be subtracted from the raw values in order
537 * to report stats that count from zero. In the process, we also manage
538 * the potential roll-over.
540 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
541 bool offset_loaded, u64 *offset, u64 *stat)
545 if (hw->device_id == I40E_DEV_ID_QEMU) {
546 new_data = rd32(hw, loreg);
547 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
549 new_data = rd64(hw, loreg);
553 if (likely(new_data >= *offset))
554 *stat = new_data - *offset;
556 *stat = (new_data + BIT_ULL(48)) - *offset;
557 *stat &= 0xFFFFFFFFFFFFULL;
561 * i40e_stat_update32 - read and update a 32 bit stat from the chip
562 * @hw: ptr to the hardware info
563 * @reg: the hw reg to read
564 * @offset_loaded: has the initial offset been loaded yet
565 * @offset: ptr to current offset value
566 * @stat: ptr to the stat
568 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
569 bool offset_loaded, u64 *offset, u64 *stat)
573 new_data = rd32(hw, reg);
576 if (likely(new_data >= *offset))
577 *stat = (u32)(new_data - *offset);
579 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
583 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
584 * @vsi: the VSI to be updated
586 void i40e_update_eth_stats(struct i40e_vsi *vsi)
588 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
589 struct i40e_pf *pf = vsi->back;
590 struct i40e_hw *hw = &pf->hw;
591 struct i40e_eth_stats *oes;
592 struct i40e_eth_stats *es; /* device's eth stats */
594 es = &vsi->eth_stats;
595 oes = &vsi->eth_stats_offsets;
597 /* Gather up the stats that the hw collects */
598 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
599 vsi->stat_offsets_loaded,
600 &oes->tx_errors, &es->tx_errors);
601 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
602 vsi->stat_offsets_loaded,
603 &oes->rx_discards, &es->rx_discards);
604 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
607 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->tx_errors, &es->tx_errors);
611 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
612 I40E_GLV_GORCL(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->rx_bytes, &es->rx_bytes);
615 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
616 I40E_GLV_UPRCL(stat_idx),
617 vsi->stat_offsets_loaded,
618 &oes->rx_unicast, &es->rx_unicast);
619 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
620 I40E_GLV_MPRCL(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_multicast, &es->rx_multicast);
623 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
624 I40E_GLV_BPRCL(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_broadcast, &es->rx_broadcast);
628 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
629 I40E_GLV_GOTCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->tx_bytes, &es->tx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
633 I40E_GLV_UPTCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->tx_unicast, &es->tx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
637 I40E_GLV_MPTCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_multicast, &es->tx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
641 I40E_GLV_BPTCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_broadcast, &es->tx_broadcast);
644 vsi->stat_offsets_loaded = true;
648 * i40e_update_veb_stats - Update Switch component statistics
649 * @veb: the VEB being updated
651 static void i40e_update_veb_stats(struct i40e_veb *veb)
653 struct i40e_pf *pf = veb->pf;
654 struct i40e_hw *hw = &pf->hw;
655 struct i40e_eth_stats *oes;
656 struct i40e_eth_stats *es; /* device's eth stats */
657 struct i40e_veb_tc_stats *veb_oes;
658 struct i40e_veb_tc_stats *veb_es;
661 idx = veb->stats_idx;
663 oes = &veb->stats_offsets;
664 veb_es = &veb->tc_stats;
665 veb_oes = &veb->tc_stats_offsets;
667 /* Gather up the stats that the hw collects */
668 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
669 veb->stat_offsets_loaded,
670 &oes->tx_discards, &es->tx_discards);
671 if (hw->revision_id > 0)
672 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
673 veb->stat_offsets_loaded,
674 &oes->rx_unknown_protocol,
675 &es->rx_unknown_protocol);
676 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
677 veb->stat_offsets_loaded,
678 &oes->rx_bytes, &es->rx_bytes);
679 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
680 veb->stat_offsets_loaded,
681 &oes->rx_unicast, &es->rx_unicast);
682 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_multicast, &es->rx_multicast);
685 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_broadcast, &es->rx_broadcast);
689 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
690 veb->stat_offsets_loaded,
691 &oes->tx_bytes, &es->tx_bytes);
692 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->tx_unicast, &es->tx_unicast);
695 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_multicast, &es->tx_multicast);
698 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_broadcast, &es->tx_broadcast);
701 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
702 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
703 I40E_GLVEBTC_RPCL(i, idx),
704 veb->stat_offsets_loaded,
705 &veb_oes->tc_rx_packets[i],
706 &veb_es->tc_rx_packets[i]);
707 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
708 I40E_GLVEBTC_RBCL(i, idx),
709 veb->stat_offsets_loaded,
710 &veb_oes->tc_rx_bytes[i],
711 &veb_es->tc_rx_bytes[i]);
712 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
713 I40E_GLVEBTC_TPCL(i, idx),
714 veb->stat_offsets_loaded,
715 &veb_oes->tc_tx_packets[i],
716 &veb_es->tc_tx_packets[i]);
717 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
718 I40E_GLVEBTC_TBCL(i, idx),
719 veb->stat_offsets_loaded,
720 &veb_oes->tc_tx_bytes[i],
721 &veb_es->tc_tx_bytes[i]);
723 veb->stat_offsets_loaded = true;
728 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
729 * @vsi: the VSI that is capable of doing FCoE
731 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
733 struct i40e_pf *pf = vsi->back;
734 struct i40e_hw *hw = &pf->hw;
735 struct i40e_fcoe_stats *ofs;
736 struct i40e_fcoe_stats *fs; /* device's eth stats */
739 if (vsi->type != I40E_VSI_FCOE)
742 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
743 fs = &vsi->fcoe_stats;
744 ofs = &vsi->fcoe_stats_offsets;
746 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
747 vsi->fcoe_stat_offsets_loaded,
748 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
749 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
750 vsi->fcoe_stat_offsets_loaded,
751 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
752 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
755 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
758 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
761 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
764 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->fcoe_last_error, &fs->fcoe_last_error);
767 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
771 vsi->fcoe_stat_offsets_loaded = true;
776 * i40e_update_vsi_stats - Update the vsi statistics counters.
777 * @vsi: the VSI to be updated
779 * There are a few instances where we store the same stat in a
780 * couple of different structs. This is partly because we have
781 * the netdev stats that need to be filled out, which is slightly
782 * different from the "eth_stats" defined by the chip and used in
783 * VF communications. We sort it out here.
785 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
787 struct i40e_pf *pf = vsi->back;
788 struct rtnl_link_stats64 *ons;
789 struct rtnl_link_stats64 *ns; /* netdev stats */
790 struct i40e_eth_stats *oes;
791 struct i40e_eth_stats *es; /* device's eth stats */
792 u32 tx_restart, tx_busy;
793 u64 tx_lost_interrupt;
804 if (test_bit(__I40E_DOWN, &vsi->state) ||
805 test_bit(__I40E_CONFIG_BUSY, &pf->state))
808 ns = i40e_get_vsi_stats_struct(vsi);
809 ons = &vsi->net_stats_offsets;
810 es = &vsi->eth_stats;
811 oes = &vsi->eth_stats_offsets;
813 /* Gather up the netdev and vsi stats that the driver collects
814 * on the fly during packet processing
818 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
819 tx_lost_interrupt = 0;
823 for (q = 0; q < vsi->num_queue_pairs; q++) {
825 p = ACCESS_ONCE(vsi->tx_rings[q]);
828 start = u64_stats_fetch_begin_irq(&p->syncp);
829 packets = p->stats.packets;
830 bytes = p->stats.bytes;
831 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
834 tx_restart += p->tx_stats.restart_queue;
835 tx_busy += p->tx_stats.tx_busy;
836 tx_linearize += p->tx_stats.tx_linearize;
837 tx_force_wb += p->tx_stats.tx_force_wb;
838 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
840 /* Rx queue is part of the same block as Tx queue */
843 start = u64_stats_fetch_begin_irq(&p->syncp);
844 packets = p->stats.packets;
845 bytes = p->stats.bytes;
846 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
849 rx_buf += p->rx_stats.alloc_buff_failed;
850 rx_page += p->rx_stats.alloc_page_failed;
853 vsi->tx_restart = tx_restart;
854 vsi->tx_busy = tx_busy;
855 vsi->tx_linearize = tx_linearize;
856 vsi->tx_force_wb = tx_force_wb;
857 vsi->tx_lost_interrupt = tx_lost_interrupt;
858 vsi->rx_page_failed = rx_page;
859 vsi->rx_buf_failed = rx_buf;
861 ns->rx_packets = rx_p;
863 ns->tx_packets = tx_p;
866 /* update netdev stats from eth stats */
867 i40e_update_eth_stats(vsi);
868 ons->tx_errors = oes->tx_errors;
869 ns->tx_errors = es->tx_errors;
870 ons->multicast = oes->rx_multicast;
871 ns->multicast = es->rx_multicast;
872 ons->rx_dropped = oes->rx_discards;
873 ns->rx_dropped = es->rx_discards;
874 ons->tx_dropped = oes->tx_discards;
875 ns->tx_dropped = es->tx_discards;
877 /* pull in a couple PF stats if this is the main vsi */
878 if (vsi == pf->vsi[pf->lan_vsi]) {
879 ns->rx_crc_errors = pf->stats.crc_errors;
880 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
881 ns->rx_length_errors = pf->stats.rx_length_errors;
886 * i40e_update_pf_stats - Update the PF statistics counters.
887 * @pf: the PF to be updated
889 static void i40e_update_pf_stats(struct i40e_pf *pf)
891 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
892 struct i40e_hw_port_stats *nsd = &pf->stats;
893 struct i40e_hw *hw = &pf->hw;
897 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
898 I40E_GLPRT_GORCL(hw->port),
899 pf->stat_offsets_loaded,
900 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
901 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
902 I40E_GLPRT_GOTCL(hw->port),
903 pf->stat_offsets_loaded,
904 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
905 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
906 pf->stat_offsets_loaded,
907 &osd->eth.rx_discards,
908 &nsd->eth.rx_discards);
909 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
910 I40E_GLPRT_UPRCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.rx_unicast,
913 &nsd->eth.rx_unicast);
914 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
915 I40E_GLPRT_MPRCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.rx_multicast,
918 &nsd->eth.rx_multicast);
919 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
920 I40E_GLPRT_BPRCL(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->eth.rx_broadcast,
923 &nsd->eth.rx_broadcast);
924 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
925 I40E_GLPRT_UPTCL(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->eth.tx_unicast,
928 &nsd->eth.tx_unicast);
929 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
930 I40E_GLPRT_MPTCL(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.tx_multicast,
933 &nsd->eth.tx_multicast);
934 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
935 I40E_GLPRT_BPTCL(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.tx_broadcast,
938 &nsd->eth.tx_broadcast);
940 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->tx_dropped_link_down,
943 &nsd->tx_dropped_link_down);
945 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->crc_errors, &nsd->crc_errors);
949 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->illegal_bytes, &nsd->illegal_bytes);
953 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->mac_local_faults,
956 &nsd->mac_local_faults);
957 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->mac_remote_faults,
960 &nsd->mac_remote_faults);
962 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_length_errors,
965 &nsd->rx_length_errors);
967 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->link_xon_rx, &nsd->link_xon_rx);
970 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->link_xon_tx, &nsd->link_xon_tx);
973 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xoff_rx, &nsd->link_xoff_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xoff_tx, &nsd->link_xoff_tx);
980 for (i = 0; i < 8; i++) {
981 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
982 pf->stat_offsets_loaded,
983 &osd->priority_xoff_rx[i],
984 &nsd->priority_xoff_rx[i]);
985 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
986 pf->stat_offsets_loaded,
987 &osd->priority_xon_rx[i],
988 &nsd->priority_xon_rx[i]);
989 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
990 pf->stat_offsets_loaded,
991 &osd->priority_xon_tx[i],
992 &nsd->priority_xon_tx[i]);
993 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
994 pf->stat_offsets_loaded,
995 &osd->priority_xoff_tx[i],
996 &nsd->priority_xoff_tx[i]);
997 i40e_stat_update32(hw,
998 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
999 pf->stat_offsets_loaded,
1000 &osd->priority_xon_2_xoff[i],
1001 &nsd->priority_xon_2_xoff[i]);
1004 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1005 I40E_GLPRT_PRC64L(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->rx_size_64, &nsd->rx_size_64);
1008 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1009 I40E_GLPRT_PRC127L(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->rx_size_127, &nsd->rx_size_127);
1012 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1013 I40E_GLPRT_PRC255L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->rx_size_255, &nsd->rx_size_255);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1017 I40E_GLPRT_PRC511L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_511, &nsd->rx_size_511);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1021 I40E_GLPRT_PRC1023L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_1023, &nsd->rx_size_1023);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1025 I40E_GLPRT_PRC1522L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_1522, &nsd->rx_size_1522);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1029 I40E_GLPRT_PRC9522L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_big, &nsd->rx_size_big);
1033 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1034 I40E_GLPRT_PTC64L(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->tx_size_64, &nsd->tx_size_64);
1037 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1038 I40E_GLPRT_PTC127L(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->tx_size_127, &nsd->tx_size_127);
1041 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1042 I40E_GLPRT_PTC255L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->tx_size_255, &nsd->tx_size_255);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1046 I40E_GLPRT_PTC511L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_511, &nsd->tx_size_511);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1050 I40E_GLPRT_PTC1023L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_1023, &nsd->tx_size_1023);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1054 I40E_GLPRT_PTC1522L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_1522, &nsd->tx_size_1522);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1058 I40E_GLPRT_PTC9522L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_big, &nsd->tx_size_big);
1062 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->rx_undersize, &nsd->rx_undersize);
1065 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->rx_fragments, &nsd->rx_fragments);
1068 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_oversize, &nsd->rx_oversize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_jabber, &nsd->rx_jabber);
1076 i40e_stat_update32(hw,
1077 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1078 pf->stat_offsets_loaded,
1079 &osd->fd_atr_match, &nsd->fd_atr_match);
1080 i40e_stat_update32(hw,
1081 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1082 pf->stat_offsets_loaded,
1083 &osd->fd_sb_match, &nsd->fd_sb_match);
1084 i40e_stat_update32(hw,
1085 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1086 pf->stat_offsets_loaded,
1087 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1089 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1090 nsd->tx_lpi_status =
1091 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1092 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1093 nsd->rx_lpi_status =
1094 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1095 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1096 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1097 pf->stat_offsets_loaded,
1098 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1099 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1100 pf->stat_offsets_loaded,
1101 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1103 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1104 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1105 nsd->fd_sb_status = true;
1107 nsd->fd_sb_status = false;
1109 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1110 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1111 nsd->fd_atr_status = true;
1113 nsd->fd_atr_status = false;
1115 pf->stat_offsets_loaded = true;
1119 * i40e_update_stats - Update the various statistics counters.
1120 * @vsi: the VSI to be updated
1122 * Update the various stats for this VSI and its related entities.
1124 void i40e_update_stats(struct i40e_vsi *vsi)
1126 struct i40e_pf *pf = vsi->back;
1128 if (vsi == pf->vsi[pf->lan_vsi])
1129 i40e_update_pf_stats(pf);
1131 i40e_update_vsi_stats(vsi);
1133 i40e_update_fcoe_stats(vsi);
1138 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1139 * @vsi: the VSI to be searched
1140 * @macaddr: the MAC address
1143 * Returns ptr to the filter object or NULL
1145 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1146 const u8 *macaddr, s16 vlan)
1148 struct i40e_mac_filter *f;
1151 if (!vsi || !macaddr)
1154 key = i40e_addr_to_hkey(macaddr);
1155 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1156 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 * i40e_find_mac - Find a mac addr in the macvlan filters list
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address we are searching for
1168 * Returns the first filter with the provided MAC address or NULL if
1169 * MAC address was not found
1171 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1173 struct i40e_mac_filter *f;
1176 if (!vsi || !macaddr)
1179 key = i40e_addr_to_hkey(macaddr);
1180 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1181 if ((ether_addr_equal(macaddr, f->macaddr)))
1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1189 * @vsi: the VSI to be searched
1191 * Returns true if VSI is in vlan mode or false otherwise
1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1195 /* If we have a PVID, always operate in VLAN mode */
1199 /* We need to operate in VLAN mode whenever we have any filters with
1200 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1201 * time, incurring search cost repeatedly. However, we can notice two
1204 * 1) the only place where we can gain a VLAN filter is in
1207 * 2) the only place where filters are actually removed is in
1208 * i40e_sync_filters_subtask.
1210 * Thus, we can simply use a boolean value, has_vlan_filters which we
1211 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1212 * we have to perform the full search after deleting filters in
1213 * i40e_sync_filters_subtask, but we already have to search
1214 * filters here and can perform the check at the same time. This
1215 * results in avoiding embedding a loop for VLAN mode inside another
1216 * loop over all the filters, and should maintain correctness as noted
1219 return vsi->has_vlan_filter;
1223 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1224 * @vsi: the VSI to configure
1225 * @tmp_add_list: list of filters ready to be added
1226 * @tmp_del_list: list of filters ready to be deleted
1227 * @vlan_filters: the number of active VLAN filters
1229 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1230 * behave as expected. If we have any active VLAN filters remaining or about
1231 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1232 * so that they only match against untagged traffic. If we no longer have any
1233 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1234 * so that they match against both tagged and untagged traffic. In this way,
1235 * we ensure that we correctly receive the desired traffic. This ensures that
1236 * when we have an active VLAN we will receive only untagged traffic and
1237 * traffic matching active VLANs. If we have no active VLANs then we will
1238 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1240 * Finally, in a similar fashion, this function also corrects filters when
1241 * there is an active PVID assigned to this VSI.
1243 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1245 * This function is only expected to be called from within
1246 * i40e_sync_vsi_filters.
1248 * NOTE: This function expects to be called while under the
1249 * mac_filter_hash_lock
1251 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1252 struct hlist_head *tmp_add_list,
1253 struct hlist_head *tmp_del_list,
1256 s16 pvid = le16_to_cpu(vsi->info.pvid);
1257 struct i40e_mac_filter *f, *add_head;
1258 struct i40e_new_mac_filter *new;
1259 struct hlist_node *h;
1262 /* To determine if a particular filter needs to be replaced we
1263 * have the three following conditions:
1265 * a) if we have a PVID assigned, then all filters which are
1266 * not marked as VLAN=PVID must be replaced with filters that
1268 * b) otherwise, if we have any active VLANS, all filters
1269 * which are marked as VLAN=-1 must be replaced with
1270 * filters marked as VLAN=0
1271 * c) finally, if we do not have any active VLANS, all filters
1272 * which are marked as VLAN=0 must be replaced with filters
1276 /* Update the filters about to be added in place */
1277 hlist_for_each_entry(new, tmp_add_list, hlist) {
1278 if (pvid && new->f->vlan != pvid)
1279 new->f->vlan = pvid;
1280 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1282 else if (!vlan_filters && new->f->vlan == 0)
1283 new->f->vlan = I40E_VLAN_ANY;
1286 /* Update the remaining active filters */
1287 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1288 /* Combine the checks for whether a filter needs to be changed
1289 * and then determine the new VLAN inside the if block, in
1290 * order to avoid duplicating code for adding the new filter
1291 * then deleting the old filter.
1293 if ((pvid && f->vlan != pvid) ||
1294 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1295 (!vlan_filters && f->vlan == 0)) {
1296 /* Determine the new vlan we will be adding */
1299 else if (vlan_filters)
1302 new_vlan = I40E_VLAN_ANY;
1304 /* Create the new filter */
1305 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1309 /* Create a temporary i40e_new_mac_filter */
1310 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1315 new->state = add_head->state;
1317 /* Add the new filter to the tmp list */
1318 hlist_add_head(&new->hlist, tmp_add_list);
1320 /* Put the original filter into the delete list */
1321 f->state = I40E_FILTER_REMOVE;
1322 hash_del(&f->hlist);
1323 hlist_add_head(&f->hlist, tmp_del_list);
1327 vsi->has_vlan_filter = !!vlan_filters;
1333 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1334 * @vsi: the PF Main VSI - inappropriate for any other VSI
1335 * @macaddr: the MAC address
1337 * Remove whatever filter the firmware set up so the driver can manage
1338 * its own filtering intelligently.
1340 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1342 struct i40e_aqc_remove_macvlan_element_data element;
1343 struct i40e_pf *pf = vsi->back;
1345 /* Only appropriate for the PF main VSI */
1346 if (vsi->type != I40E_VSI_MAIN)
1349 memset(&element, 0, sizeof(element));
1350 ether_addr_copy(element.mac_addr, macaddr);
1351 element.vlan_tag = 0;
1352 /* Ignore error returns, some firmware does it this way... */
1353 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1354 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1356 memset(&element, 0, sizeof(element));
1357 ether_addr_copy(element.mac_addr, macaddr);
1358 element.vlan_tag = 0;
1359 /* ...and some firmware does it this way. */
1360 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1361 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1362 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1366 * i40e_add_filter - Add a mac/vlan filter to the VSI
1367 * @vsi: the VSI to be searched
1368 * @macaddr: the MAC address
1371 * Returns ptr to the filter object or NULL when no memory available.
1373 * NOTE: This function is expected to be called with mac_filter_hash_lock
1376 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1377 const u8 *macaddr, s16 vlan)
1379 struct i40e_mac_filter *f;
1382 if (!vsi || !macaddr)
1385 f = i40e_find_filter(vsi, macaddr, vlan);
1387 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1391 /* Update the boolean indicating if we need to function in
1395 vsi->has_vlan_filter = true;
1397 ether_addr_copy(f->macaddr, macaddr);
1399 /* If we're in overflow promisc mode, set the state directly
1400 * to failed, so we don't bother to try sending the filter
1403 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1404 f->state = I40E_FILTER_FAILED;
1406 f->state = I40E_FILTER_NEW;
1407 INIT_HLIST_NODE(&f->hlist);
1409 key = i40e_addr_to_hkey(macaddr);
1410 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1412 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1413 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1416 /* If we're asked to add a filter that has been marked for removal, it
1417 * is safe to simply restore it to active state. __i40e_del_filter
1418 * will have simply deleted any filters which were previously marked
1419 * NEW or FAILED, so if it is currently marked REMOVE it must have
1420 * previously been ACTIVE. Since we haven't yet run the sync filters
1421 * task, just restore this filter to the ACTIVE state so that the
1422 * sync task leaves it in place
1424 if (f->state == I40E_FILTER_REMOVE)
1425 f->state = I40E_FILTER_ACTIVE;
1431 * __i40e_del_filter - Remove a specific filter from the VSI
1432 * @vsi: VSI to remove from
1433 * @f: the filter to remove from the list
1435 * This function should be called instead of i40e_del_filter only if you know
1436 * the exact filter you will remove already, such as via i40e_find_filter or
1439 * NOTE: This function is expected to be called with mac_filter_hash_lock
1441 * ANOTHER NOTE: This function MUST be called from within the context of
1442 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1443 * instead of list_for_each_entry().
1445 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1450 /* If the filter was never added to firmware then we can just delete it
1451 * directly and we don't want to set the status to remove or else an
1452 * admin queue command will unnecessarily fire.
1454 if ((f->state == I40E_FILTER_FAILED) ||
1455 (f->state == I40E_FILTER_NEW)) {
1456 hash_del(&f->hlist);
1459 f->state = I40E_FILTER_REMOVE;
1462 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1463 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1467 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1468 * @vsi: the VSI to be searched
1469 * @macaddr: the MAC address
1472 * NOTE: This function is expected to be called with mac_filter_hash_lock
1474 * ANOTHER NOTE: This function MUST be called from within the context of
1475 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1476 * instead of list_for_each_entry().
1478 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1480 struct i40e_mac_filter *f;
1482 if (!vsi || !macaddr)
1485 f = i40e_find_filter(vsi, macaddr, vlan);
1486 __i40e_del_filter(vsi, f);
1490 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1491 * @vsi: the VSI to be searched
1492 * @macaddr: the mac address to be filtered
1494 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1495 * go through all the macvlan filters and add a macvlan filter for each
1496 * unique vlan that already exists. If a PVID has been assigned, instead only
1497 * add the macaddr to that VLAN.
1499 * Returns last filter added on success, else NULL
1501 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1504 struct i40e_mac_filter *f, *add = NULL;
1505 struct hlist_node *h;
1509 return i40e_add_filter(vsi, macaddr,
1510 le16_to_cpu(vsi->info.pvid));
1512 if (!i40e_is_vsi_in_vlan(vsi))
1513 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1515 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1516 if (f->state == I40E_FILTER_REMOVE)
1518 add = i40e_add_filter(vsi, macaddr, f->vlan);
1527 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1528 * @vsi: the VSI to be searched
1529 * @macaddr: the mac address to be removed
1531 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1534 * Returns 0 for success, or error
1536 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1538 struct i40e_mac_filter *f;
1539 struct hlist_node *h;
1543 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock),
1544 "Missing mac_filter_hash_lock\n");
1545 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1546 if (ether_addr_equal(macaddr, f->macaddr)) {
1547 __i40e_del_filter(vsi, f);
1559 * i40e_set_mac - NDO callback to set mac address
1560 * @netdev: network interface device structure
1561 * @p: pointer to an address structure
1563 * Returns 0 on success, negative on failure
1566 int i40e_set_mac(struct net_device *netdev, void *p)
1568 static int i40e_set_mac(struct net_device *netdev, void *p)
1571 struct i40e_netdev_priv *np = netdev_priv(netdev);
1572 struct i40e_vsi *vsi = np->vsi;
1573 struct i40e_pf *pf = vsi->back;
1574 struct i40e_hw *hw = &pf->hw;
1575 struct sockaddr *addr = p;
1577 if (!is_valid_ether_addr(addr->sa_data))
1578 return -EADDRNOTAVAIL;
1580 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1581 netdev_info(netdev, "already using mac address %pM\n",
1586 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1587 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1588 return -EADDRNOTAVAIL;
1590 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1591 netdev_info(netdev, "returning to hw mac address %pM\n",
1594 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1596 spin_lock_bh(&vsi->mac_filter_hash_lock);
1597 i40e_del_mac_filter(vsi, netdev->dev_addr);
1598 i40e_add_mac_filter(vsi, addr->sa_data);
1599 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1600 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1601 if (vsi->type == I40E_VSI_MAIN) {
1604 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1605 I40E_AQC_WRITE_TYPE_LAA_WOL,
1606 addr->sa_data, NULL);
1608 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1609 i40e_stat_str(hw, ret),
1610 i40e_aq_str(hw, hw->aq.asq_last_status));
1613 /* schedule our worker thread which will take care of
1614 * applying the new filter changes
1616 i40e_service_event_schedule(vsi->back);
1621 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1622 * @vsi: the VSI being setup
1623 * @ctxt: VSI context structure
1624 * @enabled_tc: Enabled TCs bitmap
1625 * @is_add: True if called before Add VSI
1627 * Setup VSI queue mapping for enabled traffic classes.
1630 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1631 struct i40e_vsi_context *ctxt,
1635 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1636 struct i40e_vsi_context *ctxt,
1641 struct i40e_pf *pf = vsi->back;
1651 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1654 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1655 /* Find numtc from enabled TC bitmap */
1656 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1657 if (enabled_tc & BIT(i)) /* TC is enabled */
1661 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1665 /* At least TC0 is enabled in case of non-DCB case */
1669 vsi->tc_config.numtc = numtc;
1670 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1671 /* Number of queues per enabled TC */
1672 qcount = vsi->alloc_queue_pairs;
1674 num_tc_qps = qcount / numtc;
1675 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1677 /* Setup queue offset/count for all TCs for given VSI */
1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1679 /* See if the given TC is enabled for the given VSI */
1680 if (vsi->tc_config.enabled_tc & BIT(i)) {
1684 switch (vsi->type) {
1686 qcount = min_t(int, pf->alloc_rss_size,
1691 qcount = num_tc_qps;
1695 case I40E_VSI_SRIOV:
1696 case I40E_VSI_VMDQ2:
1698 qcount = num_tc_qps;
1702 vsi->tc_config.tc_info[i].qoffset = offset;
1703 vsi->tc_config.tc_info[i].qcount = qcount;
1705 /* find the next higher power-of-2 of num queue pairs */
1708 while (num_qps && (BIT_ULL(pow) < qcount)) {
1713 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1715 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1716 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1720 /* TC is not enabled so set the offset to
1721 * default queue and allocate one queue
1724 vsi->tc_config.tc_info[i].qoffset = 0;
1725 vsi->tc_config.tc_info[i].qcount = 1;
1726 vsi->tc_config.tc_info[i].netdev_tc = 0;
1730 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1733 /* Set actual Tx/Rx queue pairs */
1734 vsi->num_queue_pairs = offset;
1735 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1736 if (vsi->req_queue_pairs > 0)
1737 vsi->num_queue_pairs = vsi->req_queue_pairs;
1738 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1739 vsi->num_queue_pairs = pf->num_lan_msix;
1742 /* Scheduler section valid can only be set for ADD VSI */
1744 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1746 ctxt->info.up_enable_bits = enabled_tc;
1748 if (vsi->type == I40E_VSI_SRIOV) {
1749 ctxt->info.mapping_flags |=
1750 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1751 for (i = 0; i < vsi->num_queue_pairs; i++)
1752 ctxt->info.queue_mapping[i] =
1753 cpu_to_le16(vsi->base_queue + i);
1755 ctxt->info.mapping_flags |=
1756 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1757 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1759 ctxt->info.valid_sections |= cpu_to_le16(sections);
1763 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1764 * @netdev: the netdevice
1765 * @addr: address to add
1767 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1768 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1770 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1772 struct i40e_netdev_priv *np = netdev_priv(netdev);
1773 struct i40e_vsi *vsi = np->vsi;
1775 if (i40e_add_mac_filter(vsi, addr))
1782 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1783 * @netdev: the netdevice
1784 * @addr: address to add
1786 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1787 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1789 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1791 struct i40e_netdev_priv *np = netdev_priv(netdev);
1792 struct i40e_vsi *vsi = np->vsi;
1794 i40e_del_mac_filter(vsi, addr);
1800 * i40e_set_rx_mode - NDO callback to set the netdev filters
1801 * @netdev: network interface device structure
1804 void i40e_set_rx_mode(struct net_device *netdev)
1806 static void i40e_set_rx_mode(struct net_device *netdev)
1809 struct i40e_netdev_priv *np = netdev_priv(netdev);
1810 struct i40e_vsi *vsi = np->vsi;
1812 spin_lock_bh(&vsi->mac_filter_hash_lock);
1814 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1815 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1817 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1819 /* check for other flag changes */
1820 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1821 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1822 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1825 /* schedule our worker thread which will take care of
1826 * applying the new filter changes
1828 i40e_service_event_schedule(vsi->back);
1832 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1833 * @vsi: Pointer to VSI struct
1834 * @from: Pointer to list which contains MAC filter entries - changes to
1835 * those entries needs to be undone.
1837 * MAC filter entries from this list were slated for deletion.
1839 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1840 struct hlist_head *from)
1842 struct i40e_mac_filter *f;
1843 struct hlist_node *h;
1845 hlist_for_each_entry_safe(f, h, from, hlist) {
1846 u64 key = i40e_addr_to_hkey(f->macaddr);
1848 /* Move the element back into MAC filter list*/
1849 hlist_del(&f->hlist);
1850 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1855 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1856 * @vsi: Pointer to vsi struct
1857 * @from: Pointer to list which contains MAC filter entries - changes to
1858 * those entries needs to be undone.
1860 * MAC filter entries from this list were slated for addition.
1862 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1863 struct hlist_head *from)
1865 struct i40e_new_mac_filter *new;
1866 struct hlist_node *h;
1868 hlist_for_each_entry_safe(new, h, from, hlist) {
1869 /* We can simply free the wrapper structure */
1870 hlist_del(&new->hlist);
1876 * i40e_next_entry - Get the next non-broadcast filter from a list
1877 * @next: pointer to filter in list
1879 * Returns the next non-broadcast filter in the list. Required so that we
1880 * ignore broadcast filters within the list, since these are not handled via
1881 * the normal firmware update path.
1884 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
1887 next = hlist_entry(next->hlist.next,
1888 typeof(struct i40e_new_mac_filter),
1891 /* keep going if we found a broadcast filter */
1892 if (next && is_broadcast_ether_addr(next->f->macaddr))
1902 * i40e_update_filter_state - Update filter state based on return data
1904 * @count: Number of filters added
1905 * @add_list: return data from fw
1906 * @head: pointer to first filter in current batch
1908 * MAC filter entries from list were slated to be added to device. Returns
1909 * number of successful filters. Note that 0 does NOT mean success!
1912 i40e_update_filter_state(int count,
1913 struct i40e_aqc_add_macvlan_element_data *add_list,
1914 struct i40e_new_mac_filter *add_head)
1919 for (i = 0; i < count; i++) {
1920 /* Always check status of each filter. We don't need to check
1921 * the firmware return status because we pre-set the filter
1922 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
1923 * request to the adminq. Thus, if it no longer matches then
1924 * we know the filter is active.
1926 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
1927 add_head->state = I40E_FILTER_FAILED;
1929 add_head->state = I40E_FILTER_ACTIVE;
1933 add_head = i40e_next_filter(add_head);
1942 * i40e_aqc_del_filters - Request firmware to delete a set of filters
1943 * @vsi: ptr to the VSI
1944 * @vsi_name: name to display in messages
1945 * @list: the list of filters to send to firmware
1946 * @num_del: the number of filters to delete
1947 * @retval: Set to -EIO on failure to delete
1949 * Send a request to firmware via AdminQ to delete a set of filters. Uses
1950 * *retval instead of a return value so that success does not force ret_val to
1951 * be set to 0. This ensures that a sequence of calls to this function
1952 * preserve the previous value of *retval on successful delete.
1955 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
1956 struct i40e_aqc_remove_macvlan_element_data *list,
1957 int num_del, int *retval)
1959 struct i40e_hw *hw = &vsi->back->hw;
1963 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
1964 aq_err = hw->aq.asq_last_status;
1966 /* Explicitly ignore and do not report when firmware returns ENOENT */
1967 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1969 dev_info(&vsi->back->pdev->dev,
1970 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1971 vsi_name, i40e_stat_str(hw, aq_ret),
1972 i40e_aq_str(hw, aq_err));
1977 * i40e_aqc_add_filters - Request firmware to add a set of filters
1978 * @vsi: ptr to the VSI
1979 * @vsi_name: name to display in messages
1980 * @list: the list of filters to send to firmware
1981 * @add_head: Position in the add hlist
1982 * @num_add: the number of filters to add
1983 * @promisc_change: set to true on exit if promiscuous mode was forced on
1985 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
1986 * promisc_changed to true if the firmware has run out of space for more
1990 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
1991 struct i40e_aqc_add_macvlan_element_data *list,
1992 struct i40e_new_mac_filter *add_head,
1993 int num_add, bool *promisc_changed)
1995 struct i40e_hw *hw = &vsi->back->hw;
1998 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
1999 aq_err = hw->aq.asq_last_status;
2000 fcnt = i40e_update_filter_state(num_add, list, add_head);
2002 if (fcnt != num_add) {
2003 *promisc_changed = true;
2004 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2005 dev_warn(&vsi->back->pdev->dev,
2006 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2007 i40e_aq_str(hw, aq_err),
2013 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2014 * @vsi: pointer to the VSI
2017 * This function sets or clears the promiscuous broadcast flags for VLAN
2018 * filters in order to properly receive broadcast frames. Assumes that only
2019 * broadcast filters are passed.
2021 * Returns status indicating success or failure;
2024 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2025 struct i40e_mac_filter *f)
2027 bool enable = f->state == I40E_FILTER_NEW;
2028 struct i40e_hw *hw = &vsi->back->hw;
2031 if (f->vlan == I40E_VLAN_ANY) {
2032 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2037 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2045 dev_warn(&vsi->back->pdev->dev,
2046 "Error %s setting broadcast promiscuous mode on %s\n",
2047 i40e_aq_str(hw, hw->aq.asq_last_status),
2054 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2055 * @vsi: ptr to the VSI
2057 * Push any outstanding VSI filter changes through the AdminQ.
2059 * Returns 0 or error value
2061 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2063 struct hlist_head tmp_add_list, tmp_del_list;
2064 struct i40e_mac_filter *f;
2065 struct i40e_new_mac_filter *new, *add_head = NULL;
2066 struct i40e_hw *hw = &vsi->back->hw;
2067 unsigned int failed_filters = 0;
2068 unsigned int vlan_filters = 0;
2069 bool promisc_changed = false;
2070 char vsi_name[16] = "PF";
2071 int filter_list_len = 0;
2072 i40e_status aq_ret = 0;
2073 u32 changed_flags = 0;
2074 struct hlist_node *h;
2083 /* empty array typed pointers, kcalloc later */
2084 struct i40e_aqc_add_macvlan_element_data *add_list;
2085 struct i40e_aqc_remove_macvlan_element_data *del_list;
2087 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
2088 usleep_range(1000, 2000);
2092 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2093 vsi->current_netdev_flags = vsi->netdev->flags;
2096 INIT_HLIST_HEAD(&tmp_add_list);
2097 INIT_HLIST_HEAD(&tmp_del_list);
2099 if (vsi->type == I40E_VSI_SRIOV)
2100 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2101 else if (vsi->type != I40E_VSI_MAIN)
2102 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2104 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2105 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2107 spin_lock_bh(&vsi->mac_filter_hash_lock);
2108 /* Create a list of filters to delete. */
2109 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2110 if (f->state == I40E_FILTER_REMOVE) {
2111 /* Move the element into temporary del_list */
2112 hash_del(&f->hlist);
2113 hlist_add_head(&f->hlist, &tmp_del_list);
2115 /* Avoid counting removed filters */
2118 if (f->state == I40E_FILTER_NEW) {
2119 /* Create a temporary i40e_new_mac_filter */
2120 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2122 goto err_no_memory_locked;
2124 /* Store pointer to the real filter */
2126 new->state = f->state;
2128 /* Add it to the hash list */
2129 hlist_add_head(&new->hlist, &tmp_add_list);
2132 /* Count the number of active (current and new) VLAN
2133 * filters we have now. Does not count filters which
2134 * are marked for deletion.
2140 retval = i40e_correct_mac_vlan_filters(vsi,
2145 goto err_no_memory_locked;
2147 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2150 /* Now process 'del_list' outside the lock */
2151 if (!hlist_empty(&tmp_del_list)) {
2152 filter_list_len = hw->aq.asq_buf_size /
2153 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2154 list_size = filter_list_len *
2155 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2156 del_list = kzalloc(list_size, GFP_ATOMIC);
2160 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2163 /* handle broadcast filters by updating the broadcast
2164 * promiscuous flag and release filter list.
2166 if (is_broadcast_ether_addr(f->macaddr)) {
2167 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2169 hlist_del(&f->hlist);
2174 /* add to delete list */
2175 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2176 if (f->vlan == I40E_VLAN_ANY) {
2177 del_list[num_del].vlan_tag = 0;
2178 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2180 del_list[num_del].vlan_tag =
2181 cpu_to_le16((u16)(f->vlan));
2184 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2185 del_list[num_del].flags = cmd_flags;
2188 /* flush a full buffer */
2189 if (num_del == filter_list_len) {
2190 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2192 memset(del_list, 0, list_size);
2195 /* Release memory for MAC filter entries which were
2196 * synced up with HW.
2198 hlist_del(&f->hlist);
2203 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2211 if (!hlist_empty(&tmp_add_list)) {
2212 /* Do all the adds now. */
2213 filter_list_len = hw->aq.asq_buf_size /
2214 sizeof(struct i40e_aqc_add_macvlan_element_data);
2215 list_size = filter_list_len *
2216 sizeof(struct i40e_aqc_add_macvlan_element_data);
2217 add_list = kzalloc(list_size, GFP_ATOMIC);
2222 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2223 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2225 new->state = I40E_FILTER_FAILED;
2229 /* handle broadcast filters by updating the broadcast
2230 * promiscuous flag instead of adding a MAC filter.
2232 if (is_broadcast_ether_addr(new->f->macaddr)) {
2233 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2235 new->state = I40E_FILTER_FAILED;
2237 new->state = I40E_FILTER_ACTIVE;
2241 /* add to add array */
2245 ether_addr_copy(add_list[num_add].mac_addr,
2247 if (new->f->vlan == I40E_VLAN_ANY) {
2248 add_list[num_add].vlan_tag = 0;
2249 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2251 add_list[num_add].vlan_tag =
2252 cpu_to_le16((u16)(new->f->vlan));
2254 add_list[num_add].queue_number = 0;
2255 /* set invalid match method for later detection */
2256 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2257 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2258 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2261 /* flush a full buffer */
2262 if (num_add == filter_list_len) {
2263 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2266 memset(add_list, 0, list_size);
2271 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2272 num_add, &promisc_changed);
2274 /* Now move all of the filters from the temp add list back to
2277 spin_lock_bh(&vsi->mac_filter_hash_lock);
2278 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2279 /* Only update the state if we're still NEW */
2280 if (new->f->state == I40E_FILTER_NEW)
2281 new->f->state = new->state;
2282 hlist_del(&new->hlist);
2285 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2290 /* Determine the number of active and failed filters. */
2291 spin_lock_bh(&vsi->mac_filter_hash_lock);
2292 vsi->active_filters = 0;
2293 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2294 if (f->state == I40E_FILTER_ACTIVE)
2295 vsi->active_filters++;
2296 else if (f->state == I40E_FILTER_FAILED)
2299 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2301 /* If promiscuous mode has changed, we need to calculate a new
2302 * threshold for when we are safe to exit
2304 if (promisc_changed)
2305 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2307 /* Check if we are able to exit overflow promiscuous mode. We can
2308 * safely exit if we didn't just enter, we no longer have any failed
2309 * filters, and we have reduced filters below the threshold value.
2311 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2312 !promisc_changed && !failed_filters &&
2313 (vsi->active_filters < vsi->promisc_threshold)) {
2314 dev_info(&pf->pdev->dev,
2315 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2317 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2318 promisc_changed = true;
2319 vsi->promisc_threshold = 0;
2322 /* if the VF is not trusted do not do promisc */
2323 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2324 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2328 /* check for changes in promiscuous modes */
2329 if (changed_flags & IFF_ALLMULTI) {
2330 bool cur_multipromisc;
2332 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2333 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2338 retval = i40e_aq_rc_to_posix(aq_ret,
2339 hw->aq.asq_last_status);
2340 dev_info(&pf->pdev->dev,
2341 "set multi promisc failed on %s, err %s aq_err %s\n",
2343 i40e_stat_str(hw, aq_ret),
2344 i40e_aq_str(hw, hw->aq.asq_last_status));
2347 if ((changed_flags & IFF_PROMISC) ||
2349 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2352 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2353 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2355 if ((vsi->type == I40E_VSI_MAIN) &&
2356 (pf->lan_veb != I40E_NO_VEB) &&
2357 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2358 /* set defport ON for Main VSI instead of true promisc
2359 * this way we will get all unicast/multicast and VLAN
2360 * promisc behavior but will not get VF or VMDq traffic
2361 * replicated on the Main VSI.
2363 if (pf->cur_promisc != cur_promisc) {
2364 pf->cur_promisc = cur_promisc;
2367 i40e_aq_set_default_vsi(hw,
2372 i40e_aq_clear_default_vsi(hw,
2376 retval = i40e_aq_rc_to_posix(aq_ret,
2377 hw->aq.asq_last_status);
2378 dev_info(&pf->pdev->dev,
2379 "Set default VSI failed on %s, err %s, aq_err %s\n",
2381 i40e_stat_str(hw, aq_ret),
2383 hw->aq.asq_last_status));
2387 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2394 i40e_aq_rc_to_posix(aq_ret,
2395 hw->aq.asq_last_status);
2396 dev_info(&pf->pdev->dev,
2397 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2399 i40e_stat_str(hw, aq_ret),
2401 hw->aq.asq_last_status));
2403 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2409 i40e_aq_rc_to_posix(aq_ret,
2410 hw->aq.asq_last_status);
2411 dev_info(&pf->pdev->dev,
2412 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2414 i40e_stat_str(hw, aq_ret),
2416 hw->aq.asq_last_status));
2419 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2423 retval = i40e_aq_rc_to_posix(aq_ret,
2424 pf->hw.aq.asq_last_status);
2425 dev_info(&pf->pdev->dev,
2426 "set brdcast promisc failed, err %s, aq_err %s\n",
2427 i40e_stat_str(hw, aq_ret),
2429 hw->aq.asq_last_status));
2433 /* if something went wrong then set the changed flag so we try again */
2435 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2437 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2441 /* Restore elements on the temporary add and delete lists */
2442 spin_lock_bh(&vsi->mac_filter_hash_lock);
2443 err_no_memory_locked:
2444 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2445 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2446 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2448 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2449 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2454 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2455 * @pf: board private structure
2457 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2461 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2463 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2465 for (v = 0; v < pf->num_alloc_vsi; v++) {
2467 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2468 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2471 /* come back and try again later */
2472 pf->flags |= I40E_FLAG_FILTER_SYNC;
2480 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2481 * @netdev: network interface device structure
2482 * @new_mtu: new value for maximum frame size
2484 * Returns 0 on success, negative on failure
2486 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2488 struct i40e_netdev_priv *np = netdev_priv(netdev);
2489 struct i40e_vsi *vsi = np->vsi;
2491 netdev_info(netdev, "changing MTU from %d to %d\n",
2492 netdev->mtu, new_mtu);
2493 netdev->mtu = new_mtu;
2494 if (netif_running(netdev))
2495 i40e_vsi_reinit_locked(vsi);
2496 i40e_notify_client_of_l2_param_changes(vsi);
2501 * i40e_ioctl - Access the hwtstamp interface
2502 * @netdev: network interface device structure
2503 * @ifr: interface request data
2504 * @cmd: ioctl command
2506 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2508 struct i40e_netdev_priv *np = netdev_priv(netdev);
2509 struct i40e_pf *pf = np->vsi->back;
2513 return i40e_ptp_get_ts_config(pf, ifr);
2515 return i40e_ptp_set_ts_config(pf, ifr);
2522 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2523 * @vsi: the vsi being adjusted
2525 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2527 struct i40e_vsi_context ctxt;
2530 if ((vsi->info.valid_sections &
2531 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2532 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2533 return; /* already enabled */
2535 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2536 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2537 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2539 ctxt.seid = vsi->seid;
2540 ctxt.info = vsi->info;
2541 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2543 dev_info(&vsi->back->pdev->dev,
2544 "update vlan stripping failed, err %s aq_err %s\n",
2545 i40e_stat_str(&vsi->back->hw, ret),
2546 i40e_aq_str(&vsi->back->hw,
2547 vsi->back->hw.aq.asq_last_status));
2552 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2553 * @vsi: the vsi being adjusted
2555 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2557 struct i40e_vsi_context ctxt;
2560 if ((vsi->info.valid_sections &
2561 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2562 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2563 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2564 return; /* already disabled */
2566 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2567 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2568 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2570 ctxt.seid = vsi->seid;
2571 ctxt.info = vsi->info;
2572 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2574 dev_info(&vsi->back->pdev->dev,
2575 "update vlan stripping failed, err %s aq_err %s\n",
2576 i40e_stat_str(&vsi->back->hw, ret),
2577 i40e_aq_str(&vsi->back->hw,
2578 vsi->back->hw.aq.asq_last_status));
2583 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2584 * @netdev: network interface to be adjusted
2585 * @features: netdev features to test if VLAN offload is enabled or not
2587 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2589 struct i40e_netdev_priv *np = netdev_priv(netdev);
2590 struct i40e_vsi *vsi = np->vsi;
2592 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2593 i40e_vlan_stripping_enable(vsi);
2595 i40e_vlan_stripping_disable(vsi);
2599 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2600 * @vsi: the vsi being configured
2601 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2603 * This is a helper function for adding a new MAC/VLAN filter with the
2604 * specified VLAN for each existing MAC address already in the hash table.
2605 * This function does *not* perform any accounting to update filters based on
2608 * NOTE: this function expects to be called while under the
2609 * mac_filter_hash_lock
2611 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2613 struct i40e_mac_filter *f, *add_f;
2614 struct hlist_node *h;
2617 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2618 if (f->state == I40E_FILTER_REMOVE)
2620 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2622 dev_info(&vsi->back->pdev->dev,
2623 "Could not add vlan filter %d for %pM\n",
2633 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2634 * @vsi: the VSI being configured
2635 * @vid: VLAN id to be added
2637 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2641 if (!vid || vsi->info.pvid)
2644 /* Locked once because all functions invoked below iterates list*/
2645 spin_lock_bh(&vsi->mac_filter_hash_lock);
2646 err = i40e_add_vlan_all_mac(vsi, vid);
2647 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2651 /* schedule our worker thread which will take care of
2652 * applying the new filter changes
2654 i40e_service_event_schedule(vsi->back);
2659 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2660 * @vsi: the vsi being configured
2661 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2663 * This function should be used to remove all VLAN filters which match the
2664 * given VID. It does not schedule the service event and does not take the
2665 * mac_filter_hash_lock so it may be combined with other operations under
2666 * a single invocation of the mac_filter_hash_lock.
2668 * NOTE: this function expects to be called while under the
2669 * mac_filter_hash_lock
2671 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2673 struct i40e_mac_filter *f;
2674 struct hlist_node *h;
2677 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2679 __i40e_del_filter(vsi, f);
2684 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2685 * @vsi: the VSI being configured
2686 * @vid: VLAN id to be removed
2688 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2690 if (!vid || vsi->info.pvid)
2693 spin_lock_bh(&vsi->mac_filter_hash_lock);
2694 i40e_rm_vlan_all_mac(vsi, vid);
2695 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2697 /* schedule our worker thread which will take care of
2698 * applying the new filter changes
2700 i40e_service_event_schedule(vsi->back);
2704 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2705 * @netdev: network interface to be adjusted
2706 * @vid: vlan id to be added
2708 * net_device_ops implementation for adding vlan ids
2711 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2712 __always_unused __be16 proto, u16 vid)
2714 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2715 __always_unused __be16 proto, u16 vid)
2718 struct i40e_netdev_priv *np = netdev_priv(netdev);
2719 struct i40e_vsi *vsi = np->vsi;
2722 if (vid >= VLAN_N_VID)
2725 /* If the network stack called us with vid = 0 then
2726 * it is asking to receive priority tagged packets with
2727 * vlan id 0. Our HW receives them by default when configured
2728 * to receive untagged packets so there is no need to add an
2729 * extra filter for vlan 0 tagged packets.
2732 ret = i40e_vsi_add_vlan(vsi, vid);
2735 set_bit(vid, vsi->active_vlans);
2741 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2742 * @netdev: network interface to be adjusted
2743 * @vid: vlan id to be removed
2745 * net_device_ops implementation for removing vlan ids
2748 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2749 __always_unused __be16 proto, u16 vid)
2751 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2752 __always_unused __be16 proto, u16 vid)
2755 struct i40e_netdev_priv *np = netdev_priv(netdev);
2756 struct i40e_vsi *vsi = np->vsi;
2758 /* return code is ignored as there is nothing a user
2759 * can do about failure to remove and a log message was
2760 * already printed from the other function
2762 i40e_vsi_kill_vlan(vsi, vid);
2764 clear_bit(vid, vsi->active_vlans);
2770 * i40e_macaddr_init - explicitly write the mac address filters
2772 * @vsi: pointer to the vsi
2773 * @macaddr: the MAC address
2775 * This is needed when the macaddr has been obtained by other
2776 * means than the default, e.g., from Open Firmware or IDPROM.
2777 * Returns 0 on success, negative on failure
2779 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2782 struct i40e_aqc_add_macvlan_element_data element;
2784 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2785 I40E_AQC_WRITE_TYPE_LAA_WOL,
2788 dev_info(&vsi->back->pdev->dev,
2789 "Addr change for VSI failed: %d\n", ret);
2790 return -EADDRNOTAVAIL;
2793 memset(&element, 0, sizeof(element));
2794 ether_addr_copy(element.mac_addr, macaddr);
2795 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2796 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2798 dev_info(&vsi->back->pdev->dev,
2799 "add filter failed err %s aq_err %s\n",
2800 i40e_stat_str(&vsi->back->hw, ret),
2801 i40e_aq_str(&vsi->back->hw,
2802 vsi->back->hw.aq.asq_last_status));
2808 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2809 * @vsi: the vsi being brought back up
2811 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2818 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2820 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2821 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2826 * i40e_vsi_add_pvid - Add pvid for the VSI
2827 * @vsi: the vsi being adjusted
2828 * @vid: the vlan id to set as a PVID
2830 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2832 struct i40e_vsi_context ctxt;
2835 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2836 vsi->info.pvid = cpu_to_le16(vid);
2837 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2838 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2839 I40E_AQ_VSI_PVLAN_EMOD_STR;
2841 ctxt.seid = vsi->seid;
2842 ctxt.info = vsi->info;
2843 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2845 dev_info(&vsi->back->pdev->dev,
2846 "add pvid failed, err %s aq_err %s\n",
2847 i40e_stat_str(&vsi->back->hw, ret),
2848 i40e_aq_str(&vsi->back->hw,
2849 vsi->back->hw.aq.asq_last_status));
2857 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2858 * @vsi: the vsi being adjusted
2860 * Just use the vlan_rx_register() service to put it back to normal
2862 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2864 i40e_vlan_stripping_disable(vsi);
2870 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2871 * @vsi: ptr to the VSI
2873 * If this function returns with an error, then it's possible one or
2874 * more of the rings is populated (while the rest are not). It is the
2875 * callers duty to clean those orphaned rings.
2877 * Return 0 on success, negative on failure
2879 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2883 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2884 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2890 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2891 * @vsi: ptr to the VSI
2893 * Free VSI's transmit software resources
2895 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2902 for (i = 0; i < vsi->num_queue_pairs; i++)
2903 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2904 i40e_free_tx_resources(vsi->tx_rings[i]);
2908 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2909 * @vsi: ptr to the VSI
2911 * If this function returns with an error, then it's possible one or
2912 * more of the rings is populated (while the rest are not). It is the
2913 * callers duty to clean those orphaned rings.
2915 * Return 0 on success, negative on failure
2917 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2921 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2922 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2924 i40e_fcoe_setup_ddp_resources(vsi);
2930 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2931 * @vsi: ptr to the VSI
2933 * Free all receive software resources
2935 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2942 for (i = 0; i < vsi->num_queue_pairs; i++)
2943 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2944 i40e_free_rx_resources(vsi->rx_rings[i]);
2946 i40e_fcoe_free_ddp_resources(vsi);
2951 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2952 * @ring: The Tx ring to configure
2954 * This enables/disables XPS for a given Tx descriptor ring
2955 * based on the TCs enabled for the VSI that ring belongs to.
2957 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2959 struct i40e_vsi *vsi = ring->vsi;
2962 if (!ring->q_vector || !ring->netdev)
2965 /* Single TC mode enable XPS */
2966 if (vsi->tc_config.numtc <= 1) {
2967 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2968 netif_set_xps_queue(ring->netdev,
2969 &ring->q_vector->affinity_mask,
2971 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2972 /* Disable XPS to allow selection based on TC */
2973 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2974 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2975 free_cpumask_var(mask);
2978 /* schedule our worker thread which will take care of
2979 * applying the new filter changes
2981 i40e_service_event_schedule(vsi->back);
2985 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2986 * @ring: The Tx ring to configure
2988 * Configure the Tx descriptor ring in the HMC context.
2990 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2992 struct i40e_vsi *vsi = ring->vsi;
2993 u16 pf_q = vsi->base_queue + ring->queue_index;
2994 struct i40e_hw *hw = &vsi->back->hw;
2995 struct i40e_hmc_obj_txq tx_ctx;
2996 i40e_status err = 0;
2999 /* some ATR related tx ring init */
3000 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3001 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3002 ring->atr_count = 0;
3004 ring->atr_sample_rate = 0;
3008 i40e_config_xps_tx_ring(ring);
3010 /* clear the context structure first */
3011 memset(&tx_ctx, 0, sizeof(tx_ctx));
3013 tx_ctx.new_context = 1;
3014 tx_ctx.base = (ring->dma / 128);
3015 tx_ctx.qlen = ring->count;
3016 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3017 I40E_FLAG_FD_ATR_ENABLED));
3019 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
3021 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3022 /* FDIR VSI tx ring can still use RS bit and writebacks */
3023 if (vsi->type != I40E_VSI_FDIR)
3024 tx_ctx.head_wb_ena = 1;
3025 tx_ctx.head_wb_addr = ring->dma +
3026 (ring->count * sizeof(struct i40e_tx_desc));
3028 /* As part of VSI creation/update, FW allocates certain
3029 * Tx arbitration queue sets for each TC enabled for
3030 * the VSI. The FW returns the handles to these queue
3031 * sets as part of the response buffer to Add VSI,
3032 * Update VSI, etc. AQ commands. It is expected that
3033 * these queue set handles be associated with the Tx
3034 * queues by the driver as part of the TX queue context
3035 * initialization. This has to be done regardless of
3036 * DCB as by default everything is mapped to TC0.
3038 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3039 tx_ctx.rdylist_act = 0;
3041 /* clear the context in the HMC */
3042 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3044 dev_info(&vsi->back->pdev->dev,
3045 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3046 ring->queue_index, pf_q, err);
3050 /* set the context in the HMC */
3051 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3053 dev_info(&vsi->back->pdev->dev,
3054 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3055 ring->queue_index, pf_q, err);
3059 /* Now associate this queue with this PCI function */
3060 if (vsi->type == I40E_VSI_VMDQ2) {
3061 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3062 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3063 I40E_QTX_CTL_VFVM_INDX_MASK;
3065 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3068 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3069 I40E_QTX_CTL_PF_INDX_MASK);
3070 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3073 /* cache tail off for easier writes later */
3074 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3080 * i40e_configure_rx_ring - Configure a receive ring context
3081 * @ring: The Rx ring to configure
3083 * Configure the Rx descriptor ring in the HMC context.
3085 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3087 struct i40e_vsi *vsi = ring->vsi;
3088 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3089 u16 pf_q = vsi->base_queue + ring->queue_index;
3090 struct i40e_hw *hw = &vsi->back->hw;
3091 struct i40e_hmc_obj_rxq rx_ctx;
3092 i40e_status err = 0;
3096 /* clear the context structure first */
3097 memset(&rx_ctx, 0, sizeof(rx_ctx));
3099 ring->rx_buf_len = vsi->rx_buf_len;
3101 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
3103 rx_ctx.base = (ring->dma / 128);
3104 rx_ctx.qlen = ring->count;
3106 /* use 32 byte descriptors */
3109 /* descriptor type is always zero
3112 rx_ctx.hsplit_0 = 0;
3114 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3115 if (hw->revision_id == 0)
3116 rx_ctx.lrxqthresh = 0;
3118 rx_ctx.lrxqthresh = 2;
3119 rx_ctx.crcstrip = 1;
3121 /* this controls whether VLAN is stripped from inner headers */
3124 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
3126 /* set the prefena field to 1 because the manual says to */
3129 /* clear the context in the HMC */
3130 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3132 dev_info(&vsi->back->pdev->dev,
3133 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3134 ring->queue_index, pf_q, err);
3138 /* set the context in the HMC */
3139 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3141 dev_info(&vsi->back->pdev->dev,
3142 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3143 ring->queue_index, pf_q, err);
3147 /* cache tail for quicker writes, and clear the reg before use */
3148 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3149 writel(0, ring->tail);
3151 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3157 * i40e_vsi_configure_tx - Configure the VSI for Tx
3158 * @vsi: VSI structure describing this set of rings and resources
3160 * Configure the Tx VSI for operation.
3162 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3167 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3168 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3174 * i40e_vsi_configure_rx - Configure the VSI for Rx
3175 * @vsi: the VSI being configured
3177 * Configure the Rx VSI for operation.
3179 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3184 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3185 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3186 + ETH_FCS_LEN + VLAN_HLEN;
3188 vsi->max_frame = I40E_RXBUFFER_2048;
3190 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3193 /* setup rx buffer for FCoE */
3194 if ((vsi->type == I40E_VSI_FCOE) &&
3195 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3196 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3197 vsi->max_frame = I40E_RXBUFFER_3072;
3200 #endif /* I40E_FCOE */
3201 /* round up for the chip's needs */
3202 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3203 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3205 /* set up individual rings */
3206 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3207 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3213 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3214 * @vsi: ptr to the VSI
3216 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3218 struct i40e_ring *tx_ring, *rx_ring;
3219 u16 qoffset, qcount;
3222 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3223 /* Reset the TC information */
3224 for (i = 0; i < vsi->num_queue_pairs; i++) {
3225 rx_ring = vsi->rx_rings[i];
3226 tx_ring = vsi->tx_rings[i];
3227 rx_ring->dcb_tc = 0;
3228 tx_ring->dcb_tc = 0;
3232 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3233 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3236 qoffset = vsi->tc_config.tc_info[n].qoffset;
3237 qcount = vsi->tc_config.tc_info[n].qcount;
3238 for (i = qoffset; i < (qoffset + qcount); i++) {
3239 rx_ring = vsi->rx_rings[i];
3240 tx_ring = vsi->tx_rings[i];
3241 rx_ring->dcb_tc = n;
3242 tx_ring->dcb_tc = n;
3248 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3249 * @vsi: ptr to the VSI
3251 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3253 struct i40e_pf *pf = vsi->back;
3257 i40e_set_rx_mode(vsi->netdev);
3259 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3260 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3262 dev_warn(&pf->pdev->dev,
3263 "could not set up macaddr; err %d\n", err);
3269 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3270 * @vsi: Pointer to the targeted VSI
3272 * This function replays the hlist on the hw where all the SB Flow Director
3273 * filters were saved.
3275 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3277 struct i40e_fdir_filter *filter;
3278 struct i40e_pf *pf = vsi->back;
3279 struct hlist_node *node;
3281 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3284 hlist_for_each_entry_safe(filter, node,
3285 &pf->fdir_filter_list, fdir_node) {
3286 i40e_add_del_fdir(vsi, filter, true);
3291 * i40e_vsi_configure - Set up the VSI for action
3292 * @vsi: the VSI being configured
3294 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3298 i40e_set_vsi_rx_mode(vsi);
3299 i40e_restore_vlan(vsi);
3300 i40e_vsi_config_dcb_rings(vsi);
3301 err = i40e_vsi_configure_tx(vsi);
3303 err = i40e_vsi_configure_rx(vsi);
3309 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3310 * @vsi: the VSI being configured
3312 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3314 struct i40e_pf *pf = vsi->back;
3315 struct i40e_hw *hw = &pf->hw;
3320 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3321 * and PFINT_LNKLSTn registers, e.g.:
3322 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3324 qp = vsi->base_queue;
3325 vector = vsi->base_vector;
3326 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3327 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3329 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3330 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3331 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3332 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3334 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3335 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3336 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3338 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3339 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3341 /* Linked list for the queuepairs assigned to this vector */
3342 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3343 for (q = 0; q < q_vector->num_ringpairs; q++) {
3346 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3347 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3348 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3349 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3351 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3353 wr32(hw, I40E_QINT_RQCTL(qp), val);
3355 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3356 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3357 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3358 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3360 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3362 /* Terminate the linked list */
3363 if (q == (q_vector->num_ringpairs - 1))
3364 val |= (I40E_QUEUE_END_OF_LIST
3365 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3367 wr32(hw, I40E_QINT_TQCTL(qp), val);
3376 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3377 * @hw: ptr to the hardware info
3379 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3381 struct i40e_hw *hw = &pf->hw;
3384 /* clear things first */
3385 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3386 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3388 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3389 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3390 I40E_PFINT_ICR0_ENA_GRST_MASK |
3391 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3392 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3393 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3394 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3395 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3397 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3398 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3400 if (pf->flags & I40E_FLAG_PTP)
3401 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3403 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3405 /* SW_ITR_IDX = 0, but don't change INTENA */
3406 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3407 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3409 /* OTHER_ITR_IDX = 0 */
3410 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3414 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3415 * @vsi: the VSI being configured
3417 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3419 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3420 struct i40e_pf *pf = vsi->back;
3421 struct i40e_hw *hw = &pf->hw;
3424 /* set the ITR configuration */
3425 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3426 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3427 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3428 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3429 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3430 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3431 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3433 i40e_enable_misc_int_causes(pf);
3435 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3436 wr32(hw, I40E_PFINT_LNKLST0, 0);
3438 /* Associate the queue pair to the vector and enable the queue int */
3439 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3440 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3441 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3443 wr32(hw, I40E_QINT_RQCTL(0), val);
3445 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3446 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3447 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3449 wr32(hw, I40E_QINT_TQCTL(0), val);
3454 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3455 * @pf: board private structure
3457 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3459 struct i40e_hw *hw = &pf->hw;
3461 wr32(hw, I40E_PFINT_DYN_CTL0,
3462 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3467 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3468 * @pf: board private structure
3469 * @clearpba: true when all pending interrupt events should be cleared
3471 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3473 struct i40e_hw *hw = &pf->hw;
3476 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3477 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3478 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3480 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3485 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3486 * @irq: interrupt number
3487 * @data: pointer to a q_vector
3489 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3491 struct i40e_q_vector *q_vector = data;
3493 if (!q_vector->tx.ring && !q_vector->rx.ring)
3496 napi_schedule_irqoff(&q_vector->napi);
3502 * i40e_irq_affinity_notify - Callback for affinity changes
3503 * @notify: context as to what irq was changed
3504 * @mask: the new affinity mask
3506 * This is a callback function used by the irq_set_affinity_notifier function
3507 * so that we may register to receive changes to the irq affinity masks.
3509 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3510 const cpumask_t *mask)
3512 struct i40e_q_vector *q_vector =
3513 container_of(notify, struct i40e_q_vector, affinity_notify);
3515 q_vector->affinity_mask = *mask;
3519 * i40e_irq_affinity_release - Callback for affinity notifier release
3520 * @ref: internal core kernel usage
3522 * This is a callback function used by the irq_set_affinity_notifier function
3523 * to inform the current notification subscriber that they will no longer
3524 * receive notifications.
3526 static void i40e_irq_affinity_release(struct kref *ref) {}
3529 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3530 * @vsi: the VSI being configured
3531 * @basename: name for the vector
3533 * Allocates MSI-X vectors and requests interrupts from the kernel.
3535 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3537 int q_vectors = vsi->num_q_vectors;
3538 struct i40e_pf *pf = vsi->back;
3539 int base = vsi->base_vector;
3545 for (vector = 0; vector < q_vectors; vector++) {
3546 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3548 irq_num = pf->msix_entries[base + vector].vector;
3550 if (q_vector->tx.ring && q_vector->rx.ring) {
3551 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3552 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3554 } else if (q_vector->rx.ring) {
3555 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3556 "%s-%s-%d", basename, "rx", rx_int_idx++);
3557 } else if (q_vector->tx.ring) {
3558 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3559 "%s-%s-%d", basename, "tx", tx_int_idx++);
3561 /* skip this unused q_vector */
3564 err = request_irq(irq_num,
3570 dev_info(&pf->pdev->dev,
3571 "MSIX request_irq failed, error: %d\n", err);
3572 goto free_queue_irqs;
3575 /* register for affinity change notifications */
3576 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3577 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3578 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3579 /* assign the mask for this irq */
3580 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
3583 vsi->irqs_ready = true;
3589 irq_num = pf->msix_entries[base + vector].vector;
3590 irq_set_affinity_notifier(irq_num, NULL);
3591 irq_set_affinity_hint(irq_num, NULL);
3592 free_irq(irq_num, &vsi->q_vectors[vector]);
3598 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3599 * @vsi: the VSI being un-configured
3601 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3603 struct i40e_pf *pf = vsi->back;
3604 struct i40e_hw *hw = &pf->hw;
3605 int base = vsi->base_vector;
3608 for (i = 0; i < vsi->num_queue_pairs; i++) {
3609 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3610 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3613 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3614 for (i = vsi->base_vector;
3615 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3616 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3619 for (i = 0; i < vsi->num_q_vectors; i++)
3620 synchronize_irq(pf->msix_entries[i + base].vector);
3622 /* Legacy and MSI mode - this stops all interrupt handling */
3623 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3624 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3626 synchronize_irq(pf->pdev->irq);
3631 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3632 * @vsi: the VSI being configured
3634 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3636 struct i40e_pf *pf = vsi->back;
3639 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3640 for (i = 0; i < vsi->num_q_vectors; i++)
3641 i40e_irq_dynamic_enable(vsi, i);
3643 i40e_irq_dynamic_enable_icr0(pf, true);
3646 i40e_flush(&pf->hw);
3651 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3652 * @pf: board private structure
3654 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3657 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3658 i40e_flush(&pf->hw);
3662 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3663 * @irq: interrupt number
3664 * @data: pointer to a q_vector
3666 * This is the handler used for all MSI/Legacy interrupts, and deals
3667 * with both queue and non-queue interrupts. This is also used in
3668 * MSIX mode to handle the non-queue interrupts.
3670 static irqreturn_t i40e_intr(int irq, void *data)
3672 struct i40e_pf *pf = (struct i40e_pf *)data;
3673 struct i40e_hw *hw = &pf->hw;
3674 irqreturn_t ret = IRQ_NONE;
3675 u32 icr0, icr0_remaining;
3678 icr0 = rd32(hw, I40E_PFINT_ICR0);
3679 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3681 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3682 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3685 /* if interrupt but no bits showing, must be SWINT */
3686 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3687 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3690 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3691 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3692 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3693 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3694 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3697 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3698 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3699 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3700 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3702 /* We do not have a way to disarm Queue causes while leaving
3703 * interrupt enabled for all other causes, ideally
3704 * interrupt should be disabled while we are in NAPI but
3705 * this is not a performance path and napi_schedule()
3706 * can deal with rescheduling.
3708 if (!test_bit(__I40E_DOWN, &pf->state))
3709 napi_schedule_irqoff(&q_vector->napi);
3712 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3713 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3714 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3715 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3718 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3719 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3720 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3723 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3724 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3725 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3728 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3729 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3730 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3731 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3732 val = rd32(hw, I40E_GLGEN_RSTAT);
3733 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3734 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3735 if (val == I40E_RESET_CORER) {
3737 } else if (val == I40E_RESET_GLOBR) {
3739 } else if (val == I40E_RESET_EMPR) {
3741 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3745 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3746 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3747 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3748 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3749 rd32(hw, I40E_PFHMC_ERRORINFO),
3750 rd32(hw, I40E_PFHMC_ERRORDATA));
3753 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3754 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3756 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3757 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3758 i40e_ptp_tx_hwtstamp(pf);
3762 /* If a critical error is pending we have no choice but to reset the
3764 * Report and mask out any remaining unexpected interrupts.
3766 icr0_remaining = icr0 & ena_mask;
3767 if (icr0_remaining) {
3768 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3770 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3771 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3772 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3773 dev_info(&pf->pdev->dev, "device will be reset\n");
3774 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3775 i40e_service_event_schedule(pf);
3777 ena_mask &= ~icr0_remaining;
3782 /* re-enable interrupt causes */
3783 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3784 if (!test_bit(__I40E_DOWN, &pf->state)) {
3785 i40e_service_event_schedule(pf);
3786 i40e_irq_dynamic_enable_icr0(pf, false);
3793 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3794 * @tx_ring: tx ring to clean
3795 * @budget: how many cleans we're allowed
3797 * Returns true if there's any budget left (e.g. the clean is finished)
3799 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3801 struct i40e_vsi *vsi = tx_ring->vsi;
3802 u16 i = tx_ring->next_to_clean;
3803 struct i40e_tx_buffer *tx_buf;
3804 struct i40e_tx_desc *tx_desc;
3806 tx_buf = &tx_ring->tx_bi[i];
3807 tx_desc = I40E_TX_DESC(tx_ring, i);
3808 i -= tx_ring->count;
3811 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3813 /* if next_to_watch is not set then there is no work pending */
3817 /* prevent any other reads prior to eop_desc */
3818 read_barrier_depends();
3820 /* if the descriptor isn't done, no work yet to do */
3821 if (!(eop_desc->cmd_type_offset_bsz &
3822 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3825 /* clear next_to_watch to prevent false hangs */
3826 tx_buf->next_to_watch = NULL;
3828 tx_desc->buffer_addr = 0;
3829 tx_desc->cmd_type_offset_bsz = 0;
3830 /* move past filter desc */
3835 i -= tx_ring->count;
3836 tx_buf = tx_ring->tx_bi;
3837 tx_desc = I40E_TX_DESC(tx_ring, 0);
3839 /* unmap skb header data */
3840 dma_unmap_single(tx_ring->dev,
3841 dma_unmap_addr(tx_buf, dma),
3842 dma_unmap_len(tx_buf, len),
3844 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3845 kfree(tx_buf->raw_buf);
3847 tx_buf->raw_buf = NULL;
3848 tx_buf->tx_flags = 0;
3849 tx_buf->next_to_watch = NULL;
3850 dma_unmap_len_set(tx_buf, len, 0);
3851 tx_desc->buffer_addr = 0;
3852 tx_desc->cmd_type_offset_bsz = 0;
3854 /* move us past the eop_desc for start of next FD desc */
3859 i -= tx_ring->count;
3860 tx_buf = tx_ring->tx_bi;
3861 tx_desc = I40E_TX_DESC(tx_ring, 0);
3864 /* update budget accounting */
3866 } while (likely(budget));
3868 i += tx_ring->count;
3869 tx_ring->next_to_clean = i;
3871 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3872 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3878 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3879 * @irq: interrupt number
3880 * @data: pointer to a q_vector
3882 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3884 struct i40e_q_vector *q_vector = data;
3885 struct i40e_vsi *vsi;
3887 if (!q_vector->tx.ring)
3890 vsi = q_vector->tx.ring->vsi;
3891 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3897 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3898 * @vsi: the VSI being configured
3899 * @v_idx: vector index
3900 * @qp_idx: queue pair index
3902 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3904 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3905 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3906 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3908 tx_ring->q_vector = q_vector;
3909 tx_ring->next = q_vector->tx.ring;
3910 q_vector->tx.ring = tx_ring;
3911 q_vector->tx.count++;
3913 rx_ring->q_vector = q_vector;
3914 rx_ring->next = q_vector->rx.ring;
3915 q_vector->rx.ring = rx_ring;
3916 q_vector->rx.count++;
3920 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3921 * @vsi: the VSI being configured
3923 * This function maps descriptor rings to the queue-specific vectors
3924 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3925 * one vector per queue pair, but on a constrained vector budget, we
3926 * group the queue pairs as "efficiently" as possible.
3928 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3930 int qp_remaining = vsi->num_queue_pairs;
3931 int q_vectors = vsi->num_q_vectors;
3936 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3937 * group them so there are multiple queues per vector.
3938 * It is also important to go through all the vectors available to be
3939 * sure that if we don't use all the vectors, that the remaining vectors
3940 * are cleared. This is especially important when decreasing the
3941 * number of queues in use.
3943 for (; v_start < q_vectors; v_start++) {
3944 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3946 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3948 q_vector->num_ringpairs = num_ringpairs;
3950 q_vector->rx.count = 0;
3951 q_vector->tx.count = 0;
3952 q_vector->rx.ring = NULL;
3953 q_vector->tx.ring = NULL;
3955 while (num_ringpairs--) {
3956 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3964 * i40e_vsi_request_irq - Request IRQ from the OS
3965 * @vsi: the VSI being configured
3966 * @basename: name for the vector
3968 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3970 struct i40e_pf *pf = vsi->back;
3973 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3974 err = i40e_vsi_request_irq_msix(vsi, basename);
3975 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3976 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3979 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3983 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3988 #ifdef CONFIG_NET_POLL_CONTROLLER
3990 * i40e_netpoll - A Polling 'interrupt' handler
3991 * @netdev: network interface device structure
3993 * This is used by netconsole to send skbs without having to re-enable
3994 * interrupts. It's not called while the normal interrupt routine is executing.
3997 void i40e_netpoll(struct net_device *netdev)
3999 static void i40e_netpoll(struct net_device *netdev)
4002 struct i40e_netdev_priv *np = netdev_priv(netdev);
4003 struct i40e_vsi *vsi = np->vsi;
4004 struct i40e_pf *pf = vsi->back;
4007 /* if interface is down do nothing */
4008 if (test_bit(__I40E_DOWN, &vsi->state))
4011 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4012 for (i = 0; i < vsi->num_q_vectors; i++)
4013 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4015 i40e_intr(pf->pdev->irq, netdev);
4021 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4022 * @pf: the PF being configured
4023 * @pf_q: the PF queue
4024 * @enable: enable or disable state of the queue
4026 * This routine will wait for the given Tx queue of the PF to reach the
4027 * enabled or disabled state.
4028 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4029 * multiple retries; else will return 0 in case of success.
4031 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4036 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4037 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4038 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4041 usleep_range(10, 20);
4043 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4050 * i40e_vsi_control_tx - Start or stop a VSI's rings
4051 * @vsi: the VSI being configured
4052 * @enable: start or stop the rings
4054 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4056 struct i40e_pf *pf = vsi->back;
4057 struct i40e_hw *hw = &pf->hw;
4058 int i, j, pf_q, ret = 0;
4061 pf_q = vsi->base_queue;
4062 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4064 /* warn the TX unit of coming changes */
4065 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4067 usleep_range(10, 20);
4069 for (j = 0; j < 50; j++) {
4070 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4071 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4072 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4074 usleep_range(1000, 2000);
4076 /* Skip if the queue is already in the requested state */
4077 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4080 /* turn on/off the queue */
4082 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4083 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4085 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4088 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4089 /* No waiting for the Tx queue to disable */
4090 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4093 /* wait for the change to finish */
4094 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4096 dev_info(&pf->pdev->dev,
4097 "VSI seid %d Tx ring %d %sable timeout\n",
4098 vsi->seid, pf_q, (enable ? "en" : "dis"));
4103 if (hw->revision_id == 0)
4109 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4110 * @pf: the PF being configured
4111 * @pf_q: the PF queue
4112 * @enable: enable or disable state of the queue
4114 * This routine will wait for the given Rx queue of the PF to reach the
4115 * enabled or disabled state.
4116 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4117 * multiple retries; else will return 0 in case of success.
4119 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4124 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4125 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4126 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4129 usleep_range(10, 20);
4131 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4138 * i40e_vsi_control_rx - Start or stop a VSI's rings
4139 * @vsi: the VSI being configured
4140 * @enable: start or stop the rings
4142 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4144 struct i40e_pf *pf = vsi->back;
4145 struct i40e_hw *hw = &pf->hw;
4146 int i, j, pf_q, ret = 0;
4149 pf_q = vsi->base_queue;
4150 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4151 for (j = 0; j < 50; j++) {
4152 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4153 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4154 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4156 usleep_range(1000, 2000);
4159 /* Skip if the queue is already in the requested state */
4160 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4163 /* turn on/off the queue */
4165 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4167 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4168 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4169 /* No waiting for the Tx queue to disable */
4170 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4173 /* wait for the change to finish */
4174 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4176 dev_info(&pf->pdev->dev,
4177 "VSI seid %d Rx ring %d %sable timeout\n",
4178 vsi->seid, pf_q, (enable ? "en" : "dis"));
4187 * i40e_vsi_start_rings - Start a VSI's rings
4188 * @vsi: the VSI being configured
4190 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4194 /* do rx first for enable and last for disable */
4195 ret = i40e_vsi_control_rx(vsi, true);
4198 ret = i40e_vsi_control_tx(vsi, true);
4204 * i40e_vsi_stop_rings - Stop a VSI's rings
4205 * @vsi: the VSI being configured
4207 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4209 /* do rx first for enable and last for disable
4210 * Ignore return value, we need to shutdown whatever we can
4212 i40e_vsi_control_tx(vsi, false);
4213 i40e_vsi_control_rx(vsi, false);
4217 * i40e_vsi_free_irq - Free the irq association with the OS
4218 * @vsi: the VSI being configured
4220 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4222 struct i40e_pf *pf = vsi->back;
4223 struct i40e_hw *hw = &pf->hw;
4224 int base = vsi->base_vector;
4228 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4229 if (!vsi->q_vectors)
4232 if (!vsi->irqs_ready)
4235 vsi->irqs_ready = false;
4236 for (i = 0; i < vsi->num_q_vectors; i++) {
4241 irq_num = pf->msix_entries[vector].vector;
4243 /* free only the irqs that were actually requested */
4244 if (!vsi->q_vectors[i] ||
4245 !vsi->q_vectors[i]->num_ringpairs)
4248 /* clear the affinity notifier in the IRQ descriptor */
4249 irq_set_affinity_notifier(irq_num, NULL);
4250 /* clear the affinity_mask in the IRQ descriptor */
4251 irq_set_affinity_hint(irq_num, NULL);
4252 synchronize_irq(irq_num);
4253 free_irq(irq_num, vsi->q_vectors[i]);
4255 /* Tear down the interrupt queue link list
4257 * We know that they come in pairs and always
4258 * the Rx first, then the Tx. To clear the
4259 * link list, stick the EOL value into the
4260 * next_q field of the registers.
4262 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4263 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4264 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4265 val |= I40E_QUEUE_END_OF_LIST
4266 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4267 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4269 while (qp != I40E_QUEUE_END_OF_LIST) {
4272 val = rd32(hw, I40E_QINT_RQCTL(qp));
4274 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4275 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4276 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4277 I40E_QINT_RQCTL_INTEVENT_MASK);
4279 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4280 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4282 wr32(hw, I40E_QINT_RQCTL(qp), val);
4284 val = rd32(hw, I40E_QINT_TQCTL(qp));
4286 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4287 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4289 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4290 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4291 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4292 I40E_QINT_TQCTL_INTEVENT_MASK);
4294 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4295 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4297 wr32(hw, I40E_QINT_TQCTL(qp), val);
4302 free_irq(pf->pdev->irq, pf);
4304 val = rd32(hw, I40E_PFINT_LNKLST0);
4305 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4306 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4307 val |= I40E_QUEUE_END_OF_LIST
4308 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4309 wr32(hw, I40E_PFINT_LNKLST0, val);
4311 val = rd32(hw, I40E_QINT_RQCTL(qp));
4312 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4313 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4314 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4315 I40E_QINT_RQCTL_INTEVENT_MASK);
4317 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4318 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4320 wr32(hw, I40E_QINT_RQCTL(qp), val);
4322 val = rd32(hw, I40E_QINT_TQCTL(qp));
4324 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4325 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4326 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4327 I40E_QINT_TQCTL_INTEVENT_MASK);
4329 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4330 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4332 wr32(hw, I40E_QINT_TQCTL(qp), val);
4337 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4338 * @vsi: the VSI being configured
4339 * @v_idx: Index of vector to be freed
4341 * This function frees the memory allocated to the q_vector. In addition if
4342 * NAPI is enabled it will delete any references to the NAPI struct prior
4343 * to freeing the q_vector.
4345 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4347 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4348 struct i40e_ring *ring;
4353 /* disassociate q_vector from rings */
4354 i40e_for_each_ring(ring, q_vector->tx)
4355 ring->q_vector = NULL;
4357 i40e_for_each_ring(ring, q_vector->rx)
4358 ring->q_vector = NULL;
4360 /* only VSI w/ an associated netdev is set up w/ NAPI */
4362 netif_napi_del(&q_vector->napi);
4364 vsi->q_vectors[v_idx] = NULL;
4366 kfree_rcu(q_vector, rcu);
4370 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4371 * @vsi: the VSI being un-configured
4373 * This frees the memory allocated to the q_vectors and
4374 * deletes references to the NAPI struct.
4376 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4380 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4381 i40e_free_q_vector(vsi, v_idx);
4385 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4386 * @pf: board private structure
4388 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4390 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4391 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4392 pci_disable_msix(pf->pdev);
4393 kfree(pf->msix_entries);
4394 pf->msix_entries = NULL;
4395 kfree(pf->irq_pile);
4396 pf->irq_pile = NULL;
4397 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4398 pci_disable_msi(pf->pdev);
4400 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4404 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4405 * @pf: board private structure
4407 * We go through and clear interrupt specific resources and reset the structure
4408 * to pre-load conditions
4410 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4414 i40e_stop_misc_vector(pf);
4415 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4416 synchronize_irq(pf->msix_entries[0].vector);
4417 free_irq(pf->msix_entries[0].vector, pf);
4420 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4421 I40E_IWARP_IRQ_PILE_ID);
4423 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4424 for (i = 0; i < pf->num_alloc_vsi; i++)
4426 i40e_vsi_free_q_vectors(pf->vsi[i]);
4427 i40e_reset_interrupt_capability(pf);
4431 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4432 * @vsi: the VSI being configured
4434 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4441 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4442 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4444 if (q_vector->rx.ring || q_vector->tx.ring)
4445 napi_enable(&q_vector->napi);
4450 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4451 * @vsi: the VSI being configured
4453 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4460 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4461 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4463 if (q_vector->rx.ring || q_vector->tx.ring)
4464 napi_disable(&q_vector->napi);
4469 * i40e_vsi_close - Shut down a VSI
4470 * @vsi: the vsi to be quelled
4472 static void i40e_vsi_close(struct i40e_vsi *vsi)
4476 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4478 i40e_vsi_free_irq(vsi);
4479 i40e_vsi_free_tx_resources(vsi);
4480 i40e_vsi_free_rx_resources(vsi);
4481 vsi->current_netdev_flags = 0;
4482 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4484 i40e_notify_client_of_netdev_close(vsi, reset);
4488 * i40e_quiesce_vsi - Pause a given VSI
4489 * @vsi: the VSI being paused
4491 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4493 if (test_bit(__I40E_DOWN, &vsi->state))
4496 /* No need to disable FCoE VSI when Tx suspended */
4497 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4498 vsi->type == I40E_VSI_FCOE) {
4499 dev_dbg(&vsi->back->pdev->dev,
4500 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4504 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4505 if (vsi->netdev && netif_running(vsi->netdev))
4506 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4508 i40e_vsi_close(vsi);
4512 * i40e_unquiesce_vsi - Resume a given VSI
4513 * @vsi: the VSI being resumed
4515 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4517 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4520 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4521 if (vsi->netdev && netif_running(vsi->netdev))
4522 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4524 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4528 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4531 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4535 for (v = 0; v < pf->num_alloc_vsi; v++) {
4537 i40e_quiesce_vsi(pf->vsi[v]);
4542 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4545 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4549 for (v = 0; v < pf->num_alloc_vsi; v++) {
4551 i40e_unquiesce_vsi(pf->vsi[v]);
4555 #ifdef CONFIG_I40E_DCB
4557 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4558 * @vsi: the VSI being configured
4560 * This function waits for the given VSI's queues to be disabled.
4562 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4564 struct i40e_pf *pf = vsi->back;
4567 pf_q = vsi->base_queue;
4568 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4569 /* Check and wait for the disable status of the queue */
4570 ret = i40e_pf_txq_wait(pf, pf_q, false);
4572 dev_info(&pf->pdev->dev,
4573 "VSI seid %d Tx ring %d disable timeout\n",
4579 pf_q = vsi->base_queue;
4580 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4581 /* Check and wait for the disable status of the queue */
4582 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4584 dev_info(&pf->pdev->dev,
4585 "VSI seid %d Rx ring %d disable timeout\n",
4595 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4598 * This function waits for the queues to be in disabled state for all the
4599 * VSIs that are managed by this PF.
4601 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4605 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4606 /* No need to wait for FCoE VSI queues */
4607 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4608 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4620 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4621 * @q_idx: TX queue number
4622 * @vsi: Pointer to VSI struct
4624 * This function checks specified queue for given VSI. Detects hung condition.
4625 * Sets hung bit since it is two step process. Before next run of service task
4626 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4627 * hung condition remain unchanged and during subsequent run, this function
4628 * issues SW interrupt to recover from hung condition.
4630 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4632 struct i40e_ring *tx_ring = NULL;
4634 u32 head, val, tx_pending_hw;
4639 /* now that we have an index, find the tx_ring struct */
4640 for (i = 0; i < vsi->num_queue_pairs; i++) {
4641 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4642 if (q_idx == vsi->tx_rings[i]->queue_index) {
4643 tx_ring = vsi->tx_rings[i];
4652 /* Read interrupt register */
4653 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4655 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4656 tx_ring->vsi->base_vector - 1));
4658 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4660 head = i40e_get_head(tx_ring);
4662 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4664 /* HW is done executing descriptors, updated HEAD write back,
4665 * but SW hasn't processed those descriptors. If interrupt is
4666 * not generated from this point ON, it could result into
4667 * dev_watchdog detecting timeout on those netdev_queue,
4668 * hence proactively trigger SW interrupt.
4670 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4671 /* NAPI Poll didn't run and clear since it was set */
4672 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4673 &tx_ring->q_vector->hung_detected)) {
4674 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4675 vsi->seid, q_idx, tx_pending_hw,
4676 tx_ring->next_to_clean, head,
4677 tx_ring->next_to_use,
4678 readl(tx_ring->tail));
4679 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4680 vsi->seid, q_idx, val);
4681 i40e_force_wb(vsi, tx_ring->q_vector);
4683 /* First Chance - detected possible hung */
4684 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4685 &tx_ring->q_vector->hung_detected);
4689 /* This is the case where we have interrupts missing,
4690 * so the tx_pending in HW will most likely be 0, but we
4691 * will have tx_pending in SW since the WB happened but the
4692 * interrupt got lost.
4694 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4695 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4697 if (napi_reschedule(&tx_ring->q_vector->napi))
4698 tx_ring->tx_stats.tx_lost_interrupt++;
4704 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4705 * @pf: pointer to PF struct
4707 * LAN VSI has netdev and netdev has TX queues. This function is to check
4708 * each of those TX queues if they are hung, trigger recovery by issuing
4711 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4713 struct net_device *netdev;
4714 struct i40e_vsi *vsi;
4717 /* Only for LAN VSI */
4718 vsi = pf->vsi[pf->lan_vsi];
4723 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4724 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4725 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4728 /* Make sure type is MAIN VSI */
4729 if (vsi->type != I40E_VSI_MAIN)
4732 netdev = vsi->netdev;
4736 /* Bail out if netif_carrier is not OK */
4737 if (!netif_carrier_ok(netdev))
4740 /* Go thru' TX queues for netdev */
4741 for (i = 0; i < netdev->num_tx_queues; i++) {
4742 struct netdev_queue *q;
4744 q = netdev_get_tx_queue(netdev, i);
4746 i40e_detect_recover_hung_queue(i, vsi);
4751 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4752 * @pf: pointer to PF
4754 * Get TC map for ISCSI PF type that will include iSCSI TC
4757 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4759 struct i40e_dcb_app_priority_table app;
4760 struct i40e_hw *hw = &pf->hw;
4761 u8 enabled_tc = 1; /* TC0 is always enabled */
4763 /* Get the iSCSI APP TLV */
4764 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4766 for (i = 0; i < dcbcfg->numapps; i++) {
4767 app = dcbcfg->app[i];
4768 if (app.selector == I40E_APP_SEL_TCPIP &&
4769 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4770 tc = dcbcfg->etscfg.prioritytable[app.priority];
4771 enabled_tc |= BIT(tc);
4780 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4781 * @dcbcfg: the corresponding DCBx configuration structure
4783 * Return the number of TCs from given DCBx configuration
4785 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4787 int i, tc_unused = 0;
4791 /* Scan the ETS Config Priority Table to find
4792 * traffic class enabled for a given priority
4793 * and create a bitmask of enabled TCs
4795 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4796 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4798 /* Now scan the bitmask to check for
4799 * contiguous TCs starting with TC0
4801 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4802 if (num_tc & BIT(i)) {
4806 pr_err("Non-contiguous TC - Disabling DCB\n");
4814 /* There is always at least TC0 */
4822 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4823 * @dcbcfg: the corresponding DCBx configuration structure
4825 * Query the current DCB configuration and return the number of
4826 * traffic classes enabled from the given DCBX config
4828 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4830 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4834 for (i = 0; i < num_tc; i++)
4835 enabled_tc |= BIT(i);
4841 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4842 * @pf: PF being queried
4844 * Return number of traffic classes enabled for the given PF
4846 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4848 struct i40e_hw *hw = &pf->hw;
4849 u8 i, enabled_tc = 1;
4851 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4853 /* If DCB is not enabled then always in single TC */
4854 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4857 /* SFP mode will be enabled for all TCs on port */
4858 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4859 return i40e_dcb_get_num_tc(dcbcfg);
4861 /* MFP mode return count of enabled TCs for this PF */
4862 if (pf->hw.func_caps.iscsi)
4863 enabled_tc = i40e_get_iscsi_tc_map(pf);
4865 return 1; /* Only TC0 */
4867 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4868 if (enabled_tc & BIT(i))
4875 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4876 * @pf: PF being queried
4878 * Return a bitmap for enabled traffic classes for this PF.
4880 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4882 /* If DCB is not enabled for this PF then just return default TC */
4883 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4884 return I40E_DEFAULT_TRAFFIC_CLASS;
4886 /* SFP mode we want PF to be enabled for all TCs */
4887 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4888 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4890 /* MFP enabled and iSCSI PF type */
4891 if (pf->hw.func_caps.iscsi)
4892 return i40e_get_iscsi_tc_map(pf);
4894 return I40E_DEFAULT_TRAFFIC_CLASS;
4898 * i40e_vsi_get_bw_info - Query VSI BW Information
4899 * @vsi: the VSI being queried
4901 * Returns 0 on success, negative value on failure
4903 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4905 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4906 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4907 struct i40e_pf *pf = vsi->back;
4908 struct i40e_hw *hw = &pf->hw;
4913 /* Get the VSI level BW configuration */
4914 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4916 dev_info(&pf->pdev->dev,
4917 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4918 i40e_stat_str(&pf->hw, ret),
4919 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4923 /* Get the VSI level BW configuration per TC */
4924 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4927 dev_info(&pf->pdev->dev,
4928 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4929 i40e_stat_str(&pf->hw, ret),
4930 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4934 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4935 dev_info(&pf->pdev->dev,
4936 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4937 bw_config.tc_valid_bits,
4938 bw_ets_config.tc_valid_bits);
4939 /* Still continuing */
4942 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4943 vsi->bw_max_quanta = bw_config.max_bw;
4944 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4945 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4946 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4947 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4948 vsi->bw_ets_limit_credits[i] =
4949 le16_to_cpu(bw_ets_config.credits[i]);
4950 /* 3 bits out of 4 for each TC */
4951 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4958 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4959 * @vsi: the VSI being configured
4960 * @enabled_tc: TC bitmap
4961 * @bw_credits: BW shared credits per TC
4963 * Returns 0 on success, negative value on failure
4965 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4968 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4972 bw_data.tc_valid_bits = enabled_tc;
4973 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4974 bw_data.tc_bw_credits[i] = bw_share[i];
4976 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4979 dev_info(&vsi->back->pdev->dev,
4980 "AQ command Config VSI BW allocation per TC failed = %d\n",
4981 vsi->back->hw.aq.asq_last_status);
4985 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4986 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4992 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4993 * @vsi: the VSI being configured
4994 * @enabled_tc: TC map to be enabled
4997 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4999 struct net_device *netdev = vsi->netdev;
5000 struct i40e_pf *pf = vsi->back;
5001 struct i40e_hw *hw = &pf->hw;
5004 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5010 netdev_reset_tc(netdev);
5014 /* Set up actual enabled TCs on the VSI */
5015 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5018 /* set per TC queues for the VSI */
5019 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5020 /* Only set TC queues for enabled tcs
5022 * e.g. For a VSI that has TC0 and TC3 enabled the
5023 * enabled_tc bitmap would be 0x00001001; the driver
5024 * will set the numtc for netdev as 2 that will be
5025 * referenced by the netdev layer as TC 0 and 1.
5027 if (vsi->tc_config.enabled_tc & BIT(i))
5028 netdev_set_tc_queue(netdev,
5029 vsi->tc_config.tc_info[i].netdev_tc,
5030 vsi->tc_config.tc_info[i].qcount,
5031 vsi->tc_config.tc_info[i].qoffset);
5034 /* Assign UP2TC map for the VSI */
5035 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5036 /* Get the actual TC# for the UP */
5037 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5038 /* Get the mapped netdev TC# for the UP */
5039 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5040 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5045 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5046 * @vsi: the VSI being configured
5047 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5049 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5050 struct i40e_vsi_context *ctxt)
5052 /* copy just the sections touched not the entire info
5053 * since not all sections are valid as returned by
5056 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5057 memcpy(&vsi->info.queue_mapping,
5058 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5059 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5060 sizeof(vsi->info.tc_mapping));
5064 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5065 * @vsi: VSI to be configured
5066 * @enabled_tc: TC bitmap
5068 * This configures a particular VSI for TCs that are mapped to the
5069 * given TC bitmap. It uses default bandwidth share for TCs across
5070 * VSIs to configure TC for a particular VSI.
5073 * It is expected that the VSI queues have been quisced before calling
5076 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5078 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5079 struct i40e_vsi_context ctxt;
5083 /* Check if enabled_tc is same as existing or new TCs */
5084 if (vsi->tc_config.enabled_tc == enabled_tc)
5087 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5088 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5089 if (enabled_tc & BIT(i))
5093 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5095 dev_info(&vsi->back->pdev->dev,
5096 "Failed configuring TC map %d for VSI %d\n",
5097 enabled_tc, vsi->seid);
5101 /* Update Queue Pairs Mapping for currently enabled UPs */
5102 ctxt.seid = vsi->seid;
5103 ctxt.pf_num = vsi->back->hw.pf_id;
5105 ctxt.uplink_seid = vsi->uplink_seid;
5106 ctxt.info = vsi->info;
5107 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5109 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5110 ctxt.info.valid_sections |=
5111 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5112 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5115 /* Update the VSI after updating the VSI queue-mapping information */
5116 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
5118 dev_info(&vsi->back->pdev->dev,
5119 "Update vsi tc config failed, err %s aq_err %s\n",
5120 i40e_stat_str(&vsi->back->hw, ret),
5121 i40e_aq_str(&vsi->back->hw,
5122 vsi->back->hw.aq.asq_last_status));
5125 /* update the local VSI info with updated queue map */
5126 i40e_vsi_update_queue_map(vsi, &ctxt);
5127 vsi->info.valid_sections = 0;
5129 /* Update current VSI BW information */
5130 ret = i40e_vsi_get_bw_info(vsi);
5132 dev_info(&vsi->back->pdev->dev,
5133 "Failed updating vsi bw info, err %s aq_err %s\n",
5134 i40e_stat_str(&vsi->back->hw, ret),
5135 i40e_aq_str(&vsi->back->hw,
5136 vsi->back->hw.aq.asq_last_status));
5140 /* Update the netdev TC setup */
5141 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5147 * i40e_veb_config_tc - Configure TCs for given VEB
5149 * @enabled_tc: TC bitmap
5151 * Configures given TC bitmap for VEB (switching) element
5153 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
5155 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
5156 struct i40e_pf *pf = veb->pf;
5160 /* No TCs or already enabled TCs just return */
5161 if (!enabled_tc || veb->enabled_tc == enabled_tc)
5164 bw_data.tc_valid_bits = enabled_tc;
5165 /* bw_data.absolute_credits is not set (relative) */
5167 /* Enable ETS TCs with equal BW Share for now */
5168 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5169 if (enabled_tc & BIT(i))
5170 bw_data.tc_bw_share_credits[i] = 1;
5173 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
5176 dev_info(&pf->pdev->dev,
5177 "VEB bw config failed, err %s aq_err %s\n",
5178 i40e_stat_str(&pf->hw, ret),
5179 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5183 /* Update the BW information */
5184 ret = i40e_veb_get_bw_info(veb);
5186 dev_info(&pf->pdev->dev,
5187 "Failed getting veb bw config, err %s aq_err %s\n",
5188 i40e_stat_str(&pf->hw, ret),
5189 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5196 #ifdef CONFIG_I40E_DCB
5198 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
5201 * Reconfigure VEB/VSIs on a given PF; it is assumed that
5202 * the caller would've quiesce all the VSIs before calling
5205 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5211 /* Enable the TCs available on PF to all VEBs */
5212 tc_map = i40e_pf_get_tc_map(pf);
5213 for (v = 0; v < I40E_MAX_VEB; v++) {
5216 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5218 dev_info(&pf->pdev->dev,
5219 "Failed configuring TC for VEB seid=%d\n",
5221 /* Will try to configure as many components */
5225 /* Update each VSI */
5226 for (v = 0; v < pf->num_alloc_vsi; v++) {
5230 /* - Enable all TCs for the LAN VSI
5232 * - For FCoE VSI only enable the TC configured
5233 * as per the APP TLV
5235 * - For all others keep them at TC0 for now
5237 if (v == pf->lan_vsi)
5238 tc_map = i40e_pf_get_tc_map(pf);
5240 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5242 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5243 tc_map = i40e_get_fcoe_tc_map(pf);
5244 #endif /* #ifdef I40E_FCOE */
5246 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5248 dev_info(&pf->pdev->dev,
5249 "Failed configuring TC for VSI seid=%d\n",
5251 /* Will try to configure as many components */
5253 /* Re-configure VSI vectors based on updated TC map */
5254 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5255 if (pf->vsi[v]->netdev)
5256 i40e_dcbnl_set_all(pf->vsi[v]);
5262 * i40e_resume_port_tx - Resume port Tx
5265 * Resume a port's Tx and issue a PF reset in case of failure to
5268 static int i40e_resume_port_tx(struct i40e_pf *pf)
5270 struct i40e_hw *hw = &pf->hw;
5273 ret = i40e_aq_resume_port_tx(hw, NULL);
5275 dev_info(&pf->pdev->dev,
5276 "Resume Port Tx failed, err %s aq_err %s\n",
5277 i40e_stat_str(&pf->hw, ret),
5278 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5279 /* Schedule PF reset to recover */
5280 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5281 i40e_service_event_schedule(pf);
5288 * i40e_init_pf_dcb - Initialize DCB configuration
5289 * @pf: PF being configured
5291 * Query the current DCB configuration and cache it
5292 * in the hardware structure
5294 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5296 struct i40e_hw *hw = &pf->hw;
5299 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5300 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5303 /* Get the initial DCB configuration */
5304 err = i40e_init_dcb(hw);
5306 /* Device/Function is not DCBX capable */
5307 if ((!hw->func_caps.dcb) ||
5308 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5309 dev_info(&pf->pdev->dev,
5310 "DCBX offload is not supported or is disabled for this PF.\n");
5312 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5316 /* When status is not DISABLED then DCBX in FW */
5317 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5318 DCB_CAP_DCBX_VER_IEEE;
5320 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5321 /* Enable DCB tagging only when more than one TC
5322 * or explicitly disable if only one TC
5324 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5325 pf->flags |= I40E_FLAG_DCB_ENABLED;
5327 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5328 dev_dbg(&pf->pdev->dev,
5329 "DCBX offload is supported for this PF.\n");
5332 dev_info(&pf->pdev->dev,
5333 "Query for DCB configuration failed, err %s aq_err %s\n",
5334 i40e_stat_str(&pf->hw, err),
5335 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5341 #endif /* CONFIG_I40E_DCB */
5342 #define SPEED_SIZE 14
5345 * i40e_print_link_message - print link up or down
5346 * @vsi: the VSI for which link needs a message
5348 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5350 enum i40e_aq_link_speed new_speed;
5351 char *speed = "Unknown";
5352 char *fc = "Unknown";
5356 new_speed = vsi->back->hw.phy.link_info.link_speed;
5358 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
5360 vsi->current_isup = isup;
5361 vsi->current_speed = new_speed;
5363 netdev_info(vsi->netdev, "NIC Link is Down\n");
5367 /* Warn user if link speed on NPAR enabled partition is not at
5370 if (vsi->back->hw.func_caps.npar_enable &&
5371 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5372 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5373 netdev_warn(vsi->netdev,
5374 "The partition detected link speed that is less than 10Gbps\n");
5376 switch (vsi->back->hw.phy.link_info.link_speed) {
5377 case I40E_LINK_SPEED_40GB:
5380 case I40E_LINK_SPEED_20GB:
5383 case I40E_LINK_SPEED_25GB:
5386 case I40E_LINK_SPEED_10GB:
5389 case I40E_LINK_SPEED_1GB:
5392 case I40E_LINK_SPEED_100MB:
5399 switch (vsi->back->hw.fc.current_mode) {
5403 case I40E_FC_TX_PAUSE:
5406 case I40E_FC_RX_PAUSE:
5414 if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
5415 fec = ", FEC: None";
5416 an = ", Autoneg: False";
5418 if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
5419 an = ", Autoneg: True";
5421 if (vsi->back->hw.phy.link_info.fec_info &
5422 I40E_AQ_CONFIG_FEC_KR_ENA)
5423 fec = ", FEC: CL74 FC-FEC/BASE-R";
5424 else if (vsi->back->hw.phy.link_info.fec_info &
5425 I40E_AQ_CONFIG_FEC_RS_ENA)
5426 fec = ", FEC: CL108 RS-FEC";
5429 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n",
5430 speed, fec, an, fc);
5434 * i40e_up_complete - Finish the last steps of bringing up a connection
5435 * @vsi: the VSI being configured
5437 static int i40e_up_complete(struct i40e_vsi *vsi)
5439 struct i40e_pf *pf = vsi->back;
5442 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5443 i40e_vsi_configure_msix(vsi);
5445 i40e_configure_msi_and_legacy(vsi);
5448 err = i40e_vsi_start_rings(vsi);
5452 clear_bit(__I40E_DOWN, &vsi->state);
5453 i40e_napi_enable_all(vsi);
5454 i40e_vsi_enable_irq(vsi);
5456 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5458 i40e_print_link_message(vsi, true);
5459 netif_tx_start_all_queues(vsi->netdev);
5460 netif_carrier_on(vsi->netdev);
5461 } else if (vsi->netdev) {
5462 i40e_print_link_message(vsi, false);
5463 /* need to check for qualified module here*/
5464 if ((pf->hw.phy.link_info.link_info &
5465 I40E_AQ_MEDIA_AVAILABLE) &&
5466 (!(pf->hw.phy.link_info.an_info &
5467 I40E_AQ_QUALIFIED_MODULE)))
5468 netdev_err(vsi->netdev,
5469 "the driver failed to link because an unqualified module was detected.");
5472 /* replay FDIR SB filters */
5473 if (vsi->type == I40E_VSI_FDIR) {
5474 /* reset fd counters */
5475 pf->fd_add_err = pf->fd_atr_cnt = 0;
5476 if (pf->fd_tcp_rule > 0) {
5477 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5478 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5479 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5480 pf->fd_tcp_rule = 0;
5482 i40e_fdir_filter_restore(vsi);
5485 /* On the next run of the service_task, notify any clients of the new
5488 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5489 i40e_service_event_schedule(pf);
5495 * i40e_vsi_reinit_locked - Reset the VSI
5496 * @vsi: the VSI being configured
5498 * Rebuild the ring structs after some configuration
5499 * has changed, e.g. MTU size.
5501 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5503 struct i40e_pf *pf = vsi->back;
5505 WARN_ON(in_interrupt());
5506 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5507 usleep_range(1000, 2000);
5511 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5515 * i40e_up - Bring the connection back up after being down
5516 * @vsi: the VSI being configured
5518 int i40e_up(struct i40e_vsi *vsi)
5522 err = i40e_vsi_configure(vsi);
5524 err = i40e_up_complete(vsi);
5530 * i40e_down - Shutdown the connection processing
5531 * @vsi: the VSI being stopped
5533 void i40e_down(struct i40e_vsi *vsi)
5537 /* It is assumed that the caller of this function
5538 * sets the vsi->state __I40E_DOWN bit.
5541 netif_carrier_off(vsi->netdev);
5542 netif_tx_disable(vsi->netdev);
5544 i40e_vsi_disable_irq(vsi);
5545 i40e_vsi_stop_rings(vsi);
5546 i40e_napi_disable_all(vsi);
5548 for (i = 0; i < vsi->num_queue_pairs; i++) {
5549 i40e_clean_tx_ring(vsi->tx_rings[i]);
5550 i40e_clean_rx_ring(vsi->rx_rings[i]);
5553 i40e_notify_client_of_netdev_close(vsi, false);
5558 * i40e_setup_tc - configure multiple traffic classes
5559 * @netdev: net device to configure
5560 * @tc: number of traffic classes to enable
5562 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5564 struct i40e_netdev_priv *np = netdev_priv(netdev);
5565 struct i40e_vsi *vsi = np->vsi;
5566 struct i40e_pf *pf = vsi->back;
5571 /* Check if DCB enabled to continue */
5572 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5573 netdev_info(netdev, "DCB is not enabled for adapter\n");
5577 /* Check if MFP enabled */
5578 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5579 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5583 /* Check whether tc count is within enabled limit */
5584 if (tc > i40e_pf_get_num_tc(pf)) {
5585 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5589 /* Generate TC map for number of tc requested */
5590 for (i = 0; i < tc; i++)
5591 enabled_tc |= BIT(i);
5593 /* Requesting same TC configuration as already enabled */
5594 if (enabled_tc == vsi->tc_config.enabled_tc)
5597 /* Quiesce VSI queues */
5598 i40e_quiesce_vsi(vsi);
5600 /* Configure VSI for enabled TCs */
5601 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5603 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5609 i40e_unquiesce_vsi(vsi);
5616 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5617 struct tc_to_netdev *tc)
5619 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5620 struct tc_to_netdev *tc)
5623 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5625 return i40e_setup_tc(netdev, tc->tc);
5629 * i40e_open - Called when a network interface is made active
5630 * @netdev: network interface device structure
5632 * The open entry point is called when a network interface is made
5633 * active by the system (IFF_UP). At this point all resources needed
5634 * for transmit and receive operations are allocated, the interrupt
5635 * handler is registered with the OS, the netdev watchdog subtask is
5636 * enabled, and the stack is notified that the interface is ready.
5638 * Returns 0 on success, negative value on failure
5640 int i40e_open(struct net_device *netdev)
5642 struct i40e_netdev_priv *np = netdev_priv(netdev);
5643 struct i40e_vsi *vsi = np->vsi;
5644 struct i40e_pf *pf = vsi->back;
5647 /* disallow open during test or if eeprom is broken */
5648 if (test_bit(__I40E_TESTING, &pf->state) ||
5649 test_bit(__I40E_BAD_EEPROM, &pf->state))
5652 netif_carrier_off(netdev);
5654 err = i40e_vsi_open(vsi);
5658 /* configure global TSO hardware offload settings */
5659 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5660 TCP_FLAG_FIN) >> 16);
5661 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5663 TCP_FLAG_CWR) >> 16);
5664 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5666 udp_tunnel_get_rx_info(netdev);
5673 * @vsi: the VSI to open
5675 * Finish initialization of the VSI.
5677 * Returns 0 on success, negative value on failure
5679 int i40e_vsi_open(struct i40e_vsi *vsi)
5681 struct i40e_pf *pf = vsi->back;
5682 char int_name[I40E_INT_NAME_STR_LEN];
5685 /* allocate descriptors */
5686 err = i40e_vsi_setup_tx_resources(vsi);
5689 err = i40e_vsi_setup_rx_resources(vsi);
5693 err = i40e_vsi_configure(vsi);
5698 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5699 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5700 err = i40e_vsi_request_irq(vsi, int_name);
5704 /* Notify the stack of the actual queue counts. */
5705 err = netif_set_real_num_tx_queues(vsi->netdev,
5706 vsi->num_queue_pairs);
5708 goto err_set_queues;
5710 err = netif_set_real_num_rx_queues(vsi->netdev,
5711 vsi->num_queue_pairs);
5713 goto err_set_queues;
5715 } else if (vsi->type == I40E_VSI_FDIR) {
5716 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5717 dev_driver_string(&pf->pdev->dev),
5718 dev_name(&pf->pdev->dev));
5719 err = i40e_vsi_request_irq(vsi, int_name);
5726 err = i40e_up_complete(vsi);
5728 goto err_up_complete;
5735 i40e_vsi_free_irq(vsi);
5737 i40e_vsi_free_rx_resources(vsi);
5739 i40e_vsi_free_tx_resources(vsi);
5740 if (vsi == pf->vsi[pf->lan_vsi])
5741 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5747 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5748 * @pf: Pointer to PF
5750 * This function destroys the hlist where all the Flow Director
5751 * filters were saved.
5753 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5755 struct i40e_fdir_filter *filter;
5756 struct hlist_node *node2;
5758 hlist_for_each_entry_safe(filter, node2,
5759 &pf->fdir_filter_list, fdir_node) {
5760 hlist_del(&filter->fdir_node);
5763 pf->fdir_pf_active_filters = 0;
5767 * i40e_close - Disables a network interface
5768 * @netdev: network interface device structure
5770 * The close entry point is called when an interface is de-activated
5771 * by the OS. The hardware is still under the driver's control, but
5772 * this netdev interface is disabled.
5774 * Returns 0, this is not allowed to fail
5776 int i40e_close(struct net_device *netdev)
5778 struct i40e_netdev_priv *np = netdev_priv(netdev);
5779 struct i40e_vsi *vsi = np->vsi;
5781 i40e_vsi_close(vsi);
5787 * i40e_do_reset - Start a PF or Core Reset sequence
5788 * @pf: board private structure
5789 * @reset_flags: which reset is requested
5791 * The essential difference in resets is that the PF Reset
5792 * doesn't clear the packet buffers, doesn't reset the PE
5793 * firmware, and doesn't bother the other PFs on the chip.
5795 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5799 WARN_ON(in_interrupt());
5802 /* do the biggest reset indicated */
5803 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5805 /* Request a Global Reset
5807 * This will start the chip's countdown to the actual full
5808 * chip reset event, and a warning interrupt to be sent
5809 * to all PFs, including the requestor. Our handler
5810 * for the warning interrupt will deal with the shutdown
5811 * and recovery of the switch setup.
5813 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5814 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5815 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5816 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5818 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5820 /* Request a Core Reset
5822 * Same as Global Reset, except does *not* include the MAC/PHY
5824 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5825 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5826 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5827 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5828 i40e_flush(&pf->hw);
5830 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5832 /* Request a PF Reset
5834 * Resets only the PF-specific registers
5836 * This goes directly to the tear-down and rebuild of
5837 * the switch, since we need to do all the recovery as
5838 * for the Core Reset.
5840 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5841 i40e_handle_reset_warning(pf);
5843 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5846 /* Find the VSI(s) that requested a re-init */
5847 dev_info(&pf->pdev->dev,
5848 "VSI reinit requested\n");
5849 for (v = 0; v < pf->num_alloc_vsi; v++) {
5850 struct i40e_vsi *vsi = pf->vsi[v];
5853 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5854 i40e_vsi_reinit_locked(pf->vsi[v]);
5855 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5858 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5861 /* Find the VSI(s) that needs to be brought down */
5862 dev_info(&pf->pdev->dev, "VSI down requested\n");
5863 for (v = 0; v < pf->num_alloc_vsi; v++) {
5864 struct i40e_vsi *vsi = pf->vsi[v];
5867 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5868 set_bit(__I40E_DOWN, &vsi->state);
5870 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5874 dev_info(&pf->pdev->dev,
5875 "bad reset request 0x%08x\n", reset_flags);
5879 #ifdef CONFIG_I40E_DCB
5881 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5882 * @pf: board private structure
5883 * @old_cfg: current DCB config
5884 * @new_cfg: new DCB config
5886 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5887 struct i40e_dcbx_config *old_cfg,
5888 struct i40e_dcbx_config *new_cfg)
5890 bool need_reconfig = false;
5892 /* Check if ETS configuration has changed */
5893 if (memcmp(&new_cfg->etscfg,
5895 sizeof(new_cfg->etscfg))) {
5896 /* If Priority Table has changed reconfig is needed */
5897 if (memcmp(&new_cfg->etscfg.prioritytable,
5898 &old_cfg->etscfg.prioritytable,
5899 sizeof(new_cfg->etscfg.prioritytable))) {
5900 need_reconfig = true;
5901 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5904 if (memcmp(&new_cfg->etscfg.tcbwtable,
5905 &old_cfg->etscfg.tcbwtable,
5906 sizeof(new_cfg->etscfg.tcbwtable)))
5907 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5909 if (memcmp(&new_cfg->etscfg.tsatable,
5910 &old_cfg->etscfg.tsatable,
5911 sizeof(new_cfg->etscfg.tsatable)))
5912 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5915 /* Check if PFC configuration has changed */
5916 if (memcmp(&new_cfg->pfc,
5918 sizeof(new_cfg->pfc))) {
5919 need_reconfig = true;
5920 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5923 /* Check if APP Table has changed */
5924 if (memcmp(&new_cfg->app,
5926 sizeof(new_cfg->app))) {
5927 need_reconfig = true;
5928 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5931 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5932 return need_reconfig;
5936 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5937 * @pf: board private structure
5938 * @e: event info posted on ARQ
5940 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5941 struct i40e_arq_event_info *e)
5943 struct i40e_aqc_lldp_get_mib *mib =
5944 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5945 struct i40e_hw *hw = &pf->hw;
5946 struct i40e_dcbx_config tmp_dcbx_cfg;
5947 bool need_reconfig = false;
5951 /* Not DCB capable or capability disabled */
5952 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5955 /* Ignore if event is not for Nearest Bridge */
5956 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5957 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5958 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5959 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5962 /* Check MIB Type and return if event for Remote MIB update */
5963 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5964 dev_dbg(&pf->pdev->dev,
5965 "LLDP event mib type %s\n", type ? "remote" : "local");
5966 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5967 /* Update the remote cached instance and return */
5968 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5969 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5970 &hw->remote_dcbx_config);
5974 /* Store the old configuration */
5975 tmp_dcbx_cfg = hw->local_dcbx_config;
5977 /* Reset the old DCBx configuration data */
5978 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5979 /* Get updated DCBX data from firmware */
5980 ret = i40e_get_dcb_config(&pf->hw);
5982 dev_info(&pf->pdev->dev,
5983 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5984 i40e_stat_str(&pf->hw, ret),
5985 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5989 /* No change detected in DCBX configs */
5990 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5991 sizeof(tmp_dcbx_cfg))) {
5992 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5996 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5997 &hw->local_dcbx_config);
5999 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
6004 /* Enable DCB tagging only when more than one TC */
6005 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6006 pf->flags |= I40E_FLAG_DCB_ENABLED;
6008 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6010 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
6011 /* Reconfiguration needed quiesce all VSIs */
6012 i40e_pf_quiesce_all_vsi(pf);
6014 /* Changes in configuration update VEB/VSI */
6015 i40e_dcb_reconfigure(pf);
6017 ret = i40e_resume_port_tx(pf);
6019 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
6020 /* In case of error no point in resuming VSIs */
6024 /* Wait for the PF's queues to be disabled */
6025 ret = i40e_pf_wait_queues_disabled(pf);
6027 /* Schedule PF reset to recover */
6028 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6029 i40e_service_event_schedule(pf);
6031 i40e_pf_unquiesce_all_vsi(pf);
6032 /* Notify the client for the DCB changes */
6033 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
6039 #endif /* CONFIG_I40E_DCB */
6042 * i40e_do_reset_safe - Protected reset path for userland calls.
6043 * @pf: board private structure
6044 * @reset_flags: which reset is requested
6047 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
6050 i40e_do_reset(pf, reset_flags);
6055 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
6056 * @pf: board private structure
6057 * @e: event info posted on ARQ
6059 * Handler for LAN Queue Overflow Event generated by the firmware for PF
6062 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
6063 struct i40e_arq_event_info *e)
6065 struct i40e_aqc_lan_overflow *data =
6066 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
6067 u32 queue = le32_to_cpu(data->prtdcb_rupto);
6068 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
6069 struct i40e_hw *hw = &pf->hw;
6073 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
6076 /* Queue belongs to VF, find the VF and issue VF reset */
6077 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
6078 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
6079 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
6080 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
6081 vf_id -= hw->func_caps.vf_base_id;
6082 vf = &pf->vf[vf_id];
6083 i40e_vc_notify_vf_reset(vf);
6084 /* Allow VF to process pending reset notification */
6086 i40e_reset_vf(vf, false);
6091 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
6092 * @pf: board private structure
6094 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
6098 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6099 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
6104 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
6105 * @pf: board private structure
6107 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
6111 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6112 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
6113 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
6114 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
6119 * i40e_get_global_fd_count - Get total FD filters programmed on device
6120 * @pf: board private structure
6122 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
6126 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
6127 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
6128 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
6129 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
6134 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
6135 * @pf: board private structure
6137 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
6139 struct i40e_fdir_filter *filter;
6140 u32 fcnt_prog, fcnt_avail;
6141 struct hlist_node *node;
6143 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6146 /* Check if, FD SB or ATR was auto disabled and if there is enough room
6149 fcnt_prog = i40e_get_global_fd_count(pf);
6150 fcnt_avail = pf->fdir_pf_filter_count;
6151 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
6152 (pf->fd_add_err == 0) ||
6153 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
6154 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
6155 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
6156 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
6157 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6158 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
6162 /* Wait for some more space to be available to turn on ATR. We also
6163 * must check that no existing ntuple rules for TCP are in effect
6165 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
6166 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
6167 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED) &&
6168 (pf->fd_tcp_rule == 0)) {
6169 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6170 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6171 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
6175 /* if hw had a problem adding a filter, delete it */
6176 if (pf->fd_inv > 0) {
6177 hlist_for_each_entry_safe(filter, node,
6178 &pf->fdir_filter_list, fdir_node) {
6179 if (filter->fd_id == pf->fd_inv) {
6180 hlist_del(&filter->fdir_node);
6182 pf->fdir_pf_active_filters--;
6188 #define I40E_MIN_FD_FLUSH_INTERVAL 10
6189 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
6191 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
6192 * @pf: board private structure
6194 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
6196 unsigned long min_flush_time;
6197 int flush_wait_retry = 50;
6198 bool disable_atr = false;
6202 if (!time_after(jiffies, pf->fd_flush_timestamp +
6203 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
6206 /* If the flush is happening too quick and we have mostly SB rules we
6207 * should not re-enable ATR for some time.
6209 min_flush_time = pf->fd_flush_timestamp +
6210 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
6211 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
6213 if (!(time_after(jiffies, min_flush_time)) &&
6214 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
6215 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6216 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
6220 pf->fd_flush_timestamp = jiffies;
6221 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
6222 /* flush all filters */
6223 wr32(&pf->hw, I40E_PFQF_CTL_1,
6224 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6225 i40e_flush(&pf->hw);
6229 /* Check FD flush status every 5-6msec */
6230 usleep_range(5000, 6000);
6231 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6232 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6234 } while (flush_wait_retry--);
6235 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6236 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6238 /* replay sideband filters */
6239 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6241 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6242 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6243 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6244 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6249 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6250 * @pf: board private structure
6252 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6254 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6257 /* We can see up to 256 filter programming desc in transit if the filters are
6258 * being applied really fast; before we see the first
6259 * filter miss error on Rx queue 0. Accumulating enough error messages before
6260 * reacting will make sure we don't cause flush too often.
6262 #define I40E_MAX_FD_PROGRAM_ERROR 256
6265 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6266 * @pf: board private structure
6268 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6271 /* if interface is down do nothing */
6272 if (test_bit(__I40E_DOWN, &pf->state))
6275 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6276 i40e_fdir_flush_and_replay(pf);
6278 i40e_fdir_check_and_reenable(pf);
6283 * i40e_vsi_link_event - notify VSI of a link event
6284 * @vsi: vsi to be notified
6285 * @link_up: link up or down
6287 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6289 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6292 switch (vsi->type) {
6297 if (!vsi->netdev || !vsi->netdev_registered)
6301 netif_carrier_on(vsi->netdev);
6302 netif_tx_wake_all_queues(vsi->netdev);
6304 netif_carrier_off(vsi->netdev);
6305 netif_tx_stop_all_queues(vsi->netdev);
6309 case I40E_VSI_SRIOV:
6310 case I40E_VSI_VMDQ2:
6312 case I40E_VSI_IWARP:
6313 case I40E_VSI_MIRROR:
6315 /* there is no notification for other VSIs */
6321 * i40e_veb_link_event - notify elements on the veb of a link event
6322 * @veb: veb to be notified
6323 * @link_up: link up or down
6325 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6330 if (!veb || !veb->pf)
6334 /* depth first... */
6335 for (i = 0; i < I40E_MAX_VEB; i++)
6336 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6337 i40e_veb_link_event(pf->veb[i], link_up);
6339 /* ... now the local VSIs */
6340 for (i = 0; i < pf->num_alloc_vsi; i++)
6341 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6342 i40e_vsi_link_event(pf->vsi[i], link_up);
6346 * i40e_link_event - Update netif_carrier status
6347 * @pf: board private structure
6349 static void i40e_link_event(struct i40e_pf *pf)
6351 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6352 u8 new_link_speed, old_link_speed;
6354 bool new_link, old_link;
6356 /* save off old link status information */
6357 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6359 /* set this to force the get_link_status call to refresh state */
6360 pf->hw.phy.get_link_info = true;
6362 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6364 status = i40e_get_link_status(&pf->hw, &new_link);
6366 /* On success, disable temp link polling */
6367 if (status == I40E_SUCCESS) {
6368 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)
6369 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING;
6371 /* Enable link polling temporarily until i40e_get_link_status
6372 * returns I40E_SUCCESS
6374 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING;
6375 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6380 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6381 new_link_speed = pf->hw.phy.link_info.link_speed;
6383 if (new_link == old_link &&
6384 new_link_speed == old_link_speed &&
6385 (test_bit(__I40E_DOWN, &vsi->state) ||
6386 new_link == netif_carrier_ok(vsi->netdev)))
6389 if (!test_bit(__I40E_DOWN, &vsi->state))
6390 i40e_print_link_message(vsi, new_link);
6392 /* Notify the base of the switch tree connected to
6393 * the link. Floating VEBs are not notified.
6395 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6396 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6398 i40e_vsi_link_event(vsi, new_link);
6401 i40e_vc_notify_link_state(pf);
6403 if (pf->flags & I40E_FLAG_PTP)
6404 i40e_ptp_set_increment(pf);
6408 * i40e_watchdog_subtask - periodic checks not using event driven response
6409 * @pf: board private structure
6411 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6415 /* if interface is down do nothing */
6416 if (test_bit(__I40E_DOWN, &pf->state) ||
6417 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6420 /* make sure we don't do these things too often */
6421 if (time_before(jiffies, (pf->service_timer_previous +
6422 pf->service_timer_period)))
6424 pf->service_timer_previous = jiffies;
6426 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
6427 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING))
6428 i40e_link_event(pf);
6430 /* Update the stats for active netdevs so the network stack
6431 * can look at updated numbers whenever it cares to
6433 for (i = 0; i < pf->num_alloc_vsi; i++)
6434 if (pf->vsi[i] && pf->vsi[i]->netdev)
6435 i40e_update_stats(pf->vsi[i]);
6437 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6438 /* Update the stats for the active switching components */
6439 for (i = 0; i < I40E_MAX_VEB; i++)
6441 i40e_update_veb_stats(pf->veb[i]);
6444 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6448 * i40e_reset_subtask - Set up for resetting the device and driver
6449 * @pf: board private structure
6451 static void i40e_reset_subtask(struct i40e_pf *pf)
6453 u32 reset_flags = 0;
6456 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6457 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6458 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6460 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6461 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6462 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6464 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6465 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6466 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6468 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6469 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6470 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6472 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6473 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6474 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6477 /* If there's a recovery already waiting, it takes
6478 * precedence before starting a new reset sequence.
6480 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6481 i40e_handle_reset_warning(pf);
6485 /* If we're already down or resetting, just bail */
6487 !test_bit(__I40E_DOWN, &pf->state) &&
6488 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6489 i40e_do_reset(pf, reset_flags);
6496 * i40e_handle_link_event - Handle link event
6497 * @pf: board private structure
6498 * @e: event info posted on ARQ
6500 static void i40e_handle_link_event(struct i40e_pf *pf,
6501 struct i40e_arq_event_info *e)
6503 struct i40e_aqc_get_link_status *status =
6504 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6506 /* Do a new status request to re-enable LSE reporting
6507 * and load new status information into the hw struct
6508 * This completely ignores any state information
6509 * in the ARQ event info, instead choosing to always
6510 * issue the AQ update link status command.
6512 i40e_link_event(pf);
6514 /* check for unqualified module, if link is down */
6515 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6516 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6517 (!(status->link_info & I40E_AQ_LINK_UP)))
6518 dev_err(&pf->pdev->dev,
6519 "The driver failed to link because an unqualified module was detected.\n");
6523 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6524 * @pf: board private structure
6526 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6528 struct i40e_arq_event_info event;
6529 struct i40e_hw *hw = &pf->hw;
6536 /* Do not run clean AQ when PF reset fails */
6537 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6540 /* check for error indications */
6541 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6543 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6544 if (hw->debug_mask & I40E_DEBUG_AQ)
6545 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6546 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6548 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6549 if (hw->debug_mask & I40E_DEBUG_AQ)
6550 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6551 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6552 pf->arq_overflows++;
6554 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6555 if (hw->debug_mask & I40E_DEBUG_AQ)
6556 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6557 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6560 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6562 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6564 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6565 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6566 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6567 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6569 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6570 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6571 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6572 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6574 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6575 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6576 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6577 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6580 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6582 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6583 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6588 ret = i40e_clean_arq_element(hw, &event, &pending);
6589 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6592 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6596 opcode = le16_to_cpu(event.desc.opcode);
6599 case i40e_aqc_opc_get_link_status:
6600 i40e_handle_link_event(pf, &event);
6602 case i40e_aqc_opc_send_msg_to_pf:
6603 ret = i40e_vc_process_vf_msg(pf,
6604 le16_to_cpu(event.desc.retval),
6605 le32_to_cpu(event.desc.cookie_high),
6606 le32_to_cpu(event.desc.cookie_low),
6610 case i40e_aqc_opc_lldp_update_mib:
6611 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6612 #ifdef CONFIG_I40E_DCB
6614 ret = i40e_handle_lldp_event(pf, &event);
6616 #endif /* CONFIG_I40E_DCB */
6618 case i40e_aqc_opc_event_lan_overflow:
6619 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6620 i40e_handle_lan_overflow_event(pf, &event);
6622 case i40e_aqc_opc_send_msg_to_peer:
6623 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6625 case i40e_aqc_opc_nvm_erase:
6626 case i40e_aqc_opc_nvm_update:
6627 case i40e_aqc_opc_oem_post_update:
6628 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6629 "ARQ NVM operation 0x%04x completed\n",
6633 dev_info(&pf->pdev->dev,
6634 "ARQ: Unknown event 0x%04x ignored\n",
6638 } while (pending && (i++ < pf->adminq_work_limit));
6640 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6641 /* re-enable Admin queue interrupt cause */
6642 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6643 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6644 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6647 kfree(event.msg_buf);
6651 * i40e_verify_eeprom - make sure eeprom is good to use
6652 * @pf: board private structure
6654 static void i40e_verify_eeprom(struct i40e_pf *pf)
6658 err = i40e_diag_eeprom_test(&pf->hw);
6660 /* retry in case of garbage read */
6661 err = i40e_diag_eeprom_test(&pf->hw);
6663 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6665 set_bit(__I40E_BAD_EEPROM, &pf->state);
6669 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6670 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6671 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6676 * i40e_enable_pf_switch_lb
6677 * @pf: pointer to the PF structure
6679 * enable switch loop back or die - no point in a return value
6681 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6683 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6684 struct i40e_vsi_context ctxt;
6687 ctxt.seid = pf->main_vsi_seid;
6688 ctxt.pf_num = pf->hw.pf_id;
6690 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6692 dev_info(&pf->pdev->dev,
6693 "couldn't get PF vsi config, err %s aq_err %s\n",
6694 i40e_stat_str(&pf->hw, ret),
6695 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6698 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6699 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6700 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6702 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6704 dev_info(&pf->pdev->dev,
6705 "update vsi switch failed, err %s aq_err %s\n",
6706 i40e_stat_str(&pf->hw, ret),
6707 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6712 * i40e_disable_pf_switch_lb
6713 * @pf: pointer to the PF structure
6715 * disable switch loop back or die - no point in a return value
6717 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6719 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6720 struct i40e_vsi_context ctxt;
6723 ctxt.seid = pf->main_vsi_seid;
6724 ctxt.pf_num = pf->hw.pf_id;
6726 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6728 dev_info(&pf->pdev->dev,
6729 "couldn't get PF vsi config, err %s aq_err %s\n",
6730 i40e_stat_str(&pf->hw, ret),
6731 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6734 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6735 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6736 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6738 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6740 dev_info(&pf->pdev->dev,
6741 "update vsi switch failed, err %s aq_err %s\n",
6742 i40e_stat_str(&pf->hw, ret),
6743 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6748 * i40e_config_bridge_mode - Configure the HW bridge mode
6749 * @veb: pointer to the bridge instance
6751 * Configure the loop back mode for the LAN VSI that is downlink to the
6752 * specified HW bridge instance. It is expected this function is called
6753 * when a new HW bridge is instantiated.
6755 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6757 struct i40e_pf *pf = veb->pf;
6759 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6760 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6761 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6762 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6763 i40e_disable_pf_switch_lb(pf);
6765 i40e_enable_pf_switch_lb(pf);
6769 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6770 * @veb: pointer to the VEB instance
6772 * This is a recursive function that first builds the attached VSIs then
6773 * recurses in to build the next layer of VEB. We track the connections
6774 * through our own index numbers because the seid's from the HW could
6775 * change across the reset.
6777 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6779 struct i40e_vsi *ctl_vsi = NULL;
6780 struct i40e_pf *pf = veb->pf;
6784 /* build VSI that owns this VEB, temporarily attached to base VEB */
6785 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6787 pf->vsi[v]->veb_idx == veb->idx &&
6788 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6789 ctl_vsi = pf->vsi[v];
6794 dev_info(&pf->pdev->dev,
6795 "missing owner VSI for veb_idx %d\n", veb->idx);
6797 goto end_reconstitute;
6799 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6800 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6801 ret = i40e_add_vsi(ctl_vsi);
6803 dev_info(&pf->pdev->dev,
6804 "rebuild of veb_idx %d owner VSI failed: %d\n",
6806 goto end_reconstitute;
6808 i40e_vsi_reset_stats(ctl_vsi);
6810 /* create the VEB in the switch and move the VSI onto the VEB */
6811 ret = i40e_add_veb(veb, ctl_vsi);
6813 goto end_reconstitute;
6815 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6816 veb->bridge_mode = BRIDGE_MODE_VEB;
6818 veb->bridge_mode = BRIDGE_MODE_VEPA;
6819 i40e_config_bridge_mode(veb);
6821 /* create the remaining VSIs attached to this VEB */
6822 for (v = 0; v < pf->num_alloc_vsi; v++) {
6823 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6826 if (pf->vsi[v]->veb_idx == veb->idx) {
6827 struct i40e_vsi *vsi = pf->vsi[v];
6829 vsi->uplink_seid = veb->seid;
6830 ret = i40e_add_vsi(vsi);
6832 dev_info(&pf->pdev->dev,
6833 "rebuild of vsi_idx %d failed: %d\n",
6835 goto end_reconstitute;
6837 i40e_vsi_reset_stats(vsi);
6841 /* create any VEBs attached to this VEB - RECURSION */
6842 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6843 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6844 pf->veb[veb_idx]->uplink_seid = veb->seid;
6845 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6856 * i40e_get_capabilities - get info about the HW
6857 * @pf: the PF struct
6859 static int i40e_get_capabilities(struct i40e_pf *pf)
6861 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6866 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6868 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6872 /* this loads the data into the hw struct for us */
6873 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6875 i40e_aqc_opc_list_func_capabilities,
6877 /* data loaded, buffer no longer needed */
6880 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6881 /* retry with a larger buffer */
6882 buf_len = data_size;
6883 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6884 dev_info(&pf->pdev->dev,
6885 "capability discovery failed, err %s aq_err %s\n",
6886 i40e_stat_str(&pf->hw, err),
6887 i40e_aq_str(&pf->hw,
6888 pf->hw.aq.asq_last_status));
6893 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6894 dev_info(&pf->pdev->dev,
6895 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6896 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6897 pf->hw.func_caps.num_msix_vectors,
6898 pf->hw.func_caps.num_msix_vectors_vf,
6899 pf->hw.func_caps.fd_filters_guaranteed,
6900 pf->hw.func_caps.fd_filters_best_effort,
6901 pf->hw.func_caps.num_tx_qp,
6902 pf->hw.func_caps.num_vsis);
6904 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6905 + pf->hw.func_caps.num_vfs)
6906 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6907 dev_info(&pf->pdev->dev,
6908 "got num_vsis %d, setting num_vsis to %d\n",
6909 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6910 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6916 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6919 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6920 * @pf: board private structure
6922 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6924 struct i40e_vsi *vsi;
6926 /* quick workaround for an NVM issue that leaves a critical register
6929 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6930 static const u32 hkey[] = {
6931 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6932 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6933 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6937 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6938 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6941 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6944 /* find existing VSI and see if it needs configuring */
6945 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6947 /* create a new VSI if none exists */
6949 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6950 pf->vsi[pf->lan_vsi]->seid, 0);
6952 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6953 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6958 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6962 * i40e_fdir_teardown - release the Flow Director resources
6963 * @pf: board private structure
6965 static void i40e_fdir_teardown(struct i40e_pf *pf)
6967 struct i40e_vsi *vsi;
6969 i40e_fdir_filter_exit(pf);
6970 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6972 i40e_vsi_release(vsi);
6976 * i40e_prep_for_reset - prep for the core to reset
6977 * @pf: board private structure
6979 * Close up the VFs and other things in prep for PF Reset.
6981 static void i40e_prep_for_reset(struct i40e_pf *pf)
6983 struct i40e_hw *hw = &pf->hw;
6984 i40e_status ret = 0;
6987 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6988 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6990 if (i40e_check_asq_alive(&pf->hw))
6991 i40e_vc_notify_reset(pf);
6993 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6995 /* quiesce the VSIs and their queues that are not already DOWN */
6996 i40e_pf_quiesce_all_vsi(pf);
6998 for (v = 0; v < pf->num_alloc_vsi; v++) {
7000 pf->vsi[v]->seid = 0;
7003 i40e_shutdown_adminq(&pf->hw);
7005 /* call shutdown HMC */
7006 if (hw->hmc.hmc_obj) {
7007 ret = i40e_shutdown_lan_hmc(hw);
7009 dev_warn(&pf->pdev->dev,
7010 "shutdown_lan_hmc failed: %d\n", ret);
7015 * i40e_send_version - update firmware with driver version
7018 static void i40e_send_version(struct i40e_pf *pf)
7020 struct i40e_driver_version dv;
7022 dv.major_version = DRV_VERSION_MAJOR;
7023 dv.minor_version = DRV_VERSION_MINOR;
7024 dv.build_version = DRV_VERSION_BUILD;
7025 dv.subbuild_version = 0;
7026 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
7027 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
7031 * i40e_reset_and_rebuild - reset and rebuild using a saved config
7032 * @pf: board private structure
7033 * @reinit: if the Main VSI needs to re-initialized.
7035 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
7037 struct i40e_hw *hw = &pf->hw;
7038 u8 set_fc_aq_fail = 0;
7043 /* Now we wait for GRST to settle out.
7044 * We don't have to delete the VEBs or VSIs from the hw switch
7045 * because the reset will make them disappear.
7047 ret = i40e_pf_reset(hw);
7049 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
7050 set_bit(__I40E_RESET_FAILED, &pf->state);
7051 goto clear_recovery;
7055 if (test_bit(__I40E_DOWN, &pf->state))
7056 goto clear_recovery;
7057 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
7059 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
7060 ret = i40e_init_adminq(&pf->hw);
7062 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
7063 i40e_stat_str(&pf->hw, ret),
7064 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7065 goto clear_recovery;
7068 /* re-verify the eeprom if we just had an EMP reset */
7069 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
7070 i40e_verify_eeprom(pf);
7072 i40e_clear_pxe_mode(hw);
7073 ret = i40e_get_capabilities(pf);
7075 goto end_core_reset;
7077 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7078 hw->func_caps.num_rx_qp,
7079 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
7081 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
7082 goto end_core_reset;
7084 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7086 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
7087 goto end_core_reset;
7090 #ifdef CONFIG_I40E_DCB
7091 ret = i40e_init_pf_dcb(pf);
7093 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
7094 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
7095 /* Continue without DCB enabled */
7097 #endif /* CONFIG_I40E_DCB */
7099 i40e_init_pf_fcoe(pf);
7102 /* do basic switch setup */
7103 ret = i40e_setup_pf_switch(pf, reinit);
7105 goto end_core_reset;
7107 /* The driver only wants link up/down and module qualification
7108 * reports from firmware. Note the negative logic.
7110 ret = i40e_aq_set_phy_int_mask(&pf->hw,
7111 ~(I40E_AQ_EVENT_LINK_UPDOWN |
7112 I40E_AQ_EVENT_MEDIA_NA |
7113 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
7115 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
7116 i40e_stat_str(&pf->hw, ret),
7117 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7119 /* make sure our flow control settings are restored */
7120 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
7122 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
7123 i40e_stat_str(&pf->hw, ret),
7124 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7126 /* Rebuild the VSIs and VEBs that existed before reset.
7127 * They are still in our local switch element arrays, so only
7128 * need to rebuild the switch model in the HW.
7130 * If there were VEBs but the reconstitution failed, we'll try
7131 * try to recover minimal use by getting the basic PF VSI working.
7133 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
7134 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
7135 /* find the one VEB connected to the MAC, and find orphans */
7136 for (v = 0; v < I40E_MAX_VEB; v++) {
7140 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
7141 pf->veb[v]->uplink_seid == 0) {
7142 ret = i40e_reconstitute_veb(pf->veb[v]);
7147 /* If Main VEB failed, we're in deep doodoo,
7148 * so give up rebuilding the switch and set up
7149 * for minimal rebuild of PF VSI.
7150 * If orphan failed, we'll report the error
7151 * but try to keep going.
7153 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
7154 dev_info(&pf->pdev->dev,
7155 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
7157 pf->vsi[pf->lan_vsi]->uplink_seid
7160 } else if (pf->veb[v]->uplink_seid == 0) {
7161 dev_info(&pf->pdev->dev,
7162 "rebuild of orphan VEB failed: %d\n",
7169 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
7170 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
7171 /* no VEB, so rebuild only the Main VSI */
7172 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
7174 dev_info(&pf->pdev->dev,
7175 "rebuild of Main VSI failed: %d\n", ret);
7176 goto end_core_reset;
7180 /* Reconfigure hardware for allowing smaller MSS in the case
7181 * of TSO, so that we avoid the MDD being fired and causing
7182 * a reset in the case of small MSS+TSO.
7184 #define I40E_REG_MSS 0x000E64DC
7185 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
7186 #define I40E_64BYTE_MSS 0x400000
7187 val = rd32(hw, I40E_REG_MSS);
7188 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
7189 val &= ~I40E_REG_MSS_MIN_MASK;
7190 val |= I40E_64BYTE_MSS;
7191 wr32(hw, I40E_REG_MSS, val);
7194 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
7196 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
7198 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
7199 i40e_stat_str(&pf->hw, ret),
7200 i40e_aq_str(&pf->hw,
7201 pf->hw.aq.asq_last_status));
7203 /* reinit the misc interrupt */
7204 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7205 ret = i40e_setup_misc_vector(pf);
7207 /* Add a filter to drop all Flow control frames from any VSI from being
7208 * transmitted. By doing so we stop a malicious VF from sending out
7209 * PAUSE or PFC frames and potentially controlling traffic for other
7211 * The FW can still send Flow control frames if enabled.
7213 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
7216 /* restart the VSIs that were rebuilt and running before the reset */
7217 i40e_pf_unquiesce_all_vsi(pf);
7219 if (pf->num_alloc_vfs) {
7220 for (v = 0; v < pf->num_alloc_vfs; v++)
7221 i40e_reset_vf(&pf->vf[v], true);
7224 /* tell the firmware that we're starting */
7225 i40e_send_version(pf);
7228 clear_bit(__I40E_RESET_FAILED, &pf->state);
7230 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7234 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7235 * @pf: board private structure
7237 * Close up the VFs and other things in prep for a Core Reset,
7238 * then get ready to rebuild the world.
7240 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7242 i40e_prep_for_reset(pf);
7243 i40e_reset_and_rebuild(pf, false);
7247 * i40e_handle_mdd_event
7248 * @pf: pointer to the PF structure
7250 * Called from the MDD irq handler to identify possibly malicious vfs
7252 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7254 struct i40e_hw *hw = &pf->hw;
7255 bool mdd_detected = false;
7256 bool pf_mdd_detected = false;
7261 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7264 /* find what triggered the MDD event */
7265 reg = rd32(hw, I40E_GL_MDET_TX);
7266 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7267 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7268 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7269 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7270 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7271 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7272 I40E_GL_MDET_TX_EVENT_SHIFT;
7273 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7274 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7275 pf->hw.func_caps.base_queue;
7276 if (netif_msg_tx_err(pf))
7277 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7278 event, queue, pf_num, vf_num);
7279 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7280 mdd_detected = true;
7282 reg = rd32(hw, I40E_GL_MDET_RX);
7283 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7284 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7285 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7286 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7287 I40E_GL_MDET_RX_EVENT_SHIFT;
7288 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7289 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7290 pf->hw.func_caps.base_queue;
7291 if (netif_msg_rx_err(pf))
7292 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7293 event, queue, func);
7294 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7295 mdd_detected = true;
7299 reg = rd32(hw, I40E_PF_MDET_TX);
7300 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7301 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7302 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7303 pf_mdd_detected = true;
7305 reg = rd32(hw, I40E_PF_MDET_RX);
7306 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7307 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7308 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7309 pf_mdd_detected = true;
7311 /* Queue belongs to the PF, initiate a reset */
7312 if (pf_mdd_detected) {
7313 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7314 i40e_service_event_schedule(pf);
7318 /* see if one of the VFs needs its hand slapped */
7319 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7321 reg = rd32(hw, I40E_VP_MDET_TX(i));
7322 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7323 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7324 vf->num_mdd_events++;
7325 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7329 reg = rd32(hw, I40E_VP_MDET_RX(i));
7330 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7331 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7332 vf->num_mdd_events++;
7333 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7337 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7338 dev_info(&pf->pdev->dev,
7339 "Too many MDD events on VF %d, disabled\n", i);
7340 dev_info(&pf->pdev->dev,
7341 "Use PF Control I/F to re-enable the VF\n");
7342 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7346 /* re-enable mdd interrupt cause */
7347 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7348 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7349 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7350 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7355 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7356 * @pf: board private structure
7358 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7360 struct i40e_hw *hw = &pf->hw;
7365 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7368 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7370 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7371 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7372 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7373 port = pf->udp_ports[i].index;
7375 ret = i40e_aq_add_udp_tunnel(hw, port,
7376 pf->udp_ports[i].type,
7379 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7382 dev_dbg(&pf->pdev->dev,
7383 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7384 pf->udp_ports[i].type ? "vxlan" : "geneve",
7385 port ? "add" : "delete",
7387 i40e_stat_str(&pf->hw, ret),
7388 i40e_aq_str(&pf->hw,
7389 pf->hw.aq.asq_last_status));
7390 pf->udp_ports[i].index = 0;
7397 * i40e_service_task - Run the driver's async subtasks
7398 * @work: pointer to work_struct containing our data
7400 static void i40e_service_task(struct work_struct *work)
7402 struct i40e_pf *pf = container_of(work,
7405 unsigned long start_time = jiffies;
7407 /* don't bother with service tasks if a reset is in progress */
7408 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7412 if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
7415 i40e_detect_recover_hung(pf);
7416 i40e_sync_filters_subtask(pf);
7417 i40e_reset_subtask(pf);
7418 i40e_handle_mdd_event(pf);
7419 i40e_vc_process_vflr_event(pf);
7420 i40e_watchdog_subtask(pf);
7421 i40e_fdir_reinit_subtask(pf);
7422 i40e_client_subtask(pf);
7423 i40e_sync_filters_subtask(pf);
7424 i40e_sync_udp_filters_subtask(pf);
7425 i40e_clean_adminq_subtask(pf);
7427 /* flush memory to make sure state is correct before next watchdog */
7428 smp_mb__before_atomic();
7429 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7431 /* If the tasks have taken longer than one timer cycle or there
7432 * is more work to be done, reschedule the service task now
7433 * rather than wait for the timer to tick again.
7435 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7436 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7437 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7438 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7439 i40e_service_event_schedule(pf);
7443 * i40e_service_timer - timer callback
7444 * @data: pointer to PF struct
7446 static void i40e_service_timer(unsigned long data)
7448 struct i40e_pf *pf = (struct i40e_pf *)data;
7450 mod_timer(&pf->service_timer,
7451 round_jiffies(jiffies + pf->service_timer_period));
7452 i40e_service_event_schedule(pf);
7456 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7457 * @vsi: the VSI being configured
7459 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7461 struct i40e_pf *pf = vsi->back;
7463 switch (vsi->type) {
7465 vsi->alloc_queue_pairs = pf->num_lan_qps;
7466 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7467 I40E_REQ_DESCRIPTOR_MULTIPLE);
7468 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7469 vsi->num_q_vectors = pf->num_lan_msix;
7471 vsi->num_q_vectors = 1;
7476 vsi->alloc_queue_pairs = 1;
7477 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7478 I40E_REQ_DESCRIPTOR_MULTIPLE);
7479 vsi->num_q_vectors = pf->num_fdsb_msix;
7482 case I40E_VSI_VMDQ2:
7483 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7484 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7485 I40E_REQ_DESCRIPTOR_MULTIPLE);
7486 vsi->num_q_vectors = pf->num_vmdq_msix;
7489 case I40E_VSI_SRIOV:
7490 vsi->alloc_queue_pairs = pf->num_vf_qps;
7491 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7492 I40E_REQ_DESCRIPTOR_MULTIPLE);
7497 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7498 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7499 I40E_REQ_DESCRIPTOR_MULTIPLE);
7500 vsi->num_q_vectors = pf->num_fcoe_msix;
7503 #endif /* I40E_FCOE */
7513 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7514 * @type: VSI pointer
7515 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7517 * On error: returns error code (negative)
7518 * On success: returns 0
7520 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7525 /* allocate memory for both Tx and Rx ring pointers */
7526 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7527 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7530 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7532 if (alloc_qvectors) {
7533 /* allocate memory for q_vector pointers */
7534 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7535 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7536 if (!vsi->q_vectors) {
7544 kfree(vsi->tx_rings);
7549 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7550 * @pf: board private structure
7551 * @type: type of VSI
7553 * On error: returns error code (negative)
7554 * On success: returns vsi index in PF (positive)
7556 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7559 struct i40e_vsi *vsi;
7563 /* Need to protect the allocation of the VSIs at the PF level */
7564 mutex_lock(&pf->switch_mutex);
7566 /* VSI list may be fragmented if VSI creation/destruction has
7567 * been happening. We can afford to do a quick scan to look
7568 * for any free VSIs in the list.
7570 * find next empty vsi slot, looping back around if necessary
7573 while (i < pf->num_alloc_vsi && pf->vsi[i])
7575 if (i >= pf->num_alloc_vsi) {
7577 while (i < pf->next_vsi && pf->vsi[i])
7581 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7582 vsi_idx = i; /* Found one! */
7585 goto unlock_pf; /* out of VSI slots! */
7589 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7596 set_bit(__I40E_DOWN, &vsi->state);
7599 vsi->int_rate_limit = 0;
7600 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7601 pf->rss_table_size : 64;
7602 vsi->netdev_registered = false;
7603 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7604 hash_init(vsi->mac_filter_hash);
7605 vsi->irqs_ready = false;
7607 ret = i40e_set_num_rings_in_vsi(vsi);
7611 ret = i40e_vsi_alloc_arrays(vsi, true);
7615 /* Setup default MSIX irq handler for VSI */
7616 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7618 /* Initialize VSI lock */
7619 spin_lock_init(&vsi->mac_filter_hash_lock);
7620 pf->vsi[vsi_idx] = vsi;
7625 pf->next_vsi = i - 1;
7628 mutex_unlock(&pf->switch_mutex);
7633 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7634 * @type: VSI pointer
7635 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7637 * On error: returns error code (negative)
7638 * On success: returns 0
7640 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7642 /* free the ring and vector containers */
7643 if (free_qvectors) {
7644 kfree(vsi->q_vectors);
7645 vsi->q_vectors = NULL;
7647 kfree(vsi->tx_rings);
7648 vsi->tx_rings = NULL;
7649 vsi->rx_rings = NULL;
7653 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7655 * @vsi: Pointer to VSI structure
7657 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7662 kfree(vsi->rss_hkey_user);
7663 vsi->rss_hkey_user = NULL;
7665 kfree(vsi->rss_lut_user);
7666 vsi->rss_lut_user = NULL;
7670 * i40e_vsi_clear - Deallocate the VSI provided
7671 * @vsi: the VSI being un-configured
7673 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7684 mutex_lock(&pf->switch_mutex);
7685 if (!pf->vsi[vsi->idx]) {
7686 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7687 vsi->idx, vsi->idx, vsi, vsi->type);
7691 if (pf->vsi[vsi->idx] != vsi) {
7692 dev_err(&pf->pdev->dev,
7693 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7694 pf->vsi[vsi->idx]->idx,
7696 pf->vsi[vsi->idx]->type,
7697 vsi->idx, vsi, vsi->type);
7701 /* updates the PF for this cleared vsi */
7702 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7703 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7705 i40e_vsi_free_arrays(vsi, true);
7706 i40e_clear_rss_config_user(vsi);
7708 pf->vsi[vsi->idx] = NULL;
7709 if (vsi->idx < pf->next_vsi)
7710 pf->next_vsi = vsi->idx;
7713 mutex_unlock(&pf->switch_mutex);
7721 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7722 * @vsi: the VSI being cleaned
7724 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7728 if (vsi->tx_rings && vsi->tx_rings[0]) {
7729 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7730 kfree_rcu(vsi->tx_rings[i], rcu);
7731 vsi->tx_rings[i] = NULL;
7732 vsi->rx_rings[i] = NULL;
7738 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7739 * @vsi: the VSI being configured
7741 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7743 struct i40e_ring *tx_ring, *rx_ring;
7744 struct i40e_pf *pf = vsi->back;
7747 /* Set basic values in the rings to be used later during open() */
7748 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7749 /* allocate space for both Tx and Rx in one shot */
7750 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7754 tx_ring->queue_index = i;
7755 tx_ring->reg_idx = vsi->base_queue + i;
7756 tx_ring->ring_active = false;
7758 tx_ring->netdev = vsi->netdev;
7759 tx_ring->dev = &pf->pdev->dev;
7760 tx_ring->count = vsi->num_desc;
7762 tx_ring->dcb_tc = 0;
7763 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7764 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7765 tx_ring->tx_itr_setting = pf->tx_itr_default;
7766 vsi->tx_rings[i] = tx_ring;
7768 rx_ring = &tx_ring[1];
7769 rx_ring->queue_index = i;
7770 rx_ring->reg_idx = vsi->base_queue + i;
7771 rx_ring->ring_active = false;
7773 rx_ring->netdev = vsi->netdev;
7774 rx_ring->dev = &pf->pdev->dev;
7775 rx_ring->count = vsi->num_desc;
7777 rx_ring->dcb_tc = 0;
7778 rx_ring->rx_itr_setting = pf->rx_itr_default;
7779 vsi->rx_rings[i] = rx_ring;
7785 i40e_vsi_clear_rings(vsi);
7790 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7791 * @pf: board private structure
7792 * @vectors: the number of MSI-X vectors to request
7794 * Returns the number of vectors reserved, or error
7796 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7798 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7799 I40E_MIN_MSIX, vectors);
7801 dev_info(&pf->pdev->dev,
7802 "MSI-X vector reservation failed: %d\n", vectors);
7810 * i40e_init_msix - Setup the MSIX capability
7811 * @pf: board private structure
7813 * Work with the OS to set up the MSIX vectors needed.
7815 * Returns the number of vectors reserved or negative on failure
7817 static int i40e_init_msix(struct i40e_pf *pf)
7819 struct i40e_hw *hw = &pf->hw;
7823 int iwarp_requested = 0;
7825 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7828 /* The number of vectors we'll request will be comprised of:
7829 * - Add 1 for "other" cause for Admin Queue events, etc.
7830 * - The number of LAN queue pairs
7831 * - Queues being used for RSS.
7832 * We don't need as many as max_rss_size vectors.
7833 * use rss_size instead in the calculation since that
7834 * is governed by number of cpus in the system.
7835 * - assumes symmetric Tx/Rx pairing
7836 * - The number of VMDq pairs
7837 * - The CPU count within the NUMA node if iWARP is enabled
7839 * - The number of FCOE qps.
7841 * Once we count this up, try the request.
7843 * If we can't get what we want, we'll simplify to nearly nothing
7844 * and try again. If that still fails, we punt.
7846 vectors_left = hw->func_caps.num_msix_vectors;
7849 /* reserve one vector for miscellaneous handler */
7855 /* reserve vectors for the main PF traffic queues */
7856 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7857 vectors_left -= pf->num_lan_msix;
7858 v_budget += pf->num_lan_msix;
7860 /* reserve one vector for sideband flow director */
7861 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7863 pf->num_fdsb_msix = 1;
7867 pf->num_fdsb_msix = 0;
7872 /* can we reserve enough for FCoE? */
7873 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7875 pf->num_fcoe_msix = 0;
7876 else if (vectors_left >= pf->num_fcoe_qps)
7877 pf->num_fcoe_msix = pf->num_fcoe_qps;
7879 pf->num_fcoe_msix = 1;
7880 v_budget += pf->num_fcoe_msix;
7881 vectors_left -= pf->num_fcoe_msix;
7885 /* can we reserve enough for iWARP? */
7886 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7887 iwarp_requested = pf->num_iwarp_msix;
7890 pf->num_iwarp_msix = 0;
7891 else if (vectors_left < pf->num_iwarp_msix)
7892 pf->num_iwarp_msix = 1;
7893 v_budget += pf->num_iwarp_msix;
7894 vectors_left -= pf->num_iwarp_msix;
7897 /* any vectors left over go for VMDq support */
7898 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7899 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7900 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7902 if (!vectors_left) {
7903 pf->num_vmdq_msix = 0;
7904 pf->num_vmdq_qps = 0;
7906 /* if we're short on vectors for what's desired, we limit
7907 * the queues per vmdq. If this is still more than are
7908 * available, the user will need to change the number of
7909 * queues/vectors used by the PF later with the ethtool
7912 if (vmdq_vecs < vmdq_vecs_wanted)
7913 pf->num_vmdq_qps = 1;
7914 pf->num_vmdq_msix = pf->num_vmdq_qps;
7916 v_budget += vmdq_vecs;
7917 vectors_left -= vmdq_vecs;
7921 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7923 if (!pf->msix_entries)
7926 for (i = 0; i < v_budget; i++)
7927 pf->msix_entries[i].entry = i;
7928 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7930 if (v_actual < I40E_MIN_MSIX) {
7931 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7932 kfree(pf->msix_entries);
7933 pf->msix_entries = NULL;
7934 pci_disable_msix(pf->pdev);
7937 } else if (v_actual == I40E_MIN_MSIX) {
7938 /* Adjust for minimal MSIX use */
7939 pf->num_vmdq_vsis = 0;
7940 pf->num_vmdq_qps = 0;
7941 pf->num_lan_qps = 1;
7942 pf->num_lan_msix = 1;
7944 } else if (!vectors_left) {
7945 /* If we have limited resources, we will start with no vectors
7946 * for the special features and then allocate vectors to some
7947 * of these features based on the policy and at the end disable
7948 * the features that did not get any vectors.
7952 dev_info(&pf->pdev->dev,
7953 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7954 /* reserve the misc vector */
7957 /* Scale vector usage down */
7958 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7959 pf->num_vmdq_vsis = 1;
7960 pf->num_vmdq_qps = 1;
7962 pf->num_fcoe_qps = 0;
7963 pf->num_fcoe_msix = 0;
7966 /* partition out the remaining vectors */
7969 pf->num_lan_msix = 1;
7972 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7973 pf->num_lan_msix = 1;
7974 pf->num_iwarp_msix = 1;
7976 pf->num_lan_msix = 2;
7979 /* give one vector to FCoE */
7980 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7981 pf->num_lan_msix = 1;
7982 pf->num_fcoe_msix = 1;
7987 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7988 pf->num_iwarp_msix = min_t(int, (vec / 3),
7990 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7991 I40E_DEFAULT_NUM_VMDQ_VSI);
7993 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7994 I40E_DEFAULT_NUM_VMDQ_VSI);
7996 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7997 pf->num_fdsb_msix = 1;
8000 pf->num_lan_msix = min_t(int,
8001 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
8003 pf->num_lan_qps = pf->num_lan_msix;
8005 /* give one vector to FCoE */
8006 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8007 pf->num_fcoe_msix = 1;
8015 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8016 (pf->num_fdsb_msix == 0)) {
8017 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
8018 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8020 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8021 (pf->num_vmdq_msix == 0)) {
8022 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
8023 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
8026 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
8027 (pf->num_iwarp_msix == 0)) {
8028 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
8029 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
8033 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
8034 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
8035 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
8038 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
8039 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
8041 pf->num_vmdq_msix * pf->num_vmdq_vsis,
8043 pf->num_iwarp_msix);
8049 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
8050 * @vsi: the VSI being configured
8051 * @v_idx: index of the vector in the vsi struct
8052 * @cpu: cpu to be used on affinity_mask
8054 * We allocate one q_vector. If allocation fails we return -ENOMEM.
8056 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
8058 struct i40e_q_vector *q_vector;
8060 /* allocate q_vector */
8061 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
8065 q_vector->vsi = vsi;
8066 q_vector->v_idx = v_idx;
8067 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
8070 netif_napi_add(vsi->netdev, &q_vector->napi,
8071 i40e_napi_poll, NAPI_POLL_WEIGHT);
8073 q_vector->rx.latency_range = I40E_LOW_LATENCY;
8074 q_vector->tx.latency_range = I40E_LOW_LATENCY;
8076 /* tie q_vector and vsi together */
8077 vsi->q_vectors[v_idx] = q_vector;
8083 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
8084 * @vsi: the VSI being configured
8086 * We allocate one q_vector per queue interrupt. If allocation fails we
8089 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
8091 struct i40e_pf *pf = vsi->back;
8092 int err, v_idx, num_q_vectors, current_cpu;
8094 /* if not MSIX, give the one vector only to the LAN VSI */
8095 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
8096 num_q_vectors = vsi->num_q_vectors;
8097 else if (vsi == pf->vsi[pf->lan_vsi])
8102 current_cpu = cpumask_first(cpu_online_mask);
8104 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
8105 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
8108 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
8109 if (unlikely(current_cpu >= nr_cpu_ids))
8110 current_cpu = cpumask_first(cpu_online_mask);
8117 i40e_free_q_vector(vsi, v_idx);
8123 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
8124 * @pf: board private structure to initialize
8126 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
8131 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8132 vectors = i40e_init_msix(pf);
8134 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
8135 I40E_FLAG_IWARP_ENABLED |
8137 I40E_FLAG_FCOE_ENABLED |
8139 I40E_FLAG_RSS_ENABLED |
8140 I40E_FLAG_DCB_CAPABLE |
8141 I40E_FLAG_DCB_ENABLED |
8142 I40E_FLAG_SRIOV_ENABLED |
8143 I40E_FLAG_FD_SB_ENABLED |
8144 I40E_FLAG_FD_ATR_ENABLED |
8145 I40E_FLAG_VMDQ_ENABLED);
8147 /* rework the queue expectations without MSIX */
8148 i40e_determine_queue_usage(pf);
8152 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8153 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
8154 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
8155 vectors = pci_enable_msi(pf->pdev);
8157 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
8159 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
8161 vectors = 1; /* one MSI or Legacy vector */
8164 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
8165 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
8167 /* set up vector assignment tracking */
8168 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
8169 pf->irq_pile = kzalloc(size, GFP_KERNEL);
8170 if (!pf->irq_pile) {
8171 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
8174 pf->irq_pile->num_entries = vectors;
8175 pf->irq_pile->search_hint = 0;
8177 /* track first vector for misc interrupts, ignore return */
8178 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
8184 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
8185 * @pf: board private structure
8187 * This sets up the handler for MSIX 0, which is used to manage the
8188 * non-queue interrupts, e.g. AdminQ and errors. This is not used
8189 * when in MSI or Legacy interrupt mode.
8191 static int i40e_setup_misc_vector(struct i40e_pf *pf)
8193 struct i40e_hw *hw = &pf->hw;
8196 /* Only request the irq if this is the first time through, and
8197 * not when we're rebuilding after a Reset
8199 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
8200 err = request_irq(pf->msix_entries[0].vector,
8201 i40e_intr, 0, pf->int_name, pf);
8203 dev_info(&pf->pdev->dev,
8204 "request_irq for %s failed: %d\n",
8210 i40e_enable_misc_int_causes(pf);
8212 /* associate no queues to the misc vector */
8213 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
8214 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
8218 i40e_irq_dynamic_enable_icr0(pf, true);
8224 * i40e_config_rss_aq - Prepare for RSS using AQ commands
8225 * @vsi: vsi structure
8226 * @seed: RSS hash seed
8228 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8229 u8 *lut, u16 lut_size)
8231 struct i40e_pf *pf = vsi->back;
8232 struct i40e_hw *hw = &pf->hw;
8236 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8237 (struct i40e_aqc_get_set_rss_key_data *)seed;
8238 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8240 dev_info(&pf->pdev->dev,
8241 "Cannot set RSS key, err %s aq_err %s\n",
8242 i40e_stat_str(hw, ret),
8243 i40e_aq_str(hw, hw->aq.asq_last_status));
8248 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8250 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8252 dev_info(&pf->pdev->dev,
8253 "Cannot set RSS lut, err %s aq_err %s\n",
8254 i40e_stat_str(hw, ret),
8255 i40e_aq_str(hw, hw->aq.asq_last_status));
8263 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8264 * @vsi: Pointer to vsi structure
8265 * @seed: Buffter to store the hash keys
8266 * @lut: Buffer to store the lookup table entries
8267 * @lut_size: Size of buffer to store the lookup table entries
8269 * Return 0 on success, negative on failure
8271 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8272 u8 *lut, u16 lut_size)
8274 struct i40e_pf *pf = vsi->back;
8275 struct i40e_hw *hw = &pf->hw;
8279 ret = i40e_aq_get_rss_key(hw, vsi->id,
8280 (struct i40e_aqc_get_set_rss_key_data *)seed);
8282 dev_info(&pf->pdev->dev,
8283 "Cannot get RSS key, err %s aq_err %s\n",
8284 i40e_stat_str(&pf->hw, ret),
8285 i40e_aq_str(&pf->hw,
8286 pf->hw.aq.asq_last_status));
8292 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8294 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8296 dev_info(&pf->pdev->dev,
8297 "Cannot get RSS lut, err %s aq_err %s\n",
8298 i40e_stat_str(&pf->hw, ret),
8299 i40e_aq_str(&pf->hw,
8300 pf->hw.aq.asq_last_status));
8309 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8310 * @vsi: VSI structure
8312 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8314 u8 seed[I40E_HKEY_ARRAY_SIZE];
8315 struct i40e_pf *pf = vsi->back;
8319 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8323 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8324 vsi->num_queue_pairs);
8328 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8331 /* Use the user configured hash keys and lookup table if there is one,
8332 * otherwise use default
8334 if (vsi->rss_lut_user)
8335 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8337 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8338 if (vsi->rss_hkey_user)
8339 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8341 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8342 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8349 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8350 * @vsi: Pointer to vsi structure
8351 * @seed: RSS hash seed
8352 * @lut: Lookup table
8353 * @lut_size: Lookup table size
8355 * Returns 0 on success, negative on failure
8357 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8358 const u8 *lut, u16 lut_size)
8360 struct i40e_pf *pf = vsi->back;
8361 struct i40e_hw *hw = &pf->hw;
8362 u16 vf_id = vsi->vf_id;
8365 /* Fill out hash function seed */
8367 u32 *seed_dw = (u32 *)seed;
8369 if (vsi->type == I40E_VSI_MAIN) {
8370 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8371 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8373 } else if (vsi->type == I40E_VSI_SRIOV) {
8374 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8375 i40e_write_rx_ctl(hw,
8376 I40E_VFQF_HKEY1(i, vf_id),
8379 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8384 u32 *lut_dw = (u32 *)lut;
8386 if (vsi->type == I40E_VSI_MAIN) {
8387 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8389 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8390 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8391 } else if (vsi->type == I40E_VSI_SRIOV) {
8392 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8394 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8395 i40e_write_rx_ctl(hw,
8396 I40E_VFQF_HLUT1(i, vf_id),
8399 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8408 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8409 * @vsi: Pointer to VSI structure
8410 * @seed: Buffer to store the keys
8411 * @lut: Buffer to store the lookup table entries
8412 * @lut_size: Size of buffer to store the lookup table entries
8414 * Returns 0 on success, negative on failure
8416 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8417 u8 *lut, u16 lut_size)
8419 struct i40e_pf *pf = vsi->back;
8420 struct i40e_hw *hw = &pf->hw;
8424 u32 *seed_dw = (u32 *)seed;
8426 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8427 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8430 u32 *lut_dw = (u32 *)lut;
8432 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8434 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8435 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8442 * i40e_config_rss - Configure RSS keys and lut
8443 * @vsi: Pointer to VSI structure
8444 * @seed: RSS hash seed
8445 * @lut: Lookup table
8446 * @lut_size: Lookup table size
8448 * Returns 0 on success, negative on failure
8450 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8452 struct i40e_pf *pf = vsi->back;
8454 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8455 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8457 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8461 * i40e_get_rss - Get RSS keys and lut
8462 * @vsi: Pointer to VSI structure
8463 * @seed: Buffer to store the keys
8464 * @lut: Buffer to store the lookup table entries
8465 * lut_size: Size of buffer to store the lookup table entries
8467 * Returns 0 on success, negative on failure
8469 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8471 struct i40e_pf *pf = vsi->back;
8473 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8474 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8476 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8480 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8481 * @pf: Pointer to board private structure
8482 * @lut: Lookup table
8483 * @rss_table_size: Lookup table size
8484 * @rss_size: Range of queue number for hashing
8486 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8487 u16 rss_table_size, u16 rss_size)
8491 for (i = 0; i < rss_table_size; i++)
8492 lut[i] = i % rss_size;
8496 * i40e_pf_config_rss - Prepare for RSS if used
8497 * @pf: board private structure
8499 static int i40e_pf_config_rss(struct i40e_pf *pf)
8501 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8502 u8 seed[I40E_HKEY_ARRAY_SIZE];
8504 struct i40e_hw *hw = &pf->hw;
8509 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8510 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8511 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8512 hena |= i40e_pf_get_default_rss_hena(pf);
8514 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8515 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8517 /* Determine the RSS table size based on the hardware capabilities */
8518 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8519 reg_val = (pf->rss_table_size == 512) ?
8520 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8521 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8522 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8524 /* Determine the RSS size of the VSI */
8526 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8527 vsi->num_queue_pairs);
8531 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8535 /* Use user configured lut if there is one, otherwise use default */
8536 if (vsi->rss_lut_user)
8537 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8539 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8541 /* Use user configured hash key if there is one, otherwise
8544 if (vsi->rss_hkey_user)
8545 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8547 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8548 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8555 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8556 * @pf: board private structure
8557 * @queue_count: the requested queue count for rss.
8559 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8560 * count which may be different from the requested queue count.
8562 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8564 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8567 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8570 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8572 if (queue_count != vsi->num_queue_pairs) {
8573 vsi->req_queue_pairs = queue_count;
8574 i40e_prep_for_reset(pf);
8576 pf->alloc_rss_size = new_rss_size;
8578 i40e_reset_and_rebuild(pf, true);
8580 /* Discard the user configured hash keys and lut, if less
8581 * queues are enabled.
8583 if (queue_count < vsi->rss_size) {
8584 i40e_clear_rss_config_user(vsi);
8585 dev_dbg(&pf->pdev->dev,
8586 "discard user configured hash keys and lut\n");
8589 /* Reset vsi->rss_size, as number of enabled queues changed */
8590 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8591 vsi->num_queue_pairs);
8593 i40e_pf_config_rss(pf);
8595 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
8596 vsi->req_queue_pairs, pf->rss_size_max);
8597 return pf->alloc_rss_size;
8601 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8602 * @pf: board private structure
8604 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8607 bool min_valid, max_valid;
8610 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8611 &min_valid, &max_valid);
8615 pf->npar_min_bw = min_bw;
8617 pf->npar_max_bw = max_bw;
8624 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8625 * @pf: board private structure
8627 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8629 struct i40e_aqc_configure_partition_bw_data bw_data;
8632 /* Set the valid bit for this PF */
8633 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8634 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8635 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8637 /* Set the new bandwidths */
8638 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8644 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8645 * @pf: board private structure
8647 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8649 /* Commit temporary BW setting to permanent NVM image */
8650 enum i40e_admin_queue_err last_aq_status;
8654 if (pf->hw.partition_id != 1) {
8655 dev_info(&pf->pdev->dev,
8656 "Commit BW only works on partition 1! This is partition %d",
8657 pf->hw.partition_id);
8658 ret = I40E_NOT_SUPPORTED;
8662 /* Acquire NVM for read access */
8663 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8664 last_aq_status = pf->hw.aq.asq_last_status;
8666 dev_info(&pf->pdev->dev,
8667 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8668 i40e_stat_str(&pf->hw, ret),
8669 i40e_aq_str(&pf->hw, last_aq_status));
8673 /* Read word 0x10 of NVM - SW compatibility word 1 */
8674 ret = i40e_aq_read_nvm(&pf->hw,
8675 I40E_SR_NVM_CONTROL_WORD,
8676 0x10, sizeof(nvm_word), &nvm_word,
8678 /* Save off last admin queue command status before releasing
8681 last_aq_status = pf->hw.aq.asq_last_status;
8682 i40e_release_nvm(&pf->hw);
8684 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8685 i40e_stat_str(&pf->hw, ret),
8686 i40e_aq_str(&pf->hw, last_aq_status));
8690 /* Wait a bit for NVM release to complete */
8693 /* Acquire NVM for write access */
8694 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8695 last_aq_status = pf->hw.aq.asq_last_status;
8697 dev_info(&pf->pdev->dev,
8698 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8699 i40e_stat_str(&pf->hw, ret),
8700 i40e_aq_str(&pf->hw, last_aq_status));
8703 /* Write it back out unchanged to initiate update NVM,
8704 * which will force a write of the shadow (alt) RAM to
8705 * the NVM - thus storing the bandwidth values permanently.
8707 ret = i40e_aq_update_nvm(&pf->hw,
8708 I40E_SR_NVM_CONTROL_WORD,
8709 0x10, sizeof(nvm_word),
8710 &nvm_word, true, NULL);
8711 /* Save off last admin queue command status before releasing
8714 last_aq_status = pf->hw.aq.asq_last_status;
8715 i40e_release_nvm(&pf->hw);
8717 dev_info(&pf->pdev->dev,
8718 "BW settings NOT SAVED, err %s aq_err %s\n",
8719 i40e_stat_str(&pf->hw, ret),
8720 i40e_aq_str(&pf->hw, last_aq_status));
8727 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8728 * @pf: board private structure to initialize
8730 * i40e_sw_init initializes the Adapter private data structure.
8731 * Fields are initialized based on PCI device information and
8732 * OS network device settings (MTU size).
8734 static int i40e_sw_init(struct i40e_pf *pf)
8739 /* Set default capability flags */
8740 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8741 I40E_FLAG_MSI_ENABLED |
8742 I40E_FLAG_MSIX_ENABLED;
8744 /* Set default ITR */
8745 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8746 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8748 /* Depending on PF configurations, it is possible that the RSS
8749 * maximum might end up larger than the available queues
8751 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8752 pf->alloc_rss_size = 1;
8753 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8754 pf->rss_size_max = min_t(int, pf->rss_size_max,
8755 pf->hw.func_caps.num_tx_qp);
8756 if (pf->hw.func_caps.rss) {
8757 pf->flags |= I40E_FLAG_RSS_ENABLED;
8758 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8762 /* MFP mode enabled */
8763 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8764 pf->flags |= I40E_FLAG_MFP_ENABLED;
8765 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8766 if (i40e_get_npar_bw_setting(pf))
8767 dev_warn(&pf->pdev->dev,
8768 "Could not get NPAR bw settings\n");
8770 dev_info(&pf->pdev->dev,
8771 "Min BW = %8.8x, Max BW = %8.8x\n",
8772 pf->npar_min_bw, pf->npar_max_bw);
8775 /* FW/NVM is not yet fixed in this regard */
8776 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8777 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8778 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8779 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8780 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8781 pf->hw.num_partitions > 1)
8782 dev_info(&pf->pdev->dev,
8783 "Flow Director Sideband mode Disabled in MFP mode\n");
8785 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8786 pf->fdir_pf_filter_count =
8787 pf->hw.func_caps.fd_filters_guaranteed;
8788 pf->hw.fdir_shared_filter_count =
8789 pf->hw.func_caps.fd_filters_best_effort;
8792 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8793 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8794 (pf->hw.aq.fw_maj_ver < 4))) {
8795 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8796 /* No DCB support for FW < v4.33 */
8797 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8800 /* Disable FW LLDP if FW < v4.3 */
8801 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8802 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8803 (pf->hw.aq.fw_maj_ver < 4)))
8804 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8806 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8807 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8808 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8809 (pf->hw.aq.fw_maj_ver >= 5)))
8810 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8812 if (pf->hw.func_caps.vmdq) {
8813 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8814 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8815 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8818 if (pf->hw.func_caps.iwarp) {
8819 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8820 /* IWARP needs one extra vector for CQP just like MISC.*/
8821 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8825 i40e_init_pf_fcoe(pf);
8827 #endif /* I40E_FCOE */
8828 #ifdef CONFIG_PCI_IOV
8829 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8830 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8831 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8832 pf->num_req_vfs = min_t(int,
8833 pf->hw.func_caps.num_vfs,
8836 #endif /* CONFIG_PCI_IOV */
8837 if (pf->hw.mac.type == I40E_MAC_X722) {
8838 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE
8839 | I40E_FLAG_128_QP_RSS_CAPABLE
8840 | I40E_FLAG_HW_ATR_EVICT_CAPABLE
8841 | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE
8842 | I40E_FLAG_WB_ON_ITR_CAPABLE
8843 | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE
8844 | I40E_FLAG_NO_PCI_LINK_CHECK
8845 | I40E_FLAG_USE_SET_LLDP_MIB
8846 | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE
8847 | I40E_FLAG_PTP_L4_CAPABLE
8848 | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE;
8849 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8850 ((pf->hw.aq.api_maj_ver == 1) &&
8851 (pf->hw.aq.api_min_ver > 4))) {
8852 /* Supported in FW API version higher than 1.4 */
8853 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8854 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8856 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8859 pf->eeprom_version = 0xDEAD;
8860 pf->lan_veb = I40E_NO_VEB;
8861 pf->lan_vsi = I40E_NO_VSI;
8863 /* By default FW has this off for performance reasons */
8864 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8866 /* set up queue assignment tracking */
8867 size = sizeof(struct i40e_lump_tracking)
8868 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8869 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8874 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8875 pf->qp_pile->search_hint = 0;
8877 pf->tx_timeout_recovery_level = 1;
8879 mutex_init(&pf->switch_mutex);
8881 /* If NPAR is enabled nudge the Tx scheduler */
8882 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8883 i40e_set_npar_bw_setting(pf);
8890 * i40e_set_ntuple - set the ntuple feature flag and take action
8891 * @pf: board private structure to initialize
8892 * @features: the feature set that the stack is suggesting
8894 * returns a bool to indicate if reset needs to happen
8896 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8898 bool need_reset = false;
8900 /* Check if Flow Director n-tuple support was enabled or disabled. If
8901 * the state changed, we need to reset.
8903 if (features & NETIF_F_NTUPLE) {
8904 /* Enable filters and mark for reset */
8905 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8907 /* enable FD_SB only if there is MSI-X vector */
8908 if (pf->num_fdsb_msix > 0)
8909 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8911 /* turn off filters, mark for reset and clear SW filter list */
8912 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8914 i40e_fdir_filter_exit(pf);
8916 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8917 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8918 /* reset fd counters */
8919 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8920 pf->fdir_pf_active_filters = 0;
8921 /* if ATR was auto disabled it can be re-enabled. */
8922 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8923 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8924 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8925 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8926 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8933 * i40e_clear_rss_lut - clear the rx hash lookup table
8934 * @vsi: the VSI being configured
8936 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8938 struct i40e_pf *pf = vsi->back;
8939 struct i40e_hw *hw = &pf->hw;
8940 u16 vf_id = vsi->vf_id;
8943 if (vsi->type == I40E_VSI_MAIN) {
8944 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8945 wr32(hw, I40E_PFQF_HLUT(i), 0);
8946 } else if (vsi->type == I40E_VSI_SRIOV) {
8947 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8948 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8950 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8955 * i40e_set_features - set the netdev feature flags
8956 * @netdev: ptr to the netdev being adjusted
8957 * @features: the feature set that the stack is suggesting
8959 static int i40e_set_features(struct net_device *netdev,
8960 netdev_features_t features)
8962 struct i40e_netdev_priv *np = netdev_priv(netdev);
8963 struct i40e_vsi *vsi = np->vsi;
8964 struct i40e_pf *pf = vsi->back;
8967 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8968 i40e_pf_config_rss(pf);
8969 else if (!(features & NETIF_F_RXHASH) &&
8970 netdev->features & NETIF_F_RXHASH)
8971 i40e_clear_rss_lut(vsi);
8973 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8974 i40e_vlan_stripping_enable(vsi);
8976 i40e_vlan_stripping_disable(vsi);
8978 need_reset = i40e_set_ntuple(pf, features);
8981 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8987 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8988 * @pf: board private structure
8989 * @port: The UDP port to look up
8991 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8993 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8997 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8998 if (pf->udp_ports[i].index == port)
9006 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
9007 * @netdev: This physical port's netdev
9008 * @ti: Tunnel endpoint information
9010 static void i40e_udp_tunnel_add(struct net_device *netdev,
9011 struct udp_tunnel_info *ti)
9013 struct i40e_netdev_priv *np = netdev_priv(netdev);
9014 struct i40e_vsi *vsi = np->vsi;
9015 struct i40e_pf *pf = vsi->back;
9016 __be16 port = ti->port;
9020 idx = i40e_get_udp_port_idx(pf, port);
9022 /* Check if port already exists */
9023 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
9024 netdev_info(netdev, "port %d already offloaded\n",
9029 /* Now check if there is space to add the new port */
9030 next_idx = i40e_get_udp_port_idx(pf, 0);
9032 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
9033 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
9039 case UDP_TUNNEL_TYPE_VXLAN:
9040 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
9042 case UDP_TUNNEL_TYPE_GENEVE:
9043 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
9045 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
9051 /* New port: add it and mark its index in the bitmap */
9052 pf->udp_ports[next_idx].index = port;
9053 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
9054 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9058 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
9059 * @netdev: This physical port's netdev
9060 * @ti: Tunnel endpoint information
9062 static void i40e_udp_tunnel_del(struct net_device *netdev,
9063 struct udp_tunnel_info *ti)
9065 struct i40e_netdev_priv *np = netdev_priv(netdev);
9066 struct i40e_vsi *vsi = np->vsi;
9067 struct i40e_pf *pf = vsi->back;
9068 __be16 port = ti->port;
9071 idx = i40e_get_udp_port_idx(pf, port);
9073 /* Check if port already exists */
9074 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
9078 case UDP_TUNNEL_TYPE_VXLAN:
9079 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
9082 case UDP_TUNNEL_TYPE_GENEVE:
9083 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
9090 /* if port exists, set it to 0 (mark for deletion)
9091 * and make it pending
9093 pf->udp_ports[idx].index = 0;
9094 pf->pending_udp_bitmap |= BIT_ULL(idx);
9095 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9099 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
9103 static int i40e_get_phys_port_id(struct net_device *netdev,
9104 struct netdev_phys_item_id *ppid)
9106 struct i40e_netdev_priv *np = netdev_priv(netdev);
9107 struct i40e_pf *pf = np->vsi->back;
9108 struct i40e_hw *hw = &pf->hw;
9110 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
9113 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
9114 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
9120 * i40e_ndo_fdb_add - add an entry to the hardware database
9121 * @ndm: the input from the stack
9122 * @tb: pointer to array of nladdr (unused)
9123 * @dev: the net device pointer
9124 * @addr: the MAC address entry being added
9125 * @flags: instructions from stack about fdb operation
9127 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9128 struct net_device *dev,
9129 const unsigned char *addr, u16 vid,
9132 struct i40e_netdev_priv *np = netdev_priv(dev);
9133 struct i40e_pf *pf = np->vsi->back;
9136 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
9140 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
9144 /* Hardware does not support aging addresses so if a
9145 * ndm_state is given only allow permanent addresses
9147 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
9148 netdev_info(dev, "FDB only supports static addresses\n");
9152 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
9153 err = dev_uc_add_excl(dev, addr);
9154 else if (is_multicast_ether_addr(addr))
9155 err = dev_mc_add_excl(dev, addr);
9159 /* Only return duplicate errors if NLM_F_EXCL is set */
9160 if (err == -EEXIST && !(flags & NLM_F_EXCL))
9167 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
9168 * @dev: the netdev being configured
9169 * @nlh: RTNL message
9171 * Inserts a new hardware bridge if not already created and
9172 * enables the bridging mode requested (VEB or VEPA). If the
9173 * hardware bridge has already been inserted and the request
9174 * is to change the mode then that requires a PF reset to
9175 * allow rebuild of the components with required hardware
9176 * bridge mode enabled.
9178 static int i40e_ndo_bridge_setlink(struct net_device *dev,
9179 struct nlmsghdr *nlh,
9182 struct i40e_netdev_priv *np = netdev_priv(dev);
9183 struct i40e_vsi *vsi = np->vsi;
9184 struct i40e_pf *pf = vsi->back;
9185 struct i40e_veb *veb = NULL;
9186 struct nlattr *attr, *br_spec;
9189 /* Only for PF VSI for now */
9190 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9193 /* Find the HW bridge for PF VSI */
9194 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9195 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9199 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9201 nla_for_each_nested(attr, br_spec, rem) {
9204 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9207 mode = nla_get_u16(attr);
9208 if ((mode != BRIDGE_MODE_VEPA) &&
9209 (mode != BRIDGE_MODE_VEB))
9212 /* Insert a new HW bridge */
9214 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9215 vsi->tc_config.enabled_tc);
9217 veb->bridge_mode = mode;
9218 i40e_config_bridge_mode(veb);
9220 /* No Bridge HW offload available */
9224 } else if (mode != veb->bridge_mode) {
9225 /* Existing HW bridge but different mode needs reset */
9226 veb->bridge_mode = mode;
9227 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9228 if (mode == BRIDGE_MODE_VEB)
9229 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9231 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9232 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9241 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9244 * @seq: RTNL message seq #
9245 * @dev: the netdev being configured
9246 * @filter_mask: unused
9247 * @nlflags: netlink flags passed in
9249 * Return the mode in which the hardware bridge is operating in
9252 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9253 struct net_device *dev,
9254 u32 __always_unused filter_mask,
9257 struct i40e_netdev_priv *np = netdev_priv(dev);
9258 struct i40e_vsi *vsi = np->vsi;
9259 struct i40e_pf *pf = vsi->back;
9260 struct i40e_veb *veb = NULL;
9263 /* Only for PF VSI for now */
9264 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9267 /* Find the HW bridge for the PF VSI */
9268 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9269 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9276 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9277 0, 0, nlflags, filter_mask, NULL);
9281 * i40e_features_check - Validate encapsulated packet conforms to limits
9283 * @dev: This physical port's netdev
9284 * @features: Offload features that the stack believes apply
9286 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9287 struct net_device *dev,
9288 netdev_features_t features)
9292 /* No point in doing any of this if neither checksum nor GSO are
9293 * being requested for this frame. We can rule out both by just
9294 * checking for CHECKSUM_PARTIAL
9296 if (skb->ip_summed != CHECKSUM_PARTIAL)
9299 /* We cannot support GSO if the MSS is going to be less than
9300 * 64 bytes. If it is then we need to drop support for GSO.
9302 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
9303 features &= ~NETIF_F_GSO_MASK;
9305 /* MACLEN can support at most 63 words */
9306 len = skb_network_header(skb) - skb->data;
9307 if (len & ~(63 * 2))
9310 /* IPLEN and EIPLEN can support at most 127 dwords */
9311 len = skb_transport_header(skb) - skb_network_header(skb);
9312 if (len & ~(127 * 4))
9315 if (skb->encapsulation) {
9316 /* L4TUNLEN can support 127 words */
9317 len = skb_inner_network_header(skb) - skb_transport_header(skb);
9318 if (len & ~(127 * 2))
9321 /* IPLEN can support at most 127 dwords */
9322 len = skb_inner_transport_header(skb) -
9323 skb_inner_network_header(skb);
9324 if (len & ~(127 * 4))
9328 /* No need to validate L4LEN as TCP is the only protocol with a
9329 * a flexible value and we support all possible values supported
9330 * by TCP, which is at most 15 dwords
9335 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9338 static const struct net_device_ops i40e_netdev_ops = {
9339 .ndo_open = i40e_open,
9340 .ndo_stop = i40e_close,
9341 .ndo_start_xmit = i40e_lan_xmit_frame,
9342 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9343 .ndo_set_rx_mode = i40e_set_rx_mode,
9344 .ndo_validate_addr = eth_validate_addr,
9345 .ndo_set_mac_address = i40e_set_mac,
9346 .ndo_change_mtu = i40e_change_mtu,
9347 .ndo_do_ioctl = i40e_ioctl,
9348 .ndo_tx_timeout = i40e_tx_timeout,
9349 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9350 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9351 #ifdef CONFIG_NET_POLL_CONTROLLER
9352 .ndo_poll_controller = i40e_netpoll,
9354 .ndo_setup_tc = __i40e_setup_tc,
9356 .ndo_fcoe_enable = i40e_fcoe_enable,
9357 .ndo_fcoe_disable = i40e_fcoe_disable,
9359 .ndo_set_features = i40e_set_features,
9360 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9361 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9362 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9363 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9364 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9365 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9366 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9367 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9368 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9369 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9370 .ndo_fdb_add = i40e_ndo_fdb_add,
9371 .ndo_features_check = i40e_features_check,
9372 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9373 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9377 * i40e_config_netdev - Setup the netdev flags
9378 * @vsi: the VSI being configured
9380 * Returns 0 on success, negative value on failure
9382 static int i40e_config_netdev(struct i40e_vsi *vsi)
9384 struct i40e_pf *pf = vsi->back;
9385 struct i40e_hw *hw = &pf->hw;
9386 struct i40e_netdev_priv *np;
9387 struct net_device *netdev;
9388 u8 broadcast[ETH_ALEN];
9389 u8 mac_addr[ETH_ALEN];
9392 etherdev_size = sizeof(struct i40e_netdev_priv);
9393 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9397 vsi->netdev = netdev;
9398 np = netdev_priv(netdev);
9401 netdev->hw_enc_features |= NETIF_F_SG |
9405 NETIF_F_SOFT_FEATURES |
9410 NETIF_F_GSO_GRE_CSUM |
9411 NETIF_F_GSO_IPXIP4 |
9412 NETIF_F_GSO_IPXIP6 |
9413 NETIF_F_GSO_UDP_TUNNEL |
9414 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9415 NETIF_F_GSO_PARTIAL |
9421 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9422 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9424 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9426 /* record features VLANs can make use of */
9427 netdev->vlan_features |= netdev->hw_enc_features |
9428 NETIF_F_TSO_MANGLEID;
9430 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9431 netdev->hw_features |= NETIF_F_NTUPLE;
9433 netdev->hw_features |= netdev->hw_enc_features |
9434 NETIF_F_HW_VLAN_CTAG_TX |
9435 NETIF_F_HW_VLAN_CTAG_RX;
9437 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9438 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9440 if (vsi->type == I40E_VSI_MAIN) {
9441 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9442 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9443 /* The following steps are necessary to prevent reception
9444 * of tagged packets - some older NVM configurations load a
9445 * default a MAC-VLAN filter that accepts any tagged packet
9446 * which must be replaced by a normal filter.
9448 i40e_rm_default_mac_filter(vsi, mac_addr);
9449 spin_lock_bh(&vsi->mac_filter_hash_lock);
9450 i40e_add_mac_filter(vsi, mac_addr);
9451 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9453 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9454 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9455 pf->vsi[pf->lan_vsi]->netdev->name);
9456 random_ether_addr(mac_addr);
9458 spin_lock_bh(&vsi->mac_filter_hash_lock);
9459 i40e_add_mac_filter(vsi, mac_addr);
9460 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9463 /* Add the broadcast filter so that we initially will receive
9464 * broadcast packets. Note that when a new VLAN is first added the
9465 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
9466 * specific filters as part of transitioning into "vlan" operation.
9467 * When more VLANs are added, the driver will copy each existing MAC
9468 * filter and add it for the new VLAN.
9470 * Broadcast filters are handled specially by
9471 * i40e_sync_filters_subtask, as the driver must to set the broadcast
9472 * promiscuous bit instead of adding this directly as a MAC/VLAN
9473 * filter. The subtask will update the correct broadcast promiscuous
9474 * bits as VLANs become active or inactive.
9476 eth_broadcast_addr(broadcast);
9477 spin_lock_bh(&vsi->mac_filter_hash_lock);
9478 i40e_add_mac_filter(vsi, broadcast);
9479 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9481 ether_addr_copy(netdev->dev_addr, mac_addr);
9482 ether_addr_copy(netdev->perm_addr, mac_addr);
9484 netdev->priv_flags |= IFF_UNICAST_FLT;
9485 netdev->priv_flags |= IFF_SUPP_NOFCS;
9486 /* Setup netdev TC information */
9487 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9489 netdev->netdev_ops = &i40e_netdev_ops;
9490 netdev->watchdog_timeo = 5 * HZ;
9491 i40e_set_ethtool_ops(netdev);
9493 i40e_fcoe_config_netdev(netdev, vsi);
9496 /* MTU range: 68 - 9706 */
9497 netdev->min_mtu = ETH_MIN_MTU;
9498 netdev->max_mtu = I40E_MAX_RXBUFFER -
9499 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9505 * i40e_vsi_delete - Delete a VSI from the switch
9506 * @vsi: the VSI being removed
9508 * Returns 0 on success, negative value on failure
9510 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9512 /* remove default VSI is not allowed */
9513 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9516 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9520 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9521 * @vsi: the VSI being queried
9523 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9525 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9527 struct i40e_veb *veb;
9528 struct i40e_pf *pf = vsi->back;
9530 /* Uplink is not a bridge so default to VEB */
9531 if (vsi->veb_idx == I40E_NO_VEB)
9534 veb = pf->veb[vsi->veb_idx];
9536 dev_info(&pf->pdev->dev,
9537 "There is no veb associated with the bridge\n");
9541 /* Uplink is a bridge in VEPA mode */
9542 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9545 /* Uplink is a bridge in VEB mode */
9549 /* VEPA is now default bridge, so return 0 */
9554 * i40e_add_vsi - Add a VSI to the switch
9555 * @vsi: the VSI being configured
9557 * This initializes a VSI context depending on the VSI type to be added and
9558 * passes it down to the add_vsi aq command.
9560 static int i40e_add_vsi(struct i40e_vsi *vsi)
9563 struct i40e_pf *pf = vsi->back;
9564 struct i40e_hw *hw = &pf->hw;
9565 struct i40e_vsi_context ctxt;
9566 struct i40e_mac_filter *f;
9567 struct hlist_node *h;
9570 u8 enabled_tc = 0x1; /* TC0 enabled */
9573 memset(&ctxt, 0, sizeof(ctxt));
9574 switch (vsi->type) {
9576 /* The PF's main VSI is already setup as part of the
9577 * device initialization, so we'll not bother with
9578 * the add_vsi call, but we will retrieve the current
9581 ctxt.seid = pf->main_vsi_seid;
9582 ctxt.pf_num = pf->hw.pf_id;
9584 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9585 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9587 dev_info(&pf->pdev->dev,
9588 "couldn't get PF vsi config, err %s aq_err %s\n",
9589 i40e_stat_str(&pf->hw, ret),
9590 i40e_aq_str(&pf->hw,
9591 pf->hw.aq.asq_last_status));
9594 vsi->info = ctxt.info;
9595 vsi->info.valid_sections = 0;
9597 vsi->seid = ctxt.seid;
9598 vsi->id = ctxt.vsi_number;
9600 enabled_tc = i40e_pf_get_tc_map(pf);
9602 /* MFP mode setup queue map and update VSI */
9603 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9604 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9605 memset(&ctxt, 0, sizeof(ctxt));
9606 ctxt.seid = pf->main_vsi_seid;
9607 ctxt.pf_num = pf->hw.pf_id;
9609 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9610 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9612 dev_info(&pf->pdev->dev,
9613 "update vsi failed, err %s aq_err %s\n",
9614 i40e_stat_str(&pf->hw, ret),
9615 i40e_aq_str(&pf->hw,
9616 pf->hw.aq.asq_last_status));
9620 /* update the local VSI info queue map */
9621 i40e_vsi_update_queue_map(vsi, &ctxt);
9622 vsi->info.valid_sections = 0;
9624 /* Default/Main VSI is only enabled for TC0
9625 * reconfigure it to enable all TCs that are
9626 * available on the port in SFP mode.
9627 * For MFP case the iSCSI PF would use this
9628 * flow to enable LAN+iSCSI TC.
9630 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9632 dev_info(&pf->pdev->dev,
9633 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9635 i40e_stat_str(&pf->hw, ret),
9636 i40e_aq_str(&pf->hw,
9637 pf->hw.aq.asq_last_status));
9644 ctxt.pf_num = hw->pf_id;
9646 ctxt.uplink_seid = vsi->uplink_seid;
9647 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9648 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9649 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9650 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9651 ctxt.info.valid_sections |=
9652 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9653 ctxt.info.switch_id =
9654 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9656 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9659 case I40E_VSI_VMDQ2:
9660 ctxt.pf_num = hw->pf_id;
9662 ctxt.uplink_seid = vsi->uplink_seid;
9663 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9664 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9666 /* This VSI is connected to VEB so the switch_id
9667 * should be set to zero by default.
9669 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9670 ctxt.info.valid_sections |=
9671 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9672 ctxt.info.switch_id =
9673 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9676 /* Setup the VSI tx/rx queue map for TC0 only for now */
9677 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9680 case I40E_VSI_SRIOV:
9681 ctxt.pf_num = hw->pf_id;
9682 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9683 ctxt.uplink_seid = vsi->uplink_seid;
9684 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9685 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9687 /* This VSI is connected to VEB so the switch_id
9688 * should be set to zero by default.
9690 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9691 ctxt.info.valid_sections |=
9692 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9693 ctxt.info.switch_id =
9694 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9697 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9698 ctxt.info.valid_sections |=
9699 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9700 ctxt.info.queueing_opt_flags |=
9701 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9702 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9705 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9706 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9707 if (pf->vf[vsi->vf_id].spoofchk) {
9708 ctxt.info.valid_sections |=
9709 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9710 ctxt.info.sec_flags |=
9711 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9712 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9714 /* Setup the VSI tx/rx queue map for TC0 only for now */
9715 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9720 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9722 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9727 #endif /* I40E_FCOE */
9728 case I40E_VSI_IWARP:
9729 /* send down message to iWARP */
9736 if (vsi->type != I40E_VSI_MAIN) {
9737 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9739 dev_info(&vsi->back->pdev->dev,
9740 "add vsi failed, err %s aq_err %s\n",
9741 i40e_stat_str(&pf->hw, ret),
9742 i40e_aq_str(&pf->hw,
9743 pf->hw.aq.asq_last_status));
9747 vsi->info = ctxt.info;
9748 vsi->info.valid_sections = 0;
9749 vsi->seid = ctxt.seid;
9750 vsi->id = ctxt.vsi_number;
9753 vsi->active_filters = 0;
9754 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9755 spin_lock_bh(&vsi->mac_filter_hash_lock);
9756 /* If macvlan filters already exist, force them to get loaded */
9757 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
9758 f->state = I40E_FILTER_NEW;
9761 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9764 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9765 pf->flags |= I40E_FLAG_FILTER_SYNC;
9768 /* Update VSI BW information */
9769 ret = i40e_vsi_get_bw_info(vsi);
9771 dev_info(&pf->pdev->dev,
9772 "couldn't get vsi bw info, err %s aq_err %s\n",
9773 i40e_stat_str(&pf->hw, ret),
9774 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9775 /* VSI is already added so not tearing that up */
9784 * i40e_vsi_release - Delete a VSI and free its resources
9785 * @vsi: the VSI being removed
9787 * Returns 0 on success or < 0 on error
9789 int i40e_vsi_release(struct i40e_vsi *vsi)
9791 struct i40e_mac_filter *f;
9792 struct hlist_node *h;
9793 struct i40e_veb *veb = NULL;
9800 /* release of a VEB-owner or last VSI is not allowed */
9801 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9802 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9803 vsi->seid, vsi->uplink_seid);
9806 if (vsi == pf->vsi[pf->lan_vsi] &&
9807 !test_bit(__I40E_DOWN, &pf->state)) {
9808 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9812 uplink_seid = vsi->uplink_seid;
9813 if (vsi->type != I40E_VSI_SRIOV) {
9814 if (vsi->netdev_registered) {
9815 vsi->netdev_registered = false;
9817 /* results in a call to i40e_close() */
9818 unregister_netdev(vsi->netdev);
9821 i40e_vsi_close(vsi);
9823 i40e_vsi_disable_irq(vsi);
9826 spin_lock_bh(&vsi->mac_filter_hash_lock);
9828 /* clear the sync flag on all filters */
9830 __dev_uc_unsync(vsi->netdev, NULL);
9831 __dev_mc_unsync(vsi->netdev, NULL);
9834 /* make sure any remaining filters are marked for deletion */
9835 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
9836 __i40e_del_filter(vsi, f);
9838 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9840 i40e_sync_vsi_filters(vsi);
9842 i40e_vsi_delete(vsi);
9843 i40e_vsi_free_q_vectors(vsi);
9845 free_netdev(vsi->netdev);
9848 i40e_vsi_clear_rings(vsi);
9849 i40e_vsi_clear(vsi);
9851 /* If this was the last thing on the VEB, except for the
9852 * controlling VSI, remove the VEB, which puts the controlling
9853 * VSI onto the next level down in the switch.
9855 * Well, okay, there's one more exception here: don't remove
9856 * the orphan VEBs yet. We'll wait for an explicit remove request
9857 * from up the network stack.
9859 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9861 pf->vsi[i]->uplink_seid == uplink_seid &&
9862 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9863 n++; /* count the VSIs */
9866 for (i = 0; i < I40E_MAX_VEB; i++) {
9869 if (pf->veb[i]->uplink_seid == uplink_seid)
9870 n++; /* count the VEBs */
9871 if (pf->veb[i]->seid == uplink_seid)
9874 if (n == 0 && veb && veb->uplink_seid != 0)
9875 i40e_veb_release(veb);
9881 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9882 * @vsi: ptr to the VSI
9884 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9885 * corresponding SW VSI structure and initializes num_queue_pairs for the
9886 * newly allocated VSI.
9888 * Returns 0 on success or negative on failure
9890 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9893 struct i40e_pf *pf = vsi->back;
9895 if (vsi->q_vectors[0]) {
9896 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9901 if (vsi->base_vector) {
9902 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9903 vsi->seid, vsi->base_vector);
9907 ret = i40e_vsi_alloc_q_vectors(vsi);
9909 dev_info(&pf->pdev->dev,
9910 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9911 vsi->num_q_vectors, vsi->seid, ret);
9912 vsi->num_q_vectors = 0;
9913 goto vector_setup_out;
9916 /* In Legacy mode, we do not have to get any other vector since we
9917 * piggyback on the misc/ICR0 for queue interrupts.
9919 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9921 if (vsi->num_q_vectors)
9922 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9923 vsi->num_q_vectors, vsi->idx);
9924 if (vsi->base_vector < 0) {
9925 dev_info(&pf->pdev->dev,
9926 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9927 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9928 i40e_vsi_free_q_vectors(vsi);
9930 goto vector_setup_out;
9938 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9939 * @vsi: pointer to the vsi.
9941 * This re-allocates a vsi's queue resources.
9943 * Returns pointer to the successfully allocated and configured VSI sw struct
9944 * on success, otherwise returns NULL on failure.
9946 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9957 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9958 i40e_vsi_clear_rings(vsi);
9960 i40e_vsi_free_arrays(vsi, false);
9961 i40e_set_num_rings_in_vsi(vsi);
9962 ret = i40e_vsi_alloc_arrays(vsi, false);
9966 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9968 dev_info(&pf->pdev->dev,
9969 "failed to get tracking for %d queues for VSI %d err %d\n",
9970 vsi->alloc_queue_pairs, vsi->seid, ret);
9973 vsi->base_queue = ret;
9975 /* Update the FW view of the VSI. Force a reset of TC and queue
9976 * layout configurations.
9978 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9979 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9980 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9981 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9982 if (vsi->type == I40E_VSI_MAIN)
9983 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9985 /* assign it some queues */
9986 ret = i40e_alloc_rings(vsi);
9990 /* map all of the rings to the q_vectors */
9991 i40e_vsi_map_rings_to_vectors(vsi);
9995 i40e_vsi_free_q_vectors(vsi);
9996 if (vsi->netdev_registered) {
9997 vsi->netdev_registered = false;
9998 unregister_netdev(vsi->netdev);
9999 free_netdev(vsi->netdev);
10000 vsi->netdev = NULL;
10002 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10004 i40e_vsi_clear(vsi);
10009 * i40e_vsi_setup - Set up a VSI by a given type
10010 * @pf: board private structure
10012 * @uplink_seid: the switch element to link to
10013 * @param1: usage depends upon VSI type. For VF types, indicates VF id
10015 * This allocates the sw VSI structure and its queue resources, then add a VSI
10016 * to the identified VEB.
10018 * Returns pointer to the successfully allocated and configure VSI sw struct on
10019 * success, otherwise returns NULL on failure.
10021 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
10022 u16 uplink_seid, u32 param1)
10024 struct i40e_vsi *vsi = NULL;
10025 struct i40e_veb *veb = NULL;
10029 /* The requested uplink_seid must be either
10030 * - the PF's port seid
10031 * no VEB is needed because this is the PF
10032 * or this is a Flow Director special case VSI
10033 * - seid of an existing VEB
10034 * - seid of a VSI that owns an existing VEB
10035 * - seid of a VSI that doesn't own a VEB
10036 * a new VEB is created and the VSI becomes the owner
10037 * - seid of the PF VSI, which is what creates the first VEB
10038 * this is a special case of the previous
10040 * Find which uplink_seid we were given and create a new VEB if needed
10042 for (i = 0; i < I40E_MAX_VEB; i++) {
10043 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
10049 if (!veb && uplink_seid != pf->mac_seid) {
10051 for (i = 0; i < pf->num_alloc_vsi; i++) {
10052 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
10058 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
10063 if (vsi->uplink_seid == pf->mac_seid)
10064 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
10065 vsi->tc_config.enabled_tc);
10066 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
10067 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
10068 vsi->tc_config.enabled_tc);
10070 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
10071 dev_info(&vsi->back->pdev->dev,
10072 "New VSI creation error, uplink seid of LAN VSI expected.\n");
10075 /* We come up by default in VEPA mode if SRIOV is not
10076 * already enabled, in which case we can't force VEPA
10079 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
10080 veb->bridge_mode = BRIDGE_MODE_VEPA;
10081 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
10083 i40e_config_bridge_mode(veb);
10085 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
10086 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
10090 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
10094 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10095 uplink_seid = veb->seid;
10098 /* get vsi sw struct */
10099 v_idx = i40e_vsi_mem_alloc(pf, type);
10102 vsi = pf->vsi[v_idx];
10106 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
10108 if (type == I40E_VSI_MAIN)
10109 pf->lan_vsi = v_idx;
10110 else if (type == I40E_VSI_SRIOV)
10111 vsi->vf_id = param1;
10112 /* assign it some queues */
10113 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
10116 dev_info(&pf->pdev->dev,
10117 "failed to get tracking for %d queues for VSI %d err=%d\n",
10118 vsi->alloc_queue_pairs, vsi->seid, ret);
10121 vsi->base_queue = ret;
10123 /* get a VSI from the hardware */
10124 vsi->uplink_seid = uplink_seid;
10125 ret = i40e_add_vsi(vsi);
10129 switch (vsi->type) {
10130 /* setup the netdev if needed */
10131 case I40E_VSI_MAIN:
10132 /* Apply relevant filters if a platform-specific mac
10133 * address was selected.
10135 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
10136 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
10138 dev_warn(&pf->pdev->dev,
10139 "could not set up macaddr; err %d\n",
10143 case I40E_VSI_VMDQ2:
10144 case I40E_VSI_FCOE:
10145 ret = i40e_config_netdev(vsi);
10148 ret = register_netdev(vsi->netdev);
10151 vsi->netdev_registered = true;
10152 netif_carrier_off(vsi->netdev);
10153 #ifdef CONFIG_I40E_DCB
10154 /* Setup DCB netlink interface */
10155 i40e_dcbnl_setup(vsi);
10156 #endif /* CONFIG_I40E_DCB */
10159 case I40E_VSI_FDIR:
10160 /* set up vectors and rings if needed */
10161 ret = i40e_vsi_setup_vectors(vsi);
10165 ret = i40e_alloc_rings(vsi);
10169 /* map all of the rings to the q_vectors */
10170 i40e_vsi_map_rings_to_vectors(vsi);
10172 i40e_vsi_reset_stats(vsi);
10176 /* no netdev or rings for the other VSI types */
10180 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
10181 (vsi->type == I40E_VSI_VMDQ2)) {
10182 ret = i40e_vsi_config_rss(vsi);
10187 i40e_vsi_free_q_vectors(vsi);
10189 if (vsi->netdev_registered) {
10190 vsi->netdev_registered = false;
10191 unregister_netdev(vsi->netdev);
10192 free_netdev(vsi->netdev);
10193 vsi->netdev = NULL;
10196 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10198 i40e_vsi_clear(vsi);
10204 * i40e_veb_get_bw_info - Query VEB BW information
10205 * @veb: the veb to query
10207 * Query the Tx scheduler BW configuration data for given VEB
10209 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
10211 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
10212 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
10213 struct i40e_pf *pf = veb->pf;
10214 struct i40e_hw *hw = &pf->hw;
10219 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
10222 dev_info(&pf->pdev->dev,
10223 "query veb bw config failed, err %s aq_err %s\n",
10224 i40e_stat_str(&pf->hw, ret),
10225 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10229 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
10232 dev_info(&pf->pdev->dev,
10233 "query veb bw ets config failed, err %s aq_err %s\n",
10234 i40e_stat_str(&pf->hw, ret),
10235 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10239 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10240 veb->bw_max_quanta = ets_data.tc_bw_max;
10241 veb->is_abs_credits = bw_data.absolute_credits_enable;
10242 veb->enabled_tc = ets_data.tc_valid_bits;
10243 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10244 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10245 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10246 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10247 veb->bw_tc_limit_credits[i] =
10248 le16_to_cpu(bw_data.tc_bw_limits[i]);
10249 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10257 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10258 * @pf: board private structure
10260 * On error: returns error code (negative)
10261 * On success: returns vsi index in PF (positive)
10263 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10266 struct i40e_veb *veb;
10269 /* Need to protect the allocation of switch elements at the PF level */
10270 mutex_lock(&pf->switch_mutex);
10272 /* VEB list may be fragmented if VEB creation/destruction has
10273 * been happening. We can afford to do a quick scan to look
10274 * for any free slots in the list.
10276 * find next empty veb slot, looping back around if necessary
10279 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10281 if (i >= I40E_MAX_VEB) {
10283 goto err_alloc_veb; /* out of VEB slots! */
10286 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10289 goto err_alloc_veb;
10293 veb->enabled_tc = 1;
10298 mutex_unlock(&pf->switch_mutex);
10303 * i40e_switch_branch_release - Delete a branch of the switch tree
10304 * @branch: where to start deleting
10306 * This uses recursion to find the tips of the branch to be
10307 * removed, deleting until we get back to and can delete this VEB.
10309 static void i40e_switch_branch_release(struct i40e_veb *branch)
10311 struct i40e_pf *pf = branch->pf;
10312 u16 branch_seid = branch->seid;
10313 u16 veb_idx = branch->idx;
10316 /* release any VEBs on this VEB - RECURSION */
10317 for (i = 0; i < I40E_MAX_VEB; i++) {
10320 if (pf->veb[i]->uplink_seid == branch->seid)
10321 i40e_switch_branch_release(pf->veb[i]);
10324 /* Release the VSIs on this VEB, but not the owner VSI.
10326 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10327 * the VEB itself, so don't use (*branch) after this loop.
10329 for (i = 0; i < pf->num_alloc_vsi; i++) {
10332 if (pf->vsi[i]->uplink_seid == branch_seid &&
10333 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10334 i40e_vsi_release(pf->vsi[i]);
10338 /* There's one corner case where the VEB might not have been
10339 * removed, so double check it here and remove it if needed.
10340 * This case happens if the veb was created from the debugfs
10341 * commands and no VSIs were added to it.
10343 if (pf->veb[veb_idx])
10344 i40e_veb_release(pf->veb[veb_idx]);
10348 * i40e_veb_clear - remove veb struct
10349 * @veb: the veb to remove
10351 static void i40e_veb_clear(struct i40e_veb *veb)
10357 struct i40e_pf *pf = veb->pf;
10359 mutex_lock(&pf->switch_mutex);
10360 if (pf->veb[veb->idx] == veb)
10361 pf->veb[veb->idx] = NULL;
10362 mutex_unlock(&pf->switch_mutex);
10369 * i40e_veb_release - Delete a VEB and free its resources
10370 * @veb: the VEB being removed
10372 void i40e_veb_release(struct i40e_veb *veb)
10374 struct i40e_vsi *vsi = NULL;
10375 struct i40e_pf *pf;
10380 /* find the remaining VSI and check for extras */
10381 for (i = 0; i < pf->num_alloc_vsi; i++) {
10382 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10388 dev_info(&pf->pdev->dev,
10389 "can't remove VEB %d with %d VSIs left\n",
10394 /* move the remaining VSI to uplink veb */
10395 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10396 if (veb->uplink_seid) {
10397 vsi->uplink_seid = veb->uplink_seid;
10398 if (veb->uplink_seid == pf->mac_seid)
10399 vsi->veb_idx = I40E_NO_VEB;
10401 vsi->veb_idx = veb->veb_idx;
10404 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10405 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10408 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10409 i40e_veb_clear(veb);
10413 * i40e_add_veb - create the VEB in the switch
10414 * @veb: the VEB to be instantiated
10415 * @vsi: the controlling VSI
10417 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10419 struct i40e_pf *pf = veb->pf;
10420 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10423 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10424 veb->enabled_tc, false,
10425 &veb->seid, enable_stats, NULL);
10427 /* get a VEB from the hardware */
10429 dev_info(&pf->pdev->dev,
10430 "couldn't add VEB, err %s aq_err %s\n",
10431 i40e_stat_str(&pf->hw, ret),
10432 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10436 /* get statistics counter */
10437 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10438 &veb->stats_idx, NULL, NULL, NULL);
10440 dev_info(&pf->pdev->dev,
10441 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10442 i40e_stat_str(&pf->hw, ret),
10443 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10446 ret = i40e_veb_get_bw_info(veb);
10448 dev_info(&pf->pdev->dev,
10449 "couldn't get VEB bw info, err %s aq_err %s\n",
10450 i40e_stat_str(&pf->hw, ret),
10451 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10452 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10456 vsi->uplink_seid = veb->seid;
10457 vsi->veb_idx = veb->idx;
10458 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10464 * i40e_veb_setup - Set up a VEB
10465 * @pf: board private structure
10466 * @flags: VEB setup flags
10467 * @uplink_seid: the switch element to link to
10468 * @vsi_seid: the initial VSI seid
10469 * @enabled_tc: Enabled TC bit-map
10471 * This allocates the sw VEB structure and links it into the switch
10472 * It is possible and legal for this to be a duplicate of an already
10473 * existing VEB. It is also possible for both uplink and vsi seids
10474 * to be zero, in order to create a floating VEB.
10476 * Returns pointer to the successfully allocated VEB sw struct on
10477 * success, otherwise returns NULL on failure.
10479 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10480 u16 uplink_seid, u16 vsi_seid,
10483 struct i40e_veb *veb, *uplink_veb = NULL;
10484 int vsi_idx, veb_idx;
10487 /* if one seid is 0, the other must be 0 to create a floating relay */
10488 if ((uplink_seid == 0 || vsi_seid == 0) &&
10489 (uplink_seid + vsi_seid != 0)) {
10490 dev_info(&pf->pdev->dev,
10491 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10492 uplink_seid, vsi_seid);
10496 /* make sure there is such a vsi and uplink */
10497 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10498 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10500 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10501 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10506 if (uplink_seid && uplink_seid != pf->mac_seid) {
10507 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10508 if (pf->veb[veb_idx] &&
10509 pf->veb[veb_idx]->seid == uplink_seid) {
10510 uplink_veb = pf->veb[veb_idx];
10515 dev_info(&pf->pdev->dev,
10516 "uplink seid %d not found\n", uplink_seid);
10521 /* get veb sw struct */
10522 veb_idx = i40e_veb_mem_alloc(pf);
10525 veb = pf->veb[veb_idx];
10526 veb->flags = flags;
10527 veb->uplink_seid = uplink_seid;
10528 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10529 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10531 /* create the VEB in the switch */
10532 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10535 if (vsi_idx == pf->lan_vsi)
10536 pf->lan_veb = veb->idx;
10541 i40e_veb_clear(veb);
10547 * i40e_setup_pf_switch_element - set PF vars based on switch type
10548 * @pf: board private structure
10549 * @ele: element we are building info from
10550 * @num_reported: total number of elements
10551 * @printconfig: should we print the contents
10553 * helper function to assist in extracting a few useful SEID values.
10555 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10556 struct i40e_aqc_switch_config_element_resp *ele,
10557 u16 num_reported, bool printconfig)
10559 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10560 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10561 u8 element_type = ele->element_type;
10562 u16 seid = le16_to_cpu(ele->seid);
10565 dev_info(&pf->pdev->dev,
10566 "type=%d seid=%d uplink=%d downlink=%d\n",
10567 element_type, seid, uplink_seid, downlink_seid);
10569 switch (element_type) {
10570 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10571 pf->mac_seid = seid;
10573 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10575 if (uplink_seid != pf->mac_seid)
10577 if (pf->lan_veb == I40E_NO_VEB) {
10580 /* find existing or else empty VEB */
10581 for (v = 0; v < I40E_MAX_VEB; v++) {
10582 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10587 if (pf->lan_veb == I40E_NO_VEB) {
10588 v = i40e_veb_mem_alloc(pf);
10595 pf->veb[pf->lan_veb]->seid = seid;
10596 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10597 pf->veb[pf->lan_veb]->pf = pf;
10598 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10600 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10601 if (num_reported != 1)
10603 /* This is immediately after a reset so we can assume this is
10606 pf->mac_seid = uplink_seid;
10607 pf->pf_seid = downlink_seid;
10608 pf->main_vsi_seid = seid;
10610 dev_info(&pf->pdev->dev,
10611 "pf_seid=%d main_vsi_seid=%d\n",
10612 pf->pf_seid, pf->main_vsi_seid);
10614 case I40E_SWITCH_ELEMENT_TYPE_PF:
10615 case I40E_SWITCH_ELEMENT_TYPE_VF:
10616 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10617 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10618 case I40E_SWITCH_ELEMENT_TYPE_PE:
10619 case I40E_SWITCH_ELEMENT_TYPE_PA:
10620 /* ignore these for now */
10623 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10624 element_type, seid);
10630 * i40e_fetch_switch_configuration - Get switch config from firmware
10631 * @pf: board private structure
10632 * @printconfig: should we print the contents
10634 * Get the current switch configuration from the device and
10635 * extract a few useful SEID values.
10637 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10639 struct i40e_aqc_get_switch_config_resp *sw_config;
10645 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10649 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10651 u16 num_reported, num_total;
10653 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10657 dev_info(&pf->pdev->dev,
10658 "get switch config failed err %s aq_err %s\n",
10659 i40e_stat_str(&pf->hw, ret),
10660 i40e_aq_str(&pf->hw,
10661 pf->hw.aq.asq_last_status));
10666 num_reported = le16_to_cpu(sw_config->header.num_reported);
10667 num_total = le16_to_cpu(sw_config->header.num_total);
10670 dev_info(&pf->pdev->dev,
10671 "header: %d reported %d total\n",
10672 num_reported, num_total);
10674 for (i = 0; i < num_reported; i++) {
10675 struct i40e_aqc_switch_config_element_resp *ele =
10676 &sw_config->element[i];
10678 i40e_setup_pf_switch_element(pf, ele, num_reported,
10681 } while (next_seid != 0);
10688 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10689 * @pf: board private structure
10690 * @reinit: if the Main VSI needs to re-initialized.
10692 * Returns 0 on success, negative value on failure
10694 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10699 /* find out what's out there already */
10700 ret = i40e_fetch_switch_configuration(pf, false);
10702 dev_info(&pf->pdev->dev,
10703 "couldn't fetch switch config, err %s aq_err %s\n",
10704 i40e_stat_str(&pf->hw, ret),
10705 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10708 i40e_pf_reset_stats(pf);
10710 /* set the switch config bit for the whole device to
10711 * support limited promisc or true promisc
10712 * when user requests promisc. The default is limited
10716 if ((pf->hw.pf_id == 0) &&
10717 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10718 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10720 if (pf->hw.pf_id == 0) {
10723 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10724 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10726 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10727 dev_info(&pf->pdev->dev,
10728 "couldn't set switch config bits, err %s aq_err %s\n",
10729 i40e_stat_str(&pf->hw, ret),
10730 i40e_aq_str(&pf->hw,
10731 pf->hw.aq.asq_last_status));
10732 /* not a fatal problem, just keep going */
10736 /* first time setup */
10737 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10738 struct i40e_vsi *vsi = NULL;
10741 /* Set up the PF VSI associated with the PF's main VSI
10742 * that is already in the HW switch
10744 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10745 uplink_seid = pf->veb[pf->lan_veb]->seid;
10747 uplink_seid = pf->mac_seid;
10748 if (pf->lan_vsi == I40E_NO_VSI)
10749 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10751 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10753 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10754 i40e_fdir_teardown(pf);
10758 /* force a reset of TC and queue layout configurations */
10759 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10761 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10762 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10763 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10765 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10767 i40e_fdir_sb_setup(pf);
10769 /* Setup static PF queue filter control settings */
10770 ret = i40e_setup_pf_filter_control(pf);
10772 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10774 /* Failure here should not stop continuing other steps */
10777 /* enable RSS in the HW, even for only one queue, as the stack can use
10780 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10781 i40e_pf_config_rss(pf);
10783 /* fill in link information and enable LSE reporting */
10784 i40e_link_event(pf);
10786 /* Initialize user-specific link properties */
10787 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10788 I40E_AQ_AN_COMPLETED) ? true : false);
10796 * i40e_determine_queue_usage - Work out queue distribution
10797 * @pf: board private structure
10799 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10803 pf->num_lan_qps = 0;
10805 pf->num_fcoe_qps = 0;
10808 /* Find the max queues to be put into basic use. We'll always be
10809 * using TC0, whether or not DCB is running, and TC0 will get the
10812 queues_left = pf->hw.func_caps.num_tx_qp;
10814 if ((queues_left == 1) ||
10815 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10816 /* one qp for PF, no queues for anything else */
10818 pf->alloc_rss_size = pf->num_lan_qps = 1;
10820 /* make sure all the fancies are disabled */
10821 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10822 I40E_FLAG_IWARP_ENABLED |
10824 I40E_FLAG_FCOE_ENABLED |
10826 I40E_FLAG_FD_SB_ENABLED |
10827 I40E_FLAG_FD_ATR_ENABLED |
10828 I40E_FLAG_DCB_CAPABLE |
10829 I40E_FLAG_DCB_ENABLED |
10830 I40E_FLAG_SRIOV_ENABLED |
10831 I40E_FLAG_VMDQ_ENABLED);
10832 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10833 I40E_FLAG_FD_SB_ENABLED |
10834 I40E_FLAG_FD_ATR_ENABLED |
10835 I40E_FLAG_DCB_CAPABLE))) {
10836 /* one qp for PF */
10837 pf->alloc_rss_size = pf->num_lan_qps = 1;
10838 queues_left -= pf->num_lan_qps;
10840 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10841 I40E_FLAG_IWARP_ENABLED |
10843 I40E_FLAG_FCOE_ENABLED |
10845 I40E_FLAG_FD_SB_ENABLED |
10846 I40E_FLAG_FD_ATR_ENABLED |
10847 I40E_FLAG_DCB_ENABLED |
10848 I40E_FLAG_VMDQ_ENABLED);
10850 /* Not enough queues for all TCs */
10851 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10852 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10853 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10854 I40E_FLAG_DCB_ENABLED);
10855 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10857 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10858 num_online_cpus());
10859 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10860 pf->hw.func_caps.num_tx_qp);
10862 queues_left -= pf->num_lan_qps;
10866 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10867 if (I40E_DEFAULT_FCOE <= queues_left) {
10868 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10869 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10870 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10872 pf->num_fcoe_qps = 0;
10873 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10874 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10877 queues_left -= pf->num_fcoe_qps;
10881 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10882 if (queues_left > 1) {
10883 queues_left -= 1; /* save 1 queue for FD */
10885 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10886 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10890 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10891 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10892 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10893 (queues_left / pf->num_vf_qps));
10894 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10897 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10898 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10899 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10900 (queues_left / pf->num_vmdq_qps));
10901 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10904 pf->queues_left = queues_left;
10905 dev_dbg(&pf->pdev->dev,
10906 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10907 pf->hw.func_caps.num_tx_qp,
10908 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10909 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10910 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10913 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10918 * i40e_setup_pf_filter_control - Setup PF static filter control
10919 * @pf: PF to be setup
10921 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10922 * settings. If PE/FCoE are enabled then it will also set the per PF
10923 * based filter sizes required for them. It also enables Flow director,
10924 * ethertype and macvlan type filter settings for the pf.
10926 * Returns 0 on success, negative on failure
10928 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10930 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10932 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10934 /* Flow Director is enabled */
10935 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10936 settings->enable_fdir = true;
10938 /* Ethtype and MACVLAN filters enabled for PF */
10939 settings->enable_ethtype = true;
10940 settings->enable_macvlan = true;
10942 if (i40e_set_filter_control(&pf->hw, settings))
10948 #define INFO_STRING_LEN 255
10949 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10950 static void i40e_print_features(struct i40e_pf *pf)
10952 struct i40e_hw *hw = &pf->hw;
10956 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10960 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10961 #ifdef CONFIG_PCI_IOV
10962 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10964 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10965 pf->hw.func_caps.num_vsis,
10966 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10967 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10968 i += snprintf(&buf[i], REMAIN(i), " RSS");
10969 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10970 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10971 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10972 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10973 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10975 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10976 i += snprintf(&buf[i], REMAIN(i), " DCB");
10977 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10978 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10979 if (pf->flags & I40E_FLAG_PTP)
10980 i += snprintf(&buf[i], REMAIN(i), " PTP");
10982 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10983 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10985 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10986 i += snprintf(&buf[i], REMAIN(i), " VEB");
10988 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10990 dev_info(&pf->pdev->dev, "%s\n", buf);
10992 WARN_ON(i > INFO_STRING_LEN);
10996 * i40e_get_platform_mac_addr - get platform-specific MAC address
10998 * @pdev: PCI device information struct
10999 * @pf: board private structure
11001 * Look up the MAC address in Open Firmware on systems that support it,
11002 * and use IDPROM on SPARC if no OF address is found. On return, the
11003 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
11004 * has been selected.
11006 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
11008 pf->flags &= ~I40E_FLAG_PF_MAC;
11009 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
11010 pf->flags |= I40E_FLAG_PF_MAC;
11014 * i40e_probe - Device initialization routine
11015 * @pdev: PCI device information struct
11016 * @ent: entry in i40e_pci_tbl
11018 * i40e_probe initializes a PF identified by a pci_dev structure.
11019 * The OS initialization, configuring of the PF private structure,
11020 * and a hardware reset occur.
11022 * Returns 0 on success, negative on failure
11024 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
11026 struct i40e_aq_get_phy_abilities_resp abilities;
11027 struct i40e_pf *pf;
11028 struct i40e_hw *hw;
11029 static u16 pfs_found;
11037 err = pci_enable_device_mem(pdev);
11041 /* set up for high or low dma */
11042 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11044 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11046 dev_err(&pdev->dev,
11047 "DMA configuration failed: 0x%x\n", err);
11052 /* set up pci connections */
11053 err = pci_request_mem_regions(pdev, i40e_driver_name);
11055 dev_info(&pdev->dev,
11056 "pci_request_selected_regions failed %d\n", err);
11060 pci_enable_pcie_error_reporting(pdev);
11061 pci_set_master(pdev);
11063 /* Now that we have a PCI connection, we need to do the
11064 * low level device setup. This is primarily setting up
11065 * the Admin Queue structures and then querying for the
11066 * device's current profile information.
11068 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
11075 set_bit(__I40E_DOWN, &pf->state);
11080 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
11081 I40E_MAX_CSR_SPACE);
11083 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
11084 if (!hw->hw_addr) {
11086 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
11087 (unsigned int)pci_resource_start(pdev, 0),
11088 pf->ioremap_len, err);
11091 hw->vendor_id = pdev->vendor;
11092 hw->device_id = pdev->device;
11093 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
11094 hw->subsystem_vendor_id = pdev->subsystem_vendor;
11095 hw->subsystem_device_id = pdev->subsystem_device;
11096 hw->bus.device = PCI_SLOT(pdev->devfn);
11097 hw->bus.func = PCI_FUNC(pdev->devfn);
11098 hw->bus.bus_id = pdev->bus->number;
11099 pf->instance = pfs_found;
11101 /* set up the locks for the AQ, do this only once in probe
11102 * and destroy them only once in remove
11104 mutex_init(&hw->aq.asq_mutex);
11105 mutex_init(&hw->aq.arq_mutex);
11107 pf->msg_enable = netif_msg_init(debug,
11112 pf->hw.debug_mask = debug;
11114 /* do a special CORER for clearing PXE mode once at init */
11115 if (hw->revision_id == 0 &&
11116 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
11117 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
11122 i40e_clear_pxe_mode(hw);
11125 /* Reset here to make sure all is clean and to define PF 'n' */
11127 err = i40e_pf_reset(hw);
11129 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
11134 hw->aq.num_arq_entries = I40E_AQ_LEN;
11135 hw->aq.num_asq_entries = I40E_AQ_LEN;
11136 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11137 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11138 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
11140 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
11142 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
11144 err = i40e_init_shared_code(hw);
11146 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
11151 /* set up a default setting for link flow control */
11152 pf->hw.fc.requested_mode = I40E_FC_NONE;
11154 err = i40e_init_adminq(hw);
11156 if (err == I40E_ERR_FIRMWARE_API_VERSION)
11157 dev_info(&pdev->dev,
11158 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
11160 dev_info(&pdev->dev,
11161 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
11166 /* provide nvm, fw, api versions */
11167 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
11168 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
11169 hw->aq.api_maj_ver, hw->aq.api_min_ver,
11170 i40e_nvm_version_str(hw));
11172 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
11173 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
11174 dev_info(&pdev->dev,
11175 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
11176 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
11177 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
11178 dev_info(&pdev->dev,
11179 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
11181 i40e_verify_eeprom(pf);
11183 /* Rev 0 hardware was never productized */
11184 if (hw->revision_id < 1)
11185 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
11187 i40e_clear_pxe_mode(hw);
11188 err = i40e_get_capabilities(pf);
11190 goto err_adminq_setup;
11192 err = i40e_sw_init(pf);
11194 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
11198 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
11199 hw->func_caps.num_rx_qp,
11200 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
11202 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
11203 goto err_init_lan_hmc;
11206 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
11208 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
11210 goto err_configure_lan_hmc;
11213 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
11214 * Ignore error return codes because if it was already disabled via
11215 * hardware settings this will fail
11217 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
11218 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
11219 i40e_aq_stop_lldp(hw, true, NULL);
11222 i40e_get_mac_addr(hw, hw->mac.addr);
11223 /* allow a platform config to override the HW addr */
11224 i40e_get_platform_mac_addr(pdev, pf);
11225 if (!is_valid_ether_addr(hw->mac.addr)) {
11226 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
11230 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
11231 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
11232 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
11233 if (is_valid_ether_addr(hw->mac.port_addr))
11234 pf->flags |= I40E_FLAG_PORT_ID_VALID;
11236 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
11238 dev_info(&pdev->dev,
11239 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
11240 if (!is_valid_ether_addr(hw->mac.san_addr)) {
11241 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
11243 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
11245 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
11246 #endif /* I40E_FCOE */
11248 pci_set_drvdata(pdev, pf);
11249 pci_save_state(pdev);
11250 #ifdef CONFIG_I40E_DCB
11251 err = i40e_init_pf_dcb(pf);
11253 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
11254 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
11255 /* Continue without DCB enabled */
11257 #endif /* CONFIG_I40E_DCB */
11259 /* set up periodic task facility */
11260 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11261 pf->service_timer_period = HZ;
11263 INIT_WORK(&pf->service_task, i40e_service_task);
11264 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11265 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
11267 /* NVM bit on means WoL disabled for the port */
11268 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11269 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11270 pf->wol_en = false;
11273 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11275 /* set up the main switch operations */
11276 i40e_determine_queue_usage(pf);
11277 err = i40e_init_interrupt_scheme(pf);
11279 goto err_switch_setup;
11281 /* The number of VSIs reported by the FW is the minimum guaranteed
11282 * to us; HW supports far more and we share the remaining pool with
11283 * the other PFs. We allocate space for more than the guarantee with
11284 * the understanding that we might not get them all later.
11286 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11287 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11289 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11291 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11292 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11296 goto err_switch_setup;
11299 #ifdef CONFIG_PCI_IOV
11300 /* prep for VF support */
11301 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11302 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11303 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11304 if (pci_num_vf(pdev))
11305 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11308 err = i40e_setup_pf_switch(pf, false);
11310 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11314 /* Make sure flow control is set according to current settings */
11315 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11316 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11317 dev_dbg(&pf->pdev->dev,
11318 "Set fc with err %s aq_err %s on get_phy_cap\n",
11319 i40e_stat_str(hw, err),
11320 i40e_aq_str(hw, hw->aq.asq_last_status));
11321 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11322 dev_dbg(&pf->pdev->dev,
11323 "Set fc with err %s aq_err %s on set_phy_config\n",
11324 i40e_stat_str(hw, err),
11325 i40e_aq_str(hw, hw->aq.asq_last_status));
11326 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11327 dev_dbg(&pf->pdev->dev,
11328 "Set fc with err %s aq_err %s on get_link_info\n",
11329 i40e_stat_str(hw, err),
11330 i40e_aq_str(hw, hw->aq.asq_last_status));
11332 /* if FDIR VSI was set up, start it now */
11333 for (i = 0; i < pf->num_alloc_vsi; i++) {
11334 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11335 i40e_vsi_open(pf->vsi[i]);
11340 /* The driver only wants link up/down and module qualification
11341 * reports from firmware. Note the negative logic.
11343 err = i40e_aq_set_phy_int_mask(&pf->hw,
11344 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11345 I40E_AQ_EVENT_MEDIA_NA |
11346 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11348 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11349 i40e_stat_str(&pf->hw, err),
11350 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11352 /* Reconfigure hardware for allowing smaller MSS in the case
11353 * of TSO, so that we avoid the MDD being fired and causing
11354 * a reset in the case of small MSS+TSO.
11356 val = rd32(hw, I40E_REG_MSS);
11357 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11358 val &= ~I40E_REG_MSS_MIN_MASK;
11359 val |= I40E_64BYTE_MSS;
11360 wr32(hw, I40E_REG_MSS, val);
11363 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11365 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11367 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11368 i40e_stat_str(&pf->hw, err),
11369 i40e_aq_str(&pf->hw,
11370 pf->hw.aq.asq_last_status));
11372 /* The main driver is (mostly) up and happy. We need to set this state
11373 * before setting up the misc vector or we get a race and the vector
11374 * ends up disabled forever.
11376 clear_bit(__I40E_DOWN, &pf->state);
11378 /* In case of MSIX we are going to setup the misc vector right here
11379 * to handle admin queue events etc. In case of legacy and MSI
11380 * the misc functionality and queue processing is combined in
11381 * the same vector and that gets setup at open.
11383 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11384 err = i40e_setup_misc_vector(pf);
11386 dev_info(&pdev->dev,
11387 "setup of misc vector failed: %d\n", err);
11392 #ifdef CONFIG_PCI_IOV
11393 /* prep for VF support */
11394 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11395 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11396 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11397 /* disable link interrupts for VFs */
11398 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11399 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11400 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11403 if (pci_num_vf(pdev)) {
11404 dev_info(&pdev->dev,
11405 "Active VFs found, allocating resources.\n");
11406 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11408 dev_info(&pdev->dev,
11409 "Error %d allocating resources for existing VFs\n",
11413 #endif /* CONFIG_PCI_IOV */
11415 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11416 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11417 pf->num_iwarp_msix,
11418 I40E_IWARP_IRQ_PILE_ID);
11419 if (pf->iwarp_base_vector < 0) {
11420 dev_info(&pdev->dev,
11421 "failed to get tracking for %d vectors for IWARP err=%d\n",
11422 pf->num_iwarp_msix, pf->iwarp_base_vector);
11423 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11427 i40e_dbg_pf_init(pf);
11429 /* tell the firmware that we're starting */
11430 i40e_send_version(pf);
11432 /* since everything's happy, start the service_task timer */
11433 mod_timer(&pf->service_timer,
11434 round_jiffies(jiffies + pf->service_timer_period));
11436 /* add this PF to client device list and launch a client service task */
11437 err = i40e_lan_add_device(pf);
11439 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11443 /* create FCoE interface */
11444 i40e_fcoe_vsi_setup(pf);
11447 #define PCI_SPEED_SIZE 8
11448 #define PCI_WIDTH_SIZE 8
11449 /* Devices on the IOSF bus do not have this information
11450 * and will report PCI Gen 1 x 1 by default so don't bother
11453 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11454 char speed[PCI_SPEED_SIZE] = "Unknown";
11455 char width[PCI_WIDTH_SIZE] = "Unknown";
11457 /* Get the negotiated link width and speed from PCI config
11460 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11463 i40e_set_pci_config_data(hw, link_status);
11465 switch (hw->bus.speed) {
11466 case i40e_bus_speed_8000:
11467 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11468 case i40e_bus_speed_5000:
11469 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11470 case i40e_bus_speed_2500:
11471 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11475 switch (hw->bus.width) {
11476 case i40e_bus_width_pcie_x8:
11477 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11478 case i40e_bus_width_pcie_x4:
11479 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11480 case i40e_bus_width_pcie_x2:
11481 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11482 case i40e_bus_width_pcie_x1:
11483 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11488 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11491 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11492 hw->bus.speed < i40e_bus_speed_8000) {
11493 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11494 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11498 /* get the requested speeds from the fw */
11499 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11501 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11502 i40e_stat_str(&pf->hw, err),
11503 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11504 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11506 /* get the supported phy types from the fw */
11507 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11509 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11510 i40e_stat_str(&pf->hw, err),
11511 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11513 /* Add a filter to drop all Flow control frames from any VSI from being
11514 * transmitted. By doing so we stop a malicious VF from sending out
11515 * PAUSE or PFC frames and potentially controlling traffic for other
11517 * The FW can still send Flow control frames if enabled.
11519 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11520 pf->main_vsi_seid);
11522 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11523 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11524 pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS;
11525 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
11526 pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER;
11527 /* print a string summarizing features */
11528 i40e_print_features(pf);
11532 /* Unwind what we've done if something failed in the setup */
11534 set_bit(__I40E_DOWN, &pf->state);
11535 i40e_clear_interrupt_scheme(pf);
11538 i40e_reset_interrupt_capability(pf);
11539 del_timer_sync(&pf->service_timer);
11541 err_configure_lan_hmc:
11542 (void)i40e_shutdown_lan_hmc(hw);
11544 kfree(pf->qp_pile);
11548 iounmap(hw->hw_addr);
11552 pci_disable_pcie_error_reporting(pdev);
11553 pci_release_mem_regions(pdev);
11556 pci_disable_device(pdev);
11561 * i40e_remove - Device removal routine
11562 * @pdev: PCI device information struct
11564 * i40e_remove is called by the PCI subsystem to alert the driver
11565 * that is should release a PCI device. This could be caused by a
11566 * Hot-Plug event, or because the driver is going to be removed from
11569 static void i40e_remove(struct pci_dev *pdev)
11571 struct i40e_pf *pf = pci_get_drvdata(pdev);
11572 struct i40e_hw *hw = &pf->hw;
11573 i40e_status ret_code;
11576 i40e_dbg_pf_exit(pf);
11580 /* Disable RSS in hw */
11581 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11582 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11584 /* no more scheduling of any task */
11585 set_bit(__I40E_SUSPENDED, &pf->state);
11586 set_bit(__I40E_DOWN, &pf->state);
11587 if (pf->service_timer.data)
11588 del_timer_sync(&pf->service_timer);
11589 if (pf->service_task.func)
11590 cancel_work_sync(&pf->service_task);
11592 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11594 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11597 i40e_fdir_teardown(pf);
11599 /* If there is a switch structure or any orphans, remove them.
11600 * This will leave only the PF's VSI remaining.
11602 for (i = 0; i < I40E_MAX_VEB; i++) {
11606 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11607 pf->veb[i]->uplink_seid == 0)
11608 i40e_switch_branch_release(pf->veb[i]);
11611 /* Now we can shutdown the PF's VSI, just before we kill
11614 if (pf->vsi[pf->lan_vsi])
11615 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11617 /* remove attached clients */
11618 ret_code = i40e_lan_del_device(pf);
11620 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11624 /* shutdown and destroy the HMC */
11625 if (hw->hmc.hmc_obj) {
11626 ret_code = i40e_shutdown_lan_hmc(hw);
11628 dev_warn(&pdev->dev,
11629 "Failed to destroy the HMC resources: %d\n",
11633 /* shutdown the adminq */
11634 i40e_shutdown_adminq(hw);
11636 /* destroy the locks only once, here */
11637 mutex_destroy(&hw->aq.arq_mutex);
11638 mutex_destroy(&hw->aq.asq_mutex);
11640 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11641 i40e_clear_interrupt_scheme(pf);
11642 for (i = 0; i < pf->num_alloc_vsi; i++) {
11644 i40e_vsi_clear_rings(pf->vsi[i]);
11645 i40e_vsi_clear(pf->vsi[i]);
11650 for (i = 0; i < I40E_MAX_VEB; i++) {
11655 kfree(pf->qp_pile);
11658 iounmap(hw->hw_addr);
11660 pci_release_mem_regions(pdev);
11662 pci_disable_pcie_error_reporting(pdev);
11663 pci_disable_device(pdev);
11667 * i40e_pci_error_detected - warning that something funky happened in PCI land
11668 * @pdev: PCI device information struct
11670 * Called to warn that something happened and the error handling steps
11671 * are in progress. Allows the driver to quiesce things, be ready for
11674 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11675 enum pci_channel_state error)
11677 struct i40e_pf *pf = pci_get_drvdata(pdev);
11679 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11682 dev_info(&pdev->dev,
11683 "Cannot recover - error happened during device probe\n");
11684 return PCI_ERS_RESULT_DISCONNECT;
11687 /* shutdown all operations */
11688 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11690 i40e_prep_for_reset(pf);
11694 /* Request a slot reset */
11695 return PCI_ERS_RESULT_NEED_RESET;
11699 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11700 * @pdev: PCI device information struct
11702 * Called to find if the driver can work with the device now that
11703 * the pci slot has been reset. If a basic connection seems good
11704 * (registers are readable and have sane content) then return a
11705 * happy little PCI_ERS_RESULT_xxx.
11707 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11709 struct i40e_pf *pf = pci_get_drvdata(pdev);
11710 pci_ers_result_t result;
11714 dev_dbg(&pdev->dev, "%s\n", __func__);
11715 if (pci_enable_device_mem(pdev)) {
11716 dev_info(&pdev->dev,
11717 "Cannot re-enable PCI device after reset.\n");
11718 result = PCI_ERS_RESULT_DISCONNECT;
11720 pci_set_master(pdev);
11721 pci_restore_state(pdev);
11722 pci_save_state(pdev);
11723 pci_wake_from_d3(pdev, false);
11725 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11727 result = PCI_ERS_RESULT_RECOVERED;
11729 result = PCI_ERS_RESULT_DISCONNECT;
11732 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11734 dev_info(&pdev->dev,
11735 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11737 /* non-fatal, continue */
11744 * i40e_pci_error_resume - restart operations after PCI error recovery
11745 * @pdev: PCI device information struct
11747 * Called to allow the driver to bring things back up after PCI error
11748 * and/or reset recovery has finished.
11750 static void i40e_pci_error_resume(struct pci_dev *pdev)
11752 struct i40e_pf *pf = pci_get_drvdata(pdev);
11754 dev_dbg(&pdev->dev, "%s\n", __func__);
11755 if (test_bit(__I40E_SUSPENDED, &pf->state))
11759 i40e_handle_reset_warning(pf);
11764 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
11765 * using the mac_address_write admin q function
11766 * @pf: pointer to i40e_pf struct
11768 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
11770 struct i40e_hw *hw = &pf->hw;
11775 /* Get current MAC address in case it's an LAA */
11776 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
11777 ether_addr_copy(mac_addr,
11778 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
11780 dev_err(&pf->pdev->dev,
11781 "Failed to retrieve MAC address; using default\n");
11782 ether_addr_copy(mac_addr, hw->mac.addr);
11785 /* The FW expects the mac address write cmd to first be called with
11786 * one of these flags before calling it again with the multicast
11789 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
11791 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
11792 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
11794 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11796 dev_err(&pf->pdev->dev,
11797 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
11801 flags = I40E_AQC_MC_MAG_EN
11802 | I40E_AQC_WOL_PRESERVE_ON_PFR
11803 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
11804 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11806 dev_err(&pf->pdev->dev,
11807 "Failed to enable Multicast Magic Packet wake up\n");
11811 * i40e_shutdown - PCI callback for shutting down
11812 * @pdev: PCI device information struct
11814 static void i40e_shutdown(struct pci_dev *pdev)
11816 struct i40e_pf *pf = pci_get_drvdata(pdev);
11817 struct i40e_hw *hw = &pf->hw;
11819 set_bit(__I40E_SUSPENDED, &pf->state);
11820 set_bit(__I40E_DOWN, &pf->state);
11822 i40e_prep_for_reset(pf);
11825 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11826 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11828 del_timer_sync(&pf->service_timer);
11829 cancel_work_sync(&pf->service_task);
11830 i40e_fdir_teardown(pf);
11832 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11833 i40e_enable_mc_magic_wake(pf);
11836 i40e_prep_for_reset(pf);
11839 wr32(hw, I40E_PFPM_APM,
11840 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11841 wr32(hw, I40E_PFPM_WUFC,
11842 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11844 i40e_clear_interrupt_scheme(pf);
11846 if (system_state == SYSTEM_POWER_OFF) {
11847 pci_wake_from_d3(pdev, pf->wol_en);
11848 pci_set_power_state(pdev, PCI_D3hot);
11854 * i40e_suspend - PCI callback for moving to D3
11855 * @pdev: PCI device information struct
11857 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11859 struct i40e_pf *pf = pci_get_drvdata(pdev);
11860 struct i40e_hw *hw = &pf->hw;
11863 set_bit(__I40E_SUSPENDED, &pf->state);
11864 set_bit(__I40E_DOWN, &pf->state);
11866 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11867 i40e_enable_mc_magic_wake(pf);
11870 i40e_prep_for_reset(pf);
11873 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11874 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11876 i40e_stop_misc_vector(pf);
11878 retval = pci_save_state(pdev);
11882 pci_wake_from_d3(pdev, pf->wol_en);
11883 pci_set_power_state(pdev, PCI_D3hot);
11889 * i40e_resume - PCI callback for waking up from D3
11890 * @pdev: PCI device information struct
11892 static int i40e_resume(struct pci_dev *pdev)
11894 struct i40e_pf *pf = pci_get_drvdata(pdev);
11897 pci_set_power_state(pdev, PCI_D0);
11898 pci_restore_state(pdev);
11899 /* pci_restore_state() clears dev->state_saves, so
11900 * call pci_save_state() again to restore it.
11902 pci_save_state(pdev);
11904 err = pci_enable_device_mem(pdev);
11906 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11909 pci_set_master(pdev);
11911 /* no wakeup events while running */
11912 pci_wake_from_d3(pdev, false);
11914 /* handling the reset will rebuild the device state */
11915 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11916 clear_bit(__I40E_DOWN, &pf->state);
11918 i40e_reset_and_rebuild(pf, false);
11926 static const struct pci_error_handlers i40e_err_handler = {
11927 .error_detected = i40e_pci_error_detected,
11928 .slot_reset = i40e_pci_error_slot_reset,
11929 .resume = i40e_pci_error_resume,
11932 static struct pci_driver i40e_driver = {
11933 .name = i40e_driver_name,
11934 .id_table = i40e_pci_tbl,
11935 .probe = i40e_probe,
11936 .remove = i40e_remove,
11938 .suspend = i40e_suspend,
11939 .resume = i40e_resume,
11941 .shutdown = i40e_shutdown,
11942 .err_handler = &i40e_err_handler,
11943 .sriov_configure = i40e_pci_sriov_configure,
11947 * i40e_init_module - Driver registration routine
11949 * i40e_init_module is the first routine called when the driver is
11950 * loaded. All it does is register with the PCI subsystem.
11952 static int __init i40e_init_module(void)
11954 pr_info("%s: %s - version %s\n", i40e_driver_name,
11955 i40e_driver_string, i40e_driver_version_str);
11956 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11958 /* we will see if single thread per module is enough for now,
11959 * it can't be any worse than using the system workqueue which
11960 * was already single threaded
11962 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11965 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11970 return pci_register_driver(&i40e_driver);
11972 module_init(i40e_init_module);
11975 * i40e_exit_module - Driver exit cleanup routine
11977 * i40e_exit_module is called just before the driver is removed
11980 static void __exit i40e_exit_module(void)
11982 pci_unregister_driver(&i40e_driver);
11983 destroy_workqueue(i40e_wq);
11986 module_exit(i40e_exit_module);