1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #if IS_ENABLED(CONFIG_VXLAN)
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 4
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
59 u16 rss_table_size, u16 rss_size);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 /* required last entry */
90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
92 #define I40E_MAX_VF_COUNT 128
93 static int debug = -1;
94 module_param(debug, int, 0);
95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
99 MODULE_LICENSE("GPL");
100 MODULE_VERSION(DRV_VERSION);
103 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
104 * @hw: pointer to the HW structure
105 * @mem: ptr to mem struct to fill out
106 * @size: size of memory requested
107 * @alignment: what to align the allocation to
109 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
110 u64 size, u32 alignment)
112 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
114 mem->size = ALIGN(size, alignment);
115 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
116 &mem->pa, GFP_KERNEL);
124 * i40e_free_dma_mem_d - OS specific memory free for shared code
125 * @hw: pointer to the HW structure
126 * @mem: ptr to mem struct to free
128 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
130 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
132 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
141 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
142 * @hw: pointer to the HW structure
143 * @mem: ptr to mem struct to fill out
144 * @size: size of memory requested
146 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
150 mem->va = kzalloc(size, GFP_KERNEL);
159 * i40e_free_virt_mem_d - OS specific memory free for shared code
160 * @hw: pointer to the HW structure
161 * @mem: ptr to mem struct to free
163 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
165 /* it's ok to kfree a NULL pointer */
174 * i40e_get_lump - find a lump of free generic resource
175 * @pf: board private structure
176 * @pile: the pile of resource to search
177 * @needed: the number of items needed
178 * @id: an owner id to stick on the items assigned
180 * Returns the base item index of the lump, or negative for error
182 * The search_hint trick and lack of advanced fit-finding only work
183 * because we're highly likely to have all the same size lump requests.
184 * Linear search time and any fragmentation should be minimal.
186 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
192 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
193 dev_info(&pf->pdev->dev,
194 "param err: pile=%p needed=%d id=0x%04x\n",
199 /* start the linear search with an imperfect hint */
200 i = pile->search_hint;
201 while (i < pile->num_entries) {
202 /* skip already allocated entries */
203 if (pile->list[i] & I40E_PILE_VALID_BIT) {
208 /* do we have enough in this lump? */
209 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
210 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
215 /* there was enough, so assign it to the requestor */
216 for (j = 0; j < needed; j++)
217 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
219 pile->search_hint = i + j;
223 /* not enough, so skip over it and continue looking */
231 * i40e_put_lump - return a lump of generic resource
232 * @pile: the pile of resource to search
233 * @index: the base item index
234 * @id: the owner id of the items assigned
236 * Returns the count of items in the lump
238 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
240 int valid_id = (id | I40E_PILE_VALID_BIT);
244 if (!pile || index >= pile->num_entries)
248 i < pile->num_entries && pile->list[i] == valid_id;
254 if (count && index < pile->search_hint)
255 pile->search_hint = index;
261 * i40e_find_vsi_from_id - searches for the vsi with the given id
262 * @pf - the pf structure to search for the vsi
263 * @id - id of the vsi it is searching for
265 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
269 for (i = 0; i < pf->num_alloc_vsi; i++)
270 if (pf->vsi[i] && (pf->vsi[i]->id == id))
277 * i40e_service_event_schedule - Schedule the service task to wake up
278 * @pf: board private structure
280 * If not already scheduled, this puts the task into the work queue
282 static void i40e_service_event_schedule(struct i40e_pf *pf)
284 if (!test_bit(__I40E_DOWN, &pf->state) &&
285 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
286 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
287 schedule_work(&pf->service_task);
291 * i40e_tx_timeout - Respond to a Tx Hang
292 * @netdev: network interface device structure
294 * If any port has noticed a Tx timeout, it is likely that the whole
295 * device is munged, not just the one netdev port, so go for the full
299 void i40e_tx_timeout(struct net_device *netdev)
301 static void i40e_tx_timeout(struct net_device *netdev)
304 struct i40e_netdev_priv *np = netdev_priv(netdev);
305 struct i40e_vsi *vsi = np->vsi;
306 struct i40e_pf *pf = vsi->back;
307 struct i40e_ring *tx_ring = NULL;
308 unsigned int i, hung_queue = 0;
311 pf->tx_timeout_count++;
313 /* find the stopped queue the same way the stack does */
314 for (i = 0; i < netdev->num_tx_queues; i++) {
315 struct netdev_queue *q;
316 unsigned long trans_start;
318 q = netdev_get_tx_queue(netdev, i);
319 trans_start = q->trans_start ? : netdev->trans_start;
320 if (netif_xmit_stopped(q) &&
322 (trans_start + netdev->watchdog_timeo))) {
328 if (i == netdev->num_tx_queues) {
329 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
331 /* now that we have an index, find the tx_ring struct */
332 for (i = 0; i < vsi->num_queue_pairs; i++) {
333 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
335 vsi->tx_rings[i]->queue_index) {
336 tx_ring = vsi->tx_rings[i];
343 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
344 pf->tx_timeout_recovery_level = 1; /* reset after some time */
345 else if (time_before(jiffies,
346 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
347 return; /* don't do any new action before the next timeout */
350 head = i40e_get_head(tx_ring);
351 /* Read interrupt register */
352 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
354 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
355 tx_ring->vsi->base_vector - 1));
357 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
359 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
360 vsi->seid, hung_queue, tx_ring->next_to_clean,
361 head, tx_ring->next_to_use,
362 readl(tx_ring->tail), val);
365 pf->tx_timeout_last_recovery = jiffies;
366 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
367 pf->tx_timeout_recovery_level, hung_queue);
369 switch (pf->tx_timeout_recovery_level) {
371 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
374 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
377 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
380 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
384 i40e_service_event_schedule(pf);
385 pf->tx_timeout_recovery_level++;
389 * i40e_release_rx_desc - Store the new tail and head values
390 * @rx_ring: ring to bump
391 * @val: new head index
393 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
395 rx_ring->next_to_use = val;
397 /* Force memory writes to complete before letting h/w
398 * know there are new descriptors to fetch. (Only
399 * applicable for weak-ordered memory model archs,
403 writel(val, rx_ring->tail);
407 * i40e_get_vsi_stats_struct - Get System Network Statistics
408 * @vsi: the VSI we care about
410 * Returns the address of the device statistics structure.
411 * The statistics are actually updated from the service task.
413 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
415 return &vsi->net_stats;
419 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
420 * @netdev: network interface device structure
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
426 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
427 struct net_device *netdev,
428 struct rtnl_link_stats64 *stats)
430 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
431 struct net_device *netdev,
432 struct rtnl_link_stats64 *stats)
435 struct i40e_netdev_priv *np = netdev_priv(netdev);
436 struct i40e_ring *tx_ring, *rx_ring;
437 struct i40e_vsi *vsi = np->vsi;
438 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
441 if (test_bit(__I40E_DOWN, &vsi->state))
448 for (i = 0; i < vsi->num_queue_pairs; i++) {
452 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
457 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
458 packets = tx_ring->stats.packets;
459 bytes = tx_ring->stats.bytes;
460 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
462 stats->tx_packets += packets;
463 stats->tx_bytes += bytes;
464 rx_ring = &tx_ring[1];
467 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
468 packets = rx_ring->stats.packets;
469 bytes = rx_ring->stats.bytes;
470 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
472 stats->rx_packets += packets;
473 stats->rx_bytes += bytes;
477 /* following stats updated by i40e_watchdog_subtask() */
478 stats->multicast = vsi_stats->multicast;
479 stats->tx_errors = vsi_stats->tx_errors;
480 stats->tx_dropped = vsi_stats->tx_dropped;
481 stats->rx_errors = vsi_stats->rx_errors;
482 stats->rx_dropped = vsi_stats->rx_dropped;
483 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
484 stats->rx_length_errors = vsi_stats->rx_length_errors;
490 * i40e_vsi_reset_stats - Resets all stats of the given vsi
491 * @vsi: the VSI to have its stats reset
493 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
495 struct rtnl_link_stats64 *ns;
501 ns = i40e_get_vsi_stats_struct(vsi);
502 memset(ns, 0, sizeof(*ns));
503 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
504 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
505 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
506 if (vsi->rx_rings && vsi->rx_rings[0]) {
507 for (i = 0; i < vsi->num_queue_pairs; i++) {
508 memset(&vsi->rx_rings[i]->stats, 0,
509 sizeof(vsi->rx_rings[i]->stats));
510 memset(&vsi->rx_rings[i]->rx_stats, 0,
511 sizeof(vsi->rx_rings[i]->rx_stats));
512 memset(&vsi->tx_rings[i]->stats, 0,
513 sizeof(vsi->tx_rings[i]->stats));
514 memset(&vsi->tx_rings[i]->tx_stats, 0,
515 sizeof(vsi->tx_rings[i]->tx_stats));
518 vsi->stat_offsets_loaded = false;
522 * i40e_pf_reset_stats - Reset all of the stats for the given PF
523 * @pf: the PF to be reset
525 void i40e_pf_reset_stats(struct i40e_pf *pf)
529 memset(&pf->stats, 0, sizeof(pf->stats));
530 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
531 pf->stat_offsets_loaded = false;
533 for (i = 0; i < I40E_MAX_VEB; i++) {
535 memset(&pf->veb[i]->stats, 0,
536 sizeof(pf->veb[i]->stats));
537 memset(&pf->veb[i]->stats_offsets, 0,
538 sizeof(pf->veb[i]->stats_offsets));
539 pf->veb[i]->stat_offsets_loaded = false;
545 * i40e_stat_update48 - read and update a 48 bit stat from the chip
546 * @hw: ptr to the hardware info
547 * @hireg: the high 32 bit reg to read
548 * @loreg: the low 32 bit reg to read
549 * @offset_loaded: has the initial offset been loaded yet
550 * @offset: ptr to current offset value
551 * @stat: ptr to the stat
553 * Since the device stats are not reset at PFReset, they likely will not
554 * be zeroed when the driver starts. We'll save the first values read
555 * and use them as offsets to be subtracted from the raw values in order
556 * to report stats that count from zero. In the process, we also manage
557 * the potential roll-over.
559 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
560 bool offset_loaded, u64 *offset, u64 *stat)
564 if (hw->device_id == I40E_DEV_ID_QEMU) {
565 new_data = rd32(hw, loreg);
566 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
568 new_data = rd64(hw, loreg);
572 if (likely(new_data >= *offset))
573 *stat = new_data - *offset;
575 *stat = (new_data + BIT_ULL(48)) - *offset;
576 *stat &= 0xFFFFFFFFFFFFULL;
580 * i40e_stat_update32 - read and update a 32 bit stat from the chip
581 * @hw: ptr to the hardware info
582 * @reg: the hw reg to read
583 * @offset_loaded: has the initial offset been loaded yet
584 * @offset: ptr to current offset value
585 * @stat: ptr to the stat
587 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
588 bool offset_loaded, u64 *offset, u64 *stat)
592 new_data = rd32(hw, reg);
595 if (likely(new_data >= *offset))
596 *stat = (u32)(new_data - *offset);
598 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
602 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
603 * @vsi: the VSI to be updated
605 void i40e_update_eth_stats(struct i40e_vsi *vsi)
607 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
608 struct i40e_pf *pf = vsi->back;
609 struct i40e_hw *hw = &pf->hw;
610 struct i40e_eth_stats *oes;
611 struct i40e_eth_stats *es; /* device's eth stats */
613 es = &vsi->eth_stats;
614 oes = &vsi->eth_stats_offsets;
616 /* Gather up the stats that the hw collects */
617 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->tx_errors, &es->tx_errors);
620 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_discards, &es->rx_discards);
623 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
626 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->tx_errors, &es->tx_errors);
630 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
631 I40E_GLV_GORCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_bytes, &es->rx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
635 I40E_GLV_UPRCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_unicast, &es->rx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
639 I40E_GLV_MPRCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->rx_multicast, &es->rx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
643 I40E_GLV_BPRCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->rx_broadcast, &es->rx_broadcast);
647 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
648 I40E_GLV_GOTCL(stat_idx),
649 vsi->stat_offsets_loaded,
650 &oes->tx_bytes, &es->tx_bytes);
651 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
652 I40E_GLV_UPTCL(stat_idx),
653 vsi->stat_offsets_loaded,
654 &oes->tx_unicast, &es->tx_unicast);
655 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
656 I40E_GLV_MPTCL(stat_idx),
657 vsi->stat_offsets_loaded,
658 &oes->tx_multicast, &es->tx_multicast);
659 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
660 I40E_GLV_BPTCL(stat_idx),
661 vsi->stat_offsets_loaded,
662 &oes->tx_broadcast, &es->tx_broadcast);
663 vsi->stat_offsets_loaded = true;
667 * i40e_update_veb_stats - Update Switch component statistics
668 * @veb: the VEB being updated
670 static void i40e_update_veb_stats(struct i40e_veb *veb)
672 struct i40e_pf *pf = veb->pf;
673 struct i40e_hw *hw = &pf->hw;
674 struct i40e_eth_stats *oes;
675 struct i40e_eth_stats *es; /* device's eth stats */
676 struct i40e_veb_tc_stats *veb_oes;
677 struct i40e_veb_tc_stats *veb_es;
680 idx = veb->stats_idx;
682 oes = &veb->stats_offsets;
683 veb_es = &veb->tc_stats;
684 veb_oes = &veb->tc_stats_offsets;
686 /* Gather up the stats that the hw collects */
687 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
688 veb->stat_offsets_loaded,
689 &oes->tx_discards, &es->tx_discards);
690 if (hw->revision_id > 0)
691 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_unknown_protocol,
694 &es->rx_unknown_protocol);
695 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_bytes, &es->rx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_unicast, &es->rx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_multicast, &es->rx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->rx_broadcast, &es->rx_broadcast);
708 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_bytes, &es->tx_bytes);
711 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_unicast, &es->tx_unicast);
714 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_multicast, &es->tx_multicast);
717 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
718 veb->stat_offsets_loaded,
719 &oes->tx_broadcast, &es->tx_broadcast);
720 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
721 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
722 I40E_GLVEBTC_RPCL(i, idx),
723 veb->stat_offsets_loaded,
724 &veb_oes->tc_rx_packets[i],
725 &veb_es->tc_rx_packets[i]);
726 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
727 I40E_GLVEBTC_RBCL(i, idx),
728 veb->stat_offsets_loaded,
729 &veb_oes->tc_rx_bytes[i],
730 &veb_es->tc_rx_bytes[i]);
731 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
732 I40E_GLVEBTC_TPCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_tx_packets[i],
735 &veb_es->tc_tx_packets[i]);
736 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
737 I40E_GLVEBTC_TBCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_tx_bytes[i],
740 &veb_es->tc_tx_bytes[i]);
742 veb->stat_offsets_loaded = true;
747 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
748 * @vsi: the VSI that is capable of doing FCoE
750 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
752 struct i40e_pf *pf = vsi->back;
753 struct i40e_hw *hw = &pf->hw;
754 struct i40e_fcoe_stats *ofs;
755 struct i40e_fcoe_stats *fs; /* device's eth stats */
758 if (vsi->type != I40E_VSI_FCOE)
761 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
762 fs = &vsi->fcoe_stats;
763 ofs = &vsi->fcoe_stats_offsets;
765 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
768 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
771 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
774 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
777 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
780 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
783 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->fcoe_last_error, &fs->fcoe_last_error);
786 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
790 vsi->fcoe_stat_offsets_loaded = true;
795 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
796 * @pf: the corresponding PF
798 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
800 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
802 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
803 struct i40e_hw_port_stats *nsd = &pf->stats;
804 struct i40e_hw *hw = &pf->hw;
807 if ((hw->fc.current_mode != I40E_FC_FULL) &&
808 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
811 xoff = nsd->link_xoff_rx;
812 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
813 pf->stat_offsets_loaded,
814 &osd->link_xoff_rx, &nsd->link_xoff_rx);
816 /* No new LFC xoff rx */
817 if (!(nsd->link_xoff_rx - xoff))
823 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
824 * @pf: the corresponding PF
826 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
828 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
830 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
831 struct i40e_hw_port_stats *nsd = &pf->stats;
832 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
833 struct i40e_dcbx_config *dcb_cfg;
834 struct i40e_hw *hw = &pf->hw;
838 dcb_cfg = &hw->local_dcbx_config;
840 /* Collect Link XOFF stats when PFC is disabled */
841 if (!dcb_cfg->pfc.pfcenable) {
842 i40e_update_link_xoff_rx(pf);
846 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
847 u64 prio_xoff = nsd->priority_xoff_rx[i];
849 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
850 pf->stat_offsets_loaded,
851 &osd->priority_xoff_rx[i],
852 &nsd->priority_xoff_rx[i]);
854 /* No new PFC xoff rx */
855 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
857 /* Get the TC for given priority */
858 tc = dcb_cfg->etscfg.prioritytable[i];
864 * i40e_update_vsi_stats - Update the vsi statistics counters.
865 * @vsi: the VSI to be updated
867 * There are a few instances where we store the same stat in a
868 * couple of different structs. This is partly because we have
869 * the netdev stats that need to be filled out, which is slightly
870 * different from the "eth_stats" defined by the chip and used in
871 * VF communications. We sort it out here.
873 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
875 struct i40e_pf *pf = vsi->back;
876 struct rtnl_link_stats64 *ons;
877 struct rtnl_link_stats64 *ns; /* netdev stats */
878 struct i40e_eth_stats *oes;
879 struct i40e_eth_stats *es; /* device's eth stats */
880 u32 tx_restart, tx_busy;
891 if (test_bit(__I40E_DOWN, &vsi->state) ||
892 test_bit(__I40E_CONFIG_BUSY, &pf->state))
895 ns = i40e_get_vsi_stats_struct(vsi);
896 ons = &vsi->net_stats_offsets;
897 es = &vsi->eth_stats;
898 oes = &vsi->eth_stats_offsets;
900 /* Gather up the netdev and vsi stats that the driver collects
901 * on the fly during packet processing
905 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
909 for (q = 0; q < vsi->num_queue_pairs; q++) {
911 p = ACCESS_ONCE(vsi->tx_rings[q]);
914 start = u64_stats_fetch_begin_irq(&p->syncp);
915 packets = p->stats.packets;
916 bytes = p->stats.bytes;
917 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
920 tx_restart += p->tx_stats.restart_queue;
921 tx_busy += p->tx_stats.tx_busy;
922 tx_linearize += p->tx_stats.tx_linearize;
923 tx_force_wb += p->tx_stats.tx_force_wb;
925 /* Rx queue is part of the same block as Tx queue */
928 start = u64_stats_fetch_begin_irq(&p->syncp);
929 packets = p->stats.packets;
930 bytes = p->stats.bytes;
931 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
934 rx_buf += p->rx_stats.alloc_buff_failed;
935 rx_page += p->rx_stats.alloc_page_failed;
938 vsi->tx_restart = tx_restart;
939 vsi->tx_busy = tx_busy;
940 vsi->tx_linearize = tx_linearize;
941 vsi->tx_force_wb = tx_force_wb;
942 vsi->rx_page_failed = rx_page;
943 vsi->rx_buf_failed = rx_buf;
945 ns->rx_packets = rx_p;
947 ns->tx_packets = tx_p;
950 /* update netdev stats from eth stats */
951 i40e_update_eth_stats(vsi);
952 ons->tx_errors = oes->tx_errors;
953 ns->tx_errors = es->tx_errors;
954 ons->multicast = oes->rx_multicast;
955 ns->multicast = es->rx_multicast;
956 ons->rx_dropped = oes->rx_discards;
957 ns->rx_dropped = es->rx_discards;
958 ons->tx_dropped = oes->tx_discards;
959 ns->tx_dropped = es->tx_discards;
961 /* pull in a couple PF stats if this is the main vsi */
962 if (vsi == pf->vsi[pf->lan_vsi]) {
963 ns->rx_crc_errors = pf->stats.crc_errors;
964 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
965 ns->rx_length_errors = pf->stats.rx_length_errors;
970 * i40e_update_pf_stats - Update the PF statistics counters.
971 * @pf: the PF to be updated
973 static void i40e_update_pf_stats(struct i40e_pf *pf)
975 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
976 struct i40e_hw_port_stats *nsd = &pf->stats;
977 struct i40e_hw *hw = &pf->hw;
981 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
982 I40E_GLPRT_GORCL(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
985 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
986 I40E_GLPRT_GOTCL(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
989 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_discards,
992 &nsd->eth.rx_discards);
993 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
994 I40E_GLPRT_UPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_unicast,
997 &nsd->eth.rx_unicast);
998 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
999 I40E_GLPRT_MPRCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.rx_multicast,
1002 &nsd->eth.rx_multicast);
1003 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1004 I40E_GLPRT_BPRCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.rx_broadcast,
1007 &nsd->eth.rx_broadcast);
1008 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1009 I40E_GLPRT_UPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_unicast,
1012 &nsd->eth.tx_unicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1014 I40E_GLPRT_MPTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_multicast,
1017 &nsd->eth.tx_multicast);
1018 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1019 I40E_GLPRT_BPTCL(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->eth.tx_broadcast,
1022 &nsd->eth.tx_broadcast);
1024 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->tx_dropped_link_down,
1027 &nsd->tx_dropped_link_down);
1029 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->crc_errors, &nsd->crc_errors);
1033 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->illegal_bytes, &nsd->illegal_bytes);
1037 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->mac_local_faults,
1040 &nsd->mac_local_faults);
1041 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->mac_remote_faults,
1044 &nsd->mac_remote_faults);
1046 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->rx_length_errors,
1049 &nsd->rx_length_errors);
1051 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->link_xon_rx, &nsd->link_xon_rx);
1054 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->link_xon_tx, &nsd->link_xon_tx);
1057 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1058 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1062 for (i = 0; i < 8; i++) {
1063 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1064 pf->stat_offsets_loaded,
1065 &osd->priority_xon_rx[i],
1066 &nsd->priority_xon_rx[i]);
1067 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1068 pf->stat_offsets_loaded,
1069 &osd->priority_xon_tx[i],
1070 &nsd->priority_xon_tx[i]);
1071 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1072 pf->stat_offsets_loaded,
1073 &osd->priority_xoff_tx[i],
1074 &nsd->priority_xoff_tx[i]);
1075 i40e_stat_update32(hw,
1076 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1077 pf->stat_offsets_loaded,
1078 &osd->priority_xon_2_xoff[i],
1079 &nsd->priority_xon_2_xoff[i]);
1082 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1083 I40E_GLPRT_PRC64L(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_size_64, &nsd->rx_size_64);
1086 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1087 I40E_GLPRT_PRC127L(hw->port),
1088 pf->stat_offsets_loaded,
1089 &osd->rx_size_127, &nsd->rx_size_127);
1090 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1091 I40E_GLPRT_PRC255L(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_size_255, &nsd->rx_size_255);
1094 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1095 I40E_GLPRT_PRC511L(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->rx_size_511, &nsd->rx_size_511);
1098 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1099 I40E_GLPRT_PRC1023L(hw->port),
1100 pf->stat_offsets_loaded,
1101 &osd->rx_size_1023, &nsd->rx_size_1023);
1102 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1103 I40E_GLPRT_PRC1522L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->rx_size_1522, &nsd->rx_size_1522);
1106 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1107 I40E_GLPRT_PRC9522L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->rx_size_big, &nsd->rx_size_big);
1111 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1112 I40E_GLPRT_PTC64L(hw->port),
1113 pf->stat_offsets_loaded,
1114 &osd->tx_size_64, &nsd->tx_size_64);
1115 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1116 I40E_GLPRT_PTC127L(hw->port),
1117 pf->stat_offsets_loaded,
1118 &osd->tx_size_127, &nsd->tx_size_127);
1119 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1120 I40E_GLPRT_PTC255L(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->tx_size_255, &nsd->tx_size_255);
1123 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1124 I40E_GLPRT_PTC511L(hw->port),
1125 pf->stat_offsets_loaded,
1126 &osd->tx_size_511, &nsd->tx_size_511);
1127 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1128 I40E_GLPRT_PTC1023L(hw->port),
1129 pf->stat_offsets_loaded,
1130 &osd->tx_size_1023, &nsd->tx_size_1023);
1131 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1132 I40E_GLPRT_PTC1522L(hw->port),
1133 pf->stat_offsets_loaded,
1134 &osd->tx_size_1522, &nsd->tx_size_1522);
1135 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1136 I40E_GLPRT_PTC9522L(hw->port),
1137 pf->stat_offsets_loaded,
1138 &osd->tx_size_big, &nsd->tx_size_big);
1140 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_undersize, &nsd->rx_undersize);
1143 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_fragments, &nsd->rx_fragments);
1146 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1147 pf->stat_offsets_loaded,
1148 &osd->rx_oversize, &nsd->rx_oversize);
1149 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1150 pf->stat_offsets_loaded,
1151 &osd->rx_jabber, &nsd->rx_jabber);
1154 i40e_stat_update32(hw,
1155 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1156 pf->stat_offsets_loaded,
1157 &osd->fd_atr_match, &nsd->fd_atr_match);
1158 i40e_stat_update32(hw,
1159 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1160 pf->stat_offsets_loaded,
1161 &osd->fd_sb_match, &nsd->fd_sb_match);
1162 i40e_stat_update32(hw,
1163 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1164 pf->stat_offsets_loaded,
1165 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1167 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1168 nsd->tx_lpi_status =
1169 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1170 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1171 nsd->rx_lpi_status =
1172 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1173 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1174 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1175 pf->stat_offsets_loaded,
1176 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1177 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1178 pf->stat_offsets_loaded,
1179 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1181 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1182 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1183 nsd->fd_sb_status = true;
1185 nsd->fd_sb_status = false;
1187 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1188 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1189 nsd->fd_atr_status = true;
1191 nsd->fd_atr_status = false;
1193 pf->stat_offsets_loaded = true;
1197 * i40e_update_stats - Update the various statistics counters.
1198 * @vsi: the VSI to be updated
1200 * Update the various stats for this VSI and its related entities.
1202 void i40e_update_stats(struct i40e_vsi *vsi)
1204 struct i40e_pf *pf = vsi->back;
1206 if (vsi == pf->vsi[pf->lan_vsi])
1207 i40e_update_pf_stats(pf);
1209 i40e_update_vsi_stats(vsi);
1211 i40e_update_fcoe_stats(vsi);
1216 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1217 * @vsi: the VSI to be searched
1218 * @macaddr: the MAC address
1220 * @is_vf: make sure its a VF filter, else doesn't matter
1221 * @is_netdev: make sure its a netdev filter, else doesn't matter
1223 * Returns ptr to the filter object or NULL
1225 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1226 u8 *macaddr, s16 vlan,
1227 bool is_vf, bool is_netdev)
1229 struct i40e_mac_filter *f;
1231 if (!vsi || !macaddr)
1234 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1235 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1236 (vlan == f->vlan) &&
1237 (!is_vf || f->is_vf) &&
1238 (!is_netdev || f->is_netdev))
1245 * i40e_find_mac - Find a mac addr in the macvlan filters list
1246 * @vsi: the VSI to be searched
1247 * @macaddr: the MAC address we are searching for
1248 * @is_vf: make sure its a VF filter, else doesn't matter
1249 * @is_netdev: make sure its a netdev filter, else doesn't matter
1251 * Returns the first filter with the provided MAC address or NULL if
1252 * MAC address was not found
1254 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1255 bool is_vf, bool is_netdev)
1257 struct i40e_mac_filter *f;
1259 if (!vsi || !macaddr)
1262 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1263 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1264 (!is_vf || f->is_vf) &&
1265 (!is_netdev || f->is_netdev))
1272 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1273 * @vsi: the VSI to be searched
1275 * Returns true if VSI is in vlan mode or false otherwise
1277 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1279 struct i40e_mac_filter *f;
1281 /* Only -1 for all the filters denotes not in vlan mode
1282 * so we have to go through all the list in order to make sure
1284 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1285 if (f->vlan >= 0 || vsi->info.pvid)
1293 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1294 * @vsi: the VSI to be searched
1295 * @macaddr: the mac address to be filtered
1296 * @is_vf: true if it is a VF
1297 * @is_netdev: true if it is a netdev
1299 * Goes through all the macvlan filters and adds a
1300 * macvlan filter for each unique vlan that already exists
1302 * Returns first filter found on success, else NULL
1304 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1305 bool is_vf, bool is_netdev)
1307 struct i40e_mac_filter *f;
1309 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1311 f->vlan = le16_to_cpu(vsi->info.pvid);
1312 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1313 is_vf, is_netdev)) {
1314 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1320 return list_first_entry_or_null(&vsi->mac_filter_list,
1321 struct i40e_mac_filter, list);
1325 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1326 * @vsi: the PF Main VSI - inappropriate for any other VSI
1327 * @macaddr: the MAC address
1329 * Some older firmware configurations set up a default promiscuous VLAN
1330 * filter that needs to be removed.
1332 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1334 struct i40e_aqc_remove_macvlan_element_data element;
1335 struct i40e_pf *pf = vsi->back;
1338 /* Only appropriate for the PF main VSI */
1339 if (vsi->type != I40E_VSI_MAIN)
1342 memset(&element, 0, sizeof(element));
1343 ether_addr_copy(element.mac_addr, macaddr);
1344 element.vlan_tag = 0;
1345 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1346 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1347 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1355 * i40e_add_filter - Add a mac/vlan filter to the VSI
1356 * @vsi: the VSI to be searched
1357 * @macaddr: the MAC address
1359 * @is_vf: make sure its a VF filter, else doesn't matter
1360 * @is_netdev: make sure its a netdev filter, else doesn't matter
1362 * Returns ptr to the filter object or NULL when no memory available.
1364 * NOTE: This function is expected to be called with mac_filter_list_lock
1367 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1368 u8 *macaddr, s16 vlan,
1369 bool is_vf, bool is_netdev)
1371 struct i40e_mac_filter *f;
1373 if (!vsi || !macaddr)
1376 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1378 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1380 goto add_filter_out;
1382 ether_addr_copy(f->macaddr, macaddr);
1386 INIT_LIST_HEAD(&f->list);
1387 list_add(&f->list, &vsi->mac_filter_list);
1390 /* increment counter and add a new flag if needed */
1396 } else if (is_netdev) {
1397 if (!f->is_netdev) {
1398 f->is_netdev = true;
1405 /* changed tells sync_filters_subtask to
1406 * push the filter down to the firmware
1409 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1410 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1418 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1419 * @vsi: the VSI to be searched
1420 * @macaddr: the MAC address
1422 * @is_vf: make sure it's a VF filter, else doesn't matter
1423 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1425 * NOTE: This function is expected to be called with mac_filter_list_lock
1428 void i40e_del_filter(struct i40e_vsi *vsi,
1429 u8 *macaddr, s16 vlan,
1430 bool is_vf, bool is_netdev)
1432 struct i40e_mac_filter *f;
1434 if (!vsi || !macaddr)
1437 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1438 if (!f || f->counter == 0)
1446 } else if (is_netdev) {
1448 f->is_netdev = false;
1452 /* make sure we don't remove a filter in use by VF or netdev */
1455 min_f += (f->is_vf ? 1 : 0);
1456 min_f += (f->is_netdev ? 1 : 0);
1458 if (f->counter > min_f)
1462 /* counter == 0 tells sync_filters_subtask to
1463 * remove the filter from the firmware's list
1465 if (f->counter == 0) {
1467 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1468 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1473 * i40e_set_mac - NDO callback to set mac address
1474 * @netdev: network interface device structure
1475 * @p: pointer to an address structure
1477 * Returns 0 on success, negative on failure
1480 int i40e_set_mac(struct net_device *netdev, void *p)
1482 static int i40e_set_mac(struct net_device *netdev, void *p)
1485 struct i40e_netdev_priv *np = netdev_priv(netdev);
1486 struct i40e_vsi *vsi = np->vsi;
1487 struct i40e_pf *pf = vsi->back;
1488 struct i40e_hw *hw = &pf->hw;
1489 struct sockaddr *addr = p;
1490 struct i40e_mac_filter *f;
1492 if (!is_valid_ether_addr(addr->sa_data))
1493 return -EADDRNOTAVAIL;
1495 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1496 netdev_info(netdev, "already using mac address %pM\n",
1501 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1502 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1503 return -EADDRNOTAVAIL;
1505 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1506 netdev_info(netdev, "returning to hw mac address %pM\n",
1509 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1511 if (vsi->type == I40E_VSI_MAIN) {
1514 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1515 I40E_AQC_WRITE_TYPE_LAA_WOL,
1516 addr->sa_data, NULL);
1519 "Addr change for Main VSI failed: %d\n",
1521 return -EADDRNOTAVAIL;
1525 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1526 struct i40e_aqc_remove_macvlan_element_data element;
1528 memset(&element, 0, sizeof(element));
1529 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1530 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1531 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1533 spin_lock_bh(&vsi->mac_filter_list_lock);
1534 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1536 spin_unlock_bh(&vsi->mac_filter_list_lock);
1539 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1540 struct i40e_aqc_add_macvlan_element_data element;
1542 memset(&element, 0, sizeof(element));
1543 ether_addr_copy(element.mac_addr, hw->mac.addr);
1544 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1545 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1547 spin_lock_bh(&vsi->mac_filter_list_lock);
1548 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1552 spin_unlock_bh(&vsi->mac_filter_list_lock);
1555 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1557 return i40e_sync_vsi_filters(vsi);
1561 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1562 * @vsi: the VSI being setup
1563 * @ctxt: VSI context structure
1564 * @enabled_tc: Enabled TCs bitmap
1565 * @is_add: True if called before Add VSI
1567 * Setup VSI queue mapping for enabled traffic classes.
1570 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1571 struct i40e_vsi_context *ctxt,
1575 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1576 struct i40e_vsi_context *ctxt,
1581 struct i40e_pf *pf = vsi->back;
1591 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1594 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1595 /* Find numtc from enabled TC bitmap */
1596 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1597 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1601 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1605 /* At least TC0 is enabled in case of non-DCB case */
1609 vsi->tc_config.numtc = numtc;
1610 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1611 /* Number of queues per enabled TC */
1612 /* In MFP case we can have a much lower count of MSIx
1613 * vectors available and so we need to lower the used
1616 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1617 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1619 qcount = vsi->alloc_queue_pairs;
1620 num_tc_qps = qcount / numtc;
1621 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1623 /* Setup queue offset/count for all TCs for given VSI */
1624 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1625 /* See if the given TC is enabled for the given VSI */
1626 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1630 switch (vsi->type) {
1632 qcount = min_t(int, pf->alloc_rss_size,
1637 qcount = num_tc_qps;
1641 case I40E_VSI_SRIOV:
1642 case I40E_VSI_VMDQ2:
1644 qcount = num_tc_qps;
1648 vsi->tc_config.tc_info[i].qoffset = offset;
1649 vsi->tc_config.tc_info[i].qcount = qcount;
1651 /* find the next higher power-of-2 of num queue pairs */
1654 while (num_qps && (BIT_ULL(pow) < qcount)) {
1659 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1661 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1662 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1666 /* TC is not enabled so set the offset to
1667 * default queue and allocate one queue
1670 vsi->tc_config.tc_info[i].qoffset = 0;
1671 vsi->tc_config.tc_info[i].qcount = 1;
1672 vsi->tc_config.tc_info[i].netdev_tc = 0;
1676 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1679 /* Set actual Tx/Rx queue pairs */
1680 vsi->num_queue_pairs = offset;
1681 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1682 if (vsi->req_queue_pairs > 0)
1683 vsi->num_queue_pairs = vsi->req_queue_pairs;
1684 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1685 vsi->num_queue_pairs = pf->num_lan_msix;
1688 /* Scheduler section valid can only be set for ADD VSI */
1690 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1692 ctxt->info.up_enable_bits = enabled_tc;
1694 if (vsi->type == I40E_VSI_SRIOV) {
1695 ctxt->info.mapping_flags |=
1696 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1697 for (i = 0; i < vsi->num_queue_pairs; i++)
1698 ctxt->info.queue_mapping[i] =
1699 cpu_to_le16(vsi->base_queue + i);
1701 ctxt->info.mapping_flags |=
1702 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1703 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1705 ctxt->info.valid_sections |= cpu_to_le16(sections);
1709 * i40e_set_rx_mode - NDO callback to set the netdev filters
1710 * @netdev: network interface device structure
1713 void i40e_set_rx_mode(struct net_device *netdev)
1715 static void i40e_set_rx_mode(struct net_device *netdev)
1718 struct i40e_netdev_priv *np = netdev_priv(netdev);
1719 struct i40e_mac_filter *f, *ftmp;
1720 struct i40e_vsi *vsi = np->vsi;
1721 struct netdev_hw_addr *uca;
1722 struct netdev_hw_addr *mca;
1723 struct netdev_hw_addr *ha;
1725 spin_lock_bh(&vsi->mac_filter_list_lock);
1727 /* add addr if not already in the filter list */
1728 netdev_for_each_uc_addr(uca, netdev) {
1729 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1730 if (i40e_is_vsi_in_vlan(vsi))
1731 i40e_put_mac_in_vlan(vsi, uca->addr,
1734 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1739 netdev_for_each_mc_addr(mca, netdev) {
1740 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1741 if (i40e_is_vsi_in_vlan(vsi))
1742 i40e_put_mac_in_vlan(vsi, mca->addr,
1745 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1750 /* remove filter if not in netdev list */
1751 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1756 netdev_for_each_mc_addr(mca, netdev)
1757 if (ether_addr_equal(mca->addr, f->macaddr))
1758 goto bottom_of_search_loop;
1760 netdev_for_each_uc_addr(uca, netdev)
1761 if (ether_addr_equal(uca->addr, f->macaddr))
1762 goto bottom_of_search_loop;
1764 for_each_dev_addr(netdev, ha)
1765 if (ether_addr_equal(ha->addr, f->macaddr))
1766 goto bottom_of_search_loop;
1768 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1769 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1771 bottom_of_search_loop:
1774 spin_unlock_bh(&vsi->mac_filter_list_lock);
1776 /* check for other flag changes */
1777 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1778 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1779 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1784 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1785 * @src: source MAC filter entry to be clones
1787 * Returns the pointer to newly cloned MAC filter entry or NULL
1790 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1791 struct i40e_mac_filter *src)
1793 struct i40e_mac_filter *f;
1795 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1800 INIT_LIST_HEAD(&f->list);
1806 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1807 * @vsi: pointer to vsi struct
1808 * @from: Pointer to list which contains MAC filter entries - changes to
1809 * those entries needs to be undone.
1811 * MAC filter entries from list were slated to be removed from device.
1813 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1814 struct list_head *from)
1816 struct i40e_mac_filter *f, *ftmp;
1818 list_for_each_entry_safe(f, ftmp, from, list) {
1820 /* Move the element back into MAC filter list*/
1821 list_move_tail(&f->list, &vsi->mac_filter_list);
1826 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1827 * @vsi: pointer to vsi struct
1829 * MAC filter entries from list were slated to be added from device.
1831 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1833 struct i40e_mac_filter *f, *ftmp;
1835 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1836 if (!f->changed && f->counter)
1842 * i40e_cleanup_add_list - Deletes the element from add list and release
1844 * @add_list: Pointer to list which contains MAC filter entries
1846 static void i40e_cleanup_add_list(struct list_head *add_list)
1848 struct i40e_mac_filter *f, *ftmp;
1850 list_for_each_entry_safe(f, ftmp, add_list, list) {
1857 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1858 * @vsi: ptr to the VSI
1860 * Push any outstanding VSI filter changes through the AdminQ.
1862 * Returns 0 or error value
1864 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1866 struct list_head tmp_del_list, tmp_add_list;
1867 struct i40e_mac_filter *f, *ftmp, *fclone;
1868 bool promisc_forced_on = false;
1869 bool add_happened = false;
1870 int filter_list_len = 0;
1871 u32 changed_flags = 0;
1872 i40e_status aq_ret = 0;
1873 bool err_cond = false;
1881 /* empty array typed pointers, kcalloc later */
1882 struct i40e_aqc_add_macvlan_element_data *add_list;
1883 struct i40e_aqc_remove_macvlan_element_data *del_list;
1885 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1886 usleep_range(1000, 2000);
1890 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1891 vsi->current_netdev_flags = vsi->netdev->flags;
1894 INIT_LIST_HEAD(&tmp_del_list);
1895 INIT_LIST_HEAD(&tmp_add_list);
1897 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1898 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1900 spin_lock_bh(&vsi->mac_filter_list_lock);
1901 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1905 if (f->counter != 0)
1909 /* Move the element into temporary del_list */
1910 list_move_tail(&f->list, &tmp_del_list);
1913 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1917 if (f->counter == 0)
1921 /* Clone MAC filter entry and add into temporary list */
1922 fclone = i40e_mac_filter_entry_clone(f);
1927 list_add_tail(&fclone->list, &tmp_add_list);
1930 /* if failed to clone MAC filter entry - undo */
1932 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1933 i40e_undo_add_filter_entries(vsi);
1935 spin_unlock_bh(&vsi->mac_filter_list_lock);
1938 i40e_cleanup_add_list(&tmp_add_list);
1944 /* Now process 'del_list' outside the lock */
1945 if (!list_empty(&tmp_del_list)) {
1946 filter_list_len = pf->hw.aq.asq_buf_size /
1947 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1948 del_list = kcalloc(filter_list_len,
1949 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1952 i40e_cleanup_add_list(&tmp_add_list);
1954 /* Undo VSI's MAC filter entry element updates */
1955 spin_lock_bh(&vsi->mac_filter_list_lock);
1956 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1957 i40e_undo_add_filter_entries(vsi);
1958 spin_unlock_bh(&vsi->mac_filter_list_lock);
1963 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1966 /* add to delete list */
1967 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1968 del_list[num_del].vlan_tag =
1969 cpu_to_le16((u16)(f->vlan ==
1970 I40E_VLAN_ANY ? 0 : f->vlan));
1972 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1973 del_list[num_del].flags = cmd_flags;
1976 /* flush a full buffer */
1977 if (num_del == filter_list_len) {
1978 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1983 aq_err = pf->hw.aq.asq_last_status;
1985 memset(del_list, 0, sizeof(*del_list));
1987 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1989 dev_err(&pf->pdev->dev,
1990 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1991 i40e_stat_str(&pf->hw, aq_ret),
1992 i40e_aq_str(&pf->hw, aq_err));
1995 /* Release memory for MAC filter entries which were
1996 * synced up with HW.
2003 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
2006 aq_err = pf->hw.aq.asq_last_status;
2009 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
2010 dev_info(&pf->pdev->dev,
2011 "ignoring delete macvlan error, err %s aq_err %s\n",
2012 i40e_stat_str(&pf->hw, aq_ret),
2013 i40e_aq_str(&pf->hw, aq_err));
2020 if (!list_empty(&tmp_add_list)) {
2022 /* do all the adds now */
2023 filter_list_len = pf->hw.aq.asq_buf_size /
2024 sizeof(struct i40e_aqc_add_macvlan_element_data),
2025 add_list = kcalloc(filter_list_len,
2026 sizeof(struct i40e_aqc_add_macvlan_element_data),
2029 /* Purge element from temporary lists */
2030 i40e_cleanup_add_list(&tmp_add_list);
2032 /* Undo add filter entries from VSI MAC filter list */
2033 spin_lock_bh(&vsi->mac_filter_list_lock);
2034 i40e_undo_add_filter_entries(vsi);
2035 spin_unlock_bh(&vsi->mac_filter_list_lock);
2040 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2042 add_happened = true;
2045 /* add to add array */
2046 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2047 add_list[num_add].vlan_tag =
2049 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2050 add_list[num_add].queue_number = 0;
2052 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2053 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2056 /* flush a full buffer */
2057 if (num_add == filter_list_len) {
2058 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2061 aq_err = pf->hw.aq.asq_last_status;
2066 memset(add_list, 0, sizeof(*add_list));
2068 /* Entries from tmp_add_list were cloned from MAC
2069 * filter list, hence clean those cloned entries
2076 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2077 add_list, num_add, NULL);
2078 aq_err = pf->hw.aq.asq_last_status;
2084 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2085 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2086 dev_info(&pf->pdev->dev,
2087 "add filter failed, err %s aq_err %s\n",
2088 i40e_stat_str(&pf->hw, aq_ret),
2089 i40e_aq_str(&pf->hw, aq_err));
2090 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2091 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2093 promisc_forced_on = true;
2094 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2096 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2101 /* check for changes in promiscuous modes */
2102 if (changed_flags & IFF_ALLMULTI) {
2103 bool cur_multipromisc;
2105 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2106 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2111 retval = i40e_aq_rc_to_posix(aq_ret,
2112 pf->hw.aq.asq_last_status);
2113 dev_info(&pf->pdev->dev,
2114 "set multi promisc failed, err %s aq_err %s\n",
2115 i40e_stat_str(&pf->hw, aq_ret),
2116 i40e_aq_str(&pf->hw,
2117 pf->hw.aq.asq_last_status));
2120 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2123 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2124 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2126 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2127 /* set defport ON for Main VSI instead of true promisc
2128 * this way we will get all unicast/multicast and VLAN
2129 * promisc behavior but will not get VF or VMDq traffic
2130 * replicated on the Main VSI.
2132 if (pf->cur_promisc != cur_promisc) {
2133 pf->cur_promisc = cur_promisc;
2134 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2137 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2143 i40e_aq_rc_to_posix(aq_ret,
2144 pf->hw.aq.asq_last_status);
2145 dev_info(&pf->pdev->dev,
2146 "set unicast promisc failed, err %d, aq_err %d\n",
2147 aq_ret, pf->hw.aq.asq_last_status);
2149 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2155 i40e_aq_rc_to_posix(aq_ret,
2156 pf->hw.aq.asq_last_status);
2157 dev_info(&pf->pdev->dev,
2158 "set multicast promisc failed, err %d, aq_err %d\n",
2159 aq_ret, pf->hw.aq.asq_last_status);
2162 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2166 retval = i40e_aq_rc_to_posix(aq_ret,
2167 pf->hw.aq.asq_last_status);
2168 dev_info(&pf->pdev->dev,
2169 "set brdcast promisc failed, err %s, aq_err %s\n",
2170 i40e_stat_str(&pf->hw, aq_ret),
2171 i40e_aq_str(&pf->hw,
2172 pf->hw.aq.asq_last_status));
2176 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2181 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2182 * @pf: board private structure
2184 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2188 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2190 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2192 for (v = 0; v < pf->num_alloc_vsi; v++) {
2194 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2195 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2198 /* come back and try again later */
2199 pf->flags |= I40E_FLAG_FILTER_SYNC;
2207 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2208 * @netdev: network interface device structure
2209 * @new_mtu: new value for maximum frame size
2211 * Returns 0 on success, negative on failure
2213 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2215 struct i40e_netdev_priv *np = netdev_priv(netdev);
2216 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2217 struct i40e_vsi *vsi = np->vsi;
2219 /* MTU < 68 is an error and causes problems on some kernels */
2220 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2223 netdev_info(netdev, "changing MTU from %d to %d\n",
2224 netdev->mtu, new_mtu);
2225 netdev->mtu = new_mtu;
2226 if (netif_running(netdev))
2227 i40e_vsi_reinit_locked(vsi);
2233 * i40e_ioctl - Access the hwtstamp interface
2234 * @netdev: network interface device structure
2235 * @ifr: interface request data
2236 * @cmd: ioctl command
2238 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2240 struct i40e_netdev_priv *np = netdev_priv(netdev);
2241 struct i40e_pf *pf = np->vsi->back;
2245 return i40e_ptp_get_ts_config(pf, ifr);
2247 return i40e_ptp_set_ts_config(pf, ifr);
2254 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2255 * @vsi: the vsi being adjusted
2257 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2259 struct i40e_vsi_context ctxt;
2262 if ((vsi->info.valid_sections &
2263 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2264 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2265 return; /* already enabled */
2267 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2268 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2269 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2271 ctxt.seid = vsi->seid;
2272 ctxt.info = vsi->info;
2273 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2275 dev_info(&vsi->back->pdev->dev,
2276 "update vlan stripping failed, err %s aq_err %s\n",
2277 i40e_stat_str(&vsi->back->hw, ret),
2278 i40e_aq_str(&vsi->back->hw,
2279 vsi->back->hw.aq.asq_last_status));
2284 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2285 * @vsi: the vsi being adjusted
2287 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2289 struct i40e_vsi_context ctxt;
2292 if ((vsi->info.valid_sections &
2293 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2294 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2295 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2296 return; /* already disabled */
2298 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2299 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2300 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2302 ctxt.seid = vsi->seid;
2303 ctxt.info = vsi->info;
2304 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2306 dev_info(&vsi->back->pdev->dev,
2307 "update vlan stripping failed, err %s aq_err %s\n",
2308 i40e_stat_str(&vsi->back->hw, ret),
2309 i40e_aq_str(&vsi->back->hw,
2310 vsi->back->hw.aq.asq_last_status));
2315 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2316 * @netdev: network interface to be adjusted
2317 * @features: netdev features to test if VLAN offload is enabled or not
2319 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2321 struct i40e_netdev_priv *np = netdev_priv(netdev);
2322 struct i40e_vsi *vsi = np->vsi;
2324 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2325 i40e_vlan_stripping_enable(vsi);
2327 i40e_vlan_stripping_disable(vsi);
2331 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2332 * @vsi: the vsi being configured
2333 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2335 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2337 struct i40e_mac_filter *f, *add_f;
2338 bool is_netdev, is_vf;
2340 is_vf = (vsi->type == I40E_VSI_SRIOV);
2341 is_netdev = !!(vsi->netdev);
2343 /* Locked once because all functions invoked below iterates list*/
2344 spin_lock_bh(&vsi->mac_filter_list_lock);
2347 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2350 dev_info(&vsi->back->pdev->dev,
2351 "Could not add vlan filter %d for %pM\n",
2352 vid, vsi->netdev->dev_addr);
2353 spin_unlock_bh(&vsi->mac_filter_list_lock);
2358 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2359 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2361 dev_info(&vsi->back->pdev->dev,
2362 "Could not add vlan filter %d for %pM\n",
2364 spin_unlock_bh(&vsi->mac_filter_list_lock);
2369 /* Now if we add a vlan tag, make sure to check if it is the first
2370 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2371 * with 0, so we now accept untagged and specified tagged traffic
2372 * (and not any taged and untagged)
2375 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2377 is_vf, is_netdev)) {
2378 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2379 I40E_VLAN_ANY, is_vf, is_netdev);
2380 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2383 dev_info(&vsi->back->pdev->dev,
2384 "Could not add filter 0 for %pM\n",
2385 vsi->netdev->dev_addr);
2386 spin_unlock_bh(&vsi->mac_filter_list_lock);
2392 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2393 if (vid > 0 && !vsi->info.pvid) {
2394 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2395 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2398 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2400 add_f = i40e_add_filter(vsi, f->macaddr,
2401 0, is_vf, is_netdev);
2403 dev_info(&vsi->back->pdev->dev,
2404 "Could not add filter 0 for %pM\n",
2406 spin_unlock_bh(&vsi->mac_filter_list_lock);
2412 spin_unlock_bh(&vsi->mac_filter_list_lock);
2414 /* schedule our worker thread which will take care of
2415 * applying the new filter changes
2417 i40e_service_event_schedule(vsi->back);
2422 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2423 * @vsi: the vsi being configured
2424 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2426 * Return: 0 on success or negative otherwise
2428 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2430 struct net_device *netdev = vsi->netdev;
2431 struct i40e_mac_filter *f, *add_f;
2432 bool is_vf, is_netdev;
2433 int filter_count = 0;
2435 is_vf = (vsi->type == I40E_VSI_SRIOV);
2436 is_netdev = !!(netdev);
2438 /* Locked once because all functions invoked below iterates list */
2439 spin_lock_bh(&vsi->mac_filter_list_lock);
2442 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2444 list_for_each_entry(f, &vsi->mac_filter_list, list)
2445 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2447 /* go through all the filters for this VSI and if there is only
2448 * vid == 0 it means there are no other filters, so vid 0 must
2449 * be replaced with -1. This signifies that we should from now
2450 * on accept any traffic (with any tag present, or untagged)
2452 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2455 ether_addr_equal(netdev->dev_addr, f->macaddr))
2463 if (!filter_count && is_netdev) {
2464 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2465 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2468 dev_info(&vsi->back->pdev->dev,
2469 "Could not add filter %d for %pM\n",
2470 I40E_VLAN_ANY, netdev->dev_addr);
2471 spin_unlock_bh(&vsi->mac_filter_list_lock);
2476 if (!filter_count) {
2477 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2478 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2479 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2482 dev_info(&vsi->back->pdev->dev,
2483 "Could not add filter %d for %pM\n",
2484 I40E_VLAN_ANY, f->macaddr);
2485 spin_unlock_bh(&vsi->mac_filter_list_lock);
2491 spin_unlock_bh(&vsi->mac_filter_list_lock);
2493 /* schedule our worker thread which will take care of
2494 * applying the new filter changes
2496 i40e_service_event_schedule(vsi->back);
2501 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2502 * @netdev: network interface to be adjusted
2503 * @vid: vlan id to be added
2505 * net_device_ops implementation for adding vlan ids
2508 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2509 __always_unused __be16 proto, u16 vid)
2511 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2512 __always_unused __be16 proto, u16 vid)
2515 struct i40e_netdev_priv *np = netdev_priv(netdev);
2516 struct i40e_vsi *vsi = np->vsi;
2522 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2524 /* If the network stack called us with vid = 0 then
2525 * it is asking to receive priority tagged packets with
2526 * vlan id 0. Our HW receives them by default when configured
2527 * to receive untagged packets so there is no need to add an
2528 * extra filter for vlan 0 tagged packets.
2531 ret = i40e_vsi_add_vlan(vsi, vid);
2533 if (!ret && (vid < VLAN_N_VID))
2534 set_bit(vid, vsi->active_vlans);
2540 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2541 * @netdev: network interface to be adjusted
2542 * @vid: vlan id to be removed
2544 * net_device_ops implementation for removing vlan ids
2547 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2548 __always_unused __be16 proto, u16 vid)
2550 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2551 __always_unused __be16 proto, u16 vid)
2554 struct i40e_netdev_priv *np = netdev_priv(netdev);
2555 struct i40e_vsi *vsi = np->vsi;
2557 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2559 /* return code is ignored as there is nothing a user
2560 * can do about failure to remove and a log message was
2561 * already printed from the other function
2563 i40e_vsi_kill_vlan(vsi, vid);
2565 clear_bit(vid, vsi->active_vlans);
2571 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2572 * @vsi: the vsi being brought back up
2574 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2581 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2583 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2584 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2589 * i40e_vsi_add_pvid - Add pvid for the VSI
2590 * @vsi: the vsi being adjusted
2591 * @vid: the vlan id to set as a PVID
2593 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2595 struct i40e_vsi_context ctxt;
2598 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2599 vsi->info.pvid = cpu_to_le16(vid);
2600 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2601 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2602 I40E_AQ_VSI_PVLAN_EMOD_STR;
2604 ctxt.seid = vsi->seid;
2605 ctxt.info = vsi->info;
2606 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2608 dev_info(&vsi->back->pdev->dev,
2609 "add pvid failed, err %s aq_err %s\n",
2610 i40e_stat_str(&vsi->back->hw, ret),
2611 i40e_aq_str(&vsi->back->hw,
2612 vsi->back->hw.aq.asq_last_status));
2620 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2621 * @vsi: the vsi being adjusted
2623 * Just use the vlan_rx_register() service to put it back to normal
2625 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2627 i40e_vlan_stripping_disable(vsi);
2633 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2634 * @vsi: ptr to the VSI
2636 * If this function returns with an error, then it's possible one or
2637 * more of the rings is populated (while the rest are not). It is the
2638 * callers duty to clean those orphaned rings.
2640 * Return 0 on success, negative on failure
2642 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2646 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2647 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2653 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2654 * @vsi: ptr to the VSI
2656 * Free VSI's transmit software resources
2658 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2665 for (i = 0; i < vsi->num_queue_pairs; i++)
2666 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2667 i40e_free_tx_resources(vsi->tx_rings[i]);
2671 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2672 * @vsi: ptr to the VSI
2674 * If this function returns with an error, then it's possible one or
2675 * more of the rings is populated (while the rest are not). It is the
2676 * callers duty to clean those orphaned rings.
2678 * Return 0 on success, negative on failure
2680 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2684 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2685 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2687 i40e_fcoe_setup_ddp_resources(vsi);
2693 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2694 * @vsi: ptr to the VSI
2696 * Free all receive software resources
2698 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2705 for (i = 0; i < vsi->num_queue_pairs; i++)
2706 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2707 i40e_free_rx_resources(vsi->rx_rings[i]);
2709 i40e_fcoe_free_ddp_resources(vsi);
2714 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2715 * @ring: The Tx ring to configure
2717 * This enables/disables XPS for a given Tx descriptor ring
2718 * based on the TCs enabled for the VSI that ring belongs to.
2720 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2722 struct i40e_vsi *vsi = ring->vsi;
2725 if (!ring->q_vector || !ring->netdev)
2728 /* Single TC mode enable XPS */
2729 if (vsi->tc_config.numtc <= 1) {
2730 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2731 netif_set_xps_queue(ring->netdev,
2732 &ring->q_vector->affinity_mask,
2734 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2735 /* Disable XPS to allow selection based on TC */
2736 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2737 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2738 free_cpumask_var(mask);
2741 /* schedule our worker thread which will take care of
2742 * applying the new filter changes
2744 i40e_service_event_schedule(vsi->back);
2748 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2749 * @ring: The Tx ring to configure
2751 * Configure the Tx descriptor ring in the HMC context.
2753 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2755 struct i40e_vsi *vsi = ring->vsi;
2756 u16 pf_q = vsi->base_queue + ring->queue_index;
2757 struct i40e_hw *hw = &vsi->back->hw;
2758 struct i40e_hmc_obj_txq tx_ctx;
2759 i40e_status err = 0;
2762 /* some ATR related tx ring init */
2763 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2764 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2765 ring->atr_count = 0;
2767 ring->atr_sample_rate = 0;
2771 i40e_config_xps_tx_ring(ring);
2773 /* clear the context structure first */
2774 memset(&tx_ctx, 0, sizeof(tx_ctx));
2776 tx_ctx.new_context = 1;
2777 tx_ctx.base = (ring->dma / 128);
2778 tx_ctx.qlen = ring->count;
2779 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2780 I40E_FLAG_FD_ATR_ENABLED));
2782 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2784 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2785 /* FDIR VSI tx ring can still use RS bit and writebacks */
2786 if (vsi->type != I40E_VSI_FDIR)
2787 tx_ctx.head_wb_ena = 1;
2788 tx_ctx.head_wb_addr = ring->dma +
2789 (ring->count * sizeof(struct i40e_tx_desc));
2791 /* As part of VSI creation/update, FW allocates certain
2792 * Tx arbitration queue sets for each TC enabled for
2793 * the VSI. The FW returns the handles to these queue
2794 * sets as part of the response buffer to Add VSI,
2795 * Update VSI, etc. AQ commands. It is expected that
2796 * these queue set handles be associated with the Tx
2797 * queues by the driver as part of the TX queue context
2798 * initialization. This has to be done regardless of
2799 * DCB as by default everything is mapped to TC0.
2801 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2802 tx_ctx.rdylist_act = 0;
2804 /* clear the context in the HMC */
2805 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2807 dev_info(&vsi->back->pdev->dev,
2808 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2809 ring->queue_index, pf_q, err);
2813 /* set the context in the HMC */
2814 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2816 dev_info(&vsi->back->pdev->dev,
2817 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2818 ring->queue_index, pf_q, err);
2822 /* Now associate this queue with this PCI function */
2823 if (vsi->type == I40E_VSI_VMDQ2) {
2824 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2825 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2826 I40E_QTX_CTL_VFVM_INDX_MASK;
2828 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2831 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2832 I40E_QTX_CTL_PF_INDX_MASK);
2833 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2836 /* cache tail off for easier writes later */
2837 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2843 * i40e_configure_rx_ring - Configure a receive ring context
2844 * @ring: The Rx ring to configure
2846 * Configure the Rx descriptor ring in the HMC context.
2848 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2850 struct i40e_vsi *vsi = ring->vsi;
2851 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2852 u16 pf_q = vsi->base_queue + ring->queue_index;
2853 struct i40e_hw *hw = &vsi->back->hw;
2854 struct i40e_hmc_obj_rxq rx_ctx;
2855 i40e_status err = 0;
2859 /* clear the context structure first */
2860 memset(&rx_ctx, 0, sizeof(rx_ctx));
2862 ring->rx_buf_len = vsi->rx_buf_len;
2863 ring->rx_hdr_len = vsi->rx_hdr_len;
2865 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2866 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2868 rx_ctx.base = (ring->dma / 128);
2869 rx_ctx.qlen = ring->count;
2871 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2872 set_ring_16byte_desc_enabled(ring);
2878 rx_ctx.dtype = vsi->dtype;
2880 set_ring_ps_enabled(ring);
2881 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2883 I40E_RX_SPLIT_TCP_UDP |
2886 rx_ctx.hsplit_0 = 0;
2889 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2890 (chain_len * ring->rx_buf_len));
2891 if (hw->revision_id == 0)
2892 rx_ctx.lrxqthresh = 0;
2894 rx_ctx.lrxqthresh = 2;
2895 rx_ctx.crcstrip = 1;
2897 /* this controls whether VLAN is stripped from inner headers */
2900 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2902 /* set the prefena field to 1 because the manual says to */
2905 /* clear the context in the HMC */
2906 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2908 dev_info(&vsi->back->pdev->dev,
2909 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2910 ring->queue_index, pf_q, err);
2914 /* set the context in the HMC */
2915 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2917 dev_info(&vsi->back->pdev->dev,
2918 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2919 ring->queue_index, pf_q, err);
2923 /* cache tail for quicker writes, and clear the reg before use */
2924 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2925 writel(0, ring->tail);
2927 if (ring_is_ps_enabled(ring)) {
2928 i40e_alloc_rx_headers(ring);
2929 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2931 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2938 * i40e_vsi_configure_tx - Configure the VSI for Tx
2939 * @vsi: VSI structure describing this set of rings and resources
2941 * Configure the Tx VSI for operation.
2943 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2948 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2949 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2955 * i40e_vsi_configure_rx - Configure the VSI for Rx
2956 * @vsi: the VSI being configured
2958 * Configure the Rx VSI for operation.
2960 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2965 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2966 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2967 + ETH_FCS_LEN + VLAN_HLEN;
2969 vsi->max_frame = I40E_RXBUFFER_2048;
2971 /* figure out correct receive buffer length */
2972 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2973 I40E_FLAG_RX_PS_ENABLED)) {
2974 case I40E_FLAG_RX_1BUF_ENABLED:
2975 vsi->rx_hdr_len = 0;
2976 vsi->rx_buf_len = vsi->max_frame;
2977 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2979 case I40E_FLAG_RX_PS_ENABLED:
2980 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2981 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2982 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2985 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2986 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2987 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2992 /* setup rx buffer for FCoE */
2993 if ((vsi->type == I40E_VSI_FCOE) &&
2994 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2995 vsi->rx_hdr_len = 0;
2996 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2997 vsi->max_frame = I40E_RXBUFFER_3072;
2998 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
3001 #endif /* I40E_FCOE */
3002 /* round up for the chip's needs */
3003 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
3004 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
3005 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3006 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3008 /* set up individual rings */
3009 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3010 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3016 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3017 * @vsi: ptr to the VSI
3019 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3021 struct i40e_ring *tx_ring, *rx_ring;
3022 u16 qoffset, qcount;
3025 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3026 /* Reset the TC information */
3027 for (i = 0; i < vsi->num_queue_pairs; i++) {
3028 rx_ring = vsi->rx_rings[i];
3029 tx_ring = vsi->tx_rings[i];
3030 rx_ring->dcb_tc = 0;
3031 tx_ring->dcb_tc = 0;
3035 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3036 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3039 qoffset = vsi->tc_config.tc_info[n].qoffset;
3040 qcount = vsi->tc_config.tc_info[n].qcount;
3041 for (i = qoffset; i < (qoffset + qcount); i++) {
3042 rx_ring = vsi->rx_rings[i];
3043 tx_ring = vsi->tx_rings[i];
3044 rx_ring->dcb_tc = n;
3045 tx_ring->dcb_tc = n;
3051 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3052 * @vsi: ptr to the VSI
3054 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3057 i40e_set_rx_mode(vsi->netdev);
3061 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3062 * @vsi: Pointer to the targeted VSI
3064 * This function replays the hlist on the hw where all the SB Flow Director
3065 * filters were saved.
3067 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3069 struct i40e_fdir_filter *filter;
3070 struct i40e_pf *pf = vsi->back;
3071 struct hlist_node *node;
3073 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3076 hlist_for_each_entry_safe(filter, node,
3077 &pf->fdir_filter_list, fdir_node) {
3078 i40e_add_del_fdir(vsi, filter, true);
3083 * i40e_vsi_configure - Set up the VSI for action
3084 * @vsi: the VSI being configured
3086 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3090 i40e_set_vsi_rx_mode(vsi);
3091 i40e_restore_vlan(vsi);
3092 i40e_vsi_config_dcb_rings(vsi);
3093 err = i40e_vsi_configure_tx(vsi);
3095 err = i40e_vsi_configure_rx(vsi);
3101 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3102 * @vsi: the VSI being configured
3104 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3106 struct i40e_pf *pf = vsi->back;
3107 struct i40e_hw *hw = &pf->hw;
3112 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3113 * and PFINT_LNKLSTn registers, e.g.:
3114 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3116 qp = vsi->base_queue;
3117 vector = vsi->base_vector;
3118 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3119 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3121 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3122 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3123 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3124 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3126 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3127 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3128 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3130 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3131 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3133 /* Linked list for the queuepairs assigned to this vector */
3134 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3135 for (q = 0; q < q_vector->num_ringpairs; q++) {
3138 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3139 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3140 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3141 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3143 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3145 wr32(hw, I40E_QINT_RQCTL(qp), val);
3147 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3148 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3149 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3150 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3152 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3154 /* Terminate the linked list */
3155 if (q == (q_vector->num_ringpairs - 1))
3156 val |= (I40E_QUEUE_END_OF_LIST
3157 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3159 wr32(hw, I40E_QINT_TQCTL(qp), val);
3168 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3169 * @hw: ptr to the hardware info
3171 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3173 struct i40e_hw *hw = &pf->hw;
3176 /* clear things first */
3177 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3178 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3180 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3181 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3182 I40E_PFINT_ICR0_ENA_GRST_MASK |
3183 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3184 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3185 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3186 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3187 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3189 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3190 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3192 if (pf->flags & I40E_FLAG_PTP)
3193 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3195 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3197 /* SW_ITR_IDX = 0, but don't change INTENA */
3198 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3199 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3201 /* OTHER_ITR_IDX = 0 */
3202 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3206 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3207 * @vsi: the VSI being configured
3209 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3211 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3212 struct i40e_pf *pf = vsi->back;
3213 struct i40e_hw *hw = &pf->hw;
3216 /* set the ITR configuration */
3217 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3218 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3219 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3220 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3221 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3222 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3223 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3225 i40e_enable_misc_int_causes(pf);
3227 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3228 wr32(hw, I40E_PFINT_LNKLST0, 0);
3230 /* Associate the queue pair to the vector and enable the queue int */
3231 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3232 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3233 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3235 wr32(hw, I40E_QINT_RQCTL(0), val);
3237 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3238 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3239 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3241 wr32(hw, I40E_QINT_TQCTL(0), val);
3246 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3247 * @pf: board private structure
3249 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3251 struct i40e_hw *hw = &pf->hw;
3253 wr32(hw, I40E_PFINT_DYN_CTL0,
3254 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3259 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3260 * @pf: board private structure
3262 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3264 struct i40e_hw *hw = &pf->hw;
3267 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3268 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3269 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3271 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3276 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3277 * @vsi: pointer to a vsi
3278 * @vector: disable a particular Hw Interrupt vector
3280 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3282 struct i40e_pf *pf = vsi->back;
3283 struct i40e_hw *hw = &pf->hw;
3286 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3287 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3292 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3293 * @irq: interrupt number
3294 * @data: pointer to a q_vector
3296 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3298 struct i40e_q_vector *q_vector = data;
3300 if (!q_vector->tx.ring && !q_vector->rx.ring)
3303 napi_schedule_irqoff(&q_vector->napi);
3309 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3310 * @vsi: the VSI being configured
3311 * @basename: name for the vector
3313 * Allocates MSI-X vectors and requests interrupts from the kernel.
3315 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3317 int q_vectors = vsi->num_q_vectors;
3318 struct i40e_pf *pf = vsi->back;
3319 int base = vsi->base_vector;
3324 for (vector = 0; vector < q_vectors; vector++) {
3325 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3327 if (q_vector->tx.ring && q_vector->rx.ring) {
3328 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3329 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3331 } else if (q_vector->rx.ring) {
3332 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3333 "%s-%s-%d", basename, "rx", rx_int_idx++);
3334 } else if (q_vector->tx.ring) {
3335 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3336 "%s-%s-%d", basename, "tx", tx_int_idx++);
3338 /* skip this unused q_vector */
3341 err = request_irq(pf->msix_entries[base + vector].vector,
3347 dev_info(&pf->pdev->dev,
3348 "MSIX request_irq failed, error: %d\n", err);
3349 goto free_queue_irqs;
3351 /* assign the mask for this irq */
3352 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3353 &q_vector->affinity_mask);
3356 vsi->irqs_ready = true;
3362 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3364 free_irq(pf->msix_entries[base + vector].vector,
3365 &(vsi->q_vectors[vector]));
3371 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3372 * @vsi: the VSI being un-configured
3374 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3376 struct i40e_pf *pf = vsi->back;
3377 struct i40e_hw *hw = &pf->hw;
3378 int base = vsi->base_vector;
3381 for (i = 0; i < vsi->num_queue_pairs; i++) {
3382 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3383 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3386 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3387 for (i = vsi->base_vector;
3388 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3389 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3392 for (i = 0; i < vsi->num_q_vectors; i++)
3393 synchronize_irq(pf->msix_entries[i + base].vector);
3395 /* Legacy and MSI mode - this stops all interrupt handling */
3396 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3397 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3399 synchronize_irq(pf->pdev->irq);
3404 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3405 * @vsi: the VSI being configured
3407 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3409 struct i40e_pf *pf = vsi->back;
3412 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3413 for (i = 0; i < vsi->num_q_vectors; i++)
3414 i40e_irq_dynamic_enable(vsi, i);
3416 i40e_irq_dynamic_enable_icr0(pf);
3419 i40e_flush(&pf->hw);
3424 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3425 * @pf: board private structure
3427 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3430 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3431 i40e_flush(&pf->hw);
3435 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3436 * @irq: interrupt number
3437 * @data: pointer to a q_vector
3439 * This is the handler used for all MSI/Legacy interrupts, and deals
3440 * with both queue and non-queue interrupts. This is also used in
3441 * MSIX mode to handle the non-queue interrupts.
3443 static irqreturn_t i40e_intr(int irq, void *data)
3445 struct i40e_pf *pf = (struct i40e_pf *)data;
3446 struct i40e_hw *hw = &pf->hw;
3447 irqreturn_t ret = IRQ_NONE;
3448 u32 icr0, icr0_remaining;
3451 icr0 = rd32(hw, I40E_PFINT_ICR0);
3452 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3454 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3455 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3458 /* if interrupt but no bits showing, must be SWINT */
3459 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3460 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3463 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3464 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3465 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3466 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3467 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3470 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3471 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3472 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3473 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3475 /* temporarily disable queue cause for NAPI processing */
3476 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3478 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3479 wr32(hw, I40E_QINT_RQCTL(0), qval);
3481 qval = rd32(hw, I40E_QINT_TQCTL(0));
3482 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3483 wr32(hw, I40E_QINT_TQCTL(0), qval);
3485 if (!test_bit(__I40E_DOWN, &pf->state))
3486 napi_schedule_irqoff(&q_vector->napi);
3489 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3490 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3491 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3494 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3495 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3496 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3499 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3500 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3501 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3504 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3505 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3506 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3507 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3508 val = rd32(hw, I40E_GLGEN_RSTAT);
3509 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3510 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3511 if (val == I40E_RESET_CORER) {
3513 } else if (val == I40E_RESET_GLOBR) {
3515 } else if (val == I40E_RESET_EMPR) {
3517 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3521 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3522 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3523 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3524 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3525 rd32(hw, I40E_PFHMC_ERRORINFO),
3526 rd32(hw, I40E_PFHMC_ERRORDATA));
3529 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3530 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3532 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3533 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3534 i40e_ptp_tx_hwtstamp(pf);
3538 /* If a critical error is pending we have no choice but to reset the
3540 * Report and mask out any remaining unexpected interrupts.
3542 icr0_remaining = icr0 & ena_mask;
3543 if (icr0_remaining) {
3544 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3546 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3547 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3548 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3549 dev_info(&pf->pdev->dev, "device will be reset\n");
3550 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3551 i40e_service_event_schedule(pf);
3553 ena_mask &= ~icr0_remaining;
3558 /* re-enable interrupt causes */
3559 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3560 if (!test_bit(__I40E_DOWN, &pf->state)) {
3561 i40e_service_event_schedule(pf);
3562 i40e_irq_dynamic_enable_icr0(pf);
3569 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3570 * @tx_ring: tx ring to clean
3571 * @budget: how many cleans we're allowed
3573 * Returns true if there's any budget left (e.g. the clean is finished)
3575 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3577 struct i40e_vsi *vsi = tx_ring->vsi;
3578 u16 i = tx_ring->next_to_clean;
3579 struct i40e_tx_buffer *tx_buf;
3580 struct i40e_tx_desc *tx_desc;
3582 tx_buf = &tx_ring->tx_bi[i];
3583 tx_desc = I40E_TX_DESC(tx_ring, i);
3584 i -= tx_ring->count;
3587 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3589 /* if next_to_watch is not set then there is no work pending */
3593 /* prevent any other reads prior to eop_desc */
3594 read_barrier_depends();
3596 /* if the descriptor isn't done, no work yet to do */
3597 if (!(eop_desc->cmd_type_offset_bsz &
3598 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3601 /* clear next_to_watch to prevent false hangs */
3602 tx_buf->next_to_watch = NULL;
3604 tx_desc->buffer_addr = 0;
3605 tx_desc->cmd_type_offset_bsz = 0;
3606 /* move past filter desc */
3611 i -= tx_ring->count;
3612 tx_buf = tx_ring->tx_bi;
3613 tx_desc = I40E_TX_DESC(tx_ring, 0);
3615 /* unmap skb header data */
3616 dma_unmap_single(tx_ring->dev,
3617 dma_unmap_addr(tx_buf, dma),
3618 dma_unmap_len(tx_buf, len),
3620 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3621 kfree(tx_buf->raw_buf);
3623 tx_buf->raw_buf = NULL;
3624 tx_buf->tx_flags = 0;
3625 tx_buf->next_to_watch = NULL;
3626 dma_unmap_len_set(tx_buf, len, 0);
3627 tx_desc->buffer_addr = 0;
3628 tx_desc->cmd_type_offset_bsz = 0;
3630 /* move us past the eop_desc for start of next FD desc */
3635 i -= tx_ring->count;
3636 tx_buf = tx_ring->tx_bi;
3637 tx_desc = I40E_TX_DESC(tx_ring, 0);
3640 /* update budget accounting */
3642 } while (likely(budget));
3644 i += tx_ring->count;
3645 tx_ring->next_to_clean = i;
3647 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3648 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3654 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3655 * @irq: interrupt number
3656 * @data: pointer to a q_vector
3658 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3660 struct i40e_q_vector *q_vector = data;
3661 struct i40e_vsi *vsi;
3663 if (!q_vector->tx.ring)
3666 vsi = q_vector->tx.ring->vsi;
3667 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3673 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3674 * @vsi: the VSI being configured
3675 * @v_idx: vector index
3676 * @qp_idx: queue pair index
3678 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3680 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3681 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3682 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3684 tx_ring->q_vector = q_vector;
3685 tx_ring->next = q_vector->tx.ring;
3686 q_vector->tx.ring = tx_ring;
3687 q_vector->tx.count++;
3689 rx_ring->q_vector = q_vector;
3690 rx_ring->next = q_vector->rx.ring;
3691 q_vector->rx.ring = rx_ring;
3692 q_vector->rx.count++;
3696 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3697 * @vsi: the VSI being configured
3699 * This function maps descriptor rings to the queue-specific vectors
3700 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3701 * one vector per queue pair, but on a constrained vector budget, we
3702 * group the queue pairs as "efficiently" as possible.
3704 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3706 int qp_remaining = vsi->num_queue_pairs;
3707 int q_vectors = vsi->num_q_vectors;
3712 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3713 * group them so there are multiple queues per vector.
3714 * It is also important to go through all the vectors available to be
3715 * sure that if we don't use all the vectors, that the remaining vectors
3716 * are cleared. This is especially important when decreasing the
3717 * number of queues in use.
3719 for (; v_start < q_vectors; v_start++) {
3720 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3722 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3724 q_vector->num_ringpairs = num_ringpairs;
3726 q_vector->rx.count = 0;
3727 q_vector->tx.count = 0;
3728 q_vector->rx.ring = NULL;
3729 q_vector->tx.ring = NULL;
3731 while (num_ringpairs--) {
3732 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3740 * i40e_vsi_request_irq - Request IRQ from the OS
3741 * @vsi: the VSI being configured
3742 * @basename: name for the vector
3744 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3746 struct i40e_pf *pf = vsi->back;
3749 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3750 err = i40e_vsi_request_irq_msix(vsi, basename);
3751 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3752 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3755 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3759 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3764 #ifdef CONFIG_NET_POLL_CONTROLLER
3766 * i40e_netpoll - A Polling 'interrupt'handler
3767 * @netdev: network interface device structure
3769 * This is used by netconsole to send skbs without having to re-enable
3770 * interrupts. It's not called while the normal interrupt routine is executing.
3773 void i40e_netpoll(struct net_device *netdev)
3775 static void i40e_netpoll(struct net_device *netdev)
3778 struct i40e_netdev_priv *np = netdev_priv(netdev);
3779 struct i40e_vsi *vsi = np->vsi;
3780 struct i40e_pf *pf = vsi->back;
3783 /* if interface is down do nothing */
3784 if (test_bit(__I40E_DOWN, &vsi->state))
3787 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3788 for (i = 0; i < vsi->num_q_vectors; i++)
3789 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3791 i40e_intr(pf->pdev->irq, netdev);
3797 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3798 * @pf: the PF being configured
3799 * @pf_q: the PF queue
3800 * @enable: enable or disable state of the queue
3802 * This routine will wait for the given Tx queue of the PF to reach the
3803 * enabled or disabled state.
3804 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3805 * multiple retries; else will return 0 in case of success.
3807 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3812 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3813 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3814 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3817 usleep_range(10, 20);
3819 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3826 * i40e_vsi_control_tx - Start or stop a VSI's rings
3827 * @vsi: the VSI being configured
3828 * @enable: start or stop the rings
3830 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3832 struct i40e_pf *pf = vsi->back;
3833 struct i40e_hw *hw = &pf->hw;
3834 int i, j, pf_q, ret = 0;
3837 pf_q = vsi->base_queue;
3838 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3840 /* warn the TX unit of coming changes */
3841 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3843 usleep_range(10, 20);
3845 for (j = 0; j < 50; j++) {
3846 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3847 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3848 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3850 usleep_range(1000, 2000);
3852 /* Skip if the queue is already in the requested state */
3853 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3856 /* turn on/off the queue */
3858 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3859 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3861 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3864 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3865 /* No waiting for the Tx queue to disable */
3866 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3869 /* wait for the change to finish */
3870 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3872 dev_info(&pf->pdev->dev,
3873 "VSI seid %d Tx ring %d %sable timeout\n",
3874 vsi->seid, pf_q, (enable ? "en" : "dis"));
3879 if (hw->revision_id == 0)
3885 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3886 * @pf: the PF being configured
3887 * @pf_q: the PF queue
3888 * @enable: enable or disable state of the queue
3890 * This routine will wait for the given Rx queue of the PF to reach the
3891 * enabled or disabled state.
3892 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3893 * multiple retries; else will return 0 in case of success.
3895 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3900 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3901 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3902 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3905 usleep_range(10, 20);
3907 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3914 * i40e_vsi_control_rx - Start or stop a VSI's rings
3915 * @vsi: the VSI being configured
3916 * @enable: start or stop the rings
3918 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3920 struct i40e_pf *pf = vsi->back;
3921 struct i40e_hw *hw = &pf->hw;
3922 int i, j, pf_q, ret = 0;
3925 pf_q = vsi->base_queue;
3926 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3927 for (j = 0; j < 50; j++) {
3928 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3929 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3930 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3932 usleep_range(1000, 2000);
3935 /* Skip if the queue is already in the requested state */
3936 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3939 /* turn on/off the queue */
3941 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3943 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3944 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3946 /* wait for the change to finish */
3947 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3949 dev_info(&pf->pdev->dev,
3950 "VSI seid %d Rx ring %d %sable timeout\n",
3951 vsi->seid, pf_q, (enable ? "en" : "dis"));
3960 * i40e_vsi_control_rings - Start or stop a VSI's rings
3961 * @vsi: the VSI being configured
3962 * @enable: start or stop the rings
3964 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3968 /* do rx first for enable and last for disable */
3970 ret = i40e_vsi_control_rx(vsi, request);
3973 ret = i40e_vsi_control_tx(vsi, request);
3975 /* Ignore return value, we need to shutdown whatever we can */
3976 i40e_vsi_control_tx(vsi, request);
3977 i40e_vsi_control_rx(vsi, request);
3984 * i40e_vsi_free_irq - Free the irq association with the OS
3985 * @vsi: the VSI being configured
3987 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3989 struct i40e_pf *pf = vsi->back;
3990 struct i40e_hw *hw = &pf->hw;
3991 int base = vsi->base_vector;
3995 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3996 if (!vsi->q_vectors)
3999 if (!vsi->irqs_ready)
4002 vsi->irqs_ready = false;
4003 for (i = 0; i < vsi->num_q_vectors; i++) {
4004 u16 vector = i + base;
4006 /* free only the irqs that were actually requested */
4007 if (!vsi->q_vectors[i] ||
4008 !vsi->q_vectors[i]->num_ringpairs)
4011 /* clear the affinity_mask in the IRQ descriptor */
4012 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4014 free_irq(pf->msix_entries[vector].vector,
4017 /* Tear down the interrupt queue link list
4019 * We know that they come in pairs and always
4020 * the Rx first, then the Tx. To clear the
4021 * link list, stick the EOL value into the
4022 * next_q field of the registers.
4024 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4025 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4026 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4027 val |= I40E_QUEUE_END_OF_LIST
4028 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4029 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4031 while (qp != I40E_QUEUE_END_OF_LIST) {
4034 val = rd32(hw, I40E_QINT_RQCTL(qp));
4036 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4037 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4038 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4039 I40E_QINT_RQCTL_INTEVENT_MASK);
4041 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4042 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4044 wr32(hw, I40E_QINT_RQCTL(qp), val);
4046 val = rd32(hw, I40E_QINT_TQCTL(qp));
4048 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4049 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4051 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4052 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4053 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4054 I40E_QINT_TQCTL_INTEVENT_MASK);
4056 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4057 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4059 wr32(hw, I40E_QINT_TQCTL(qp), val);
4064 free_irq(pf->pdev->irq, pf);
4066 val = rd32(hw, I40E_PFINT_LNKLST0);
4067 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4068 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4069 val |= I40E_QUEUE_END_OF_LIST
4070 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4071 wr32(hw, I40E_PFINT_LNKLST0, val);
4073 val = rd32(hw, I40E_QINT_RQCTL(qp));
4074 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4075 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4076 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4077 I40E_QINT_RQCTL_INTEVENT_MASK);
4079 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4080 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4082 wr32(hw, I40E_QINT_RQCTL(qp), val);
4084 val = rd32(hw, I40E_QINT_TQCTL(qp));
4086 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4087 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4088 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4089 I40E_QINT_TQCTL_INTEVENT_MASK);
4091 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4092 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4094 wr32(hw, I40E_QINT_TQCTL(qp), val);
4099 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4100 * @vsi: the VSI being configured
4101 * @v_idx: Index of vector to be freed
4103 * This function frees the memory allocated to the q_vector. In addition if
4104 * NAPI is enabled it will delete any references to the NAPI struct prior
4105 * to freeing the q_vector.
4107 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4109 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4110 struct i40e_ring *ring;
4115 /* disassociate q_vector from rings */
4116 i40e_for_each_ring(ring, q_vector->tx)
4117 ring->q_vector = NULL;
4119 i40e_for_each_ring(ring, q_vector->rx)
4120 ring->q_vector = NULL;
4122 /* only VSI w/ an associated netdev is set up w/ NAPI */
4124 netif_napi_del(&q_vector->napi);
4126 vsi->q_vectors[v_idx] = NULL;
4128 kfree_rcu(q_vector, rcu);
4132 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4133 * @vsi: the VSI being un-configured
4135 * This frees the memory allocated to the q_vectors and
4136 * deletes references to the NAPI struct.
4138 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4142 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4143 i40e_free_q_vector(vsi, v_idx);
4147 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4148 * @pf: board private structure
4150 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4152 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4153 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4154 pci_disable_msix(pf->pdev);
4155 kfree(pf->msix_entries);
4156 pf->msix_entries = NULL;
4157 kfree(pf->irq_pile);
4158 pf->irq_pile = NULL;
4159 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4160 pci_disable_msi(pf->pdev);
4162 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4166 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4167 * @pf: board private structure
4169 * We go through and clear interrupt specific resources and reset the structure
4170 * to pre-load conditions
4172 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4176 i40e_stop_misc_vector(pf);
4177 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4178 synchronize_irq(pf->msix_entries[0].vector);
4179 free_irq(pf->msix_entries[0].vector, pf);
4182 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4183 for (i = 0; i < pf->num_alloc_vsi; i++)
4185 i40e_vsi_free_q_vectors(pf->vsi[i]);
4186 i40e_reset_interrupt_capability(pf);
4190 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4191 * @vsi: the VSI being configured
4193 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4200 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4201 napi_enable(&vsi->q_vectors[q_idx]->napi);
4205 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4206 * @vsi: the VSI being configured
4208 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4215 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4216 napi_disable(&vsi->q_vectors[q_idx]->napi);
4220 * i40e_vsi_close - Shut down a VSI
4221 * @vsi: the vsi to be quelled
4223 static void i40e_vsi_close(struct i40e_vsi *vsi)
4225 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4227 i40e_vsi_free_irq(vsi);
4228 i40e_vsi_free_tx_resources(vsi);
4229 i40e_vsi_free_rx_resources(vsi);
4230 vsi->current_netdev_flags = 0;
4234 * i40e_quiesce_vsi - Pause a given VSI
4235 * @vsi: the VSI being paused
4237 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4239 if (test_bit(__I40E_DOWN, &vsi->state))
4242 /* No need to disable FCoE VSI when Tx suspended */
4243 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4244 vsi->type == I40E_VSI_FCOE) {
4245 dev_dbg(&vsi->back->pdev->dev,
4246 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4250 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4251 if (vsi->netdev && netif_running(vsi->netdev))
4252 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4254 i40e_vsi_close(vsi);
4258 * i40e_unquiesce_vsi - Resume a given VSI
4259 * @vsi: the VSI being resumed
4261 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4263 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4266 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4267 if (vsi->netdev && netif_running(vsi->netdev))
4268 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4270 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4274 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4277 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4281 for (v = 0; v < pf->num_alloc_vsi; v++) {
4283 i40e_quiesce_vsi(pf->vsi[v]);
4288 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4291 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4295 for (v = 0; v < pf->num_alloc_vsi; v++) {
4297 i40e_unquiesce_vsi(pf->vsi[v]);
4301 #ifdef CONFIG_I40E_DCB
4303 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4304 * @vsi: the VSI being configured
4306 * This function waits for the given VSI's Tx queues to be disabled.
4308 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4310 struct i40e_pf *pf = vsi->back;
4313 pf_q = vsi->base_queue;
4314 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4315 /* Check and wait for the disable status of the queue */
4316 ret = i40e_pf_txq_wait(pf, pf_q, false);
4318 dev_info(&pf->pdev->dev,
4319 "VSI seid %d Tx ring %d disable timeout\n",
4329 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4332 * This function waits for the Tx queues to be in disabled state for all the
4333 * VSIs that are managed by this PF.
4335 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4339 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4340 /* No need to wait for FCoE VSI queues */
4341 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4342 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4354 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4355 * @q_idx: TX queue number
4356 * @vsi: Pointer to VSI struct
4358 * This function checks specified queue for given VSI. Detects hung condition.
4359 * Sets hung bit since it is two step process. Before next run of service task
4360 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4361 * hung condition remain unchanged and during subsequent run, this function
4362 * issues SW interrupt to recover from hung condition.
4364 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4366 struct i40e_ring *tx_ring = NULL;
4368 u32 head, val, tx_pending;
4373 /* now that we have an index, find the tx_ring struct */
4374 for (i = 0; i < vsi->num_queue_pairs; i++) {
4375 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4376 if (q_idx == vsi->tx_rings[i]->queue_index) {
4377 tx_ring = vsi->tx_rings[i];
4386 /* Read interrupt register */
4387 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4389 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4390 tx_ring->vsi->base_vector - 1));
4392 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4394 /* Bail out if interrupts are disabled because napi_poll
4395 * execution in-progress or will get scheduled soon.
4396 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4398 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4401 head = i40e_get_head(tx_ring);
4403 tx_pending = i40e_get_tx_pending(tx_ring);
4405 /* HW is done executing descriptors, updated HEAD write back,
4406 * but SW hasn't processed those descriptors. If interrupt is
4407 * not generated from this point ON, it could result into
4408 * dev_watchdog detecting timeout on those netdev_queue,
4409 * hence proactively trigger SW interrupt.
4412 /* NAPI Poll didn't run and clear since it was set */
4413 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4414 &tx_ring->q_vector->hung_detected)) {
4415 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4416 vsi->seid, q_idx, tx_pending,
4417 tx_ring->next_to_clean, head,
4418 tx_ring->next_to_use,
4419 readl(tx_ring->tail));
4420 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4421 vsi->seid, q_idx, val);
4422 i40e_force_wb(vsi, tx_ring->q_vector);
4424 /* First Chance - detected possible hung */
4425 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4426 &tx_ring->q_vector->hung_detected);
4432 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4433 * @pf: pointer to PF struct
4435 * LAN VSI has netdev and netdev has TX queues. This function is to check
4436 * each of those TX queues if they are hung, trigger recovery by issuing
4439 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4441 struct net_device *netdev;
4442 struct i40e_vsi *vsi;
4445 /* Only for LAN VSI */
4446 vsi = pf->vsi[pf->lan_vsi];
4451 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4452 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4453 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4456 /* Make sure type is MAIN VSI */
4457 if (vsi->type != I40E_VSI_MAIN)
4460 netdev = vsi->netdev;
4464 /* Bail out if netif_carrier is not OK */
4465 if (!netif_carrier_ok(netdev))
4468 /* Go thru' TX queues for netdev */
4469 for (i = 0; i < netdev->num_tx_queues; i++) {
4470 struct netdev_queue *q;
4472 q = netdev_get_tx_queue(netdev, i);
4474 i40e_detect_recover_hung_queue(i, vsi);
4479 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4480 * @pf: pointer to PF
4482 * Get TC map for ISCSI PF type that will include iSCSI TC
4485 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4487 struct i40e_dcb_app_priority_table app;
4488 struct i40e_hw *hw = &pf->hw;
4489 u8 enabled_tc = 1; /* TC0 is always enabled */
4491 /* Get the iSCSI APP TLV */
4492 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4494 for (i = 0; i < dcbcfg->numapps; i++) {
4495 app = dcbcfg->app[i];
4496 if (app.selector == I40E_APP_SEL_TCPIP &&
4497 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4498 tc = dcbcfg->etscfg.prioritytable[app.priority];
4499 enabled_tc |= BIT_ULL(tc);
4508 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4509 * @dcbcfg: the corresponding DCBx configuration structure
4511 * Return the number of TCs from given DCBx configuration
4513 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4518 /* Scan the ETS Config Priority Table to find
4519 * traffic class enabled for a given priority
4520 * and use the traffic class index to get the
4521 * number of traffic classes enabled
4523 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4524 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4525 num_tc = dcbcfg->etscfg.prioritytable[i];
4528 /* Traffic class index starts from zero so
4529 * increment to return the actual count
4535 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4536 * @dcbcfg: the corresponding DCBx configuration structure
4538 * Query the current DCB configuration and return the number of
4539 * traffic classes enabled from the given DCBX config
4541 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4543 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4547 for (i = 0; i < num_tc; i++)
4548 enabled_tc |= BIT(i);
4554 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4555 * @pf: PF being queried
4557 * Return number of traffic classes enabled for the given PF
4559 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4561 struct i40e_hw *hw = &pf->hw;
4564 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4566 /* If DCB is not enabled then always in single TC */
4567 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4570 /* SFP mode will be enabled for all TCs on port */
4571 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4572 return i40e_dcb_get_num_tc(dcbcfg);
4574 /* MFP mode return count of enabled TCs for this PF */
4575 if (pf->hw.func_caps.iscsi)
4576 enabled_tc = i40e_get_iscsi_tc_map(pf);
4578 return 1; /* Only TC0 */
4580 /* At least have TC0 */
4581 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4582 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4583 if (enabled_tc & BIT_ULL(i))
4590 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4591 * @pf: PF being queried
4593 * Return a bitmap for first enabled traffic class for this PF.
4595 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4597 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4601 return 0x1; /* TC0 */
4603 /* Find the first enabled TC */
4604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4605 if (enabled_tc & BIT_ULL(i))
4613 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4614 * @pf: PF being queried
4616 * Return a bitmap for enabled traffic classes for this PF.
4618 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4620 /* If DCB is not enabled for this PF then just return default TC */
4621 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4622 return i40e_pf_get_default_tc(pf);
4624 /* SFP mode we want PF to be enabled for all TCs */
4625 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4626 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4628 /* MFP enabled and iSCSI PF type */
4629 if (pf->hw.func_caps.iscsi)
4630 return i40e_get_iscsi_tc_map(pf);
4632 return i40e_pf_get_default_tc(pf);
4636 * i40e_vsi_get_bw_info - Query VSI BW Information
4637 * @vsi: the VSI being queried
4639 * Returns 0 on success, negative value on failure
4641 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4643 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4644 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4645 struct i40e_pf *pf = vsi->back;
4646 struct i40e_hw *hw = &pf->hw;
4651 /* Get the VSI level BW configuration */
4652 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4654 dev_info(&pf->pdev->dev,
4655 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4656 i40e_stat_str(&pf->hw, ret),
4657 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4661 /* Get the VSI level BW configuration per TC */
4662 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4665 dev_info(&pf->pdev->dev,
4666 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4667 i40e_stat_str(&pf->hw, ret),
4668 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4672 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4673 dev_info(&pf->pdev->dev,
4674 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4675 bw_config.tc_valid_bits,
4676 bw_ets_config.tc_valid_bits);
4677 /* Still continuing */
4680 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4681 vsi->bw_max_quanta = bw_config.max_bw;
4682 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4683 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4684 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4685 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4686 vsi->bw_ets_limit_credits[i] =
4687 le16_to_cpu(bw_ets_config.credits[i]);
4688 /* 3 bits out of 4 for each TC */
4689 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4696 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4697 * @vsi: the VSI being configured
4698 * @enabled_tc: TC bitmap
4699 * @bw_credits: BW shared credits per TC
4701 * Returns 0 on success, negative value on failure
4703 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4706 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4710 bw_data.tc_valid_bits = enabled_tc;
4711 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4712 bw_data.tc_bw_credits[i] = bw_share[i];
4714 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4717 dev_info(&vsi->back->pdev->dev,
4718 "AQ command Config VSI BW allocation per TC failed = %d\n",
4719 vsi->back->hw.aq.asq_last_status);
4723 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4724 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4730 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4731 * @vsi: the VSI being configured
4732 * @enabled_tc: TC map to be enabled
4735 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4737 struct net_device *netdev = vsi->netdev;
4738 struct i40e_pf *pf = vsi->back;
4739 struct i40e_hw *hw = &pf->hw;
4742 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4748 netdev_reset_tc(netdev);
4752 /* Set up actual enabled TCs on the VSI */
4753 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4756 /* set per TC queues for the VSI */
4757 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4758 /* Only set TC queues for enabled tcs
4760 * e.g. For a VSI that has TC0 and TC3 enabled the
4761 * enabled_tc bitmap would be 0x00001001; the driver
4762 * will set the numtc for netdev as 2 that will be
4763 * referenced by the netdev layer as TC 0 and 1.
4765 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4766 netdev_set_tc_queue(netdev,
4767 vsi->tc_config.tc_info[i].netdev_tc,
4768 vsi->tc_config.tc_info[i].qcount,
4769 vsi->tc_config.tc_info[i].qoffset);
4772 /* Assign UP2TC map for the VSI */
4773 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4774 /* Get the actual TC# for the UP */
4775 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4776 /* Get the mapped netdev TC# for the UP */
4777 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4778 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4783 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4784 * @vsi: the VSI being configured
4785 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4787 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4788 struct i40e_vsi_context *ctxt)
4790 /* copy just the sections touched not the entire info
4791 * since not all sections are valid as returned by
4794 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4795 memcpy(&vsi->info.queue_mapping,
4796 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4797 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4798 sizeof(vsi->info.tc_mapping));
4802 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4803 * @vsi: VSI to be configured
4804 * @enabled_tc: TC bitmap
4806 * This configures a particular VSI for TCs that are mapped to the
4807 * given TC bitmap. It uses default bandwidth share for TCs across
4808 * VSIs to configure TC for a particular VSI.
4811 * It is expected that the VSI queues have been quisced before calling
4814 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4816 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4817 struct i40e_vsi_context ctxt;
4821 /* Check if enabled_tc is same as existing or new TCs */
4822 if (vsi->tc_config.enabled_tc == enabled_tc)
4825 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4826 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4827 if (enabled_tc & BIT_ULL(i))
4831 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4833 dev_info(&vsi->back->pdev->dev,
4834 "Failed configuring TC map %d for VSI %d\n",
4835 enabled_tc, vsi->seid);
4839 /* Update Queue Pairs Mapping for currently enabled UPs */
4840 ctxt.seid = vsi->seid;
4841 ctxt.pf_num = vsi->back->hw.pf_id;
4843 ctxt.uplink_seid = vsi->uplink_seid;
4844 ctxt.info = vsi->info;
4845 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4847 /* Update the VSI after updating the VSI queue-mapping information */
4848 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4850 dev_info(&vsi->back->pdev->dev,
4851 "Update vsi tc config failed, err %s aq_err %s\n",
4852 i40e_stat_str(&vsi->back->hw, ret),
4853 i40e_aq_str(&vsi->back->hw,
4854 vsi->back->hw.aq.asq_last_status));
4857 /* update the local VSI info with updated queue map */
4858 i40e_vsi_update_queue_map(vsi, &ctxt);
4859 vsi->info.valid_sections = 0;
4861 /* Update current VSI BW information */
4862 ret = i40e_vsi_get_bw_info(vsi);
4864 dev_info(&vsi->back->pdev->dev,
4865 "Failed updating vsi bw info, err %s aq_err %s\n",
4866 i40e_stat_str(&vsi->back->hw, ret),
4867 i40e_aq_str(&vsi->back->hw,
4868 vsi->back->hw.aq.asq_last_status));
4872 /* Update the netdev TC setup */
4873 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4879 * i40e_veb_config_tc - Configure TCs for given VEB
4881 * @enabled_tc: TC bitmap
4883 * Configures given TC bitmap for VEB (switching) element
4885 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4887 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4888 struct i40e_pf *pf = veb->pf;
4892 /* No TCs or already enabled TCs just return */
4893 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4896 bw_data.tc_valid_bits = enabled_tc;
4897 /* bw_data.absolute_credits is not set (relative) */
4899 /* Enable ETS TCs with equal BW Share for now */
4900 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4901 if (enabled_tc & BIT_ULL(i))
4902 bw_data.tc_bw_share_credits[i] = 1;
4905 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4908 dev_info(&pf->pdev->dev,
4909 "VEB bw config failed, err %s aq_err %s\n",
4910 i40e_stat_str(&pf->hw, ret),
4911 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4915 /* Update the BW information */
4916 ret = i40e_veb_get_bw_info(veb);
4918 dev_info(&pf->pdev->dev,
4919 "Failed getting veb bw config, err %s aq_err %s\n",
4920 i40e_stat_str(&pf->hw, ret),
4921 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4928 #ifdef CONFIG_I40E_DCB
4930 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4933 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4934 * the caller would've quiesce all the VSIs before calling
4937 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4943 /* Enable the TCs available on PF to all VEBs */
4944 tc_map = i40e_pf_get_tc_map(pf);
4945 for (v = 0; v < I40E_MAX_VEB; v++) {
4948 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4950 dev_info(&pf->pdev->dev,
4951 "Failed configuring TC for VEB seid=%d\n",
4953 /* Will try to configure as many components */
4957 /* Update each VSI */
4958 for (v = 0; v < pf->num_alloc_vsi; v++) {
4962 /* - Enable all TCs for the LAN VSI
4964 * - For FCoE VSI only enable the TC configured
4965 * as per the APP TLV
4967 * - For all others keep them at TC0 for now
4969 if (v == pf->lan_vsi)
4970 tc_map = i40e_pf_get_tc_map(pf);
4972 tc_map = i40e_pf_get_default_tc(pf);
4974 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4975 tc_map = i40e_get_fcoe_tc_map(pf);
4976 #endif /* #ifdef I40E_FCOE */
4978 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4980 dev_info(&pf->pdev->dev,
4981 "Failed configuring TC for VSI seid=%d\n",
4983 /* Will try to configure as many components */
4985 /* Re-configure VSI vectors based on updated TC map */
4986 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4987 if (pf->vsi[v]->netdev)
4988 i40e_dcbnl_set_all(pf->vsi[v]);
4994 * i40e_resume_port_tx - Resume port Tx
4997 * Resume a port's Tx and issue a PF reset in case of failure to
5000 static int i40e_resume_port_tx(struct i40e_pf *pf)
5002 struct i40e_hw *hw = &pf->hw;
5005 ret = i40e_aq_resume_port_tx(hw, NULL);
5007 dev_info(&pf->pdev->dev,
5008 "Resume Port Tx failed, err %s aq_err %s\n",
5009 i40e_stat_str(&pf->hw, ret),
5010 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5011 /* Schedule PF reset to recover */
5012 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5013 i40e_service_event_schedule(pf);
5020 * i40e_init_pf_dcb - Initialize DCB configuration
5021 * @pf: PF being configured
5023 * Query the current DCB configuration and cache it
5024 * in the hardware structure
5026 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5028 struct i40e_hw *hw = &pf->hw;
5031 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5032 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5033 (pf->hw.aq.fw_maj_ver < 4))
5036 /* Get the initial DCB configuration */
5037 err = i40e_init_dcb(hw);
5039 /* Device/Function is not DCBX capable */
5040 if ((!hw->func_caps.dcb) ||
5041 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5042 dev_info(&pf->pdev->dev,
5043 "DCBX offload is not supported or is disabled for this PF.\n");
5045 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5049 /* When status is not DISABLED then DCBX in FW */
5050 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5051 DCB_CAP_DCBX_VER_IEEE;
5053 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5054 /* Enable DCB tagging only when more than one TC */
5055 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5056 pf->flags |= I40E_FLAG_DCB_ENABLED;
5057 dev_dbg(&pf->pdev->dev,
5058 "DCBX offload is supported for this PF.\n");
5061 dev_info(&pf->pdev->dev,
5062 "Query for DCB configuration failed, err %s aq_err %s\n",
5063 i40e_stat_str(&pf->hw, err),
5064 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5070 #endif /* CONFIG_I40E_DCB */
5071 #define SPEED_SIZE 14
5074 * i40e_print_link_message - print link up or down
5075 * @vsi: the VSI for which link needs a message
5077 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5079 char *speed = "Unknown";
5080 char *fc = "Unknown";
5082 if (vsi->current_isup == isup)
5084 vsi->current_isup = isup;
5086 netdev_info(vsi->netdev, "NIC Link is Down\n");
5090 /* Warn user if link speed on NPAR enabled partition is not at
5093 if (vsi->back->hw.func_caps.npar_enable &&
5094 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5095 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5096 netdev_warn(vsi->netdev,
5097 "The partition detected link speed that is less than 10Gbps\n");
5099 switch (vsi->back->hw.phy.link_info.link_speed) {
5100 case I40E_LINK_SPEED_40GB:
5103 case I40E_LINK_SPEED_20GB:
5106 case I40E_LINK_SPEED_10GB:
5109 case I40E_LINK_SPEED_1GB:
5112 case I40E_LINK_SPEED_100MB:
5119 switch (vsi->back->hw.fc.current_mode) {
5123 case I40E_FC_TX_PAUSE:
5126 case I40E_FC_RX_PAUSE:
5134 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5139 * i40e_up_complete - Finish the last steps of bringing up a connection
5140 * @vsi: the VSI being configured
5142 static int i40e_up_complete(struct i40e_vsi *vsi)
5144 struct i40e_pf *pf = vsi->back;
5147 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5148 i40e_vsi_configure_msix(vsi);
5150 i40e_configure_msi_and_legacy(vsi);
5153 err = i40e_vsi_control_rings(vsi, true);
5157 clear_bit(__I40E_DOWN, &vsi->state);
5158 i40e_napi_enable_all(vsi);
5159 i40e_vsi_enable_irq(vsi);
5161 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5163 i40e_print_link_message(vsi, true);
5164 netif_tx_start_all_queues(vsi->netdev);
5165 netif_carrier_on(vsi->netdev);
5166 } else if (vsi->netdev) {
5167 i40e_print_link_message(vsi, false);
5168 /* need to check for qualified module here*/
5169 if ((pf->hw.phy.link_info.link_info &
5170 I40E_AQ_MEDIA_AVAILABLE) &&
5171 (!(pf->hw.phy.link_info.an_info &
5172 I40E_AQ_QUALIFIED_MODULE)))
5173 netdev_err(vsi->netdev,
5174 "the driver failed to link because an unqualified module was detected.");
5177 /* replay FDIR SB filters */
5178 if (vsi->type == I40E_VSI_FDIR) {
5179 /* reset fd counters */
5180 pf->fd_add_err = pf->fd_atr_cnt = 0;
5181 if (pf->fd_tcp_rule > 0) {
5182 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5183 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5184 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5185 pf->fd_tcp_rule = 0;
5187 i40e_fdir_filter_restore(vsi);
5189 i40e_service_event_schedule(pf);
5195 * i40e_vsi_reinit_locked - Reset the VSI
5196 * @vsi: the VSI being configured
5198 * Rebuild the ring structs after some configuration
5199 * has changed, e.g. MTU size.
5201 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5203 struct i40e_pf *pf = vsi->back;
5205 WARN_ON(in_interrupt());
5206 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5207 usleep_range(1000, 2000);
5210 /* Give a VF some time to respond to the reset. The
5211 * two second wait is based upon the watchdog cycle in
5214 if (vsi->type == I40E_VSI_SRIOV)
5217 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5221 * i40e_up - Bring the connection back up after being down
5222 * @vsi: the VSI being configured
5224 int i40e_up(struct i40e_vsi *vsi)
5228 err = i40e_vsi_configure(vsi);
5230 err = i40e_up_complete(vsi);
5236 * i40e_down - Shutdown the connection processing
5237 * @vsi: the VSI being stopped
5239 void i40e_down(struct i40e_vsi *vsi)
5243 /* It is assumed that the caller of this function
5244 * sets the vsi->state __I40E_DOWN bit.
5247 netif_carrier_off(vsi->netdev);
5248 netif_tx_disable(vsi->netdev);
5250 i40e_vsi_disable_irq(vsi);
5251 i40e_vsi_control_rings(vsi, false);
5252 i40e_napi_disable_all(vsi);
5254 for (i = 0; i < vsi->num_queue_pairs; i++) {
5255 i40e_clean_tx_ring(vsi->tx_rings[i]);
5256 i40e_clean_rx_ring(vsi->rx_rings[i]);
5261 * i40e_setup_tc - configure multiple traffic classes
5262 * @netdev: net device to configure
5263 * @tc: number of traffic classes to enable
5266 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5268 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5271 struct i40e_netdev_priv *np = netdev_priv(netdev);
5272 struct i40e_vsi *vsi = np->vsi;
5273 struct i40e_pf *pf = vsi->back;
5278 /* Check if DCB enabled to continue */
5279 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5280 netdev_info(netdev, "DCB is not enabled for adapter\n");
5284 /* Check if MFP enabled */
5285 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5286 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5290 /* Check whether tc count is within enabled limit */
5291 if (tc > i40e_pf_get_num_tc(pf)) {
5292 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5296 /* Generate TC map for number of tc requested */
5297 for (i = 0; i < tc; i++)
5298 enabled_tc |= BIT_ULL(i);
5300 /* Requesting same TC configuration as already enabled */
5301 if (enabled_tc == vsi->tc_config.enabled_tc)
5304 /* Quiesce VSI queues */
5305 i40e_quiesce_vsi(vsi);
5307 /* Configure VSI for enabled TCs */
5308 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5310 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5316 i40e_unquiesce_vsi(vsi);
5323 * i40e_open - Called when a network interface is made active
5324 * @netdev: network interface device structure
5326 * The open entry point is called when a network interface is made
5327 * active by the system (IFF_UP). At this point all resources needed
5328 * for transmit and receive operations are allocated, the interrupt
5329 * handler is registered with the OS, the netdev watchdog subtask is
5330 * enabled, and the stack is notified that the interface is ready.
5332 * Returns 0 on success, negative value on failure
5334 int i40e_open(struct net_device *netdev)
5336 struct i40e_netdev_priv *np = netdev_priv(netdev);
5337 struct i40e_vsi *vsi = np->vsi;
5338 struct i40e_pf *pf = vsi->back;
5341 /* disallow open during test or if eeprom is broken */
5342 if (test_bit(__I40E_TESTING, &pf->state) ||
5343 test_bit(__I40E_BAD_EEPROM, &pf->state))
5346 netif_carrier_off(netdev);
5348 err = i40e_vsi_open(vsi);
5352 /* configure global TSO hardware offload settings */
5353 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5354 TCP_FLAG_FIN) >> 16);
5355 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5357 TCP_FLAG_CWR) >> 16);
5358 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5360 #if IS_ENABLED(CONFIG_VXLAN)
5361 vxlan_get_rx_port(netdev);
5369 * @vsi: the VSI to open
5371 * Finish initialization of the VSI.
5373 * Returns 0 on success, negative value on failure
5375 int i40e_vsi_open(struct i40e_vsi *vsi)
5377 struct i40e_pf *pf = vsi->back;
5378 char int_name[I40E_INT_NAME_STR_LEN];
5381 /* allocate descriptors */
5382 err = i40e_vsi_setup_tx_resources(vsi);
5385 err = i40e_vsi_setup_rx_resources(vsi);
5389 err = i40e_vsi_configure(vsi);
5394 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5395 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5396 err = i40e_vsi_request_irq(vsi, int_name);
5400 /* Notify the stack of the actual queue counts. */
5401 err = netif_set_real_num_tx_queues(vsi->netdev,
5402 vsi->num_queue_pairs);
5404 goto err_set_queues;
5406 err = netif_set_real_num_rx_queues(vsi->netdev,
5407 vsi->num_queue_pairs);
5409 goto err_set_queues;
5411 } else if (vsi->type == I40E_VSI_FDIR) {
5412 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5413 dev_driver_string(&pf->pdev->dev),
5414 dev_name(&pf->pdev->dev));
5415 err = i40e_vsi_request_irq(vsi, int_name);
5422 err = i40e_up_complete(vsi);
5424 goto err_up_complete;
5431 i40e_vsi_free_irq(vsi);
5433 i40e_vsi_free_rx_resources(vsi);
5435 i40e_vsi_free_tx_resources(vsi);
5436 if (vsi == pf->vsi[pf->lan_vsi])
5437 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5443 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5444 * @pf: Pointer to PF
5446 * This function destroys the hlist where all the Flow Director
5447 * filters were saved.
5449 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5451 struct i40e_fdir_filter *filter;
5452 struct hlist_node *node2;
5454 hlist_for_each_entry_safe(filter, node2,
5455 &pf->fdir_filter_list, fdir_node) {
5456 hlist_del(&filter->fdir_node);
5459 pf->fdir_pf_active_filters = 0;
5463 * i40e_close - Disables a network interface
5464 * @netdev: network interface device structure
5466 * The close entry point is called when an interface is de-activated
5467 * by the OS. The hardware is still under the driver's control, but
5468 * this netdev interface is disabled.
5470 * Returns 0, this is not allowed to fail
5473 int i40e_close(struct net_device *netdev)
5475 static int i40e_close(struct net_device *netdev)
5478 struct i40e_netdev_priv *np = netdev_priv(netdev);
5479 struct i40e_vsi *vsi = np->vsi;
5481 i40e_vsi_close(vsi);
5487 * i40e_do_reset - Start a PF or Core Reset sequence
5488 * @pf: board private structure
5489 * @reset_flags: which reset is requested
5491 * The essential difference in resets is that the PF Reset
5492 * doesn't clear the packet buffers, doesn't reset the PE
5493 * firmware, and doesn't bother the other PFs on the chip.
5495 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5499 WARN_ON(in_interrupt());
5501 if (i40e_check_asq_alive(&pf->hw))
5502 i40e_vc_notify_reset(pf);
5504 /* do the biggest reset indicated */
5505 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5507 /* Request a Global Reset
5509 * This will start the chip's countdown to the actual full
5510 * chip reset event, and a warning interrupt to be sent
5511 * to all PFs, including the requestor. Our handler
5512 * for the warning interrupt will deal with the shutdown
5513 * and recovery of the switch setup.
5515 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5516 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5517 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5518 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5520 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5522 /* Request a Core Reset
5524 * Same as Global Reset, except does *not* include the MAC/PHY
5526 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5527 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5528 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5529 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5530 i40e_flush(&pf->hw);
5532 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5534 /* Request a PF Reset
5536 * Resets only the PF-specific registers
5538 * This goes directly to the tear-down and rebuild of
5539 * the switch, since we need to do all the recovery as
5540 * for the Core Reset.
5542 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5543 i40e_handle_reset_warning(pf);
5545 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5548 /* Find the VSI(s) that requested a re-init */
5549 dev_info(&pf->pdev->dev,
5550 "VSI reinit requested\n");
5551 for (v = 0; v < pf->num_alloc_vsi; v++) {
5552 struct i40e_vsi *vsi = pf->vsi[v];
5555 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5556 i40e_vsi_reinit_locked(pf->vsi[v]);
5557 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5560 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5563 /* Find the VSI(s) that needs to be brought down */
5564 dev_info(&pf->pdev->dev, "VSI down requested\n");
5565 for (v = 0; v < pf->num_alloc_vsi; v++) {
5566 struct i40e_vsi *vsi = pf->vsi[v];
5569 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5570 set_bit(__I40E_DOWN, &vsi->state);
5572 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5576 dev_info(&pf->pdev->dev,
5577 "bad reset request 0x%08x\n", reset_flags);
5581 #ifdef CONFIG_I40E_DCB
5583 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5584 * @pf: board private structure
5585 * @old_cfg: current DCB config
5586 * @new_cfg: new DCB config
5588 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5589 struct i40e_dcbx_config *old_cfg,
5590 struct i40e_dcbx_config *new_cfg)
5592 bool need_reconfig = false;
5594 /* Check if ETS configuration has changed */
5595 if (memcmp(&new_cfg->etscfg,
5597 sizeof(new_cfg->etscfg))) {
5598 /* If Priority Table has changed reconfig is needed */
5599 if (memcmp(&new_cfg->etscfg.prioritytable,
5600 &old_cfg->etscfg.prioritytable,
5601 sizeof(new_cfg->etscfg.prioritytable))) {
5602 need_reconfig = true;
5603 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5606 if (memcmp(&new_cfg->etscfg.tcbwtable,
5607 &old_cfg->etscfg.tcbwtable,
5608 sizeof(new_cfg->etscfg.tcbwtable)))
5609 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5611 if (memcmp(&new_cfg->etscfg.tsatable,
5612 &old_cfg->etscfg.tsatable,
5613 sizeof(new_cfg->etscfg.tsatable)))
5614 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5617 /* Check if PFC configuration has changed */
5618 if (memcmp(&new_cfg->pfc,
5620 sizeof(new_cfg->pfc))) {
5621 need_reconfig = true;
5622 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5625 /* Check if APP Table has changed */
5626 if (memcmp(&new_cfg->app,
5628 sizeof(new_cfg->app))) {
5629 need_reconfig = true;
5630 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5633 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5634 return need_reconfig;
5638 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5639 * @pf: board private structure
5640 * @e: event info posted on ARQ
5642 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5643 struct i40e_arq_event_info *e)
5645 struct i40e_aqc_lldp_get_mib *mib =
5646 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5647 struct i40e_hw *hw = &pf->hw;
5648 struct i40e_dcbx_config tmp_dcbx_cfg;
5649 bool need_reconfig = false;
5653 /* Not DCB capable or capability disabled */
5654 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5657 /* Ignore if event is not for Nearest Bridge */
5658 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5659 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5660 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5661 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5664 /* Check MIB Type and return if event for Remote MIB update */
5665 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5666 dev_dbg(&pf->pdev->dev,
5667 "LLDP event mib type %s\n", type ? "remote" : "local");
5668 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5669 /* Update the remote cached instance and return */
5670 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5671 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5672 &hw->remote_dcbx_config);
5676 /* Store the old configuration */
5677 tmp_dcbx_cfg = hw->local_dcbx_config;
5679 /* Reset the old DCBx configuration data */
5680 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5681 /* Get updated DCBX data from firmware */
5682 ret = i40e_get_dcb_config(&pf->hw);
5684 dev_info(&pf->pdev->dev,
5685 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5686 i40e_stat_str(&pf->hw, ret),
5687 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5691 /* No change detected in DCBX configs */
5692 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5693 sizeof(tmp_dcbx_cfg))) {
5694 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5698 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5699 &hw->local_dcbx_config);
5701 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5706 /* Enable DCB tagging only when more than one TC */
5707 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5708 pf->flags |= I40E_FLAG_DCB_ENABLED;
5710 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5712 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5713 /* Reconfiguration needed quiesce all VSIs */
5714 i40e_pf_quiesce_all_vsi(pf);
5716 /* Changes in configuration update VEB/VSI */
5717 i40e_dcb_reconfigure(pf);
5719 ret = i40e_resume_port_tx(pf);
5721 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5722 /* In case of error no point in resuming VSIs */
5726 /* Wait for the PF's Tx queues to be disabled */
5727 ret = i40e_pf_wait_txq_disabled(pf);
5729 /* Schedule PF reset to recover */
5730 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5731 i40e_service_event_schedule(pf);
5733 i40e_pf_unquiesce_all_vsi(pf);
5739 #endif /* CONFIG_I40E_DCB */
5742 * i40e_do_reset_safe - Protected reset path for userland calls.
5743 * @pf: board private structure
5744 * @reset_flags: which reset is requested
5747 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5750 i40e_do_reset(pf, reset_flags);
5755 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5756 * @pf: board private structure
5757 * @e: event info posted on ARQ
5759 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5762 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5763 struct i40e_arq_event_info *e)
5765 struct i40e_aqc_lan_overflow *data =
5766 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5767 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5768 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5769 struct i40e_hw *hw = &pf->hw;
5773 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5776 /* Queue belongs to VF, find the VF and issue VF reset */
5777 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5778 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5779 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5780 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5781 vf_id -= hw->func_caps.vf_base_id;
5782 vf = &pf->vf[vf_id];
5783 i40e_vc_notify_vf_reset(vf);
5784 /* Allow VF to process pending reset notification */
5786 i40e_reset_vf(vf, false);
5791 * i40e_service_event_complete - Finish up the service event
5792 * @pf: board private structure
5794 static void i40e_service_event_complete(struct i40e_pf *pf)
5796 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5798 /* flush memory to make sure state is correct before next watchog */
5799 smp_mb__before_atomic();
5800 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5804 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5805 * @pf: board private structure
5807 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5811 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5812 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5817 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5818 * @pf: board private structure
5820 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5824 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5825 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5826 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5827 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5832 * i40e_get_global_fd_count - Get total FD filters programmed on device
5833 * @pf: board private structure
5835 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5839 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5840 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5841 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5842 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5847 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5848 * @pf: board private structure
5850 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5852 struct i40e_fdir_filter *filter;
5853 u32 fcnt_prog, fcnt_avail;
5854 struct hlist_node *node;
5856 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5859 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5862 fcnt_prog = i40e_get_global_fd_count(pf);
5863 fcnt_avail = pf->fdir_pf_filter_count;
5864 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5865 (pf->fd_add_err == 0) ||
5866 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5867 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5868 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5869 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5870 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5871 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5874 /* Wait for some more space to be available to turn on ATR */
5875 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5876 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5877 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5878 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5879 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5880 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5884 /* if hw had a problem adding a filter, delete it */
5885 if (pf->fd_inv > 0) {
5886 hlist_for_each_entry_safe(filter, node,
5887 &pf->fdir_filter_list, fdir_node) {
5888 if (filter->fd_id == pf->fd_inv) {
5889 hlist_del(&filter->fdir_node);
5891 pf->fdir_pf_active_filters--;
5897 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5898 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5900 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5901 * @pf: board private structure
5903 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5905 unsigned long min_flush_time;
5906 int flush_wait_retry = 50;
5907 bool disable_atr = false;
5911 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5914 if (!time_after(jiffies, pf->fd_flush_timestamp +
5915 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5918 /* If the flush is happening too quick and we have mostly SB rules we
5919 * should not re-enable ATR for some time.
5921 min_flush_time = pf->fd_flush_timestamp +
5922 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5923 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5925 if (!(time_after(jiffies, min_flush_time)) &&
5926 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5927 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5928 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5932 pf->fd_flush_timestamp = jiffies;
5933 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5934 /* flush all filters */
5935 wr32(&pf->hw, I40E_PFQF_CTL_1,
5936 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5937 i40e_flush(&pf->hw);
5941 /* Check FD flush status every 5-6msec */
5942 usleep_range(5000, 6000);
5943 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5944 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5946 } while (flush_wait_retry--);
5947 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5948 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5950 /* replay sideband filters */
5951 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5953 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5954 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5955 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5956 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5962 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5963 * @pf: board private structure
5965 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5967 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5970 /* We can see up to 256 filter programming desc in transit if the filters are
5971 * being applied really fast; before we see the first
5972 * filter miss error on Rx queue 0. Accumulating enough error messages before
5973 * reacting will make sure we don't cause flush too often.
5975 #define I40E_MAX_FD_PROGRAM_ERROR 256
5978 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5979 * @pf: board private structure
5981 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5984 /* if interface is down do nothing */
5985 if (test_bit(__I40E_DOWN, &pf->state))
5988 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5991 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5992 i40e_fdir_flush_and_replay(pf);
5994 i40e_fdir_check_and_reenable(pf);
5999 * i40e_vsi_link_event - notify VSI of a link event
6000 * @vsi: vsi to be notified
6001 * @link_up: link up or down
6003 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6005 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6008 switch (vsi->type) {
6013 if (!vsi->netdev || !vsi->netdev_registered)
6017 netif_carrier_on(vsi->netdev);
6018 netif_tx_wake_all_queues(vsi->netdev);
6020 netif_carrier_off(vsi->netdev);
6021 netif_tx_stop_all_queues(vsi->netdev);
6025 case I40E_VSI_SRIOV:
6026 case I40E_VSI_VMDQ2:
6028 case I40E_VSI_MIRROR:
6030 /* there is no notification for other VSIs */
6036 * i40e_veb_link_event - notify elements on the veb of a link event
6037 * @veb: veb to be notified
6038 * @link_up: link up or down
6040 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6045 if (!veb || !veb->pf)
6049 /* depth first... */
6050 for (i = 0; i < I40E_MAX_VEB; i++)
6051 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6052 i40e_veb_link_event(pf->veb[i], link_up);
6054 /* ... now the local VSIs */
6055 for (i = 0; i < pf->num_alloc_vsi; i++)
6056 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6057 i40e_vsi_link_event(pf->vsi[i], link_up);
6061 * i40e_link_event - Update netif_carrier status
6062 * @pf: board private structure
6064 static void i40e_link_event(struct i40e_pf *pf)
6066 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6067 u8 new_link_speed, old_link_speed;
6069 bool new_link, old_link;
6071 /* save off old link status information */
6072 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6074 /* set this to force the get_link_status call to refresh state */
6075 pf->hw.phy.get_link_info = true;
6077 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6079 status = i40e_get_link_status(&pf->hw, &new_link);
6081 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6086 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6087 new_link_speed = pf->hw.phy.link_info.link_speed;
6089 if (new_link == old_link &&
6090 new_link_speed == old_link_speed &&
6091 (test_bit(__I40E_DOWN, &vsi->state) ||
6092 new_link == netif_carrier_ok(vsi->netdev)))
6095 if (!test_bit(__I40E_DOWN, &vsi->state))
6096 i40e_print_link_message(vsi, new_link);
6098 /* Notify the base of the switch tree connected to
6099 * the link. Floating VEBs are not notified.
6101 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6102 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6104 i40e_vsi_link_event(vsi, new_link);
6107 i40e_vc_notify_link_state(pf);
6109 if (pf->flags & I40E_FLAG_PTP)
6110 i40e_ptp_set_increment(pf);
6114 * i40e_watchdog_subtask - periodic checks not using event driven response
6115 * @pf: board private structure
6117 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6121 /* if interface is down do nothing */
6122 if (test_bit(__I40E_DOWN, &pf->state) ||
6123 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6126 /* make sure we don't do these things too often */
6127 if (time_before(jiffies, (pf->service_timer_previous +
6128 pf->service_timer_period)))
6130 pf->service_timer_previous = jiffies;
6132 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6133 i40e_link_event(pf);
6135 /* Update the stats for active netdevs so the network stack
6136 * can look at updated numbers whenever it cares to
6138 for (i = 0; i < pf->num_alloc_vsi; i++)
6139 if (pf->vsi[i] && pf->vsi[i]->netdev)
6140 i40e_update_stats(pf->vsi[i]);
6142 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6143 /* Update the stats for the active switching components */
6144 for (i = 0; i < I40E_MAX_VEB; i++)
6146 i40e_update_veb_stats(pf->veb[i]);
6149 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6153 * i40e_reset_subtask - Set up for resetting the device and driver
6154 * @pf: board private structure
6156 static void i40e_reset_subtask(struct i40e_pf *pf)
6158 u32 reset_flags = 0;
6161 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6162 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
6163 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6165 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6166 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
6167 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6169 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6170 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
6171 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6173 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6174 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
6175 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6177 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6178 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
6179 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6182 /* If there's a recovery already waiting, it takes
6183 * precedence before starting a new reset sequence.
6185 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6186 i40e_handle_reset_warning(pf);
6190 /* If we're already down or resetting, just bail */
6192 !test_bit(__I40E_DOWN, &pf->state) &&
6193 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6194 i40e_do_reset(pf, reset_flags);
6201 * i40e_handle_link_event - Handle link event
6202 * @pf: board private structure
6203 * @e: event info posted on ARQ
6205 static void i40e_handle_link_event(struct i40e_pf *pf,
6206 struct i40e_arq_event_info *e)
6208 struct i40e_aqc_get_link_status *status =
6209 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6211 /* Do a new status request to re-enable LSE reporting
6212 * and load new status information into the hw struct
6213 * This completely ignores any state information
6214 * in the ARQ event info, instead choosing to always
6215 * issue the AQ update link status command.
6217 i40e_link_event(pf);
6219 /* check for unqualified module, if link is down */
6220 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6221 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6222 (!(status->link_info & I40E_AQ_LINK_UP)))
6223 dev_err(&pf->pdev->dev,
6224 "The driver failed to link because an unqualified module was detected.\n");
6228 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6229 * @pf: board private structure
6231 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6233 struct i40e_arq_event_info event;
6234 struct i40e_hw *hw = &pf->hw;
6241 /* Do not run clean AQ when PF reset fails */
6242 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6245 /* check for error indications */
6246 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6248 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6249 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6250 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6252 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6253 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6254 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6256 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6257 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6258 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6261 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6263 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6265 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6266 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6267 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6269 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6270 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6271 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6273 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6274 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6275 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6278 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6280 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6281 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6286 ret = i40e_clean_arq_element(hw, &event, &pending);
6287 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6290 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6294 opcode = le16_to_cpu(event.desc.opcode);
6297 case i40e_aqc_opc_get_link_status:
6298 i40e_handle_link_event(pf, &event);
6300 case i40e_aqc_opc_send_msg_to_pf:
6301 ret = i40e_vc_process_vf_msg(pf,
6302 le16_to_cpu(event.desc.retval),
6303 le32_to_cpu(event.desc.cookie_high),
6304 le32_to_cpu(event.desc.cookie_low),
6308 case i40e_aqc_opc_lldp_update_mib:
6309 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6310 #ifdef CONFIG_I40E_DCB
6312 ret = i40e_handle_lldp_event(pf, &event);
6314 #endif /* CONFIG_I40E_DCB */
6316 case i40e_aqc_opc_event_lan_overflow:
6317 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6318 i40e_handle_lan_overflow_event(pf, &event);
6320 case i40e_aqc_opc_send_msg_to_peer:
6321 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6323 case i40e_aqc_opc_nvm_erase:
6324 case i40e_aqc_opc_nvm_update:
6325 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6328 dev_info(&pf->pdev->dev,
6329 "ARQ Error: Unknown event 0x%04x received\n",
6333 } while (pending && (i++ < pf->adminq_work_limit));
6335 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6336 /* re-enable Admin queue interrupt cause */
6337 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6338 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6339 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6342 kfree(event.msg_buf);
6346 * i40e_verify_eeprom - make sure eeprom is good to use
6347 * @pf: board private structure
6349 static void i40e_verify_eeprom(struct i40e_pf *pf)
6353 err = i40e_diag_eeprom_test(&pf->hw);
6355 /* retry in case of garbage read */
6356 err = i40e_diag_eeprom_test(&pf->hw);
6358 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6360 set_bit(__I40E_BAD_EEPROM, &pf->state);
6364 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6365 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6366 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6371 * i40e_enable_pf_switch_lb
6372 * @pf: pointer to the PF structure
6374 * enable switch loop back or die - no point in a return value
6376 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6378 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6379 struct i40e_vsi_context ctxt;
6382 ctxt.seid = pf->main_vsi_seid;
6383 ctxt.pf_num = pf->hw.pf_id;
6385 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6387 dev_info(&pf->pdev->dev,
6388 "couldn't get PF vsi config, err %s aq_err %s\n",
6389 i40e_stat_str(&pf->hw, ret),
6390 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6393 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6394 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6395 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6397 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6399 dev_info(&pf->pdev->dev,
6400 "update vsi switch failed, err %s aq_err %s\n",
6401 i40e_stat_str(&pf->hw, ret),
6402 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6407 * i40e_disable_pf_switch_lb
6408 * @pf: pointer to the PF structure
6410 * disable switch loop back or die - no point in a return value
6412 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6414 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6415 struct i40e_vsi_context ctxt;
6418 ctxt.seid = pf->main_vsi_seid;
6419 ctxt.pf_num = pf->hw.pf_id;
6421 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6423 dev_info(&pf->pdev->dev,
6424 "couldn't get PF vsi config, err %s aq_err %s\n",
6425 i40e_stat_str(&pf->hw, ret),
6426 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6429 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6430 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6431 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6433 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6435 dev_info(&pf->pdev->dev,
6436 "update vsi switch failed, err %s aq_err %s\n",
6437 i40e_stat_str(&pf->hw, ret),
6438 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6443 * i40e_config_bridge_mode - Configure the HW bridge mode
6444 * @veb: pointer to the bridge instance
6446 * Configure the loop back mode for the LAN VSI that is downlink to the
6447 * specified HW bridge instance. It is expected this function is called
6448 * when a new HW bridge is instantiated.
6450 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6452 struct i40e_pf *pf = veb->pf;
6454 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6455 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6456 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6457 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6458 i40e_disable_pf_switch_lb(pf);
6460 i40e_enable_pf_switch_lb(pf);
6464 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6465 * @veb: pointer to the VEB instance
6467 * This is a recursive function that first builds the attached VSIs then
6468 * recurses in to build the next layer of VEB. We track the connections
6469 * through our own index numbers because the seid's from the HW could
6470 * change across the reset.
6472 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6474 struct i40e_vsi *ctl_vsi = NULL;
6475 struct i40e_pf *pf = veb->pf;
6479 /* build VSI that owns this VEB, temporarily attached to base VEB */
6480 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6482 pf->vsi[v]->veb_idx == veb->idx &&
6483 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6484 ctl_vsi = pf->vsi[v];
6489 dev_info(&pf->pdev->dev,
6490 "missing owner VSI for veb_idx %d\n", veb->idx);
6492 goto end_reconstitute;
6494 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6495 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6496 ret = i40e_add_vsi(ctl_vsi);
6498 dev_info(&pf->pdev->dev,
6499 "rebuild of veb_idx %d owner VSI failed: %d\n",
6501 goto end_reconstitute;
6503 i40e_vsi_reset_stats(ctl_vsi);
6505 /* create the VEB in the switch and move the VSI onto the VEB */
6506 ret = i40e_add_veb(veb, ctl_vsi);
6508 goto end_reconstitute;
6510 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6511 veb->bridge_mode = BRIDGE_MODE_VEB;
6513 veb->bridge_mode = BRIDGE_MODE_VEPA;
6514 i40e_config_bridge_mode(veb);
6516 /* create the remaining VSIs attached to this VEB */
6517 for (v = 0; v < pf->num_alloc_vsi; v++) {
6518 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6521 if (pf->vsi[v]->veb_idx == veb->idx) {
6522 struct i40e_vsi *vsi = pf->vsi[v];
6524 vsi->uplink_seid = veb->seid;
6525 ret = i40e_add_vsi(vsi);
6527 dev_info(&pf->pdev->dev,
6528 "rebuild of vsi_idx %d failed: %d\n",
6530 goto end_reconstitute;
6532 i40e_vsi_reset_stats(vsi);
6536 /* create any VEBs attached to this VEB - RECURSION */
6537 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6538 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6539 pf->veb[veb_idx]->uplink_seid = veb->seid;
6540 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6551 * i40e_get_capabilities - get info about the HW
6552 * @pf: the PF struct
6554 static int i40e_get_capabilities(struct i40e_pf *pf)
6556 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6561 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6563 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6567 /* this loads the data into the hw struct for us */
6568 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6570 i40e_aqc_opc_list_func_capabilities,
6572 /* data loaded, buffer no longer needed */
6575 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6576 /* retry with a larger buffer */
6577 buf_len = data_size;
6578 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6579 dev_info(&pf->pdev->dev,
6580 "capability discovery failed, err %s aq_err %s\n",
6581 i40e_stat_str(&pf->hw, err),
6582 i40e_aq_str(&pf->hw,
6583 pf->hw.aq.asq_last_status));
6588 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6589 dev_info(&pf->pdev->dev,
6590 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6591 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6592 pf->hw.func_caps.num_msix_vectors,
6593 pf->hw.func_caps.num_msix_vectors_vf,
6594 pf->hw.func_caps.fd_filters_guaranteed,
6595 pf->hw.func_caps.fd_filters_best_effort,
6596 pf->hw.func_caps.num_tx_qp,
6597 pf->hw.func_caps.num_vsis);
6599 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6600 + pf->hw.func_caps.num_vfs)
6601 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6602 dev_info(&pf->pdev->dev,
6603 "got num_vsis %d, setting num_vsis to %d\n",
6604 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6605 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6611 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6614 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6615 * @pf: board private structure
6617 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6619 struct i40e_vsi *vsi;
6622 /* quick workaround for an NVM issue that leaves a critical register
6625 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6626 static const u32 hkey[] = {
6627 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6628 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6629 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6632 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6633 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6636 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6639 /* find existing VSI and see if it needs configuring */
6641 for (i = 0; i < pf->num_alloc_vsi; i++) {
6642 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6648 /* create a new VSI if none exists */
6650 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6651 pf->vsi[pf->lan_vsi]->seid, 0);
6653 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6654 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6659 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6663 * i40e_fdir_teardown - release the Flow Director resources
6664 * @pf: board private structure
6666 static void i40e_fdir_teardown(struct i40e_pf *pf)
6670 i40e_fdir_filter_exit(pf);
6671 for (i = 0; i < pf->num_alloc_vsi; i++) {
6672 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6673 i40e_vsi_release(pf->vsi[i]);
6680 * i40e_prep_for_reset - prep for the core to reset
6681 * @pf: board private structure
6683 * Close up the VFs and other things in prep for PF Reset.
6685 static void i40e_prep_for_reset(struct i40e_pf *pf)
6687 struct i40e_hw *hw = &pf->hw;
6688 i40e_status ret = 0;
6691 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6692 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6695 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6697 /* quiesce the VSIs and their queues that are not already DOWN */
6698 i40e_pf_quiesce_all_vsi(pf);
6700 for (v = 0; v < pf->num_alloc_vsi; v++) {
6702 pf->vsi[v]->seid = 0;
6705 i40e_shutdown_adminq(&pf->hw);
6707 /* call shutdown HMC */
6708 if (hw->hmc.hmc_obj) {
6709 ret = i40e_shutdown_lan_hmc(hw);
6711 dev_warn(&pf->pdev->dev,
6712 "shutdown_lan_hmc failed: %d\n", ret);
6717 * i40e_send_version - update firmware with driver version
6720 static void i40e_send_version(struct i40e_pf *pf)
6722 struct i40e_driver_version dv;
6724 dv.major_version = DRV_VERSION_MAJOR;
6725 dv.minor_version = DRV_VERSION_MINOR;
6726 dv.build_version = DRV_VERSION_BUILD;
6727 dv.subbuild_version = 0;
6728 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6729 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6733 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6734 * @pf: board private structure
6735 * @reinit: if the Main VSI needs to re-initialized.
6737 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6739 struct i40e_hw *hw = &pf->hw;
6740 u8 set_fc_aq_fail = 0;
6745 /* Now we wait for GRST to settle out.
6746 * We don't have to delete the VEBs or VSIs from the hw switch
6747 * because the reset will make them disappear.
6749 ret = i40e_pf_reset(hw);
6751 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6752 set_bit(__I40E_RESET_FAILED, &pf->state);
6753 goto clear_recovery;
6757 if (test_bit(__I40E_DOWN, &pf->state))
6758 goto clear_recovery;
6759 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6761 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6762 ret = i40e_init_adminq(&pf->hw);
6764 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6765 i40e_stat_str(&pf->hw, ret),
6766 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6767 goto clear_recovery;
6770 /* re-verify the eeprom if we just had an EMP reset */
6771 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6772 i40e_verify_eeprom(pf);
6774 i40e_clear_pxe_mode(hw);
6775 ret = i40e_get_capabilities(pf);
6777 goto end_core_reset;
6779 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6780 hw->func_caps.num_rx_qp,
6781 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6783 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6784 goto end_core_reset;
6786 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6788 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6789 goto end_core_reset;
6792 #ifdef CONFIG_I40E_DCB
6793 ret = i40e_init_pf_dcb(pf);
6795 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6796 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6797 /* Continue without DCB enabled */
6799 #endif /* CONFIG_I40E_DCB */
6801 i40e_init_pf_fcoe(pf);
6804 /* do basic switch setup */
6805 ret = i40e_setup_pf_switch(pf, reinit);
6807 goto end_core_reset;
6809 /* driver is only interested in link up/down and module qualification
6810 * reports from firmware
6812 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6813 I40E_AQ_EVENT_LINK_UPDOWN |
6814 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6816 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6817 i40e_stat_str(&pf->hw, ret),
6818 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6820 /* make sure our flow control settings are restored */
6821 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6823 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6824 i40e_stat_str(&pf->hw, ret),
6825 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6827 /* Rebuild the VSIs and VEBs that existed before reset.
6828 * They are still in our local switch element arrays, so only
6829 * need to rebuild the switch model in the HW.
6831 * If there were VEBs but the reconstitution failed, we'll try
6832 * try to recover minimal use by getting the basic PF VSI working.
6834 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6835 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6836 /* find the one VEB connected to the MAC, and find orphans */
6837 for (v = 0; v < I40E_MAX_VEB; v++) {
6841 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6842 pf->veb[v]->uplink_seid == 0) {
6843 ret = i40e_reconstitute_veb(pf->veb[v]);
6848 /* If Main VEB failed, we're in deep doodoo,
6849 * so give up rebuilding the switch and set up
6850 * for minimal rebuild of PF VSI.
6851 * If orphan failed, we'll report the error
6852 * but try to keep going.
6854 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6855 dev_info(&pf->pdev->dev,
6856 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6858 pf->vsi[pf->lan_vsi]->uplink_seid
6861 } else if (pf->veb[v]->uplink_seid == 0) {
6862 dev_info(&pf->pdev->dev,
6863 "rebuild of orphan VEB failed: %d\n",
6870 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6871 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6872 /* no VEB, so rebuild only the Main VSI */
6873 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6875 dev_info(&pf->pdev->dev,
6876 "rebuild of Main VSI failed: %d\n", ret);
6877 goto end_core_reset;
6881 /* Reconfigure hardware for allowing smaller MSS in the case
6882 * of TSO, so that we avoid the MDD being fired and causing
6883 * a reset in the case of small MSS+TSO.
6885 #define I40E_REG_MSS 0x000E64DC
6886 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6887 #define I40E_64BYTE_MSS 0x400000
6888 val = rd32(hw, I40E_REG_MSS);
6889 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6890 val &= ~I40E_REG_MSS_MIN_MASK;
6891 val |= I40E_64BYTE_MSS;
6892 wr32(hw, I40E_REG_MSS, val);
6895 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6896 (pf->hw.aq.fw_maj_ver < 4)) {
6898 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6900 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6901 i40e_stat_str(&pf->hw, ret),
6902 i40e_aq_str(&pf->hw,
6903 pf->hw.aq.asq_last_status));
6905 /* reinit the misc interrupt */
6906 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6907 ret = i40e_setup_misc_vector(pf);
6909 /* Add a filter to drop all Flow control frames from any VSI from being
6910 * transmitted. By doing so we stop a malicious VF from sending out
6911 * PAUSE or PFC frames and potentially controlling traffic for other
6913 * The FW can still send Flow control frames if enabled.
6915 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6918 /* restart the VSIs that were rebuilt and running before the reset */
6919 i40e_pf_unquiesce_all_vsi(pf);
6921 if (pf->num_alloc_vfs) {
6922 for (v = 0; v < pf->num_alloc_vfs; v++)
6923 i40e_reset_vf(&pf->vf[v], true);
6926 /* tell the firmware that we're starting */
6927 i40e_send_version(pf);
6930 clear_bit(__I40E_RESET_FAILED, &pf->state);
6932 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6936 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6937 * @pf: board private structure
6939 * Close up the VFs and other things in prep for a Core Reset,
6940 * then get ready to rebuild the world.
6942 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6944 i40e_prep_for_reset(pf);
6945 i40e_reset_and_rebuild(pf, false);
6949 * i40e_handle_mdd_event
6950 * @pf: pointer to the PF structure
6952 * Called from the MDD irq handler to identify possibly malicious vfs
6954 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6956 struct i40e_hw *hw = &pf->hw;
6957 bool mdd_detected = false;
6958 bool pf_mdd_detected = false;
6963 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6966 /* find what triggered the MDD event */
6967 reg = rd32(hw, I40E_GL_MDET_TX);
6968 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6969 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6970 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6971 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6972 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6973 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6974 I40E_GL_MDET_TX_EVENT_SHIFT;
6975 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6976 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6977 pf->hw.func_caps.base_queue;
6978 if (netif_msg_tx_err(pf))
6979 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6980 event, queue, pf_num, vf_num);
6981 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6982 mdd_detected = true;
6984 reg = rd32(hw, I40E_GL_MDET_RX);
6985 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6986 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6987 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6988 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6989 I40E_GL_MDET_RX_EVENT_SHIFT;
6990 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6991 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6992 pf->hw.func_caps.base_queue;
6993 if (netif_msg_rx_err(pf))
6994 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6995 event, queue, func);
6996 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6997 mdd_detected = true;
7001 reg = rd32(hw, I40E_PF_MDET_TX);
7002 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7003 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7004 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7005 pf_mdd_detected = true;
7007 reg = rd32(hw, I40E_PF_MDET_RX);
7008 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7009 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7010 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7011 pf_mdd_detected = true;
7013 /* Queue belongs to the PF, initiate a reset */
7014 if (pf_mdd_detected) {
7015 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7016 i40e_service_event_schedule(pf);
7020 /* see if one of the VFs needs its hand slapped */
7021 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7023 reg = rd32(hw, I40E_VP_MDET_TX(i));
7024 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7025 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7026 vf->num_mdd_events++;
7027 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7031 reg = rd32(hw, I40E_VP_MDET_RX(i));
7032 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7033 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7034 vf->num_mdd_events++;
7035 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7039 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7040 dev_info(&pf->pdev->dev,
7041 "Too many MDD events on VF %d, disabled\n", i);
7042 dev_info(&pf->pdev->dev,
7043 "Use PF Control I/F to re-enable the VF\n");
7044 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7048 /* re-enable mdd interrupt cause */
7049 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7050 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7051 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7052 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7056 #if IS_ENABLED(CONFIG_VXLAN)
7058 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
7059 * @pf: board private structure
7061 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
7063 struct i40e_hw *hw = &pf->hw;
7068 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
7071 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
7073 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7074 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
7075 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
7076 port = pf->vxlan_ports[i];
7078 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7079 I40E_AQC_TUNNEL_TYPE_VXLAN,
7082 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7085 dev_info(&pf->pdev->dev,
7086 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7087 port ? "add" : "delete",
7089 i40e_stat_str(&pf->hw, ret),
7090 i40e_aq_str(&pf->hw,
7091 pf->hw.aq.asq_last_status));
7092 pf->vxlan_ports[i] = 0;
7100 * i40e_service_task - Run the driver's async subtasks
7101 * @work: pointer to work_struct containing our data
7103 static void i40e_service_task(struct work_struct *work)
7105 struct i40e_pf *pf = container_of(work,
7108 unsigned long start_time = jiffies;
7110 /* don't bother with service tasks if a reset is in progress */
7111 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7112 i40e_service_event_complete(pf);
7116 i40e_detect_recover_hung(pf);
7117 i40e_reset_subtask(pf);
7118 i40e_handle_mdd_event(pf);
7119 i40e_vc_process_vflr_event(pf);
7120 i40e_watchdog_subtask(pf);
7121 i40e_fdir_reinit_subtask(pf);
7122 i40e_sync_filters_subtask(pf);
7123 #if IS_ENABLED(CONFIG_VXLAN)
7124 i40e_sync_vxlan_filters_subtask(pf);
7126 i40e_clean_adminq_subtask(pf);
7128 i40e_service_event_complete(pf);
7130 /* If the tasks have taken longer than one timer cycle or there
7131 * is more work to be done, reschedule the service task now
7132 * rather than wait for the timer to tick again.
7134 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7135 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7136 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7137 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7138 i40e_service_event_schedule(pf);
7142 * i40e_service_timer - timer callback
7143 * @data: pointer to PF struct
7145 static void i40e_service_timer(unsigned long data)
7147 struct i40e_pf *pf = (struct i40e_pf *)data;
7149 mod_timer(&pf->service_timer,
7150 round_jiffies(jiffies + pf->service_timer_period));
7151 i40e_service_event_schedule(pf);
7155 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7156 * @vsi: the VSI being configured
7158 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7160 struct i40e_pf *pf = vsi->back;
7162 switch (vsi->type) {
7164 vsi->alloc_queue_pairs = pf->num_lan_qps;
7165 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7166 I40E_REQ_DESCRIPTOR_MULTIPLE);
7167 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7168 vsi->num_q_vectors = pf->num_lan_msix;
7170 vsi->num_q_vectors = 1;
7175 vsi->alloc_queue_pairs = 1;
7176 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7177 I40E_REQ_DESCRIPTOR_MULTIPLE);
7178 vsi->num_q_vectors = 1;
7181 case I40E_VSI_VMDQ2:
7182 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7183 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7184 I40E_REQ_DESCRIPTOR_MULTIPLE);
7185 vsi->num_q_vectors = pf->num_vmdq_msix;
7188 case I40E_VSI_SRIOV:
7189 vsi->alloc_queue_pairs = pf->num_vf_qps;
7190 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7191 I40E_REQ_DESCRIPTOR_MULTIPLE);
7196 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7197 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7198 I40E_REQ_DESCRIPTOR_MULTIPLE);
7199 vsi->num_q_vectors = pf->num_fcoe_msix;
7202 #endif /* I40E_FCOE */
7212 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7213 * @type: VSI pointer
7214 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7216 * On error: returns error code (negative)
7217 * On success: returns 0
7219 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7224 /* allocate memory for both Tx and Rx ring pointers */
7225 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7226 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7229 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7231 if (alloc_qvectors) {
7232 /* allocate memory for q_vector pointers */
7233 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7234 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7235 if (!vsi->q_vectors) {
7243 kfree(vsi->tx_rings);
7248 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7249 * @pf: board private structure
7250 * @type: type of VSI
7252 * On error: returns error code (negative)
7253 * On success: returns vsi index in PF (positive)
7255 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7258 struct i40e_vsi *vsi;
7262 /* Need to protect the allocation of the VSIs at the PF level */
7263 mutex_lock(&pf->switch_mutex);
7265 /* VSI list may be fragmented if VSI creation/destruction has
7266 * been happening. We can afford to do a quick scan to look
7267 * for any free VSIs in the list.
7269 * find next empty vsi slot, looping back around if necessary
7272 while (i < pf->num_alloc_vsi && pf->vsi[i])
7274 if (i >= pf->num_alloc_vsi) {
7276 while (i < pf->next_vsi && pf->vsi[i])
7280 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7281 vsi_idx = i; /* Found one! */
7284 goto unlock_pf; /* out of VSI slots! */
7288 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7295 set_bit(__I40E_DOWN, &vsi->state);
7298 vsi->rx_itr_setting = pf->rx_itr_default;
7299 vsi->tx_itr_setting = pf->tx_itr_default;
7300 vsi->int_rate_limit = 0;
7301 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7302 pf->rss_table_size : 64;
7303 vsi->netdev_registered = false;
7304 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7305 INIT_LIST_HEAD(&vsi->mac_filter_list);
7306 vsi->irqs_ready = false;
7308 ret = i40e_set_num_rings_in_vsi(vsi);
7312 ret = i40e_vsi_alloc_arrays(vsi, true);
7316 /* Setup default MSIX irq handler for VSI */
7317 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7319 /* Initialize VSI lock */
7320 spin_lock_init(&vsi->mac_filter_list_lock);
7321 pf->vsi[vsi_idx] = vsi;
7326 pf->next_vsi = i - 1;
7329 mutex_unlock(&pf->switch_mutex);
7334 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7335 * @type: VSI pointer
7336 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7338 * On error: returns error code (negative)
7339 * On success: returns 0
7341 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7343 /* free the ring and vector containers */
7344 if (free_qvectors) {
7345 kfree(vsi->q_vectors);
7346 vsi->q_vectors = NULL;
7348 kfree(vsi->tx_rings);
7349 vsi->tx_rings = NULL;
7350 vsi->rx_rings = NULL;
7354 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7356 * @vsi: Pointer to VSI structure
7358 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7363 kfree(vsi->rss_hkey_user);
7364 vsi->rss_hkey_user = NULL;
7366 kfree(vsi->rss_lut_user);
7367 vsi->rss_lut_user = NULL;
7371 * i40e_vsi_clear - Deallocate the VSI provided
7372 * @vsi: the VSI being un-configured
7374 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7385 mutex_lock(&pf->switch_mutex);
7386 if (!pf->vsi[vsi->idx]) {
7387 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7388 vsi->idx, vsi->idx, vsi, vsi->type);
7392 if (pf->vsi[vsi->idx] != vsi) {
7393 dev_err(&pf->pdev->dev,
7394 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7395 pf->vsi[vsi->idx]->idx,
7397 pf->vsi[vsi->idx]->type,
7398 vsi->idx, vsi, vsi->type);
7402 /* updates the PF for this cleared vsi */
7403 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7404 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7406 i40e_vsi_free_arrays(vsi, true);
7407 i40e_clear_rss_config_user(vsi);
7409 pf->vsi[vsi->idx] = NULL;
7410 if (vsi->idx < pf->next_vsi)
7411 pf->next_vsi = vsi->idx;
7414 mutex_unlock(&pf->switch_mutex);
7422 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7423 * @vsi: the VSI being cleaned
7425 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7429 if (vsi->tx_rings && vsi->tx_rings[0]) {
7430 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7431 kfree_rcu(vsi->tx_rings[i], rcu);
7432 vsi->tx_rings[i] = NULL;
7433 vsi->rx_rings[i] = NULL;
7439 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7440 * @vsi: the VSI being configured
7442 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7444 struct i40e_ring *tx_ring, *rx_ring;
7445 struct i40e_pf *pf = vsi->back;
7448 /* Set basic values in the rings to be used later during open() */
7449 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7450 /* allocate space for both Tx and Rx in one shot */
7451 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7455 tx_ring->queue_index = i;
7456 tx_ring->reg_idx = vsi->base_queue + i;
7457 tx_ring->ring_active = false;
7459 tx_ring->netdev = vsi->netdev;
7460 tx_ring->dev = &pf->pdev->dev;
7461 tx_ring->count = vsi->num_desc;
7463 tx_ring->dcb_tc = 0;
7464 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7465 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7466 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7467 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7468 vsi->tx_rings[i] = tx_ring;
7470 rx_ring = &tx_ring[1];
7471 rx_ring->queue_index = i;
7472 rx_ring->reg_idx = vsi->base_queue + i;
7473 rx_ring->ring_active = false;
7475 rx_ring->netdev = vsi->netdev;
7476 rx_ring->dev = &pf->pdev->dev;
7477 rx_ring->count = vsi->num_desc;
7479 rx_ring->dcb_tc = 0;
7480 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7481 set_ring_16byte_desc_enabled(rx_ring);
7483 clear_ring_16byte_desc_enabled(rx_ring);
7484 vsi->rx_rings[i] = rx_ring;
7490 i40e_vsi_clear_rings(vsi);
7495 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7496 * @pf: board private structure
7497 * @vectors: the number of MSI-X vectors to request
7499 * Returns the number of vectors reserved, or error
7501 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7503 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7504 I40E_MIN_MSIX, vectors);
7506 dev_info(&pf->pdev->dev,
7507 "MSI-X vector reservation failed: %d\n", vectors);
7515 * i40e_init_msix - Setup the MSIX capability
7516 * @pf: board private structure
7518 * Work with the OS to set up the MSIX vectors needed.
7520 * Returns the number of vectors reserved or negative on failure
7522 static int i40e_init_msix(struct i40e_pf *pf)
7524 struct i40e_hw *hw = &pf->hw;
7529 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7532 /* The number of vectors we'll request will be comprised of:
7533 * - Add 1 for "other" cause for Admin Queue events, etc.
7534 * - The number of LAN queue pairs
7535 * - Queues being used for RSS.
7536 * We don't need as many as max_rss_size vectors.
7537 * use rss_size instead in the calculation since that
7538 * is governed by number of cpus in the system.
7539 * - assumes symmetric Tx/Rx pairing
7540 * - The number of VMDq pairs
7542 * - The number of FCOE qps.
7544 * Once we count this up, try the request.
7546 * If we can't get what we want, we'll simplify to nearly nothing
7547 * and try again. If that still fails, we punt.
7549 vectors_left = hw->func_caps.num_msix_vectors;
7552 /* reserve one vector for miscellaneous handler */
7558 /* reserve vectors for the main PF traffic queues */
7559 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7560 vectors_left -= pf->num_lan_msix;
7561 v_budget += pf->num_lan_msix;
7563 /* reserve one vector for sideband flow director */
7564 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7569 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7574 /* can we reserve enough for FCoE? */
7575 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7577 pf->num_fcoe_msix = 0;
7578 else if (vectors_left >= pf->num_fcoe_qps)
7579 pf->num_fcoe_msix = pf->num_fcoe_qps;
7581 pf->num_fcoe_msix = 1;
7582 v_budget += pf->num_fcoe_msix;
7583 vectors_left -= pf->num_fcoe_msix;
7587 /* any vectors left over go for VMDq support */
7588 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7589 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7590 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7592 /* if we're short on vectors for what's desired, we limit
7593 * the queues per vmdq. If this is still more than are
7594 * available, the user will need to change the number of
7595 * queues/vectors used by the PF later with the ethtool
7598 if (vmdq_vecs < vmdq_vecs_wanted)
7599 pf->num_vmdq_qps = 1;
7600 pf->num_vmdq_msix = pf->num_vmdq_qps;
7602 v_budget += vmdq_vecs;
7603 vectors_left -= vmdq_vecs;
7606 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7608 if (!pf->msix_entries)
7611 for (i = 0; i < v_budget; i++)
7612 pf->msix_entries[i].entry = i;
7613 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7615 if (v_actual != v_budget) {
7616 /* If we have limited resources, we will start with no vectors
7617 * for the special features and then allocate vectors to some
7618 * of these features based on the policy and at the end disable
7619 * the features that did not get any vectors.
7622 pf->num_fcoe_qps = 0;
7623 pf->num_fcoe_msix = 0;
7625 pf->num_vmdq_msix = 0;
7628 if (v_actual < I40E_MIN_MSIX) {
7629 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7630 kfree(pf->msix_entries);
7631 pf->msix_entries = NULL;
7634 } else if (v_actual == I40E_MIN_MSIX) {
7635 /* Adjust for minimal MSIX use */
7636 pf->num_vmdq_vsis = 0;
7637 pf->num_vmdq_qps = 0;
7638 pf->num_lan_qps = 1;
7639 pf->num_lan_msix = 1;
7641 } else if (v_actual != v_budget) {
7644 /* reserve the misc vector */
7647 /* Scale vector usage down */
7648 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7649 pf->num_vmdq_vsis = 1;
7650 pf->num_vmdq_qps = 1;
7651 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7653 /* partition out the remaining vectors */
7656 pf->num_lan_msix = 1;
7660 /* give one vector to FCoE */
7661 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7662 pf->num_lan_msix = 1;
7663 pf->num_fcoe_msix = 1;
7666 pf->num_lan_msix = 2;
7671 /* give one vector to FCoE */
7672 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7673 pf->num_fcoe_msix = 1;
7677 /* give the rest to the PF */
7678 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7683 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7684 (pf->num_vmdq_msix == 0)) {
7685 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7686 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7690 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7691 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7692 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7699 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7700 * @vsi: the VSI being configured
7701 * @v_idx: index of the vector in the vsi struct
7703 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7705 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7707 struct i40e_q_vector *q_vector;
7709 /* allocate q_vector */
7710 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7714 q_vector->vsi = vsi;
7715 q_vector->v_idx = v_idx;
7716 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7718 netif_napi_add(vsi->netdev, &q_vector->napi,
7719 i40e_napi_poll, NAPI_POLL_WEIGHT);
7721 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7722 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7724 /* tie q_vector and vsi together */
7725 vsi->q_vectors[v_idx] = q_vector;
7731 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7732 * @vsi: the VSI being configured
7734 * We allocate one q_vector per queue interrupt. If allocation fails we
7737 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7739 struct i40e_pf *pf = vsi->back;
7740 int v_idx, num_q_vectors;
7743 /* if not MSIX, give the one vector only to the LAN VSI */
7744 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7745 num_q_vectors = vsi->num_q_vectors;
7746 else if (vsi == pf->vsi[pf->lan_vsi])
7751 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7752 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7761 i40e_free_q_vector(vsi, v_idx);
7767 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7768 * @pf: board private structure to initialize
7770 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7775 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7776 vectors = i40e_init_msix(pf);
7778 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7780 I40E_FLAG_FCOE_ENABLED |
7782 I40E_FLAG_RSS_ENABLED |
7783 I40E_FLAG_DCB_CAPABLE |
7784 I40E_FLAG_SRIOV_ENABLED |
7785 I40E_FLAG_FD_SB_ENABLED |
7786 I40E_FLAG_FD_ATR_ENABLED |
7787 I40E_FLAG_VMDQ_ENABLED);
7789 /* rework the queue expectations without MSIX */
7790 i40e_determine_queue_usage(pf);
7794 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7795 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7796 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7797 vectors = pci_enable_msi(pf->pdev);
7799 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7801 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7803 vectors = 1; /* one MSI or Legacy vector */
7806 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7807 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7809 /* set up vector assignment tracking */
7810 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7811 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7812 if (!pf->irq_pile) {
7813 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7816 pf->irq_pile->num_entries = vectors;
7817 pf->irq_pile->search_hint = 0;
7819 /* track first vector for misc interrupts, ignore return */
7820 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7826 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7827 * @pf: board private structure
7829 * This sets up the handler for MSIX 0, which is used to manage the
7830 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7831 * when in MSI or Legacy interrupt mode.
7833 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7835 struct i40e_hw *hw = &pf->hw;
7838 /* Only request the irq if this is the first time through, and
7839 * not when we're rebuilding after a Reset
7841 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7842 err = request_irq(pf->msix_entries[0].vector,
7843 i40e_intr, 0, pf->int_name, pf);
7845 dev_info(&pf->pdev->dev,
7846 "request_irq for %s failed: %d\n",
7852 i40e_enable_misc_int_causes(pf);
7854 /* associate no queues to the misc vector */
7855 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7856 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7860 i40e_irq_dynamic_enable_icr0(pf);
7866 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7867 * @vsi: vsi structure
7868 * @seed: RSS hash seed
7870 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7871 u8 *lut, u16 lut_size)
7873 struct i40e_aqc_get_set_rss_key_data rss_key;
7874 struct i40e_pf *pf = vsi->back;
7875 struct i40e_hw *hw = &pf->hw;
7876 bool pf_lut = false;
7880 memset(&rss_key, 0, sizeof(rss_key));
7881 memcpy(&rss_key, seed, sizeof(rss_key));
7883 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7887 /* Populate the LUT with max no. of queues in round robin fashion */
7888 for (i = 0; i < vsi->rss_table_size; i++)
7889 rss_lut[i] = i % vsi->rss_size;
7891 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7893 dev_info(&pf->pdev->dev,
7894 "Cannot set RSS key, err %s aq_err %s\n",
7895 i40e_stat_str(&pf->hw, ret),
7896 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7897 goto config_rss_aq_out;
7900 if (vsi->type == I40E_VSI_MAIN)
7903 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7904 vsi->rss_table_size);
7906 dev_info(&pf->pdev->dev,
7907 "Cannot set RSS lut, err %s aq_err %s\n",
7908 i40e_stat_str(&pf->hw, ret),
7909 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7917 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7918 * @vsi: VSI structure
7920 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7922 u8 seed[I40E_HKEY_ARRAY_SIZE];
7923 struct i40e_pf *pf = vsi->back;
7927 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7930 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7934 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7935 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7936 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7937 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7944 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7945 * @vsi: Pointer to vsi structure
7946 * @seed: RSS hash seed
7947 * @lut: Lookup table
7948 * @lut_size: Lookup table size
7950 * Returns 0 on success, negative on failure
7952 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7953 const u8 *lut, u16 lut_size)
7955 struct i40e_pf *pf = vsi->back;
7956 struct i40e_hw *hw = &pf->hw;
7959 /* Fill out hash function seed */
7961 u32 *seed_dw = (u32 *)seed;
7963 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7964 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7968 u32 *lut_dw = (u32 *)lut;
7970 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7973 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7974 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
7982 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
7983 * @vsi: Pointer to VSI structure
7984 * @seed: Buffer to store the keys
7985 * @lut: Buffer to store the lookup table entries
7986 * @lut_size: Size of buffer to store the lookup table entries
7988 * Returns 0 on success, negative on failure
7990 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
7991 u8 *lut, u16 lut_size)
7993 struct i40e_pf *pf = vsi->back;
7994 struct i40e_hw *hw = &pf->hw;
7998 u32 *seed_dw = (u32 *)seed;
8000 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8001 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
8004 u32 *lut_dw = (u32 *)lut;
8006 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8008 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8009 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8016 * i40e_config_rss - Configure RSS keys and lut
8017 * @vsi: Pointer to VSI structure
8018 * @seed: RSS hash seed
8019 * @lut: Lookup table
8020 * @lut_size: Lookup table size
8022 * Returns 0 on success, negative on failure
8024 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8026 struct i40e_pf *pf = vsi->back;
8028 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8029 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8031 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8035 * i40e_get_rss - Get RSS keys and lut
8036 * @vsi: Pointer to VSI structure
8037 * @seed: Buffer to store the keys
8038 * @lut: Buffer to store the lookup table entries
8039 * lut_size: Size of buffer to store the lookup table entries
8041 * Returns 0 on success, negative on failure
8043 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8045 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8049 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8050 * @pf: Pointer to board private structure
8051 * @lut: Lookup table
8052 * @rss_table_size: Lookup table size
8053 * @rss_size: Range of queue number for hashing
8055 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8056 u16 rss_table_size, u16 rss_size)
8060 for (i = 0; i < rss_table_size; i++)
8061 lut[i] = i % rss_size;
8065 * i40e_pf_config_rss - Prepare for RSS if used
8066 * @pf: board private structure
8068 static int i40e_pf_config_rss(struct i40e_pf *pf)
8070 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8071 u8 seed[I40E_HKEY_ARRAY_SIZE];
8073 struct i40e_hw *hw = &pf->hw;
8078 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8079 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8080 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8081 hena |= i40e_pf_get_default_rss_hena(pf);
8083 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8084 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8086 /* Determine the RSS table size based on the hardware capabilities */
8087 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8088 reg_val = (pf->rss_table_size == 512) ?
8089 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8090 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8091 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8093 /* Determine the RSS size of the VSI */
8095 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8096 vsi->num_queue_pairs);
8098 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8102 /* Use user configured lut if there is one, otherwise use default */
8103 if (vsi->rss_lut_user)
8104 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8106 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8108 /* Use user configured hash key if there is one, otherwise
8111 if (vsi->rss_hkey_user)
8112 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8114 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8115 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8122 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8123 * @pf: board private structure
8124 * @queue_count: the requested queue count for rss.
8126 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8127 * count which may be different from the requested queue count.
8129 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8131 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8134 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8137 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8139 if (queue_count != vsi->num_queue_pairs) {
8140 vsi->req_queue_pairs = queue_count;
8141 i40e_prep_for_reset(pf);
8143 pf->alloc_rss_size = new_rss_size;
8145 i40e_reset_and_rebuild(pf, true);
8147 /* Discard the user configured hash keys and lut, if less
8148 * queues are enabled.
8150 if (queue_count < vsi->rss_size) {
8151 i40e_clear_rss_config_user(vsi);
8152 dev_dbg(&pf->pdev->dev,
8153 "discard user configured hash keys and lut\n");
8156 /* Reset vsi->rss_size, as number of enabled queues changed */
8157 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8158 vsi->num_queue_pairs);
8160 i40e_pf_config_rss(pf);
8162 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8163 pf->alloc_rss_size, pf->rss_size_max);
8164 return pf->alloc_rss_size;
8168 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8169 * @pf: board private structure
8171 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8174 bool min_valid, max_valid;
8177 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8178 &min_valid, &max_valid);
8182 pf->npar_min_bw = min_bw;
8184 pf->npar_max_bw = max_bw;
8191 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8192 * @pf: board private structure
8194 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8196 struct i40e_aqc_configure_partition_bw_data bw_data;
8199 /* Set the valid bit for this PF */
8200 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8201 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8202 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8204 /* Set the new bandwidths */
8205 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8211 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8212 * @pf: board private structure
8214 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8216 /* Commit temporary BW setting to permanent NVM image */
8217 enum i40e_admin_queue_err last_aq_status;
8221 if (pf->hw.partition_id != 1) {
8222 dev_info(&pf->pdev->dev,
8223 "Commit BW only works on partition 1! This is partition %d",
8224 pf->hw.partition_id);
8225 ret = I40E_NOT_SUPPORTED;
8229 /* Acquire NVM for read access */
8230 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8231 last_aq_status = pf->hw.aq.asq_last_status;
8233 dev_info(&pf->pdev->dev,
8234 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8235 i40e_stat_str(&pf->hw, ret),
8236 i40e_aq_str(&pf->hw, last_aq_status));
8240 /* Read word 0x10 of NVM - SW compatibility word 1 */
8241 ret = i40e_aq_read_nvm(&pf->hw,
8242 I40E_SR_NVM_CONTROL_WORD,
8243 0x10, sizeof(nvm_word), &nvm_word,
8245 /* Save off last admin queue command status before releasing
8248 last_aq_status = pf->hw.aq.asq_last_status;
8249 i40e_release_nvm(&pf->hw);
8251 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8252 i40e_stat_str(&pf->hw, ret),
8253 i40e_aq_str(&pf->hw, last_aq_status));
8257 /* Wait a bit for NVM release to complete */
8260 /* Acquire NVM for write access */
8261 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8262 last_aq_status = pf->hw.aq.asq_last_status;
8264 dev_info(&pf->pdev->dev,
8265 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8266 i40e_stat_str(&pf->hw, ret),
8267 i40e_aq_str(&pf->hw, last_aq_status));
8270 /* Write it back out unchanged to initiate update NVM,
8271 * which will force a write of the shadow (alt) RAM to
8272 * the NVM - thus storing the bandwidth values permanently.
8274 ret = i40e_aq_update_nvm(&pf->hw,
8275 I40E_SR_NVM_CONTROL_WORD,
8276 0x10, sizeof(nvm_word),
8277 &nvm_word, true, NULL);
8278 /* Save off last admin queue command status before releasing
8281 last_aq_status = pf->hw.aq.asq_last_status;
8282 i40e_release_nvm(&pf->hw);
8284 dev_info(&pf->pdev->dev,
8285 "BW settings NOT SAVED, err %s aq_err %s\n",
8286 i40e_stat_str(&pf->hw, ret),
8287 i40e_aq_str(&pf->hw, last_aq_status));
8294 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8295 * @pf: board private structure to initialize
8297 * i40e_sw_init initializes the Adapter private data structure.
8298 * Fields are initialized based on PCI device information and
8299 * OS network device settings (MTU size).
8301 static int i40e_sw_init(struct i40e_pf *pf)
8306 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8307 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8308 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8309 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8310 if (I40E_DEBUG_USER & debug)
8311 pf->hw.debug_mask = debug;
8312 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8313 I40E_DEFAULT_MSG_ENABLE);
8316 /* Set default capability flags */
8317 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8318 I40E_FLAG_MSI_ENABLED |
8319 I40E_FLAG_LINK_POLLING_ENABLED |
8320 I40E_FLAG_MSIX_ENABLED;
8322 if (iommu_present(&pci_bus_type))
8323 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8325 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8327 /* Set default ITR */
8328 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8329 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8331 /* Depending on PF configurations, it is possible that the RSS
8332 * maximum might end up larger than the available queues
8334 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8335 pf->alloc_rss_size = 1;
8336 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8337 pf->rss_size_max = min_t(int, pf->rss_size_max,
8338 pf->hw.func_caps.num_tx_qp);
8339 if (pf->hw.func_caps.rss) {
8340 pf->flags |= I40E_FLAG_RSS_ENABLED;
8341 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8345 /* MFP mode enabled */
8346 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8347 pf->flags |= I40E_FLAG_MFP_ENABLED;
8348 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8349 if (i40e_get_npar_bw_setting(pf))
8350 dev_warn(&pf->pdev->dev,
8351 "Could not get NPAR bw settings\n");
8353 dev_info(&pf->pdev->dev,
8354 "Min BW = %8.8x, Max BW = %8.8x\n",
8355 pf->npar_min_bw, pf->npar_max_bw);
8358 /* FW/NVM is not yet fixed in this regard */
8359 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8360 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8361 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8362 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8363 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8364 pf->hw.num_partitions > 1)
8365 dev_info(&pf->pdev->dev,
8366 "Flow Director Sideband mode Disabled in MFP mode\n");
8368 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8369 pf->fdir_pf_filter_count =
8370 pf->hw.func_caps.fd_filters_guaranteed;
8371 pf->hw.fdir_shared_filter_count =
8372 pf->hw.func_caps.fd_filters_best_effort;
8375 if (pf->hw.func_caps.vmdq) {
8376 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8377 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8378 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8382 i40e_init_pf_fcoe(pf);
8384 #endif /* I40E_FCOE */
8385 #ifdef CONFIG_PCI_IOV
8386 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8387 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8388 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8389 pf->num_req_vfs = min_t(int,
8390 pf->hw.func_caps.num_vfs,
8393 #endif /* CONFIG_PCI_IOV */
8394 if (pf->hw.mac.type == I40E_MAC_X722) {
8395 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8396 I40E_FLAG_128_QP_RSS_CAPABLE |
8397 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8398 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8399 I40E_FLAG_WB_ON_ITR_CAPABLE |
8400 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
8402 pf->eeprom_version = 0xDEAD;
8403 pf->lan_veb = I40E_NO_VEB;
8404 pf->lan_vsi = I40E_NO_VSI;
8406 /* By default FW has this off for performance reasons */
8407 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8409 /* set up queue assignment tracking */
8410 size = sizeof(struct i40e_lump_tracking)
8411 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8412 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8417 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8418 pf->qp_pile->search_hint = 0;
8420 pf->tx_timeout_recovery_level = 1;
8422 mutex_init(&pf->switch_mutex);
8424 /* If NPAR is enabled nudge the Tx scheduler */
8425 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8426 i40e_set_npar_bw_setting(pf);
8433 * i40e_set_ntuple - set the ntuple feature flag and take action
8434 * @pf: board private structure to initialize
8435 * @features: the feature set that the stack is suggesting
8437 * returns a bool to indicate if reset needs to happen
8439 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8441 bool need_reset = false;
8443 /* Check if Flow Director n-tuple support was enabled or disabled. If
8444 * the state changed, we need to reset.
8446 if (features & NETIF_F_NTUPLE) {
8447 /* Enable filters and mark for reset */
8448 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8450 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8452 /* turn off filters, mark for reset and clear SW filter list */
8453 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8455 i40e_fdir_filter_exit(pf);
8457 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8458 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8459 /* reset fd counters */
8460 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8461 pf->fdir_pf_active_filters = 0;
8462 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8463 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8464 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8465 /* if ATR was auto disabled it can be re-enabled. */
8466 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8467 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8468 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8474 * i40e_set_features - set the netdev feature flags
8475 * @netdev: ptr to the netdev being adjusted
8476 * @features: the feature set that the stack is suggesting
8478 static int i40e_set_features(struct net_device *netdev,
8479 netdev_features_t features)
8481 struct i40e_netdev_priv *np = netdev_priv(netdev);
8482 struct i40e_vsi *vsi = np->vsi;
8483 struct i40e_pf *pf = vsi->back;
8486 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8487 i40e_vlan_stripping_enable(vsi);
8489 i40e_vlan_stripping_disable(vsi);
8491 need_reset = i40e_set_ntuple(pf, features);
8494 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8499 #if IS_ENABLED(CONFIG_VXLAN)
8501 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8502 * @pf: board private structure
8503 * @port: The UDP port to look up
8505 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8507 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8511 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8512 if (pf->vxlan_ports[i] == port)
8520 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8521 * @netdev: This physical port's netdev
8522 * @sa_family: Socket Family that VXLAN is notifying us about
8523 * @port: New UDP port number that VXLAN started listening to
8525 static void i40e_add_vxlan_port(struct net_device *netdev,
8526 sa_family_t sa_family, __be16 port)
8528 struct i40e_netdev_priv *np = netdev_priv(netdev);
8529 struct i40e_vsi *vsi = np->vsi;
8530 struct i40e_pf *pf = vsi->back;
8534 if (sa_family == AF_INET6)
8537 idx = i40e_get_vxlan_port_idx(pf, port);
8539 /* Check if port already exists */
8540 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8541 netdev_info(netdev, "vxlan port %d already offloaded\n",
8546 /* Now check if there is space to add the new port */
8547 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8549 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8550 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8555 /* New port: add it and mark its index in the bitmap */
8556 pf->vxlan_ports[next_idx] = port;
8557 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8558 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8562 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8563 * @netdev: This physical port's netdev
8564 * @sa_family: Socket Family that VXLAN is notifying us about
8565 * @port: UDP port number that VXLAN stopped listening to
8567 static void i40e_del_vxlan_port(struct net_device *netdev,
8568 sa_family_t sa_family, __be16 port)
8570 struct i40e_netdev_priv *np = netdev_priv(netdev);
8571 struct i40e_vsi *vsi = np->vsi;
8572 struct i40e_pf *pf = vsi->back;
8575 if (sa_family == AF_INET6)
8578 idx = i40e_get_vxlan_port_idx(pf, port);
8580 /* Check if port already exists */
8581 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8582 /* if port exists, set it to 0 (mark for deletion)
8583 * and make it pending
8585 pf->vxlan_ports[idx] = 0;
8586 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8587 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8589 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8595 static int i40e_get_phys_port_id(struct net_device *netdev,
8596 struct netdev_phys_item_id *ppid)
8598 struct i40e_netdev_priv *np = netdev_priv(netdev);
8599 struct i40e_pf *pf = np->vsi->back;
8600 struct i40e_hw *hw = &pf->hw;
8602 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8605 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8606 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8612 * i40e_ndo_fdb_add - add an entry to the hardware database
8613 * @ndm: the input from the stack
8614 * @tb: pointer to array of nladdr (unused)
8615 * @dev: the net device pointer
8616 * @addr: the MAC address entry being added
8617 * @flags: instructions from stack about fdb operation
8619 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8620 struct net_device *dev,
8621 const unsigned char *addr, u16 vid,
8624 struct i40e_netdev_priv *np = netdev_priv(dev);
8625 struct i40e_pf *pf = np->vsi->back;
8628 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8632 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8636 /* Hardware does not support aging addresses so if a
8637 * ndm_state is given only allow permanent addresses
8639 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8640 netdev_info(dev, "FDB only supports static addresses\n");
8644 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8645 err = dev_uc_add_excl(dev, addr);
8646 else if (is_multicast_ether_addr(addr))
8647 err = dev_mc_add_excl(dev, addr);
8651 /* Only return duplicate errors if NLM_F_EXCL is set */
8652 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8659 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8660 * @dev: the netdev being configured
8661 * @nlh: RTNL message
8663 * Inserts a new hardware bridge if not already created and
8664 * enables the bridging mode requested (VEB or VEPA). If the
8665 * hardware bridge has already been inserted and the request
8666 * is to change the mode then that requires a PF reset to
8667 * allow rebuild of the components with required hardware
8668 * bridge mode enabled.
8670 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8671 struct nlmsghdr *nlh,
8674 struct i40e_netdev_priv *np = netdev_priv(dev);
8675 struct i40e_vsi *vsi = np->vsi;
8676 struct i40e_pf *pf = vsi->back;
8677 struct i40e_veb *veb = NULL;
8678 struct nlattr *attr, *br_spec;
8681 /* Only for PF VSI for now */
8682 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8685 /* Find the HW bridge for PF VSI */
8686 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8687 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8691 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8693 nla_for_each_nested(attr, br_spec, rem) {
8696 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8699 mode = nla_get_u16(attr);
8700 if ((mode != BRIDGE_MODE_VEPA) &&
8701 (mode != BRIDGE_MODE_VEB))
8704 /* Insert a new HW bridge */
8706 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8707 vsi->tc_config.enabled_tc);
8709 veb->bridge_mode = mode;
8710 i40e_config_bridge_mode(veb);
8712 /* No Bridge HW offload available */
8716 } else if (mode != veb->bridge_mode) {
8717 /* Existing HW bridge but different mode needs reset */
8718 veb->bridge_mode = mode;
8719 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8720 if (mode == BRIDGE_MODE_VEB)
8721 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8723 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8724 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8733 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8736 * @seq: RTNL message seq #
8737 * @dev: the netdev being configured
8738 * @filter_mask: unused
8739 * @nlflags: netlink flags passed in
8741 * Return the mode in which the hardware bridge is operating in
8744 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8745 struct net_device *dev,
8746 u32 __always_unused filter_mask,
8749 struct i40e_netdev_priv *np = netdev_priv(dev);
8750 struct i40e_vsi *vsi = np->vsi;
8751 struct i40e_pf *pf = vsi->back;
8752 struct i40e_veb *veb = NULL;
8755 /* Only for PF VSI for now */
8756 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8759 /* Find the HW bridge for the PF VSI */
8760 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8761 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8768 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8769 nlflags, 0, 0, filter_mask, NULL);
8772 #define I40E_MAX_TUNNEL_HDR_LEN 80
8774 * i40e_features_check - Validate encapsulated packet conforms to limits
8776 * @dev: This physical port's netdev
8777 * @features: Offload features that the stack believes apply
8779 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8780 struct net_device *dev,
8781 netdev_features_t features)
8783 if (skb->encapsulation &&
8784 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8785 I40E_MAX_TUNNEL_HDR_LEN))
8786 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8791 static const struct net_device_ops i40e_netdev_ops = {
8792 .ndo_open = i40e_open,
8793 .ndo_stop = i40e_close,
8794 .ndo_start_xmit = i40e_lan_xmit_frame,
8795 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8796 .ndo_set_rx_mode = i40e_set_rx_mode,
8797 .ndo_validate_addr = eth_validate_addr,
8798 .ndo_set_mac_address = i40e_set_mac,
8799 .ndo_change_mtu = i40e_change_mtu,
8800 .ndo_do_ioctl = i40e_ioctl,
8801 .ndo_tx_timeout = i40e_tx_timeout,
8802 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8803 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8804 #ifdef CONFIG_NET_POLL_CONTROLLER
8805 .ndo_poll_controller = i40e_netpoll,
8807 .ndo_setup_tc = i40e_setup_tc,
8809 .ndo_fcoe_enable = i40e_fcoe_enable,
8810 .ndo_fcoe_disable = i40e_fcoe_disable,
8812 .ndo_set_features = i40e_set_features,
8813 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8814 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8815 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8816 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8817 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8818 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8819 #if IS_ENABLED(CONFIG_VXLAN)
8820 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8821 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8823 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8824 .ndo_fdb_add = i40e_ndo_fdb_add,
8825 .ndo_features_check = i40e_features_check,
8826 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8827 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8831 * i40e_config_netdev - Setup the netdev flags
8832 * @vsi: the VSI being configured
8834 * Returns 0 on success, negative value on failure
8836 static int i40e_config_netdev(struct i40e_vsi *vsi)
8838 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8839 struct i40e_pf *pf = vsi->back;
8840 struct i40e_hw *hw = &pf->hw;
8841 struct i40e_netdev_priv *np;
8842 struct net_device *netdev;
8843 u8 mac_addr[ETH_ALEN];
8846 etherdev_size = sizeof(struct i40e_netdev_priv);
8847 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8851 vsi->netdev = netdev;
8852 np = netdev_priv(netdev);
8855 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8856 NETIF_F_GSO_UDP_TUNNEL |
8860 netdev->features = NETIF_F_SG |
8864 NETIF_F_GSO_UDP_TUNNEL |
8866 NETIF_F_HW_VLAN_CTAG_TX |
8867 NETIF_F_HW_VLAN_CTAG_RX |
8868 NETIF_F_HW_VLAN_CTAG_FILTER |
8877 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8878 netdev->features |= NETIF_F_NTUPLE;
8880 /* copy netdev features into list of user selectable features */
8881 netdev->hw_features |= netdev->features;
8883 if (vsi->type == I40E_VSI_MAIN) {
8884 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8885 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8886 /* The following steps are necessary to prevent reception
8887 * of tagged packets - some older NVM configurations load a
8888 * default a MAC-VLAN filter that accepts any tagged packet
8889 * which must be replaced by a normal filter.
8891 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8892 spin_lock_bh(&vsi->mac_filter_list_lock);
8893 i40e_add_filter(vsi, mac_addr,
8894 I40E_VLAN_ANY, false, true);
8895 spin_unlock_bh(&vsi->mac_filter_list_lock);
8898 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8899 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8900 pf->vsi[pf->lan_vsi]->netdev->name);
8901 random_ether_addr(mac_addr);
8903 spin_lock_bh(&vsi->mac_filter_list_lock);
8904 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8905 spin_unlock_bh(&vsi->mac_filter_list_lock);
8908 spin_lock_bh(&vsi->mac_filter_list_lock);
8909 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8910 spin_unlock_bh(&vsi->mac_filter_list_lock);
8912 ether_addr_copy(netdev->dev_addr, mac_addr);
8913 ether_addr_copy(netdev->perm_addr, mac_addr);
8914 /* vlan gets same features (except vlan offload)
8915 * after any tweaks for specific VSI types
8917 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8918 NETIF_F_HW_VLAN_CTAG_RX |
8919 NETIF_F_HW_VLAN_CTAG_FILTER);
8920 netdev->priv_flags |= IFF_UNICAST_FLT;
8921 netdev->priv_flags |= IFF_SUPP_NOFCS;
8922 /* Setup netdev TC information */
8923 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8925 netdev->netdev_ops = &i40e_netdev_ops;
8926 netdev->watchdog_timeo = 5 * HZ;
8927 i40e_set_ethtool_ops(netdev);
8929 i40e_fcoe_config_netdev(netdev, vsi);
8936 * i40e_vsi_delete - Delete a VSI from the switch
8937 * @vsi: the VSI being removed
8939 * Returns 0 on success, negative value on failure
8941 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8943 /* remove default VSI is not allowed */
8944 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8947 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8951 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8952 * @vsi: the VSI being queried
8954 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8956 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8958 struct i40e_veb *veb;
8959 struct i40e_pf *pf = vsi->back;
8961 /* Uplink is not a bridge so default to VEB */
8962 if (vsi->veb_idx == I40E_NO_VEB)
8965 veb = pf->veb[vsi->veb_idx];
8967 dev_info(&pf->pdev->dev,
8968 "There is no veb associated with the bridge\n");
8972 /* Uplink is a bridge in VEPA mode */
8973 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
8976 /* Uplink is a bridge in VEB mode */
8980 /* VEPA is now default bridge, so return 0 */
8985 * i40e_add_vsi - Add a VSI to the switch
8986 * @vsi: the VSI being configured
8988 * This initializes a VSI context depending on the VSI type to be added and
8989 * passes it down to the add_vsi aq command.
8991 static int i40e_add_vsi(struct i40e_vsi *vsi)
8994 u8 laa_macaddr[ETH_ALEN];
8995 bool found_laa_mac_filter = false;
8996 struct i40e_pf *pf = vsi->back;
8997 struct i40e_hw *hw = &pf->hw;
8998 struct i40e_vsi_context ctxt;
8999 struct i40e_mac_filter *f, *ftmp;
9001 u8 enabled_tc = 0x1; /* TC0 enabled */
9004 memset(&ctxt, 0, sizeof(ctxt));
9005 switch (vsi->type) {
9007 /* The PF's main VSI is already setup as part of the
9008 * device initialization, so we'll not bother with
9009 * the add_vsi call, but we will retrieve the current
9012 ctxt.seid = pf->main_vsi_seid;
9013 ctxt.pf_num = pf->hw.pf_id;
9015 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9016 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9018 dev_info(&pf->pdev->dev,
9019 "couldn't get PF vsi config, err %s aq_err %s\n",
9020 i40e_stat_str(&pf->hw, ret),
9021 i40e_aq_str(&pf->hw,
9022 pf->hw.aq.asq_last_status));
9025 vsi->info = ctxt.info;
9026 vsi->info.valid_sections = 0;
9028 vsi->seid = ctxt.seid;
9029 vsi->id = ctxt.vsi_number;
9031 enabled_tc = i40e_pf_get_tc_map(pf);
9033 /* MFP mode setup queue map and update VSI */
9034 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9035 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9036 memset(&ctxt, 0, sizeof(ctxt));
9037 ctxt.seid = pf->main_vsi_seid;
9038 ctxt.pf_num = pf->hw.pf_id;
9040 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9041 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9043 dev_info(&pf->pdev->dev,
9044 "update vsi failed, err %s aq_err %s\n",
9045 i40e_stat_str(&pf->hw, ret),
9046 i40e_aq_str(&pf->hw,
9047 pf->hw.aq.asq_last_status));
9051 /* update the local VSI info queue map */
9052 i40e_vsi_update_queue_map(vsi, &ctxt);
9053 vsi->info.valid_sections = 0;
9055 /* Default/Main VSI is only enabled for TC0
9056 * reconfigure it to enable all TCs that are
9057 * available on the port in SFP mode.
9058 * For MFP case the iSCSI PF would use this
9059 * flow to enable LAN+iSCSI TC.
9061 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9063 dev_info(&pf->pdev->dev,
9064 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9066 i40e_stat_str(&pf->hw, ret),
9067 i40e_aq_str(&pf->hw,
9068 pf->hw.aq.asq_last_status));
9075 ctxt.pf_num = hw->pf_id;
9077 ctxt.uplink_seid = vsi->uplink_seid;
9078 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9079 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9080 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9081 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9082 ctxt.info.valid_sections |=
9083 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9084 ctxt.info.switch_id =
9085 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9087 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9090 case I40E_VSI_VMDQ2:
9091 ctxt.pf_num = hw->pf_id;
9093 ctxt.uplink_seid = vsi->uplink_seid;
9094 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9095 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9097 /* This VSI is connected to VEB so the switch_id
9098 * should be set to zero by default.
9100 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9101 ctxt.info.valid_sections |=
9102 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9103 ctxt.info.switch_id =
9104 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9107 /* Setup the VSI tx/rx queue map for TC0 only for now */
9108 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9111 case I40E_VSI_SRIOV:
9112 ctxt.pf_num = hw->pf_id;
9113 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9114 ctxt.uplink_seid = vsi->uplink_seid;
9115 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9116 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9118 /* This VSI is connected to VEB so the switch_id
9119 * should be set to zero by default.
9121 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9122 ctxt.info.valid_sections |=
9123 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9124 ctxt.info.switch_id =
9125 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9128 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9129 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9130 if (pf->vf[vsi->vf_id].spoofchk) {
9131 ctxt.info.valid_sections |=
9132 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9133 ctxt.info.sec_flags |=
9134 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9135 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9137 /* Setup the VSI tx/rx queue map for TC0 only for now */
9138 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9143 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9145 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9150 #endif /* I40E_FCOE */
9155 if (vsi->type != I40E_VSI_MAIN) {
9156 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9158 dev_info(&vsi->back->pdev->dev,
9159 "add vsi failed, err %s aq_err %s\n",
9160 i40e_stat_str(&pf->hw, ret),
9161 i40e_aq_str(&pf->hw,
9162 pf->hw.aq.asq_last_status));
9166 vsi->info = ctxt.info;
9167 vsi->info.valid_sections = 0;
9168 vsi->seid = ctxt.seid;
9169 vsi->id = ctxt.vsi_number;
9172 spin_lock_bh(&vsi->mac_filter_list_lock);
9173 /* If macvlan filters already exist, force them to get loaded */
9174 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9178 /* Expected to have only one MAC filter entry for LAA in list */
9179 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9180 ether_addr_copy(laa_macaddr, f->macaddr);
9181 found_laa_mac_filter = true;
9184 spin_unlock_bh(&vsi->mac_filter_list_lock);
9186 if (found_laa_mac_filter) {
9187 struct i40e_aqc_remove_macvlan_element_data element;
9189 memset(&element, 0, sizeof(element));
9190 ether_addr_copy(element.mac_addr, laa_macaddr);
9191 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9192 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9195 /* some older FW has a different default */
9197 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9198 i40e_aq_remove_macvlan(hw, vsi->seid,
9202 i40e_aq_mac_address_write(hw,
9203 I40E_AQC_WRITE_TYPE_LAA_WOL,
9208 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9209 pf->flags |= I40E_FLAG_FILTER_SYNC;
9212 /* Update VSI BW information */
9213 ret = i40e_vsi_get_bw_info(vsi);
9215 dev_info(&pf->pdev->dev,
9216 "couldn't get vsi bw info, err %s aq_err %s\n",
9217 i40e_stat_str(&pf->hw, ret),
9218 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9219 /* VSI is already added so not tearing that up */
9228 * i40e_vsi_release - Delete a VSI and free its resources
9229 * @vsi: the VSI being removed
9231 * Returns 0 on success or < 0 on error
9233 int i40e_vsi_release(struct i40e_vsi *vsi)
9235 struct i40e_mac_filter *f, *ftmp;
9236 struct i40e_veb *veb = NULL;
9243 /* release of a VEB-owner or last VSI is not allowed */
9244 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9245 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9246 vsi->seid, vsi->uplink_seid);
9249 if (vsi == pf->vsi[pf->lan_vsi] &&
9250 !test_bit(__I40E_DOWN, &pf->state)) {
9251 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9255 uplink_seid = vsi->uplink_seid;
9256 if (vsi->type != I40E_VSI_SRIOV) {
9257 if (vsi->netdev_registered) {
9258 vsi->netdev_registered = false;
9260 /* results in a call to i40e_close() */
9261 unregister_netdev(vsi->netdev);
9264 i40e_vsi_close(vsi);
9266 i40e_vsi_disable_irq(vsi);
9269 spin_lock_bh(&vsi->mac_filter_list_lock);
9270 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9271 i40e_del_filter(vsi, f->macaddr, f->vlan,
9272 f->is_vf, f->is_netdev);
9273 spin_unlock_bh(&vsi->mac_filter_list_lock);
9275 i40e_sync_vsi_filters(vsi);
9277 i40e_vsi_delete(vsi);
9278 i40e_vsi_free_q_vectors(vsi);
9280 free_netdev(vsi->netdev);
9283 i40e_vsi_clear_rings(vsi);
9284 i40e_vsi_clear(vsi);
9286 /* If this was the last thing on the VEB, except for the
9287 * controlling VSI, remove the VEB, which puts the controlling
9288 * VSI onto the next level down in the switch.
9290 * Well, okay, there's one more exception here: don't remove
9291 * the orphan VEBs yet. We'll wait for an explicit remove request
9292 * from up the network stack.
9294 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9296 pf->vsi[i]->uplink_seid == uplink_seid &&
9297 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9298 n++; /* count the VSIs */
9301 for (i = 0; i < I40E_MAX_VEB; i++) {
9304 if (pf->veb[i]->uplink_seid == uplink_seid)
9305 n++; /* count the VEBs */
9306 if (pf->veb[i]->seid == uplink_seid)
9309 if (n == 0 && veb && veb->uplink_seid != 0)
9310 i40e_veb_release(veb);
9316 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9317 * @vsi: ptr to the VSI
9319 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9320 * corresponding SW VSI structure and initializes num_queue_pairs for the
9321 * newly allocated VSI.
9323 * Returns 0 on success or negative on failure
9325 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9328 struct i40e_pf *pf = vsi->back;
9330 if (vsi->q_vectors[0]) {
9331 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9336 if (vsi->base_vector) {
9337 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9338 vsi->seid, vsi->base_vector);
9342 ret = i40e_vsi_alloc_q_vectors(vsi);
9344 dev_info(&pf->pdev->dev,
9345 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9346 vsi->num_q_vectors, vsi->seid, ret);
9347 vsi->num_q_vectors = 0;
9348 goto vector_setup_out;
9351 /* In Legacy mode, we do not have to get any other vector since we
9352 * piggyback on the misc/ICR0 for queue interrupts.
9354 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9356 if (vsi->num_q_vectors)
9357 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9358 vsi->num_q_vectors, vsi->idx);
9359 if (vsi->base_vector < 0) {
9360 dev_info(&pf->pdev->dev,
9361 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9362 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9363 i40e_vsi_free_q_vectors(vsi);
9365 goto vector_setup_out;
9373 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9374 * @vsi: pointer to the vsi.
9376 * This re-allocates a vsi's queue resources.
9378 * Returns pointer to the successfully allocated and configured VSI sw struct
9379 * on success, otherwise returns NULL on failure.
9381 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9383 struct i40e_pf *pf = vsi->back;
9387 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9388 i40e_vsi_clear_rings(vsi);
9390 i40e_vsi_free_arrays(vsi, false);
9391 i40e_set_num_rings_in_vsi(vsi);
9392 ret = i40e_vsi_alloc_arrays(vsi, false);
9396 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9398 dev_info(&pf->pdev->dev,
9399 "failed to get tracking for %d queues for VSI %d err %d\n",
9400 vsi->alloc_queue_pairs, vsi->seid, ret);
9403 vsi->base_queue = ret;
9405 /* Update the FW view of the VSI. Force a reset of TC and queue
9406 * layout configurations.
9408 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9409 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9410 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9411 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9413 /* assign it some queues */
9414 ret = i40e_alloc_rings(vsi);
9418 /* map all of the rings to the q_vectors */
9419 i40e_vsi_map_rings_to_vectors(vsi);
9423 i40e_vsi_free_q_vectors(vsi);
9424 if (vsi->netdev_registered) {
9425 vsi->netdev_registered = false;
9426 unregister_netdev(vsi->netdev);
9427 free_netdev(vsi->netdev);
9430 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9432 i40e_vsi_clear(vsi);
9437 * i40e_vsi_setup - Set up a VSI by a given type
9438 * @pf: board private structure
9440 * @uplink_seid: the switch element to link to
9441 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9443 * This allocates the sw VSI structure and its queue resources, then add a VSI
9444 * to the identified VEB.
9446 * Returns pointer to the successfully allocated and configure VSI sw struct on
9447 * success, otherwise returns NULL on failure.
9449 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9450 u16 uplink_seid, u32 param1)
9452 struct i40e_vsi *vsi = NULL;
9453 struct i40e_veb *veb = NULL;
9457 /* The requested uplink_seid must be either
9458 * - the PF's port seid
9459 * no VEB is needed because this is the PF
9460 * or this is a Flow Director special case VSI
9461 * - seid of an existing VEB
9462 * - seid of a VSI that owns an existing VEB
9463 * - seid of a VSI that doesn't own a VEB
9464 * a new VEB is created and the VSI becomes the owner
9465 * - seid of the PF VSI, which is what creates the first VEB
9466 * this is a special case of the previous
9468 * Find which uplink_seid we were given and create a new VEB if needed
9470 for (i = 0; i < I40E_MAX_VEB; i++) {
9471 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9477 if (!veb && uplink_seid != pf->mac_seid) {
9479 for (i = 0; i < pf->num_alloc_vsi; i++) {
9480 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9486 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9491 if (vsi->uplink_seid == pf->mac_seid)
9492 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9493 vsi->tc_config.enabled_tc);
9494 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9495 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9496 vsi->tc_config.enabled_tc);
9498 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9499 dev_info(&vsi->back->pdev->dev,
9500 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9503 /* We come up by default in VEPA mode if SRIOV is not
9504 * already enabled, in which case we can't force VEPA
9507 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9508 veb->bridge_mode = BRIDGE_MODE_VEPA;
9509 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9511 i40e_config_bridge_mode(veb);
9513 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9514 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9518 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9522 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9523 uplink_seid = veb->seid;
9526 /* get vsi sw struct */
9527 v_idx = i40e_vsi_mem_alloc(pf, type);
9530 vsi = pf->vsi[v_idx];
9534 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9536 if (type == I40E_VSI_MAIN)
9537 pf->lan_vsi = v_idx;
9538 else if (type == I40E_VSI_SRIOV)
9539 vsi->vf_id = param1;
9540 /* assign it some queues */
9541 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9544 dev_info(&pf->pdev->dev,
9545 "failed to get tracking for %d queues for VSI %d err=%d\n",
9546 vsi->alloc_queue_pairs, vsi->seid, ret);
9549 vsi->base_queue = ret;
9551 /* get a VSI from the hardware */
9552 vsi->uplink_seid = uplink_seid;
9553 ret = i40e_add_vsi(vsi);
9557 switch (vsi->type) {
9558 /* setup the netdev if needed */
9560 case I40E_VSI_VMDQ2:
9562 ret = i40e_config_netdev(vsi);
9565 ret = register_netdev(vsi->netdev);
9568 vsi->netdev_registered = true;
9569 netif_carrier_off(vsi->netdev);
9570 #ifdef CONFIG_I40E_DCB
9571 /* Setup DCB netlink interface */
9572 i40e_dcbnl_setup(vsi);
9573 #endif /* CONFIG_I40E_DCB */
9577 /* set up vectors and rings if needed */
9578 ret = i40e_vsi_setup_vectors(vsi);
9582 ret = i40e_alloc_rings(vsi);
9586 /* map all of the rings to the q_vectors */
9587 i40e_vsi_map_rings_to_vectors(vsi);
9589 i40e_vsi_reset_stats(vsi);
9593 /* no netdev or rings for the other VSI types */
9597 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9598 (vsi->type == I40E_VSI_VMDQ2)) {
9599 ret = i40e_vsi_config_rss(vsi);
9604 i40e_vsi_free_q_vectors(vsi);
9606 if (vsi->netdev_registered) {
9607 vsi->netdev_registered = false;
9608 unregister_netdev(vsi->netdev);
9609 free_netdev(vsi->netdev);
9613 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9615 i40e_vsi_clear(vsi);
9621 * i40e_veb_get_bw_info - Query VEB BW information
9622 * @veb: the veb to query
9624 * Query the Tx scheduler BW configuration data for given VEB
9626 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9628 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9629 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9630 struct i40e_pf *pf = veb->pf;
9631 struct i40e_hw *hw = &pf->hw;
9636 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9639 dev_info(&pf->pdev->dev,
9640 "query veb bw config failed, err %s aq_err %s\n",
9641 i40e_stat_str(&pf->hw, ret),
9642 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9646 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9649 dev_info(&pf->pdev->dev,
9650 "query veb bw ets config failed, err %s aq_err %s\n",
9651 i40e_stat_str(&pf->hw, ret),
9652 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9656 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9657 veb->bw_max_quanta = ets_data.tc_bw_max;
9658 veb->is_abs_credits = bw_data.absolute_credits_enable;
9659 veb->enabled_tc = ets_data.tc_valid_bits;
9660 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9661 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9662 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9663 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9664 veb->bw_tc_limit_credits[i] =
9665 le16_to_cpu(bw_data.tc_bw_limits[i]);
9666 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9674 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9675 * @pf: board private structure
9677 * On error: returns error code (negative)
9678 * On success: returns vsi index in PF (positive)
9680 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9683 struct i40e_veb *veb;
9686 /* Need to protect the allocation of switch elements at the PF level */
9687 mutex_lock(&pf->switch_mutex);
9689 /* VEB list may be fragmented if VEB creation/destruction has
9690 * been happening. We can afford to do a quick scan to look
9691 * for any free slots in the list.
9693 * find next empty veb slot, looping back around if necessary
9696 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9698 if (i >= I40E_MAX_VEB) {
9700 goto err_alloc_veb; /* out of VEB slots! */
9703 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9710 veb->enabled_tc = 1;
9715 mutex_unlock(&pf->switch_mutex);
9720 * i40e_switch_branch_release - Delete a branch of the switch tree
9721 * @branch: where to start deleting
9723 * This uses recursion to find the tips of the branch to be
9724 * removed, deleting until we get back to and can delete this VEB.
9726 static void i40e_switch_branch_release(struct i40e_veb *branch)
9728 struct i40e_pf *pf = branch->pf;
9729 u16 branch_seid = branch->seid;
9730 u16 veb_idx = branch->idx;
9733 /* release any VEBs on this VEB - RECURSION */
9734 for (i = 0; i < I40E_MAX_VEB; i++) {
9737 if (pf->veb[i]->uplink_seid == branch->seid)
9738 i40e_switch_branch_release(pf->veb[i]);
9741 /* Release the VSIs on this VEB, but not the owner VSI.
9743 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9744 * the VEB itself, so don't use (*branch) after this loop.
9746 for (i = 0; i < pf->num_alloc_vsi; i++) {
9749 if (pf->vsi[i]->uplink_seid == branch_seid &&
9750 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9751 i40e_vsi_release(pf->vsi[i]);
9755 /* There's one corner case where the VEB might not have been
9756 * removed, so double check it here and remove it if needed.
9757 * This case happens if the veb was created from the debugfs
9758 * commands and no VSIs were added to it.
9760 if (pf->veb[veb_idx])
9761 i40e_veb_release(pf->veb[veb_idx]);
9765 * i40e_veb_clear - remove veb struct
9766 * @veb: the veb to remove
9768 static void i40e_veb_clear(struct i40e_veb *veb)
9774 struct i40e_pf *pf = veb->pf;
9776 mutex_lock(&pf->switch_mutex);
9777 if (pf->veb[veb->idx] == veb)
9778 pf->veb[veb->idx] = NULL;
9779 mutex_unlock(&pf->switch_mutex);
9786 * i40e_veb_release - Delete a VEB and free its resources
9787 * @veb: the VEB being removed
9789 void i40e_veb_release(struct i40e_veb *veb)
9791 struct i40e_vsi *vsi = NULL;
9797 /* find the remaining VSI and check for extras */
9798 for (i = 0; i < pf->num_alloc_vsi; i++) {
9799 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9805 dev_info(&pf->pdev->dev,
9806 "can't remove VEB %d with %d VSIs left\n",
9811 /* move the remaining VSI to uplink veb */
9812 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9813 if (veb->uplink_seid) {
9814 vsi->uplink_seid = veb->uplink_seid;
9815 if (veb->uplink_seid == pf->mac_seid)
9816 vsi->veb_idx = I40E_NO_VEB;
9818 vsi->veb_idx = veb->veb_idx;
9821 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9822 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9825 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9826 i40e_veb_clear(veb);
9830 * i40e_add_veb - create the VEB in the switch
9831 * @veb: the VEB to be instantiated
9832 * @vsi: the controlling VSI
9834 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9836 struct i40e_pf *pf = veb->pf;
9837 bool is_default = veb->pf->cur_promisc;
9838 bool is_cloud = false;
9841 /* get a VEB from the hardware */
9842 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9843 veb->enabled_tc, is_default,
9844 is_cloud, &veb->seid, NULL);
9846 dev_info(&pf->pdev->dev,
9847 "couldn't add VEB, err %s aq_err %s\n",
9848 i40e_stat_str(&pf->hw, ret),
9849 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9853 /* get statistics counter */
9854 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9855 &veb->stats_idx, NULL, NULL, NULL);
9857 dev_info(&pf->pdev->dev,
9858 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9859 i40e_stat_str(&pf->hw, ret),
9860 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9863 ret = i40e_veb_get_bw_info(veb);
9865 dev_info(&pf->pdev->dev,
9866 "couldn't get VEB bw info, err %s aq_err %s\n",
9867 i40e_stat_str(&pf->hw, ret),
9868 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9869 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9873 vsi->uplink_seid = veb->seid;
9874 vsi->veb_idx = veb->idx;
9875 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9881 * i40e_veb_setup - Set up a VEB
9882 * @pf: board private structure
9883 * @flags: VEB setup flags
9884 * @uplink_seid: the switch element to link to
9885 * @vsi_seid: the initial VSI seid
9886 * @enabled_tc: Enabled TC bit-map
9888 * This allocates the sw VEB structure and links it into the switch
9889 * It is possible and legal for this to be a duplicate of an already
9890 * existing VEB. It is also possible for both uplink and vsi seids
9891 * to be zero, in order to create a floating VEB.
9893 * Returns pointer to the successfully allocated VEB sw struct on
9894 * success, otherwise returns NULL on failure.
9896 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9897 u16 uplink_seid, u16 vsi_seid,
9900 struct i40e_veb *veb, *uplink_veb = NULL;
9901 int vsi_idx, veb_idx;
9904 /* if one seid is 0, the other must be 0 to create a floating relay */
9905 if ((uplink_seid == 0 || vsi_seid == 0) &&
9906 (uplink_seid + vsi_seid != 0)) {
9907 dev_info(&pf->pdev->dev,
9908 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9909 uplink_seid, vsi_seid);
9913 /* make sure there is such a vsi and uplink */
9914 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9915 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9917 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9918 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9923 if (uplink_seid && uplink_seid != pf->mac_seid) {
9924 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9925 if (pf->veb[veb_idx] &&
9926 pf->veb[veb_idx]->seid == uplink_seid) {
9927 uplink_veb = pf->veb[veb_idx];
9932 dev_info(&pf->pdev->dev,
9933 "uplink seid %d not found\n", uplink_seid);
9938 /* get veb sw struct */
9939 veb_idx = i40e_veb_mem_alloc(pf);
9942 veb = pf->veb[veb_idx];
9944 veb->uplink_seid = uplink_seid;
9945 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9946 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9948 /* create the VEB in the switch */
9949 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9952 if (vsi_idx == pf->lan_vsi)
9953 pf->lan_veb = veb->idx;
9958 i40e_veb_clear(veb);
9964 * i40e_setup_pf_switch_element - set PF vars based on switch type
9965 * @pf: board private structure
9966 * @ele: element we are building info from
9967 * @num_reported: total number of elements
9968 * @printconfig: should we print the contents
9970 * helper function to assist in extracting a few useful SEID values.
9972 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9973 struct i40e_aqc_switch_config_element_resp *ele,
9974 u16 num_reported, bool printconfig)
9976 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9977 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9978 u8 element_type = ele->element_type;
9979 u16 seid = le16_to_cpu(ele->seid);
9982 dev_info(&pf->pdev->dev,
9983 "type=%d seid=%d uplink=%d downlink=%d\n",
9984 element_type, seid, uplink_seid, downlink_seid);
9986 switch (element_type) {
9987 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9988 pf->mac_seid = seid;
9990 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9992 if (uplink_seid != pf->mac_seid)
9994 if (pf->lan_veb == I40E_NO_VEB) {
9997 /* find existing or else empty VEB */
9998 for (v = 0; v < I40E_MAX_VEB; v++) {
9999 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10004 if (pf->lan_veb == I40E_NO_VEB) {
10005 v = i40e_veb_mem_alloc(pf);
10012 pf->veb[pf->lan_veb]->seid = seid;
10013 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10014 pf->veb[pf->lan_veb]->pf = pf;
10015 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10017 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10018 if (num_reported != 1)
10020 /* This is immediately after a reset so we can assume this is
10023 pf->mac_seid = uplink_seid;
10024 pf->pf_seid = downlink_seid;
10025 pf->main_vsi_seid = seid;
10027 dev_info(&pf->pdev->dev,
10028 "pf_seid=%d main_vsi_seid=%d\n",
10029 pf->pf_seid, pf->main_vsi_seid);
10031 case I40E_SWITCH_ELEMENT_TYPE_PF:
10032 case I40E_SWITCH_ELEMENT_TYPE_VF:
10033 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10034 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10035 case I40E_SWITCH_ELEMENT_TYPE_PE:
10036 case I40E_SWITCH_ELEMENT_TYPE_PA:
10037 /* ignore these for now */
10040 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10041 element_type, seid);
10047 * i40e_fetch_switch_configuration - Get switch config from firmware
10048 * @pf: board private structure
10049 * @printconfig: should we print the contents
10051 * Get the current switch configuration from the device and
10052 * extract a few useful SEID values.
10054 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10056 struct i40e_aqc_get_switch_config_resp *sw_config;
10062 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10066 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10068 u16 num_reported, num_total;
10070 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10074 dev_info(&pf->pdev->dev,
10075 "get switch config failed err %s aq_err %s\n",
10076 i40e_stat_str(&pf->hw, ret),
10077 i40e_aq_str(&pf->hw,
10078 pf->hw.aq.asq_last_status));
10083 num_reported = le16_to_cpu(sw_config->header.num_reported);
10084 num_total = le16_to_cpu(sw_config->header.num_total);
10087 dev_info(&pf->pdev->dev,
10088 "header: %d reported %d total\n",
10089 num_reported, num_total);
10091 for (i = 0; i < num_reported; i++) {
10092 struct i40e_aqc_switch_config_element_resp *ele =
10093 &sw_config->element[i];
10095 i40e_setup_pf_switch_element(pf, ele, num_reported,
10098 } while (next_seid != 0);
10105 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10106 * @pf: board private structure
10107 * @reinit: if the Main VSI needs to re-initialized.
10109 * Returns 0 on success, negative value on failure
10111 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10115 /* find out what's out there already */
10116 ret = i40e_fetch_switch_configuration(pf, false);
10118 dev_info(&pf->pdev->dev,
10119 "couldn't fetch switch config, err %s aq_err %s\n",
10120 i40e_stat_str(&pf->hw, ret),
10121 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10124 i40e_pf_reset_stats(pf);
10126 /* first time setup */
10127 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10128 struct i40e_vsi *vsi = NULL;
10131 /* Set up the PF VSI associated with the PF's main VSI
10132 * that is already in the HW switch
10134 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10135 uplink_seid = pf->veb[pf->lan_veb]->seid;
10137 uplink_seid = pf->mac_seid;
10138 if (pf->lan_vsi == I40E_NO_VSI)
10139 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10141 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10143 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10144 i40e_fdir_teardown(pf);
10148 /* force a reset of TC and queue layout configurations */
10149 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10151 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10152 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10153 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10155 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10157 i40e_fdir_sb_setup(pf);
10159 /* Setup static PF queue filter control settings */
10160 ret = i40e_setup_pf_filter_control(pf);
10162 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10164 /* Failure here should not stop continuing other steps */
10167 /* enable RSS in the HW, even for only one queue, as the stack can use
10170 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10171 i40e_pf_config_rss(pf);
10173 /* fill in link information and enable LSE reporting */
10174 i40e_update_link_info(&pf->hw);
10175 i40e_link_event(pf);
10177 /* Initialize user-specific link properties */
10178 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10179 I40E_AQ_AN_COMPLETED) ? true : false);
10187 * i40e_determine_queue_usage - Work out queue distribution
10188 * @pf: board private structure
10190 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10194 pf->num_lan_qps = 0;
10196 pf->num_fcoe_qps = 0;
10199 /* Find the max queues to be put into basic use. We'll always be
10200 * using TC0, whether or not DCB is running, and TC0 will get the
10203 queues_left = pf->hw.func_caps.num_tx_qp;
10205 if ((queues_left == 1) ||
10206 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10207 /* one qp for PF, no queues for anything else */
10209 pf->alloc_rss_size = pf->num_lan_qps = 1;
10211 /* make sure all the fancies are disabled */
10212 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10214 I40E_FLAG_FCOE_ENABLED |
10216 I40E_FLAG_FD_SB_ENABLED |
10217 I40E_FLAG_FD_ATR_ENABLED |
10218 I40E_FLAG_DCB_CAPABLE |
10219 I40E_FLAG_SRIOV_ENABLED |
10220 I40E_FLAG_VMDQ_ENABLED);
10221 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10222 I40E_FLAG_FD_SB_ENABLED |
10223 I40E_FLAG_FD_ATR_ENABLED |
10224 I40E_FLAG_DCB_CAPABLE))) {
10225 /* one qp for PF */
10226 pf->alloc_rss_size = pf->num_lan_qps = 1;
10227 queues_left -= pf->num_lan_qps;
10229 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10231 I40E_FLAG_FCOE_ENABLED |
10233 I40E_FLAG_FD_SB_ENABLED |
10234 I40E_FLAG_FD_ATR_ENABLED |
10235 I40E_FLAG_DCB_ENABLED |
10236 I40E_FLAG_VMDQ_ENABLED);
10238 /* Not enough queues for all TCs */
10239 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10240 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10241 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10242 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10244 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10245 num_online_cpus());
10246 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10247 pf->hw.func_caps.num_tx_qp);
10249 queues_left -= pf->num_lan_qps;
10253 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10254 if (I40E_DEFAULT_FCOE <= queues_left) {
10255 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10256 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10257 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10259 pf->num_fcoe_qps = 0;
10260 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10261 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10264 queues_left -= pf->num_fcoe_qps;
10268 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10269 if (queues_left > 1) {
10270 queues_left -= 1; /* save 1 queue for FD */
10272 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10273 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10277 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10278 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10279 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10280 (queues_left / pf->num_vf_qps));
10281 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10284 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10285 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10286 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10287 (queues_left / pf->num_vmdq_qps));
10288 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10291 pf->queues_left = queues_left;
10292 dev_dbg(&pf->pdev->dev,
10293 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10294 pf->hw.func_caps.num_tx_qp,
10295 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10296 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10297 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10300 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10305 * i40e_setup_pf_filter_control - Setup PF static filter control
10306 * @pf: PF to be setup
10308 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10309 * settings. If PE/FCoE are enabled then it will also set the per PF
10310 * based filter sizes required for them. It also enables Flow director,
10311 * ethertype and macvlan type filter settings for the pf.
10313 * Returns 0 on success, negative on failure
10315 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10317 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10319 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10321 /* Flow Director is enabled */
10322 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10323 settings->enable_fdir = true;
10325 /* Ethtype and MACVLAN filters enabled for PF */
10326 settings->enable_ethtype = true;
10327 settings->enable_macvlan = true;
10329 if (i40e_set_filter_control(&pf->hw, settings))
10335 #define INFO_STRING_LEN 255
10336 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10337 static void i40e_print_features(struct i40e_pf *pf)
10339 struct i40e_hw *hw = &pf->hw;
10340 char *buf, *string;
10343 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
10345 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
10351 i += snprintf(&buf[i], REMAIN(i), "Features: PF-id[%d] ", hw->pf_id);
10352 #ifdef CONFIG_PCI_IOV
10353 i += snprintf(&buf[i], REMAIN(i), "VFs: %d ", pf->num_req_vfs);
10355 i += snprintf(&buf[i], REMAIN(i), "VSIs: %d QP: %d RX: %s ",
10356 pf->hw.func_caps.num_vsis,
10357 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10358 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10360 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10361 i += snprintf(&buf[i], REMAIN(i), "RSS ");
10362 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10363 i += snprintf(&buf[i], REMAIN(i), "FD_ATR ");
10364 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10365 i += snprintf(&buf[i], REMAIN(i), "FD_SB ");
10366 i += snprintf(&buf[i], REMAIN(i), "NTUPLE ");
10368 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10369 i += snprintf(&buf[i], REMAIN(i), "DCB ");
10370 #if IS_ENABLED(CONFIG_VXLAN)
10371 i += snprintf(&buf[i], REMAIN(i), "VxLAN ");
10373 if (pf->flags & I40E_FLAG_PTP)
10374 i += snprintf(&buf[i], REMAIN(i), "PTP ");
10376 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10377 i += snprintf(&buf[i], REMAIN(i), "FCOE ");
10379 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10380 i += snprintf(&buf[i], REMAIN(i), "VEPA ");
10382 buf += sprintf(buf, "VEPA ");
10384 dev_info(&pf->pdev->dev, "%s\n", string);
10386 WARN_ON(i > INFO_STRING_LEN);
10390 * i40e_probe - Device initialization routine
10391 * @pdev: PCI device information struct
10392 * @ent: entry in i40e_pci_tbl
10394 * i40e_probe initializes a PF identified by a pci_dev structure.
10395 * The OS initialization, configuring of the PF private structure,
10396 * and a hardware reset occur.
10398 * Returns 0 on success, negative on failure
10400 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10402 struct i40e_aq_get_phy_abilities_resp abilities;
10403 struct i40e_pf *pf;
10404 struct i40e_hw *hw;
10405 static u16 pfs_found;
10414 err = pci_enable_device_mem(pdev);
10418 /* set up for high or low dma */
10419 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10421 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10423 dev_err(&pdev->dev,
10424 "DMA configuration failed: 0x%x\n", err);
10429 /* set up pci connections */
10430 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10431 IORESOURCE_MEM), i40e_driver_name);
10433 dev_info(&pdev->dev,
10434 "pci_request_selected_regions failed %d\n", err);
10438 pci_enable_pcie_error_reporting(pdev);
10439 pci_set_master(pdev);
10441 /* Now that we have a PCI connection, we need to do the
10442 * low level device setup. This is primarily setting up
10443 * the Admin Queue structures and then querying for the
10444 * device's current profile information.
10446 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10453 set_bit(__I40E_DOWN, &pf->state);
10458 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10459 I40E_MAX_CSR_SPACE);
10461 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10462 if (!hw->hw_addr) {
10464 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10465 (unsigned int)pci_resource_start(pdev, 0),
10466 pf->ioremap_len, err);
10469 hw->vendor_id = pdev->vendor;
10470 hw->device_id = pdev->device;
10471 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10472 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10473 hw->subsystem_device_id = pdev->subsystem_device;
10474 hw->bus.device = PCI_SLOT(pdev->devfn);
10475 hw->bus.func = PCI_FUNC(pdev->devfn);
10476 pf->instance = pfs_found;
10479 pf->msg_enable = pf->hw.debug_mask;
10480 pf->msg_enable = debug;
10483 /* do a special CORER for clearing PXE mode once at init */
10484 if (hw->revision_id == 0 &&
10485 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10486 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10491 i40e_clear_pxe_mode(hw);
10494 /* Reset here to make sure all is clean and to define PF 'n' */
10496 err = i40e_pf_reset(hw);
10498 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10503 hw->aq.num_arq_entries = I40E_AQ_LEN;
10504 hw->aq.num_asq_entries = I40E_AQ_LEN;
10505 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10506 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10507 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10509 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10511 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10513 err = i40e_init_shared_code(hw);
10515 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10520 /* set up a default setting for link flow control */
10521 pf->hw.fc.requested_mode = I40E_FC_NONE;
10523 err = i40e_init_adminq(hw);
10525 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10526 dev_info(&pdev->dev,
10527 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10529 dev_info(&pdev->dev,
10530 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10535 /* provide nvm, fw, api versions */
10536 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10537 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10538 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10539 i40e_nvm_version_str(hw));
10541 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10542 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10543 dev_info(&pdev->dev,
10544 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10545 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10546 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10547 dev_info(&pdev->dev,
10548 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10550 i40e_verify_eeprom(pf);
10552 /* Rev 0 hardware was never productized */
10553 if (hw->revision_id < 1)
10554 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10556 i40e_clear_pxe_mode(hw);
10557 err = i40e_get_capabilities(pf);
10559 goto err_adminq_setup;
10561 err = i40e_sw_init(pf);
10563 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10567 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10568 hw->func_caps.num_rx_qp,
10569 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10571 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10572 goto err_init_lan_hmc;
10575 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10577 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10579 goto err_configure_lan_hmc;
10582 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10583 * Ignore error return codes because if it was already disabled via
10584 * hardware settings this will fail
10586 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10587 (pf->hw.aq.fw_maj_ver < 4)) {
10588 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10589 i40e_aq_stop_lldp(hw, true, NULL);
10592 i40e_get_mac_addr(hw, hw->mac.addr);
10593 if (!is_valid_ether_addr(hw->mac.addr)) {
10594 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10598 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10599 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10600 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10601 if (is_valid_ether_addr(hw->mac.port_addr))
10602 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10604 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10606 dev_info(&pdev->dev,
10607 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10608 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10609 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10611 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10613 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10614 #endif /* I40E_FCOE */
10616 pci_set_drvdata(pdev, pf);
10617 pci_save_state(pdev);
10618 #ifdef CONFIG_I40E_DCB
10619 err = i40e_init_pf_dcb(pf);
10621 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10622 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10623 /* Continue without DCB enabled */
10625 #endif /* CONFIG_I40E_DCB */
10627 /* set up periodic task facility */
10628 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10629 pf->service_timer_period = HZ;
10631 INIT_WORK(&pf->service_task, i40e_service_task);
10632 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10633 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10635 /* NVM bit on means WoL disabled for the port */
10636 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10637 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10638 pf->wol_en = false;
10641 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10643 /* set up the main switch operations */
10644 i40e_determine_queue_usage(pf);
10645 err = i40e_init_interrupt_scheme(pf);
10647 goto err_switch_setup;
10649 /* The number of VSIs reported by the FW is the minimum guaranteed
10650 * to us; HW supports far more and we share the remaining pool with
10651 * the other PFs. We allocate space for more than the guarantee with
10652 * the understanding that we might not get them all later.
10654 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10655 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10657 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10659 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10660 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10661 pf->vsi = kzalloc(len, GFP_KERNEL);
10664 goto err_switch_setup;
10667 #ifdef CONFIG_PCI_IOV
10668 /* prep for VF support */
10669 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10670 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10671 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10672 if (pci_num_vf(pdev))
10673 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10676 err = i40e_setup_pf_switch(pf, false);
10678 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10682 /* Make sure flow control is set according to current settings */
10683 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10684 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10685 dev_dbg(&pf->pdev->dev,
10686 "Set fc with err %s aq_err %s on get_phy_cap\n",
10687 i40e_stat_str(hw, err),
10688 i40e_aq_str(hw, hw->aq.asq_last_status));
10689 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10690 dev_dbg(&pf->pdev->dev,
10691 "Set fc with err %s aq_err %s on set_phy_config\n",
10692 i40e_stat_str(hw, err),
10693 i40e_aq_str(hw, hw->aq.asq_last_status));
10694 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10695 dev_dbg(&pf->pdev->dev,
10696 "Set fc with err %s aq_err %s on get_link_info\n",
10697 i40e_stat_str(hw, err),
10698 i40e_aq_str(hw, hw->aq.asq_last_status));
10700 /* if FDIR VSI was set up, start it now */
10701 for (i = 0; i < pf->num_alloc_vsi; i++) {
10702 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10703 i40e_vsi_open(pf->vsi[i]);
10708 /* driver is only interested in link up/down and module qualification
10709 * reports from firmware
10711 err = i40e_aq_set_phy_int_mask(&pf->hw,
10712 I40E_AQ_EVENT_LINK_UPDOWN |
10713 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10715 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10716 i40e_stat_str(&pf->hw, err),
10717 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10719 /* Reconfigure hardware for allowing smaller MSS in the case
10720 * of TSO, so that we avoid the MDD being fired and causing
10721 * a reset in the case of small MSS+TSO.
10723 val = rd32(hw, I40E_REG_MSS);
10724 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10725 val &= ~I40E_REG_MSS_MIN_MASK;
10726 val |= I40E_64BYTE_MSS;
10727 wr32(hw, I40E_REG_MSS, val);
10730 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10731 (pf->hw.aq.fw_maj_ver < 4)) {
10733 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10735 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10736 i40e_stat_str(&pf->hw, err),
10737 i40e_aq_str(&pf->hw,
10738 pf->hw.aq.asq_last_status));
10740 /* The main driver is (mostly) up and happy. We need to set this state
10741 * before setting up the misc vector or we get a race and the vector
10742 * ends up disabled forever.
10744 clear_bit(__I40E_DOWN, &pf->state);
10746 /* In case of MSIX we are going to setup the misc vector right here
10747 * to handle admin queue events etc. In case of legacy and MSI
10748 * the misc functionality and queue processing is combined in
10749 * the same vector and that gets setup at open.
10751 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10752 err = i40e_setup_misc_vector(pf);
10754 dev_info(&pdev->dev,
10755 "setup of misc vector failed: %d\n", err);
10760 #ifdef CONFIG_PCI_IOV
10761 /* prep for VF support */
10762 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10763 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10764 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10767 /* disable link interrupts for VFs */
10768 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10769 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10770 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10773 if (pci_num_vf(pdev)) {
10774 dev_info(&pdev->dev,
10775 "Active VFs found, allocating resources.\n");
10776 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10778 dev_info(&pdev->dev,
10779 "Error %d allocating resources for existing VFs\n",
10783 #endif /* CONFIG_PCI_IOV */
10787 i40e_dbg_pf_init(pf);
10789 /* tell the firmware that we're starting */
10790 i40e_send_version(pf);
10792 /* since everything's happy, start the service_task timer */
10793 mod_timer(&pf->service_timer,
10794 round_jiffies(jiffies + pf->service_timer_period));
10797 /* create FCoE interface */
10798 i40e_fcoe_vsi_setup(pf);
10801 #define PCI_SPEED_SIZE 8
10802 #define PCI_WIDTH_SIZE 8
10803 /* Devices on the IOSF bus do not have this information
10804 * and will report PCI Gen 1 x 1 by default so don't bother
10807 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10808 char speed[PCI_SPEED_SIZE] = "Unknown";
10809 char width[PCI_WIDTH_SIZE] = "Unknown";
10811 /* Get the negotiated link width and speed from PCI config
10814 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10817 i40e_set_pci_config_data(hw, link_status);
10819 switch (hw->bus.speed) {
10820 case i40e_bus_speed_8000:
10821 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10822 case i40e_bus_speed_5000:
10823 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10824 case i40e_bus_speed_2500:
10825 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10829 switch (hw->bus.width) {
10830 case i40e_bus_width_pcie_x8:
10831 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10832 case i40e_bus_width_pcie_x4:
10833 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10834 case i40e_bus_width_pcie_x2:
10835 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10836 case i40e_bus_width_pcie_x1:
10837 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10842 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10845 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10846 hw->bus.speed < i40e_bus_speed_8000) {
10847 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10848 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10852 /* get the requested speeds from the fw */
10853 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10855 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10856 i40e_stat_str(&pf->hw, err),
10857 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10858 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10860 /* get the supported phy types from the fw */
10861 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10863 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10864 i40e_stat_str(&pf->hw, err),
10865 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10866 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10868 /* Add a filter to drop all Flow control frames from any VSI from being
10869 * transmitted. By doing so we stop a malicious VF from sending out
10870 * PAUSE or PFC frames and potentially controlling traffic for other
10872 * The FW can still send Flow control frames if enabled.
10874 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10875 pf->main_vsi_seid);
10877 /* print a string summarizing features */
10878 i40e_print_features(pf);
10882 /* Unwind what we've done if something failed in the setup */
10884 set_bit(__I40E_DOWN, &pf->state);
10885 i40e_clear_interrupt_scheme(pf);
10888 i40e_reset_interrupt_capability(pf);
10889 del_timer_sync(&pf->service_timer);
10891 err_configure_lan_hmc:
10892 (void)i40e_shutdown_lan_hmc(hw);
10894 kfree(pf->qp_pile);
10897 (void)i40e_shutdown_adminq(hw);
10899 iounmap(hw->hw_addr);
10903 pci_disable_pcie_error_reporting(pdev);
10904 pci_release_selected_regions(pdev,
10905 pci_select_bars(pdev, IORESOURCE_MEM));
10908 pci_disable_device(pdev);
10913 * i40e_remove - Device removal routine
10914 * @pdev: PCI device information struct
10916 * i40e_remove is called by the PCI subsystem to alert the driver
10917 * that is should release a PCI device. This could be caused by a
10918 * Hot-Plug event, or because the driver is going to be removed from
10921 static void i40e_remove(struct pci_dev *pdev)
10923 struct i40e_pf *pf = pci_get_drvdata(pdev);
10924 struct i40e_hw *hw = &pf->hw;
10925 i40e_status ret_code;
10928 i40e_dbg_pf_exit(pf);
10932 /* Disable RSS in hw */
10933 wr32(hw, I40E_PFQF_HENA(0), 0);
10934 wr32(hw, I40E_PFQF_HENA(1), 0);
10936 /* no more scheduling of any task */
10937 set_bit(__I40E_DOWN, &pf->state);
10938 del_timer_sync(&pf->service_timer);
10939 cancel_work_sync(&pf->service_task);
10940 i40e_fdir_teardown(pf);
10942 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10944 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10947 i40e_fdir_teardown(pf);
10949 /* If there is a switch structure or any orphans, remove them.
10950 * This will leave only the PF's VSI remaining.
10952 for (i = 0; i < I40E_MAX_VEB; i++) {
10956 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10957 pf->veb[i]->uplink_seid == 0)
10958 i40e_switch_branch_release(pf->veb[i]);
10961 /* Now we can shutdown the PF's VSI, just before we kill
10964 if (pf->vsi[pf->lan_vsi])
10965 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10967 /* shutdown and destroy the HMC */
10968 if (pf->hw.hmc.hmc_obj) {
10969 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10971 dev_warn(&pdev->dev,
10972 "Failed to destroy the HMC resources: %d\n",
10976 /* shutdown the adminq */
10977 ret_code = i40e_shutdown_adminq(&pf->hw);
10979 dev_warn(&pdev->dev,
10980 "Failed to destroy the Admin Queue resources: %d\n",
10983 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10984 i40e_clear_interrupt_scheme(pf);
10985 for (i = 0; i < pf->num_alloc_vsi; i++) {
10987 i40e_vsi_clear_rings(pf->vsi[i]);
10988 i40e_vsi_clear(pf->vsi[i]);
10993 for (i = 0; i < I40E_MAX_VEB; i++) {
10998 kfree(pf->qp_pile);
11001 iounmap(pf->hw.hw_addr);
11003 pci_release_selected_regions(pdev,
11004 pci_select_bars(pdev, IORESOURCE_MEM));
11006 pci_disable_pcie_error_reporting(pdev);
11007 pci_disable_device(pdev);
11011 * i40e_pci_error_detected - warning that something funky happened in PCI land
11012 * @pdev: PCI device information struct
11014 * Called to warn that something happened and the error handling steps
11015 * are in progress. Allows the driver to quiesce things, be ready for
11018 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11019 enum pci_channel_state error)
11021 struct i40e_pf *pf = pci_get_drvdata(pdev);
11023 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11025 /* shutdown all operations */
11026 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11028 i40e_prep_for_reset(pf);
11032 /* Request a slot reset */
11033 return PCI_ERS_RESULT_NEED_RESET;
11037 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11038 * @pdev: PCI device information struct
11040 * Called to find if the driver can work with the device now that
11041 * the pci slot has been reset. If a basic connection seems good
11042 * (registers are readable and have sane content) then return a
11043 * happy little PCI_ERS_RESULT_xxx.
11045 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11047 struct i40e_pf *pf = pci_get_drvdata(pdev);
11048 pci_ers_result_t result;
11052 dev_dbg(&pdev->dev, "%s\n", __func__);
11053 if (pci_enable_device_mem(pdev)) {
11054 dev_info(&pdev->dev,
11055 "Cannot re-enable PCI device after reset.\n");
11056 result = PCI_ERS_RESULT_DISCONNECT;
11058 pci_set_master(pdev);
11059 pci_restore_state(pdev);
11060 pci_save_state(pdev);
11061 pci_wake_from_d3(pdev, false);
11063 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11065 result = PCI_ERS_RESULT_RECOVERED;
11067 result = PCI_ERS_RESULT_DISCONNECT;
11070 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11072 dev_info(&pdev->dev,
11073 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11075 /* non-fatal, continue */
11082 * i40e_pci_error_resume - restart operations after PCI error recovery
11083 * @pdev: PCI device information struct
11085 * Called to allow the driver to bring things back up after PCI error
11086 * and/or reset recovery has finished.
11088 static void i40e_pci_error_resume(struct pci_dev *pdev)
11090 struct i40e_pf *pf = pci_get_drvdata(pdev);
11092 dev_dbg(&pdev->dev, "%s\n", __func__);
11093 if (test_bit(__I40E_SUSPENDED, &pf->state))
11097 i40e_handle_reset_warning(pf);
11102 * i40e_shutdown - PCI callback for shutting down
11103 * @pdev: PCI device information struct
11105 static void i40e_shutdown(struct pci_dev *pdev)
11107 struct i40e_pf *pf = pci_get_drvdata(pdev);
11108 struct i40e_hw *hw = &pf->hw;
11110 set_bit(__I40E_SUSPENDED, &pf->state);
11111 set_bit(__I40E_DOWN, &pf->state);
11113 i40e_prep_for_reset(pf);
11116 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11117 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11119 del_timer_sync(&pf->service_timer);
11120 cancel_work_sync(&pf->service_task);
11121 i40e_fdir_teardown(pf);
11124 i40e_prep_for_reset(pf);
11127 wr32(hw, I40E_PFPM_APM,
11128 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11129 wr32(hw, I40E_PFPM_WUFC,
11130 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11132 i40e_clear_interrupt_scheme(pf);
11134 if (system_state == SYSTEM_POWER_OFF) {
11135 pci_wake_from_d3(pdev, pf->wol_en);
11136 pci_set_power_state(pdev, PCI_D3hot);
11142 * i40e_suspend - PCI callback for moving to D3
11143 * @pdev: PCI device information struct
11145 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11147 struct i40e_pf *pf = pci_get_drvdata(pdev);
11148 struct i40e_hw *hw = &pf->hw;
11150 set_bit(__I40E_SUSPENDED, &pf->state);
11151 set_bit(__I40E_DOWN, &pf->state);
11154 i40e_prep_for_reset(pf);
11157 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11158 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11160 pci_wake_from_d3(pdev, pf->wol_en);
11161 pci_set_power_state(pdev, PCI_D3hot);
11167 * i40e_resume - PCI callback for waking up from D3
11168 * @pdev: PCI device information struct
11170 static int i40e_resume(struct pci_dev *pdev)
11172 struct i40e_pf *pf = pci_get_drvdata(pdev);
11175 pci_set_power_state(pdev, PCI_D0);
11176 pci_restore_state(pdev);
11177 /* pci_restore_state() clears dev->state_saves, so
11178 * call pci_save_state() again to restore it.
11180 pci_save_state(pdev);
11182 err = pci_enable_device_mem(pdev);
11184 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11187 pci_set_master(pdev);
11189 /* no wakeup events while running */
11190 pci_wake_from_d3(pdev, false);
11192 /* handling the reset will rebuild the device state */
11193 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11194 clear_bit(__I40E_DOWN, &pf->state);
11196 i40e_reset_and_rebuild(pf, false);
11204 static const struct pci_error_handlers i40e_err_handler = {
11205 .error_detected = i40e_pci_error_detected,
11206 .slot_reset = i40e_pci_error_slot_reset,
11207 .resume = i40e_pci_error_resume,
11210 static struct pci_driver i40e_driver = {
11211 .name = i40e_driver_name,
11212 .id_table = i40e_pci_tbl,
11213 .probe = i40e_probe,
11214 .remove = i40e_remove,
11216 .suspend = i40e_suspend,
11217 .resume = i40e_resume,
11219 .shutdown = i40e_shutdown,
11220 .err_handler = &i40e_err_handler,
11221 .sriov_configure = i40e_pci_sriov_configure,
11225 * i40e_init_module - Driver registration routine
11227 * i40e_init_module is the first routine called when the driver is
11228 * loaded. All it does is register with the PCI subsystem.
11230 static int __init i40e_init_module(void)
11232 pr_info("%s: %s - version %s\n", i40e_driver_name,
11233 i40e_driver_string, i40e_driver_version_str);
11234 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11237 return pci_register_driver(&i40e_driver);
11239 module_init(i40e_init_module);
11242 * i40e_exit_module - Driver exit cleanup routine
11244 * i40e_exit_module is called just before the driver is removed
11247 static void __exit i40e_exit_module(void)
11249 pci_unregister_driver(&i40e_driver);
11252 module_exit(i40e_exit_module);