1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 8
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
59 u16 rss_table_size, u16 rss_size);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 /* required last entry */
90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
92 #define I40E_MAX_VF_COUNT 128
93 static int debug = -1;
94 module_param(debug, int, 0);
95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
99 MODULE_LICENSE("GPL");
100 MODULE_VERSION(DRV_VERSION);
103 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
104 * @hw: pointer to the HW structure
105 * @mem: ptr to mem struct to fill out
106 * @size: size of memory requested
107 * @alignment: what to align the allocation to
109 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
110 u64 size, u32 alignment)
112 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
114 mem->size = ALIGN(size, alignment);
115 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
116 &mem->pa, GFP_KERNEL);
124 * i40e_free_dma_mem_d - OS specific memory free for shared code
125 * @hw: pointer to the HW structure
126 * @mem: ptr to mem struct to free
128 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
130 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
132 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
141 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
142 * @hw: pointer to the HW structure
143 * @mem: ptr to mem struct to fill out
144 * @size: size of memory requested
146 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
150 mem->va = kzalloc(size, GFP_KERNEL);
159 * i40e_free_virt_mem_d - OS specific memory free for shared code
160 * @hw: pointer to the HW structure
161 * @mem: ptr to mem struct to free
163 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
165 /* it's ok to kfree a NULL pointer */
174 * i40e_get_lump - find a lump of free generic resource
175 * @pf: board private structure
176 * @pile: the pile of resource to search
177 * @needed: the number of items needed
178 * @id: an owner id to stick on the items assigned
180 * Returns the base item index of the lump, or negative for error
182 * The search_hint trick and lack of advanced fit-finding only work
183 * because we're highly likely to have all the same size lump requests.
184 * Linear search time and any fragmentation should be minimal.
186 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
192 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
193 dev_info(&pf->pdev->dev,
194 "param err: pile=%p needed=%d id=0x%04x\n",
199 /* start the linear search with an imperfect hint */
200 i = pile->search_hint;
201 while (i < pile->num_entries) {
202 /* skip already allocated entries */
203 if (pile->list[i] & I40E_PILE_VALID_BIT) {
208 /* do we have enough in this lump? */
209 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
210 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
215 /* there was enough, so assign it to the requestor */
216 for (j = 0; j < needed; j++)
217 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
219 pile->search_hint = i + j;
223 /* not enough, so skip over it and continue looking */
231 * i40e_put_lump - return a lump of generic resource
232 * @pile: the pile of resource to search
233 * @index: the base item index
234 * @id: the owner id of the items assigned
236 * Returns the count of items in the lump
238 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
240 int valid_id = (id | I40E_PILE_VALID_BIT);
244 if (!pile || index >= pile->num_entries)
248 i < pile->num_entries && pile->list[i] == valid_id;
254 if (count && index < pile->search_hint)
255 pile->search_hint = index;
261 * i40e_find_vsi_from_id - searches for the vsi with the given id
262 * @pf - the pf structure to search for the vsi
263 * @id - id of the vsi it is searching for
265 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
269 for (i = 0; i < pf->num_alloc_vsi; i++)
270 if (pf->vsi[i] && (pf->vsi[i]->id == id))
277 * i40e_service_event_schedule - Schedule the service task to wake up
278 * @pf: board private structure
280 * If not already scheduled, this puts the task into the work queue
282 static void i40e_service_event_schedule(struct i40e_pf *pf)
284 if (!test_bit(__I40E_DOWN, &pf->state) &&
285 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
286 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
287 schedule_work(&pf->service_task);
291 * i40e_tx_timeout - Respond to a Tx Hang
292 * @netdev: network interface device structure
294 * If any port has noticed a Tx timeout, it is likely that the whole
295 * device is munged, not just the one netdev port, so go for the full
299 void i40e_tx_timeout(struct net_device *netdev)
301 static void i40e_tx_timeout(struct net_device *netdev)
304 struct i40e_netdev_priv *np = netdev_priv(netdev);
305 struct i40e_vsi *vsi = np->vsi;
306 struct i40e_pf *pf = vsi->back;
307 struct i40e_ring *tx_ring = NULL;
308 unsigned int i, hung_queue = 0;
311 pf->tx_timeout_count++;
313 /* find the stopped queue the same way the stack does */
314 for (i = 0; i < netdev->num_tx_queues; i++) {
315 struct netdev_queue *q;
316 unsigned long trans_start;
318 q = netdev_get_tx_queue(netdev, i);
319 trans_start = q->trans_start ? : netdev->trans_start;
320 if (netif_xmit_stopped(q) &&
322 (trans_start + netdev->watchdog_timeo))) {
328 if (i == netdev->num_tx_queues) {
329 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
331 /* now that we have an index, find the tx_ring struct */
332 for (i = 0; i < vsi->num_queue_pairs; i++) {
333 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
335 vsi->tx_rings[i]->queue_index) {
336 tx_ring = vsi->tx_rings[i];
343 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
344 pf->tx_timeout_recovery_level = 1; /* reset after some time */
345 else if (time_before(jiffies,
346 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
347 return; /* don't do any new action before the next timeout */
350 head = i40e_get_head(tx_ring);
351 /* Read interrupt register */
352 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
354 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
355 tx_ring->vsi->base_vector - 1));
357 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
359 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
360 vsi->seid, hung_queue, tx_ring->next_to_clean,
361 head, tx_ring->next_to_use,
362 readl(tx_ring->tail), val);
365 pf->tx_timeout_last_recovery = jiffies;
366 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
367 pf->tx_timeout_recovery_level, hung_queue);
369 switch (pf->tx_timeout_recovery_level) {
371 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
374 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
377 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
380 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
384 i40e_service_event_schedule(pf);
385 pf->tx_timeout_recovery_level++;
389 * i40e_release_rx_desc - Store the new tail and head values
390 * @rx_ring: ring to bump
391 * @val: new head index
393 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
395 rx_ring->next_to_use = val;
397 /* Force memory writes to complete before letting h/w
398 * know there are new descriptors to fetch. (Only
399 * applicable for weak-ordered memory model archs,
403 writel(val, rx_ring->tail);
407 * i40e_get_vsi_stats_struct - Get System Network Statistics
408 * @vsi: the VSI we care about
410 * Returns the address of the device statistics structure.
411 * The statistics are actually updated from the service task.
413 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
415 return &vsi->net_stats;
419 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
420 * @netdev: network interface device structure
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
426 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
427 struct net_device *netdev,
428 struct rtnl_link_stats64 *stats)
430 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
431 struct net_device *netdev,
432 struct rtnl_link_stats64 *stats)
435 struct i40e_netdev_priv *np = netdev_priv(netdev);
436 struct i40e_ring *tx_ring, *rx_ring;
437 struct i40e_vsi *vsi = np->vsi;
438 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
441 if (test_bit(__I40E_DOWN, &vsi->state))
448 for (i = 0; i < vsi->num_queue_pairs; i++) {
452 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
457 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
458 packets = tx_ring->stats.packets;
459 bytes = tx_ring->stats.bytes;
460 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
462 stats->tx_packets += packets;
463 stats->tx_bytes += bytes;
464 rx_ring = &tx_ring[1];
467 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
468 packets = rx_ring->stats.packets;
469 bytes = rx_ring->stats.bytes;
470 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
472 stats->rx_packets += packets;
473 stats->rx_bytes += bytes;
477 /* following stats updated by i40e_watchdog_subtask() */
478 stats->multicast = vsi_stats->multicast;
479 stats->tx_errors = vsi_stats->tx_errors;
480 stats->tx_dropped = vsi_stats->tx_dropped;
481 stats->rx_errors = vsi_stats->rx_errors;
482 stats->rx_dropped = vsi_stats->rx_dropped;
483 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
484 stats->rx_length_errors = vsi_stats->rx_length_errors;
490 * i40e_vsi_reset_stats - Resets all stats of the given vsi
491 * @vsi: the VSI to have its stats reset
493 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
495 struct rtnl_link_stats64 *ns;
501 ns = i40e_get_vsi_stats_struct(vsi);
502 memset(ns, 0, sizeof(*ns));
503 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
504 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
505 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
506 if (vsi->rx_rings && vsi->rx_rings[0]) {
507 for (i = 0; i < vsi->num_queue_pairs; i++) {
508 memset(&vsi->rx_rings[i]->stats, 0,
509 sizeof(vsi->rx_rings[i]->stats));
510 memset(&vsi->rx_rings[i]->rx_stats, 0,
511 sizeof(vsi->rx_rings[i]->rx_stats));
512 memset(&vsi->tx_rings[i]->stats, 0,
513 sizeof(vsi->tx_rings[i]->stats));
514 memset(&vsi->tx_rings[i]->tx_stats, 0,
515 sizeof(vsi->tx_rings[i]->tx_stats));
518 vsi->stat_offsets_loaded = false;
522 * i40e_pf_reset_stats - Reset all of the stats for the given PF
523 * @pf: the PF to be reset
525 void i40e_pf_reset_stats(struct i40e_pf *pf)
529 memset(&pf->stats, 0, sizeof(pf->stats));
530 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
531 pf->stat_offsets_loaded = false;
533 for (i = 0; i < I40E_MAX_VEB; i++) {
535 memset(&pf->veb[i]->stats, 0,
536 sizeof(pf->veb[i]->stats));
537 memset(&pf->veb[i]->stats_offsets, 0,
538 sizeof(pf->veb[i]->stats_offsets));
539 pf->veb[i]->stat_offsets_loaded = false;
545 * i40e_stat_update48 - read and update a 48 bit stat from the chip
546 * @hw: ptr to the hardware info
547 * @hireg: the high 32 bit reg to read
548 * @loreg: the low 32 bit reg to read
549 * @offset_loaded: has the initial offset been loaded yet
550 * @offset: ptr to current offset value
551 * @stat: ptr to the stat
553 * Since the device stats are not reset at PFReset, they likely will not
554 * be zeroed when the driver starts. We'll save the first values read
555 * and use them as offsets to be subtracted from the raw values in order
556 * to report stats that count from zero. In the process, we also manage
557 * the potential roll-over.
559 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
560 bool offset_loaded, u64 *offset, u64 *stat)
564 if (hw->device_id == I40E_DEV_ID_QEMU) {
565 new_data = rd32(hw, loreg);
566 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
568 new_data = rd64(hw, loreg);
572 if (likely(new_data >= *offset))
573 *stat = new_data - *offset;
575 *stat = (new_data + BIT_ULL(48)) - *offset;
576 *stat &= 0xFFFFFFFFFFFFULL;
580 * i40e_stat_update32 - read and update a 32 bit stat from the chip
581 * @hw: ptr to the hardware info
582 * @reg: the hw reg to read
583 * @offset_loaded: has the initial offset been loaded yet
584 * @offset: ptr to current offset value
585 * @stat: ptr to the stat
587 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
588 bool offset_loaded, u64 *offset, u64 *stat)
592 new_data = rd32(hw, reg);
595 if (likely(new_data >= *offset))
596 *stat = (u32)(new_data - *offset);
598 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
602 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
603 * @vsi: the VSI to be updated
605 void i40e_update_eth_stats(struct i40e_vsi *vsi)
607 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
608 struct i40e_pf *pf = vsi->back;
609 struct i40e_hw *hw = &pf->hw;
610 struct i40e_eth_stats *oes;
611 struct i40e_eth_stats *es; /* device's eth stats */
613 es = &vsi->eth_stats;
614 oes = &vsi->eth_stats_offsets;
616 /* Gather up the stats that the hw collects */
617 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->tx_errors, &es->tx_errors);
620 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_discards, &es->rx_discards);
623 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
626 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->tx_errors, &es->tx_errors);
630 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
631 I40E_GLV_GORCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_bytes, &es->rx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
635 I40E_GLV_UPRCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_unicast, &es->rx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
639 I40E_GLV_MPRCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->rx_multicast, &es->rx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
643 I40E_GLV_BPRCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->rx_broadcast, &es->rx_broadcast);
647 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
648 I40E_GLV_GOTCL(stat_idx),
649 vsi->stat_offsets_loaded,
650 &oes->tx_bytes, &es->tx_bytes);
651 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
652 I40E_GLV_UPTCL(stat_idx),
653 vsi->stat_offsets_loaded,
654 &oes->tx_unicast, &es->tx_unicast);
655 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
656 I40E_GLV_MPTCL(stat_idx),
657 vsi->stat_offsets_loaded,
658 &oes->tx_multicast, &es->tx_multicast);
659 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
660 I40E_GLV_BPTCL(stat_idx),
661 vsi->stat_offsets_loaded,
662 &oes->tx_broadcast, &es->tx_broadcast);
663 vsi->stat_offsets_loaded = true;
667 * i40e_update_veb_stats - Update Switch component statistics
668 * @veb: the VEB being updated
670 static void i40e_update_veb_stats(struct i40e_veb *veb)
672 struct i40e_pf *pf = veb->pf;
673 struct i40e_hw *hw = &pf->hw;
674 struct i40e_eth_stats *oes;
675 struct i40e_eth_stats *es; /* device's eth stats */
676 struct i40e_veb_tc_stats *veb_oes;
677 struct i40e_veb_tc_stats *veb_es;
680 idx = veb->stats_idx;
682 oes = &veb->stats_offsets;
683 veb_es = &veb->tc_stats;
684 veb_oes = &veb->tc_stats_offsets;
686 /* Gather up the stats that the hw collects */
687 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
688 veb->stat_offsets_loaded,
689 &oes->tx_discards, &es->tx_discards);
690 if (hw->revision_id > 0)
691 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_unknown_protocol,
694 &es->rx_unknown_protocol);
695 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_bytes, &es->rx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_unicast, &es->rx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_multicast, &es->rx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->rx_broadcast, &es->rx_broadcast);
708 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_bytes, &es->tx_bytes);
711 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_unicast, &es->tx_unicast);
714 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_multicast, &es->tx_multicast);
717 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
718 veb->stat_offsets_loaded,
719 &oes->tx_broadcast, &es->tx_broadcast);
720 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
721 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
722 I40E_GLVEBTC_RPCL(i, idx),
723 veb->stat_offsets_loaded,
724 &veb_oes->tc_rx_packets[i],
725 &veb_es->tc_rx_packets[i]);
726 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
727 I40E_GLVEBTC_RBCL(i, idx),
728 veb->stat_offsets_loaded,
729 &veb_oes->tc_rx_bytes[i],
730 &veb_es->tc_rx_bytes[i]);
731 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
732 I40E_GLVEBTC_TPCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_tx_packets[i],
735 &veb_es->tc_tx_packets[i]);
736 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
737 I40E_GLVEBTC_TBCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_tx_bytes[i],
740 &veb_es->tc_tx_bytes[i]);
742 veb->stat_offsets_loaded = true;
747 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
748 * @vsi: the VSI that is capable of doing FCoE
750 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
752 struct i40e_pf *pf = vsi->back;
753 struct i40e_hw *hw = &pf->hw;
754 struct i40e_fcoe_stats *ofs;
755 struct i40e_fcoe_stats *fs; /* device's eth stats */
758 if (vsi->type != I40E_VSI_FCOE)
761 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
762 fs = &vsi->fcoe_stats;
763 ofs = &vsi->fcoe_stats_offsets;
765 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
768 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
771 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
774 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
777 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
780 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
783 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->fcoe_last_error, &fs->fcoe_last_error);
786 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
790 vsi->fcoe_stat_offsets_loaded = true;
795 * i40e_update_vsi_stats - Update the vsi statistics counters.
796 * @vsi: the VSI to be updated
798 * There are a few instances where we store the same stat in a
799 * couple of different structs. This is partly because we have
800 * the netdev stats that need to be filled out, which is slightly
801 * different from the "eth_stats" defined by the chip and used in
802 * VF communications. We sort it out here.
804 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
806 struct i40e_pf *pf = vsi->back;
807 struct rtnl_link_stats64 *ons;
808 struct rtnl_link_stats64 *ns; /* netdev stats */
809 struct i40e_eth_stats *oes;
810 struct i40e_eth_stats *es; /* device's eth stats */
811 u32 tx_restart, tx_busy;
822 if (test_bit(__I40E_DOWN, &vsi->state) ||
823 test_bit(__I40E_CONFIG_BUSY, &pf->state))
826 ns = i40e_get_vsi_stats_struct(vsi);
827 ons = &vsi->net_stats_offsets;
828 es = &vsi->eth_stats;
829 oes = &vsi->eth_stats_offsets;
831 /* Gather up the netdev and vsi stats that the driver collects
832 * on the fly during packet processing
836 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
840 for (q = 0; q < vsi->num_queue_pairs; q++) {
842 p = ACCESS_ONCE(vsi->tx_rings[q]);
845 start = u64_stats_fetch_begin_irq(&p->syncp);
846 packets = p->stats.packets;
847 bytes = p->stats.bytes;
848 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
851 tx_restart += p->tx_stats.restart_queue;
852 tx_busy += p->tx_stats.tx_busy;
853 tx_linearize += p->tx_stats.tx_linearize;
854 tx_force_wb += p->tx_stats.tx_force_wb;
856 /* Rx queue is part of the same block as Tx queue */
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->tx_linearize = tx_linearize;
872 vsi->tx_force_wb = tx_force_wb;
873 vsi->rx_page_failed = rx_page;
874 vsi->rx_buf_failed = rx_buf;
876 ns->rx_packets = rx_p;
878 ns->tx_packets = tx_p;
881 /* update netdev stats from eth stats */
882 i40e_update_eth_stats(vsi);
883 ons->tx_errors = oes->tx_errors;
884 ns->tx_errors = es->tx_errors;
885 ons->multicast = oes->rx_multicast;
886 ns->multicast = es->rx_multicast;
887 ons->rx_dropped = oes->rx_discards;
888 ns->rx_dropped = es->rx_discards;
889 ons->tx_dropped = oes->tx_discards;
890 ns->tx_dropped = es->tx_discards;
892 /* pull in a couple PF stats if this is the main vsi */
893 if (vsi == pf->vsi[pf->lan_vsi]) {
894 ns->rx_crc_errors = pf->stats.crc_errors;
895 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
896 ns->rx_length_errors = pf->stats.rx_length_errors;
901 * i40e_update_pf_stats - Update the PF statistics counters.
902 * @pf: the PF to be updated
904 static void i40e_update_pf_stats(struct i40e_pf *pf)
906 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
907 struct i40e_hw_port_stats *nsd = &pf->stats;
908 struct i40e_hw *hw = &pf->hw;
912 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
913 I40E_GLPRT_GORCL(hw->port),
914 pf->stat_offsets_loaded,
915 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
916 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
917 I40E_GLPRT_GOTCL(hw->port),
918 pf->stat_offsets_loaded,
919 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
920 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->eth.rx_discards,
923 &nsd->eth.rx_discards);
924 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
925 I40E_GLPRT_UPRCL(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->eth.rx_unicast,
928 &nsd->eth.rx_unicast);
929 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
930 I40E_GLPRT_MPRCL(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.rx_multicast,
933 &nsd->eth.rx_multicast);
934 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
935 I40E_GLPRT_BPRCL(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.rx_broadcast,
938 &nsd->eth.rx_broadcast);
939 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
940 I40E_GLPRT_UPTCL(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->eth.tx_unicast,
943 &nsd->eth.tx_unicast);
944 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
945 I40E_GLPRT_MPTCL(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->eth.tx_multicast,
948 &nsd->eth.tx_multicast);
949 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
950 I40E_GLPRT_BPTCL(hw->port),
951 pf->stat_offsets_loaded,
952 &osd->eth.tx_broadcast,
953 &nsd->eth.tx_broadcast);
955 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->tx_dropped_link_down,
958 &nsd->tx_dropped_link_down);
960 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
961 pf->stat_offsets_loaded,
962 &osd->crc_errors, &nsd->crc_errors);
964 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
965 pf->stat_offsets_loaded,
966 &osd->illegal_bytes, &nsd->illegal_bytes);
968 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->mac_local_faults,
971 &nsd->mac_local_faults);
972 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->mac_remote_faults,
975 &nsd->mac_remote_faults);
977 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->rx_length_errors,
980 &nsd->rx_length_errors);
982 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->link_xon_rx, &nsd->link_xon_rx);
985 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->link_xon_tx, &nsd->link_xon_tx);
988 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->link_xoff_rx, &nsd->link_xoff_rx);
991 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->link_xoff_tx, &nsd->link_xoff_tx);
995 for (i = 0; i < 8; i++) {
996 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
997 pf->stat_offsets_loaded,
998 &osd->priority_xoff_rx[i],
999 &nsd->priority_xoff_rx[i]);
1000 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1001 pf->stat_offsets_loaded,
1002 &osd->priority_xon_rx[i],
1003 &nsd->priority_xon_rx[i]);
1004 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1005 pf->stat_offsets_loaded,
1006 &osd->priority_xon_tx[i],
1007 &nsd->priority_xon_tx[i]);
1008 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1009 pf->stat_offsets_loaded,
1010 &osd->priority_xoff_tx[i],
1011 &nsd->priority_xoff_tx[i]);
1012 i40e_stat_update32(hw,
1013 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1014 pf->stat_offsets_loaded,
1015 &osd->priority_xon_2_xoff[i],
1016 &nsd->priority_xon_2_xoff[i]);
1019 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1020 I40E_GLPRT_PRC64L(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_size_64, &nsd->rx_size_64);
1023 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1024 I40E_GLPRT_PRC127L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_size_127, &nsd->rx_size_127);
1027 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1028 I40E_GLPRT_PRC255L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->rx_size_255, &nsd->rx_size_255);
1031 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1032 I40E_GLPRT_PRC511L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_size_511, &nsd->rx_size_511);
1035 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1036 I40E_GLPRT_PRC1023L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_size_1023, &nsd->rx_size_1023);
1039 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1040 I40E_GLPRT_PRC1522L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->rx_size_1522, &nsd->rx_size_1522);
1043 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1044 I40E_GLPRT_PRC9522L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->rx_size_big, &nsd->rx_size_big);
1048 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1049 I40E_GLPRT_PTC64L(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->tx_size_64, &nsd->tx_size_64);
1052 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1053 I40E_GLPRT_PTC127L(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->tx_size_127, &nsd->tx_size_127);
1056 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1057 I40E_GLPRT_PTC255L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->tx_size_255, &nsd->tx_size_255);
1060 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1061 I40E_GLPRT_PTC511L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->tx_size_511, &nsd->tx_size_511);
1064 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1065 I40E_GLPRT_PTC1023L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->tx_size_1023, &nsd->tx_size_1023);
1068 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1069 I40E_GLPRT_PTC1522L(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->tx_size_1522, &nsd->tx_size_1522);
1072 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1073 I40E_GLPRT_PTC9522L(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->tx_size_big, &nsd->tx_size_big);
1077 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_undersize, &nsd->rx_undersize);
1080 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->rx_fragments, &nsd->rx_fragments);
1083 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_oversize, &nsd->rx_oversize);
1086 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_jabber, &nsd->rx_jabber);
1091 i40e_stat_update32(hw,
1092 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1093 pf->stat_offsets_loaded,
1094 &osd->fd_atr_match, &nsd->fd_atr_match);
1095 i40e_stat_update32(hw,
1096 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1097 pf->stat_offsets_loaded,
1098 &osd->fd_sb_match, &nsd->fd_sb_match);
1099 i40e_stat_update32(hw,
1100 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1101 pf->stat_offsets_loaded,
1102 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1104 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1105 nsd->tx_lpi_status =
1106 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1107 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1108 nsd->rx_lpi_status =
1109 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1110 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1111 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1112 pf->stat_offsets_loaded,
1113 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1114 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1115 pf->stat_offsets_loaded,
1116 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1118 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1119 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1120 nsd->fd_sb_status = true;
1122 nsd->fd_sb_status = false;
1124 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1125 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1126 nsd->fd_atr_status = true;
1128 nsd->fd_atr_status = false;
1130 pf->stat_offsets_loaded = true;
1134 * i40e_update_stats - Update the various statistics counters.
1135 * @vsi: the VSI to be updated
1137 * Update the various stats for this VSI and its related entities.
1139 void i40e_update_stats(struct i40e_vsi *vsi)
1141 struct i40e_pf *pf = vsi->back;
1143 if (vsi == pf->vsi[pf->lan_vsi])
1144 i40e_update_pf_stats(pf);
1146 i40e_update_vsi_stats(vsi);
1148 i40e_update_fcoe_stats(vsi);
1153 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1154 * @vsi: the VSI to be searched
1155 * @macaddr: the MAC address
1157 * @is_vf: make sure its a VF filter, else doesn't matter
1158 * @is_netdev: make sure its a netdev filter, else doesn't matter
1160 * Returns ptr to the filter object or NULL
1162 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1163 u8 *macaddr, s16 vlan,
1164 bool is_vf, bool is_netdev)
1166 struct i40e_mac_filter *f;
1168 if (!vsi || !macaddr)
1171 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1172 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1173 (vlan == f->vlan) &&
1174 (!is_vf || f->is_vf) &&
1175 (!is_netdev || f->is_netdev))
1182 * i40e_find_mac - Find a mac addr in the macvlan filters list
1183 * @vsi: the VSI to be searched
1184 * @macaddr: the MAC address we are searching for
1185 * @is_vf: make sure its a VF filter, else doesn't matter
1186 * @is_netdev: make sure its a netdev filter, else doesn't matter
1188 * Returns the first filter with the provided MAC address or NULL if
1189 * MAC address was not found
1191 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1192 bool is_vf, bool is_netdev)
1194 struct i40e_mac_filter *f;
1196 if (!vsi || !macaddr)
1199 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1200 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1201 (!is_vf || f->is_vf) &&
1202 (!is_netdev || f->is_netdev))
1209 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1210 * @vsi: the VSI to be searched
1212 * Returns true if VSI is in vlan mode or false otherwise
1214 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1216 struct i40e_mac_filter *f;
1218 /* Only -1 for all the filters denotes not in vlan mode
1219 * so we have to go through all the list in order to make sure
1221 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1222 if (f->vlan >= 0 || vsi->info.pvid)
1230 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1231 * @vsi: the VSI to be searched
1232 * @macaddr: the mac address to be filtered
1233 * @is_vf: true if it is a VF
1234 * @is_netdev: true if it is a netdev
1236 * Goes through all the macvlan filters and adds a
1237 * macvlan filter for each unique vlan that already exists
1239 * Returns first filter found on success, else NULL
1241 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1242 bool is_vf, bool is_netdev)
1244 struct i40e_mac_filter *f;
1246 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1248 f->vlan = le16_to_cpu(vsi->info.pvid);
1249 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1250 is_vf, is_netdev)) {
1251 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1257 return list_first_entry_or_null(&vsi->mac_filter_list,
1258 struct i40e_mac_filter, list);
1262 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1263 * @vsi: the VSI to be searched
1264 * @macaddr: the mac address to be removed
1265 * @is_vf: true if it is a VF
1266 * @is_netdev: true if it is a netdev
1268 * Removes a given MAC address from a VSI, regardless of VLAN
1270 * Returns 0 for success, or error
1272 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1273 bool is_vf, bool is_netdev)
1275 struct i40e_mac_filter *f = NULL;
1278 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1279 "Missing mac_filter_list_lock\n");
1280 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1281 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1282 (is_vf == f->is_vf) &&
1283 (is_netdev == f->is_netdev)) {
1290 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1291 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1298 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1299 * @vsi: the PF Main VSI - inappropriate for any other VSI
1300 * @macaddr: the MAC address
1302 * Some older firmware configurations set up a default promiscuous VLAN
1303 * filter that needs to be removed.
1305 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1307 struct i40e_aqc_remove_macvlan_element_data element;
1308 struct i40e_pf *pf = vsi->back;
1311 /* Only appropriate for the PF main VSI */
1312 if (vsi->type != I40E_VSI_MAIN)
1315 memset(&element, 0, sizeof(element));
1316 ether_addr_copy(element.mac_addr, macaddr);
1317 element.vlan_tag = 0;
1318 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1319 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1320 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1328 * i40e_add_filter - Add a mac/vlan filter to the VSI
1329 * @vsi: the VSI to be searched
1330 * @macaddr: the MAC address
1332 * @is_vf: make sure its a VF filter, else doesn't matter
1333 * @is_netdev: make sure its a netdev filter, else doesn't matter
1335 * Returns ptr to the filter object or NULL when no memory available.
1337 * NOTE: This function is expected to be called with mac_filter_list_lock
1340 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1341 u8 *macaddr, s16 vlan,
1342 bool is_vf, bool is_netdev)
1344 struct i40e_mac_filter *f;
1346 if (!vsi || !macaddr)
1349 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1351 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1353 goto add_filter_out;
1355 ether_addr_copy(f->macaddr, macaddr);
1359 INIT_LIST_HEAD(&f->list);
1360 list_add(&f->list, &vsi->mac_filter_list);
1363 /* increment counter and add a new flag if needed */
1369 } else if (is_netdev) {
1370 if (!f->is_netdev) {
1371 f->is_netdev = true;
1378 /* changed tells sync_filters_subtask to
1379 * push the filter down to the firmware
1382 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1383 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1391 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1392 * @vsi: the VSI to be searched
1393 * @macaddr: the MAC address
1395 * @is_vf: make sure it's a VF filter, else doesn't matter
1396 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1398 * NOTE: This function is expected to be called with mac_filter_list_lock
1401 void i40e_del_filter(struct i40e_vsi *vsi,
1402 u8 *macaddr, s16 vlan,
1403 bool is_vf, bool is_netdev)
1405 struct i40e_mac_filter *f;
1407 if (!vsi || !macaddr)
1410 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1411 if (!f || f->counter == 0)
1419 } else if (is_netdev) {
1421 f->is_netdev = false;
1425 /* make sure we don't remove a filter in use by VF or netdev */
1428 min_f += (f->is_vf ? 1 : 0);
1429 min_f += (f->is_netdev ? 1 : 0);
1431 if (f->counter > min_f)
1435 /* counter == 0 tells sync_filters_subtask to
1436 * remove the filter from the firmware's list
1438 if (f->counter == 0) {
1440 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1441 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1446 * i40e_set_mac - NDO callback to set mac address
1447 * @netdev: network interface device structure
1448 * @p: pointer to an address structure
1450 * Returns 0 on success, negative on failure
1453 int i40e_set_mac(struct net_device *netdev, void *p)
1455 static int i40e_set_mac(struct net_device *netdev, void *p)
1458 struct i40e_netdev_priv *np = netdev_priv(netdev);
1459 struct i40e_vsi *vsi = np->vsi;
1460 struct i40e_pf *pf = vsi->back;
1461 struct i40e_hw *hw = &pf->hw;
1462 struct sockaddr *addr = p;
1463 struct i40e_mac_filter *f;
1465 if (!is_valid_ether_addr(addr->sa_data))
1466 return -EADDRNOTAVAIL;
1468 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1469 netdev_info(netdev, "already using mac address %pM\n",
1474 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1475 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1476 return -EADDRNOTAVAIL;
1478 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1479 netdev_info(netdev, "returning to hw mac address %pM\n",
1482 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1484 if (vsi->type == I40E_VSI_MAIN) {
1487 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1488 I40E_AQC_WRITE_TYPE_LAA_WOL,
1489 addr->sa_data, NULL);
1492 "Addr change for Main VSI failed: %d\n",
1494 return -EADDRNOTAVAIL;
1498 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1499 struct i40e_aqc_remove_macvlan_element_data element;
1501 memset(&element, 0, sizeof(element));
1502 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1503 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1504 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1506 spin_lock_bh(&vsi->mac_filter_list_lock);
1507 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1509 spin_unlock_bh(&vsi->mac_filter_list_lock);
1512 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1513 struct i40e_aqc_add_macvlan_element_data element;
1515 memset(&element, 0, sizeof(element));
1516 ether_addr_copy(element.mac_addr, hw->mac.addr);
1517 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1518 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1520 spin_lock_bh(&vsi->mac_filter_list_lock);
1521 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1525 spin_unlock_bh(&vsi->mac_filter_list_lock);
1528 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1530 return i40e_sync_vsi_filters(vsi);
1534 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1535 * @vsi: the VSI being setup
1536 * @ctxt: VSI context structure
1537 * @enabled_tc: Enabled TCs bitmap
1538 * @is_add: True if called before Add VSI
1540 * Setup VSI queue mapping for enabled traffic classes.
1543 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1544 struct i40e_vsi_context *ctxt,
1548 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1549 struct i40e_vsi_context *ctxt,
1554 struct i40e_pf *pf = vsi->back;
1564 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1567 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1568 /* Find numtc from enabled TC bitmap */
1569 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1570 if (enabled_tc & BIT(i)) /* TC is enabled */
1574 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1578 /* At least TC0 is enabled in case of non-DCB case */
1582 vsi->tc_config.numtc = numtc;
1583 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1584 /* Number of queues per enabled TC */
1585 /* In MFP case we can have a much lower count of MSIx
1586 * vectors available and so we need to lower the used
1589 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1590 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1592 qcount = vsi->alloc_queue_pairs;
1593 num_tc_qps = qcount / numtc;
1594 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1596 /* Setup queue offset/count for all TCs for given VSI */
1597 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1598 /* See if the given TC is enabled for the given VSI */
1599 if (vsi->tc_config.enabled_tc & BIT(i)) {
1603 switch (vsi->type) {
1605 qcount = min_t(int, pf->alloc_rss_size,
1610 qcount = num_tc_qps;
1614 case I40E_VSI_SRIOV:
1615 case I40E_VSI_VMDQ2:
1617 qcount = num_tc_qps;
1621 vsi->tc_config.tc_info[i].qoffset = offset;
1622 vsi->tc_config.tc_info[i].qcount = qcount;
1624 /* find the next higher power-of-2 of num queue pairs */
1627 while (num_qps && (BIT_ULL(pow) < qcount)) {
1632 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1634 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1635 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1639 /* TC is not enabled so set the offset to
1640 * default queue and allocate one queue
1643 vsi->tc_config.tc_info[i].qoffset = 0;
1644 vsi->tc_config.tc_info[i].qcount = 1;
1645 vsi->tc_config.tc_info[i].netdev_tc = 0;
1649 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1652 /* Set actual Tx/Rx queue pairs */
1653 vsi->num_queue_pairs = offset;
1654 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1655 if (vsi->req_queue_pairs > 0)
1656 vsi->num_queue_pairs = vsi->req_queue_pairs;
1657 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1658 vsi->num_queue_pairs = pf->num_lan_msix;
1661 /* Scheduler section valid can only be set for ADD VSI */
1663 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1665 ctxt->info.up_enable_bits = enabled_tc;
1667 if (vsi->type == I40E_VSI_SRIOV) {
1668 ctxt->info.mapping_flags |=
1669 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1670 for (i = 0; i < vsi->num_queue_pairs; i++)
1671 ctxt->info.queue_mapping[i] =
1672 cpu_to_le16(vsi->base_queue + i);
1674 ctxt->info.mapping_flags |=
1675 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1676 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1678 ctxt->info.valid_sections |= cpu_to_le16(sections);
1682 * i40e_set_rx_mode - NDO callback to set the netdev filters
1683 * @netdev: network interface device structure
1686 void i40e_set_rx_mode(struct net_device *netdev)
1688 static void i40e_set_rx_mode(struct net_device *netdev)
1691 struct i40e_netdev_priv *np = netdev_priv(netdev);
1692 struct i40e_mac_filter *f, *ftmp;
1693 struct i40e_vsi *vsi = np->vsi;
1694 struct netdev_hw_addr *uca;
1695 struct netdev_hw_addr *mca;
1696 struct netdev_hw_addr *ha;
1698 spin_lock_bh(&vsi->mac_filter_list_lock);
1700 /* add addr if not already in the filter list */
1701 netdev_for_each_uc_addr(uca, netdev) {
1702 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1703 if (i40e_is_vsi_in_vlan(vsi))
1704 i40e_put_mac_in_vlan(vsi, uca->addr,
1707 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1712 netdev_for_each_mc_addr(mca, netdev) {
1713 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1714 if (i40e_is_vsi_in_vlan(vsi))
1715 i40e_put_mac_in_vlan(vsi, mca->addr,
1718 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1723 /* remove filter if not in netdev list */
1724 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1729 netdev_for_each_mc_addr(mca, netdev)
1730 if (ether_addr_equal(mca->addr, f->macaddr))
1731 goto bottom_of_search_loop;
1733 netdev_for_each_uc_addr(uca, netdev)
1734 if (ether_addr_equal(uca->addr, f->macaddr))
1735 goto bottom_of_search_loop;
1737 for_each_dev_addr(netdev, ha)
1738 if (ether_addr_equal(ha->addr, f->macaddr))
1739 goto bottom_of_search_loop;
1741 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1742 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1744 bottom_of_search_loop:
1747 spin_unlock_bh(&vsi->mac_filter_list_lock);
1749 /* check for other flag changes */
1750 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1751 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1752 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1757 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1758 * @src: source MAC filter entry to be clones
1760 * Returns the pointer to newly cloned MAC filter entry or NULL
1763 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1764 struct i40e_mac_filter *src)
1766 struct i40e_mac_filter *f;
1768 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1773 INIT_LIST_HEAD(&f->list);
1779 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1780 * @vsi: pointer to vsi struct
1781 * @from: Pointer to list which contains MAC filter entries - changes to
1782 * those entries needs to be undone.
1784 * MAC filter entries from list were slated to be removed from device.
1786 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1787 struct list_head *from)
1789 struct i40e_mac_filter *f, *ftmp;
1791 list_for_each_entry_safe(f, ftmp, from, list) {
1793 /* Move the element back into MAC filter list*/
1794 list_move_tail(&f->list, &vsi->mac_filter_list);
1799 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1800 * @vsi: pointer to vsi struct
1802 * MAC filter entries from list were slated to be added from device.
1804 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1806 struct i40e_mac_filter *f, *ftmp;
1808 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1809 if (!f->changed && f->counter)
1815 * i40e_cleanup_add_list - Deletes the element from add list and release
1817 * @add_list: Pointer to list which contains MAC filter entries
1819 static void i40e_cleanup_add_list(struct list_head *add_list)
1821 struct i40e_mac_filter *f, *ftmp;
1823 list_for_each_entry_safe(f, ftmp, add_list, list) {
1830 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1831 * @vsi: ptr to the VSI
1833 * Push any outstanding VSI filter changes through the AdminQ.
1835 * Returns 0 or error value
1837 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1839 struct list_head tmp_del_list, tmp_add_list;
1840 struct i40e_mac_filter *f, *ftmp, *fclone;
1841 bool promisc_forced_on = false;
1842 bool add_happened = false;
1843 int filter_list_len = 0;
1844 u32 changed_flags = 0;
1845 i40e_status aq_ret = 0;
1846 bool err_cond = false;
1854 /* empty array typed pointers, kcalloc later */
1855 struct i40e_aqc_add_macvlan_element_data *add_list;
1856 struct i40e_aqc_remove_macvlan_element_data *del_list;
1858 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1859 usleep_range(1000, 2000);
1863 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1864 vsi->current_netdev_flags = vsi->netdev->flags;
1867 INIT_LIST_HEAD(&tmp_del_list);
1868 INIT_LIST_HEAD(&tmp_add_list);
1870 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1871 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1873 spin_lock_bh(&vsi->mac_filter_list_lock);
1874 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1878 if (f->counter != 0)
1882 /* Move the element into temporary del_list */
1883 list_move_tail(&f->list, &tmp_del_list);
1886 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1890 if (f->counter == 0)
1894 /* Clone MAC filter entry and add into temporary list */
1895 fclone = i40e_mac_filter_entry_clone(f);
1900 list_add_tail(&fclone->list, &tmp_add_list);
1903 /* if failed to clone MAC filter entry - undo */
1905 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1906 i40e_undo_add_filter_entries(vsi);
1908 spin_unlock_bh(&vsi->mac_filter_list_lock);
1911 i40e_cleanup_add_list(&tmp_add_list);
1917 /* Now process 'del_list' outside the lock */
1918 if (!list_empty(&tmp_del_list)) {
1921 filter_list_len = pf->hw.aq.asq_buf_size /
1922 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1923 del_list_size = filter_list_len *
1924 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1925 del_list = kzalloc(del_list_size, GFP_KERNEL);
1927 i40e_cleanup_add_list(&tmp_add_list);
1929 /* Undo VSI's MAC filter entry element updates */
1930 spin_lock_bh(&vsi->mac_filter_list_lock);
1931 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1932 i40e_undo_add_filter_entries(vsi);
1933 spin_unlock_bh(&vsi->mac_filter_list_lock);
1938 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1941 /* add to delete list */
1942 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1943 del_list[num_del].vlan_tag =
1944 cpu_to_le16((u16)(f->vlan ==
1945 I40E_VLAN_ANY ? 0 : f->vlan));
1947 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1948 del_list[num_del].flags = cmd_flags;
1951 /* flush a full buffer */
1952 if (num_del == filter_list_len) {
1953 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1958 aq_err = pf->hw.aq.asq_last_status;
1960 memset(del_list, 0, del_list_size);
1962 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1964 dev_err(&pf->pdev->dev,
1965 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1966 i40e_stat_str(&pf->hw, aq_ret),
1967 i40e_aq_str(&pf->hw, aq_err));
1970 /* Release memory for MAC filter entries which were
1971 * synced up with HW.
1978 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1981 aq_err = pf->hw.aq.asq_last_status;
1984 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1985 dev_info(&pf->pdev->dev,
1986 "ignoring delete macvlan error, err %s aq_err %s\n",
1987 i40e_stat_str(&pf->hw, aq_ret),
1988 i40e_aq_str(&pf->hw, aq_err));
1995 if (!list_empty(&tmp_add_list)) {
1998 /* do all the adds now */
1999 filter_list_len = pf->hw.aq.asq_buf_size /
2000 sizeof(struct i40e_aqc_add_macvlan_element_data),
2001 add_list_size = filter_list_len *
2002 sizeof(struct i40e_aqc_add_macvlan_element_data);
2003 add_list = kzalloc(add_list_size, GFP_KERNEL);
2005 /* Purge element from temporary lists */
2006 i40e_cleanup_add_list(&tmp_add_list);
2008 /* Undo add filter entries from VSI MAC filter list */
2009 spin_lock_bh(&vsi->mac_filter_list_lock);
2010 i40e_undo_add_filter_entries(vsi);
2011 spin_unlock_bh(&vsi->mac_filter_list_lock);
2016 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2018 add_happened = true;
2021 /* add to add array */
2022 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2023 add_list[num_add].vlan_tag =
2025 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2026 add_list[num_add].queue_number = 0;
2028 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2029 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2032 /* flush a full buffer */
2033 if (num_add == filter_list_len) {
2034 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2037 aq_err = pf->hw.aq.asq_last_status;
2042 memset(add_list, 0, add_list_size);
2044 /* Entries from tmp_add_list were cloned from MAC
2045 * filter list, hence clean those cloned entries
2052 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2053 add_list, num_add, NULL);
2054 aq_err = pf->hw.aq.asq_last_status;
2060 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2061 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2062 dev_info(&pf->pdev->dev,
2063 "add filter failed, err %s aq_err %s\n",
2064 i40e_stat_str(&pf->hw, aq_ret),
2065 i40e_aq_str(&pf->hw, aq_err));
2066 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2067 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2069 promisc_forced_on = true;
2070 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2072 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2077 /* check for changes in promiscuous modes */
2078 if (changed_flags & IFF_ALLMULTI) {
2079 bool cur_multipromisc;
2081 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2082 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2087 retval = i40e_aq_rc_to_posix(aq_ret,
2088 pf->hw.aq.asq_last_status);
2089 dev_info(&pf->pdev->dev,
2090 "set multi promisc failed, err %s aq_err %s\n",
2091 i40e_stat_str(&pf->hw, aq_ret),
2092 i40e_aq_str(&pf->hw,
2093 pf->hw.aq.asq_last_status));
2096 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2099 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2100 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2102 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2103 /* set defport ON for Main VSI instead of true promisc
2104 * this way we will get all unicast/multicast and VLAN
2105 * promisc behavior but will not get VF or VMDq traffic
2106 * replicated on the Main VSI.
2108 if (pf->cur_promisc != cur_promisc) {
2109 pf->cur_promisc = cur_promisc;
2110 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2113 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2119 i40e_aq_rc_to_posix(aq_ret,
2120 pf->hw.aq.asq_last_status);
2121 dev_info(&pf->pdev->dev,
2122 "set unicast promisc failed, err %d, aq_err %d\n",
2123 aq_ret, pf->hw.aq.asq_last_status);
2125 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2131 i40e_aq_rc_to_posix(aq_ret,
2132 pf->hw.aq.asq_last_status);
2133 dev_info(&pf->pdev->dev,
2134 "set multicast promisc failed, err %d, aq_err %d\n",
2135 aq_ret, pf->hw.aq.asq_last_status);
2138 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2142 retval = i40e_aq_rc_to_posix(aq_ret,
2143 pf->hw.aq.asq_last_status);
2144 dev_info(&pf->pdev->dev,
2145 "set brdcast promisc failed, err %s, aq_err %s\n",
2146 i40e_stat_str(&pf->hw, aq_ret),
2147 i40e_aq_str(&pf->hw,
2148 pf->hw.aq.asq_last_status));
2152 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2157 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2158 * @pf: board private structure
2160 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2164 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2166 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2168 for (v = 0; v < pf->num_alloc_vsi; v++) {
2170 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2171 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2174 /* come back and try again later */
2175 pf->flags |= I40E_FLAG_FILTER_SYNC;
2183 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2184 * @netdev: network interface device structure
2185 * @new_mtu: new value for maximum frame size
2187 * Returns 0 on success, negative on failure
2189 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2191 struct i40e_netdev_priv *np = netdev_priv(netdev);
2192 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2193 struct i40e_vsi *vsi = np->vsi;
2195 /* MTU < 68 is an error and causes problems on some kernels */
2196 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2199 netdev_info(netdev, "changing MTU from %d to %d\n",
2200 netdev->mtu, new_mtu);
2201 netdev->mtu = new_mtu;
2202 if (netif_running(netdev))
2203 i40e_vsi_reinit_locked(vsi);
2209 * i40e_ioctl - Access the hwtstamp interface
2210 * @netdev: network interface device structure
2211 * @ifr: interface request data
2212 * @cmd: ioctl command
2214 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2216 struct i40e_netdev_priv *np = netdev_priv(netdev);
2217 struct i40e_pf *pf = np->vsi->back;
2221 return i40e_ptp_get_ts_config(pf, ifr);
2223 return i40e_ptp_set_ts_config(pf, ifr);
2230 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2231 * @vsi: the vsi being adjusted
2233 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2235 struct i40e_vsi_context ctxt;
2238 if ((vsi->info.valid_sections &
2239 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2240 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2241 return; /* already enabled */
2243 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2244 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2245 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2247 ctxt.seid = vsi->seid;
2248 ctxt.info = vsi->info;
2249 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2251 dev_info(&vsi->back->pdev->dev,
2252 "update vlan stripping failed, err %s aq_err %s\n",
2253 i40e_stat_str(&vsi->back->hw, ret),
2254 i40e_aq_str(&vsi->back->hw,
2255 vsi->back->hw.aq.asq_last_status));
2260 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2261 * @vsi: the vsi being adjusted
2263 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2265 struct i40e_vsi_context ctxt;
2268 if ((vsi->info.valid_sections &
2269 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2270 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2271 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2272 return; /* already disabled */
2274 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2275 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2276 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2278 ctxt.seid = vsi->seid;
2279 ctxt.info = vsi->info;
2280 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2282 dev_info(&vsi->back->pdev->dev,
2283 "update vlan stripping failed, err %s aq_err %s\n",
2284 i40e_stat_str(&vsi->back->hw, ret),
2285 i40e_aq_str(&vsi->back->hw,
2286 vsi->back->hw.aq.asq_last_status));
2291 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2292 * @netdev: network interface to be adjusted
2293 * @features: netdev features to test if VLAN offload is enabled or not
2295 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2297 struct i40e_netdev_priv *np = netdev_priv(netdev);
2298 struct i40e_vsi *vsi = np->vsi;
2300 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2301 i40e_vlan_stripping_enable(vsi);
2303 i40e_vlan_stripping_disable(vsi);
2307 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2308 * @vsi: the vsi being configured
2309 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2311 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2313 struct i40e_mac_filter *f, *add_f;
2314 bool is_netdev, is_vf;
2316 is_vf = (vsi->type == I40E_VSI_SRIOV);
2317 is_netdev = !!(vsi->netdev);
2319 /* Locked once because all functions invoked below iterates list*/
2320 spin_lock_bh(&vsi->mac_filter_list_lock);
2323 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2326 dev_info(&vsi->back->pdev->dev,
2327 "Could not add vlan filter %d for %pM\n",
2328 vid, vsi->netdev->dev_addr);
2329 spin_unlock_bh(&vsi->mac_filter_list_lock);
2334 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2335 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2337 dev_info(&vsi->back->pdev->dev,
2338 "Could not add vlan filter %d for %pM\n",
2340 spin_unlock_bh(&vsi->mac_filter_list_lock);
2345 /* Now if we add a vlan tag, make sure to check if it is the first
2346 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2347 * with 0, so we now accept untagged and specified tagged traffic
2348 * (and not any taged and untagged)
2351 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2353 is_vf, is_netdev)) {
2354 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2355 I40E_VLAN_ANY, is_vf, is_netdev);
2356 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2359 dev_info(&vsi->back->pdev->dev,
2360 "Could not add filter 0 for %pM\n",
2361 vsi->netdev->dev_addr);
2362 spin_unlock_bh(&vsi->mac_filter_list_lock);
2368 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2369 if (vid > 0 && !vsi->info.pvid) {
2370 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2371 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2374 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2376 add_f = i40e_add_filter(vsi, f->macaddr,
2377 0, is_vf, is_netdev);
2379 dev_info(&vsi->back->pdev->dev,
2380 "Could not add filter 0 for %pM\n",
2382 spin_unlock_bh(&vsi->mac_filter_list_lock);
2388 spin_unlock_bh(&vsi->mac_filter_list_lock);
2390 /* schedule our worker thread which will take care of
2391 * applying the new filter changes
2393 i40e_service_event_schedule(vsi->back);
2398 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2399 * @vsi: the vsi being configured
2400 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2402 * Return: 0 on success or negative otherwise
2404 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2406 struct net_device *netdev = vsi->netdev;
2407 struct i40e_mac_filter *f, *add_f;
2408 bool is_vf, is_netdev;
2409 int filter_count = 0;
2411 is_vf = (vsi->type == I40E_VSI_SRIOV);
2412 is_netdev = !!(netdev);
2414 /* Locked once because all functions invoked below iterates list */
2415 spin_lock_bh(&vsi->mac_filter_list_lock);
2418 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2420 list_for_each_entry(f, &vsi->mac_filter_list, list)
2421 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2423 /* go through all the filters for this VSI and if there is only
2424 * vid == 0 it means there are no other filters, so vid 0 must
2425 * be replaced with -1. This signifies that we should from now
2426 * on accept any traffic (with any tag present, or untagged)
2428 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2431 ether_addr_equal(netdev->dev_addr, f->macaddr))
2439 if (!filter_count && is_netdev) {
2440 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2441 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2444 dev_info(&vsi->back->pdev->dev,
2445 "Could not add filter %d for %pM\n",
2446 I40E_VLAN_ANY, netdev->dev_addr);
2447 spin_unlock_bh(&vsi->mac_filter_list_lock);
2452 if (!filter_count) {
2453 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2454 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2455 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2458 dev_info(&vsi->back->pdev->dev,
2459 "Could not add filter %d for %pM\n",
2460 I40E_VLAN_ANY, f->macaddr);
2461 spin_unlock_bh(&vsi->mac_filter_list_lock);
2467 spin_unlock_bh(&vsi->mac_filter_list_lock);
2469 /* schedule our worker thread which will take care of
2470 * applying the new filter changes
2472 i40e_service_event_schedule(vsi->back);
2477 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2478 * @netdev: network interface to be adjusted
2479 * @vid: vlan id to be added
2481 * net_device_ops implementation for adding vlan ids
2484 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2485 __always_unused __be16 proto, u16 vid)
2487 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2488 __always_unused __be16 proto, u16 vid)
2491 struct i40e_netdev_priv *np = netdev_priv(netdev);
2492 struct i40e_vsi *vsi = np->vsi;
2498 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2500 /* If the network stack called us with vid = 0 then
2501 * it is asking to receive priority tagged packets with
2502 * vlan id 0. Our HW receives them by default when configured
2503 * to receive untagged packets so there is no need to add an
2504 * extra filter for vlan 0 tagged packets.
2507 ret = i40e_vsi_add_vlan(vsi, vid);
2509 if (!ret && (vid < VLAN_N_VID))
2510 set_bit(vid, vsi->active_vlans);
2516 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2517 * @netdev: network interface to be adjusted
2518 * @vid: vlan id to be removed
2520 * net_device_ops implementation for removing vlan ids
2523 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2524 __always_unused __be16 proto, u16 vid)
2526 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2527 __always_unused __be16 proto, u16 vid)
2530 struct i40e_netdev_priv *np = netdev_priv(netdev);
2531 struct i40e_vsi *vsi = np->vsi;
2533 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2535 /* return code is ignored as there is nothing a user
2536 * can do about failure to remove and a log message was
2537 * already printed from the other function
2539 i40e_vsi_kill_vlan(vsi, vid);
2541 clear_bit(vid, vsi->active_vlans);
2547 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2548 * @vsi: the vsi being brought back up
2550 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2557 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2559 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2560 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2565 * i40e_vsi_add_pvid - Add pvid for the VSI
2566 * @vsi: the vsi being adjusted
2567 * @vid: the vlan id to set as a PVID
2569 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2571 struct i40e_vsi_context ctxt;
2574 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2575 vsi->info.pvid = cpu_to_le16(vid);
2576 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2577 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2578 I40E_AQ_VSI_PVLAN_EMOD_STR;
2580 ctxt.seid = vsi->seid;
2581 ctxt.info = vsi->info;
2582 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2584 dev_info(&vsi->back->pdev->dev,
2585 "add pvid failed, err %s aq_err %s\n",
2586 i40e_stat_str(&vsi->back->hw, ret),
2587 i40e_aq_str(&vsi->back->hw,
2588 vsi->back->hw.aq.asq_last_status));
2596 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2597 * @vsi: the vsi being adjusted
2599 * Just use the vlan_rx_register() service to put it back to normal
2601 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2603 i40e_vlan_stripping_disable(vsi);
2609 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2610 * @vsi: ptr to the VSI
2612 * If this function returns with an error, then it's possible one or
2613 * more of the rings is populated (while the rest are not). It is the
2614 * callers duty to clean those orphaned rings.
2616 * Return 0 on success, negative on failure
2618 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2622 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2623 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2629 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2630 * @vsi: ptr to the VSI
2632 * Free VSI's transmit software resources
2634 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2641 for (i = 0; i < vsi->num_queue_pairs; i++)
2642 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2643 i40e_free_tx_resources(vsi->tx_rings[i]);
2647 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2648 * @vsi: ptr to the VSI
2650 * If this function returns with an error, then it's possible one or
2651 * more of the rings is populated (while the rest are not). It is the
2652 * callers duty to clean those orphaned rings.
2654 * Return 0 on success, negative on failure
2656 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2660 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2661 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2663 i40e_fcoe_setup_ddp_resources(vsi);
2669 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2670 * @vsi: ptr to the VSI
2672 * Free all receive software resources
2674 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2681 for (i = 0; i < vsi->num_queue_pairs; i++)
2682 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2683 i40e_free_rx_resources(vsi->rx_rings[i]);
2685 i40e_fcoe_free_ddp_resources(vsi);
2690 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2691 * @ring: The Tx ring to configure
2693 * This enables/disables XPS for a given Tx descriptor ring
2694 * based on the TCs enabled for the VSI that ring belongs to.
2696 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2698 struct i40e_vsi *vsi = ring->vsi;
2701 if (!ring->q_vector || !ring->netdev)
2704 /* Single TC mode enable XPS */
2705 if (vsi->tc_config.numtc <= 1) {
2706 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2707 netif_set_xps_queue(ring->netdev,
2708 &ring->q_vector->affinity_mask,
2710 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2711 /* Disable XPS to allow selection based on TC */
2712 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2713 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2714 free_cpumask_var(mask);
2717 /* schedule our worker thread which will take care of
2718 * applying the new filter changes
2720 i40e_service_event_schedule(vsi->back);
2724 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2725 * @ring: The Tx ring to configure
2727 * Configure the Tx descriptor ring in the HMC context.
2729 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2731 struct i40e_vsi *vsi = ring->vsi;
2732 u16 pf_q = vsi->base_queue + ring->queue_index;
2733 struct i40e_hw *hw = &vsi->back->hw;
2734 struct i40e_hmc_obj_txq tx_ctx;
2735 i40e_status err = 0;
2738 /* some ATR related tx ring init */
2739 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2740 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2741 ring->atr_count = 0;
2743 ring->atr_sample_rate = 0;
2747 i40e_config_xps_tx_ring(ring);
2749 /* clear the context structure first */
2750 memset(&tx_ctx, 0, sizeof(tx_ctx));
2752 tx_ctx.new_context = 1;
2753 tx_ctx.base = (ring->dma / 128);
2754 tx_ctx.qlen = ring->count;
2755 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2756 I40E_FLAG_FD_ATR_ENABLED));
2758 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2760 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2761 /* FDIR VSI tx ring can still use RS bit and writebacks */
2762 if (vsi->type != I40E_VSI_FDIR)
2763 tx_ctx.head_wb_ena = 1;
2764 tx_ctx.head_wb_addr = ring->dma +
2765 (ring->count * sizeof(struct i40e_tx_desc));
2767 /* As part of VSI creation/update, FW allocates certain
2768 * Tx arbitration queue sets for each TC enabled for
2769 * the VSI. The FW returns the handles to these queue
2770 * sets as part of the response buffer to Add VSI,
2771 * Update VSI, etc. AQ commands. It is expected that
2772 * these queue set handles be associated with the Tx
2773 * queues by the driver as part of the TX queue context
2774 * initialization. This has to be done regardless of
2775 * DCB as by default everything is mapped to TC0.
2777 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2778 tx_ctx.rdylist_act = 0;
2780 /* clear the context in the HMC */
2781 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2783 dev_info(&vsi->back->pdev->dev,
2784 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2785 ring->queue_index, pf_q, err);
2789 /* set the context in the HMC */
2790 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2792 dev_info(&vsi->back->pdev->dev,
2793 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2794 ring->queue_index, pf_q, err);
2798 /* Now associate this queue with this PCI function */
2799 if (vsi->type == I40E_VSI_VMDQ2) {
2800 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2801 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2802 I40E_QTX_CTL_VFVM_INDX_MASK;
2804 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2807 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2808 I40E_QTX_CTL_PF_INDX_MASK);
2809 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2812 /* cache tail off for easier writes later */
2813 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2819 * i40e_configure_rx_ring - Configure a receive ring context
2820 * @ring: The Rx ring to configure
2822 * Configure the Rx descriptor ring in the HMC context.
2824 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2826 struct i40e_vsi *vsi = ring->vsi;
2827 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2828 u16 pf_q = vsi->base_queue + ring->queue_index;
2829 struct i40e_hw *hw = &vsi->back->hw;
2830 struct i40e_hmc_obj_rxq rx_ctx;
2831 i40e_status err = 0;
2835 /* clear the context structure first */
2836 memset(&rx_ctx, 0, sizeof(rx_ctx));
2838 ring->rx_buf_len = vsi->rx_buf_len;
2839 ring->rx_hdr_len = vsi->rx_hdr_len;
2841 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2842 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2844 rx_ctx.base = (ring->dma / 128);
2845 rx_ctx.qlen = ring->count;
2847 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2848 set_ring_16byte_desc_enabled(ring);
2854 rx_ctx.dtype = vsi->dtype;
2856 set_ring_ps_enabled(ring);
2857 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2859 I40E_RX_SPLIT_TCP_UDP |
2862 rx_ctx.hsplit_0 = 0;
2865 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2866 (chain_len * ring->rx_buf_len));
2867 if (hw->revision_id == 0)
2868 rx_ctx.lrxqthresh = 0;
2870 rx_ctx.lrxqthresh = 2;
2871 rx_ctx.crcstrip = 1;
2873 /* this controls whether VLAN is stripped from inner headers */
2876 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2878 /* set the prefena field to 1 because the manual says to */
2881 /* clear the context in the HMC */
2882 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2884 dev_info(&vsi->back->pdev->dev,
2885 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2886 ring->queue_index, pf_q, err);
2890 /* set the context in the HMC */
2891 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2893 dev_info(&vsi->back->pdev->dev,
2894 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2895 ring->queue_index, pf_q, err);
2899 /* cache tail for quicker writes, and clear the reg before use */
2900 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2901 writel(0, ring->tail);
2903 if (ring_is_ps_enabled(ring)) {
2904 i40e_alloc_rx_headers(ring);
2905 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2907 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2914 * i40e_vsi_configure_tx - Configure the VSI for Tx
2915 * @vsi: VSI structure describing this set of rings and resources
2917 * Configure the Tx VSI for operation.
2919 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2924 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2925 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2931 * i40e_vsi_configure_rx - Configure the VSI for Rx
2932 * @vsi: the VSI being configured
2934 * Configure the Rx VSI for operation.
2936 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2941 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2942 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2943 + ETH_FCS_LEN + VLAN_HLEN;
2945 vsi->max_frame = I40E_RXBUFFER_2048;
2947 /* figure out correct receive buffer length */
2948 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2949 I40E_FLAG_RX_PS_ENABLED)) {
2950 case I40E_FLAG_RX_1BUF_ENABLED:
2951 vsi->rx_hdr_len = 0;
2952 vsi->rx_buf_len = vsi->max_frame;
2953 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2955 case I40E_FLAG_RX_PS_ENABLED:
2956 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2957 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2958 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2961 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2962 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2963 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2968 /* setup rx buffer for FCoE */
2969 if ((vsi->type == I40E_VSI_FCOE) &&
2970 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2971 vsi->rx_hdr_len = 0;
2972 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2973 vsi->max_frame = I40E_RXBUFFER_3072;
2974 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2977 #endif /* I40E_FCOE */
2978 /* round up for the chip's needs */
2979 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2980 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2981 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2982 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2984 /* set up individual rings */
2985 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2986 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2992 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2993 * @vsi: ptr to the VSI
2995 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2997 struct i40e_ring *tx_ring, *rx_ring;
2998 u16 qoffset, qcount;
3001 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3002 /* Reset the TC information */
3003 for (i = 0; i < vsi->num_queue_pairs; i++) {
3004 rx_ring = vsi->rx_rings[i];
3005 tx_ring = vsi->tx_rings[i];
3006 rx_ring->dcb_tc = 0;
3007 tx_ring->dcb_tc = 0;
3011 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3012 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3015 qoffset = vsi->tc_config.tc_info[n].qoffset;
3016 qcount = vsi->tc_config.tc_info[n].qcount;
3017 for (i = qoffset; i < (qoffset + qcount); i++) {
3018 rx_ring = vsi->rx_rings[i];
3019 tx_ring = vsi->tx_rings[i];
3020 rx_ring->dcb_tc = n;
3021 tx_ring->dcb_tc = n;
3027 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3028 * @vsi: ptr to the VSI
3030 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3033 i40e_set_rx_mode(vsi->netdev);
3037 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3038 * @vsi: Pointer to the targeted VSI
3040 * This function replays the hlist on the hw where all the SB Flow Director
3041 * filters were saved.
3043 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3045 struct i40e_fdir_filter *filter;
3046 struct i40e_pf *pf = vsi->back;
3047 struct hlist_node *node;
3049 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3052 hlist_for_each_entry_safe(filter, node,
3053 &pf->fdir_filter_list, fdir_node) {
3054 i40e_add_del_fdir(vsi, filter, true);
3059 * i40e_vsi_configure - Set up the VSI for action
3060 * @vsi: the VSI being configured
3062 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3066 i40e_set_vsi_rx_mode(vsi);
3067 i40e_restore_vlan(vsi);
3068 i40e_vsi_config_dcb_rings(vsi);
3069 err = i40e_vsi_configure_tx(vsi);
3071 err = i40e_vsi_configure_rx(vsi);
3077 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3078 * @vsi: the VSI being configured
3080 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3082 struct i40e_pf *pf = vsi->back;
3083 struct i40e_hw *hw = &pf->hw;
3088 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3089 * and PFINT_LNKLSTn registers, e.g.:
3090 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3092 qp = vsi->base_queue;
3093 vector = vsi->base_vector;
3094 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3095 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3097 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3098 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3099 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3100 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3102 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3103 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3104 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3106 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3107 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3109 /* Linked list for the queuepairs assigned to this vector */
3110 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3111 for (q = 0; q < q_vector->num_ringpairs; q++) {
3114 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3115 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3116 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3117 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3119 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3121 wr32(hw, I40E_QINT_RQCTL(qp), val);
3123 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3124 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3125 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3126 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3128 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3130 /* Terminate the linked list */
3131 if (q == (q_vector->num_ringpairs - 1))
3132 val |= (I40E_QUEUE_END_OF_LIST
3133 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3135 wr32(hw, I40E_QINT_TQCTL(qp), val);
3144 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3145 * @hw: ptr to the hardware info
3147 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3149 struct i40e_hw *hw = &pf->hw;
3152 /* clear things first */
3153 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3154 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3156 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3157 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3158 I40E_PFINT_ICR0_ENA_GRST_MASK |
3159 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3160 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3161 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3162 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3163 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3165 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3166 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3168 if (pf->flags & I40E_FLAG_PTP)
3169 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3171 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3173 /* SW_ITR_IDX = 0, but don't change INTENA */
3174 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3175 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3177 /* OTHER_ITR_IDX = 0 */
3178 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3182 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3183 * @vsi: the VSI being configured
3185 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3187 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3188 struct i40e_pf *pf = vsi->back;
3189 struct i40e_hw *hw = &pf->hw;
3192 /* set the ITR configuration */
3193 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3194 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3195 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3196 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3197 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3198 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3199 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3201 i40e_enable_misc_int_causes(pf);
3203 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3204 wr32(hw, I40E_PFINT_LNKLST0, 0);
3206 /* Associate the queue pair to the vector and enable the queue int */
3207 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3208 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3209 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3211 wr32(hw, I40E_QINT_RQCTL(0), val);
3213 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3214 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3215 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3217 wr32(hw, I40E_QINT_TQCTL(0), val);
3222 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3223 * @pf: board private structure
3225 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3227 struct i40e_hw *hw = &pf->hw;
3229 wr32(hw, I40E_PFINT_DYN_CTL0,
3230 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3235 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3236 * @pf: board private structure
3238 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3240 struct i40e_hw *hw = &pf->hw;
3243 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3244 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3245 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3247 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3252 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3253 * @vsi: pointer to a vsi
3254 * @vector: disable a particular Hw Interrupt vector
3256 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3258 struct i40e_pf *pf = vsi->back;
3259 struct i40e_hw *hw = &pf->hw;
3262 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3263 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3268 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3269 * @irq: interrupt number
3270 * @data: pointer to a q_vector
3272 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3274 struct i40e_q_vector *q_vector = data;
3276 if (!q_vector->tx.ring && !q_vector->rx.ring)
3279 napi_schedule_irqoff(&q_vector->napi);
3285 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3286 * @vsi: the VSI being configured
3287 * @basename: name for the vector
3289 * Allocates MSI-X vectors and requests interrupts from the kernel.
3291 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3293 int q_vectors = vsi->num_q_vectors;
3294 struct i40e_pf *pf = vsi->back;
3295 int base = vsi->base_vector;
3300 for (vector = 0; vector < q_vectors; vector++) {
3301 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3303 if (q_vector->tx.ring && q_vector->rx.ring) {
3304 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3305 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3307 } else if (q_vector->rx.ring) {
3308 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3309 "%s-%s-%d", basename, "rx", rx_int_idx++);
3310 } else if (q_vector->tx.ring) {
3311 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3312 "%s-%s-%d", basename, "tx", tx_int_idx++);
3314 /* skip this unused q_vector */
3317 err = request_irq(pf->msix_entries[base + vector].vector,
3323 dev_info(&pf->pdev->dev,
3324 "MSIX request_irq failed, error: %d\n", err);
3325 goto free_queue_irqs;
3327 /* assign the mask for this irq */
3328 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3329 &q_vector->affinity_mask);
3332 vsi->irqs_ready = true;
3338 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3340 free_irq(pf->msix_entries[base + vector].vector,
3341 &(vsi->q_vectors[vector]));
3347 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3348 * @vsi: the VSI being un-configured
3350 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3352 struct i40e_pf *pf = vsi->back;
3353 struct i40e_hw *hw = &pf->hw;
3354 int base = vsi->base_vector;
3357 for (i = 0; i < vsi->num_queue_pairs; i++) {
3358 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3359 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3362 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3363 for (i = vsi->base_vector;
3364 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3365 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3368 for (i = 0; i < vsi->num_q_vectors; i++)
3369 synchronize_irq(pf->msix_entries[i + base].vector);
3371 /* Legacy and MSI mode - this stops all interrupt handling */
3372 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3373 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3375 synchronize_irq(pf->pdev->irq);
3380 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3381 * @vsi: the VSI being configured
3383 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3385 struct i40e_pf *pf = vsi->back;
3388 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3389 for (i = 0; i < vsi->num_q_vectors; i++)
3390 i40e_irq_dynamic_enable(vsi, i);
3392 i40e_irq_dynamic_enable_icr0(pf);
3395 i40e_flush(&pf->hw);
3400 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3401 * @pf: board private structure
3403 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3406 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3407 i40e_flush(&pf->hw);
3411 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3412 * @irq: interrupt number
3413 * @data: pointer to a q_vector
3415 * This is the handler used for all MSI/Legacy interrupts, and deals
3416 * with both queue and non-queue interrupts. This is also used in
3417 * MSIX mode to handle the non-queue interrupts.
3419 static irqreturn_t i40e_intr(int irq, void *data)
3421 struct i40e_pf *pf = (struct i40e_pf *)data;
3422 struct i40e_hw *hw = &pf->hw;
3423 irqreturn_t ret = IRQ_NONE;
3424 u32 icr0, icr0_remaining;
3427 icr0 = rd32(hw, I40E_PFINT_ICR0);
3428 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3430 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3431 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3434 /* if interrupt but no bits showing, must be SWINT */
3435 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3436 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3439 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3440 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3441 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3442 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3443 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3446 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3447 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3448 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3449 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3451 /* temporarily disable queue cause for NAPI processing */
3452 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3454 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3455 wr32(hw, I40E_QINT_RQCTL(0), qval);
3457 qval = rd32(hw, I40E_QINT_TQCTL(0));
3458 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3459 wr32(hw, I40E_QINT_TQCTL(0), qval);
3461 if (!test_bit(__I40E_DOWN, &pf->state))
3462 napi_schedule_irqoff(&q_vector->napi);
3465 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3466 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3467 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3470 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3471 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3472 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3475 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3476 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3477 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3480 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3481 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3482 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3483 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3484 val = rd32(hw, I40E_GLGEN_RSTAT);
3485 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3486 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3487 if (val == I40E_RESET_CORER) {
3489 } else if (val == I40E_RESET_GLOBR) {
3491 } else if (val == I40E_RESET_EMPR) {
3493 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3497 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3498 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3499 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3500 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3501 rd32(hw, I40E_PFHMC_ERRORINFO),
3502 rd32(hw, I40E_PFHMC_ERRORDATA));
3505 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3506 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3508 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3509 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3510 i40e_ptp_tx_hwtstamp(pf);
3514 /* If a critical error is pending we have no choice but to reset the
3516 * Report and mask out any remaining unexpected interrupts.
3518 icr0_remaining = icr0 & ena_mask;
3519 if (icr0_remaining) {
3520 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3522 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3523 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3524 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3525 dev_info(&pf->pdev->dev, "device will be reset\n");
3526 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3527 i40e_service_event_schedule(pf);
3529 ena_mask &= ~icr0_remaining;
3534 /* re-enable interrupt causes */
3535 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3536 if (!test_bit(__I40E_DOWN, &pf->state)) {
3537 i40e_service_event_schedule(pf);
3538 i40e_irq_dynamic_enable_icr0(pf);
3545 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3546 * @tx_ring: tx ring to clean
3547 * @budget: how many cleans we're allowed
3549 * Returns true if there's any budget left (e.g. the clean is finished)
3551 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3553 struct i40e_vsi *vsi = tx_ring->vsi;
3554 u16 i = tx_ring->next_to_clean;
3555 struct i40e_tx_buffer *tx_buf;
3556 struct i40e_tx_desc *tx_desc;
3558 tx_buf = &tx_ring->tx_bi[i];
3559 tx_desc = I40E_TX_DESC(tx_ring, i);
3560 i -= tx_ring->count;
3563 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3565 /* if next_to_watch is not set then there is no work pending */
3569 /* prevent any other reads prior to eop_desc */
3570 read_barrier_depends();
3572 /* if the descriptor isn't done, no work yet to do */
3573 if (!(eop_desc->cmd_type_offset_bsz &
3574 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3577 /* clear next_to_watch to prevent false hangs */
3578 tx_buf->next_to_watch = NULL;
3580 tx_desc->buffer_addr = 0;
3581 tx_desc->cmd_type_offset_bsz = 0;
3582 /* move past filter desc */
3587 i -= tx_ring->count;
3588 tx_buf = tx_ring->tx_bi;
3589 tx_desc = I40E_TX_DESC(tx_ring, 0);
3591 /* unmap skb header data */
3592 dma_unmap_single(tx_ring->dev,
3593 dma_unmap_addr(tx_buf, dma),
3594 dma_unmap_len(tx_buf, len),
3596 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3597 kfree(tx_buf->raw_buf);
3599 tx_buf->raw_buf = NULL;
3600 tx_buf->tx_flags = 0;
3601 tx_buf->next_to_watch = NULL;
3602 dma_unmap_len_set(tx_buf, len, 0);
3603 tx_desc->buffer_addr = 0;
3604 tx_desc->cmd_type_offset_bsz = 0;
3606 /* move us past the eop_desc for start of next FD desc */
3611 i -= tx_ring->count;
3612 tx_buf = tx_ring->tx_bi;
3613 tx_desc = I40E_TX_DESC(tx_ring, 0);
3616 /* update budget accounting */
3618 } while (likely(budget));
3620 i += tx_ring->count;
3621 tx_ring->next_to_clean = i;
3623 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3624 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3630 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3631 * @irq: interrupt number
3632 * @data: pointer to a q_vector
3634 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3636 struct i40e_q_vector *q_vector = data;
3637 struct i40e_vsi *vsi;
3639 if (!q_vector->tx.ring)
3642 vsi = q_vector->tx.ring->vsi;
3643 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3649 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3650 * @vsi: the VSI being configured
3651 * @v_idx: vector index
3652 * @qp_idx: queue pair index
3654 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3656 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3657 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3658 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3660 tx_ring->q_vector = q_vector;
3661 tx_ring->next = q_vector->tx.ring;
3662 q_vector->tx.ring = tx_ring;
3663 q_vector->tx.count++;
3665 rx_ring->q_vector = q_vector;
3666 rx_ring->next = q_vector->rx.ring;
3667 q_vector->rx.ring = rx_ring;
3668 q_vector->rx.count++;
3672 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3673 * @vsi: the VSI being configured
3675 * This function maps descriptor rings to the queue-specific vectors
3676 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3677 * one vector per queue pair, but on a constrained vector budget, we
3678 * group the queue pairs as "efficiently" as possible.
3680 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3682 int qp_remaining = vsi->num_queue_pairs;
3683 int q_vectors = vsi->num_q_vectors;
3688 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3689 * group them so there are multiple queues per vector.
3690 * It is also important to go through all the vectors available to be
3691 * sure that if we don't use all the vectors, that the remaining vectors
3692 * are cleared. This is especially important when decreasing the
3693 * number of queues in use.
3695 for (; v_start < q_vectors; v_start++) {
3696 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3698 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3700 q_vector->num_ringpairs = num_ringpairs;
3702 q_vector->rx.count = 0;
3703 q_vector->tx.count = 0;
3704 q_vector->rx.ring = NULL;
3705 q_vector->tx.ring = NULL;
3707 while (num_ringpairs--) {
3708 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3716 * i40e_vsi_request_irq - Request IRQ from the OS
3717 * @vsi: the VSI being configured
3718 * @basename: name for the vector
3720 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3722 struct i40e_pf *pf = vsi->back;
3725 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3726 err = i40e_vsi_request_irq_msix(vsi, basename);
3727 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3728 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3731 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3735 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3740 #ifdef CONFIG_NET_POLL_CONTROLLER
3742 * i40e_netpoll - A Polling 'interrupt'handler
3743 * @netdev: network interface device structure
3745 * This is used by netconsole to send skbs without having to re-enable
3746 * interrupts. It's not called while the normal interrupt routine is executing.
3749 void i40e_netpoll(struct net_device *netdev)
3751 static void i40e_netpoll(struct net_device *netdev)
3754 struct i40e_netdev_priv *np = netdev_priv(netdev);
3755 struct i40e_vsi *vsi = np->vsi;
3756 struct i40e_pf *pf = vsi->back;
3759 /* if interface is down do nothing */
3760 if (test_bit(__I40E_DOWN, &vsi->state))
3763 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3764 for (i = 0; i < vsi->num_q_vectors; i++)
3765 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3767 i40e_intr(pf->pdev->irq, netdev);
3773 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3774 * @pf: the PF being configured
3775 * @pf_q: the PF queue
3776 * @enable: enable or disable state of the queue
3778 * This routine will wait for the given Tx queue of the PF to reach the
3779 * enabled or disabled state.
3780 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3781 * multiple retries; else will return 0 in case of success.
3783 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3788 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3789 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3790 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3793 usleep_range(10, 20);
3795 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3802 * i40e_vsi_control_tx - Start or stop a VSI's rings
3803 * @vsi: the VSI being configured
3804 * @enable: start or stop the rings
3806 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3808 struct i40e_pf *pf = vsi->back;
3809 struct i40e_hw *hw = &pf->hw;
3810 int i, j, pf_q, ret = 0;
3813 pf_q = vsi->base_queue;
3814 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3816 /* warn the TX unit of coming changes */
3817 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3819 usleep_range(10, 20);
3821 for (j = 0; j < 50; j++) {
3822 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3823 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3824 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3826 usleep_range(1000, 2000);
3828 /* Skip if the queue is already in the requested state */
3829 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3832 /* turn on/off the queue */
3834 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3835 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3837 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3840 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3841 /* No waiting for the Tx queue to disable */
3842 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3845 /* wait for the change to finish */
3846 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3848 dev_info(&pf->pdev->dev,
3849 "VSI seid %d Tx ring %d %sable timeout\n",
3850 vsi->seid, pf_q, (enable ? "en" : "dis"));
3855 if (hw->revision_id == 0)
3861 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3862 * @pf: the PF being configured
3863 * @pf_q: the PF queue
3864 * @enable: enable or disable state of the queue
3866 * This routine will wait for the given Rx queue of the PF to reach the
3867 * enabled or disabled state.
3868 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3869 * multiple retries; else will return 0 in case of success.
3871 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3876 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3877 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3878 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3881 usleep_range(10, 20);
3883 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3890 * i40e_vsi_control_rx - Start or stop a VSI's rings
3891 * @vsi: the VSI being configured
3892 * @enable: start or stop the rings
3894 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3896 struct i40e_pf *pf = vsi->back;
3897 struct i40e_hw *hw = &pf->hw;
3898 int i, j, pf_q, ret = 0;
3901 pf_q = vsi->base_queue;
3902 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3903 for (j = 0; j < 50; j++) {
3904 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3905 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3906 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3908 usleep_range(1000, 2000);
3911 /* Skip if the queue is already in the requested state */
3912 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3915 /* turn on/off the queue */
3917 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3919 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3920 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3922 /* wait for the change to finish */
3923 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3925 dev_info(&pf->pdev->dev,
3926 "VSI seid %d Rx ring %d %sable timeout\n",
3927 vsi->seid, pf_q, (enable ? "en" : "dis"));
3936 * i40e_vsi_control_rings - Start or stop a VSI's rings
3937 * @vsi: the VSI being configured
3938 * @enable: start or stop the rings
3940 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3944 /* do rx first for enable and last for disable */
3946 ret = i40e_vsi_control_rx(vsi, request);
3949 ret = i40e_vsi_control_tx(vsi, request);
3951 /* Ignore return value, we need to shutdown whatever we can */
3952 i40e_vsi_control_tx(vsi, request);
3953 i40e_vsi_control_rx(vsi, request);
3960 * i40e_vsi_free_irq - Free the irq association with the OS
3961 * @vsi: the VSI being configured
3963 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3965 struct i40e_pf *pf = vsi->back;
3966 struct i40e_hw *hw = &pf->hw;
3967 int base = vsi->base_vector;
3971 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3972 if (!vsi->q_vectors)
3975 if (!vsi->irqs_ready)
3978 vsi->irqs_ready = false;
3979 for (i = 0; i < vsi->num_q_vectors; i++) {
3980 u16 vector = i + base;
3982 /* free only the irqs that were actually requested */
3983 if (!vsi->q_vectors[i] ||
3984 !vsi->q_vectors[i]->num_ringpairs)
3987 /* clear the affinity_mask in the IRQ descriptor */
3988 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3990 free_irq(pf->msix_entries[vector].vector,
3993 /* Tear down the interrupt queue link list
3995 * We know that they come in pairs and always
3996 * the Rx first, then the Tx. To clear the
3997 * link list, stick the EOL value into the
3998 * next_q field of the registers.
4000 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4001 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4002 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4003 val |= I40E_QUEUE_END_OF_LIST
4004 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4005 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4007 while (qp != I40E_QUEUE_END_OF_LIST) {
4010 val = rd32(hw, I40E_QINT_RQCTL(qp));
4012 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4013 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4014 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4015 I40E_QINT_RQCTL_INTEVENT_MASK);
4017 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4018 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4020 wr32(hw, I40E_QINT_RQCTL(qp), val);
4022 val = rd32(hw, I40E_QINT_TQCTL(qp));
4024 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4025 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4027 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4028 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4029 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4030 I40E_QINT_TQCTL_INTEVENT_MASK);
4032 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4033 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4035 wr32(hw, I40E_QINT_TQCTL(qp), val);
4040 free_irq(pf->pdev->irq, pf);
4042 val = rd32(hw, I40E_PFINT_LNKLST0);
4043 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4044 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4045 val |= I40E_QUEUE_END_OF_LIST
4046 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4047 wr32(hw, I40E_PFINT_LNKLST0, val);
4049 val = rd32(hw, I40E_QINT_RQCTL(qp));
4050 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4051 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4052 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4053 I40E_QINT_RQCTL_INTEVENT_MASK);
4055 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4056 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4058 wr32(hw, I40E_QINT_RQCTL(qp), val);
4060 val = rd32(hw, I40E_QINT_TQCTL(qp));
4062 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4063 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4064 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4065 I40E_QINT_TQCTL_INTEVENT_MASK);
4067 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4068 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4070 wr32(hw, I40E_QINT_TQCTL(qp), val);
4075 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4076 * @vsi: the VSI being configured
4077 * @v_idx: Index of vector to be freed
4079 * This function frees the memory allocated to the q_vector. In addition if
4080 * NAPI is enabled it will delete any references to the NAPI struct prior
4081 * to freeing the q_vector.
4083 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4085 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4086 struct i40e_ring *ring;
4091 /* disassociate q_vector from rings */
4092 i40e_for_each_ring(ring, q_vector->tx)
4093 ring->q_vector = NULL;
4095 i40e_for_each_ring(ring, q_vector->rx)
4096 ring->q_vector = NULL;
4098 /* only VSI w/ an associated netdev is set up w/ NAPI */
4100 netif_napi_del(&q_vector->napi);
4102 vsi->q_vectors[v_idx] = NULL;
4104 kfree_rcu(q_vector, rcu);
4108 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4109 * @vsi: the VSI being un-configured
4111 * This frees the memory allocated to the q_vectors and
4112 * deletes references to the NAPI struct.
4114 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4118 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4119 i40e_free_q_vector(vsi, v_idx);
4123 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4124 * @pf: board private structure
4126 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4128 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4129 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4130 pci_disable_msix(pf->pdev);
4131 kfree(pf->msix_entries);
4132 pf->msix_entries = NULL;
4133 kfree(pf->irq_pile);
4134 pf->irq_pile = NULL;
4135 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4136 pci_disable_msi(pf->pdev);
4138 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4142 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4143 * @pf: board private structure
4145 * We go through and clear interrupt specific resources and reset the structure
4146 * to pre-load conditions
4148 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4152 i40e_stop_misc_vector(pf);
4153 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4154 synchronize_irq(pf->msix_entries[0].vector);
4155 free_irq(pf->msix_entries[0].vector, pf);
4158 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4159 for (i = 0; i < pf->num_alloc_vsi; i++)
4161 i40e_vsi_free_q_vectors(pf->vsi[i]);
4162 i40e_reset_interrupt_capability(pf);
4166 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4167 * @vsi: the VSI being configured
4169 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4176 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4177 napi_enable(&vsi->q_vectors[q_idx]->napi);
4181 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4182 * @vsi: the VSI being configured
4184 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4191 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4192 napi_disable(&vsi->q_vectors[q_idx]->napi);
4196 * i40e_vsi_close - Shut down a VSI
4197 * @vsi: the vsi to be quelled
4199 static void i40e_vsi_close(struct i40e_vsi *vsi)
4201 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4203 i40e_vsi_free_irq(vsi);
4204 i40e_vsi_free_tx_resources(vsi);
4205 i40e_vsi_free_rx_resources(vsi);
4206 vsi->current_netdev_flags = 0;
4210 * i40e_quiesce_vsi - Pause a given VSI
4211 * @vsi: the VSI being paused
4213 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4215 if (test_bit(__I40E_DOWN, &vsi->state))
4218 /* No need to disable FCoE VSI when Tx suspended */
4219 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4220 vsi->type == I40E_VSI_FCOE) {
4221 dev_dbg(&vsi->back->pdev->dev,
4222 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4226 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4227 if (vsi->netdev && netif_running(vsi->netdev))
4228 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4230 i40e_vsi_close(vsi);
4234 * i40e_unquiesce_vsi - Resume a given VSI
4235 * @vsi: the VSI being resumed
4237 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4239 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4242 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4243 if (vsi->netdev && netif_running(vsi->netdev))
4244 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4246 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4250 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4253 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4257 for (v = 0; v < pf->num_alloc_vsi; v++) {
4259 i40e_quiesce_vsi(pf->vsi[v]);
4264 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4267 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4271 for (v = 0; v < pf->num_alloc_vsi; v++) {
4273 i40e_unquiesce_vsi(pf->vsi[v]);
4277 #ifdef CONFIG_I40E_DCB
4279 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4280 * @vsi: the VSI being configured
4282 * This function waits for the given VSI's Tx queues to be disabled.
4284 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4286 struct i40e_pf *pf = vsi->back;
4289 pf_q = vsi->base_queue;
4290 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4291 /* Check and wait for the disable status of the queue */
4292 ret = i40e_pf_txq_wait(pf, pf_q, false);
4294 dev_info(&pf->pdev->dev,
4295 "VSI seid %d Tx ring %d disable timeout\n",
4305 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4308 * This function waits for the Tx queues to be in disabled state for all the
4309 * VSIs that are managed by this PF.
4311 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4315 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4316 /* No need to wait for FCoE VSI queues */
4317 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4318 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4330 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4331 * @q_idx: TX queue number
4332 * @vsi: Pointer to VSI struct
4334 * This function checks specified queue for given VSI. Detects hung condition.
4335 * Sets hung bit since it is two step process. Before next run of service task
4336 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4337 * hung condition remain unchanged and during subsequent run, this function
4338 * issues SW interrupt to recover from hung condition.
4340 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4342 struct i40e_ring *tx_ring = NULL;
4344 u32 head, val, tx_pending;
4349 /* now that we have an index, find the tx_ring struct */
4350 for (i = 0; i < vsi->num_queue_pairs; i++) {
4351 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4352 if (q_idx == vsi->tx_rings[i]->queue_index) {
4353 tx_ring = vsi->tx_rings[i];
4362 /* Read interrupt register */
4363 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4365 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4366 tx_ring->vsi->base_vector - 1));
4368 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4370 /* Bail out if interrupts are disabled because napi_poll
4371 * execution in-progress or will get scheduled soon.
4372 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4374 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4377 head = i40e_get_head(tx_ring);
4379 tx_pending = i40e_get_tx_pending(tx_ring);
4381 /* HW is done executing descriptors, updated HEAD write back,
4382 * but SW hasn't processed those descriptors. If interrupt is
4383 * not generated from this point ON, it could result into
4384 * dev_watchdog detecting timeout on those netdev_queue,
4385 * hence proactively trigger SW interrupt.
4388 /* NAPI Poll didn't run and clear since it was set */
4389 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4390 &tx_ring->q_vector->hung_detected)) {
4391 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4392 vsi->seid, q_idx, tx_pending,
4393 tx_ring->next_to_clean, head,
4394 tx_ring->next_to_use,
4395 readl(tx_ring->tail));
4396 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4397 vsi->seid, q_idx, val);
4398 i40e_force_wb(vsi, tx_ring->q_vector);
4400 /* First Chance - detected possible hung */
4401 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4402 &tx_ring->q_vector->hung_detected);
4408 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4409 * @pf: pointer to PF struct
4411 * LAN VSI has netdev and netdev has TX queues. This function is to check
4412 * each of those TX queues if they are hung, trigger recovery by issuing
4415 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4417 struct net_device *netdev;
4418 struct i40e_vsi *vsi;
4421 /* Only for LAN VSI */
4422 vsi = pf->vsi[pf->lan_vsi];
4427 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4428 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4429 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4432 /* Make sure type is MAIN VSI */
4433 if (vsi->type != I40E_VSI_MAIN)
4436 netdev = vsi->netdev;
4440 /* Bail out if netif_carrier is not OK */
4441 if (!netif_carrier_ok(netdev))
4444 /* Go thru' TX queues for netdev */
4445 for (i = 0; i < netdev->num_tx_queues; i++) {
4446 struct netdev_queue *q;
4448 q = netdev_get_tx_queue(netdev, i);
4450 i40e_detect_recover_hung_queue(i, vsi);
4455 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4456 * @pf: pointer to PF
4458 * Get TC map for ISCSI PF type that will include iSCSI TC
4461 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4463 struct i40e_dcb_app_priority_table app;
4464 struct i40e_hw *hw = &pf->hw;
4465 u8 enabled_tc = 1; /* TC0 is always enabled */
4467 /* Get the iSCSI APP TLV */
4468 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4470 for (i = 0; i < dcbcfg->numapps; i++) {
4471 app = dcbcfg->app[i];
4472 if (app.selector == I40E_APP_SEL_TCPIP &&
4473 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4474 tc = dcbcfg->etscfg.prioritytable[app.priority];
4475 enabled_tc |= BIT(tc);
4484 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4485 * @dcbcfg: the corresponding DCBx configuration structure
4487 * Return the number of TCs from given DCBx configuration
4489 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4494 /* Scan the ETS Config Priority Table to find
4495 * traffic class enabled for a given priority
4496 * and use the traffic class index to get the
4497 * number of traffic classes enabled
4499 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4500 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4501 num_tc = dcbcfg->etscfg.prioritytable[i];
4504 /* Traffic class index starts from zero so
4505 * increment to return the actual count
4511 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4512 * @dcbcfg: the corresponding DCBx configuration structure
4514 * Query the current DCB configuration and return the number of
4515 * traffic classes enabled from the given DCBX config
4517 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4519 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4523 for (i = 0; i < num_tc; i++)
4524 enabled_tc |= BIT(i);
4530 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4531 * @pf: PF being queried
4533 * Return number of traffic classes enabled for the given PF
4535 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4537 struct i40e_hw *hw = &pf->hw;
4540 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4542 /* If DCB is not enabled then always in single TC */
4543 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4546 /* SFP mode will be enabled for all TCs on port */
4547 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4548 return i40e_dcb_get_num_tc(dcbcfg);
4550 /* MFP mode return count of enabled TCs for this PF */
4551 if (pf->hw.func_caps.iscsi)
4552 enabled_tc = i40e_get_iscsi_tc_map(pf);
4554 return 1; /* Only TC0 */
4556 /* At least have TC0 */
4557 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4558 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4559 if (enabled_tc & BIT(i))
4566 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4567 * @pf: PF being queried
4569 * Return a bitmap for first enabled traffic class for this PF.
4571 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4573 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4577 return 0x1; /* TC0 */
4579 /* Find the first enabled TC */
4580 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4581 if (enabled_tc & BIT(i))
4589 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4590 * @pf: PF being queried
4592 * Return a bitmap for enabled traffic classes for this PF.
4594 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4596 /* If DCB is not enabled for this PF then just return default TC */
4597 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4598 return i40e_pf_get_default_tc(pf);
4600 /* SFP mode we want PF to be enabled for all TCs */
4601 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4602 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4604 /* MFP enabled and iSCSI PF type */
4605 if (pf->hw.func_caps.iscsi)
4606 return i40e_get_iscsi_tc_map(pf);
4608 return i40e_pf_get_default_tc(pf);
4612 * i40e_vsi_get_bw_info - Query VSI BW Information
4613 * @vsi: the VSI being queried
4615 * Returns 0 on success, negative value on failure
4617 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4619 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4620 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4621 struct i40e_pf *pf = vsi->back;
4622 struct i40e_hw *hw = &pf->hw;
4627 /* Get the VSI level BW configuration */
4628 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4630 dev_info(&pf->pdev->dev,
4631 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4632 i40e_stat_str(&pf->hw, ret),
4633 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4637 /* Get the VSI level BW configuration per TC */
4638 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4641 dev_info(&pf->pdev->dev,
4642 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4643 i40e_stat_str(&pf->hw, ret),
4644 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4648 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4649 dev_info(&pf->pdev->dev,
4650 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4651 bw_config.tc_valid_bits,
4652 bw_ets_config.tc_valid_bits);
4653 /* Still continuing */
4656 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4657 vsi->bw_max_quanta = bw_config.max_bw;
4658 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4659 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4660 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4661 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4662 vsi->bw_ets_limit_credits[i] =
4663 le16_to_cpu(bw_ets_config.credits[i]);
4664 /* 3 bits out of 4 for each TC */
4665 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4672 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4673 * @vsi: the VSI being configured
4674 * @enabled_tc: TC bitmap
4675 * @bw_credits: BW shared credits per TC
4677 * Returns 0 on success, negative value on failure
4679 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4682 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4686 bw_data.tc_valid_bits = enabled_tc;
4687 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4688 bw_data.tc_bw_credits[i] = bw_share[i];
4690 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4693 dev_info(&vsi->back->pdev->dev,
4694 "AQ command Config VSI BW allocation per TC failed = %d\n",
4695 vsi->back->hw.aq.asq_last_status);
4699 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4700 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4706 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4707 * @vsi: the VSI being configured
4708 * @enabled_tc: TC map to be enabled
4711 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4713 struct net_device *netdev = vsi->netdev;
4714 struct i40e_pf *pf = vsi->back;
4715 struct i40e_hw *hw = &pf->hw;
4718 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4724 netdev_reset_tc(netdev);
4728 /* Set up actual enabled TCs on the VSI */
4729 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4732 /* set per TC queues for the VSI */
4733 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4734 /* Only set TC queues for enabled tcs
4736 * e.g. For a VSI that has TC0 and TC3 enabled the
4737 * enabled_tc bitmap would be 0x00001001; the driver
4738 * will set the numtc for netdev as 2 that will be
4739 * referenced by the netdev layer as TC 0 and 1.
4741 if (vsi->tc_config.enabled_tc & BIT(i))
4742 netdev_set_tc_queue(netdev,
4743 vsi->tc_config.tc_info[i].netdev_tc,
4744 vsi->tc_config.tc_info[i].qcount,
4745 vsi->tc_config.tc_info[i].qoffset);
4748 /* Assign UP2TC map for the VSI */
4749 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4750 /* Get the actual TC# for the UP */
4751 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4752 /* Get the mapped netdev TC# for the UP */
4753 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4754 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4759 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4760 * @vsi: the VSI being configured
4761 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4763 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4764 struct i40e_vsi_context *ctxt)
4766 /* copy just the sections touched not the entire info
4767 * since not all sections are valid as returned by
4770 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4771 memcpy(&vsi->info.queue_mapping,
4772 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4773 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4774 sizeof(vsi->info.tc_mapping));
4778 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4779 * @vsi: VSI to be configured
4780 * @enabled_tc: TC bitmap
4782 * This configures a particular VSI for TCs that are mapped to the
4783 * given TC bitmap. It uses default bandwidth share for TCs across
4784 * VSIs to configure TC for a particular VSI.
4787 * It is expected that the VSI queues have been quisced before calling
4790 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4792 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4793 struct i40e_vsi_context ctxt;
4797 /* Check if enabled_tc is same as existing or new TCs */
4798 if (vsi->tc_config.enabled_tc == enabled_tc)
4801 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4802 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4803 if (enabled_tc & BIT(i))
4807 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4809 dev_info(&vsi->back->pdev->dev,
4810 "Failed configuring TC map %d for VSI %d\n",
4811 enabled_tc, vsi->seid);
4815 /* Update Queue Pairs Mapping for currently enabled UPs */
4816 ctxt.seid = vsi->seid;
4817 ctxt.pf_num = vsi->back->hw.pf_id;
4819 ctxt.uplink_seid = vsi->uplink_seid;
4820 ctxt.info = vsi->info;
4821 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4823 /* Update the VSI after updating the VSI queue-mapping information */
4824 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4826 dev_info(&vsi->back->pdev->dev,
4827 "Update vsi tc config failed, err %s aq_err %s\n",
4828 i40e_stat_str(&vsi->back->hw, ret),
4829 i40e_aq_str(&vsi->back->hw,
4830 vsi->back->hw.aq.asq_last_status));
4833 /* update the local VSI info with updated queue map */
4834 i40e_vsi_update_queue_map(vsi, &ctxt);
4835 vsi->info.valid_sections = 0;
4837 /* Update current VSI BW information */
4838 ret = i40e_vsi_get_bw_info(vsi);
4840 dev_info(&vsi->back->pdev->dev,
4841 "Failed updating vsi bw info, err %s aq_err %s\n",
4842 i40e_stat_str(&vsi->back->hw, ret),
4843 i40e_aq_str(&vsi->back->hw,
4844 vsi->back->hw.aq.asq_last_status));
4848 /* Update the netdev TC setup */
4849 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4855 * i40e_veb_config_tc - Configure TCs for given VEB
4857 * @enabled_tc: TC bitmap
4859 * Configures given TC bitmap for VEB (switching) element
4861 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4863 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4864 struct i40e_pf *pf = veb->pf;
4868 /* No TCs or already enabled TCs just return */
4869 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4872 bw_data.tc_valid_bits = enabled_tc;
4873 /* bw_data.absolute_credits is not set (relative) */
4875 /* Enable ETS TCs with equal BW Share for now */
4876 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4877 if (enabled_tc & BIT(i))
4878 bw_data.tc_bw_share_credits[i] = 1;
4881 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4884 dev_info(&pf->pdev->dev,
4885 "VEB bw config failed, err %s aq_err %s\n",
4886 i40e_stat_str(&pf->hw, ret),
4887 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4891 /* Update the BW information */
4892 ret = i40e_veb_get_bw_info(veb);
4894 dev_info(&pf->pdev->dev,
4895 "Failed getting veb bw config, err %s aq_err %s\n",
4896 i40e_stat_str(&pf->hw, ret),
4897 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4904 #ifdef CONFIG_I40E_DCB
4906 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4909 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4910 * the caller would've quiesce all the VSIs before calling
4913 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4919 /* Enable the TCs available on PF to all VEBs */
4920 tc_map = i40e_pf_get_tc_map(pf);
4921 for (v = 0; v < I40E_MAX_VEB; v++) {
4924 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4926 dev_info(&pf->pdev->dev,
4927 "Failed configuring TC for VEB seid=%d\n",
4929 /* Will try to configure as many components */
4933 /* Update each VSI */
4934 for (v = 0; v < pf->num_alloc_vsi; v++) {
4938 /* - Enable all TCs for the LAN VSI
4940 * - For FCoE VSI only enable the TC configured
4941 * as per the APP TLV
4943 * - For all others keep them at TC0 for now
4945 if (v == pf->lan_vsi)
4946 tc_map = i40e_pf_get_tc_map(pf);
4948 tc_map = i40e_pf_get_default_tc(pf);
4950 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4951 tc_map = i40e_get_fcoe_tc_map(pf);
4952 #endif /* #ifdef I40E_FCOE */
4954 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4956 dev_info(&pf->pdev->dev,
4957 "Failed configuring TC for VSI seid=%d\n",
4959 /* Will try to configure as many components */
4961 /* Re-configure VSI vectors based on updated TC map */
4962 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4963 if (pf->vsi[v]->netdev)
4964 i40e_dcbnl_set_all(pf->vsi[v]);
4970 * i40e_resume_port_tx - Resume port Tx
4973 * Resume a port's Tx and issue a PF reset in case of failure to
4976 static int i40e_resume_port_tx(struct i40e_pf *pf)
4978 struct i40e_hw *hw = &pf->hw;
4981 ret = i40e_aq_resume_port_tx(hw, NULL);
4983 dev_info(&pf->pdev->dev,
4984 "Resume Port Tx failed, err %s aq_err %s\n",
4985 i40e_stat_str(&pf->hw, ret),
4986 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4987 /* Schedule PF reset to recover */
4988 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4989 i40e_service_event_schedule(pf);
4996 * i40e_init_pf_dcb - Initialize DCB configuration
4997 * @pf: PF being configured
4999 * Query the current DCB configuration and cache it
5000 * in the hardware structure
5002 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5004 struct i40e_hw *hw = &pf->hw;
5007 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5008 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5009 (pf->hw.aq.fw_maj_ver < 4))
5012 /* Get the initial DCB configuration */
5013 err = i40e_init_dcb(hw);
5015 /* Device/Function is not DCBX capable */
5016 if ((!hw->func_caps.dcb) ||
5017 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5018 dev_info(&pf->pdev->dev,
5019 "DCBX offload is not supported or is disabled for this PF.\n");
5021 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5025 /* When status is not DISABLED then DCBX in FW */
5026 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5027 DCB_CAP_DCBX_VER_IEEE;
5029 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5030 /* Enable DCB tagging only when more than one TC */
5031 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5032 pf->flags |= I40E_FLAG_DCB_ENABLED;
5033 dev_dbg(&pf->pdev->dev,
5034 "DCBX offload is supported for this PF.\n");
5037 dev_info(&pf->pdev->dev,
5038 "Query for DCB configuration failed, err %s aq_err %s\n",
5039 i40e_stat_str(&pf->hw, err),
5040 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5046 #endif /* CONFIG_I40E_DCB */
5047 #define SPEED_SIZE 14
5050 * i40e_print_link_message - print link up or down
5051 * @vsi: the VSI for which link needs a message
5053 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5055 char *speed = "Unknown";
5056 char *fc = "Unknown";
5058 if (vsi->current_isup == isup)
5060 vsi->current_isup = isup;
5062 netdev_info(vsi->netdev, "NIC Link is Down\n");
5066 /* Warn user if link speed on NPAR enabled partition is not at
5069 if (vsi->back->hw.func_caps.npar_enable &&
5070 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5071 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5072 netdev_warn(vsi->netdev,
5073 "The partition detected link speed that is less than 10Gbps\n");
5075 switch (vsi->back->hw.phy.link_info.link_speed) {
5076 case I40E_LINK_SPEED_40GB:
5079 case I40E_LINK_SPEED_20GB:
5082 case I40E_LINK_SPEED_10GB:
5085 case I40E_LINK_SPEED_1GB:
5088 case I40E_LINK_SPEED_100MB:
5095 switch (vsi->back->hw.fc.current_mode) {
5099 case I40E_FC_TX_PAUSE:
5102 case I40E_FC_RX_PAUSE:
5110 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5115 * i40e_up_complete - Finish the last steps of bringing up a connection
5116 * @vsi: the VSI being configured
5118 static int i40e_up_complete(struct i40e_vsi *vsi)
5120 struct i40e_pf *pf = vsi->back;
5123 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5124 i40e_vsi_configure_msix(vsi);
5126 i40e_configure_msi_and_legacy(vsi);
5129 err = i40e_vsi_control_rings(vsi, true);
5133 clear_bit(__I40E_DOWN, &vsi->state);
5134 i40e_napi_enable_all(vsi);
5135 i40e_vsi_enable_irq(vsi);
5137 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5139 i40e_print_link_message(vsi, true);
5140 netif_tx_start_all_queues(vsi->netdev);
5141 netif_carrier_on(vsi->netdev);
5142 } else if (vsi->netdev) {
5143 i40e_print_link_message(vsi, false);
5144 /* need to check for qualified module here*/
5145 if ((pf->hw.phy.link_info.link_info &
5146 I40E_AQ_MEDIA_AVAILABLE) &&
5147 (!(pf->hw.phy.link_info.an_info &
5148 I40E_AQ_QUALIFIED_MODULE)))
5149 netdev_err(vsi->netdev,
5150 "the driver failed to link because an unqualified module was detected.");
5153 /* replay FDIR SB filters */
5154 if (vsi->type == I40E_VSI_FDIR) {
5155 /* reset fd counters */
5156 pf->fd_add_err = pf->fd_atr_cnt = 0;
5157 if (pf->fd_tcp_rule > 0) {
5158 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5159 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5160 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5161 pf->fd_tcp_rule = 0;
5163 i40e_fdir_filter_restore(vsi);
5165 i40e_service_event_schedule(pf);
5171 * i40e_vsi_reinit_locked - Reset the VSI
5172 * @vsi: the VSI being configured
5174 * Rebuild the ring structs after some configuration
5175 * has changed, e.g. MTU size.
5177 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5179 struct i40e_pf *pf = vsi->back;
5181 WARN_ON(in_interrupt());
5182 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5183 usleep_range(1000, 2000);
5186 /* Give a VF some time to respond to the reset. The
5187 * two second wait is based upon the watchdog cycle in
5190 if (vsi->type == I40E_VSI_SRIOV)
5193 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5197 * i40e_up - Bring the connection back up after being down
5198 * @vsi: the VSI being configured
5200 int i40e_up(struct i40e_vsi *vsi)
5204 err = i40e_vsi_configure(vsi);
5206 err = i40e_up_complete(vsi);
5212 * i40e_down - Shutdown the connection processing
5213 * @vsi: the VSI being stopped
5215 void i40e_down(struct i40e_vsi *vsi)
5219 /* It is assumed that the caller of this function
5220 * sets the vsi->state __I40E_DOWN bit.
5223 netif_carrier_off(vsi->netdev);
5224 netif_tx_disable(vsi->netdev);
5226 i40e_vsi_disable_irq(vsi);
5227 i40e_vsi_control_rings(vsi, false);
5228 i40e_napi_disable_all(vsi);
5230 for (i = 0; i < vsi->num_queue_pairs; i++) {
5231 i40e_clean_tx_ring(vsi->tx_rings[i]);
5232 i40e_clean_rx_ring(vsi->rx_rings[i]);
5237 * i40e_setup_tc - configure multiple traffic classes
5238 * @netdev: net device to configure
5239 * @tc: number of traffic classes to enable
5242 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5244 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5247 struct i40e_netdev_priv *np = netdev_priv(netdev);
5248 struct i40e_vsi *vsi = np->vsi;
5249 struct i40e_pf *pf = vsi->back;
5254 /* Check if DCB enabled to continue */
5255 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5256 netdev_info(netdev, "DCB is not enabled for adapter\n");
5260 /* Check if MFP enabled */
5261 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5262 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5266 /* Check whether tc count is within enabled limit */
5267 if (tc > i40e_pf_get_num_tc(pf)) {
5268 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5272 /* Generate TC map for number of tc requested */
5273 for (i = 0; i < tc; i++)
5274 enabled_tc |= BIT(i);
5276 /* Requesting same TC configuration as already enabled */
5277 if (enabled_tc == vsi->tc_config.enabled_tc)
5280 /* Quiesce VSI queues */
5281 i40e_quiesce_vsi(vsi);
5283 /* Configure VSI for enabled TCs */
5284 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5286 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5292 i40e_unquiesce_vsi(vsi);
5299 * i40e_open - Called when a network interface is made active
5300 * @netdev: network interface device structure
5302 * The open entry point is called when a network interface is made
5303 * active by the system (IFF_UP). At this point all resources needed
5304 * for transmit and receive operations are allocated, the interrupt
5305 * handler is registered with the OS, the netdev watchdog subtask is
5306 * enabled, and the stack is notified that the interface is ready.
5308 * Returns 0 on success, negative value on failure
5310 int i40e_open(struct net_device *netdev)
5312 struct i40e_netdev_priv *np = netdev_priv(netdev);
5313 struct i40e_vsi *vsi = np->vsi;
5314 struct i40e_pf *pf = vsi->back;
5317 /* disallow open during test or if eeprom is broken */
5318 if (test_bit(__I40E_TESTING, &pf->state) ||
5319 test_bit(__I40E_BAD_EEPROM, &pf->state))
5322 netif_carrier_off(netdev);
5324 err = i40e_vsi_open(vsi);
5328 /* configure global TSO hardware offload settings */
5329 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5330 TCP_FLAG_FIN) >> 16);
5331 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5333 TCP_FLAG_CWR) >> 16);
5334 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5336 #ifdef CONFIG_I40E_VXLAN
5337 vxlan_get_rx_port(netdev);
5345 * @vsi: the VSI to open
5347 * Finish initialization of the VSI.
5349 * Returns 0 on success, negative value on failure
5351 int i40e_vsi_open(struct i40e_vsi *vsi)
5353 struct i40e_pf *pf = vsi->back;
5354 char int_name[I40E_INT_NAME_STR_LEN];
5357 /* allocate descriptors */
5358 err = i40e_vsi_setup_tx_resources(vsi);
5361 err = i40e_vsi_setup_rx_resources(vsi);
5365 err = i40e_vsi_configure(vsi);
5370 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5371 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5372 err = i40e_vsi_request_irq(vsi, int_name);
5376 /* Notify the stack of the actual queue counts. */
5377 err = netif_set_real_num_tx_queues(vsi->netdev,
5378 vsi->num_queue_pairs);
5380 goto err_set_queues;
5382 err = netif_set_real_num_rx_queues(vsi->netdev,
5383 vsi->num_queue_pairs);
5385 goto err_set_queues;
5387 } else if (vsi->type == I40E_VSI_FDIR) {
5388 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5389 dev_driver_string(&pf->pdev->dev),
5390 dev_name(&pf->pdev->dev));
5391 err = i40e_vsi_request_irq(vsi, int_name);
5398 err = i40e_up_complete(vsi);
5400 goto err_up_complete;
5407 i40e_vsi_free_irq(vsi);
5409 i40e_vsi_free_rx_resources(vsi);
5411 i40e_vsi_free_tx_resources(vsi);
5412 if (vsi == pf->vsi[pf->lan_vsi])
5413 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5419 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5420 * @pf: Pointer to PF
5422 * This function destroys the hlist where all the Flow Director
5423 * filters were saved.
5425 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5427 struct i40e_fdir_filter *filter;
5428 struct hlist_node *node2;
5430 hlist_for_each_entry_safe(filter, node2,
5431 &pf->fdir_filter_list, fdir_node) {
5432 hlist_del(&filter->fdir_node);
5435 pf->fdir_pf_active_filters = 0;
5439 * i40e_close - Disables a network interface
5440 * @netdev: network interface device structure
5442 * The close entry point is called when an interface is de-activated
5443 * by the OS. The hardware is still under the driver's control, but
5444 * this netdev interface is disabled.
5446 * Returns 0, this is not allowed to fail
5449 int i40e_close(struct net_device *netdev)
5451 static int i40e_close(struct net_device *netdev)
5454 struct i40e_netdev_priv *np = netdev_priv(netdev);
5455 struct i40e_vsi *vsi = np->vsi;
5457 i40e_vsi_close(vsi);
5463 * i40e_do_reset - Start a PF or Core Reset sequence
5464 * @pf: board private structure
5465 * @reset_flags: which reset is requested
5467 * The essential difference in resets is that the PF Reset
5468 * doesn't clear the packet buffers, doesn't reset the PE
5469 * firmware, and doesn't bother the other PFs on the chip.
5471 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5475 WARN_ON(in_interrupt());
5477 if (i40e_check_asq_alive(&pf->hw))
5478 i40e_vc_notify_reset(pf);
5480 /* do the biggest reset indicated */
5481 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5483 /* Request a Global Reset
5485 * This will start the chip's countdown to the actual full
5486 * chip reset event, and a warning interrupt to be sent
5487 * to all PFs, including the requestor. Our handler
5488 * for the warning interrupt will deal with the shutdown
5489 * and recovery of the switch setup.
5491 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5492 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5493 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5494 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5496 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5498 /* Request a Core Reset
5500 * Same as Global Reset, except does *not* include the MAC/PHY
5502 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5503 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5504 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5505 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5506 i40e_flush(&pf->hw);
5508 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5510 /* Request a PF Reset
5512 * Resets only the PF-specific registers
5514 * This goes directly to the tear-down and rebuild of
5515 * the switch, since we need to do all the recovery as
5516 * for the Core Reset.
5518 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5519 i40e_handle_reset_warning(pf);
5521 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5524 /* Find the VSI(s) that requested a re-init */
5525 dev_info(&pf->pdev->dev,
5526 "VSI reinit requested\n");
5527 for (v = 0; v < pf->num_alloc_vsi; v++) {
5528 struct i40e_vsi *vsi = pf->vsi[v];
5531 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5532 i40e_vsi_reinit_locked(pf->vsi[v]);
5533 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5536 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5539 /* Find the VSI(s) that needs to be brought down */
5540 dev_info(&pf->pdev->dev, "VSI down requested\n");
5541 for (v = 0; v < pf->num_alloc_vsi; v++) {
5542 struct i40e_vsi *vsi = pf->vsi[v];
5545 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5546 set_bit(__I40E_DOWN, &vsi->state);
5548 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5552 dev_info(&pf->pdev->dev,
5553 "bad reset request 0x%08x\n", reset_flags);
5557 #ifdef CONFIG_I40E_DCB
5559 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5560 * @pf: board private structure
5561 * @old_cfg: current DCB config
5562 * @new_cfg: new DCB config
5564 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5565 struct i40e_dcbx_config *old_cfg,
5566 struct i40e_dcbx_config *new_cfg)
5568 bool need_reconfig = false;
5570 /* Check if ETS configuration has changed */
5571 if (memcmp(&new_cfg->etscfg,
5573 sizeof(new_cfg->etscfg))) {
5574 /* If Priority Table has changed reconfig is needed */
5575 if (memcmp(&new_cfg->etscfg.prioritytable,
5576 &old_cfg->etscfg.prioritytable,
5577 sizeof(new_cfg->etscfg.prioritytable))) {
5578 need_reconfig = true;
5579 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5582 if (memcmp(&new_cfg->etscfg.tcbwtable,
5583 &old_cfg->etscfg.tcbwtable,
5584 sizeof(new_cfg->etscfg.tcbwtable)))
5585 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5587 if (memcmp(&new_cfg->etscfg.tsatable,
5588 &old_cfg->etscfg.tsatable,
5589 sizeof(new_cfg->etscfg.tsatable)))
5590 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5593 /* Check if PFC configuration has changed */
5594 if (memcmp(&new_cfg->pfc,
5596 sizeof(new_cfg->pfc))) {
5597 need_reconfig = true;
5598 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5601 /* Check if APP Table has changed */
5602 if (memcmp(&new_cfg->app,
5604 sizeof(new_cfg->app))) {
5605 need_reconfig = true;
5606 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5609 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5610 return need_reconfig;
5614 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5615 * @pf: board private structure
5616 * @e: event info posted on ARQ
5618 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5619 struct i40e_arq_event_info *e)
5621 struct i40e_aqc_lldp_get_mib *mib =
5622 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5623 struct i40e_hw *hw = &pf->hw;
5624 struct i40e_dcbx_config tmp_dcbx_cfg;
5625 bool need_reconfig = false;
5629 /* Not DCB capable or capability disabled */
5630 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5633 /* Ignore if event is not for Nearest Bridge */
5634 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5635 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5636 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5637 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5640 /* Check MIB Type and return if event for Remote MIB update */
5641 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5642 dev_dbg(&pf->pdev->dev,
5643 "LLDP event mib type %s\n", type ? "remote" : "local");
5644 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5645 /* Update the remote cached instance and return */
5646 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5647 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5648 &hw->remote_dcbx_config);
5652 /* Store the old configuration */
5653 tmp_dcbx_cfg = hw->local_dcbx_config;
5655 /* Reset the old DCBx configuration data */
5656 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5657 /* Get updated DCBX data from firmware */
5658 ret = i40e_get_dcb_config(&pf->hw);
5660 dev_info(&pf->pdev->dev,
5661 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5662 i40e_stat_str(&pf->hw, ret),
5663 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5667 /* No change detected in DCBX configs */
5668 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5669 sizeof(tmp_dcbx_cfg))) {
5670 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5674 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5675 &hw->local_dcbx_config);
5677 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5682 /* Enable DCB tagging only when more than one TC */
5683 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5684 pf->flags |= I40E_FLAG_DCB_ENABLED;
5686 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5688 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5689 /* Reconfiguration needed quiesce all VSIs */
5690 i40e_pf_quiesce_all_vsi(pf);
5692 /* Changes in configuration update VEB/VSI */
5693 i40e_dcb_reconfigure(pf);
5695 ret = i40e_resume_port_tx(pf);
5697 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5698 /* In case of error no point in resuming VSIs */
5702 /* Wait for the PF's Tx queues to be disabled */
5703 ret = i40e_pf_wait_txq_disabled(pf);
5705 /* Schedule PF reset to recover */
5706 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5707 i40e_service_event_schedule(pf);
5709 i40e_pf_unquiesce_all_vsi(pf);
5715 #endif /* CONFIG_I40E_DCB */
5718 * i40e_do_reset_safe - Protected reset path for userland calls.
5719 * @pf: board private structure
5720 * @reset_flags: which reset is requested
5723 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5726 i40e_do_reset(pf, reset_flags);
5731 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5732 * @pf: board private structure
5733 * @e: event info posted on ARQ
5735 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5738 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5739 struct i40e_arq_event_info *e)
5741 struct i40e_aqc_lan_overflow *data =
5742 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5743 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5744 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5745 struct i40e_hw *hw = &pf->hw;
5749 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5752 /* Queue belongs to VF, find the VF and issue VF reset */
5753 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5754 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5755 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5756 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5757 vf_id -= hw->func_caps.vf_base_id;
5758 vf = &pf->vf[vf_id];
5759 i40e_vc_notify_vf_reset(vf);
5760 /* Allow VF to process pending reset notification */
5762 i40e_reset_vf(vf, false);
5767 * i40e_service_event_complete - Finish up the service event
5768 * @pf: board private structure
5770 static void i40e_service_event_complete(struct i40e_pf *pf)
5772 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5774 /* flush memory to make sure state is correct before next watchog */
5775 smp_mb__before_atomic();
5776 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5780 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5781 * @pf: board private structure
5783 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5787 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5788 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5793 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5794 * @pf: board private structure
5796 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5800 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5801 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5802 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5803 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5808 * i40e_get_global_fd_count - Get total FD filters programmed on device
5809 * @pf: board private structure
5811 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5815 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5816 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5817 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5818 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5823 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5824 * @pf: board private structure
5826 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5828 struct i40e_fdir_filter *filter;
5829 u32 fcnt_prog, fcnt_avail;
5830 struct hlist_node *node;
5832 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5835 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5838 fcnt_prog = i40e_get_global_fd_count(pf);
5839 fcnt_avail = pf->fdir_pf_filter_count;
5840 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5841 (pf->fd_add_err == 0) ||
5842 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5843 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5844 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5845 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5846 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5847 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5850 /* Wait for some more space to be available to turn on ATR */
5851 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5852 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5853 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5854 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5855 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5856 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5860 /* if hw had a problem adding a filter, delete it */
5861 if (pf->fd_inv > 0) {
5862 hlist_for_each_entry_safe(filter, node,
5863 &pf->fdir_filter_list, fdir_node) {
5864 if (filter->fd_id == pf->fd_inv) {
5865 hlist_del(&filter->fdir_node);
5867 pf->fdir_pf_active_filters--;
5873 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5874 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5876 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5877 * @pf: board private structure
5879 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5881 unsigned long min_flush_time;
5882 int flush_wait_retry = 50;
5883 bool disable_atr = false;
5887 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5890 if (!time_after(jiffies, pf->fd_flush_timestamp +
5891 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5894 /* If the flush is happening too quick and we have mostly SB rules we
5895 * should not re-enable ATR for some time.
5897 min_flush_time = pf->fd_flush_timestamp +
5898 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5899 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5901 if (!(time_after(jiffies, min_flush_time)) &&
5902 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5903 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5904 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5908 pf->fd_flush_timestamp = jiffies;
5909 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5910 /* flush all filters */
5911 wr32(&pf->hw, I40E_PFQF_CTL_1,
5912 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5913 i40e_flush(&pf->hw);
5917 /* Check FD flush status every 5-6msec */
5918 usleep_range(5000, 6000);
5919 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5920 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5922 } while (flush_wait_retry--);
5923 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5924 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5926 /* replay sideband filters */
5927 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5929 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5930 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5931 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5932 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5938 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5939 * @pf: board private structure
5941 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5943 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5946 /* We can see up to 256 filter programming desc in transit if the filters are
5947 * being applied really fast; before we see the first
5948 * filter miss error on Rx queue 0. Accumulating enough error messages before
5949 * reacting will make sure we don't cause flush too often.
5951 #define I40E_MAX_FD_PROGRAM_ERROR 256
5954 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5955 * @pf: board private structure
5957 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5960 /* if interface is down do nothing */
5961 if (test_bit(__I40E_DOWN, &pf->state))
5964 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5967 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5968 i40e_fdir_flush_and_replay(pf);
5970 i40e_fdir_check_and_reenable(pf);
5975 * i40e_vsi_link_event - notify VSI of a link event
5976 * @vsi: vsi to be notified
5977 * @link_up: link up or down
5979 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5981 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5984 switch (vsi->type) {
5989 if (!vsi->netdev || !vsi->netdev_registered)
5993 netif_carrier_on(vsi->netdev);
5994 netif_tx_wake_all_queues(vsi->netdev);
5996 netif_carrier_off(vsi->netdev);
5997 netif_tx_stop_all_queues(vsi->netdev);
6001 case I40E_VSI_SRIOV:
6002 case I40E_VSI_VMDQ2:
6004 case I40E_VSI_MIRROR:
6006 /* there is no notification for other VSIs */
6012 * i40e_veb_link_event - notify elements on the veb of a link event
6013 * @veb: veb to be notified
6014 * @link_up: link up or down
6016 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6021 if (!veb || !veb->pf)
6025 /* depth first... */
6026 for (i = 0; i < I40E_MAX_VEB; i++)
6027 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6028 i40e_veb_link_event(pf->veb[i], link_up);
6030 /* ... now the local VSIs */
6031 for (i = 0; i < pf->num_alloc_vsi; i++)
6032 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6033 i40e_vsi_link_event(pf->vsi[i], link_up);
6037 * i40e_link_event - Update netif_carrier status
6038 * @pf: board private structure
6040 static void i40e_link_event(struct i40e_pf *pf)
6042 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6043 u8 new_link_speed, old_link_speed;
6045 bool new_link, old_link;
6047 /* save off old link status information */
6048 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6050 /* set this to force the get_link_status call to refresh state */
6051 pf->hw.phy.get_link_info = true;
6053 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6055 status = i40e_get_link_status(&pf->hw, &new_link);
6057 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6062 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6063 new_link_speed = pf->hw.phy.link_info.link_speed;
6065 if (new_link == old_link &&
6066 new_link_speed == old_link_speed &&
6067 (test_bit(__I40E_DOWN, &vsi->state) ||
6068 new_link == netif_carrier_ok(vsi->netdev)))
6071 if (!test_bit(__I40E_DOWN, &vsi->state))
6072 i40e_print_link_message(vsi, new_link);
6074 /* Notify the base of the switch tree connected to
6075 * the link. Floating VEBs are not notified.
6077 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6078 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6080 i40e_vsi_link_event(vsi, new_link);
6083 i40e_vc_notify_link_state(pf);
6085 if (pf->flags & I40E_FLAG_PTP)
6086 i40e_ptp_set_increment(pf);
6090 * i40e_watchdog_subtask - periodic checks not using event driven response
6091 * @pf: board private structure
6093 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6097 /* if interface is down do nothing */
6098 if (test_bit(__I40E_DOWN, &pf->state) ||
6099 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6102 /* make sure we don't do these things too often */
6103 if (time_before(jiffies, (pf->service_timer_previous +
6104 pf->service_timer_period)))
6106 pf->service_timer_previous = jiffies;
6108 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6109 i40e_link_event(pf);
6111 /* Update the stats for active netdevs so the network stack
6112 * can look at updated numbers whenever it cares to
6114 for (i = 0; i < pf->num_alloc_vsi; i++)
6115 if (pf->vsi[i] && pf->vsi[i]->netdev)
6116 i40e_update_stats(pf->vsi[i]);
6118 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6119 /* Update the stats for the active switching components */
6120 for (i = 0; i < I40E_MAX_VEB; i++)
6122 i40e_update_veb_stats(pf->veb[i]);
6125 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6129 * i40e_reset_subtask - Set up for resetting the device and driver
6130 * @pf: board private structure
6132 static void i40e_reset_subtask(struct i40e_pf *pf)
6134 u32 reset_flags = 0;
6137 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6138 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6139 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6141 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6142 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6143 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6145 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6146 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6147 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6149 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6150 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6151 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6153 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6154 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6155 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6158 /* If there's a recovery already waiting, it takes
6159 * precedence before starting a new reset sequence.
6161 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6162 i40e_handle_reset_warning(pf);
6166 /* If we're already down or resetting, just bail */
6168 !test_bit(__I40E_DOWN, &pf->state) &&
6169 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6170 i40e_do_reset(pf, reset_flags);
6177 * i40e_handle_link_event - Handle link event
6178 * @pf: board private structure
6179 * @e: event info posted on ARQ
6181 static void i40e_handle_link_event(struct i40e_pf *pf,
6182 struct i40e_arq_event_info *e)
6184 struct i40e_aqc_get_link_status *status =
6185 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6187 /* Do a new status request to re-enable LSE reporting
6188 * and load new status information into the hw struct
6189 * This completely ignores any state information
6190 * in the ARQ event info, instead choosing to always
6191 * issue the AQ update link status command.
6193 i40e_link_event(pf);
6195 /* check for unqualified module, if link is down */
6196 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6197 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6198 (!(status->link_info & I40E_AQ_LINK_UP)))
6199 dev_err(&pf->pdev->dev,
6200 "The driver failed to link because an unqualified module was detected.\n");
6204 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6205 * @pf: board private structure
6207 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6209 struct i40e_arq_event_info event;
6210 struct i40e_hw *hw = &pf->hw;
6217 /* Do not run clean AQ when PF reset fails */
6218 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6221 /* check for error indications */
6222 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6224 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6225 if (hw->debug_mask & I40E_DEBUG_AQ)
6226 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6227 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6229 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6230 if (hw->debug_mask & I40E_DEBUG_AQ)
6231 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6232 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6234 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6235 if (hw->debug_mask & I40E_DEBUG_AQ)
6236 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6237 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6240 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6242 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6244 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6245 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6246 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6247 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6249 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6250 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6251 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6252 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6254 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6255 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6256 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6257 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6260 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6262 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6263 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6268 ret = i40e_clean_arq_element(hw, &event, &pending);
6269 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6272 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6276 opcode = le16_to_cpu(event.desc.opcode);
6279 case i40e_aqc_opc_get_link_status:
6280 i40e_handle_link_event(pf, &event);
6282 case i40e_aqc_opc_send_msg_to_pf:
6283 ret = i40e_vc_process_vf_msg(pf,
6284 le16_to_cpu(event.desc.retval),
6285 le32_to_cpu(event.desc.cookie_high),
6286 le32_to_cpu(event.desc.cookie_low),
6290 case i40e_aqc_opc_lldp_update_mib:
6291 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6292 #ifdef CONFIG_I40E_DCB
6294 ret = i40e_handle_lldp_event(pf, &event);
6296 #endif /* CONFIG_I40E_DCB */
6298 case i40e_aqc_opc_event_lan_overflow:
6299 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6300 i40e_handle_lan_overflow_event(pf, &event);
6302 case i40e_aqc_opc_send_msg_to_peer:
6303 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6305 case i40e_aqc_opc_nvm_erase:
6306 case i40e_aqc_opc_nvm_update:
6307 case i40e_aqc_opc_oem_post_update:
6308 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6311 dev_info(&pf->pdev->dev,
6312 "ARQ Error: Unknown event 0x%04x received\n",
6316 } while (pending && (i++ < pf->adminq_work_limit));
6318 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6319 /* re-enable Admin queue interrupt cause */
6320 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6321 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6322 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6325 kfree(event.msg_buf);
6329 * i40e_verify_eeprom - make sure eeprom is good to use
6330 * @pf: board private structure
6332 static void i40e_verify_eeprom(struct i40e_pf *pf)
6336 err = i40e_diag_eeprom_test(&pf->hw);
6338 /* retry in case of garbage read */
6339 err = i40e_diag_eeprom_test(&pf->hw);
6341 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6343 set_bit(__I40E_BAD_EEPROM, &pf->state);
6347 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6348 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6349 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6354 * i40e_enable_pf_switch_lb
6355 * @pf: pointer to the PF structure
6357 * enable switch loop back or die - no point in a return value
6359 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6361 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6362 struct i40e_vsi_context ctxt;
6365 ctxt.seid = pf->main_vsi_seid;
6366 ctxt.pf_num = pf->hw.pf_id;
6368 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6370 dev_info(&pf->pdev->dev,
6371 "couldn't get PF vsi config, err %s aq_err %s\n",
6372 i40e_stat_str(&pf->hw, ret),
6373 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6376 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6377 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6378 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6380 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6382 dev_info(&pf->pdev->dev,
6383 "update vsi switch failed, err %s aq_err %s\n",
6384 i40e_stat_str(&pf->hw, ret),
6385 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6390 * i40e_disable_pf_switch_lb
6391 * @pf: pointer to the PF structure
6393 * disable switch loop back or die - no point in a return value
6395 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6397 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6398 struct i40e_vsi_context ctxt;
6401 ctxt.seid = pf->main_vsi_seid;
6402 ctxt.pf_num = pf->hw.pf_id;
6404 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6406 dev_info(&pf->pdev->dev,
6407 "couldn't get PF vsi config, err %s aq_err %s\n",
6408 i40e_stat_str(&pf->hw, ret),
6409 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6412 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6413 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6414 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6416 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6418 dev_info(&pf->pdev->dev,
6419 "update vsi switch failed, err %s aq_err %s\n",
6420 i40e_stat_str(&pf->hw, ret),
6421 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6426 * i40e_config_bridge_mode - Configure the HW bridge mode
6427 * @veb: pointer to the bridge instance
6429 * Configure the loop back mode for the LAN VSI that is downlink to the
6430 * specified HW bridge instance. It is expected this function is called
6431 * when a new HW bridge is instantiated.
6433 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6435 struct i40e_pf *pf = veb->pf;
6437 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6438 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6439 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6440 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6441 i40e_disable_pf_switch_lb(pf);
6443 i40e_enable_pf_switch_lb(pf);
6447 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6448 * @veb: pointer to the VEB instance
6450 * This is a recursive function that first builds the attached VSIs then
6451 * recurses in to build the next layer of VEB. We track the connections
6452 * through our own index numbers because the seid's from the HW could
6453 * change across the reset.
6455 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6457 struct i40e_vsi *ctl_vsi = NULL;
6458 struct i40e_pf *pf = veb->pf;
6462 /* build VSI that owns this VEB, temporarily attached to base VEB */
6463 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6465 pf->vsi[v]->veb_idx == veb->idx &&
6466 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6467 ctl_vsi = pf->vsi[v];
6472 dev_info(&pf->pdev->dev,
6473 "missing owner VSI for veb_idx %d\n", veb->idx);
6475 goto end_reconstitute;
6477 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6478 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6479 ret = i40e_add_vsi(ctl_vsi);
6481 dev_info(&pf->pdev->dev,
6482 "rebuild of veb_idx %d owner VSI failed: %d\n",
6484 goto end_reconstitute;
6486 i40e_vsi_reset_stats(ctl_vsi);
6488 /* create the VEB in the switch and move the VSI onto the VEB */
6489 ret = i40e_add_veb(veb, ctl_vsi);
6491 goto end_reconstitute;
6493 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6494 veb->bridge_mode = BRIDGE_MODE_VEB;
6496 veb->bridge_mode = BRIDGE_MODE_VEPA;
6497 i40e_config_bridge_mode(veb);
6499 /* create the remaining VSIs attached to this VEB */
6500 for (v = 0; v < pf->num_alloc_vsi; v++) {
6501 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6504 if (pf->vsi[v]->veb_idx == veb->idx) {
6505 struct i40e_vsi *vsi = pf->vsi[v];
6507 vsi->uplink_seid = veb->seid;
6508 ret = i40e_add_vsi(vsi);
6510 dev_info(&pf->pdev->dev,
6511 "rebuild of vsi_idx %d failed: %d\n",
6513 goto end_reconstitute;
6515 i40e_vsi_reset_stats(vsi);
6519 /* create any VEBs attached to this VEB - RECURSION */
6520 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6521 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6522 pf->veb[veb_idx]->uplink_seid = veb->seid;
6523 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6534 * i40e_get_capabilities - get info about the HW
6535 * @pf: the PF struct
6537 static int i40e_get_capabilities(struct i40e_pf *pf)
6539 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6544 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6546 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6550 /* this loads the data into the hw struct for us */
6551 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6553 i40e_aqc_opc_list_func_capabilities,
6555 /* data loaded, buffer no longer needed */
6558 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6559 /* retry with a larger buffer */
6560 buf_len = data_size;
6561 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6562 dev_info(&pf->pdev->dev,
6563 "capability discovery failed, err %s aq_err %s\n",
6564 i40e_stat_str(&pf->hw, err),
6565 i40e_aq_str(&pf->hw,
6566 pf->hw.aq.asq_last_status));
6571 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6572 dev_info(&pf->pdev->dev,
6573 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6574 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6575 pf->hw.func_caps.num_msix_vectors,
6576 pf->hw.func_caps.num_msix_vectors_vf,
6577 pf->hw.func_caps.fd_filters_guaranteed,
6578 pf->hw.func_caps.fd_filters_best_effort,
6579 pf->hw.func_caps.num_tx_qp,
6580 pf->hw.func_caps.num_vsis);
6582 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6583 + pf->hw.func_caps.num_vfs)
6584 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6585 dev_info(&pf->pdev->dev,
6586 "got num_vsis %d, setting num_vsis to %d\n",
6587 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6588 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6594 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6597 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6598 * @pf: board private structure
6600 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6602 struct i40e_vsi *vsi;
6605 /* quick workaround for an NVM issue that leaves a critical register
6608 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6609 static const u32 hkey[] = {
6610 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6611 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6612 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6615 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6616 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6619 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6622 /* find existing VSI and see if it needs configuring */
6624 for (i = 0; i < pf->num_alloc_vsi; i++) {
6625 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6631 /* create a new VSI if none exists */
6633 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6634 pf->vsi[pf->lan_vsi]->seid, 0);
6636 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6637 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6642 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6646 * i40e_fdir_teardown - release the Flow Director resources
6647 * @pf: board private structure
6649 static void i40e_fdir_teardown(struct i40e_pf *pf)
6653 i40e_fdir_filter_exit(pf);
6654 for (i = 0; i < pf->num_alloc_vsi; i++) {
6655 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6656 i40e_vsi_release(pf->vsi[i]);
6663 * i40e_prep_for_reset - prep for the core to reset
6664 * @pf: board private structure
6666 * Close up the VFs and other things in prep for PF Reset.
6668 static void i40e_prep_for_reset(struct i40e_pf *pf)
6670 struct i40e_hw *hw = &pf->hw;
6671 i40e_status ret = 0;
6674 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6675 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6678 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6680 /* quiesce the VSIs and their queues that are not already DOWN */
6681 i40e_pf_quiesce_all_vsi(pf);
6683 for (v = 0; v < pf->num_alloc_vsi; v++) {
6685 pf->vsi[v]->seid = 0;
6688 i40e_shutdown_adminq(&pf->hw);
6690 /* call shutdown HMC */
6691 if (hw->hmc.hmc_obj) {
6692 ret = i40e_shutdown_lan_hmc(hw);
6694 dev_warn(&pf->pdev->dev,
6695 "shutdown_lan_hmc failed: %d\n", ret);
6700 * i40e_send_version - update firmware with driver version
6703 static void i40e_send_version(struct i40e_pf *pf)
6705 struct i40e_driver_version dv;
6707 dv.major_version = DRV_VERSION_MAJOR;
6708 dv.minor_version = DRV_VERSION_MINOR;
6709 dv.build_version = DRV_VERSION_BUILD;
6710 dv.subbuild_version = 0;
6711 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6712 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6716 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6717 * @pf: board private structure
6718 * @reinit: if the Main VSI needs to re-initialized.
6720 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6722 struct i40e_hw *hw = &pf->hw;
6723 u8 set_fc_aq_fail = 0;
6728 /* Now we wait for GRST to settle out.
6729 * We don't have to delete the VEBs or VSIs from the hw switch
6730 * because the reset will make them disappear.
6732 ret = i40e_pf_reset(hw);
6734 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6735 set_bit(__I40E_RESET_FAILED, &pf->state);
6736 goto clear_recovery;
6740 if (test_bit(__I40E_DOWN, &pf->state))
6741 goto clear_recovery;
6742 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6744 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6745 ret = i40e_init_adminq(&pf->hw);
6747 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6748 i40e_stat_str(&pf->hw, ret),
6749 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6750 goto clear_recovery;
6753 /* re-verify the eeprom if we just had an EMP reset */
6754 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6755 i40e_verify_eeprom(pf);
6757 i40e_clear_pxe_mode(hw);
6758 ret = i40e_get_capabilities(pf);
6760 goto end_core_reset;
6762 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6763 hw->func_caps.num_rx_qp,
6764 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6766 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6767 goto end_core_reset;
6769 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6771 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6772 goto end_core_reset;
6775 #ifdef CONFIG_I40E_DCB
6776 ret = i40e_init_pf_dcb(pf);
6778 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6779 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6780 /* Continue without DCB enabled */
6782 #endif /* CONFIG_I40E_DCB */
6784 i40e_init_pf_fcoe(pf);
6787 /* do basic switch setup */
6788 ret = i40e_setup_pf_switch(pf, reinit);
6790 goto end_core_reset;
6792 /* driver is only interested in link up/down and module qualification
6793 * reports from firmware
6795 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6796 I40E_AQ_EVENT_LINK_UPDOWN |
6797 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6799 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6800 i40e_stat_str(&pf->hw, ret),
6801 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6803 /* make sure our flow control settings are restored */
6804 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6806 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6807 i40e_stat_str(&pf->hw, ret),
6808 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6810 /* Rebuild the VSIs and VEBs that existed before reset.
6811 * They are still in our local switch element arrays, so only
6812 * need to rebuild the switch model in the HW.
6814 * If there were VEBs but the reconstitution failed, we'll try
6815 * try to recover minimal use by getting the basic PF VSI working.
6817 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6818 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6819 /* find the one VEB connected to the MAC, and find orphans */
6820 for (v = 0; v < I40E_MAX_VEB; v++) {
6824 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6825 pf->veb[v]->uplink_seid == 0) {
6826 ret = i40e_reconstitute_veb(pf->veb[v]);
6831 /* If Main VEB failed, we're in deep doodoo,
6832 * so give up rebuilding the switch and set up
6833 * for minimal rebuild of PF VSI.
6834 * If orphan failed, we'll report the error
6835 * but try to keep going.
6837 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6838 dev_info(&pf->pdev->dev,
6839 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6841 pf->vsi[pf->lan_vsi]->uplink_seid
6844 } else if (pf->veb[v]->uplink_seid == 0) {
6845 dev_info(&pf->pdev->dev,
6846 "rebuild of orphan VEB failed: %d\n",
6853 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6854 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6855 /* no VEB, so rebuild only the Main VSI */
6856 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6858 dev_info(&pf->pdev->dev,
6859 "rebuild of Main VSI failed: %d\n", ret);
6860 goto end_core_reset;
6864 /* Reconfigure hardware for allowing smaller MSS in the case
6865 * of TSO, so that we avoid the MDD being fired and causing
6866 * a reset in the case of small MSS+TSO.
6868 #define I40E_REG_MSS 0x000E64DC
6869 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6870 #define I40E_64BYTE_MSS 0x400000
6871 val = rd32(hw, I40E_REG_MSS);
6872 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6873 val &= ~I40E_REG_MSS_MIN_MASK;
6874 val |= I40E_64BYTE_MSS;
6875 wr32(hw, I40E_REG_MSS, val);
6878 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6879 (pf->hw.aq.fw_maj_ver < 4)) {
6881 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6883 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6884 i40e_stat_str(&pf->hw, ret),
6885 i40e_aq_str(&pf->hw,
6886 pf->hw.aq.asq_last_status));
6888 /* reinit the misc interrupt */
6889 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6890 ret = i40e_setup_misc_vector(pf);
6892 /* Add a filter to drop all Flow control frames from any VSI from being
6893 * transmitted. By doing so we stop a malicious VF from sending out
6894 * PAUSE or PFC frames and potentially controlling traffic for other
6896 * The FW can still send Flow control frames if enabled.
6898 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6901 /* restart the VSIs that were rebuilt and running before the reset */
6902 i40e_pf_unquiesce_all_vsi(pf);
6904 if (pf->num_alloc_vfs) {
6905 for (v = 0; v < pf->num_alloc_vfs; v++)
6906 i40e_reset_vf(&pf->vf[v], true);
6909 /* tell the firmware that we're starting */
6910 i40e_send_version(pf);
6913 clear_bit(__I40E_RESET_FAILED, &pf->state);
6915 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6919 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6920 * @pf: board private structure
6922 * Close up the VFs and other things in prep for a Core Reset,
6923 * then get ready to rebuild the world.
6925 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6927 i40e_prep_for_reset(pf);
6928 i40e_reset_and_rebuild(pf, false);
6932 * i40e_handle_mdd_event
6933 * @pf: pointer to the PF structure
6935 * Called from the MDD irq handler to identify possibly malicious vfs
6937 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6939 struct i40e_hw *hw = &pf->hw;
6940 bool mdd_detected = false;
6941 bool pf_mdd_detected = false;
6946 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6949 /* find what triggered the MDD event */
6950 reg = rd32(hw, I40E_GL_MDET_TX);
6951 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6952 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6953 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6954 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6955 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6956 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6957 I40E_GL_MDET_TX_EVENT_SHIFT;
6958 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6959 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6960 pf->hw.func_caps.base_queue;
6961 if (netif_msg_tx_err(pf))
6962 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6963 event, queue, pf_num, vf_num);
6964 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6965 mdd_detected = true;
6967 reg = rd32(hw, I40E_GL_MDET_RX);
6968 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6969 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6970 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6971 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6972 I40E_GL_MDET_RX_EVENT_SHIFT;
6973 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6974 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6975 pf->hw.func_caps.base_queue;
6976 if (netif_msg_rx_err(pf))
6977 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6978 event, queue, func);
6979 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6980 mdd_detected = true;
6984 reg = rd32(hw, I40E_PF_MDET_TX);
6985 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6986 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6987 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6988 pf_mdd_detected = true;
6990 reg = rd32(hw, I40E_PF_MDET_RX);
6991 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6992 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6993 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6994 pf_mdd_detected = true;
6996 /* Queue belongs to the PF, initiate a reset */
6997 if (pf_mdd_detected) {
6998 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6999 i40e_service_event_schedule(pf);
7003 /* see if one of the VFs needs its hand slapped */
7004 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7006 reg = rd32(hw, I40E_VP_MDET_TX(i));
7007 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7008 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7009 vf->num_mdd_events++;
7010 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7014 reg = rd32(hw, I40E_VP_MDET_RX(i));
7015 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7016 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7017 vf->num_mdd_events++;
7018 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7022 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7023 dev_info(&pf->pdev->dev,
7024 "Too many MDD events on VF %d, disabled\n", i);
7025 dev_info(&pf->pdev->dev,
7026 "Use PF Control I/F to re-enable the VF\n");
7027 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7031 /* re-enable mdd interrupt cause */
7032 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7033 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7034 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7035 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7039 #ifdef CONFIG_I40E_VXLAN
7041 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
7042 * @pf: board private structure
7044 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
7046 struct i40e_hw *hw = &pf->hw;
7051 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
7054 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
7056 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7057 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
7058 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
7059 port = pf->vxlan_ports[i];
7061 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7062 I40E_AQC_TUNNEL_TYPE_VXLAN,
7065 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7068 dev_info(&pf->pdev->dev,
7069 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7070 port ? "add" : "delete",
7072 i40e_stat_str(&pf->hw, ret),
7073 i40e_aq_str(&pf->hw,
7074 pf->hw.aq.asq_last_status));
7075 pf->vxlan_ports[i] = 0;
7083 * i40e_service_task - Run the driver's async subtasks
7084 * @work: pointer to work_struct containing our data
7086 static void i40e_service_task(struct work_struct *work)
7088 struct i40e_pf *pf = container_of(work,
7091 unsigned long start_time = jiffies;
7093 /* don't bother with service tasks if a reset is in progress */
7094 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7095 i40e_service_event_complete(pf);
7099 i40e_detect_recover_hung(pf);
7100 i40e_reset_subtask(pf);
7101 i40e_handle_mdd_event(pf);
7102 i40e_vc_process_vflr_event(pf);
7103 i40e_watchdog_subtask(pf);
7104 i40e_fdir_reinit_subtask(pf);
7105 i40e_sync_filters_subtask(pf);
7106 #ifdef CONFIG_I40E_VXLAN
7107 i40e_sync_vxlan_filters_subtask(pf);
7109 i40e_clean_adminq_subtask(pf);
7111 i40e_service_event_complete(pf);
7113 /* If the tasks have taken longer than one timer cycle or there
7114 * is more work to be done, reschedule the service task now
7115 * rather than wait for the timer to tick again.
7117 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7118 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7119 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7120 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7121 i40e_service_event_schedule(pf);
7125 * i40e_service_timer - timer callback
7126 * @data: pointer to PF struct
7128 static void i40e_service_timer(unsigned long data)
7130 struct i40e_pf *pf = (struct i40e_pf *)data;
7132 mod_timer(&pf->service_timer,
7133 round_jiffies(jiffies + pf->service_timer_period));
7134 i40e_service_event_schedule(pf);
7138 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7139 * @vsi: the VSI being configured
7141 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7143 struct i40e_pf *pf = vsi->back;
7145 switch (vsi->type) {
7147 vsi->alloc_queue_pairs = pf->num_lan_qps;
7148 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7149 I40E_REQ_DESCRIPTOR_MULTIPLE);
7150 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7151 vsi->num_q_vectors = pf->num_lan_msix;
7153 vsi->num_q_vectors = 1;
7158 vsi->alloc_queue_pairs = 1;
7159 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7160 I40E_REQ_DESCRIPTOR_MULTIPLE);
7161 vsi->num_q_vectors = 1;
7164 case I40E_VSI_VMDQ2:
7165 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7166 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7167 I40E_REQ_DESCRIPTOR_MULTIPLE);
7168 vsi->num_q_vectors = pf->num_vmdq_msix;
7171 case I40E_VSI_SRIOV:
7172 vsi->alloc_queue_pairs = pf->num_vf_qps;
7173 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7174 I40E_REQ_DESCRIPTOR_MULTIPLE);
7179 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7180 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7181 I40E_REQ_DESCRIPTOR_MULTIPLE);
7182 vsi->num_q_vectors = pf->num_fcoe_msix;
7185 #endif /* I40E_FCOE */
7195 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7196 * @type: VSI pointer
7197 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7199 * On error: returns error code (negative)
7200 * On success: returns 0
7202 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7207 /* allocate memory for both Tx and Rx ring pointers */
7208 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7209 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7212 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7214 if (alloc_qvectors) {
7215 /* allocate memory for q_vector pointers */
7216 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7217 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7218 if (!vsi->q_vectors) {
7226 kfree(vsi->tx_rings);
7231 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7232 * @pf: board private structure
7233 * @type: type of VSI
7235 * On error: returns error code (negative)
7236 * On success: returns vsi index in PF (positive)
7238 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7241 struct i40e_vsi *vsi;
7245 /* Need to protect the allocation of the VSIs at the PF level */
7246 mutex_lock(&pf->switch_mutex);
7248 /* VSI list may be fragmented if VSI creation/destruction has
7249 * been happening. We can afford to do a quick scan to look
7250 * for any free VSIs in the list.
7252 * find next empty vsi slot, looping back around if necessary
7255 while (i < pf->num_alloc_vsi && pf->vsi[i])
7257 if (i >= pf->num_alloc_vsi) {
7259 while (i < pf->next_vsi && pf->vsi[i])
7263 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7264 vsi_idx = i; /* Found one! */
7267 goto unlock_pf; /* out of VSI slots! */
7271 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7278 set_bit(__I40E_DOWN, &vsi->state);
7281 vsi->rx_itr_setting = pf->rx_itr_default;
7282 vsi->tx_itr_setting = pf->tx_itr_default;
7283 vsi->int_rate_limit = 0;
7284 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7285 pf->rss_table_size : 64;
7286 vsi->netdev_registered = false;
7287 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7288 INIT_LIST_HEAD(&vsi->mac_filter_list);
7289 vsi->irqs_ready = false;
7291 ret = i40e_set_num_rings_in_vsi(vsi);
7295 ret = i40e_vsi_alloc_arrays(vsi, true);
7299 /* Setup default MSIX irq handler for VSI */
7300 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7302 /* Initialize VSI lock */
7303 spin_lock_init(&vsi->mac_filter_list_lock);
7304 pf->vsi[vsi_idx] = vsi;
7309 pf->next_vsi = i - 1;
7312 mutex_unlock(&pf->switch_mutex);
7317 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7318 * @type: VSI pointer
7319 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7321 * On error: returns error code (negative)
7322 * On success: returns 0
7324 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7326 /* free the ring and vector containers */
7327 if (free_qvectors) {
7328 kfree(vsi->q_vectors);
7329 vsi->q_vectors = NULL;
7331 kfree(vsi->tx_rings);
7332 vsi->tx_rings = NULL;
7333 vsi->rx_rings = NULL;
7337 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7339 * @vsi: Pointer to VSI structure
7341 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7346 kfree(vsi->rss_hkey_user);
7347 vsi->rss_hkey_user = NULL;
7349 kfree(vsi->rss_lut_user);
7350 vsi->rss_lut_user = NULL;
7354 * i40e_vsi_clear - Deallocate the VSI provided
7355 * @vsi: the VSI being un-configured
7357 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7368 mutex_lock(&pf->switch_mutex);
7369 if (!pf->vsi[vsi->idx]) {
7370 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7371 vsi->idx, vsi->idx, vsi, vsi->type);
7375 if (pf->vsi[vsi->idx] != vsi) {
7376 dev_err(&pf->pdev->dev,
7377 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7378 pf->vsi[vsi->idx]->idx,
7380 pf->vsi[vsi->idx]->type,
7381 vsi->idx, vsi, vsi->type);
7385 /* updates the PF for this cleared vsi */
7386 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7387 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7389 i40e_vsi_free_arrays(vsi, true);
7390 i40e_clear_rss_config_user(vsi);
7392 pf->vsi[vsi->idx] = NULL;
7393 if (vsi->idx < pf->next_vsi)
7394 pf->next_vsi = vsi->idx;
7397 mutex_unlock(&pf->switch_mutex);
7405 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7406 * @vsi: the VSI being cleaned
7408 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7412 if (vsi->tx_rings && vsi->tx_rings[0]) {
7413 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7414 kfree_rcu(vsi->tx_rings[i], rcu);
7415 vsi->tx_rings[i] = NULL;
7416 vsi->rx_rings[i] = NULL;
7422 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7423 * @vsi: the VSI being configured
7425 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7427 struct i40e_ring *tx_ring, *rx_ring;
7428 struct i40e_pf *pf = vsi->back;
7431 /* Set basic values in the rings to be used later during open() */
7432 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7433 /* allocate space for both Tx and Rx in one shot */
7434 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7438 tx_ring->queue_index = i;
7439 tx_ring->reg_idx = vsi->base_queue + i;
7440 tx_ring->ring_active = false;
7442 tx_ring->netdev = vsi->netdev;
7443 tx_ring->dev = &pf->pdev->dev;
7444 tx_ring->count = vsi->num_desc;
7446 tx_ring->dcb_tc = 0;
7447 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7448 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7449 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7450 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7451 vsi->tx_rings[i] = tx_ring;
7453 rx_ring = &tx_ring[1];
7454 rx_ring->queue_index = i;
7455 rx_ring->reg_idx = vsi->base_queue + i;
7456 rx_ring->ring_active = false;
7458 rx_ring->netdev = vsi->netdev;
7459 rx_ring->dev = &pf->pdev->dev;
7460 rx_ring->count = vsi->num_desc;
7462 rx_ring->dcb_tc = 0;
7463 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7464 set_ring_16byte_desc_enabled(rx_ring);
7466 clear_ring_16byte_desc_enabled(rx_ring);
7467 vsi->rx_rings[i] = rx_ring;
7473 i40e_vsi_clear_rings(vsi);
7478 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7479 * @pf: board private structure
7480 * @vectors: the number of MSI-X vectors to request
7482 * Returns the number of vectors reserved, or error
7484 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7486 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7487 I40E_MIN_MSIX, vectors);
7489 dev_info(&pf->pdev->dev,
7490 "MSI-X vector reservation failed: %d\n", vectors);
7498 * i40e_init_msix - Setup the MSIX capability
7499 * @pf: board private structure
7501 * Work with the OS to set up the MSIX vectors needed.
7503 * Returns the number of vectors reserved or negative on failure
7505 static int i40e_init_msix(struct i40e_pf *pf)
7507 struct i40e_hw *hw = &pf->hw;
7512 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7515 /* The number of vectors we'll request will be comprised of:
7516 * - Add 1 for "other" cause for Admin Queue events, etc.
7517 * - The number of LAN queue pairs
7518 * - Queues being used for RSS.
7519 * We don't need as many as max_rss_size vectors.
7520 * use rss_size instead in the calculation since that
7521 * is governed by number of cpus in the system.
7522 * - assumes symmetric Tx/Rx pairing
7523 * - The number of VMDq pairs
7525 * - The number of FCOE qps.
7527 * Once we count this up, try the request.
7529 * If we can't get what we want, we'll simplify to nearly nothing
7530 * and try again. If that still fails, we punt.
7532 vectors_left = hw->func_caps.num_msix_vectors;
7535 /* reserve one vector for miscellaneous handler */
7541 /* reserve vectors for the main PF traffic queues */
7542 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7543 vectors_left -= pf->num_lan_msix;
7544 v_budget += pf->num_lan_msix;
7546 /* reserve one vector for sideband flow director */
7547 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7552 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7557 /* can we reserve enough for FCoE? */
7558 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7560 pf->num_fcoe_msix = 0;
7561 else if (vectors_left >= pf->num_fcoe_qps)
7562 pf->num_fcoe_msix = pf->num_fcoe_qps;
7564 pf->num_fcoe_msix = 1;
7565 v_budget += pf->num_fcoe_msix;
7566 vectors_left -= pf->num_fcoe_msix;
7570 /* any vectors left over go for VMDq support */
7571 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7572 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7573 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7575 /* if we're short on vectors for what's desired, we limit
7576 * the queues per vmdq. If this is still more than are
7577 * available, the user will need to change the number of
7578 * queues/vectors used by the PF later with the ethtool
7581 if (vmdq_vecs < vmdq_vecs_wanted)
7582 pf->num_vmdq_qps = 1;
7583 pf->num_vmdq_msix = pf->num_vmdq_qps;
7585 v_budget += vmdq_vecs;
7586 vectors_left -= vmdq_vecs;
7589 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7591 if (!pf->msix_entries)
7594 for (i = 0; i < v_budget; i++)
7595 pf->msix_entries[i].entry = i;
7596 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7598 if (v_actual != v_budget) {
7599 /* If we have limited resources, we will start with no vectors
7600 * for the special features and then allocate vectors to some
7601 * of these features based on the policy and at the end disable
7602 * the features that did not get any vectors.
7605 pf->num_fcoe_qps = 0;
7606 pf->num_fcoe_msix = 0;
7608 pf->num_vmdq_msix = 0;
7611 if (v_actual < I40E_MIN_MSIX) {
7612 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7613 kfree(pf->msix_entries);
7614 pf->msix_entries = NULL;
7617 } else if (v_actual == I40E_MIN_MSIX) {
7618 /* Adjust for minimal MSIX use */
7619 pf->num_vmdq_vsis = 0;
7620 pf->num_vmdq_qps = 0;
7621 pf->num_lan_qps = 1;
7622 pf->num_lan_msix = 1;
7624 } else if (v_actual != v_budget) {
7627 /* reserve the misc vector */
7630 /* Scale vector usage down */
7631 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7632 pf->num_vmdq_vsis = 1;
7633 pf->num_vmdq_qps = 1;
7634 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7636 /* partition out the remaining vectors */
7639 pf->num_lan_msix = 1;
7643 /* give one vector to FCoE */
7644 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7645 pf->num_lan_msix = 1;
7646 pf->num_fcoe_msix = 1;
7649 pf->num_lan_msix = 2;
7654 /* give one vector to FCoE */
7655 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7656 pf->num_fcoe_msix = 1;
7660 /* give the rest to the PF */
7661 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7666 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7667 (pf->num_vmdq_msix == 0)) {
7668 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7669 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7673 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7674 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7675 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7682 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7683 * @vsi: the VSI being configured
7684 * @v_idx: index of the vector in the vsi struct
7686 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7688 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7690 struct i40e_q_vector *q_vector;
7692 /* allocate q_vector */
7693 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7697 q_vector->vsi = vsi;
7698 q_vector->v_idx = v_idx;
7699 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7701 netif_napi_add(vsi->netdev, &q_vector->napi,
7702 i40e_napi_poll, NAPI_POLL_WEIGHT);
7704 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7705 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7707 /* tie q_vector and vsi together */
7708 vsi->q_vectors[v_idx] = q_vector;
7714 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7715 * @vsi: the VSI being configured
7717 * We allocate one q_vector per queue interrupt. If allocation fails we
7720 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7722 struct i40e_pf *pf = vsi->back;
7723 int v_idx, num_q_vectors;
7726 /* if not MSIX, give the one vector only to the LAN VSI */
7727 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7728 num_q_vectors = vsi->num_q_vectors;
7729 else if (vsi == pf->vsi[pf->lan_vsi])
7734 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7735 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7744 i40e_free_q_vector(vsi, v_idx);
7750 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7751 * @pf: board private structure to initialize
7753 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7758 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7759 vectors = i40e_init_msix(pf);
7761 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7763 I40E_FLAG_FCOE_ENABLED |
7765 I40E_FLAG_RSS_ENABLED |
7766 I40E_FLAG_DCB_CAPABLE |
7767 I40E_FLAG_SRIOV_ENABLED |
7768 I40E_FLAG_FD_SB_ENABLED |
7769 I40E_FLAG_FD_ATR_ENABLED |
7770 I40E_FLAG_VMDQ_ENABLED);
7772 /* rework the queue expectations without MSIX */
7773 i40e_determine_queue_usage(pf);
7777 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7778 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7779 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7780 vectors = pci_enable_msi(pf->pdev);
7782 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7784 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7786 vectors = 1; /* one MSI or Legacy vector */
7789 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7790 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7792 /* set up vector assignment tracking */
7793 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7794 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7795 if (!pf->irq_pile) {
7796 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7799 pf->irq_pile->num_entries = vectors;
7800 pf->irq_pile->search_hint = 0;
7802 /* track first vector for misc interrupts, ignore return */
7803 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7809 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7810 * @pf: board private structure
7812 * This sets up the handler for MSIX 0, which is used to manage the
7813 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7814 * when in MSI or Legacy interrupt mode.
7816 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7818 struct i40e_hw *hw = &pf->hw;
7821 /* Only request the irq if this is the first time through, and
7822 * not when we're rebuilding after a Reset
7824 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7825 err = request_irq(pf->msix_entries[0].vector,
7826 i40e_intr, 0, pf->int_name, pf);
7828 dev_info(&pf->pdev->dev,
7829 "request_irq for %s failed: %d\n",
7835 i40e_enable_misc_int_causes(pf);
7837 /* associate no queues to the misc vector */
7838 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7839 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7843 i40e_irq_dynamic_enable_icr0(pf);
7849 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7850 * @vsi: vsi structure
7851 * @seed: RSS hash seed
7853 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7854 u8 *lut, u16 lut_size)
7856 struct i40e_aqc_get_set_rss_key_data rss_key;
7857 struct i40e_pf *pf = vsi->back;
7858 struct i40e_hw *hw = &pf->hw;
7859 bool pf_lut = false;
7863 memset(&rss_key, 0, sizeof(rss_key));
7864 memcpy(&rss_key, seed, sizeof(rss_key));
7866 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7870 /* Populate the LUT with max no. of queues in round robin fashion */
7871 for (i = 0; i < vsi->rss_table_size; i++)
7872 rss_lut[i] = i % vsi->rss_size;
7874 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7876 dev_info(&pf->pdev->dev,
7877 "Cannot set RSS key, err %s aq_err %s\n",
7878 i40e_stat_str(&pf->hw, ret),
7879 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7880 goto config_rss_aq_out;
7883 if (vsi->type == I40E_VSI_MAIN)
7886 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7887 vsi->rss_table_size);
7889 dev_info(&pf->pdev->dev,
7890 "Cannot set RSS lut, err %s aq_err %s\n",
7891 i40e_stat_str(&pf->hw, ret),
7892 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7900 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7901 * @vsi: VSI structure
7903 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7905 u8 seed[I40E_HKEY_ARRAY_SIZE];
7906 struct i40e_pf *pf = vsi->back;
7910 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7913 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7917 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7918 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7919 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7920 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7927 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7928 * @vsi: Pointer to vsi structure
7929 * @seed: RSS hash seed
7930 * @lut: Lookup table
7931 * @lut_size: Lookup table size
7933 * Returns 0 on success, negative on failure
7935 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7936 const u8 *lut, u16 lut_size)
7938 struct i40e_pf *pf = vsi->back;
7939 struct i40e_hw *hw = &pf->hw;
7942 /* Fill out hash function seed */
7944 u32 *seed_dw = (u32 *)seed;
7946 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7947 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7951 u32 *lut_dw = (u32 *)lut;
7953 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7956 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7957 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
7965 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
7966 * @vsi: Pointer to VSI structure
7967 * @seed: Buffer to store the keys
7968 * @lut: Buffer to store the lookup table entries
7969 * @lut_size: Size of buffer to store the lookup table entries
7971 * Returns 0 on success, negative on failure
7973 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
7974 u8 *lut, u16 lut_size)
7976 struct i40e_pf *pf = vsi->back;
7977 struct i40e_hw *hw = &pf->hw;
7981 u32 *seed_dw = (u32 *)seed;
7983 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7984 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
7987 u32 *lut_dw = (u32 *)lut;
7989 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7991 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7992 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
7999 * i40e_config_rss - Configure RSS keys and lut
8000 * @vsi: Pointer to VSI structure
8001 * @seed: RSS hash seed
8002 * @lut: Lookup table
8003 * @lut_size: Lookup table size
8005 * Returns 0 on success, negative on failure
8007 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8009 struct i40e_pf *pf = vsi->back;
8011 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8012 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8014 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8018 * i40e_get_rss - Get RSS keys and lut
8019 * @vsi: Pointer to VSI structure
8020 * @seed: Buffer to store the keys
8021 * @lut: Buffer to store the lookup table entries
8022 * lut_size: Size of buffer to store the lookup table entries
8024 * Returns 0 on success, negative on failure
8026 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8028 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8032 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8033 * @pf: Pointer to board private structure
8034 * @lut: Lookup table
8035 * @rss_table_size: Lookup table size
8036 * @rss_size: Range of queue number for hashing
8038 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8039 u16 rss_table_size, u16 rss_size)
8043 for (i = 0; i < rss_table_size; i++)
8044 lut[i] = i % rss_size;
8048 * i40e_pf_config_rss - Prepare for RSS if used
8049 * @pf: board private structure
8051 static int i40e_pf_config_rss(struct i40e_pf *pf)
8053 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8054 u8 seed[I40E_HKEY_ARRAY_SIZE];
8056 struct i40e_hw *hw = &pf->hw;
8061 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8062 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8063 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8064 hena |= i40e_pf_get_default_rss_hena(pf);
8066 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8067 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8069 /* Determine the RSS table size based on the hardware capabilities */
8070 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8071 reg_val = (pf->rss_table_size == 512) ?
8072 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8073 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8074 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8076 /* Determine the RSS size of the VSI */
8078 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8079 vsi->num_queue_pairs);
8081 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8085 /* Use user configured lut if there is one, otherwise use default */
8086 if (vsi->rss_lut_user)
8087 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8089 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8091 /* Use user configured hash key if there is one, otherwise
8094 if (vsi->rss_hkey_user)
8095 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8097 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8098 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8105 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8106 * @pf: board private structure
8107 * @queue_count: the requested queue count for rss.
8109 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8110 * count which may be different from the requested queue count.
8112 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8114 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8117 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8120 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8122 if (queue_count != vsi->num_queue_pairs) {
8123 vsi->req_queue_pairs = queue_count;
8124 i40e_prep_for_reset(pf);
8126 pf->alloc_rss_size = new_rss_size;
8128 i40e_reset_and_rebuild(pf, true);
8130 /* Discard the user configured hash keys and lut, if less
8131 * queues are enabled.
8133 if (queue_count < vsi->rss_size) {
8134 i40e_clear_rss_config_user(vsi);
8135 dev_dbg(&pf->pdev->dev,
8136 "discard user configured hash keys and lut\n");
8139 /* Reset vsi->rss_size, as number of enabled queues changed */
8140 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8141 vsi->num_queue_pairs);
8143 i40e_pf_config_rss(pf);
8145 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8146 pf->alloc_rss_size, pf->rss_size_max);
8147 return pf->alloc_rss_size;
8151 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8152 * @pf: board private structure
8154 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8157 bool min_valid, max_valid;
8160 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8161 &min_valid, &max_valid);
8165 pf->npar_min_bw = min_bw;
8167 pf->npar_max_bw = max_bw;
8174 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8175 * @pf: board private structure
8177 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8179 struct i40e_aqc_configure_partition_bw_data bw_data;
8182 /* Set the valid bit for this PF */
8183 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8184 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8185 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8187 /* Set the new bandwidths */
8188 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8194 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8195 * @pf: board private structure
8197 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8199 /* Commit temporary BW setting to permanent NVM image */
8200 enum i40e_admin_queue_err last_aq_status;
8204 if (pf->hw.partition_id != 1) {
8205 dev_info(&pf->pdev->dev,
8206 "Commit BW only works on partition 1! This is partition %d",
8207 pf->hw.partition_id);
8208 ret = I40E_NOT_SUPPORTED;
8212 /* Acquire NVM for read access */
8213 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8214 last_aq_status = pf->hw.aq.asq_last_status;
8216 dev_info(&pf->pdev->dev,
8217 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8218 i40e_stat_str(&pf->hw, ret),
8219 i40e_aq_str(&pf->hw, last_aq_status));
8223 /* Read word 0x10 of NVM - SW compatibility word 1 */
8224 ret = i40e_aq_read_nvm(&pf->hw,
8225 I40E_SR_NVM_CONTROL_WORD,
8226 0x10, sizeof(nvm_word), &nvm_word,
8228 /* Save off last admin queue command status before releasing
8231 last_aq_status = pf->hw.aq.asq_last_status;
8232 i40e_release_nvm(&pf->hw);
8234 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8235 i40e_stat_str(&pf->hw, ret),
8236 i40e_aq_str(&pf->hw, last_aq_status));
8240 /* Wait a bit for NVM release to complete */
8243 /* Acquire NVM for write access */
8244 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8245 last_aq_status = pf->hw.aq.asq_last_status;
8247 dev_info(&pf->pdev->dev,
8248 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8249 i40e_stat_str(&pf->hw, ret),
8250 i40e_aq_str(&pf->hw, last_aq_status));
8253 /* Write it back out unchanged to initiate update NVM,
8254 * which will force a write of the shadow (alt) RAM to
8255 * the NVM - thus storing the bandwidth values permanently.
8257 ret = i40e_aq_update_nvm(&pf->hw,
8258 I40E_SR_NVM_CONTROL_WORD,
8259 0x10, sizeof(nvm_word),
8260 &nvm_word, true, NULL);
8261 /* Save off last admin queue command status before releasing
8264 last_aq_status = pf->hw.aq.asq_last_status;
8265 i40e_release_nvm(&pf->hw);
8267 dev_info(&pf->pdev->dev,
8268 "BW settings NOT SAVED, err %s aq_err %s\n",
8269 i40e_stat_str(&pf->hw, ret),
8270 i40e_aq_str(&pf->hw, last_aq_status));
8277 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8278 * @pf: board private structure to initialize
8280 * i40e_sw_init initializes the Adapter private data structure.
8281 * Fields are initialized based on PCI device information and
8282 * OS network device settings (MTU size).
8284 static int i40e_sw_init(struct i40e_pf *pf)
8289 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8290 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8291 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8292 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8293 if (I40E_DEBUG_USER & debug)
8294 pf->hw.debug_mask = debug;
8295 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8296 I40E_DEFAULT_MSG_ENABLE);
8299 /* Set default capability flags */
8300 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8301 I40E_FLAG_MSI_ENABLED |
8302 I40E_FLAG_LINK_POLLING_ENABLED |
8303 I40E_FLAG_MSIX_ENABLED;
8305 if (iommu_present(&pci_bus_type))
8306 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8308 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8310 /* Set default ITR */
8311 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8312 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8314 /* Depending on PF configurations, it is possible that the RSS
8315 * maximum might end up larger than the available queues
8317 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8318 pf->alloc_rss_size = 1;
8319 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8320 pf->rss_size_max = min_t(int, pf->rss_size_max,
8321 pf->hw.func_caps.num_tx_qp);
8322 if (pf->hw.func_caps.rss) {
8323 pf->flags |= I40E_FLAG_RSS_ENABLED;
8324 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8328 /* MFP mode enabled */
8329 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8330 pf->flags |= I40E_FLAG_MFP_ENABLED;
8331 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8332 if (i40e_get_npar_bw_setting(pf))
8333 dev_warn(&pf->pdev->dev,
8334 "Could not get NPAR bw settings\n");
8336 dev_info(&pf->pdev->dev,
8337 "Min BW = %8.8x, Max BW = %8.8x\n",
8338 pf->npar_min_bw, pf->npar_max_bw);
8341 /* FW/NVM is not yet fixed in this regard */
8342 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8343 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8344 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8345 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8346 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8347 pf->hw.num_partitions > 1)
8348 dev_info(&pf->pdev->dev,
8349 "Flow Director Sideband mode Disabled in MFP mode\n");
8351 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8352 pf->fdir_pf_filter_count =
8353 pf->hw.func_caps.fd_filters_guaranteed;
8354 pf->hw.fdir_shared_filter_count =
8355 pf->hw.func_caps.fd_filters_best_effort;
8358 if (pf->hw.func_caps.vmdq) {
8359 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8360 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8361 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8365 i40e_init_pf_fcoe(pf);
8367 #endif /* I40E_FCOE */
8368 #ifdef CONFIG_PCI_IOV
8369 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8370 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8371 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8372 pf->num_req_vfs = min_t(int,
8373 pf->hw.func_caps.num_vfs,
8376 #endif /* CONFIG_PCI_IOV */
8377 if (pf->hw.mac.type == I40E_MAC_X722) {
8378 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8379 I40E_FLAG_128_QP_RSS_CAPABLE |
8380 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8381 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8382 I40E_FLAG_WB_ON_ITR_CAPABLE |
8383 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
8385 pf->eeprom_version = 0xDEAD;
8386 pf->lan_veb = I40E_NO_VEB;
8387 pf->lan_vsi = I40E_NO_VSI;
8389 /* By default FW has this off for performance reasons */
8390 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8392 /* set up queue assignment tracking */
8393 size = sizeof(struct i40e_lump_tracking)
8394 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8395 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8400 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8401 pf->qp_pile->search_hint = 0;
8403 pf->tx_timeout_recovery_level = 1;
8405 mutex_init(&pf->switch_mutex);
8407 /* If NPAR is enabled nudge the Tx scheduler */
8408 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8409 i40e_set_npar_bw_setting(pf);
8416 * i40e_set_ntuple - set the ntuple feature flag and take action
8417 * @pf: board private structure to initialize
8418 * @features: the feature set that the stack is suggesting
8420 * returns a bool to indicate if reset needs to happen
8422 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8424 bool need_reset = false;
8426 /* Check if Flow Director n-tuple support was enabled or disabled. If
8427 * the state changed, we need to reset.
8429 if (features & NETIF_F_NTUPLE) {
8430 /* Enable filters and mark for reset */
8431 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8433 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8435 /* turn off filters, mark for reset and clear SW filter list */
8436 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8438 i40e_fdir_filter_exit(pf);
8440 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8441 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8442 /* reset fd counters */
8443 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8444 pf->fdir_pf_active_filters = 0;
8445 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8446 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8447 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8448 /* if ATR was auto disabled it can be re-enabled. */
8449 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8450 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8451 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8457 * i40e_set_features - set the netdev feature flags
8458 * @netdev: ptr to the netdev being adjusted
8459 * @features: the feature set that the stack is suggesting
8461 static int i40e_set_features(struct net_device *netdev,
8462 netdev_features_t features)
8464 struct i40e_netdev_priv *np = netdev_priv(netdev);
8465 struct i40e_vsi *vsi = np->vsi;
8466 struct i40e_pf *pf = vsi->back;
8469 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8470 i40e_vlan_stripping_enable(vsi);
8472 i40e_vlan_stripping_disable(vsi);
8474 need_reset = i40e_set_ntuple(pf, features);
8477 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8482 #ifdef CONFIG_I40E_VXLAN
8484 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8485 * @pf: board private structure
8486 * @port: The UDP port to look up
8488 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8490 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8494 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8495 if (pf->vxlan_ports[i] == port)
8503 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8504 * @netdev: This physical port's netdev
8505 * @sa_family: Socket Family that VXLAN is notifying us about
8506 * @port: New UDP port number that VXLAN started listening to
8508 static void i40e_add_vxlan_port(struct net_device *netdev,
8509 sa_family_t sa_family, __be16 port)
8511 struct i40e_netdev_priv *np = netdev_priv(netdev);
8512 struct i40e_vsi *vsi = np->vsi;
8513 struct i40e_pf *pf = vsi->back;
8517 if (sa_family == AF_INET6)
8520 idx = i40e_get_vxlan_port_idx(pf, port);
8522 /* Check if port already exists */
8523 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8524 netdev_info(netdev, "vxlan port %d already offloaded\n",
8529 /* Now check if there is space to add the new port */
8530 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8532 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8533 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8538 /* New port: add it and mark its index in the bitmap */
8539 pf->vxlan_ports[next_idx] = port;
8540 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8541 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8545 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8546 * @netdev: This physical port's netdev
8547 * @sa_family: Socket Family that VXLAN is notifying us about
8548 * @port: UDP port number that VXLAN stopped listening to
8550 static void i40e_del_vxlan_port(struct net_device *netdev,
8551 sa_family_t sa_family, __be16 port)
8553 struct i40e_netdev_priv *np = netdev_priv(netdev);
8554 struct i40e_vsi *vsi = np->vsi;
8555 struct i40e_pf *pf = vsi->back;
8558 if (sa_family == AF_INET6)
8561 idx = i40e_get_vxlan_port_idx(pf, port);
8563 /* Check if port already exists */
8564 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8565 /* if port exists, set it to 0 (mark for deletion)
8566 * and make it pending
8568 pf->vxlan_ports[idx] = 0;
8569 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8570 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8572 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8578 static int i40e_get_phys_port_id(struct net_device *netdev,
8579 struct netdev_phys_item_id *ppid)
8581 struct i40e_netdev_priv *np = netdev_priv(netdev);
8582 struct i40e_pf *pf = np->vsi->back;
8583 struct i40e_hw *hw = &pf->hw;
8585 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8588 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8589 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8595 * i40e_ndo_fdb_add - add an entry to the hardware database
8596 * @ndm: the input from the stack
8597 * @tb: pointer to array of nladdr (unused)
8598 * @dev: the net device pointer
8599 * @addr: the MAC address entry being added
8600 * @flags: instructions from stack about fdb operation
8602 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8603 struct net_device *dev,
8604 const unsigned char *addr, u16 vid,
8607 struct i40e_netdev_priv *np = netdev_priv(dev);
8608 struct i40e_pf *pf = np->vsi->back;
8611 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8615 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8619 /* Hardware does not support aging addresses so if a
8620 * ndm_state is given only allow permanent addresses
8622 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8623 netdev_info(dev, "FDB only supports static addresses\n");
8627 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8628 err = dev_uc_add_excl(dev, addr);
8629 else if (is_multicast_ether_addr(addr))
8630 err = dev_mc_add_excl(dev, addr);
8634 /* Only return duplicate errors if NLM_F_EXCL is set */
8635 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8642 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8643 * @dev: the netdev being configured
8644 * @nlh: RTNL message
8646 * Inserts a new hardware bridge if not already created and
8647 * enables the bridging mode requested (VEB or VEPA). If the
8648 * hardware bridge has already been inserted and the request
8649 * is to change the mode then that requires a PF reset to
8650 * allow rebuild of the components with required hardware
8651 * bridge mode enabled.
8653 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8654 struct nlmsghdr *nlh,
8657 struct i40e_netdev_priv *np = netdev_priv(dev);
8658 struct i40e_vsi *vsi = np->vsi;
8659 struct i40e_pf *pf = vsi->back;
8660 struct i40e_veb *veb = NULL;
8661 struct nlattr *attr, *br_spec;
8664 /* Only for PF VSI for now */
8665 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8668 /* Find the HW bridge for PF VSI */
8669 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8670 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8674 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8676 nla_for_each_nested(attr, br_spec, rem) {
8679 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8682 mode = nla_get_u16(attr);
8683 if ((mode != BRIDGE_MODE_VEPA) &&
8684 (mode != BRIDGE_MODE_VEB))
8687 /* Insert a new HW bridge */
8689 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8690 vsi->tc_config.enabled_tc);
8692 veb->bridge_mode = mode;
8693 i40e_config_bridge_mode(veb);
8695 /* No Bridge HW offload available */
8699 } else if (mode != veb->bridge_mode) {
8700 /* Existing HW bridge but different mode needs reset */
8701 veb->bridge_mode = mode;
8702 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8703 if (mode == BRIDGE_MODE_VEB)
8704 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8706 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8707 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8716 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8719 * @seq: RTNL message seq #
8720 * @dev: the netdev being configured
8721 * @filter_mask: unused
8722 * @nlflags: netlink flags passed in
8724 * Return the mode in which the hardware bridge is operating in
8727 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8728 struct net_device *dev,
8729 u32 __always_unused filter_mask,
8732 struct i40e_netdev_priv *np = netdev_priv(dev);
8733 struct i40e_vsi *vsi = np->vsi;
8734 struct i40e_pf *pf = vsi->back;
8735 struct i40e_veb *veb = NULL;
8738 /* Only for PF VSI for now */
8739 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8742 /* Find the HW bridge for the PF VSI */
8743 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8744 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8751 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8752 nlflags, 0, 0, filter_mask, NULL);
8755 #define I40E_MAX_TUNNEL_HDR_LEN 80
8757 * i40e_features_check - Validate encapsulated packet conforms to limits
8759 * @dev: This physical port's netdev
8760 * @features: Offload features that the stack believes apply
8762 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8763 struct net_device *dev,
8764 netdev_features_t features)
8766 if (skb->encapsulation &&
8767 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8768 I40E_MAX_TUNNEL_HDR_LEN))
8769 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8774 static const struct net_device_ops i40e_netdev_ops = {
8775 .ndo_open = i40e_open,
8776 .ndo_stop = i40e_close,
8777 .ndo_start_xmit = i40e_lan_xmit_frame,
8778 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8779 .ndo_set_rx_mode = i40e_set_rx_mode,
8780 .ndo_validate_addr = eth_validate_addr,
8781 .ndo_set_mac_address = i40e_set_mac,
8782 .ndo_change_mtu = i40e_change_mtu,
8783 .ndo_do_ioctl = i40e_ioctl,
8784 .ndo_tx_timeout = i40e_tx_timeout,
8785 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8786 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8787 #ifdef CONFIG_NET_POLL_CONTROLLER
8788 .ndo_poll_controller = i40e_netpoll,
8790 .ndo_setup_tc = i40e_setup_tc,
8792 .ndo_fcoe_enable = i40e_fcoe_enable,
8793 .ndo_fcoe_disable = i40e_fcoe_disable,
8795 .ndo_set_features = i40e_set_features,
8796 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8797 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8798 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8799 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8800 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8801 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8802 #ifdef CONFIG_I40E_VXLAN
8803 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8804 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8806 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8807 .ndo_fdb_add = i40e_ndo_fdb_add,
8808 .ndo_features_check = i40e_features_check,
8809 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8810 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8814 * i40e_config_netdev - Setup the netdev flags
8815 * @vsi: the VSI being configured
8817 * Returns 0 on success, negative value on failure
8819 static int i40e_config_netdev(struct i40e_vsi *vsi)
8821 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8822 struct i40e_pf *pf = vsi->back;
8823 struct i40e_hw *hw = &pf->hw;
8824 struct i40e_netdev_priv *np;
8825 struct net_device *netdev;
8826 u8 mac_addr[ETH_ALEN];
8829 etherdev_size = sizeof(struct i40e_netdev_priv);
8830 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8834 vsi->netdev = netdev;
8835 np = netdev_priv(netdev);
8838 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8839 NETIF_F_GSO_UDP_TUNNEL |
8843 netdev->features = NETIF_F_SG |
8847 NETIF_F_GSO_UDP_TUNNEL |
8849 NETIF_F_HW_VLAN_CTAG_TX |
8850 NETIF_F_HW_VLAN_CTAG_RX |
8851 NETIF_F_HW_VLAN_CTAG_FILTER |
8860 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8861 netdev->features |= NETIF_F_NTUPLE;
8863 /* copy netdev features into list of user selectable features */
8864 netdev->hw_features |= netdev->features;
8866 if (vsi->type == I40E_VSI_MAIN) {
8867 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8868 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8869 /* The following steps are necessary to prevent reception
8870 * of tagged packets - some older NVM configurations load a
8871 * default a MAC-VLAN filter that accepts any tagged packet
8872 * which must be replaced by a normal filter.
8874 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8875 spin_lock_bh(&vsi->mac_filter_list_lock);
8876 i40e_add_filter(vsi, mac_addr,
8877 I40E_VLAN_ANY, false, true);
8878 spin_unlock_bh(&vsi->mac_filter_list_lock);
8881 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8882 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8883 pf->vsi[pf->lan_vsi]->netdev->name);
8884 random_ether_addr(mac_addr);
8886 spin_lock_bh(&vsi->mac_filter_list_lock);
8887 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8888 spin_unlock_bh(&vsi->mac_filter_list_lock);
8891 spin_lock_bh(&vsi->mac_filter_list_lock);
8892 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8893 spin_unlock_bh(&vsi->mac_filter_list_lock);
8895 ether_addr_copy(netdev->dev_addr, mac_addr);
8896 ether_addr_copy(netdev->perm_addr, mac_addr);
8897 /* vlan gets same features (except vlan offload)
8898 * after any tweaks for specific VSI types
8900 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8901 NETIF_F_HW_VLAN_CTAG_RX |
8902 NETIF_F_HW_VLAN_CTAG_FILTER);
8903 netdev->priv_flags |= IFF_UNICAST_FLT;
8904 netdev->priv_flags |= IFF_SUPP_NOFCS;
8905 /* Setup netdev TC information */
8906 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8908 netdev->netdev_ops = &i40e_netdev_ops;
8909 netdev->watchdog_timeo = 5 * HZ;
8910 i40e_set_ethtool_ops(netdev);
8912 i40e_fcoe_config_netdev(netdev, vsi);
8919 * i40e_vsi_delete - Delete a VSI from the switch
8920 * @vsi: the VSI being removed
8922 * Returns 0 on success, negative value on failure
8924 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8926 /* remove default VSI is not allowed */
8927 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8930 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8934 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8935 * @vsi: the VSI being queried
8937 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8939 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8941 struct i40e_veb *veb;
8942 struct i40e_pf *pf = vsi->back;
8944 /* Uplink is not a bridge so default to VEB */
8945 if (vsi->veb_idx == I40E_NO_VEB)
8948 veb = pf->veb[vsi->veb_idx];
8950 dev_info(&pf->pdev->dev,
8951 "There is no veb associated with the bridge\n");
8955 /* Uplink is a bridge in VEPA mode */
8956 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
8959 /* Uplink is a bridge in VEB mode */
8963 /* VEPA is now default bridge, so return 0 */
8968 * i40e_add_vsi - Add a VSI to the switch
8969 * @vsi: the VSI being configured
8971 * This initializes a VSI context depending on the VSI type to be added and
8972 * passes it down to the add_vsi aq command.
8974 static int i40e_add_vsi(struct i40e_vsi *vsi)
8977 u8 laa_macaddr[ETH_ALEN];
8978 bool found_laa_mac_filter = false;
8979 struct i40e_pf *pf = vsi->back;
8980 struct i40e_hw *hw = &pf->hw;
8981 struct i40e_vsi_context ctxt;
8982 struct i40e_mac_filter *f, *ftmp;
8984 u8 enabled_tc = 0x1; /* TC0 enabled */
8987 memset(&ctxt, 0, sizeof(ctxt));
8988 switch (vsi->type) {
8990 /* The PF's main VSI is already setup as part of the
8991 * device initialization, so we'll not bother with
8992 * the add_vsi call, but we will retrieve the current
8995 ctxt.seid = pf->main_vsi_seid;
8996 ctxt.pf_num = pf->hw.pf_id;
8998 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8999 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9001 dev_info(&pf->pdev->dev,
9002 "couldn't get PF vsi config, err %s aq_err %s\n",
9003 i40e_stat_str(&pf->hw, ret),
9004 i40e_aq_str(&pf->hw,
9005 pf->hw.aq.asq_last_status));
9008 vsi->info = ctxt.info;
9009 vsi->info.valid_sections = 0;
9011 vsi->seid = ctxt.seid;
9012 vsi->id = ctxt.vsi_number;
9014 enabled_tc = i40e_pf_get_tc_map(pf);
9016 /* MFP mode setup queue map and update VSI */
9017 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9018 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9019 memset(&ctxt, 0, sizeof(ctxt));
9020 ctxt.seid = pf->main_vsi_seid;
9021 ctxt.pf_num = pf->hw.pf_id;
9023 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9024 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9026 dev_info(&pf->pdev->dev,
9027 "update vsi failed, err %s aq_err %s\n",
9028 i40e_stat_str(&pf->hw, ret),
9029 i40e_aq_str(&pf->hw,
9030 pf->hw.aq.asq_last_status));
9034 /* update the local VSI info queue map */
9035 i40e_vsi_update_queue_map(vsi, &ctxt);
9036 vsi->info.valid_sections = 0;
9038 /* Default/Main VSI is only enabled for TC0
9039 * reconfigure it to enable all TCs that are
9040 * available on the port in SFP mode.
9041 * For MFP case the iSCSI PF would use this
9042 * flow to enable LAN+iSCSI TC.
9044 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9046 dev_info(&pf->pdev->dev,
9047 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9049 i40e_stat_str(&pf->hw, ret),
9050 i40e_aq_str(&pf->hw,
9051 pf->hw.aq.asq_last_status));
9058 ctxt.pf_num = hw->pf_id;
9060 ctxt.uplink_seid = vsi->uplink_seid;
9061 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9062 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9063 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9064 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9065 ctxt.info.valid_sections |=
9066 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9067 ctxt.info.switch_id =
9068 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9070 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9073 case I40E_VSI_VMDQ2:
9074 ctxt.pf_num = hw->pf_id;
9076 ctxt.uplink_seid = vsi->uplink_seid;
9077 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9078 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9080 /* This VSI is connected to VEB so the switch_id
9081 * should be set to zero by default.
9083 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9084 ctxt.info.valid_sections |=
9085 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9086 ctxt.info.switch_id =
9087 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9090 /* Setup the VSI tx/rx queue map for TC0 only for now */
9091 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9094 case I40E_VSI_SRIOV:
9095 ctxt.pf_num = hw->pf_id;
9096 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9097 ctxt.uplink_seid = vsi->uplink_seid;
9098 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9099 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9101 /* This VSI is connected to VEB so the switch_id
9102 * should be set to zero by default.
9104 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9105 ctxt.info.valid_sections |=
9106 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9107 ctxt.info.switch_id =
9108 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9111 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9112 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9113 if (pf->vf[vsi->vf_id].spoofchk) {
9114 ctxt.info.valid_sections |=
9115 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9116 ctxt.info.sec_flags |=
9117 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9118 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9120 /* Setup the VSI tx/rx queue map for TC0 only for now */
9121 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9126 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9128 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9133 #endif /* I40E_FCOE */
9138 if (vsi->type != I40E_VSI_MAIN) {
9139 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9141 dev_info(&vsi->back->pdev->dev,
9142 "add vsi failed, err %s aq_err %s\n",
9143 i40e_stat_str(&pf->hw, ret),
9144 i40e_aq_str(&pf->hw,
9145 pf->hw.aq.asq_last_status));
9149 vsi->info = ctxt.info;
9150 vsi->info.valid_sections = 0;
9151 vsi->seid = ctxt.seid;
9152 vsi->id = ctxt.vsi_number;
9155 spin_lock_bh(&vsi->mac_filter_list_lock);
9156 /* If macvlan filters already exist, force them to get loaded */
9157 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9161 /* Expected to have only one MAC filter entry for LAA in list */
9162 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9163 ether_addr_copy(laa_macaddr, f->macaddr);
9164 found_laa_mac_filter = true;
9167 spin_unlock_bh(&vsi->mac_filter_list_lock);
9169 if (found_laa_mac_filter) {
9170 struct i40e_aqc_remove_macvlan_element_data element;
9172 memset(&element, 0, sizeof(element));
9173 ether_addr_copy(element.mac_addr, laa_macaddr);
9174 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9175 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9178 /* some older FW has a different default */
9180 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9181 i40e_aq_remove_macvlan(hw, vsi->seid,
9185 i40e_aq_mac_address_write(hw,
9186 I40E_AQC_WRITE_TYPE_LAA_WOL,
9191 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9192 pf->flags |= I40E_FLAG_FILTER_SYNC;
9195 /* Update VSI BW information */
9196 ret = i40e_vsi_get_bw_info(vsi);
9198 dev_info(&pf->pdev->dev,
9199 "couldn't get vsi bw info, err %s aq_err %s\n",
9200 i40e_stat_str(&pf->hw, ret),
9201 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9202 /* VSI is already added so not tearing that up */
9211 * i40e_vsi_release - Delete a VSI and free its resources
9212 * @vsi: the VSI being removed
9214 * Returns 0 on success or < 0 on error
9216 int i40e_vsi_release(struct i40e_vsi *vsi)
9218 struct i40e_mac_filter *f, *ftmp;
9219 struct i40e_veb *veb = NULL;
9226 /* release of a VEB-owner or last VSI is not allowed */
9227 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9228 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9229 vsi->seid, vsi->uplink_seid);
9232 if (vsi == pf->vsi[pf->lan_vsi] &&
9233 !test_bit(__I40E_DOWN, &pf->state)) {
9234 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9238 uplink_seid = vsi->uplink_seid;
9239 if (vsi->type != I40E_VSI_SRIOV) {
9240 if (vsi->netdev_registered) {
9241 vsi->netdev_registered = false;
9243 /* results in a call to i40e_close() */
9244 unregister_netdev(vsi->netdev);
9247 i40e_vsi_close(vsi);
9249 i40e_vsi_disable_irq(vsi);
9252 spin_lock_bh(&vsi->mac_filter_list_lock);
9253 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9254 i40e_del_filter(vsi, f->macaddr, f->vlan,
9255 f->is_vf, f->is_netdev);
9256 spin_unlock_bh(&vsi->mac_filter_list_lock);
9258 i40e_sync_vsi_filters(vsi);
9260 i40e_vsi_delete(vsi);
9261 i40e_vsi_free_q_vectors(vsi);
9263 free_netdev(vsi->netdev);
9266 i40e_vsi_clear_rings(vsi);
9267 i40e_vsi_clear(vsi);
9269 /* If this was the last thing on the VEB, except for the
9270 * controlling VSI, remove the VEB, which puts the controlling
9271 * VSI onto the next level down in the switch.
9273 * Well, okay, there's one more exception here: don't remove
9274 * the orphan VEBs yet. We'll wait for an explicit remove request
9275 * from up the network stack.
9277 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9279 pf->vsi[i]->uplink_seid == uplink_seid &&
9280 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9281 n++; /* count the VSIs */
9284 for (i = 0; i < I40E_MAX_VEB; i++) {
9287 if (pf->veb[i]->uplink_seid == uplink_seid)
9288 n++; /* count the VEBs */
9289 if (pf->veb[i]->seid == uplink_seid)
9292 if (n == 0 && veb && veb->uplink_seid != 0)
9293 i40e_veb_release(veb);
9299 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9300 * @vsi: ptr to the VSI
9302 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9303 * corresponding SW VSI structure and initializes num_queue_pairs for the
9304 * newly allocated VSI.
9306 * Returns 0 on success or negative on failure
9308 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9311 struct i40e_pf *pf = vsi->back;
9313 if (vsi->q_vectors[0]) {
9314 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9319 if (vsi->base_vector) {
9320 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9321 vsi->seid, vsi->base_vector);
9325 ret = i40e_vsi_alloc_q_vectors(vsi);
9327 dev_info(&pf->pdev->dev,
9328 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9329 vsi->num_q_vectors, vsi->seid, ret);
9330 vsi->num_q_vectors = 0;
9331 goto vector_setup_out;
9334 /* In Legacy mode, we do not have to get any other vector since we
9335 * piggyback on the misc/ICR0 for queue interrupts.
9337 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9339 if (vsi->num_q_vectors)
9340 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9341 vsi->num_q_vectors, vsi->idx);
9342 if (vsi->base_vector < 0) {
9343 dev_info(&pf->pdev->dev,
9344 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9345 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9346 i40e_vsi_free_q_vectors(vsi);
9348 goto vector_setup_out;
9356 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9357 * @vsi: pointer to the vsi.
9359 * This re-allocates a vsi's queue resources.
9361 * Returns pointer to the successfully allocated and configured VSI sw struct
9362 * on success, otherwise returns NULL on failure.
9364 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9366 struct i40e_pf *pf = vsi->back;
9370 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9371 i40e_vsi_clear_rings(vsi);
9373 i40e_vsi_free_arrays(vsi, false);
9374 i40e_set_num_rings_in_vsi(vsi);
9375 ret = i40e_vsi_alloc_arrays(vsi, false);
9379 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9381 dev_info(&pf->pdev->dev,
9382 "failed to get tracking for %d queues for VSI %d err %d\n",
9383 vsi->alloc_queue_pairs, vsi->seid, ret);
9386 vsi->base_queue = ret;
9388 /* Update the FW view of the VSI. Force a reset of TC and queue
9389 * layout configurations.
9391 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9392 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9393 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9394 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9396 /* assign it some queues */
9397 ret = i40e_alloc_rings(vsi);
9401 /* map all of the rings to the q_vectors */
9402 i40e_vsi_map_rings_to_vectors(vsi);
9406 i40e_vsi_free_q_vectors(vsi);
9407 if (vsi->netdev_registered) {
9408 vsi->netdev_registered = false;
9409 unregister_netdev(vsi->netdev);
9410 free_netdev(vsi->netdev);
9413 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9415 i40e_vsi_clear(vsi);
9420 * i40e_vsi_setup - Set up a VSI by a given type
9421 * @pf: board private structure
9423 * @uplink_seid: the switch element to link to
9424 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9426 * This allocates the sw VSI structure and its queue resources, then add a VSI
9427 * to the identified VEB.
9429 * Returns pointer to the successfully allocated and configure VSI sw struct on
9430 * success, otherwise returns NULL on failure.
9432 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9433 u16 uplink_seid, u32 param1)
9435 struct i40e_vsi *vsi = NULL;
9436 struct i40e_veb *veb = NULL;
9440 /* The requested uplink_seid must be either
9441 * - the PF's port seid
9442 * no VEB is needed because this is the PF
9443 * or this is a Flow Director special case VSI
9444 * - seid of an existing VEB
9445 * - seid of a VSI that owns an existing VEB
9446 * - seid of a VSI that doesn't own a VEB
9447 * a new VEB is created and the VSI becomes the owner
9448 * - seid of the PF VSI, which is what creates the first VEB
9449 * this is a special case of the previous
9451 * Find which uplink_seid we were given and create a new VEB if needed
9453 for (i = 0; i < I40E_MAX_VEB; i++) {
9454 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9460 if (!veb && uplink_seid != pf->mac_seid) {
9462 for (i = 0; i < pf->num_alloc_vsi; i++) {
9463 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9469 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9474 if (vsi->uplink_seid == pf->mac_seid)
9475 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9476 vsi->tc_config.enabled_tc);
9477 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9478 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9479 vsi->tc_config.enabled_tc);
9481 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9482 dev_info(&vsi->back->pdev->dev,
9483 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9486 /* We come up by default in VEPA mode if SRIOV is not
9487 * already enabled, in which case we can't force VEPA
9490 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9491 veb->bridge_mode = BRIDGE_MODE_VEPA;
9492 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9494 i40e_config_bridge_mode(veb);
9496 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9497 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9501 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9505 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9506 uplink_seid = veb->seid;
9509 /* get vsi sw struct */
9510 v_idx = i40e_vsi_mem_alloc(pf, type);
9513 vsi = pf->vsi[v_idx];
9517 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9519 if (type == I40E_VSI_MAIN)
9520 pf->lan_vsi = v_idx;
9521 else if (type == I40E_VSI_SRIOV)
9522 vsi->vf_id = param1;
9523 /* assign it some queues */
9524 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9527 dev_info(&pf->pdev->dev,
9528 "failed to get tracking for %d queues for VSI %d err=%d\n",
9529 vsi->alloc_queue_pairs, vsi->seid, ret);
9532 vsi->base_queue = ret;
9534 /* get a VSI from the hardware */
9535 vsi->uplink_seid = uplink_seid;
9536 ret = i40e_add_vsi(vsi);
9540 switch (vsi->type) {
9541 /* setup the netdev if needed */
9543 case I40E_VSI_VMDQ2:
9545 ret = i40e_config_netdev(vsi);
9548 ret = register_netdev(vsi->netdev);
9551 vsi->netdev_registered = true;
9552 netif_carrier_off(vsi->netdev);
9553 #ifdef CONFIG_I40E_DCB
9554 /* Setup DCB netlink interface */
9555 i40e_dcbnl_setup(vsi);
9556 #endif /* CONFIG_I40E_DCB */
9560 /* set up vectors and rings if needed */
9561 ret = i40e_vsi_setup_vectors(vsi);
9565 ret = i40e_alloc_rings(vsi);
9569 /* map all of the rings to the q_vectors */
9570 i40e_vsi_map_rings_to_vectors(vsi);
9572 i40e_vsi_reset_stats(vsi);
9576 /* no netdev or rings for the other VSI types */
9580 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9581 (vsi->type == I40E_VSI_VMDQ2)) {
9582 ret = i40e_vsi_config_rss(vsi);
9587 i40e_vsi_free_q_vectors(vsi);
9589 if (vsi->netdev_registered) {
9590 vsi->netdev_registered = false;
9591 unregister_netdev(vsi->netdev);
9592 free_netdev(vsi->netdev);
9596 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9598 i40e_vsi_clear(vsi);
9604 * i40e_veb_get_bw_info - Query VEB BW information
9605 * @veb: the veb to query
9607 * Query the Tx scheduler BW configuration data for given VEB
9609 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9611 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9612 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9613 struct i40e_pf *pf = veb->pf;
9614 struct i40e_hw *hw = &pf->hw;
9619 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9622 dev_info(&pf->pdev->dev,
9623 "query veb bw config failed, err %s aq_err %s\n",
9624 i40e_stat_str(&pf->hw, ret),
9625 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9629 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9632 dev_info(&pf->pdev->dev,
9633 "query veb bw ets config failed, err %s aq_err %s\n",
9634 i40e_stat_str(&pf->hw, ret),
9635 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9639 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9640 veb->bw_max_quanta = ets_data.tc_bw_max;
9641 veb->is_abs_credits = bw_data.absolute_credits_enable;
9642 veb->enabled_tc = ets_data.tc_valid_bits;
9643 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9644 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9645 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9646 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9647 veb->bw_tc_limit_credits[i] =
9648 le16_to_cpu(bw_data.tc_bw_limits[i]);
9649 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9657 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9658 * @pf: board private structure
9660 * On error: returns error code (negative)
9661 * On success: returns vsi index in PF (positive)
9663 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9666 struct i40e_veb *veb;
9669 /* Need to protect the allocation of switch elements at the PF level */
9670 mutex_lock(&pf->switch_mutex);
9672 /* VEB list may be fragmented if VEB creation/destruction has
9673 * been happening. We can afford to do a quick scan to look
9674 * for any free slots in the list.
9676 * find next empty veb slot, looping back around if necessary
9679 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9681 if (i >= I40E_MAX_VEB) {
9683 goto err_alloc_veb; /* out of VEB slots! */
9686 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9693 veb->enabled_tc = 1;
9698 mutex_unlock(&pf->switch_mutex);
9703 * i40e_switch_branch_release - Delete a branch of the switch tree
9704 * @branch: where to start deleting
9706 * This uses recursion to find the tips of the branch to be
9707 * removed, deleting until we get back to and can delete this VEB.
9709 static void i40e_switch_branch_release(struct i40e_veb *branch)
9711 struct i40e_pf *pf = branch->pf;
9712 u16 branch_seid = branch->seid;
9713 u16 veb_idx = branch->idx;
9716 /* release any VEBs on this VEB - RECURSION */
9717 for (i = 0; i < I40E_MAX_VEB; i++) {
9720 if (pf->veb[i]->uplink_seid == branch->seid)
9721 i40e_switch_branch_release(pf->veb[i]);
9724 /* Release the VSIs on this VEB, but not the owner VSI.
9726 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9727 * the VEB itself, so don't use (*branch) after this loop.
9729 for (i = 0; i < pf->num_alloc_vsi; i++) {
9732 if (pf->vsi[i]->uplink_seid == branch_seid &&
9733 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9734 i40e_vsi_release(pf->vsi[i]);
9738 /* There's one corner case where the VEB might not have been
9739 * removed, so double check it here and remove it if needed.
9740 * This case happens if the veb was created from the debugfs
9741 * commands and no VSIs were added to it.
9743 if (pf->veb[veb_idx])
9744 i40e_veb_release(pf->veb[veb_idx]);
9748 * i40e_veb_clear - remove veb struct
9749 * @veb: the veb to remove
9751 static void i40e_veb_clear(struct i40e_veb *veb)
9757 struct i40e_pf *pf = veb->pf;
9759 mutex_lock(&pf->switch_mutex);
9760 if (pf->veb[veb->idx] == veb)
9761 pf->veb[veb->idx] = NULL;
9762 mutex_unlock(&pf->switch_mutex);
9769 * i40e_veb_release - Delete a VEB and free its resources
9770 * @veb: the VEB being removed
9772 void i40e_veb_release(struct i40e_veb *veb)
9774 struct i40e_vsi *vsi = NULL;
9780 /* find the remaining VSI and check for extras */
9781 for (i = 0; i < pf->num_alloc_vsi; i++) {
9782 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9788 dev_info(&pf->pdev->dev,
9789 "can't remove VEB %d with %d VSIs left\n",
9794 /* move the remaining VSI to uplink veb */
9795 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9796 if (veb->uplink_seid) {
9797 vsi->uplink_seid = veb->uplink_seid;
9798 if (veb->uplink_seid == pf->mac_seid)
9799 vsi->veb_idx = I40E_NO_VEB;
9801 vsi->veb_idx = veb->veb_idx;
9804 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9805 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9808 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9809 i40e_veb_clear(veb);
9813 * i40e_add_veb - create the VEB in the switch
9814 * @veb: the VEB to be instantiated
9815 * @vsi: the controlling VSI
9817 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9819 struct i40e_pf *pf = veb->pf;
9820 bool is_default = veb->pf->cur_promisc;
9821 bool is_cloud = false;
9824 /* get a VEB from the hardware */
9825 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9826 veb->enabled_tc, is_default,
9827 is_cloud, &veb->seid, NULL);
9829 dev_info(&pf->pdev->dev,
9830 "couldn't add VEB, err %s aq_err %s\n",
9831 i40e_stat_str(&pf->hw, ret),
9832 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9836 /* get statistics counter */
9837 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9838 &veb->stats_idx, NULL, NULL, NULL);
9840 dev_info(&pf->pdev->dev,
9841 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9842 i40e_stat_str(&pf->hw, ret),
9843 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9846 ret = i40e_veb_get_bw_info(veb);
9848 dev_info(&pf->pdev->dev,
9849 "couldn't get VEB bw info, err %s aq_err %s\n",
9850 i40e_stat_str(&pf->hw, ret),
9851 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9852 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9856 vsi->uplink_seid = veb->seid;
9857 vsi->veb_idx = veb->idx;
9858 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9864 * i40e_veb_setup - Set up a VEB
9865 * @pf: board private structure
9866 * @flags: VEB setup flags
9867 * @uplink_seid: the switch element to link to
9868 * @vsi_seid: the initial VSI seid
9869 * @enabled_tc: Enabled TC bit-map
9871 * This allocates the sw VEB structure and links it into the switch
9872 * It is possible and legal for this to be a duplicate of an already
9873 * existing VEB. It is also possible for both uplink and vsi seids
9874 * to be zero, in order to create a floating VEB.
9876 * Returns pointer to the successfully allocated VEB sw struct on
9877 * success, otherwise returns NULL on failure.
9879 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9880 u16 uplink_seid, u16 vsi_seid,
9883 struct i40e_veb *veb, *uplink_veb = NULL;
9884 int vsi_idx, veb_idx;
9887 /* if one seid is 0, the other must be 0 to create a floating relay */
9888 if ((uplink_seid == 0 || vsi_seid == 0) &&
9889 (uplink_seid + vsi_seid != 0)) {
9890 dev_info(&pf->pdev->dev,
9891 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9892 uplink_seid, vsi_seid);
9896 /* make sure there is such a vsi and uplink */
9897 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9898 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9900 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9901 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9906 if (uplink_seid && uplink_seid != pf->mac_seid) {
9907 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9908 if (pf->veb[veb_idx] &&
9909 pf->veb[veb_idx]->seid == uplink_seid) {
9910 uplink_veb = pf->veb[veb_idx];
9915 dev_info(&pf->pdev->dev,
9916 "uplink seid %d not found\n", uplink_seid);
9921 /* get veb sw struct */
9922 veb_idx = i40e_veb_mem_alloc(pf);
9925 veb = pf->veb[veb_idx];
9927 veb->uplink_seid = uplink_seid;
9928 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9929 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9931 /* create the VEB in the switch */
9932 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9935 if (vsi_idx == pf->lan_vsi)
9936 pf->lan_veb = veb->idx;
9941 i40e_veb_clear(veb);
9947 * i40e_setup_pf_switch_element - set PF vars based on switch type
9948 * @pf: board private structure
9949 * @ele: element we are building info from
9950 * @num_reported: total number of elements
9951 * @printconfig: should we print the contents
9953 * helper function to assist in extracting a few useful SEID values.
9955 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9956 struct i40e_aqc_switch_config_element_resp *ele,
9957 u16 num_reported, bool printconfig)
9959 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9960 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9961 u8 element_type = ele->element_type;
9962 u16 seid = le16_to_cpu(ele->seid);
9965 dev_info(&pf->pdev->dev,
9966 "type=%d seid=%d uplink=%d downlink=%d\n",
9967 element_type, seid, uplink_seid, downlink_seid);
9969 switch (element_type) {
9970 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9971 pf->mac_seid = seid;
9973 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9975 if (uplink_seid != pf->mac_seid)
9977 if (pf->lan_veb == I40E_NO_VEB) {
9980 /* find existing or else empty VEB */
9981 for (v = 0; v < I40E_MAX_VEB; v++) {
9982 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9987 if (pf->lan_veb == I40E_NO_VEB) {
9988 v = i40e_veb_mem_alloc(pf);
9995 pf->veb[pf->lan_veb]->seid = seid;
9996 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9997 pf->veb[pf->lan_veb]->pf = pf;
9998 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10000 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10001 if (num_reported != 1)
10003 /* This is immediately after a reset so we can assume this is
10006 pf->mac_seid = uplink_seid;
10007 pf->pf_seid = downlink_seid;
10008 pf->main_vsi_seid = seid;
10010 dev_info(&pf->pdev->dev,
10011 "pf_seid=%d main_vsi_seid=%d\n",
10012 pf->pf_seid, pf->main_vsi_seid);
10014 case I40E_SWITCH_ELEMENT_TYPE_PF:
10015 case I40E_SWITCH_ELEMENT_TYPE_VF:
10016 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10017 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10018 case I40E_SWITCH_ELEMENT_TYPE_PE:
10019 case I40E_SWITCH_ELEMENT_TYPE_PA:
10020 /* ignore these for now */
10023 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10024 element_type, seid);
10030 * i40e_fetch_switch_configuration - Get switch config from firmware
10031 * @pf: board private structure
10032 * @printconfig: should we print the contents
10034 * Get the current switch configuration from the device and
10035 * extract a few useful SEID values.
10037 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10039 struct i40e_aqc_get_switch_config_resp *sw_config;
10045 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10049 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10051 u16 num_reported, num_total;
10053 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10057 dev_info(&pf->pdev->dev,
10058 "get switch config failed err %s aq_err %s\n",
10059 i40e_stat_str(&pf->hw, ret),
10060 i40e_aq_str(&pf->hw,
10061 pf->hw.aq.asq_last_status));
10066 num_reported = le16_to_cpu(sw_config->header.num_reported);
10067 num_total = le16_to_cpu(sw_config->header.num_total);
10070 dev_info(&pf->pdev->dev,
10071 "header: %d reported %d total\n",
10072 num_reported, num_total);
10074 for (i = 0; i < num_reported; i++) {
10075 struct i40e_aqc_switch_config_element_resp *ele =
10076 &sw_config->element[i];
10078 i40e_setup_pf_switch_element(pf, ele, num_reported,
10081 } while (next_seid != 0);
10088 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10089 * @pf: board private structure
10090 * @reinit: if the Main VSI needs to re-initialized.
10092 * Returns 0 on success, negative value on failure
10094 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10098 /* find out what's out there already */
10099 ret = i40e_fetch_switch_configuration(pf, false);
10101 dev_info(&pf->pdev->dev,
10102 "couldn't fetch switch config, err %s aq_err %s\n",
10103 i40e_stat_str(&pf->hw, ret),
10104 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10107 i40e_pf_reset_stats(pf);
10109 /* first time setup */
10110 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10111 struct i40e_vsi *vsi = NULL;
10114 /* Set up the PF VSI associated with the PF's main VSI
10115 * that is already in the HW switch
10117 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10118 uplink_seid = pf->veb[pf->lan_veb]->seid;
10120 uplink_seid = pf->mac_seid;
10121 if (pf->lan_vsi == I40E_NO_VSI)
10122 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10124 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10126 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10127 i40e_fdir_teardown(pf);
10131 /* force a reset of TC and queue layout configurations */
10132 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10134 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10135 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10136 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10138 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10140 i40e_fdir_sb_setup(pf);
10142 /* Setup static PF queue filter control settings */
10143 ret = i40e_setup_pf_filter_control(pf);
10145 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10147 /* Failure here should not stop continuing other steps */
10150 /* enable RSS in the HW, even for only one queue, as the stack can use
10153 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10154 i40e_pf_config_rss(pf);
10156 /* fill in link information and enable LSE reporting */
10157 i40e_update_link_info(&pf->hw);
10158 i40e_link_event(pf);
10160 /* Initialize user-specific link properties */
10161 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10162 I40E_AQ_AN_COMPLETED) ? true : false);
10170 * i40e_determine_queue_usage - Work out queue distribution
10171 * @pf: board private structure
10173 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10177 pf->num_lan_qps = 0;
10179 pf->num_fcoe_qps = 0;
10182 /* Find the max queues to be put into basic use. We'll always be
10183 * using TC0, whether or not DCB is running, and TC0 will get the
10186 queues_left = pf->hw.func_caps.num_tx_qp;
10188 if ((queues_left == 1) ||
10189 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10190 /* one qp for PF, no queues for anything else */
10192 pf->alloc_rss_size = pf->num_lan_qps = 1;
10194 /* make sure all the fancies are disabled */
10195 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10197 I40E_FLAG_FCOE_ENABLED |
10199 I40E_FLAG_FD_SB_ENABLED |
10200 I40E_FLAG_FD_ATR_ENABLED |
10201 I40E_FLAG_DCB_CAPABLE |
10202 I40E_FLAG_SRIOV_ENABLED |
10203 I40E_FLAG_VMDQ_ENABLED);
10204 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10205 I40E_FLAG_FD_SB_ENABLED |
10206 I40E_FLAG_FD_ATR_ENABLED |
10207 I40E_FLAG_DCB_CAPABLE))) {
10208 /* one qp for PF */
10209 pf->alloc_rss_size = pf->num_lan_qps = 1;
10210 queues_left -= pf->num_lan_qps;
10212 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10214 I40E_FLAG_FCOE_ENABLED |
10216 I40E_FLAG_FD_SB_ENABLED |
10217 I40E_FLAG_FD_ATR_ENABLED |
10218 I40E_FLAG_DCB_ENABLED |
10219 I40E_FLAG_VMDQ_ENABLED);
10221 /* Not enough queues for all TCs */
10222 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10223 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10224 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10225 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10227 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10228 num_online_cpus());
10229 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10230 pf->hw.func_caps.num_tx_qp);
10232 queues_left -= pf->num_lan_qps;
10236 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10237 if (I40E_DEFAULT_FCOE <= queues_left) {
10238 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10239 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10240 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10242 pf->num_fcoe_qps = 0;
10243 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10244 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10247 queues_left -= pf->num_fcoe_qps;
10251 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10252 if (queues_left > 1) {
10253 queues_left -= 1; /* save 1 queue for FD */
10255 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10256 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10260 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10261 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10262 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10263 (queues_left / pf->num_vf_qps));
10264 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10267 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10268 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10269 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10270 (queues_left / pf->num_vmdq_qps));
10271 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10274 pf->queues_left = queues_left;
10275 dev_dbg(&pf->pdev->dev,
10276 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10277 pf->hw.func_caps.num_tx_qp,
10278 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10279 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10280 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10283 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10288 * i40e_setup_pf_filter_control - Setup PF static filter control
10289 * @pf: PF to be setup
10291 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10292 * settings. If PE/FCoE are enabled then it will also set the per PF
10293 * based filter sizes required for them. It also enables Flow director,
10294 * ethertype and macvlan type filter settings for the pf.
10296 * Returns 0 on success, negative on failure
10298 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10300 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10302 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10304 /* Flow Director is enabled */
10305 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10306 settings->enable_fdir = true;
10308 /* Ethtype and MACVLAN filters enabled for PF */
10309 settings->enable_ethtype = true;
10310 settings->enable_macvlan = true;
10312 if (i40e_set_filter_control(&pf->hw, settings))
10318 #define INFO_STRING_LEN 255
10319 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10320 static void i40e_print_features(struct i40e_pf *pf)
10322 struct i40e_hw *hw = &pf->hw;
10326 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10330 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10331 #ifdef CONFIG_PCI_IOV
10332 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10334 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10335 pf->hw.func_caps.num_vsis,
10336 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10337 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10339 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10340 i += snprintf(&buf[i], REMAIN(i), " RSS");
10341 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10342 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10343 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10344 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10345 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10347 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10348 i += snprintf(&buf[i], REMAIN(i), " DCB");
10349 #if IS_ENABLED(CONFIG_VXLAN)
10350 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10352 if (pf->flags & I40E_FLAG_PTP)
10353 i += snprintf(&buf[i], REMAIN(i), " PTP");
10355 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10356 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10358 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10359 i += snprintf(&buf[i], REMAIN(i), " VEB");
10361 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10363 dev_info(&pf->pdev->dev, "%s\n", buf);
10365 WARN_ON(i > INFO_STRING_LEN);
10369 * i40e_probe - Device initialization routine
10370 * @pdev: PCI device information struct
10371 * @ent: entry in i40e_pci_tbl
10373 * i40e_probe initializes a PF identified by a pci_dev structure.
10374 * The OS initialization, configuring of the PF private structure,
10375 * and a hardware reset occur.
10377 * Returns 0 on success, negative on failure
10379 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10381 struct i40e_aq_get_phy_abilities_resp abilities;
10382 struct i40e_pf *pf;
10383 struct i40e_hw *hw;
10384 static u16 pfs_found;
10393 err = pci_enable_device_mem(pdev);
10397 /* set up for high or low dma */
10398 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10400 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10402 dev_err(&pdev->dev,
10403 "DMA configuration failed: 0x%x\n", err);
10408 /* set up pci connections */
10409 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10410 IORESOURCE_MEM), i40e_driver_name);
10412 dev_info(&pdev->dev,
10413 "pci_request_selected_regions failed %d\n", err);
10417 pci_enable_pcie_error_reporting(pdev);
10418 pci_set_master(pdev);
10420 /* Now that we have a PCI connection, we need to do the
10421 * low level device setup. This is primarily setting up
10422 * the Admin Queue structures and then querying for the
10423 * device's current profile information.
10425 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10432 set_bit(__I40E_DOWN, &pf->state);
10437 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10438 I40E_MAX_CSR_SPACE);
10440 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10441 if (!hw->hw_addr) {
10443 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10444 (unsigned int)pci_resource_start(pdev, 0),
10445 pf->ioremap_len, err);
10448 hw->vendor_id = pdev->vendor;
10449 hw->device_id = pdev->device;
10450 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10451 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10452 hw->subsystem_device_id = pdev->subsystem_device;
10453 hw->bus.device = PCI_SLOT(pdev->devfn);
10454 hw->bus.func = PCI_FUNC(pdev->devfn);
10455 pf->instance = pfs_found;
10458 pf->msg_enable = pf->hw.debug_mask;
10459 pf->msg_enable = debug;
10462 /* do a special CORER for clearing PXE mode once at init */
10463 if (hw->revision_id == 0 &&
10464 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10465 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10470 i40e_clear_pxe_mode(hw);
10473 /* Reset here to make sure all is clean and to define PF 'n' */
10475 err = i40e_pf_reset(hw);
10477 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10482 hw->aq.num_arq_entries = I40E_AQ_LEN;
10483 hw->aq.num_asq_entries = I40E_AQ_LEN;
10484 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10485 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10486 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10488 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10490 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10492 err = i40e_init_shared_code(hw);
10494 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10499 /* set up a default setting for link flow control */
10500 pf->hw.fc.requested_mode = I40E_FC_NONE;
10502 err = i40e_init_adminq(hw);
10504 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10505 dev_info(&pdev->dev,
10506 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10508 dev_info(&pdev->dev,
10509 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10514 /* provide nvm, fw, api versions */
10515 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10516 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10517 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10518 i40e_nvm_version_str(hw));
10520 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10521 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10522 dev_info(&pdev->dev,
10523 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10524 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10525 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10526 dev_info(&pdev->dev,
10527 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10529 i40e_verify_eeprom(pf);
10531 /* Rev 0 hardware was never productized */
10532 if (hw->revision_id < 1)
10533 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10535 i40e_clear_pxe_mode(hw);
10536 err = i40e_get_capabilities(pf);
10538 goto err_adminq_setup;
10540 err = i40e_sw_init(pf);
10542 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10546 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10547 hw->func_caps.num_rx_qp,
10548 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10550 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10551 goto err_init_lan_hmc;
10554 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10556 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10558 goto err_configure_lan_hmc;
10561 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10562 * Ignore error return codes because if it was already disabled via
10563 * hardware settings this will fail
10565 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10566 (pf->hw.aq.fw_maj_ver < 4)) {
10567 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10568 i40e_aq_stop_lldp(hw, true, NULL);
10571 i40e_get_mac_addr(hw, hw->mac.addr);
10572 if (!is_valid_ether_addr(hw->mac.addr)) {
10573 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10577 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10578 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10579 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10580 if (is_valid_ether_addr(hw->mac.port_addr))
10581 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10583 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10585 dev_info(&pdev->dev,
10586 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10587 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10588 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10590 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10592 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10593 #endif /* I40E_FCOE */
10595 pci_set_drvdata(pdev, pf);
10596 pci_save_state(pdev);
10597 #ifdef CONFIG_I40E_DCB
10598 err = i40e_init_pf_dcb(pf);
10600 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10601 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10602 /* Continue without DCB enabled */
10604 #endif /* CONFIG_I40E_DCB */
10606 /* set up periodic task facility */
10607 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10608 pf->service_timer_period = HZ;
10610 INIT_WORK(&pf->service_task, i40e_service_task);
10611 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10612 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10614 /* NVM bit on means WoL disabled for the port */
10615 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10616 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10617 pf->wol_en = false;
10620 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10622 /* set up the main switch operations */
10623 i40e_determine_queue_usage(pf);
10624 err = i40e_init_interrupt_scheme(pf);
10626 goto err_switch_setup;
10628 /* The number of VSIs reported by the FW is the minimum guaranteed
10629 * to us; HW supports far more and we share the remaining pool with
10630 * the other PFs. We allocate space for more than the guarantee with
10631 * the understanding that we might not get them all later.
10633 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10634 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10636 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10638 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10639 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10640 pf->vsi = kzalloc(len, GFP_KERNEL);
10643 goto err_switch_setup;
10646 #ifdef CONFIG_PCI_IOV
10647 /* prep for VF support */
10648 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10649 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10650 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10651 if (pci_num_vf(pdev))
10652 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10655 err = i40e_setup_pf_switch(pf, false);
10657 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10661 /* Make sure flow control is set according to current settings */
10662 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10663 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10664 dev_dbg(&pf->pdev->dev,
10665 "Set fc with err %s aq_err %s on get_phy_cap\n",
10666 i40e_stat_str(hw, err),
10667 i40e_aq_str(hw, hw->aq.asq_last_status));
10668 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10669 dev_dbg(&pf->pdev->dev,
10670 "Set fc with err %s aq_err %s on set_phy_config\n",
10671 i40e_stat_str(hw, err),
10672 i40e_aq_str(hw, hw->aq.asq_last_status));
10673 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10674 dev_dbg(&pf->pdev->dev,
10675 "Set fc with err %s aq_err %s on get_link_info\n",
10676 i40e_stat_str(hw, err),
10677 i40e_aq_str(hw, hw->aq.asq_last_status));
10679 /* if FDIR VSI was set up, start it now */
10680 for (i = 0; i < pf->num_alloc_vsi; i++) {
10681 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10682 i40e_vsi_open(pf->vsi[i]);
10687 /* driver is only interested in link up/down and module qualification
10688 * reports from firmware
10690 err = i40e_aq_set_phy_int_mask(&pf->hw,
10691 I40E_AQ_EVENT_LINK_UPDOWN |
10692 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10694 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10695 i40e_stat_str(&pf->hw, err),
10696 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10698 /* Reconfigure hardware for allowing smaller MSS in the case
10699 * of TSO, so that we avoid the MDD being fired and causing
10700 * a reset in the case of small MSS+TSO.
10702 val = rd32(hw, I40E_REG_MSS);
10703 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10704 val &= ~I40E_REG_MSS_MIN_MASK;
10705 val |= I40E_64BYTE_MSS;
10706 wr32(hw, I40E_REG_MSS, val);
10709 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10710 (pf->hw.aq.fw_maj_ver < 4)) {
10712 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10714 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10715 i40e_stat_str(&pf->hw, err),
10716 i40e_aq_str(&pf->hw,
10717 pf->hw.aq.asq_last_status));
10719 /* The main driver is (mostly) up and happy. We need to set this state
10720 * before setting up the misc vector or we get a race and the vector
10721 * ends up disabled forever.
10723 clear_bit(__I40E_DOWN, &pf->state);
10725 /* In case of MSIX we are going to setup the misc vector right here
10726 * to handle admin queue events etc. In case of legacy and MSI
10727 * the misc functionality and queue processing is combined in
10728 * the same vector and that gets setup at open.
10730 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10731 err = i40e_setup_misc_vector(pf);
10733 dev_info(&pdev->dev,
10734 "setup of misc vector failed: %d\n", err);
10739 #ifdef CONFIG_PCI_IOV
10740 /* prep for VF support */
10741 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10742 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10743 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10746 /* disable link interrupts for VFs */
10747 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10748 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10749 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10752 if (pci_num_vf(pdev)) {
10753 dev_info(&pdev->dev,
10754 "Active VFs found, allocating resources.\n");
10755 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10757 dev_info(&pdev->dev,
10758 "Error %d allocating resources for existing VFs\n",
10762 #endif /* CONFIG_PCI_IOV */
10766 i40e_dbg_pf_init(pf);
10768 /* tell the firmware that we're starting */
10769 i40e_send_version(pf);
10771 /* since everything's happy, start the service_task timer */
10772 mod_timer(&pf->service_timer,
10773 round_jiffies(jiffies + pf->service_timer_period));
10776 /* create FCoE interface */
10777 i40e_fcoe_vsi_setup(pf);
10780 #define PCI_SPEED_SIZE 8
10781 #define PCI_WIDTH_SIZE 8
10782 /* Devices on the IOSF bus do not have this information
10783 * and will report PCI Gen 1 x 1 by default so don't bother
10786 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10787 char speed[PCI_SPEED_SIZE] = "Unknown";
10788 char width[PCI_WIDTH_SIZE] = "Unknown";
10790 /* Get the negotiated link width and speed from PCI config
10793 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10796 i40e_set_pci_config_data(hw, link_status);
10798 switch (hw->bus.speed) {
10799 case i40e_bus_speed_8000:
10800 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10801 case i40e_bus_speed_5000:
10802 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10803 case i40e_bus_speed_2500:
10804 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10808 switch (hw->bus.width) {
10809 case i40e_bus_width_pcie_x8:
10810 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10811 case i40e_bus_width_pcie_x4:
10812 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10813 case i40e_bus_width_pcie_x2:
10814 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10815 case i40e_bus_width_pcie_x1:
10816 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10821 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10824 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10825 hw->bus.speed < i40e_bus_speed_8000) {
10826 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10827 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10831 /* get the requested speeds from the fw */
10832 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10834 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10835 i40e_stat_str(&pf->hw, err),
10836 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10837 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10839 /* get the supported phy types from the fw */
10840 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10842 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10843 i40e_stat_str(&pf->hw, err),
10844 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10845 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10847 /* Add a filter to drop all Flow control frames from any VSI from being
10848 * transmitted. By doing so we stop a malicious VF from sending out
10849 * PAUSE or PFC frames and potentially controlling traffic for other
10851 * The FW can still send Flow control frames if enabled.
10853 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10854 pf->main_vsi_seid);
10856 /* print a string summarizing features */
10857 i40e_print_features(pf);
10861 /* Unwind what we've done if something failed in the setup */
10863 set_bit(__I40E_DOWN, &pf->state);
10864 i40e_clear_interrupt_scheme(pf);
10867 i40e_reset_interrupt_capability(pf);
10868 del_timer_sync(&pf->service_timer);
10870 err_configure_lan_hmc:
10871 (void)i40e_shutdown_lan_hmc(hw);
10873 kfree(pf->qp_pile);
10876 (void)i40e_shutdown_adminq(hw);
10878 iounmap(hw->hw_addr);
10882 pci_disable_pcie_error_reporting(pdev);
10883 pci_release_selected_regions(pdev,
10884 pci_select_bars(pdev, IORESOURCE_MEM));
10887 pci_disable_device(pdev);
10892 * i40e_remove - Device removal routine
10893 * @pdev: PCI device information struct
10895 * i40e_remove is called by the PCI subsystem to alert the driver
10896 * that is should release a PCI device. This could be caused by a
10897 * Hot-Plug event, or because the driver is going to be removed from
10900 static void i40e_remove(struct pci_dev *pdev)
10902 struct i40e_pf *pf = pci_get_drvdata(pdev);
10903 struct i40e_hw *hw = &pf->hw;
10904 i40e_status ret_code;
10907 i40e_dbg_pf_exit(pf);
10911 /* Disable RSS in hw */
10912 wr32(hw, I40E_PFQF_HENA(0), 0);
10913 wr32(hw, I40E_PFQF_HENA(1), 0);
10915 /* no more scheduling of any task */
10916 set_bit(__I40E_DOWN, &pf->state);
10917 del_timer_sync(&pf->service_timer);
10918 cancel_work_sync(&pf->service_task);
10919 i40e_fdir_teardown(pf);
10921 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10923 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10926 i40e_fdir_teardown(pf);
10928 /* If there is a switch structure or any orphans, remove them.
10929 * This will leave only the PF's VSI remaining.
10931 for (i = 0; i < I40E_MAX_VEB; i++) {
10935 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10936 pf->veb[i]->uplink_seid == 0)
10937 i40e_switch_branch_release(pf->veb[i]);
10940 /* Now we can shutdown the PF's VSI, just before we kill
10943 if (pf->vsi[pf->lan_vsi])
10944 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10946 /* shutdown and destroy the HMC */
10947 if (pf->hw.hmc.hmc_obj) {
10948 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10950 dev_warn(&pdev->dev,
10951 "Failed to destroy the HMC resources: %d\n",
10955 /* shutdown the adminq */
10956 ret_code = i40e_shutdown_adminq(&pf->hw);
10958 dev_warn(&pdev->dev,
10959 "Failed to destroy the Admin Queue resources: %d\n",
10962 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10963 i40e_clear_interrupt_scheme(pf);
10964 for (i = 0; i < pf->num_alloc_vsi; i++) {
10966 i40e_vsi_clear_rings(pf->vsi[i]);
10967 i40e_vsi_clear(pf->vsi[i]);
10972 for (i = 0; i < I40E_MAX_VEB; i++) {
10977 kfree(pf->qp_pile);
10980 iounmap(pf->hw.hw_addr);
10982 pci_release_selected_regions(pdev,
10983 pci_select_bars(pdev, IORESOURCE_MEM));
10985 pci_disable_pcie_error_reporting(pdev);
10986 pci_disable_device(pdev);
10990 * i40e_pci_error_detected - warning that something funky happened in PCI land
10991 * @pdev: PCI device information struct
10993 * Called to warn that something happened and the error handling steps
10994 * are in progress. Allows the driver to quiesce things, be ready for
10997 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10998 enum pci_channel_state error)
11000 struct i40e_pf *pf = pci_get_drvdata(pdev);
11002 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11004 /* shutdown all operations */
11005 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11007 i40e_prep_for_reset(pf);
11011 /* Request a slot reset */
11012 return PCI_ERS_RESULT_NEED_RESET;
11016 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11017 * @pdev: PCI device information struct
11019 * Called to find if the driver can work with the device now that
11020 * the pci slot has been reset. If a basic connection seems good
11021 * (registers are readable and have sane content) then return a
11022 * happy little PCI_ERS_RESULT_xxx.
11024 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11026 struct i40e_pf *pf = pci_get_drvdata(pdev);
11027 pci_ers_result_t result;
11031 dev_dbg(&pdev->dev, "%s\n", __func__);
11032 if (pci_enable_device_mem(pdev)) {
11033 dev_info(&pdev->dev,
11034 "Cannot re-enable PCI device after reset.\n");
11035 result = PCI_ERS_RESULT_DISCONNECT;
11037 pci_set_master(pdev);
11038 pci_restore_state(pdev);
11039 pci_save_state(pdev);
11040 pci_wake_from_d3(pdev, false);
11042 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11044 result = PCI_ERS_RESULT_RECOVERED;
11046 result = PCI_ERS_RESULT_DISCONNECT;
11049 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11051 dev_info(&pdev->dev,
11052 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11054 /* non-fatal, continue */
11061 * i40e_pci_error_resume - restart operations after PCI error recovery
11062 * @pdev: PCI device information struct
11064 * Called to allow the driver to bring things back up after PCI error
11065 * and/or reset recovery has finished.
11067 static void i40e_pci_error_resume(struct pci_dev *pdev)
11069 struct i40e_pf *pf = pci_get_drvdata(pdev);
11071 dev_dbg(&pdev->dev, "%s\n", __func__);
11072 if (test_bit(__I40E_SUSPENDED, &pf->state))
11076 i40e_handle_reset_warning(pf);
11081 * i40e_shutdown - PCI callback for shutting down
11082 * @pdev: PCI device information struct
11084 static void i40e_shutdown(struct pci_dev *pdev)
11086 struct i40e_pf *pf = pci_get_drvdata(pdev);
11087 struct i40e_hw *hw = &pf->hw;
11089 set_bit(__I40E_SUSPENDED, &pf->state);
11090 set_bit(__I40E_DOWN, &pf->state);
11092 i40e_prep_for_reset(pf);
11095 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11096 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11098 del_timer_sync(&pf->service_timer);
11099 cancel_work_sync(&pf->service_task);
11100 i40e_fdir_teardown(pf);
11103 i40e_prep_for_reset(pf);
11106 wr32(hw, I40E_PFPM_APM,
11107 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11108 wr32(hw, I40E_PFPM_WUFC,
11109 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11111 i40e_clear_interrupt_scheme(pf);
11113 if (system_state == SYSTEM_POWER_OFF) {
11114 pci_wake_from_d3(pdev, pf->wol_en);
11115 pci_set_power_state(pdev, PCI_D3hot);
11121 * i40e_suspend - PCI callback for moving to D3
11122 * @pdev: PCI device information struct
11124 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11126 struct i40e_pf *pf = pci_get_drvdata(pdev);
11127 struct i40e_hw *hw = &pf->hw;
11129 set_bit(__I40E_SUSPENDED, &pf->state);
11130 set_bit(__I40E_DOWN, &pf->state);
11133 i40e_prep_for_reset(pf);
11136 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11137 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11139 pci_wake_from_d3(pdev, pf->wol_en);
11140 pci_set_power_state(pdev, PCI_D3hot);
11146 * i40e_resume - PCI callback for waking up from D3
11147 * @pdev: PCI device information struct
11149 static int i40e_resume(struct pci_dev *pdev)
11151 struct i40e_pf *pf = pci_get_drvdata(pdev);
11154 pci_set_power_state(pdev, PCI_D0);
11155 pci_restore_state(pdev);
11156 /* pci_restore_state() clears dev->state_saves, so
11157 * call pci_save_state() again to restore it.
11159 pci_save_state(pdev);
11161 err = pci_enable_device_mem(pdev);
11163 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11166 pci_set_master(pdev);
11168 /* no wakeup events while running */
11169 pci_wake_from_d3(pdev, false);
11171 /* handling the reset will rebuild the device state */
11172 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11173 clear_bit(__I40E_DOWN, &pf->state);
11175 i40e_reset_and_rebuild(pf, false);
11183 static const struct pci_error_handlers i40e_err_handler = {
11184 .error_detected = i40e_pci_error_detected,
11185 .slot_reset = i40e_pci_error_slot_reset,
11186 .resume = i40e_pci_error_resume,
11189 static struct pci_driver i40e_driver = {
11190 .name = i40e_driver_name,
11191 .id_table = i40e_pci_tbl,
11192 .probe = i40e_probe,
11193 .remove = i40e_remove,
11195 .suspend = i40e_suspend,
11196 .resume = i40e_resume,
11198 .shutdown = i40e_shutdown,
11199 .err_handler = &i40e_err_handler,
11200 .sriov_configure = i40e_pci_sriov_configure,
11204 * i40e_init_module - Driver registration routine
11206 * i40e_init_module is the first routine called when the driver is
11207 * loaded. All it does is register with the PCI subsystem.
11209 static int __init i40e_init_module(void)
11211 pr_info("%s: %s - version %s\n", i40e_driver_name,
11212 i40e_driver_string, i40e_driver_version_str);
11213 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11216 return pci_register_driver(&i40e_driver);
11218 module_init(i40e_init_module);
11221 * i40e_exit_module - Driver exit cleanup routine
11223 * i40e_exit_module is called just before the driver is removed
11226 static void __exit i40e_exit_module(void)
11228 pci_unregister_driver(&i40e_driver);
11231 module_exit(i40e_exit_module);