1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #if IS_ENABLED(CONFIG_VXLAN)
31 #include <net/vxlan.h>
33 #if IS_ENABLED(CONFIG_GENEVE)
34 #include <net/geneve.h>
37 const char i40e_driver_name[] = "i40e";
38 static const char i40e_driver_string[] =
39 "Intel(R) Ethernet Connection XL710 Network Driver";
43 #define DRV_VERSION_MAJOR 1
44 #define DRV_VERSION_MINOR 4
45 #define DRV_VERSION_BUILD 8
46 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
47 __stringify(DRV_VERSION_MINOR) "." \
48 __stringify(DRV_VERSION_BUILD) DRV_KERN
49 const char i40e_driver_version_str[] = DRV_VERSION;
50 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
52 /* a bit of forward declarations */
53 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
54 static void i40e_handle_reset_warning(struct i40e_pf *pf);
55 static int i40e_add_vsi(struct i40e_vsi *vsi);
56 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
57 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
58 static int i40e_setup_misc_vector(struct i40e_pf *pf);
59 static void i40e_determine_queue_usage(struct i40e_pf *pf);
60 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
61 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
62 u16 rss_table_size, u16 rss_size);
63 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
64 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
66 /* i40e_pci_tbl - PCI Device ID Table
68 * Last entry must be all 0s
70 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
71 * Class, Class Mask, private data (not used) }
73 static const struct pci_device_id i40e_pci_tbl[] = {
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
90 /* required last entry */
93 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95 #define I40E_MAX_VF_COUNT 128
96 static int debug = -1;
97 module_param(debug, int, 0);
98 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
100 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
101 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
106 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
107 * @hw: pointer to the HW structure
108 * @mem: ptr to mem struct to fill out
109 * @size: size of memory requested
110 * @alignment: what to align the allocation to
112 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
113 u64 size, u32 alignment)
115 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
117 mem->size = ALIGN(size, alignment);
118 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
119 &mem->pa, GFP_KERNEL);
127 * i40e_free_dma_mem_d - OS specific memory free for shared code
128 * @hw: pointer to the HW structure
129 * @mem: ptr to mem struct to free
131 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
133 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
135 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
144 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
145 * @hw: pointer to the HW structure
146 * @mem: ptr to mem struct to fill out
147 * @size: size of memory requested
149 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
153 mem->va = kzalloc(size, GFP_KERNEL);
162 * i40e_free_virt_mem_d - OS specific memory free for shared code
163 * @hw: pointer to the HW structure
164 * @mem: ptr to mem struct to free
166 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
168 /* it's ok to kfree a NULL pointer */
177 * i40e_get_lump - find a lump of free generic resource
178 * @pf: board private structure
179 * @pile: the pile of resource to search
180 * @needed: the number of items needed
181 * @id: an owner id to stick on the items assigned
183 * Returns the base item index of the lump, or negative for error
185 * The search_hint trick and lack of advanced fit-finding only work
186 * because we're highly likely to have all the same size lump requests.
187 * Linear search time and any fragmentation should be minimal.
189 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
195 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
196 dev_info(&pf->pdev->dev,
197 "param err: pile=%p needed=%d id=0x%04x\n",
202 /* start the linear search with an imperfect hint */
203 i = pile->search_hint;
204 while (i < pile->num_entries) {
205 /* skip already allocated entries */
206 if (pile->list[i] & I40E_PILE_VALID_BIT) {
211 /* do we have enough in this lump? */
212 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
213 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
218 /* there was enough, so assign it to the requestor */
219 for (j = 0; j < needed; j++)
220 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
222 pile->search_hint = i + j;
226 /* not enough, so skip over it and continue looking */
234 * i40e_put_lump - return a lump of generic resource
235 * @pile: the pile of resource to search
236 * @index: the base item index
237 * @id: the owner id of the items assigned
239 * Returns the count of items in the lump
241 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
243 int valid_id = (id | I40E_PILE_VALID_BIT);
247 if (!pile || index >= pile->num_entries)
251 i < pile->num_entries && pile->list[i] == valid_id;
257 if (count && index < pile->search_hint)
258 pile->search_hint = index;
264 * i40e_find_vsi_from_id - searches for the vsi with the given id
265 * @pf - the pf structure to search for the vsi
266 * @id - id of the vsi it is searching for
268 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
272 for (i = 0; i < pf->num_alloc_vsi; i++)
273 if (pf->vsi[i] && (pf->vsi[i]->id == id))
280 * i40e_service_event_schedule - Schedule the service task to wake up
281 * @pf: board private structure
283 * If not already scheduled, this puts the task into the work queue
285 static void i40e_service_event_schedule(struct i40e_pf *pf)
287 if (!test_bit(__I40E_DOWN, &pf->state) &&
288 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
289 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
290 schedule_work(&pf->service_task);
294 * i40e_tx_timeout - Respond to a Tx Hang
295 * @netdev: network interface device structure
297 * If any port has noticed a Tx timeout, it is likely that the whole
298 * device is munged, not just the one netdev port, so go for the full
302 void i40e_tx_timeout(struct net_device *netdev)
304 static void i40e_tx_timeout(struct net_device *netdev)
307 struct i40e_netdev_priv *np = netdev_priv(netdev);
308 struct i40e_vsi *vsi = np->vsi;
309 struct i40e_pf *pf = vsi->back;
310 struct i40e_ring *tx_ring = NULL;
311 unsigned int i, hung_queue = 0;
314 pf->tx_timeout_count++;
316 /* find the stopped queue the same way the stack does */
317 for (i = 0; i < netdev->num_tx_queues; i++) {
318 struct netdev_queue *q;
319 unsigned long trans_start;
321 q = netdev_get_tx_queue(netdev, i);
322 trans_start = q->trans_start ? : netdev->trans_start;
323 if (netif_xmit_stopped(q) &&
325 (trans_start + netdev->watchdog_timeo))) {
331 if (i == netdev->num_tx_queues) {
332 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
334 /* now that we have an index, find the tx_ring struct */
335 for (i = 0; i < vsi->num_queue_pairs; i++) {
336 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
338 vsi->tx_rings[i]->queue_index) {
339 tx_ring = vsi->tx_rings[i];
346 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
347 pf->tx_timeout_recovery_level = 1; /* reset after some time */
348 else if (time_before(jiffies,
349 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
350 return; /* don't do any new action before the next timeout */
353 head = i40e_get_head(tx_ring);
354 /* Read interrupt register */
355 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
357 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
358 tx_ring->vsi->base_vector - 1));
360 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
362 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
363 vsi->seid, hung_queue, tx_ring->next_to_clean,
364 head, tx_ring->next_to_use,
365 readl(tx_ring->tail), val);
368 pf->tx_timeout_last_recovery = jiffies;
369 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
370 pf->tx_timeout_recovery_level, hung_queue);
372 switch (pf->tx_timeout_recovery_level) {
374 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
377 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
380 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
383 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
387 i40e_service_event_schedule(pf);
388 pf->tx_timeout_recovery_level++;
392 * i40e_release_rx_desc - Store the new tail and head values
393 * @rx_ring: ring to bump
394 * @val: new head index
396 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
398 rx_ring->next_to_use = val;
400 /* Force memory writes to complete before letting h/w
401 * know there are new descriptors to fetch. (Only
402 * applicable for weak-ordered memory model archs,
406 writel(val, rx_ring->tail);
410 * i40e_get_vsi_stats_struct - Get System Network Statistics
411 * @vsi: the VSI we care about
413 * Returns the address of the device statistics structure.
414 * The statistics are actually updated from the service task.
416 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
418 return &vsi->net_stats;
422 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
423 * @netdev: network interface device structure
425 * Returns the address of the device statistics structure.
426 * The statistics are actually updated from the service task.
429 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
430 struct net_device *netdev,
431 struct rtnl_link_stats64 *stats)
433 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
434 struct net_device *netdev,
435 struct rtnl_link_stats64 *stats)
438 struct i40e_netdev_priv *np = netdev_priv(netdev);
439 struct i40e_ring *tx_ring, *rx_ring;
440 struct i40e_vsi *vsi = np->vsi;
441 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
444 if (test_bit(__I40E_DOWN, &vsi->state))
451 for (i = 0; i < vsi->num_queue_pairs; i++) {
455 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
460 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
461 packets = tx_ring->stats.packets;
462 bytes = tx_ring->stats.bytes;
463 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
465 stats->tx_packets += packets;
466 stats->tx_bytes += bytes;
467 rx_ring = &tx_ring[1];
470 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
471 packets = rx_ring->stats.packets;
472 bytes = rx_ring->stats.bytes;
473 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
475 stats->rx_packets += packets;
476 stats->rx_bytes += bytes;
480 /* following stats updated by i40e_watchdog_subtask() */
481 stats->multicast = vsi_stats->multicast;
482 stats->tx_errors = vsi_stats->tx_errors;
483 stats->tx_dropped = vsi_stats->tx_dropped;
484 stats->rx_errors = vsi_stats->rx_errors;
485 stats->rx_dropped = vsi_stats->rx_dropped;
486 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
487 stats->rx_length_errors = vsi_stats->rx_length_errors;
493 * i40e_vsi_reset_stats - Resets all stats of the given vsi
494 * @vsi: the VSI to have its stats reset
496 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
498 struct rtnl_link_stats64 *ns;
504 ns = i40e_get_vsi_stats_struct(vsi);
505 memset(ns, 0, sizeof(*ns));
506 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
507 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
508 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
509 if (vsi->rx_rings && vsi->rx_rings[0]) {
510 for (i = 0; i < vsi->num_queue_pairs; i++) {
511 memset(&vsi->rx_rings[i]->stats, 0,
512 sizeof(vsi->rx_rings[i]->stats));
513 memset(&vsi->rx_rings[i]->rx_stats, 0,
514 sizeof(vsi->rx_rings[i]->rx_stats));
515 memset(&vsi->tx_rings[i]->stats, 0,
516 sizeof(vsi->tx_rings[i]->stats));
517 memset(&vsi->tx_rings[i]->tx_stats, 0,
518 sizeof(vsi->tx_rings[i]->tx_stats));
521 vsi->stat_offsets_loaded = false;
525 * i40e_pf_reset_stats - Reset all of the stats for the given PF
526 * @pf: the PF to be reset
528 void i40e_pf_reset_stats(struct i40e_pf *pf)
532 memset(&pf->stats, 0, sizeof(pf->stats));
533 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
534 pf->stat_offsets_loaded = false;
536 for (i = 0; i < I40E_MAX_VEB; i++) {
538 memset(&pf->veb[i]->stats, 0,
539 sizeof(pf->veb[i]->stats));
540 memset(&pf->veb[i]->stats_offsets, 0,
541 sizeof(pf->veb[i]->stats_offsets));
542 pf->veb[i]->stat_offsets_loaded = false;
548 * i40e_stat_update48 - read and update a 48 bit stat from the chip
549 * @hw: ptr to the hardware info
550 * @hireg: the high 32 bit reg to read
551 * @loreg: the low 32 bit reg to read
552 * @offset_loaded: has the initial offset been loaded yet
553 * @offset: ptr to current offset value
554 * @stat: ptr to the stat
556 * Since the device stats are not reset at PFReset, they likely will not
557 * be zeroed when the driver starts. We'll save the first values read
558 * and use them as offsets to be subtracted from the raw values in order
559 * to report stats that count from zero. In the process, we also manage
560 * the potential roll-over.
562 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
563 bool offset_loaded, u64 *offset, u64 *stat)
567 if (hw->device_id == I40E_DEV_ID_QEMU) {
568 new_data = rd32(hw, loreg);
569 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
571 new_data = rd64(hw, loreg);
575 if (likely(new_data >= *offset))
576 *stat = new_data - *offset;
578 *stat = (new_data + BIT_ULL(48)) - *offset;
579 *stat &= 0xFFFFFFFFFFFFULL;
583 * i40e_stat_update32 - read and update a 32 bit stat from the chip
584 * @hw: ptr to the hardware info
585 * @reg: the hw reg to read
586 * @offset_loaded: has the initial offset been loaded yet
587 * @offset: ptr to current offset value
588 * @stat: ptr to the stat
590 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
591 bool offset_loaded, u64 *offset, u64 *stat)
595 new_data = rd32(hw, reg);
598 if (likely(new_data >= *offset))
599 *stat = (u32)(new_data - *offset);
601 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
605 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
606 * @vsi: the VSI to be updated
608 void i40e_update_eth_stats(struct i40e_vsi *vsi)
610 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
611 struct i40e_pf *pf = vsi->back;
612 struct i40e_hw *hw = &pf->hw;
613 struct i40e_eth_stats *oes;
614 struct i40e_eth_stats *es; /* device's eth stats */
616 es = &vsi->eth_stats;
617 oes = &vsi->eth_stats_offsets;
619 /* Gather up the stats that the hw collects */
620 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->tx_errors, &es->tx_errors);
623 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->rx_discards, &es->rx_discards);
626 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
629 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->tx_errors, &es->tx_errors);
633 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
634 I40E_GLV_GORCL(stat_idx),
635 vsi->stat_offsets_loaded,
636 &oes->rx_bytes, &es->rx_bytes);
637 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
638 I40E_GLV_UPRCL(stat_idx),
639 vsi->stat_offsets_loaded,
640 &oes->rx_unicast, &es->rx_unicast);
641 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
642 I40E_GLV_MPRCL(stat_idx),
643 vsi->stat_offsets_loaded,
644 &oes->rx_multicast, &es->rx_multicast);
645 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
646 I40E_GLV_BPRCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->rx_broadcast, &es->rx_broadcast);
650 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
651 I40E_GLV_GOTCL(stat_idx),
652 vsi->stat_offsets_loaded,
653 &oes->tx_bytes, &es->tx_bytes);
654 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
655 I40E_GLV_UPTCL(stat_idx),
656 vsi->stat_offsets_loaded,
657 &oes->tx_unicast, &es->tx_unicast);
658 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
659 I40E_GLV_MPTCL(stat_idx),
660 vsi->stat_offsets_loaded,
661 &oes->tx_multicast, &es->tx_multicast);
662 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
663 I40E_GLV_BPTCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->tx_broadcast, &es->tx_broadcast);
666 vsi->stat_offsets_loaded = true;
670 * i40e_update_veb_stats - Update Switch component statistics
671 * @veb: the VEB being updated
673 static void i40e_update_veb_stats(struct i40e_veb *veb)
675 struct i40e_pf *pf = veb->pf;
676 struct i40e_hw *hw = &pf->hw;
677 struct i40e_eth_stats *oes;
678 struct i40e_eth_stats *es; /* device's eth stats */
679 struct i40e_veb_tc_stats *veb_oes;
680 struct i40e_veb_tc_stats *veb_es;
683 idx = veb->stats_idx;
685 oes = &veb->stats_offsets;
686 veb_es = &veb->tc_stats;
687 veb_oes = &veb->tc_stats_offsets;
689 /* Gather up the stats that the hw collects */
690 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
691 veb->stat_offsets_loaded,
692 &oes->tx_discards, &es->tx_discards);
693 if (hw->revision_id > 0)
694 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
695 veb->stat_offsets_loaded,
696 &oes->rx_unknown_protocol,
697 &es->rx_unknown_protocol);
698 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_bytes, &es->rx_bytes);
701 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_unicast, &es->rx_unicast);
704 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->rx_multicast, &es->rx_multicast);
707 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
708 veb->stat_offsets_loaded,
709 &oes->rx_broadcast, &es->rx_broadcast);
711 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_bytes, &es->tx_bytes);
714 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_unicast, &es->tx_unicast);
717 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
718 veb->stat_offsets_loaded,
719 &oes->tx_multicast, &es->tx_multicast);
720 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
721 veb->stat_offsets_loaded,
722 &oes->tx_broadcast, &es->tx_broadcast);
723 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
724 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
725 I40E_GLVEBTC_RPCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_packets[i],
728 &veb_es->tc_rx_packets[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
730 I40E_GLVEBTC_RBCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_rx_bytes[i],
733 &veb_es->tc_rx_bytes[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
735 I40E_GLVEBTC_TPCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_packets[i],
738 &veb_es->tc_tx_packets[i]);
739 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
740 I40E_GLVEBTC_TBCL(i, idx),
741 veb->stat_offsets_loaded,
742 &veb_oes->tc_tx_bytes[i],
743 &veb_es->tc_tx_bytes[i]);
745 veb->stat_offsets_loaded = true;
750 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
751 * @vsi: the VSI that is capable of doing FCoE
753 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
755 struct i40e_pf *pf = vsi->back;
756 struct i40e_hw *hw = &pf->hw;
757 struct i40e_fcoe_stats *ofs;
758 struct i40e_fcoe_stats *fs; /* device's eth stats */
761 if (vsi->type != I40E_VSI_FCOE)
764 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
765 fs = &vsi->fcoe_stats;
766 ofs = &vsi->fcoe_stats_offsets;
768 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
771 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
774 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
777 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
780 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
783 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
786 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->fcoe_last_error, &fs->fcoe_last_error);
789 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
790 vsi->fcoe_stat_offsets_loaded,
791 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
793 vsi->fcoe_stat_offsets_loaded = true;
798 * i40e_update_vsi_stats - Update the vsi statistics counters.
799 * @vsi: the VSI to be updated
801 * There are a few instances where we store the same stat in a
802 * couple of different structs. This is partly because we have
803 * the netdev stats that need to be filled out, which is slightly
804 * different from the "eth_stats" defined by the chip and used in
805 * VF communications. We sort it out here.
807 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
809 struct i40e_pf *pf = vsi->back;
810 struct rtnl_link_stats64 *ons;
811 struct rtnl_link_stats64 *ns; /* netdev stats */
812 struct i40e_eth_stats *oes;
813 struct i40e_eth_stats *es; /* device's eth stats */
814 u32 tx_restart, tx_busy;
825 if (test_bit(__I40E_DOWN, &vsi->state) ||
826 test_bit(__I40E_CONFIG_BUSY, &pf->state))
829 ns = i40e_get_vsi_stats_struct(vsi);
830 ons = &vsi->net_stats_offsets;
831 es = &vsi->eth_stats;
832 oes = &vsi->eth_stats_offsets;
834 /* Gather up the netdev and vsi stats that the driver collects
835 * on the fly during packet processing
839 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
843 for (q = 0; q < vsi->num_queue_pairs; q++) {
845 p = ACCESS_ONCE(vsi->tx_rings[q]);
848 start = u64_stats_fetch_begin_irq(&p->syncp);
849 packets = p->stats.packets;
850 bytes = p->stats.bytes;
851 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
854 tx_restart += p->tx_stats.restart_queue;
855 tx_busy += p->tx_stats.tx_busy;
856 tx_linearize += p->tx_stats.tx_linearize;
857 tx_force_wb += p->tx_stats.tx_force_wb;
859 /* Rx queue is part of the same block as Tx queue */
862 start = u64_stats_fetch_begin_irq(&p->syncp);
863 packets = p->stats.packets;
864 bytes = p->stats.bytes;
865 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
868 rx_buf += p->rx_stats.alloc_buff_failed;
869 rx_page += p->rx_stats.alloc_page_failed;
872 vsi->tx_restart = tx_restart;
873 vsi->tx_busy = tx_busy;
874 vsi->tx_linearize = tx_linearize;
875 vsi->tx_force_wb = tx_force_wb;
876 vsi->rx_page_failed = rx_page;
877 vsi->rx_buf_failed = rx_buf;
879 ns->rx_packets = rx_p;
881 ns->tx_packets = tx_p;
884 /* update netdev stats from eth stats */
885 i40e_update_eth_stats(vsi);
886 ons->tx_errors = oes->tx_errors;
887 ns->tx_errors = es->tx_errors;
888 ons->multicast = oes->rx_multicast;
889 ns->multicast = es->rx_multicast;
890 ons->rx_dropped = oes->rx_discards;
891 ns->rx_dropped = es->rx_discards;
892 ons->tx_dropped = oes->tx_discards;
893 ns->tx_dropped = es->tx_discards;
895 /* pull in a couple PF stats if this is the main vsi */
896 if (vsi == pf->vsi[pf->lan_vsi]) {
897 ns->rx_crc_errors = pf->stats.crc_errors;
898 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
899 ns->rx_length_errors = pf->stats.rx_length_errors;
904 * i40e_update_pf_stats - Update the PF statistics counters.
905 * @pf: the PF to be updated
907 static void i40e_update_pf_stats(struct i40e_pf *pf)
909 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
910 struct i40e_hw_port_stats *nsd = &pf->stats;
911 struct i40e_hw *hw = &pf->hw;
915 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
916 I40E_GLPRT_GORCL(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
919 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
920 I40E_GLPRT_GOTCL(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
923 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_discards,
926 &nsd->eth.rx_discards);
927 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
928 I40E_GLPRT_UPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_unicast,
931 &nsd->eth.rx_unicast);
932 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
933 I40E_GLPRT_MPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_multicast,
936 &nsd->eth.rx_multicast);
937 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
938 I40E_GLPRT_BPRCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.rx_broadcast,
941 &nsd->eth.rx_broadcast);
942 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
943 I40E_GLPRT_UPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_unicast,
946 &nsd->eth.tx_unicast);
947 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
948 I40E_GLPRT_MPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_multicast,
951 &nsd->eth.tx_multicast);
952 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
953 I40E_GLPRT_BPTCL(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->eth.tx_broadcast,
956 &nsd->eth.tx_broadcast);
958 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->tx_dropped_link_down,
961 &nsd->tx_dropped_link_down);
963 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->crc_errors, &nsd->crc_errors);
967 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->illegal_bytes, &nsd->illegal_bytes);
971 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->mac_local_faults,
974 &nsd->mac_local_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->mac_remote_faults,
978 &nsd->mac_remote_faults);
980 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->rx_length_errors,
983 &nsd->rx_length_errors);
985 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->link_xon_rx, &nsd->link_xon_rx);
988 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->link_xon_tx, &nsd->link_xon_tx);
991 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->link_xoff_rx, &nsd->link_xoff_rx);
994 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->link_xoff_tx, &nsd->link_xoff_tx);
998 for (i = 0; i < 8; i++) {
999 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1000 pf->stat_offsets_loaded,
1001 &osd->priority_xoff_rx[i],
1002 &nsd->priority_xoff_rx[i]);
1003 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1004 pf->stat_offsets_loaded,
1005 &osd->priority_xon_rx[i],
1006 &nsd->priority_xon_rx[i]);
1007 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1008 pf->stat_offsets_loaded,
1009 &osd->priority_xon_tx[i],
1010 &nsd->priority_xon_tx[i]);
1011 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xoff_tx[i],
1014 &nsd->priority_xoff_tx[i]);
1015 i40e_stat_update32(hw,
1016 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1017 pf->stat_offsets_loaded,
1018 &osd->priority_xon_2_xoff[i],
1019 &nsd->priority_xon_2_xoff[i]);
1022 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1023 I40E_GLPRT_PRC64L(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->rx_size_64, &nsd->rx_size_64);
1026 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1027 I40E_GLPRT_PRC127L(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->rx_size_127, &nsd->rx_size_127);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1031 I40E_GLPRT_PRC255L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_255, &nsd->rx_size_255);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1035 I40E_GLPRT_PRC511L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_511, &nsd->rx_size_511);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1039 I40E_GLPRT_PRC1023L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_1023, &nsd->rx_size_1023);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1043 I40E_GLPRT_PRC1522L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_1522, &nsd->rx_size_1522);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1047 I40E_GLPRT_PRC9522L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_big, &nsd->rx_size_big);
1051 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1052 I40E_GLPRT_PTC64L(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->tx_size_64, &nsd->tx_size_64);
1055 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1056 I40E_GLPRT_PTC127L(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->tx_size_127, &nsd->tx_size_127);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1060 I40E_GLPRT_PTC255L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_255, &nsd->tx_size_255);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1064 I40E_GLPRT_PTC511L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_511, &nsd->tx_size_511);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1068 I40E_GLPRT_PTC1023L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_1023, &nsd->tx_size_1023);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1072 I40E_GLPRT_PTC1522L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_1522, &nsd->tx_size_1522);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1076 I40E_GLPRT_PTC9522L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_big, &nsd->tx_size_big);
1080 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->rx_undersize, &nsd->rx_undersize);
1083 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_fragments, &nsd->rx_fragments);
1086 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_oversize, &nsd->rx_oversize);
1089 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->rx_jabber, &nsd->rx_jabber);
1094 i40e_stat_update32(hw,
1095 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1096 pf->stat_offsets_loaded,
1097 &osd->fd_atr_match, &nsd->fd_atr_match);
1098 i40e_stat_update32(hw,
1099 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1100 pf->stat_offsets_loaded,
1101 &osd->fd_sb_match, &nsd->fd_sb_match);
1102 i40e_stat_update32(hw,
1103 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1104 pf->stat_offsets_loaded,
1105 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1107 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1108 nsd->tx_lpi_status =
1109 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1110 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1111 nsd->rx_lpi_status =
1112 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1113 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1114 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1115 pf->stat_offsets_loaded,
1116 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1117 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1118 pf->stat_offsets_loaded,
1119 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1121 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1122 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1123 nsd->fd_sb_status = true;
1125 nsd->fd_sb_status = false;
1127 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1128 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1129 nsd->fd_atr_status = true;
1131 nsd->fd_atr_status = false;
1133 pf->stat_offsets_loaded = true;
1137 * i40e_update_stats - Update the various statistics counters.
1138 * @vsi: the VSI to be updated
1140 * Update the various stats for this VSI and its related entities.
1142 void i40e_update_stats(struct i40e_vsi *vsi)
1144 struct i40e_pf *pf = vsi->back;
1146 if (vsi == pf->vsi[pf->lan_vsi])
1147 i40e_update_pf_stats(pf);
1149 i40e_update_vsi_stats(vsi);
1151 i40e_update_fcoe_stats(vsi);
1156 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1157 * @vsi: the VSI to be searched
1158 * @macaddr: the MAC address
1160 * @is_vf: make sure its a VF filter, else doesn't matter
1161 * @is_netdev: make sure its a netdev filter, else doesn't matter
1163 * Returns ptr to the filter object or NULL
1165 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1166 u8 *macaddr, s16 vlan,
1167 bool is_vf, bool is_netdev)
1169 struct i40e_mac_filter *f;
1171 if (!vsi || !macaddr)
1174 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1175 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1176 (vlan == f->vlan) &&
1177 (!is_vf || f->is_vf) &&
1178 (!is_netdev || f->is_netdev))
1185 * i40e_find_mac - Find a mac addr in the macvlan filters list
1186 * @vsi: the VSI to be searched
1187 * @macaddr: the MAC address we are searching for
1188 * @is_vf: make sure its a VF filter, else doesn't matter
1189 * @is_netdev: make sure its a netdev filter, else doesn't matter
1191 * Returns the first filter with the provided MAC address or NULL if
1192 * MAC address was not found
1194 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1195 bool is_vf, bool is_netdev)
1197 struct i40e_mac_filter *f;
1199 if (!vsi || !macaddr)
1202 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1203 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1204 (!is_vf || f->is_vf) &&
1205 (!is_netdev || f->is_netdev))
1212 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1213 * @vsi: the VSI to be searched
1215 * Returns true if VSI is in vlan mode or false otherwise
1217 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1219 struct i40e_mac_filter *f;
1221 /* Only -1 for all the filters denotes not in vlan mode
1222 * so we have to go through all the list in order to make sure
1224 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1225 if (f->vlan >= 0 || vsi->info.pvid)
1233 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1234 * @vsi: the VSI to be searched
1235 * @macaddr: the mac address to be filtered
1236 * @is_vf: true if it is a VF
1237 * @is_netdev: true if it is a netdev
1239 * Goes through all the macvlan filters and adds a
1240 * macvlan filter for each unique vlan that already exists
1242 * Returns first filter found on success, else NULL
1244 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1245 bool is_vf, bool is_netdev)
1247 struct i40e_mac_filter *f;
1249 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1251 f->vlan = le16_to_cpu(vsi->info.pvid);
1252 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1253 is_vf, is_netdev)) {
1254 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1260 return list_first_entry_or_null(&vsi->mac_filter_list,
1261 struct i40e_mac_filter, list);
1265 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1266 * @vsi: the VSI to be searched
1267 * @macaddr: the mac address to be removed
1268 * @is_vf: true if it is a VF
1269 * @is_netdev: true if it is a netdev
1271 * Removes a given MAC address from a VSI, regardless of VLAN
1273 * Returns 0 for success, or error
1275 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1276 bool is_vf, bool is_netdev)
1278 struct i40e_mac_filter *f = NULL;
1281 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1282 "Missing mac_filter_list_lock\n");
1283 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1284 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1285 (is_vf == f->is_vf) &&
1286 (is_netdev == f->is_netdev)) {
1293 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1294 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1301 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1302 * @vsi: the PF Main VSI - inappropriate for any other VSI
1303 * @macaddr: the MAC address
1305 * Some older firmware configurations set up a default promiscuous VLAN
1306 * filter that needs to be removed.
1308 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1310 struct i40e_aqc_remove_macvlan_element_data element;
1311 struct i40e_pf *pf = vsi->back;
1314 /* Only appropriate for the PF main VSI */
1315 if (vsi->type != I40E_VSI_MAIN)
1318 memset(&element, 0, sizeof(element));
1319 ether_addr_copy(element.mac_addr, macaddr);
1320 element.vlan_tag = 0;
1321 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1322 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1323 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1331 * i40e_add_filter - Add a mac/vlan filter to the VSI
1332 * @vsi: the VSI to be searched
1333 * @macaddr: the MAC address
1335 * @is_vf: make sure its a VF filter, else doesn't matter
1336 * @is_netdev: make sure its a netdev filter, else doesn't matter
1338 * Returns ptr to the filter object or NULL when no memory available.
1340 * NOTE: This function is expected to be called with mac_filter_list_lock
1343 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1344 u8 *macaddr, s16 vlan,
1345 bool is_vf, bool is_netdev)
1347 struct i40e_mac_filter *f;
1349 if (!vsi || !macaddr)
1352 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1354 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1356 goto add_filter_out;
1358 ether_addr_copy(f->macaddr, macaddr);
1362 INIT_LIST_HEAD(&f->list);
1363 list_add(&f->list, &vsi->mac_filter_list);
1366 /* increment counter and add a new flag if needed */
1372 } else if (is_netdev) {
1373 if (!f->is_netdev) {
1374 f->is_netdev = true;
1381 /* changed tells sync_filters_subtask to
1382 * push the filter down to the firmware
1385 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1386 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1394 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1395 * @vsi: the VSI to be searched
1396 * @macaddr: the MAC address
1398 * @is_vf: make sure it's a VF filter, else doesn't matter
1399 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1401 * NOTE: This function is expected to be called with mac_filter_list_lock
1404 void i40e_del_filter(struct i40e_vsi *vsi,
1405 u8 *macaddr, s16 vlan,
1406 bool is_vf, bool is_netdev)
1408 struct i40e_mac_filter *f;
1410 if (!vsi || !macaddr)
1413 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1414 if (!f || f->counter == 0)
1422 } else if (is_netdev) {
1424 f->is_netdev = false;
1428 /* make sure we don't remove a filter in use by VF or netdev */
1431 min_f += (f->is_vf ? 1 : 0);
1432 min_f += (f->is_netdev ? 1 : 0);
1434 if (f->counter > min_f)
1438 /* counter == 0 tells sync_filters_subtask to
1439 * remove the filter from the firmware's list
1441 if (f->counter == 0) {
1443 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1444 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1449 * i40e_set_mac - NDO callback to set mac address
1450 * @netdev: network interface device structure
1451 * @p: pointer to an address structure
1453 * Returns 0 on success, negative on failure
1456 int i40e_set_mac(struct net_device *netdev, void *p)
1458 static int i40e_set_mac(struct net_device *netdev, void *p)
1461 struct i40e_netdev_priv *np = netdev_priv(netdev);
1462 struct i40e_vsi *vsi = np->vsi;
1463 struct i40e_pf *pf = vsi->back;
1464 struct i40e_hw *hw = &pf->hw;
1465 struct sockaddr *addr = p;
1466 struct i40e_mac_filter *f;
1468 if (!is_valid_ether_addr(addr->sa_data))
1469 return -EADDRNOTAVAIL;
1471 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1472 netdev_info(netdev, "already using mac address %pM\n",
1477 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1478 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1479 return -EADDRNOTAVAIL;
1481 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1482 netdev_info(netdev, "returning to hw mac address %pM\n",
1485 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1487 if (vsi->type == I40E_VSI_MAIN) {
1490 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1491 I40E_AQC_WRITE_TYPE_LAA_WOL,
1492 addr->sa_data, NULL);
1495 "Addr change for Main VSI failed: %d\n",
1497 return -EADDRNOTAVAIL;
1501 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1502 struct i40e_aqc_remove_macvlan_element_data element;
1504 memset(&element, 0, sizeof(element));
1505 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1506 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1507 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1509 spin_lock_bh(&vsi->mac_filter_list_lock);
1510 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1512 spin_unlock_bh(&vsi->mac_filter_list_lock);
1515 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1516 struct i40e_aqc_add_macvlan_element_data element;
1518 memset(&element, 0, sizeof(element));
1519 ether_addr_copy(element.mac_addr, hw->mac.addr);
1520 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1521 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1523 spin_lock_bh(&vsi->mac_filter_list_lock);
1524 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1528 spin_unlock_bh(&vsi->mac_filter_list_lock);
1531 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1533 return i40e_sync_vsi_filters(vsi);
1537 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1538 * @vsi: the VSI being setup
1539 * @ctxt: VSI context structure
1540 * @enabled_tc: Enabled TCs bitmap
1541 * @is_add: True if called before Add VSI
1543 * Setup VSI queue mapping for enabled traffic classes.
1546 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1547 struct i40e_vsi_context *ctxt,
1551 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1552 struct i40e_vsi_context *ctxt,
1557 struct i40e_pf *pf = vsi->back;
1567 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1570 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1571 /* Find numtc from enabled TC bitmap */
1572 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1573 if (enabled_tc & BIT(i)) /* TC is enabled */
1577 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1581 /* At least TC0 is enabled in case of non-DCB case */
1585 vsi->tc_config.numtc = numtc;
1586 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1587 /* Number of queues per enabled TC */
1588 /* In MFP case we can have a much lower count of MSIx
1589 * vectors available and so we need to lower the used
1592 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1593 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1595 qcount = vsi->alloc_queue_pairs;
1596 num_tc_qps = qcount / numtc;
1597 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1599 /* Setup queue offset/count for all TCs for given VSI */
1600 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1601 /* See if the given TC is enabled for the given VSI */
1602 if (vsi->tc_config.enabled_tc & BIT(i)) {
1606 switch (vsi->type) {
1608 qcount = min_t(int, pf->alloc_rss_size,
1613 qcount = num_tc_qps;
1617 case I40E_VSI_SRIOV:
1618 case I40E_VSI_VMDQ2:
1620 qcount = num_tc_qps;
1624 vsi->tc_config.tc_info[i].qoffset = offset;
1625 vsi->tc_config.tc_info[i].qcount = qcount;
1627 /* find the next higher power-of-2 of num queue pairs */
1630 while (num_qps && (BIT_ULL(pow) < qcount)) {
1635 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1637 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1638 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1642 /* TC is not enabled so set the offset to
1643 * default queue and allocate one queue
1646 vsi->tc_config.tc_info[i].qoffset = 0;
1647 vsi->tc_config.tc_info[i].qcount = 1;
1648 vsi->tc_config.tc_info[i].netdev_tc = 0;
1652 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1655 /* Set actual Tx/Rx queue pairs */
1656 vsi->num_queue_pairs = offset;
1657 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1658 if (vsi->req_queue_pairs > 0)
1659 vsi->num_queue_pairs = vsi->req_queue_pairs;
1660 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1661 vsi->num_queue_pairs = pf->num_lan_msix;
1664 /* Scheduler section valid can only be set for ADD VSI */
1666 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1668 ctxt->info.up_enable_bits = enabled_tc;
1670 if (vsi->type == I40E_VSI_SRIOV) {
1671 ctxt->info.mapping_flags |=
1672 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1673 for (i = 0; i < vsi->num_queue_pairs; i++)
1674 ctxt->info.queue_mapping[i] =
1675 cpu_to_le16(vsi->base_queue + i);
1677 ctxt->info.mapping_flags |=
1678 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1679 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1681 ctxt->info.valid_sections |= cpu_to_le16(sections);
1685 * i40e_set_rx_mode - NDO callback to set the netdev filters
1686 * @netdev: network interface device structure
1689 void i40e_set_rx_mode(struct net_device *netdev)
1691 static void i40e_set_rx_mode(struct net_device *netdev)
1694 struct i40e_netdev_priv *np = netdev_priv(netdev);
1695 struct i40e_mac_filter *f, *ftmp;
1696 struct i40e_vsi *vsi = np->vsi;
1697 struct netdev_hw_addr *uca;
1698 struct netdev_hw_addr *mca;
1699 struct netdev_hw_addr *ha;
1701 spin_lock_bh(&vsi->mac_filter_list_lock);
1703 /* add addr if not already in the filter list */
1704 netdev_for_each_uc_addr(uca, netdev) {
1705 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1706 if (i40e_is_vsi_in_vlan(vsi))
1707 i40e_put_mac_in_vlan(vsi, uca->addr,
1710 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1715 netdev_for_each_mc_addr(mca, netdev) {
1716 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1717 if (i40e_is_vsi_in_vlan(vsi))
1718 i40e_put_mac_in_vlan(vsi, mca->addr,
1721 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1726 /* remove filter if not in netdev list */
1727 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1732 netdev_for_each_mc_addr(mca, netdev)
1733 if (ether_addr_equal(mca->addr, f->macaddr))
1734 goto bottom_of_search_loop;
1736 netdev_for_each_uc_addr(uca, netdev)
1737 if (ether_addr_equal(uca->addr, f->macaddr))
1738 goto bottom_of_search_loop;
1740 for_each_dev_addr(netdev, ha)
1741 if (ether_addr_equal(ha->addr, f->macaddr))
1742 goto bottom_of_search_loop;
1744 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1745 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1747 bottom_of_search_loop:
1750 spin_unlock_bh(&vsi->mac_filter_list_lock);
1752 /* check for other flag changes */
1753 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1754 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1755 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1760 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1761 * @src: source MAC filter entry to be clones
1763 * Returns the pointer to newly cloned MAC filter entry or NULL
1766 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1767 struct i40e_mac_filter *src)
1769 struct i40e_mac_filter *f;
1771 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1776 INIT_LIST_HEAD(&f->list);
1782 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1783 * @vsi: pointer to vsi struct
1784 * @from: Pointer to list which contains MAC filter entries - changes to
1785 * those entries needs to be undone.
1787 * MAC filter entries from list were slated to be removed from device.
1789 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1790 struct list_head *from)
1792 struct i40e_mac_filter *f, *ftmp;
1794 list_for_each_entry_safe(f, ftmp, from, list) {
1796 /* Move the element back into MAC filter list*/
1797 list_move_tail(&f->list, &vsi->mac_filter_list);
1802 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1803 * @vsi: pointer to vsi struct
1805 * MAC filter entries from list were slated to be added from device.
1807 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1809 struct i40e_mac_filter *f, *ftmp;
1811 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1812 if (!f->changed && f->counter)
1818 * i40e_cleanup_add_list - Deletes the element from add list and release
1820 * @add_list: Pointer to list which contains MAC filter entries
1822 static void i40e_cleanup_add_list(struct list_head *add_list)
1824 struct i40e_mac_filter *f, *ftmp;
1826 list_for_each_entry_safe(f, ftmp, add_list, list) {
1833 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1834 * @vsi: ptr to the VSI
1836 * Push any outstanding VSI filter changes through the AdminQ.
1838 * Returns 0 or error value
1840 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1842 struct list_head tmp_del_list, tmp_add_list;
1843 struct i40e_mac_filter *f, *ftmp, *fclone;
1844 bool promisc_forced_on = false;
1845 bool add_happened = false;
1846 int filter_list_len = 0;
1847 u32 changed_flags = 0;
1848 i40e_status aq_ret = 0;
1849 bool err_cond = false;
1857 /* empty array typed pointers, kcalloc later */
1858 struct i40e_aqc_add_macvlan_element_data *add_list;
1859 struct i40e_aqc_remove_macvlan_element_data *del_list;
1861 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1862 usleep_range(1000, 2000);
1866 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1867 vsi->current_netdev_flags = vsi->netdev->flags;
1870 INIT_LIST_HEAD(&tmp_del_list);
1871 INIT_LIST_HEAD(&tmp_add_list);
1873 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1874 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1876 spin_lock_bh(&vsi->mac_filter_list_lock);
1877 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1881 if (f->counter != 0)
1885 /* Move the element into temporary del_list */
1886 list_move_tail(&f->list, &tmp_del_list);
1889 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1893 if (f->counter == 0)
1897 /* Clone MAC filter entry and add into temporary list */
1898 fclone = i40e_mac_filter_entry_clone(f);
1903 list_add_tail(&fclone->list, &tmp_add_list);
1906 /* if failed to clone MAC filter entry - undo */
1908 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1909 i40e_undo_add_filter_entries(vsi);
1911 spin_unlock_bh(&vsi->mac_filter_list_lock);
1914 i40e_cleanup_add_list(&tmp_add_list);
1920 /* Now process 'del_list' outside the lock */
1921 if (!list_empty(&tmp_del_list)) {
1924 filter_list_len = pf->hw.aq.asq_buf_size /
1925 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1926 del_list_size = filter_list_len *
1927 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1928 del_list = kzalloc(del_list_size, GFP_KERNEL);
1930 i40e_cleanup_add_list(&tmp_add_list);
1932 /* Undo VSI's MAC filter entry element updates */
1933 spin_lock_bh(&vsi->mac_filter_list_lock);
1934 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1935 i40e_undo_add_filter_entries(vsi);
1936 spin_unlock_bh(&vsi->mac_filter_list_lock);
1941 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1944 /* add to delete list */
1945 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1946 del_list[num_del].vlan_tag =
1947 cpu_to_le16((u16)(f->vlan ==
1948 I40E_VLAN_ANY ? 0 : f->vlan));
1950 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1951 del_list[num_del].flags = cmd_flags;
1954 /* flush a full buffer */
1955 if (num_del == filter_list_len) {
1956 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1961 aq_err = pf->hw.aq.asq_last_status;
1963 memset(del_list, 0, del_list_size);
1965 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1967 dev_err(&pf->pdev->dev,
1968 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1969 i40e_stat_str(&pf->hw, aq_ret),
1970 i40e_aq_str(&pf->hw, aq_err));
1973 /* Release memory for MAC filter entries which were
1974 * synced up with HW.
1981 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1984 aq_err = pf->hw.aq.asq_last_status;
1987 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1988 dev_info(&pf->pdev->dev,
1989 "ignoring delete macvlan error, err %s aq_err %s\n",
1990 i40e_stat_str(&pf->hw, aq_ret),
1991 i40e_aq_str(&pf->hw, aq_err));
1998 if (!list_empty(&tmp_add_list)) {
2001 /* do all the adds now */
2002 filter_list_len = pf->hw.aq.asq_buf_size /
2003 sizeof(struct i40e_aqc_add_macvlan_element_data),
2004 add_list_size = filter_list_len *
2005 sizeof(struct i40e_aqc_add_macvlan_element_data);
2006 add_list = kzalloc(add_list_size, GFP_KERNEL);
2008 /* Purge element from temporary lists */
2009 i40e_cleanup_add_list(&tmp_add_list);
2011 /* Undo add filter entries from VSI MAC filter list */
2012 spin_lock_bh(&vsi->mac_filter_list_lock);
2013 i40e_undo_add_filter_entries(vsi);
2014 spin_unlock_bh(&vsi->mac_filter_list_lock);
2019 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2021 add_happened = true;
2024 /* add to add array */
2025 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2026 add_list[num_add].vlan_tag =
2028 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2029 add_list[num_add].queue_number = 0;
2031 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2032 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2035 /* flush a full buffer */
2036 if (num_add == filter_list_len) {
2037 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2040 aq_err = pf->hw.aq.asq_last_status;
2045 memset(add_list, 0, add_list_size);
2047 /* Entries from tmp_add_list were cloned from MAC
2048 * filter list, hence clean those cloned entries
2055 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2056 add_list, num_add, NULL);
2057 aq_err = pf->hw.aq.asq_last_status;
2063 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2064 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2065 dev_info(&pf->pdev->dev,
2066 "add filter failed, err %s aq_err %s\n",
2067 i40e_stat_str(&pf->hw, aq_ret),
2068 i40e_aq_str(&pf->hw, aq_err));
2069 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2070 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2072 promisc_forced_on = true;
2073 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2075 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2080 /* check for changes in promiscuous modes */
2081 if (changed_flags & IFF_ALLMULTI) {
2082 bool cur_multipromisc;
2084 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2085 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2090 retval = i40e_aq_rc_to_posix(aq_ret,
2091 pf->hw.aq.asq_last_status);
2092 dev_info(&pf->pdev->dev,
2093 "set multi promisc failed, err %s aq_err %s\n",
2094 i40e_stat_str(&pf->hw, aq_ret),
2095 i40e_aq_str(&pf->hw,
2096 pf->hw.aq.asq_last_status));
2099 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2102 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2103 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2105 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2106 /* set defport ON for Main VSI instead of true promisc
2107 * this way we will get all unicast/multicast and VLAN
2108 * promisc behavior but will not get VF or VMDq traffic
2109 * replicated on the Main VSI.
2111 if (pf->cur_promisc != cur_promisc) {
2112 pf->cur_promisc = cur_promisc;
2113 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2116 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2122 i40e_aq_rc_to_posix(aq_ret,
2123 pf->hw.aq.asq_last_status);
2124 dev_info(&pf->pdev->dev,
2125 "set unicast promisc failed, err %d, aq_err %d\n",
2126 aq_ret, pf->hw.aq.asq_last_status);
2128 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2134 i40e_aq_rc_to_posix(aq_ret,
2135 pf->hw.aq.asq_last_status);
2136 dev_info(&pf->pdev->dev,
2137 "set multicast promisc failed, err %d, aq_err %d\n",
2138 aq_ret, pf->hw.aq.asq_last_status);
2141 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2145 retval = i40e_aq_rc_to_posix(aq_ret,
2146 pf->hw.aq.asq_last_status);
2147 dev_info(&pf->pdev->dev,
2148 "set brdcast promisc failed, err %s, aq_err %s\n",
2149 i40e_stat_str(&pf->hw, aq_ret),
2150 i40e_aq_str(&pf->hw,
2151 pf->hw.aq.asq_last_status));
2155 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2160 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2161 * @pf: board private structure
2163 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2167 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2169 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2171 for (v = 0; v < pf->num_alloc_vsi; v++) {
2173 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2174 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2177 /* come back and try again later */
2178 pf->flags |= I40E_FLAG_FILTER_SYNC;
2186 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2187 * @netdev: network interface device structure
2188 * @new_mtu: new value for maximum frame size
2190 * Returns 0 on success, negative on failure
2192 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2194 struct i40e_netdev_priv *np = netdev_priv(netdev);
2195 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2196 struct i40e_vsi *vsi = np->vsi;
2198 /* MTU < 68 is an error and causes problems on some kernels */
2199 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2202 netdev_info(netdev, "changing MTU from %d to %d\n",
2203 netdev->mtu, new_mtu);
2204 netdev->mtu = new_mtu;
2205 if (netif_running(netdev))
2206 i40e_vsi_reinit_locked(vsi);
2212 * i40e_ioctl - Access the hwtstamp interface
2213 * @netdev: network interface device structure
2214 * @ifr: interface request data
2215 * @cmd: ioctl command
2217 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2219 struct i40e_netdev_priv *np = netdev_priv(netdev);
2220 struct i40e_pf *pf = np->vsi->back;
2224 return i40e_ptp_get_ts_config(pf, ifr);
2226 return i40e_ptp_set_ts_config(pf, ifr);
2233 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2234 * @vsi: the vsi being adjusted
2236 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2238 struct i40e_vsi_context ctxt;
2241 if ((vsi->info.valid_sections &
2242 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2243 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2244 return; /* already enabled */
2246 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2247 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2248 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2250 ctxt.seid = vsi->seid;
2251 ctxt.info = vsi->info;
2252 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2254 dev_info(&vsi->back->pdev->dev,
2255 "update vlan stripping failed, err %s aq_err %s\n",
2256 i40e_stat_str(&vsi->back->hw, ret),
2257 i40e_aq_str(&vsi->back->hw,
2258 vsi->back->hw.aq.asq_last_status));
2263 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2264 * @vsi: the vsi being adjusted
2266 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2268 struct i40e_vsi_context ctxt;
2271 if ((vsi->info.valid_sections &
2272 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2273 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2274 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2275 return; /* already disabled */
2277 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2278 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2279 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2281 ctxt.seid = vsi->seid;
2282 ctxt.info = vsi->info;
2283 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2285 dev_info(&vsi->back->pdev->dev,
2286 "update vlan stripping failed, err %s aq_err %s\n",
2287 i40e_stat_str(&vsi->back->hw, ret),
2288 i40e_aq_str(&vsi->back->hw,
2289 vsi->back->hw.aq.asq_last_status));
2294 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2295 * @netdev: network interface to be adjusted
2296 * @features: netdev features to test if VLAN offload is enabled or not
2298 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2300 struct i40e_netdev_priv *np = netdev_priv(netdev);
2301 struct i40e_vsi *vsi = np->vsi;
2303 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2304 i40e_vlan_stripping_enable(vsi);
2306 i40e_vlan_stripping_disable(vsi);
2310 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2311 * @vsi: the vsi being configured
2312 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2314 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2316 struct i40e_mac_filter *f, *add_f;
2317 bool is_netdev, is_vf;
2319 is_vf = (vsi->type == I40E_VSI_SRIOV);
2320 is_netdev = !!(vsi->netdev);
2322 /* Locked once because all functions invoked below iterates list*/
2323 spin_lock_bh(&vsi->mac_filter_list_lock);
2326 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2329 dev_info(&vsi->back->pdev->dev,
2330 "Could not add vlan filter %d for %pM\n",
2331 vid, vsi->netdev->dev_addr);
2332 spin_unlock_bh(&vsi->mac_filter_list_lock);
2337 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2338 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2340 dev_info(&vsi->back->pdev->dev,
2341 "Could not add vlan filter %d for %pM\n",
2343 spin_unlock_bh(&vsi->mac_filter_list_lock);
2348 /* Now if we add a vlan tag, make sure to check if it is the first
2349 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2350 * with 0, so we now accept untagged and specified tagged traffic
2351 * (and not any taged and untagged)
2354 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2356 is_vf, is_netdev)) {
2357 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2358 I40E_VLAN_ANY, is_vf, is_netdev);
2359 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2362 dev_info(&vsi->back->pdev->dev,
2363 "Could not add filter 0 for %pM\n",
2364 vsi->netdev->dev_addr);
2365 spin_unlock_bh(&vsi->mac_filter_list_lock);
2371 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2372 if (vid > 0 && !vsi->info.pvid) {
2373 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2374 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2377 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2379 add_f = i40e_add_filter(vsi, f->macaddr,
2380 0, is_vf, is_netdev);
2382 dev_info(&vsi->back->pdev->dev,
2383 "Could not add filter 0 for %pM\n",
2385 spin_unlock_bh(&vsi->mac_filter_list_lock);
2391 spin_unlock_bh(&vsi->mac_filter_list_lock);
2393 /* schedule our worker thread which will take care of
2394 * applying the new filter changes
2396 i40e_service_event_schedule(vsi->back);
2401 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2402 * @vsi: the vsi being configured
2403 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2405 * Return: 0 on success or negative otherwise
2407 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2409 struct net_device *netdev = vsi->netdev;
2410 struct i40e_mac_filter *f, *add_f;
2411 bool is_vf, is_netdev;
2412 int filter_count = 0;
2414 is_vf = (vsi->type == I40E_VSI_SRIOV);
2415 is_netdev = !!(netdev);
2417 /* Locked once because all functions invoked below iterates list */
2418 spin_lock_bh(&vsi->mac_filter_list_lock);
2421 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2423 list_for_each_entry(f, &vsi->mac_filter_list, list)
2424 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2426 /* go through all the filters for this VSI and if there is only
2427 * vid == 0 it means there are no other filters, so vid 0 must
2428 * be replaced with -1. This signifies that we should from now
2429 * on accept any traffic (with any tag present, or untagged)
2431 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2434 ether_addr_equal(netdev->dev_addr, f->macaddr))
2442 if (!filter_count && is_netdev) {
2443 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2444 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2447 dev_info(&vsi->back->pdev->dev,
2448 "Could not add filter %d for %pM\n",
2449 I40E_VLAN_ANY, netdev->dev_addr);
2450 spin_unlock_bh(&vsi->mac_filter_list_lock);
2455 if (!filter_count) {
2456 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2457 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2458 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2461 dev_info(&vsi->back->pdev->dev,
2462 "Could not add filter %d for %pM\n",
2463 I40E_VLAN_ANY, f->macaddr);
2464 spin_unlock_bh(&vsi->mac_filter_list_lock);
2470 spin_unlock_bh(&vsi->mac_filter_list_lock);
2472 /* schedule our worker thread which will take care of
2473 * applying the new filter changes
2475 i40e_service_event_schedule(vsi->back);
2480 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2481 * @netdev: network interface to be adjusted
2482 * @vid: vlan id to be added
2484 * net_device_ops implementation for adding vlan ids
2487 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2488 __always_unused __be16 proto, u16 vid)
2490 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2491 __always_unused __be16 proto, u16 vid)
2494 struct i40e_netdev_priv *np = netdev_priv(netdev);
2495 struct i40e_vsi *vsi = np->vsi;
2501 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2503 /* If the network stack called us with vid = 0 then
2504 * it is asking to receive priority tagged packets with
2505 * vlan id 0. Our HW receives them by default when configured
2506 * to receive untagged packets so there is no need to add an
2507 * extra filter for vlan 0 tagged packets.
2510 ret = i40e_vsi_add_vlan(vsi, vid);
2512 if (!ret && (vid < VLAN_N_VID))
2513 set_bit(vid, vsi->active_vlans);
2519 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2520 * @netdev: network interface to be adjusted
2521 * @vid: vlan id to be removed
2523 * net_device_ops implementation for removing vlan ids
2526 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2527 __always_unused __be16 proto, u16 vid)
2529 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2530 __always_unused __be16 proto, u16 vid)
2533 struct i40e_netdev_priv *np = netdev_priv(netdev);
2534 struct i40e_vsi *vsi = np->vsi;
2536 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2538 /* return code is ignored as there is nothing a user
2539 * can do about failure to remove and a log message was
2540 * already printed from the other function
2542 i40e_vsi_kill_vlan(vsi, vid);
2544 clear_bit(vid, vsi->active_vlans);
2550 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2551 * @vsi: the vsi being brought back up
2553 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2560 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2562 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2563 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2568 * i40e_vsi_add_pvid - Add pvid for the VSI
2569 * @vsi: the vsi being adjusted
2570 * @vid: the vlan id to set as a PVID
2572 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2574 struct i40e_vsi_context ctxt;
2577 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2578 vsi->info.pvid = cpu_to_le16(vid);
2579 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2580 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2581 I40E_AQ_VSI_PVLAN_EMOD_STR;
2583 ctxt.seid = vsi->seid;
2584 ctxt.info = vsi->info;
2585 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2587 dev_info(&vsi->back->pdev->dev,
2588 "add pvid failed, err %s aq_err %s\n",
2589 i40e_stat_str(&vsi->back->hw, ret),
2590 i40e_aq_str(&vsi->back->hw,
2591 vsi->back->hw.aq.asq_last_status));
2599 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2600 * @vsi: the vsi being adjusted
2602 * Just use the vlan_rx_register() service to put it back to normal
2604 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2606 i40e_vlan_stripping_disable(vsi);
2612 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2613 * @vsi: ptr to the VSI
2615 * If this function returns with an error, then it's possible one or
2616 * more of the rings is populated (while the rest are not). It is the
2617 * callers duty to clean those orphaned rings.
2619 * Return 0 on success, negative on failure
2621 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2625 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2626 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2632 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2633 * @vsi: ptr to the VSI
2635 * Free VSI's transmit software resources
2637 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2644 for (i = 0; i < vsi->num_queue_pairs; i++)
2645 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2646 i40e_free_tx_resources(vsi->tx_rings[i]);
2650 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2651 * @vsi: ptr to the VSI
2653 * If this function returns with an error, then it's possible one or
2654 * more of the rings is populated (while the rest are not). It is the
2655 * callers duty to clean those orphaned rings.
2657 * Return 0 on success, negative on failure
2659 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2663 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2664 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2666 i40e_fcoe_setup_ddp_resources(vsi);
2672 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2673 * @vsi: ptr to the VSI
2675 * Free all receive software resources
2677 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2684 for (i = 0; i < vsi->num_queue_pairs; i++)
2685 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2686 i40e_free_rx_resources(vsi->rx_rings[i]);
2688 i40e_fcoe_free_ddp_resources(vsi);
2693 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2694 * @ring: The Tx ring to configure
2696 * This enables/disables XPS for a given Tx descriptor ring
2697 * based on the TCs enabled for the VSI that ring belongs to.
2699 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2701 struct i40e_vsi *vsi = ring->vsi;
2704 if (!ring->q_vector || !ring->netdev)
2707 /* Single TC mode enable XPS */
2708 if (vsi->tc_config.numtc <= 1) {
2709 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2710 netif_set_xps_queue(ring->netdev,
2711 &ring->q_vector->affinity_mask,
2713 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2714 /* Disable XPS to allow selection based on TC */
2715 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2716 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2717 free_cpumask_var(mask);
2720 /* schedule our worker thread which will take care of
2721 * applying the new filter changes
2723 i40e_service_event_schedule(vsi->back);
2727 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2728 * @ring: The Tx ring to configure
2730 * Configure the Tx descriptor ring in the HMC context.
2732 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2734 struct i40e_vsi *vsi = ring->vsi;
2735 u16 pf_q = vsi->base_queue + ring->queue_index;
2736 struct i40e_hw *hw = &vsi->back->hw;
2737 struct i40e_hmc_obj_txq tx_ctx;
2738 i40e_status err = 0;
2741 /* some ATR related tx ring init */
2742 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2743 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2744 ring->atr_count = 0;
2746 ring->atr_sample_rate = 0;
2750 i40e_config_xps_tx_ring(ring);
2752 /* clear the context structure first */
2753 memset(&tx_ctx, 0, sizeof(tx_ctx));
2755 tx_ctx.new_context = 1;
2756 tx_ctx.base = (ring->dma / 128);
2757 tx_ctx.qlen = ring->count;
2758 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2759 I40E_FLAG_FD_ATR_ENABLED));
2761 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2763 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2764 /* FDIR VSI tx ring can still use RS bit and writebacks */
2765 if (vsi->type != I40E_VSI_FDIR)
2766 tx_ctx.head_wb_ena = 1;
2767 tx_ctx.head_wb_addr = ring->dma +
2768 (ring->count * sizeof(struct i40e_tx_desc));
2770 /* As part of VSI creation/update, FW allocates certain
2771 * Tx arbitration queue sets for each TC enabled for
2772 * the VSI. The FW returns the handles to these queue
2773 * sets as part of the response buffer to Add VSI,
2774 * Update VSI, etc. AQ commands. It is expected that
2775 * these queue set handles be associated with the Tx
2776 * queues by the driver as part of the TX queue context
2777 * initialization. This has to be done regardless of
2778 * DCB as by default everything is mapped to TC0.
2780 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2781 tx_ctx.rdylist_act = 0;
2783 /* clear the context in the HMC */
2784 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2786 dev_info(&vsi->back->pdev->dev,
2787 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2788 ring->queue_index, pf_q, err);
2792 /* set the context in the HMC */
2793 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2795 dev_info(&vsi->back->pdev->dev,
2796 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2797 ring->queue_index, pf_q, err);
2801 /* Now associate this queue with this PCI function */
2802 if (vsi->type == I40E_VSI_VMDQ2) {
2803 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2804 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2805 I40E_QTX_CTL_VFVM_INDX_MASK;
2807 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2810 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2811 I40E_QTX_CTL_PF_INDX_MASK);
2812 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2815 /* cache tail off for easier writes later */
2816 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2822 * i40e_configure_rx_ring - Configure a receive ring context
2823 * @ring: The Rx ring to configure
2825 * Configure the Rx descriptor ring in the HMC context.
2827 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2829 struct i40e_vsi *vsi = ring->vsi;
2830 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2831 u16 pf_q = vsi->base_queue + ring->queue_index;
2832 struct i40e_hw *hw = &vsi->back->hw;
2833 struct i40e_hmc_obj_rxq rx_ctx;
2834 i40e_status err = 0;
2838 /* clear the context structure first */
2839 memset(&rx_ctx, 0, sizeof(rx_ctx));
2841 ring->rx_buf_len = vsi->rx_buf_len;
2842 ring->rx_hdr_len = vsi->rx_hdr_len;
2844 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2845 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2847 rx_ctx.base = (ring->dma / 128);
2848 rx_ctx.qlen = ring->count;
2850 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2851 set_ring_16byte_desc_enabled(ring);
2857 rx_ctx.dtype = vsi->dtype;
2859 set_ring_ps_enabled(ring);
2860 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2862 I40E_RX_SPLIT_TCP_UDP |
2865 rx_ctx.hsplit_0 = 0;
2868 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2869 (chain_len * ring->rx_buf_len));
2870 if (hw->revision_id == 0)
2871 rx_ctx.lrxqthresh = 0;
2873 rx_ctx.lrxqthresh = 2;
2874 rx_ctx.crcstrip = 1;
2876 /* this controls whether VLAN is stripped from inner headers */
2879 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2881 /* set the prefena field to 1 because the manual says to */
2884 /* clear the context in the HMC */
2885 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2887 dev_info(&vsi->back->pdev->dev,
2888 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2889 ring->queue_index, pf_q, err);
2893 /* set the context in the HMC */
2894 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2896 dev_info(&vsi->back->pdev->dev,
2897 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2898 ring->queue_index, pf_q, err);
2902 /* cache tail for quicker writes, and clear the reg before use */
2903 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2904 writel(0, ring->tail);
2906 if (ring_is_ps_enabled(ring)) {
2907 i40e_alloc_rx_headers(ring);
2908 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2910 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2917 * i40e_vsi_configure_tx - Configure the VSI for Tx
2918 * @vsi: VSI structure describing this set of rings and resources
2920 * Configure the Tx VSI for operation.
2922 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2927 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2928 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2934 * i40e_vsi_configure_rx - Configure the VSI for Rx
2935 * @vsi: the VSI being configured
2937 * Configure the Rx VSI for operation.
2939 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2944 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2945 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2946 + ETH_FCS_LEN + VLAN_HLEN;
2948 vsi->max_frame = I40E_RXBUFFER_2048;
2950 /* figure out correct receive buffer length */
2951 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2952 I40E_FLAG_RX_PS_ENABLED)) {
2953 case I40E_FLAG_RX_1BUF_ENABLED:
2954 vsi->rx_hdr_len = 0;
2955 vsi->rx_buf_len = vsi->max_frame;
2956 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2958 case I40E_FLAG_RX_PS_ENABLED:
2959 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2960 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2961 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2964 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2965 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2966 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2971 /* setup rx buffer for FCoE */
2972 if ((vsi->type == I40E_VSI_FCOE) &&
2973 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2974 vsi->rx_hdr_len = 0;
2975 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2976 vsi->max_frame = I40E_RXBUFFER_3072;
2977 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2980 #endif /* I40E_FCOE */
2981 /* round up for the chip's needs */
2982 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2983 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2984 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2985 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2987 /* set up individual rings */
2988 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2989 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2995 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2996 * @vsi: ptr to the VSI
2998 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3000 struct i40e_ring *tx_ring, *rx_ring;
3001 u16 qoffset, qcount;
3004 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3005 /* Reset the TC information */
3006 for (i = 0; i < vsi->num_queue_pairs; i++) {
3007 rx_ring = vsi->rx_rings[i];
3008 tx_ring = vsi->tx_rings[i];
3009 rx_ring->dcb_tc = 0;
3010 tx_ring->dcb_tc = 0;
3014 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3015 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3018 qoffset = vsi->tc_config.tc_info[n].qoffset;
3019 qcount = vsi->tc_config.tc_info[n].qcount;
3020 for (i = qoffset; i < (qoffset + qcount); i++) {
3021 rx_ring = vsi->rx_rings[i];
3022 tx_ring = vsi->tx_rings[i];
3023 rx_ring->dcb_tc = n;
3024 tx_ring->dcb_tc = n;
3030 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3031 * @vsi: ptr to the VSI
3033 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3036 i40e_set_rx_mode(vsi->netdev);
3040 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3041 * @vsi: Pointer to the targeted VSI
3043 * This function replays the hlist on the hw where all the SB Flow Director
3044 * filters were saved.
3046 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3048 struct i40e_fdir_filter *filter;
3049 struct i40e_pf *pf = vsi->back;
3050 struct hlist_node *node;
3052 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3055 hlist_for_each_entry_safe(filter, node,
3056 &pf->fdir_filter_list, fdir_node) {
3057 i40e_add_del_fdir(vsi, filter, true);
3062 * i40e_vsi_configure - Set up the VSI for action
3063 * @vsi: the VSI being configured
3065 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3069 i40e_set_vsi_rx_mode(vsi);
3070 i40e_restore_vlan(vsi);
3071 i40e_vsi_config_dcb_rings(vsi);
3072 err = i40e_vsi_configure_tx(vsi);
3074 err = i40e_vsi_configure_rx(vsi);
3080 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3081 * @vsi: the VSI being configured
3083 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3085 struct i40e_pf *pf = vsi->back;
3086 struct i40e_hw *hw = &pf->hw;
3091 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3092 * and PFINT_LNKLSTn registers, e.g.:
3093 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3095 qp = vsi->base_queue;
3096 vector = vsi->base_vector;
3097 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3098 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3100 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3101 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3102 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3103 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3105 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3106 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3107 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3109 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3110 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3112 /* Linked list for the queuepairs assigned to this vector */
3113 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3114 for (q = 0; q < q_vector->num_ringpairs; q++) {
3117 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3118 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3119 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3120 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3122 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3124 wr32(hw, I40E_QINT_RQCTL(qp), val);
3126 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3127 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3128 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3129 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3131 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3133 /* Terminate the linked list */
3134 if (q == (q_vector->num_ringpairs - 1))
3135 val |= (I40E_QUEUE_END_OF_LIST
3136 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3138 wr32(hw, I40E_QINT_TQCTL(qp), val);
3147 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3148 * @hw: ptr to the hardware info
3150 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3152 struct i40e_hw *hw = &pf->hw;
3155 /* clear things first */
3156 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3157 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3159 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3160 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3161 I40E_PFINT_ICR0_ENA_GRST_MASK |
3162 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3163 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3164 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3165 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3166 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3168 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3169 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3171 if (pf->flags & I40E_FLAG_PTP)
3172 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3174 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3176 /* SW_ITR_IDX = 0, but don't change INTENA */
3177 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3178 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3180 /* OTHER_ITR_IDX = 0 */
3181 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3185 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3186 * @vsi: the VSI being configured
3188 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3190 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3191 struct i40e_pf *pf = vsi->back;
3192 struct i40e_hw *hw = &pf->hw;
3195 /* set the ITR configuration */
3196 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3197 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3198 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3199 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3200 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3201 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3202 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3204 i40e_enable_misc_int_causes(pf);
3206 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3207 wr32(hw, I40E_PFINT_LNKLST0, 0);
3209 /* Associate the queue pair to the vector and enable the queue int */
3210 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3211 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3212 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3214 wr32(hw, I40E_QINT_RQCTL(0), val);
3216 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3217 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3218 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3220 wr32(hw, I40E_QINT_TQCTL(0), val);
3225 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3226 * @pf: board private structure
3228 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3230 struct i40e_hw *hw = &pf->hw;
3232 wr32(hw, I40E_PFINT_DYN_CTL0,
3233 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3238 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3239 * @pf: board private structure
3241 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3243 struct i40e_hw *hw = &pf->hw;
3246 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3247 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3248 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3250 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3255 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3256 * @vsi: pointer to a vsi
3257 * @vector: disable a particular Hw Interrupt vector
3259 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3261 struct i40e_pf *pf = vsi->back;
3262 struct i40e_hw *hw = &pf->hw;
3265 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3266 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3271 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3272 * @irq: interrupt number
3273 * @data: pointer to a q_vector
3275 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3277 struct i40e_q_vector *q_vector = data;
3279 if (!q_vector->tx.ring && !q_vector->rx.ring)
3282 napi_schedule_irqoff(&q_vector->napi);
3288 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3289 * @vsi: the VSI being configured
3290 * @basename: name for the vector
3292 * Allocates MSI-X vectors and requests interrupts from the kernel.
3294 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3296 int q_vectors = vsi->num_q_vectors;
3297 struct i40e_pf *pf = vsi->back;
3298 int base = vsi->base_vector;
3303 for (vector = 0; vector < q_vectors; vector++) {
3304 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3306 if (q_vector->tx.ring && q_vector->rx.ring) {
3307 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3308 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3310 } else if (q_vector->rx.ring) {
3311 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3312 "%s-%s-%d", basename, "rx", rx_int_idx++);
3313 } else if (q_vector->tx.ring) {
3314 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3315 "%s-%s-%d", basename, "tx", tx_int_idx++);
3317 /* skip this unused q_vector */
3320 err = request_irq(pf->msix_entries[base + vector].vector,
3326 dev_info(&pf->pdev->dev,
3327 "MSIX request_irq failed, error: %d\n", err);
3328 goto free_queue_irqs;
3330 /* assign the mask for this irq */
3331 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3332 &q_vector->affinity_mask);
3335 vsi->irqs_ready = true;
3341 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3343 free_irq(pf->msix_entries[base + vector].vector,
3344 &(vsi->q_vectors[vector]));
3350 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3351 * @vsi: the VSI being un-configured
3353 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3355 struct i40e_pf *pf = vsi->back;
3356 struct i40e_hw *hw = &pf->hw;
3357 int base = vsi->base_vector;
3360 for (i = 0; i < vsi->num_queue_pairs; i++) {
3361 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3362 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3365 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3366 for (i = vsi->base_vector;
3367 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3368 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3371 for (i = 0; i < vsi->num_q_vectors; i++)
3372 synchronize_irq(pf->msix_entries[i + base].vector);
3374 /* Legacy and MSI mode - this stops all interrupt handling */
3375 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3376 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3378 synchronize_irq(pf->pdev->irq);
3383 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3384 * @vsi: the VSI being configured
3386 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3388 struct i40e_pf *pf = vsi->back;
3391 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3392 for (i = 0; i < vsi->num_q_vectors; i++)
3393 i40e_irq_dynamic_enable(vsi, i);
3395 i40e_irq_dynamic_enable_icr0(pf);
3398 i40e_flush(&pf->hw);
3403 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3404 * @pf: board private structure
3406 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3409 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3410 i40e_flush(&pf->hw);
3414 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3415 * @irq: interrupt number
3416 * @data: pointer to a q_vector
3418 * This is the handler used for all MSI/Legacy interrupts, and deals
3419 * with both queue and non-queue interrupts. This is also used in
3420 * MSIX mode to handle the non-queue interrupts.
3422 static irqreturn_t i40e_intr(int irq, void *data)
3424 struct i40e_pf *pf = (struct i40e_pf *)data;
3425 struct i40e_hw *hw = &pf->hw;
3426 irqreturn_t ret = IRQ_NONE;
3427 u32 icr0, icr0_remaining;
3430 icr0 = rd32(hw, I40E_PFINT_ICR0);
3431 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3433 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3434 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3437 /* if interrupt but no bits showing, must be SWINT */
3438 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3439 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3442 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3443 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3444 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3445 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3446 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3449 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3450 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3451 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3452 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3454 /* temporarily disable queue cause for NAPI processing */
3455 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3457 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3458 wr32(hw, I40E_QINT_RQCTL(0), qval);
3460 qval = rd32(hw, I40E_QINT_TQCTL(0));
3461 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3462 wr32(hw, I40E_QINT_TQCTL(0), qval);
3464 if (!test_bit(__I40E_DOWN, &pf->state))
3465 napi_schedule_irqoff(&q_vector->napi);
3468 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3469 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3470 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3473 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3474 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3475 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3478 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3479 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3480 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3483 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3484 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3485 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3486 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3487 val = rd32(hw, I40E_GLGEN_RSTAT);
3488 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3489 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3490 if (val == I40E_RESET_CORER) {
3492 } else if (val == I40E_RESET_GLOBR) {
3494 } else if (val == I40E_RESET_EMPR) {
3496 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3500 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3501 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3502 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3503 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3504 rd32(hw, I40E_PFHMC_ERRORINFO),
3505 rd32(hw, I40E_PFHMC_ERRORDATA));
3508 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3509 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3511 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3512 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3513 i40e_ptp_tx_hwtstamp(pf);
3517 /* If a critical error is pending we have no choice but to reset the
3519 * Report and mask out any remaining unexpected interrupts.
3521 icr0_remaining = icr0 & ena_mask;
3522 if (icr0_remaining) {
3523 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3525 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3526 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3527 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3528 dev_info(&pf->pdev->dev, "device will be reset\n");
3529 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3530 i40e_service_event_schedule(pf);
3532 ena_mask &= ~icr0_remaining;
3537 /* re-enable interrupt causes */
3538 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3539 if (!test_bit(__I40E_DOWN, &pf->state)) {
3540 i40e_service_event_schedule(pf);
3541 i40e_irq_dynamic_enable_icr0(pf);
3548 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3549 * @tx_ring: tx ring to clean
3550 * @budget: how many cleans we're allowed
3552 * Returns true if there's any budget left (e.g. the clean is finished)
3554 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3556 struct i40e_vsi *vsi = tx_ring->vsi;
3557 u16 i = tx_ring->next_to_clean;
3558 struct i40e_tx_buffer *tx_buf;
3559 struct i40e_tx_desc *tx_desc;
3561 tx_buf = &tx_ring->tx_bi[i];
3562 tx_desc = I40E_TX_DESC(tx_ring, i);
3563 i -= tx_ring->count;
3566 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3568 /* if next_to_watch is not set then there is no work pending */
3572 /* prevent any other reads prior to eop_desc */
3573 read_barrier_depends();
3575 /* if the descriptor isn't done, no work yet to do */
3576 if (!(eop_desc->cmd_type_offset_bsz &
3577 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3580 /* clear next_to_watch to prevent false hangs */
3581 tx_buf->next_to_watch = NULL;
3583 tx_desc->buffer_addr = 0;
3584 tx_desc->cmd_type_offset_bsz = 0;
3585 /* move past filter desc */
3590 i -= tx_ring->count;
3591 tx_buf = tx_ring->tx_bi;
3592 tx_desc = I40E_TX_DESC(tx_ring, 0);
3594 /* unmap skb header data */
3595 dma_unmap_single(tx_ring->dev,
3596 dma_unmap_addr(tx_buf, dma),
3597 dma_unmap_len(tx_buf, len),
3599 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3600 kfree(tx_buf->raw_buf);
3602 tx_buf->raw_buf = NULL;
3603 tx_buf->tx_flags = 0;
3604 tx_buf->next_to_watch = NULL;
3605 dma_unmap_len_set(tx_buf, len, 0);
3606 tx_desc->buffer_addr = 0;
3607 tx_desc->cmd_type_offset_bsz = 0;
3609 /* move us past the eop_desc for start of next FD desc */
3614 i -= tx_ring->count;
3615 tx_buf = tx_ring->tx_bi;
3616 tx_desc = I40E_TX_DESC(tx_ring, 0);
3619 /* update budget accounting */
3621 } while (likely(budget));
3623 i += tx_ring->count;
3624 tx_ring->next_to_clean = i;
3626 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3627 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3633 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3634 * @irq: interrupt number
3635 * @data: pointer to a q_vector
3637 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3639 struct i40e_q_vector *q_vector = data;
3640 struct i40e_vsi *vsi;
3642 if (!q_vector->tx.ring)
3645 vsi = q_vector->tx.ring->vsi;
3646 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3652 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3653 * @vsi: the VSI being configured
3654 * @v_idx: vector index
3655 * @qp_idx: queue pair index
3657 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3659 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3660 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3661 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3663 tx_ring->q_vector = q_vector;
3664 tx_ring->next = q_vector->tx.ring;
3665 q_vector->tx.ring = tx_ring;
3666 q_vector->tx.count++;
3668 rx_ring->q_vector = q_vector;
3669 rx_ring->next = q_vector->rx.ring;
3670 q_vector->rx.ring = rx_ring;
3671 q_vector->rx.count++;
3675 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3676 * @vsi: the VSI being configured
3678 * This function maps descriptor rings to the queue-specific vectors
3679 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3680 * one vector per queue pair, but on a constrained vector budget, we
3681 * group the queue pairs as "efficiently" as possible.
3683 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3685 int qp_remaining = vsi->num_queue_pairs;
3686 int q_vectors = vsi->num_q_vectors;
3691 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3692 * group them so there are multiple queues per vector.
3693 * It is also important to go through all the vectors available to be
3694 * sure that if we don't use all the vectors, that the remaining vectors
3695 * are cleared. This is especially important when decreasing the
3696 * number of queues in use.
3698 for (; v_start < q_vectors; v_start++) {
3699 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3701 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3703 q_vector->num_ringpairs = num_ringpairs;
3705 q_vector->rx.count = 0;
3706 q_vector->tx.count = 0;
3707 q_vector->rx.ring = NULL;
3708 q_vector->tx.ring = NULL;
3710 while (num_ringpairs--) {
3711 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3719 * i40e_vsi_request_irq - Request IRQ from the OS
3720 * @vsi: the VSI being configured
3721 * @basename: name for the vector
3723 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3725 struct i40e_pf *pf = vsi->back;
3728 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3729 err = i40e_vsi_request_irq_msix(vsi, basename);
3730 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3731 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3734 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3738 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3743 #ifdef CONFIG_NET_POLL_CONTROLLER
3745 * i40e_netpoll - A Polling 'interrupt'handler
3746 * @netdev: network interface device structure
3748 * This is used by netconsole to send skbs without having to re-enable
3749 * interrupts. It's not called while the normal interrupt routine is executing.
3752 void i40e_netpoll(struct net_device *netdev)
3754 static void i40e_netpoll(struct net_device *netdev)
3757 struct i40e_netdev_priv *np = netdev_priv(netdev);
3758 struct i40e_vsi *vsi = np->vsi;
3759 struct i40e_pf *pf = vsi->back;
3762 /* if interface is down do nothing */
3763 if (test_bit(__I40E_DOWN, &vsi->state))
3766 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3767 for (i = 0; i < vsi->num_q_vectors; i++)
3768 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3770 i40e_intr(pf->pdev->irq, netdev);
3776 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3777 * @pf: the PF being configured
3778 * @pf_q: the PF queue
3779 * @enable: enable or disable state of the queue
3781 * This routine will wait for the given Tx queue of the PF to reach the
3782 * enabled or disabled state.
3783 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3784 * multiple retries; else will return 0 in case of success.
3786 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3791 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3792 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3793 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3796 usleep_range(10, 20);
3798 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3805 * i40e_vsi_control_tx - Start or stop a VSI's rings
3806 * @vsi: the VSI being configured
3807 * @enable: start or stop the rings
3809 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3811 struct i40e_pf *pf = vsi->back;
3812 struct i40e_hw *hw = &pf->hw;
3813 int i, j, pf_q, ret = 0;
3816 pf_q = vsi->base_queue;
3817 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3819 /* warn the TX unit of coming changes */
3820 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3822 usleep_range(10, 20);
3824 for (j = 0; j < 50; j++) {
3825 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3826 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3827 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3829 usleep_range(1000, 2000);
3831 /* Skip if the queue is already in the requested state */
3832 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3835 /* turn on/off the queue */
3837 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3838 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3840 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3843 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3844 /* No waiting for the Tx queue to disable */
3845 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3848 /* wait for the change to finish */
3849 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3851 dev_info(&pf->pdev->dev,
3852 "VSI seid %d Tx ring %d %sable timeout\n",
3853 vsi->seid, pf_q, (enable ? "en" : "dis"));
3858 if (hw->revision_id == 0)
3864 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3865 * @pf: the PF being configured
3866 * @pf_q: the PF queue
3867 * @enable: enable or disable state of the queue
3869 * This routine will wait for the given Rx queue of the PF to reach the
3870 * enabled or disabled state.
3871 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3872 * multiple retries; else will return 0 in case of success.
3874 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3879 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3880 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3881 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3884 usleep_range(10, 20);
3886 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3893 * i40e_vsi_control_rx - Start or stop a VSI's rings
3894 * @vsi: the VSI being configured
3895 * @enable: start or stop the rings
3897 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3899 struct i40e_pf *pf = vsi->back;
3900 struct i40e_hw *hw = &pf->hw;
3901 int i, j, pf_q, ret = 0;
3904 pf_q = vsi->base_queue;
3905 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3906 for (j = 0; j < 50; j++) {
3907 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3908 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3909 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3911 usleep_range(1000, 2000);
3914 /* Skip if the queue is already in the requested state */
3915 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3918 /* turn on/off the queue */
3920 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3922 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3923 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3925 /* wait for the change to finish */
3926 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3928 dev_info(&pf->pdev->dev,
3929 "VSI seid %d Rx ring %d %sable timeout\n",
3930 vsi->seid, pf_q, (enable ? "en" : "dis"));
3939 * i40e_vsi_control_rings - Start or stop a VSI's rings
3940 * @vsi: the VSI being configured
3941 * @enable: start or stop the rings
3943 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3947 /* do rx first for enable and last for disable */
3949 ret = i40e_vsi_control_rx(vsi, request);
3952 ret = i40e_vsi_control_tx(vsi, request);
3954 /* Ignore return value, we need to shutdown whatever we can */
3955 i40e_vsi_control_tx(vsi, request);
3956 i40e_vsi_control_rx(vsi, request);
3963 * i40e_vsi_free_irq - Free the irq association with the OS
3964 * @vsi: the VSI being configured
3966 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3968 struct i40e_pf *pf = vsi->back;
3969 struct i40e_hw *hw = &pf->hw;
3970 int base = vsi->base_vector;
3974 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3975 if (!vsi->q_vectors)
3978 if (!vsi->irqs_ready)
3981 vsi->irqs_ready = false;
3982 for (i = 0; i < vsi->num_q_vectors; i++) {
3983 u16 vector = i + base;
3985 /* free only the irqs that were actually requested */
3986 if (!vsi->q_vectors[i] ||
3987 !vsi->q_vectors[i]->num_ringpairs)
3990 /* clear the affinity_mask in the IRQ descriptor */
3991 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3993 free_irq(pf->msix_entries[vector].vector,
3996 /* Tear down the interrupt queue link list
3998 * We know that they come in pairs and always
3999 * the Rx first, then the Tx. To clear the
4000 * link list, stick the EOL value into the
4001 * next_q field of the registers.
4003 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4004 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4005 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4006 val |= I40E_QUEUE_END_OF_LIST
4007 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4008 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4010 while (qp != I40E_QUEUE_END_OF_LIST) {
4013 val = rd32(hw, I40E_QINT_RQCTL(qp));
4015 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4016 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4017 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4018 I40E_QINT_RQCTL_INTEVENT_MASK);
4020 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4021 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4023 wr32(hw, I40E_QINT_RQCTL(qp), val);
4025 val = rd32(hw, I40E_QINT_TQCTL(qp));
4027 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4028 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4030 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4031 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4032 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4033 I40E_QINT_TQCTL_INTEVENT_MASK);
4035 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4036 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4038 wr32(hw, I40E_QINT_TQCTL(qp), val);
4043 free_irq(pf->pdev->irq, pf);
4045 val = rd32(hw, I40E_PFINT_LNKLST0);
4046 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4047 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4048 val |= I40E_QUEUE_END_OF_LIST
4049 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4050 wr32(hw, I40E_PFINT_LNKLST0, val);
4052 val = rd32(hw, I40E_QINT_RQCTL(qp));
4053 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4054 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4055 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4056 I40E_QINT_RQCTL_INTEVENT_MASK);
4058 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4059 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4061 wr32(hw, I40E_QINT_RQCTL(qp), val);
4063 val = rd32(hw, I40E_QINT_TQCTL(qp));
4065 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4066 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4067 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4068 I40E_QINT_TQCTL_INTEVENT_MASK);
4070 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4071 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4073 wr32(hw, I40E_QINT_TQCTL(qp), val);
4078 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4079 * @vsi: the VSI being configured
4080 * @v_idx: Index of vector to be freed
4082 * This function frees the memory allocated to the q_vector. In addition if
4083 * NAPI is enabled it will delete any references to the NAPI struct prior
4084 * to freeing the q_vector.
4086 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4088 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4089 struct i40e_ring *ring;
4094 /* disassociate q_vector from rings */
4095 i40e_for_each_ring(ring, q_vector->tx)
4096 ring->q_vector = NULL;
4098 i40e_for_each_ring(ring, q_vector->rx)
4099 ring->q_vector = NULL;
4101 /* only VSI w/ an associated netdev is set up w/ NAPI */
4103 netif_napi_del(&q_vector->napi);
4105 vsi->q_vectors[v_idx] = NULL;
4107 kfree_rcu(q_vector, rcu);
4111 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4112 * @vsi: the VSI being un-configured
4114 * This frees the memory allocated to the q_vectors and
4115 * deletes references to the NAPI struct.
4117 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4121 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4122 i40e_free_q_vector(vsi, v_idx);
4126 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4127 * @pf: board private structure
4129 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4131 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4132 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4133 pci_disable_msix(pf->pdev);
4134 kfree(pf->msix_entries);
4135 pf->msix_entries = NULL;
4136 kfree(pf->irq_pile);
4137 pf->irq_pile = NULL;
4138 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4139 pci_disable_msi(pf->pdev);
4141 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4145 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4146 * @pf: board private structure
4148 * We go through and clear interrupt specific resources and reset the structure
4149 * to pre-load conditions
4151 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4155 i40e_stop_misc_vector(pf);
4156 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4157 synchronize_irq(pf->msix_entries[0].vector);
4158 free_irq(pf->msix_entries[0].vector, pf);
4161 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4162 for (i = 0; i < pf->num_alloc_vsi; i++)
4164 i40e_vsi_free_q_vectors(pf->vsi[i]);
4165 i40e_reset_interrupt_capability(pf);
4169 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4170 * @vsi: the VSI being configured
4172 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4179 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4180 napi_enable(&vsi->q_vectors[q_idx]->napi);
4184 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4185 * @vsi: the VSI being configured
4187 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4194 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4195 napi_disable(&vsi->q_vectors[q_idx]->napi);
4199 * i40e_vsi_close - Shut down a VSI
4200 * @vsi: the vsi to be quelled
4202 static void i40e_vsi_close(struct i40e_vsi *vsi)
4204 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4206 i40e_vsi_free_irq(vsi);
4207 i40e_vsi_free_tx_resources(vsi);
4208 i40e_vsi_free_rx_resources(vsi);
4209 vsi->current_netdev_flags = 0;
4213 * i40e_quiesce_vsi - Pause a given VSI
4214 * @vsi: the VSI being paused
4216 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4218 if (test_bit(__I40E_DOWN, &vsi->state))
4221 /* No need to disable FCoE VSI when Tx suspended */
4222 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4223 vsi->type == I40E_VSI_FCOE) {
4224 dev_dbg(&vsi->back->pdev->dev,
4225 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4229 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4230 if (vsi->netdev && netif_running(vsi->netdev))
4231 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4233 i40e_vsi_close(vsi);
4237 * i40e_unquiesce_vsi - Resume a given VSI
4238 * @vsi: the VSI being resumed
4240 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4242 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4245 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4246 if (vsi->netdev && netif_running(vsi->netdev))
4247 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4249 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4253 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4256 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4260 for (v = 0; v < pf->num_alloc_vsi; v++) {
4262 i40e_quiesce_vsi(pf->vsi[v]);
4267 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4270 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4274 for (v = 0; v < pf->num_alloc_vsi; v++) {
4276 i40e_unquiesce_vsi(pf->vsi[v]);
4280 #ifdef CONFIG_I40E_DCB
4282 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4283 * @vsi: the VSI being configured
4285 * This function waits for the given VSI's Tx queues to be disabled.
4287 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4289 struct i40e_pf *pf = vsi->back;
4292 pf_q = vsi->base_queue;
4293 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4294 /* Check and wait for the disable status of the queue */
4295 ret = i40e_pf_txq_wait(pf, pf_q, false);
4297 dev_info(&pf->pdev->dev,
4298 "VSI seid %d Tx ring %d disable timeout\n",
4308 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4311 * This function waits for the Tx queues to be in disabled state for all the
4312 * VSIs that are managed by this PF.
4314 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4318 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4319 /* No need to wait for FCoE VSI queues */
4320 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4321 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4333 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4334 * @q_idx: TX queue number
4335 * @vsi: Pointer to VSI struct
4337 * This function checks specified queue for given VSI. Detects hung condition.
4338 * Sets hung bit since it is two step process. Before next run of service task
4339 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4340 * hung condition remain unchanged and during subsequent run, this function
4341 * issues SW interrupt to recover from hung condition.
4343 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4345 struct i40e_ring *tx_ring = NULL;
4347 u32 head, val, tx_pending;
4352 /* now that we have an index, find the tx_ring struct */
4353 for (i = 0; i < vsi->num_queue_pairs; i++) {
4354 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4355 if (q_idx == vsi->tx_rings[i]->queue_index) {
4356 tx_ring = vsi->tx_rings[i];
4365 /* Read interrupt register */
4366 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4368 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4369 tx_ring->vsi->base_vector - 1));
4371 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4373 /* Bail out if interrupts are disabled because napi_poll
4374 * execution in-progress or will get scheduled soon.
4375 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4377 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4380 head = i40e_get_head(tx_ring);
4382 tx_pending = i40e_get_tx_pending(tx_ring);
4384 /* HW is done executing descriptors, updated HEAD write back,
4385 * but SW hasn't processed those descriptors. If interrupt is
4386 * not generated from this point ON, it could result into
4387 * dev_watchdog detecting timeout on those netdev_queue,
4388 * hence proactively trigger SW interrupt.
4391 /* NAPI Poll didn't run and clear since it was set */
4392 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4393 &tx_ring->q_vector->hung_detected)) {
4394 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4395 vsi->seid, q_idx, tx_pending,
4396 tx_ring->next_to_clean, head,
4397 tx_ring->next_to_use,
4398 readl(tx_ring->tail));
4399 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4400 vsi->seid, q_idx, val);
4401 i40e_force_wb(vsi, tx_ring->q_vector);
4403 /* First Chance - detected possible hung */
4404 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4405 &tx_ring->q_vector->hung_detected);
4411 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4412 * @pf: pointer to PF struct
4414 * LAN VSI has netdev and netdev has TX queues. This function is to check
4415 * each of those TX queues if they are hung, trigger recovery by issuing
4418 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4420 struct net_device *netdev;
4421 struct i40e_vsi *vsi;
4424 /* Only for LAN VSI */
4425 vsi = pf->vsi[pf->lan_vsi];
4430 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4431 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4432 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4435 /* Make sure type is MAIN VSI */
4436 if (vsi->type != I40E_VSI_MAIN)
4439 netdev = vsi->netdev;
4443 /* Bail out if netif_carrier is not OK */
4444 if (!netif_carrier_ok(netdev))
4447 /* Go thru' TX queues for netdev */
4448 for (i = 0; i < netdev->num_tx_queues; i++) {
4449 struct netdev_queue *q;
4451 q = netdev_get_tx_queue(netdev, i);
4453 i40e_detect_recover_hung_queue(i, vsi);
4458 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4459 * @pf: pointer to PF
4461 * Get TC map for ISCSI PF type that will include iSCSI TC
4464 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4466 struct i40e_dcb_app_priority_table app;
4467 struct i40e_hw *hw = &pf->hw;
4468 u8 enabled_tc = 1; /* TC0 is always enabled */
4470 /* Get the iSCSI APP TLV */
4471 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4473 for (i = 0; i < dcbcfg->numapps; i++) {
4474 app = dcbcfg->app[i];
4475 if (app.selector == I40E_APP_SEL_TCPIP &&
4476 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4477 tc = dcbcfg->etscfg.prioritytable[app.priority];
4478 enabled_tc |= BIT(tc);
4487 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4488 * @dcbcfg: the corresponding DCBx configuration structure
4490 * Return the number of TCs from given DCBx configuration
4492 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4497 /* Scan the ETS Config Priority Table to find
4498 * traffic class enabled for a given priority
4499 * and use the traffic class index to get the
4500 * number of traffic classes enabled
4502 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4503 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4504 num_tc = dcbcfg->etscfg.prioritytable[i];
4507 /* Traffic class index starts from zero so
4508 * increment to return the actual count
4514 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4515 * @dcbcfg: the corresponding DCBx configuration structure
4517 * Query the current DCB configuration and return the number of
4518 * traffic classes enabled from the given DCBX config
4520 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4522 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4526 for (i = 0; i < num_tc; i++)
4527 enabled_tc |= BIT(i);
4533 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4534 * @pf: PF being queried
4536 * Return number of traffic classes enabled for the given PF
4538 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4540 struct i40e_hw *hw = &pf->hw;
4543 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4545 /* If DCB is not enabled then always in single TC */
4546 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4549 /* SFP mode will be enabled for all TCs on port */
4550 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4551 return i40e_dcb_get_num_tc(dcbcfg);
4553 /* MFP mode return count of enabled TCs for this PF */
4554 if (pf->hw.func_caps.iscsi)
4555 enabled_tc = i40e_get_iscsi_tc_map(pf);
4557 return 1; /* Only TC0 */
4559 /* At least have TC0 */
4560 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4561 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4562 if (enabled_tc & BIT(i))
4569 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4570 * @pf: PF being queried
4572 * Return a bitmap for first enabled traffic class for this PF.
4574 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4576 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4580 return 0x1; /* TC0 */
4582 /* Find the first enabled TC */
4583 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4584 if (enabled_tc & BIT(i))
4592 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4593 * @pf: PF being queried
4595 * Return a bitmap for enabled traffic classes for this PF.
4597 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4599 /* If DCB is not enabled for this PF then just return default TC */
4600 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4601 return i40e_pf_get_default_tc(pf);
4603 /* SFP mode we want PF to be enabled for all TCs */
4604 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4605 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4607 /* MFP enabled and iSCSI PF type */
4608 if (pf->hw.func_caps.iscsi)
4609 return i40e_get_iscsi_tc_map(pf);
4611 return i40e_pf_get_default_tc(pf);
4615 * i40e_vsi_get_bw_info - Query VSI BW Information
4616 * @vsi: the VSI being queried
4618 * Returns 0 on success, negative value on failure
4620 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4622 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4623 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4624 struct i40e_pf *pf = vsi->back;
4625 struct i40e_hw *hw = &pf->hw;
4630 /* Get the VSI level BW configuration */
4631 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4633 dev_info(&pf->pdev->dev,
4634 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4635 i40e_stat_str(&pf->hw, ret),
4636 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4640 /* Get the VSI level BW configuration per TC */
4641 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4644 dev_info(&pf->pdev->dev,
4645 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4646 i40e_stat_str(&pf->hw, ret),
4647 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4651 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4652 dev_info(&pf->pdev->dev,
4653 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4654 bw_config.tc_valid_bits,
4655 bw_ets_config.tc_valid_bits);
4656 /* Still continuing */
4659 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4660 vsi->bw_max_quanta = bw_config.max_bw;
4661 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4662 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4663 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4664 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4665 vsi->bw_ets_limit_credits[i] =
4666 le16_to_cpu(bw_ets_config.credits[i]);
4667 /* 3 bits out of 4 for each TC */
4668 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4675 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4676 * @vsi: the VSI being configured
4677 * @enabled_tc: TC bitmap
4678 * @bw_credits: BW shared credits per TC
4680 * Returns 0 on success, negative value on failure
4682 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4685 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4689 bw_data.tc_valid_bits = enabled_tc;
4690 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4691 bw_data.tc_bw_credits[i] = bw_share[i];
4693 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4696 dev_info(&vsi->back->pdev->dev,
4697 "AQ command Config VSI BW allocation per TC failed = %d\n",
4698 vsi->back->hw.aq.asq_last_status);
4702 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4703 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4709 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4710 * @vsi: the VSI being configured
4711 * @enabled_tc: TC map to be enabled
4714 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4716 struct net_device *netdev = vsi->netdev;
4717 struct i40e_pf *pf = vsi->back;
4718 struct i40e_hw *hw = &pf->hw;
4721 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4727 netdev_reset_tc(netdev);
4731 /* Set up actual enabled TCs on the VSI */
4732 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4735 /* set per TC queues for the VSI */
4736 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4737 /* Only set TC queues for enabled tcs
4739 * e.g. For a VSI that has TC0 and TC3 enabled the
4740 * enabled_tc bitmap would be 0x00001001; the driver
4741 * will set the numtc for netdev as 2 that will be
4742 * referenced by the netdev layer as TC 0 and 1.
4744 if (vsi->tc_config.enabled_tc & BIT(i))
4745 netdev_set_tc_queue(netdev,
4746 vsi->tc_config.tc_info[i].netdev_tc,
4747 vsi->tc_config.tc_info[i].qcount,
4748 vsi->tc_config.tc_info[i].qoffset);
4751 /* Assign UP2TC map for the VSI */
4752 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4753 /* Get the actual TC# for the UP */
4754 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4755 /* Get the mapped netdev TC# for the UP */
4756 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4757 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4762 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4763 * @vsi: the VSI being configured
4764 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4766 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4767 struct i40e_vsi_context *ctxt)
4769 /* copy just the sections touched not the entire info
4770 * since not all sections are valid as returned by
4773 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4774 memcpy(&vsi->info.queue_mapping,
4775 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4776 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4777 sizeof(vsi->info.tc_mapping));
4781 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4782 * @vsi: VSI to be configured
4783 * @enabled_tc: TC bitmap
4785 * This configures a particular VSI for TCs that are mapped to the
4786 * given TC bitmap. It uses default bandwidth share for TCs across
4787 * VSIs to configure TC for a particular VSI.
4790 * It is expected that the VSI queues have been quisced before calling
4793 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4795 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4796 struct i40e_vsi_context ctxt;
4800 /* Check if enabled_tc is same as existing or new TCs */
4801 if (vsi->tc_config.enabled_tc == enabled_tc)
4804 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4805 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4806 if (enabled_tc & BIT(i))
4810 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4812 dev_info(&vsi->back->pdev->dev,
4813 "Failed configuring TC map %d for VSI %d\n",
4814 enabled_tc, vsi->seid);
4818 /* Update Queue Pairs Mapping for currently enabled UPs */
4819 ctxt.seid = vsi->seid;
4820 ctxt.pf_num = vsi->back->hw.pf_id;
4822 ctxt.uplink_seid = vsi->uplink_seid;
4823 ctxt.info = vsi->info;
4824 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4826 /* Update the VSI after updating the VSI queue-mapping information */
4827 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4829 dev_info(&vsi->back->pdev->dev,
4830 "Update vsi tc config failed, err %s aq_err %s\n",
4831 i40e_stat_str(&vsi->back->hw, ret),
4832 i40e_aq_str(&vsi->back->hw,
4833 vsi->back->hw.aq.asq_last_status));
4836 /* update the local VSI info with updated queue map */
4837 i40e_vsi_update_queue_map(vsi, &ctxt);
4838 vsi->info.valid_sections = 0;
4840 /* Update current VSI BW information */
4841 ret = i40e_vsi_get_bw_info(vsi);
4843 dev_info(&vsi->back->pdev->dev,
4844 "Failed updating vsi bw info, err %s aq_err %s\n",
4845 i40e_stat_str(&vsi->back->hw, ret),
4846 i40e_aq_str(&vsi->back->hw,
4847 vsi->back->hw.aq.asq_last_status));
4851 /* Update the netdev TC setup */
4852 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4858 * i40e_veb_config_tc - Configure TCs for given VEB
4860 * @enabled_tc: TC bitmap
4862 * Configures given TC bitmap for VEB (switching) element
4864 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4866 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4867 struct i40e_pf *pf = veb->pf;
4871 /* No TCs or already enabled TCs just return */
4872 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4875 bw_data.tc_valid_bits = enabled_tc;
4876 /* bw_data.absolute_credits is not set (relative) */
4878 /* Enable ETS TCs with equal BW Share for now */
4879 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4880 if (enabled_tc & BIT(i))
4881 bw_data.tc_bw_share_credits[i] = 1;
4884 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4887 dev_info(&pf->pdev->dev,
4888 "VEB bw config failed, err %s aq_err %s\n",
4889 i40e_stat_str(&pf->hw, ret),
4890 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4894 /* Update the BW information */
4895 ret = i40e_veb_get_bw_info(veb);
4897 dev_info(&pf->pdev->dev,
4898 "Failed getting veb bw config, err %s aq_err %s\n",
4899 i40e_stat_str(&pf->hw, ret),
4900 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4907 #ifdef CONFIG_I40E_DCB
4909 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4912 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4913 * the caller would've quiesce all the VSIs before calling
4916 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4922 /* Enable the TCs available on PF to all VEBs */
4923 tc_map = i40e_pf_get_tc_map(pf);
4924 for (v = 0; v < I40E_MAX_VEB; v++) {
4927 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4929 dev_info(&pf->pdev->dev,
4930 "Failed configuring TC for VEB seid=%d\n",
4932 /* Will try to configure as many components */
4936 /* Update each VSI */
4937 for (v = 0; v < pf->num_alloc_vsi; v++) {
4941 /* - Enable all TCs for the LAN VSI
4943 * - For FCoE VSI only enable the TC configured
4944 * as per the APP TLV
4946 * - For all others keep them at TC0 for now
4948 if (v == pf->lan_vsi)
4949 tc_map = i40e_pf_get_tc_map(pf);
4951 tc_map = i40e_pf_get_default_tc(pf);
4953 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4954 tc_map = i40e_get_fcoe_tc_map(pf);
4955 #endif /* #ifdef I40E_FCOE */
4957 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4959 dev_info(&pf->pdev->dev,
4960 "Failed configuring TC for VSI seid=%d\n",
4962 /* Will try to configure as many components */
4964 /* Re-configure VSI vectors based on updated TC map */
4965 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4966 if (pf->vsi[v]->netdev)
4967 i40e_dcbnl_set_all(pf->vsi[v]);
4973 * i40e_resume_port_tx - Resume port Tx
4976 * Resume a port's Tx and issue a PF reset in case of failure to
4979 static int i40e_resume_port_tx(struct i40e_pf *pf)
4981 struct i40e_hw *hw = &pf->hw;
4984 ret = i40e_aq_resume_port_tx(hw, NULL);
4986 dev_info(&pf->pdev->dev,
4987 "Resume Port Tx failed, err %s aq_err %s\n",
4988 i40e_stat_str(&pf->hw, ret),
4989 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4990 /* Schedule PF reset to recover */
4991 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4992 i40e_service_event_schedule(pf);
4999 * i40e_init_pf_dcb - Initialize DCB configuration
5000 * @pf: PF being configured
5002 * Query the current DCB configuration and cache it
5003 * in the hardware structure
5005 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5007 struct i40e_hw *hw = &pf->hw;
5010 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5011 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5012 (pf->hw.aq.fw_maj_ver < 4))
5015 /* Get the initial DCB configuration */
5016 err = i40e_init_dcb(hw);
5018 /* Device/Function is not DCBX capable */
5019 if ((!hw->func_caps.dcb) ||
5020 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5021 dev_info(&pf->pdev->dev,
5022 "DCBX offload is not supported or is disabled for this PF.\n");
5024 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5028 /* When status is not DISABLED then DCBX in FW */
5029 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5030 DCB_CAP_DCBX_VER_IEEE;
5032 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5033 /* Enable DCB tagging only when more than one TC */
5034 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5035 pf->flags |= I40E_FLAG_DCB_ENABLED;
5036 dev_dbg(&pf->pdev->dev,
5037 "DCBX offload is supported for this PF.\n");
5040 dev_info(&pf->pdev->dev,
5041 "Query for DCB configuration failed, err %s aq_err %s\n",
5042 i40e_stat_str(&pf->hw, err),
5043 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5049 #endif /* CONFIG_I40E_DCB */
5050 #define SPEED_SIZE 14
5053 * i40e_print_link_message - print link up or down
5054 * @vsi: the VSI for which link needs a message
5056 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5058 char *speed = "Unknown";
5059 char *fc = "Unknown";
5061 if (vsi->current_isup == isup)
5063 vsi->current_isup = isup;
5065 netdev_info(vsi->netdev, "NIC Link is Down\n");
5069 /* Warn user if link speed on NPAR enabled partition is not at
5072 if (vsi->back->hw.func_caps.npar_enable &&
5073 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5074 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5075 netdev_warn(vsi->netdev,
5076 "The partition detected link speed that is less than 10Gbps\n");
5078 switch (vsi->back->hw.phy.link_info.link_speed) {
5079 case I40E_LINK_SPEED_40GB:
5082 case I40E_LINK_SPEED_20GB:
5085 case I40E_LINK_SPEED_10GB:
5088 case I40E_LINK_SPEED_1GB:
5091 case I40E_LINK_SPEED_100MB:
5098 switch (vsi->back->hw.fc.current_mode) {
5102 case I40E_FC_TX_PAUSE:
5105 case I40E_FC_RX_PAUSE:
5113 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5118 * i40e_up_complete - Finish the last steps of bringing up a connection
5119 * @vsi: the VSI being configured
5121 static int i40e_up_complete(struct i40e_vsi *vsi)
5123 struct i40e_pf *pf = vsi->back;
5126 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5127 i40e_vsi_configure_msix(vsi);
5129 i40e_configure_msi_and_legacy(vsi);
5132 err = i40e_vsi_control_rings(vsi, true);
5136 clear_bit(__I40E_DOWN, &vsi->state);
5137 i40e_napi_enable_all(vsi);
5138 i40e_vsi_enable_irq(vsi);
5140 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5142 i40e_print_link_message(vsi, true);
5143 netif_tx_start_all_queues(vsi->netdev);
5144 netif_carrier_on(vsi->netdev);
5145 } else if (vsi->netdev) {
5146 i40e_print_link_message(vsi, false);
5147 /* need to check for qualified module here*/
5148 if ((pf->hw.phy.link_info.link_info &
5149 I40E_AQ_MEDIA_AVAILABLE) &&
5150 (!(pf->hw.phy.link_info.an_info &
5151 I40E_AQ_QUALIFIED_MODULE)))
5152 netdev_err(vsi->netdev,
5153 "the driver failed to link because an unqualified module was detected.");
5156 /* replay FDIR SB filters */
5157 if (vsi->type == I40E_VSI_FDIR) {
5158 /* reset fd counters */
5159 pf->fd_add_err = pf->fd_atr_cnt = 0;
5160 if (pf->fd_tcp_rule > 0) {
5161 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5162 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5163 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5164 pf->fd_tcp_rule = 0;
5166 i40e_fdir_filter_restore(vsi);
5168 i40e_service_event_schedule(pf);
5174 * i40e_vsi_reinit_locked - Reset the VSI
5175 * @vsi: the VSI being configured
5177 * Rebuild the ring structs after some configuration
5178 * has changed, e.g. MTU size.
5180 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5182 struct i40e_pf *pf = vsi->back;
5184 WARN_ON(in_interrupt());
5185 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5186 usleep_range(1000, 2000);
5189 /* Give a VF some time to respond to the reset. The
5190 * two second wait is based upon the watchdog cycle in
5193 if (vsi->type == I40E_VSI_SRIOV)
5196 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5200 * i40e_up - Bring the connection back up after being down
5201 * @vsi: the VSI being configured
5203 int i40e_up(struct i40e_vsi *vsi)
5207 err = i40e_vsi_configure(vsi);
5209 err = i40e_up_complete(vsi);
5215 * i40e_down - Shutdown the connection processing
5216 * @vsi: the VSI being stopped
5218 void i40e_down(struct i40e_vsi *vsi)
5222 /* It is assumed that the caller of this function
5223 * sets the vsi->state __I40E_DOWN bit.
5226 netif_carrier_off(vsi->netdev);
5227 netif_tx_disable(vsi->netdev);
5229 i40e_vsi_disable_irq(vsi);
5230 i40e_vsi_control_rings(vsi, false);
5231 i40e_napi_disable_all(vsi);
5233 for (i = 0; i < vsi->num_queue_pairs; i++) {
5234 i40e_clean_tx_ring(vsi->tx_rings[i]);
5235 i40e_clean_rx_ring(vsi->rx_rings[i]);
5240 * i40e_setup_tc - configure multiple traffic classes
5241 * @netdev: net device to configure
5242 * @tc: number of traffic classes to enable
5245 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5247 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5250 struct i40e_netdev_priv *np = netdev_priv(netdev);
5251 struct i40e_vsi *vsi = np->vsi;
5252 struct i40e_pf *pf = vsi->back;
5257 /* Check if DCB enabled to continue */
5258 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5259 netdev_info(netdev, "DCB is not enabled for adapter\n");
5263 /* Check if MFP enabled */
5264 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5265 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5269 /* Check whether tc count is within enabled limit */
5270 if (tc > i40e_pf_get_num_tc(pf)) {
5271 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5275 /* Generate TC map for number of tc requested */
5276 for (i = 0; i < tc; i++)
5277 enabled_tc |= BIT(i);
5279 /* Requesting same TC configuration as already enabled */
5280 if (enabled_tc == vsi->tc_config.enabled_tc)
5283 /* Quiesce VSI queues */
5284 i40e_quiesce_vsi(vsi);
5286 /* Configure VSI for enabled TCs */
5287 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5289 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5295 i40e_unquiesce_vsi(vsi);
5302 * i40e_open - Called when a network interface is made active
5303 * @netdev: network interface device structure
5305 * The open entry point is called when a network interface is made
5306 * active by the system (IFF_UP). At this point all resources needed
5307 * for transmit and receive operations are allocated, the interrupt
5308 * handler is registered with the OS, the netdev watchdog subtask is
5309 * enabled, and the stack is notified that the interface is ready.
5311 * Returns 0 on success, negative value on failure
5313 int i40e_open(struct net_device *netdev)
5315 struct i40e_netdev_priv *np = netdev_priv(netdev);
5316 struct i40e_vsi *vsi = np->vsi;
5317 struct i40e_pf *pf = vsi->back;
5320 /* disallow open during test or if eeprom is broken */
5321 if (test_bit(__I40E_TESTING, &pf->state) ||
5322 test_bit(__I40E_BAD_EEPROM, &pf->state))
5325 netif_carrier_off(netdev);
5327 err = i40e_vsi_open(vsi);
5331 /* configure global TSO hardware offload settings */
5332 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5333 TCP_FLAG_FIN) >> 16);
5334 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5336 TCP_FLAG_CWR) >> 16);
5337 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5339 #ifdef CONFIG_I40E_VXLAN
5340 vxlan_get_rx_port(netdev);
5342 #ifdef CONFIG_I40E_GENEVE
5343 geneve_get_rx_port(netdev);
5351 * @vsi: the VSI to open
5353 * Finish initialization of the VSI.
5355 * Returns 0 on success, negative value on failure
5357 int i40e_vsi_open(struct i40e_vsi *vsi)
5359 struct i40e_pf *pf = vsi->back;
5360 char int_name[I40E_INT_NAME_STR_LEN];
5363 /* allocate descriptors */
5364 err = i40e_vsi_setup_tx_resources(vsi);
5367 err = i40e_vsi_setup_rx_resources(vsi);
5371 err = i40e_vsi_configure(vsi);
5376 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5377 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5378 err = i40e_vsi_request_irq(vsi, int_name);
5382 /* Notify the stack of the actual queue counts. */
5383 err = netif_set_real_num_tx_queues(vsi->netdev,
5384 vsi->num_queue_pairs);
5386 goto err_set_queues;
5388 err = netif_set_real_num_rx_queues(vsi->netdev,
5389 vsi->num_queue_pairs);
5391 goto err_set_queues;
5393 } else if (vsi->type == I40E_VSI_FDIR) {
5394 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5395 dev_driver_string(&pf->pdev->dev),
5396 dev_name(&pf->pdev->dev));
5397 err = i40e_vsi_request_irq(vsi, int_name);
5404 err = i40e_up_complete(vsi);
5406 goto err_up_complete;
5413 i40e_vsi_free_irq(vsi);
5415 i40e_vsi_free_rx_resources(vsi);
5417 i40e_vsi_free_tx_resources(vsi);
5418 if (vsi == pf->vsi[pf->lan_vsi])
5419 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5425 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5426 * @pf: Pointer to PF
5428 * This function destroys the hlist where all the Flow Director
5429 * filters were saved.
5431 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5433 struct i40e_fdir_filter *filter;
5434 struct hlist_node *node2;
5436 hlist_for_each_entry_safe(filter, node2,
5437 &pf->fdir_filter_list, fdir_node) {
5438 hlist_del(&filter->fdir_node);
5441 pf->fdir_pf_active_filters = 0;
5445 * i40e_close - Disables a network interface
5446 * @netdev: network interface device structure
5448 * The close entry point is called when an interface is de-activated
5449 * by the OS. The hardware is still under the driver's control, but
5450 * this netdev interface is disabled.
5452 * Returns 0, this is not allowed to fail
5455 int i40e_close(struct net_device *netdev)
5457 static int i40e_close(struct net_device *netdev)
5460 struct i40e_netdev_priv *np = netdev_priv(netdev);
5461 struct i40e_vsi *vsi = np->vsi;
5463 i40e_vsi_close(vsi);
5469 * i40e_do_reset - Start a PF or Core Reset sequence
5470 * @pf: board private structure
5471 * @reset_flags: which reset is requested
5473 * The essential difference in resets is that the PF Reset
5474 * doesn't clear the packet buffers, doesn't reset the PE
5475 * firmware, and doesn't bother the other PFs on the chip.
5477 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5481 WARN_ON(in_interrupt());
5483 if (i40e_check_asq_alive(&pf->hw))
5484 i40e_vc_notify_reset(pf);
5486 /* do the biggest reset indicated */
5487 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5489 /* Request a Global Reset
5491 * This will start the chip's countdown to the actual full
5492 * chip reset event, and a warning interrupt to be sent
5493 * to all PFs, including the requestor. Our handler
5494 * for the warning interrupt will deal with the shutdown
5495 * and recovery of the switch setup.
5497 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5498 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5499 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5500 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5502 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5504 /* Request a Core Reset
5506 * Same as Global Reset, except does *not* include the MAC/PHY
5508 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5509 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5510 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5511 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5512 i40e_flush(&pf->hw);
5514 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5516 /* Request a PF Reset
5518 * Resets only the PF-specific registers
5520 * This goes directly to the tear-down and rebuild of
5521 * the switch, since we need to do all the recovery as
5522 * for the Core Reset.
5524 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5525 i40e_handle_reset_warning(pf);
5527 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5530 /* Find the VSI(s) that requested a re-init */
5531 dev_info(&pf->pdev->dev,
5532 "VSI reinit requested\n");
5533 for (v = 0; v < pf->num_alloc_vsi; v++) {
5534 struct i40e_vsi *vsi = pf->vsi[v];
5537 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5538 i40e_vsi_reinit_locked(pf->vsi[v]);
5539 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5542 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5545 /* Find the VSI(s) that needs to be brought down */
5546 dev_info(&pf->pdev->dev, "VSI down requested\n");
5547 for (v = 0; v < pf->num_alloc_vsi; v++) {
5548 struct i40e_vsi *vsi = pf->vsi[v];
5551 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5552 set_bit(__I40E_DOWN, &vsi->state);
5554 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5558 dev_info(&pf->pdev->dev,
5559 "bad reset request 0x%08x\n", reset_flags);
5563 #ifdef CONFIG_I40E_DCB
5565 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5566 * @pf: board private structure
5567 * @old_cfg: current DCB config
5568 * @new_cfg: new DCB config
5570 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5571 struct i40e_dcbx_config *old_cfg,
5572 struct i40e_dcbx_config *new_cfg)
5574 bool need_reconfig = false;
5576 /* Check if ETS configuration has changed */
5577 if (memcmp(&new_cfg->etscfg,
5579 sizeof(new_cfg->etscfg))) {
5580 /* If Priority Table has changed reconfig is needed */
5581 if (memcmp(&new_cfg->etscfg.prioritytable,
5582 &old_cfg->etscfg.prioritytable,
5583 sizeof(new_cfg->etscfg.prioritytable))) {
5584 need_reconfig = true;
5585 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5588 if (memcmp(&new_cfg->etscfg.tcbwtable,
5589 &old_cfg->etscfg.tcbwtable,
5590 sizeof(new_cfg->etscfg.tcbwtable)))
5591 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5593 if (memcmp(&new_cfg->etscfg.tsatable,
5594 &old_cfg->etscfg.tsatable,
5595 sizeof(new_cfg->etscfg.tsatable)))
5596 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5599 /* Check if PFC configuration has changed */
5600 if (memcmp(&new_cfg->pfc,
5602 sizeof(new_cfg->pfc))) {
5603 need_reconfig = true;
5604 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5607 /* Check if APP Table has changed */
5608 if (memcmp(&new_cfg->app,
5610 sizeof(new_cfg->app))) {
5611 need_reconfig = true;
5612 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5615 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5616 return need_reconfig;
5620 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5621 * @pf: board private structure
5622 * @e: event info posted on ARQ
5624 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5625 struct i40e_arq_event_info *e)
5627 struct i40e_aqc_lldp_get_mib *mib =
5628 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5629 struct i40e_hw *hw = &pf->hw;
5630 struct i40e_dcbx_config tmp_dcbx_cfg;
5631 bool need_reconfig = false;
5635 /* Not DCB capable or capability disabled */
5636 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5639 /* Ignore if event is not for Nearest Bridge */
5640 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5641 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5642 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5643 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5646 /* Check MIB Type and return if event for Remote MIB update */
5647 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5648 dev_dbg(&pf->pdev->dev,
5649 "LLDP event mib type %s\n", type ? "remote" : "local");
5650 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5651 /* Update the remote cached instance and return */
5652 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5653 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5654 &hw->remote_dcbx_config);
5658 /* Store the old configuration */
5659 tmp_dcbx_cfg = hw->local_dcbx_config;
5661 /* Reset the old DCBx configuration data */
5662 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5663 /* Get updated DCBX data from firmware */
5664 ret = i40e_get_dcb_config(&pf->hw);
5666 dev_info(&pf->pdev->dev,
5667 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5668 i40e_stat_str(&pf->hw, ret),
5669 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5673 /* No change detected in DCBX configs */
5674 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5675 sizeof(tmp_dcbx_cfg))) {
5676 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5680 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5681 &hw->local_dcbx_config);
5683 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5688 /* Enable DCB tagging only when more than one TC */
5689 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5690 pf->flags |= I40E_FLAG_DCB_ENABLED;
5692 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5694 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5695 /* Reconfiguration needed quiesce all VSIs */
5696 i40e_pf_quiesce_all_vsi(pf);
5698 /* Changes in configuration update VEB/VSI */
5699 i40e_dcb_reconfigure(pf);
5701 ret = i40e_resume_port_tx(pf);
5703 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5704 /* In case of error no point in resuming VSIs */
5708 /* Wait for the PF's Tx queues to be disabled */
5709 ret = i40e_pf_wait_txq_disabled(pf);
5711 /* Schedule PF reset to recover */
5712 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5713 i40e_service_event_schedule(pf);
5715 i40e_pf_unquiesce_all_vsi(pf);
5721 #endif /* CONFIG_I40E_DCB */
5724 * i40e_do_reset_safe - Protected reset path for userland calls.
5725 * @pf: board private structure
5726 * @reset_flags: which reset is requested
5729 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5732 i40e_do_reset(pf, reset_flags);
5737 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5738 * @pf: board private structure
5739 * @e: event info posted on ARQ
5741 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5744 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5745 struct i40e_arq_event_info *e)
5747 struct i40e_aqc_lan_overflow *data =
5748 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5749 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5750 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5751 struct i40e_hw *hw = &pf->hw;
5755 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5758 /* Queue belongs to VF, find the VF and issue VF reset */
5759 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5760 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5761 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5762 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5763 vf_id -= hw->func_caps.vf_base_id;
5764 vf = &pf->vf[vf_id];
5765 i40e_vc_notify_vf_reset(vf);
5766 /* Allow VF to process pending reset notification */
5768 i40e_reset_vf(vf, false);
5773 * i40e_service_event_complete - Finish up the service event
5774 * @pf: board private structure
5776 static void i40e_service_event_complete(struct i40e_pf *pf)
5778 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5780 /* flush memory to make sure state is correct before next watchog */
5781 smp_mb__before_atomic();
5782 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5786 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5787 * @pf: board private structure
5789 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5793 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5794 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5799 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5800 * @pf: board private structure
5802 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5806 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5807 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5808 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5809 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5814 * i40e_get_global_fd_count - Get total FD filters programmed on device
5815 * @pf: board private structure
5817 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5821 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5822 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5823 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5824 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5829 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5830 * @pf: board private structure
5832 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5834 struct i40e_fdir_filter *filter;
5835 u32 fcnt_prog, fcnt_avail;
5836 struct hlist_node *node;
5838 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5841 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5844 fcnt_prog = i40e_get_global_fd_count(pf);
5845 fcnt_avail = pf->fdir_pf_filter_count;
5846 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5847 (pf->fd_add_err == 0) ||
5848 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5849 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5850 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5851 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5852 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5853 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5856 /* Wait for some more space to be available to turn on ATR */
5857 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5858 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5859 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5860 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5861 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5862 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5866 /* if hw had a problem adding a filter, delete it */
5867 if (pf->fd_inv > 0) {
5868 hlist_for_each_entry_safe(filter, node,
5869 &pf->fdir_filter_list, fdir_node) {
5870 if (filter->fd_id == pf->fd_inv) {
5871 hlist_del(&filter->fdir_node);
5873 pf->fdir_pf_active_filters--;
5879 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5880 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5882 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5883 * @pf: board private structure
5885 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5887 unsigned long min_flush_time;
5888 int flush_wait_retry = 50;
5889 bool disable_atr = false;
5893 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5896 if (!time_after(jiffies, pf->fd_flush_timestamp +
5897 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5900 /* If the flush is happening too quick and we have mostly SB rules we
5901 * should not re-enable ATR for some time.
5903 min_flush_time = pf->fd_flush_timestamp +
5904 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5905 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5907 if (!(time_after(jiffies, min_flush_time)) &&
5908 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5909 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5910 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5914 pf->fd_flush_timestamp = jiffies;
5915 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5916 /* flush all filters */
5917 wr32(&pf->hw, I40E_PFQF_CTL_1,
5918 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5919 i40e_flush(&pf->hw);
5923 /* Check FD flush status every 5-6msec */
5924 usleep_range(5000, 6000);
5925 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5926 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5928 } while (flush_wait_retry--);
5929 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5930 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5932 /* replay sideband filters */
5933 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5935 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5936 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5937 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5938 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5944 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5945 * @pf: board private structure
5947 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5949 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5952 /* We can see up to 256 filter programming desc in transit if the filters are
5953 * being applied really fast; before we see the first
5954 * filter miss error on Rx queue 0. Accumulating enough error messages before
5955 * reacting will make sure we don't cause flush too often.
5957 #define I40E_MAX_FD_PROGRAM_ERROR 256
5960 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5961 * @pf: board private structure
5963 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5966 /* if interface is down do nothing */
5967 if (test_bit(__I40E_DOWN, &pf->state))
5970 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5973 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5974 i40e_fdir_flush_and_replay(pf);
5976 i40e_fdir_check_and_reenable(pf);
5981 * i40e_vsi_link_event - notify VSI of a link event
5982 * @vsi: vsi to be notified
5983 * @link_up: link up or down
5985 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5987 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5990 switch (vsi->type) {
5995 if (!vsi->netdev || !vsi->netdev_registered)
5999 netif_carrier_on(vsi->netdev);
6000 netif_tx_wake_all_queues(vsi->netdev);
6002 netif_carrier_off(vsi->netdev);
6003 netif_tx_stop_all_queues(vsi->netdev);
6007 case I40E_VSI_SRIOV:
6008 case I40E_VSI_VMDQ2:
6010 case I40E_VSI_MIRROR:
6012 /* there is no notification for other VSIs */
6018 * i40e_veb_link_event - notify elements on the veb of a link event
6019 * @veb: veb to be notified
6020 * @link_up: link up or down
6022 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6027 if (!veb || !veb->pf)
6031 /* depth first... */
6032 for (i = 0; i < I40E_MAX_VEB; i++)
6033 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6034 i40e_veb_link_event(pf->veb[i], link_up);
6036 /* ... now the local VSIs */
6037 for (i = 0; i < pf->num_alloc_vsi; i++)
6038 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6039 i40e_vsi_link_event(pf->vsi[i], link_up);
6043 * i40e_link_event - Update netif_carrier status
6044 * @pf: board private structure
6046 static void i40e_link_event(struct i40e_pf *pf)
6048 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6049 u8 new_link_speed, old_link_speed;
6051 bool new_link, old_link;
6053 /* save off old link status information */
6054 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6056 /* set this to force the get_link_status call to refresh state */
6057 pf->hw.phy.get_link_info = true;
6059 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6061 status = i40e_get_link_status(&pf->hw, &new_link);
6063 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6068 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6069 new_link_speed = pf->hw.phy.link_info.link_speed;
6071 if (new_link == old_link &&
6072 new_link_speed == old_link_speed &&
6073 (test_bit(__I40E_DOWN, &vsi->state) ||
6074 new_link == netif_carrier_ok(vsi->netdev)))
6077 if (!test_bit(__I40E_DOWN, &vsi->state))
6078 i40e_print_link_message(vsi, new_link);
6080 /* Notify the base of the switch tree connected to
6081 * the link. Floating VEBs are not notified.
6083 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6084 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6086 i40e_vsi_link_event(vsi, new_link);
6089 i40e_vc_notify_link_state(pf);
6091 if (pf->flags & I40E_FLAG_PTP)
6092 i40e_ptp_set_increment(pf);
6096 * i40e_watchdog_subtask - periodic checks not using event driven response
6097 * @pf: board private structure
6099 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6103 /* if interface is down do nothing */
6104 if (test_bit(__I40E_DOWN, &pf->state) ||
6105 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6108 /* make sure we don't do these things too often */
6109 if (time_before(jiffies, (pf->service_timer_previous +
6110 pf->service_timer_period)))
6112 pf->service_timer_previous = jiffies;
6114 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6115 i40e_link_event(pf);
6117 /* Update the stats for active netdevs so the network stack
6118 * can look at updated numbers whenever it cares to
6120 for (i = 0; i < pf->num_alloc_vsi; i++)
6121 if (pf->vsi[i] && pf->vsi[i]->netdev)
6122 i40e_update_stats(pf->vsi[i]);
6124 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6125 /* Update the stats for the active switching components */
6126 for (i = 0; i < I40E_MAX_VEB; i++)
6128 i40e_update_veb_stats(pf->veb[i]);
6131 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6135 * i40e_reset_subtask - Set up for resetting the device and driver
6136 * @pf: board private structure
6138 static void i40e_reset_subtask(struct i40e_pf *pf)
6140 u32 reset_flags = 0;
6143 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6144 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6145 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6147 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6148 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6149 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6151 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6152 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6153 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6155 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6156 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6157 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6159 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6160 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6161 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6164 /* If there's a recovery already waiting, it takes
6165 * precedence before starting a new reset sequence.
6167 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6168 i40e_handle_reset_warning(pf);
6172 /* If we're already down or resetting, just bail */
6174 !test_bit(__I40E_DOWN, &pf->state) &&
6175 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6176 i40e_do_reset(pf, reset_flags);
6183 * i40e_handle_link_event - Handle link event
6184 * @pf: board private structure
6185 * @e: event info posted on ARQ
6187 static void i40e_handle_link_event(struct i40e_pf *pf,
6188 struct i40e_arq_event_info *e)
6190 struct i40e_aqc_get_link_status *status =
6191 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6193 /* Do a new status request to re-enable LSE reporting
6194 * and load new status information into the hw struct
6195 * This completely ignores any state information
6196 * in the ARQ event info, instead choosing to always
6197 * issue the AQ update link status command.
6199 i40e_link_event(pf);
6201 /* check for unqualified module, if link is down */
6202 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6203 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6204 (!(status->link_info & I40E_AQ_LINK_UP)))
6205 dev_err(&pf->pdev->dev,
6206 "The driver failed to link because an unqualified module was detected.\n");
6210 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6211 * @pf: board private structure
6213 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6215 struct i40e_arq_event_info event;
6216 struct i40e_hw *hw = &pf->hw;
6223 /* Do not run clean AQ when PF reset fails */
6224 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6227 /* check for error indications */
6228 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6230 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6231 if (hw->debug_mask & I40E_DEBUG_AQ)
6232 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6233 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6235 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6236 if (hw->debug_mask & I40E_DEBUG_AQ)
6237 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6238 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6240 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6241 if (hw->debug_mask & I40E_DEBUG_AQ)
6242 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6243 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6246 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6248 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6250 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6251 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6252 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6253 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6255 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6256 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6257 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6258 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6260 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6261 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6262 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6263 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6266 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6268 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6269 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6274 ret = i40e_clean_arq_element(hw, &event, &pending);
6275 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6278 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6282 opcode = le16_to_cpu(event.desc.opcode);
6285 case i40e_aqc_opc_get_link_status:
6286 i40e_handle_link_event(pf, &event);
6288 case i40e_aqc_opc_send_msg_to_pf:
6289 ret = i40e_vc_process_vf_msg(pf,
6290 le16_to_cpu(event.desc.retval),
6291 le32_to_cpu(event.desc.cookie_high),
6292 le32_to_cpu(event.desc.cookie_low),
6296 case i40e_aqc_opc_lldp_update_mib:
6297 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6298 #ifdef CONFIG_I40E_DCB
6300 ret = i40e_handle_lldp_event(pf, &event);
6302 #endif /* CONFIG_I40E_DCB */
6304 case i40e_aqc_opc_event_lan_overflow:
6305 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6306 i40e_handle_lan_overflow_event(pf, &event);
6308 case i40e_aqc_opc_send_msg_to_peer:
6309 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6311 case i40e_aqc_opc_nvm_erase:
6312 case i40e_aqc_opc_nvm_update:
6313 case i40e_aqc_opc_oem_post_update:
6314 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6317 dev_info(&pf->pdev->dev,
6318 "ARQ Error: Unknown event 0x%04x received\n",
6322 } while (pending && (i++ < pf->adminq_work_limit));
6324 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6325 /* re-enable Admin queue interrupt cause */
6326 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6327 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6328 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6331 kfree(event.msg_buf);
6335 * i40e_verify_eeprom - make sure eeprom is good to use
6336 * @pf: board private structure
6338 static void i40e_verify_eeprom(struct i40e_pf *pf)
6342 err = i40e_diag_eeprom_test(&pf->hw);
6344 /* retry in case of garbage read */
6345 err = i40e_diag_eeprom_test(&pf->hw);
6347 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6349 set_bit(__I40E_BAD_EEPROM, &pf->state);
6353 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6354 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6355 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6360 * i40e_enable_pf_switch_lb
6361 * @pf: pointer to the PF structure
6363 * enable switch loop back or die - no point in a return value
6365 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6367 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6368 struct i40e_vsi_context ctxt;
6371 ctxt.seid = pf->main_vsi_seid;
6372 ctxt.pf_num = pf->hw.pf_id;
6374 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6376 dev_info(&pf->pdev->dev,
6377 "couldn't get PF vsi config, err %s aq_err %s\n",
6378 i40e_stat_str(&pf->hw, ret),
6379 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6382 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6383 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6384 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6386 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6388 dev_info(&pf->pdev->dev,
6389 "update vsi switch failed, err %s aq_err %s\n",
6390 i40e_stat_str(&pf->hw, ret),
6391 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6396 * i40e_disable_pf_switch_lb
6397 * @pf: pointer to the PF structure
6399 * disable switch loop back or die - no point in a return value
6401 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6403 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6404 struct i40e_vsi_context ctxt;
6407 ctxt.seid = pf->main_vsi_seid;
6408 ctxt.pf_num = pf->hw.pf_id;
6410 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6412 dev_info(&pf->pdev->dev,
6413 "couldn't get PF vsi config, err %s aq_err %s\n",
6414 i40e_stat_str(&pf->hw, ret),
6415 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6418 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6419 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6420 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6422 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6424 dev_info(&pf->pdev->dev,
6425 "update vsi switch failed, err %s aq_err %s\n",
6426 i40e_stat_str(&pf->hw, ret),
6427 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6432 * i40e_config_bridge_mode - Configure the HW bridge mode
6433 * @veb: pointer to the bridge instance
6435 * Configure the loop back mode for the LAN VSI that is downlink to the
6436 * specified HW bridge instance. It is expected this function is called
6437 * when a new HW bridge is instantiated.
6439 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6441 struct i40e_pf *pf = veb->pf;
6443 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6444 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6445 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6446 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6447 i40e_disable_pf_switch_lb(pf);
6449 i40e_enable_pf_switch_lb(pf);
6453 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6454 * @veb: pointer to the VEB instance
6456 * This is a recursive function that first builds the attached VSIs then
6457 * recurses in to build the next layer of VEB. We track the connections
6458 * through our own index numbers because the seid's from the HW could
6459 * change across the reset.
6461 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6463 struct i40e_vsi *ctl_vsi = NULL;
6464 struct i40e_pf *pf = veb->pf;
6468 /* build VSI that owns this VEB, temporarily attached to base VEB */
6469 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6471 pf->vsi[v]->veb_idx == veb->idx &&
6472 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6473 ctl_vsi = pf->vsi[v];
6478 dev_info(&pf->pdev->dev,
6479 "missing owner VSI for veb_idx %d\n", veb->idx);
6481 goto end_reconstitute;
6483 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6484 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6485 ret = i40e_add_vsi(ctl_vsi);
6487 dev_info(&pf->pdev->dev,
6488 "rebuild of veb_idx %d owner VSI failed: %d\n",
6490 goto end_reconstitute;
6492 i40e_vsi_reset_stats(ctl_vsi);
6494 /* create the VEB in the switch and move the VSI onto the VEB */
6495 ret = i40e_add_veb(veb, ctl_vsi);
6497 goto end_reconstitute;
6499 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6500 veb->bridge_mode = BRIDGE_MODE_VEB;
6502 veb->bridge_mode = BRIDGE_MODE_VEPA;
6503 i40e_config_bridge_mode(veb);
6505 /* create the remaining VSIs attached to this VEB */
6506 for (v = 0; v < pf->num_alloc_vsi; v++) {
6507 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6510 if (pf->vsi[v]->veb_idx == veb->idx) {
6511 struct i40e_vsi *vsi = pf->vsi[v];
6513 vsi->uplink_seid = veb->seid;
6514 ret = i40e_add_vsi(vsi);
6516 dev_info(&pf->pdev->dev,
6517 "rebuild of vsi_idx %d failed: %d\n",
6519 goto end_reconstitute;
6521 i40e_vsi_reset_stats(vsi);
6525 /* create any VEBs attached to this VEB - RECURSION */
6526 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6527 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6528 pf->veb[veb_idx]->uplink_seid = veb->seid;
6529 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6540 * i40e_get_capabilities - get info about the HW
6541 * @pf: the PF struct
6543 static int i40e_get_capabilities(struct i40e_pf *pf)
6545 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6550 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6552 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6556 /* this loads the data into the hw struct for us */
6557 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6559 i40e_aqc_opc_list_func_capabilities,
6561 /* data loaded, buffer no longer needed */
6564 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6565 /* retry with a larger buffer */
6566 buf_len = data_size;
6567 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6568 dev_info(&pf->pdev->dev,
6569 "capability discovery failed, err %s aq_err %s\n",
6570 i40e_stat_str(&pf->hw, err),
6571 i40e_aq_str(&pf->hw,
6572 pf->hw.aq.asq_last_status));
6577 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6578 dev_info(&pf->pdev->dev,
6579 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6580 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6581 pf->hw.func_caps.num_msix_vectors,
6582 pf->hw.func_caps.num_msix_vectors_vf,
6583 pf->hw.func_caps.fd_filters_guaranteed,
6584 pf->hw.func_caps.fd_filters_best_effort,
6585 pf->hw.func_caps.num_tx_qp,
6586 pf->hw.func_caps.num_vsis);
6588 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6589 + pf->hw.func_caps.num_vfs)
6590 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6591 dev_info(&pf->pdev->dev,
6592 "got num_vsis %d, setting num_vsis to %d\n",
6593 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6594 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6600 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6603 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6604 * @pf: board private structure
6606 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6608 struct i40e_vsi *vsi;
6611 /* quick workaround for an NVM issue that leaves a critical register
6614 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6615 static const u32 hkey[] = {
6616 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6617 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6618 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6621 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6622 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6625 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6628 /* find existing VSI and see if it needs configuring */
6630 for (i = 0; i < pf->num_alloc_vsi; i++) {
6631 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6637 /* create a new VSI if none exists */
6639 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6640 pf->vsi[pf->lan_vsi]->seid, 0);
6642 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6643 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6648 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6652 * i40e_fdir_teardown - release the Flow Director resources
6653 * @pf: board private structure
6655 static void i40e_fdir_teardown(struct i40e_pf *pf)
6659 i40e_fdir_filter_exit(pf);
6660 for (i = 0; i < pf->num_alloc_vsi; i++) {
6661 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6662 i40e_vsi_release(pf->vsi[i]);
6669 * i40e_prep_for_reset - prep for the core to reset
6670 * @pf: board private structure
6672 * Close up the VFs and other things in prep for PF Reset.
6674 static void i40e_prep_for_reset(struct i40e_pf *pf)
6676 struct i40e_hw *hw = &pf->hw;
6677 i40e_status ret = 0;
6680 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6681 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6684 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6686 /* quiesce the VSIs and their queues that are not already DOWN */
6687 i40e_pf_quiesce_all_vsi(pf);
6689 for (v = 0; v < pf->num_alloc_vsi; v++) {
6691 pf->vsi[v]->seid = 0;
6694 i40e_shutdown_adminq(&pf->hw);
6696 /* call shutdown HMC */
6697 if (hw->hmc.hmc_obj) {
6698 ret = i40e_shutdown_lan_hmc(hw);
6700 dev_warn(&pf->pdev->dev,
6701 "shutdown_lan_hmc failed: %d\n", ret);
6706 * i40e_send_version - update firmware with driver version
6709 static void i40e_send_version(struct i40e_pf *pf)
6711 struct i40e_driver_version dv;
6713 dv.major_version = DRV_VERSION_MAJOR;
6714 dv.minor_version = DRV_VERSION_MINOR;
6715 dv.build_version = DRV_VERSION_BUILD;
6716 dv.subbuild_version = 0;
6717 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6718 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6722 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6723 * @pf: board private structure
6724 * @reinit: if the Main VSI needs to re-initialized.
6726 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6728 struct i40e_hw *hw = &pf->hw;
6729 u8 set_fc_aq_fail = 0;
6734 /* Now we wait for GRST to settle out.
6735 * We don't have to delete the VEBs or VSIs from the hw switch
6736 * because the reset will make them disappear.
6738 ret = i40e_pf_reset(hw);
6740 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6741 set_bit(__I40E_RESET_FAILED, &pf->state);
6742 goto clear_recovery;
6746 if (test_bit(__I40E_DOWN, &pf->state))
6747 goto clear_recovery;
6748 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6750 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6751 ret = i40e_init_adminq(&pf->hw);
6753 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6754 i40e_stat_str(&pf->hw, ret),
6755 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6756 goto clear_recovery;
6759 /* re-verify the eeprom if we just had an EMP reset */
6760 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6761 i40e_verify_eeprom(pf);
6763 i40e_clear_pxe_mode(hw);
6764 ret = i40e_get_capabilities(pf);
6766 goto end_core_reset;
6768 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6769 hw->func_caps.num_rx_qp,
6770 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6772 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6773 goto end_core_reset;
6775 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6777 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6778 goto end_core_reset;
6781 #ifdef CONFIG_I40E_DCB
6782 ret = i40e_init_pf_dcb(pf);
6784 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6785 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6786 /* Continue without DCB enabled */
6788 #endif /* CONFIG_I40E_DCB */
6790 i40e_init_pf_fcoe(pf);
6793 /* do basic switch setup */
6794 ret = i40e_setup_pf_switch(pf, reinit);
6796 goto end_core_reset;
6798 /* driver is only interested in link up/down and module qualification
6799 * reports from firmware
6801 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6802 I40E_AQ_EVENT_LINK_UPDOWN |
6803 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6805 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6806 i40e_stat_str(&pf->hw, ret),
6807 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6809 /* make sure our flow control settings are restored */
6810 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6812 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6813 i40e_stat_str(&pf->hw, ret),
6814 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6816 /* Rebuild the VSIs and VEBs that existed before reset.
6817 * They are still in our local switch element arrays, so only
6818 * need to rebuild the switch model in the HW.
6820 * If there were VEBs but the reconstitution failed, we'll try
6821 * try to recover minimal use by getting the basic PF VSI working.
6823 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6824 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6825 /* find the one VEB connected to the MAC, and find orphans */
6826 for (v = 0; v < I40E_MAX_VEB; v++) {
6830 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6831 pf->veb[v]->uplink_seid == 0) {
6832 ret = i40e_reconstitute_veb(pf->veb[v]);
6837 /* If Main VEB failed, we're in deep doodoo,
6838 * so give up rebuilding the switch and set up
6839 * for minimal rebuild of PF VSI.
6840 * If orphan failed, we'll report the error
6841 * but try to keep going.
6843 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6844 dev_info(&pf->pdev->dev,
6845 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6847 pf->vsi[pf->lan_vsi]->uplink_seid
6850 } else if (pf->veb[v]->uplink_seid == 0) {
6851 dev_info(&pf->pdev->dev,
6852 "rebuild of orphan VEB failed: %d\n",
6859 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6860 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6861 /* no VEB, so rebuild only the Main VSI */
6862 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6864 dev_info(&pf->pdev->dev,
6865 "rebuild of Main VSI failed: %d\n", ret);
6866 goto end_core_reset;
6870 /* Reconfigure hardware for allowing smaller MSS in the case
6871 * of TSO, so that we avoid the MDD being fired and causing
6872 * a reset in the case of small MSS+TSO.
6874 #define I40E_REG_MSS 0x000E64DC
6875 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6876 #define I40E_64BYTE_MSS 0x400000
6877 val = rd32(hw, I40E_REG_MSS);
6878 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6879 val &= ~I40E_REG_MSS_MIN_MASK;
6880 val |= I40E_64BYTE_MSS;
6881 wr32(hw, I40E_REG_MSS, val);
6884 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6885 (pf->hw.aq.fw_maj_ver < 4)) {
6887 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6889 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6890 i40e_stat_str(&pf->hw, ret),
6891 i40e_aq_str(&pf->hw,
6892 pf->hw.aq.asq_last_status));
6894 /* reinit the misc interrupt */
6895 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6896 ret = i40e_setup_misc_vector(pf);
6898 /* Add a filter to drop all Flow control frames from any VSI from being
6899 * transmitted. By doing so we stop a malicious VF from sending out
6900 * PAUSE or PFC frames and potentially controlling traffic for other
6902 * The FW can still send Flow control frames if enabled.
6904 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6907 /* restart the VSIs that were rebuilt and running before the reset */
6908 i40e_pf_unquiesce_all_vsi(pf);
6910 if (pf->num_alloc_vfs) {
6911 for (v = 0; v < pf->num_alloc_vfs; v++)
6912 i40e_reset_vf(&pf->vf[v], true);
6915 /* tell the firmware that we're starting */
6916 i40e_send_version(pf);
6919 clear_bit(__I40E_RESET_FAILED, &pf->state);
6921 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6925 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6926 * @pf: board private structure
6928 * Close up the VFs and other things in prep for a Core Reset,
6929 * then get ready to rebuild the world.
6931 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6933 i40e_prep_for_reset(pf);
6934 i40e_reset_and_rebuild(pf, false);
6938 * i40e_handle_mdd_event
6939 * @pf: pointer to the PF structure
6941 * Called from the MDD irq handler to identify possibly malicious vfs
6943 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6945 struct i40e_hw *hw = &pf->hw;
6946 bool mdd_detected = false;
6947 bool pf_mdd_detected = false;
6952 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6955 /* find what triggered the MDD event */
6956 reg = rd32(hw, I40E_GL_MDET_TX);
6957 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6958 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6959 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6960 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6961 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6962 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6963 I40E_GL_MDET_TX_EVENT_SHIFT;
6964 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6965 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6966 pf->hw.func_caps.base_queue;
6967 if (netif_msg_tx_err(pf))
6968 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6969 event, queue, pf_num, vf_num);
6970 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6971 mdd_detected = true;
6973 reg = rd32(hw, I40E_GL_MDET_RX);
6974 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6975 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6976 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6977 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6978 I40E_GL_MDET_RX_EVENT_SHIFT;
6979 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6980 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6981 pf->hw.func_caps.base_queue;
6982 if (netif_msg_rx_err(pf))
6983 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6984 event, queue, func);
6985 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6986 mdd_detected = true;
6990 reg = rd32(hw, I40E_PF_MDET_TX);
6991 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6992 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6993 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6994 pf_mdd_detected = true;
6996 reg = rd32(hw, I40E_PF_MDET_RX);
6997 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6998 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6999 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7000 pf_mdd_detected = true;
7002 /* Queue belongs to the PF, initiate a reset */
7003 if (pf_mdd_detected) {
7004 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7005 i40e_service_event_schedule(pf);
7009 /* see if one of the VFs needs its hand slapped */
7010 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7012 reg = rd32(hw, I40E_VP_MDET_TX(i));
7013 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7014 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7015 vf->num_mdd_events++;
7016 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7020 reg = rd32(hw, I40E_VP_MDET_RX(i));
7021 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7022 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7023 vf->num_mdd_events++;
7024 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7028 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7029 dev_info(&pf->pdev->dev,
7030 "Too many MDD events on VF %d, disabled\n", i);
7031 dev_info(&pf->pdev->dev,
7032 "Use PF Control I/F to re-enable the VF\n");
7033 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7037 /* re-enable mdd interrupt cause */
7038 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7039 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7040 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7041 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7046 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7047 * @pf: board private structure
7049 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7051 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7052 struct i40e_hw *hw = &pf->hw;
7057 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7060 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7062 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7063 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7064 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7065 port = pf->udp_ports[i].index;
7067 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7068 pf->udp_ports[i].type,
7071 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7074 dev_info(&pf->pdev->dev,
7075 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7076 port ? "add" : "delete",
7078 i40e_stat_str(&pf->hw, ret),
7079 i40e_aq_str(&pf->hw,
7080 pf->hw.aq.asq_last_status));
7081 pf->udp_ports[i].index = 0;
7089 * i40e_service_task - Run the driver's async subtasks
7090 * @work: pointer to work_struct containing our data
7092 static void i40e_service_task(struct work_struct *work)
7094 struct i40e_pf *pf = container_of(work,
7097 unsigned long start_time = jiffies;
7099 /* don't bother with service tasks if a reset is in progress */
7100 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7101 i40e_service_event_complete(pf);
7105 i40e_detect_recover_hung(pf);
7106 i40e_reset_subtask(pf);
7107 i40e_handle_mdd_event(pf);
7108 i40e_vc_process_vflr_event(pf);
7109 i40e_watchdog_subtask(pf);
7110 i40e_fdir_reinit_subtask(pf);
7111 i40e_sync_filters_subtask(pf);
7112 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7113 i40e_sync_udp_filters_subtask(pf);
7115 i40e_clean_adminq_subtask(pf);
7117 i40e_service_event_complete(pf);
7119 /* If the tasks have taken longer than one timer cycle or there
7120 * is more work to be done, reschedule the service task now
7121 * rather than wait for the timer to tick again.
7123 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7124 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7125 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7126 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7127 i40e_service_event_schedule(pf);
7131 * i40e_service_timer - timer callback
7132 * @data: pointer to PF struct
7134 static void i40e_service_timer(unsigned long data)
7136 struct i40e_pf *pf = (struct i40e_pf *)data;
7138 mod_timer(&pf->service_timer,
7139 round_jiffies(jiffies + pf->service_timer_period));
7140 i40e_service_event_schedule(pf);
7144 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7145 * @vsi: the VSI being configured
7147 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7149 struct i40e_pf *pf = vsi->back;
7151 switch (vsi->type) {
7153 vsi->alloc_queue_pairs = pf->num_lan_qps;
7154 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7155 I40E_REQ_DESCRIPTOR_MULTIPLE);
7156 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7157 vsi->num_q_vectors = pf->num_lan_msix;
7159 vsi->num_q_vectors = 1;
7164 vsi->alloc_queue_pairs = 1;
7165 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7166 I40E_REQ_DESCRIPTOR_MULTIPLE);
7167 vsi->num_q_vectors = 1;
7170 case I40E_VSI_VMDQ2:
7171 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7172 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7173 I40E_REQ_DESCRIPTOR_MULTIPLE);
7174 vsi->num_q_vectors = pf->num_vmdq_msix;
7177 case I40E_VSI_SRIOV:
7178 vsi->alloc_queue_pairs = pf->num_vf_qps;
7179 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7180 I40E_REQ_DESCRIPTOR_MULTIPLE);
7185 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7186 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7187 I40E_REQ_DESCRIPTOR_MULTIPLE);
7188 vsi->num_q_vectors = pf->num_fcoe_msix;
7191 #endif /* I40E_FCOE */
7201 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7202 * @type: VSI pointer
7203 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7205 * On error: returns error code (negative)
7206 * On success: returns 0
7208 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7213 /* allocate memory for both Tx and Rx ring pointers */
7214 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7215 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7218 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7220 if (alloc_qvectors) {
7221 /* allocate memory for q_vector pointers */
7222 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7223 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7224 if (!vsi->q_vectors) {
7232 kfree(vsi->tx_rings);
7237 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7238 * @pf: board private structure
7239 * @type: type of VSI
7241 * On error: returns error code (negative)
7242 * On success: returns vsi index in PF (positive)
7244 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7247 struct i40e_vsi *vsi;
7251 /* Need to protect the allocation of the VSIs at the PF level */
7252 mutex_lock(&pf->switch_mutex);
7254 /* VSI list may be fragmented if VSI creation/destruction has
7255 * been happening. We can afford to do a quick scan to look
7256 * for any free VSIs in the list.
7258 * find next empty vsi slot, looping back around if necessary
7261 while (i < pf->num_alloc_vsi && pf->vsi[i])
7263 if (i >= pf->num_alloc_vsi) {
7265 while (i < pf->next_vsi && pf->vsi[i])
7269 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7270 vsi_idx = i; /* Found one! */
7273 goto unlock_pf; /* out of VSI slots! */
7277 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7284 set_bit(__I40E_DOWN, &vsi->state);
7287 vsi->rx_itr_setting = pf->rx_itr_default;
7288 vsi->tx_itr_setting = pf->tx_itr_default;
7289 vsi->int_rate_limit = 0;
7290 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7291 pf->rss_table_size : 64;
7292 vsi->netdev_registered = false;
7293 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7294 INIT_LIST_HEAD(&vsi->mac_filter_list);
7295 vsi->irqs_ready = false;
7297 ret = i40e_set_num_rings_in_vsi(vsi);
7301 ret = i40e_vsi_alloc_arrays(vsi, true);
7305 /* Setup default MSIX irq handler for VSI */
7306 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7308 /* Initialize VSI lock */
7309 spin_lock_init(&vsi->mac_filter_list_lock);
7310 pf->vsi[vsi_idx] = vsi;
7315 pf->next_vsi = i - 1;
7318 mutex_unlock(&pf->switch_mutex);
7323 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7324 * @type: VSI pointer
7325 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7327 * On error: returns error code (negative)
7328 * On success: returns 0
7330 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7332 /* free the ring and vector containers */
7333 if (free_qvectors) {
7334 kfree(vsi->q_vectors);
7335 vsi->q_vectors = NULL;
7337 kfree(vsi->tx_rings);
7338 vsi->tx_rings = NULL;
7339 vsi->rx_rings = NULL;
7343 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7345 * @vsi: Pointer to VSI structure
7347 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7352 kfree(vsi->rss_hkey_user);
7353 vsi->rss_hkey_user = NULL;
7355 kfree(vsi->rss_lut_user);
7356 vsi->rss_lut_user = NULL;
7360 * i40e_vsi_clear - Deallocate the VSI provided
7361 * @vsi: the VSI being un-configured
7363 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7374 mutex_lock(&pf->switch_mutex);
7375 if (!pf->vsi[vsi->idx]) {
7376 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7377 vsi->idx, vsi->idx, vsi, vsi->type);
7381 if (pf->vsi[vsi->idx] != vsi) {
7382 dev_err(&pf->pdev->dev,
7383 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7384 pf->vsi[vsi->idx]->idx,
7386 pf->vsi[vsi->idx]->type,
7387 vsi->idx, vsi, vsi->type);
7391 /* updates the PF for this cleared vsi */
7392 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7393 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7395 i40e_vsi_free_arrays(vsi, true);
7396 i40e_clear_rss_config_user(vsi);
7398 pf->vsi[vsi->idx] = NULL;
7399 if (vsi->idx < pf->next_vsi)
7400 pf->next_vsi = vsi->idx;
7403 mutex_unlock(&pf->switch_mutex);
7411 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7412 * @vsi: the VSI being cleaned
7414 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7418 if (vsi->tx_rings && vsi->tx_rings[0]) {
7419 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7420 kfree_rcu(vsi->tx_rings[i], rcu);
7421 vsi->tx_rings[i] = NULL;
7422 vsi->rx_rings[i] = NULL;
7428 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7429 * @vsi: the VSI being configured
7431 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7433 struct i40e_ring *tx_ring, *rx_ring;
7434 struct i40e_pf *pf = vsi->back;
7437 /* Set basic values in the rings to be used later during open() */
7438 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7439 /* allocate space for both Tx and Rx in one shot */
7440 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7444 tx_ring->queue_index = i;
7445 tx_ring->reg_idx = vsi->base_queue + i;
7446 tx_ring->ring_active = false;
7448 tx_ring->netdev = vsi->netdev;
7449 tx_ring->dev = &pf->pdev->dev;
7450 tx_ring->count = vsi->num_desc;
7452 tx_ring->dcb_tc = 0;
7453 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7454 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7455 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7456 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7457 vsi->tx_rings[i] = tx_ring;
7459 rx_ring = &tx_ring[1];
7460 rx_ring->queue_index = i;
7461 rx_ring->reg_idx = vsi->base_queue + i;
7462 rx_ring->ring_active = false;
7464 rx_ring->netdev = vsi->netdev;
7465 rx_ring->dev = &pf->pdev->dev;
7466 rx_ring->count = vsi->num_desc;
7468 rx_ring->dcb_tc = 0;
7469 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7470 set_ring_16byte_desc_enabled(rx_ring);
7472 clear_ring_16byte_desc_enabled(rx_ring);
7473 vsi->rx_rings[i] = rx_ring;
7479 i40e_vsi_clear_rings(vsi);
7484 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7485 * @pf: board private structure
7486 * @vectors: the number of MSI-X vectors to request
7488 * Returns the number of vectors reserved, or error
7490 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7492 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7493 I40E_MIN_MSIX, vectors);
7495 dev_info(&pf->pdev->dev,
7496 "MSI-X vector reservation failed: %d\n", vectors);
7504 * i40e_init_msix - Setup the MSIX capability
7505 * @pf: board private structure
7507 * Work with the OS to set up the MSIX vectors needed.
7509 * Returns the number of vectors reserved or negative on failure
7511 static int i40e_init_msix(struct i40e_pf *pf)
7513 struct i40e_hw *hw = &pf->hw;
7518 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7521 /* The number of vectors we'll request will be comprised of:
7522 * - Add 1 for "other" cause for Admin Queue events, etc.
7523 * - The number of LAN queue pairs
7524 * - Queues being used for RSS.
7525 * We don't need as many as max_rss_size vectors.
7526 * use rss_size instead in the calculation since that
7527 * is governed by number of cpus in the system.
7528 * - assumes symmetric Tx/Rx pairing
7529 * - The number of VMDq pairs
7531 * - The number of FCOE qps.
7533 * Once we count this up, try the request.
7535 * If we can't get what we want, we'll simplify to nearly nothing
7536 * and try again. If that still fails, we punt.
7538 vectors_left = hw->func_caps.num_msix_vectors;
7541 /* reserve one vector for miscellaneous handler */
7547 /* reserve vectors for the main PF traffic queues */
7548 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7549 vectors_left -= pf->num_lan_msix;
7550 v_budget += pf->num_lan_msix;
7552 /* reserve one vector for sideband flow director */
7553 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7558 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7563 /* can we reserve enough for FCoE? */
7564 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7566 pf->num_fcoe_msix = 0;
7567 else if (vectors_left >= pf->num_fcoe_qps)
7568 pf->num_fcoe_msix = pf->num_fcoe_qps;
7570 pf->num_fcoe_msix = 1;
7571 v_budget += pf->num_fcoe_msix;
7572 vectors_left -= pf->num_fcoe_msix;
7576 /* any vectors left over go for VMDq support */
7577 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7578 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7579 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7581 /* if we're short on vectors for what's desired, we limit
7582 * the queues per vmdq. If this is still more than are
7583 * available, the user will need to change the number of
7584 * queues/vectors used by the PF later with the ethtool
7587 if (vmdq_vecs < vmdq_vecs_wanted)
7588 pf->num_vmdq_qps = 1;
7589 pf->num_vmdq_msix = pf->num_vmdq_qps;
7591 v_budget += vmdq_vecs;
7592 vectors_left -= vmdq_vecs;
7595 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7597 if (!pf->msix_entries)
7600 for (i = 0; i < v_budget; i++)
7601 pf->msix_entries[i].entry = i;
7602 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7604 if (v_actual != v_budget) {
7605 /* If we have limited resources, we will start with no vectors
7606 * for the special features and then allocate vectors to some
7607 * of these features based on the policy and at the end disable
7608 * the features that did not get any vectors.
7611 pf->num_fcoe_qps = 0;
7612 pf->num_fcoe_msix = 0;
7614 pf->num_vmdq_msix = 0;
7617 if (v_actual < I40E_MIN_MSIX) {
7618 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7619 kfree(pf->msix_entries);
7620 pf->msix_entries = NULL;
7623 } else if (v_actual == I40E_MIN_MSIX) {
7624 /* Adjust for minimal MSIX use */
7625 pf->num_vmdq_vsis = 0;
7626 pf->num_vmdq_qps = 0;
7627 pf->num_lan_qps = 1;
7628 pf->num_lan_msix = 1;
7630 } else if (v_actual != v_budget) {
7633 /* reserve the misc vector */
7636 /* Scale vector usage down */
7637 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7638 pf->num_vmdq_vsis = 1;
7639 pf->num_vmdq_qps = 1;
7640 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7642 /* partition out the remaining vectors */
7645 pf->num_lan_msix = 1;
7649 /* give one vector to FCoE */
7650 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7651 pf->num_lan_msix = 1;
7652 pf->num_fcoe_msix = 1;
7655 pf->num_lan_msix = 2;
7660 /* give one vector to FCoE */
7661 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7662 pf->num_fcoe_msix = 1;
7666 /* give the rest to the PF */
7667 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7672 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7673 (pf->num_vmdq_msix == 0)) {
7674 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7675 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7679 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7680 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7681 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7688 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7689 * @vsi: the VSI being configured
7690 * @v_idx: index of the vector in the vsi struct
7692 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7694 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7696 struct i40e_q_vector *q_vector;
7698 /* allocate q_vector */
7699 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7703 q_vector->vsi = vsi;
7704 q_vector->v_idx = v_idx;
7705 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7707 netif_napi_add(vsi->netdev, &q_vector->napi,
7708 i40e_napi_poll, NAPI_POLL_WEIGHT);
7710 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7711 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7713 /* tie q_vector and vsi together */
7714 vsi->q_vectors[v_idx] = q_vector;
7720 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7721 * @vsi: the VSI being configured
7723 * We allocate one q_vector per queue interrupt. If allocation fails we
7726 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7728 struct i40e_pf *pf = vsi->back;
7729 int v_idx, num_q_vectors;
7732 /* if not MSIX, give the one vector only to the LAN VSI */
7733 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7734 num_q_vectors = vsi->num_q_vectors;
7735 else if (vsi == pf->vsi[pf->lan_vsi])
7740 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7741 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7750 i40e_free_q_vector(vsi, v_idx);
7756 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7757 * @pf: board private structure to initialize
7759 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7764 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7765 vectors = i40e_init_msix(pf);
7767 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7769 I40E_FLAG_FCOE_ENABLED |
7771 I40E_FLAG_RSS_ENABLED |
7772 I40E_FLAG_DCB_CAPABLE |
7773 I40E_FLAG_SRIOV_ENABLED |
7774 I40E_FLAG_FD_SB_ENABLED |
7775 I40E_FLAG_FD_ATR_ENABLED |
7776 I40E_FLAG_VMDQ_ENABLED);
7778 /* rework the queue expectations without MSIX */
7779 i40e_determine_queue_usage(pf);
7783 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7784 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7785 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7786 vectors = pci_enable_msi(pf->pdev);
7788 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7790 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7792 vectors = 1; /* one MSI or Legacy vector */
7795 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7796 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7798 /* set up vector assignment tracking */
7799 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7800 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7801 if (!pf->irq_pile) {
7802 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7805 pf->irq_pile->num_entries = vectors;
7806 pf->irq_pile->search_hint = 0;
7808 /* track first vector for misc interrupts, ignore return */
7809 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7815 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7816 * @pf: board private structure
7818 * This sets up the handler for MSIX 0, which is used to manage the
7819 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7820 * when in MSI or Legacy interrupt mode.
7822 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7824 struct i40e_hw *hw = &pf->hw;
7827 /* Only request the irq if this is the first time through, and
7828 * not when we're rebuilding after a Reset
7830 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7831 err = request_irq(pf->msix_entries[0].vector,
7832 i40e_intr, 0, pf->int_name, pf);
7834 dev_info(&pf->pdev->dev,
7835 "request_irq for %s failed: %d\n",
7841 i40e_enable_misc_int_causes(pf);
7843 /* associate no queues to the misc vector */
7844 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7845 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7849 i40e_irq_dynamic_enable_icr0(pf);
7855 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7856 * @vsi: vsi structure
7857 * @seed: RSS hash seed
7859 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7860 u8 *lut, u16 lut_size)
7862 struct i40e_aqc_get_set_rss_key_data rss_key;
7863 struct i40e_pf *pf = vsi->back;
7864 struct i40e_hw *hw = &pf->hw;
7865 bool pf_lut = false;
7869 memset(&rss_key, 0, sizeof(rss_key));
7870 memcpy(&rss_key, seed, sizeof(rss_key));
7872 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7876 /* Populate the LUT with max no. of queues in round robin fashion */
7877 for (i = 0; i < vsi->rss_table_size; i++)
7878 rss_lut[i] = i % vsi->rss_size;
7880 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7882 dev_info(&pf->pdev->dev,
7883 "Cannot set RSS key, err %s aq_err %s\n",
7884 i40e_stat_str(&pf->hw, ret),
7885 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7886 goto config_rss_aq_out;
7889 if (vsi->type == I40E_VSI_MAIN)
7892 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7893 vsi->rss_table_size);
7895 dev_info(&pf->pdev->dev,
7896 "Cannot set RSS lut, err %s aq_err %s\n",
7897 i40e_stat_str(&pf->hw, ret),
7898 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7906 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7907 * @vsi: VSI structure
7909 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7911 u8 seed[I40E_HKEY_ARRAY_SIZE];
7912 struct i40e_pf *pf = vsi->back;
7916 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7919 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7923 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7924 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7925 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7926 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7933 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7934 * @vsi: Pointer to vsi structure
7935 * @seed: RSS hash seed
7936 * @lut: Lookup table
7937 * @lut_size: Lookup table size
7939 * Returns 0 on success, negative on failure
7941 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7942 const u8 *lut, u16 lut_size)
7944 struct i40e_pf *pf = vsi->back;
7945 struct i40e_hw *hw = &pf->hw;
7948 /* Fill out hash function seed */
7950 u32 *seed_dw = (u32 *)seed;
7952 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7953 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7957 u32 *lut_dw = (u32 *)lut;
7959 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7962 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7963 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
7971 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
7972 * @vsi: Pointer to VSI structure
7973 * @seed: Buffer to store the keys
7974 * @lut: Buffer to store the lookup table entries
7975 * @lut_size: Size of buffer to store the lookup table entries
7977 * Returns 0 on success, negative on failure
7979 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
7980 u8 *lut, u16 lut_size)
7982 struct i40e_pf *pf = vsi->back;
7983 struct i40e_hw *hw = &pf->hw;
7987 u32 *seed_dw = (u32 *)seed;
7989 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7990 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
7993 u32 *lut_dw = (u32 *)lut;
7995 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7997 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7998 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8005 * i40e_config_rss - Configure RSS keys and lut
8006 * @vsi: Pointer to VSI structure
8007 * @seed: RSS hash seed
8008 * @lut: Lookup table
8009 * @lut_size: Lookup table size
8011 * Returns 0 on success, negative on failure
8013 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8015 struct i40e_pf *pf = vsi->back;
8017 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8018 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8020 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8024 * i40e_get_rss - Get RSS keys and lut
8025 * @vsi: Pointer to VSI structure
8026 * @seed: Buffer to store the keys
8027 * @lut: Buffer to store the lookup table entries
8028 * lut_size: Size of buffer to store the lookup table entries
8030 * Returns 0 on success, negative on failure
8032 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8034 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8038 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8039 * @pf: Pointer to board private structure
8040 * @lut: Lookup table
8041 * @rss_table_size: Lookup table size
8042 * @rss_size: Range of queue number for hashing
8044 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8045 u16 rss_table_size, u16 rss_size)
8049 for (i = 0; i < rss_table_size; i++)
8050 lut[i] = i % rss_size;
8054 * i40e_pf_config_rss - Prepare for RSS if used
8055 * @pf: board private structure
8057 static int i40e_pf_config_rss(struct i40e_pf *pf)
8059 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8060 u8 seed[I40E_HKEY_ARRAY_SIZE];
8062 struct i40e_hw *hw = &pf->hw;
8067 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8068 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8069 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8070 hena |= i40e_pf_get_default_rss_hena(pf);
8072 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8073 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8075 /* Determine the RSS table size based on the hardware capabilities */
8076 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8077 reg_val = (pf->rss_table_size == 512) ?
8078 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8079 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8080 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8082 /* Determine the RSS size of the VSI */
8084 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8085 vsi->num_queue_pairs);
8087 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8091 /* Use user configured lut if there is one, otherwise use default */
8092 if (vsi->rss_lut_user)
8093 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8095 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8097 /* Use user configured hash key if there is one, otherwise
8100 if (vsi->rss_hkey_user)
8101 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8103 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8104 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8111 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8112 * @pf: board private structure
8113 * @queue_count: the requested queue count for rss.
8115 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8116 * count which may be different from the requested queue count.
8118 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8120 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8123 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8126 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8128 if (queue_count != vsi->num_queue_pairs) {
8129 vsi->req_queue_pairs = queue_count;
8130 i40e_prep_for_reset(pf);
8132 pf->alloc_rss_size = new_rss_size;
8134 i40e_reset_and_rebuild(pf, true);
8136 /* Discard the user configured hash keys and lut, if less
8137 * queues are enabled.
8139 if (queue_count < vsi->rss_size) {
8140 i40e_clear_rss_config_user(vsi);
8141 dev_dbg(&pf->pdev->dev,
8142 "discard user configured hash keys and lut\n");
8145 /* Reset vsi->rss_size, as number of enabled queues changed */
8146 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8147 vsi->num_queue_pairs);
8149 i40e_pf_config_rss(pf);
8151 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8152 pf->alloc_rss_size, pf->rss_size_max);
8153 return pf->alloc_rss_size;
8157 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8158 * @pf: board private structure
8160 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8163 bool min_valid, max_valid;
8166 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8167 &min_valid, &max_valid);
8171 pf->npar_min_bw = min_bw;
8173 pf->npar_max_bw = max_bw;
8180 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8181 * @pf: board private structure
8183 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8185 struct i40e_aqc_configure_partition_bw_data bw_data;
8188 /* Set the valid bit for this PF */
8189 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8190 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8191 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8193 /* Set the new bandwidths */
8194 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8200 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8201 * @pf: board private structure
8203 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8205 /* Commit temporary BW setting to permanent NVM image */
8206 enum i40e_admin_queue_err last_aq_status;
8210 if (pf->hw.partition_id != 1) {
8211 dev_info(&pf->pdev->dev,
8212 "Commit BW only works on partition 1! This is partition %d",
8213 pf->hw.partition_id);
8214 ret = I40E_NOT_SUPPORTED;
8218 /* Acquire NVM for read access */
8219 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8220 last_aq_status = pf->hw.aq.asq_last_status;
8222 dev_info(&pf->pdev->dev,
8223 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8224 i40e_stat_str(&pf->hw, ret),
8225 i40e_aq_str(&pf->hw, last_aq_status));
8229 /* Read word 0x10 of NVM - SW compatibility word 1 */
8230 ret = i40e_aq_read_nvm(&pf->hw,
8231 I40E_SR_NVM_CONTROL_WORD,
8232 0x10, sizeof(nvm_word), &nvm_word,
8234 /* Save off last admin queue command status before releasing
8237 last_aq_status = pf->hw.aq.asq_last_status;
8238 i40e_release_nvm(&pf->hw);
8240 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8241 i40e_stat_str(&pf->hw, ret),
8242 i40e_aq_str(&pf->hw, last_aq_status));
8246 /* Wait a bit for NVM release to complete */
8249 /* Acquire NVM for write access */
8250 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8251 last_aq_status = pf->hw.aq.asq_last_status;
8253 dev_info(&pf->pdev->dev,
8254 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8255 i40e_stat_str(&pf->hw, ret),
8256 i40e_aq_str(&pf->hw, last_aq_status));
8259 /* Write it back out unchanged to initiate update NVM,
8260 * which will force a write of the shadow (alt) RAM to
8261 * the NVM - thus storing the bandwidth values permanently.
8263 ret = i40e_aq_update_nvm(&pf->hw,
8264 I40E_SR_NVM_CONTROL_WORD,
8265 0x10, sizeof(nvm_word),
8266 &nvm_word, true, NULL);
8267 /* Save off last admin queue command status before releasing
8270 last_aq_status = pf->hw.aq.asq_last_status;
8271 i40e_release_nvm(&pf->hw);
8273 dev_info(&pf->pdev->dev,
8274 "BW settings NOT SAVED, err %s aq_err %s\n",
8275 i40e_stat_str(&pf->hw, ret),
8276 i40e_aq_str(&pf->hw, last_aq_status));
8283 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8284 * @pf: board private structure to initialize
8286 * i40e_sw_init initializes the Adapter private data structure.
8287 * Fields are initialized based on PCI device information and
8288 * OS network device settings (MTU size).
8290 static int i40e_sw_init(struct i40e_pf *pf)
8295 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8296 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8297 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8298 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8299 if (I40E_DEBUG_USER & debug)
8300 pf->hw.debug_mask = debug;
8301 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8302 I40E_DEFAULT_MSG_ENABLE);
8305 /* Set default capability flags */
8306 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8307 I40E_FLAG_MSI_ENABLED |
8308 I40E_FLAG_LINK_POLLING_ENABLED |
8309 I40E_FLAG_MSIX_ENABLED;
8311 if (iommu_present(&pci_bus_type))
8312 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8314 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8316 /* Set default ITR */
8317 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8318 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8320 /* Depending on PF configurations, it is possible that the RSS
8321 * maximum might end up larger than the available queues
8323 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8324 pf->alloc_rss_size = 1;
8325 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8326 pf->rss_size_max = min_t(int, pf->rss_size_max,
8327 pf->hw.func_caps.num_tx_qp);
8328 if (pf->hw.func_caps.rss) {
8329 pf->flags |= I40E_FLAG_RSS_ENABLED;
8330 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8334 /* MFP mode enabled */
8335 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8336 pf->flags |= I40E_FLAG_MFP_ENABLED;
8337 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8338 if (i40e_get_npar_bw_setting(pf))
8339 dev_warn(&pf->pdev->dev,
8340 "Could not get NPAR bw settings\n");
8342 dev_info(&pf->pdev->dev,
8343 "Min BW = %8.8x, Max BW = %8.8x\n",
8344 pf->npar_min_bw, pf->npar_max_bw);
8347 /* FW/NVM is not yet fixed in this regard */
8348 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8349 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8350 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8351 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8352 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8353 pf->hw.num_partitions > 1)
8354 dev_info(&pf->pdev->dev,
8355 "Flow Director Sideband mode Disabled in MFP mode\n");
8357 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8358 pf->fdir_pf_filter_count =
8359 pf->hw.func_caps.fd_filters_guaranteed;
8360 pf->hw.fdir_shared_filter_count =
8361 pf->hw.func_caps.fd_filters_best_effort;
8364 if (pf->hw.func_caps.vmdq) {
8365 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8366 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8367 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8371 i40e_init_pf_fcoe(pf);
8373 #endif /* I40E_FCOE */
8374 #ifdef CONFIG_PCI_IOV
8375 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8376 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8377 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8378 pf->num_req_vfs = min_t(int,
8379 pf->hw.func_caps.num_vfs,
8382 #endif /* CONFIG_PCI_IOV */
8383 if (pf->hw.mac.type == I40E_MAC_X722) {
8384 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8385 I40E_FLAG_128_QP_RSS_CAPABLE |
8386 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8387 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8388 I40E_FLAG_WB_ON_ITR_CAPABLE |
8389 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8390 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8392 pf->eeprom_version = 0xDEAD;
8393 pf->lan_veb = I40E_NO_VEB;
8394 pf->lan_vsi = I40E_NO_VSI;
8396 /* By default FW has this off for performance reasons */
8397 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8399 /* set up queue assignment tracking */
8400 size = sizeof(struct i40e_lump_tracking)
8401 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8402 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8407 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8408 pf->qp_pile->search_hint = 0;
8410 pf->tx_timeout_recovery_level = 1;
8412 mutex_init(&pf->switch_mutex);
8414 /* If NPAR is enabled nudge the Tx scheduler */
8415 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8416 i40e_set_npar_bw_setting(pf);
8423 * i40e_set_ntuple - set the ntuple feature flag and take action
8424 * @pf: board private structure to initialize
8425 * @features: the feature set that the stack is suggesting
8427 * returns a bool to indicate if reset needs to happen
8429 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8431 bool need_reset = false;
8433 /* Check if Flow Director n-tuple support was enabled or disabled. If
8434 * the state changed, we need to reset.
8436 if (features & NETIF_F_NTUPLE) {
8437 /* Enable filters and mark for reset */
8438 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8440 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8442 /* turn off filters, mark for reset and clear SW filter list */
8443 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8445 i40e_fdir_filter_exit(pf);
8447 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8448 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8449 /* reset fd counters */
8450 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8451 pf->fdir_pf_active_filters = 0;
8452 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8453 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8454 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8455 /* if ATR was auto disabled it can be re-enabled. */
8456 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8457 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8458 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8464 * i40e_set_features - set the netdev feature flags
8465 * @netdev: ptr to the netdev being adjusted
8466 * @features: the feature set that the stack is suggesting
8468 static int i40e_set_features(struct net_device *netdev,
8469 netdev_features_t features)
8471 struct i40e_netdev_priv *np = netdev_priv(netdev);
8472 struct i40e_vsi *vsi = np->vsi;
8473 struct i40e_pf *pf = vsi->back;
8476 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8477 i40e_vlan_stripping_enable(vsi);
8479 i40e_vlan_stripping_disable(vsi);
8481 need_reset = i40e_set_ntuple(pf, features);
8484 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8489 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8491 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8492 * @pf: board private structure
8493 * @port: The UDP port to look up
8495 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8497 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8501 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8502 if (pf->udp_ports[i].index == port)
8511 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8512 * @netdev: This physical port's netdev
8513 * @sa_family: Socket Family that VXLAN is notifying us about
8514 * @port: New UDP port number that VXLAN started listening to
8516 static void i40e_add_vxlan_port(struct net_device *netdev,
8517 sa_family_t sa_family, __be16 port)
8519 #if IS_ENABLED(CONFIG_VXLAN)
8520 struct i40e_netdev_priv *np = netdev_priv(netdev);
8521 struct i40e_vsi *vsi = np->vsi;
8522 struct i40e_pf *pf = vsi->back;
8526 if (sa_family == AF_INET6)
8529 idx = i40e_get_udp_port_idx(pf, port);
8531 /* Check if port already exists */
8532 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8533 netdev_info(netdev, "vxlan port %d already offloaded\n",
8538 /* Now check if there is space to add the new port */
8539 next_idx = i40e_get_udp_port_idx(pf, 0);
8541 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8542 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8547 /* New port: add it and mark its index in the bitmap */
8548 pf->udp_ports[next_idx].index = port;
8549 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8550 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8551 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8556 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8557 * @netdev: This physical port's netdev
8558 * @sa_family: Socket Family that VXLAN is notifying us about
8559 * @port: UDP port number that VXLAN stopped listening to
8561 static void i40e_del_vxlan_port(struct net_device *netdev,
8562 sa_family_t sa_family, __be16 port)
8564 #if IS_ENABLED(CONFIG_VXLAN)
8565 struct i40e_netdev_priv *np = netdev_priv(netdev);
8566 struct i40e_vsi *vsi = np->vsi;
8567 struct i40e_pf *pf = vsi->back;
8570 if (sa_family == AF_INET6)
8573 idx = i40e_get_udp_port_idx(pf, port);
8575 /* Check if port already exists */
8576 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8577 /* if port exists, set it to 0 (mark for deletion)
8578 * and make it pending
8580 pf->udp_ports[idx].index = 0;
8581 pf->pending_udp_bitmap |= BIT_ULL(idx);
8582 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8584 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8591 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8592 * @netdev: This physical port's netdev
8593 * @sa_family: Socket Family that GENEVE is notifying us about
8594 * @port: New UDP port number that GENEVE started listening to
8596 static void i40e_add_geneve_port(struct net_device *netdev,
8597 sa_family_t sa_family, __be16 port)
8599 #if IS_ENABLED(CONFIG_GENEVE)
8600 struct i40e_netdev_priv *np = netdev_priv(netdev);
8601 struct i40e_vsi *vsi = np->vsi;
8602 struct i40e_pf *pf = vsi->back;
8606 if (sa_family == AF_INET6)
8609 idx = i40e_get_udp_port_idx(pf, port);
8611 /* Check if port already exists */
8612 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8613 netdev_info(netdev, "udp port %d already offloaded\n",
8618 /* Now check if there is space to add the new port */
8619 next_idx = i40e_get_udp_port_idx(pf, 0);
8621 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8622 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8627 /* New port: add it and mark its index in the bitmap */
8628 pf->udp_ports[next_idx].index = port;
8629 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8630 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8631 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8633 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8638 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8639 * @netdev: This physical port's netdev
8640 * @sa_family: Socket Family that GENEVE is notifying us about
8641 * @port: UDP port number that GENEVE stopped listening to
8643 static void i40e_del_geneve_port(struct net_device *netdev,
8644 sa_family_t sa_family, __be16 port)
8646 #if IS_ENABLED(CONFIG_GENEVE)
8647 struct i40e_netdev_priv *np = netdev_priv(netdev);
8648 struct i40e_vsi *vsi = np->vsi;
8649 struct i40e_pf *pf = vsi->back;
8652 if (sa_family == AF_INET6)
8655 idx = i40e_get_udp_port_idx(pf, port);
8657 /* Check if port already exists */
8658 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8659 /* if port exists, set it to 0 (mark for deletion)
8660 * and make it pending
8662 pf->udp_ports[idx].index = 0;
8663 pf->pending_udp_bitmap |= BIT_ULL(idx);
8664 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8666 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8669 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8675 static int i40e_get_phys_port_id(struct net_device *netdev,
8676 struct netdev_phys_item_id *ppid)
8678 struct i40e_netdev_priv *np = netdev_priv(netdev);
8679 struct i40e_pf *pf = np->vsi->back;
8680 struct i40e_hw *hw = &pf->hw;
8682 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8685 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8686 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8692 * i40e_ndo_fdb_add - add an entry to the hardware database
8693 * @ndm: the input from the stack
8694 * @tb: pointer to array of nladdr (unused)
8695 * @dev: the net device pointer
8696 * @addr: the MAC address entry being added
8697 * @flags: instructions from stack about fdb operation
8699 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8700 struct net_device *dev,
8701 const unsigned char *addr, u16 vid,
8704 struct i40e_netdev_priv *np = netdev_priv(dev);
8705 struct i40e_pf *pf = np->vsi->back;
8708 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8712 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8716 /* Hardware does not support aging addresses so if a
8717 * ndm_state is given only allow permanent addresses
8719 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8720 netdev_info(dev, "FDB only supports static addresses\n");
8724 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8725 err = dev_uc_add_excl(dev, addr);
8726 else if (is_multicast_ether_addr(addr))
8727 err = dev_mc_add_excl(dev, addr);
8731 /* Only return duplicate errors if NLM_F_EXCL is set */
8732 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8739 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8740 * @dev: the netdev being configured
8741 * @nlh: RTNL message
8743 * Inserts a new hardware bridge if not already created and
8744 * enables the bridging mode requested (VEB or VEPA). If the
8745 * hardware bridge has already been inserted and the request
8746 * is to change the mode then that requires a PF reset to
8747 * allow rebuild of the components with required hardware
8748 * bridge mode enabled.
8750 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8751 struct nlmsghdr *nlh,
8754 struct i40e_netdev_priv *np = netdev_priv(dev);
8755 struct i40e_vsi *vsi = np->vsi;
8756 struct i40e_pf *pf = vsi->back;
8757 struct i40e_veb *veb = NULL;
8758 struct nlattr *attr, *br_spec;
8761 /* Only for PF VSI for now */
8762 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8765 /* Find the HW bridge for PF VSI */
8766 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8767 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8771 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8773 nla_for_each_nested(attr, br_spec, rem) {
8776 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8779 mode = nla_get_u16(attr);
8780 if ((mode != BRIDGE_MODE_VEPA) &&
8781 (mode != BRIDGE_MODE_VEB))
8784 /* Insert a new HW bridge */
8786 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8787 vsi->tc_config.enabled_tc);
8789 veb->bridge_mode = mode;
8790 i40e_config_bridge_mode(veb);
8792 /* No Bridge HW offload available */
8796 } else if (mode != veb->bridge_mode) {
8797 /* Existing HW bridge but different mode needs reset */
8798 veb->bridge_mode = mode;
8799 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8800 if (mode == BRIDGE_MODE_VEB)
8801 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8803 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8804 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8813 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8816 * @seq: RTNL message seq #
8817 * @dev: the netdev being configured
8818 * @filter_mask: unused
8819 * @nlflags: netlink flags passed in
8821 * Return the mode in which the hardware bridge is operating in
8824 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8825 struct net_device *dev,
8826 u32 __always_unused filter_mask,
8829 struct i40e_netdev_priv *np = netdev_priv(dev);
8830 struct i40e_vsi *vsi = np->vsi;
8831 struct i40e_pf *pf = vsi->back;
8832 struct i40e_veb *veb = NULL;
8835 /* Only for PF VSI for now */
8836 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8839 /* Find the HW bridge for the PF VSI */
8840 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8841 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8848 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8849 nlflags, 0, 0, filter_mask, NULL);
8852 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8853 * inner mac plus all inner ethertypes.
8855 #define I40E_MAX_TUNNEL_HDR_LEN 128
8857 * i40e_features_check - Validate encapsulated packet conforms to limits
8859 * @dev: This physical port's netdev
8860 * @features: Offload features that the stack believes apply
8862 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8863 struct net_device *dev,
8864 netdev_features_t features)
8866 if (skb->encapsulation &&
8867 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8868 I40E_MAX_TUNNEL_HDR_LEN))
8869 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8874 static const struct net_device_ops i40e_netdev_ops = {
8875 .ndo_open = i40e_open,
8876 .ndo_stop = i40e_close,
8877 .ndo_start_xmit = i40e_lan_xmit_frame,
8878 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8879 .ndo_set_rx_mode = i40e_set_rx_mode,
8880 .ndo_validate_addr = eth_validate_addr,
8881 .ndo_set_mac_address = i40e_set_mac,
8882 .ndo_change_mtu = i40e_change_mtu,
8883 .ndo_do_ioctl = i40e_ioctl,
8884 .ndo_tx_timeout = i40e_tx_timeout,
8885 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8886 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8887 #ifdef CONFIG_NET_POLL_CONTROLLER
8888 .ndo_poll_controller = i40e_netpoll,
8890 .ndo_setup_tc = i40e_setup_tc,
8892 .ndo_fcoe_enable = i40e_fcoe_enable,
8893 .ndo_fcoe_disable = i40e_fcoe_disable,
8895 .ndo_set_features = i40e_set_features,
8896 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8897 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8898 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8899 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8900 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8901 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8902 #if IS_ENABLED(CONFIG_VXLAN)
8903 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8904 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8906 #if IS_ENABLED(CONFIG_GENEVE)
8907 .ndo_add_geneve_port = i40e_add_geneve_port,
8908 .ndo_del_geneve_port = i40e_del_geneve_port,
8910 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8911 .ndo_fdb_add = i40e_ndo_fdb_add,
8912 .ndo_features_check = i40e_features_check,
8913 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8914 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8918 * i40e_config_netdev - Setup the netdev flags
8919 * @vsi: the VSI being configured
8921 * Returns 0 on success, negative value on failure
8923 static int i40e_config_netdev(struct i40e_vsi *vsi)
8925 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8926 struct i40e_pf *pf = vsi->back;
8927 struct i40e_hw *hw = &pf->hw;
8928 struct i40e_netdev_priv *np;
8929 struct net_device *netdev;
8930 u8 mac_addr[ETH_ALEN];
8933 etherdev_size = sizeof(struct i40e_netdev_priv);
8934 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8938 vsi->netdev = netdev;
8939 np = netdev_priv(netdev);
8942 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8944 NETIF_F_GSO_UDP_TUNNEL |
8948 netdev->features = NETIF_F_SG |
8952 NETIF_F_GSO_UDP_TUNNEL |
8954 NETIF_F_HW_VLAN_CTAG_TX |
8955 NETIF_F_HW_VLAN_CTAG_RX |
8956 NETIF_F_HW_VLAN_CTAG_FILTER |
8965 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8966 netdev->features |= NETIF_F_NTUPLE;
8968 /* copy netdev features into list of user selectable features */
8969 netdev->hw_features |= netdev->features;
8971 if (vsi->type == I40E_VSI_MAIN) {
8972 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8973 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8974 /* The following steps are necessary to prevent reception
8975 * of tagged packets - some older NVM configurations load a
8976 * default a MAC-VLAN filter that accepts any tagged packet
8977 * which must be replaced by a normal filter.
8979 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8980 spin_lock_bh(&vsi->mac_filter_list_lock);
8981 i40e_add_filter(vsi, mac_addr,
8982 I40E_VLAN_ANY, false, true);
8983 spin_unlock_bh(&vsi->mac_filter_list_lock);
8986 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8987 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8988 pf->vsi[pf->lan_vsi]->netdev->name);
8989 random_ether_addr(mac_addr);
8991 spin_lock_bh(&vsi->mac_filter_list_lock);
8992 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8993 spin_unlock_bh(&vsi->mac_filter_list_lock);
8996 spin_lock_bh(&vsi->mac_filter_list_lock);
8997 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8998 spin_unlock_bh(&vsi->mac_filter_list_lock);
9000 ether_addr_copy(netdev->dev_addr, mac_addr);
9001 ether_addr_copy(netdev->perm_addr, mac_addr);
9002 /* vlan gets same features (except vlan offload)
9003 * after any tweaks for specific VSI types
9005 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
9006 NETIF_F_HW_VLAN_CTAG_RX |
9007 NETIF_F_HW_VLAN_CTAG_FILTER);
9008 netdev->priv_flags |= IFF_UNICAST_FLT;
9009 netdev->priv_flags |= IFF_SUPP_NOFCS;
9010 /* Setup netdev TC information */
9011 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9013 netdev->netdev_ops = &i40e_netdev_ops;
9014 netdev->watchdog_timeo = 5 * HZ;
9015 i40e_set_ethtool_ops(netdev);
9017 i40e_fcoe_config_netdev(netdev, vsi);
9024 * i40e_vsi_delete - Delete a VSI from the switch
9025 * @vsi: the VSI being removed
9027 * Returns 0 on success, negative value on failure
9029 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9031 /* remove default VSI is not allowed */
9032 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9035 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9039 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9040 * @vsi: the VSI being queried
9042 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9044 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9046 struct i40e_veb *veb;
9047 struct i40e_pf *pf = vsi->back;
9049 /* Uplink is not a bridge so default to VEB */
9050 if (vsi->veb_idx == I40E_NO_VEB)
9053 veb = pf->veb[vsi->veb_idx];
9055 dev_info(&pf->pdev->dev,
9056 "There is no veb associated with the bridge\n");
9060 /* Uplink is a bridge in VEPA mode */
9061 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9064 /* Uplink is a bridge in VEB mode */
9068 /* VEPA is now default bridge, so return 0 */
9073 * i40e_add_vsi - Add a VSI to the switch
9074 * @vsi: the VSI being configured
9076 * This initializes a VSI context depending on the VSI type to be added and
9077 * passes it down to the add_vsi aq command.
9079 static int i40e_add_vsi(struct i40e_vsi *vsi)
9082 u8 laa_macaddr[ETH_ALEN];
9083 bool found_laa_mac_filter = false;
9084 struct i40e_pf *pf = vsi->back;
9085 struct i40e_hw *hw = &pf->hw;
9086 struct i40e_vsi_context ctxt;
9087 struct i40e_mac_filter *f, *ftmp;
9089 u8 enabled_tc = 0x1; /* TC0 enabled */
9092 memset(&ctxt, 0, sizeof(ctxt));
9093 switch (vsi->type) {
9095 /* The PF's main VSI is already setup as part of the
9096 * device initialization, so we'll not bother with
9097 * the add_vsi call, but we will retrieve the current
9100 ctxt.seid = pf->main_vsi_seid;
9101 ctxt.pf_num = pf->hw.pf_id;
9103 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9104 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9106 dev_info(&pf->pdev->dev,
9107 "couldn't get PF vsi config, err %s aq_err %s\n",
9108 i40e_stat_str(&pf->hw, ret),
9109 i40e_aq_str(&pf->hw,
9110 pf->hw.aq.asq_last_status));
9113 vsi->info = ctxt.info;
9114 vsi->info.valid_sections = 0;
9116 vsi->seid = ctxt.seid;
9117 vsi->id = ctxt.vsi_number;
9119 enabled_tc = i40e_pf_get_tc_map(pf);
9121 /* MFP mode setup queue map and update VSI */
9122 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9123 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9124 memset(&ctxt, 0, sizeof(ctxt));
9125 ctxt.seid = pf->main_vsi_seid;
9126 ctxt.pf_num = pf->hw.pf_id;
9128 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9129 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9131 dev_info(&pf->pdev->dev,
9132 "update vsi failed, err %s aq_err %s\n",
9133 i40e_stat_str(&pf->hw, ret),
9134 i40e_aq_str(&pf->hw,
9135 pf->hw.aq.asq_last_status));
9139 /* update the local VSI info queue map */
9140 i40e_vsi_update_queue_map(vsi, &ctxt);
9141 vsi->info.valid_sections = 0;
9143 /* Default/Main VSI is only enabled for TC0
9144 * reconfigure it to enable all TCs that are
9145 * available on the port in SFP mode.
9146 * For MFP case the iSCSI PF would use this
9147 * flow to enable LAN+iSCSI TC.
9149 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9151 dev_info(&pf->pdev->dev,
9152 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9154 i40e_stat_str(&pf->hw, ret),
9155 i40e_aq_str(&pf->hw,
9156 pf->hw.aq.asq_last_status));
9163 ctxt.pf_num = hw->pf_id;
9165 ctxt.uplink_seid = vsi->uplink_seid;
9166 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9167 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9168 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9169 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9170 ctxt.info.valid_sections |=
9171 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9172 ctxt.info.switch_id =
9173 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9175 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9178 case I40E_VSI_VMDQ2:
9179 ctxt.pf_num = hw->pf_id;
9181 ctxt.uplink_seid = vsi->uplink_seid;
9182 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9183 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9185 /* This VSI is connected to VEB so the switch_id
9186 * should be set to zero by default.
9188 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9189 ctxt.info.valid_sections |=
9190 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9191 ctxt.info.switch_id =
9192 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9195 /* Setup the VSI tx/rx queue map for TC0 only for now */
9196 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9199 case I40E_VSI_SRIOV:
9200 ctxt.pf_num = hw->pf_id;
9201 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9202 ctxt.uplink_seid = vsi->uplink_seid;
9203 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9204 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9206 /* This VSI is connected to VEB so the switch_id
9207 * should be set to zero by default.
9209 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9210 ctxt.info.valid_sections |=
9211 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9212 ctxt.info.switch_id =
9213 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9216 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9217 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9218 if (pf->vf[vsi->vf_id].spoofchk) {
9219 ctxt.info.valid_sections |=
9220 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9221 ctxt.info.sec_flags |=
9222 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9223 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9225 /* Setup the VSI tx/rx queue map for TC0 only for now */
9226 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9231 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9233 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9238 #endif /* I40E_FCOE */
9243 if (vsi->type != I40E_VSI_MAIN) {
9244 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9246 dev_info(&vsi->back->pdev->dev,
9247 "add vsi failed, err %s aq_err %s\n",
9248 i40e_stat_str(&pf->hw, ret),
9249 i40e_aq_str(&pf->hw,
9250 pf->hw.aq.asq_last_status));
9254 vsi->info = ctxt.info;
9255 vsi->info.valid_sections = 0;
9256 vsi->seid = ctxt.seid;
9257 vsi->id = ctxt.vsi_number;
9260 spin_lock_bh(&vsi->mac_filter_list_lock);
9261 /* If macvlan filters already exist, force them to get loaded */
9262 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9266 /* Expected to have only one MAC filter entry for LAA in list */
9267 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9268 ether_addr_copy(laa_macaddr, f->macaddr);
9269 found_laa_mac_filter = true;
9272 spin_unlock_bh(&vsi->mac_filter_list_lock);
9274 if (found_laa_mac_filter) {
9275 struct i40e_aqc_remove_macvlan_element_data element;
9277 memset(&element, 0, sizeof(element));
9278 ether_addr_copy(element.mac_addr, laa_macaddr);
9279 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9280 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9283 /* some older FW has a different default */
9285 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9286 i40e_aq_remove_macvlan(hw, vsi->seid,
9290 i40e_aq_mac_address_write(hw,
9291 I40E_AQC_WRITE_TYPE_LAA_WOL,
9296 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9297 pf->flags |= I40E_FLAG_FILTER_SYNC;
9300 /* Update VSI BW information */
9301 ret = i40e_vsi_get_bw_info(vsi);
9303 dev_info(&pf->pdev->dev,
9304 "couldn't get vsi bw info, err %s aq_err %s\n",
9305 i40e_stat_str(&pf->hw, ret),
9306 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9307 /* VSI is already added so not tearing that up */
9316 * i40e_vsi_release - Delete a VSI and free its resources
9317 * @vsi: the VSI being removed
9319 * Returns 0 on success or < 0 on error
9321 int i40e_vsi_release(struct i40e_vsi *vsi)
9323 struct i40e_mac_filter *f, *ftmp;
9324 struct i40e_veb *veb = NULL;
9331 /* release of a VEB-owner or last VSI is not allowed */
9332 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9333 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9334 vsi->seid, vsi->uplink_seid);
9337 if (vsi == pf->vsi[pf->lan_vsi] &&
9338 !test_bit(__I40E_DOWN, &pf->state)) {
9339 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9343 uplink_seid = vsi->uplink_seid;
9344 if (vsi->type != I40E_VSI_SRIOV) {
9345 if (vsi->netdev_registered) {
9346 vsi->netdev_registered = false;
9348 /* results in a call to i40e_close() */
9349 unregister_netdev(vsi->netdev);
9352 i40e_vsi_close(vsi);
9354 i40e_vsi_disable_irq(vsi);
9357 spin_lock_bh(&vsi->mac_filter_list_lock);
9358 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9359 i40e_del_filter(vsi, f->macaddr, f->vlan,
9360 f->is_vf, f->is_netdev);
9361 spin_unlock_bh(&vsi->mac_filter_list_lock);
9363 i40e_sync_vsi_filters(vsi);
9365 i40e_vsi_delete(vsi);
9366 i40e_vsi_free_q_vectors(vsi);
9368 free_netdev(vsi->netdev);
9371 i40e_vsi_clear_rings(vsi);
9372 i40e_vsi_clear(vsi);
9374 /* If this was the last thing on the VEB, except for the
9375 * controlling VSI, remove the VEB, which puts the controlling
9376 * VSI onto the next level down in the switch.
9378 * Well, okay, there's one more exception here: don't remove
9379 * the orphan VEBs yet. We'll wait for an explicit remove request
9380 * from up the network stack.
9382 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9384 pf->vsi[i]->uplink_seid == uplink_seid &&
9385 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9386 n++; /* count the VSIs */
9389 for (i = 0; i < I40E_MAX_VEB; i++) {
9392 if (pf->veb[i]->uplink_seid == uplink_seid)
9393 n++; /* count the VEBs */
9394 if (pf->veb[i]->seid == uplink_seid)
9397 if (n == 0 && veb && veb->uplink_seid != 0)
9398 i40e_veb_release(veb);
9404 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9405 * @vsi: ptr to the VSI
9407 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9408 * corresponding SW VSI structure and initializes num_queue_pairs for the
9409 * newly allocated VSI.
9411 * Returns 0 on success or negative on failure
9413 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9416 struct i40e_pf *pf = vsi->back;
9418 if (vsi->q_vectors[0]) {
9419 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9424 if (vsi->base_vector) {
9425 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9426 vsi->seid, vsi->base_vector);
9430 ret = i40e_vsi_alloc_q_vectors(vsi);
9432 dev_info(&pf->pdev->dev,
9433 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9434 vsi->num_q_vectors, vsi->seid, ret);
9435 vsi->num_q_vectors = 0;
9436 goto vector_setup_out;
9439 /* In Legacy mode, we do not have to get any other vector since we
9440 * piggyback on the misc/ICR0 for queue interrupts.
9442 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9444 if (vsi->num_q_vectors)
9445 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9446 vsi->num_q_vectors, vsi->idx);
9447 if (vsi->base_vector < 0) {
9448 dev_info(&pf->pdev->dev,
9449 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9450 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9451 i40e_vsi_free_q_vectors(vsi);
9453 goto vector_setup_out;
9461 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9462 * @vsi: pointer to the vsi.
9464 * This re-allocates a vsi's queue resources.
9466 * Returns pointer to the successfully allocated and configured VSI sw struct
9467 * on success, otherwise returns NULL on failure.
9469 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9471 struct i40e_pf *pf = vsi->back;
9475 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9476 i40e_vsi_clear_rings(vsi);
9478 i40e_vsi_free_arrays(vsi, false);
9479 i40e_set_num_rings_in_vsi(vsi);
9480 ret = i40e_vsi_alloc_arrays(vsi, false);
9484 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9486 dev_info(&pf->pdev->dev,
9487 "failed to get tracking for %d queues for VSI %d err %d\n",
9488 vsi->alloc_queue_pairs, vsi->seid, ret);
9491 vsi->base_queue = ret;
9493 /* Update the FW view of the VSI. Force a reset of TC and queue
9494 * layout configurations.
9496 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9497 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9498 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9499 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9501 /* assign it some queues */
9502 ret = i40e_alloc_rings(vsi);
9506 /* map all of the rings to the q_vectors */
9507 i40e_vsi_map_rings_to_vectors(vsi);
9511 i40e_vsi_free_q_vectors(vsi);
9512 if (vsi->netdev_registered) {
9513 vsi->netdev_registered = false;
9514 unregister_netdev(vsi->netdev);
9515 free_netdev(vsi->netdev);
9518 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9520 i40e_vsi_clear(vsi);
9525 * i40e_vsi_setup - Set up a VSI by a given type
9526 * @pf: board private structure
9528 * @uplink_seid: the switch element to link to
9529 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9531 * This allocates the sw VSI structure and its queue resources, then add a VSI
9532 * to the identified VEB.
9534 * Returns pointer to the successfully allocated and configure VSI sw struct on
9535 * success, otherwise returns NULL on failure.
9537 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9538 u16 uplink_seid, u32 param1)
9540 struct i40e_vsi *vsi = NULL;
9541 struct i40e_veb *veb = NULL;
9545 /* The requested uplink_seid must be either
9546 * - the PF's port seid
9547 * no VEB is needed because this is the PF
9548 * or this is a Flow Director special case VSI
9549 * - seid of an existing VEB
9550 * - seid of a VSI that owns an existing VEB
9551 * - seid of a VSI that doesn't own a VEB
9552 * a new VEB is created and the VSI becomes the owner
9553 * - seid of the PF VSI, which is what creates the first VEB
9554 * this is a special case of the previous
9556 * Find which uplink_seid we were given and create a new VEB if needed
9558 for (i = 0; i < I40E_MAX_VEB; i++) {
9559 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9565 if (!veb && uplink_seid != pf->mac_seid) {
9567 for (i = 0; i < pf->num_alloc_vsi; i++) {
9568 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9574 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9579 if (vsi->uplink_seid == pf->mac_seid)
9580 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9581 vsi->tc_config.enabled_tc);
9582 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9583 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9584 vsi->tc_config.enabled_tc);
9586 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9587 dev_info(&vsi->back->pdev->dev,
9588 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9591 /* We come up by default in VEPA mode if SRIOV is not
9592 * already enabled, in which case we can't force VEPA
9595 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9596 veb->bridge_mode = BRIDGE_MODE_VEPA;
9597 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9599 i40e_config_bridge_mode(veb);
9601 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9602 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9606 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9610 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9611 uplink_seid = veb->seid;
9614 /* get vsi sw struct */
9615 v_idx = i40e_vsi_mem_alloc(pf, type);
9618 vsi = pf->vsi[v_idx];
9622 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9624 if (type == I40E_VSI_MAIN)
9625 pf->lan_vsi = v_idx;
9626 else if (type == I40E_VSI_SRIOV)
9627 vsi->vf_id = param1;
9628 /* assign it some queues */
9629 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9632 dev_info(&pf->pdev->dev,
9633 "failed to get tracking for %d queues for VSI %d err=%d\n",
9634 vsi->alloc_queue_pairs, vsi->seid, ret);
9637 vsi->base_queue = ret;
9639 /* get a VSI from the hardware */
9640 vsi->uplink_seid = uplink_seid;
9641 ret = i40e_add_vsi(vsi);
9645 switch (vsi->type) {
9646 /* setup the netdev if needed */
9648 case I40E_VSI_VMDQ2:
9650 ret = i40e_config_netdev(vsi);
9653 ret = register_netdev(vsi->netdev);
9656 vsi->netdev_registered = true;
9657 netif_carrier_off(vsi->netdev);
9658 #ifdef CONFIG_I40E_DCB
9659 /* Setup DCB netlink interface */
9660 i40e_dcbnl_setup(vsi);
9661 #endif /* CONFIG_I40E_DCB */
9665 /* set up vectors and rings if needed */
9666 ret = i40e_vsi_setup_vectors(vsi);
9670 ret = i40e_alloc_rings(vsi);
9674 /* map all of the rings to the q_vectors */
9675 i40e_vsi_map_rings_to_vectors(vsi);
9677 i40e_vsi_reset_stats(vsi);
9681 /* no netdev or rings for the other VSI types */
9685 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9686 (vsi->type == I40E_VSI_VMDQ2)) {
9687 ret = i40e_vsi_config_rss(vsi);
9692 i40e_vsi_free_q_vectors(vsi);
9694 if (vsi->netdev_registered) {
9695 vsi->netdev_registered = false;
9696 unregister_netdev(vsi->netdev);
9697 free_netdev(vsi->netdev);
9701 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9703 i40e_vsi_clear(vsi);
9709 * i40e_veb_get_bw_info - Query VEB BW information
9710 * @veb: the veb to query
9712 * Query the Tx scheduler BW configuration data for given VEB
9714 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9716 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9717 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9718 struct i40e_pf *pf = veb->pf;
9719 struct i40e_hw *hw = &pf->hw;
9724 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9727 dev_info(&pf->pdev->dev,
9728 "query veb bw config failed, err %s aq_err %s\n",
9729 i40e_stat_str(&pf->hw, ret),
9730 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9734 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9737 dev_info(&pf->pdev->dev,
9738 "query veb bw ets config failed, err %s aq_err %s\n",
9739 i40e_stat_str(&pf->hw, ret),
9740 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9744 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9745 veb->bw_max_quanta = ets_data.tc_bw_max;
9746 veb->is_abs_credits = bw_data.absolute_credits_enable;
9747 veb->enabled_tc = ets_data.tc_valid_bits;
9748 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9749 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9750 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9751 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9752 veb->bw_tc_limit_credits[i] =
9753 le16_to_cpu(bw_data.tc_bw_limits[i]);
9754 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9762 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9763 * @pf: board private structure
9765 * On error: returns error code (negative)
9766 * On success: returns vsi index in PF (positive)
9768 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9771 struct i40e_veb *veb;
9774 /* Need to protect the allocation of switch elements at the PF level */
9775 mutex_lock(&pf->switch_mutex);
9777 /* VEB list may be fragmented if VEB creation/destruction has
9778 * been happening. We can afford to do a quick scan to look
9779 * for any free slots in the list.
9781 * find next empty veb slot, looping back around if necessary
9784 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9786 if (i >= I40E_MAX_VEB) {
9788 goto err_alloc_veb; /* out of VEB slots! */
9791 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9798 veb->enabled_tc = 1;
9803 mutex_unlock(&pf->switch_mutex);
9808 * i40e_switch_branch_release - Delete a branch of the switch tree
9809 * @branch: where to start deleting
9811 * This uses recursion to find the tips of the branch to be
9812 * removed, deleting until we get back to and can delete this VEB.
9814 static void i40e_switch_branch_release(struct i40e_veb *branch)
9816 struct i40e_pf *pf = branch->pf;
9817 u16 branch_seid = branch->seid;
9818 u16 veb_idx = branch->idx;
9821 /* release any VEBs on this VEB - RECURSION */
9822 for (i = 0; i < I40E_MAX_VEB; i++) {
9825 if (pf->veb[i]->uplink_seid == branch->seid)
9826 i40e_switch_branch_release(pf->veb[i]);
9829 /* Release the VSIs on this VEB, but not the owner VSI.
9831 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9832 * the VEB itself, so don't use (*branch) after this loop.
9834 for (i = 0; i < pf->num_alloc_vsi; i++) {
9837 if (pf->vsi[i]->uplink_seid == branch_seid &&
9838 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9839 i40e_vsi_release(pf->vsi[i]);
9843 /* There's one corner case where the VEB might not have been
9844 * removed, so double check it here and remove it if needed.
9845 * This case happens if the veb was created from the debugfs
9846 * commands and no VSIs were added to it.
9848 if (pf->veb[veb_idx])
9849 i40e_veb_release(pf->veb[veb_idx]);
9853 * i40e_veb_clear - remove veb struct
9854 * @veb: the veb to remove
9856 static void i40e_veb_clear(struct i40e_veb *veb)
9862 struct i40e_pf *pf = veb->pf;
9864 mutex_lock(&pf->switch_mutex);
9865 if (pf->veb[veb->idx] == veb)
9866 pf->veb[veb->idx] = NULL;
9867 mutex_unlock(&pf->switch_mutex);
9874 * i40e_veb_release - Delete a VEB and free its resources
9875 * @veb: the VEB being removed
9877 void i40e_veb_release(struct i40e_veb *veb)
9879 struct i40e_vsi *vsi = NULL;
9885 /* find the remaining VSI and check for extras */
9886 for (i = 0; i < pf->num_alloc_vsi; i++) {
9887 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9893 dev_info(&pf->pdev->dev,
9894 "can't remove VEB %d with %d VSIs left\n",
9899 /* move the remaining VSI to uplink veb */
9900 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9901 if (veb->uplink_seid) {
9902 vsi->uplink_seid = veb->uplink_seid;
9903 if (veb->uplink_seid == pf->mac_seid)
9904 vsi->veb_idx = I40E_NO_VEB;
9906 vsi->veb_idx = veb->veb_idx;
9909 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9910 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9913 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9914 i40e_veb_clear(veb);
9918 * i40e_add_veb - create the VEB in the switch
9919 * @veb: the VEB to be instantiated
9920 * @vsi: the controlling VSI
9922 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9924 struct i40e_pf *pf = veb->pf;
9925 bool is_default = veb->pf->cur_promisc;
9926 bool is_cloud = false;
9929 /* get a VEB from the hardware */
9930 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9931 veb->enabled_tc, is_default,
9932 is_cloud, &veb->seid, NULL);
9934 dev_info(&pf->pdev->dev,
9935 "couldn't add VEB, err %s aq_err %s\n",
9936 i40e_stat_str(&pf->hw, ret),
9937 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9941 /* get statistics counter */
9942 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9943 &veb->stats_idx, NULL, NULL, NULL);
9945 dev_info(&pf->pdev->dev,
9946 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9947 i40e_stat_str(&pf->hw, ret),
9948 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9951 ret = i40e_veb_get_bw_info(veb);
9953 dev_info(&pf->pdev->dev,
9954 "couldn't get VEB bw info, err %s aq_err %s\n",
9955 i40e_stat_str(&pf->hw, ret),
9956 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9957 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9961 vsi->uplink_seid = veb->seid;
9962 vsi->veb_idx = veb->idx;
9963 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9969 * i40e_veb_setup - Set up a VEB
9970 * @pf: board private structure
9971 * @flags: VEB setup flags
9972 * @uplink_seid: the switch element to link to
9973 * @vsi_seid: the initial VSI seid
9974 * @enabled_tc: Enabled TC bit-map
9976 * This allocates the sw VEB structure and links it into the switch
9977 * It is possible and legal for this to be a duplicate of an already
9978 * existing VEB. It is also possible for both uplink and vsi seids
9979 * to be zero, in order to create a floating VEB.
9981 * Returns pointer to the successfully allocated VEB sw struct on
9982 * success, otherwise returns NULL on failure.
9984 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9985 u16 uplink_seid, u16 vsi_seid,
9988 struct i40e_veb *veb, *uplink_veb = NULL;
9989 int vsi_idx, veb_idx;
9992 /* if one seid is 0, the other must be 0 to create a floating relay */
9993 if ((uplink_seid == 0 || vsi_seid == 0) &&
9994 (uplink_seid + vsi_seid != 0)) {
9995 dev_info(&pf->pdev->dev,
9996 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9997 uplink_seid, vsi_seid);
10001 /* make sure there is such a vsi and uplink */
10002 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10003 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10005 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10006 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10011 if (uplink_seid && uplink_seid != pf->mac_seid) {
10012 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10013 if (pf->veb[veb_idx] &&
10014 pf->veb[veb_idx]->seid == uplink_seid) {
10015 uplink_veb = pf->veb[veb_idx];
10020 dev_info(&pf->pdev->dev,
10021 "uplink seid %d not found\n", uplink_seid);
10026 /* get veb sw struct */
10027 veb_idx = i40e_veb_mem_alloc(pf);
10030 veb = pf->veb[veb_idx];
10031 veb->flags = flags;
10032 veb->uplink_seid = uplink_seid;
10033 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10034 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10036 /* create the VEB in the switch */
10037 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10040 if (vsi_idx == pf->lan_vsi)
10041 pf->lan_veb = veb->idx;
10046 i40e_veb_clear(veb);
10052 * i40e_setup_pf_switch_element - set PF vars based on switch type
10053 * @pf: board private structure
10054 * @ele: element we are building info from
10055 * @num_reported: total number of elements
10056 * @printconfig: should we print the contents
10058 * helper function to assist in extracting a few useful SEID values.
10060 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10061 struct i40e_aqc_switch_config_element_resp *ele,
10062 u16 num_reported, bool printconfig)
10064 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10065 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10066 u8 element_type = ele->element_type;
10067 u16 seid = le16_to_cpu(ele->seid);
10070 dev_info(&pf->pdev->dev,
10071 "type=%d seid=%d uplink=%d downlink=%d\n",
10072 element_type, seid, uplink_seid, downlink_seid);
10074 switch (element_type) {
10075 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10076 pf->mac_seid = seid;
10078 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10080 if (uplink_seid != pf->mac_seid)
10082 if (pf->lan_veb == I40E_NO_VEB) {
10085 /* find existing or else empty VEB */
10086 for (v = 0; v < I40E_MAX_VEB; v++) {
10087 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10092 if (pf->lan_veb == I40E_NO_VEB) {
10093 v = i40e_veb_mem_alloc(pf);
10100 pf->veb[pf->lan_veb]->seid = seid;
10101 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10102 pf->veb[pf->lan_veb]->pf = pf;
10103 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10105 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10106 if (num_reported != 1)
10108 /* This is immediately after a reset so we can assume this is
10111 pf->mac_seid = uplink_seid;
10112 pf->pf_seid = downlink_seid;
10113 pf->main_vsi_seid = seid;
10115 dev_info(&pf->pdev->dev,
10116 "pf_seid=%d main_vsi_seid=%d\n",
10117 pf->pf_seid, pf->main_vsi_seid);
10119 case I40E_SWITCH_ELEMENT_TYPE_PF:
10120 case I40E_SWITCH_ELEMENT_TYPE_VF:
10121 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10122 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10123 case I40E_SWITCH_ELEMENT_TYPE_PE:
10124 case I40E_SWITCH_ELEMENT_TYPE_PA:
10125 /* ignore these for now */
10128 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10129 element_type, seid);
10135 * i40e_fetch_switch_configuration - Get switch config from firmware
10136 * @pf: board private structure
10137 * @printconfig: should we print the contents
10139 * Get the current switch configuration from the device and
10140 * extract a few useful SEID values.
10142 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10144 struct i40e_aqc_get_switch_config_resp *sw_config;
10150 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10154 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10156 u16 num_reported, num_total;
10158 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10162 dev_info(&pf->pdev->dev,
10163 "get switch config failed err %s aq_err %s\n",
10164 i40e_stat_str(&pf->hw, ret),
10165 i40e_aq_str(&pf->hw,
10166 pf->hw.aq.asq_last_status));
10171 num_reported = le16_to_cpu(sw_config->header.num_reported);
10172 num_total = le16_to_cpu(sw_config->header.num_total);
10175 dev_info(&pf->pdev->dev,
10176 "header: %d reported %d total\n",
10177 num_reported, num_total);
10179 for (i = 0; i < num_reported; i++) {
10180 struct i40e_aqc_switch_config_element_resp *ele =
10181 &sw_config->element[i];
10183 i40e_setup_pf_switch_element(pf, ele, num_reported,
10186 } while (next_seid != 0);
10193 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10194 * @pf: board private structure
10195 * @reinit: if the Main VSI needs to re-initialized.
10197 * Returns 0 on success, negative value on failure
10199 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10203 /* find out what's out there already */
10204 ret = i40e_fetch_switch_configuration(pf, false);
10206 dev_info(&pf->pdev->dev,
10207 "couldn't fetch switch config, err %s aq_err %s\n",
10208 i40e_stat_str(&pf->hw, ret),
10209 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10212 i40e_pf_reset_stats(pf);
10214 /* first time setup */
10215 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10216 struct i40e_vsi *vsi = NULL;
10219 /* Set up the PF VSI associated with the PF's main VSI
10220 * that is already in the HW switch
10222 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10223 uplink_seid = pf->veb[pf->lan_veb]->seid;
10225 uplink_seid = pf->mac_seid;
10226 if (pf->lan_vsi == I40E_NO_VSI)
10227 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10229 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10231 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10232 i40e_fdir_teardown(pf);
10236 /* force a reset of TC and queue layout configurations */
10237 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10239 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10240 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10241 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10243 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10245 i40e_fdir_sb_setup(pf);
10247 /* Setup static PF queue filter control settings */
10248 ret = i40e_setup_pf_filter_control(pf);
10250 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10252 /* Failure here should not stop continuing other steps */
10255 /* enable RSS in the HW, even for only one queue, as the stack can use
10258 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10259 i40e_pf_config_rss(pf);
10261 /* fill in link information and enable LSE reporting */
10262 i40e_update_link_info(&pf->hw);
10263 i40e_link_event(pf);
10265 /* Initialize user-specific link properties */
10266 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10267 I40E_AQ_AN_COMPLETED) ? true : false);
10275 * i40e_determine_queue_usage - Work out queue distribution
10276 * @pf: board private structure
10278 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10282 pf->num_lan_qps = 0;
10284 pf->num_fcoe_qps = 0;
10287 /* Find the max queues to be put into basic use. We'll always be
10288 * using TC0, whether or not DCB is running, and TC0 will get the
10291 queues_left = pf->hw.func_caps.num_tx_qp;
10293 if ((queues_left == 1) ||
10294 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10295 /* one qp for PF, no queues for anything else */
10297 pf->alloc_rss_size = pf->num_lan_qps = 1;
10299 /* make sure all the fancies are disabled */
10300 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10302 I40E_FLAG_FCOE_ENABLED |
10304 I40E_FLAG_FD_SB_ENABLED |
10305 I40E_FLAG_FD_ATR_ENABLED |
10306 I40E_FLAG_DCB_CAPABLE |
10307 I40E_FLAG_SRIOV_ENABLED |
10308 I40E_FLAG_VMDQ_ENABLED);
10309 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10310 I40E_FLAG_FD_SB_ENABLED |
10311 I40E_FLAG_FD_ATR_ENABLED |
10312 I40E_FLAG_DCB_CAPABLE))) {
10313 /* one qp for PF */
10314 pf->alloc_rss_size = pf->num_lan_qps = 1;
10315 queues_left -= pf->num_lan_qps;
10317 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10319 I40E_FLAG_FCOE_ENABLED |
10321 I40E_FLAG_FD_SB_ENABLED |
10322 I40E_FLAG_FD_ATR_ENABLED |
10323 I40E_FLAG_DCB_ENABLED |
10324 I40E_FLAG_VMDQ_ENABLED);
10326 /* Not enough queues for all TCs */
10327 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10328 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10329 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10330 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10332 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10333 num_online_cpus());
10334 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10335 pf->hw.func_caps.num_tx_qp);
10337 queues_left -= pf->num_lan_qps;
10341 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10342 if (I40E_DEFAULT_FCOE <= queues_left) {
10343 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10344 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10345 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10347 pf->num_fcoe_qps = 0;
10348 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10349 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10352 queues_left -= pf->num_fcoe_qps;
10356 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10357 if (queues_left > 1) {
10358 queues_left -= 1; /* save 1 queue for FD */
10360 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10361 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10365 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10366 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10367 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10368 (queues_left / pf->num_vf_qps));
10369 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10372 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10373 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10374 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10375 (queues_left / pf->num_vmdq_qps));
10376 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10379 pf->queues_left = queues_left;
10380 dev_dbg(&pf->pdev->dev,
10381 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10382 pf->hw.func_caps.num_tx_qp,
10383 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10384 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10385 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10388 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10393 * i40e_setup_pf_filter_control - Setup PF static filter control
10394 * @pf: PF to be setup
10396 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10397 * settings. If PE/FCoE are enabled then it will also set the per PF
10398 * based filter sizes required for them. It also enables Flow director,
10399 * ethertype and macvlan type filter settings for the pf.
10401 * Returns 0 on success, negative on failure
10403 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10405 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10407 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10409 /* Flow Director is enabled */
10410 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10411 settings->enable_fdir = true;
10413 /* Ethtype and MACVLAN filters enabled for PF */
10414 settings->enable_ethtype = true;
10415 settings->enable_macvlan = true;
10417 if (i40e_set_filter_control(&pf->hw, settings))
10423 #define INFO_STRING_LEN 255
10424 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10425 static void i40e_print_features(struct i40e_pf *pf)
10427 struct i40e_hw *hw = &pf->hw;
10431 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10435 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10436 #ifdef CONFIG_PCI_IOV
10437 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10439 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10440 pf->hw.func_caps.num_vsis,
10441 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10442 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10444 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10445 i += snprintf(&buf[i], REMAIN(i), " RSS");
10446 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10447 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10448 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10449 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10450 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10452 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10453 i += snprintf(&buf[i], REMAIN(i), " DCB");
10454 #if IS_ENABLED(CONFIG_VXLAN)
10455 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10457 #if IS_ENABLED(CONFIG_GENEVE)
10458 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10460 if (pf->flags & I40E_FLAG_PTP)
10461 i += snprintf(&buf[i], REMAIN(i), " PTP");
10463 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10464 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10466 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10467 i += snprintf(&buf[i], REMAIN(i), " VEB");
10469 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10471 dev_info(&pf->pdev->dev, "%s\n", buf);
10473 WARN_ON(i > INFO_STRING_LEN);
10477 * i40e_probe - Device initialization routine
10478 * @pdev: PCI device information struct
10479 * @ent: entry in i40e_pci_tbl
10481 * i40e_probe initializes a PF identified by a pci_dev structure.
10482 * The OS initialization, configuring of the PF private structure,
10483 * and a hardware reset occur.
10485 * Returns 0 on success, negative on failure
10487 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10489 struct i40e_aq_get_phy_abilities_resp abilities;
10490 struct i40e_pf *pf;
10491 struct i40e_hw *hw;
10492 static u16 pfs_found;
10501 err = pci_enable_device_mem(pdev);
10505 /* set up for high or low dma */
10506 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10508 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10510 dev_err(&pdev->dev,
10511 "DMA configuration failed: 0x%x\n", err);
10516 /* set up pci connections */
10517 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10518 IORESOURCE_MEM), i40e_driver_name);
10520 dev_info(&pdev->dev,
10521 "pci_request_selected_regions failed %d\n", err);
10525 pci_enable_pcie_error_reporting(pdev);
10526 pci_set_master(pdev);
10528 /* Now that we have a PCI connection, we need to do the
10529 * low level device setup. This is primarily setting up
10530 * the Admin Queue structures and then querying for the
10531 * device's current profile information.
10533 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10540 set_bit(__I40E_DOWN, &pf->state);
10545 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10546 I40E_MAX_CSR_SPACE);
10548 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10549 if (!hw->hw_addr) {
10551 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10552 (unsigned int)pci_resource_start(pdev, 0),
10553 pf->ioremap_len, err);
10556 hw->vendor_id = pdev->vendor;
10557 hw->device_id = pdev->device;
10558 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10559 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10560 hw->subsystem_device_id = pdev->subsystem_device;
10561 hw->bus.device = PCI_SLOT(pdev->devfn);
10562 hw->bus.func = PCI_FUNC(pdev->devfn);
10563 pf->instance = pfs_found;
10566 pf->msg_enable = pf->hw.debug_mask;
10567 pf->msg_enable = debug;
10570 /* do a special CORER for clearing PXE mode once at init */
10571 if (hw->revision_id == 0 &&
10572 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10573 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10578 i40e_clear_pxe_mode(hw);
10581 /* Reset here to make sure all is clean and to define PF 'n' */
10583 err = i40e_pf_reset(hw);
10585 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10590 hw->aq.num_arq_entries = I40E_AQ_LEN;
10591 hw->aq.num_asq_entries = I40E_AQ_LEN;
10592 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10593 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10594 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10596 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10598 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10600 err = i40e_init_shared_code(hw);
10602 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10607 /* set up a default setting for link flow control */
10608 pf->hw.fc.requested_mode = I40E_FC_NONE;
10610 /* set up the locks for the AQ, do this only once in probe
10611 * and destroy them only once in remove
10613 mutex_init(&hw->aq.asq_mutex);
10614 mutex_init(&hw->aq.arq_mutex);
10616 err = i40e_init_adminq(hw);
10618 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10619 dev_info(&pdev->dev,
10620 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10622 dev_info(&pdev->dev,
10623 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10628 /* provide nvm, fw, api versions */
10629 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10630 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10631 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10632 i40e_nvm_version_str(hw));
10634 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10635 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10636 dev_info(&pdev->dev,
10637 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10638 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10639 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10640 dev_info(&pdev->dev,
10641 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10643 i40e_verify_eeprom(pf);
10645 /* Rev 0 hardware was never productized */
10646 if (hw->revision_id < 1)
10647 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10649 i40e_clear_pxe_mode(hw);
10650 err = i40e_get_capabilities(pf);
10652 goto err_adminq_setup;
10654 err = i40e_sw_init(pf);
10656 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10660 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10661 hw->func_caps.num_rx_qp,
10662 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10664 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10665 goto err_init_lan_hmc;
10668 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10670 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10672 goto err_configure_lan_hmc;
10675 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10676 * Ignore error return codes because if it was already disabled via
10677 * hardware settings this will fail
10679 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10680 (pf->hw.aq.fw_maj_ver < 4)) {
10681 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10682 i40e_aq_stop_lldp(hw, true, NULL);
10685 i40e_get_mac_addr(hw, hw->mac.addr);
10686 if (!is_valid_ether_addr(hw->mac.addr)) {
10687 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10691 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10692 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10693 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10694 if (is_valid_ether_addr(hw->mac.port_addr))
10695 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10697 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10699 dev_info(&pdev->dev,
10700 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10701 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10702 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10704 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10706 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10707 #endif /* I40E_FCOE */
10709 pci_set_drvdata(pdev, pf);
10710 pci_save_state(pdev);
10711 #ifdef CONFIG_I40E_DCB
10712 err = i40e_init_pf_dcb(pf);
10714 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10715 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10716 /* Continue without DCB enabled */
10718 #endif /* CONFIG_I40E_DCB */
10720 /* set up periodic task facility */
10721 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10722 pf->service_timer_period = HZ;
10724 INIT_WORK(&pf->service_task, i40e_service_task);
10725 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10726 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10728 /* NVM bit on means WoL disabled for the port */
10729 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10730 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10731 pf->wol_en = false;
10734 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10736 /* set up the main switch operations */
10737 i40e_determine_queue_usage(pf);
10738 err = i40e_init_interrupt_scheme(pf);
10740 goto err_switch_setup;
10742 /* The number of VSIs reported by the FW is the minimum guaranteed
10743 * to us; HW supports far more and we share the remaining pool with
10744 * the other PFs. We allocate space for more than the guarantee with
10745 * the understanding that we might not get them all later.
10747 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10748 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10750 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10752 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10753 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10754 pf->vsi = kzalloc(len, GFP_KERNEL);
10757 goto err_switch_setup;
10760 #ifdef CONFIG_PCI_IOV
10761 /* prep for VF support */
10762 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10763 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10764 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10765 if (pci_num_vf(pdev))
10766 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10769 err = i40e_setup_pf_switch(pf, false);
10771 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10775 /* Make sure flow control is set according to current settings */
10776 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10777 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10778 dev_dbg(&pf->pdev->dev,
10779 "Set fc with err %s aq_err %s on get_phy_cap\n",
10780 i40e_stat_str(hw, err),
10781 i40e_aq_str(hw, hw->aq.asq_last_status));
10782 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10783 dev_dbg(&pf->pdev->dev,
10784 "Set fc with err %s aq_err %s on set_phy_config\n",
10785 i40e_stat_str(hw, err),
10786 i40e_aq_str(hw, hw->aq.asq_last_status));
10787 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10788 dev_dbg(&pf->pdev->dev,
10789 "Set fc with err %s aq_err %s on get_link_info\n",
10790 i40e_stat_str(hw, err),
10791 i40e_aq_str(hw, hw->aq.asq_last_status));
10793 /* if FDIR VSI was set up, start it now */
10794 for (i = 0; i < pf->num_alloc_vsi; i++) {
10795 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10796 i40e_vsi_open(pf->vsi[i]);
10801 /* driver is only interested in link up/down and module qualification
10802 * reports from firmware
10804 err = i40e_aq_set_phy_int_mask(&pf->hw,
10805 I40E_AQ_EVENT_LINK_UPDOWN |
10806 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10808 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10809 i40e_stat_str(&pf->hw, err),
10810 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10812 /* Reconfigure hardware for allowing smaller MSS in the case
10813 * of TSO, so that we avoid the MDD being fired and causing
10814 * a reset in the case of small MSS+TSO.
10816 val = rd32(hw, I40E_REG_MSS);
10817 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10818 val &= ~I40E_REG_MSS_MIN_MASK;
10819 val |= I40E_64BYTE_MSS;
10820 wr32(hw, I40E_REG_MSS, val);
10823 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10824 (pf->hw.aq.fw_maj_ver < 4)) {
10826 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10828 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10829 i40e_stat_str(&pf->hw, err),
10830 i40e_aq_str(&pf->hw,
10831 pf->hw.aq.asq_last_status));
10833 /* The main driver is (mostly) up and happy. We need to set this state
10834 * before setting up the misc vector or we get a race and the vector
10835 * ends up disabled forever.
10837 clear_bit(__I40E_DOWN, &pf->state);
10839 /* In case of MSIX we are going to setup the misc vector right here
10840 * to handle admin queue events etc. In case of legacy and MSI
10841 * the misc functionality and queue processing is combined in
10842 * the same vector and that gets setup at open.
10844 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10845 err = i40e_setup_misc_vector(pf);
10847 dev_info(&pdev->dev,
10848 "setup of misc vector failed: %d\n", err);
10853 #ifdef CONFIG_PCI_IOV
10854 /* prep for VF support */
10855 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10856 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10857 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10860 /* disable link interrupts for VFs */
10861 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10862 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10863 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10866 if (pci_num_vf(pdev)) {
10867 dev_info(&pdev->dev,
10868 "Active VFs found, allocating resources.\n");
10869 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10871 dev_info(&pdev->dev,
10872 "Error %d allocating resources for existing VFs\n",
10876 #endif /* CONFIG_PCI_IOV */
10880 i40e_dbg_pf_init(pf);
10882 /* tell the firmware that we're starting */
10883 i40e_send_version(pf);
10885 /* since everything's happy, start the service_task timer */
10886 mod_timer(&pf->service_timer,
10887 round_jiffies(jiffies + pf->service_timer_period));
10890 /* create FCoE interface */
10891 i40e_fcoe_vsi_setup(pf);
10894 #define PCI_SPEED_SIZE 8
10895 #define PCI_WIDTH_SIZE 8
10896 /* Devices on the IOSF bus do not have this information
10897 * and will report PCI Gen 1 x 1 by default so don't bother
10900 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10901 char speed[PCI_SPEED_SIZE] = "Unknown";
10902 char width[PCI_WIDTH_SIZE] = "Unknown";
10904 /* Get the negotiated link width and speed from PCI config
10907 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10910 i40e_set_pci_config_data(hw, link_status);
10912 switch (hw->bus.speed) {
10913 case i40e_bus_speed_8000:
10914 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10915 case i40e_bus_speed_5000:
10916 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10917 case i40e_bus_speed_2500:
10918 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10922 switch (hw->bus.width) {
10923 case i40e_bus_width_pcie_x8:
10924 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10925 case i40e_bus_width_pcie_x4:
10926 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10927 case i40e_bus_width_pcie_x2:
10928 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10929 case i40e_bus_width_pcie_x1:
10930 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10935 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10938 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10939 hw->bus.speed < i40e_bus_speed_8000) {
10940 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10941 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10945 /* get the requested speeds from the fw */
10946 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10948 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10949 i40e_stat_str(&pf->hw, err),
10950 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10951 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10953 /* get the supported phy types from the fw */
10954 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10956 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10957 i40e_stat_str(&pf->hw, err),
10958 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10959 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10961 /* Add a filter to drop all Flow control frames from any VSI from being
10962 * transmitted. By doing so we stop a malicious VF from sending out
10963 * PAUSE or PFC frames and potentially controlling traffic for other
10965 * The FW can still send Flow control frames if enabled.
10967 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10968 pf->main_vsi_seid);
10970 /* print a string summarizing features */
10971 i40e_print_features(pf);
10975 /* Unwind what we've done if something failed in the setup */
10977 set_bit(__I40E_DOWN, &pf->state);
10978 i40e_clear_interrupt_scheme(pf);
10981 i40e_reset_interrupt_capability(pf);
10982 del_timer_sync(&pf->service_timer);
10984 err_configure_lan_hmc:
10985 (void)i40e_shutdown_lan_hmc(hw);
10987 kfree(pf->qp_pile);
10990 (void)i40e_shutdown_adminq(hw);
10992 iounmap(hw->hw_addr);
10996 pci_disable_pcie_error_reporting(pdev);
10997 pci_release_selected_regions(pdev,
10998 pci_select_bars(pdev, IORESOURCE_MEM));
11001 pci_disable_device(pdev);
11006 * i40e_remove - Device removal routine
11007 * @pdev: PCI device information struct
11009 * i40e_remove is called by the PCI subsystem to alert the driver
11010 * that is should release a PCI device. This could be caused by a
11011 * Hot-Plug event, or because the driver is going to be removed from
11014 static void i40e_remove(struct pci_dev *pdev)
11016 struct i40e_pf *pf = pci_get_drvdata(pdev);
11017 struct i40e_hw *hw = &pf->hw;
11018 i40e_status ret_code;
11021 i40e_dbg_pf_exit(pf);
11025 /* Disable RSS in hw */
11026 wr32(hw, I40E_PFQF_HENA(0), 0);
11027 wr32(hw, I40E_PFQF_HENA(1), 0);
11029 /* no more scheduling of any task */
11030 set_bit(__I40E_DOWN, &pf->state);
11031 del_timer_sync(&pf->service_timer);
11032 cancel_work_sync(&pf->service_task);
11034 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11036 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11039 i40e_fdir_teardown(pf);
11041 /* If there is a switch structure or any orphans, remove them.
11042 * This will leave only the PF's VSI remaining.
11044 for (i = 0; i < I40E_MAX_VEB; i++) {
11048 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11049 pf->veb[i]->uplink_seid == 0)
11050 i40e_switch_branch_release(pf->veb[i]);
11053 /* Now we can shutdown the PF's VSI, just before we kill
11056 if (pf->vsi[pf->lan_vsi])
11057 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11059 /* shutdown and destroy the HMC */
11060 if (pf->hw.hmc.hmc_obj) {
11061 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
11063 dev_warn(&pdev->dev,
11064 "Failed to destroy the HMC resources: %d\n",
11068 /* shutdown the adminq */
11069 ret_code = i40e_shutdown_adminq(&pf->hw);
11071 dev_warn(&pdev->dev,
11072 "Failed to destroy the Admin Queue resources: %d\n",
11075 /* destroy the locks only once, here */
11076 mutex_destroy(&hw->aq.arq_mutex);
11077 mutex_destroy(&hw->aq.asq_mutex);
11079 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11080 i40e_clear_interrupt_scheme(pf);
11081 for (i = 0; i < pf->num_alloc_vsi; i++) {
11083 i40e_vsi_clear_rings(pf->vsi[i]);
11084 i40e_vsi_clear(pf->vsi[i]);
11089 for (i = 0; i < I40E_MAX_VEB; i++) {
11094 kfree(pf->qp_pile);
11097 iounmap(pf->hw.hw_addr);
11099 pci_release_selected_regions(pdev,
11100 pci_select_bars(pdev, IORESOURCE_MEM));
11102 pci_disable_pcie_error_reporting(pdev);
11103 pci_disable_device(pdev);
11107 * i40e_pci_error_detected - warning that something funky happened in PCI land
11108 * @pdev: PCI device information struct
11110 * Called to warn that something happened and the error handling steps
11111 * are in progress. Allows the driver to quiesce things, be ready for
11114 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11115 enum pci_channel_state error)
11117 struct i40e_pf *pf = pci_get_drvdata(pdev);
11119 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11121 /* shutdown all operations */
11122 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11124 i40e_prep_for_reset(pf);
11128 /* Request a slot reset */
11129 return PCI_ERS_RESULT_NEED_RESET;
11133 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11134 * @pdev: PCI device information struct
11136 * Called to find if the driver can work with the device now that
11137 * the pci slot has been reset. If a basic connection seems good
11138 * (registers are readable and have sane content) then return a
11139 * happy little PCI_ERS_RESULT_xxx.
11141 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11143 struct i40e_pf *pf = pci_get_drvdata(pdev);
11144 pci_ers_result_t result;
11148 dev_dbg(&pdev->dev, "%s\n", __func__);
11149 if (pci_enable_device_mem(pdev)) {
11150 dev_info(&pdev->dev,
11151 "Cannot re-enable PCI device after reset.\n");
11152 result = PCI_ERS_RESULT_DISCONNECT;
11154 pci_set_master(pdev);
11155 pci_restore_state(pdev);
11156 pci_save_state(pdev);
11157 pci_wake_from_d3(pdev, false);
11159 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11161 result = PCI_ERS_RESULT_RECOVERED;
11163 result = PCI_ERS_RESULT_DISCONNECT;
11166 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11168 dev_info(&pdev->dev,
11169 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11171 /* non-fatal, continue */
11178 * i40e_pci_error_resume - restart operations after PCI error recovery
11179 * @pdev: PCI device information struct
11181 * Called to allow the driver to bring things back up after PCI error
11182 * and/or reset recovery has finished.
11184 static void i40e_pci_error_resume(struct pci_dev *pdev)
11186 struct i40e_pf *pf = pci_get_drvdata(pdev);
11188 dev_dbg(&pdev->dev, "%s\n", __func__);
11189 if (test_bit(__I40E_SUSPENDED, &pf->state))
11193 i40e_handle_reset_warning(pf);
11198 * i40e_shutdown - PCI callback for shutting down
11199 * @pdev: PCI device information struct
11201 static void i40e_shutdown(struct pci_dev *pdev)
11203 struct i40e_pf *pf = pci_get_drvdata(pdev);
11204 struct i40e_hw *hw = &pf->hw;
11206 set_bit(__I40E_SUSPENDED, &pf->state);
11207 set_bit(__I40E_DOWN, &pf->state);
11209 i40e_prep_for_reset(pf);
11212 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11213 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11215 del_timer_sync(&pf->service_timer);
11216 cancel_work_sync(&pf->service_task);
11217 i40e_fdir_teardown(pf);
11220 i40e_prep_for_reset(pf);
11223 wr32(hw, I40E_PFPM_APM,
11224 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11225 wr32(hw, I40E_PFPM_WUFC,
11226 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11228 i40e_clear_interrupt_scheme(pf);
11230 if (system_state == SYSTEM_POWER_OFF) {
11231 pci_wake_from_d3(pdev, pf->wol_en);
11232 pci_set_power_state(pdev, PCI_D3hot);
11238 * i40e_suspend - PCI callback for moving to D3
11239 * @pdev: PCI device information struct
11241 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11243 struct i40e_pf *pf = pci_get_drvdata(pdev);
11244 struct i40e_hw *hw = &pf->hw;
11246 set_bit(__I40E_SUSPENDED, &pf->state);
11247 set_bit(__I40E_DOWN, &pf->state);
11250 i40e_prep_for_reset(pf);
11253 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11254 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11256 pci_wake_from_d3(pdev, pf->wol_en);
11257 pci_set_power_state(pdev, PCI_D3hot);
11263 * i40e_resume - PCI callback for waking up from D3
11264 * @pdev: PCI device information struct
11266 static int i40e_resume(struct pci_dev *pdev)
11268 struct i40e_pf *pf = pci_get_drvdata(pdev);
11271 pci_set_power_state(pdev, PCI_D0);
11272 pci_restore_state(pdev);
11273 /* pci_restore_state() clears dev->state_saves, so
11274 * call pci_save_state() again to restore it.
11276 pci_save_state(pdev);
11278 err = pci_enable_device_mem(pdev);
11280 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11283 pci_set_master(pdev);
11285 /* no wakeup events while running */
11286 pci_wake_from_d3(pdev, false);
11288 /* handling the reset will rebuild the device state */
11289 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11290 clear_bit(__I40E_DOWN, &pf->state);
11292 i40e_reset_and_rebuild(pf, false);
11300 static const struct pci_error_handlers i40e_err_handler = {
11301 .error_detected = i40e_pci_error_detected,
11302 .slot_reset = i40e_pci_error_slot_reset,
11303 .resume = i40e_pci_error_resume,
11306 static struct pci_driver i40e_driver = {
11307 .name = i40e_driver_name,
11308 .id_table = i40e_pci_tbl,
11309 .probe = i40e_probe,
11310 .remove = i40e_remove,
11312 .suspend = i40e_suspend,
11313 .resume = i40e_resume,
11315 .shutdown = i40e_shutdown,
11316 .err_handler = &i40e_err_handler,
11317 .sriov_configure = i40e_pci_sriov_configure,
11321 * i40e_init_module - Driver registration routine
11323 * i40e_init_module is the first routine called when the driver is
11324 * loaded. All it does is register with the PCI subsystem.
11326 static int __init i40e_init_module(void)
11328 pr_info("%s: %s - version %s\n", i40e_driver_name,
11329 i40e_driver_string, i40e_driver_version_str);
11330 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11333 return pci_register_driver(&i40e_driver);
11335 module_init(i40e_init_module);
11338 * i40e_exit_module - Driver exit cleanup routine
11340 * i40e_exit_module is called just before the driver is removed
11343 static void __exit i40e_exit_module(void)
11345 pci_unregister_driver(&i40e_driver);
11348 module_exit(i40e_exit_module);