1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 0
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 36
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X710), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_D), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
79 /* required last entry */
82 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
84 #define I40E_MAX_VF_COUNT 128
85 static int debug = -1;
86 module_param(debug, int, 0);
87 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
89 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
90 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
91 MODULE_LICENSE("GPL");
92 MODULE_VERSION(DRV_VERSION);
95 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
96 * @hw: pointer to the HW structure
97 * @mem: ptr to mem struct to fill out
98 * @size: size of memory requested
99 * @alignment: what to align the allocation to
101 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
102 u64 size, u32 alignment)
104 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
106 mem->size = ALIGN(size, alignment);
107 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
108 &mem->pa, GFP_KERNEL);
116 * i40e_free_dma_mem_d - OS specific memory free for shared code
117 * @hw: pointer to the HW structure
118 * @mem: ptr to mem struct to free
120 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
122 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
124 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
133 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
134 * @hw: pointer to the HW structure
135 * @mem: ptr to mem struct to fill out
136 * @size: size of memory requested
138 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
142 mem->va = kzalloc(size, GFP_KERNEL);
151 * i40e_free_virt_mem_d - OS specific memory free for shared code
152 * @hw: pointer to the HW structure
153 * @mem: ptr to mem struct to free
155 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
157 /* it's ok to kfree a NULL pointer */
166 * i40e_get_lump - find a lump of free generic resource
167 * @pf: board private structure
168 * @pile: the pile of resource to search
169 * @needed: the number of items needed
170 * @id: an owner id to stick on the items assigned
172 * Returns the base item index of the lump, or negative for error
174 * The search_hint trick and lack of advanced fit-finding only work
175 * because we're highly likely to have all the same size lump requests.
176 * Linear search time and any fragmentation should be minimal.
178 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
184 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
185 dev_info(&pf->pdev->dev,
186 "param err: pile=%p needed=%d id=0x%04x\n",
191 /* start the linear search with an imperfect hint */
192 i = pile->search_hint;
193 while (i < pile->num_entries) {
194 /* skip already allocated entries */
195 if (pile->list[i] & I40E_PILE_VALID_BIT) {
200 /* do we have enough in this lump? */
201 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
202 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
207 /* there was enough, so assign it to the requestor */
208 for (j = 0; j < needed; j++)
209 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
211 pile->search_hint = i + j;
214 /* not enough, so skip over it and continue looking */
223 * i40e_put_lump - return a lump of generic resource
224 * @pile: the pile of resource to search
225 * @index: the base item index
226 * @id: the owner id of the items assigned
228 * Returns the count of items in the lump
230 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
232 int valid_id = (id | I40E_PILE_VALID_BIT);
236 if (!pile || index >= pile->num_entries)
240 i < pile->num_entries && pile->list[i] == valid_id;
246 if (count && index < pile->search_hint)
247 pile->search_hint = index;
253 * i40e_service_event_schedule - Schedule the service task to wake up
254 * @pf: board private structure
256 * If not already scheduled, this puts the task into the work queue
258 static void i40e_service_event_schedule(struct i40e_pf *pf)
260 if (!test_bit(__I40E_DOWN, &pf->state) &&
261 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
262 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
263 schedule_work(&pf->service_task);
267 * i40e_tx_timeout - Respond to a Tx Hang
268 * @netdev: network interface device structure
270 * If any port has noticed a Tx timeout, it is likely that the whole
271 * device is munged, not just the one netdev port, so go for the full
274 static void i40e_tx_timeout(struct net_device *netdev)
276 struct i40e_netdev_priv *np = netdev_priv(netdev);
277 struct i40e_vsi *vsi = np->vsi;
278 struct i40e_pf *pf = vsi->back;
280 pf->tx_timeout_count++;
282 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
283 pf->tx_timeout_recovery_level = 0;
284 pf->tx_timeout_last_recovery = jiffies;
285 netdev_info(netdev, "tx_timeout recovery level %d\n",
286 pf->tx_timeout_recovery_level);
288 switch (pf->tx_timeout_recovery_level) {
290 /* disable and re-enable queues for the VSI */
291 if (in_interrupt()) {
292 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
293 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
295 i40e_vsi_reinit_locked(vsi);
299 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
302 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
305 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
308 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
309 set_bit(__I40E_DOWN, &vsi->state);
313 i40e_service_event_schedule(pf);
314 pf->tx_timeout_recovery_level++;
318 * i40e_release_rx_desc - Store the new tail and head values
319 * @rx_ring: ring to bump
320 * @val: new head index
322 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
324 rx_ring->next_to_use = val;
326 /* Force memory writes to complete before letting h/w
327 * know there are new descriptors to fetch. (Only
328 * applicable for weak-ordered memory model archs,
332 writel(val, rx_ring->tail);
336 * i40e_get_vsi_stats_struct - Get System Network Statistics
337 * @vsi: the VSI we care about
339 * Returns the address of the device statistics structure.
340 * The statistics are actually updated from the service task.
342 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
344 return &vsi->net_stats;
348 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
349 * @netdev: network interface device structure
351 * Returns the address of the device statistics structure.
352 * The statistics are actually updated from the service task.
354 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
355 struct net_device *netdev,
356 struct rtnl_link_stats64 *stats)
358 struct i40e_netdev_priv *np = netdev_priv(netdev);
359 struct i40e_vsi *vsi = np->vsi;
360 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
363 if (test_bit(__I40E_DOWN, &vsi->state))
370 for (i = 0; i < vsi->num_queue_pairs; i++) {
371 struct i40e_ring *tx_ring, *rx_ring;
375 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
380 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
381 packets = tx_ring->stats.packets;
382 bytes = tx_ring->stats.bytes;
383 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
385 stats->tx_packets += packets;
386 stats->tx_bytes += bytes;
387 rx_ring = &tx_ring[1];
390 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
391 packets = rx_ring->stats.packets;
392 bytes = rx_ring->stats.bytes;
393 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
395 stats->rx_packets += packets;
396 stats->rx_bytes += bytes;
400 /* following stats updated by ixgbe_watchdog_task() */
401 stats->multicast = vsi_stats->multicast;
402 stats->tx_errors = vsi_stats->tx_errors;
403 stats->tx_dropped = vsi_stats->tx_dropped;
404 stats->rx_errors = vsi_stats->rx_errors;
405 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
406 stats->rx_length_errors = vsi_stats->rx_length_errors;
412 * i40e_vsi_reset_stats - Resets all stats of the given vsi
413 * @vsi: the VSI to have its stats reset
415 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
417 struct rtnl_link_stats64 *ns;
423 ns = i40e_get_vsi_stats_struct(vsi);
424 memset(ns, 0, sizeof(*ns));
425 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
426 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
427 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
428 if (vsi->rx_rings && vsi->rx_rings[0]) {
429 for (i = 0; i < vsi->num_queue_pairs; i++) {
430 memset(&vsi->rx_rings[i]->stats, 0 ,
431 sizeof(vsi->rx_rings[i]->stats));
432 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
433 sizeof(vsi->rx_rings[i]->rx_stats));
434 memset(&vsi->tx_rings[i]->stats, 0 ,
435 sizeof(vsi->tx_rings[i]->stats));
436 memset(&vsi->tx_rings[i]->tx_stats, 0,
437 sizeof(vsi->tx_rings[i]->tx_stats));
440 vsi->stat_offsets_loaded = false;
444 * i40e_pf_reset_stats - Reset all of the stats for the given pf
445 * @pf: the PF to be reset
447 void i40e_pf_reset_stats(struct i40e_pf *pf)
449 memset(&pf->stats, 0, sizeof(pf->stats));
450 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
451 pf->stat_offsets_loaded = false;
455 * i40e_stat_update48 - read and update a 48 bit stat from the chip
456 * @hw: ptr to the hardware info
457 * @hireg: the high 32 bit reg to read
458 * @loreg: the low 32 bit reg to read
459 * @offset_loaded: has the initial offset been loaded yet
460 * @offset: ptr to current offset value
461 * @stat: ptr to the stat
463 * Since the device stats are not reset at PFReset, they likely will not
464 * be zeroed when the driver starts. We'll save the first values read
465 * and use them as offsets to be subtracted from the raw values in order
466 * to report stats that count from zero. In the process, we also manage
467 * the potential roll-over.
469 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
470 bool offset_loaded, u64 *offset, u64 *stat)
474 if (hw->device_id == I40E_DEV_ID_QEMU) {
475 new_data = rd32(hw, loreg);
476 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
478 new_data = rd64(hw, loreg);
482 if (likely(new_data >= *offset))
483 *stat = new_data - *offset;
485 *stat = (new_data + ((u64)1 << 48)) - *offset;
486 *stat &= 0xFFFFFFFFFFFFULL;
490 * i40e_stat_update32 - read and update a 32 bit stat from the chip
491 * @hw: ptr to the hardware info
492 * @reg: the hw reg to read
493 * @offset_loaded: has the initial offset been loaded yet
494 * @offset: ptr to current offset value
495 * @stat: ptr to the stat
497 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
498 bool offset_loaded, u64 *offset, u64 *stat)
502 new_data = rd32(hw, reg);
505 if (likely(new_data >= *offset))
506 *stat = (u32)(new_data - *offset);
508 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
512 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
513 * @vsi: the VSI to be updated
515 void i40e_update_eth_stats(struct i40e_vsi *vsi)
517 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
518 struct i40e_pf *pf = vsi->back;
519 struct i40e_hw *hw = &pf->hw;
520 struct i40e_eth_stats *oes;
521 struct i40e_eth_stats *es; /* device's eth stats */
523 es = &vsi->eth_stats;
524 oes = &vsi->eth_stats_offsets;
526 /* Gather up the stats that the hw collects */
527 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
528 vsi->stat_offsets_loaded,
529 &oes->tx_errors, &es->tx_errors);
530 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
531 vsi->stat_offsets_loaded,
532 &oes->rx_discards, &es->rx_discards);
534 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
535 I40E_GLV_GORCL(stat_idx),
536 vsi->stat_offsets_loaded,
537 &oes->rx_bytes, &es->rx_bytes);
538 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
539 I40E_GLV_UPRCL(stat_idx),
540 vsi->stat_offsets_loaded,
541 &oes->rx_unicast, &es->rx_unicast);
542 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
543 I40E_GLV_MPRCL(stat_idx),
544 vsi->stat_offsets_loaded,
545 &oes->rx_multicast, &es->rx_multicast);
546 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
547 I40E_GLV_BPRCL(stat_idx),
548 vsi->stat_offsets_loaded,
549 &oes->rx_broadcast, &es->rx_broadcast);
551 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
552 I40E_GLV_GOTCL(stat_idx),
553 vsi->stat_offsets_loaded,
554 &oes->tx_bytes, &es->tx_bytes);
555 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
556 I40E_GLV_UPTCL(stat_idx),
557 vsi->stat_offsets_loaded,
558 &oes->tx_unicast, &es->tx_unicast);
559 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
560 I40E_GLV_MPTCL(stat_idx),
561 vsi->stat_offsets_loaded,
562 &oes->tx_multicast, &es->tx_multicast);
563 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
564 I40E_GLV_BPTCL(stat_idx),
565 vsi->stat_offsets_loaded,
566 &oes->tx_broadcast, &es->tx_broadcast);
567 vsi->stat_offsets_loaded = true;
571 * i40e_update_veb_stats - Update Switch component statistics
572 * @veb: the VEB being updated
574 static void i40e_update_veb_stats(struct i40e_veb *veb)
576 struct i40e_pf *pf = veb->pf;
577 struct i40e_hw *hw = &pf->hw;
578 struct i40e_eth_stats *oes;
579 struct i40e_eth_stats *es; /* device's eth stats */
582 idx = veb->stats_idx;
584 oes = &veb->stats_offsets;
586 /* Gather up the stats that the hw collects */
587 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
588 veb->stat_offsets_loaded,
589 &oes->tx_discards, &es->tx_discards);
590 if (hw->revision_id > 0)
591 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
592 veb->stat_offsets_loaded,
593 &oes->rx_unknown_protocol,
594 &es->rx_unknown_protocol);
595 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
596 veb->stat_offsets_loaded,
597 &oes->rx_bytes, &es->rx_bytes);
598 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
599 veb->stat_offsets_loaded,
600 &oes->rx_unicast, &es->rx_unicast);
601 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
602 veb->stat_offsets_loaded,
603 &oes->rx_multicast, &es->rx_multicast);
604 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
605 veb->stat_offsets_loaded,
606 &oes->rx_broadcast, &es->rx_broadcast);
608 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
609 veb->stat_offsets_loaded,
610 &oes->tx_bytes, &es->tx_bytes);
611 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
612 veb->stat_offsets_loaded,
613 &oes->tx_unicast, &es->tx_unicast);
614 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_multicast, &es->tx_multicast);
617 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
618 veb->stat_offsets_loaded,
619 &oes->tx_broadcast, &es->tx_broadcast);
620 veb->stat_offsets_loaded = true;
624 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
625 * @pf: the corresponding PF
627 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
629 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
631 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
632 struct i40e_hw_port_stats *nsd = &pf->stats;
633 struct i40e_hw *hw = &pf->hw;
637 if ((hw->fc.current_mode != I40E_FC_FULL) &&
638 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
641 xoff = nsd->link_xoff_rx;
642 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
643 pf->stat_offsets_loaded,
644 &osd->link_xoff_rx, &nsd->link_xoff_rx);
646 /* No new LFC xoff rx */
647 if (!(nsd->link_xoff_rx - xoff))
650 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
651 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
652 struct i40e_vsi *vsi = pf->vsi[v];
657 for (i = 0; i < vsi->num_queue_pairs; i++) {
658 struct i40e_ring *ring = vsi->tx_rings[i];
659 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
665 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
666 * @pf: the corresponding PF
668 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
670 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
672 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
673 struct i40e_hw_port_stats *nsd = &pf->stats;
674 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
675 struct i40e_dcbx_config *dcb_cfg;
676 struct i40e_hw *hw = &pf->hw;
680 dcb_cfg = &hw->local_dcbx_config;
682 /* See if DCB enabled with PFC TC */
683 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
684 !(dcb_cfg->pfc.pfcenable)) {
685 i40e_update_link_xoff_rx(pf);
689 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
690 u64 prio_xoff = nsd->priority_xoff_rx[i];
691 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
692 pf->stat_offsets_loaded,
693 &osd->priority_xoff_rx[i],
694 &nsd->priority_xoff_rx[i]);
696 /* No new PFC xoff rx */
697 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
699 /* Get the TC for given priority */
700 tc = dcb_cfg->etscfg.prioritytable[i];
704 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
705 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
706 struct i40e_vsi *vsi = pf->vsi[v];
711 for (i = 0; i < vsi->num_queue_pairs; i++) {
712 struct i40e_ring *ring = vsi->tx_rings[i];
716 clear_bit(__I40E_HANG_CHECK_ARMED,
723 * i40e_update_stats - Update the board statistics counters.
724 * @vsi: the VSI to be updated
726 * There are a few instances where we store the same stat in a
727 * couple of different structs. This is partly because we have
728 * the netdev stats that need to be filled out, which is slightly
729 * different from the "eth_stats" defined by the chip and used in
730 * VF communications. We sort it all out here in a central place.
732 void i40e_update_stats(struct i40e_vsi *vsi)
734 struct i40e_pf *pf = vsi->back;
735 struct i40e_hw *hw = &pf->hw;
736 struct rtnl_link_stats64 *ons;
737 struct rtnl_link_stats64 *ns; /* netdev stats */
738 struct i40e_eth_stats *oes;
739 struct i40e_eth_stats *es; /* device's eth stats */
740 u32 tx_restart, tx_busy;
748 if (test_bit(__I40E_DOWN, &vsi->state) ||
749 test_bit(__I40E_CONFIG_BUSY, &pf->state))
752 ns = i40e_get_vsi_stats_struct(vsi);
753 ons = &vsi->net_stats_offsets;
754 es = &vsi->eth_stats;
755 oes = &vsi->eth_stats_offsets;
757 /* Gather up the netdev and vsi stats that the driver collects
758 * on the fly during packet processing
762 tx_restart = tx_busy = 0;
766 for (q = 0; q < vsi->num_queue_pairs; q++) {
772 p = ACCESS_ONCE(vsi->tx_rings[q]);
775 start = u64_stats_fetch_begin_irq(&p->syncp);
776 packets = p->stats.packets;
777 bytes = p->stats.bytes;
778 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
781 tx_restart += p->tx_stats.restart_queue;
782 tx_busy += p->tx_stats.tx_busy;
784 /* Rx queue is part of the same block as Tx queue */
787 start = u64_stats_fetch_begin_irq(&p->syncp);
788 packets = p->stats.packets;
789 bytes = p->stats.bytes;
790 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
793 rx_buf += p->rx_stats.alloc_buff_failed;
794 rx_page += p->rx_stats.alloc_page_failed;
797 vsi->tx_restart = tx_restart;
798 vsi->tx_busy = tx_busy;
799 vsi->rx_page_failed = rx_page;
800 vsi->rx_buf_failed = rx_buf;
802 ns->rx_packets = rx_p;
804 ns->tx_packets = tx_p;
807 i40e_update_eth_stats(vsi);
808 /* update netdev stats from eth stats */
809 ons->rx_errors = oes->rx_errors;
810 ns->rx_errors = es->rx_errors;
811 ons->tx_errors = oes->tx_errors;
812 ns->tx_errors = es->tx_errors;
813 ons->multicast = oes->rx_multicast;
814 ns->multicast = es->rx_multicast;
815 ons->tx_dropped = oes->tx_discards;
816 ns->tx_dropped = es->tx_discards;
818 /* Get the port data only if this is the main PF VSI */
819 if (vsi == pf->vsi[pf->lan_vsi]) {
820 struct i40e_hw_port_stats *nsd = &pf->stats;
821 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
823 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
824 I40E_GLPRT_GORCL(hw->port),
825 pf->stat_offsets_loaded,
826 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
827 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
828 I40E_GLPRT_GOTCL(hw->port),
829 pf->stat_offsets_loaded,
830 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
831 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
832 pf->stat_offsets_loaded,
833 &osd->eth.rx_discards,
834 &nsd->eth.rx_discards);
835 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
836 pf->stat_offsets_loaded,
837 &osd->eth.tx_discards,
838 &nsd->eth.tx_discards);
839 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
840 I40E_GLPRT_MPRCL(hw->port),
841 pf->stat_offsets_loaded,
842 &osd->eth.rx_multicast,
843 &nsd->eth.rx_multicast);
845 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
846 pf->stat_offsets_loaded,
847 &osd->tx_dropped_link_down,
848 &nsd->tx_dropped_link_down);
850 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
851 pf->stat_offsets_loaded,
852 &osd->crc_errors, &nsd->crc_errors);
853 ns->rx_crc_errors = nsd->crc_errors;
855 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
856 pf->stat_offsets_loaded,
857 &osd->illegal_bytes, &nsd->illegal_bytes);
858 ns->rx_errors = nsd->crc_errors
859 + nsd->illegal_bytes;
861 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
862 pf->stat_offsets_loaded,
863 &osd->mac_local_faults,
864 &nsd->mac_local_faults);
865 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
866 pf->stat_offsets_loaded,
867 &osd->mac_remote_faults,
868 &nsd->mac_remote_faults);
870 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
871 pf->stat_offsets_loaded,
872 &osd->rx_length_errors,
873 &nsd->rx_length_errors);
874 ns->rx_length_errors = nsd->rx_length_errors;
876 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
877 pf->stat_offsets_loaded,
878 &osd->link_xon_rx, &nsd->link_xon_rx);
879 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->link_xon_tx, &nsd->link_xon_tx);
882 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
883 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
884 pf->stat_offsets_loaded,
885 &osd->link_xoff_tx, &nsd->link_xoff_tx);
887 for (i = 0; i < 8; i++) {
888 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
889 pf->stat_offsets_loaded,
890 &osd->priority_xon_rx[i],
891 &nsd->priority_xon_rx[i]);
892 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
893 pf->stat_offsets_loaded,
894 &osd->priority_xon_tx[i],
895 &nsd->priority_xon_tx[i]);
896 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
897 pf->stat_offsets_loaded,
898 &osd->priority_xoff_tx[i],
899 &nsd->priority_xoff_tx[i]);
900 i40e_stat_update32(hw,
901 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
902 pf->stat_offsets_loaded,
903 &osd->priority_xon_2_xoff[i],
904 &nsd->priority_xon_2_xoff[i]);
907 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
908 I40E_GLPRT_PRC64L(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->rx_size_64, &nsd->rx_size_64);
911 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
912 I40E_GLPRT_PRC127L(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->rx_size_127, &nsd->rx_size_127);
915 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
916 I40E_GLPRT_PRC255L(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->rx_size_255, &nsd->rx_size_255);
919 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
920 I40E_GLPRT_PRC511L(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->rx_size_511, &nsd->rx_size_511);
923 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
924 I40E_GLPRT_PRC1023L(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->rx_size_1023, &nsd->rx_size_1023);
927 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
928 I40E_GLPRT_PRC1522L(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->rx_size_1522, &nsd->rx_size_1522);
931 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
932 I40E_GLPRT_PRC9522L(hw->port),
933 pf->stat_offsets_loaded,
934 &osd->rx_size_big, &nsd->rx_size_big);
936 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
937 I40E_GLPRT_PTC64L(hw->port),
938 pf->stat_offsets_loaded,
939 &osd->tx_size_64, &nsd->tx_size_64);
940 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
941 I40E_GLPRT_PTC127L(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->tx_size_127, &nsd->tx_size_127);
944 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
945 I40E_GLPRT_PTC255L(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->tx_size_255, &nsd->tx_size_255);
948 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
949 I40E_GLPRT_PTC511L(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->tx_size_511, &nsd->tx_size_511);
952 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
953 I40E_GLPRT_PTC1023L(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_size_1023, &nsd->tx_size_1023);
956 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
957 I40E_GLPRT_PTC1522L(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->tx_size_1522, &nsd->tx_size_1522);
960 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
961 I40E_GLPRT_PTC9522L(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->tx_size_big, &nsd->tx_size_big);
965 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->rx_undersize, &nsd->rx_undersize);
968 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->rx_fragments, &nsd->rx_fragments);
971 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->rx_oversize, &nsd->rx_oversize);
974 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_jabber, &nsd->rx_jabber);
978 val = rd32(hw, I40E_PRTPM_EEE_STAT);
980 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
981 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
983 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
984 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
985 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
986 pf->stat_offsets_loaded,
987 &osd->tx_lpi_count, &nsd->tx_lpi_count);
988 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
989 pf->stat_offsets_loaded,
990 &osd->rx_lpi_count, &nsd->rx_lpi_count);
993 pf->stat_offsets_loaded = true;
997 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
998 * @vsi: the VSI to be searched
999 * @macaddr: the MAC address
1001 * @is_vf: make sure its a vf filter, else doesn't matter
1002 * @is_netdev: make sure its a netdev filter, else doesn't matter
1004 * Returns ptr to the filter object or NULL
1006 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1007 u8 *macaddr, s16 vlan,
1008 bool is_vf, bool is_netdev)
1010 struct i40e_mac_filter *f;
1012 if (!vsi || !macaddr)
1015 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1016 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1017 (vlan == f->vlan) &&
1018 (!is_vf || f->is_vf) &&
1019 (!is_netdev || f->is_netdev))
1026 * i40e_find_mac - Find a mac addr in the macvlan filters list
1027 * @vsi: the VSI to be searched
1028 * @macaddr: the MAC address we are searching for
1029 * @is_vf: make sure its a vf filter, else doesn't matter
1030 * @is_netdev: make sure its a netdev filter, else doesn't matter
1032 * Returns the first filter with the provided MAC address or NULL if
1033 * MAC address was not found
1035 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1036 bool is_vf, bool is_netdev)
1038 struct i40e_mac_filter *f;
1040 if (!vsi || !macaddr)
1043 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1044 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1045 (!is_vf || f->is_vf) &&
1046 (!is_netdev || f->is_netdev))
1053 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1054 * @vsi: the VSI to be searched
1056 * Returns true if VSI is in vlan mode or false otherwise
1058 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1060 struct i40e_mac_filter *f;
1062 /* Only -1 for all the filters denotes not in vlan mode
1063 * so we have to go through all the list in order to make sure
1065 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1074 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1075 * @vsi: the VSI to be searched
1076 * @macaddr: the mac address to be filtered
1077 * @is_vf: true if it is a vf
1078 * @is_netdev: true if it is a netdev
1080 * Goes through all the macvlan filters and adds a
1081 * macvlan filter for each unique vlan that already exists
1083 * Returns first filter found on success, else NULL
1085 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1086 bool is_vf, bool is_netdev)
1088 struct i40e_mac_filter *f;
1090 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1091 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1092 is_vf, is_netdev)) {
1093 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1099 return list_first_entry_or_null(&vsi->mac_filter_list,
1100 struct i40e_mac_filter, list);
1104 * i40e_add_filter - Add a mac/vlan filter to the VSI
1105 * @vsi: the VSI to be searched
1106 * @macaddr: the MAC address
1108 * @is_vf: make sure its a vf filter, else doesn't matter
1109 * @is_netdev: make sure its a netdev filter, else doesn't matter
1111 * Returns ptr to the filter object or NULL when no memory available.
1113 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1114 u8 *macaddr, s16 vlan,
1115 bool is_vf, bool is_netdev)
1117 struct i40e_mac_filter *f;
1119 if (!vsi || !macaddr)
1122 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1124 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1126 goto add_filter_out;
1128 memcpy(f->macaddr, macaddr, ETH_ALEN);
1132 INIT_LIST_HEAD(&f->list);
1133 list_add(&f->list, &vsi->mac_filter_list);
1136 /* increment counter and add a new flag if needed */
1142 } else if (is_netdev) {
1143 if (!f->is_netdev) {
1144 f->is_netdev = true;
1151 /* changed tells sync_filters_subtask to
1152 * push the filter down to the firmware
1155 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1156 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1164 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address
1168 * @is_vf: make sure it's a vf filter, else doesn't matter
1169 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1171 void i40e_del_filter(struct i40e_vsi *vsi,
1172 u8 *macaddr, s16 vlan,
1173 bool is_vf, bool is_netdev)
1175 struct i40e_mac_filter *f;
1177 if (!vsi || !macaddr)
1180 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1181 if (!f || f->counter == 0)
1189 } else if (is_netdev) {
1191 f->is_netdev = false;
1195 /* make sure we don't remove a filter in use by vf or netdev */
1197 min_f += (f->is_vf ? 1 : 0);
1198 min_f += (f->is_netdev ? 1 : 0);
1200 if (f->counter > min_f)
1204 /* counter == 0 tells sync_filters_subtask to
1205 * remove the filter from the firmware's list
1207 if (f->counter == 0) {
1209 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1210 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1215 * i40e_set_mac - NDO callback to set mac address
1216 * @netdev: network interface device structure
1217 * @p: pointer to an address structure
1219 * Returns 0 on success, negative on failure
1221 static int i40e_set_mac(struct net_device *netdev, void *p)
1223 struct i40e_netdev_priv *np = netdev_priv(netdev);
1224 struct i40e_vsi *vsi = np->vsi;
1225 struct sockaddr *addr = p;
1226 struct i40e_mac_filter *f;
1228 if (!is_valid_ether_addr(addr->sa_data))
1229 return -EADDRNOTAVAIL;
1231 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1233 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1236 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1237 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1238 return -EADDRNOTAVAIL;
1240 if (vsi->type == I40E_VSI_MAIN) {
1242 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1243 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1244 addr->sa_data, NULL);
1247 "Addr change for Main VSI failed: %d\n",
1249 return -EADDRNOTAVAIL;
1252 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1255 /* In order to be sure to not drop any packets, add the new address
1256 * then delete the old one.
1258 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1262 i40e_sync_vsi_filters(vsi);
1263 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1264 i40e_sync_vsi_filters(vsi);
1266 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1272 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1273 * @vsi: the VSI being setup
1274 * @ctxt: VSI context structure
1275 * @enabled_tc: Enabled TCs bitmap
1276 * @is_add: True if called before Add VSI
1278 * Setup VSI queue mapping for enabled traffic classes.
1280 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1281 struct i40e_vsi_context *ctxt,
1285 struct i40e_pf *pf = vsi->back;
1295 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1298 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1299 /* Find numtc from enabled TC bitmap */
1300 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1301 if (enabled_tc & (1 << i)) /* TC is enabled */
1305 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1309 /* At least TC0 is enabled in case of non-DCB case */
1313 vsi->tc_config.numtc = numtc;
1314 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1315 /* Number of queues per enabled TC */
1316 num_tc_qps = rounddown_pow_of_two(vsi->alloc_queue_pairs/numtc);
1317 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1319 /* Setup queue offset/count for all TCs for given VSI */
1320 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1321 /* See if the given TC is enabled for the given VSI */
1322 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1325 switch (vsi->type) {
1327 qcount = min_t(int, pf->rss_size, num_tc_qps);
1330 case I40E_VSI_SRIOV:
1331 case I40E_VSI_VMDQ2:
1333 qcount = num_tc_qps;
1337 vsi->tc_config.tc_info[i].qoffset = offset;
1338 vsi->tc_config.tc_info[i].qcount = qcount;
1340 /* find the power-of-2 of the number of queue pairs */
1343 while (num_qps && ((1 << pow) < qcount)) {
1348 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1350 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1351 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1355 /* TC is not enabled so set the offset to
1356 * default queue and allocate one queue
1359 vsi->tc_config.tc_info[i].qoffset = 0;
1360 vsi->tc_config.tc_info[i].qcount = 1;
1361 vsi->tc_config.tc_info[i].netdev_tc = 0;
1365 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1368 /* Set actual Tx/Rx queue pairs */
1369 vsi->num_queue_pairs = offset;
1371 /* Scheduler section valid can only be set for ADD VSI */
1373 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1375 ctxt->info.up_enable_bits = enabled_tc;
1377 if (vsi->type == I40E_VSI_SRIOV) {
1378 ctxt->info.mapping_flags |=
1379 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1380 for (i = 0; i < vsi->num_queue_pairs; i++)
1381 ctxt->info.queue_mapping[i] =
1382 cpu_to_le16(vsi->base_queue + i);
1384 ctxt->info.mapping_flags |=
1385 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1386 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1388 ctxt->info.valid_sections |= cpu_to_le16(sections);
1392 * i40e_set_rx_mode - NDO callback to set the netdev filters
1393 * @netdev: network interface device structure
1395 static void i40e_set_rx_mode(struct net_device *netdev)
1397 struct i40e_netdev_priv *np = netdev_priv(netdev);
1398 struct i40e_mac_filter *f, *ftmp;
1399 struct i40e_vsi *vsi = np->vsi;
1400 struct netdev_hw_addr *uca;
1401 struct netdev_hw_addr *mca;
1402 struct netdev_hw_addr *ha;
1404 /* add addr if not already in the filter list */
1405 netdev_for_each_uc_addr(uca, netdev) {
1406 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1407 if (i40e_is_vsi_in_vlan(vsi))
1408 i40e_put_mac_in_vlan(vsi, uca->addr,
1411 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1416 netdev_for_each_mc_addr(mca, netdev) {
1417 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1418 if (i40e_is_vsi_in_vlan(vsi))
1419 i40e_put_mac_in_vlan(vsi, mca->addr,
1422 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1427 /* remove filter if not in netdev list */
1428 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1434 if (is_multicast_ether_addr(f->macaddr)) {
1435 netdev_for_each_mc_addr(mca, netdev) {
1436 if (ether_addr_equal(mca->addr, f->macaddr)) {
1442 netdev_for_each_uc_addr(uca, netdev) {
1443 if (ether_addr_equal(uca->addr, f->macaddr)) {
1449 for_each_dev_addr(netdev, ha) {
1450 if (ether_addr_equal(ha->addr, f->macaddr)) {
1458 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1461 /* check for other flag changes */
1462 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1463 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1464 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1469 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1470 * @vsi: ptr to the VSI
1472 * Push any outstanding VSI filter changes through the AdminQ.
1474 * Returns 0 or error value
1476 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1478 struct i40e_mac_filter *f, *ftmp;
1479 bool promisc_forced_on = false;
1480 bool add_happened = false;
1481 int filter_list_len = 0;
1482 u32 changed_flags = 0;
1483 i40e_status aq_ret = 0;
1489 /* empty array typed pointers, kcalloc later */
1490 struct i40e_aqc_add_macvlan_element_data *add_list;
1491 struct i40e_aqc_remove_macvlan_element_data *del_list;
1493 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1494 usleep_range(1000, 2000);
1498 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1499 vsi->current_netdev_flags = vsi->netdev->flags;
1502 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1503 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1505 filter_list_len = pf->hw.aq.asq_buf_size /
1506 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1507 del_list = kcalloc(filter_list_len,
1508 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1513 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1517 if (f->counter != 0)
1522 /* add to delete list */
1523 memcpy(del_list[num_del].mac_addr,
1524 f->macaddr, ETH_ALEN);
1525 del_list[num_del].vlan_tag =
1526 cpu_to_le16((u16)(f->vlan ==
1527 I40E_VLAN_ANY ? 0 : f->vlan));
1529 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1530 del_list[num_del].flags = cmd_flags;
1533 /* unlink from filter list */
1537 /* flush a full buffer */
1538 if (num_del == filter_list_len) {
1539 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1540 vsi->seid, del_list, num_del,
1543 memset(del_list, 0, sizeof(*del_list));
1546 dev_info(&pf->pdev->dev,
1547 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1549 pf->hw.aq.asq_last_status);
1553 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1554 del_list, num_del, NULL);
1558 dev_info(&pf->pdev->dev,
1559 "ignoring delete macvlan error, err %d, aq_err %d\n",
1560 aq_ret, pf->hw.aq.asq_last_status);
1566 /* do all the adds now */
1567 filter_list_len = pf->hw.aq.asq_buf_size /
1568 sizeof(struct i40e_aqc_add_macvlan_element_data),
1569 add_list = kcalloc(filter_list_len,
1570 sizeof(struct i40e_aqc_add_macvlan_element_data),
1575 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1579 if (f->counter == 0)
1582 add_happened = true;
1585 /* add to add array */
1586 memcpy(add_list[num_add].mac_addr,
1587 f->macaddr, ETH_ALEN);
1588 add_list[num_add].vlan_tag =
1590 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1591 add_list[num_add].queue_number = 0;
1593 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1594 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1597 /* flush a full buffer */
1598 if (num_add == filter_list_len) {
1599 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1606 memset(add_list, 0, sizeof(*add_list));
1610 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1611 add_list, num_add, NULL);
1617 if (add_happened && (!aq_ret)) {
1619 } else if (add_happened && (aq_ret)) {
1620 dev_info(&pf->pdev->dev,
1621 "add filter failed, err %d, aq_err %d\n",
1622 aq_ret, pf->hw.aq.asq_last_status);
1623 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1624 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1626 promisc_forced_on = true;
1627 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1629 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1634 /* check for changes in promiscuous modes */
1635 if (changed_flags & IFF_ALLMULTI) {
1636 bool cur_multipromisc;
1637 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1638 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1643 dev_info(&pf->pdev->dev,
1644 "set multi promisc failed, err %d, aq_err %d\n",
1645 aq_ret, pf->hw.aq.asq_last_status);
1647 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1649 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1650 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1652 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1656 dev_info(&pf->pdev->dev,
1657 "set uni promisc failed, err %d, aq_err %d\n",
1658 aq_ret, pf->hw.aq.asq_last_status);
1659 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1663 dev_info(&pf->pdev->dev,
1664 "set brdcast promisc failed, err %d, aq_err %d\n",
1665 aq_ret, pf->hw.aq.asq_last_status);
1668 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1673 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1674 * @pf: board private structure
1676 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1680 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1682 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1684 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1686 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1687 i40e_sync_vsi_filters(pf->vsi[v]);
1692 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1693 * @netdev: network interface device structure
1694 * @new_mtu: new value for maximum frame size
1696 * Returns 0 on success, negative on failure
1698 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1700 struct i40e_netdev_priv *np = netdev_priv(netdev);
1701 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1702 struct i40e_vsi *vsi = np->vsi;
1704 /* MTU < 68 is an error and causes problems on some kernels */
1705 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1708 netdev_info(netdev, "changing MTU from %d to %d\n",
1709 netdev->mtu, new_mtu);
1710 netdev->mtu = new_mtu;
1711 if (netif_running(netdev))
1712 i40e_vsi_reinit_locked(vsi);
1718 * i40e_ioctl - Access the hwtstamp interface
1719 * @netdev: network interface device structure
1720 * @ifr: interface request data
1721 * @cmd: ioctl command
1723 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1725 struct i40e_netdev_priv *np = netdev_priv(netdev);
1726 struct i40e_pf *pf = np->vsi->back;
1730 return i40e_ptp_get_ts_config(pf, ifr);
1732 return i40e_ptp_set_ts_config(pf, ifr);
1739 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1740 * @vsi: the vsi being adjusted
1742 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1744 struct i40e_vsi_context ctxt;
1747 if ((vsi->info.valid_sections &
1748 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1749 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1750 return; /* already enabled */
1752 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1753 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1754 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1756 ctxt.seid = vsi->seid;
1757 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1758 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1760 dev_info(&vsi->back->pdev->dev,
1761 "%s: update vsi failed, aq_err=%d\n",
1762 __func__, vsi->back->hw.aq.asq_last_status);
1767 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1768 * @vsi: the vsi being adjusted
1770 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1772 struct i40e_vsi_context ctxt;
1775 if ((vsi->info.valid_sections &
1776 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1777 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1778 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1779 return; /* already disabled */
1781 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1782 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1783 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1785 ctxt.seid = vsi->seid;
1786 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1787 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1789 dev_info(&vsi->back->pdev->dev,
1790 "%s: update vsi failed, aq_err=%d\n",
1791 __func__, vsi->back->hw.aq.asq_last_status);
1796 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1797 * @netdev: network interface to be adjusted
1798 * @features: netdev features to test if VLAN offload is enabled or not
1800 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1802 struct i40e_netdev_priv *np = netdev_priv(netdev);
1803 struct i40e_vsi *vsi = np->vsi;
1805 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1806 i40e_vlan_stripping_enable(vsi);
1808 i40e_vlan_stripping_disable(vsi);
1812 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1813 * @vsi: the vsi being configured
1814 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1816 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1818 struct i40e_mac_filter *f, *add_f;
1819 bool is_netdev, is_vf;
1821 is_vf = (vsi->type == I40E_VSI_SRIOV);
1822 is_netdev = !!(vsi->netdev);
1825 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1828 dev_info(&vsi->back->pdev->dev,
1829 "Could not add vlan filter %d for %pM\n",
1830 vid, vsi->netdev->dev_addr);
1835 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1836 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1838 dev_info(&vsi->back->pdev->dev,
1839 "Could not add vlan filter %d for %pM\n",
1845 /* Now if we add a vlan tag, make sure to check if it is the first
1846 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1847 * with 0, so we now accept untagged and specified tagged traffic
1848 * (and not any taged and untagged)
1851 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1853 is_vf, is_netdev)) {
1854 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1855 I40E_VLAN_ANY, is_vf, is_netdev);
1856 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1859 dev_info(&vsi->back->pdev->dev,
1860 "Could not add filter 0 for %pM\n",
1861 vsi->netdev->dev_addr);
1867 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1868 if (vid > 0 && !vsi->info.pvid) {
1869 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1870 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1871 is_vf, is_netdev)) {
1872 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1874 add_f = i40e_add_filter(vsi, f->macaddr,
1875 0, is_vf, is_netdev);
1877 dev_info(&vsi->back->pdev->dev,
1878 "Could not add filter 0 for %pM\n",
1886 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1887 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1890 return i40e_sync_vsi_filters(vsi);
1894 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1895 * @vsi: the vsi being configured
1896 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1898 * Return: 0 on success or negative otherwise
1900 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1902 struct net_device *netdev = vsi->netdev;
1903 struct i40e_mac_filter *f, *add_f;
1904 bool is_vf, is_netdev;
1905 int filter_count = 0;
1907 is_vf = (vsi->type == I40E_VSI_SRIOV);
1908 is_netdev = !!(netdev);
1911 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1913 list_for_each_entry(f, &vsi->mac_filter_list, list)
1914 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1916 /* go through all the filters for this VSI and if there is only
1917 * vid == 0 it means there are no other filters, so vid 0 must
1918 * be replaced with -1. This signifies that we should from now
1919 * on accept any traffic (with any tag present, or untagged)
1921 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1924 ether_addr_equal(netdev->dev_addr, f->macaddr))
1932 if (!filter_count && is_netdev) {
1933 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1934 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1937 dev_info(&vsi->back->pdev->dev,
1938 "Could not add filter %d for %pM\n",
1939 I40E_VLAN_ANY, netdev->dev_addr);
1944 if (!filter_count) {
1945 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1946 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1947 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1950 dev_info(&vsi->back->pdev->dev,
1951 "Could not add filter %d for %pM\n",
1952 I40E_VLAN_ANY, f->macaddr);
1958 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1959 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1962 return i40e_sync_vsi_filters(vsi);
1966 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1967 * @netdev: network interface to be adjusted
1968 * @vid: vlan id to be added
1970 * net_device_ops implementation for adding vlan ids
1972 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1973 __always_unused __be16 proto, u16 vid)
1975 struct i40e_netdev_priv *np = netdev_priv(netdev);
1976 struct i40e_vsi *vsi = np->vsi;
1982 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1984 /* If the network stack called us with vid = 0 then
1985 * it is asking to receive priority tagged packets with
1986 * vlan id 0. Our HW receives them by default when configured
1987 * to receive untagged packets so there is no need to add an
1988 * extra filter for vlan 0 tagged packets.
1991 ret = i40e_vsi_add_vlan(vsi, vid);
1993 if (!ret && (vid < VLAN_N_VID))
1994 set_bit(vid, vsi->active_vlans);
2000 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2001 * @netdev: network interface to be adjusted
2002 * @vid: vlan id to be removed
2004 * net_device_ops implementation for removing vlan ids
2006 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2007 __always_unused __be16 proto, u16 vid)
2009 struct i40e_netdev_priv *np = netdev_priv(netdev);
2010 struct i40e_vsi *vsi = np->vsi;
2012 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2014 /* return code is ignored as there is nothing a user
2015 * can do about failure to remove and a log message was
2016 * already printed from the other function
2018 i40e_vsi_kill_vlan(vsi, vid);
2020 clear_bit(vid, vsi->active_vlans);
2026 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2027 * @vsi: the vsi being brought back up
2029 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2036 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2038 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2039 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2044 * i40e_vsi_add_pvid - Add pvid for the VSI
2045 * @vsi: the vsi being adjusted
2046 * @vid: the vlan id to set as a PVID
2048 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2050 struct i40e_vsi_context ctxt;
2053 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2054 vsi->info.pvid = cpu_to_le16(vid);
2055 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2056 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2057 I40E_AQ_VSI_PVLAN_EMOD_STR;
2059 ctxt.seid = vsi->seid;
2060 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2061 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2063 dev_info(&vsi->back->pdev->dev,
2064 "%s: update vsi failed, aq_err=%d\n",
2065 __func__, vsi->back->hw.aq.asq_last_status);
2073 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2074 * @vsi: the vsi being adjusted
2076 * Just use the vlan_rx_register() service to put it back to normal
2078 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2080 i40e_vlan_stripping_disable(vsi);
2086 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2087 * @vsi: ptr to the VSI
2089 * If this function returns with an error, then it's possible one or
2090 * more of the rings is populated (while the rest are not). It is the
2091 * callers duty to clean those orphaned rings.
2093 * Return 0 on success, negative on failure
2095 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2099 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2100 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2106 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2107 * @vsi: ptr to the VSI
2109 * Free VSI's transmit software resources
2111 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2118 for (i = 0; i < vsi->num_queue_pairs; i++)
2119 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2120 i40e_free_tx_resources(vsi->tx_rings[i]);
2124 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2125 * @vsi: ptr to the VSI
2127 * If this function returns with an error, then it's possible one or
2128 * more of the rings is populated (while the rest are not). It is the
2129 * callers duty to clean those orphaned rings.
2131 * Return 0 on success, negative on failure
2133 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2137 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2138 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2143 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2144 * @vsi: ptr to the VSI
2146 * Free all receive software resources
2148 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2155 for (i = 0; i < vsi->num_queue_pairs; i++)
2156 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2157 i40e_free_rx_resources(vsi->rx_rings[i]);
2161 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2162 * @ring: The Tx ring to configure
2164 * Configure the Tx descriptor ring in the HMC context.
2166 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2168 struct i40e_vsi *vsi = ring->vsi;
2169 u16 pf_q = vsi->base_queue + ring->queue_index;
2170 struct i40e_hw *hw = &vsi->back->hw;
2171 struct i40e_hmc_obj_txq tx_ctx;
2172 i40e_status err = 0;
2175 /* some ATR related tx ring init */
2176 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2177 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2178 ring->atr_count = 0;
2180 ring->atr_sample_rate = 0;
2183 /* initialize XPS */
2184 if (ring->q_vector && ring->netdev &&
2185 vsi->tc_config.numtc <= 1 &&
2186 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2187 netif_set_xps_queue(ring->netdev,
2188 &ring->q_vector->affinity_mask,
2191 /* clear the context structure first */
2192 memset(&tx_ctx, 0, sizeof(tx_ctx));
2194 tx_ctx.new_context = 1;
2195 tx_ctx.base = (ring->dma / 128);
2196 tx_ctx.qlen = ring->count;
2197 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2198 I40E_FLAG_FD_ATR_ENABLED));
2199 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2200 /* FDIR VSI tx ring can still use RS bit and writebacks */
2201 if (vsi->type != I40E_VSI_FDIR)
2202 tx_ctx.head_wb_ena = 1;
2203 tx_ctx.head_wb_addr = ring->dma +
2204 (ring->count * sizeof(struct i40e_tx_desc));
2206 /* As part of VSI creation/update, FW allocates certain
2207 * Tx arbitration queue sets for each TC enabled for
2208 * the VSI. The FW returns the handles to these queue
2209 * sets as part of the response buffer to Add VSI,
2210 * Update VSI, etc. AQ commands. It is expected that
2211 * these queue set handles be associated with the Tx
2212 * queues by the driver as part of the TX queue context
2213 * initialization. This has to be done regardless of
2214 * DCB as by default everything is mapped to TC0.
2216 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2217 tx_ctx.rdylist_act = 0;
2219 /* clear the context in the HMC */
2220 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2222 dev_info(&vsi->back->pdev->dev,
2223 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2224 ring->queue_index, pf_q, err);
2228 /* set the context in the HMC */
2229 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2231 dev_info(&vsi->back->pdev->dev,
2232 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2233 ring->queue_index, pf_q, err);
2237 /* Now associate this queue with this PCI function */
2238 if (vsi->type == I40E_VSI_VMDQ2)
2239 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2241 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2242 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2243 I40E_QTX_CTL_PF_INDX_MASK);
2244 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2247 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2249 /* cache tail off for easier writes later */
2250 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2256 * i40e_configure_rx_ring - Configure a receive ring context
2257 * @ring: The Rx ring to configure
2259 * Configure the Rx descriptor ring in the HMC context.
2261 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2263 struct i40e_vsi *vsi = ring->vsi;
2264 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2265 u16 pf_q = vsi->base_queue + ring->queue_index;
2266 struct i40e_hw *hw = &vsi->back->hw;
2267 struct i40e_hmc_obj_rxq rx_ctx;
2268 i40e_status err = 0;
2272 /* clear the context structure first */
2273 memset(&rx_ctx, 0, sizeof(rx_ctx));
2275 ring->rx_buf_len = vsi->rx_buf_len;
2276 ring->rx_hdr_len = vsi->rx_hdr_len;
2278 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2279 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2281 rx_ctx.base = (ring->dma / 128);
2282 rx_ctx.qlen = ring->count;
2284 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2285 set_ring_16byte_desc_enabled(ring);
2291 rx_ctx.dtype = vsi->dtype;
2293 set_ring_ps_enabled(ring);
2294 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2296 I40E_RX_SPLIT_TCP_UDP |
2299 rx_ctx.hsplit_0 = 0;
2302 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2303 (chain_len * ring->rx_buf_len));
2304 rx_ctx.tphrdesc_ena = 1;
2305 rx_ctx.tphwdesc_ena = 1;
2306 rx_ctx.tphdata_ena = 1;
2307 rx_ctx.tphhead_ena = 1;
2308 if (hw->revision_id == 0)
2309 rx_ctx.lrxqthresh = 0;
2311 rx_ctx.lrxqthresh = 2;
2312 rx_ctx.crcstrip = 1;
2316 /* clear the context in the HMC */
2317 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2319 dev_info(&vsi->back->pdev->dev,
2320 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2321 ring->queue_index, pf_q, err);
2325 /* set the context in the HMC */
2326 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2328 dev_info(&vsi->back->pdev->dev,
2329 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2330 ring->queue_index, pf_q, err);
2334 /* cache tail for quicker writes, and clear the reg before use */
2335 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2336 writel(0, ring->tail);
2338 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2344 * i40e_vsi_configure_tx - Configure the VSI for Tx
2345 * @vsi: VSI structure describing this set of rings and resources
2347 * Configure the Tx VSI for operation.
2349 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2354 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2355 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2361 * i40e_vsi_configure_rx - Configure the VSI for Rx
2362 * @vsi: the VSI being configured
2364 * Configure the Rx VSI for operation.
2366 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2371 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2372 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2373 + ETH_FCS_LEN + VLAN_HLEN;
2375 vsi->max_frame = I40E_RXBUFFER_2048;
2377 /* figure out correct receive buffer length */
2378 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2379 I40E_FLAG_RX_PS_ENABLED)) {
2380 case I40E_FLAG_RX_1BUF_ENABLED:
2381 vsi->rx_hdr_len = 0;
2382 vsi->rx_buf_len = vsi->max_frame;
2383 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2385 case I40E_FLAG_RX_PS_ENABLED:
2386 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2387 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2388 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2391 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2392 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2393 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2397 /* round up for the chip's needs */
2398 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2399 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2400 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2401 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2403 /* set up individual rings */
2404 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2405 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2411 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2412 * @vsi: ptr to the VSI
2414 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2416 u16 qoffset, qcount;
2419 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2422 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2423 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2426 qoffset = vsi->tc_config.tc_info[n].qoffset;
2427 qcount = vsi->tc_config.tc_info[n].qcount;
2428 for (i = qoffset; i < (qoffset + qcount); i++) {
2429 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2430 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2431 rx_ring->dcb_tc = n;
2432 tx_ring->dcb_tc = n;
2438 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2439 * @vsi: ptr to the VSI
2441 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2444 i40e_set_rx_mode(vsi->netdev);
2448 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2449 * @vsi: Pointer to the targeted VSI
2451 * This function replays the hlist on the hw where all the SB Flow Director
2452 * filters were saved.
2454 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2456 struct i40e_fdir_filter *filter;
2457 struct i40e_pf *pf = vsi->back;
2458 struct hlist_node *node;
2460 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2463 hlist_for_each_entry_safe(filter, node,
2464 &pf->fdir_filter_list, fdir_node) {
2465 i40e_add_del_fdir(vsi, filter, true);
2470 * i40e_vsi_configure - Set up the VSI for action
2471 * @vsi: the VSI being configured
2473 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2477 i40e_set_vsi_rx_mode(vsi);
2478 i40e_restore_vlan(vsi);
2479 i40e_vsi_config_dcb_rings(vsi);
2480 err = i40e_vsi_configure_tx(vsi);
2482 err = i40e_vsi_configure_rx(vsi);
2488 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2489 * @vsi: the VSI being configured
2491 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2493 struct i40e_pf *pf = vsi->back;
2494 struct i40e_q_vector *q_vector;
2495 struct i40e_hw *hw = &pf->hw;
2501 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2502 * and PFINT_LNKLSTn registers, e.g.:
2503 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2505 qp = vsi->base_queue;
2506 vector = vsi->base_vector;
2507 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2508 q_vector = vsi->q_vectors[i];
2509 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2510 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2511 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2513 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2514 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2515 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2518 /* Linked list for the queuepairs assigned to this vector */
2519 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2520 for (q = 0; q < q_vector->num_ringpairs; q++) {
2521 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2522 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2523 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2524 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2526 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2528 wr32(hw, I40E_QINT_RQCTL(qp), val);
2530 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2531 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2532 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2533 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2535 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2537 /* Terminate the linked list */
2538 if (q == (q_vector->num_ringpairs - 1))
2539 val |= (I40E_QUEUE_END_OF_LIST
2540 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2542 wr32(hw, I40E_QINT_TQCTL(qp), val);
2551 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2552 * @hw: ptr to the hardware info
2554 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2558 /* clear things first */
2559 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2560 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2562 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2563 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2564 I40E_PFINT_ICR0_ENA_GRST_MASK |
2565 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2566 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2567 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2568 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2569 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2570 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2571 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2573 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2575 /* SW_ITR_IDX = 0, but don't change INTENA */
2576 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2577 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2579 /* OTHER_ITR_IDX = 0 */
2580 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2584 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2585 * @vsi: the VSI being configured
2587 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2589 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2590 struct i40e_pf *pf = vsi->back;
2591 struct i40e_hw *hw = &pf->hw;
2594 /* set the ITR configuration */
2595 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2596 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2597 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2598 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2599 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2600 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2602 i40e_enable_misc_int_causes(hw);
2604 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2605 wr32(hw, I40E_PFINT_LNKLST0, 0);
2607 /* Associate the queue pair to the vector and enable the queue int */
2608 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2609 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2610 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2612 wr32(hw, I40E_QINT_RQCTL(0), val);
2614 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2615 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2616 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2618 wr32(hw, I40E_QINT_TQCTL(0), val);
2623 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2624 * @pf: board private structure
2626 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2628 struct i40e_hw *hw = &pf->hw;
2630 wr32(hw, I40E_PFINT_DYN_CTL0,
2631 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2636 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2637 * @pf: board private structure
2639 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2641 struct i40e_hw *hw = &pf->hw;
2644 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2645 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2646 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2648 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2653 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2654 * @vsi: pointer to a vsi
2655 * @vector: enable a particular Hw Interrupt vector
2657 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2659 struct i40e_pf *pf = vsi->back;
2660 struct i40e_hw *hw = &pf->hw;
2663 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2664 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2665 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2666 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2667 /* skip the flush */
2671 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2672 * @irq: interrupt number
2673 * @data: pointer to a q_vector
2675 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2677 struct i40e_q_vector *q_vector = data;
2679 if (!q_vector->tx.ring && !q_vector->rx.ring)
2682 napi_schedule(&q_vector->napi);
2688 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2689 * @vsi: the VSI being configured
2690 * @basename: name for the vector
2692 * Allocates MSI-X vectors and requests interrupts from the kernel.
2694 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2696 int q_vectors = vsi->num_q_vectors;
2697 struct i40e_pf *pf = vsi->back;
2698 int base = vsi->base_vector;
2703 for (vector = 0; vector < q_vectors; vector++) {
2704 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2706 if (q_vector->tx.ring && q_vector->rx.ring) {
2707 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2708 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2710 } else if (q_vector->rx.ring) {
2711 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2712 "%s-%s-%d", basename, "rx", rx_int_idx++);
2713 } else if (q_vector->tx.ring) {
2714 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2715 "%s-%s-%d", basename, "tx", tx_int_idx++);
2717 /* skip this unused q_vector */
2720 err = request_irq(pf->msix_entries[base + vector].vector,
2726 dev_info(&pf->pdev->dev,
2727 "%s: request_irq failed, error: %d\n",
2729 goto free_queue_irqs;
2731 /* assign the mask for this irq */
2732 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2733 &q_vector->affinity_mask);
2741 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2743 free_irq(pf->msix_entries[base + vector].vector,
2744 &(vsi->q_vectors[vector]));
2750 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2751 * @vsi: the VSI being un-configured
2753 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2755 struct i40e_pf *pf = vsi->back;
2756 struct i40e_hw *hw = &pf->hw;
2757 int base = vsi->base_vector;
2760 for (i = 0; i < vsi->num_queue_pairs; i++) {
2761 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2762 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2765 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2766 for (i = vsi->base_vector;
2767 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2768 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2771 for (i = 0; i < vsi->num_q_vectors; i++)
2772 synchronize_irq(pf->msix_entries[i + base].vector);
2774 /* Legacy and MSI mode - this stops all interrupt handling */
2775 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2776 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2778 synchronize_irq(pf->pdev->irq);
2783 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2784 * @vsi: the VSI being configured
2786 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2788 struct i40e_pf *pf = vsi->back;
2791 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2792 for (i = vsi->base_vector;
2793 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2794 i40e_irq_dynamic_enable(vsi, i);
2796 i40e_irq_dynamic_enable_icr0(pf);
2799 i40e_flush(&pf->hw);
2804 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2805 * @pf: board private structure
2807 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2810 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2811 i40e_flush(&pf->hw);
2815 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2816 * @irq: interrupt number
2817 * @data: pointer to a q_vector
2819 * This is the handler used for all MSI/Legacy interrupts, and deals
2820 * with both queue and non-queue interrupts. This is also used in
2821 * MSIX mode to handle the non-queue interrupts.
2823 static irqreturn_t i40e_intr(int irq, void *data)
2825 struct i40e_pf *pf = (struct i40e_pf *)data;
2826 struct i40e_hw *hw = &pf->hw;
2827 irqreturn_t ret = IRQ_NONE;
2828 u32 icr0, icr0_remaining;
2831 icr0 = rd32(hw, I40E_PFINT_ICR0);
2832 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2834 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2835 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2838 /* if interrupt but no bits showing, must be SWINT */
2839 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2840 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2843 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2844 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2846 /* temporarily disable queue cause for NAPI processing */
2847 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2848 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2849 wr32(hw, I40E_QINT_RQCTL(0), qval);
2851 qval = rd32(hw, I40E_QINT_TQCTL(0));
2852 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2853 wr32(hw, I40E_QINT_TQCTL(0), qval);
2855 if (!test_bit(__I40E_DOWN, &pf->state))
2856 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2859 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2860 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2861 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2864 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2865 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2866 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2869 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2870 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2871 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2874 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2875 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2876 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2877 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2878 val = rd32(hw, I40E_GLGEN_RSTAT);
2879 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2880 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2881 if (val == I40E_RESET_CORER) {
2883 } else if (val == I40E_RESET_GLOBR) {
2885 } else if (val == I40E_RESET_EMPR) {
2887 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
2891 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2892 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2893 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2896 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
2897 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
2899 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
2900 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2901 i40e_ptp_tx_hwtstamp(pf);
2905 /* If a critical error is pending we have no choice but to reset the
2907 * Report and mask out any remaining unexpected interrupts.
2909 icr0_remaining = icr0 & ena_mask;
2910 if (icr0_remaining) {
2911 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2913 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2914 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2915 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
2916 dev_info(&pf->pdev->dev, "device will be reset\n");
2917 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2918 i40e_service_event_schedule(pf);
2920 ena_mask &= ~icr0_remaining;
2925 /* re-enable interrupt causes */
2926 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2927 if (!test_bit(__I40E_DOWN, &pf->state)) {
2928 i40e_service_event_schedule(pf);
2929 i40e_irq_dynamic_enable_icr0(pf);
2936 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
2937 * @tx_ring: tx ring to clean
2938 * @budget: how many cleans we're allowed
2940 * Returns true if there's any budget left (e.g. the clean is finished)
2942 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
2944 struct i40e_vsi *vsi = tx_ring->vsi;
2945 u16 i = tx_ring->next_to_clean;
2946 struct i40e_tx_buffer *tx_buf;
2947 struct i40e_tx_desc *tx_desc;
2949 tx_buf = &tx_ring->tx_bi[i];
2950 tx_desc = I40E_TX_DESC(tx_ring, i);
2951 i -= tx_ring->count;
2954 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
2956 /* if next_to_watch is not set then there is no work pending */
2960 /* prevent any other reads prior to eop_desc */
2961 read_barrier_depends();
2963 /* if the descriptor isn't done, no work yet to do */
2964 if (!(eop_desc->cmd_type_offset_bsz &
2965 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
2968 /* clear next_to_watch to prevent false hangs */
2969 tx_buf->next_to_watch = NULL;
2971 /* unmap skb header data */
2972 dma_unmap_single(tx_ring->dev,
2973 dma_unmap_addr(tx_buf, dma),
2974 dma_unmap_len(tx_buf, len),
2977 dma_unmap_len_set(tx_buf, len, 0);
2980 /* move to the next desc and buffer to clean */
2985 i -= tx_ring->count;
2986 tx_buf = tx_ring->tx_bi;
2987 tx_desc = I40E_TX_DESC(tx_ring, 0);
2990 /* update budget accounting */
2992 } while (likely(budget));
2994 i += tx_ring->count;
2995 tx_ring->next_to_clean = i;
2997 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
2998 i40e_irq_dynamic_enable(vsi,
2999 tx_ring->q_vector->v_idx + vsi->base_vector);
3005 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3006 * @irq: interrupt number
3007 * @data: pointer to a q_vector
3009 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3011 struct i40e_q_vector *q_vector = data;
3012 struct i40e_vsi *vsi;
3014 if (!q_vector->tx.ring)
3017 vsi = q_vector->tx.ring->vsi;
3018 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3024 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3025 * @vsi: the VSI being configured
3026 * @v_idx: vector index
3027 * @qp_idx: queue pair index
3029 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3031 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3032 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3033 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3035 tx_ring->q_vector = q_vector;
3036 tx_ring->next = q_vector->tx.ring;
3037 q_vector->tx.ring = tx_ring;
3038 q_vector->tx.count++;
3040 rx_ring->q_vector = q_vector;
3041 rx_ring->next = q_vector->rx.ring;
3042 q_vector->rx.ring = rx_ring;
3043 q_vector->rx.count++;
3047 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3048 * @vsi: the VSI being configured
3050 * This function maps descriptor rings to the queue-specific vectors
3051 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3052 * one vector per queue pair, but on a constrained vector budget, we
3053 * group the queue pairs as "efficiently" as possible.
3055 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3057 int qp_remaining = vsi->num_queue_pairs;
3058 int q_vectors = vsi->num_q_vectors;
3063 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3064 * group them so there are multiple queues per vector.
3066 for (; v_start < q_vectors && qp_remaining; v_start++) {
3067 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3069 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3071 q_vector->num_ringpairs = num_ringpairs;
3073 q_vector->rx.count = 0;
3074 q_vector->tx.count = 0;
3075 q_vector->rx.ring = NULL;
3076 q_vector->tx.ring = NULL;
3078 while (num_ringpairs--) {
3079 map_vector_to_qp(vsi, v_start, qp_idx);
3087 * i40e_vsi_request_irq - Request IRQ from the OS
3088 * @vsi: the VSI being configured
3089 * @basename: name for the vector
3091 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3093 struct i40e_pf *pf = vsi->back;
3096 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3097 err = i40e_vsi_request_irq_msix(vsi, basename);
3098 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3099 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3100 pf->misc_int_name, pf);
3102 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3103 pf->misc_int_name, pf);
3106 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3111 #ifdef CONFIG_NET_POLL_CONTROLLER
3113 * i40e_netpoll - A Polling 'interrupt'handler
3114 * @netdev: network interface device structure
3116 * This is used by netconsole to send skbs without having to re-enable
3117 * interrupts. It's not called while the normal interrupt routine is executing.
3119 static void i40e_netpoll(struct net_device *netdev)
3121 struct i40e_netdev_priv *np = netdev_priv(netdev);
3122 struct i40e_vsi *vsi = np->vsi;
3123 struct i40e_pf *pf = vsi->back;
3126 /* if interface is down do nothing */
3127 if (test_bit(__I40E_DOWN, &vsi->state))
3130 pf->flags |= I40E_FLAG_IN_NETPOLL;
3131 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3132 for (i = 0; i < vsi->num_q_vectors; i++)
3133 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3135 i40e_intr(pf->pdev->irq, netdev);
3137 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3142 * i40e_vsi_control_tx - Start or stop a VSI's rings
3143 * @vsi: the VSI being configured
3144 * @enable: start or stop the rings
3146 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3148 struct i40e_pf *pf = vsi->back;
3149 struct i40e_hw *hw = &pf->hw;
3153 pf_q = vsi->base_queue;
3154 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3155 for (j = 0; j < 50; j++) {
3156 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3157 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3158 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3160 usleep_range(1000, 2000);
3162 /* Skip if the queue is already in the requested state */
3163 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3165 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3168 /* turn on/off the queue */
3170 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3171 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3173 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3176 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3178 /* wait for the change to finish */
3179 for (j = 0; j < 10; j++) {
3180 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3182 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3185 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3192 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3193 pf_q, (enable ? "en" : "dis"));
3198 if (hw->revision_id == 0)
3205 * i40e_vsi_control_rx - Start or stop a VSI's rings
3206 * @vsi: the VSI being configured
3207 * @enable: start or stop the rings
3209 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3211 struct i40e_pf *pf = vsi->back;
3212 struct i40e_hw *hw = &pf->hw;
3216 pf_q = vsi->base_queue;
3217 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3218 for (j = 0; j < 50; j++) {
3219 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3220 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3221 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3223 usleep_range(1000, 2000);
3228 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3231 /* is !STAT set ? */
3232 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3236 /* turn on/off the queue */
3238 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3240 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3241 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3243 /* wait for the change to finish */
3244 for (j = 0; j < 10; j++) {
3245 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3248 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3251 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3258 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3259 pf_q, (enable ? "en" : "dis"));
3268 * i40e_vsi_control_rings - Start or stop a VSI's rings
3269 * @vsi: the VSI being configured
3270 * @enable: start or stop the rings
3272 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3276 /* do rx first for enable and last for disable */
3278 ret = i40e_vsi_control_rx(vsi, request);
3281 ret = i40e_vsi_control_tx(vsi, request);
3283 /* Ignore return value, we need to shutdown whatever we can */
3284 i40e_vsi_control_tx(vsi, request);
3285 i40e_vsi_control_rx(vsi, request);
3292 * i40e_vsi_free_irq - Free the irq association with the OS
3293 * @vsi: the VSI being configured
3295 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3297 struct i40e_pf *pf = vsi->back;
3298 struct i40e_hw *hw = &pf->hw;
3299 int base = vsi->base_vector;
3303 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3304 if (!vsi->q_vectors)
3307 for (i = 0; i < vsi->num_q_vectors; i++) {
3308 u16 vector = i + base;
3310 /* free only the irqs that were actually requested */
3311 if (!vsi->q_vectors[i] ||
3312 !vsi->q_vectors[i]->num_ringpairs)
3315 /* clear the affinity_mask in the IRQ descriptor */
3316 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3318 free_irq(pf->msix_entries[vector].vector,
3321 /* Tear down the interrupt queue link list
3323 * We know that they come in pairs and always
3324 * the Rx first, then the Tx. To clear the
3325 * link list, stick the EOL value into the
3326 * next_q field of the registers.
3328 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3329 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3330 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3331 val |= I40E_QUEUE_END_OF_LIST
3332 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3333 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3335 while (qp != I40E_QUEUE_END_OF_LIST) {
3338 val = rd32(hw, I40E_QINT_RQCTL(qp));
3340 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3341 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3342 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3343 I40E_QINT_RQCTL_INTEVENT_MASK);
3345 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3346 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3348 wr32(hw, I40E_QINT_RQCTL(qp), val);
3350 val = rd32(hw, I40E_QINT_TQCTL(qp));
3352 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3353 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3355 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3356 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3357 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3358 I40E_QINT_TQCTL_INTEVENT_MASK);
3360 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3361 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3363 wr32(hw, I40E_QINT_TQCTL(qp), val);
3368 free_irq(pf->pdev->irq, pf);
3370 val = rd32(hw, I40E_PFINT_LNKLST0);
3371 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3372 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3373 val |= I40E_QUEUE_END_OF_LIST
3374 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3375 wr32(hw, I40E_PFINT_LNKLST0, val);
3377 val = rd32(hw, I40E_QINT_RQCTL(qp));
3378 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3379 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3380 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3381 I40E_QINT_RQCTL_INTEVENT_MASK);
3383 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3384 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3386 wr32(hw, I40E_QINT_RQCTL(qp), val);
3388 val = rd32(hw, I40E_QINT_TQCTL(qp));
3390 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3391 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3392 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3393 I40E_QINT_TQCTL_INTEVENT_MASK);
3395 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3396 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3398 wr32(hw, I40E_QINT_TQCTL(qp), val);
3403 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3404 * @vsi: the VSI being configured
3405 * @v_idx: Index of vector to be freed
3407 * This function frees the memory allocated to the q_vector. In addition if
3408 * NAPI is enabled it will delete any references to the NAPI struct prior
3409 * to freeing the q_vector.
3411 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3413 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3414 struct i40e_ring *ring;
3419 /* disassociate q_vector from rings */
3420 i40e_for_each_ring(ring, q_vector->tx)
3421 ring->q_vector = NULL;
3423 i40e_for_each_ring(ring, q_vector->rx)
3424 ring->q_vector = NULL;
3426 /* only VSI w/ an associated netdev is set up w/ NAPI */
3428 netif_napi_del(&q_vector->napi);
3430 vsi->q_vectors[v_idx] = NULL;
3432 kfree_rcu(q_vector, rcu);
3436 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3437 * @vsi: the VSI being un-configured
3439 * This frees the memory allocated to the q_vectors and
3440 * deletes references to the NAPI struct.
3442 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3446 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3447 i40e_free_q_vector(vsi, v_idx);
3451 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3452 * @pf: board private structure
3454 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3456 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3457 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3458 pci_disable_msix(pf->pdev);
3459 kfree(pf->msix_entries);
3460 pf->msix_entries = NULL;
3461 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3462 pci_disable_msi(pf->pdev);
3464 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3468 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3469 * @pf: board private structure
3471 * We go through and clear interrupt specific resources and reset the structure
3472 * to pre-load conditions
3474 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3478 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3479 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3481 i40e_vsi_free_q_vectors(pf->vsi[i]);
3482 i40e_reset_interrupt_capability(pf);
3486 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3487 * @vsi: the VSI being configured
3489 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3496 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3497 napi_enable(&vsi->q_vectors[q_idx]->napi);
3501 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3502 * @vsi: the VSI being configured
3504 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3511 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3512 napi_disable(&vsi->q_vectors[q_idx]->napi);
3516 * i40e_quiesce_vsi - Pause a given VSI
3517 * @vsi: the VSI being paused
3519 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3521 if (test_bit(__I40E_DOWN, &vsi->state))
3524 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3525 if (vsi->netdev && netif_running(vsi->netdev)) {
3526 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3528 set_bit(__I40E_DOWN, &vsi->state);
3534 * i40e_unquiesce_vsi - Resume a given VSI
3535 * @vsi: the VSI being resumed
3537 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3539 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3542 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3543 if (vsi->netdev && netif_running(vsi->netdev))
3544 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3546 i40e_up(vsi); /* this clears the DOWN bit */
3550 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3553 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3557 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3559 i40e_quiesce_vsi(pf->vsi[v]);
3564 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3567 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3571 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3573 i40e_unquiesce_vsi(pf->vsi[v]);
3578 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3579 * @dcbcfg: the corresponding DCBx configuration structure
3581 * Return the number of TCs from given DCBx configuration
3583 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3588 /* Scan the ETS Config Priority Table to find
3589 * traffic class enabled for a given priority
3590 * and use the traffic class index to get the
3591 * number of traffic classes enabled
3593 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3594 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3595 num_tc = dcbcfg->etscfg.prioritytable[i];
3598 /* Traffic class index starts from zero so
3599 * increment to return the actual count
3605 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3606 * @dcbcfg: the corresponding DCBx configuration structure
3608 * Query the current DCB configuration and return the number of
3609 * traffic classes enabled from the given DCBX config
3611 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3613 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3617 for (i = 0; i < num_tc; i++)
3618 enabled_tc |= 1 << i;
3624 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3625 * @pf: PF being queried
3627 * Return number of traffic classes enabled for the given PF
3629 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3631 struct i40e_hw *hw = &pf->hw;
3634 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3636 /* If DCB is not enabled then always in single TC */
3637 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3640 /* MFP mode return count of enabled TCs for this PF */
3641 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3642 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3643 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3644 if (enabled_tc & (1 << i))
3650 /* SFP mode will be enabled for all TCs on port */
3651 return i40e_dcb_get_num_tc(dcbcfg);
3655 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3656 * @pf: PF being queried
3658 * Return a bitmap for first enabled traffic class for this PF.
3660 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3662 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3666 return 0x1; /* TC0 */
3668 /* Find the first enabled TC */
3669 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3670 if (enabled_tc & (1 << i))
3678 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3679 * @pf: PF being queried
3681 * Return a bitmap for enabled traffic classes for this PF.
3683 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3685 /* If DCB is not enabled for this PF then just return default TC */
3686 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3687 return i40e_pf_get_default_tc(pf);
3689 /* MFP mode will have enabled TCs set by FW */
3690 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3691 return pf->hw.func_caps.enabled_tcmap;
3693 /* SFP mode we want PF to be enabled for all TCs */
3694 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3698 * i40e_vsi_get_bw_info - Query VSI BW Information
3699 * @vsi: the VSI being queried
3701 * Returns 0 on success, negative value on failure
3703 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3705 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3706 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3707 struct i40e_pf *pf = vsi->back;
3708 struct i40e_hw *hw = &pf->hw;
3713 /* Get the VSI level BW configuration */
3714 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3716 dev_info(&pf->pdev->dev,
3717 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3718 aq_ret, pf->hw.aq.asq_last_status);
3722 /* Get the VSI level BW configuration per TC */
3723 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3726 dev_info(&pf->pdev->dev,
3727 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3728 aq_ret, pf->hw.aq.asq_last_status);
3732 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3733 dev_info(&pf->pdev->dev,
3734 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3735 bw_config.tc_valid_bits,
3736 bw_ets_config.tc_valid_bits);
3737 /* Still continuing */
3740 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3741 vsi->bw_max_quanta = bw_config.max_bw;
3742 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3743 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3744 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3745 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3746 vsi->bw_ets_limit_credits[i] =
3747 le16_to_cpu(bw_ets_config.credits[i]);
3748 /* 3 bits out of 4 for each TC */
3749 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3756 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3757 * @vsi: the VSI being configured
3758 * @enabled_tc: TC bitmap
3759 * @bw_credits: BW shared credits per TC
3761 * Returns 0 on success, negative value on failure
3763 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3766 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3770 bw_data.tc_valid_bits = enabled_tc;
3771 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3772 bw_data.tc_bw_credits[i] = bw_share[i];
3774 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3777 dev_info(&vsi->back->pdev->dev,
3778 "AQ command Config VSI BW allocation per TC failed = %d\n",
3779 vsi->back->hw.aq.asq_last_status);
3783 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3784 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3790 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3791 * @vsi: the VSI being configured
3792 * @enabled_tc: TC map to be enabled
3795 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3797 struct net_device *netdev = vsi->netdev;
3798 struct i40e_pf *pf = vsi->back;
3799 struct i40e_hw *hw = &pf->hw;
3802 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3808 netdev_reset_tc(netdev);
3812 /* Set up actual enabled TCs on the VSI */
3813 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3816 /* set per TC queues for the VSI */
3817 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3818 /* Only set TC queues for enabled tcs
3820 * e.g. For a VSI that has TC0 and TC3 enabled the
3821 * enabled_tc bitmap would be 0x00001001; the driver
3822 * will set the numtc for netdev as 2 that will be
3823 * referenced by the netdev layer as TC 0 and 1.
3825 if (vsi->tc_config.enabled_tc & (1 << i))
3826 netdev_set_tc_queue(netdev,
3827 vsi->tc_config.tc_info[i].netdev_tc,
3828 vsi->tc_config.tc_info[i].qcount,
3829 vsi->tc_config.tc_info[i].qoffset);
3832 /* Assign UP2TC map for the VSI */
3833 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3834 /* Get the actual TC# for the UP */
3835 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3836 /* Get the mapped netdev TC# for the UP */
3837 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3838 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3843 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3844 * @vsi: the VSI being configured
3845 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3847 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3848 struct i40e_vsi_context *ctxt)
3850 /* copy just the sections touched not the entire info
3851 * since not all sections are valid as returned by
3854 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3855 memcpy(&vsi->info.queue_mapping,
3856 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3857 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3858 sizeof(vsi->info.tc_mapping));
3862 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3863 * @vsi: VSI to be configured
3864 * @enabled_tc: TC bitmap
3866 * This configures a particular VSI for TCs that are mapped to the
3867 * given TC bitmap. It uses default bandwidth share for TCs across
3868 * VSIs to configure TC for a particular VSI.
3871 * It is expected that the VSI queues have been quisced before calling
3874 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3876 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3877 struct i40e_vsi_context ctxt;
3881 /* Check if enabled_tc is same as existing or new TCs */
3882 if (vsi->tc_config.enabled_tc == enabled_tc)
3885 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3886 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3887 if (enabled_tc & (1 << i))
3891 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3893 dev_info(&vsi->back->pdev->dev,
3894 "Failed configuring TC map %d for VSI %d\n",
3895 enabled_tc, vsi->seid);
3899 /* Update Queue Pairs Mapping for currently enabled UPs */
3900 ctxt.seid = vsi->seid;
3901 ctxt.pf_num = vsi->back->hw.pf_id;
3903 ctxt.uplink_seid = vsi->uplink_seid;
3904 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3905 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3907 /* Update the VSI after updating the VSI queue-mapping information */
3908 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3910 dev_info(&vsi->back->pdev->dev,
3911 "update vsi failed, aq_err=%d\n",
3912 vsi->back->hw.aq.asq_last_status);
3915 /* update the local VSI info with updated queue map */
3916 i40e_vsi_update_queue_map(vsi, &ctxt);
3917 vsi->info.valid_sections = 0;
3919 /* Update current VSI BW information */
3920 ret = i40e_vsi_get_bw_info(vsi);
3922 dev_info(&vsi->back->pdev->dev,
3923 "Failed updating vsi bw info, aq_err=%d\n",
3924 vsi->back->hw.aq.asq_last_status);
3928 /* Update the netdev TC setup */
3929 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3935 * i40e_veb_config_tc - Configure TCs for given VEB
3937 * @enabled_tc: TC bitmap
3939 * Configures given TC bitmap for VEB (switching) element
3941 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
3943 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
3944 struct i40e_pf *pf = veb->pf;
3948 /* No TCs or already enabled TCs just return */
3949 if (!enabled_tc || veb->enabled_tc == enabled_tc)
3952 bw_data.tc_valid_bits = enabled_tc;
3953 /* bw_data.absolute_credits is not set (relative) */
3955 /* Enable ETS TCs with equal BW Share for now */
3956 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3957 if (enabled_tc & (1 << i))
3958 bw_data.tc_bw_share_credits[i] = 1;
3961 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
3964 dev_info(&pf->pdev->dev,
3965 "veb bw config failed, aq_err=%d\n",
3966 pf->hw.aq.asq_last_status);
3970 /* Update the BW information */
3971 ret = i40e_veb_get_bw_info(veb);
3973 dev_info(&pf->pdev->dev,
3974 "Failed getting veb bw config, aq_err=%d\n",
3975 pf->hw.aq.asq_last_status);
3982 #ifdef CONFIG_I40E_DCB
3984 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
3987 * Reconfigure VEB/VSIs on a given PF; it is assumed that
3988 * the caller would've quiesce all the VSIs before calling
3991 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
3997 /* Enable the TCs available on PF to all VEBs */
3998 tc_map = i40e_pf_get_tc_map(pf);
3999 for (v = 0; v < I40E_MAX_VEB; v++) {
4002 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4004 dev_info(&pf->pdev->dev,
4005 "Failed configuring TC for VEB seid=%d\n",
4007 /* Will try to configure as many components */
4011 /* Update each VSI */
4012 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4016 /* - Enable all TCs for the LAN VSI
4017 * - For all others keep them at TC0 for now
4019 if (v == pf->lan_vsi)
4020 tc_map = i40e_pf_get_tc_map(pf);
4022 tc_map = i40e_pf_get_default_tc(pf);
4024 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4026 dev_info(&pf->pdev->dev,
4027 "Failed configuring TC for VSI seid=%d\n",
4029 /* Will try to configure as many components */
4031 if (pf->vsi[v]->netdev)
4032 i40e_dcbnl_set_all(pf->vsi[v]);
4038 * i40e_init_pf_dcb - Initialize DCB configuration
4039 * @pf: PF being configured
4041 * Query the current DCB configuration and cache it
4042 * in the hardware structure
4044 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4046 struct i40e_hw *hw = &pf->hw;
4049 if (pf->hw.func_caps.npar_enable)
4052 /* Get the initial DCB configuration */
4053 err = i40e_init_dcb(hw);
4055 /* Device/Function is not DCBX capable */
4056 if ((!hw->func_caps.dcb) ||
4057 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4058 dev_info(&pf->pdev->dev,
4059 "DCBX offload is not supported or is disabled for this PF.\n");
4061 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4065 /* When status is not DISABLED then DCBX in FW */
4066 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4067 DCB_CAP_DCBX_VER_IEEE;
4068 pf->flags |= I40E_FLAG_DCB_ENABLED;
4075 #endif /* CONFIG_I40E_DCB */
4078 * i40e_up_complete - Finish the last steps of bringing up a connection
4079 * @vsi: the VSI being configured
4081 static int i40e_up_complete(struct i40e_vsi *vsi)
4083 struct i40e_pf *pf = vsi->back;
4086 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4087 i40e_vsi_configure_msix(vsi);
4089 i40e_configure_msi_and_legacy(vsi);
4092 err = i40e_vsi_control_rings(vsi, true);
4096 clear_bit(__I40E_DOWN, &vsi->state);
4097 i40e_napi_enable_all(vsi);
4098 i40e_vsi_enable_irq(vsi);
4100 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4102 netdev_info(vsi->netdev, "NIC Link is Up\n");
4103 netif_tx_start_all_queues(vsi->netdev);
4104 netif_carrier_on(vsi->netdev);
4105 } else if (vsi->netdev) {
4106 netdev_info(vsi->netdev, "NIC Link is Down\n");
4109 /* replay FDIR SB filters */
4110 if (vsi->type == I40E_VSI_FDIR)
4111 i40e_fdir_filter_restore(vsi);
4112 i40e_service_event_schedule(pf);
4118 * i40e_vsi_reinit_locked - Reset the VSI
4119 * @vsi: the VSI being configured
4121 * Rebuild the ring structs after some configuration
4122 * has changed, e.g. MTU size.
4124 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4126 struct i40e_pf *pf = vsi->back;
4128 WARN_ON(in_interrupt());
4129 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4130 usleep_range(1000, 2000);
4133 /* Give a VF some time to respond to the reset. The
4134 * two second wait is based upon the watchdog cycle in
4137 if (vsi->type == I40E_VSI_SRIOV)
4140 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4144 * i40e_up - Bring the connection back up after being down
4145 * @vsi: the VSI being configured
4147 int i40e_up(struct i40e_vsi *vsi)
4151 err = i40e_vsi_configure(vsi);
4153 err = i40e_up_complete(vsi);
4159 * i40e_down - Shutdown the connection processing
4160 * @vsi: the VSI being stopped
4162 void i40e_down(struct i40e_vsi *vsi)
4166 /* It is assumed that the caller of this function
4167 * sets the vsi->state __I40E_DOWN bit.
4170 netif_carrier_off(vsi->netdev);
4171 netif_tx_disable(vsi->netdev);
4173 i40e_vsi_disable_irq(vsi);
4174 i40e_vsi_control_rings(vsi, false);
4175 i40e_napi_disable_all(vsi);
4177 for (i = 0; i < vsi->num_queue_pairs; i++) {
4178 i40e_clean_tx_ring(vsi->tx_rings[i]);
4179 i40e_clean_rx_ring(vsi->rx_rings[i]);
4184 * i40e_setup_tc - configure multiple traffic classes
4185 * @netdev: net device to configure
4186 * @tc: number of traffic classes to enable
4188 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4190 struct i40e_netdev_priv *np = netdev_priv(netdev);
4191 struct i40e_vsi *vsi = np->vsi;
4192 struct i40e_pf *pf = vsi->back;
4197 /* Check if DCB enabled to continue */
4198 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4199 netdev_info(netdev, "DCB is not enabled for adapter\n");
4203 /* Check if MFP enabled */
4204 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4205 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4209 /* Check whether tc count is within enabled limit */
4210 if (tc > i40e_pf_get_num_tc(pf)) {
4211 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4215 /* Generate TC map for number of tc requested */
4216 for (i = 0; i < tc; i++)
4217 enabled_tc |= (1 << i);
4219 /* Requesting same TC configuration as already enabled */
4220 if (enabled_tc == vsi->tc_config.enabled_tc)
4223 /* Quiesce VSI queues */
4224 i40e_quiesce_vsi(vsi);
4226 /* Configure VSI for enabled TCs */
4227 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4229 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4235 i40e_unquiesce_vsi(vsi);
4242 * i40e_open - Called when a network interface is made active
4243 * @netdev: network interface device structure
4245 * The open entry point is called when a network interface is made
4246 * active by the system (IFF_UP). At this point all resources needed
4247 * for transmit and receive operations are allocated, the interrupt
4248 * handler is registered with the OS, the netdev watchdog subtask is
4249 * enabled, and the stack is notified that the interface is ready.
4251 * Returns 0 on success, negative value on failure
4253 static int i40e_open(struct net_device *netdev)
4255 struct i40e_netdev_priv *np = netdev_priv(netdev);
4256 struct i40e_vsi *vsi = np->vsi;
4257 struct i40e_pf *pf = vsi->back;
4260 /* disallow open during test or if eeprom is broken */
4261 if (test_bit(__I40E_TESTING, &pf->state) ||
4262 test_bit(__I40E_BAD_EEPROM, &pf->state))
4265 netif_carrier_off(netdev);
4267 err = i40e_vsi_open(vsi);
4271 /* configure global TSO hardware offload settings */
4272 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4273 TCP_FLAG_FIN) >> 16);
4274 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4276 TCP_FLAG_CWR) >> 16);
4277 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4279 #ifdef CONFIG_I40E_VXLAN
4280 vxlan_get_rx_port(netdev);
4288 * @vsi: the VSI to open
4290 * Finish initialization of the VSI.
4292 * Returns 0 on success, negative value on failure
4294 int i40e_vsi_open(struct i40e_vsi *vsi)
4296 struct i40e_pf *pf = vsi->back;
4297 char int_name[IFNAMSIZ];
4300 /* allocate descriptors */
4301 err = i40e_vsi_setup_tx_resources(vsi);
4304 err = i40e_vsi_setup_rx_resources(vsi);
4308 err = i40e_vsi_configure(vsi);
4316 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4317 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4318 err = i40e_vsi_request_irq(vsi, int_name);
4322 /* Notify the stack of the actual queue counts. */
4323 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_queue_pairs);
4325 goto err_set_queues;
4327 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_queue_pairs);
4329 goto err_set_queues;
4331 err = i40e_up_complete(vsi);
4333 goto err_up_complete;
4340 i40e_vsi_free_irq(vsi);
4342 i40e_vsi_free_rx_resources(vsi);
4344 i40e_vsi_free_tx_resources(vsi);
4345 if (vsi == pf->vsi[pf->lan_vsi])
4346 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4352 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4353 * @pf: Pointer to pf
4355 * This function destroys the hlist where all the Flow Director
4356 * filters were saved.
4358 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4360 struct i40e_fdir_filter *filter;
4361 struct hlist_node *node2;
4363 hlist_for_each_entry_safe(filter, node2,
4364 &pf->fdir_filter_list, fdir_node) {
4365 hlist_del(&filter->fdir_node);
4368 pf->fdir_pf_active_filters = 0;
4372 * i40e_close - Disables a network interface
4373 * @netdev: network interface device structure
4375 * The close entry point is called when an interface is de-activated
4376 * by the OS. The hardware is still under the driver's control, but
4377 * this netdev interface is disabled.
4379 * Returns 0, this is not allowed to fail
4381 static int i40e_close(struct net_device *netdev)
4383 struct i40e_netdev_priv *np = netdev_priv(netdev);
4384 struct i40e_vsi *vsi = np->vsi;
4386 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4390 i40e_vsi_free_irq(vsi);
4392 i40e_vsi_free_tx_resources(vsi);
4393 i40e_vsi_free_rx_resources(vsi);
4399 * i40e_do_reset - Start a PF or Core Reset sequence
4400 * @pf: board private structure
4401 * @reset_flags: which reset is requested
4403 * The essential difference in resets is that the PF Reset
4404 * doesn't clear the packet buffers, doesn't reset the PE
4405 * firmware, and doesn't bother the other PFs on the chip.
4407 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4411 WARN_ON(in_interrupt());
4413 /* do the biggest reset indicated */
4414 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4416 /* Request a Global Reset
4418 * This will start the chip's countdown to the actual full
4419 * chip reset event, and a warning interrupt to be sent
4420 * to all PFs, including the requestor. Our handler
4421 * for the warning interrupt will deal with the shutdown
4422 * and recovery of the switch setup.
4424 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4425 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4426 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4427 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4429 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4431 /* Request a Core Reset
4433 * Same as Global Reset, except does *not* include the MAC/PHY
4435 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4436 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4437 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4438 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4439 i40e_flush(&pf->hw);
4441 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4443 /* Request a Firmware Reset
4445 * Same as Global reset, plus restarting the
4446 * embedded firmware engine.
4448 /* enable EMP Reset */
4449 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4450 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4451 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4453 /* force the reset */
4454 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4455 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4456 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4457 i40e_flush(&pf->hw);
4459 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4461 /* Request a PF Reset
4463 * Resets only the PF-specific registers
4465 * This goes directly to the tear-down and rebuild of
4466 * the switch, since we need to do all the recovery as
4467 * for the Core Reset.
4469 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4470 i40e_handle_reset_warning(pf);
4472 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4475 /* Find the VSI(s) that requested a re-init */
4476 dev_info(&pf->pdev->dev,
4477 "VSI reinit requested\n");
4478 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4479 struct i40e_vsi *vsi = pf->vsi[v];
4481 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4482 i40e_vsi_reinit_locked(pf->vsi[v]);
4483 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4487 /* no further action needed, so return now */
4490 dev_info(&pf->pdev->dev,
4491 "bad reset request 0x%08x\n", reset_flags);
4496 #ifdef CONFIG_I40E_DCB
4498 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4499 * @pf: board private structure
4500 * @old_cfg: current DCB config
4501 * @new_cfg: new DCB config
4503 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4504 struct i40e_dcbx_config *old_cfg,
4505 struct i40e_dcbx_config *new_cfg)
4507 bool need_reconfig = false;
4509 /* Check if ETS configuration has changed */
4510 if (memcmp(&new_cfg->etscfg,
4512 sizeof(new_cfg->etscfg))) {
4513 /* If Priority Table has changed reconfig is needed */
4514 if (memcmp(&new_cfg->etscfg.prioritytable,
4515 &old_cfg->etscfg.prioritytable,
4516 sizeof(new_cfg->etscfg.prioritytable))) {
4517 need_reconfig = true;
4518 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4521 if (memcmp(&new_cfg->etscfg.tcbwtable,
4522 &old_cfg->etscfg.tcbwtable,
4523 sizeof(new_cfg->etscfg.tcbwtable)))
4524 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4526 if (memcmp(&new_cfg->etscfg.tsatable,
4527 &old_cfg->etscfg.tsatable,
4528 sizeof(new_cfg->etscfg.tsatable)))
4529 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4532 /* Check if PFC configuration has changed */
4533 if (memcmp(&new_cfg->pfc,
4535 sizeof(new_cfg->pfc))) {
4536 need_reconfig = true;
4537 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4540 /* Check if APP Table has changed */
4541 if (memcmp(&new_cfg->app,
4543 sizeof(new_cfg->app))) {
4544 need_reconfig = true;
4545 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4548 return need_reconfig;
4552 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4553 * @pf: board private structure
4554 * @e: event info posted on ARQ
4556 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4557 struct i40e_arq_event_info *e)
4559 struct i40e_aqc_lldp_get_mib *mib =
4560 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4561 struct i40e_hw *hw = &pf->hw;
4562 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4563 struct i40e_dcbx_config tmp_dcbx_cfg;
4564 bool need_reconfig = false;
4568 /* Ignore if event is not for Nearest Bridge */
4569 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4570 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4571 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4574 /* Check MIB Type and return if event for Remote MIB update */
4575 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4576 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4577 /* Update the remote cached instance and return */
4578 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4579 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4580 &hw->remote_dcbx_config);
4584 /* Convert/store the DCBX data from LLDPDU temporarily */
4585 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4586 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4588 /* Error in LLDPDU parsing return */
4589 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4593 /* No change detected in DCBX configs */
4594 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4595 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4599 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4601 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4603 /* Overwrite the new configuration */
4604 *dcbx_cfg = tmp_dcbx_cfg;
4609 /* Reconfiguration needed quiesce all VSIs */
4610 i40e_pf_quiesce_all_vsi(pf);
4612 /* Changes in configuration update VEB/VSI */
4613 i40e_dcb_reconfigure(pf);
4615 i40e_pf_unquiesce_all_vsi(pf);
4619 #endif /* CONFIG_I40E_DCB */
4622 * i40e_do_reset_safe - Protected reset path for userland calls.
4623 * @pf: board private structure
4624 * @reset_flags: which reset is requested
4627 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4630 i40e_do_reset(pf, reset_flags);
4635 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4636 * @pf: board private structure
4637 * @e: event info posted on ARQ
4639 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4642 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4643 struct i40e_arq_event_info *e)
4645 struct i40e_aqc_lan_overflow *data =
4646 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4647 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4648 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4649 struct i40e_hw *hw = &pf->hw;
4653 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
4656 /* Queue belongs to VF, find the VF and issue VF reset */
4657 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4658 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4659 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4660 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4661 vf_id -= hw->func_caps.vf_base_id;
4662 vf = &pf->vf[vf_id];
4663 i40e_vc_notify_vf_reset(vf);
4664 /* Allow VF to process pending reset notification */
4666 i40e_reset_vf(vf, false);
4671 * i40e_service_event_complete - Finish up the service event
4672 * @pf: board private structure
4674 static void i40e_service_event_complete(struct i40e_pf *pf)
4676 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4678 /* flush memory to make sure state is correct before next watchog */
4679 smp_mb__before_clear_bit();
4680 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4684 * i40e_get_current_fd_count - Get the count of FD filters programmed in the HW
4685 * @pf: board private structure
4687 int i40e_get_current_fd_count(struct i40e_pf *pf)
4690 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4691 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
4692 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
4693 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
4698 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
4699 * @pf: board private structure
4701 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4703 u32 fcnt_prog, fcnt_avail;
4705 /* Check if, FD SB or ATR was auto disabled and if there is enough room
4708 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4709 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4711 fcnt_prog = i40e_get_current_fd_count(pf);
4712 fcnt_avail = pf->hw.fdir_shared_filter_count +
4713 pf->fdir_pf_filter_count;
4714 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
4715 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
4716 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
4717 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
4718 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
4721 /* Wait for some more space to be available to turn on ATR */
4722 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
4723 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4724 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
4725 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4726 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
4732 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4733 * @pf: board private structure
4735 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4737 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4740 /* if interface is down do nothing */
4741 if (test_bit(__I40E_DOWN, &pf->state))
4743 i40e_fdir_check_and_reenable(pf);
4745 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4746 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4747 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4751 * i40e_vsi_link_event - notify VSI of a link event
4752 * @vsi: vsi to be notified
4753 * @link_up: link up or down
4755 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4760 switch (vsi->type) {
4762 if (!vsi->netdev || !vsi->netdev_registered)
4766 netif_carrier_on(vsi->netdev);
4767 netif_tx_wake_all_queues(vsi->netdev);
4769 netif_carrier_off(vsi->netdev);
4770 netif_tx_stop_all_queues(vsi->netdev);
4774 case I40E_VSI_SRIOV:
4777 case I40E_VSI_VMDQ2:
4779 case I40E_VSI_MIRROR:
4781 /* there is no notification for other VSIs */
4787 * i40e_veb_link_event - notify elements on the veb of a link event
4788 * @veb: veb to be notified
4789 * @link_up: link up or down
4791 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4796 if (!veb || !veb->pf)
4800 /* depth first... */
4801 for (i = 0; i < I40E_MAX_VEB; i++)
4802 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4803 i40e_veb_link_event(pf->veb[i], link_up);
4805 /* ... now the local VSIs */
4806 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4807 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4808 i40e_vsi_link_event(pf->vsi[i], link_up);
4812 * i40e_link_event - Update netif_carrier status
4813 * @pf: board private structure
4815 static void i40e_link_event(struct i40e_pf *pf)
4817 bool new_link, old_link;
4819 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4820 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4822 if (new_link == old_link)
4825 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4826 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4827 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4829 /* Notify the base of the switch tree connected to
4830 * the link. Floating VEBs are not notified.
4832 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4833 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4835 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4838 i40e_vc_notify_link_state(pf);
4840 if (pf->flags & I40E_FLAG_PTP)
4841 i40e_ptp_set_increment(pf);
4845 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4846 * @pf: board private structure
4848 * Set the per-queue flags to request a check for stuck queues in the irq
4849 * clean functions, then force interrupts to be sure the irq clean is called.
4851 static void i40e_check_hang_subtask(struct i40e_pf *pf)
4855 /* If we're down or resetting, just bail */
4856 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4859 /* for each VSI/netdev
4861 * set the check flag
4863 * force an interrupt
4865 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4866 struct i40e_vsi *vsi = pf->vsi[v];
4870 test_bit(__I40E_DOWN, &vsi->state) ||
4871 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4874 for (i = 0; i < vsi->num_queue_pairs; i++) {
4875 set_check_for_tx_hang(vsi->tx_rings[i]);
4876 if (test_bit(__I40E_HANG_CHECK_ARMED,
4877 &vsi->tx_rings[i]->state))
4882 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4883 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4884 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4885 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4887 u16 vec = vsi->base_vector - 1;
4888 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4889 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4890 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4891 wr32(&vsi->back->hw,
4892 I40E_PFINT_DYN_CTLN(vec), val);
4894 i40e_flush(&vsi->back->hw);
4900 * i40e_watchdog_subtask - Check and bring link up
4901 * @pf: board private structure
4903 static void i40e_watchdog_subtask(struct i40e_pf *pf)
4907 /* if interface is down do nothing */
4908 if (test_bit(__I40E_DOWN, &pf->state) ||
4909 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4912 /* Update the stats for active netdevs so the network stack
4913 * can look at updated numbers whenever it cares to
4915 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4916 if (pf->vsi[i] && pf->vsi[i]->netdev)
4917 i40e_update_stats(pf->vsi[i]);
4919 /* Update the stats for the active switching components */
4920 for (i = 0; i < I40E_MAX_VEB; i++)
4922 i40e_update_veb_stats(pf->veb[i]);
4924 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
4928 * i40e_reset_subtask - Set up for resetting the device and driver
4929 * @pf: board private structure
4931 static void i40e_reset_subtask(struct i40e_pf *pf)
4933 u32 reset_flags = 0;
4936 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4937 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4938 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4940 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4941 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4942 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4944 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4945 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4946 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4948 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4949 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4950 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4953 /* If there's a recovery already waiting, it takes
4954 * precedence before starting a new reset sequence.
4956 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4957 i40e_handle_reset_warning(pf);
4961 /* If we're already down or resetting, just bail */
4963 !test_bit(__I40E_DOWN, &pf->state) &&
4964 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4965 i40e_do_reset(pf, reset_flags);
4972 * i40e_handle_link_event - Handle link event
4973 * @pf: board private structure
4974 * @e: event info posted on ARQ
4976 static void i40e_handle_link_event(struct i40e_pf *pf,
4977 struct i40e_arq_event_info *e)
4979 struct i40e_hw *hw = &pf->hw;
4980 struct i40e_aqc_get_link_status *status =
4981 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4982 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4984 /* save off old link status information */
4985 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4986 sizeof(pf->hw.phy.link_info_old));
4988 /* update link status */
4989 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4990 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4991 hw_link_info->link_info = status->link_info;
4992 hw_link_info->an_info = status->an_info;
4993 hw_link_info->ext_info = status->ext_info;
4994 hw_link_info->lse_enable =
4995 le16_to_cpu(status->command_flags) &
4998 /* process the event */
4999 i40e_link_event(pf);
5001 /* Do a new status request to re-enable LSE reporting
5002 * and load new status information into the hw struct,
5003 * then see if the status changed while processing the
5006 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
5007 i40e_link_event(pf);
5011 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5012 * @pf: board private structure
5014 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5016 struct i40e_arq_event_info event;
5017 struct i40e_hw *hw = &pf->hw;
5023 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
5026 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5027 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5032 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5033 ret = i40e_clean_arq_element(hw, &event, &pending);
5034 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
5035 dev_info(&pf->pdev->dev, "No ARQ event found\n");
5038 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5042 opcode = le16_to_cpu(event.desc.opcode);
5045 case i40e_aqc_opc_get_link_status:
5046 i40e_handle_link_event(pf, &event);
5048 case i40e_aqc_opc_send_msg_to_pf:
5049 ret = i40e_vc_process_vf_msg(pf,
5050 le16_to_cpu(event.desc.retval),
5051 le32_to_cpu(event.desc.cookie_high),
5052 le32_to_cpu(event.desc.cookie_low),
5056 case i40e_aqc_opc_lldp_update_mib:
5057 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5058 #ifdef CONFIG_I40E_DCB
5060 ret = i40e_handle_lldp_event(pf, &event);
5062 #endif /* CONFIG_I40E_DCB */
5064 case i40e_aqc_opc_event_lan_overflow:
5065 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5066 i40e_handle_lan_overflow_event(pf, &event);
5068 case i40e_aqc_opc_send_msg_to_peer:
5069 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5072 dev_info(&pf->pdev->dev,
5073 "ARQ Error: Unknown event 0x%04x received\n",
5077 } while (pending && (i++ < pf->adminq_work_limit));
5079 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5080 /* re-enable Admin queue interrupt cause */
5081 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5082 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5083 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5086 kfree(event.msg_buf);
5090 * i40e_verify_eeprom - make sure eeprom is good to use
5091 * @pf: board private structure
5093 static void i40e_verify_eeprom(struct i40e_pf *pf)
5097 err = i40e_diag_eeprom_test(&pf->hw);
5099 /* retry in case of garbage read */
5100 err = i40e_diag_eeprom_test(&pf->hw);
5102 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5104 set_bit(__I40E_BAD_EEPROM, &pf->state);
5108 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5109 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5110 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5115 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5116 * @veb: pointer to the VEB instance
5118 * This is a recursive function that first builds the attached VSIs then
5119 * recurses in to build the next layer of VEB. We track the connections
5120 * through our own index numbers because the seid's from the HW could
5121 * change across the reset.
5123 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5125 struct i40e_vsi *ctl_vsi = NULL;
5126 struct i40e_pf *pf = veb->pf;
5130 /* build VSI that owns this VEB, temporarily attached to base VEB */
5131 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
5133 pf->vsi[v]->veb_idx == veb->idx &&
5134 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5135 ctl_vsi = pf->vsi[v];
5140 dev_info(&pf->pdev->dev,
5141 "missing owner VSI for veb_idx %d\n", veb->idx);
5143 goto end_reconstitute;
5145 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5146 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5147 ret = i40e_add_vsi(ctl_vsi);
5149 dev_info(&pf->pdev->dev,
5150 "rebuild of owner VSI failed: %d\n", ret);
5151 goto end_reconstitute;
5153 i40e_vsi_reset_stats(ctl_vsi);
5155 /* create the VEB in the switch and move the VSI onto the VEB */
5156 ret = i40e_add_veb(veb, ctl_vsi);
5158 goto end_reconstitute;
5160 /* create the remaining VSIs attached to this VEB */
5161 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5162 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5165 if (pf->vsi[v]->veb_idx == veb->idx) {
5166 struct i40e_vsi *vsi = pf->vsi[v];
5167 vsi->uplink_seid = veb->seid;
5168 ret = i40e_add_vsi(vsi);
5170 dev_info(&pf->pdev->dev,
5171 "rebuild of vsi_idx %d failed: %d\n",
5173 goto end_reconstitute;
5175 i40e_vsi_reset_stats(vsi);
5179 /* create any VEBs attached to this VEB - RECURSION */
5180 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5181 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5182 pf->veb[veb_idx]->uplink_seid = veb->seid;
5183 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5194 * i40e_get_capabilities - get info about the HW
5195 * @pf: the PF struct
5197 static int i40e_get_capabilities(struct i40e_pf *pf)
5199 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5204 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5206 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5210 /* this loads the data into the hw struct for us */
5211 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5213 i40e_aqc_opc_list_func_capabilities,
5215 /* data loaded, buffer no longer needed */
5218 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5219 /* retry with a larger buffer */
5220 buf_len = data_size;
5221 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5222 dev_info(&pf->pdev->dev,
5223 "capability discovery failed: aq=%d\n",
5224 pf->hw.aq.asq_last_status);
5229 /* increment MSI-X count because current FW skips one */
5230 pf->hw.func_caps.num_msix_vectors++;
5232 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5233 (pf->hw.aq.fw_maj_ver < 2)) {
5234 pf->hw.func_caps.num_msix_vectors++;
5235 pf->hw.func_caps.num_msix_vectors_vf++;
5238 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5239 dev_info(&pf->pdev->dev,
5240 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5241 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5242 pf->hw.func_caps.num_msix_vectors,
5243 pf->hw.func_caps.num_msix_vectors_vf,
5244 pf->hw.func_caps.fd_filters_guaranteed,
5245 pf->hw.func_caps.fd_filters_best_effort,
5246 pf->hw.func_caps.num_tx_qp,
5247 pf->hw.func_caps.num_vsis);
5249 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5250 + pf->hw.func_caps.num_vfs)
5251 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5252 dev_info(&pf->pdev->dev,
5253 "got num_vsis %d, setting num_vsis to %d\n",
5254 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5255 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5261 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5264 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5265 * @pf: board private structure
5267 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5269 struct i40e_vsi *vsi;
5270 bool new_vsi = false;
5273 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5276 /* find existing VSI and see if it needs configuring */
5278 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5279 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5285 /* create a new VSI if none exists */
5287 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5288 pf->vsi[pf->lan_vsi]->seid, 0);
5290 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5295 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5297 err = i40e_vsi_setup_tx_resources(vsi);
5300 err = i40e_vsi_setup_rx_resources(vsi);
5305 char int_name[IFNAMSIZ + 9];
5306 err = i40e_vsi_configure(vsi);
5309 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
5310 dev_driver_string(&pf->pdev->dev));
5311 err = i40e_vsi_request_irq(vsi, int_name);
5314 err = i40e_up_complete(vsi);
5316 goto err_up_complete;
5317 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
5324 i40e_vsi_free_irq(vsi);
5326 i40e_vsi_free_rx_resources(vsi);
5328 i40e_vsi_free_tx_resources(vsi);
5330 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5331 i40e_vsi_clear(vsi);
5335 * i40e_fdir_teardown - release the Flow Director resources
5336 * @pf: board private structure
5338 static void i40e_fdir_teardown(struct i40e_pf *pf)
5342 i40e_fdir_filter_exit(pf);
5343 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5344 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5345 i40e_vsi_release(pf->vsi[i]);
5352 * i40e_prep_for_reset - prep for the core to reset
5353 * @pf: board private structure
5355 * Close up the VFs and other things in prep for pf Reset.
5357 static int i40e_prep_for_reset(struct i40e_pf *pf)
5359 struct i40e_hw *hw = &pf->hw;
5363 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5364 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5367 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5369 if (i40e_check_asq_alive(hw))
5370 i40e_vc_notify_reset(pf);
5372 /* quiesce the VSIs and their queues that are not already DOWN */
5373 i40e_pf_quiesce_all_vsi(pf);
5375 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5377 pf->vsi[v]->seid = 0;
5380 i40e_shutdown_adminq(&pf->hw);
5382 /* call shutdown HMC */
5383 ret = i40e_shutdown_lan_hmc(hw);
5385 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
5386 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5392 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5393 * @pf: board private structure
5394 * @reinit: if the Main VSI needs to re-initialized.
5396 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5398 struct i40e_driver_version dv;
5399 struct i40e_hw *hw = &pf->hw;
5403 /* Now we wait for GRST to settle out.
5404 * We don't have to delete the VEBs or VSIs from the hw switch
5405 * because the reset will make them disappear.
5407 ret = i40e_pf_reset(hw);
5409 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5412 if (test_bit(__I40E_DOWN, &pf->state))
5413 goto end_core_reset;
5414 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5416 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5417 ret = i40e_init_adminq(&pf->hw);
5419 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5420 goto end_core_reset;
5423 /* re-verify the eeprom if we just had an EMP reset */
5424 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
5425 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
5426 i40e_verify_eeprom(pf);
5429 ret = i40e_get_capabilities(pf);
5431 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5433 goto end_core_reset;
5436 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5437 hw->func_caps.num_rx_qp,
5438 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5440 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5441 goto end_core_reset;
5443 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5445 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5446 goto end_core_reset;
5449 #ifdef CONFIG_I40E_DCB
5450 ret = i40e_init_pf_dcb(pf);
5452 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5453 goto end_core_reset;
5455 #endif /* CONFIG_I40E_DCB */
5457 /* do basic switch setup */
5458 ret = i40e_setup_pf_switch(pf, reinit);
5460 goto end_core_reset;
5462 /* Rebuild the VSIs and VEBs that existed before reset.
5463 * They are still in our local switch element arrays, so only
5464 * need to rebuild the switch model in the HW.
5466 * If there were VEBs but the reconstitution failed, we'll try
5467 * try to recover minimal use by getting the basic PF VSI working.
5469 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5470 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
5471 /* find the one VEB connected to the MAC, and find orphans */
5472 for (v = 0; v < I40E_MAX_VEB; v++) {
5476 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5477 pf->veb[v]->uplink_seid == 0) {
5478 ret = i40e_reconstitute_veb(pf->veb[v]);
5483 /* If Main VEB failed, we're in deep doodoo,
5484 * so give up rebuilding the switch and set up
5485 * for minimal rebuild of PF VSI.
5486 * If orphan failed, we'll report the error
5487 * but try to keep going.
5489 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5490 dev_info(&pf->pdev->dev,
5491 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5493 pf->vsi[pf->lan_vsi]->uplink_seid
5496 } else if (pf->veb[v]->uplink_seid == 0) {
5497 dev_info(&pf->pdev->dev,
5498 "rebuild of orphan VEB failed: %d\n",
5505 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5506 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5507 /* no VEB, so rebuild only the Main VSI */
5508 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5510 dev_info(&pf->pdev->dev,
5511 "rebuild of Main VSI failed: %d\n", ret);
5512 goto end_core_reset;
5516 /* reinit the misc interrupt */
5517 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5518 ret = i40e_setup_misc_vector(pf);
5520 /* restart the VSIs that were rebuilt and running before the reset */
5521 i40e_pf_unquiesce_all_vsi(pf);
5523 if (pf->num_alloc_vfs) {
5524 for (v = 0; v < pf->num_alloc_vfs; v++)
5525 i40e_reset_vf(&pf->vf[v], true);
5528 /* tell the firmware that we're starting */
5529 dv.major_version = DRV_VERSION_MAJOR;
5530 dv.minor_version = DRV_VERSION_MINOR;
5531 dv.build_version = DRV_VERSION_BUILD;
5532 dv.subbuild_version = 0;
5533 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5535 dev_info(&pf->pdev->dev, "reset complete\n");
5538 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5542 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5543 * @pf: board private structure
5545 * Close up the VFs and other things in prep for a Core Reset,
5546 * then get ready to rebuild the world.
5548 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5552 ret = i40e_prep_for_reset(pf);
5554 i40e_reset_and_rebuild(pf, false);
5558 * i40e_handle_mdd_event
5559 * @pf: pointer to the pf structure
5561 * Called from the MDD irq handler to identify possibly malicious vfs
5563 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5565 struct i40e_hw *hw = &pf->hw;
5566 bool mdd_detected = false;
5571 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5574 /* find what triggered the MDD event */
5575 reg = rd32(hw, I40E_GL_MDET_TX);
5576 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5577 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
5578 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
5579 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
5580 >> I40E_GL_MDET_TX_EVENT_SHIFT;
5581 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
5582 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
5583 dev_info(&pf->pdev->dev,
5584 "Malicious Driver Detection event 0x%02x on TX queue %d of function 0x%02x\n",
5585 event, queue, func);
5586 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5587 mdd_detected = true;
5589 reg = rd32(hw, I40E_GL_MDET_RX);
5590 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5591 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
5592 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
5593 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
5594 >> I40E_GL_MDET_RX_EVENT_SHIFT;
5595 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
5596 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
5597 dev_info(&pf->pdev->dev,
5598 "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
5599 event, queue, func);
5600 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5601 mdd_detected = true;
5604 /* see if one of the VFs needs its hand slapped */
5605 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5607 reg = rd32(hw, I40E_VP_MDET_TX(i));
5608 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5609 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5610 vf->num_mdd_events++;
5611 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5614 reg = rd32(hw, I40E_VP_MDET_RX(i));
5615 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5616 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5617 vf->num_mdd_events++;
5618 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5621 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5622 dev_info(&pf->pdev->dev,
5623 "Too many MDD events on VF %d, disabled\n", i);
5624 dev_info(&pf->pdev->dev,
5625 "Use PF Control I/F to re-enable the VF\n");
5626 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5630 /* re-enable mdd interrupt cause */
5631 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5632 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5633 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5634 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5638 #ifdef CONFIG_I40E_VXLAN
5640 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5641 * @pf: board private structure
5643 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5645 const int vxlan_hdr_qwords = 4;
5646 struct i40e_hw *hw = &pf->hw;
5652 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5655 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5657 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5658 if (pf->pending_vxlan_bitmap & (1 << i)) {
5659 pf->pending_vxlan_bitmap &= ~(1 << i);
5660 port = pf->vxlan_ports[i];
5662 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5664 I40E_AQC_TUNNEL_TYPE_VXLAN,
5665 &filter_index, NULL)
5666 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5669 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5670 port ? "adding" : "deleting",
5671 ntohs(port), port ? i : i);
5673 pf->vxlan_ports[i] = 0;
5675 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5676 port ? "Added" : "Deleted",
5677 ntohs(port), port ? i : filter_index);
5685 * i40e_service_task - Run the driver's async subtasks
5686 * @work: pointer to work_struct containing our data
5688 static void i40e_service_task(struct work_struct *work)
5690 struct i40e_pf *pf = container_of(work,
5693 unsigned long start_time = jiffies;
5695 i40e_reset_subtask(pf);
5696 i40e_handle_mdd_event(pf);
5697 i40e_vc_process_vflr_event(pf);
5698 i40e_watchdog_subtask(pf);
5699 i40e_fdir_reinit_subtask(pf);
5700 i40e_check_hang_subtask(pf);
5701 i40e_sync_filters_subtask(pf);
5702 #ifdef CONFIG_I40E_VXLAN
5703 i40e_sync_vxlan_filters_subtask(pf);
5705 i40e_clean_adminq_subtask(pf);
5707 i40e_service_event_complete(pf);
5709 /* If the tasks have taken longer than one timer cycle or there
5710 * is more work to be done, reschedule the service task now
5711 * rather than wait for the timer to tick again.
5713 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5714 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5715 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5716 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5717 i40e_service_event_schedule(pf);
5721 * i40e_service_timer - timer callback
5722 * @data: pointer to PF struct
5724 static void i40e_service_timer(unsigned long data)
5726 struct i40e_pf *pf = (struct i40e_pf *)data;
5728 mod_timer(&pf->service_timer,
5729 round_jiffies(jiffies + pf->service_timer_period));
5730 i40e_service_event_schedule(pf);
5734 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
5735 * @vsi: the VSI being configured
5737 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
5739 struct i40e_pf *pf = vsi->back;
5741 switch (vsi->type) {
5743 vsi->alloc_queue_pairs = pf->num_lan_qps;
5744 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5745 I40E_REQ_DESCRIPTOR_MULTIPLE);
5746 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5747 vsi->num_q_vectors = pf->num_lan_msix;
5749 vsi->num_q_vectors = 1;
5754 vsi->alloc_queue_pairs = 1;
5755 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
5756 I40E_REQ_DESCRIPTOR_MULTIPLE);
5757 vsi->num_q_vectors = 1;
5760 case I40E_VSI_VMDQ2:
5761 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
5762 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5763 I40E_REQ_DESCRIPTOR_MULTIPLE);
5764 vsi->num_q_vectors = pf->num_vmdq_msix;
5767 case I40E_VSI_SRIOV:
5768 vsi->alloc_queue_pairs = pf->num_vf_qps;
5769 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5770 I40E_REQ_DESCRIPTOR_MULTIPLE);
5782 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
5783 * @type: VSI pointer
5784 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
5786 * On error: returns error code (negative)
5787 * On success: returns 0
5789 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
5794 /* allocate memory for both Tx and Rx ring pointers */
5795 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5796 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
5799 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5801 if (alloc_qvectors) {
5802 /* allocate memory for q_vector pointers */
5803 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5804 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
5805 if (!vsi->q_vectors) {
5813 kfree(vsi->tx_rings);
5818 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5819 * @pf: board private structure
5820 * @type: type of VSI
5822 * On error: returns error code (negative)
5823 * On success: returns vsi index in PF (positive)
5825 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5828 struct i40e_vsi *vsi;
5832 /* Need to protect the allocation of the VSIs at the PF level */
5833 mutex_lock(&pf->switch_mutex);
5835 /* VSI list may be fragmented if VSI creation/destruction has
5836 * been happening. We can afford to do a quick scan to look
5837 * for any free VSIs in the list.
5839 * find next empty vsi slot, looping back around if necessary
5842 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5844 if (i >= pf->hw.func_caps.num_vsis) {
5846 while (i < pf->next_vsi && pf->vsi[i])
5850 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5851 vsi_idx = i; /* Found one! */
5854 goto unlock_pf; /* out of VSI slots! */
5858 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5865 set_bit(__I40E_DOWN, &vsi->state);
5868 vsi->rx_itr_setting = pf->rx_itr_default;
5869 vsi->tx_itr_setting = pf->tx_itr_default;
5870 vsi->netdev_registered = false;
5871 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5872 INIT_LIST_HEAD(&vsi->mac_filter_list);
5874 ret = i40e_set_num_rings_in_vsi(vsi);
5878 ret = i40e_vsi_alloc_arrays(vsi, true);
5882 /* Setup default MSIX irq handler for VSI */
5883 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5885 pf->vsi[vsi_idx] = vsi;
5890 pf->next_vsi = i - 1;
5893 mutex_unlock(&pf->switch_mutex);
5898 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
5899 * @type: VSI pointer
5900 * @free_qvectors: a bool to specify if q_vectors need to be freed.
5902 * On error: returns error code (negative)
5903 * On success: returns 0
5905 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
5907 /* free the ring and vector containers */
5908 if (free_qvectors) {
5909 kfree(vsi->q_vectors);
5910 vsi->q_vectors = NULL;
5912 kfree(vsi->tx_rings);
5913 vsi->tx_rings = NULL;
5914 vsi->rx_rings = NULL;
5918 * i40e_vsi_clear - Deallocate the VSI provided
5919 * @vsi: the VSI being un-configured
5921 static int i40e_vsi_clear(struct i40e_vsi *vsi)
5932 mutex_lock(&pf->switch_mutex);
5933 if (!pf->vsi[vsi->idx]) {
5934 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5935 vsi->idx, vsi->idx, vsi, vsi->type);
5939 if (pf->vsi[vsi->idx] != vsi) {
5940 dev_err(&pf->pdev->dev,
5941 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5942 pf->vsi[vsi->idx]->idx,
5944 pf->vsi[vsi->idx]->type,
5945 vsi->idx, vsi, vsi->type);
5949 /* updates the pf for this cleared vsi */
5950 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5951 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5953 i40e_vsi_free_arrays(vsi, true);
5955 pf->vsi[vsi->idx] = NULL;
5956 if (vsi->idx < pf->next_vsi)
5957 pf->next_vsi = vsi->idx;
5960 mutex_unlock(&pf->switch_mutex);
5968 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5969 * @vsi: the VSI being cleaned
5971 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5975 if (vsi->tx_rings && vsi->tx_rings[0]) {
5976 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5977 kfree_rcu(vsi->tx_rings[i], rcu);
5978 vsi->tx_rings[i] = NULL;
5979 vsi->rx_rings[i] = NULL;
5985 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5986 * @vsi: the VSI being configured
5988 static int i40e_alloc_rings(struct i40e_vsi *vsi)
5990 struct i40e_pf *pf = vsi->back;
5993 /* Set basic values in the rings to be used later during open() */
5994 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5995 struct i40e_ring *tx_ring;
5996 struct i40e_ring *rx_ring;
5998 /* allocate space for both Tx and Rx in one shot */
5999 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6003 tx_ring->queue_index = i;
6004 tx_ring->reg_idx = vsi->base_queue + i;
6005 tx_ring->ring_active = false;
6007 tx_ring->netdev = vsi->netdev;
6008 tx_ring->dev = &pf->pdev->dev;
6009 tx_ring->count = vsi->num_desc;
6011 tx_ring->dcb_tc = 0;
6012 vsi->tx_rings[i] = tx_ring;
6014 rx_ring = &tx_ring[1];
6015 rx_ring->queue_index = i;
6016 rx_ring->reg_idx = vsi->base_queue + i;
6017 rx_ring->ring_active = false;
6019 rx_ring->netdev = vsi->netdev;
6020 rx_ring->dev = &pf->pdev->dev;
6021 rx_ring->count = vsi->num_desc;
6023 rx_ring->dcb_tc = 0;
6024 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6025 set_ring_16byte_desc_enabled(rx_ring);
6027 clear_ring_16byte_desc_enabled(rx_ring);
6028 vsi->rx_rings[i] = rx_ring;
6034 i40e_vsi_clear_rings(vsi);
6039 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6040 * @pf: board private structure
6041 * @vectors: the number of MSI-X vectors to request
6043 * Returns the number of vectors reserved, or error
6045 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6047 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6048 I40E_MIN_MSIX, vectors);
6050 dev_info(&pf->pdev->dev,
6051 "MSI-X vector reservation failed: %d\n", vectors);
6055 pf->num_msix_entries = vectors;
6061 * i40e_init_msix - Setup the MSIX capability
6062 * @pf: board private structure
6064 * Work with the OS to set up the MSIX vectors needed.
6066 * Returns 0 on success, negative on failure
6068 static int i40e_init_msix(struct i40e_pf *pf)
6070 i40e_status err = 0;
6071 struct i40e_hw *hw = &pf->hw;
6075 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6078 /* The number of vectors we'll request will be comprised of:
6079 * - Add 1 for "other" cause for Admin Queue events, etc.
6080 * - The number of LAN queue pairs
6081 * - Queues being used for RSS.
6082 * We don't need as many as max_rss_size vectors.
6083 * use rss_size instead in the calculation since that
6084 * is governed by number of cpus in the system.
6085 * - assumes symmetric Tx/Rx pairing
6086 * - The number of VMDq pairs
6087 * Once we count this up, try the request.
6089 * If we can't get what we want, we'll simplify to nearly nothing
6090 * and try again. If that still fails, we punt.
6092 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6093 pf->num_vmdq_msix = pf->num_vmdq_qps;
6094 v_budget = 1 + pf->num_lan_msix;
6095 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6096 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6099 /* Scale down if necessary, and the rings will share vectors */
6100 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6102 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6104 if (!pf->msix_entries)
6107 for (i = 0; i < v_budget; i++)
6108 pf->msix_entries[i].entry = i;
6109 vec = i40e_reserve_msix_vectors(pf, v_budget);
6110 if (vec < I40E_MIN_MSIX) {
6111 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6112 kfree(pf->msix_entries);
6113 pf->msix_entries = NULL;
6116 } else if (vec == I40E_MIN_MSIX) {
6117 /* Adjust for minimal MSIX use */
6118 dev_info(&pf->pdev->dev, "Features disabled, not enough MSI-X vectors\n");
6119 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6120 pf->num_vmdq_vsis = 0;
6121 pf->num_vmdq_qps = 0;
6122 pf->num_vmdq_msix = 0;
6123 pf->num_lan_qps = 1;
6124 pf->num_lan_msix = 1;
6126 } else if (vec != v_budget) {
6127 /* Scale vector usage down */
6128 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6129 vec--; /* reserve the misc vector */
6131 /* partition out the remaining vectors */
6134 pf->num_vmdq_vsis = 1;
6135 pf->num_lan_msix = 1;
6138 pf->num_vmdq_vsis = 1;
6139 pf->num_lan_msix = 2;
6142 pf->num_lan_msix = min_t(int, (vec / 2),
6144 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6145 I40E_DEFAULT_NUM_VMDQ_VSI);
6154 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6155 * @vsi: the VSI being configured
6156 * @v_idx: index of the vector in the vsi struct
6158 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6160 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6162 struct i40e_q_vector *q_vector;
6164 /* allocate q_vector */
6165 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6169 q_vector->vsi = vsi;
6170 q_vector->v_idx = v_idx;
6171 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6173 netif_napi_add(vsi->netdev, &q_vector->napi,
6174 i40e_napi_poll, vsi->work_limit);
6176 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6177 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6179 /* tie q_vector and vsi together */
6180 vsi->q_vectors[v_idx] = q_vector;
6186 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6187 * @vsi: the VSI being configured
6189 * We allocate one q_vector per queue interrupt. If allocation fails we
6192 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6194 struct i40e_pf *pf = vsi->back;
6195 int v_idx, num_q_vectors;
6198 /* if not MSIX, give the one vector only to the LAN VSI */
6199 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6200 num_q_vectors = vsi->num_q_vectors;
6201 else if (vsi == pf->vsi[pf->lan_vsi])
6206 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6207 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6216 i40e_free_q_vector(vsi, v_idx);
6222 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6223 * @pf: board private structure to initialize
6225 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6229 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6230 err = i40e_init_msix(pf);
6232 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6233 I40E_FLAG_RSS_ENABLED |
6234 I40E_FLAG_DCB_ENABLED |
6235 I40E_FLAG_SRIOV_ENABLED |
6236 I40E_FLAG_FD_SB_ENABLED |
6237 I40E_FLAG_FD_ATR_ENABLED |
6238 I40E_FLAG_VMDQ_ENABLED);
6240 /* rework the queue expectations without MSIX */
6241 i40e_determine_queue_usage(pf);
6245 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6246 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6247 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6248 err = pci_enable_msi(pf->pdev);
6250 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6251 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6255 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6256 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6258 /* track first vector for misc interrupts */
6259 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6263 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6264 * @pf: board private structure
6266 * This sets up the handler for MSIX 0, which is used to manage the
6267 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6268 * when in MSI or Legacy interrupt mode.
6270 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6272 struct i40e_hw *hw = &pf->hw;
6275 /* Only request the irq if this is the first time through, and
6276 * not when we're rebuilding after a Reset
6278 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6279 err = request_irq(pf->msix_entries[0].vector,
6280 i40e_intr, 0, pf->misc_int_name, pf);
6282 dev_info(&pf->pdev->dev,
6283 "request_irq for %s failed: %d\n",
6284 pf->misc_int_name, err);
6289 i40e_enable_misc_int_causes(hw);
6291 /* associate no queues to the misc vector */
6292 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6293 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6297 i40e_irq_dynamic_enable_icr0(pf);
6303 * i40e_config_rss - Prepare for RSS if used
6304 * @pf: board private structure
6306 static int i40e_config_rss(struct i40e_pf *pf)
6308 /* Set of random keys generated using kernel random number generator */
6309 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6310 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6311 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6312 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6313 struct i40e_hw *hw = &pf->hw;
6318 /* Fill out hash function seed */
6319 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6320 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6322 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6323 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6324 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6325 hena |= I40E_DEFAULT_RSS_HENA;
6326 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6327 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6329 /* Populate the LUT with max no. of queues in round robin fashion */
6330 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
6332 /* The assumption is that lan qp count will be the highest
6333 * qp count for any PF VSI that needs RSS.
6334 * If multiple VSIs need RSS support, all the qp counts
6335 * for those VSIs should be a power of 2 for RSS to work.
6336 * If LAN VSI is the only consumer for RSS then this requirement
6339 if (j == pf->rss_size)
6341 /* lut = 4-byte sliding window of 4 lut entries */
6342 lut = (lut << 8) | (j &
6343 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6344 /* On i = 3, we have 4 entries in lut; write to the register */
6346 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6354 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6355 * @pf: board private structure
6356 * @queue_count: the requested queue count for rss.
6358 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6359 * count which may be different from the requested queue count.
6361 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6363 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6366 queue_count = min_t(int, queue_count, pf->rss_size_max);
6367 queue_count = rounddown_pow_of_two(queue_count);
6369 if (queue_count != pf->rss_size) {
6370 i40e_prep_for_reset(pf);
6372 pf->rss_size = queue_count;
6374 i40e_reset_and_rebuild(pf, true);
6375 i40e_config_rss(pf);
6377 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6378 return pf->rss_size;
6382 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6383 * @pf: board private structure to initialize
6385 * i40e_sw_init initializes the Adapter private data structure.
6386 * Fields are initialized based on PCI device information and
6387 * OS network device settings (MTU size).
6389 static int i40e_sw_init(struct i40e_pf *pf)
6394 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6395 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6396 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6397 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6398 if (I40E_DEBUG_USER & debug)
6399 pf->hw.debug_mask = debug;
6400 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6401 I40E_DEFAULT_MSG_ENABLE);
6404 /* Set default capability flags */
6405 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6406 I40E_FLAG_MSI_ENABLED |
6407 I40E_FLAG_MSIX_ENABLED |
6408 I40E_FLAG_RX_1BUF_ENABLED;
6410 /* Depending on PF configurations, it is possible that the RSS
6411 * maximum might end up larger than the available queues
6413 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6414 pf->rss_size_max = min_t(int, pf->rss_size_max,
6415 pf->hw.func_caps.num_tx_qp);
6416 if (pf->hw.func_caps.rss) {
6417 pf->flags |= I40E_FLAG_RSS_ENABLED;
6418 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6419 pf->rss_size = rounddown_pow_of_two(pf->rss_size);
6424 /* MFP mode enabled */
6425 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6426 pf->flags |= I40E_FLAG_MFP_ENABLED;
6427 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6430 /* FW/NVM is not yet fixed in this regard */
6431 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6432 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6433 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6434 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6435 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6436 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6438 dev_info(&pf->pdev->dev,
6439 "Flow Director Sideband mode Disabled in MFP mode\n");
6441 pf->fdir_pf_filter_count =
6442 pf->hw.func_caps.fd_filters_guaranteed;
6443 pf->hw.fdir_shared_filter_count =
6444 pf->hw.func_caps.fd_filters_best_effort;
6447 if (pf->hw.func_caps.vmdq) {
6448 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6449 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6450 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6453 #ifdef CONFIG_PCI_IOV
6454 if (pf->hw.func_caps.num_vfs) {
6455 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6456 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6457 pf->num_req_vfs = min_t(int,
6458 pf->hw.func_caps.num_vfs,
6461 #endif /* CONFIG_PCI_IOV */
6462 pf->eeprom_version = 0xDEAD;
6463 pf->lan_veb = I40E_NO_VEB;
6464 pf->lan_vsi = I40E_NO_VSI;
6466 /* set up queue assignment tracking */
6467 size = sizeof(struct i40e_lump_tracking)
6468 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6469 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6474 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6475 pf->qp_pile->search_hint = 0;
6477 /* set up vector assignment tracking */
6478 size = sizeof(struct i40e_lump_tracking)
6479 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6480 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6481 if (!pf->irq_pile) {
6486 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6487 pf->irq_pile->search_hint = 0;
6489 mutex_init(&pf->switch_mutex);
6496 * i40e_set_ntuple - set the ntuple feature flag and take action
6497 * @pf: board private structure to initialize
6498 * @features: the feature set that the stack is suggesting
6500 * returns a bool to indicate if reset needs to happen
6502 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
6504 bool need_reset = false;
6506 /* Check if Flow Director n-tuple support was enabled or disabled. If
6507 * the state changed, we need to reset.
6509 if (features & NETIF_F_NTUPLE) {
6510 /* Enable filters and mark for reset */
6511 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6513 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6515 /* turn off filters, mark for reset and clear SW filter list */
6516 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
6518 i40e_fdir_filter_exit(pf);
6520 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6521 /* if ATR was disabled it can be re-enabled. */
6522 if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED))
6523 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6529 * i40e_set_features - set the netdev feature flags
6530 * @netdev: ptr to the netdev being adjusted
6531 * @features: the feature set that the stack is suggesting
6533 static int i40e_set_features(struct net_device *netdev,
6534 netdev_features_t features)
6536 struct i40e_netdev_priv *np = netdev_priv(netdev);
6537 struct i40e_vsi *vsi = np->vsi;
6538 struct i40e_pf *pf = vsi->back;
6541 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6542 i40e_vlan_stripping_enable(vsi);
6544 i40e_vlan_stripping_disable(vsi);
6546 need_reset = i40e_set_ntuple(pf, features);
6549 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
6554 #ifdef CONFIG_I40E_VXLAN
6556 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6557 * @pf: board private structure
6558 * @port: The UDP port to look up
6560 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6562 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6566 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6567 if (pf->vxlan_ports[i] == port)
6575 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6576 * @netdev: This physical port's netdev
6577 * @sa_family: Socket Family that VXLAN is notifying us about
6578 * @port: New UDP port number that VXLAN started listening to
6580 static void i40e_add_vxlan_port(struct net_device *netdev,
6581 sa_family_t sa_family, __be16 port)
6583 struct i40e_netdev_priv *np = netdev_priv(netdev);
6584 struct i40e_vsi *vsi = np->vsi;
6585 struct i40e_pf *pf = vsi->back;
6589 if (sa_family == AF_INET6)
6592 idx = i40e_get_vxlan_port_idx(pf, port);
6594 /* Check if port already exists */
6595 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6596 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6600 /* Now check if there is space to add the new port */
6601 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6603 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6604 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6609 /* New port: add it and mark its index in the bitmap */
6610 pf->vxlan_ports[next_idx] = port;
6611 pf->pending_vxlan_bitmap |= (1 << next_idx);
6613 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6617 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6618 * @netdev: This physical port's netdev
6619 * @sa_family: Socket Family that VXLAN is notifying us about
6620 * @port: UDP port number that VXLAN stopped listening to
6622 static void i40e_del_vxlan_port(struct net_device *netdev,
6623 sa_family_t sa_family, __be16 port)
6625 struct i40e_netdev_priv *np = netdev_priv(netdev);
6626 struct i40e_vsi *vsi = np->vsi;
6627 struct i40e_pf *pf = vsi->back;
6630 if (sa_family == AF_INET6)
6633 idx = i40e_get_vxlan_port_idx(pf, port);
6635 /* Check if port already exists */
6636 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6637 /* if port exists, set it to 0 (mark for deletion)
6638 * and make it pending
6640 pf->vxlan_ports[idx] = 0;
6642 pf->pending_vxlan_bitmap |= (1 << idx);
6644 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6646 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6652 static const struct net_device_ops i40e_netdev_ops = {
6653 .ndo_open = i40e_open,
6654 .ndo_stop = i40e_close,
6655 .ndo_start_xmit = i40e_lan_xmit_frame,
6656 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
6657 .ndo_set_rx_mode = i40e_set_rx_mode,
6658 .ndo_validate_addr = eth_validate_addr,
6659 .ndo_set_mac_address = i40e_set_mac,
6660 .ndo_change_mtu = i40e_change_mtu,
6661 .ndo_do_ioctl = i40e_ioctl,
6662 .ndo_tx_timeout = i40e_tx_timeout,
6663 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
6664 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
6665 #ifdef CONFIG_NET_POLL_CONTROLLER
6666 .ndo_poll_controller = i40e_netpoll,
6668 .ndo_setup_tc = i40e_setup_tc,
6669 .ndo_set_features = i40e_set_features,
6670 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6671 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6672 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
6673 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6674 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
6675 #ifdef CONFIG_I40E_VXLAN
6676 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6677 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6682 * i40e_config_netdev - Setup the netdev flags
6683 * @vsi: the VSI being configured
6685 * Returns 0 on success, negative value on failure
6687 static int i40e_config_netdev(struct i40e_vsi *vsi)
6689 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6690 struct i40e_pf *pf = vsi->back;
6691 struct i40e_hw *hw = &pf->hw;
6692 struct i40e_netdev_priv *np;
6693 struct net_device *netdev;
6694 u8 mac_addr[ETH_ALEN];
6697 etherdev_size = sizeof(struct i40e_netdev_priv);
6698 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
6702 vsi->netdev = netdev;
6703 np = netdev_priv(netdev);
6706 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
6707 NETIF_F_GSO_UDP_TUNNEL |
6710 netdev->features = NETIF_F_SG |
6714 NETIF_F_GSO_UDP_TUNNEL |
6715 NETIF_F_HW_VLAN_CTAG_TX |
6716 NETIF_F_HW_VLAN_CTAG_RX |
6717 NETIF_F_HW_VLAN_CTAG_FILTER |
6727 /* copy netdev features into list of user selectable features */
6728 netdev->hw_features |= netdev->features;
6730 if (vsi->type == I40E_VSI_MAIN) {
6731 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6732 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
6734 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6735 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
6736 pf->vsi[pf->lan_vsi]->netdev->name);
6737 random_ether_addr(mac_addr);
6738 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
6740 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6742 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
6743 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
6744 /* vlan gets same features (except vlan offload)
6745 * after any tweaks for specific VSI types
6747 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
6748 NETIF_F_HW_VLAN_CTAG_RX |
6749 NETIF_F_HW_VLAN_CTAG_FILTER);
6750 netdev->priv_flags |= IFF_UNICAST_FLT;
6751 netdev->priv_flags |= IFF_SUPP_NOFCS;
6752 /* Setup netdev TC information */
6753 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
6755 netdev->netdev_ops = &i40e_netdev_ops;
6756 netdev->watchdog_timeo = 5 * HZ;
6757 i40e_set_ethtool_ops(netdev);
6763 * i40e_vsi_delete - Delete a VSI from the switch
6764 * @vsi: the VSI being removed
6766 * Returns 0 on success, negative value on failure
6768 static void i40e_vsi_delete(struct i40e_vsi *vsi)
6770 /* remove default VSI is not allowed */
6771 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
6774 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6779 * i40e_add_vsi - Add a VSI to the switch
6780 * @vsi: the VSI being configured
6782 * This initializes a VSI context depending on the VSI type to be added and
6783 * passes it down to the add_vsi aq command.
6785 static int i40e_add_vsi(struct i40e_vsi *vsi)
6788 struct i40e_mac_filter *f, *ftmp;
6789 struct i40e_pf *pf = vsi->back;
6790 struct i40e_hw *hw = &pf->hw;
6791 struct i40e_vsi_context ctxt;
6792 u8 enabled_tc = 0x1; /* TC0 enabled */
6795 memset(&ctxt, 0, sizeof(ctxt));
6796 switch (vsi->type) {
6798 /* The PF's main VSI is already setup as part of the
6799 * device initialization, so we'll not bother with
6800 * the add_vsi call, but we will retrieve the current
6803 ctxt.seid = pf->main_vsi_seid;
6804 ctxt.pf_num = pf->hw.pf_id;
6806 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6807 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6809 dev_info(&pf->pdev->dev,
6810 "couldn't get pf vsi config, err %d, aq_err %d\n",
6811 ret, pf->hw.aq.asq_last_status);
6814 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6815 vsi->info.valid_sections = 0;
6817 vsi->seid = ctxt.seid;
6818 vsi->id = ctxt.vsi_number;
6820 enabled_tc = i40e_pf_get_tc_map(pf);
6822 /* MFP mode setup queue map and update VSI */
6823 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6824 memset(&ctxt, 0, sizeof(ctxt));
6825 ctxt.seid = pf->main_vsi_seid;
6826 ctxt.pf_num = pf->hw.pf_id;
6828 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
6829 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
6831 dev_info(&pf->pdev->dev,
6832 "update vsi failed, aq_err=%d\n",
6833 pf->hw.aq.asq_last_status);
6837 /* update the local VSI info queue map */
6838 i40e_vsi_update_queue_map(vsi, &ctxt);
6839 vsi->info.valid_sections = 0;
6841 /* Default/Main VSI is only enabled for TC0
6842 * reconfigure it to enable all TCs that are
6843 * available on the port in SFP mode.
6845 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6847 dev_info(&pf->pdev->dev,
6848 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
6850 pf->hw.aq.asq_last_status);
6857 ctxt.pf_num = hw->pf_id;
6859 ctxt.uplink_seid = vsi->uplink_seid;
6860 ctxt.connection_type = 0x1; /* regular data port */
6861 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6862 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6865 case I40E_VSI_VMDQ2:
6866 ctxt.pf_num = hw->pf_id;
6868 ctxt.uplink_seid = vsi->uplink_seid;
6869 ctxt.connection_type = 0x1; /* regular data port */
6870 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6872 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6874 /* This VSI is connected to VEB so the switch_id
6875 * should be set to zero by default.
6877 ctxt.info.switch_id = 0;
6878 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
6879 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6881 /* Setup the VSI tx/rx queue map for TC0 only for now */
6882 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6885 case I40E_VSI_SRIOV:
6886 ctxt.pf_num = hw->pf_id;
6887 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
6888 ctxt.uplink_seid = vsi->uplink_seid;
6889 ctxt.connection_type = 0x1; /* regular data port */
6890 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
6892 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6894 /* This VSI is connected to VEB so the switch_id
6895 * should be set to zero by default.
6897 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6899 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6900 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
6901 /* Setup the VSI tx/rx queue map for TC0 only for now */
6902 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6909 if (vsi->type != I40E_VSI_MAIN) {
6910 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6912 dev_info(&vsi->back->pdev->dev,
6913 "add vsi failed, aq_err=%d\n",
6914 vsi->back->hw.aq.asq_last_status);
6918 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6919 vsi->info.valid_sections = 0;
6920 vsi->seid = ctxt.seid;
6921 vsi->id = ctxt.vsi_number;
6924 /* If macvlan filters already exist, force them to get loaded */
6925 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
6930 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
6931 pf->flags |= I40E_FLAG_FILTER_SYNC;
6934 /* Update VSI BW information */
6935 ret = i40e_vsi_get_bw_info(vsi);
6937 dev_info(&pf->pdev->dev,
6938 "couldn't get vsi bw info, err %d, aq_err %d\n",
6939 ret, pf->hw.aq.asq_last_status);
6940 /* VSI is already added so not tearing that up */
6949 * i40e_vsi_release - Delete a VSI and free its resources
6950 * @vsi: the VSI being removed
6952 * Returns 0 on success or < 0 on error
6954 int i40e_vsi_release(struct i40e_vsi *vsi)
6956 struct i40e_mac_filter *f, *ftmp;
6957 struct i40e_veb *veb = NULL;
6964 /* release of a VEB-owner or last VSI is not allowed */
6965 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6966 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6967 vsi->seid, vsi->uplink_seid);
6970 if (vsi == pf->vsi[pf->lan_vsi] &&
6971 !test_bit(__I40E_DOWN, &pf->state)) {
6972 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6976 uplink_seid = vsi->uplink_seid;
6977 if (vsi->type != I40E_VSI_SRIOV) {
6978 if (vsi->netdev_registered) {
6979 vsi->netdev_registered = false;
6981 /* results in a call to i40e_close() */
6982 unregister_netdev(vsi->netdev);
6985 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6987 i40e_vsi_free_irq(vsi);
6988 i40e_vsi_free_tx_resources(vsi);
6989 i40e_vsi_free_rx_resources(vsi);
6991 i40e_vsi_disable_irq(vsi);
6994 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6995 i40e_del_filter(vsi, f->macaddr, f->vlan,
6996 f->is_vf, f->is_netdev);
6997 i40e_sync_vsi_filters(vsi);
6999 i40e_vsi_delete(vsi);
7000 i40e_vsi_free_q_vectors(vsi);
7002 free_netdev(vsi->netdev);
7005 i40e_vsi_clear_rings(vsi);
7006 i40e_vsi_clear(vsi);
7008 /* If this was the last thing on the VEB, except for the
7009 * controlling VSI, remove the VEB, which puts the controlling
7010 * VSI onto the next level down in the switch.
7012 * Well, okay, there's one more exception here: don't remove
7013 * the orphan VEBs yet. We'll wait for an explicit remove request
7014 * from up the network stack.
7016 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7018 pf->vsi[i]->uplink_seid == uplink_seid &&
7019 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7020 n++; /* count the VSIs */
7023 for (i = 0; i < I40E_MAX_VEB; i++) {
7026 if (pf->veb[i]->uplink_seid == uplink_seid)
7027 n++; /* count the VEBs */
7028 if (pf->veb[i]->seid == uplink_seid)
7031 if (n == 0 && veb && veb->uplink_seid != 0)
7032 i40e_veb_release(veb);
7038 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7039 * @vsi: ptr to the VSI
7041 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7042 * corresponding SW VSI structure and initializes num_queue_pairs for the
7043 * newly allocated VSI.
7045 * Returns 0 on success or negative on failure
7047 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7050 struct i40e_pf *pf = vsi->back;
7052 if (vsi->q_vectors[0]) {
7053 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7058 if (vsi->base_vector) {
7059 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7060 vsi->seid, vsi->base_vector);
7064 ret = i40e_vsi_alloc_q_vectors(vsi);
7066 dev_info(&pf->pdev->dev,
7067 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7068 vsi->num_q_vectors, vsi->seid, ret);
7069 vsi->num_q_vectors = 0;
7070 goto vector_setup_out;
7073 if (vsi->num_q_vectors)
7074 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7075 vsi->num_q_vectors, vsi->idx);
7076 if (vsi->base_vector < 0) {
7077 dev_info(&pf->pdev->dev,
7078 "failed to get queue tracking for VSI %d, err=%d\n",
7079 vsi->seid, vsi->base_vector);
7080 i40e_vsi_free_q_vectors(vsi);
7082 goto vector_setup_out;
7090 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7091 * @vsi: pointer to the vsi.
7093 * This re-allocates a vsi's queue resources.
7095 * Returns pointer to the successfully allocated and configured VSI sw struct
7096 * on success, otherwise returns NULL on failure.
7098 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7100 struct i40e_pf *pf = vsi->back;
7104 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7105 i40e_vsi_clear_rings(vsi);
7107 i40e_vsi_free_arrays(vsi, false);
7108 i40e_set_num_rings_in_vsi(vsi);
7109 ret = i40e_vsi_alloc_arrays(vsi, false);
7113 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7115 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7119 vsi->base_queue = ret;
7121 /* Update the FW view of the VSI. Force a reset of TC and queue
7122 * layout configurations.
7124 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7125 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7126 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7127 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7129 /* assign it some queues */
7130 ret = i40e_alloc_rings(vsi);
7134 /* map all of the rings to the q_vectors */
7135 i40e_vsi_map_rings_to_vectors(vsi);
7139 i40e_vsi_free_q_vectors(vsi);
7140 if (vsi->netdev_registered) {
7141 vsi->netdev_registered = false;
7142 unregister_netdev(vsi->netdev);
7143 free_netdev(vsi->netdev);
7146 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7148 i40e_vsi_clear(vsi);
7153 * i40e_vsi_setup - Set up a VSI by a given type
7154 * @pf: board private structure
7156 * @uplink_seid: the switch element to link to
7157 * @param1: usage depends upon VSI type. For VF types, indicates VF id
7159 * This allocates the sw VSI structure and its queue resources, then add a VSI
7160 * to the identified VEB.
7162 * Returns pointer to the successfully allocated and configure VSI sw struct on
7163 * success, otherwise returns NULL on failure.
7165 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7166 u16 uplink_seid, u32 param1)
7168 struct i40e_vsi *vsi = NULL;
7169 struct i40e_veb *veb = NULL;
7173 /* The requested uplink_seid must be either
7174 * - the PF's port seid
7175 * no VEB is needed because this is the PF
7176 * or this is a Flow Director special case VSI
7177 * - seid of an existing VEB
7178 * - seid of a VSI that owns an existing VEB
7179 * - seid of a VSI that doesn't own a VEB
7180 * a new VEB is created and the VSI becomes the owner
7181 * - seid of the PF VSI, which is what creates the first VEB
7182 * this is a special case of the previous
7184 * Find which uplink_seid we were given and create a new VEB if needed
7186 for (i = 0; i < I40E_MAX_VEB; i++) {
7187 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7193 if (!veb && uplink_seid != pf->mac_seid) {
7195 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7196 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7202 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7207 if (vsi->uplink_seid == pf->mac_seid)
7208 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7209 vsi->tc_config.enabled_tc);
7210 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7211 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7212 vsi->tc_config.enabled_tc);
7214 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7215 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7219 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7223 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7224 uplink_seid = veb->seid;
7227 /* get vsi sw struct */
7228 v_idx = i40e_vsi_mem_alloc(pf, type);
7231 vsi = pf->vsi[v_idx];
7235 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7237 if (type == I40E_VSI_MAIN)
7238 pf->lan_vsi = v_idx;
7239 else if (type == I40E_VSI_SRIOV)
7240 vsi->vf_id = param1;
7241 /* assign it some queues */
7242 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7245 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7249 vsi->base_queue = ret;
7251 /* get a VSI from the hardware */
7252 vsi->uplink_seid = uplink_seid;
7253 ret = i40e_add_vsi(vsi);
7257 switch (vsi->type) {
7258 /* setup the netdev if needed */
7260 case I40E_VSI_VMDQ2:
7261 ret = i40e_config_netdev(vsi);
7264 ret = register_netdev(vsi->netdev);
7267 vsi->netdev_registered = true;
7268 netif_carrier_off(vsi->netdev);
7269 #ifdef CONFIG_I40E_DCB
7270 /* Setup DCB netlink interface */
7271 i40e_dcbnl_setup(vsi);
7272 #endif /* CONFIG_I40E_DCB */
7276 /* set up vectors and rings if needed */
7277 ret = i40e_vsi_setup_vectors(vsi);
7281 ret = i40e_alloc_rings(vsi);
7285 /* map all of the rings to the q_vectors */
7286 i40e_vsi_map_rings_to_vectors(vsi);
7288 i40e_vsi_reset_stats(vsi);
7292 /* no netdev or rings for the other VSI types */
7299 i40e_vsi_free_q_vectors(vsi);
7301 if (vsi->netdev_registered) {
7302 vsi->netdev_registered = false;
7303 unregister_netdev(vsi->netdev);
7304 free_netdev(vsi->netdev);
7308 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7310 i40e_vsi_clear(vsi);
7316 * i40e_veb_get_bw_info - Query VEB BW information
7317 * @veb: the veb to query
7319 * Query the Tx scheduler BW configuration data for given VEB
7321 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7323 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7324 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7325 struct i40e_pf *pf = veb->pf;
7326 struct i40e_hw *hw = &pf->hw;
7331 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7334 dev_info(&pf->pdev->dev,
7335 "query veb bw config failed, aq_err=%d\n",
7336 hw->aq.asq_last_status);
7340 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7343 dev_info(&pf->pdev->dev,
7344 "query veb bw ets config failed, aq_err=%d\n",
7345 hw->aq.asq_last_status);
7349 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7350 veb->bw_max_quanta = ets_data.tc_bw_max;
7351 veb->is_abs_credits = bw_data.absolute_credits_enable;
7352 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7353 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7354 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7355 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7356 veb->bw_tc_limit_credits[i] =
7357 le16_to_cpu(bw_data.tc_bw_limits[i]);
7358 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7366 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7367 * @pf: board private structure
7369 * On error: returns error code (negative)
7370 * On success: returns vsi index in PF (positive)
7372 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7375 struct i40e_veb *veb;
7378 /* Need to protect the allocation of switch elements at the PF level */
7379 mutex_lock(&pf->switch_mutex);
7381 /* VEB list may be fragmented if VEB creation/destruction has
7382 * been happening. We can afford to do a quick scan to look
7383 * for any free slots in the list.
7385 * find next empty veb slot, looping back around if necessary
7388 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7390 if (i >= I40E_MAX_VEB) {
7392 goto err_alloc_veb; /* out of VEB slots! */
7395 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7402 veb->enabled_tc = 1;
7407 mutex_unlock(&pf->switch_mutex);
7412 * i40e_switch_branch_release - Delete a branch of the switch tree
7413 * @branch: where to start deleting
7415 * This uses recursion to find the tips of the branch to be
7416 * removed, deleting until we get back to and can delete this VEB.
7418 static void i40e_switch_branch_release(struct i40e_veb *branch)
7420 struct i40e_pf *pf = branch->pf;
7421 u16 branch_seid = branch->seid;
7422 u16 veb_idx = branch->idx;
7425 /* release any VEBs on this VEB - RECURSION */
7426 for (i = 0; i < I40E_MAX_VEB; i++) {
7429 if (pf->veb[i]->uplink_seid == branch->seid)
7430 i40e_switch_branch_release(pf->veb[i]);
7433 /* Release the VSIs on this VEB, but not the owner VSI.
7435 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7436 * the VEB itself, so don't use (*branch) after this loop.
7438 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7441 if (pf->vsi[i]->uplink_seid == branch_seid &&
7442 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7443 i40e_vsi_release(pf->vsi[i]);
7447 /* There's one corner case where the VEB might not have been
7448 * removed, so double check it here and remove it if needed.
7449 * This case happens if the veb was created from the debugfs
7450 * commands and no VSIs were added to it.
7452 if (pf->veb[veb_idx])
7453 i40e_veb_release(pf->veb[veb_idx]);
7457 * i40e_veb_clear - remove veb struct
7458 * @veb: the veb to remove
7460 static void i40e_veb_clear(struct i40e_veb *veb)
7466 struct i40e_pf *pf = veb->pf;
7468 mutex_lock(&pf->switch_mutex);
7469 if (pf->veb[veb->idx] == veb)
7470 pf->veb[veb->idx] = NULL;
7471 mutex_unlock(&pf->switch_mutex);
7478 * i40e_veb_release - Delete a VEB and free its resources
7479 * @veb: the VEB being removed
7481 void i40e_veb_release(struct i40e_veb *veb)
7483 struct i40e_vsi *vsi = NULL;
7489 /* find the remaining VSI and check for extras */
7490 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7491 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7497 dev_info(&pf->pdev->dev,
7498 "can't remove VEB %d with %d VSIs left\n",
7503 /* move the remaining VSI to uplink veb */
7504 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7505 if (veb->uplink_seid) {
7506 vsi->uplink_seid = veb->uplink_seid;
7507 if (veb->uplink_seid == pf->mac_seid)
7508 vsi->veb_idx = I40E_NO_VEB;
7510 vsi->veb_idx = veb->veb_idx;
7513 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7514 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7517 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7518 i40e_veb_clear(veb);
7524 * i40e_add_veb - create the VEB in the switch
7525 * @veb: the VEB to be instantiated
7526 * @vsi: the controlling VSI
7528 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7530 bool is_default = false;
7531 bool is_cloud = false;
7534 /* get a VEB from the hardware */
7535 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
7536 veb->enabled_tc, is_default,
7537 is_cloud, &veb->seid, NULL);
7539 dev_info(&veb->pf->pdev->dev,
7540 "couldn't add VEB, err %d, aq_err %d\n",
7541 ret, veb->pf->hw.aq.asq_last_status);
7545 /* get statistics counter */
7546 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
7547 &veb->stats_idx, NULL, NULL, NULL);
7549 dev_info(&veb->pf->pdev->dev,
7550 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
7551 ret, veb->pf->hw.aq.asq_last_status);
7554 ret = i40e_veb_get_bw_info(veb);
7556 dev_info(&veb->pf->pdev->dev,
7557 "couldn't get VEB bw info, err %d, aq_err %d\n",
7558 ret, veb->pf->hw.aq.asq_last_status);
7559 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
7563 vsi->uplink_seid = veb->seid;
7564 vsi->veb_idx = veb->idx;
7565 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7571 * i40e_veb_setup - Set up a VEB
7572 * @pf: board private structure
7573 * @flags: VEB setup flags
7574 * @uplink_seid: the switch element to link to
7575 * @vsi_seid: the initial VSI seid
7576 * @enabled_tc: Enabled TC bit-map
7578 * This allocates the sw VEB structure and links it into the switch
7579 * It is possible and legal for this to be a duplicate of an already
7580 * existing VEB. It is also possible for both uplink and vsi seids
7581 * to be zero, in order to create a floating VEB.
7583 * Returns pointer to the successfully allocated VEB sw struct on
7584 * success, otherwise returns NULL on failure.
7586 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7587 u16 uplink_seid, u16 vsi_seid,
7590 struct i40e_veb *veb, *uplink_veb = NULL;
7591 int vsi_idx, veb_idx;
7594 /* if one seid is 0, the other must be 0 to create a floating relay */
7595 if ((uplink_seid == 0 || vsi_seid == 0) &&
7596 (uplink_seid + vsi_seid != 0)) {
7597 dev_info(&pf->pdev->dev,
7598 "one, not both seid's are 0: uplink=%d vsi=%d\n",
7599 uplink_seid, vsi_seid);
7603 /* make sure there is such a vsi and uplink */
7604 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
7605 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
7607 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
7608 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
7613 if (uplink_seid && uplink_seid != pf->mac_seid) {
7614 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
7615 if (pf->veb[veb_idx] &&
7616 pf->veb[veb_idx]->seid == uplink_seid) {
7617 uplink_veb = pf->veb[veb_idx];
7622 dev_info(&pf->pdev->dev,
7623 "uplink seid %d not found\n", uplink_seid);
7628 /* get veb sw struct */
7629 veb_idx = i40e_veb_mem_alloc(pf);
7632 veb = pf->veb[veb_idx];
7634 veb->uplink_seid = uplink_seid;
7635 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
7636 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
7638 /* create the VEB in the switch */
7639 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7646 i40e_veb_clear(veb);
7652 * i40e_setup_pf_switch_element - set pf vars based on switch type
7653 * @pf: board private structure
7654 * @ele: element we are building info from
7655 * @num_reported: total number of elements
7656 * @printconfig: should we print the contents
7658 * helper function to assist in extracting a few useful SEID values.
7660 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
7661 struct i40e_aqc_switch_config_element_resp *ele,
7662 u16 num_reported, bool printconfig)
7664 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
7665 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
7666 u8 element_type = ele->element_type;
7667 u16 seid = le16_to_cpu(ele->seid);
7670 dev_info(&pf->pdev->dev,
7671 "type=%d seid=%d uplink=%d downlink=%d\n",
7672 element_type, seid, uplink_seid, downlink_seid);
7674 switch (element_type) {
7675 case I40E_SWITCH_ELEMENT_TYPE_MAC:
7676 pf->mac_seid = seid;
7678 case I40E_SWITCH_ELEMENT_TYPE_VEB:
7680 if (uplink_seid != pf->mac_seid)
7682 if (pf->lan_veb == I40E_NO_VEB) {
7685 /* find existing or else empty VEB */
7686 for (v = 0; v < I40E_MAX_VEB; v++) {
7687 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
7692 if (pf->lan_veb == I40E_NO_VEB) {
7693 v = i40e_veb_mem_alloc(pf);
7700 pf->veb[pf->lan_veb]->seid = seid;
7701 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
7702 pf->veb[pf->lan_veb]->pf = pf;
7703 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
7705 case I40E_SWITCH_ELEMENT_TYPE_VSI:
7706 if (num_reported != 1)
7708 /* This is immediately after a reset so we can assume this is
7711 pf->mac_seid = uplink_seid;
7712 pf->pf_seid = downlink_seid;
7713 pf->main_vsi_seid = seid;
7715 dev_info(&pf->pdev->dev,
7716 "pf_seid=%d main_vsi_seid=%d\n",
7717 pf->pf_seid, pf->main_vsi_seid);
7719 case I40E_SWITCH_ELEMENT_TYPE_PF:
7720 case I40E_SWITCH_ELEMENT_TYPE_VF:
7721 case I40E_SWITCH_ELEMENT_TYPE_EMP:
7722 case I40E_SWITCH_ELEMENT_TYPE_BMC:
7723 case I40E_SWITCH_ELEMENT_TYPE_PE:
7724 case I40E_SWITCH_ELEMENT_TYPE_PA:
7725 /* ignore these for now */
7728 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
7729 element_type, seid);
7735 * i40e_fetch_switch_configuration - Get switch config from firmware
7736 * @pf: board private structure
7737 * @printconfig: should we print the contents
7739 * Get the current switch configuration from the device and
7740 * extract a few useful SEID values.
7742 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7744 struct i40e_aqc_get_switch_config_resp *sw_config;
7750 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
7754 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
7756 u16 num_reported, num_total;
7758 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
7762 dev_info(&pf->pdev->dev,
7763 "get switch config failed %d aq_err=%x\n",
7764 ret, pf->hw.aq.asq_last_status);
7769 num_reported = le16_to_cpu(sw_config->header.num_reported);
7770 num_total = le16_to_cpu(sw_config->header.num_total);
7773 dev_info(&pf->pdev->dev,
7774 "header: %d reported %d total\n",
7775 num_reported, num_total);
7778 int sz = sizeof(*sw_config) * num_reported;
7780 kfree(pf->sw_config);
7781 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7783 memcpy(pf->sw_config, sw_config, sz);
7786 for (i = 0; i < num_reported; i++) {
7787 struct i40e_aqc_switch_config_element_resp *ele =
7788 &sw_config->element[i];
7790 i40e_setup_pf_switch_element(pf, ele, num_reported,
7793 } while (next_seid != 0);
7800 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
7801 * @pf: board private structure
7802 * @reinit: if the Main VSI needs to re-initialized.
7804 * Returns 0 on success, negative value on failure
7806 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
7808 u32 rxfc = 0, txfc = 0, rxfc_reg;
7811 /* find out what's out there already */
7812 ret = i40e_fetch_switch_configuration(pf, false);
7814 dev_info(&pf->pdev->dev,
7815 "couldn't fetch switch config, err %d, aq_err %d\n",
7816 ret, pf->hw.aq.asq_last_status);
7819 i40e_pf_reset_stats(pf);
7821 /* first time setup */
7822 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
7823 struct i40e_vsi *vsi = NULL;
7826 /* Set up the PF VSI associated with the PF's main VSI
7827 * that is already in the HW switch
7829 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
7830 uplink_seid = pf->veb[pf->lan_veb]->seid;
7832 uplink_seid = pf->mac_seid;
7833 if (pf->lan_vsi == I40E_NO_VSI)
7834 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
7836 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
7838 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
7839 i40e_fdir_teardown(pf);
7843 /* force a reset of TC and queue layout configurations */
7844 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7845 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7846 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7847 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7849 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
7851 i40e_fdir_sb_setup(pf);
7853 /* Setup static PF queue filter control settings */
7854 ret = i40e_setup_pf_filter_control(pf);
7856 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
7858 /* Failure here should not stop continuing other steps */
7861 /* enable RSS in the HW, even for only one queue, as the stack can use
7864 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
7865 i40e_config_rss(pf);
7867 /* fill in link information and enable LSE reporting */
7868 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
7869 i40e_link_event(pf);
7871 /* Initialize user-specific link properties */
7872 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
7873 I40E_AQ_AN_COMPLETED) ? true : false);
7874 /* requested_mode is set in probe or by ethtool */
7875 if (!pf->fc_autoneg_status)
7878 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
7879 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
7880 pf->hw.fc.current_mode = I40E_FC_FULL;
7881 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
7882 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
7883 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
7884 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
7886 pf->hw.fc.current_mode = I40E_FC_NONE;
7888 /* sync the flow control settings with the auto-neg values */
7889 switch (pf->hw.fc.current_mode) {
7894 case I40E_FC_TX_PAUSE:
7898 case I40E_FC_RX_PAUSE:
7903 case I40E_FC_DEFAULT:
7910 /* no default case, we have to handle all possibilities here */
7913 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
7915 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7916 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
7917 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
7919 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
7924 /* disable L2 flow control, user can turn it on if they wish */
7925 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
7926 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7927 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
7936 * i40e_determine_queue_usage - Work out queue distribution
7937 * @pf: board private structure
7939 static void i40e_determine_queue_usage(struct i40e_pf *pf)
7943 pf->num_lan_qps = 0;
7945 /* Find the max queues to be put into basic use. We'll always be
7946 * using TC0, whether or not DCB is running, and TC0 will get the
7949 queues_left = pf->hw.func_caps.num_tx_qp;
7951 if ((queues_left == 1) ||
7952 !(pf->flags & I40E_FLAG_MSIX_ENABLED) ||
7953 !(pf->flags & (I40E_FLAG_RSS_ENABLED | I40E_FLAG_FD_SB_ENABLED |
7954 I40E_FLAG_DCB_ENABLED))) {
7955 /* one qp for PF, no queues for anything else */
7957 pf->rss_size = pf->num_lan_qps = 1;
7959 /* make sure all the fancies are disabled */
7960 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7961 I40E_FLAG_FD_SB_ENABLED |
7962 I40E_FLAG_FD_ATR_ENABLED |
7963 I40E_FLAG_DCB_ENABLED |
7964 I40E_FLAG_SRIOV_ENABLED |
7965 I40E_FLAG_VMDQ_ENABLED);
7967 /* Not enough queues for all TCs */
7968 if ((pf->flags & I40E_FLAG_DCB_ENABLED) &&
7969 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
7970 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7971 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
7973 pf->num_lan_qps = pf->rss_size_max;
7974 queues_left -= pf->num_lan_qps;
7977 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7978 if (queues_left > 1) {
7979 queues_left -= 1; /* save 1 queue for FD */
7981 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7982 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
7986 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7987 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
7988 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
7989 (queues_left / pf->num_vf_qps));
7990 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
7993 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7994 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
7995 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
7996 (queues_left / pf->num_vmdq_qps));
7997 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
8000 pf->queues_left = queues_left;
8005 * i40e_setup_pf_filter_control - Setup PF static filter control
8006 * @pf: PF to be setup
8008 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8009 * settings. If PE/FCoE are enabled then it will also set the per PF
8010 * based filter sizes required for them. It also enables Flow director,
8011 * ethertype and macvlan type filter settings for the pf.
8013 * Returns 0 on success, negative on failure
8015 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8017 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8019 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8021 /* Flow Director is enabled */
8022 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8023 settings->enable_fdir = true;
8025 /* Ethtype and MACVLAN filters enabled for PF */
8026 settings->enable_ethtype = true;
8027 settings->enable_macvlan = true;
8029 if (i40e_set_filter_control(&pf->hw, settings))
8035 #define INFO_STRING_LEN 255
8036 static void i40e_print_features(struct i40e_pf *pf)
8038 struct i40e_hw *hw = &pf->hw;
8041 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8043 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8049 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8050 #ifdef CONFIG_PCI_IOV
8051 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8053 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8054 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8056 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8057 buf += sprintf(buf, "RSS ");
8058 buf += sprintf(buf, "FDir ");
8059 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8060 buf += sprintf(buf, "ATR ");
8061 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
8062 buf += sprintf(buf, "NTUPLE ");
8063 if (pf->flags & I40E_FLAG_DCB_ENABLED)
8064 buf += sprintf(buf, "DCB ");
8065 if (pf->flags & I40E_FLAG_PTP)
8066 buf += sprintf(buf, "PTP ");
8068 BUG_ON(buf > (string + INFO_STRING_LEN));
8069 dev_info(&pf->pdev->dev, "%s\n", string);
8074 * i40e_probe - Device initialization routine
8075 * @pdev: PCI device information struct
8076 * @ent: entry in i40e_pci_tbl
8078 * i40e_probe initializes a pf identified by a pci_dev structure.
8079 * The OS initialization, configuring of the pf private structure,
8080 * and a hardware reset occur.
8082 * Returns 0 on success, negative on failure
8084 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8086 struct i40e_driver_version dv;
8089 static u16 pfs_found;
8094 err = pci_enable_device_mem(pdev);
8098 /* set up for high or low dma */
8099 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8101 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8104 "DMA configuration failed: 0x%x\n", err);
8109 /* set up pci connections */
8110 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8111 IORESOURCE_MEM), i40e_driver_name);
8113 dev_info(&pdev->dev,
8114 "pci_request_selected_regions failed %d\n", err);
8118 pci_enable_pcie_error_reporting(pdev);
8119 pci_set_master(pdev);
8121 /* Now that we have a PCI connection, we need to do the
8122 * low level device setup. This is primarily setting up
8123 * the Admin Queue structures and then querying for the
8124 * device's current profile information.
8126 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8133 set_bit(__I40E_DOWN, &pf->state);
8137 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8138 pci_resource_len(pdev, 0));
8141 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8142 (unsigned int)pci_resource_start(pdev, 0),
8143 (unsigned int)pci_resource_len(pdev, 0), err);
8146 hw->vendor_id = pdev->vendor;
8147 hw->device_id = pdev->device;
8148 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8149 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8150 hw->subsystem_device_id = pdev->subsystem_device;
8151 hw->bus.device = PCI_SLOT(pdev->devfn);
8152 hw->bus.func = PCI_FUNC(pdev->devfn);
8153 pf->instance = pfs_found;
8155 /* do a special CORER for clearing PXE mode once at init */
8156 if (hw->revision_id == 0 &&
8157 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
8158 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
8163 i40e_clear_pxe_mode(hw);
8166 /* Reset here to make sure all is clean and to define PF 'n' */
8167 err = i40e_pf_reset(hw);
8169 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
8174 hw->aq.num_arq_entries = I40E_AQ_LEN;
8175 hw->aq.num_asq_entries = I40E_AQ_LEN;
8176 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8177 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8178 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
8179 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
8181 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
8183 err = i40e_init_shared_code(hw);
8185 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
8189 /* set up a default setting for link flow control */
8190 pf->hw.fc.requested_mode = I40E_FC_NONE;
8192 err = i40e_init_adminq(hw);
8193 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
8195 dev_info(&pdev->dev,
8196 "init_adminq failed: %d expecting API %02x.%02x\n",
8198 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8202 i40e_verify_eeprom(pf);
8204 i40e_clear_pxe_mode(hw);
8205 err = i40e_get_capabilities(pf);
8207 goto err_adminq_setup;
8209 err = i40e_sw_init(pf);
8211 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8215 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8216 hw->func_caps.num_rx_qp,
8217 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8219 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8220 goto err_init_lan_hmc;
8223 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8225 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8227 goto err_configure_lan_hmc;
8230 i40e_get_mac_addr(hw, hw->mac.addr);
8231 if (!is_valid_ether_addr(hw->mac.addr)) {
8232 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8236 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8237 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
8239 pci_set_drvdata(pdev, pf);
8240 pci_save_state(pdev);
8241 #ifdef CONFIG_I40E_DCB
8242 err = i40e_init_pf_dcb(pf);
8244 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8245 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8248 #endif /* CONFIG_I40E_DCB */
8250 /* set up periodic task facility */
8251 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8252 pf->service_timer_period = HZ;
8254 INIT_WORK(&pf->service_task, i40e_service_task);
8255 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8256 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8257 pf->link_check_timeout = jiffies;
8259 /* WoL defaults to disabled */
8261 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8263 /* set up the main switch operations */
8264 i40e_determine_queue_usage(pf);
8265 i40e_init_interrupt_scheme(pf);
8267 /* Set up the *vsi struct based on the number of VSIs in the HW,
8268 * and set up our local tracking of the MAIN PF vsi.
8270 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
8271 pf->vsi = kzalloc(len, GFP_KERNEL);
8274 goto err_switch_setup;
8277 err = i40e_setup_pf_switch(pf, false);
8279 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8283 /* The main driver is (mostly) up and happy. We need to set this state
8284 * before setting up the misc vector or we get a race and the vector
8285 * ends up disabled forever.
8287 clear_bit(__I40E_DOWN, &pf->state);
8289 /* In case of MSIX we are going to setup the misc vector right here
8290 * to handle admin queue events etc. In case of legacy and MSI
8291 * the misc functionality and queue processing is combined in
8292 * the same vector and that gets setup at open.
8294 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8295 err = i40e_setup_misc_vector(pf);
8297 dev_info(&pdev->dev,
8298 "setup of misc vector failed: %d\n", err);
8303 /* prep for VF support */
8304 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8305 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8306 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
8309 /* disable link interrupts for VFs */
8310 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8311 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8312 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8315 if (pci_num_vf(pdev)) {
8316 dev_info(&pdev->dev,
8317 "Active VFs found, allocating resources.\n");
8318 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8320 dev_info(&pdev->dev,
8321 "Error %d allocating resources for existing VFs\n",
8328 i40e_dbg_pf_init(pf);
8330 /* tell the firmware that we're starting */
8331 dv.major_version = DRV_VERSION_MAJOR;
8332 dv.minor_version = DRV_VERSION_MINOR;
8333 dv.build_version = DRV_VERSION_BUILD;
8334 dv.subbuild_version = 0;
8335 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
8337 /* since everything's happy, start the service_task timer */
8338 mod_timer(&pf->service_timer,
8339 round_jiffies(jiffies + pf->service_timer_period));
8341 /* Get the negotiated link width and speed from PCI config space */
8342 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8344 i40e_set_pci_config_data(hw, link_status);
8346 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
8347 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8348 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8349 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8351 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8352 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8353 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8354 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8357 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8358 hw->bus.speed < i40e_bus_speed_8000) {
8359 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8360 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8363 /* print a string summarizing features */
8364 i40e_print_features(pf);
8368 /* Unwind what we've done if something failed in the setup */
8370 set_bit(__I40E_DOWN, &pf->state);
8371 i40e_clear_interrupt_scheme(pf);
8374 i40e_reset_interrupt_capability(pf);
8375 del_timer_sync(&pf->service_timer);
8376 #ifdef CONFIG_I40E_DCB
8378 #endif /* CONFIG_I40E_DCB */
8380 err_configure_lan_hmc:
8381 (void)i40e_shutdown_lan_hmc(hw);
8384 kfree(pf->irq_pile);
8387 (void)i40e_shutdown_adminq(hw);
8389 iounmap(hw->hw_addr);
8393 pci_disable_pcie_error_reporting(pdev);
8394 pci_release_selected_regions(pdev,
8395 pci_select_bars(pdev, IORESOURCE_MEM));
8398 pci_disable_device(pdev);
8403 * i40e_remove - Device removal routine
8404 * @pdev: PCI device information struct
8406 * i40e_remove is called by the PCI subsystem to alert the driver
8407 * that is should release a PCI device. This could be caused by a
8408 * Hot-Plug event, or because the driver is going to be removed from
8411 static void i40e_remove(struct pci_dev *pdev)
8413 struct i40e_pf *pf = pci_get_drvdata(pdev);
8414 i40e_status ret_code;
8418 i40e_dbg_pf_exit(pf);
8422 /* no more scheduling of any task */
8423 set_bit(__I40E_DOWN, &pf->state);
8424 del_timer_sync(&pf->service_timer);
8425 cancel_work_sync(&pf->service_task);
8427 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8429 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8432 i40e_fdir_teardown(pf);
8434 /* If there is a switch structure or any orphans, remove them.
8435 * This will leave only the PF's VSI remaining.
8437 for (i = 0; i < I40E_MAX_VEB; i++) {
8441 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8442 pf->veb[i]->uplink_seid == 0)
8443 i40e_switch_branch_release(pf->veb[i]);
8446 /* Now we can shutdown the PF's VSI, just before we kill
8449 if (pf->vsi[pf->lan_vsi])
8450 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8452 i40e_stop_misc_vector(pf);
8453 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8454 synchronize_irq(pf->msix_entries[0].vector);
8455 free_irq(pf->msix_entries[0].vector, pf);
8458 /* shutdown and destroy the HMC */
8459 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8461 dev_warn(&pdev->dev,
8462 "Failed to destroy the HMC resources: %d\n", ret_code);
8464 /* shutdown the adminq */
8465 ret_code = i40e_shutdown_adminq(&pf->hw);
8467 dev_warn(&pdev->dev,
8468 "Failed to destroy the Admin Queue resources: %d\n",
8471 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8472 i40e_clear_interrupt_scheme(pf);
8473 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
8475 i40e_vsi_clear_rings(pf->vsi[i]);
8476 i40e_vsi_clear(pf->vsi[i]);
8481 for (i = 0; i < I40E_MAX_VEB; i++) {
8487 kfree(pf->irq_pile);
8488 kfree(pf->sw_config);
8491 /* force a PF reset to clean anything leftover */
8492 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
8493 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
8494 i40e_flush(&pf->hw);
8496 iounmap(pf->hw.hw_addr);
8498 pci_release_selected_regions(pdev,
8499 pci_select_bars(pdev, IORESOURCE_MEM));
8501 pci_disable_pcie_error_reporting(pdev);
8502 pci_disable_device(pdev);
8506 * i40e_pci_error_detected - warning that something funky happened in PCI land
8507 * @pdev: PCI device information struct
8509 * Called to warn that something happened and the error handling steps
8510 * are in progress. Allows the driver to quiesce things, be ready for
8513 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
8514 enum pci_channel_state error)
8516 struct i40e_pf *pf = pci_get_drvdata(pdev);
8518 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
8520 /* shutdown all operations */
8521 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
8523 i40e_prep_for_reset(pf);
8527 /* Request a slot reset */
8528 return PCI_ERS_RESULT_NEED_RESET;
8532 * i40e_pci_error_slot_reset - a PCI slot reset just happened
8533 * @pdev: PCI device information struct
8535 * Called to find if the driver can work with the device now that
8536 * the pci slot has been reset. If a basic connection seems good
8537 * (registers are readable and have sane content) then return a
8538 * happy little PCI_ERS_RESULT_xxx.
8540 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
8542 struct i40e_pf *pf = pci_get_drvdata(pdev);
8543 pci_ers_result_t result;
8547 dev_info(&pdev->dev, "%s\n", __func__);
8548 if (pci_enable_device_mem(pdev)) {
8549 dev_info(&pdev->dev,
8550 "Cannot re-enable PCI device after reset.\n");
8551 result = PCI_ERS_RESULT_DISCONNECT;
8553 pci_set_master(pdev);
8554 pci_restore_state(pdev);
8555 pci_save_state(pdev);
8556 pci_wake_from_d3(pdev, false);
8558 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8560 result = PCI_ERS_RESULT_RECOVERED;
8562 result = PCI_ERS_RESULT_DISCONNECT;
8565 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8567 dev_info(&pdev->dev,
8568 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8570 /* non-fatal, continue */
8577 * i40e_pci_error_resume - restart operations after PCI error recovery
8578 * @pdev: PCI device information struct
8580 * Called to allow the driver to bring things back up after PCI error
8581 * and/or reset recovery has finished.
8583 static void i40e_pci_error_resume(struct pci_dev *pdev)
8585 struct i40e_pf *pf = pci_get_drvdata(pdev);
8587 dev_info(&pdev->dev, "%s\n", __func__);
8588 if (test_bit(__I40E_SUSPENDED, &pf->state))
8592 i40e_handle_reset_warning(pf);
8597 * i40e_shutdown - PCI callback for shutting down
8598 * @pdev: PCI device information struct
8600 static void i40e_shutdown(struct pci_dev *pdev)
8602 struct i40e_pf *pf = pci_get_drvdata(pdev);
8603 struct i40e_hw *hw = &pf->hw;
8605 set_bit(__I40E_SUSPENDED, &pf->state);
8606 set_bit(__I40E_DOWN, &pf->state);
8608 i40e_prep_for_reset(pf);
8611 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8612 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8614 if (system_state == SYSTEM_POWER_OFF) {
8615 pci_wake_from_d3(pdev, pf->wol_en);
8616 pci_set_power_state(pdev, PCI_D3hot);
8622 * i40e_suspend - PCI callback for moving to D3
8623 * @pdev: PCI device information struct
8625 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
8627 struct i40e_pf *pf = pci_get_drvdata(pdev);
8628 struct i40e_hw *hw = &pf->hw;
8630 set_bit(__I40E_SUSPENDED, &pf->state);
8631 set_bit(__I40E_DOWN, &pf->state);
8633 i40e_prep_for_reset(pf);
8636 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8637 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8639 pci_wake_from_d3(pdev, pf->wol_en);
8640 pci_set_power_state(pdev, PCI_D3hot);
8646 * i40e_resume - PCI callback for waking up from D3
8647 * @pdev: PCI device information struct
8649 static int i40e_resume(struct pci_dev *pdev)
8651 struct i40e_pf *pf = pci_get_drvdata(pdev);
8654 pci_set_power_state(pdev, PCI_D0);
8655 pci_restore_state(pdev);
8656 /* pci_restore_state() clears dev->state_saves, so
8657 * call pci_save_state() again to restore it.
8659 pci_save_state(pdev);
8661 err = pci_enable_device_mem(pdev);
8664 "%s: Cannot enable PCI device from suspend\n",
8668 pci_set_master(pdev);
8670 /* no wakeup events while running */
8671 pci_wake_from_d3(pdev, false);
8673 /* handling the reset will rebuild the device state */
8674 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
8675 clear_bit(__I40E_DOWN, &pf->state);
8677 i40e_reset_and_rebuild(pf, false);
8685 static const struct pci_error_handlers i40e_err_handler = {
8686 .error_detected = i40e_pci_error_detected,
8687 .slot_reset = i40e_pci_error_slot_reset,
8688 .resume = i40e_pci_error_resume,
8691 static struct pci_driver i40e_driver = {
8692 .name = i40e_driver_name,
8693 .id_table = i40e_pci_tbl,
8694 .probe = i40e_probe,
8695 .remove = i40e_remove,
8697 .suspend = i40e_suspend,
8698 .resume = i40e_resume,
8700 .shutdown = i40e_shutdown,
8701 .err_handler = &i40e_err_handler,
8702 .sriov_configure = i40e_pci_sriov_configure,
8706 * i40e_init_module - Driver registration routine
8708 * i40e_init_module is the first routine called when the driver is
8709 * loaded. All it does is register with the PCI subsystem.
8711 static int __init i40e_init_module(void)
8713 pr_info("%s: %s - version %s\n", i40e_driver_name,
8714 i40e_driver_string, i40e_driver_version_str);
8715 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
8717 return pci_register_driver(&i40e_driver);
8719 module_init(i40e_init_module);
8722 * i40e_exit_module - Driver exit cleanup routine
8724 * i40e_exit_module is called just before the driver is removed
8727 static void __exit i40e_exit_module(void)
8729 pci_unregister_driver(&i40e_driver);
8732 module_exit(i40e_exit_module);