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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf
[karo-tx-linux.git] / drivers / net / ethernet / intel / igb / igb_ethtool.c
1 /*******************************************************************************
2
3   Intel(R) Gigabit Ethernet Linux driver
4   Copyright(c) 2007-2013 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 /* ethtool support for igb */
29
30 #include <linux/vmalloc.h>
31 #include <linux/netdevice.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/if_ether.h>
36 #include <linux/ethtool.h>
37 #include <linux/sched.h>
38 #include <linux/slab.h>
39 #include <linux/pm_runtime.h>
40 #include <linux/highmem.h>
41 #include <linux/mdio.h>
42
43 #include "igb.h"
44
45 struct igb_stats {
46         char stat_string[ETH_GSTRING_LEN];
47         int sizeof_stat;
48         int stat_offset;
49 };
50
51 #define IGB_STAT(_name, _stat) { \
52         .stat_string = _name, \
53         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
54         .stat_offset = offsetof(struct igb_adapter, _stat) \
55 }
56 static const struct igb_stats igb_gstrings_stats[] = {
57         IGB_STAT("rx_packets", stats.gprc),
58         IGB_STAT("tx_packets", stats.gptc),
59         IGB_STAT("rx_bytes", stats.gorc),
60         IGB_STAT("tx_bytes", stats.gotc),
61         IGB_STAT("rx_broadcast", stats.bprc),
62         IGB_STAT("tx_broadcast", stats.bptc),
63         IGB_STAT("rx_multicast", stats.mprc),
64         IGB_STAT("tx_multicast", stats.mptc),
65         IGB_STAT("multicast", stats.mprc),
66         IGB_STAT("collisions", stats.colc),
67         IGB_STAT("rx_crc_errors", stats.crcerrs),
68         IGB_STAT("rx_no_buffer_count", stats.rnbc),
69         IGB_STAT("rx_missed_errors", stats.mpc),
70         IGB_STAT("tx_aborted_errors", stats.ecol),
71         IGB_STAT("tx_carrier_errors", stats.tncrs),
72         IGB_STAT("tx_window_errors", stats.latecol),
73         IGB_STAT("tx_abort_late_coll", stats.latecol),
74         IGB_STAT("tx_deferred_ok", stats.dc),
75         IGB_STAT("tx_single_coll_ok", stats.scc),
76         IGB_STAT("tx_multi_coll_ok", stats.mcc),
77         IGB_STAT("tx_timeout_count", tx_timeout_count),
78         IGB_STAT("rx_long_length_errors", stats.roc),
79         IGB_STAT("rx_short_length_errors", stats.ruc),
80         IGB_STAT("rx_align_errors", stats.algnerrc),
81         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
82         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
83         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
84         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
85         IGB_STAT("tx_flow_control_xon", stats.xontxc),
86         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
87         IGB_STAT("rx_long_byte_count", stats.gorc),
88         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
89         IGB_STAT("tx_smbus", stats.mgptc),
90         IGB_STAT("rx_smbus", stats.mgprc),
91         IGB_STAT("dropped_smbus", stats.mgpdc),
92         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
93         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
94         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
95         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
96         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
97         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
98 };
99
100 #define IGB_NETDEV_STAT(_net_stat) { \
101         .stat_string = __stringify(_net_stat), \
102         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
103         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
104 }
105 static const struct igb_stats igb_gstrings_net_stats[] = {
106         IGB_NETDEV_STAT(rx_errors),
107         IGB_NETDEV_STAT(tx_errors),
108         IGB_NETDEV_STAT(tx_dropped),
109         IGB_NETDEV_STAT(rx_length_errors),
110         IGB_NETDEV_STAT(rx_over_errors),
111         IGB_NETDEV_STAT(rx_frame_errors),
112         IGB_NETDEV_STAT(rx_fifo_errors),
113         IGB_NETDEV_STAT(tx_fifo_errors),
114         IGB_NETDEV_STAT(tx_heartbeat_errors)
115 };
116
117 #define IGB_GLOBAL_STATS_LEN    \
118         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
119 #define IGB_NETDEV_STATS_LEN    \
120         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
121 #define IGB_RX_QUEUE_STATS_LEN \
122         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
123
124 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
125
126 #define IGB_QUEUE_STATS_LEN \
127         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
128           IGB_RX_QUEUE_STATS_LEN) + \
129          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
130           IGB_TX_QUEUE_STATS_LEN))
131 #define IGB_STATS_LEN \
132         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
133
134 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
135         "Register test  (offline)", "Eeprom test    (offline)",
136         "Interrupt test (offline)", "Loopback test  (offline)",
137         "Link test   (on/offline)"
138 };
139 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
140
141 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
142 {
143         struct igb_adapter *adapter = netdev_priv(netdev);
144         struct e1000_hw *hw = &adapter->hw;
145         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
146         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
147         u32 status;
148
149         if (hw->phy.media_type == e1000_media_type_copper) {
150
151                 ecmd->supported = (SUPPORTED_10baseT_Half |
152                                    SUPPORTED_10baseT_Full |
153                                    SUPPORTED_100baseT_Half |
154                                    SUPPORTED_100baseT_Full |
155                                    SUPPORTED_1000baseT_Full|
156                                    SUPPORTED_Autoneg |
157                                    SUPPORTED_TP |
158                                    SUPPORTED_Pause);
159                 ecmd->advertising = ADVERTISED_TP;
160
161                 if (hw->mac.autoneg == 1) {
162                         ecmd->advertising |= ADVERTISED_Autoneg;
163                         /* the e1000 autoneg seems to match ethtool nicely */
164                         ecmd->advertising |= hw->phy.autoneg_advertised;
165                 }
166
167                 ecmd->port = PORT_TP;
168                 ecmd->phy_address = hw->phy.addr;
169                 ecmd->transceiver = XCVR_INTERNAL;
170         } else {
171                 ecmd->supported = (SUPPORTED_FIBRE |
172                                    SUPPORTED_Autoneg |
173                                    SUPPORTED_Pause);
174                 ecmd->advertising = ADVERTISED_FIBRE;
175
176                 if ((eth_flags->e1000_base_lx) || (eth_flags->e1000_base_sx)) {
177                         ecmd->supported |= SUPPORTED_1000baseT_Full;
178                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
179                 }
180                 if (eth_flags->e100_base_fx) {
181                         ecmd->supported |= SUPPORTED_100baseT_Full;
182                         ecmd->advertising |= ADVERTISED_100baseT_Full;
183                 }
184                 if (hw->mac.autoneg == 1)
185                         ecmd->advertising |= ADVERTISED_Autoneg;
186
187                 ecmd->port = PORT_FIBRE;
188                 ecmd->transceiver = XCVR_EXTERNAL;
189         }
190
191         if (hw->mac.autoneg != 1)
192                 ecmd->advertising &= ~(ADVERTISED_Pause |
193                                        ADVERTISED_Asym_Pause);
194
195         if (hw->fc.requested_mode == e1000_fc_full)
196                 ecmd->advertising |= ADVERTISED_Pause;
197         else if (hw->fc.requested_mode == e1000_fc_rx_pause)
198                 ecmd->advertising |= (ADVERTISED_Pause |
199                                       ADVERTISED_Asym_Pause);
200         else if (hw->fc.requested_mode == e1000_fc_tx_pause)
201                 ecmd->advertising |=  ADVERTISED_Asym_Pause;
202         else
203                 ecmd->advertising &= ~(ADVERTISED_Pause |
204                                        ADVERTISED_Asym_Pause);
205
206         status = rd32(E1000_STATUS);
207
208         if (status & E1000_STATUS_LU) {
209                 if (hw->mac.type == e1000_i354) {
210                         if ((status & E1000_STATUS_2P5_SKU) &&
211                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
212                                 ecmd->supported = SUPPORTED_2500baseX_Full;
213                                 ecmd->advertising = ADVERTISED_2500baseX_Full;
214                                 ecmd->speed = SPEED_2500;
215                         } else {
216                                 ecmd->supported = SUPPORTED_1000baseT_Full;
217                                 ecmd->advertising = ADVERTISED_1000baseT_Full;
218                         }
219                 } else if (status & E1000_STATUS_SPEED_1000) {
220                         ecmd->speed = SPEED_1000;
221                 } else if (status & E1000_STATUS_SPEED_100) {
222                         ecmd->speed = SPEED_100;
223                 } else {
224                         ecmd->speed = SPEED_10;
225                 }
226                 if ((status & E1000_STATUS_FD) ||
227                     hw->phy.media_type != e1000_media_type_copper)
228                         ecmd->duplex = DUPLEX_FULL;
229                 else
230                         ecmd->duplex = DUPLEX_HALF;
231         } else {
232                 ecmd->speed = -1;
233                 ecmd->duplex = -1;
234         }
235
236         if ((hw->phy.media_type == e1000_media_type_fiber) ||
237             hw->mac.autoneg)
238                 ecmd->autoneg = AUTONEG_ENABLE;
239         else
240                 ecmd->autoneg = AUTONEG_DISABLE;
241
242         /* MDI-X => 2; MDI =>1; Invalid =>0 */
243         if (hw->phy.media_type == e1000_media_type_copper)
244                 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
245                                                       ETH_TP_MDI;
246         else
247                 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
248
249         if (hw->phy.mdix == AUTO_ALL_MODES)
250                 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
251         else
252                 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
253
254         return 0;
255 }
256
257 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
258 {
259         struct igb_adapter *adapter = netdev_priv(netdev);
260         struct e1000_hw *hw = &adapter->hw;
261
262         /* When SoL/IDER sessions are active, autoneg/speed/duplex
263          * cannot be changed
264          */
265         if (igb_check_reset_block(hw)) {
266                 dev_err(&adapter->pdev->dev,
267                         "Cannot change link characteristics when SoL/IDER is active.\n");
268                 return -EINVAL;
269         }
270
271         /* MDI setting is only allowed when autoneg enabled because
272          * some hardware doesn't allow MDI setting when speed or
273          * duplex is forced.
274          */
275         if (ecmd->eth_tp_mdix_ctrl) {
276                 if (hw->phy.media_type != e1000_media_type_copper)
277                         return -EOPNOTSUPP;
278
279                 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
280                     (ecmd->autoneg != AUTONEG_ENABLE)) {
281                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
282                         return -EINVAL;
283                 }
284         }
285
286         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
287                 msleep(1);
288
289         if (ecmd->autoneg == AUTONEG_ENABLE) {
290                 hw->mac.autoneg = 1;
291                 if (hw->phy.media_type == e1000_media_type_fiber) {
292                         hw->phy.autoneg_advertised = ecmd->advertising |
293                                                      ADVERTISED_FIBRE |
294                                                      ADVERTISED_Autoneg;
295                         switch (adapter->link_speed) {
296                         case SPEED_2500:
297                                 hw->phy.autoneg_advertised =
298                                         ADVERTISED_2500baseX_Full;
299                                 break;
300                         case SPEED_1000:
301                                 hw->phy.autoneg_advertised =
302                                         ADVERTISED_1000baseT_Full;
303                                 break;
304                         case SPEED_100:
305                                 hw->phy.autoneg_advertised =
306                                         ADVERTISED_100baseT_Full;
307                                 break;
308                         default:
309                                 break;
310                         }
311                 } else {
312                         hw->phy.autoneg_advertised = ecmd->advertising |
313                                                      ADVERTISED_TP |
314                                                      ADVERTISED_Autoneg;
315                 }
316                 ecmd->advertising = hw->phy.autoneg_advertised;
317                 if (adapter->fc_autoneg)
318                         hw->fc.requested_mode = e1000_fc_default;
319         } else {
320                 u32 speed = ethtool_cmd_speed(ecmd);
321                 /* calling this overrides forced MDI setting */
322                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
323                         clear_bit(__IGB_RESETTING, &adapter->state);
324                         return -EINVAL;
325                 }
326         }
327
328         /* MDI-X => 2; MDI => 1; Auto => 3 */
329         if (ecmd->eth_tp_mdix_ctrl) {
330                 /* fix up the value for auto (3 => 0) as zero is mapped
331                  * internally to auto
332                  */
333                 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
334                         hw->phy.mdix = AUTO_ALL_MODES;
335                 else
336                         hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
337         }
338
339         /* reset the link */
340         if (netif_running(adapter->netdev)) {
341                 igb_down(adapter);
342                 igb_up(adapter);
343         } else
344                 igb_reset(adapter);
345
346         clear_bit(__IGB_RESETTING, &adapter->state);
347         return 0;
348 }
349
350 static u32 igb_get_link(struct net_device *netdev)
351 {
352         struct igb_adapter *adapter = netdev_priv(netdev);
353         struct e1000_mac_info *mac = &adapter->hw.mac;
354
355         /* If the link is not reported up to netdev, interrupts are disabled,
356          * and so the physical link state may have changed since we last
357          * looked. Set get_link_status to make sure that the true link
358          * state is interrogated, rather than pulling a cached and possibly
359          * stale link state from the driver.
360          */
361         if (!netif_carrier_ok(netdev))
362                 mac->get_link_status = 1;
363
364         return igb_has_link(adapter);
365 }
366
367 static void igb_get_pauseparam(struct net_device *netdev,
368                                struct ethtool_pauseparam *pause)
369 {
370         struct igb_adapter *adapter = netdev_priv(netdev);
371         struct e1000_hw *hw = &adapter->hw;
372
373         pause->autoneg =
374                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
375
376         if (hw->fc.current_mode == e1000_fc_rx_pause)
377                 pause->rx_pause = 1;
378         else if (hw->fc.current_mode == e1000_fc_tx_pause)
379                 pause->tx_pause = 1;
380         else if (hw->fc.current_mode == e1000_fc_full) {
381                 pause->rx_pause = 1;
382                 pause->tx_pause = 1;
383         }
384 }
385
386 static int igb_set_pauseparam(struct net_device *netdev,
387                               struct ethtool_pauseparam *pause)
388 {
389         struct igb_adapter *adapter = netdev_priv(netdev);
390         struct e1000_hw *hw = &adapter->hw;
391         int retval = 0;
392
393         /* 100basefx does not support setting link flow control */
394         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
395                 return -EINVAL;
396
397         adapter->fc_autoneg = pause->autoneg;
398
399         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
400                 msleep(1);
401
402         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
403                 hw->fc.requested_mode = e1000_fc_default;
404                 if (netif_running(adapter->netdev)) {
405                         igb_down(adapter);
406                         igb_up(adapter);
407                 } else {
408                         igb_reset(adapter);
409                 }
410         } else {
411                 if (pause->rx_pause && pause->tx_pause)
412                         hw->fc.requested_mode = e1000_fc_full;
413                 else if (pause->rx_pause && !pause->tx_pause)
414                         hw->fc.requested_mode = e1000_fc_rx_pause;
415                 else if (!pause->rx_pause && pause->tx_pause)
416                         hw->fc.requested_mode = e1000_fc_tx_pause;
417                 else if (!pause->rx_pause && !pause->tx_pause)
418                         hw->fc.requested_mode = e1000_fc_none;
419
420                 hw->fc.current_mode = hw->fc.requested_mode;
421
422                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
423                           igb_force_mac_fc(hw) : igb_setup_link(hw));
424         }
425
426         clear_bit(__IGB_RESETTING, &adapter->state);
427         return retval;
428 }
429
430 static u32 igb_get_msglevel(struct net_device *netdev)
431 {
432         struct igb_adapter *adapter = netdev_priv(netdev);
433         return adapter->msg_enable;
434 }
435
436 static void igb_set_msglevel(struct net_device *netdev, u32 data)
437 {
438         struct igb_adapter *adapter = netdev_priv(netdev);
439         adapter->msg_enable = data;
440 }
441
442 static int igb_get_regs_len(struct net_device *netdev)
443 {
444 #define IGB_REGS_LEN 739
445         return IGB_REGS_LEN * sizeof(u32);
446 }
447
448 static void igb_get_regs(struct net_device *netdev,
449                          struct ethtool_regs *regs, void *p)
450 {
451         struct igb_adapter *adapter = netdev_priv(netdev);
452         struct e1000_hw *hw = &adapter->hw;
453         u32 *regs_buff = p;
454         u8 i;
455
456         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
457
458         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
459
460         /* General Registers */
461         regs_buff[0] = rd32(E1000_CTRL);
462         regs_buff[1] = rd32(E1000_STATUS);
463         regs_buff[2] = rd32(E1000_CTRL_EXT);
464         regs_buff[3] = rd32(E1000_MDIC);
465         regs_buff[4] = rd32(E1000_SCTL);
466         regs_buff[5] = rd32(E1000_CONNSW);
467         regs_buff[6] = rd32(E1000_VET);
468         regs_buff[7] = rd32(E1000_LEDCTL);
469         regs_buff[8] = rd32(E1000_PBA);
470         regs_buff[9] = rd32(E1000_PBS);
471         regs_buff[10] = rd32(E1000_FRTIMER);
472         regs_buff[11] = rd32(E1000_TCPTIMER);
473
474         /* NVM Register */
475         regs_buff[12] = rd32(E1000_EECD);
476
477         /* Interrupt */
478         /* Reading EICS for EICR because they read the
479          * same but EICS does not clear on read
480          */
481         regs_buff[13] = rd32(E1000_EICS);
482         regs_buff[14] = rd32(E1000_EICS);
483         regs_buff[15] = rd32(E1000_EIMS);
484         regs_buff[16] = rd32(E1000_EIMC);
485         regs_buff[17] = rd32(E1000_EIAC);
486         regs_buff[18] = rd32(E1000_EIAM);
487         /* Reading ICS for ICR because they read the
488          * same but ICS does not clear on read
489          */
490         regs_buff[19] = rd32(E1000_ICS);
491         regs_buff[20] = rd32(E1000_ICS);
492         regs_buff[21] = rd32(E1000_IMS);
493         regs_buff[22] = rd32(E1000_IMC);
494         regs_buff[23] = rd32(E1000_IAC);
495         regs_buff[24] = rd32(E1000_IAM);
496         regs_buff[25] = rd32(E1000_IMIRVP);
497
498         /* Flow Control */
499         regs_buff[26] = rd32(E1000_FCAL);
500         regs_buff[27] = rd32(E1000_FCAH);
501         regs_buff[28] = rd32(E1000_FCTTV);
502         regs_buff[29] = rd32(E1000_FCRTL);
503         regs_buff[30] = rd32(E1000_FCRTH);
504         regs_buff[31] = rd32(E1000_FCRTV);
505
506         /* Receive */
507         regs_buff[32] = rd32(E1000_RCTL);
508         regs_buff[33] = rd32(E1000_RXCSUM);
509         regs_buff[34] = rd32(E1000_RLPML);
510         regs_buff[35] = rd32(E1000_RFCTL);
511         regs_buff[36] = rd32(E1000_MRQC);
512         regs_buff[37] = rd32(E1000_VT_CTL);
513
514         /* Transmit */
515         regs_buff[38] = rd32(E1000_TCTL);
516         regs_buff[39] = rd32(E1000_TCTL_EXT);
517         regs_buff[40] = rd32(E1000_TIPG);
518         regs_buff[41] = rd32(E1000_DTXCTL);
519
520         /* Wake Up */
521         regs_buff[42] = rd32(E1000_WUC);
522         regs_buff[43] = rd32(E1000_WUFC);
523         regs_buff[44] = rd32(E1000_WUS);
524         regs_buff[45] = rd32(E1000_IPAV);
525         regs_buff[46] = rd32(E1000_WUPL);
526
527         /* MAC */
528         regs_buff[47] = rd32(E1000_PCS_CFG0);
529         regs_buff[48] = rd32(E1000_PCS_LCTL);
530         regs_buff[49] = rd32(E1000_PCS_LSTAT);
531         regs_buff[50] = rd32(E1000_PCS_ANADV);
532         regs_buff[51] = rd32(E1000_PCS_LPAB);
533         regs_buff[52] = rd32(E1000_PCS_NPTX);
534         regs_buff[53] = rd32(E1000_PCS_LPABNP);
535
536         /* Statistics */
537         regs_buff[54] = adapter->stats.crcerrs;
538         regs_buff[55] = adapter->stats.algnerrc;
539         regs_buff[56] = adapter->stats.symerrs;
540         regs_buff[57] = adapter->stats.rxerrc;
541         regs_buff[58] = adapter->stats.mpc;
542         regs_buff[59] = adapter->stats.scc;
543         regs_buff[60] = adapter->stats.ecol;
544         regs_buff[61] = adapter->stats.mcc;
545         regs_buff[62] = adapter->stats.latecol;
546         regs_buff[63] = adapter->stats.colc;
547         regs_buff[64] = adapter->stats.dc;
548         regs_buff[65] = adapter->stats.tncrs;
549         regs_buff[66] = adapter->stats.sec;
550         regs_buff[67] = adapter->stats.htdpmc;
551         regs_buff[68] = adapter->stats.rlec;
552         regs_buff[69] = adapter->stats.xonrxc;
553         regs_buff[70] = adapter->stats.xontxc;
554         regs_buff[71] = adapter->stats.xoffrxc;
555         regs_buff[72] = adapter->stats.xofftxc;
556         regs_buff[73] = adapter->stats.fcruc;
557         regs_buff[74] = adapter->stats.prc64;
558         regs_buff[75] = adapter->stats.prc127;
559         regs_buff[76] = adapter->stats.prc255;
560         regs_buff[77] = adapter->stats.prc511;
561         regs_buff[78] = adapter->stats.prc1023;
562         regs_buff[79] = adapter->stats.prc1522;
563         regs_buff[80] = adapter->stats.gprc;
564         regs_buff[81] = adapter->stats.bprc;
565         regs_buff[82] = adapter->stats.mprc;
566         regs_buff[83] = adapter->stats.gptc;
567         regs_buff[84] = adapter->stats.gorc;
568         regs_buff[86] = adapter->stats.gotc;
569         regs_buff[88] = adapter->stats.rnbc;
570         regs_buff[89] = adapter->stats.ruc;
571         regs_buff[90] = adapter->stats.rfc;
572         regs_buff[91] = adapter->stats.roc;
573         regs_buff[92] = adapter->stats.rjc;
574         regs_buff[93] = adapter->stats.mgprc;
575         regs_buff[94] = adapter->stats.mgpdc;
576         regs_buff[95] = adapter->stats.mgptc;
577         regs_buff[96] = adapter->stats.tor;
578         regs_buff[98] = adapter->stats.tot;
579         regs_buff[100] = adapter->stats.tpr;
580         regs_buff[101] = adapter->stats.tpt;
581         regs_buff[102] = adapter->stats.ptc64;
582         regs_buff[103] = adapter->stats.ptc127;
583         regs_buff[104] = adapter->stats.ptc255;
584         regs_buff[105] = adapter->stats.ptc511;
585         regs_buff[106] = adapter->stats.ptc1023;
586         regs_buff[107] = adapter->stats.ptc1522;
587         regs_buff[108] = adapter->stats.mptc;
588         regs_buff[109] = adapter->stats.bptc;
589         regs_buff[110] = adapter->stats.tsctc;
590         regs_buff[111] = adapter->stats.iac;
591         regs_buff[112] = adapter->stats.rpthc;
592         regs_buff[113] = adapter->stats.hgptc;
593         regs_buff[114] = adapter->stats.hgorc;
594         regs_buff[116] = adapter->stats.hgotc;
595         regs_buff[118] = adapter->stats.lenerrs;
596         regs_buff[119] = adapter->stats.scvpc;
597         regs_buff[120] = adapter->stats.hrmpc;
598
599         for (i = 0; i < 4; i++)
600                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
601         for (i = 0; i < 4; i++)
602                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
603         for (i = 0; i < 4; i++)
604                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
605         for (i = 0; i < 4; i++)
606                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
607         for (i = 0; i < 4; i++)
608                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
609         for (i = 0; i < 4; i++)
610                 regs_buff[141 + i] = rd32(E1000_RDH(i));
611         for (i = 0; i < 4; i++)
612                 regs_buff[145 + i] = rd32(E1000_RDT(i));
613         for (i = 0; i < 4; i++)
614                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
615
616         for (i = 0; i < 10; i++)
617                 regs_buff[153 + i] = rd32(E1000_EITR(i));
618         for (i = 0; i < 8; i++)
619                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
620         for (i = 0; i < 8; i++)
621                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
622         for (i = 0; i < 16; i++)
623                 regs_buff[179 + i] = rd32(E1000_RAL(i));
624         for (i = 0; i < 16; i++)
625                 regs_buff[195 + i] = rd32(E1000_RAH(i));
626
627         for (i = 0; i < 4; i++)
628                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
629         for (i = 0; i < 4; i++)
630                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
631         for (i = 0; i < 4; i++)
632                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
633         for (i = 0; i < 4; i++)
634                 regs_buff[223 + i] = rd32(E1000_TDH(i));
635         for (i = 0; i < 4; i++)
636                 regs_buff[227 + i] = rd32(E1000_TDT(i));
637         for (i = 0; i < 4; i++)
638                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
639         for (i = 0; i < 4; i++)
640                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
641         for (i = 0; i < 4; i++)
642                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
643         for (i = 0; i < 4; i++)
644                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
645
646         for (i = 0; i < 4; i++)
647                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
648         for (i = 0; i < 4; i++)
649                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
650         for (i = 0; i < 32; i++)
651                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
652         for (i = 0; i < 128; i++)
653                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
654         for (i = 0; i < 128; i++)
655                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
656         for (i = 0; i < 4; i++)
657                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
658
659         regs_buff[547] = rd32(E1000_TDFH);
660         regs_buff[548] = rd32(E1000_TDFT);
661         regs_buff[549] = rd32(E1000_TDFHS);
662         regs_buff[550] = rd32(E1000_TDFPC);
663
664         if (hw->mac.type > e1000_82580) {
665                 regs_buff[551] = adapter->stats.o2bgptc;
666                 regs_buff[552] = adapter->stats.b2ospc;
667                 regs_buff[553] = adapter->stats.o2bspc;
668                 regs_buff[554] = adapter->stats.b2ogprc;
669         }
670
671         if (hw->mac.type != e1000_82576)
672                 return;
673         for (i = 0; i < 12; i++)
674                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
675         for (i = 0; i < 4; i++)
676                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
677         for (i = 0; i < 12; i++)
678                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
679         for (i = 0; i < 12; i++)
680                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
681         for (i = 0; i < 12; i++)
682                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
683         for (i = 0; i < 12; i++)
684                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
685         for (i = 0; i < 12; i++)
686                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
687         for (i = 0; i < 12; i++)
688                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
689
690         for (i = 0; i < 12; i++)
691                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
692         for (i = 0; i < 12; i++)
693                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
694         for (i = 0; i < 12; i++)
695                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
696         for (i = 0; i < 12; i++)
697                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
698         for (i = 0; i < 12; i++)
699                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
700         for (i = 0; i < 12; i++)
701                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
702         for (i = 0; i < 12; i++)
703                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
704         for (i = 0; i < 12; i++)
705                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
706 }
707
708 static int igb_get_eeprom_len(struct net_device *netdev)
709 {
710         struct igb_adapter *adapter = netdev_priv(netdev);
711         return adapter->hw.nvm.word_size * 2;
712 }
713
714 static int igb_get_eeprom(struct net_device *netdev,
715                           struct ethtool_eeprom *eeprom, u8 *bytes)
716 {
717         struct igb_adapter *adapter = netdev_priv(netdev);
718         struct e1000_hw *hw = &adapter->hw;
719         u16 *eeprom_buff;
720         int first_word, last_word;
721         int ret_val = 0;
722         u16 i;
723
724         if (eeprom->len == 0)
725                 return -EINVAL;
726
727         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
728
729         first_word = eeprom->offset >> 1;
730         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
731
732         eeprom_buff = kmalloc(sizeof(u16) *
733                         (last_word - first_word + 1), GFP_KERNEL);
734         if (!eeprom_buff)
735                 return -ENOMEM;
736
737         if (hw->nvm.type == e1000_nvm_eeprom_spi)
738                 ret_val = hw->nvm.ops.read(hw, first_word,
739                                            last_word - first_word + 1,
740                                            eeprom_buff);
741         else {
742                 for (i = 0; i < last_word - first_word + 1; i++) {
743                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
744                                                    &eeprom_buff[i]);
745                         if (ret_val)
746                                 break;
747                 }
748         }
749
750         /* Device's eeprom is always little-endian, word addressable */
751         for (i = 0; i < last_word - first_word + 1; i++)
752                 le16_to_cpus(&eeprom_buff[i]);
753
754         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
755                         eeprom->len);
756         kfree(eeprom_buff);
757
758         return ret_val;
759 }
760
761 static int igb_set_eeprom(struct net_device *netdev,
762                           struct ethtool_eeprom *eeprom, u8 *bytes)
763 {
764         struct igb_adapter *adapter = netdev_priv(netdev);
765         struct e1000_hw *hw = &adapter->hw;
766         u16 *eeprom_buff;
767         void *ptr;
768         int max_len, first_word, last_word, ret_val = 0;
769         u16 i;
770
771         if (eeprom->len == 0)
772                 return -EOPNOTSUPP;
773
774         if (hw->mac.type == e1000_i211)
775                 return -EOPNOTSUPP;
776
777         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
778                 return -EFAULT;
779
780         max_len = hw->nvm.word_size * 2;
781
782         first_word = eeprom->offset >> 1;
783         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
784         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
785         if (!eeprom_buff)
786                 return -ENOMEM;
787
788         ptr = (void *)eeprom_buff;
789
790         if (eeprom->offset & 1) {
791                 /* need read/modify/write of first changed EEPROM word
792                  * only the second byte of the word is being modified
793                  */
794                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
795                                             &eeprom_buff[0]);
796                 ptr++;
797         }
798         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
799                 /* need read/modify/write of last changed EEPROM word
800                  * only the first byte of the word is being modified
801                  */
802                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
803                                    &eeprom_buff[last_word - first_word]);
804         }
805
806         /* Device's eeprom is always little-endian, word addressable */
807         for (i = 0; i < last_word - first_word + 1; i++)
808                 le16_to_cpus(&eeprom_buff[i]);
809
810         memcpy(ptr, bytes, eeprom->len);
811
812         for (i = 0; i < last_word - first_word + 1; i++)
813                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
814
815         ret_val = hw->nvm.ops.write(hw, first_word,
816                                     last_word - first_word + 1, eeprom_buff);
817
818         /* Update the checksum if nvm write succeeded */
819         if (ret_val == 0)
820                 hw->nvm.ops.update(hw);
821
822         igb_set_fw_version(adapter);
823         kfree(eeprom_buff);
824         return ret_val;
825 }
826
827 static void igb_get_drvinfo(struct net_device *netdev,
828                             struct ethtool_drvinfo *drvinfo)
829 {
830         struct igb_adapter *adapter = netdev_priv(netdev);
831
832         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
833         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
834
835         /* EEPROM image version # is reported as firmware version # for
836          * 82575 controllers
837          */
838         strlcpy(drvinfo->fw_version, adapter->fw_version,
839                 sizeof(drvinfo->fw_version));
840         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
841                 sizeof(drvinfo->bus_info));
842         drvinfo->n_stats = IGB_STATS_LEN;
843         drvinfo->testinfo_len = IGB_TEST_LEN;
844         drvinfo->regdump_len = igb_get_regs_len(netdev);
845         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
846 }
847
848 static void igb_get_ringparam(struct net_device *netdev,
849                               struct ethtool_ringparam *ring)
850 {
851         struct igb_adapter *adapter = netdev_priv(netdev);
852
853         ring->rx_max_pending = IGB_MAX_RXD;
854         ring->tx_max_pending = IGB_MAX_TXD;
855         ring->rx_pending = adapter->rx_ring_count;
856         ring->tx_pending = adapter->tx_ring_count;
857 }
858
859 static int igb_set_ringparam(struct net_device *netdev,
860                              struct ethtool_ringparam *ring)
861 {
862         struct igb_adapter *adapter = netdev_priv(netdev);
863         struct igb_ring *temp_ring;
864         int i, err = 0;
865         u16 new_rx_count, new_tx_count;
866
867         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
868                 return -EINVAL;
869
870         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
871         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
872         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
873
874         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
875         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
876         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
877
878         if ((new_tx_count == adapter->tx_ring_count) &&
879             (new_rx_count == adapter->rx_ring_count)) {
880                 /* nothing to do */
881                 return 0;
882         }
883
884         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
885                 msleep(1);
886
887         if (!netif_running(adapter->netdev)) {
888                 for (i = 0; i < adapter->num_tx_queues; i++)
889                         adapter->tx_ring[i]->count = new_tx_count;
890                 for (i = 0; i < adapter->num_rx_queues; i++)
891                         adapter->rx_ring[i]->count = new_rx_count;
892                 adapter->tx_ring_count = new_tx_count;
893                 adapter->rx_ring_count = new_rx_count;
894                 goto clear_reset;
895         }
896
897         if (adapter->num_tx_queues > adapter->num_rx_queues)
898                 temp_ring = vmalloc(adapter->num_tx_queues *
899                                     sizeof(struct igb_ring));
900         else
901                 temp_ring = vmalloc(adapter->num_rx_queues *
902                                     sizeof(struct igb_ring));
903
904         if (!temp_ring) {
905                 err = -ENOMEM;
906                 goto clear_reset;
907         }
908
909         igb_down(adapter);
910
911         /* We can't just free everything and then setup again,
912          * because the ISRs in MSI-X mode get passed pointers
913          * to the Tx and Rx ring structs.
914          */
915         if (new_tx_count != adapter->tx_ring_count) {
916                 for (i = 0; i < adapter->num_tx_queues; i++) {
917                         memcpy(&temp_ring[i], adapter->tx_ring[i],
918                                sizeof(struct igb_ring));
919
920                         temp_ring[i].count = new_tx_count;
921                         err = igb_setup_tx_resources(&temp_ring[i]);
922                         if (err) {
923                                 while (i) {
924                                         i--;
925                                         igb_free_tx_resources(&temp_ring[i]);
926                                 }
927                                 goto err_setup;
928                         }
929                 }
930
931                 for (i = 0; i < adapter->num_tx_queues; i++) {
932                         igb_free_tx_resources(adapter->tx_ring[i]);
933
934                         memcpy(adapter->tx_ring[i], &temp_ring[i],
935                                sizeof(struct igb_ring));
936                 }
937
938                 adapter->tx_ring_count = new_tx_count;
939         }
940
941         if (new_rx_count != adapter->rx_ring_count) {
942                 for (i = 0; i < adapter->num_rx_queues; i++) {
943                         memcpy(&temp_ring[i], adapter->rx_ring[i],
944                                sizeof(struct igb_ring));
945
946                         temp_ring[i].count = new_rx_count;
947                         err = igb_setup_rx_resources(&temp_ring[i]);
948                         if (err) {
949                                 while (i) {
950                                         i--;
951                                         igb_free_rx_resources(&temp_ring[i]);
952                                 }
953                                 goto err_setup;
954                         }
955
956                 }
957
958                 for (i = 0; i < adapter->num_rx_queues; i++) {
959                         igb_free_rx_resources(adapter->rx_ring[i]);
960
961                         memcpy(adapter->rx_ring[i], &temp_ring[i],
962                                sizeof(struct igb_ring));
963                 }
964
965                 adapter->rx_ring_count = new_rx_count;
966         }
967 err_setup:
968         igb_up(adapter);
969         vfree(temp_ring);
970 clear_reset:
971         clear_bit(__IGB_RESETTING, &adapter->state);
972         return err;
973 }
974
975 /* ethtool register test data */
976 struct igb_reg_test {
977         u16 reg;
978         u16 reg_offset;
979         u16 array_len;
980         u16 test_type;
981         u32 mask;
982         u32 write;
983 };
984
985 /* In the hardware, registers are laid out either singly, in arrays
986  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
987  * most tests take place on arrays or single registers (handled
988  * as a single-element array) and special-case the tables.
989  * Table tests are always pattern tests.
990  *
991  * We also make provision for some required setup steps by specifying
992  * registers to be written without any read-back testing.
993  */
994
995 #define PATTERN_TEST    1
996 #define SET_READ_TEST   2
997 #define WRITE_NO_TEST   3
998 #define TABLE32_TEST    4
999 #define TABLE64_TEST_LO 5
1000 #define TABLE64_TEST_HI 6
1001
1002 /* i210 reg test */
1003 static struct igb_reg_test reg_test_i210[] = {
1004         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1005         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1006         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1007         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1008         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1009         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1010         /* RDH is read-only for i210, only test RDT. */
1011         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1012         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1013         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1014         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1015         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1016         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1017         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1018         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1019         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1020         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1021         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1022         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1023         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1024                                                 0xFFFFFFFF, 0xFFFFFFFF },
1025         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1026                                                 0x900FFFFF, 0xFFFFFFFF },
1027         { E1000_MTA,       0, 128, TABLE32_TEST,
1028                                                 0xFFFFFFFF, 0xFFFFFFFF },
1029         { 0, 0, 0, 0, 0 }
1030 };
1031
1032 /* i350 reg test */
1033 static struct igb_reg_test reg_test_i350[] = {
1034         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1035         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1036         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1037         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1038         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1039         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1040         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1041         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1042         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1043         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1044         /* RDH is read-only for i350, only test RDT. */
1045         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1046         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1047         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1048         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1049         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1050         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1051         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1052         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1053         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1054         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1055         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1056         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1057         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1058         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1059         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1060         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1061         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1062         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1063                                                 0xFFFFFFFF, 0xFFFFFFFF },
1064         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1065                                                 0xC3FFFFFF, 0xFFFFFFFF },
1066         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1067                                                 0xFFFFFFFF, 0xFFFFFFFF },
1068         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1069                                                 0xC3FFFFFF, 0xFFFFFFFF },
1070         { E1000_MTA,       0, 128, TABLE32_TEST,
1071                                                 0xFFFFFFFF, 0xFFFFFFFF },
1072         { 0, 0, 0, 0 }
1073 };
1074
1075 /* 82580 reg test */
1076 static struct igb_reg_test reg_test_82580[] = {
1077         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1078         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1079         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1080         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1081         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1082         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1083         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1084         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1085         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1086         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1087         /* RDH is read-only for 82580, only test RDT. */
1088         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1089         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1090         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1091         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1092         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1093         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1094         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1095         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1096         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1097         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1098         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1099         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1100         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1101         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1102         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1103         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1104         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1105         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1106                                                 0xFFFFFFFF, 0xFFFFFFFF },
1107         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1108                                                 0x83FFFFFF, 0xFFFFFFFF },
1109         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1110                                                 0xFFFFFFFF, 0xFFFFFFFF },
1111         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1112                                                 0x83FFFFFF, 0xFFFFFFFF },
1113         { E1000_MTA,       0, 128, TABLE32_TEST,
1114                                                 0xFFFFFFFF, 0xFFFFFFFF },
1115         { 0, 0, 0, 0 }
1116 };
1117
1118 /* 82576 reg test */
1119 static struct igb_reg_test reg_test_82576[] = {
1120         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1121         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1122         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1123         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1124         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1125         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1126         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1127         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1128         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1129         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1130         /* Enable all RX queues before testing. */
1131         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1132         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1133         /* RDH is read-only for 82576, only test RDT. */
1134         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1135         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1136         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1137         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1138         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1139         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1140         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1141         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1142         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1143         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1144         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1145         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1146         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1147         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1148         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1149         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1150         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1151         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1152         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1153         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1154         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1155         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1156         { 0, 0, 0, 0 }
1157 };
1158
1159 /* 82575 register test */
1160 static struct igb_reg_test reg_test_82575[] = {
1161         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1162         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1163         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1164         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1165         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1166         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1168         /* Enable all four RX queues before testing. */
1169         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1170         /* RDH is read-only for 82575, only test RDT. */
1171         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1172         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1173         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1174         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1175         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1176         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1177         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1179         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1180         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1181         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1182         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1183         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1184         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1185         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1186         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1187         { 0, 0, 0, 0 }
1188 };
1189
1190 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1191                              int reg, u32 mask, u32 write)
1192 {
1193         struct e1000_hw *hw = &adapter->hw;
1194         u32 pat, val;
1195         static const u32 _test[] =
1196                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1197         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1198                 wr32(reg, (_test[pat] & write));
1199                 val = rd32(reg) & mask;
1200                 if (val != (_test[pat] & write & mask)) {
1201                         dev_err(&adapter->pdev->dev,
1202                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1203                                 reg, val, (_test[pat] & write & mask));
1204                         *data = reg;
1205                         return 1;
1206                 }
1207         }
1208
1209         return 0;
1210 }
1211
1212 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1213                               int reg, u32 mask, u32 write)
1214 {
1215         struct e1000_hw *hw = &adapter->hw;
1216         u32 val;
1217         wr32(reg, write & mask);
1218         val = rd32(reg);
1219         if ((write & mask) != (val & mask)) {
1220                 dev_err(&adapter->pdev->dev,
1221                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", reg,
1222                         (val & mask), (write & mask));
1223                 *data = reg;
1224                 return 1;
1225         }
1226
1227         return 0;
1228 }
1229
1230 #define REG_PATTERN_TEST(reg, mask, write) \
1231         do { \
1232                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1233                         return 1; \
1234         } while (0)
1235
1236 #define REG_SET_AND_CHECK(reg, mask, write) \
1237         do { \
1238                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1239                         return 1; \
1240         } while (0)
1241
1242 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1243 {
1244         struct e1000_hw *hw = &adapter->hw;
1245         struct igb_reg_test *test;
1246         u32 value, before, after;
1247         u32 i, toggle;
1248
1249         switch (adapter->hw.mac.type) {
1250         case e1000_i350:
1251         case e1000_i354:
1252                 test = reg_test_i350;
1253                 toggle = 0x7FEFF3FF;
1254                 break;
1255         case e1000_i210:
1256         case e1000_i211:
1257                 test = reg_test_i210;
1258                 toggle = 0x7FEFF3FF;
1259                 break;
1260         case e1000_82580:
1261                 test = reg_test_82580;
1262                 toggle = 0x7FEFF3FF;
1263                 break;
1264         case e1000_82576:
1265                 test = reg_test_82576;
1266                 toggle = 0x7FFFF3FF;
1267                 break;
1268         default:
1269                 test = reg_test_82575;
1270                 toggle = 0x7FFFF3FF;
1271                 break;
1272         }
1273
1274         /* Because the status register is such a special case,
1275          * we handle it separately from the rest of the register
1276          * tests.  Some bits are read-only, some toggle, and some
1277          * are writable on newer MACs.
1278          */
1279         before = rd32(E1000_STATUS);
1280         value = (rd32(E1000_STATUS) & toggle);
1281         wr32(E1000_STATUS, toggle);
1282         after = rd32(E1000_STATUS) & toggle;
1283         if (value != after) {
1284                 dev_err(&adapter->pdev->dev,
1285                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1286                         after, value);
1287                 *data = 1;
1288                 return 1;
1289         }
1290         /* restore previous status */
1291         wr32(E1000_STATUS, before);
1292
1293         /* Perform the remainder of the register test, looping through
1294          * the test table until we either fail or reach the null entry.
1295          */
1296         while (test->reg) {
1297                 for (i = 0; i < test->array_len; i++) {
1298                         switch (test->test_type) {
1299                         case PATTERN_TEST:
1300                                 REG_PATTERN_TEST(test->reg +
1301                                                 (i * test->reg_offset),
1302                                                 test->mask,
1303                                                 test->write);
1304                                 break;
1305                         case SET_READ_TEST:
1306                                 REG_SET_AND_CHECK(test->reg +
1307                                                 (i * test->reg_offset),
1308                                                 test->mask,
1309                                                 test->write);
1310                                 break;
1311                         case WRITE_NO_TEST:
1312                                 writel(test->write,
1313                                     (adapter->hw.hw_addr + test->reg)
1314                                         + (i * test->reg_offset));
1315                                 break;
1316                         case TABLE32_TEST:
1317                                 REG_PATTERN_TEST(test->reg + (i * 4),
1318                                                 test->mask,
1319                                                 test->write);
1320                                 break;
1321                         case TABLE64_TEST_LO:
1322                                 REG_PATTERN_TEST(test->reg + (i * 8),
1323                                                 test->mask,
1324                                                 test->write);
1325                                 break;
1326                         case TABLE64_TEST_HI:
1327                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1328                                                 test->mask,
1329                                                 test->write);
1330                                 break;
1331                         }
1332                 }
1333                 test++;
1334         }
1335
1336         *data = 0;
1337         return 0;
1338 }
1339
1340 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1341 {
1342         struct e1000_hw *hw = &adapter->hw;
1343
1344         *data = 0;
1345
1346         /* Validate eeprom on all parts but flashless */
1347         switch (hw->mac.type) {
1348         case e1000_i210:
1349         case e1000_i211:
1350                 if (igb_get_flash_presence_i210(hw)) {
1351                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1352                                 *data = 2;
1353                 }
1354                 break;
1355         default:
1356                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1357                         *data = 2;
1358                 break;
1359         }
1360
1361         return *data;
1362 }
1363
1364 static irqreturn_t igb_test_intr(int irq, void *data)
1365 {
1366         struct igb_adapter *adapter = (struct igb_adapter *) data;
1367         struct e1000_hw *hw = &adapter->hw;
1368
1369         adapter->test_icr |= rd32(E1000_ICR);
1370
1371         return IRQ_HANDLED;
1372 }
1373
1374 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1375 {
1376         struct e1000_hw *hw = &adapter->hw;
1377         struct net_device *netdev = adapter->netdev;
1378         u32 mask, ics_mask, i = 0, shared_int = true;
1379         u32 irq = adapter->pdev->irq;
1380
1381         *data = 0;
1382
1383         /* Hook up test interrupt handler just for this test */
1384         if (adapter->msix_entries) {
1385                 if (request_irq(adapter->msix_entries[0].vector,
1386                                 igb_test_intr, 0, netdev->name, adapter)) {
1387                         *data = 1;
1388                         return -1;
1389                 }
1390         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1391                 shared_int = false;
1392                 if (request_irq(irq,
1393                                 igb_test_intr, 0, netdev->name, adapter)) {
1394                         *data = 1;
1395                         return -1;
1396                 }
1397         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1398                                 netdev->name, adapter)) {
1399                 shared_int = false;
1400         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1401                  netdev->name, adapter)) {
1402                 *data = 1;
1403                 return -1;
1404         }
1405         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1406                 (shared_int ? "shared" : "unshared"));
1407
1408         /* Disable all the interrupts */
1409         wr32(E1000_IMC, ~0);
1410         wrfl();
1411         msleep(10);
1412
1413         /* Define all writable bits for ICS */
1414         switch (hw->mac.type) {
1415         case e1000_82575:
1416                 ics_mask = 0x37F47EDD;
1417                 break;
1418         case e1000_82576:
1419                 ics_mask = 0x77D4FBFD;
1420                 break;
1421         case e1000_82580:
1422                 ics_mask = 0x77DCFED5;
1423                 break;
1424         case e1000_i350:
1425         case e1000_i354:
1426         case e1000_i210:
1427         case e1000_i211:
1428                 ics_mask = 0x77DCFED5;
1429                 break;
1430         default:
1431                 ics_mask = 0x7FFFFFFF;
1432                 break;
1433         }
1434
1435         /* Test each interrupt */
1436         for (; i < 31; i++) {
1437                 /* Interrupt to test */
1438                 mask = 1 << i;
1439
1440                 if (!(mask & ics_mask))
1441                         continue;
1442
1443                 if (!shared_int) {
1444                         /* Disable the interrupt to be reported in
1445                          * the cause register and then force the same
1446                          * interrupt and see if one gets posted.  If
1447                          * an interrupt was posted to the bus, the
1448                          * test failed.
1449                          */
1450                         adapter->test_icr = 0;
1451
1452                         /* Flush any pending interrupts */
1453                         wr32(E1000_ICR, ~0);
1454
1455                         wr32(E1000_IMC, mask);
1456                         wr32(E1000_ICS, mask);
1457                         wrfl();
1458                         msleep(10);
1459
1460                         if (adapter->test_icr & mask) {
1461                                 *data = 3;
1462                                 break;
1463                         }
1464                 }
1465
1466                 /* Enable the interrupt to be reported in
1467                  * the cause register and then force the same
1468                  * interrupt and see if one gets posted.  If
1469                  * an interrupt was not posted to the bus, the
1470                  * test failed.
1471                  */
1472                 adapter->test_icr = 0;
1473
1474                 /* Flush any pending interrupts */
1475                 wr32(E1000_ICR, ~0);
1476
1477                 wr32(E1000_IMS, mask);
1478                 wr32(E1000_ICS, mask);
1479                 wrfl();
1480                 msleep(10);
1481
1482                 if (!(adapter->test_icr & mask)) {
1483                         *data = 4;
1484                         break;
1485                 }
1486
1487                 if (!shared_int) {
1488                         /* Disable the other interrupts to be reported in
1489                          * the cause register and then force the other
1490                          * interrupts and see if any get posted.  If
1491                          * an interrupt was posted to the bus, the
1492                          * test failed.
1493                          */
1494                         adapter->test_icr = 0;
1495
1496                         /* Flush any pending interrupts */
1497                         wr32(E1000_ICR, ~0);
1498
1499                         wr32(E1000_IMC, ~mask);
1500                         wr32(E1000_ICS, ~mask);
1501                         wrfl();
1502                         msleep(10);
1503
1504                         if (adapter->test_icr & mask) {
1505                                 *data = 5;
1506                                 break;
1507                         }
1508                 }
1509         }
1510
1511         /* Disable all the interrupts */
1512         wr32(E1000_IMC, ~0);
1513         wrfl();
1514         msleep(10);
1515
1516         /* Unhook test interrupt handler */
1517         if (adapter->msix_entries)
1518                 free_irq(adapter->msix_entries[0].vector, adapter);
1519         else
1520                 free_irq(irq, adapter);
1521
1522         return *data;
1523 }
1524
1525 static void igb_free_desc_rings(struct igb_adapter *adapter)
1526 {
1527         igb_free_tx_resources(&adapter->test_tx_ring);
1528         igb_free_rx_resources(&adapter->test_rx_ring);
1529 }
1530
1531 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1532 {
1533         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1534         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1535         struct e1000_hw *hw = &adapter->hw;
1536         int ret_val;
1537
1538         /* Setup Tx descriptor ring and Tx buffers */
1539         tx_ring->count = IGB_DEFAULT_TXD;
1540         tx_ring->dev = &adapter->pdev->dev;
1541         tx_ring->netdev = adapter->netdev;
1542         tx_ring->reg_idx = adapter->vfs_allocated_count;
1543
1544         if (igb_setup_tx_resources(tx_ring)) {
1545                 ret_val = 1;
1546                 goto err_nomem;
1547         }
1548
1549         igb_setup_tctl(adapter);
1550         igb_configure_tx_ring(adapter, tx_ring);
1551
1552         /* Setup Rx descriptor ring and Rx buffers */
1553         rx_ring->count = IGB_DEFAULT_RXD;
1554         rx_ring->dev = &adapter->pdev->dev;
1555         rx_ring->netdev = adapter->netdev;
1556         rx_ring->reg_idx = adapter->vfs_allocated_count;
1557
1558         if (igb_setup_rx_resources(rx_ring)) {
1559                 ret_val = 3;
1560                 goto err_nomem;
1561         }
1562
1563         /* set the default queue to queue 0 of PF */
1564         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1565
1566         /* enable receive ring */
1567         igb_setup_rctl(adapter);
1568         igb_configure_rx_ring(adapter, rx_ring);
1569
1570         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1571
1572         return 0;
1573
1574 err_nomem:
1575         igb_free_desc_rings(adapter);
1576         return ret_val;
1577 }
1578
1579 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1580 {
1581         struct e1000_hw *hw = &adapter->hw;
1582
1583         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1584         igb_write_phy_reg(hw, 29, 0x001F);
1585         igb_write_phy_reg(hw, 30, 0x8FFC);
1586         igb_write_phy_reg(hw, 29, 0x001A);
1587         igb_write_phy_reg(hw, 30, 0x8FF0);
1588 }
1589
1590 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1591 {
1592         struct e1000_hw *hw = &adapter->hw;
1593         u32 ctrl_reg = 0;
1594
1595         hw->mac.autoneg = false;
1596
1597         if (hw->phy.type == e1000_phy_m88) {
1598                 if (hw->phy.id != I210_I_PHY_ID) {
1599                         /* Auto-MDI/MDIX Off */
1600                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1601                         /* reset to update Auto-MDI/MDIX */
1602                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1603                         /* autoneg off */
1604                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1605                 } else {
1606                         /* force 1000, set loopback  */
1607                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1608                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1609                 }
1610         } else if (hw->phy.type == e1000_phy_82580) {
1611                 /* enable MII loopback */
1612                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1613         }
1614
1615         /* add small delay to avoid loopback test failure */
1616         msleep(50);
1617
1618         /* force 1000, set loopback */
1619         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1620
1621         /* Now set up the MAC to the same speed/duplex as the PHY. */
1622         ctrl_reg = rd32(E1000_CTRL);
1623         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1624         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1625                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1626                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1627                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1628                      E1000_CTRL_SLU);    /* Set link up enable bit */
1629
1630         if (hw->phy.type == e1000_phy_m88)
1631                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1632
1633         wr32(E1000_CTRL, ctrl_reg);
1634
1635         /* Disable the receiver on the PHY so when a cable is plugged in, the
1636          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1637          */
1638         if (hw->phy.type == e1000_phy_m88)
1639                 igb_phy_disable_receiver(adapter);
1640
1641         mdelay(500);
1642         return 0;
1643 }
1644
1645 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1646 {
1647         return igb_integrated_phy_loopback(adapter);
1648 }
1649
1650 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1651 {
1652         struct e1000_hw *hw = &adapter->hw;
1653         u32 reg;
1654
1655         reg = rd32(E1000_CTRL_EXT);
1656
1657         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1658         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1659                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1660                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1661                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1662                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1663
1664                         /* Enable DH89xxCC MPHY for near end loopback */
1665                         reg = rd32(E1000_MPHY_ADDR_CTL);
1666                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1667                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1668                         wr32(E1000_MPHY_ADDR_CTL, reg);
1669
1670                         reg = rd32(E1000_MPHY_DATA);
1671                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1672                         wr32(E1000_MPHY_DATA, reg);
1673                 }
1674
1675                 reg = rd32(E1000_RCTL);
1676                 reg |= E1000_RCTL_LBM_TCVR;
1677                 wr32(E1000_RCTL, reg);
1678
1679                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1680
1681                 reg = rd32(E1000_CTRL);
1682                 reg &= ~(E1000_CTRL_RFCE |
1683                          E1000_CTRL_TFCE |
1684                          E1000_CTRL_LRST);
1685                 reg |= E1000_CTRL_SLU |
1686                        E1000_CTRL_FD;
1687                 wr32(E1000_CTRL, reg);
1688
1689                 /* Unset switch control to serdes energy detect */
1690                 reg = rd32(E1000_CONNSW);
1691                 reg &= ~E1000_CONNSW_ENRGSRC;
1692                 wr32(E1000_CONNSW, reg);
1693
1694                 /* Unset sigdetect for SERDES loopback on
1695                  * 82580 and newer devices.
1696                  */
1697                 if (hw->mac.type >= e1000_82580) {
1698                         reg = rd32(E1000_PCS_CFG0);
1699                         reg |= E1000_PCS_CFG_IGN_SD;
1700                         wr32(E1000_PCS_CFG0, reg);
1701                 }
1702
1703                 /* Set PCS register for forced speed */
1704                 reg = rd32(E1000_PCS_LCTL);
1705                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1706                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1707                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1708                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1709                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1710                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1711                 wr32(E1000_PCS_LCTL, reg);
1712
1713                 return 0;
1714         }
1715
1716         return igb_set_phy_loopback(adapter);
1717 }
1718
1719 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1720 {
1721         struct e1000_hw *hw = &adapter->hw;
1722         u32 rctl;
1723         u16 phy_reg;
1724
1725         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1726         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1727         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1728         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1729                 u32 reg;
1730
1731                 /* Disable near end loopback on DH89xxCC */
1732                 reg = rd32(E1000_MPHY_ADDR_CTL);
1733                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1734                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1735                 wr32(E1000_MPHY_ADDR_CTL, reg);
1736
1737                 reg = rd32(E1000_MPHY_DATA);
1738                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1739                 wr32(E1000_MPHY_DATA, reg);
1740         }
1741
1742         rctl = rd32(E1000_RCTL);
1743         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1744         wr32(E1000_RCTL, rctl);
1745
1746         hw->mac.autoneg = true;
1747         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1748         if (phy_reg & MII_CR_LOOPBACK) {
1749                 phy_reg &= ~MII_CR_LOOPBACK;
1750                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1751                 igb_phy_sw_reset(hw);
1752         }
1753 }
1754
1755 static void igb_create_lbtest_frame(struct sk_buff *skb,
1756                                     unsigned int frame_size)
1757 {
1758         memset(skb->data, 0xFF, frame_size);
1759         frame_size /= 2;
1760         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1761         memset(&skb->data[frame_size + 10], 0xBE, 1);
1762         memset(&skb->data[frame_size + 12], 0xAF, 1);
1763 }
1764
1765 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1766                                   unsigned int frame_size)
1767 {
1768         unsigned char *data;
1769         bool match = true;
1770
1771         frame_size >>= 1;
1772
1773         data = kmap(rx_buffer->page);
1774
1775         if (data[3] != 0xFF ||
1776             data[frame_size + 10] != 0xBE ||
1777             data[frame_size + 12] != 0xAF)
1778                 match = false;
1779
1780         kunmap(rx_buffer->page);
1781
1782         return match;
1783 }
1784
1785 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1786                                 struct igb_ring *tx_ring,
1787                                 unsigned int size)
1788 {
1789         union e1000_adv_rx_desc *rx_desc;
1790         struct igb_rx_buffer *rx_buffer_info;
1791         struct igb_tx_buffer *tx_buffer_info;
1792         u16 rx_ntc, tx_ntc, count = 0;
1793
1794         /* initialize next to clean and descriptor values */
1795         rx_ntc = rx_ring->next_to_clean;
1796         tx_ntc = tx_ring->next_to_clean;
1797         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1798
1799         while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1800                 /* check Rx buffer */
1801                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1802
1803                 /* sync Rx buffer for CPU read */
1804                 dma_sync_single_for_cpu(rx_ring->dev,
1805                                         rx_buffer_info->dma,
1806                                         IGB_RX_BUFSZ,
1807                                         DMA_FROM_DEVICE);
1808
1809                 /* verify contents of skb */
1810                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1811                         count++;
1812
1813                 /* sync Rx buffer for device write */
1814                 dma_sync_single_for_device(rx_ring->dev,
1815                                            rx_buffer_info->dma,
1816                                            IGB_RX_BUFSZ,
1817                                            DMA_FROM_DEVICE);
1818
1819                 /* unmap buffer on Tx side */
1820                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1821                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1822
1823                 /* increment Rx/Tx next to clean counters */
1824                 rx_ntc++;
1825                 if (rx_ntc == rx_ring->count)
1826                         rx_ntc = 0;
1827                 tx_ntc++;
1828                 if (tx_ntc == tx_ring->count)
1829                         tx_ntc = 0;
1830
1831                 /* fetch next descriptor */
1832                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1833         }
1834
1835         netdev_tx_reset_queue(txring_txq(tx_ring));
1836
1837         /* re-map buffers to ring, store next to clean values */
1838         igb_alloc_rx_buffers(rx_ring, count);
1839         rx_ring->next_to_clean = rx_ntc;
1840         tx_ring->next_to_clean = tx_ntc;
1841
1842         return count;
1843 }
1844
1845 static int igb_run_loopback_test(struct igb_adapter *adapter)
1846 {
1847         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1848         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1849         u16 i, j, lc, good_cnt;
1850         int ret_val = 0;
1851         unsigned int size = IGB_RX_HDR_LEN;
1852         netdev_tx_t tx_ret_val;
1853         struct sk_buff *skb;
1854
1855         /* allocate test skb */
1856         skb = alloc_skb(size, GFP_KERNEL);
1857         if (!skb)
1858                 return 11;
1859
1860         /* place data into test skb */
1861         igb_create_lbtest_frame(skb, size);
1862         skb_put(skb, size);
1863
1864         /* Calculate the loop count based on the largest descriptor ring
1865          * The idea is to wrap the largest ring a number of times using 64
1866          * send/receive pairs during each loop
1867          */
1868
1869         if (rx_ring->count <= tx_ring->count)
1870                 lc = ((tx_ring->count / 64) * 2) + 1;
1871         else
1872                 lc = ((rx_ring->count / 64) * 2) + 1;
1873
1874         for (j = 0; j <= lc; j++) { /* loop count loop */
1875                 /* reset count of good packets */
1876                 good_cnt = 0;
1877
1878                 /* place 64 packets on the transmit queue*/
1879                 for (i = 0; i < 64; i++) {
1880                         skb_get(skb);
1881                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1882                         if (tx_ret_val == NETDEV_TX_OK)
1883                                 good_cnt++;
1884                 }
1885
1886                 if (good_cnt != 64) {
1887                         ret_val = 12;
1888                         break;
1889                 }
1890
1891                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1892                 msleep(200);
1893
1894                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1895                 if (good_cnt != 64) {
1896                         ret_val = 13;
1897                         break;
1898                 }
1899         } /* end loop count loop */
1900
1901         /* free the original skb */
1902         kfree_skb(skb);
1903
1904         return ret_val;
1905 }
1906
1907 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1908 {
1909         /* PHY loopback cannot be performed if SoL/IDER
1910          * sessions are active
1911          */
1912         if (igb_check_reset_block(&adapter->hw)) {
1913                 dev_err(&adapter->pdev->dev,
1914                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1915                 *data = 0;
1916                 goto out;
1917         }
1918
1919         if (adapter->hw.mac.type == e1000_i354) {
1920                 dev_info(&adapter->pdev->dev,
1921                         "Loopback test not supported on i354.\n");
1922                 *data = 0;
1923                 goto out;
1924         }
1925         *data = igb_setup_desc_rings(adapter);
1926         if (*data)
1927                 goto out;
1928         *data = igb_setup_loopback_test(adapter);
1929         if (*data)
1930                 goto err_loopback;
1931         *data = igb_run_loopback_test(adapter);
1932         igb_loopback_cleanup(adapter);
1933
1934 err_loopback:
1935         igb_free_desc_rings(adapter);
1936 out:
1937         return *data;
1938 }
1939
1940 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1941 {
1942         struct e1000_hw *hw = &adapter->hw;
1943         *data = 0;
1944         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1945                 int i = 0;
1946                 hw->mac.serdes_has_link = false;
1947
1948                 /* On some blade server designs, link establishment
1949                  * could take as long as 2-3 minutes
1950                  */
1951                 do {
1952                         hw->mac.ops.check_for_link(&adapter->hw);
1953                         if (hw->mac.serdes_has_link)
1954                                 return *data;
1955                         msleep(20);
1956                 } while (i++ < 3750);
1957
1958                 *data = 1;
1959         } else {
1960                 hw->mac.ops.check_for_link(&adapter->hw);
1961                 if (hw->mac.autoneg)
1962                         msleep(5000);
1963
1964                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1965                         *data = 1;
1966         }
1967         return *data;
1968 }
1969
1970 static void igb_diag_test(struct net_device *netdev,
1971                           struct ethtool_test *eth_test, u64 *data)
1972 {
1973         struct igb_adapter *adapter = netdev_priv(netdev);
1974         u16 autoneg_advertised;
1975         u8 forced_speed_duplex, autoneg;
1976         bool if_running = netif_running(netdev);
1977
1978         set_bit(__IGB_TESTING, &adapter->state);
1979         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1980                 /* Offline tests */
1981
1982                 /* save speed, duplex, autoneg settings */
1983                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1984                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1985                 autoneg = adapter->hw.mac.autoneg;
1986
1987                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1988
1989                 /* power up link for link test */
1990                 igb_power_up_link(adapter);
1991
1992                 /* Link test performed before hardware reset so autoneg doesn't
1993                  * interfere with test result
1994                  */
1995                 if (igb_link_test(adapter, &data[4]))
1996                         eth_test->flags |= ETH_TEST_FL_FAILED;
1997
1998                 if (if_running)
1999                         /* indicate we're in test mode */
2000                         dev_close(netdev);
2001                 else
2002                         igb_reset(adapter);
2003
2004                 if (igb_reg_test(adapter, &data[0]))
2005                         eth_test->flags |= ETH_TEST_FL_FAILED;
2006
2007                 igb_reset(adapter);
2008                 if (igb_eeprom_test(adapter, &data[1]))
2009                         eth_test->flags |= ETH_TEST_FL_FAILED;
2010
2011                 igb_reset(adapter);
2012                 if (igb_intr_test(adapter, &data[2]))
2013                         eth_test->flags |= ETH_TEST_FL_FAILED;
2014
2015                 igb_reset(adapter);
2016                 /* power up link for loopback test */
2017                 igb_power_up_link(adapter);
2018                 if (igb_loopback_test(adapter, &data[3]))
2019                         eth_test->flags |= ETH_TEST_FL_FAILED;
2020
2021                 /* restore speed, duplex, autoneg settings */
2022                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2023                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2024                 adapter->hw.mac.autoneg = autoneg;
2025
2026                 /* force this routine to wait until autoneg complete/timeout */
2027                 adapter->hw.phy.autoneg_wait_to_complete = true;
2028                 igb_reset(adapter);
2029                 adapter->hw.phy.autoneg_wait_to_complete = false;
2030
2031                 clear_bit(__IGB_TESTING, &adapter->state);
2032                 if (if_running)
2033                         dev_open(netdev);
2034         } else {
2035                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2036
2037                 /* PHY is powered down when interface is down */
2038                 if (if_running && igb_link_test(adapter, &data[4]))
2039                         eth_test->flags |= ETH_TEST_FL_FAILED;
2040                 else
2041                         data[4] = 0;
2042
2043                 /* Online tests aren't run; pass by default */
2044                 data[0] = 0;
2045                 data[1] = 0;
2046                 data[2] = 0;
2047                 data[3] = 0;
2048
2049                 clear_bit(__IGB_TESTING, &adapter->state);
2050         }
2051         msleep_interruptible(4 * 1000);
2052 }
2053
2054 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2055 {
2056         struct igb_adapter *adapter = netdev_priv(netdev);
2057
2058         wol->supported = WAKE_UCAST | WAKE_MCAST |
2059                          WAKE_BCAST | WAKE_MAGIC |
2060                          WAKE_PHY;
2061         wol->wolopts = 0;
2062
2063         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2064                 return;
2065
2066         /* apply any specific unsupported masks here */
2067         switch (adapter->hw.device_id) {
2068         default:
2069                 break;
2070         }
2071
2072         if (adapter->wol & E1000_WUFC_EX)
2073                 wol->wolopts |= WAKE_UCAST;
2074         if (adapter->wol & E1000_WUFC_MC)
2075                 wol->wolopts |= WAKE_MCAST;
2076         if (adapter->wol & E1000_WUFC_BC)
2077                 wol->wolopts |= WAKE_BCAST;
2078         if (adapter->wol & E1000_WUFC_MAG)
2079                 wol->wolopts |= WAKE_MAGIC;
2080         if (adapter->wol & E1000_WUFC_LNKC)
2081                 wol->wolopts |= WAKE_PHY;
2082 }
2083
2084 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2085 {
2086         struct igb_adapter *adapter = netdev_priv(netdev);
2087
2088         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2089                 return -EOPNOTSUPP;
2090
2091         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2092                 return wol->wolopts ? -EOPNOTSUPP : 0;
2093
2094         /* these settings will always override what we currently have */
2095         adapter->wol = 0;
2096
2097         if (wol->wolopts & WAKE_UCAST)
2098                 adapter->wol |= E1000_WUFC_EX;
2099         if (wol->wolopts & WAKE_MCAST)
2100                 adapter->wol |= E1000_WUFC_MC;
2101         if (wol->wolopts & WAKE_BCAST)
2102                 adapter->wol |= E1000_WUFC_BC;
2103         if (wol->wolopts & WAKE_MAGIC)
2104                 adapter->wol |= E1000_WUFC_MAG;
2105         if (wol->wolopts & WAKE_PHY)
2106                 adapter->wol |= E1000_WUFC_LNKC;
2107         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2108
2109         return 0;
2110 }
2111
2112 /* bit defines for adapter->led_status */
2113 #define IGB_LED_ON              0
2114
2115 static int igb_set_phys_id(struct net_device *netdev,
2116                            enum ethtool_phys_id_state state)
2117 {
2118         struct igb_adapter *adapter = netdev_priv(netdev);
2119         struct e1000_hw *hw = &adapter->hw;
2120
2121         switch (state) {
2122         case ETHTOOL_ID_ACTIVE:
2123                 igb_blink_led(hw);
2124                 return 2;
2125         case ETHTOOL_ID_ON:
2126                 igb_blink_led(hw);
2127                 break;
2128         case ETHTOOL_ID_OFF:
2129                 igb_led_off(hw);
2130                 break;
2131         case ETHTOOL_ID_INACTIVE:
2132                 igb_led_off(hw);
2133                 clear_bit(IGB_LED_ON, &adapter->led_status);
2134                 igb_cleanup_led(hw);
2135                 break;
2136         }
2137
2138         return 0;
2139 }
2140
2141 static int igb_set_coalesce(struct net_device *netdev,
2142                             struct ethtool_coalesce *ec)
2143 {
2144         struct igb_adapter *adapter = netdev_priv(netdev);
2145         int i;
2146
2147         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2148             ((ec->rx_coalesce_usecs > 3) &&
2149              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2150             (ec->rx_coalesce_usecs == 2))
2151                 return -EINVAL;
2152
2153         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2154             ((ec->tx_coalesce_usecs > 3) &&
2155              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2156             (ec->tx_coalesce_usecs == 2))
2157                 return -EINVAL;
2158
2159         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2160                 return -EINVAL;
2161
2162         /* If ITR is disabled, disable DMAC */
2163         if (ec->rx_coalesce_usecs == 0) {
2164                 if (adapter->flags & IGB_FLAG_DMAC)
2165                         adapter->flags &= ~IGB_FLAG_DMAC;
2166         }
2167
2168         /* convert to rate of irq's per second */
2169         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2170                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2171         else
2172                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2173
2174         /* convert to rate of irq's per second */
2175         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2176                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2177         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2178                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2179         else
2180                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2181
2182         for (i = 0; i < adapter->num_q_vectors; i++) {
2183                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2184                 q_vector->tx.work_limit = adapter->tx_work_limit;
2185                 if (q_vector->rx.ring)
2186                         q_vector->itr_val = adapter->rx_itr_setting;
2187                 else
2188                         q_vector->itr_val = adapter->tx_itr_setting;
2189                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2190                         q_vector->itr_val = IGB_START_ITR;
2191                 q_vector->set_itr = 1;
2192         }
2193
2194         return 0;
2195 }
2196
2197 static int igb_get_coalesce(struct net_device *netdev,
2198                             struct ethtool_coalesce *ec)
2199 {
2200         struct igb_adapter *adapter = netdev_priv(netdev);
2201
2202         if (adapter->rx_itr_setting <= 3)
2203                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2204         else
2205                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2206
2207         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2208                 if (adapter->tx_itr_setting <= 3)
2209                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2210                 else
2211                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2212         }
2213
2214         return 0;
2215 }
2216
2217 static int igb_nway_reset(struct net_device *netdev)
2218 {
2219         struct igb_adapter *adapter = netdev_priv(netdev);
2220         if (netif_running(netdev))
2221                 igb_reinit_locked(adapter);
2222         return 0;
2223 }
2224
2225 static int igb_get_sset_count(struct net_device *netdev, int sset)
2226 {
2227         switch (sset) {
2228         case ETH_SS_STATS:
2229                 return IGB_STATS_LEN;
2230         case ETH_SS_TEST:
2231                 return IGB_TEST_LEN;
2232         default:
2233                 return -ENOTSUPP;
2234         }
2235 }
2236
2237 static void igb_get_ethtool_stats(struct net_device *netdev,
2238                                   struct ethtool_stats *stats, u64 *data)
2239 {
2240         struct igb_adapter *adapter = netdev_priv(netdev);
2241         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2242         unsigned int start;
2243         struct igb_ring *ring;
2244         int i, j;
2245         char *p;
2246
2247         spin_lock(&adapter->stats64_lock);
2248         igb_update_stats(adapter, net_stats);
2249
2250         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2251                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2252                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2253                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2254         }
2255         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2256                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2257                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2258                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2259         }
2260         for (j = 0; j < adapter->num_tx_queues; j++) {
2261                 u64     restart2;
2262
2263                 ring = adapter->tx_ring[j];
2264                 do {
2265                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
2266                         data[i]   = ring->tx_stats.packets;
2267                         data[i+1] = ring->tx_stats.bytes;
2268                         data[i+2] = ring->tx_stats.restart_queue;
2269                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
2270                 do {
2271                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp2);
2272                         restart2  = ring->tx_stats.restart_queue2;
2273                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start));
2274                 data[i+2] += restart2;
2275
2276                 i += IGB_TX_QUEUE_STATS_LEN;
2277         }
2278         for (j = 0; j < adapter->num_rx_queues; j++) {
2279                 ring = adapter->rx_ring[j];
2280                 do {
2281                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
2282                         data[i]   = ring->rx_stats.packets;
2283                         data[i+1] = ring->rx_stats.bytes;
2284                         data[i+2] = ring->rx_stats.drops;
2285                         data[i+3] = ring->rx_stats.csum_err;
2286                         data[i+4] = ring->rx_stats.alloc_failed;
2287                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
2288                 i += IGB_RX_QUEUE_STATS_LEN;
2289         }
2290         spin_unlock(&adapter->stats64_lock);
2291 }
2292
2293 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2294 {
2295         struct igb_adapter *adapter = netdev_priv(netdev);
2296         u8 *p = data;
2297         int i;
2298
2299         switch (stringset) {
2300         case ETH_SS_TEST:
2301                 memcpy(data, *igb_gstrings_test,
2302                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2303                 break;
2304         case ETH_SS_STATS:
2305                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2306                         memcpy(p, igb_gstrings_stats[i].stat_string,
2307                                ETH_GSTRING_LEN);
2308                         p += ETH_GSTRING_LEN;
2309                 }
2310                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2311                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2312                                ETH_GSTRING_LEN);
2313                         p += ETH_GSTRING_LEN;
2314                 }
2315                 for (i = 0; i < adapter->num_tx_queues; i++) {
2316                         sprintf(p, "tx_queue_%u_packets", i);
2317                         p += ETH_GSTRING_LEN;
2318                         sprintf(p, "tx_queue_%u_bytes", i);
2319                         p += ETH_GSTRING_LEN;
2320                         sprintf(p, "tx_queue_%u_restart", i);
2321                         p += ETH_GSTRING_LEN;
2322                 }
2323                 for (i = 0; i < adapter->num_rx_queues; i++) {
2324                         sprintf(p, "rx_queue_%u_packets", i);
2325                         p += ETH_GSTRING_LEN;
2326                         sprintf(p, "rx_queue_%u_bytes", i);
2327                         p += ETH_GSTRING_LEN;
2328                         sprintf(p, "rx_queue_%u_drops", i);
2329                         p += ETH_GSTRING_LEN;
2330                         sprintf(p, "rx_queue_%u_csum_err", i);
2331                         p += ETH_GSTRING_LEN;
2332                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2333                         p += ETH_GSTRING_LEN;
2334                 }
2335                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2336                 break;
2337         }
2338 }
2339
2340 static int igb_get_ts_info(struct net_device *dev,
2341                            struct ethtool_ts_info *info)
2342 {
2343         struct igb_adapter *adapter = netdev_priv(dev);
2344
2345         switch (adapter->hw.mac.type) {
2346         case e1000_82575:
2347                 info->so_timestamping =
2348                         SOF_TIMESTAMPING_TX_SOFTWARE |
2349                         SOF_TIMESTAMPING_RX_SOFTWARE |
2350                         SOF_TIMESTAMPING_SOFTWARE;
2351                 return 0;
2352         case e1000_82576:
2353         case e1000_82580:
2354         case e1000_i350:
2355         case e1000_i354:
2356         case e1000_i210:
2357         case e1000_i211:
2358                 info->so_timestamping =
2359                         SOF_TIMESTAMPING_TX_SOFTWARE |
2360                         SOF_TIMESTAMPING_RX_SOFTWARE |
2361                         SOF_TIMESTAMPING_SOFTWARE |
2362                         SOF_TIMESTAMPING_TX_HARDWARE |
2363                         SOF_TIMESTAMPING_RX_HARDWARE |
2364                         SOF_TIMESTAMPING_RAW_HARDWARE;
2365
2366                 if (adapter->ptp_clock)
2367                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2368                 else
2369                         info->phc_index = -1;
2370
2371                 info->tx_types =
2372                         (1 << HWTSTAMP_TX_OFF) |
2373                         (1 << HWTSTAMP_TX_ON);
2374
2375                 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2376
2377                 /* 82576 does not support timestamping all packets. */
2378                 if (adapter->hw.mac.type >= e1000_82580)
2379                         info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2380                 else
2381                         info->rx_filters |=
2382                                 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2383                                 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2384                                 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2385                                 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2386                                 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2387                                 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2388                                 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2389
2390                 return 0;
2391         default:
2392                 return -EOPNOTSUPP;
2393         }
2394 }
2395
2396 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2397                                  struct ethtool_rxnfc *cmd)
2398 {
2399         cmd->data = 0;
2400
2401         /* Report default options for RSS on igb */
2402         switch (cmd->flow_type) {
2403         case TCP_V4_FLOW:
2404                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2405         case UDP_V4_FLOW:
2406                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2407                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2408         case SCTP_V4_FLOW:
2409         case AH_ESP_V4_FLOW:
2410         case AH_V4_FLOW:
2411         case ESP_V4_FLOW:
2412         case IPV4_FLOW:
2413                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2414                 break;
2415         case TCP_V6_FLOW:
2416                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2417         case UDP_V6_FLOW:
2418                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2419                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2420         case SCTP_V6_FLOW:
2421         case AH_ESP_V6_FLOW:
2422         case AH_V6_FLOW:
2423         case ESP_V6_FLOW:
2424         case IPV6_FLOW:
2425                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2426                 break;
2427         default:
2428                 return -EINVAL;
2429         }
2430
2431         return 0;
2432 }
2433
2434 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2435                          u32 *rule_locs)
2436 {
2437         struct igb_adapter *adapter = netdev_priv(dev);
2438         int ret = -EOPNOTSUPP;
2439
2440         switch (cmd->cmd) {
2441         case ETHTOOL_GRXRINGS:
2442                 cmd->data = adapter->num_rx_queues;
2443                 ret = 0;
2444                 break;
2445         case ETHTOOL_GRXFH:
2446                 ret = igb_get_rss_hash_opts(adapter, cmd);
2447                 break;
2448         default:
2449                 break;
2450         }
2451
2452         return ret;
2453 }
2454
2455 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2456                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2457 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2458                                 struct ethtool_rxnfc *nfc)
2459 {
2460         u32 flags = adapter->flags;
2461
2462         /* RSS does not support anything other than hashing
2463          * to queues on src and dst IPs and ports
2464          */
2465         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2466                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2467                 return -EINVAL;
2468
2469         switch (nfc->flow_type) {
2470         case TCP_V4_FLOW:
2471         case TCP_V6_FLOW:
2472                 if (!(nfc->data & RXH_IP_SRC) ||
2473                     !(nfc->data & RXH_IP_DST) ||
2474                     !(nfc->data & RXH_L4_B_0_1) ||
2475                     !(nfc->data & RXH_L4_B_2_3))
2476                         return -EINVAL;
2477                 break;
2478         case UDP_V4_FLOW:
2479                 if (!(nfc->data & RXH_IP_SRC) ||
2480                     !(nfc->data & RXH_IP_DST))
2481                         return -EINVAL;
2482                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2483                 case 0:
2484                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2485                         break;
2486                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2487                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2488                         break;
2489                 default:
2490                         return -EINVAL;
2491                 }
2492                 break;
2493         case UDP_V6_FLOW:
2494                 if (!(nfc->data & RXH_IP_SRC) ||
2495                     !(nfc->data & RXH_IP_DST))
2496                         return -EINVAL;
2497                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2498                 case 0:
2499                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2500                         break;
2501                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2502                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2503                         break;
2504                 default:
2505                         return -EINVAL;
2506                 }
2507                 break;
2508         case AH_ESP_V4_FLOW:
2509         case AH_V4_FLOW:
2510         case ESP_V4_FLOW:
2511         case SCTP_V4_FLOW:
2512         case AH_ESP_V6_FLOW:
2513         case AH_V6_FLOW:
2514         case ESP_V6_FLOW:
2515         case SCTP_V6_FLOW:
2516                 if (!(nfc->data & RXH_IP_SRC) ||
2517                     !(nfc->data & RXH_IP_DST) ||
2518                     (nfc->data & RXH_L4_B_0_1) ||
2519                     (nfc->data & RXH_L4_B_2_3))
2520                         return -EINVAL;
2521                 break;
2522         default:
2523                 return -EINVAL;
2524         }
2525
2526         /* if we changed something we need to update flags */
2527         if (flags != adapter->flags) {
2528                 struct e1000_hw *hw = &adapter->hw;
2529                 u32 mrqc = rd32(E1000_MRQC);
2530
2531                 if ((flags & UDP_RSS_FLAGS) &&
2532                     !(adapter->flags & UDP_RSS_FLAGS))
2533                         dev_err(&adapter->pdev->dev,
2534                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2535
2536                 adapter->flags = flags;
2537
2538                 /* Perform hash on these packet types */
2539                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2540                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2541                         E1000_MRQC_RSS_FIELD_IPV6 |
2542                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2543
2544                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2545                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2546
2547                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2548                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2549
2550                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2551                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2552
2553                 wr32(E1000_MRQC, mrqc);
2554         }
2555
2556         return 0;
2557 }
2558
2559 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2560 {
2561         struct igb_adapter *adapter = netdev_priv(dev);
2562         int ret = -EOPNOTSUPP;
2563
2564         switch (cmd->cmd) {
2565         case ETHTOOL_SRXFH:
2566                 ret = igb_set_rss_hash_opt(adapter, cmd);
2567                 break;
2568         default:
2569                 break;
2570         }
2571
2572         return ret;
2573 }
2574
2575 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2576 {
2577         struct igb_adapter *adapter = netdev_priv(netdev);
2578         struct e1000_hw *hw = &adapter->hw;
2579         u32 ipcnfg, eeer, ret_val;
2580         u16 phy_data;
2581
2582         if ((hw->mac.type < e1000_i350) ||
2583             (hw->phy.media_type != e1000_media_type_copper))
2584                 return -EOPNOTSUPP;
2585
2586         edata->supported = (SUPPORTED_1000baseT_Full |
2587                             SUPPORTED_100baseT_Full);
2588
2589         ipcnfg = rd32(E1000_IPCNFG);
2590         eeer = rd32(E1000_EEER);
2591
2592         /* EEE status on negotiated link */
2593         if (ipcnfg & E1000_IPCNFG_EEE_1G_AN)
2594                 edata->advertised = ADVERTISED_1000baseT_Full;
2595
2596         if (ipcnfg & E1000_IPCNFG_EEE_100M_AN)
2597                 edata->advertised |= ADVERTISED_100baseT_Full;
2598
2599         /* EEE Link Partner Advertised */
2600         switch (hw->mac.type) {
2601         case e1000_i350:
2602                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
2603                                            &phy_data);
2604                 if (ret_val)
2605                         return -ENODATA;
2606
2607                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2608
2609                 break;
2610         case e1000_i210:
2611         case e1000_i211:
2612                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
2613                                              E1000_EEE_LP_ADV_DEV_I210,
2614                                              &phy_data);
2615                 if (ret_val)
2616                         return -ENODATA;
2617
2618                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2619
2620                 break;
2621         default:
2622                 break;
2623         }
2624
2625         if (eeer & E1000_EEER_EEE_NEG)
2626                 edata->eee_active = true;
2627
2628         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
2629
2630         if (eeer & E1000_EEER_TX_LPI_EN)
2631                 edata->tx_lpi_enabled = true;
2632
2633         /* Report correct negotiated EEE status for devices that
2634          * wrongly report EEE at half-duplex
2635          */
2636         if (adapter->link_duplex == HALF_DUPLEX) {
2637                 edata->eee_enabled = false;
2638                 edata->eee_active = false;
2639                 edata->tx_lpi_enabled = false;
2640                 edata->advertised &= ~edata->advertised;
2641         }
2642
2643         return 0;
2644 }
2645
2646 static int igb_set_eee(struct net_device *netdev,
2647                        struct ethtool_eee *edata)
2648 {
2649         struct igb_adapter *adapter = netdev_priv(netdev);
2650         struct e1000_hw *hw = &adapter->hw;
2651         struct ethtool_eee eee_curr;
2652         s32 ret_val;
2653
2654         if ((hw->mac.type < e1000_i350) ||
2655             (hw->phy.media_type != e1000_media_type_copper))
2656                 return -EOPNOTSUPP;
2657
2658         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
2659
2660         ret_val = igb_get_eee(netdev, &eee_curr);
2661         if (ret_val)
2662                 return ret_val;
2663
2664         if (eee_curr.eee_enabled) {
2665                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2666                         dev_err(&adapter->pdev->dev,
2667                                 "Setting EEE tx-lpi is not supported\n");
2668                         return -EINVAL;
2669                 }
2670
2671                 /* Tx LPI timer is not implemented currently */
2672                 if (edata->tx_lpi_timer) {
2673                         dev_err(&adapter->pdev->dev,
2674                                 "Setting EEE Tx LPI timer is not supported\n");
2675                         return -EINVAL;
2676                 }
2677
2678                 if (eee_curr.advertised != edata->advertised) {
2679                         dev_err(&adapter->pdev->dev,
2680                                 "Setting EEE Advertisement is not supported\n");
2681                         return -EINVAL;
2682                 }
2683
2684         } else if (!edata->eee_enabled) {
2685                 dev_err(&adapter->pdev->dev,
2686                         "Setting EEE options are not supported with EEE disabled\n");
2687                         return -EINVAL;
2688                 }
2689
2690         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
2691                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
2692                 igb_set_eee_i350(hw);
2693
2694                 /* reset link */
2695                 if (netif_running(netdev))
2696                         igb_reinit_locked(adapter);
2697                 else
2698                         igb_reset(adapter);
2699         }
2700
2701         return 0;
2702 }
2703
2704 static int igb_get_module_info(struct net_device *netdev,
2705                                struct ethtool_modinfo *modinfo)
2706 {
2707         struct igb_adapter *adapter = netdev_priv(netdev);
2708         struct e1000_hw *hw = &adapter->hw;
2709         u32 status = E1000_SUCCESS;
2710         u16 sff8472_rev, addr_mode;
2711         bool page_swap = false;
2712
2713         if ((hw->phy.media_type == e1000_media_type_copper) ||
2714             (hw->phy.media_type == e1000_media_type_unknown))
2715                 return -EOPNOTSUPP;
2716
2717         /* Check whether we support SFF-8472 or not */
2718         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
2719         if (status != E1000_SUCCESS)
2720                 return -EIO;
2721
2722         /* addressing mode is not supported */
2723         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
2724         if (status != E1000_SUCCESS)
2725                 return -EIO;
2726
2727         /* addressing mode is not supported */
2728         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
2729                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
2730                 page_swap = true;
2731         }
2732
2733         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
2734                 /* We have an SFP, but it does not support SFF-8472 */
2735                 modinfo->type = ETH_MODULE_SFF_8079;
2736                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
2737         } else {
2738                 /* We have an SFP which supports a revision of SFF-8472 */
2739                 modinfo->type = ETH_MODULE_SFF_8472;
2740                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2741         }
2742
2743         return 0;
2744 }
2745
2746 static int igb_get_module_eeprom(struct net_device *netdev,
2747                                  struct ethtool_eeprom *ee, u8 *data)
2748 {
2749         struct igb_adapter *adapter = netdev_priv(netdev);
2750         struct e1000_hw *hw = &adapter->hw;
2751         u32 status = E1000_SUCCESS;
2752         u16 *dataword;
2753         u16 first_word, last_word;
2754         int i = 0;
2755
2756         if (ee->len == 0)
2757                 return -EINVAL;
2758
2759         first_word = ee->offset >> 1;
2760         last_word = (ee->offset + ee->len - 1) >> 1;
2761
2762         dataword = kmalloc(sizeof(u16) * (last_word - first_word + 1),
2763                            GFP_KERNEL);
2764         if (!dataword)
2765                 return -ENOMEM;
2766
2767         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
2768         for (i = 0; i < last_word - first_word + 1; i++) {
2769                 status = igb_read_phy_reg_i2c(hw, first_word + i, &dataword[i]);
2770                 if (status != E1000_SUCCESS)
2771                         /* Error occurred while reading module */
2772                         return -EIO;
2773
2774                 be16_to_cpus(&dataword[i]);
2775         }
2776
2777         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
2778         kfree(dataword);
2779
2780         return 0;
2781 }
2782
2783 static int igb_ethtool_begin(struct net_device *netdev)
2784 {
2785         struct igb_adapter *adapter = netdev_priv(netdev);
2786         pm_runtime_get_sync(&adapter->pdev->dev);
2787         return 0;
2788 }
2789
2790 static void igb_ethtool_complete(struct net_device *netdev)
2791 {
2792         struct igb_adapter *adapter = netdev_priv(netdev);
2793         pm_runtime_put(&adapter->pdev->dev);
2794 }
2795
2796 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
2797 {
2798         return IGB_RETA_SIZE;
2799 }
2800
2801 static int igb_get_rxfh_indir(struct net_device *netdev, u32 *indir)
2802 {
2803         struct igb_adapter *adapter = netdev_priv(netdev);
2804         int i;
2805
2806         for (i = 0; i < IGB_RETA_SIZE; i++)
2807                 indir[i] = adapter->rss_indir_tbl[i];
2808
2809         return 0;
2810 }
2811
2812 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
2813 {
2814         struct e1000_hw *hw = &adapter->hw;
2815         u32 reg = E1000_RETA(0);
2816         u32 shift = 0;
2817         int i = 0;
2818
2819         switch (hw->mac.type) {
2820         case e1000_82575:
2821                 shift = 6;
2822                 break;
2823         case e1000_82576:
2824                 /* 82576 supports 2 RSS queues for SR-IOV */
2825                 if (adapter->vfs_allocated_count)
2826                         shift = 3;
2827                 break;
2828         default:
2829                 break;
2830         }
2831
2832         while (i < IGB_RETA_SIZE) {
2833                 u32 val = 0;
2834                 int j;
2835
2836                 for (j = 3; j >= 0; j--) {
2837                         val <<= 8;
2838                         val |= adapter->rss_indir_tbl[i + j];
2839                 }
2840
2841                 wr32(reg, val << shift);
2842                 reg += 4;
2843                 i += 4;
2844         }
2845 }
2846
2847 static int igb_set_rxfh_indir(struct net_device *netdev, const u32 *indir)
2848 {
2849         struct igb_adapter *adapter = netdev_priv(netdev);
2850         struct e1000_hw *hw = &adapter->hw;
2851         int i;
2852         u32 num_queues;
2853
2854         num_queues = adapter->rss_queues;
2855
2856         switch (hw->mac.type) {
2857         case e1000_82576:
2858                 /* 82576 supports 2 RSS queues for SR-IOV */
2859                 if (adapter->vfs_allocated_count)
2860                         num_queues = 2;
2861                 break;
2862         default:
2863                 break;
2864         }
2865
2866         /* Verify user input. */
2867         for (i = 0; i < IGB_RETA_SIZE; i++)
2868                 if (indir[i] >= num_queues)
2869                         return -EINVAL;
2870
2871
2872         for (i = 0; i < IGB_RETA_SIZE; i++)
2873                 adapter->rss_indir_tbl[i] = indir[i];
2874
2875         igb_write_rss_indir_tbl(adapter);
2876
2877         return 0;
2878 }
2879
2880 static const struct ethtool_ops igb_ethtool_ops = {
2881         .get_settings           = igb_get_settings,
2882         .set_settings           = igb_set_settings,
2883         .get_drvinfo            = igb_get_drvinfo,
2884         .get_regs_len           = igb_get_regs_len,
2885         .get_regs               = igb_get_regs,
2886         .get_wol                = igb_get_wol,
2887         .set_wol                = igb_set_wol,
2888         .get_msglevel           = igb_get_msglevel,
2889         .set_msglevel           = igb_set_msglevel,
2890         .nway_reset             = igb_nway_reset,
2891         .get_link               = igb_get_link,
2892         .get_eeprom_len         = igb_get_eeprom_len,
2893         .get_eeprom             = igb_get_eeprom,
2894         .set_eeprom             = igb_set_eeprom,
2895         .get_ringparam          = igb_get_ringparam,
2896         .set_ringparam          = igb_set_ringparam,
2897         .get_pauseparam         = igb_get_pauseparam,
2898         .set_pauseparam         = igb_set_pauseparam,
2899         .self_test              = igb_diag_test,
2900         .get_strings            = igb_get_strings,
2901         .set_phys_id            = igb_set_phys_id,
2902         .get_sset_count         = igb_get_sset_count,
2903         .get_ethtool_stats      = igb_get_ethtool_stats,
2904         .get_coalesce           = igb_get_coalesce,
2905         .set_coalesce           = igb_set_coalesce,
2906         .get_ts_info            = igb_get_ts_info,
2907         .get_rxnfc              = igb_get_rxnfc,
2908         .set_rxnfc              = igb_set_rxnfc,
2909         .get_eee                = igb_get_eee,
2910         .set_eee                = igb_set_eee,
2911         .get_module_info        = igb_get_module_info,
2912         .get_module_eeprom      = igb_get_module_eeprom,
2913         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
2914         .get_rxfh_indir         = igb_get_rxfh_indir,
2915         .set_rxfh_indir         = igb_set_rxfh_indir,
2916         .begin                  = igb_ethtool_begin,
2917         .complete               = igb_ethtool_complete,
2918 };
2919
2920 void igb_set_ethtool_ops(struct net_device *netdev)
2921 {
2922         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2923 }