1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/bitops.h>
34 #include <linux/vmalloc.h>
35 #include <linux/pagemap.h>
36 #include <linux/netdevice.h>
37 #include <linux/ipv6.h>
38 #include <linux/slab.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/mii.h>
43 #include <linux/ethtool.h>
45 #include <linux/if_vlan.h>
46 #include <linux/pci.h>
47 #include <linux/pci-aspm.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
51 #include <linux/tcp.h>
52 #include <linux/sctp.h>
53 #include <linux/if_ether.h>
54 #include <linux/aer.h>
55 #include <linux/prefetch.h>
56 #include <linux/pm_runtime.h>
58 #include <linux/dca.h>
60 #include <linux/i2c.h>
66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
67 __stringify(BUILD) "-k"
68 char igb_driver_name[] = "igb";
69 char igb_driver_version[] = DRV_VERSION;
70 static const char igb_driver_string[] =
71 "Intel(R) Gigabit Ethernet Network Driver";
72 static const char igb_copyright[] =
73 "Copyright (c) 2007-2013 Intel Corporation.";
75 static const struct e1000_info *igb_info_tbl[] = {
76 [board_82575] = &e1000_82575_info,
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
115 /* required last entry */
119 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
121 void igb_reset(struct igb_adapter *);
122 static int igb_setup_all_tx_resources(struct igb_adapter *);
123 static int igb_setup_all_rx_resources(struct igb_adapter *);
124 static void igb_free_all_tx_resources(struct igb_adapter *);
125 static void igb_free_all_rx_resources(struct igb_adapter *);
126 static void igb_setup_mrqc(struct igb_adapter *);
127 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
128 static void igb_remove(struct pci_dev *pdev);
129 static int igb_sw_init(struct igb_adapter *);
130 static int igb_open(struct net_device *);
131 static int igb_close(struct net_device *);
132 static void igb_configure(struct igb_adapter *);
133 static void igb_configure_tx(struct igb_adapter *);
134 static void igb_configure_rx(struct igb_adapter *);
135 static void igb_clean_all_tx_rings(struct igb_adapter *);
136 static void igb_clean_all_rx_rings(struct igb_adapter *);
137 static void igb_clean_tx_ring(struct igb_ring *);
138 static void igb_clean_rx_ring(struct igb_ring *);
139 static void igb_set_rx_mode(struct net_device *);
140 static void igb_update_phy_info(unsigned long);
141 static void igb_watchdog(unsigned long);
142 static void igb_watchdog_task(struct work_struct *);
143 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
144 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
145 struct rtnl_link_stats64 *stats);
146 static int igb_change_mtu(struct net_device *, int);
147 static int igb_set_mac(struct net_device *, void *);
148 static void igb_set_uta(struct igb_adapter *adapter);
149 static irqreturn_t igb_intr(int irq, void *);
150 static irqreturn_t igb_intr_msi(int irq, void *);
151 static irqreturn_t igb_msix_other(int irq, void *);
152 static irqreturn_t igb_msix_ring(int irq, void *);
153 #ifdef CONFIG_IGB_DCA
154 static void igb_update_dca(struct igb_q_vector *);
155 static void igb_setup_dca(struct igb_adapter *);
156 #endif /* CONFIG_IGB_DCA */
157 static int igb_poll(struct napi_struct *, int);
158 static bool igb_clean_tx_irq(struct igb_q_vector *);
159 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
160 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
161 static void igb_tx_timeout(struct net_device *);
162 static void igb_reset_task(struct work_struct *);
163 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
164 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
165 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
166 static void igb_restore_vlan(struct igb_adapter *);
167 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
168 static void igb_ping_all_vfs(struct igb_adapter *);
169 static void igb_msg_task(struct igb_adapter *);
170 static void igb_vmm_control(struct igb_adapter *);
171 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
172 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
173 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
174 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
175 int vf, u16 vlan, u8 qos);
176 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
177 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
179 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
180 struct ifla_vf_info *ivi);
181 static void igb_check_vf_rate_limit(struct igb_adapter *);
183 #ifdef CONFIG_PCI_IOV
184 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
188 #ifdef CONFIG_PM_SLEEP
189 static int igb_suspend(struct device *);
191 static int igb_resume(struct device *);
192 #ifdef CONFIG_PM_RUNTIME
193 static int igb_runtime_suspend(struct device *dev);
194 static int igb_runtime_resume(struct device *dev);
195 static int igb_runtime_idle(struct device *dev);
197 static const struct dev_pm_ops igb_pm_ops = {
198 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
199 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
203 static void igb_shutdown(struct pci_dev *);
204 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
205 #ifdef CONFIG_IGB_DCA
206 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
207 static struct notifier_block dca_notifier = {
208 .notifier_call = igb_notify_dca,
213 #ifdef CONFIG_NET_POLL_CONTROLLER
214 /* for netdump / net console */
215 static void igb_netpoll(struct net_device *);
217 #ifdef CONFIG_PCI_IOV
218 static unsigned int max_vfs = 0;
219 module_param(max_vfs, uint, 0);
220 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
221 "per physical function");
222 #endif /* CONFIG_PCI_IOV */
224 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
225 pci_channel_state_t);
226 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
227 static void igb_io_resume(struct pci_dev *);
229 static const struct pci_error_handlers igb_err_handler = {
230 .error_detected = igb_io_error_detected,
231 .slot_reset = igb_io_slot_reset,
232 .resume = igb_io_resume,
235 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
237 static struct pci_driver igb_driver = {
238 .name = igb_driver_name,
239 .id_table = igb_pci_tbl,
241 .remove = igb_remove,
243 .driver.pm = &igb_pm_ops,
245 .shutdown = igb_shutdown,
246 .sriov_configure = igb_pci_sriov_configure,
247 .err_handler = &igb_err_handler
250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
252 MODULE_LICENSE("GPL");
253 MODULE_VERSION(DRV_VERSION);
255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
256 static int debug = -1;
257 module_param(debug, int, 0);
258 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
260 struct igb_reg_info {
265 static const struct igb_reg_info igb_reg_info_tbl[] = {
267 /* General Registers */
268 {E1000_CTRL, "CTRL"},
269 {E1000_STATUS, "STATUS"},
270 {E1000_CTRL_EXT, "CTRL_EXT"},
272 /* Interrupt Registers */
276 {E1000_RCTL, "RCTL"},
277 {E1000_RDLEN(0), "RDLEN"},
278 {E1000_RDH(0), "RDH"},
279 {E1000_RDT(0), "RDT"},
280 {E1000_RXDCTL(0), "RXDCTL"},
281 {E1000_RDBAL(0), "RDBAL"},
282 {E1000_RDBAH(0), "RDBAH"},
285 {E1000_TCTL, "TCTL"},
286 {E1000_TDBAL(0), "TDBAL"},
287 {E1000_TDBAH(0), "TDBAH"},
288 {E1000_TDLEN(0), "TDLEN"},
289 {E1000_TDH(0), "TDH"},
290 {E1000_TDT(0), "TDT"},
291 {E1000_TXDCTL(0), "TXDCTL"},
292 {E1000_TDFH, "TDFH"},
293 {E1000_TDFT, "TDFT"},
294 {E1000_TDFHS, "TDFHS"},
295 {E1000_TDFPC, "TDFPC"},
297 /* List Terminator */
301 /* igb_regdump - register printout routine */
302 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
308 switch (reginfo->ofs) {
310 for (n = 0; n < 4; n++)
311 regs[n] = rd32(E1000_RDLEN(n));
314 for (n = 0; n < 4; n++)
315 regs[n] = rd32(E1000_RDH(n));
318 for (n = 0; n < 4; n++)
319 regs[n] = rd32(E1000_RDT(n));
321 case E1000_RXDCTL(0):
322 for (n = 0; n < 4; n++)
323 regs[n] = rd32(E1000_RXDCTL(n));
326 for (n = 0; n < 4; n++)
327 regs[n] = rd32(E1000_RDBAL(n));
330 for (n = 0; n < 4; n++)
331 regs[n] = rd32(E1000_RDBAH(n));
334 for (n = 0; n < 4; n++)
335 regs[n] = rd32(E1000_RDBAL(n));
338 for (n = 0; n < 4; n++)
339 regs[n] = rd32(E1000_TDBAH(n));
342 for (n = 0; n < 4; n++)
343 regs[n] = rd32(E1000_TDLEN(n));
346 for (n = 0; n < 4; n++)
347 regs[n] = rd32(E1000_TDH(n));
350 for (n = 0; n < 4; n++)
351 regs[n] = rd32(E1000_TDT(n));
353 case E1000_TXDCTL(0):
354 for (n = 0; n < 4; n++)
355 regs[n] = rd32(E1000_TXDCTL(n));
358 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
362 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
363 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
368 static void igb_dump(struct igb_adapter *adapter)
370 struct net_device *netdev = adapter->netdev;
371 struct e1000_hw *hw = &adapter->hw;
372 struct igb_reg_info *reginfo;
373 struct igb_ring *tx_ring;
374 union e1000_adv_tx_desc *tx_desc;
375 struct my_u0 { u64 a; u64 b; } *u0;
376 struct igb_ring *rx_ring;
377 union e1000_adv_rx_desc *rx_desc;
381 if (!netif_msg_hw(adapter))
384 /* Print netdevice Info */
386 dev_info(&adapter->pdev->dev, "Net device Info\n");
387 pr_info("Device Name state trans_start "
389 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
390 netdev->state, netdev->trans_start, netdev->last_rx);
393 /* Print Registers */
394 dev_info(&adapter->pdev->dev, "Register Dump\n");
395 pr_info(" Register Name Value\n");
396 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
397 reginfo->name; reginfo++) {
398 igb_regdump(hw, reginfo);
401 /* Print TX Ring Summary */
402 if (!netdev || !netif_running(netdev))
405 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
406 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
407 for (n = 0; n < adapter->num_tx_queues; n++) {
408 struct igb_tx_buffer *buffer_info;
409 tx_ring = adapter->tx_ring[n];
410 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
411 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
412 n, tx_ring->next_to_use, tx_ring->next_to_clean,
413 (u64)dma_unmap_addr(buffer_info, dma),
414 dma_unmap_len(buffer_info, len),
415 buffer_info->next_to_watch,
416 (u64)buffer_info->time_stamp);
420 if (!netif_msg_tx_done(adapter))
421 goto rx_ring_summary;
423 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
425 /* Transmit Descriptor Formats
427 * Advanced Transmit Descriptor
428 * +--------------------------------------------------------------+
429 * 0 | Buffer Address [63:0] |
430 * +--------------------------------------------------------------+
431 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
432 * +--------------------------------------------------------------+
433 * 63 46 45 40 39 38 36 35 32 31 24 15 0
436 for (n = 0; n < adapter->num_tx_queues; n++) {
437 tx_ring = adapter->tx_ring[n];
438 pr_info("------------------------------------\n");
439 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
440 pr_info("------------------------------------\n");
441 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
442 "[bi->dma ] leng ntw timestamp "
445 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
446 const char *next_desc;
447 struct igb_tx_buffer *buffer_info;
448 tx_desc = IGB_TX_DESC(tx_ring, i);
449 buffer_info = &tx_ring->tx_buffer_info[i];
450 u0 = (struct my_u0 *)tx_desc;
451 if (i == tx_ring->next_to_use &&
452 i == tx_ring->next_to_clean)
453 next_desc = " NTC/U";
454 else if (i == tx_ring->next_to_use)
456 else if (i == tx_ring->next_to_clean)
461 pr_info("T [0x%03X] %016llX %016llX %016llX"
462 " %04X %p %016llX %p%s\n", i,
465 (u64)dma_unmap_addr(buffer_info, dma),
466 dma_unmap_len(buffer_info, len),
467 buffer_info->next_to_watch,
468 (u64)buffer_info->time_stamp,
469 buffer_info->skb, next_desc);
471 if (netif_msg_pktdata(adapter) && buffer_info->skb)
472 print_hex_dump(KERN_INFO, "",
474 16, 1, buffer_info->skb->data,
475 dma_unmap_len(buffer_info, len),
480 /* Print RX Rings Summary */
482 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
483 pr_info("Queue [NTU] [NTC]\n");
484 for (n = 0; n < adapter->num_rx_queues; n++) {
485 rx_ring = adapter->rx_ring[n];
486 pr_info(" %5d %5X %5X\n",
487 n, rx_ring->next_to_use, rx_ring->next_to_clean);
491 if (!netif_msg_rx_status(adapter))
494 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
496 /* Advanced Receive Descriptor (Read) Format
498 * +-----------------------------------------------------+
499 * 0 | Packet Buffer Address [63:1] |A0/NSE|
500 * +----------------------------------------------+------+
501 * 8 | Header Buffer Address [63:1] | DD |
502 * +-----------------------------------------------------+
505 * Advanced Receive Descriptor (Write-Back) Format
507 * 63 48 47 32 31 30 21 20 17 16 4 3 0
508 * +------------------------------------------------------+
509 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
510 * | Checksum Ident | | | | Type | Type |
511 * +------------------------------------------------------+
512 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
513 * +------------------------------------------------------+
514 * 63 48 47 32 31 20 19 0
517 for (n = 0; n < adapter->num_rx_queues; n++) {
518 rx_ring = adapter->rx_ring[n];
519 pr_info("------------------------------------\n");
520 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
521 pr_info("------------------------------------\n");
522 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
523 "[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
524 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
525 "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
527 for (i = 0; i < rx_ring->count; i++) {
528 const char *next_desc;
529 struct igb_rx_buffer *buffer_info;
530 buffer_info = &rx_ring->rx_buffer_info[i];
531 rx_desc = IGB_RX_DESC(rx_ring, i);
532 u0 = (struct my_u0 *)rx_desc;
533 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
535 if (i == rx_ring->next_to_use)
537 else if (i == rx_ring->next_to_clean)
542 if (staterr & E1000_RXD_STAT_DD) {
543 /* Descriptor Done */
544 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
550 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
554 (u64)buffer_info->dma,
557 if (netif_msg_pktdata(adapter) &&
558 buffer_info->dma && buffer_info->page) {
559 print_hex_dump(KERN_INFO, "",
562 page_address(buffer_info->page) +
563 buffer_info->page_offset,
575 * igb_get_i2c_data - Reads the I2C SDA data bit
576 * @hw: pointer to hardware structure
577 * @i2cctl: Current value of I2CCTL register
579 * Returns the I2C data bit value
581 static int igb_get_i2c_data(void *data)
583 struct igb_adapter *adapter = (struct igb_adapter *)data;
584 struct e1000_hw *hw = &adapter->hw;
585 s32 i2cctl = rd32(E1000_I2CPARAMS);
587 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
591 * igb_set_i2c_data - Sets the I2C data bit
592 * @data: pointer to hardware structure
593 * @state: I2C data value (0 or 1) to set
595 * Sets the I2C data bit
597 static void igb_set_i2c_data(void *data, int state)
599 struct igb_adapter *adapter = (struct igb_adapter *)data;
600 struct e1000_hw *hw = &adapter->hw;
601 s32 i2cctl = rd32(E1000_I2CPARAMS);
604 i2cctl |= E1000_I2C_DATA_OUT;
606 i2cctl &= ~E1000_I2C_DATA_OUT;
608 i2cctl &= ~E1000_I2C_DATA_OE_N;
609 i2cctl |= E1000_I2C_CLK_OE_N;
610 wr32(E1000_I2CPARAMS, i2cctl);
616 * igb_set_i2c_clk - Sets the I2C SCL clock
617 * @data: pointer to hardware structure
618 * @state: state to set clock
620 * Sets the I2C clock line to state
622 static void igb_set_i2c_clk(void *data, int state)
624 struct igb_adapter *adapter = (struct igb_adapter *)data;
625 struct e1000_hw *hw = &adapter->hw;
626 s32 i2cctl = rd32(E1000_I2CPARAMS);
629 i2cctl |= E1000_I2C_CLK_OUT;
630 i2cctl &= ~E1000_I2C_CLK_OE_N;
632 i2cctl &= ~E1000_I2C_CLK_OUT;
633 i2cctl &= ~E1000_I2C_CLK_OE_N;
635 wr32(E1000_I2CPARAMS, i2cctl);
640 * igb_get_i2c_clk - Gets the I2C SCL clock state
641 * @data: pointer to hardware structure
643 * Gets the I2C clock state
645 static int igb_get_i2c_clk(void *data)
647 struct igb_adapter *adapter = (struct igb_adapter *)data;
648 struct e1000_hw *hw = &adapter->hw;
649 s32 i2cctl = rd32(E1000_I2CPARAMS);
651 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
654 static const struct i2c_algo_bit_data igb_i2c_algo = {
655 .setsda = igb_set_i2c_data,
656 .setscl = igb_set_i2c_clk,
657 .getsda = igb_get_i2c_data,
658 .getscl = igb_get_i2c_clk,
664 * igb_get_hw_dev - return device
665 * @hw: pointer to hardware structure
667 * used by hardware layer to print debugging information
669 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
671 struct igb_adapter *adapter = hw->back;
672 return adapter->netdev;
676 * igb_init_module - Driver Registration Routine
678 * igb_init_module is the first routine called when the driver is
679 * loaded. All it does is register with the PCI subsystem.
681 static int __init igb_init_module(void)
684 pr_info("%s - version %s\n",
685 igb_driver_string, igb_driver_version);
687 pr_info("%s\n", igb_copyright);
689 #ifdef CONFIG_IGB_DCA
690 dca_register_notify(&dca_notifier);
692 ret = pci_register_driver(&igb_driver);
696 module_init(igb_init_module);
699 * igb_exit_module - Driver Exit Cleanup Routine
701 * igb_exit_module is called just before the driver is removed
704 static void __exit igb_exit_module(void)
706 #ifdef CONFIG_IGB_DCA
707 dca_unregister_notify(&dca_notifier);
709 pci_unregister_driver(&igb_driver);
712 module_exit(igb_exit_module);
714 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
716 * igb_cache_ring_register - Descriptor ring to register mapping
717 * @adapter: board private structure to initialize
719 * Once we know the feature-set enabled for the device, we'll cache
720 * the register offset the descriptor ring is assigned to.
722 static void igb_cache_ring_register(struct igb_adapter *adapter)
725 u32 rbase_offset = adapter->vfs_allocated_count;
727 switch (adapter->hw.mac.type) {
729 /* The queues are allocated for virtualization such that VF 0
730 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
731 * In order to avoid collision we start at the first free queue
732 * and continue consuming queues in the same sequence
734 if (adapter->vfs_allocated_count) {
735 for (; i < adapter->rss_queues; i++)
736 adapter->rx_ring[i]->reg_idx = rbase_offset +
746 for (; i < adapter->num_rx_queues; i++)
747 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
748 for (; j < adapter->num_tx_queues; j++)
749 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
755 * igb_write_ivar - configure ivar for given MSI-X vector
756 * @hw: pointer to the HW structure
757 * @msix_vector: vector number we are allocating to a given ring
758 * @index: row index of IVAR register to write within IVAR table
759 * @offset: column offset of in IVAR, should be multiple of 8
761 * This function is intended to handle the writing of the IVAR register
762 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
763 * each containing an cause allocation for an Rx and Tx ring, and a
764 * variable number of rows depending on the number of queues supported.
766 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
767 int index, int offset)
769 u32 ivar = array_rd32(E1000_IVAR0, index);
771 /* clear any bits that are currently set */
772 ivar &= ~((u32)0xFF << offset);
774 /* write vector and valid bit */
775 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
777 array_wr32(E1000_IVAR0, index, ivar);
780 #define IGB_N0_QUEUE -1
781 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
783 struct igb_adapter *adapter = q_vector->adapter;
784 struct e1000_hw *hw = &adapter->hw;
785 int rx_queue = IGB_N0_QUEUE;
786 int tx_queue = IGB_N0_QUEUE;
789 if (q_vector->rx.ring)
790 rx_queue = q_vector->rx.ring->reg_idx;
791 if (q_vector->tx.ring)
792 tx_queue = q_vector->tx.ring->reg_idx;
794 switch (hw->mac.type) {
796 /* The 82575 assigns vectors using a bitmask, which matches the
797 * bitmask for the EICR/EIMS/EIMC registers. To assign one
798 * or more queues to a vector, we write the appropriate bits
799 * into the MSIXBM register for that vector.
801 if (rx_queue > IGB_N0_QUEUE)
802 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
803 if (tx_queue > IGB_N0_QUEUE)
804 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
805 if (!adapter->msix_entries && msix_vector == 0)
806 msixbm |= E1000_EIMS_OTHER;
807 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
808 q_vector->eims_value = msixbm;
811 /* 82576 uses a table that essentially consists of 2 columns
812 * with 8 rows. The ordering is column-major so we use the
813 * lower 3 bits as the row index, and the 4th bit as the
816 if (rx_queue > IGB_N0_QUEUE)
817 igb_write_ivar(hw, msix_vector,
819 (rx_queue & 0x8) << 1);
820 if (tx_queue > IGB_N0_QUEUE)
821 igb_write_ivar(hw, msix_vector,
823 ((tx_queue & 0x8) << 1) + 8);
824 q_vector->eims_value = 1 << msix_vector;
831 /* On 82580 and newer adapters the scheme is similar to 82576
832 * however instead of ordering column-major we have things
833 * ordered row-major. So we traverse the table by using
834 * bit 0 as the column offset, and the remaining bits as the
837 if (rx_queue > IGB_N0_QUEUE)
838 igb_write_ivar(hw, msix_vector,
840 (rx_queue & 0x1) << 4);
841 if (tx_queue > IGB_N0_QUEUE)
842 igb_write_ivar(hw, msix_vector,
844 ((tx_queue & 0x1) << 4) + 8);
845 q_vector->eims_value = 1 << msix_vector;
852 /* add q_vector eims value to global eims_enable_mask */
853 adapter->eims_enable_mask |= q_vector->eims_value;
855 /* configure q_vector to set itr on first interrupt */
856 q_vector->set_itr = 1;
860 * igb_configure_msix - Configure MSI-X hardware
861 * @adapter: board private structure to initialize
863 * igb_configure_msix sets up the hardware to properly
864 * generate MSI-X interrupts.
866 static void igb_configure_msix(struct igb_adapter *adapter)
870 struct e1000_hw *hw = &adapter->hw;
872 adapter->eims_enable_mask = 0;
874 /* set vector for other causes, i.e. link changes */
875 switch (hw->mac.type) {
877 tmp = rd32(E1000_CTRL_EXT);
878 /* enable MSI-X PBA support*/
879 tmp |= E1000_CTRL_EXT_PBA_CLR;
881 /* Auto-Mask interrupts upon ICR read. */
882 tmp |= E1000_CTRL_EXT_EIAME;
883 tmp |= E1000_CTRL_EXT_IRCA;
885 wr32(E1000_CTRL_EXT, tmp);
887 /* enable msix_other interrupt */
888 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
889 adapter->eims_other = E1000_EIMS_OTHER;
899 /* Turn on MSI-X capability first, or our settings
900 * won't stick. And it will take days to debug.
902 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
903 E1000_GPIE_PBA | E1000_GPIE_EIAME |
906 /* enable msix_other interrupt */
907 adapter->eims_other = 1 << vector;
908 tmp = (vector++ | E1000_IVAR_VALID) << 8;
910 wr32(E1000_IVAR_MISC, tmp);
913 /* do nothing, since nothing else supports MSI-X */
915 } /* switch (hw->mac.type) */
917 adapter->eims_enable_mask |= adapter->eims_other;
919 for (i = 0; i < adapter->num_q_vectors; i++)
920 igb_assign_vector(adapter->q_vector[i], vector++);
926 * igb_request_msix - Initialize MSI-X interrupts
927 * @adapter: board private structure to initialize
929 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
932 static int igb_request_msix(struct igb_adapter *adapter)
934 struct net_device *netdev = adapter->netdev;
935 struct e1000_hw *hw = &adapter->hw;
936 int i, err = 0, vector = 0, free_vector = 0;
938 err = request_irq(adapter->msix_entries[vector].vector,
939 igb_msix_other, 0, netdev->name, adapter);
943 for (i = 0; i < adapter->num_q_vectors; i++) {
944 struct igb_q_vector *q_vector = adapter->q_vector[i];
948 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
950 if (q_vector->rx.ring && q_vector->tx.ring)
951 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
952 q_vector->rx.ring->queue_index);
953 else if (q_vector->tx.ring)
954 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
955 q_vector->tx.ring->queue_index);
956 else if (q_vector->rx.ring)
957 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
958 q_vector->rx.ring->queue_index);
960 sprintf(q_vector->name, "%s-unused", netdev->name);
962 err = request_irq(adapter->msix_entries[vector].vector,
963 igb_msix_ring, 0, q_vector->name,
969 igb_configure_msix(adapter);
973 /* free already assigned IRQs */
974 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
977 for (i = 0; i < vector; i++) {
978 free_irq(adapter->msix_entries[free_vector++].vector,
979 adapter->q_vector[i]);
985 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
987 if (adapter->msix_entries) {
988 pci_disable_msix(adapter->pdev);
989 kfree(adapter->msix_entries);
990 adapter->msix_entries = NULL;
991 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
992 pci_disable_msi(adapter->pdev);
997 * igb_free_q_vector - Free memory allocated for specific interrupt vector
998 * @adapter: board private structure to initialize
999 * @v_idx: Index of vector to be freed
1001 * This function frees the memory allocated to the q_vector. In addition if
1002 * NAPI is enabled it will delete any references to the NAPI struct prior
1003 * to freeing the q_vector.
1005 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009 if (q_vector->tx.ring)
1010 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1012 if (q_vector->rx.ring)
1013 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1015 adapter->q_vector[v_idx] = NULL;
1016 netif_napi_del(&q_vector->napi);
1018 /* igb_get_stats64() might access the rings on this vector,
1019 * we must wait a grace period before freeing it.
1021 kfree_rcu(q_vector, rcu);
1025 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1026 * @adapter: board private structure to initialize
1028 * This function frees the memory allocated to the q_vectors. In addition if
1029 * NAPI is enabled it will delete any references to the NAPI struct prior
1030 * to freeing the q_vector.
1032 static void igb_free_q_vectors(struct igb_adapter *adapter)
1034 int v_idx = adapter->num_q_vectors;
1036 adapter->num_tx_queues = 0;
1037 adapter->num_rx_queues = 0;
1038 adapter->num_q_vectors = 0;
1041 igb_free_q_vector(adapter, v_idx);
1045 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1046 * @adapter: board private structure to initialize
1048 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1049 * MSI-X interrupts allocated.
1051 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1053 igb_free_q_vectors(adapter);
1054 igb_reset_interrupt_capability(adapter);
1058 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1059 * @adapter: board private structure to initialize
1060 * @msix: boolean value of MSIX capability
1062 * Attempt to configure interrupts using the best available
1063 * capabilities of the hardware and kernel.
1065 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1073 /* Number of supported queues. */
1074 adapter->num_rx_queues = adapter->rss_queues;
1075 if (adapter->vfs_allocated_count)
1076 adapter->num_tx_queues = 1;
1078 adapter->num_tx_queues = adapter->rss_queues;
1080 /* start with one vector for every Rx queue */
1081 numvecs = adapter->num_rx_queues;
1083 /* if Tx handler is separate add 1 for every Tx queue */
1084 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1085 numvecs += adapter->num_tx_queues;
1087 /* store the number of vectors reserved for queues */
1088 adapter->num_q_vectors = numvecs;
1090 /* add 1 vector for link status interrupts */
1092 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1095 if (!adapter->msix_entries)
1098 for (i = 0; i < numvecs; i++)
1099 adapter->msix_entries[i].entry = i;
1101 err = pci_enable_msix(adapter->pdev,
1102 adapter->msix_entries,
1107 igb_reset_interrupt_capability(adapter);
1109 /* If we can't do MSI-X, try MSI */
1111 #ifdef CONFIG_PCI_IOV
1112 /* disable SR-IOV for non MSI-X configurations */
1113 if (adapter->vf_data) {
1114 struct e1000_hw *hw = &adapter->hw;
1115 /* disable iov and allow time for transactions to clear */
1116 pci_disable_sriov(adapter->pdev);
1119 kfree(adapter->vf_data);
1120 adapter->vf_data = NULL;
1121 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1124 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1127 adapter->vfs_allocated_count = 0;
1128 adapter->rss_queues = 1;
1129 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1130 adapter->num_rx_queues = 1;
1131 adapter->num_tx_queues = 1;
1132 adapter->num_q_vectors = 1;
1133 if (!pci_enable_msi(adapter->pdev))
1134 adapter->flags |= IGB_FLAG_HAS_MSI;
1137 static void igb_add_ring(struct igb_ring *ring,
1138 struct igb_ring_container *head)
1145 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1146 * @adapter: board private structure to initialize
1147 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1148 * @v_idx: index of vector in adapter struct
1149 * @txr_count: total number of Tx rings to allocate
1150 * @txr_idx: index of first Tx ring to allocate
1151 * @rxr_count: total number of Rx rings to allocate
1152 * @rxr_idx: index of first Rx ring to allocate
1154 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1156 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1157 int v_count, int v_idx,
1158 int txr_count, int txr_idx,
1159 int rxr_count, int rxr_idx)
1161 struct igb_q_vector *q_vector;
1162 struct igb_ring *ring;
1163 int ring_count, size;
1165 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1166 if (txr_count > 1 || rxr_count > 1)
1169 ring_count = txr_count + rxr_count;
1170 size = sizeof(struct igb_q_vector) +
1171 (sizeof(struct igb_ring) * ring_count);
1173 /* allocate q_vector and rings */
1174 q_vector = kzalloc(size, GFP_KERNEL);
1178 /* initialize NAPI */
1179 netif_napi_add(adapter->netdev, &q_vector->napi,
1182 /* tie q_vector and adapter together */
1183 adapter->q_vector[v_idx] = q_vector;
1184 q_vector->adapter = adapter;
1186 /* initialize work limits */
1187 q_vector->tx.work_limit = adapter->tx_work_limit;
1189 /* initialize ITR configuration */
1190 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1191 q_vector->itr_val = IGB_START_ITR;
1193 /* initialize pointer to rings */
1194 ring = q_vector->ring;
1198 /* rx or rx/tx vector */
1199 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1200 q_vector->itr_val = adapter->rx_itr_setting;
1202 /* tx only vector */
1203 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1204 q_vector->itr_val = adapter->tx_itr_setting;
1208 /* assign generic ring traits */
1209 ring->dev = &adapter->pdev->dev;
1210 ring->netdev = adapter->netdev;
1212 /* configure backlink on ring */
1213 ring->q_vector = q_vector;
1215 /* update q_vector Tx values */
1216 igb_add_ring(ring, &q_vector->tx);
1218 /* For 82575, context index must be unique per ring. */
1219 if (adapter->hw.mac.type == e1000_82575)
1220 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1222 /* apply Tx specific ring traits */
1223 ring->count = adapter->tx_ring_count;
1224 ring->queue_index = txr_idx;
1226 /* assign ring to adapter */
1227 adapter->tx_ring[txr_idx] = ring;
1229 /* push pointer to next ring */
1234 /* assign generic ring traits */
1235 ring->dev = &adapter->pdev->dev;
1236 ring->netdev = adapter->netdev;
1238 /* configure backlink on ring */
1239 ring->q_vector = q_vector;
1241 /* update q_vector Rx values */
1242 igb_add_ring(ring, &q_vector->rx);
1244 /* set flag indicating ring supports SCTP checksum offload */
1245 if (adapter->hw.mac.type >= e1000_82576)
1246 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1249 * On i350, i354, i210, and i211, loopback VLAN packets
1250 * have the tag byte-swapped.
1252 if (adapter->hw.mac.type >= e1000_i350)
1253 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1255 /* apply Rx specific ring traits */
1256 ring->count = adapter->rx_ring_count;
1257 ring->queue_index = rxr_idx;
1259 /* assign ring to adapter */
1260 adapter->rx_ring[rxr_idx] = ring;
1268 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1269 * @adapter: board private structure to initialize
1271 * We allocate one q_vector per queue interrupt. If allocation fails we
1274 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1276 int q_vectors = adapter->num_q_vectors;
1277 int rxr_remaining = adapter->num_rx_queues;
1278 int txr_remaining = adapter->num_tx_queues;
1279 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1282 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1283 for (; rxr_remaining; v_idx++) {
1284 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1290 /* update counts and index */
1296 for (; v_idx < q_vectors; v_idx++) {
1297 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1298 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1299 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1300 tqpv, txr_idx, rqpv, rxr_idx);
1305 /* update counts and index */
1306 rxr_remaining -= rqpv;
1307 txr_remaining -= tqpv;
1315 adapter->num_tx_queues = 0;
1316 adapter->num_rx_queues = 0;
1317 adapter->num_q_vectors = 0;
1320 igb_free_q_vector(adapter, v_idx);
1326 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1327 * @adapter: board private structure to initialize
1328 * @msix: boolean value of MSIX capability
1330 * This function initializes the interrupts and allocates all of the queues.
1332 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1334 struct pci_dev *pdev = adapter->pdev;
1337 igb_set_interrupt_capability(adapter, msix);
1339 err = igb_alloc_q_vectors(adapter);
1341 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1342 goto err_alloc_q_vectors;
1345 igb_cache_ring_register(adapter);
1349 err_alloc_q_vectors:
1350 igb_reset_interrupt_capability(adapter);
1355 * igb_request_irq - initialize interrupts
1356 * @adapter: board private structure to initialize
1358 * Attempts to configure interrupts using the best available
1359 * capabilities of the hardware and kernel.
1361 static int igb_request_irq(struct igb_adapter *adapter)
1363 struct net_device *netdev = adapter->netdev;
1364 struct pci_dev *pdev = adapter->pdev;
1367 if (adapter->msix_entries) {
1368 err = igb_request_msix(adapter);
1371 /* fall back to MSI */
1372 igb_free_all_tx_resources(adapter);
1373 igb_free_all_rx_resources(adapter);
1375 igb_clear_interrupt_scheme(adapter);
1376 err = igb_init_interrupt_scheme(adapter, false);
1380 igb_setup_all_tx_resources(adapter);
1381 igb_setup_all_rx_resources(adapter);
1382 igb_configure(adapter);
1385 igb_assign_vector(adapter->q_vector[0], 0);
1387 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1388 err = request_irq(pdev->irq, igb_intr_msi, 0,
1389 netdev->name, adapter);
1393 /* fall back to legacy interrupts */
1394 igb_reset_interrupt_capability(adapter);
1395 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1398 err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1399 netdev->name, adapter);
1402 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1409 static void igb_free_irq(struct igb_adapter *adapter)
1411 if (adapter->msix_entries) {
1414 free_irq(adapter->msix_entries[vector++].vector, adapter);
1416 for (i = 0; i < adapter->num_q_vectors; i++)
1417 free_irq(adapter->msix_entries[vector++].vector,
1418 adapter->q_vector[i]);
1420 free_irq(adapter->pdev->irq, adapter);
1425 * igb_irq_disable - Mask off interrupt generation on the NIC
1426 * @adapter: board private structure
1428 static void igb_irq_disable(struct igb_adapter *adapter)
1430 struct e1000_hw *hw = &adapter->hw;
1432 /* we need to be careful when disabling interrupts. The VFs are also
1433 * mapped into these registers and so clearing the bits can cause
1434 * issues on the VF drivers so we only need to clear what we set
1436 if (adapter->msix_entries) {
1437 u32 regval = rd32(E1000_EIAM);
1438 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1439 wr32(E1000_EIMC, adapter->eims_enable_mask);
1440 regval = rd32(E1000_EIAC);
1441 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1445 wr32(E1000_IMC, ~0);
1447 if (adapter->msix_entries) {
1449 for (i = 0; i < adapter->num_q_vectors; i++)
1450 synchronize_irq(adapter->msix_entries[i].vector);
1452 synchronize_irq(adapter->pdev->irq);
1457 * igb_irq_enable - Enable default interrupt generation settings
1458 * @adapter: board private structure
1460 static void igb_irq_enable(struct igb_adapter *adapter)
1462 struct e1000_hw *hw = &adapter->hw;
1464 if (adapter->msix_entries) {
1465 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1466 u32 regval = rd32(E1000_EIAC);
1467 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1468 regval = rd32(E1000_EIAM);
1469 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1470 wr32(E1000_EIMS, adapter->eims_enable_mask);
1471 if (adapter->vfs_allocated_count) {
1472 wr32(E1000_MBVFIMR, 0xFF);
1473 ims |= E1000_IMS_VMMB;
1475 wr32(E1000_IMS, ims);
1477 wr32(E1000_IMS, IMS_ENABLE_MASK |
1479 wr32(E1000_IAM, IMS_ENABLE_MASK |
1484 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1486 struct e1000_hw *hw = &adapter->hw;
1487 u16 vid = adapter->hw.mng_cookie.vlan_id;
1488 u16 old_vid = adapter->mng_vlan_id;
1490 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1491 /* add VID to filter table */
1492 igb_vfta_set(hw, vid, true);
1493 adapter->mng_vlan_id = vid;
1495 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1498 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1500 !test_bit(old_vid, adapter->active_vlans)) {
1501 /* remove VID from filter table */
1502 igb_vfta_set(hw, old_vid, false);
1507 * igb_release_hw_control - release control of the h/w to f/w
1508 * @adapter: address of board private structure
1510 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1511 * For ASF and Pass Through versions of f/w this means that the
1512 * driver is no longer loaded.
1514 static void igb_release_hw_control(struct igb_adapter *adapter)
1516 struct e1000_hw *hw = &adapter->hw;
1519 /* Let firmware take over control of h/w */
1520 ctrl_ext = rd32(E1000_CTRL_EXT);
1521 wr32(E1000_CTRL_EXT,
1522 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1526 * igb_get_hw_control - get control of the h/w from f/w
1527 * @adapter: address of board private structure
1529 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1530 * For ASF and Pass Through versions of f/w this means that
1531 * the driver is loaded.
1533 static void igb_get_hw_control(struct igb_adapter *adapter)
1535 struct e1000_hw *hw = &adapter->hw;
1538 /* Let firmware know the driver has taken over */
1539 ctrl_ext = rd32(E1000_CTRL_EXT);
1540 wr32(E1000_CTRL_EXT,
1541 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1545 * igb_configure - configure the hardware for RX and TX
1546 * @adapter: private board structure
1548 static void igb_configure(struct igb_adapter *adapter)
1550 struct net_device *netdev = adapter->netdev;
1553 igb_get_hw_control(adapter);
1554 igb_set_rx_mode(netdev);
1556 igb_restore_vlan(adapter);
1558 igb_setup_tctl(adapter);
1559 igb_setup_mrqc(adapter);
1560 igb_setup_rctl(adapter);
1562 igb_configure_tx(adapter);
1563 igb_configure_rx(adapter);
1565 igb_rx_fifo_flush_82575(&adapter->hw);
1567 /* call igb_desc_unused which always leaves
1568 * at least 1 descriptor unused to make sure
1569 * next_to_use != next_to_clean
1571 for (i = 0; i < adapter->num_rx_queues; i++) {
1572 struct igb_ring *ring = adapter->rx_ring[i];
1573 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1578 * igb_power_up_link - Power up the phy/serdes link
1579 * @adapter: address of board private structure
1581 void igb_power_up_link(struct igb_adapter *adapter)
1583 igb_reset_phy(&adapter->hw);
1585 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1586 igb_power_up_phy_copper(&adapter->hw);
1588 igb_power_up_serdes_link_82575(&adapter->hw);
1592 * igb_power_down_link - Power down the phy/serdes link
1593 * @adapter: address of board private structure
1595 static void igb_power_down_link(struct igb_adapter *adapter)
1597 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1598 igb_power_down_phy_copper_82575(&adapter->hw);
1600 igb_shutdown_serdes_link_82575(&adapter->hw);
1604 * igb_up - Open the interface and prepare it to handle traffic
1605 * @adapter: board private structure
1607 int igb_up(struct igb_adapter *adapter)
1609 struct e1000_hw *hw = &adapter->hw;
1612 /* hardware has been reset, we need to reload some things */
1613 igb_configure(adapter);
1615 clear_bit(__IGB_DOWN, &adapter->state);
1617 for (i = 0; i < adapter->num_q_vectors; i++)
1618 napi_enable(&(adapter->q_vector[i]->napi));
1620 if (adapter->msix_entries)
1621 igb_configure_msix(adapter);
1623 igb_assign_vector(adapter->q_vector[0], 0);
1625 /* Clear any pending interrupts. */
1627 igb_irq_enable(adapter);
1629 /* notify VFs that reset has been completed */
1630 if (adapter->vfs_allocated_count) {
1631 u32 reg_data = rd32(E1000_CTRL_EXT);
1632 reg_data |= E1000_CTRL_EXT_PFRSTD;
1633 wr32(E1000_CTRL_EXT, reg_data);
1636 netif_tx_start_all_queues(adapter->netdev);
1638 /* start the watchdog. */
1639 hw->mac.get_link_status = 1;
1640 schedule_work(&adapter->watchdog_task);
1645 void igb_down(struct igb_adapter *adapter)
1647 struct net_device *netdev = adapter->netdev;
1648 struct e1000_hw *hw = &adapter->hw;
1652 /* signal that we're down so the interrupt handler does not
1653 * reschedule our watchdog timer
1655 set_bit(__IGB_DOWN, &adapter->state);
1657 /* disable receives in the hardware */
1658 rctl = rd32(E1000_RCTL);
1659 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1660 /* flush and sleep below */
1662 netif_tx_stop_all_queues(netdev);
1664 /* disable transmits in the hardware */
1665 tctl = rd32(E1000_TCTL);
1666 tctl &= ~E1000_TCTL_EN;
1667 wr32(E1000_TCTL, tctl);
1668 /* flush both disables and wait for them to finish */
1672 igb_irq_disable(adapter);
1674 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1676 for (i = 0; i < adapter->num_q_vectors; i++) {
1677 napi_synchronize(&(adapter->q_vector[i]->napi));
1678 napi_disable(&(adapter->q_vector[i]->napi));
1682 del_timer_sync(&adapter->watchdog_timer);
1683 del_timer_sync(&adapter->phy_info_timer);
1685 netif_carrier_off(netdev);
1687 /* record the stats before reset*/
1688 spin_lock(&adapter->stats64_lock);
1689 igb_update_stats(adapter, &adapter->stats64);
1690 spin_unlock(&adapter->stats64_lock);
1692 adapter->link_speed = 0;
1693 adapter->link_duplex = 0;
1695 if (!pci_channel_offline(adapter->pdev))
1697 igb_clean_all_tx_rings(adapter);
1698 igb_clean_all_rx_rings(adapter);
1699 #ifdef CONFIG_IGB_DCA
1701 /* since we reset the hardware DCA settings were cleared */
1702 igb_setup_dca(adapter);
1706 void igb_reinit_locked(struct igb_adapter *adapter)
1708 WARN_ON(in_interrupt());
1709 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1713 clear_bit(__IGB_RESETTING, &adapter->state);
1716 void igb_reset(struct igb_adapter *adapter)
1718 struct pci_dev *pdev = adapter->pdev;
1719 struct e1000_hw *hw = &adapter->hw;
1720 struct e1000_mac_info *mac = &hw->mac;
1721 struct e1000_fc_info *fc = &hw->fc;
1722 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1724 /* Repartition Pba for greater than 9k mtu
1725 * To take effect CTRL.RST is required.
1727 switch (mac->type) {
1731 pba = rd32(E1000_RXPBS);
1732 pba = igb_rxpbs_adjust_82580(pba);
1735 pba = rd32(E1000_RXPBS);
1736 pba &= E1000_RXPBS_SIZE_MASK_82576;
1742 pba = E1000_PBA_34K;
1746 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1747 (mac->type < e1000_82576)) {
1748 /* adjust PBA for jumbo frames */
1749 wr32(E1000_PBA, pba);
1751 /* To maintain wire speed transmits, the Tx FIFO should be
1752 * large enough to accommodate two full transmit packets,
1753 * rounded up to the next 1KB and expressed in KB. Likewise,
1754 * the Rx FIFO should be large enough to accommodate at least
1755 * one full receive packet and is similarly rounded up and
1758 pba = rd32(E1000_PBA);
1759 /* upper 16 bits has Tx packet buffer allocation size in KB */
1760 tx_space = pba >> 16;
1761 /* lower 16 bits has Rx packet buffer allocation size in KB */
1763 /* the Tx fifo also stores 16 bytes of information about the Tx
1764 * but don't include ethernet FCS because hardware appends it
1766 min_tx_space = (adapter->max_frame_size +
1767 sizeof(union e1000_adv_tx_desc) -
1769 min_tx_space = ALIGN(min_tx_space, 1024);
1770 min_tx_space >>= 10;
1771 /* software strips receive CRC, so leave room for it */
1772 min_rx_space = adapter->max_frame_size;
1773 min_rx_space = ALIGN(min_rx_space, 1024);
1774 min_rx_space >>= 10;
1776 /* If current Tx allocation is less than the min Tx FIFO size,
1777 * and the min Tx FIFO size is less than the current Rx FIFO
1778 * allocation, take space away from current Rx allocation
1780 if (tx_space < min_tx_space &&
1781 ((min_tx_space - tx_space) < pba)) {
1782 pba = pba - (min_tx_space - tx_space);
1784 /* if short on Rx space, Rx wins and must trump Tx
1787 if (pba < min_rx_space)
1790 wr32(E1000_PBA, pba);
1793 /* flow control settings */
1794 /* The high water mark must be low enough to fit one full frame
1795 * (or the size used for early receive) above it in the Rx FIFO.
1796 * Set it to the lower of:
1797 * - 90% of the Rx FIFO size, or
1798 * - the full Rx FIFO size minus one full frame
1800 hwm = min(((pba << 10) * 9 / 10),
1801 ((pba << 10) - 2 * adapter->max_frame_size));
1803 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1804 fc->low_water = fc->high_water - 16;
1805 fc->pause_time = 0xFFFF;
1807 fc->current_mode = fc->requested_mode;
1809 /* disable receive for all VFs and wait one second */
1810 if (adapter->vfs_allocated_count) {
1812 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1813 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1815 /* ping all the active vfs to let them know we are going down */
1816 igb_ping_all_vfs(adapter);
1818 /* disable transmits and receives */
1819 wr32(E1000_VFRE, 0);
1820 wr32(E1000_VFTE, 0);
1823 /* Allow time for pending master requests to run */
1824 hw->mac.ops.reset_hw(hw);
1827 if (hw->mac.ops.init_hw(hw))
1828 dev_err(&pdev->dev, "Hardware Error\n");
1830 /* Flow control settings reset on hardware reset, so guarantee flow
1831 * control is off when forcing speed.
1833 if (!hw->mac.autoneg)
1834 igb_force_mac_fc(hw);
1836 igb_init_dmac(adapter, pba);
1837 #ifdef CONFIG_IGB_HWMON
1838 /* Re-initialize the thermal sensor on i350 devices. */
1839 if (!test_bit(__IGB_DOWN, &adapter->state)) {
1840 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1841 /* If present, re-initialize the external thermal sensor
1845 mac->ops.init_thermal_sensor_thresh(hw);
1849 if (!netif_running(adapter->netdev))
1850 igb_power_down_link(adapter);
1852 igb_update_mng_vlan(adapter);
1854 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1855 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1857 /* Re-enable PTP, where applicable. */
1858 igb_ptp_reset(adapter);
1860 igb_get_phy_info(hw);
1863 static netdev_features_t igb_fix_features(struct net_device *netdev,
1864 netdev_features_t features)
1866 /* Since there is no support for separate Rx/Tx vlan accel
1867 * enable/disable make sure Tx flag is always in same state as Rx.
1869 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1870 features |= NETIF_F_HW_VLAN_CTAG_TX;
1872 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
1877 static int igb_set_features(struct net_device *netdev,
1878 netdev_features_t features)
1880 netdev_features_t changed = netdev->features ^ features;
1881 struct igb_adapter *adapter = netdev_priv(netdev);
1883 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1884 igb_vlan_mode(netdev, features);
1886 if (!(changed & NETIF_F_RXALL))
1889 netdev->features = features;
1891 if (netif_running(netdev))
1892 igb_reinit_locked(adapter);
1899 static const struct net_device_ops igb_netdev_ops = {
1900 .ndo_open = igb_open,
1901 .ndo_stop = igb_close,
1902 .ndo_start_xmit = igb_xmit_frame,
1903 .ndo_get_stats64 = igb_get_stats64,
1904 .ndo_set_rx_mode = igb_set_rx_mode,
1905 .ndo_set_mac_address = igb_set_mac,
1906 .ndo_change_mtu = igb_change_mtu,
1907 .ndo_do_ioctl = igb_ioctl,
1908 .ndo_tx_timeout = igb_tx_timeout,
1909 .ndo_validate_addr = eth_validate_addr,
1910 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1911 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
1912 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
1913 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
1914 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
1915 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
1916 .ndo_get_vf_config = igb_ndo_get_vf_config,
1917 #ifdef CONFIG_NET_POLL_CONTROLLER
1918 .ndo_poll_controller = igb_netpoll,
1920 .ndo_fix_features = igb_fix_features,
1921 .ndo_set_features = igb_set_features,
1925 * igb_set_fw_version - Configure version string for ethtool
1926 * @adapter: adapter struct
1928 void igb_set_fw_version(struct igb_adapter *adapter)
1930 struct e1000_hw *hw = &adapter->hw;
1931 struct e1000_fw_version fw;
1933 igb_get_fw_version(hw, &fw);
1935 switch (hw->mac.type) {
1938 if (!(igb_get_flash_presence_i210(hw))) {
1939 snprintf(adapter->fw_version,
1940 sizeof(adapter->fw_version),
1942 fw.invm_major, fw.invm_minor,
1948 /* if option is rom valid, display its version too */
1950 snprintf(adapter->fw_version,
1951 sizeof(adapter->fw_version),
1952 "%d.%d, 0x%08x, %d.%d.%d",
1953 fw.eep_major, fw.eep_minor, fw.etrack_id,
1954 fw.or_major, fw.or_build, fw.or_patch);
1956 } else if (fw.etrack_id != 0X0000) {
1957 snprintf(adapter->fw_version,
1958 sizeof(adapter->fw_version),
1960 fw.eep_major, fw.eep_minor, fw.etrack_id);
1962 snprintf(adapter->fw_version,
1963 sizeof(adapter->fw_version),
1965 fw.eep_major, fw.eep_minor, fw.eep_build);
1973 * igb_init_i2c - Init I2C interface
1974 * @adapter: pointer to adapter structure
1976 static s32 igb_init_i2c(struct igb_adapter *adapter)
1978 s32 status = E1000_SUCCESS;
1980 /* I2C interface supported on i350 devices */
1981 if (adapter->hw.mac.type != e1000_i350)
1982 return E1000_SUCCESS;
1984 /* Initialize the i2c bus which is controlled by the registers.
1985 * This bus will use the i2c_algo_bit structue that implements
1986 * the protocol through toggling of the 4 bits in the register.
1988 adapter->i2c_adap.owner = THIS_MODULE;
1989 adapter->i2c_algo = igb_i2c_algo;
1990 adapter->i2c_algo.data = adapter;
1991 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1992 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1993 strlcpy(adapter->i2c_adap.name, "igb BB",
1994 sizeof(adapter->i2c_adap.name));
1995 status = i2c_bit_add_bus(&adapter->i2c_adap);
2000 * igb_probe - Device Initialization Routine
2001 * @pdev: PCI device information struct
2002 * @ent: entry in igb_pci_tbl
2004 * Returns 0 on success, negative on failure
2006 * igb_probe initializes an adapter identified by a pci_dev structure.
2007 * The OS initialization, configuring of the adapter private structure,
2008 * and a hardware reset occur.
2010 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2012 struct net_device *netdev;
2013 struct igb_adapter *adapter;
2014 struct e1000_hw *hw;
2015 u16 eeprom_data = 0;
2017 static int global_quad_port_a; /* global quad port a indication */
2018 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2019 unsigned long mmio_start, mmio_len;
2020 int err, pci_using_dac;
2021 u8 part_str[E1000_PBANUM_LENGTH];
2023 /* Catch broken hardware that put the wrong VF device ID in
2024 * the PCIe SR-IOV capability.
2026 if (pdev->is_virtfn) {
2027 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2028 pci_name(pdev), pdev->vendor, pdev->device);
2032 err = pci_enable_device_mem(pdev);
2037 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2041 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2044 "No usable DMA configuration, aborting\n");
2049 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2055 pci_enable_pcie_error_reporting(pdev);
2057 pci_set_master(pdev);
2058 pci_save_state(pdev);
2061 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2064 goto err_alloc_etherdev;
2066 SET_NETDEV_DEV(netdev, &pdev->dev);
2068 pci_set_drvdata(pdev, netdev);
2069 adapter = netdev_priv(netdev);
2070 adapter->netdev = netdev;
2071 adapter->pdev = pdev;
2074 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2076 mmio_start = pci_resource_start(pdev, 0);
2077 mmio_len = pci_resource_len(pdev, 0);
2080 hw->hw_addr = ioremap(mmio_start, mmio_len);
2084 netdev->netdev_ops = &igb_netdev_ops;
2085 igb_set_ethtool_ops(netdev);
2086 netdev->watchdog_timeo = 5 * HZ;
2088 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2090 netdev->mem_start = mmio_start;
2091 netdev->mem_end = mmio_start + mmio_len;
2093 /* PCI config space info */
2094 hw->vendor_id = pdev->vendor;
2095 hw->device_id = pdev->device;
2096 hw->revision_id = pdev->revision;
2097 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2098 hw->subsystem_device_id = pdev->subsystem_device;
2100 /* Copy the default MAC, PHY and NVM function pointers */
2101 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2102 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2103 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2104 /* Initialize skew-specific constants */
2105 err = ei->get_invariants(hw);
2109 /* setup the private structure */
2110 err = igb_sw_init(adapter);
2114 igb_get_bus_info_pcie(hw);
2116 hw->phy.autoneg_wait_to_complete = false;
2118 /* Copper options */
2119 if (hw->phy.media_type == e1000_media_type_copper) {
2120 hw->phy.mdix = AUTO_ALL_MODES;
2121 hw->phy.disable_polarity_correction = false;
2122 hw->phy.ms_type = e1000_ms_hw_default;
2125 if (igb_check_reset_block(hw))
2126 dev_info(&pdev->dev,
2127 "PHY reset is blocked due to SOL/IDER session.\n");
2129 /* features is initialized to 0 in allocation, it might have bits
2130 * set by igb_sw_init so we should use an or instead of an
2133 netdev->features |= NETIF_F_SG |
2140 NETIF_F_HW_VLAN_CTAG_RX |
2141 NETIF_F_HW_VLAN_CTAG_TX;
2143 /* copy netdev features into list of user selectable features */
2144 netdev->hw_features |= netdev->features;
2145 netdev->hw_features |= NETIF_F_RXALL;
2147 /* set this bit last since it cannot be part of hw_features */
2148 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2150 netdev->vlan_features |= NETIF_F_TSO |
2156 netdev->priv_flags |= IFF_SUPP_NOFCS;
2158 if (pci_using_dac) {
2159 netdev->features |= NETIF_F_HIGHDMA;
2160 netdev->vlan_features |= NETIF_F_HIGHDMA;
2163 if (hw->mac.type >= e1000_82576) {
2164 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2165 netdev->features |= NETIF_F_SCTP_CSUM;
2168 netdev->priv_flags |= IFF_UNICAST_FLT;
2170 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2172 /* before reading the NVM, reset the controller to put the device in a
2173 * known good starting state
2175 hw->mac.ops.reset_hw(hw);
2177 /* make sure the NVM is good , i211/i210 parts can have special NVM
2178 * that doesn't contain a checksum
2180 switch (hw->mac.type) {
2183 if (igb_get_flash_presence_i210(hw)) {
2184 if (hw->nvm.ops.validate(hw) < 0) {
2186 "The NVM Checksum Is Not Valid\n");
2193 if (hw->nvm.ops.validate(hw) < 0) {
2194 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2201 /* copy the MAC address out of the NVM */
2202 if (hw->mac.ops.read_mac_addr(hw))
2203 dev_err(&pdev->dev, "NVM Read Error\n");
2205 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2207 if (!is_valid_ether_addr(netdev->dev_addr)) {
2208 dev_err(&pdev->dev, "Invalid MAC Address\n");
2213 /* get firmware version for ethtool -i */
2214 igb_set_fw_version(adapter);
2216 setup_timer(&adapter->watchdog_timer, igb_watchdog,
2217 (unsigned long) adapter);
2218 setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2219 (unsigned long) adapter);
2221 INIT_WORK(&adapter->reset_task, igb_reset_task);
2222 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2224 /* Initialize link properties that are user-changeable */
2225 adapter->fc_autoneg = true;
2226 hw->mac.autoneg = true;
2227 hw->phy.autoneg_advertised = 0x2f;
2229 hw->fc.requested_mode = e1000_fc_default;
2230 hw->fc.current_mode = e1000_fc_default;
2232 igb_validate_mdi_setting(hw);
2234 /* By default, support wake on port A */
2235 if (hw->bus.func == 0)
2236 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2238 /* Check the NVM for wake support on non-port A ports */
2239 if (hw->mac.type >= e1000_82580)
2240 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2241 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2243 else if (hw->bus.func == 1)
2244 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2246 if (eeprom_data & IGB_EEPROM_APME)
2247 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2249 /* now that we have the eeprom settings, apply the special cases where
2250 * the eeprom may be wrong or the board simply won't support wake on
2251 * lan on a particular port
2253 switch (pdev->device) {
2254 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2255 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2257 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2258 case E1000_DEV_ID_82576_FIBER:
2259 case E1000_DEV_ID_82576_SERDES:
2260 /* Wake events only supported on port A for dual fiber
2261 * regardless of eeprom setting
2263 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2264 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2266 case E1000_DEV_ID_82576_QUAD_COPPER:
2267 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2268 /* if quad port adapter, disable WoL on all but port A */
2269 if (global_quad_port_a != 0)
2270 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2272 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2273 /* Reset for multiple quad port adapters */
2274 if (++global_quad_port_a == 4)
2275 global_quad_port_a = 0;
2278 /* If the device can't wake, don't set software support */
2279 if (!device_can_wakeup(&adapter->pdev->dev))
2280 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2283 /* initialize the wol settings based on the eeprom settings */
2284 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2285 adapter->wol |= E1000_WUFC_MAG;
2287 /* Some vendors want WoL disabled by default, but still supported */
2288 if ((hw->mac.type == e1000_i350) &&
2289 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2290 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2294 device_set_wakeup_enable(&adapter->pdev->dev,
2295 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2297 /* reset the hardware with the new settings */
2300 /* Init the I2C interface */
2301 err = igb_init_i2c(adapter);
2303 dev_err(&pdev->dev, "failed to init i2c interface\n");
2307 /* let the f/w know that the h/w is now under the control of the
2309 igb_get_hw_control(adapter);
2311 strcpy(netdev->name, "eth%d");
2312 err = register_netdev(netdev);
2316 /* carrier off reporting is important to ethtool even BEFORE open */
2317 netif_carrier_off(netdev);
2319 #ifdef CONFIG_IGB_DCA
2320 if (dca_add_requester(&pdev->dev) == 0) {
2321 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2322 dev_info(&pdev->dev, "DCA enabled\n");
2323 igb_setup_dca(adapter);
2327 #ifdef CONFIG_IGB_HWMON
2328 /* Initialize the thermal sensor on i350 devices. */
2329 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2332 /* Read the NVM to determine if this i350 device supports an
2333 * external thermal sensor.
2335 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2336 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2337 adapter->ets = true;
2339 adapter->ets = false;
2340 if (igb_sysfs_init(adapter))
2342 "failed to allocate sysfs resources\n");
2344 adapter->ets = false;
2347 /* do hw tstamp init after resetting */
2348 igb_ptp_init(adapter);
2350 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2351 /* print bus type/speed/width info, not applicable to i354 */
2352 if (hw->mac.type != e1000_i354) {
2353 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2355 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2356 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2358 ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2360 (hw->bus.width == e1000_bus_width_pcie_x2) ?
2362 (hw->bus.width == e1000_bus_width_pcie_x1) ?
2363 "Width x1" : "unknown"), netdev->dev_addr);
2366 if ((hw->mac.type >= e1000_i210 ||
2367 igb_get_flash_presence_i210(hw))) {
2368 ret_val = igb_read_part_string(hw, part_str,
2369 E1000_PBANUM_LENGTH);
2371 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2375 strcpy(part_str, "Unknown");
2376 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2377 dev_info(&pdev->dev,
2378 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2379 adapter->msix_entries ? "MSI-X" :
2380 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2381 adapter->num_rx_queues, adapter->num_tx_queues);
2382 switch (hw->mac.type) {
2386 igb_set_eee_i350(hw);
2389 if (hw->phy.media_type == e1000_media_type_copper) {
2390 if ((rd32(E1000_CTRL_EXT) &
2391 E1000_CTRL_EXT_LINK_MODE_SGMII))
2392 igb_set_eee_i354(hw);
2399 pm_runtime_put_noidle(&pdev->dev);
2403 igb_release_hw_control(adapter);
2404 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2406 if (!igb_check_reset_block(hw))
2409 if (hw->flash_address)
2410 iounmap(hw->flash_address);
2412 igb_clear_interrupt_scheme(adapter);
2413 iounmap(hw->hw_addr);
2415 free_netdev(netdev);
2417 pci_release_selected_regions(pdev,
2418 pci_select_bars(pdev, IORESOURCE_MEM));
2421 pci_disable_device(pdev);
2425 #ifdef CONFIG_PCI_IOV
2426 static int igb_disable_sriov(struct pci_dev *pdev)
2428 struct net_device *netdev = pci_get_drvdata(pdev);
2429 struct igb_adapter *adapter = netdev_priv(netdev);
2430 struct e1000_hw *hw = &adapter->hw;
2432 /* reclaim resources allocated to VFs */
2433 if (adapter->vf_data) {
2434 /* disable iov and allow time for transactions to clear */
2435 if (pci_vfs_assigned(pdev)) {
2436 dev_warn(&pdev->dev,
2437 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2440 pci_disable_sriov(pdev);
2444 kfree(adapter->vf_data);
2445 adapter->vf_data = NULL;
2446 adapter->vfs_allocated_count = 0;
2447 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2450 dev_info(&pdev->dev, "IOV Disabled\n");
2452 /* Re-enable DMA Coalescing flag since IOV is turned off */
2453 adapter->flags |= IGB_FLAG_DMAC;
2459 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2461 struct net_device *netdev = pci_get_drvdata(pdev);
2462 struct igb_adapter *adapter = netdev_priv(netdev);
2463 int old_vfs = pci_num_vf(pdev);
2467 if (!adapter->msix_entries) {
2474 else if (old_vfs && old_vfs == num_vfs)
2476 else if (old_vfs && old_vfs != num_vfs)
2477 err = igb_disable_sriov(pdev);
2487 adapter->vfs_allocated_count = num_vfs;
2489 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2490 sizeof(struct vf_data_storage), GFP_KERNEL);
2492 /* if allocation failed then we do not support SR-IOV */
2493 if (!adapter->vf_data) {
2494 adapter->vfs_allocated_count = 0;
2496 "Unable to allocate memory for VF Data Storage\n");
2501 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2505 dev_info(&pdev->dev, "%d VFs allocated\n",
2506 adapter->vfs_allocated_count);
2507 for (i = 0; i < adapter->vfs_allocated_count; i++)
2508 igb_vf_configure(adapter, i);
2510 /* DMA Coalescing is not supported in IOV mode. */
2511 adapter->flags &= ~IGB_FLAG_DMAC;
2515 kfree(adapter->vf_data);
2516 adapter->vf_data = NULL;
2517 adapter->vfs_allocated_count = 0;
2524 * igb_remove_i2c - Cleanup I2C interface
2525 * @adapter: pointer to adapter structure
2527 static void igb_remove_i2c(struct igb_adapter *adapter)
2529 /* free the adapter bus structure */
2530 i2c_del_adapter(&adapter->i2c_adap);
2534 * igb_remove - Device Removal Routine
2535 * @pdev: PCI device information struct
2537 * igb_remove is called by the PCI subsystem to alert the driver
2538 * that it should release a PCI device. The could be caused by a
2539 * Hot-Plug event, or because the driver is going to be removed from
2542 static void igb_remove(struct pci_dev *pdev)
2544 struct net_device *netdev = pci_get_drvdata(pdev);
2545 struct igb_adapter *adapter = netdev_priv(netdev);
2546 struct e1000_hw *hw = &adapter->hw;
2548 pm_runtime_get_noresume(&pdev->dev);
2549 #ifdef CONFIG_IGB_HWMON
2550 igb_sysfs_exit(adapter);
2552 igb_remove_i2c(adapter);
2553 igb_ptp_stop(adapter);
2554 /* The watchdog timer may be rescheduled, so explicitly
2555 * disable watchdog from being rescheduled.
2557 set_bit(__IGB_DOWN, &adapter->state);
2558 del_timer_sync(&adapter->watchdog_timer);
2559 del_timer_sync(&adapter->phy_info_timer);
2561 cancel_work_sync(&adapter->reset_task);
2562 cancel_work_sync(&adapter->watchdog_task);
2564 #ifdef CONFIG_IGB_DCA
2565 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2566 dev_info(&pdev->dev, "DCA disabled\n");
2567 dca_remove_requester(&pdev->dev);
2568 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2569 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2573 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2574 * would have already happened in close and is redundant.
2576 igb_release_hw_control(adapter);
2578 unregister_netdev(netdev);
2580 igb_clear_interrupt_scheme(adapter);
2582 #ifdef CONFIG_PCI_IOV
2583 igb_disable_sriov(pdev);
2586 iounmap(hw->hw_addr);
2587 if (hw->flash_address)
2588 iounmap(hw->flash_address);
2589 pci_release_selected_regions(pdev,
2590 pci_select_bars(pdev, IORESOURCE_MEM));
2592 kfree(adapter->shadow_vfta);
2593 free_netdev(netdev);
2595 pci_disable_pcie_error_reporting(pdev);
2597 pci_disable_device(pdev);
2601 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2602 * @adapter: board private structure to initialize
2604 * This function initializes the vf specific data storage and then attempts to
2605 * allocate the VFs. The reason for ordering it this way is because it is much
2606 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2607 * the memory for the VFs.
2609 static void igb_probe_vfs(struct igb_adapter *adapter)
2611 #ifdef CONFIG_PCI_IOV
2612 struct pci_dev *pdev = adapter->pdev;
2613 struct e1000_hw *hw = &adapter->hw;
2615 /* Virtualization features not supported on i210 family. */
2616 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2619 pci_sriov_set_totalvfs(pdev, 7);
2620 igb_enable_sriov(pdev, max_vfs);
2622 #endif /* CONFIG_PCI_IOV */
2625 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2627 struct e1000_hw *hw = &adapter->hw;
2630 /* Determine the maximum number of RSS queues supported. */
2631 switch (hw->mac.type) {
2633 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2637 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2640 /* I350 cannot do RSS and SR-IOV at the same time */
2641 if (!!adapter->vfs_allocated_count) {
2647 if (!!adapter->vfs_allocated_count) {
2655 max_rss_queues = IGB_MAX_RX_QUEUES;
2659 adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2661 /* Determine if we need to pair queues. */
2662 switch (hw->mac.type) {
2665 /* Device supports enough interrupts without queue pairing. */
2668 /* If VFs are going to be allocated with RSS queues then we
2669 * should pair the queues in order to conserve interrupts due
2670 * to limited supply.
2672 if ((adapter->rss_queues > 1) &&
2673 (adapter->vfs_allocated_count > 6))
2674 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2681 /* If rss_queues > half of max_rss_queues, pair the queues in
2682 * order to conserve interrupts due to limited supply.
2684 if (adapter->rss_queues > (max_rss_queues / 2))
2685 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2691 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2692 * @adapter: board private structure to initialize
2694 * igb_sw_init initializes the Adapter private data structure.
2695 * Fields are initialized based on PCI device information and
2696 * OS network device settings (MTU size).
2698 static int igb_sw_init(struct igb_adapter *adapter)
2700 struct e1000_hw *hw = &adapter->hw;
2701 struct net_device *netdev = adapter->netdev;
2702 struct pci_dev *pdev = adapter->pdev;
2704 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2706 /* set default ring sizes */
2707 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2708 adapter->rx_ring_count = IGB_DEFAULT_RXD;
2710 /* set default ITR values */
2711 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2712 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2714 /* set default work limits */
2715 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2717 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2719 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2721 spin_lock_init(&adapter->stats64_lock);
2722 #ifdef CONFIG_PCI_IOV
2723 switch (hw->mac.type) {
2727 dev_warn(&pdev->dev,
2728 "Maximum of 7 VFs per PF, using max\n");
2729 max_vfs = adapter->vfs_allocated_count = 7;
2731 adapter->vfs_allocated_count = max_vfs;
2732 if (adapter->vfs_allocated_count)
2733 dev_warn(&pdev->dev,
2734 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2739 #endif /* CONFIG_PCI_IOV */
2741 igb_init_queue_configuration(adapter);
2743 /* Setup and initialize a copy of the hw vlan table array */
2744 adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2747 /* This call may decrease the number of queues */
2748 if (igb_init_interrupt_scheme(adapter, true)) {
2749 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2753 igb_probe_vfs(adapter);
2755 /* Explicitly disable IRQ since the NIC can be in any state. */
2756 igb_irq_disable(adapter);
2758 if (hw->mac.type >= e1000_i350)
2759 adapter->flags &= ~IGB_FLAG_DMAC;
2761 set_bit(__IGB_DOWN, &adapter->state);
2766 * igb_open - Called when a network interface is made active
2767 * @netdev: network interface device structure
2769 * Returns 0 on success, negative value on failure
2771 * The open entry point is called when a network interface is made
2772 * active by the system (IFF_UP). At this point all resources needed
2773 * for transmit and receive operations are allocated, the interrupt
2774 * handler is registered with the OS, the watchdog timer is started,
2775 * and the stack is notified that the interface is ready.
2777 static int __igb_open(struct net_device *netdev, bool resuming)
2779 struct igb_adapter *adapter = netdev_priv(netdev);
2780 struct e1000_hw *hw = &adapter->hw;
2781 struct pci_dev *pdev = adapter->pdev;
2785 /* disallow open during test */
2786 if (test_bit(__IGB_TESTING, &adapter->state)) {
2792 pm_runtime_get_sync(&pdev->dev);
2794 netif_carrier_off(netdev);
2796 /* allocate transmit descriptors */
2797 err = igb_setup_all_tx_resources(adapter);
2801 /* allocate receive descriptors */
2802 err = igb_setup_all_rx_resources(adapter);
2806 igb_power_up_link(adapter);
2808 /* before we allocate an interrupt, we must be ready to handle it.
2809 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2810 * as soon as we call pci_request_irq, so we have to setup our
2811 * clean_rx handler before we do so.
2813 igb_configure(adapter);
2815 err = igb_request_irq(adapter);
2819 /* Notify the stack of the actual queue counts. */
2820 err = netif_set_real_num_tx_queues(adapter->netdev,
2821 adapter->num_tx_queues);
2823 goto err_set_queues;
2825 err = netif_set_real_num_rx_queues(adapter->netdev,
2826 adapter->num_rx_queues);
2828 goto err_set_queues;
2830 /* From here on the code is the same as igb_up() */
2831 clear_bit(__IGB_DOWN, &adapter->state);
2833 for (i = 0; i < adapter->num_q_vectors; i++)
2834 napi_enable(&(adapter->q_vector[i]->napi));
2836 /* Clear any pending interrupts. */
2839 igb_irq_enable(adapter);
2841 /* notify VFs that reset has been completed */
2842 if (adapter->vfs_allocated_count) {
2843 u32 reg_data = rd32(E1000_CTRL_EXT);
2844 reg_data |= E1000_CTRL_EXT_PFRSTD;
2845 wr32(E1000_CTRL_EXT, reg_data);
2848 netif_tx_start_all_queues(netdev);
2851 pm_runtime_put(&pdev->dev);
2853 /* start the watchdog. */
2854 hw->mac.get_link_status = 1;
2855 schedule_work(&adapter->watchdog_task);
2860 igb_free_irq(adapter);
2862 igb_release_hw_control(adapter);
2863 igb_power_down_link(adapter);
2864 igb_free_all_rx_resources(adapter);
2866 igb_free_all_tx_resources(adapter);
2870 pm_runtime_put(&pdev->dev);
2875 static int igb_open(struct net_device *netdev)
2877 return __igb_open(netdev, false);
2881 * igb_close - Disables a network interface
2882 * @netdev: network interface device structure
2884 * Returns 0, this is not allowed to fail
2886 * The close entry point is called when an interface is de-activated
2887 * by the OS. The hardware is still under the driver's control, but
2888 * needs to be disabled. A global MAC reset is issued to stop the
2889 * hardware, and all transmit and receive resources are freed.
2891 static int __igb_close(struct net_device *netdev, bool suspending)
2893 struct igb_adapter *adapter = netdev_priv(netdev);
2894 struct pci_dev *pdev = adapter->pdev;
2896 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2899 pm_runtime_get_sync(&pdev->dev);
2902 igb_free_irq(adapter);
2904 igb_free_all_tx_resources(adapter);
2905 igb_free_all_rx_resources(adapter);
2908 pm_runtime_put_sync(&pdev->dev);
2912 static int igb_close(struct net_device *netdev)
2914 return __igb_close(netdev, false);
2918 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2919 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2921 * Return 0 on success, negative on failure
2923 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2925 struct device *dev = tx_ring->dev;
2928 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2930 tx_ring->tx_buffer_info = vzalloc(size);
2931 if (!tx_ring->tx_buffer_info)
2934 /* round up to nearest 4K */
2935 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2936 tx_ring->size = ALIGN(tx_ring->size, 4096);
2938 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2939 &tx_ring->dma, GFP_KERNEL);
2943 tx_ring->next_to_use = 0;
2944 tx_ring->next_to_clean = 0;
2949 vfree(tx_ring->tx_buffer_info);
2950 tx_ring->tx_buffer_info = NULL;
2951 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2956 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2957 * (Descriptors) for all queues
2958 * @adapter: board private structure
2960 * Return 0 on success, negative on failure
2962 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2964 struct pci_dev *pdev = adapter->pdev;
2967 for (i = 0; i < adapter->num_tx_queues; i++) {
2968 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2971 "Allocation for Tx Queue %u failed\n", i);
2972 for (i--; i >= 0; i--)
2973 igb_free_tx_resources(adapter->tx_ring[i]);
2982 * igb_setup_tctl - configure the transmit control registers
2983 * @adapter: Board private structure
2985 void igb_setup_tctl(struct igb_adapter *adapter)
2987 struct e1000_hw *hw = &adapter->hw;
2990 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2991 wr32(E1000_TXDCTL(0), 0);
2993 /* Program the Transmit Control Register */
2994 tctl = rd32(E1000_TCTL);
2995 tctl &= ~E1000_TCTL_CT;
2996 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2997 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2999 igb_config_collision_dist(hw);
3001 /* Enable transmits */
3002 tctl |= E1000_TCTL_EN;
3004 wr32(E1000_TCTL, tctl);
3008 * igb_configure_tx_ring - Configure transmit ring after Reset
3009 * @adapter: board private structure
3010 * @ring: tx ring to configure
3012 * Configure a transmit ring after a reset.
3014 void igb_configure_tx_ring(struct igb_adapter *adapter,
3015 struct igb_ring *ring)
3017 struct e1000_hw *hw = &adapter->hw;
3019 u64 tdba = ring->dma;
3020 int reg_idx = ring->reg_idx;
3022 /* disable the queue */
3023 wr32(E1000_TXDCTL(reg_idx), 0);
3027 wr32(E1000_TDLEN(reg_idx),
3028 ring->count * sizeof(union e1000_adv_tx_desc));
3029 wr32(E1000_TDBAL(reg_idx),
3030 tdba & 0x00000000ffffffffULL);
3031 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3033 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3034 wr32(E1000_TDH(reg_idx), 0);
3035 writel(0, ring->tail);
3037 txdctl |= IGB_TX_PTHRESH;
3038 txdctl |= IGB_TX_HTHRESH << 8;
3039 txdctl |= IGB_TX_WTHRESH << 16;
3041 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3042 wr32(E1000_TXDCTL(reg_idx), txdctl);
3046 * igb_configure_tx - Configure transmit Unit after Reset
3047 * @adapter: board private structure
3049 * Configure the Tx unit of the MAC after a reset.
3051 static void igb_configure_tx(struct igb_adapter *adapter)
3055 for (i = 0; i < adapter->num_tx_queues; i++)
3056 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3060 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3061 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3063 * Returns 0 on success, negative on failure
3065 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3067 struct device *dev = rx_ring->dev;
3070 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3072 rx_ring->rx_buffer_info = vzalloc(size);
3073 if (!rx_ring->rx_buffer_info)
3076 /* Round up to nearest 4K */
3077 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3078 rx_ring->size = ALIGN(rx_ring->size, 4096);
3080 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3081 &rx_ring->dma, GFP_KERNEL);
3085 rx_ring->next_to_alloc = 0;
3086 rx_ring->next_to_clean = 0;
3087 rx_ring->next_to_use = 0;
3092 vfree(rx_ring->rx_buffer_info);
3093 rx_ring->rx_buffer_info = NULL;
3094 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3099 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3100 * (Descriptors) for all queues
3101 * @adapter: board private structure
3103 * Return 0 on success, negative on failure
3105 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3107 struct pci_dev *pdev = adapter->pdev;
3110 for (i = 0; i < adapter->num_rx_queues; i++) {
3111 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3114 "Allocation for Rx Queue %u failed\n", i);
3115 for (i--; i >= 0; i--)
3116 igb_free_rx_resources(adapter->rx_ring[i]);
3125 * igb_setup_mrqc - configure the multiple receive queue control registers
3126 * @adapter: Board private structure
3128 static void igb_setup_mrqc(struct igb_adapter *adapter)
3130 struct e1000_hw *hw = &adapter->hw;
3132 u32 j, num_rx_queues;
3133 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3134 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3135 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3138 /* Fill out hash function seeds */
3139 for (j = 0; j < 10; j++)
3140 wr32(E1000_RSSRK(j), rsskey[j]);
3142 num_rx_queues = adapter->rss_queues;
3144 switch (hw->mac.type) {
3146 /* 82576 supports 2 RSS queues for SR-IOV */
3147 if (adapter->vfs_allocated_count)
3154 if (adapter->rss_indir_tbl_init != num_rx_queues) {
3155 for (j = 0; j < IGB_RETA_SIZE; j++)
3156 adapter->rss_indir_tbl[j] = (j * num_rx_queues) / IGB_RETA_SIZE;
3157 adapter->rss_indir_tbl_init = num_rx_queues;
3159 igb_write_rss_indir_tbl(adapter);
3161 /* Disable raw packet checksumming so that RSS hash is placed in
3162 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3163 * offloads as they are enabled by default
3165 rxcsum = rd32(E1000_RXCSUM);
3166 rxcsum |= E1000_RXCSUM_PCSD;
3168 if (adapter->hw.mac.type >= e1000_82576)
3169 /* Enable Receive Checksum Offload for SCTP */
3170 rxcsum |= E1000_RXCSUM_CRCOFL;
3172 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3173 wr32(E1000_RXCSUM, rxcsum);
3175 /* Generate RSS hash based on packet types, TCP/UDP
3176 * port numbers and/or IPv4/v6 src and dst addresses
3178 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3179 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3180 E1000_MRQC_RSS_FIELD_IPV6 |
3181 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3182 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3184 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3185 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3186 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3187 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3189 /* If VMDq is enabled then we set the appropriate mode for that, else
3190 * we default to RSS so that an RSS hash is calculated per packet even
3191 * if we are only using one queue
3193 if (adapter->vfs_allocated_count) {
3194 if (hw->mac.type > e1000_82575) {
3195 /* Set the default pool for the PF's first queue */
3196 u32 vtctl = rd32(E1000_VT_CTL);
3197 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3198 E1000_VT_CTL_DISABLE_DEF_POOL);
3199 vtctl |= adapter->vfs_allocated_count <<
3200 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3201 wr32(E1000_VT_CTL, vtctl);
3203 if (adapter->rss_queues > 1)
3204 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3206 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3208 if (hw->mac.type != e1000_i211)
3209 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3211 igb_vmm_control(adapter);
3213 wr32(E1000_MRQC, mrqc);
3217 * igb_setup_rctl - configure the receive control registers
3218 * @adapter: Board private structure
3220 void igb_setup_rctl(struct igb_adapter *adapter)
3222 struct e1000_hw *hw = &adapter->hw;
3225 rctl = rd32(E1000_RCTL);
3227 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3228 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3230 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3231 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3233 /* enable stripping of CRC. It's unlikely this will break BMC
3234 * redirection as it did with e1000. Newer features require
3235 * that the HW strips the CRC.
3237 rctl |= E1000_RCTL_SECRC;
3239 /* disable store bad packets and clear size bits. */
3240 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3242 /* enable LPE to prevent packets larger than max_frame_size */
3243 rctl |= E1000_RCTL_LPE;
3245 /* disable queue 0 to prevent tail write w/o re-config */
3246 wr32(E1000_RXDCTL(0), 0);
3248 /* Attention!!! For SR-IOV PF driver operations you must enable
3249 * queue drop for all VF and PF queues to prevent head of line blocking
3250 * if an un-trusted VF does not provide descriptors to hardware.
3252 if (adapter->vfs_allocated_count) {
3253 /* set all queue drop enable bits */
3254 wr32(E1000_QDE, ALL_QUEUES);
3257 /* This is useful for sniffing bad packets. */
3258 if (adapter->netdev->features & NETIF_F_RXALL) {
3259 /* UPE and MPE will be handled by normal PROMISC logic
3260 * in e1000e_set_rx_mode
3262 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3263 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3264 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3266 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3267 E1000_RCTL_DPF | /* Allow filtered pause */
3268 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3269 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3270 * and that breaks VLANs.
3274 wr32(E1000_RCTL, rctl);
3277 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3280 struct e1000_hw *hw = &adapter->hw;
3283 /* if it isn't the PF check to see if VFs are enabled and
3284 * increase the size to support vlan tags
3286 if (vfn < adapter->vfs_allocated_count &&
3287 adapter->vf_data[vfn].vlans_enabled)
3288 size += VLAN_TAG_SIZE;
3290 vmolr = rd32(E1000_VMOLR(vfn));
3291 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3292 vmolr |= size | E1000_VMOLR_LPE;
3293 wr32(E1000_VMOLR(vfn), vmolr);
3299 * igb_rlpml_set - set maximum receive packet size
3300 * @adapter: board private structure
3302 * Configure maximum receivable packet size.
3304 static void igb_rlpml_set(struct igb_adapter *adapter)
3306 u32 max_frame_size = adapter->max_frame_size;
3307 struct e1000_hw *hw = &adapter->hw;
3308 u16 pf_id = adapter->vfs_allocated_count;
3311 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3312 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3313 * to our max jumbo frame size, in case we need to enable
3314 * jumbo frames on one of the rings later.
3315 * This will not pass over-length frames into the default
3316 * queue because it's gated by the VMOLR.RLPML.
3318 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3321 wr32(E1000_RLPML, max_frame_size);
3324 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3327 struct e1000_hw *hw = &adapter->hw;
3330 /* This register exists only on 82576 and newer so if we are older then
3331 * we should exit and do nothing
3333 if (hw->mac.type < e1000_82576)
3336 vmolr = rd32(E1000_VMOLR(vfn));
3337 vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3339 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3341 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3343 /* clear all bits that might not be set */
3344 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3346 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3347 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3348 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3351 if (vfn <= adapter->vfs_allocated_count)
3352 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3354 wr32(E1000_VMOLR(vfn), vmolr);
3358 * igb_configure_rx_ring - Configure a receive ring after Reset
3359 * @adapter: board private structure
3360 * @ring: receive ring to be configured
3362 * Configure the Rx unit of the MAC after a reset.
3364 void igb_configure_rx_ring(struct igb_adapter *adapter,
3365 struct igb_ring *ring)
3367 struct e1000_hw *hw = &adapter->hw;
3368 u64 rdba = ring->dma;
3369 int reg_idx = ring->reg_idx;
3370 u32 srrctl = 0, rxdctl = 0;
3372 /* disable the queue */
3373 wr32(E1000_RXDCTL(reg_idx), 0);
3375 /* Set DMA base address registers */
3376 wr32(E1000_RDBAL(reg_idx),
3377 rdba & 0x00000000ffffffffULL);
3378 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3379 wr32(E1000_RDLEN(reg_idx),
3380 ring->count * sizeof(union e1000_adv_rx_desc));
3382 /* initialize head and tail */
3383 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3384 wr32(E1000_RDH(reg_idx), 0);
3385 writel(0, ring->tail);
3387 /* set descriptor configuration */
3388 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3389 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3390 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3391 if (hw->mac.type >= e1000_82580)
3392 srrctl |= E1000_SRRCTL_TIMESTAMP;
3393 /* Only set Drop Enable if we are supporting multiple queues */
3394 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3395 srrctl |= E1000_SRRCTL_DROP_EN;
3397 wr32(E1000_SRRCTL(reg_idx), srrctl);
3399 /* set filtering for VMDQ pools */
3400 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3402 rxdctl |= IGB_RX_PTHRESH;
3403 rxdctl |= IGB_RX_HTHRESH << 8;
3404 rxdctl |= IGB_RX_WTHRESH << 16;
3406 /* enable receive descriptor fetching */
3407 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3408 wr32(E1000_RXDCTL(reg_idx), rxdctl);
3412 * igb_configure_rx - Configure receive Unit after Reset
3413 * @adapter: board private structure
3415 * Configure the Rx unit of the MAC after a reset.
3417 static void igb_configure_rx(struct igb_adapter *adapter)
3421 /* set UTA to appropriate mode */
3422 igb_set_uta(adapter);
3424 /* set the correct pool for the PF default MAC address in entry 0 */
3425 igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3426 adapter->vfs_allocated_count);
3428 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3429 * the Base and Length of the Rx Descriptor Ring
3431 for (i = 0; i < adapter->num_rx_queues; i++)
3432 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3436 * igb_free_tx_resources - Free Tx Resources per Queue
3437 * @tx_ring: Tx descriptor ring for a specific queue
3439 * Free all transmit software resources
3441 void igb_free_tx_resources(struct igb_ring *tx_ring)
3443 igb_clean_tx_ring(tx_ring);
3445 vfree(tx_ring->tx_buffer_info);
3446 tx_ring->tx_buffer_info = NULL;
3448 /* if not set, then don't free */
3452 dma_free_coherent(tx_ring->dev, tx_ring->size,
3453 tx_ring->desc, tx_ring->dma);
3455 tx_ring->desc = NULL;
3459 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3460 * @adapter: board private structure
3462 * Free all transmit software resources
3464 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3468 for (i = 0; i < adapter->num_tx_queues; i++)
3469 igb_free_tx_resources(adapter->tx_ring[i]);
3472 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3473 struct igb_tx_buffer *tx_buffer)
3475 if (tx_buffer->skb) {
3476 dev_kfree_skb_any(tx_buffer->skb);
3477 if (dma_unmap_len(tx_buffer, len))
3478 dma_unmap_single(ring->dev,
3479 dma_unmap_addr(tx_buffer, dma),
3480 dma_unmap_len(tx_buffer, len),
3482 } else if (dma_unmap_len(tx_buffer, len)) {
3483 dma_unmap_page(ring->dev,
3484 dma_unmap_addr(tx_buffer, dma),
3485 dma_unmap_len(tx_buffer, len),
3488 tx_buffer->next_to_watch = NULL;
3489 tx_buffer->skb = NULL;
3490 dma_unmap_len_set(tx_buffer, len, 0);
3491 /* buffer_info must be completely set up in the transmit path */
3495 * igb_clean_tx_ring - Free Tx Buffers
3496 * @tx_ring: ring to be cleaned
3498 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3500 struct igb_tx_buffer *buffer_info;
3504 if (!tx_ring->tx_buffer_info)
3506 /* Free all the Tx ring sk_buffs */
3508 for (i = 0; i < tx_ring->count; i++) {
3509 buffer_info = &tx_ring->tx_buffer_info[i];
3510 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3513 netdev_tx_reset_queue(txring_txq(tx_ring));
3515 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3516 memset(tx_ring->tx_buffer_info, 0, size);
3518 /* Zero out the descriptor ring */
3519 memset(tx_ring->desc, 0, tx_ring->size);
3521 tx_ring->next_to_use = 0;
3522 tx_ring->next_to_clean = 0;
3526 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3527 * @adapter: board private structure
3529 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3533 for (i = 0; i < adapter->num_tx_queues; i++)
3534 igb_clean_tx_ring(adapter->tx_ring[i]);
3538 * igb_free_rx_resources - Free Rx Resources
3539 * @rx_ring: ring to clean the resources from
3541 * Free all receive software resources
3543 void igb_free_rx_resources(struct igb_ring *rx_ring)
3545 igb_clean_rx_ring(rx_ring);
3547 vfree(rx_ring->rx_buffer_info);
3548 rx_ring->rx_buffer_info = NULL;
3550 /* if not set, then don't free */
3554 dma_free_coherent(rx_ring->dev, rx_ring->size,
3555 rx_ring->desc, rx_ring->dma);
3557 rx_ring->desc = NULL;
3561 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3562 * @adapter: board private structure
3564 * Free all receive software resources
3566 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3570 for (i = 0; i < adapter->num_rx_queues; i++)
3571 igb_free_rx_resources(adapter->rx_ring[i]);
3575 * igb_clean_rx_ring - Free Rx Buffers per Queue
3576 * @rx_ring: ring to free buffers from
3578 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3584 dev_kfree_skb(rx_ring->skb);
3585 rx_ring->skb = NULL;
3587 if (!rx_ring->rx_buffer_info)
3590 /* Free all the Rx ring sk_buffs */
3591 for (i = 0; i < rx_ring->count; i++) {
3592 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3594 if (!buffer_info->page)
3597 dma_unmap_page(rx_ring->dev,
3601 __free_page(buffer_info->page);
3603 buffer_info->page = NULL;
3606 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3607 memset(rx_ring->rx_buffer_info, 0, size);
3609 /* Zero out the descriptor ring */
3610 memset(rx_ring->desc, 0, rx_ring->size);
3612 rx_ring->next_to_alloc = 0;
3613 rx_ring->next_to_clean = 0;
3614 rx_ring->next_to_use = 0;
3618 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3619 * @adapter: board private structure
3621 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3625 for (i = 0; i < adapter->num_rx_queues; i++)
3626 igb_clean_rx_ring(adapter->rx_ring[i]);
3630 * igb_set_mac - Change the Ethernet Address of the NIC
3631 * @netdev: network interface device structure
3632 * @p: pointer to an address structure
3634 * Returns 0 on success, negative on failure
3636 static int igb_set_mac(struct net_device *netdev, void *p)
3638 struct igb_adapter *adapter = netdev_priv(netdev);
3639 struct e1000_hw *hw = &adapter->hw;
3640 struct sockaddr *addr = p;
3642 if (!is_valid_ether_addr(addr->sa_data))
3643 return -EADDRNOTAVAIL;
3645 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3646 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3648 /* set the correct pool for the new PF MAC address in entry 0 */
3649 igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3650 adapter->vfs_allocated_count);
3656 * igb_write_mc_addr_list - write multicast addresses to MTA
3657 * @netdev: network interface device structure
3659 * Writes multicast address list to the MTA hash table.
3660 * Returns: -ENOMEM on failure
3661 * 0 on no addresses written
3662 * X on writing X addresses to MTA
3664 static int igb_write_mc_addr_list(struct net_device *netdev)
3666 struct igb_adapter *adapter = netdev_priv(netdev);
3667 struct e1000_hw *hw = &adapter->hw;
3668 struct netdev_hw_addr *ha;
3672 if (netdev_mc_empty(netdev)) {
3673 /* nothing to program, so clear mc list */
3674 igb_update_mc_addr_list(hw, NULL, 0);
3675 igb_restore_vf_multicasts(adapter);
3679 mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3683 /* The shared function expects a packed array of only addresses. */
3685 netdev_for_each_mc_addr(ha, netdev)
3686 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3688 igb_update_mc_addr_list(hw, mta_list, i);
3691 return netdev_mc_count(netdev);
3695 * igb_write_uc_addr_list - write unicast addresses to RAR table
3696 * @netdev: network interface device structure
3698 * Writes unicast address list to the RAR table.
3699 * Returns: -ENOMEM on failure/insufficient address space
3700 * 0 on no addresses written
3701 * X on writing X addresses to the RAR table
3703 static int igb_write_uc_addr_list(struct net_device *netdev)
3705 struct igb_adapter *adapter = netdev_priv(netdev);
3706 struct e1000_hw *hw = &adapter->hw;
3707 unsigned int vfn = adapter->vfs_allocated_count;
3708 unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3711 /* return ENOMEM indicating insufficient memory for addresses */
3712 if (netdev_uc_count(netdev) > rar_entries)
3715 if (!netdev_uc_empty(netdev) && rar_entries) {
3716 struct netdev_hw_addr *ha;
3718 netdev_for_each_uc_addr(ha, netdev) {
3721 igb_rar_set_qsel(adapter, ha->addr,
3727 /* write the addresses in reverse order to avoid write combining */
3728 for (; rar_entries > 0 ; rar_entries--) {
3729 wr32(E1000_RAH(rar_entries), 0);
3730 wr32(E1000_RAL(rar_entries), 0);
3738 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3739 * @netdev: network interface device structure
3741 * The set_rx_mode entry point is called whenever the unicast or multicast
3742 * address lists or the network interface flags are updated. This routine is
3743 * responsible for configuring the hardware for proper unicast, multicast,
3744 * promiscuous mode, and all-multi behavior.
3746 static void igb_set_rx_mode(struct net_device *netdev)
3748 struct igb_adapter *adapter = netdev_priv(netdev);
3749 struct e1000_hw *hw = &adapter->hw;
3750 unsigned int vfn = adapter->vfs_allocated_count;
3751 u32 rctl, vmolr = 0;
3754 /* Check for Promiscuous and All Multicast modes */
3755 rctl = rd32(E1000_RCTL);
3757 /* clear the effected bits */
3758 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3760 if (netdev->flags & IFF_PROMISC) {
3761 /* retain VLAN HW filtering if in VT mode */
3762 if (adapter->vfs_allocated_count)
3763 rctl |= E1000_RCTL_VFE;
3764 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3765 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3767 if (netdev->flags & IFF_ALLMULTI) {
3768 rctl |= E1000_RCTL_MPE;
3769 vmolr |= E1000_VMOLR_MPME;
3771 /* Write addresses to the MTA, if the attempt fails
3772 * then we should just turn on promiscuous mode so
3773 * that we can at least receive multicast traffic
3775 count = igb_write_mc_addr_list(netdev);
3777 rctl |= E1000_RCTL_MPE;
3778 vmolr |= E1000_VMOLR_MPME;
3780 vmolr |= E1000_VMOLR_ROMPE;
3783 /* Write addresses to available RAR registers, if there is not
3784 * sufficient space to store all the addresses then enable
3785 * unicast promiscuous mode
3787 count = igb_write_uc_addr_list(netdev);
3789 rctl |= E1000_RCTL_UPE;
3790 vmolr |= E1000_VMOLR_ROPE;
3792 rctl |= E1000_RCTL_VFE;
3794 wr32(E1000_RCTL, rctl);
3796 /* In order to support SR-IOV and eventually VMDq it is necessary to set
3797 * the VMOLR to enable the appropriate modes. Without this workaround
3798 * we will have issues with VLAN tag stripping not being done for frames
3799 * that are only arriving because we are the default pool
3801 if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3804 vmolr |= rd32(E1000_VMOLR(vfn)) &
3805 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3806 wr32(E1000_VMOLR(vfn), vmolr);
3807 igb_restore_vf_multicasts(adapter);
3810 static void igb_check_wvbr(struct igb_adapter *adapter)
3812 struct e1000_hw *hw = &adapter->hw;
3815 switch (hw->mac.type) {
3818 if (!(wvbr = rd32(E1000_WVBR)))
3825 adapter->wvbr |= wvbr;
3828 #define IGB_STAGGERED_QUEUE_OFFSET 8
3830 static void igb_spoof_check(struct igb_adapter *adapter)
3837 for(j = 0; j < adapter->vfs_allocated_count; j++) {
3838 if (adapter->wvbr & (1 << j) ||
3839 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3840 dev_warn(&adapter->pdev->dev,
3841 "Spoof event(s) detected on VF %d\n", j);
3844 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3849 /* Need to wait a few seconds after link up to get diagnostic information from
3852 static void igb_update_phy_info(unsigned long data)
3854 struct igb_adapter *adapter = (struct igb_adapter *) data;
3855 igb_get_phy_info(&adapter->hw);
3859 * igb_has_link - check shared code for link and determine up/down
3860 * @adapter: pointer to driver private info
3862 bool igb_has_link(struct igb_adapter *adapter)
3864 struct e1000_hw *hw = &adapter->hw;
3865 bool link_active = false;
3867 /* get_link_status is set on LSC (link status) interrupt or
3868 * rx sequence error interrupt. get_link_status will stay
3869 * false until the e1000_check_for_link establishes link
3870 * for copper adapters ONLY
3872 switch (hw->phy.media_type) {
3873 case e1000_media_type_copper:
3874 if (!hw->mac.get_link_status)
3876 case e1000_media_type_internal_serdes:
3877 hw->mac.ops.check_for_link(hw);
3878 link_active = !hw->mac.get_link_status;
3881 case e1000_media_type_unknown:
3885 if (((hw->mac.type == e1000_i210) ||
3886 (hw->mac.type == e1000_i211)) &&
3887 (hw->phy.id == I210_I_PHY_ID)) {
3888 if (!netif_carrier_ok(adapter->netdev)) {
3889 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
3890 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
3891 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
3892 adapter->link_check_timeout = jiffies;
3899 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3902 u32 ctrl_ext, thstat;
3904 /* check for thermal sensor event on i350 copper only */
3905 if (hw->mac.type == e1000_i350) {
3906 thstat = rd32(E1000_THSTAT);
3907 ctrl_ext = rd32(E1000_CTRL_EXT);
3909 if ((hw->phy.media_type == e1000_media_type_copper) &&
3910 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
3911 ret = !!(thstat & event);
3918 * igb_watchdog - Timer Call-back
3919 * @data: pointer to adapter cast into an unsigned long
3921 static void igb_watchdog(unsigned long data)
3923 struct igb_adapter *adapter = (struct igb_adapter *)data;
3924 /* Do the rest outside of interrupt context */
3925 schedule_work(&adapter->watchdog_task);
3928 static void igb_watchdog_task(struct work_struct *work)
3930 struct igb_adapter *adapter = container_of(work,
3933 struct e1000_hw *hw = &adapter->hw;
3934 struct e1000_phy_info *phy = &hw->phy;
3935 struct net_device *netdev = adapter->netdev;
3939 link = igb_has_link(adapter);
3941 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
3942 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
3943 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
3949 /* Cancel scheduled suspend requests. */
3950 pm_runtime_resume(netdev->dev.parent);
3952 if (!netif_carrier_ok(netdev)) {
3954 hw->mac.ops.get_speed_and_duplex(hw,
3955 &adapter->link_speed,
3956 &adapter->link_duplex);
3958 ctrl = rd32(E1000_CTRL);
3959 /* Links status message must follow this format */
3960 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3961 "Duplex, Flow Control: %s\n",
3963 adapter->link_speed,
3964 adapter->link_duplex == FULL_DUPLEX ?
3966 (ctrl & E1000_CTRL_TFCE) &&
3967 (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3968 (ctrl & E1000_CTRL_RFCE) ? "RX" :
3969 (ctrl & E1000_CTRL_TFCE) ? "TX" : "None");
3971 /* check if SmartSpeed worked */
3972 igb_check_downshift(hw);
3973 if (phy->speed_downgraded)
3974 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
3976 /* check for thermal sensor event */
3977 if (igb_thermal_sensor_event(hw,
3978 E1000_THSTAT_LINK_THROTTLE)) {
3979 netdev_info(netdev, "The network adapter link "
3980 "speed was downshifted because it "
3984 /* adjust timeout factor according to speed/duplex */
3985 adapter->tx_timeout_factor = 1;
3986 switch (adapter->link_speed) {
3988 adapter->tx_timeout_factor = 14;
3991 /* maybe add some timeout factor ? */
3995 netif_carrier_on(netdev);
3997 igb_ping_all_vfs(adapter);
3998 igb_check_vf_rate_limit(adapter);
4000 /* link state has changed, schedule phy info update */
4001 if (!test_bit(__IGB_DOWN, &adapter->state))
4002 mod_timer(&adapter->phy_info_timer,
4003 round_jiffies(jiffies + 2 * HZ));
4006 if (netif_carrier_ok(netdev)) {
4007 adapter->link_speed = 0;
4008 adapter->link_duplex = 0;
4010 /* check for thermal sensor event */
4011 if (igb_thermal_sensor_event(hw,
4012 E1000_THSTAT_PWR_DOWN)) {
4013 netdev_err(netdev, "The network adapter was "
4014 "stopped because it overheated\n");
4017 /* Links status message must follow this format */
4018 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4020 netif_carrier_off(netdev);
4022 igb_ping_all_vfs(adapter);
4024 /* link state has changed, schedule phy info update */
4025 if (!test_bit(__IGB_DOWN, &adapter->state))
4026 mod_timer(&adapter->phy_info_timer,
4027 round_jiffies(jiffies + 2 * HZ));
4029 pm_schedule_suspend(netdev->dev.parent,
4034 spin_lock(&adapter->stats64_lock);
4035 igb_update_stats(adapter, &adapter->stats64);
4036 spin_unlock(&adapter->stats64_lock);
4038 for (i = 0; i < adapter->num_tx_queues; i++) {
4039 struct igb_ring *tx_ring = adapter->tx_ring[i];
4040 if (!netif_carrier_ok(netdev)) {
4041 /* We've lost link, so the controller stops DMA,
4042 * but we've got queued Tx work that's never going
4043 * to get done, so reset controller to flush Tx.
4044 * (Do the reset outside of interrupt context).
4046 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4047 adapter->tx_timeout_count++;
4048 schedule_work(&adapter->reset_task);
4049 /* return immediately since reset is imminent */
4054 /* Force detection of hung controller every watchdog period */
4055 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4058 /* Cause software interrupt to ensure Rx ring is cleaned */
4059 if (adapter->msix_entries) {
4061 for (i = 0; i < adapter->num_q_vectors; i++)
4062 eics |= adapter->q_vector[i]->eims_value;
4063 wr32(E1000_EICS, eics);
4065 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4068 igb_spoof_check(adapter);
4069 igb_ptp_rx_hang(adapter);
4071 /* Reset the timer */
4072 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4073 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4074 mod_timer(&adapter->watchdog_timer,
4075 round_jiffies(jiffies + HZ));
4077 mod_timer(&adapter->watchdog_timer,
4078 round_jiffies(jiffies + 2 * HZ));
4082 enum latency_range {
4086 latency_invalid = 255
4090 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4091 * @q_vector: pointer to q_vector
4093 * Stores a new ITR value based on strictly on packet size. This
4094 * algorithm is less sophisticated than that used in igb_update_itr,
4095 * due to the difficulty of synchronizing statistics across multiple
4096 * receive rings. The divisors and thresholds used by this function
4097 * were determined based on theoretical maximum wire speed and testing
4098 * data, in order to minimize response time while increasing bulk
4100 * This functionality is controlled by the InterruptThrottleRate module
4101 * parameter (see igb_param.c)
4102 * NOTE: This function is called only when operating in a multiqueue
4103 * receive environment.
4105 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4107 int new_val = q_vector->itr_val;
4108 int avg_wire_size = 0;
4109 struct igb_adapter *adapter = q_vector->adapter;
4110 unsigned int packets;
4112 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4113 * ints/sec - ITR timer value of 120 ticks.
4115 if (adapter->link_speed != SPEED_1000) {
4116 new_val = IGB_4K_ITR;
4120 packets = q_vector->rx.total_packets;
4122 avg_wire_size = q_vector->rx.total_bytes / packets;
4124 packets = q_vector->tx.total_packets;
4126 avg_wire_size = max_t(u32, avg_wire_size,
4127 q_vector->tx.total_bytes / packets);
4129 /* if avg_wire_size isn't set no work was done */
4133 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4134 avg_wire_size += 24;
4136 /* Don't starve jumbo frames */
4137 avg_wire_size = min(avg_wire_size, 3000);
4139 /* Give a little boost to mid-size frames */
4140 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4141 new_val = avg_wire_size / 3;
4143 new_val = avg_wire_size / 2;
4145 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4146 if (new_val < IGB_20K_ITR &&
4147 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4148 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4149 new_val = IGB_20K_ITR;
4152 if (new_val != q_vector->itr_val) {
4153 q_vector->itr_val = new_val;
4154 q_vector->set_itr = 1;
4157 q_vector->rx.total_bytes = 0;
4158 q_vector->rx.total_packets = 0;
4159 q_vector->tx.total_bytes = 0;
4160 q_vector->tx.total_packets = 0;
4164 * igb_update_itr - update the dynamic ITR value based on statistics
4165 * @q_vector: pointer to q_vector
4166 * @ring_container: ring info to update the itr for
4168 * Stores a new ITR value based on packets and byte
4169 * counts during the last interrupt. The advantage of per interrupt
4170 * computation is faster updates and more accurate ITR for the current
4171 * traffic pattern. Constants in this function were computed
4172 * based on theoretical maximum wire speed and thresholds were set based
4173 * on testing data as well as attempting to minimize response time
4174 * while increasing bulk throughput.
4175 * this functionality is controlled by the InterruptThrottleRate module
4176 * parameter (see igb_param.c)
4177 * NOTE: These calculations are only valid when operating in a single-
4178 * queue environment.
4180 static void igb_update_itr(struct igb_q_vector *q_vector,
4181 struct igb_ring_container *ring_container)
4183 unsigned int packets = ring_container->total_packets;
4184 unsigned int bytes = ring_container->total_bytes;
4185 u8 itrval = ring_container->itr;
4187 /* no packets, exit with status unchanged */
4192 case lowest_latency:
4193 /* handle TSO and jumbo frames */
4194 if (bytes/packets > 8000)
4195 itrval = bulk_latency;
4196 else if ((packets < 5) && (bytes > 512))
4197 itrval = low_latency;
4199 case low_latency: /* 50 usec aka 20000 ints/s */
4200 if (bytes > 10000) {
4201 /* this if handles the TSO accounting */
4202 if (bytes/packets > 8000) {
4203 itrval = bulk_latency;
4204 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4205 itrval = bulk_latency;
4206 } else if ((packets > 35)) {
4207 itrval = lowest_latency;
4209 } else if (bytes/packets > 2000) {
4210 itrval = bulk_latency;
4211 } else if (packets <= 2 && bytes < 512) {
4212 itrval = lowest_latency;
4215 case bulk_latency: /* 250 usec aka 4000 ints/s */
4216 if (bytes > 25000) {
4218 itrval = low_latency;
4219 } else if (bytes < 1500) {
4220 itrval = low_latency;
4225 /* clear work counters since we have the values we need */
4226 ring_container->total_bytes = 0;
4227 ring_container->total_packets = 0;
4229 /* write updated itr to ring container */
4230 ring_container->itr = itrval;
4233 static void igb_set_itr(struct igb_q_vector *q_vector)
4235 struct igb_adapter *adapter = q_vector->adapter;
4236 u32 new_itr = q_vector->itr_val;
4239 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4240 if (adapter->link_speed != SPEED_1000) {
4242 new_itr = IGB_4K_ITR;
4246 igb_update_itr(q_vector, &q_vector->tx);
4247 igb_update_itr(q_vector, &q_vector->rx);
4249 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4251 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4252 if (current_itr == lowest_latency &&
4253 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4254 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4255 current_itr = low_latency;
4257 switch (current_itr) {
4258 /* counts and packets in update_itr are dependent on these numbers */
4259 case lowest_latency:
4260 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4263 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4266 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
4273 if (new_itr != q_vector->itr_val) {
4274 /* this attempts to bias the interrupt rate towards Bulk
4275 * by adding intermediate steps when interrupt rate is
4278 new_itr = new_itr > q_vector->itr_val ?
4279 max((new_itr * q_vector->itr_val) /
4280 (new_itr + (q_vector->itr_val >> 2)),
4282 /* Don't write the value here; it resets the adapter's
4283 * internal timer, and causes us to delay far longer than
4284 * we should between interrupts. Instead, we write the ITR
4285 * value at the beginning of the next interrupt so the timing
4286 * ends up being correct.
4288 q_vector->itr_val = new_itr;
4289 q_vector->set_itr = 1;
4293 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4294 u32 type_tucmd, u32 mss_l4len_idx)
4296 struct e1000_adv_tx_context_desc *context_desc;
4297 u16 i = tx_ring->next_to_use;
4299 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4302 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4304 /* set bits to identify this as an advanced context descriptor */
4305 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4307 /* For 82575, context index must be unique per ring. */
4308 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4309 mss_l4len_idx |= tx_ring->reg_idx << 4;
4311 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4312 context_desc->seqnum_seed = 0;
4313 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
4314 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4317 static int igb_tso(struct igb_ring *tx_ring,
4318 struct igb_tx_buffer *first,
4321 struct sk_buff *skb = first->skb;
4322 u32 vlan_macip_lens, type_tucmd;
4323 u32 mss_l4len_idx, l4len;
4325 if (skb->ip_summed != CHECKSUM_PARTIAL)
4328 if (!skb_is_gso(skb))
4331 if (skb_header_cloned(skb)) {
4332 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4337 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4338 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4340 if (first->protocol == __constant_htons(ETH_P_IP)) {
4341 struct iphdr *iph = ip_hdr(skb);
4344 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4348 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4349 first->tx_flags |= IGB_TX_FLAGS_TSO |
4352 } else if (skb_is_gso_v6(skb)) {
4353 ipv6_hdr(skb)->payload_len = 0;
4354 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4355 &ipv6_hdr(skb)->daddr,
4357 first->tx_flags |= IGB_TX_FLAGS_TSO |
4361 /* compute header lengths */
4362 l4len = tcp_hdrlen(skb);
4363 *hdr_len = skb_transport_offset(skb) + l4len;
4365 /* update gso size and bytecount with header size */
4366 first->gso_segs = skb_shinfo(skb)->gso_segs;
4367 first->bytecount += (first->gso_segs - 1) * *hdr_len;
4370 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4371 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4373 /* VLAN MACLEN IPLEN */
4374 vlan_macip_lens = skb_network_header_len(skb);
4375 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4376 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4378 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4383 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4385 struct sk_buff *skb = first->skb;
4386 u32 vlan_macip_lens = 0;
4387 u32 mss_l4len_idx = 0;
4390 if (skb->ip_summed != CHECKSUM_PARTIAL) {
4391 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4395 switch (first->protocol) {
4396 case __constant_htons(ETH_P_IP):
4397 vlan_macip_lens |= skb_network_header_len(skb);
4398 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4399 l4_hdr = ip_hdr(skb)->protocol;
4401 case __constant_htons(ETH_P_IPV6):
4402 vlan_macip_lens |= skb_network_header_len(skb);
4403 l4_hdr = ipv6_hdr(skb)->nexthdr;
4406 if (unlikely(net_ratelimit())) {
4407 dev_warn(tx_ring->dev,
4408 "partial checksum but proto=%x!\n",
4416 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4417 mss_l4len_idx = tcp_hdrlen(skb) <<
4418 E1000_ADVTXD_L4LEN_SHIFT;
4421 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4422 mss_l4len_idx = sizeof(struct sctphdr) <<
4423 E1000_ADVTXD_L4LEN_SHIFT;
4426 mss_l4len_idx = sizeof(struct udphdr) <<
4427 E1000_ADVTXD_L4LEN_SHIFT;
4430 if (unlikely(net_ratelimit())) {
4431 dev_warn(tx_ring->dev,
4432 "partial checksum but l4 proto=%x!\n",
4438 /* update TX checksum flag */
4439 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4442 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4443 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4445 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4448 #define IGB_SET_FLAG(_input, _flag, _result) \
4449 ((_flag <= _result) ? \
4450 ((u32)(_input & _flag) * (_result / _flag)) : \
4451 ((u32)(_input & _flag) / (_flag / _result)))
4453 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4455 /* set type for advanced descriptor with frame checksum insertion */
4456 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4457 E1000_ADVTXD_DCMD_DEXT |
4458 E1000_ADVTXD_DCMD_IFCS;
4460 /* set HW vlan bit if vlan is present */
4461 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4462 (E1000_ADVTXD_DCMD_VLE));
4464 /* set segmentation bits for TSO */
4465 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4466 (E1000_ADVTXD_DCMD_TSE));
4468 /* set timestamp bit if present */
4469 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4470 (E1000_ADVTXD_MAC_TSTAMP));
4472 /* insert frame checksum */
4473 cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4478 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4479 union e1000_adv_tx_desc *tx_desc,
4480 u32 tx_flags, unsigned int paylen)
4482 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4484 /* 82575 requires a unique index per ring */
4485 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4486 olinfo_status |= tx_ring->reg_idx << 4;
4488 /* insert L4 checksum */
4489 olinfo_status |= IGB_SET_FLAG(tx_flags,
4491 (E1000_TXD_POPTS_TXSM << 8));
4493 /* insert IPv4 checksum */
4494 olinfo_status |= IGB_SET_FLAG(tx_flags,
4496 (E1000_TXD_POPTS_IXSM << 8));
4498 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4501 static void igb_tx_map(struct igb_ring *tx_ring,
4502 struct igb_tx_buffer *first,
4505 struct sk_buff *skb = first->skb;
4506 struct igb_tx_buffer *tx_buffer;
4507 union e1000_adv_tx_desc *tx_desc;
4508 struct skb_frag_struct *frag;
4510 unsigned int data_len, size;
4511 u32 tx_flags = first->tx_flags;
4512 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4513 u16 i = tx_ring->next_to_use;
4515 tx_desc = IGB_TX_DESC(tx_ring, i);
4517 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4519 size = skb_headlen(skb);
4520 data_len = skb->data_len;
4522 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4526 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4527 if (dma_mapping_error(tx_ring->dev, dma))
4530 /* record length, and DMA address */
4531 dma_unmap_len_set(tx_buffer, len, size);
4532 dma_unmap_addr_set(tx_buffer, dma, dma);
4534 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4536 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4537 tx_desc->read.cmd_type_len =
4538 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4542 if (i == tx_ring->count) {
4543 tx_desc = IGB_TX_DESC(tx_ring, 0);
4546 tx_desc->read.olinfo_status = 0;
4548 dma += IGB_MAX_DATA_PER_TXD;
4549 size -= IGB_MAX_DATA_PER_TXD;
4551 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4554 if (likely(!data_len))
4557 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4561 if (i == tx_ring->count) {
4562 tx_desc = IGB_TX_DESC(tx_ring, 0);
4565 tx_desc->read.olinfo_status = 0;
4567 size = skb_frag_size(frag);
4570 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4571 size, DMA_TO_DEVICE);
4573 tx_buffer = &tx_ring->tx_buffer_info[i];
4576 /* write last descriptor with RS and EOP bits */
4577 cmd_type |= size | IGB_TXD_DCMD;
4578 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4580 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4582 /* set the timestamp */
4583 first->time_stamp = jiffies;
4585 /* Force memory writes to complete before letting h/w know there
4586 * are new descriptors to fetch. (Only applicable for weak-ordered
4587 * memory model archs, such as IA-64).
4589 * We also need this memory barrier to make certain all of the
4590 * status bits have been updated before next_to_watch is written.
4594 /* set next_to_watch value indicating a packet is present */
4595 first->next_to_watch = tx_desc;
4598 if (i == tx_ring->count)
4601 tx_ring->next_to_use = i;
4603 writel(i, tx_ring->tail);
4605 /* we need this if more than one processor can write to our tail
4606 * at a time, it synchronizes IO on IA64/Altix systems
4613 dev_err(tx_ring->dev, "TX DMA map failed\n");
4615 /* clear dma mappings for failed tx_buffer_info map */
4617 tx_buffer = &tx_ring->tx_buffer_info[i];
4618 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4619 if (tx_buffer == first)
4626 tx_ring->next_to_use = i;
4629 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4631 struct net_device *netdev = tx_ring->netdev;
4633 netif_stop_subqueue(netdev, tx_ring->queue_index);
4635 /* Herbert's original patch had:
4636 * smp_mb__after_netif_stop_queue();
4637 * but since that doesn't exist yet, just open code it.
4641 /* We need to check again in a case another CPU has just
4642 * made room available.
4644 if (igb_desc_unused(tx_ring) < size)
4648 netif_wake_subqueue(netdev, tx_ring->queue_index);
4650 u64_stats_update_begin(&tx_ring->tx_syncp2);
4651 tx_ring->tx_stats.restart_queue2++;
4652 u64_stats_update_end(&tx_ring->tx_syncp2);
4657 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4659 if (igb_desc_unused(tx_ring) >= size)
4661 return __igb_maybe_stop_tx(tx_ring, size);
4664 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4665 struct igb_ring *tx_ring)
4667 struct igb_tx_buffer *first;
4670 u16 count = TXD_USE_COUNT(skb_headlen(skb));
4671 __be16 protocol = vlan_get_protocol(skb);
4674 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4675 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4676 * + 2 desc gap to keep tail from touching head,
4677 * + 1 desc for context descriptor,
4678 * otherwise try next time
4680 if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4682 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4683 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4685 count += skb_shinfo(skb)->nr_frags;
4688 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4689 /* this is a hard error */
4690 return NETDEV_TX_BUSY;
4693 /* record the location of the first descriptor for this packet */
4694 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4696 first->bytecount = skb->len;
4697 first->gso_segs = 1;
4699 skb_tx_timestamp(skb);
4701 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4702 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4704 if (!(adapter->ptp_tx_skb)) {
4705 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4706 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4708 adapter->ptp_tx_skb = skb_get(skb);
4709 adapter->ptp_tx_start = jiffies;
4710 if (adapter->hw.mac.type == e1000_82576)
4711 schedule_work(&adapter->ptp_tx_work);
4715 if (vlan_tx_tag_present(skb)) {
4716 tx_flags |= IGB_TX_FLAGS_VLAN;
4717 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4720 /* record initial flags and protocol */
4721 first->tx_flags = tx_flags;
4722 first->protocol = protocol;
4724 tso = igb_tso(tx_ring, first, &hdr_len);
4728 igb_tx_csum(tx_ring, first);
4730 igb_tx_map(tx_ring, first, hdr_len);
4732 /* Make sure there is space in the ring for the next send. */
4733 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4735 return NETDEV_TX_OK;
4738 igb_unmap_and_free_tx_resource(tx_ring, first);
4740 return NETDEV_TX_OK;
4743 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4744 struct sk_buff *skb)
4746 unsigned int r_idx = skb->queue_mapping;
4748 if (r_idx >= adapter->num_tx_queues)
4749 r_idx = r_idx % adapter->num_tx_queues;
4751 return adapter->tx_ring[r_idx];
4754 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4755 struct net_device *netdev)
4757 struct igb_adapter *adapter = netdev_priv(netdev);
4759 if (test_bit(__IGB_DOWN, &adapter->state)) {
4760 dev_kfree_skb_any(skb);
4761 return NETDEV_TX_OK;
4764 if (skb->len <= 0) {
4765 dev_kfree_skb_any(skb);
4766 return NETDEV_TX_OK;
4769 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4770 * in order to meet this minimum size requirement.
4772 if (unlikely(skb->len < 17)) {
4773 if (skb_pad(skb, 17 - skb->len))
4774 return NETDEV_TX_OK;
4776 skb_set_tail_pointer(skb, 17);
4779 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4783 * igb_tx_timeout - Respond to a Tx Hang
4784 * @netdev: network interface device structure
4786 static void igb_tx_timeout(struct net_device *netdev)
4788 struct igb_adapter *adapter = netdev_priv(netdev);
4789 struct e1000_hw *hw = &adapter->hw;
4791 /* Do the reset outside of interrupt context */
4792 adapter->tx_timeout_count++;
4794 if (hw->mac.type >= e1000_82580)
4795 hw->dev_spec._82575.global_device_reset = true;
4797 schedule_work(&adapter->reset_task);
4799 (adapter->eims_enable_mask & ~adapter->eims_other));
4802 static void igb_reset_task(struct work_struct *work)
4804 struct igb_adapter *adapter;
4805 adapter = container_of(work, struct igb_adapter, reset_task);
4808 netdev_err(adapter->netdev, "Reset adapter\n");
4809 igb_reinit_locked(adapter);
4813 * igb_get_stats64 - Get System Network Statistics
4814 * @netdev: network interface device structure
4815 * @stats: rtnl_link_stats64 pointer
4817 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4818 struct rtnl_link_stats64 *stats)
4820 struct igb_adapter *adapter = netdev_priv(netdev);
4822 spin_lock(&adapter->stats64_lock);
4823 igb_update_stats(adapter, &adapter->stats64);
4824 memcpy(stats, &adapter->stats64, sizeof(*stats));
4825 spin_unlock(&adapter->stats64_lock);
4831 * igb_change_mtu - Change the Maximum Transfer Unit
4832 * @netdev: network interface device structure
4833 * @new_mtu: new value for maximum frame size
4835 * Returns 0 on success, negative on failure
4837 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4839 struct igb_adapter *adapter = netdev_priv(netdev);
4840 struct pci_dev *pdev = adapter->pdev;
4841 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4843 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4844 dev_err(&pdev->dev, "Invalid MTU setting\n");
4848 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4849 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4850 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4854 /* adjust max frame to be at least the size of a standard frame */
4855 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4856 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
4858 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4861 /* igb_down has a dependency on max_frame_size */
4862 adapter->max_frame_size = max_frame;
4864 if (netif_running(netdev))
4867 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4868 netdev->mtu, new_mtu);
4869 netdev->mtu = new_mtu;
4871 if (netif_running(netdev))
4876 clear_bit(__IGB_RESETTING, &adapter->state);
4882 * igb_update_stats - Update the board statistics counters
4883 * @adapter: board private structure
4885 void igb_update_stats(struct igb_adapter *adapter,
4886 struct rtnl_link_stats64 *net_stats)
4888 struct e1000_hw *hw = &adapter->hw;
4889 struct pci_dev *pdev = adapter->pdev;
4895 u64 _bytes, _packets;
4897 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4899 /* Prevent stats update while adapter is being reset, or if the pci
4900 * connection is down.
4902 if (adapter->link_speed == 0)
4904 if (pci_channel_offline(pdev))
4911 for (i = 0; i < adapter->num_rx_queues; i++) {
4912 u32 rqdpc = rd32(E1000_RQDPC(i));
4913 struct igb_ring *ring = adapter->rx_ring[i];
4916 ring->rx_stats.drops += rqdpc;
4917 net_stats->rx_fifo_errors += rqdpc;
4921 start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4922 _bytes = ring->rx_stats.bytes;
4923 _packets = ring->rx_stats.packets;
4924 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4926 packets += _packets;
4929 net_stats->rx_bytes = bytes;
4930 net_stats->rx_packets = packets;
4934 for (i = 0; i < adapter->num_tx_queues; i++) {
4935 struct igb_ring *ring = adapter->tx_ring[i];
4937 start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4938 _bytes = ring->tx_stats.bytes;
4939 _packets = ring->tx_stats.packets;
4940 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4942 packets += _packets;
4944 net_stats->tx_bytes = bytes;
4945 net_stats->tx_packets = packets;
4948 /* read stats registers */
4949 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4950 adapter->stats.gprc += rd32(E1000_GPRC);
4951 adapter->stats.gorc += rd32(E1000_GORCL);
4952 rd32(E1000_GORCH); /* clear GORCL */
4953 adapter->stats.bprc += rd32(E1000_BPRC);
4954 adapter->stats.mprc += rd32(E1000_MPRC);
4955 adapter->stats.roc += rd32(E1000_ROC);
4957 adapter->stats.prc64 += rd32(E1000_PRC64);
4958 adapter->stats.prc127 += rd32(E1000_PRC127);
4959 adapter->stats.prc255 += rd32(E1000_PRC255);
4960 adapter->stats.prc511 += rd32(E1000_PRC511);
4961 adapter->stats.prc1023 += rd32(E1000_PRC1023);
4962 adapter->stats.prc1522 += rd32(E1000_PRC1522);
4963 adapter->stats.symerrs += rd32(E1000_SYMERRS);
4964 adapter->stats.sec += rd32(E1000_SEC);
4966 mpc = rd32(E1000_MPC);
4967 adapter->stats.mpc += mpc;
4968 net_stats->rx_fifo_errors += mpc;
4969 adapter->stats.scc += rd32(E1000_SCC);
4970 adapter->stats.ecol += rd32(E1000_ECOL);
4971 adapter->stats.mcc += rd32(E1000_MCC);
4972 adapter->stats.latecol += rd32(E1000_LATECOL);
4973 adapter->stats.dc += rd32(E1000_DC);
4974 adapter->stats.rlec += rd32(E1000_RLEC);
4975 adapter->stats.xonrxc += rd32(E1000_XONRXC);
4976 adapter->stats.xontxc += rd32(E1000_XONTXC);
4977 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4978 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4979 adapter->stats.fcruc += rd32(E1000_FCRUC);
4980 adapter->stats.gptc += rd32(E1000_GPTC);
4981 adapter->stats.gotc += rd32(E1000_GOTCL);
4982 rd32(E1000_GOTCH); /* clear GOTCL */
4983 adapter->stats.rnbc += rd32(E1000_RNBC);
4984 adapter->stats.ruc += rd32(E1000_RUC);
4985 adapter->stats.rfc += rd32(E1000_RFC);
4986 adapter->stats.rjc += rd32(E1000_RJC);
4987 adapter->stats.tor += rd32(E1000_TORH);
4988 adapter->stats.tot += rd32(E1000_TOTH);
4989 adapter->stats.tpr += rd32(E1000_TPR);
4991 adapter->stats.ptc64 += rd32(E1000_PTC64);
4992 adapter->stats.ptc127 += rd32(E1000_PTC127);
4993 adapter->stats.ptc255 += rd32(E1000_PTC255);
4994 adapter->stats.ptc511 += rd32(E1000_PTC511);
4995 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4996 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4998 adapter->stats.mptc += rd32(E1000_MPTC);
4999 adapter->stats.bptc += rd32(E1000_BPTC);
5001 adapter->stats.tpt += rd32(E1000_TPT);
5002 adapter->stats.colc += rd32(E1000_COLC);
5004 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5005 /* read internal phy specific stats */
5006 reg = rd32(E1000_CTRL_EXT);
5007 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5008 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5010 /* this stat has invalid values on i210/i211 */
5011 if ((hw->mac.type != e1000_i210) &&
5012 (hw->mac.type != e1000_i211))
5013 adapter->stats.tncrs += rd32(E1000_TNCRS);
5016 adapter->stats.tsctc += rd32(E1000_TSCTC);
5017 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5019 adapter->stats.iac += rd32(E1000_IAC);
5020 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5021 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5022 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5023 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5024 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5025 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5026 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5027 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5029 /* Fill out the OS statistics structure */
5030 net_stats->multicast = adapter->stats.mprc;
5031 net_stats->collisions = adapter->stats.colc;
5035 /* RLEC on some newer hardware can be incorrect so build
5036 * our own version based on RUC and ROC
5038 net_stats->rx_errors = adapter->stats.rxerrc +
5039 adapter->stats.crcerrs + adapter->stats.algnerrc +
5040 adapter->stats.ruc + adapter->stats.roc +
5041 adapter->stats.cexterr;
5042 net_stats->rx_length_errors = adapter->stats.ruc +
5044 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5045 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5046 net_stats->rx_missed_errors = adapter->stats.mpc;
5049 net_stats->tx_errors = adapter->stats.ecol +
5050 adapter->stats.latecol;
5051 net_stats->tx_aborted_errors = adapter->stats.ecol;
5052 net_stats->tx_window_errors = adapter->stats.latecol;
5053 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5055 /* Tx Dropped needs to be maintained elsewhere */
5058 if (hw->phy.media_type == e1000_media_type_copper) {
5059 if ((adapter->link_speed == SPEED_1000) &&
5060 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5061 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5062 adapter->phy_stats.idle_errors += phy_tmp;
5066 /* Management Stats */
5067 adapter->stats.mgptc += rd32(E1000_MGTPTC);
5068 adapter->stats.mgprc += rd32(E1000_MGTPRC);
5069 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5072 reg = rd32(E1000_MANC);
5073 if (reg & E1000_MANC_EN_BMC2OS) {
5074 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5075 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5076 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5077 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5081 static irqreturn_t igb_msix_other(int irq, void *data)
5083 struct igb_adapter *adapter = data;
5084 struct e1000_hw *hw = &adapter->hw;
5085 u32 icr = rd32(E1000_ICR);
5086 /* reading ICR causes bit 31 of EICR to be cleared */
5088 if (icr & E1000_ICR_DRSTA)
5089 schedule_work(&adapter->reset_task);
5091 if (icr & E1000_ICR_DOUTSYNC) {
5092 /* HW is reporting DMA is out of sync */
5093 adapter->stats.doosync++;
5094 /* The DMA Out of Sync is also indication of a spoof event
5095 * in IOV mode. Check the Wrong VM Behavior register to
5096 * see if it is really a spoof event.
5098 igb_check_wvbr(adapter);
5101 /* Check for a mailbox event */
5102 if (icr & E1000_ICR_VMMB)
5103 igb_msg_task(adapter);
5105 if (icr & E1000_ICR_LSC) {
5106 hw->mac.get_link_status = 1;
5107 /* guard against interrupt when we're going down */
5108 if (!test_bit(__IGB_DOWN, &adapter->state))
5109 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5112 if (icr & E1000_ICR_TS) {
5113 u32 tsicr = rd32(E1000_TSICR);
5115 if (tsicr & E1000_TSICR_TXTS) {
5116 /* acknowledge the interrupt */
5117 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5118 /* retrieve hardware timestamp */
5119 schedule_work(&adapter->ptp_tx_work);
5123 wr32(E1000_EIMS, adapter->eims_other);
5128 static void igb_write_itr(struct igb_q_vector *q_vector)
5130 struct igb_adapter *adapter = q_vector->adapter;
5131 u32 itr_val = q_vector->itr_val & 0x7FFC;
5133 if (!q_vector->set_itr)
5139 if (adapter->hw.mac.type == e1000_82575)
5140 itr_val |= itr_val << 16;
5142 itr_val |= E1000_EITR_CNT_IGNR;
5144 writel(itr_val, q_vector->itr_register);
5145 q_vector->set_itr = 0;
5148 static irqreturn_t igb_msix_ring(int irq, void *data)
5150 struct igb_q_vector *q_vector = data;
5152 /* Write the ITR value calculated from the previous interrupt. */
5153 igb_write_itr(q_vector);
5155 napi_schedule(&q_vector->napi);
5160 #ifdef CONFIG_IGB_DCA
5161 static void igb_update_tx_dca(struct igb_adapter *adapter,
5162 struct igb_ring *tx_ring,
5165 struct e1000_hw *hw = &adapter->hw;
5166 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5168 if (hw->mac.type != e1000_82575)
5169 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5171 /* We can enable relaxed ordering for reads, but not writes when
5172 * DCA is enabled. This is due to a known issue in some chipsets
5173 * which will cause the DCA tag to be cleared.
5175 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5176 E1000_DCA_TXCTRL_DATA_RRO_EN |
5177 E1000_DCA_TXCTRL_DESC_DCA_EN;
5179 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5182 static void igb_update_rx_dca(struct igb_adapter *adapter,
5183 struct igb_ring *rx_ring,
5186 struct e1000_hw *hw = &adapter->hw;
5187 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5189 if (hw->mac.type != e1000_82575)
5190 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5192 /* We can enable relaxed ordering for reads, but not writes when
5193 * DCA is enabled. This is due to a known issue in some chipsets
5194 * which will cause the DCA tag to be cleared.
5196 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5197 E1000_DCA_RXCTRL_DESC_DCA_EN;
5199 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5202 static void igb_update_dca(struct igb_q_vector *q_vector)
5204 struct igb_adapter *adapter = q_vector->adapter;
5205 int cpu = get_cpu();
5207 if (q_vector->cpu == cpu)
5210 if (q_vector->tx.ring)
5211 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5213 if (q_vector->rx.ring)
5214 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5216 q_vector->cpu = cpu;
5221 static void igb_setup_dca(struct igb_adapter *adapter)
5223 struct e1000_hw *hw = &adapter->hw;
5226 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5229 /* Always use CB2 mode, difference is masked in the CB driver. */
5230 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5232 for (i = 0; i < adapter->num_q_vectors; i++) {
5233 adapter->q_vector[i]->cpu = -1;
5234 igb_update_dca(adapter->q_vector[i]);
5238 static int __igb_notify_dca(struct device *dev, void *data)
5240 struct net_device *netdev = dev_get_drvdata(dev);
5241 struct igb_adapter *adapter = netdev_priv(netdev);
5242 struct pci_dev *pdev = adapter->pdev;
5243 struct e1000_hw *hw = &adapter->hw;
5244 unsigned long event = *(unsigned long *)data;
5247 case DCA_PROVIDER_ADD:
5248 /* if already enabled, don't do it again */
5249 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5251 if (dca_add_requester(dev) == 0) {
5252 adapter->flags |= IGB_FLAG_DCA_ENABLED;
5253 dev_info(&pdev->dev, "DCA enabled\n");
5254 igb_setup_dca(adapter);
5257 /* Fall Through since DCA is disabled. */
5258 case DCA_PROVIDER_REMOVE:
5259 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5260 /* without this a class_device is left
5261 * hanging around in the sysfs model
5263 dca_remove_requester(dev);
5264 dev_info(&pdev->dev, "DCA disabled\n");
5265 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5266 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5274 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5279 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5282 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5284 #endif /* CONFIG_IGB_DCA */
5286 #ifdef CONFIG_PCI_IOV
5287 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5289 unsigned char mac_addr[ETH_ALEN];
5291 eth_zero_addr(mac_addr);
5292 igb_set_vf_mac(adapter, vf, mac_addr);
5294 /* By default spoof check is enabled for all VFs */
5295 adapter->vf_data[vf].spoofchk_enabled = true;
5301 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5303 struct e1000_hw *hw = &adapter->hw;
5307 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5308 ping = E1000_PF_CONTROL_MSG;
5309 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5310 ping |= E1000_VT_MSGTYPE_CTS;
5311 igb_write_mbx(hw, &ping, 1, i);
5315 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5317 struct e1000_hw *hw = &adapter->hw;
5318 u32 vmolr = rd32(E1000_VMOLR(vf));
5319 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5321 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5322 IGB_VF_FLAG_MULTI_PROMISC);
5323 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5325 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5326 vmolr |= E1000_VMOLR_MPME;
5327 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5328 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5330 /* if we have hashes and we are clearing a multicast promisc
5331 * flag we need to write the hashes to the MTA as this step
5332 * was previously skipped
5334 if (vf_data->num_vf_mc_hashes > 30) {
5335 vmolr |= E1000_VMOLR_MPME;
5336 } else if (vf_data->num_vf_mc_hashes) {
5338 vmolr |= E1000_VMOLR_ROMPE;
5339 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5340 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5344 wr32(E1000_VMOLR(vf), vmolr);
5346 /* there are flags left unprocessed, likely not supported */
5347 if (*msgbuf & E1000_VT_MSGINFO_MASK)
5353 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5354 u32 *msgbuf, u32 vf)
5356 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5357 u16 *hash_list = (u16 *)&msgbuf[1];
5358 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5361 /* salt away the number of multicast addresses assigned
5362 * to this VF for later use to restore when the PF multi cast
5365 vf_data->num_vf_mc_hashes = n;
5367 /* only up to 30 hash values supported */
5371 /* store the hashes for later use */
5372 for (i = 0; i < n; i++)
5373 vf_data->vf_mc_hashes[i] = hash_list[i];
5375 /* Flush and reset the mta with the new values */
5376 igb_set_rx_mode(adapter->netdev);
5381 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5383 struct e1000_hw *hw = &adapter->hw;
5384 struct vf_data_storage *vf_data;
5387 for (i = 0; i < adapter->vfs_allocated_count; i++) {
5388 u32 vmolr = rd32(E1000_VMOLR(i));
5389 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5391 vf_data = &adapter->vf_data[i];
5393 if ((vf_data->num_vf_mc_hashes > 30) ||
5394 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5395 vmolr |= E1000_VMOLR_MPME;
5396 } else if (vf_data->num_vf_mc_hashes) {
5397 vmolr |= E1000_VMOLR_ROMPE;
5398 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5399 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5401 wr32(E1000_VMOLR(i), vmolr);
5405 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5407 struct e1000_hw *hw = &adapter->hw;
5408 u32 pool_mask, reg, vid;
5411 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5413 /* Find the vlan filter for this id */
5414 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5415 reg = rd32(E1000_VLVF(i));
5417 /* remove the vf from the pool */
5420 /* if pool is empty then remove entry from vfta */
5421 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5422 (reg & E1000_VLVF_VLANID_ENABLE)) {
5424 vid = reg & E1000_VLVF_VLANID_MASK;
5425 igb_vfta_set(hw, vid, false);
5428 wr32(E1000_VLVF(i), reg);
5431 adapter->vf_data[vf].vlans_enabled = 0;
5434 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5436 struct e1000_hw *hw = &adapter->hw;
5439 /* The vlvf table only exists on 82576 hardware and newer */
5440 if (hw->mac.type < e1000_82576)
5443 /* we only need to do this if VMDq is enabled */
5444 if (!adapter->vfs_allocated_count)
5447 /* Find the vlan filter for this id */
5448 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5449 reg = rd32(E1000_VLVF(i));
5450 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5451 vid == (reg & E1000_VLVF_VLANID_MASK))
5456 if (i == E1000_VLVF_ARRAY_SIZE) {
5457 /* Did not find a matching VLAN ID entry that was
5458 * enabled. Search for a free filter entry, i.e.
5459 * one without the enable bit set
5461 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5462 reg = rd32(E1000_VLVF(i));
5463 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5467 if (i < E1000_VLVF_ARRAY_SIZE) {
5468 /* Found an enabled/available entry */
5469 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5471 /* if !enabled we need to set this up in vfta */
5472 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5473 /* add VID to filter table */
5474 igb_vfta_set(hw, vid, true);
5475 reg |= E1000_VLVF_VLANID_ENABLE;
5477 reg &= ~E1000_VLVF_VLANID_MASK;
5479 wr32(E1000_VLVF(i), reg);
5481 /* do not modify RLPML for PF devices */
5482 if (vf >= adapter->vfs_allocated_count)
5485 if (!adapter->vf_data[vf].vlans_enabled) {
5487 reg = rd32(E1000_VMOLR(vf));
5488 size = reg & E1000_VMOLR_RLPML_MASK;
5490 reg &= ~E1000_VMOLR_RLPML_MASK;
5492 wr32(E1000_VMOLR(vf), reg);
5495 adapter->vf_data[vf].vlans_enabled++;
5498 if (i < E1000_VLVF_ARRAY_SIZE) {
5499 /* remove vf from the pool */
5500 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5501 /* if pool is empty then remove entry from vfta */
5502 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5504 igb_vfta_set(hw, vid, false);
5506 wr32(E1000_VLVF(i), reg);
5508 /* do not modify RLPML for PF devices */
5509 if (vf >= adapter->vfs_allocated_count)
5512 adapter->vf_data[vf].vlans_enabled--;
5513 if (!adapter->vf_data[vf].vlans_enabled) {
5515 reg = rd32(E1000_VMOLR(vf));
5516 size = reg & E1000_VMOLR_RLPML_MASK;
5518 reg &= ~E1000_VMOLR_RLPML_MASK;
5520 wr32(E1000_VMOLR(vf), reg);
5527 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5529 struct e1000_hw *hw = &adapter->hw;
5532 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5534 wr32(E1000_VMVIR(vf), 0);
5537 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5538 int vf, u16 vlan, u8 qos)
5541 struct igb_adapter *adapter = netdev_priv(netdev);
5543 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5546 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5549 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5550 igb_set_vmolr(adapter, vf, !vlan);
5551 adapter->vf_data[vf].pf_vlan = vlan;
5552 adapter->vf_data[vf].pf_qos = qos;
5553 dev_info(&adapter->pdev->dev,
5554 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5555 if (test_bit(__IGB_DOWN, &adapter->state)) {
5556 dev_warn(&adapter->pdev->dev,
5557 "The VF VLAN has been set, but the PF device is not up.\n");
5558 dev_warn(&adapter->pdev->dev,
5559 "Bring the PF device up before attempting to use the VF device.\n");
5562 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5564 igb_set_vmvir(adapter, vlan, vf);
5565 igb_set_vmolr(adapter, vf, true);
5566 adapter->vf_data[vf].pf_vlan = 0;
5567 adapter->vf_data[vf].pf_qos = 0;
5573 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5575 struct e1000_hw *hw = &adapter->hw;
5579 /* Find the vlan filter for this id */
5580 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5581 reg = rd32(E1000_VLVF(i));
5582 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5583 vid == (reg & E1000_VLVF_VLANID_MASK))
5587 if (i >= E1000_VLVF_ARRAY_SIZE)
5593 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5595 struct e1000_hw *hw = &adapter->hw;
5596 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5597 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5600 /* If in promiscuous mode we need to make sure the PF also has
5601 * the VLAN filter set.
5603 if (add && (adapter->netdev->flags & IFF_PROMISC))
5604 err = igb_vlvf_set(adapter, vid, add,
5605 adapter->vfs_allocated_count);
5609 err = igb_vlvf_set(adapter, vid, add, vf);
5614 /* Go through all the checks to see if the VLAN filter should
5615 * be wiped completely.
5617 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5620 int regndx = igb_find_vlvf_entry(adapter, vid);
5623 /* See if any other pools are set for this VLAN filter
5624 * entry other than the PF.
5626 vlvf = bits = rd32(E1000_VLVF(regndx));
5627 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5628 adapter->vfs_allocated_count);
5629 /* If the filter was removed then ensure PF pool bit
5630 * is cleared if the PF only added itself to the pool
5631 * because the PF is in promiscuous mode.
5633 if ((vlvf & VLAN_VID_MASK) == vid &&
5634 !test_bit(vid, adapter->active_vlans) &&
5636 igb_vlvf_set(adapter, vid, add,
5637 adapter->vfs_allocated_count);
5644 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5646 /* clear flags - except flag that indicates PF has set the MAC */
5647 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5648 adapter->vf_data[vf].last_nack = jiffies;
5650 /* reset offloads to defaults */
5651 igb_set_vmolr(adapter, vf, true);
5653 /* reset vlans for device */
5654 igb_clear_vf_vfta(adapter, vf);
5655 if (adapter->vf_data[vf].pf_vlan)
5656 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5657 adapter->vf_data[vf].pf_vlan,
5658 adapter->vf_data[vf].pf_qos);
5660 igb_clear_vf_vfta(adapter, vf);
5662 /* reset multicast table array for vf */
5663 adapter->vf_data[vf].num_vf_mc_hashes = 0;
5665 /* Flush and reset the mta with the new values */
5666 igb_set_rx_mode(adapter->netdev);
5669 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5671 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5673 /* clear mac address as we were hotplug removed/added */
5674 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5675 eth_zero_addr(vf_mac);
5677 /* process remaining reset events */
5678 igb_vf_reset(adapter, vf);
5681 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5683 struct e1000_hw *hw = &adapter->hw;
5684 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5685 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5687 u8 *addr = (u8 *)(&msgbuf[1]);
5689 /* process all the same items cleared in a function level reset */
5690 igb_vf_reset(adapter, vf);
5692 /* set vf mac address */
5693 igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5695 /* enable transmit and receive for vf */
5696 reg = rd32(E1000_VFTE);
5697 wr32(E1000_VFTE, reg | (1 << vf));
5698 reg = rd32(E1000_VFRE);
5699 wr32(E1000_VFRE, reg | (1 << vf));
5701 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5703 /* reply to reset with ack and vf mac address */
5704 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5705 memcpy(addr, vf_mac, 6);
5706 igb_write_mbx(hw, msgbuf, 3, vf);
5709 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5711 /* The VF MAC Address is stored in a packed array of bytes
5712 * starting at the second 32 bit word of the msg array
5714 unsigned char *addr = (char *)&msg[1];
5717 if (is_valid_ether_addr(addr))
5718 err = igb_set_vf_mac(adapter, vf, addr);
5723 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5725 struct e1000_hw *hw = &adapter->hw;
5726 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5727 u32 msg = E1000_VT_MSGTYPE_NACK;
5729 /* if device isn't clear to send it shouldn't be reading either */
5730 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5731 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5732 igb_write_mbx(hw, &msg, 1, vf);
5733 vf_data->last_nack = jiffies;
5737 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5739 struct pci_dev *pdev = adapter->pdev;
5740 u32 msgbuf[E1000_VFMAILBOX_SIZE];
5741 struct e1000_hw *hw = &adapter->hw;
5742 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5745 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5748 /* if receive failed revoke VF CTS stats and restart init */
5749 dev_err(&pdev->dev, "Error receiving message from VF\n");
5750 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5751 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5756 /* this is a message we already processed, do nothing */
5757 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5760 /* until the vf completes a reset it should not be
5761 * allowed to start any configuration.
5763 if (msgbuf[0] == E1000_VF_RESET) {
5764 igb_vf_reset_msg(adapter, vf);
5768 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5769 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5775 switch ((msgbuf[0] & 0xFFFF)) {
5776 case E1000_VF_SET_MAC_ADDR:
5778 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5779 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5781 dev_warn(&pdev->dev,
5782 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5785 case E1000_VF_SET_PROMISC:
5786 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5788 case E1000_VF_SET_MULTICAST:
5789 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5791 case E1000_VF_SET_LPE:
5792 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5794 case E1000_VF_SET_VLAN:
5796 if (vf_data->pf_vlan)
5797 dev_warn(&pdev->dev,
5798 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5801 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5804 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5809 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5811 /* notify the VF of the results of what it sent us */
5813 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5815 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5817 igb_write_mbx(hw, msgbuf, 1, vf);
5820 static void igb_msg_task(struct igb_adapter *adapter)
5822 struct e1000_hw *hw = &adapter->hw;
5825 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5826 /* process any reset requests */
5827 if (!igb_check_for_rst(hw, vf))
5828 igb_vf_reset_event(adapter, vf);
5830 /* process any messages pending */
5831 if (!igb_check_for_msg(hw, vf))
5832 igb_rcv_msg_from_vf(adapter, vf);
5834 /* process any acks */
5835 if (!igb_check_for_ack(hw, vf))
5836 igb_rcv_ack_from_vf(adapter, vf);
5841 * igb_set_uta - Set unicast filter table address
5842 * @adapter: board private structure
5844 * The unicast table address is a register array of 32-bit registers.
5845 * The table is meant to be used in a way similar to how the MTA is used
5846 * however due to certain limitations in the hardware it is necessary to
5847 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5848 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
5850 static void igb_set_uta(struct igb_adapter *adapter)
5852 struct e1000_hw *hw = &adapter->hw;
5855 /* The UTA table only exists on 82576 hardware and newer */
5856 if (hw->mac.type < e1000_82576)
5859 /* we only need to do this if VMDq is enabled */
5860 if (!adapter->vfs_allocated_count)
5863 for (i = 0; i < hw->mac.uta_reg_count; i++)
5864 array_wr32(E1000_UTA, i, ~0);
5868 * igb_intr_msi - Interrupt Handler
5869 * @irq: interrupt number
5870 * @data: pointer to a network interface device structure
5872 static irqreturn_t igb_intr_msi(int irq, void *data)
5874 struct igb_adapter *adapter = data;
5875 struct igb_q_vector *q_vector = adapter->q_vector[0];
5876 struct e1000_hw *hw = &adapter->hw;
5877 /* read ICR disables interrupts using IAM */
5878 u32 icr = rd32(E1000_ICR);
5880 igb_write_itr(q_vector);
5882 if (icr & E1000_ICR_DRSTA)
5883 schedule_work(&adapter->reset_task);
5885 if (icr & E1000_ICR_DOUTSYNC) {
5886 /* HW is reporting DMA is out of sync */
5887 adapter->stats.doosync++;
5890 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5891 hw->mac.get_link_status = 1;
5892 if (!test_bit(__IGB_DOWN, &adapter->state))
5893 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5896 if (icr & E1000_ICR_TS) {
5897 u32 tsicr = rd32(E1000_TSICR);
5899 if (tsicr & E1000_TSICR_TXTS) {
5900 /* acknowledge the interrupt */
5901 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5902 /* retrieve hardware timestamp */
5903 schedule_work(&adapter->ptp_tx_work);
5907 napi_schedule(&q_vector->napi);
5913 * igb_intr - Legacy Interrupt Handler
5914 * @irq: interrupt number
5915 * @data: pointer to a network interface device structure
5917 static irqreturn_t igb_intr(int irq, void *data)
5919 struct igb_adapter *adapter = data;
5920 struct igb_q_vector *q_vector = adapter->q_vector[0];
5921 struct e1000_hw *hw = &adapter->hw;
5922 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5923 * need for the IMC write
5925 u32 icr = rd32(E1000_ICR);
5927 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5928 * not set, then the adapter didn't send an interrupt
5930 if (!(icr & E1000_ICR_INT_ASSERTED))
5933 igb_write_itr(q_vector);
5935 if (icr & E1000_ICR_DRSTA)
5936 schedule_work(&adapter->reset_task);
5938 if (icr & E1000_ICR_DOUTSYNC) {
5939 /* HW is reporting DMA is out of sync */
5940 adapter->stats.doosync++;
5943 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5944 hw->mac.get_link_status = 1;
5945 /* guard against interrupt when we're going down */
5946 if (!test_bit(__IGB_DOWN, &adapter->state))
5947 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5950 if (icr & E1000_ICR_TS) {
5951 u32 tsicr = rd32(E1000_TSICR);
5953 if (tsicr & E1000_TSICR_TXTS) {
5954 /* acknowledge the interrupt */
5955 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5956 /* retrieve hardware timestamp */
5957 schedule_work(&adapter->ptp_tx_work);
5961 napi_schedule(&q_vector->napi);
5966 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5968 struct igb_adapter *adapter = q_vector->adapter;
5969 struct e1000_hw *hw = &adapter->hw;
5971 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5972 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5973 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5974 igb_set_itr(q_vector);
5976 igb_update_ring_itr(q_vector);
5979 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5980 if (adapter->msix_entries)
5981 wr32(E1000_EIMS, q_vector->eims_value);
5983 igb_irq_enable(adapter);
5988 * igb_poll - NAPI Rx polling callback
5989 * @napi: napi polling structure
5990 * @budget: count of how many packets we should handle
5992 static int igb_poll(struct napi_struct *napi, int budget)
5994 struct igb_q_vector *q_vector = container_of(napi,
5995 struct igb_q_vector,
5997 bool clean_complete = true;
5999 #ifdef CONFIG_IGB_DCA
6000 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6001 igb_update_dca(q_vector);
6003 if (q_vector->tx.ring)
6004 clean_complete = igb_clean_tx_irq(q_vector);
6006 if (q_vector->rx.ring)
6007 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6009 /* If all work not completed, return budget and keep polling */
6010 if (!clean_complete)
6013 /* If not enough Rx work done, exit the polling mode */
6014 napi_complete(napi);
6015 igb_ring_irq_enable(q_vector);
6021 * igb_clean_tx_irq - Reclaim resources after transmit completes
6022 * @q_vector: pointer to q_vector containing needed info
6024 * returns true if ring is completely cleaned
6026 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6028 struct igb_adapter *adapter = q_vector->adapter;
6029 struct igb_ring *tx_ring = q_vector->tx.ring;
6030 struct igb_tx_buffer *tx_buffer;
6031 union e1000_adv_tx_desc *tx_desc;
6032 unsigned int total_bytes = 0, total_packets = 0;
6033 unsigned int budget = q_vector->tx.work_limit;
6034 unsigned int i = tx_ring->next_to_clean;
6036 if (test_bit(__IGB_DOWN, &adapter->state))
6039 tx_buffer = &tx_ring->tx_buffer_info[i];
6040 tx_desc = IGB_TX_DESC(tx_ring, i);
6041 i -= tx_ring->count;
6044 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6046 /* if next_to_watch is not set then there is no work pending */
6050 /* prevent any other reads prior to eop_desc */
6051 read_barrier_depends();
6053 /* if DD is not set pending work has not been completed */
6054 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6057 /* clear next_to_watch to prevent false hangs */
6058 tx_buffer->next_to_watch = NULL;
6060 /* update the statistics for this packet */
6061 total_bytes += tx_buffer->bytecount;
6062 total_packets += tx_buffer->gso_segs;
6065 dev_kfree_skb_any(tx_buffer->skb);
6067 /* unmap skb header data */
6068 dma_unmap_single(tx_ring->dev,
6069 dma_unmap_addr(tx_buffer, dma),
6070 dma_unmap_len(tx_buffer, len),
6073 /* clear tx_buffer data */
6074 tx_buffer->skb = NULL;
6075 dma_unmap_len_set(tx_buffer, len, 0);
6077 /* clear last DMA location and unmap remaining buffers */
6078 while (tx_desc != eop_desc) {
6083 i -= tx_ring->count;
6084 tx_buffer = tx_ring->tx_buffer_info;
6085 tx_desc = IGB_TX_DESC(tx_ring, 0);
6088 /* unmap any remaining paged data */
6089 if (dma_unmap_len(tx_buffer, len)) {
6090 dma_unmap_page(tx_ring->dev,
6091 dma_unmap_addr(tx_buffer, dma),
6092 dma_unmap_len(tx_buffer, len),
6094 dma_unmap_len_set(tx_buffer, len, 0);
6098 /* move us one more past the eop_desc for start of next pkt */
6103 i -= tx_ring->count;
6104 tx_buffer = tx_ring->tx_buffer_info;
6105 tx_desc = IGB_TX_DESC(tx_ring, 0);
6108 /* issue prefetch for next Tx descriptor */
6111 /* update budget accounting */
6113 } while (likely(budget));
6115 netdev_tx_completed_queue(txring_txq(tx_ring),
6116 total_packets, total_bytes);
6117 i += tx_ring->count;
6118 tx_ring->next_to_clean = i;
6119 u64_stats_update_begin(&tx_ring->tx_syncp);
6120 tx_ring->tx_stats.bytes += total_bytes;
6121 tx_ring->tx_stats.packets += total_packets;
6122 u64_stats_update_end(&tx_ring->tx_syncp);
6123 q_vector->tx.total_bytes += total_bytes;
6124 q_vector->tx.total_packets += total_packets;
6126 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6127 struct e1000_hw *hw = &adapter->hw;
6129 /* Detect a transmit hang in hardware, this serializes the
6130 * check with the clearing of time_stamp and movement of i
6132 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6133 if (tx_buffer->next_to_watch &&
6134 time_after(jiffies, tx_buffer->time_stamp +
6135 (adapter->tx_timeout_factor * HZ)) &&
6136 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6138 /* detected Tx unit hang */
6139 dev_err(tx_ring->dev,
6140 "Detected Tx Unit Hang\n"
6144 " next_to_use <%x>\n"
6145 " next_to_clean <%x>\n"
6146 "buffer_info[next_to_clean]\n"
6147 " time_stamp <%lx>\n"
6148 " next_to_watch <%p>\n"
6150 " desc.status <%x>\n",
6151 tx_ring->queue_index,
6152 rd32(E1000_TDH(tx_ring->reg_idx)),
6153 readl(tx_ring->tail),
6154 tx_ring->next_to_use,
6155 tx_ring->next_to_clean,
6156 tx_buffer->time_stamp,
6157 tx_buffer->next_to_watch,
6159 tx_buffer->next_to_watch->wb.status);
6160 netif_stop_subqueue(tx_ring->netdev,
6161 tx_ring->queue_index);
6163 /* we are about to reset, no point in enabling stuff */
6168 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6169 if (unlikely(total_packets &&
6170 netif_carrier_ok(tx_ring->netdev) &&
6171 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6172 /* Make sure that anybody stopping the queue after this
6173 * sees the new next_to_clean.
6176 if (__netif_subqueue_stopped(tx_ring->netdev,
6177 tx_ring->queue_index) &&
6178 !(test_bit(__IGB_DOWN, &adapter->state))) {
6179 netif_wake_subqueue(tx_ring->netdev,
6180 tx_ring->queue_index);
6182 u64_stats_update_begin(&tx_ring->tx_syncp);
6183 tx_ring->tx_stats.restart_queue++;
6184 u64_stats_update_end(&tx_ring->tx_syncp);
6192 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6193 * @rx_ring: rx descriptor ring to store buffers on
6194 * @old_buff: donor buffer to have page reused
6196 * Synchronizes page for reuse by the adapter
6198 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6199 struct igb_rx_buffer *old_buff)
6201 struct igb_rx_buffer *new_buff;
6202 u16 nta = rx_ring->next_to_alloc;
6204 new_buff = &rx_ring->rx_buffer_info[nta];
6206 /* update, and store next to alloc */
6208 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6210 /* transfer page from old buffer to new buffer */
6211 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6213 /* sync the buffer for use by the device */
6214 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6215 old_buff->page_offset,
6220 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6222 unsigned int truesize)
6224 /* avoid re-using remote pages */
6225 if (unlikely(page_to_nid(page) != numa_node_id()))
6228 #if (PAGE_SIZE < 8192)
6229 /* if we are only owner of page we can reuse it */
6230 if (unlikely(page_count(page) != 1))
6233 /* flip page offset to other buffer */
6234 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6236 /* since we are the only owner of the page and we need to
6237 * increment it, just set the value to 2 in order to avoid
6238 * an unnecessary locked operation
6240 atomic_set(&page->_count, 2);
6242 /* move offset up to the next cache line */
6243 rx_buffer->page_offset += truesize;
6245 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6248 /* bump ref count on page before it is given to the stack */
6256 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6257 * @rx_ring: rx descriptor ring to transact packets on
6258 * @rx_buffer: buffer containing page to add
6259 * @rx_desc: descriptor containing length of buffer written by hardware
6260 * @skb: sk_buff to place the data into
6262 * This function will add the data contained in rx_buffer->page to the skb.
6263 * This is done either through a direct copy if the data in the buffer is
6264 * less than the skb header size, otherwise it will just attach the page as
6265 * a frag to the skb.
6267 * The function will then update the page offset if necessary and return
6268 * true if the buffer can be reused by the adapter.
6270 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6271 struct igb_rx_buffer *rx_buffer,
6272 union e1000_adv_rx_desc *rx_desc,
6273 struct sk_buff *skb)
6275 struct page *page = rx_buffer->page;
6276 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6277 #if (PAGE_SIZE < 8192)
6278 unsigned int truesize = IGB_RX_BUFSZ;
6280 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6283 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6284 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6286 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6287 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6288 va += IGB_TS_HDR_LEN;
6289 size -= IGB_TS_HDR_LEN;
6292 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6294 /* we can reuse buffer as-is, just make sure it is local */
6295 if (likely(page_to_nid(page) == numa_node_id()))
6298 /* this page cannot be reused so discard it */
6303 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6304 rx_buffer->page_offset, size, truesize);
6306 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6309 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6310 union e1000_adv_rx_desc *rx_desc,
6311 struct sk_buff *skb)
6313 struct igb_rx_buffer *rx_buffer;
6316 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6318 page = rx_buffer->page;
6322 void *page_addr = page_address(page) +
6323 rx_buffer->page_offset;
6325 /* prefetch first cache line of first page */
6326 prefetch(page_addr);
6327 #if L1_CACHE_BYTES < 128
6328 prefetch(page_addr + L1_CACHE_BYTES);
6331 /* allocate a skb to store the frags */
6332 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6334 if (unlikely(!skb)) {
6335 rx_ring->rx_stats.alloc_failed++;
6339 /* we will be copying header into skb->data in
6340 * pskb_may_pull so it is in our interest to prefetch
6341 * it now to avoid a possible cache miss
6343 prefetchw(skb->data);
6346 /* we are reusing so sync this buffer for CPU use */
6347 dma_sync_single_range_for_cpu(rx_ring->dev,
6349 rx_buffer->page_offset,
6353 /* pull page into skb */
6354 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6355 /* hand second half of page back to the ring */
6356 igb_reuse_rx_page(rx_ring, rx_buffer);
6358 /* we are not reusing the buffer so unmap it */
6359 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6360 PAGE_SIZE, DMA_FROM_DEVICE);
6363 /* clear contents of rx_buffer */
6364 rx_buffer->page = NULL;
6369 static inline void igb_rx_checksum(struct igb_ring *ring,
6370 union e1000_adv_rx_desc *rx_desc,
6371 struct sk_buff *skb)
6373 skb_checksum_none_assert(skb);
6375 /* Ignore Checksum bit is set */
6376 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6379 /* Rx checksum disabled via ethtool */
6380 if (!(ring->netdev->features & NETIF_F_RXCSUM))
6383 /* TCP/UDP checksum error bit is set */
6384 if (igb_test_staterr(rx_desc,
6385 E1000_RXDEXT_STATERR_TCPE |
6386 E1000_RXDEXT_STATERR_IPE)) {
6387 /* work around errata with sctp packets where the TCPE aka
6388 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6389 * packets, (aka let the stack check the crc32c)
6391 if (!((skb->len == 60) &&
6392 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6393 u64_stats_update_begin(&ring->rx_syncp);
6394 ring->rx_stats.csum_err++;
6395 u64_stats_update_end(&ring->rx_syncp);
6397 /* let the stack verify checksum errors */
6400 /* It must be a TCP or UDP packet with a valid checksum */
6401 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6402 E1000_RXD_STAT_UDPCS))
6403 skb->ip_summed = CHECKSUM_UNNECESSARY;
6405 dev_dbg(ring->dev, "cksum success: bits %08X\n",
6406 le32_to_cpu(rx_desc->wb.upper.status_error));
6409 static inline void igb_rx_hash(struct igb_ring *ring,
6410 union e1000_adv_rx_desc *rx_desc,
6411 struct sk_buff *skb)
6413 if (ring->netdev->features & NETIF_F_RXHASH)
6414 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6418 * igb_is_non_eop - process handling of non-EOP buffers
6419 * @rx_ring: Rx ring being processed
6420 * @rx_desc: Rx descriptor for current buffer
6421 * @skb: current socket buffer containing buffer in progress
6423 * This function updates next to clean. If the buffer is an EOP buffer
6424 * this function exits returning false, otherwise it will place the
6425 * sk_buff in the next buffer to be chained and return true indicating
6426 * that this is in fact a non-EOP buffer.
6428 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6429 union e1000_adv_rx_desc *rx_desc)
6431 u32 ntc = rx_ring->next_to_clean + 1;
6433 /* fetch, update, and store next to clean */
6434 ntc = (ntc < rx_ring->count) ? ntc : 0;
6435 rx_ring->next_to_clean = ntc;
6437 prefetch(IGB_RX_DESC(rx_ring, ntc));
6439 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6446 * igb_get_headlen - determine size of header for LRO/GRO
6447 * @data: pointer to the start of the headers
6448 * @max_len: total length of section to find headers in
6450 * This function is meant to determine the length of headers that will
6451 * be recognized by hardware for LRO, and GRO offloads. The main
6452 * motivation of doing this is to only perform one pull for IPv4 TCP
6453 * packets so that we can do basic things like calculating the gso_size
6454 * based on the average data per packet.
6456 static unsigned int igb_get_headlen(unsigned char *data,
6457 unsigned int max_len)
6460 unsigned char *network;
6463 struct vlan_hdr *vlan;
6466 struct ipv6hdr *ipv6;
6469 u8 nexthdr = 0; /* default to not TCP */
6472 /* this should never happen, but better safe than sorry */
6473 if (max_len < ETH_HLEN)
6476 /* initialize network frame pointer */
6479 /* set first protocol and move network header forward */
6480 protocol = hdr.eth->h_proto;
6481 hdr.network += ETH_HLEN;
6483 /* handle any vlan tag if present */
6484 if (protocol == __constant_htons(ETH_P_8021Q)) {
6485 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6488 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6489 hdr.network += VLAN_HLEN;
6492 /* handle L3 protocols */
6493 if (protocol == __constant_htons(ETH_P_IP)) {
6494 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6497 /* access ihl as a u8 to avoid unaligned access on ia64 */
6498 hlen = (hdr.network[0] & 0x0F) << 2;
6500 /* verify hlen meets minimum size requirements */
6501 if (hlen < sizeof(struct iphdr))
6502 return hdr.network - data;
6504 /* record next protocol if header is present */
6505 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6506 nexthdr = hdr.ipv4->protocol;
6507 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6508 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6511 /* record next protocol */
6512 nexthdr = hdr.ipv6->nexthdr;
6513 hlen = sizeof(struct ipv6hdr);
6515 return hdr.network - data;
6518 /* relocate pointer to start of L4 header */
6519 hdr.network += hlen;
6521 /* finally sort out TCP */
6522 if (nexthdr == IPPROTO_TCP) {
6523 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6526 /* access doff as a u8 to avoid unaligned access on ia64 */
6527 hlen = (hdr.network[12] & 0xF0) >> 2;
6529 /* verify hlen meets minimum size requirements */
6530 if (hlen < sizeof(struct tcphdr))
6531 return hdr.network - data;
6533 hdr.network += hlen;
6534 } else if (nexthdr == IPPROTO_UDP) {
6535 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6538 hdr.network += sizeof(struct udphdr);
6541 /* If everything has gone correctly hdr.network should be the
6542 * data section of the packet and will be the end of the header.
6543 * If not then it probably represents the end of the last recognized
6546 if ((hdr.network - data) < max_len)
6547 return hdr.network - data;
6553 * igb_pull_tail - igb specific version of skb_pull_tail
6554 * @rx_ring: rx descriptor ring packet is being transacted on
6555 * @rx_desc: pointer to the EOP Rx descriptor
6556 * @skb: pointer to current skb being adjusted
6558 * This function is an igb specific version of __pskb_pull_tail. The
6559 * main difference between this version and the original function is that
6560 * this function can make several assumptions about the state of things
6561 * that allow for significant optimizations versus the standard function.
6562 * As a result we can do things like drop a frag and maintain an accurate
6563 * truesize for the skb.
6565 static void igb_pull_tail(struct igb_ring *rx_ring,
6566 union e1000_adv_rx_desc *rx_desc,
6567 struct sk_buff *skb)
6569 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6571 unsigned int pull_len;
6573 /* it is valid to use page_address instead of kmap since we are
6574 * working with pages allocated out of the lomem pool per
6575 * alloc_page(GFP_ATOMIC)
6577 va = skb_frag_address(frag);
6579 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6580 /* retrieve timestamp from buffer */
6581 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6583 /* update pointers to remove timestamp header */
6584 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6585 frag->page_offset += IGB_TS_HDR_LEN;
6586 skb->data_len -= IGB_TS_HDR_LEN;
6587 skb->len -= IGB_TS_HDR_LEN;
6589 /* move va to start of packet data */
6590 va += IGB_TS_HDR_LEN;
6593 /* we need the header to contain the greater of either ETH_HLEN or
6594 * 60 bytes if the skb->len is less than 60 for skb_pad.
6596 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6598 /* align pull length to size of long to optimize memcpy performance */
6599 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6601 /* update all of the pointers */
6602 skb_frag_size_sub(frag, pull_len);
6603 frag->page_offset += pull_len;
6604 skb->data_len -= pull_len;
6605 skb->tail += pull_len;
6609 * igb_cleanup_headers - Correct corrupted or empty headers
6610 * @rx_ring: rx descriptor ring packet is being transacted on
6611 * @rx_desc: pointer to the EOP Rx descriptor
6612 * @skb: pointer to current skb being fixed
6614 * Address the case where we are pulling data in on pages only
6615 * and as such no data is present in the skb header.
6617 * In addition if skb is not at least 60 bytes we need to pad it so that
6618 * it is large enough to qualify as a valid Ethernet frame.
6620 * Returns true if an error was encountered and skb was freed.
6622 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6623 union e1000_adv_rx_desc *rx_desc,
6624 struct sk_buff *skb)
6626 if (unlikely((igb_test_staterr(rx_desc,
6627 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6628 struct net_device *netdev = rx_ring->netdev;
6629 if (!(netdev->features & NETIF_F_RXALL)) {
6630 dev_kfree_skb_any(skb);
6635 /* place header in linear portion of buffer */
6636 if (skb_is_nonlinear(skb))
6637 igb_pull_tail(rx_ring, rx_desc, skb);
6639 /* if skb_pad returns an error the skb was freed */
6640 if (unlikely(skb->len < 60)) {
6641 int pad_len = 60 - skb->len;
6643 if (skb_pad(skb, pad_len))
6645 __skb_put(skb, pad_len);
6652 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6653 * @rx_ring: rx descriptor ring packet is being transacted on
6654 * @rx_desc: pointer to the EOP Rx descriptor
6655 * @skb: pointer to current skb being populated
6657 * This function checks the ring, descriptor, and packet information in
6658 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6659 * other fields within the skb.
6661 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6662 union e1000_adv_rx_desc *rx_desc,
6663 struct sk_buff *skb)
6665 struct net_device *dev = rx_ring->netdev;
6667 igb_rx_hash(rx_ring, rx_desc, skb);
6669 igb_rx_checksum(rx_ring, rx_desc, skb);
6671 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
6673 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6674 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6676 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6677 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6678 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6680 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6682 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6685 skb_record_rx_queue(skb, rx_ring->queue_index);
6687 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6690 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6692 struct igb_ring *rx_ring = q_vector->rx.ring;
6693 struct sk_buff *skb = rx_ring->skb;
6694 unsigned int total_bytes = 0, total_packets = 0;
6695 u16 cleaned_count = igb_desc_unused(rx_ring);
6698 union e1000_adv_rx_desc *rx_desc;
6700 /* return some buffers to hardware, one at a time is too slow */
6701 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6702 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6706 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6708 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6711 /* This memory barrier is needed to keep us from reading
6712 * any other fields out of the rx_desc until we know the
6713 * RXD_STAT_DD bit is set
6717 /* retrieve a buffer from the ring */
6718 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6720 /* exit if we failed to retrieve a buffer */
6726 /* fetch next buffer in frame if non-eop */
6727 if (igb_is_non_eop(rx_ring, rx_desc))
6730 /* verify the packet layout is correct */
6731 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6736 /* probably a little skewed due to removing CRC */
6737 total_bytes += skb->len;
6739 /* populate checksum, timestamp, VLAN, and protocol */
6740 igb_process_skb_fields(rx_ring, rx_desc, skb);
6742 napi_gro_receive(&q_vector->napi, skb);
6744 /* reset skb pointer */
6747 /* update budget accounting */
6749 } while (likely(total_packets < budget));
6751 /* place incomplete frames back on ring for completion */
6754 u64_stats_update_begin(&rx_ring->rx_syncp);
6755 rx_ring->rx_stats.packets += total_packets;
6756 rx_ring->rx_stats.bytes += total_bytes;
6757 u64_stats_update_end(&rx_ring->rx_syncp);
6758 q_vector->rx.total_packets += total_packets;
6759 q_vector->rx.total_bytes += total_bytes;
6762 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6764 return (total_packets < budget);
6767 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6768 struct igb_rx_buffer *bi)
6770 struct page *page = bi->page;
6773 /* since we are recycling buffers we should seldom need to alloc */
6777 /* alloc new page for storage */
6778 page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6779 if (unlikely(!page)) {
6780 rx_ring->rx_stats.alloc_failed++;
6784 /* map page for use */
6785 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6787 /* if mapping failed free memory back to system since
6788 * there isn't much point in holding memory we can't use
6790 if (dma_mapping_error(rx_ring->dev, dma)) {
6793 rx_ring->rx_stats.alloc_failed++;
6799 bi->page_offset = 0;
6805 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6806 * @adapter: address of board private structure
6808 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6810 union e1000_adv_rx_desc *rx_desc;
6811 struct igb_rx_buffer *bi;
6812 u16 i = rx_ring->next_to_use;
6818 rx_desc = IGB_RX_DESC(rx_ring, i);
6819 bi = &rx_ring->rx_buffer_info[i];
6820 i -= rx_ring->count;
6823 if (!igb_alloc_mapped_page(rx_ring, bi))
6826 /* Refresh the desc even if buffer_addrs didn't change
6827 * because each write-back erases this info.
6829 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6835 rx_desc = IGB_RX_DESC(rx_ring, 0);
6836 bi = rx_ring->rx_buffer_info;
6837 i -= rx_ring->count;
6840 /* clear the hdr_addr for the next_to_use descriptor */
6841 rx_desc->read.hdr_addr = 0;
6844 } while (cleaned_count);
6846 i += rx_ring->count;
6848 if (rx_ring->next_to_use != i) {
6849 /* record the next descriptor to use */
6850 rx_ring->next_to_use = i;
6852 /* update next to alloc since we have filled the ring */
6853 rx_ring->next_to_alloc = i;
6855 /* Force memory writes to complete before letting h/w
6856 * know there are new descriptors to fetch. (Only
6857 * applicable for weak-ordered memory model archs,
6861 writel(i, rx_ring->tail);
6871 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6873 struct igb_adapter *adapter = netdev_priv(netdev);
6874 struct mii_ioctl_data *data = if_mii(ifr);
6876 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6881 data->phy_id = adapter->hw.phy.addr;
6884 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6901 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6907 return igb_mii_ioctl(netdev, ifr, cmd);
6909 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6915 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6917 struct igb_adapter *adapter = hw->back;
6919 if (pcie_capability_read_word(adapter->pdev, reg, value))
6920 return -E1000_ERR_CONFIG;
6925 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6927 struct igb_adapter *adapter = hw->back;
6929 if (pcie_capability_write_word(adapter->pdev, reg, *value))
6930 return -E1000_ERR_CONFIG;
6935 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6937 struct igb_adapter *adapter = netdev_priv(netdev);
6938 struct e1000_hw *hw = &adapter->hw;
6940 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
6943 /* enable VLAN tag insert/strip */
6944 ctrl = rd32(E1000_CTRL);
6945 ctrl |= E1000_CTRL_VME;
6946 wr32(E1000_CTRL, ctrl);
6948 /* Disable CFI check */
6949 rctl = rd32(E1000_RCTL);
6950 rctl &= ~E1000_RCTL_CFIEN;
6951 wr32(E1000_RCTL, rctl);
6953 /* disable VLAN tag insert/strip */
6954 ctrl = rd32(E1000_CTRL);
6955 ctrl &= ~E1000_CTRL_VME;
6956 wr32(E1000_CTRL, ctrl);
6959 igb_rlpml_set(adapter);
6962 static int igb_vlan_rx_add_vid(struct net_device *netdev,
6963 __be16 proto, u16 vid)
6965 struct igb_adapter *adapter = netdev_priv(netdev);
6966 struct e1000_hw *hw = &adapter->hw;
6967 int pf_id = adapter->vfs_allocated_count;
6969 /* attempt to add filter to vlvf array */
6970 igb_vlvf_set(adapter, vid, true, pf_id);
6972 /* add the filter since PF can receive vlans w/o entry in vlvf */
6973 igb_vfta_set(hw, vid, true);
6975 set_bit(vid, adapter->active_vlans);
6980 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
6981 __be16 proto, u16 vid)
6983 struct igb_adapter *adapter = netdev_priv(netdev);
6984 struct e1000_hw *hw = &adapter->hw;
6985 int pf_id = adapter->vfs_allocated_count;
6988 /* remove vlan from VLVF table array */
6989 err = igb_vlvf_set(adapter, vid, false, pf_id);
6991 /* if vid was not present in VLVF just remove it from table */
6993 igb_vfta_set(hw, vid, false);
6995 clear_bit(vid, adapter->active_vlans);
7000 static void igb_restore_vlan(struct igb_adapter *adapter)
7004 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7006 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7007 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7010 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7012 struct pci_dev *pdev = adapter->pdev;
7013 struct e1000_mac_info *mac = &adapter->hw.mac;
7017 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7018 * for the switch() below to work
7020 if ((spd & 1) || (dplx & ~1))
7023 /* Fiber NIC's only allow 1000 gbps Full duplex
7024 * and 100Mbps Full duplex for 100baseFx sfp
7026 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7027 switch (spd + dplx) {
7028 case SPEED_10 + DUPLEX_HALF:
7029 case SPEED_10 + DUPLEX_FULL:
7030 case SPEED_100 + DUPLEX_HALF:
7037 switch (spd + dplx) {
7038 case SPEED_10 + DUPLEX_HALF:
7039 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7041 case SPEED_10 + DUPLEX_FULL:
7042 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7044 case SPEED_100 + DUPLEX_HALF:
7045 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7047 case SPEED_100 + DUPLEX_FULL:
7048 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7050 case SPEED_1000 + DUPLEX_FULL:
7052 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7054 case SPEED_1000 + DUPLEX_HALF: /* not supported */
7059 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7060 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7065 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7069 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7072 struct net_device *netdev = pci_get_drvdata(pdev);
7073 struct igb_adapter *adapter = netdev_priv(netdev);
7074 struct e1000_hw *hw = &adapter->hw;
7075 u32 ctrl, rctl, status;
7076 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7081 netif_device_detach(netdev);
7083 if (netif_running(netdev))
7084 __igb_close(netdev, true);
7086 igb_clear_interrupt_scheme(adapter);
7089 retval = pci_save_state(pdev);
7094 status = rd32(E1000_STATUS);
7095 if (status & E1000_STATUS_LU)
7096 wufc &= ~E1000_WUFC_LNKC;
7099 igb_setup_rctl(adapter);
7100 igb_set_rx_mode(netdev);
7102 /* turn on all-multi mode if wake on multicast is enabled */
7103 if (wufc & E1000_WUFC_MC) {
7104 rctl = rd32(E1000_RCTL);
7105 rctl |= E1000_RCTL_MPE;
7106 wr32(E1000_RCTL, rctl);
7109 ctrl = rd32(E1000_CTRL);
7110 /* advertise wake from D3Cold */
7111 #define E1000_CTRL_ADVD3WUC 0x00100000
7112 /* phy power management enable */
7113 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7114 ctrl |= E1000_CTRL_ADVD3WUC;
7115 wr32(E1000_CTRL, ctrl);
7117 /* Allow time for pending master requests to run */
7118 igb_disable_pcie_master(hw);
7120 wr32(E1000_WUC, E1000_WUC_PME_EN);
7121 wr32(E1000_WUFC, wufc);
7124 wr32(E1000_WUFC, 0);
7127 *enable_wake = wufc || adapter->en_mng_pt;
7129 igb_power_down_link(adapter);
7131 igb_power_up_link(adapter);
7133 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7134 * would have already happened in close and is redundant.
7136 igb_release_hw_control(adapter);
7138 pci_disable_device(pdev);
7144 #ifdef CONFIG_PM_SLEEP
7145 static int igb_suspend(struct device *dev)
7149 struct pci_dev *pdev = to_pci_dev(dev);
7151 retval = __igb_shutdown(pdev, &wake, 0);
7156 pci_prepare_to_sleep(pdev);
7158 pci_wake_from_d3(pdev, false);
7159 pci_set_power_state(pdev, PCI_D3hot);
7164 #endif /* CONFIG_PM_SLEEP */
7166 static int igb_resume(struct device *dev)
7168 struct pci_dev *pdev = to_pci_dev(dev);
7169 struct net_device *netdev = pci_get_drvdata(pdev);
7170 struct igb_adapter *adapter = netdev_priv(netdev);
7171 struct e1000_hw *hw = &adapter->hw;
7174 pci_set_power_state(pdev, PCI_D0);
7175 pci_restore_state(pdev);
7176 pci_save_state(pdev);
7178 err = pci_enable_device_mem(pdev);
7181 "igb: Cannot enable PCI device from suspend\n");
7184 pci_set_master(pdev);
7186 pci_enable_wake(pdev, PCI_D3hot, 0);
7187 pci_enable_wake(pdev, PCI_D3cold, 0);
7189 if (igb_init_interrupt_scheme(adapter, true)) {
7190 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7196 /* let the f/w know that the h/w is now under the control of the
7199 igb_get_hw_control(adapter);
7201 wr32(E1000_WUS, ~0);
7203 if (netdev->flags & IFF_UP) {
7205 err = __igb_open(netdev, true);
7211 netif_device_attach(netdev);
7215 #ifdef CONFIG_PM_RUNTIME
7216 static int igb_runtime_idle(struct device *dev)
7218 struct pci_dev *pdev = to_pci_dev(dev);
7219 struct net_device *netdev = pci_get_drvdata(pdev);
7220 struct igb_adapter *adapter = netdev_priv(netdev);
7222 if (!igb_has_link(adapter))
7223 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7228 static int igb_runtime_suspend(struct device *dev)
7230 struct pci_dev *pdev = to_pci_dev(dev);
7234 retval = __igb_shutdown(pdev, &wake, 1);
7239 pci_prepare_to_sleep(pdev);
7241 pci_wake_from_d3(pdev, false);
7242 pci_set_power_state(pdev, PCI_D3hot);
7248 static int igb_runtime_resume(struct device *dev)
7250 return igb_resume(dev);
7252 #endif /* CONFIG_PM_RUNTIME */
7255 static void igb_shutdown(struct pci_dev *pdev)
7259 __igb_shutdown(pdev, &wake, 0);
7261 if (system_state == SYSTEM_POWER_OFF) {
7262 pci_wake_from_d3(pdev, wake);
7263 pci_set_power_state(pdev, PCI_D3hot);
7267 #ifdef CONFIG_PCI_IOV
7268 static int igb_sriov_reinit(struct pci_dev *dev)
7270 struct net_device *netdev = pci_get_drvdata(dev);
7271 struct igb_adapter *adapter = netdev_priv(netdev);
7272 struct pci_dev *pdev = adapter->pdev;
7276 if (netif_running(netdev))
7279 igb_clear_interrupt_scheme(adapter);
7281 igb_init_queue_configuration(adapter);
7283 if (igb_init_interrupt_scheme(adapter, true)) {
7284 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7288 if (netif_running(netdev))
7296 static int igb_pci_disable_sriov(struct pci_dev *dev)
7298 int err = igb_disable_sriov(dev);
7301 err = igb_sriov_reinit(dev);
7306 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7308 int err = igb_enable_sriov(dev, num_vfs);
7313 err = igb_sriov_reinit(dev);
7322 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7324 #ifdef CONFIG_PCI_IOV
7326 return igb_pci_disable_sriov(dev);
7328 return igb_pci_enable_sriov(dev, num_vfs);
7333 #ifdef CONFIG_NET_POLL_CONTROLLER
7334 /* Polling 'interrupt' - used by things like netconsole to send skbs
7335 * without having to re-enable interrupts. It's not called while
7336 * the interrupt routine is executing.
7338 static void igb_netpoll(struct net_device *netdev)
7340 struct igb_adapter *adapter = netdev_priv(netdev);
7341 struct e1000_hw *hw = &adapter->hw;
7342 struct igb_q_vector *q_vector;
7345 for (i = 0; i < adapter->num_q_vectors; i++) {
7346 q_vector = adapter->q_vector[i];
7347 if (adapter->msix_entries)
7348 wr32(E1000_EIMC, q_vector->eims_value);
7350 igb_irq_disable(adapter);
7351 napi_schedule(&q_vector->napi);
7354 #endif /* CONFIG_NET_POLL_CONTROLLER */
7357 * igb_io_error_detected - called when PCI error is detected
7358 * @pdev: Pointer to PCI device
7359 * @state: The current pci connection state
7361 * This function is called after a PCI bus error affecting
7362 * this device has been detected.
7364 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7365 pci_channel_state_t state)
7367 struct net_device *netdev = pci_get_drvdata(pdev);
7368 struct igb_adapter *adapter = netdev_priv(netdev);
7370 netif_device_detach(netdev);
7372 if (state == pci_channel_io_perm_failure)
7373 return PCI_ERS_RESULT_DISCONNECT;
7375 if (netif_running(netdev))
7377 pci_disable_device(pdev);
7379 /* Request a slot slot reset. */
7380 return PCI_ERS_RESULT_NEED_RESET;
7384 * igb_io_slot_reset - called after the pci bus has been reset.
7385 * @pdev: Pointer to PCI device
7387 * Restart the card from scratch, as if from a cold-boot. Implementation
7388 * resembles the first-half of the igb_resume routine.
7390 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7392 struct net_device *netdev = pci_get_drvdata(pdev);
7393 struct igb_adapter *adapter = netdev_priv(netdev);
7394 struct e1000_hw *hw = &adapter->hw;
7395 pci_ers_result_t result;
7398 if (pci_enable_device_mem(pdev)) {
7400 "Cannot re-enable PCI device after reset.\n");
7401 result = PCI_ERS_RESULT_DISCONNECT;
7403 pci_set_master(pdev);
7404 pci_restore_state(pdev);
7405 pci_save_state(pdev);
7407 pci_enable_wake(pdev, PCI_D3hot, 0);
7408 pci_enable_wake(pdev, PCI_D3cold, 0);
7411 wr32(E1000_WUS, ~0);
7412 result = PCI_ERS_RESULT_RECOVERED;
7415 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7418 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7420 /* non-fatal, continue */
7427 * igb_io_resume - called when traffic can start flowing again.
7428 * @pdev: Pointer to PCI device
7430 * This callback is called when the error recovery driver tells us that
7431 * its OK to resume normal operation. Implementation resembles the
7432 * second-half of the igb_resume routine.
7434 static void igb_io_resume(struct pci_dev *pdev)
7436 struct net_device *netdev = pci_get_drvdata(pdev);
7437 struct igb_adapter *adapter = netdev_priv(netdev);
7439 if (netif_running(netdev)) {
7440 if (igb_up(adapter)) {
7441 dev_err(&pdev->dev, "igb_up failed after reset\n");
7446 netif_device_attach(netdev);
7448 /* let the f/w know that the h/w is now under the control of the
7451 igb_get_hw_control(adapter);
7454 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7457 u32 rar_low, rar_high;
7458 struct e1000_hw *hw = &adapter->hw;
7460 /* HW expects these in little endian so we reverse the byte order
7461 * from network order (big endian) to little endian
7463 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7464 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7465 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7467 /* Indicate to hardware the Address is Valid. */
7468 rar_high |= E1000_RAH_AV;
7470 if (hw->mac.type == e1000_82575)
7471 rar_high |= E1000_RAH_POOL_1 * qsel;
7473 rar_high |= E1000_RAH_POOL_1 << qsel;
7475 wr32(E1000_RAL(index), rar_low);
7477 wr32(E1000_RAH(index), rar_high);
7481 static int igb_set_vf_mac(struct igb_adapter *adapter,
7482 int vf, unsigned char *mac_addr)
7484 struct e1000_hw *hw = &adapter->hw;
7485 /* VF MAC addresses start at end of receive addresses and moves
7486 * towards the first, as a result a collision should not be possible
7488 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7490 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7492 igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7497 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7499 struct igb_adapter *adapter = netdev_priv(netdev);
7500 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7502 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7503 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7504 dev_info(&adapter->pdev->dev,
7505 "Reload the VF driver to make this change effective.");
7506 if (test_bit(__IGB_DOWN, &adapter->state)) {
7507 dev_warn(&adapter->pdev->dev,
7508 "The VF MAC address has been set, but the PF device is not up.\n");
7509 dev_warn(&adapter->pdev->dev,
7510 "Bring the PF device up before attempting to use the VF device.\n");
7512 return igb_set_vf_mac(adapter, vf, mac);
7515 static int igb_link_mbps(int internal_link_speed)
7517 switch (internal_link_speed) {
7527 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7534 /* Calculate the rate factor values to set */
7535 rf_int = link_speed / tx_rate;
7536 rf_dec = (link_speed - (rf_int * tx_rate));
7537 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7540 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7541 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7542 E1000_RTTBCNRC_RF_INT_MASK);
7543 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7548 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7549 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7550 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7552 wr32(E1000_RTTBCNRM, 0x14);
7553 wr32(E1000_RTTBCNRC, bcnrc_val);
7556 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7558 int actual_link_speed, i;
7559 bool reset_rate = false;
7561 /* VF TX rate limit was not set or not supported */
7562 if ((adapter->vf_rate_link_speed == 0) ||
7563 (adapter->hw.mac.type != e1000_82576))
7566 actual_link_speed = igb_link_mbps(adapter->link_speed);
7567 if (actual_link_speed != adapter->vf_rate_link_speed) {
7569 adapter->vf_rate_link_speed = 0;
7570 dev_info(&adapter->pdev->dev,
7571 "Link speed has been changed. VF Transmit rate is disabled\n");
7574 for (i = 0; i < adapter->vfs_allocated_count; i++) {
7576 adapter->vf_data[i].tx_rate = 0;
7578 igb_set_vf_rate_limit(&adapter->hw, i,
7579 adapter->vf_data[i].tx_rate,
7584 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7586 struct igb_adapter *adapter = netdev_priv(netdev);
7587 struct e1000_hw *hw = &adapter->hw;
7588 int actual_link_speed;
7590 if (hw->mac.type != e1000_82576)
7593 actual_link_speed = igb_link_mbps(adapter->link_speed);
7594 if ((vf >= adapter->vfs_allocated_count) ||
7595 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7596 (tx_rate < 0) || (tx_rate > actual_link_speed))
7599 adapter->vf_rate_link_speed = actual_link_speed;
7600 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7601 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7606 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7609 struct igb_adapter *adapter = netdev_priv(netdev);
7610 struct e1000_hw *hw = &adapter->hw;
7611 u32 reg_val, reg_offset;
7613 if (!adapter->vfs_allocated_count)
7616 if (vf >= adapter->vfs_allocated_count)
7619 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7620 reg_val = rd32(reg_offset);
7622 reg_val |= ((1 << vf) |
7623 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7625 reg_val &= ~((1 << vf) |
7626 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7627 wr32(reg_offset, reg_val);
7629 adapter->vf_data[vf].spoofchk_enabled = setting;
7630 return E1000_SUCCESS;
7633 static int igb_ndo_get_vf_config(struct net_device *netdev,
7634 int vf, struct ifla_vf_info *ivi)
7636 struct igb_adapter *adapter = netdev_priv(netdev);
7637 if (vf >= adapter->vfs_allocated_count)
7640 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7641 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7642 ivi->vlan = adapter->vf_data[vf].pf_vlan;
7643 ivi->qos = adapter->vf_data[vf].pf_qos;
7644 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7648 static void igb_vmm_control(struct igb_adapter *adapter)
7650 struct e1000_hw *hw = &adapter->hw;
7653 switch (hw->mac.type) {
7659 /* replication is not supported for 82575 */
7662 /* notify HW that the MAC is adding vlan tags */
7663 reg = rd32(E1000_DTXCTL);
7664 reg |= E1000_DTXCTL_VLAN_ADDED;
7665 wr32(E1000_DTXCTL, reg);
7667 /* enable replication vlan tag stripping */
7668 reg = rd32(E1000_RPLOLR);
7669 reg |= E1000_RPLOLR_STRVLAN;
7670 wr32(E1000_RPLOLR, reg);
7672 /* none of the above registers are supported by i350 */
7676 if (adapter->vfs_allocated_count) {
7677 igb_vmdq_set_loopback_pf(hw, true);
7678 igb_vmdq_set_replication_pf(hw, true);
7679 igb_vmdq_set_anti_spoofing_pf(hw, true,
7680 adapter->vfs_allocated_count);
7682 igb_vmdq_set_loopback_pf(hw, false);
7683 igb_vmdq_set_replication_pf(hw, false);
7687 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7689 struct e1000_hw *hw = &adapter->hw;
7693 if (hw->mac.type > e1000_82580) {
7694 if (adapter->flags & IGB_FLAG_DMAC) {
7697 /* force threshold to 0. */
7698 wr32(E1000_DMCTXTH, 0);
7700 /* DMA Coalescing high water mark needs to be greater
7701 * than the Rx threshold. Set hwm to PBA - max frame
7702 * size in 16B units, capping it at PBA - 6KB.
7704 hwm = 64 * pba - adapter->max_frame_size / 16;
7705 if (hwm < 64 * (pba - 6))
7706 hwm = 64 * (pba - 6);
7707 reg = rd32(E1000_FCRTC);
7708 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7709 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7710 & E1000_FCRTC_RTH_COAL_MASK);
7711 wr32(E1000_FCRTC, reg);
7713 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7714 * frame size, capping it at PBA - 10KB.
7716 dmac_thr = pba - adapter->max_frame_size / 512;
7717 if (dmac_thr < pba - 10)
7718 dmac_thr = pba - 10;
7719 reg = rd32(E1000_DMACR);
7720 reg &= ~E1000_DMACR_DMACTHR_MASK;
7721 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7722 & E1000_DMACR_DMACTHR_MASK);
7724 /* transition to L0x or L1 if available..*/
7725 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7727 /* watchdog timer= +-1000 usec in 32usec intervals */
7730 /* Disable BMC-to-OS Watchdog Enable */
7731 if (hw->mac.type != e1000_i354)
7732 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7734 wr32(E1000_DMACR, reg);
7736 /* no lower threshold to disable
7737 * coalescing(smart fifb)-UTRESH=0
7739 wr32(E1000_DMCRTRH, 0);
7741 reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7743 wr32(E1000_DMCTLX, reg);
7745 /* free space in tx packet buffer to wake from
7748 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7749 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7751 /* make low power state decision controlled
7754 reg = rd32(E1000_PCIEMISC);
7755 reg &= ~E1000_PCIEMISC_LX_DECISION;
7756 wr32(E1000_PCIEMISC, reg);
7757 } /* endif adapter->dmac is not disabled */
7758 } else if (hw->mac.type == e1000_82580) {
7759 u32 reg = rd32(E1000_PCIEMISC);
7760 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7761 wr32(E1000_DMACR, 0);
7766 * igb_read_i2c_byte - Reads 8 bit word over I2C
7767 * @hw: pointer to hardware structure
7768 * @byte_offset: byte offset to read
7769 * @dev_addr: device address
7772 * Performs byte read operation over I2C interface at
7773 * a specified device address.
7775 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7776 u8 dev_addr, u8 *data)
7778 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7779 struct i2c_client *this_client = adapter->i2c_client;
7784 return E1000_ERR_I2C;
7786 swfw_mask = E1000_SWFW_PHY0_SM;
7788 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7790 return E1000_ERR_SWFW_SYNC;
7792 status = i2c_smbus_read_byte_data(this_client, byte_offset);
7793 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7796 return E1000_ERR_I2C;
7799 return E1000_SUCCESS;
7804 * igb_write_i2c_byte - Writes 8 bit word over I2C
7805 * @hw: pointer to hardware structure
7806 * @byte_offset: byte offset to write
7807 * @dev_addr: device address
7808 * @data: value to write
7810 * Performs byte write operation over I2C interface at
7811 * a specified device address.
7813 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7814 u8 dev_addr, u8 data)
7816 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7817 struct i2c_client *this_client = adapter->i2c_client;
7819 u16 swfw_mask = E1000_SWFW_PHY0_SM;
7822 return E1000_ERR_I2C;
7824 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7825 return E1000_ERR_SWFW_SYNC;
7826 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7827 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7830 return E1000_ERR_I2C;
7832 return E1000_SUCCESS;