1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for ixgbe */
30 #include <linux/interrupt.h>
31 #include <linux/types.h>
32 #include <linux/module.h>
33 #include <linux/slab.h>
34 #include <linux/pci.h>
35 #include <linux/netdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/vmalloc.h>
38 #include <linux/uaccess.h>
43 #define IXGBE_ALL_RAR_ENTRIES 16
45 enum {NETDEV_STATS, IXGBE_STATS};
48 char stat_string[ETH_GSTRING_LEN];
54 #define IXGBE_STAT(m) IXGBE_STATS, \
55 sizeof(((struct ixgbe_adapter *)0)->m), \
56 offsetof(struct ixgbe_adapter, m)
57 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \
58 sizeof(((struct rtnl_link_stats64 *)0)->m), \
59 offsetof(struct rtnl_link_stats64, m)
61 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
62 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
63 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
64 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
65 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
66 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
67 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
68 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
69 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
70 {"lsc_int", IXGBE_STAT(lsc_int)},
71 {"tx_busy", IXGBE_STAT(tx_busy)},
72 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
73 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
74 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
75 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
76 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
77 {"multicast", IXGBE_NETDEV_STAT(multicast)},
78 {"broadcast", IXGBE_STAT(stats.bprc)},
79 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
80 {"collisions", IXGBE_NETDEV_STAT(collisions)},
81 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
82 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
83 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
84 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
85 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
86 {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
87 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
88 {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
89 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
90 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
91 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
92 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
93 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
94 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
95 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
96 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
97 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
98 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
99 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
100 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
101 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
102 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
103 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
104 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
105 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
106 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
107 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
108 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
109 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
110 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
112 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
113 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
114 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
115 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
116 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
117 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
118 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
119 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
120 #endif /* IXGBE_FCOE */
123 #define IXGBE_QUEUE_STATS_LEN \
124 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
125 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
126 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
127 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
128 #define IXGBE_PB_STATS_LEN ( \
129 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
130 IXGBE_FLAG_DCB_ENABLED) ? \
131 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
132 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
133 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
134 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
136 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
137 IXGBE_PB_STATS_LEN + \
138 IXGBE_QUEUE_STATS_LEN)
140 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
141 "Register test (offline)", "Eeprom test (offline)",
142 "Interrupt test (offline)", "Loopback test (offline)",
143 "Link test (on/offline)"
145 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
147 static int ixgbe_get_settings(struct net_device *netdev,
148 struct ethtool_cmd *ecmd)
150 struct ixgbe_adapter *adapter = netdev_priv(netdev);
151 struct ixgbe_hw *hw = &adapter->hw;
155 ecmd->supported = SUPPORTED_10000baseT_Full;
156 ecmd->autoneg = AUTONEG_ENABLE;
157 ecmd->transceiver = XCVR_EXTERNAL;
158 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
159 (hw->phy.multispeed_fiber)) {
160 ecmd->supported |= (SUPPORTED_1000baseT_Full |
163 switch (hw->mac.type) {
165 ecmd->supported |= SUPPORTED_100baseT_Full;
171 ecmd->advertising = ADVERTISED_Autoneg;
172 if (hw->phy.autoneg_advertised) {
173 if (hw->phy.autoneg_advertised &
174 IXGBE_LINK_SPEED_100_FULL)
175 ecmd->advertising |= ADVERTISED_100baseT_Full;
176 if (hw->phy.autoneg_advertised &
177 IXGBE_LINK_SPEED_10GB_FULL)
178 ecmd->advertising |= ADVERTISED_10000baseT_Full;
179 if (hw->phy.autoneg_advertised &
180 IXGBE_LINK_SPEED_1GB_FULL)
181 ecmd->advertising |= ADVERTISED_1000baseT_Full;
184 * Default advertised modes in case
185 * phy.autoneg_advertised isn't set.
187 ecmd->advertising |= (ADVERTISED_10000baseT_Full |
188 ADVERTISED_1000baseT_Full);
189 if (hw->mac.type == ixgbe_mac_X540)
190 ecmd->advertising |= ADVERTISED_100baseT_Full;
193 if (hw->phy.media_type == ixgbe_media_type_copper) {
194 ecmd->supported |= SUPPORTED_TP;
195 ecmd->advertising |= ADVERTISED_TP;
196 ecmd->port = PORT_TP;
198 ecmd->supported |= SUPPORTED_FIBRE;
199 ecmd->advertising |= ADVERTISED_FIBRE;
200 ecmd->port = PORT_FIBRE;
202 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
203 /* Set as FIBRE until SERDES defined in kernel */
204 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
205 ecmd->supported = (SUPPORTED_1000baseT_Full |
207 ecmd->advertising = (ADVERTISED_1000baseT_Full |
209 ecmd->port = PORT_FIBRE;
210 ecmd->autoneg = AUTONEG_DISABLE;
211 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
212 (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
213 ecmd->supported |= (SUPPORTED_1000baseT_Full |
216 ecmd->advertising = (ADVERTISED_10000baseT_Full |
217 ADVERTISED_1000baseT_Full |
220 ecmd->port = PORT_FIBRE;
222 ecmd->supported |= (SUPPORTED_1000baseT_Full |
224 ecmd->advertising = (ADVERTISED_10000baseT_Full |
225 ADVERTISED_1000baseT_Full |
227 ecmd->port = PORT_FIBRE;
230 ecmd->supported |= SUPPORTED_FIBRE;
231 ecmd->advertising = (ADVERTISED_10000baseT_Full |
233 ecmd->port = PORT_FIBRE;
234 ecmd->autoneg = AUTONEG_DISABLE;
238 switch (adapter->hw.phy.type) {
241 case ixgbe_phy_cu_unknown:
242 /* Copper 10G-BASET */
243 ecmd->port = PORT_TP;
246 ecmd->port = PORT_FIBRE;
249 case ixgbe_phy_sfp_passive_tyco:
250 case ixgbe_phy_sfp_passive_unknown:
251 case ixgbe_phy_sfp_ftl:
252 case ixgbe_phy_sfp_avago:
253 case ixgbe_phy_sfp_intel:
254 case ixgbe_phy_sfp_unknown:
255 switch (adapter->hw.phy.sfp_type) {
256 /* SFP+ devices, further checking needed */
257 case ixgbe_sfp_type_da_cu:
258 case ixgbe_sfp_type_da_cu_core0:
259 case ixgbe_sfp_type_da_cu_core1:
260 ecmd->port = PORT_DA;
262 case ixgbe_sfp_type_sr:
263 case ixgbe_sfp_type_lr:
264 case ixgbe_sfp_type_srlr_core0:
265 case ixgbe_sfp_type_srlr_core1:
266 ecmd->port = PORT_FIBRE;
268 case ixgbe_sfp_type_not_present:
269 ecmd->port = PORT_NONE;
271 case ixgbe_sfp_type_1g_cu_core0:
272 case ixgbe_sfp_type_1g_cu_core1:
273 ecmd->port = PORT_TP;
274 ecmd->supported = SUPPORTED_TP;
275 ecmd->advertising = (ADVERTISED_1000baseT_Full |
278 case ixgbe_sfp_type_unknown:
280 ecmd->port = PORT_OTHER;
285 ecmd->port = PORT_NONE;
287 case ixgbe_phy_unknown:
288 case ixgbe_phy_generic:
289 case ixgbe_phy_sfp_unsupported:
291 ecmd->port = PORT_OTHER;
295 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
297 switch (link_speed) {
298 case IXGBE_LINK_SPEED_10GB_FULL:
299 ethtool_cmd_speed_set(ecmd, SPEED_10000);
301 case IXGBE_LINK_SPEED_1GB_FULL:
302 ethtool_cmd_speed_set(ecmd, SPEED_1000);
304 case IXGBE_LINK_SPEED_100_FULL:
305 ethtool_cmd_speed_set(ecmd, SPEED_100);
310 ecmd->duplex = DUPLEX_FULL;
312 ethtool_cmd_speed_set(ecmd, -1);
319 static int ixgbe_set_settings(struct net_device *netdev,
320 struct ethtool_cmd *ecmd)
322 struct ixgbe_adapter *adapter = netdev_priv(netdev);
323 struct ixgbe_hw *hw = &adapter->hw;
327 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
328 (hw->phy.multispeed_fiber)) {
330 * this function does not support duplex forcing, but can
331 * limit the advertising of the adapter to the specified speed
333 if (ecmd->autoneg == AUTONEG_DISABLE)
336 if (ecmd->advertising & ~ecmd->supported)
339 old = hw->phy.autoneg_advertised;
341 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
342 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
344 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
345 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
347 if (ecmd->advertising & ADVERTISED_100baseT_Full)
348 advertised |= IXGBE_LINK_SPEED_100_FULL;
350 if (old == advertised)
352 /* this sets the link speed and restarts auto-neg */
353 hw->mac.autotry_restart = true;
354 err = hw->mac.ops.setup_link(hw, advertised, true, true);
356 e_info(probe, "setup link failed with code %d\n", err);
357 hw->mac.ops.setup_link(hw, old, true, true);
360 /* in this case we currently only support 10Gb/FULL */
361 u32 speed = ethtool_cmd_speed(ecmd);
362 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
363 (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
364 (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
371 static void ixgbe_get_pauseparam(struct net_device *netdev,
372 struct ethtool_pauseparam *pause)
374 struct ixgbe_adapter *adapter = netdev_priv(netdev);
375 struct ixgbe_hw *hw = &adapter->hw;
377 if (hw->fc.disable_fc_autoneg)
382 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
384 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
386 } else if (hw->fc.current_mode == ixgbe_fc_full) {
390 } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
397 static int ixgbe_set_pauseparam(struct net_device *netdev,
398 struct ethtool_pauseparam *pause)
400 struct ixgbe_adapter *adapter = netdev_priv(netdev);
401 struct ixgbe_hw *hw = &adapter->hw;
402 struct ixgbe_fc_info fc;
405 if (adapter->dcb_cfg.pfc_mode_enable ||
406 ((hw->mac.type == ixgbe_mac_82598EB) &&
407 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
413 if (pause->autoneg != AUTONEG_ENABLE)
414 fc.disable_fc_autoneg = true;
416 fc.disable_fc_autoneg = false;
418 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
419 fc.requested_mode = ixgbe_fc_full;
420 else if (pause->rx_pause && !pause->tx_pause)
421 fc.requested_mode = ixgbe_fc_rx_pause;
422 else if (!pause->rx_pause && pause->tx_pause)
423 fc.requested_mode = ixgbe_fc_tx_pause;
424 else if (!pause->rx_pause && !pause->tx_pause)
425 fc.requested_mode = ixgbe_fc_none;
430 adapter->last_lfc_mode = fc.requested_mode;
433 /* if the thing changed then we'll update and use new autoneg */
434 if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
436 if (netif_running(netdev))
437 ixgbe_reinit_locked(adapter);
439 ixgbe_reset(adapter);
445 static u32 ixgbe_get_msglevel(struct net_device *netdev)
447 struct ixgbe_adapter *adapter = netdev_priv(netdev);
448 return adapter->msg_enable;
451 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
453 struct ixgbe_adapter *adapter = netdev_priv(netdev);
454 adapter->msg_enable = data;
457 static int ixgbe_get_regs_len(struct net_device *netdev)
459 #define IXGBE_REGS_LEN 1129
460 return IXGBE_REGS_LEN * sizeof(u32);
463 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
465 static void ixgbe_get_regs(struct net_device *netdev,
466 struct ethtool_regs *regs, void *p)
468 struct ixgbe_adapter *adapter = netdev_priv(netdev);
469 struct ixgbe_hw *hw = &adapter->hw;
473 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
475 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
477 /* General Registers */
478 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
479 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
480 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
481 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
482 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
483 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
484 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
485 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
488 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
489 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
490 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
491 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
492 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
493 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
494 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
495 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
496 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
497 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
500 /* don't read EICR because it can clear interrupt causes, instead
501 * read EICS which is a shadow but doesn't clear EICR */
502 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
503 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
504 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
505 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
506 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
507 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
508 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
509 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
510 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
511 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
512 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
513 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
516 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
517 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
518 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
519 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
520 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
521 for (i = 0; i < 8; i++) {
522 switch (hw->mac.type) {
523 case ixgbe_mac_82598EB:
524 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
525 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
527 case ixgbe_mac_82599EB:
529 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
530 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
536 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
537 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
540 for (i = 0; i < 64; i++)
541 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
542 for (i = 0; i < 64; i++)
543 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
544 for (i = 0; i < 64; i++)
545 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
546 for (i = 0; i < 64; i++)
547 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
548 for (i = 0; i < 64; i++)
549 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
550 for (i = 0; i < 64; i++)
551 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
552 for (i = 0; i < 16; i++)
553 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
554 for (i = 0; i < 16; i++)
555 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
556 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
557 for (i = 0; i < 8; i++)
558 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
559 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
560 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
563 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
564 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
565 for (i = 0; i < 16; i++)
566 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
567 for (i = 0; i < 16; i++)
568 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
569 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
570 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
571 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
572 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
573 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
574 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
575 for (i = 0; i < 8; i++)
576 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
577 for (i = 0; i < 8; i++)
578 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
579 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
582 for (i = 0; i < 32; i++)
583 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
584 for (i = 0; i < 32; i++)
585 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
586 for (i = 0; i < 32; i++)
587 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
588 for (i = 0; i < 32; i++)
589 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
590 for (i = 0; i < 32; i++)
591 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
592 for (i = 0; i < 32; i++)
593 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
594 for (i = 0; i < 32; i++)
595 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
596 for (i = 0; i < 32; i++)
597 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
598 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
599 for (i = 0; i < 16; i++)
600 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
601 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
602 for (i = 0; i < 8; i++)
603 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
604 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
607 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
608 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
609 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
610 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
611 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
612 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
613 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
614 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
615 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
618 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
619 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
620 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
621 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
622 for (i = 0; i < 8; i++)
623 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
624 for (i = 0; i < 8; i++)
625 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
626 for (i = 0; i < 8; i++)
627 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
628 for (i = 0; i < 8; i++)
629 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
630 for (i = 0; i < 8; i++)
631 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
632 for (i = 0; i < 8; i++)
633 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
636 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
637 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
638 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
639 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
640 for (i = 0; i < 8; i++)
641 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
642 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
643 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
644 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
645 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
646 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
647 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
648 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
649 for (i = 0; i < 8; i++)
650 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
651 for (i = 0; i < 8; i++)
652 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
653 for (i = 0; i < 8; i++)
654 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
655 for (i = 0; i < 8; i++)
656 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
657 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
658 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
659 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
660 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
661 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
662 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
663 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
664 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
665 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
666 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
667 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
668 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
669 for (i = 0; i < 8; i++)
670 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
671 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
672 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
673 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
674 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
675 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
676 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
677 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
678 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
679 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
680 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
681 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
682 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
683 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
684 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
685 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
686 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
687 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
688 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
689 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
690 for (i = 0; i < 16; i++)
691 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
692 for (i = 0; i < 16; i++)
693 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
694 for (i = 0; i < 16; i++)
695 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
696 for (i = 0; i < 16; i++)
697 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
700 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
701 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
702 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
703 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
704 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
705 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
706 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
707 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
708 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
709 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
710 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
711 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
712 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
713 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
714 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
715 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
716 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
717 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
718 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
719 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
720 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
721 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
722 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
723 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
724 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
725 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
726 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
727 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
728 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
729 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
730 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
731 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
732 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
735 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
736 for (i = 0; i < 8; i++)
737 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
738 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
739 for (i = 0; i < 4; i++)
740 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
741 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
742 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
743 for (i = 0; i < 8; i++)
744 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
745 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
746 for (i = 0; i < 4; i++)
747 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
748 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
749 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
750 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
751 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
752 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
753 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
754 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
755 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
756 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
757 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
758 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
759 for (i = 0; i < 8; i++)
760 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
761 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
762 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
763 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
764 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
765 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
766 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
767 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
768 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
769 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
771 /* 82599 X540 specific registers */
772 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
775 static int ixgbe_get_eeprom_len(struct net_device *netdev)
777 struct ixgbe_adapter *adapter = netdev_priv(netdev);
778 return adapter->hw.eeprom.word_size * 2;
781 static int ixgbe_get_eeprom(struct net_device *netdev,
782 struct ethtool_eeprom *eeprom, u8 *bytes)
784 struct ixgbe_adapter *adapter = netdev_priv(netdev);
785 struct ixgbe_hw *hw = &adapter->hw;
787 int first_word, last_word, eeprom_len;
791 if (eeprom->len == 0)
794 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
796 first_word = eeprom->offset >> 1;
797 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
798 eeprom_len = last_word - first_word + 1;
800 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
804 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
807 /* Device's eeprom is always little-endian, word addressable */
808 for (i = 0; i < eeprom_len; i++)
809 le16_to_cpus(&eeprom_buff[i]);
811 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
817 static int ixgbe_set_eeprom(struct net_device *netdev,
818 struct ethtool_eeprom *eeprom, u8 *bytes)
820 struct ixgbe_adapter *adapter = netdev_priv(netdev);
821 struct ixgbe_hw *hw = &adapter->hw;
824 int max_len, first_word, last_word, ret_val = 0;
827 if (eeprom->len == 0)
830 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
833 max_len = hw->eeprom.word_size * 2;
835 first_word = eeprom->offset >> 1;
836 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
837 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
843 if (eeprom->offset & 1) {
845 * need read/modify/write of first changed EEPROM word
846 * only the second byte of the word is being modified
848 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
854 if ((eeprom->offset + eeprom->len) & 1) {
856 * need read/modify/write of last changed EEPROM word
857 * only the first byte of the word is being modified
859 ret_val = hw->eeprom.ops.read(hw, last_word,
860 &eeprom_buff[last_word - first_word]);
865 /* Device's eeprom is always little-endian, word addressable */
866 for (i = 0; i < last_word - first_word + 1; i++)
867 le16_to_cpus(&eeprom_buff[i]);
869 memcpy(ptr, bytes, eeprom->len);
871 for (i = 0; i < last_word - first_word + 1; i++)
872 cpu_to_le16s(&eeprom_buff[i]);
874 ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
875 last_word - first_word + 1,
878 /* Update the checksum */
880 hw->eeprom.ops.update_checksum(hw);
887 static void ixgbe_get_drvinfo(struct net_device *netdev,
888 struct ethtool_drvinfo *drvinfo)
890 struct ixgbe_adapter *adapter = netdev_priv(netdev);
891 char firmware_version[32];
893 strncpy(drvinfo->driver, ixgbe_driver_name,
894 sizeof(drvinfo->driver) - 1);
895 strncpy(drvinfo->version, ixgbe_driver_version,
896 sizeof(drvinfo->version) - 1);
898 snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
899 (adapter->eeprom_version & 0xF000) >> 12,
900 (adapter->eeprom_version & 0x0FF0) >> 4,
901 adapter->eeprom_version & 0x000F);
903 strncpy(drvinfo->fw_version, firmware_version,
904 sizeof(drvinfo->fw_version));
905 strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
906 sizeof(drvinfo->bus_info));
907 drvinfo->n_stats = IXGBE_STATS_LEN;
908 drvinfo->testinfo_len = IXGBE_TEST_LEN;
909 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
912 static void ixgbe_get_ringparam(struct net_device *netdev,
913 struct ethtool_ringparam *ring)
915 struct ixgbe_adapter *adapter = netdev_priv(netdev);
916 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
917 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
919 ring->rx_max_pending = IXGBE_MAX_RXD;
920 ring->tx_max_pending = IXGBE_MAX_TXD;
921 ring->rx_pending = rx_ring->count;
922 ring->tx_pending = tx_ring->count;
925 static int ixgbe_set_ringparam(struct net_device *netdev,
926 struct ethtool_ringparam *ring)
928 struct ixgbe_adapter *adapter = netdev_priv(netdev);
929 struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
931 u32 new_rx_count, new_tx_count;
932 bool need_update = false;
934 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
937 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
938 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
939 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
941 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
942 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
943 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
945 if ((new_tx_count == adapter->tx_ring[0]->count) &&
946 (new_rx_count == adapter->rx_ring[0]->count)) {
951 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
952 usleep_range(1000, 2000);
954 if (!netif_running(adapter->netdev)) {
955 for (i = 0; i < adapter->num_tx_queues; i++)
956 adapter->tx_ring[i]->count = new_tx_count;
957 for (i = 0; i < adapter->num_rx_queues; i++)
958 adapter->rx_ring[i]->count = new_rx_count;
959 adapter->tx_ring_count = new_tx_count;
960 adapter->rx_ring_count = new_rx_count;
964 temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
970 if (new_tx_count != adapter->tx_ring_count) {
971 for (i = 0; i < adapter->num_tx_queues; i++) {
972 memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
973 sizeof(struct ixgbe_ring));
974 temp_tx_ring[i].count = new_tx_count;
975 err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
979 ixgbe_free_tx_resources(&temp_tx_ring[i]);
987 temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
993 if (new_rx_count != adapter->rx_ring_count) {
994 for (i = 0; i < adapter->num_rx_queues; i++) {
995 memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
996 sizeof(struct ixgbe_ring));
997 temp_rx_ring[i].count = new_rx_count;
998 err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
1002 ixgbe_free_rx_resources(&temp_rx_ring[i]);
1010 /* if rings need to be updated, here's the place to do it in one shot */
1012 ixgbe_down(adapter);
1015 if (new_tx_count != adapter->tx_ring_count) {
1016 for (i = 0; i < adapter->num_tx_queues; i++) {
1017 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1018 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
1019 sizeof(struct ixgbe_ring));
1021 adapter->tx_ring_count = new_tx_count;
1025 if (new_rx_count != adapter->rx_ring_count) {
1026 for (i = 0; i < adapter->num_rx_queues; i++) {
1027 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1028 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
1029 sizeof(struct ixgbe_ring));
1031 adapter->rx_ring_count = new_rx_count;
1036 vfree(temp_rx_ring);
1038 vfree(temp_tx_ring);
1040 clear_bit(__IXGBE_RESETTING, &adapter->state);
1044 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1048 return IXGBE_TEST_LEN;
1050 return IXGBE_STATS_LEN;
1056 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1057 struct ethtool_stats *stats, u64 *data)
1059 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1060 struct rtnl_link_stats64 temp;
1061 const struct rtnl_link_stats64 *net_stats;
1063 struct ixgbe_ring *ring;
1067 ixgbe_update_stats(adapter);
1068 net_stats = dev_get_stats(netdev, &temp);
1069 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1070 switch (ixgbe_gstrings_stats[i].type) {
1072 p = (char *) net_stats +
1073 ixgbe_gstrings_stats[i].stat_offset;
1076 p = (char *) adapter +
1077 ixgbe_gstrings_stats[i].stat_offset;
1081 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1082 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1084 for (j = 0; j < adapter->num_tx_queues; j++) {
1085 ring = adapter->tx_ring[j];
1087 start = u64_stats_fetch_begin_bh(&ring->syncp);
1088 data[i] = ring->stats.packets;
1089 data[i+1] = ring->stats.bytes;
1090 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1093 for (j = 0; j < adapter->num_rx_queues; j++) {
1094 ring = adapter->rx_ring[j];
1096 start = u64_stats_fetch_begin_bh(&ring->syncp);
1097 data[i] = ring->stats.packets;
1098 data[i+1] = ring->stats.bytes;
1099 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1102 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1103 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1104 data[i++] = adapter->stats.pxontxc[j];
1105 data[i++] = adapter->stats.pxofftxc[j];
1107 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1108 data[i++] = adapter->stats.pxonrxc[j];
1109 data[i++] = adapter->stats.pxoffrxc[j];
1114 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1117 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1118 char *p = (char *)data;
1121 switch (stringset) {
1123 memcpy(data, *ixgbe_gstrings_test,
1124 IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1127 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1128 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1130 p += ETH_GSTRING_LEN;
1132 for (i = 0; i < adapter->num_tx_queues; i++) {
1133 sprintf(p, "tx_queue_%u_packets", i);
1134 p += ETH_GSTRING_LEN;
1135 sprintf(p, "tx_queue_%u_bytes", i);
1136 p += ETH_GSTRING_LEN;
1138 for (i = 0; i < adapter->num_rx_queues; i++) {
1139 sprintf(p, "rx_queue_%u_packets", i);
1140 p += ETH_GSTRING_LEN;
1141 sprintf(p, "rx_queue_%u_bytes", i);
1142 p += ETH_GSTRING_LEN;
1144 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1145 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1146 sprintf(p, "tx_pb_%u_pxon", i);
1147 p += ETH_GSTRING_LEN;
1148 sprintf(p, "tx_pb_%u_pxoff", i);
1149 p += ETH_GSTRING_LEN;
1151 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1152 sprintf(p, "rx_pb_%u_pxon", i);
1153 p += ETH_GSTRING_LEN;
1154 sprintf(p, "rx_pb_%u_pxoff", i);
1155 p += ETH_GSTRING_LEN;
1158 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1163 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1165 struct ixgbe_hw *hw = &adapter->hw;
1170 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1178 /* ethtool register test data */
1179 struct ixgbe_reg_test {
1187 /* In the hardware, registers are laid out either singly, in arrays
1188 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1189 * most tests take place on arrays or single registers (handled
1190 * as a single-element array) and special-case the tables.
1191 * Table tests are always pattern tests.
1193 * We also make provision for some required setup steps by specifying
1194 * registers to be written without any read-back testing.
1197 #define PATTERN_TEST 1
1198 #define SET_READ_TEST 2
1199 #define WRITE_NO_TEST 3
1200 #define TABLE32_TEST 4
1201 #define TABLE64_TEST_LO 5
1202 #define TABLE64_TEST_HI 6
1204 /* default 82599 register test */
1205 static const struct ixgbe_reg_test reg_test_82599[] = {
1206 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1207 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1208 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1209 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1210 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1211 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1212 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1213 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1214 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1215 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1216 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1217 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1218 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1219 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1220 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1221 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1222 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1223 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1224 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1228 /* default 82598 register test */
1229 static const struct ixgbe_reg_test reg_test_82598[] = {
1230 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1231 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1232 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1233 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1234 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1235 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1236 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1237 /* Enable all four RX queues before testing. */
1238 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1239 /* RDH is read-only for 82598, only test RDT. */
1240 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1241 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1242 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1243 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1244 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1245 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1246 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1247 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1248 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1249 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1250 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1251 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1252 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1256 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1257 u32 mask, u32 write)
1259 u32 pat, val, before;
1260 static const u32 test_pattern[] = {
1261 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1263 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1264 before = readl(adapter->hw.hw_addr + reg);
1265 writel((test_pattern[pat] & write),
1266 (adapter->hw.hw_addr + reg));
1267 val = readl(adapter->hw.hw_addr + reg);
1268 if (val != (test_pattern[pat] & write & mask)) {
1269 e_err(drv, "pattern test reg %04X failed: got "
1270 "0x%08X expected 0x%08X\n",
1271 reg, val, (test_pattern[pat] & write & mask));
1273 writel(before, adapter->hw.hw_addr + reg);
1276 writel(before, adapter->hw.hw_addr + reg);
1281 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1282 u32 mask, u32 write)
1285 before = readl(adapter->hw.hw_addr + reg);
1286 writel((write & mask), (adapter->hw.hw_addr + reg));
1287 val = readl(adapter->hw.hw_addr + reg);
1288 if ((write & mask) != (val & mask)) {
1289 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1290 "expected 0x%08X\n", reg, (val & mask), (write & mask));
1292 writel(before, (adapter->hw.hw_addr + reg));
1295 writel(before, (adapter->hw.hw_addr + reg));
1299 #define REG_PATTERN_TEST(reg, mask, write) \
1301 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1306 #define REG_SET_AND_CHECK(reg, mask, write) \
1308 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1312 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1314 const struct ixgbe_reg_test *test;
1315 u32 value, before, after;
1318 switch (adapter->hw.mac.type) {
1319 case ixgbe_mac_82598EB:
1320 toggle = 0x7FFFF3FF;
1321 test = reg_test_82598;
1323 case ixgbe_mac_82599EB:
1324 case ixgbe_mac_X540:
1325 toggle = 0x7FFFF30F;
1326 test = reg_test_82599;
1335 * Because the status register is such a special case,
1336 * we handle it separately from the rest of the register
1337 * tests. Some bits are read-only, some toggle, and some
1338 * are writeable on newer MACs.
1340 before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1341 value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1342 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1343 after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1344 if (value != after) {
1345 e_err(drv, "failed STATUS register test got: 0x%08X "
1346 "expected: 0x%08X\n", after, value);
1350 /* restore previous status */
1351 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1354 * Perform the remainder of the register test, looping through
1355 * the test table until we either fail or reach the null entry.
1358 for (i = 0; i < test->array_len; i++) {
1359 switch (test->test_type) {
1361 REG_PATTERN_TEST(test->reg + (i * 0x40),
1366 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1372 (adapter->hw.hw_addr + test->reg)
1376 REG_PATTERN_TEST(test->reg + (i * 4),
1380 case TABLE64_TEST_LO:
1381 REG_PATTERN_TEST(test->reg + (i * 8),
1385 case TABLE64_TEST_HI:
1386 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1399 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1401 struct ixgbe_hw *hw = &adapter->hw;
1402 if (hw->eeprom.ops.validate_checksum(hw, NULL))
1409 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1411 struct net_device *netdev = (struct net_device *) data;
1412 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1414 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1419 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1421 struct net_device *netdev = adapter->netdev;
1422 u32 mask, i = 0, shared_int = true;
1423 u32 irq = adapter->pdev->irq;
1427 /* Hook up test interrupt handler just for this test */
1428 if (adapter->msix_entries) {
1429 /* NOTE: we don't test MSI-X interrupts here, yet */
1431 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1433 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1438 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1439 netdev->name, netdev)) {
1441 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1442 netdev->name, netdev)) {
1446 e_info(hw, "testing %s interrupt\n", shared_int ?
1447 "shared" : "unshared");
1449 /* Disable all the interrupts */
1450 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1451 IXGBE_WRITE_FLUSH(&adapter->hw);
1452 usleep_range(10000, 20000);
1454 /* Test each interrupt */
1455 for (; i < 10; i++) {
1456 /* Interrupt to test */
1461 * Disable the interrupts to be reported in
1462 * the cause register and then force the same
1463 * interrupt and see if one gets posted. If
1464 * an interrupt was posted to the bus, the
1467 adapter->test_icr = 0;
1468 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1469 ~mask & 0x00007FFF);
1470 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1471 ~mask & 0x00007FFF);
1472 IXGBE_WRITE_FLUSH(&adapter->hw);
1473 usleep_range(10000, 20000);
1475 if (adapter->test_icr & mask) {
1482 * Enable the interrupt to be reported in the cause
1483 * register and then force the same interrupt and see
1484 * if one gets posted. If an interrupt was not posted
1485 * to the bus, the test failed.
1487 adapter->test_icr = 0;
1488 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1489 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1490 IXGBE_WRITE_FLUSH(&adapter->hw);
1491 usleep_range(10000, 20000);
1493 if (!(adapter->test_icr &mask)) {
1500 * Disable the other interrupts to be reported in
1501 * the cause register and then force the other
1502 * interrupts and see if any get posted. If
1503 * an interrupt was posted to the bus, the
1506 adapter->test_icr = 0;
1507 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1508 ~mask & 0x00007FFF);
1509 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1510 ~mask & 0x00007FFF);
1511 IXGBE_WRITE_FLUSH(&adapter->hw);
1512 usleep_range(10000, 20000);
1514 if (adapter->test_icr) {
1521 /* Disable all the interrupts */
1522 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1523 IXGBE_WRITE_FLUSH(&adapter->hw);
1524 usleep_range(10000, 20000);
1526 /* Unhook test interrupt handler */
1527 free_irq(irq, netdev);
1532 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1534 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1535 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1536 struct ixgbe_hw *hw = &adapter->hw;
1539 /* shut down the DMA engines now so they can be reinitialized later */
1542 reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1543 reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1544 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1545 ixgbe_disable_rx_queue(adapter, rx_ring);
1548 reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1549 reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1550 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1552 switch (hw->mac.type) {
1553 case ixgbe_mac_82599EB:
1554 case ixgbe_mac_X540:
1555 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1556 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1557 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1563 ixgbe_reset(adapter);
1565 ixgbe_free_tx_resources(&adapter->test_tx_ring);
1566 ixgbe_free_rx_resources(&adapter->test_rx_ring);
1569 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1571 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1572 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1577 /* Setup Tx descriptor ring and Tx buffers */
1578 tx_ring->count = IXGBE_DEFAULT_TXD;
1579 tx_ring->queue_index = 0;
1580 tx_ring->dev = &adapter->pdev->dev;
1581 tx_ring->netdev = adapter->netdev;
1582 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1583 tx_ring->numa_node = adapter->node;
1585 err = ixgbe_setup_tx_resources(tx_ring);
1589 switch (adapter->hw.mac.type) {
1590 case ixgbe_mac_82599EB:
1591 case ixgbe_mac_X540:
1592 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1593 reg_data |= IXGBE_DMATXCTL_TE;
1594 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1600 ixgbe_configure_tx_ring(adapter, tx_ring);
1602 /* Setup Rx Descriptor ring and Rx buffers */
1603 rx_ring->count = IXGBE_DEFAULT_RXD;
1604 rx_ring->queue_index = 0;
1605 rx_ring->dev = &adapter->pdev->dev;
1606 rx_ring->netdev = adapter->netdev;
1607 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1608 rx_ring->rx_buf_len = IXGBE_RXBUFFER_2K;
1609 rx_ring->numa_node = adapter->node;
1611 err = ixgbe_setup_rx_resources(rx_ring);
1617 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1618 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1620 ixgbe_configure_rx_ring(adapter, rx_ring);
1622 rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1623 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1628 ixgbe_free_desc_rings(adapter);
1632 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1634 struct ixgbe_hw *hw = &adapter->hw;
1637 /* X540 needs to set the MACC.FLU bit to force link up */
1638 if (adapter->hw.mac.type == ixgbe_mac_X540) {
1639 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1640 reg_data |= IXGBE_MACC_FLU;
1641 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1644 /* right now we only support MAC loopback in the driver */
1645 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1646 /* Setup MAC loopback */
1647 reg_data |= IXGBE_HLREG0_LPBK;
1648 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1650 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1651 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1652 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1654 reg_data = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1655 reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1656 reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1657 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1658 IXGBE_WRITE_FLUSH(hw);
1659 usleep_range(10000, 20000);
1661 /* Disable Atlas Tx lanes; re-enabled in reset path */
1662 if (hw->mac.type == ixgbe_mac_82598EB) {
1665 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1666 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1667 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1669 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1670 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1671 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1673 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1674 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1675 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1677 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1678 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1679 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1685 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1689 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1690 reg_data &= ~IXGBE_HLREG0_LPBK;
1691 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1694 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1695 unsigned int frame_size)
1697 memset(skb->data, 0xFF, frame_size);
1699 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1700 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1701 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1704 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1705 unsigned int frame_size)
1708 if (*(skb->data + 3) == 0xFF) {
1709 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1710 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1717 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1718 struct ixgbe_ring *tx_ring,
1721 union ixgbe_adv_rx_desc *rx_desc;
1722 struct ixgbe_rx_buffer *rx_buffer_info;
1723 struct ixgbe_tx_buffer *tx_buffer_info;
1724 const int bufsz = rx_ring->rx_buf_len;
1726 u16 rx_ntc, tx_ntc, count = 0;
1728 /* initialize next to clean and descriptor values */
1729 rx_ntc = rx_ring->next_to_clean;
1730 tx_ntc = tx_ring->next_to_clean;
1731 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1732 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1734 while (staterr & IXGBE_RXD_STAT_DD) {
1735 /* check Rx buffer */
1736 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1738 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1739 dma_unmap_single(rx_ring->dev,
1740 rx_buffer_info->dma,
1743 rx_buffer_info->dma = 0;
1745 /* verify contents of skb */
1746 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1749 /* unmap buffer on Tx side */
1750 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1751 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1753 /* increment Rx/Tx next to clean counters */
1755 if (rx_ntc == rx_ring->count)
1758 if (tx_ntc == tx_ring->count)
1761 /* fetch next descriptor */
1762 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1763 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1766 /* re-map buffers to ring, store next to clean values */
1767 ixgbe_alloc_rx_buffers(rx_ring, count);
1768 rx_ring->next_to_clean = rx_ntc;
1769 tx_ring->next_to_clean = tx_ntc;
1774 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1776 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1777 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1778 int i, j, lc, good_cnt, ret_val = 0;
1779 unsigned int size = 1024;
1780 netdev_tx_t tx_ret_val;
1781 struct sk_buff *skb;
1783 /* allocate test skb */
1784 skb = alloc_skb(size, GFP_KERNEL);
1788 /* place data into test skb */
1789 ixgbe_create_lbtest_frame(skb, size);
1793 * Calculate the loop count based on the largest descriptor ring
1794 * The idea is to wrap the largest ring a number of times using 64
1795 * send/receive pairs during each loop
1798 if (rx_ring->count <= tx_ring->count)
1799 lc = ((tx_ring->count / 64) * 2) + 1;
1801 lc = ((rx_ring->count / 64) * 2) + 1;
1803 for (j = 0; j <= lc; j++) {
1804 /* reset count of good packets */
1807 /* place 64 packets on the transmit queue*/
1808 for (i = 0; i < 64; i++) {
1810 tx_ret_val = ixgbe_xmit_frame_ring(skb,
1813 if (tx_ret_val == NETDEV_TX_OK)
1817 if (good_cnt != 64) {
1822 /* allow 200 milliseconds for packets to go from Tx to Rx */
1825 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1826 if (good_cnt != 64) {
1832 /* free the original skb */
1838 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1840 *data = ixgbe_setup_desc_rings(adapter);
1843 *data = ixgbe_setup_loopback_test(adapter);
1846 *data = ixgbe_run_loopback_test(adapter);
1847 ixgbe_loopback_cleanup(adapter);
1850 ixgbe_free_desc_rings(adapter);
1855 static void ixgbe_diag_test(struct net_device *netdev,
1856 struct ethtool_test *eth_test, u64 *data)
1858 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1859 bool if_running = netif_running(netdev);
1861 set_bit(__IXGBE_TESTING, &adapter->state);
1862 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1865 e_info(hw, "offline testing starting\n");
1867 /* Link test performed before hardware reset so autoneg doesn't
1868 * interfere with test result */
1869 if (ixgbe_link_test(adapter, &data[4]))
1870 eth_test->flags |= ETH_TEST_FL_FAILED;
1872 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1874 for (i = 0; i < adapter->num_vfs; i++) {
1875 if (adapter->vfinfo[i].clear_to_send) {
1876 netdev_warn(netdev, "%s",
1877 "offline diagnostic is not "
1878 "supported when VFs are "
1884 eth_test->flags |= ETH_TEST_FL_FAILED;
1885 clear_bit(__IXGBE_TESTING,
1893 /* indicate we're in test mode */
1896 ixgbe_reset(adapter);
1898 e_info(hw, "register testing starting\n");
1899 if (ixgbe_reg_test(adapter, &data[0]))
1900 eth_test->flags |= ETH_TEST_FL_FAILED;
1902 ixgbe_reset(adapter);
1903 e_info(hw, "eeprom testing starting\n");
1904 if (ixgbe_eeprom_test(adapter, &data[1]))
1905 eth_test->flags |= ETH_TEST_FL_FAILED;
1907 ixgbe_reset(adapter);
1908 e_info(hw, "interrupt testing starting\n");
1909 if (ixgbe_intr_test(adapter, &data[2]))
1910 eth_test->flags |= ETH_TEST_FL_FAILED;
1912 /* If SRIOV or VMDq is enabled then skip MAC
1913 * loopback diagnostic. */
1914 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1915 IXGBE_FLAG_VMDQ_ENABLED)) {
1916 e_info(hw, "Skip MAC loopback diagnostic in VT "
1922 ixgbe_reset(adapter);
1923 e_info(hw, "loopback testing starting\n");
1924 if (ixgbe_loopback_test(adapter, &data[3]))
1925 eth_test->flags |= ETH_TEST_FL_FAILED;
1928 ixgbe_reset(adapter);
1930 clear_bit(__IXGBE_TESTING, &adapter->state);
1934 e_info(hw, "online testing starting\n");
1936 if (ixgbe_link_test(adapter, &data[4]))
1937 eth_test->flags |= ETH_TEST_FL_FAILED;
1939 /* Online tests aren't run; pass by default */
1945 clear_bit(__IXGBE_TESTING, &adapter->state);
1948 msleep_interruptible(4 * 1000);
1951 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1952 struct ethtool_wolinfo *wol)
1954 struct ixgbe_hw *hw = &adapter->hw;
1956 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
1958 /* WOL not supported except for the following */
1959 switch(hw->device_id) {
1960 case IXGBE_DEV_ID_82599_SFP:
1961 /* Only this subdevice supports WOL */
1962 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1968 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1969 /* All except this subdevice support WOL */
1970 if (hw->subsystem_device_id ==
1971 IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1977 case IXGBE_DEV_ID_82599_KX4:
1980 case IXGBE_DEV_ID_X540T:
1981 /* check eeprom to see if enabled wol */
1982 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1983 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1984 (hw->bus.func == 0))) {
1989 /* All others not supported */
1999 static void ixgbe_get_wol(struct net_device *netdev,
2000 struct ethtool_wolinfo *wol)
2002 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2004 wol->supported = WAKE_UCAST | WAKE_MCAST |
2005 WAKE_BCAST | WAKE_MAGIC;
2008 if (ixgbe_wol_exclusion(adapter, wol) ||
2009 !device_can_wakeup(&adapter->pdev->dev))
2012 if (adapter->wol & IXGBE_WUFC_EX)
2013 wol->wolopts |= WAKE_UCAST;
2014 if (adapter->wol & IXGBE_WUFC_MC)
2015 wol->wolopts |= WAKE_MCAST;
2016 if (adapter->wol & IXGBE_WUFC_BC)
2017 wol->wolopts |= WAKE_BCAST;
2018 if (adapter->wol & IXGBE_WUFC_MAG)
2019 wol->wolopts |= WAKE_MAGIC;
2022 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2024 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2026 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
2029 if (ixgbe_wol_exclusion(adapter, wol))
2030 return wol->wolopts ? -EOPNOTSUPP : 0;
2034 if (wol->wolopts & WAKE_UCAST)
2035 adapter->wol |= IXGBE_WUFC_EX;
2036 if (wol->wolopts & WAKE_MCAST)
2037 adapter->wol |= IXGBE_WUFC_MC;
2038 if (wol->wolopts & WAKE_BCAST)
2039 adapter->wol |= IXGBE_WUFC_BC;
2040 if (wol->wolopts & WAKE_MAGIC)
2041 adapter->wol |= IXGBE_WUFC_MAG;
2043 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2048 static int ixgbe_nway_reset(struct net_device *netdev)
2050 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2052 if (netif_running(netdev))
2053 ixgbe_reinit_locked(adapter);
2058 static int ixgbe_set_phys_id(struct net_device *netdev,
2059 enum ethtool_phys_id_state state)
2061 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2062 struct ixgbe_hw *hw = &adapter->hw;
2065 case ETHTOOL_ID_ACTIVE:
2066 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2070 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2073 case ETHTOOL_ID_OFF:
2074 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2077 case ETHTOOL_ID_INACTIVE:
2078 /* Restore LED settings */
2079 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2086 static int ixgbe_get_coalesce(struct net_device *netdev,
2087 struct ethtool_coalesce *ec)
2089 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2091 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2093 /* only valid if in constant ITR mode */
2094 if (adapter->rx_itr_setting <= 1)
2095 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2097 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2099 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2100 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2103 /* only valid if in constant ITR mode */
2104 if (adapter->tx_itr_setting <= 1)
2105 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2107 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2113 * this function must be called before setting the new value of
2116 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2117 struct ethtool_coalesce *ec)
2119 struct net_device *netdev = adapter->netdev;
2121 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2124 /* if interrupt rate is too high then disable RSC */
2125 if (ec->rx_coalesce_usecs != 1 &&
2126 ec->rx_coalesce_usecs <= (IXGBE_MIN_RSC_ITR >> 2)) {
2127 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2128 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2129 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2133 /* check the feature flag value and enable RSC if necessary */
2134 if ((netdev->features & NETIF_F_LRO) &&
2135 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2136 e_info(probe, "rx-usecs set to %d, re-enabling RSC\n",
2137 ec->rx_coalesce_usecs);
2138 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2145 static int ixgbe_set_coalesce(struct net_device *netdev,
2146 struct ethtool_coalesce *ec)
2148 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2149 struct ixgbe_q_vector *q_vector;
2152 u16 tx_itr_param, rx_itr_param;
2153 bool need_reset = false;
2155 /* don't accept tx specific changes if we've got mixed RxTx vectors */
2156 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2157 && ec->tx_coalesce_usecs)
2160 if (ec->tx_max_coalesced_frames_irq)
2161 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
2163 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2164 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2167 /* check the old value and enable RSC if necessary */
2168 need_reset = ixgbe_update_rsc(adapter, ec);
2170 if (ec->rx_coalesce_usecs > 1)
2171 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2173 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2175 if (adapter->rx_itr_setting == 1)
2176 rx_itr_param = IXGBE_20K_ITR;
2178 rx_itr_param = adapter->rx_itr_setting;
2180 if (ec->tx_coalesce_usecs > 1)
2181 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2183 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2185 if (adapter->tx_itr_setting == 1)
2186 tx_itr_param = IXGBE_10K_ITR;
2188 tx_itr_param = adapter->tx_itr_setting;
2190 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2191 num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2195 for (i = 0; i < num_vectors; i++) {
2196 q_vector = adapter->q_vector[i];
2197 q_vector->tx.work_limit = adapter->tx_work_limit;
2198 if (q_vector->tx.count && !q_vector->rx.count)
2200 q_vector->itr = tx_itr_param;
2202 /* rx only or mixed */
2203 q_vector->itr = rx_itr_param;
2204 ixgbe_write_eitr(q_vector);
2208 * do reset here at the end to make sure EITR==0 case is handled
2209 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2210 * also locks in RSC enable/disable which requires reset
2213 ixgbe_do_reset(netdev);
2218 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2219 struct ethtool_rxnfc *cmd)
2221 union ixgbe_atr_input *mask = &adapter->fdir_mask;
2222 struct ethtool_rx_flow_spec *fsp =
2223 (struct ethtool_rx_flow_spec *)&cmd->fs;
2224 struct hlist_node *node, *node2;
2225 struct ixgbe_fdir_filter *rule = NULL;
2227 /* report total rule count */
2228 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2230 hlist_for_each_entry_safe(rule, node, node2,
2231 &adapter->fdir_filter_list, fdir_node) {
2232 if (fsp->location <= rule->sw_idx)
2236 if (!rule || fsp->location != rule->sw_idx)
2239 /* fill out the flow spec entry */
2241 /* set flow type field */
2242 switch (rule->filter.formatted.flow_type) {
2243 case IXGBE_ATR_FLOW_TYPE_TCPV4:
2244 fsp->flow_type = TCP_V4_FLOW;
2246 case IXGBE_ATR_FLOW_TYPE_UDPV4:
2247 fsp->flow_type = UDP_V4_FLOW;
2249 case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2250 fsp->flow_type = SCTP_V4_FLOW;
2252 case IXGBE_ATR_FLOW_TYPE_IPV4:
2253 fsp->flow_type = IP_USER_FLOW;
2254 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2255 fsp->h_u.usr_ip4_spec.proto = 0;
2256 fsp->m_u.usr_ip4_spec.proto = 0;
2262 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2263 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2264 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2265 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2266 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2267 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2268 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2269 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2270 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2271 fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2272 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2273 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2274 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2275 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2276 fsp->flow_type |= FLOW_EXT;
2279 if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2280 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2282 fsp->ring_cookie = rule->action;
2287 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2288 struct ethtool_rxnfc *cmd,
2291 struct hlist_node *node, *node2;
2292 struct ixgbe_fdir_filter *rule;
2295 /* report total rule count */
2296 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2298 hlist_for_each_entry_safe(rule, node, node2,
2299 &adapter->fdir_filter_list, fdir_node) {
2300 if (cnt == cmd->rule_cnt)
2302 rule_locs[cnt] = rule->sw_idx;
2306 cmd->rule_cnt = cnt;
2311 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2314 struct ixgbe_adapter *adapter = netdev_priv(dev);
2315 int ret = -EOPNOTSUPP;
2318 case ETHTOOL_GRXRINGS:
2319 cmd->data = adapter->num_rx_queues;
2322 case ETHTOOL_GRXCLSRLCNT:
2323 cmd->rule_cnt = adapter->fdir_filter_count;
2326 case ETHTOOL_GRXCLSRULE:
2327 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2329 case ETHTOOL_GRXCLSRLALL:
2330 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2339 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2340 struct ixgbe_fdir_filter *input,
2343 struct ixgbe_hw *hw = &adapter->hw;
2344 struct hlist_node *node, *node2, *parent;
2345 struct ixgbe_fdir_filter *rule;
2351 hlist_for_each_entry_safe(rule, node, node2,
2352 &adapter->fdir_filter_list, fdir_node) {
2353 /* hash found, or no matching entry */
2354 if (rule->sw_idx >= sw_idx)
2359 /* if there is an old rule occupying our place remove it */
2360 if (rule && (rule->sw_idx == sw_idx)) {
2361 if (!input || (rule->filter.formatted.bkt_hash !=
2362 input->filter.formatted.bkt_hash)) {
2363 err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2368 hlist_del(&rule->fdir_node);
2370 adapter->fdir_filter_count--;
2374 * If no input this was a delete, err should be 0 if a rule was
2375 * successfully found and removed from the list else -EINVAL
2380 /* initialize node and set software index */
2381 INIT_HLIST_NODE(&input->fdir_node);
2383 /* add filter to the list */
2385 hlist_add_after(parent, &input->fdir_node);
2387 hlist_add_head(&input->fdir_node,
2388 &adapter->fdir_filter_list);
2391 adapter->fdir_filter_count++;
2396 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2399 switch (fsp->flow_type & ~FLOW_EXT) {
2401 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2404 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2407 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2410 switch (fsp->h_u.usr_ip4_spec.proto) {
2412 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2415 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2418 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2421 if (!fsp->m_u.usr_ip4_spec.proto) {
2422 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2436 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2437 struct ethtool_rxnfc *cmd)
2439 struct ethtool_rx_flow_spec *fsp =
2440 (struct ethtool_rx_flow_spec *)&cmd->fs;
2441 struct ixgbe_hw *hw = &adapter->hw;
2442 struct ixgbe_fdir_filter *input;
2443 union ixgbe_atr_input mask;
2446 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2450 * Don't allow programming if the action is a queue greater than
2451 * the number of online Rx queues.
2453 if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2454 (fsp->ring_cookie >= adapter->num_rx_queues))
2457 /* Don't allow indexes to exist outside of available space */
2458 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2459 e_err(drv, "Location out of range\n");
2463 input = kzalloc(sizeof(*input), GFP_ATOMIC);
2467 memset(&mask, 0, sizeof(union ixgbe_atr_input));
2470 input->sw_idx = fsp->location;
2472 /* record flow type */
2473 if (!ixgbe_flowspec_to_flow_type(fsp,
2474 &input->filter.formatted.flow_type)) {
2475 e_err(drv, "Unrecognized flow type\n");
2479 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2480 IXGBE_ATR_L4TYPE_MASK;
2482 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2483 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2485 /* Copy input into formatted structures */
2486 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2487 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2488 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2489 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2490 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2491 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2492 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2493 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2495 if (fsp->flow_type & FLOW_EXT) {
2496 input->filter.formatted.vm_pool =
2497 (unsigned char)ntohl(fsp->h_ext.data[1]);
2498 mask.formatted.vm_pool =
2499 (unsigned char)ntohl(fsp->m_ext.data[1]);
2500 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2501 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2502 input->filter.formatted.flex_bytes =
2503 fsp->h_ext.vlan_etype;
2504 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2507 /* determine if we need to drop or route the packet */
2508 if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2509 input->action = IXGBE_FDIR_DROP_QUEUE;
2511 input->action = fsp->ring_cookie;
2513 spin_lock(&adapter->fdir_perfect_lock);
2515 if (hlist_empty(&adapter->fdir_filter_list)) {
2516 /* save mask and program input mask into HW */
2517 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2518 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2520 e_err(drv, "Error writing mask\n");
2521 goto err_out_w_lock;
2523 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2524 e_err(drv, "Only one mask supported per port\n");
2525 goto err_out_w_lock;
2528 /* apply mask and compute/store hash */
2529 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2531 /* program filters to filter memory */
2532 err = ixgbe_fdir_write_perfect_filter_82599(hw,
2533 &input->filter, input->sw_idx,
2534 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2535 IXGBE_FDIR_DROP_QUEUE :
2536 adapter->rx_ring[input->action]->reg_idx);
2538 goto err_out_w_lock;
2540 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2542 spin_unlock(&adapter->fdir_perfect_lock);
2546 spin_unlock(&adapter->fdir_perfect_lock);
2552 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2553 struct ethtool_rxnfc *cmd)
2555 struct ethtool_rx_flow_spec *fsp =
2556 (struct ethtool_rx_flow_spec *)&cmd->fs;
2559 spin_lock(&adapter->fdir_perfect_lock);
2560 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2561 spin_unlock(&adapter->fdir_perfect_lock);
2566 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2568 struct ixgbe_adapter *adapter = netdev_priv(dev);
2569 int ret = -EOPNOTSUPP;
2572 case ETHTOOL_SRXCLSRLINS:
2573 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2575 case ETHTOOL_SRXCLSRLDEL:
2576 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2585 static const struct ethtool_ops ixgbe_ethtool_ops = {
2586 .get_settings = ixgbe_get_settings,
2587 .set_settings = ixgbe_set_settings,
2588 .get_drvinfo = ixgbe_get_drvinfo,
2589 .get_regs_len = ixgbe_get_regs_len,
2590 .get_regs = ixgbe_get_regs,
2591 .get_wol = ixgbe_get_wol,
2592 .set_wol = ixgbe_set_wol,
2593 .nway_reset = ixgbe_nway_reset,
2594 .get_link = ethtool_op_get_link,
2595 .get_eeprom_len = ixgbe_get_eeprom_len,
2596 .get_eeprom = ixgbe_get_eeprom,
2597 .set_eeprom = ixgbe_set_eeprom,
2598 .get_ringparam = ixgbe_get_ringparam,
2599 .set_ringparam = ixgbe_set_ringparam,
2600 .get_pauseparam = ixgbe_get_pauseparam,
2601 .set_pauseparam = ixgbe_set_pauseparam,
2602 .get_msglevel = ixgbe_get_msglevel,
2603 .set_msglevel = ixgbe_set_msglevel,
2604 .self_test = ixgbe_diag_test,
2605 .get_strings = ixgbe_get_strings,
2606 .set_phys_id = ixgbe_set_phys_id,
2607 .get_sset_count = ixgbe_get_sset_count,
2608 .get_ethtool_stats = ixgbe_get_ethtool_stats,
2609 .get_coalesce = ixgbe_get_coalesce,
2610 .set_coalesce = ixgbe_set_coalesce,
2611 .get_rxnfc = ixgbe_get_rxnfc,
2612 .set_rxnfc = ixgbe_set_rxnfc,
2615 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2617 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);