drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 /* ethtool support for ixgbe */
  30
  31 #include <linux/interrupt.h>
  32 #include <linux/types.h>
  33 #include <linux/module.h>
  34 #include <linux/slab.h>
  35 #include <linux/pci.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ethtool.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/highmem.h>
  40 #include <linux/uaccess.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_phy.h"
  44
  45
  46 #define IXGBE_ALL_RAR_ENTRIES 16
  47
  48 enum {NETDEV_STATS, IXGBE_STATS};
  49
  50 struct ixgbe_stats {
  51         char stat_string[ETH_GSTRING_LEN];
  52         int type;
  53         int sizeof_stat;
  54         int stat_offset;
  55 };
  56
  57 #define IXGBE_STAT(m)           IXGBE_STATS, \
  58                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  59                                 offsetof(struct ixgbe_adapter, m)
  60 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  61                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  62                                 offsetof(struct rtnl_link_stats64, m)
  63
  64 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
  65         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  66         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  67         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  68         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  69         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  70         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  71         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  72         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  73         {"lsc_int", IXGBE_STAT(lsc_int)},
  74         {"tx_busy", IXGBE_STAT(tx_busy)},
  75         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  76         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  77         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  78         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  79         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  80         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  81         {"broadcast", IXGBE_STAT(stats.bprc)},
  82         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  83         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  84         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  85         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  86         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  87         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  88         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  89         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  90         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  91         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  92         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  93         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  94         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  95         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  96         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  97         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  98         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  99         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
 100         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
 101         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
 102         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 103         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 104         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 105         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 106         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 107         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 108         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 109         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 110         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 111         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 112         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 113         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 114 #ifdef IXGBE_FCOE
 115         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 116         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 117         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 118         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 119         {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
 120         {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
 121         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 122         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 123 #endif /* IXGBE_FCOE */
 124 };
 125
 126 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
 127  * we set the num_rx_queues to evaluate to num_tx_queues. This is
 128  * used because we do not have a good way to get the max number of
 129  * rx queues with CONFIG_RPS disabled.
 130  */
 131 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
 132
 133 #define IXGBE_QUEUE_STATS_LEN ( \
 134         (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
 135         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 136 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 137 #define IXGBE_PB_STATS_LEN ( \
 138                         (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 139                          sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 140                          sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 141                          sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 142                         / sizeof(u64))
 143 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 144                          IXGBE_PB_STATS_LEN + \
 145                          IXGBE_QUEUE_STATS_LEN)
 146
 147 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 148         "Register test  (offline)", "Eeprom test    (offline)",
 149         "Interrupt test (offline)", "Loopback test  (offline)",
 150         "Link test   (on/offline)"
 151 };
 152 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 153
 154 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = {
 155 #define IXGBE_PRIV_FLAGS_LEGACY_RX      BIT(0)
 156         "legacy-rx",
 157 };
 158
 159 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings)
 160
 161 /* currently supported speeds for 10G */
 162 #define ADVRTSD_MSK_10G (SUPPORTED_10000baseT_Full | \
 163                          SUPPORTED_10000baseKX4_Full | \
 164                          SUPPORTED_10000baseKR_Full)
 165
 166 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane)
 167
 168 static u32 ixgbe_get_supported_10gtypes(struct ixgbe_hw *hw)
 169 {
 170         if (!ixgbe_isbackplane(hw->phy.media_type))
 171                 return SUPPORTED_10000baseT_Full;
 172
 173         switch (hw->device_id) {
 174         case IXGBE_DEV_ID_82598:
 175         case IXGBE_DEV_ID_82599_KX4:
 176         case IXGBE_DEV_ID_82599_KX4_MEZZ:
 177         case IXGBE_DEV_ID_X550EM_X_KX4:
 178                 return SUPPORTED_10000baseKX4_Full;
 179         case IXGBE_DEV_ID_82598_BX:
 180         case IXGBE_DEV_ID_82599_KR:
 181         case IXGBE_DEV_ID_X550EM_X_KR:
 182                 return SUPPORTED_10000baseKR_Full;
 183         default:
 184                 return SUPPORTED_10000baseKX4_Full |
 185                        SUPPORTED_10000baseKR_Full;
 186         }
 187 }
 188
 189 static int ixgbe_get_settings(struct net_device *netdev,
 190                               struct ethtool_cmd *ecmd)
 191 {
 192         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 193         struct ixgbe_hw *hw = &adapter->hw;
 194         ixgbe_link_speed supported_link;
 195         bool autoneg = false;
 196
 197         hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
 198
 199         /* set the supported link speeds */
 200         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 201                 ecmd->supported |= ixgbe_get_supported_10gtypes(hw);
 202         if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 203                 ecmd->supported |= (ixgbe_isbackplane(hw->phy.media_type)) ?
 204                                    SUPPORTED_1000baseKX_Full :
 205                                    SUPPORTED_1000baseT_Full;
 206         if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 207                 ecmd->supported |= SUPPORTED_100baseT_Full;
 208         if (supported_link & IXGBE_LINK_SPEED_10_FULL)
 209                 ecmd->supported |= SUPPORTED_10baseT_Full;
 210
 211         /* default advertised speed if phy.autoneg_advertised isn't set */
 212         ecmd->advertising = ecmd->supported;
 213         /* set the advertised speeds */
 214         if (hw->phy.autoneg_advertised) {
 215                 ecmd->advertising = 0;
 216                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL)
 217                         ecmd->advertising |= ADVERTISED_10baseT_Full;
 218                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
 219                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 220                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 221                         ecmd->advertising |= ecmd->supported & ADVRTSD_MSK_10G;
 222                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) {
 223                         if (ecmd->supported & SUPPORTED_1000baseKX_Full)
 224                                 ecmd->advertising |= ADVERTISED_1000baseKX_Full;
 225                         else
 226                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
 227                 }
 228         } else {
 229                 if (hw->phy.multispeed_fiber && !autoneg) {
 230                         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 231                                 ecmd->advertising = ADVERTISED_10000baseT_Full;
 232                 }
 233         }
 234
 235         if (autoneg) {
 236                 ecmd->supported |= SUPPORTED_Autoneg;
 237                 ecmd->advertising |= ADVERTISED_Autoneg;
 238                 ecmd->autoneg = AUTONEG_ENABLE;
 239         } else
 240                 ecmd->autoneg = AUTONEG_DISABLE;
 241
 242         ecmd->transceiver = XCVR_EXTERNAL;
 243
 244         /* Determine the remaining settings based on the PHY type. */
 245         switch (adapter->hw.phy.type) {
 246         case ixgbe_phy_tn:
 247         case ixgbe_phy_aq:
 248         case ixgbe_phy_x550em_ext_t:
 249         case ixgbe_phy_fw:
 250         case ixgbe_phy_cu_unknown:
 251                 ecmd->supported |= SUPPORTED_TP;
 252                 ecmd->advertising |= ADVERTISED_TP;
 253                 ecmd->port = PORT_TP;
 254                 break;
 255         case ixgbe_phy_qt:
 256                 ecmd->supported |= SUPPORTED_FIBRE;
 257                 ecmd->advertising |= ADVERTISED_FIBRE;
 258                 ecmd->port = PORT_FIBRE;
 259                 break;
 260         case ixgbe_phy_nl:
 261         case ixgbe_phy_sfp_passive_tyco:
 262         case ixgbe_phy_sfp_passive_unknown:
 263         case ixgbe_phy_sfp_ftl:
 264         case ixgbe_phy_sfp_avago:
 265         case ixgbe_phy_sfp_intel:
 266         case ixgbe_phy_sfp_unknown:
 267         case ixgbe_phy_qsfp_passive_unknown:
 268         case ixgbe_phy_qsfp_active_unknown:
 269         case ixgbe_phy_qsfp_intel:
 270         case ixgbe_phy_qsfp_unknown:
 271                 /* SFP+ devices, further checking needed */
 272                 switch (adapter->hw.phy.sfp_type) {
 273                 case ixgbe_sfp_type_da_cu:
 274                 case ixgbe_sfp_type_da_cu_core0:
 275                 case ixgbe_sfp_type_da_cu_core1:
 276                         ecmd->supported |= SUPPORTED_FIBRE;
 277                         ecmd->advertising |= ADVERTISED_FIBRE;
 278                         ecmd->port = PORT_DA;
 279                         break;
 280                 case ixgbe_sfp_type_sr:
 281                 case ixgbe_sfp_type_lr:
 282                 case ixgbe_sfp_type_srlr_core0:
 283                 case ixgbe_sfp_type_srlr_core1:
 284                 case ixgbe_sfp_type_1g_sx_core0:
 285                 case ixgbe_sfp_type_1g_sx_core1:
 286                 case ixgbe_sfp_type_1g_lx_core0:
 287                 case ixgbe_sfp_type_1g_lx_core1:
 288                         ecmd->supported |= SUPPORTED_FIBRE;
 289                         ecmd->advertising |= ADVERTISED_FIBRE;
 290                         ecmd->port = PORT_FIBRE;
 291                         break;
 292                 case ixgbe_sfp_type_not_present:
 293                         ecmd->supported |= SUPPORTED_FIBRE;
 294                         ecmd->advertising |= ADVERTISED_FIBRE;
 295                         ecmd->port = PORT_NONE;
 296                         break;
 297                 case ixgbe_sfp_type_1g_cu_core0:
 298                 case ixgbe_sfp_type_1g_cu_core1:
 299                         ecmd->supported |= SUPPORTED_TP;
 300                         ecmd->advertising |= ADVERTISED_TP;
 301                         ecmd->port = PORT_TP;
 302                         break;
 303                 case ixgbe_sfp_type_unknown:
 304                 default:
 305                         ecmd->supported |= SUPPORTED_FIBRE;
 306                         ecmd->advertising |= ADVERTISED_FIBRE;
 307                         ecmd->port = PORT_OTHER;
 308                         break;
 309                 }
 310                 break;
 311         case ixgbe_phy_xaui:
 312                 ecmd->supported |= SUPPORTED_FIBRE;
 313                 ecmd->advertising |= ADVERTISED_FIBRE;
 314                 ecmd->port = PORT_NONE;
 315                 break;
 316         case ixgbe_phy_unknown:
 317         case ixgbe_phy_generic:
 318         case ixgbe_phy_sfp_unsupported:
 319         default:
 320                 ecmd->supported |= SUPPORTED_FIBRE;
 321                 ecmd->advertising |= ADVERTISED_FIBRE;
 322                 ecmd->port = PORT_OTHER;
 323                 break;
 324         }
 325
 326         /* Indicate pause support */
 327         ecmd->supported |= SUPPORTED_Pause;
 328
 329         switch (hw->fc.requested_mode) {
 330         case ixgbe_fc_full:
 331                 ecmd->advertising |= ADVERTISED_Pause;
 332                 break;
 333         case ixgbe_fc_rx_pause:
 334                 ecmd->advertising |= ADVERTISED_Pause |
 335                                      ADVERTISED_Asym_Pause;
 336                 break;
 337         case ixgbe_fc_tx_pause:
 338                 ecmd->advertising |= ADVERTISED_Asym_Pause;
 339                 break;
 340         default:
 341                 ecmd->advertising &= ~(ADVERTISED_Pause |
 342                                        ADVERTISED_Asym_Pause);
 343         }
 344
 345         if (netif_carrier_ok(netdev)) {
 346                 switch (adapter->link_speed) {
 347                 case IXGBE_LINK_SPEED_10GB_FULL:
 348                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 349                         break;
 350                 case IXGBE_LINK_SPEED_5GB_FULL:
 351                         ethtool_cmd_speed_set(ecmd, SPEED_5000);
 352                         break;
 353                 case IXGBE_LINK_SPEED_2_5GB_FULL:
 354                         ethtool_cmd_speed_set(ecmd, SPEED_2500);
 355                         break;
 356                 case IXGBE_LINK_SPEED_1GB_FULL:
 357                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 358                         break;
 359                 case IXGBE_LINK_SPEED_100_FULL:
 360                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 361                         break;
 362                 case IXGBE_LINK_SPEED_10_FULL:
 363                         ethtool_cmd_speed_set(ecmd, SPEED_10);
 364                         break;
 365                 default:
 366                         break;
 367                 }
 368                 ecmd->duplex = DUPLEX_FULL;
 369         } else {
 370                 ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
 371                 ecmd->duplex = DUPLEX_UNKNOWN;
 372         }
 373
 374         return 0;
 375 }
 376
 377 static int ixgbe_set_settings(struct net_device *netdev,
 378                               struct ethtool_cmd *ecmd)
 379 {
 380         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 381         struct ixgbe_hw *hw = &adapter->hw;
 382         u32 advertised, old;
 383         s32 err = 0;
 384
 385         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 386             (hw->phy.multispeed_fiber)) {
 387                 /*
 388                  * this function does not support duplex forcing, but can
 389                  * limit the advertising of the adapter to the specified speed
 390                  */
 391                 if (ecmd->advertising & ~ecmd->supported)
 392                         return -EINVAL;
 393
 394                 /* only allow one speed at a time if no autoneg */
 395                 if (!ecmd->autoneg && hw->phy.multispeed_fiber) {
 396                         if (ecmd->advertising ==
 397                             (ADVERTISED_10000baseT_Full |
 398                              ADVERTISED_1000baseT_Full))
 399                                 return -EINVAL;
 400                 }
 401
 402                 old = hw->phy.autoneg_advertised;
 403                 advertised = 0;
 404                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 405                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 406
 407                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 408                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 409
 410                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 411                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 412
 413                 if (ecmd->advertising & ADVERTISED_10baseT_Full)
 414                         advertised |= IXGBE_LINK_SPEED_10_FULL;
 415
 416                 if (old == advertised)
 417                         return err;
 418                 /* this sets the link speed and restarts auto-neg */
 419                 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
 420                         usleep_range(1000, 2000);
 421
 422                 hw->mac.autotry_restart = true;
 423                 err = hw->mac.ops.setup_link(hw, advertised, true);
 424                 if (err) {
 425                         e_info(probe, "setup link failed with code %d\n", err);
 426                         hw->mac.ops.setup_link(hw, old, true);
 427                 }
 428                 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
 429         } else {
 430                 /* in this case we currently only support 10Gb/FULL */
 431                 u32 speed = ethtool_cmd_speed(ecmd);
 432                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 433                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 434                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 435                         return -EINVAL;
 436         }
 437
 438         return err;
 439 }
 440
 441 static void ixgbe_get_pauseparam(struct net_device *netdev,
 442                                  struct ethtool_pauseparam *pause)
 443 {
 444         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 445         struct ixgbe_hw *hw = &adapter->hw;
 446
 447         if (ixgbe_device_supports_autoneg_fc(hw) &&
 448             !hw->fc.disable_fc_autoneg)
 449                 pause->autoneg = 1;
 450         else
 451                 pause->autoneg = 0;
 452
 453         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 454                 pause->rx_pause = 1;
 455         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 456                 pause->tx_pause = 1;
 457         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 458                 pause->rx_pause = 1;
 459                 pause->tx_pause = 1;
 460         }
 461 }
 462
 463 static int ixgbe_set_pauseparam(struct net_device *netdev,
 464                                 struct ethtool_pauseparam *pause)
 465 {
 466         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 467         struct ixgbe_hw *hw = &adapter->hw;
 468         struct ixgbe_fc_info fc = hw->fc;
 469
 470         /* 82598 does no support link flow control with DCB enabled */
 471         if ((hw->mac.type == ixgbe_mac_82598EB) &&
 472             (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
 473                 return -EINVAL;
 474
 475         /* some devices do not support autoneg of link flow control */
 476         if ((pause->autoneg == AUTONEG_ENABLE) &&
 477             !ixgbe_device_supports_autoneg_fc(hw))
 478                 return -EINVAL;
 479
 480         fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
 481
 482         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 483                 fc.requested_mode = ixgbe_fc_full;
 484         else if (pause->rx_pause && !pause->tx_pause)
 485                 fc.requested_mode = ixgbe_fc_rx_pause;
 486         else if (!pause->rx_pause && pause->tx_pause)
 487                 fc.requested_mode = ixgbe_fc_tx_pause;
 488         else
 489                 fc.requested_mode = ixgbe_fc_none;
 490
 491         /* if the thing changed then we'll update and use new autoneg */
 492         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 493                 hw->fc = fc;
 494                 if (netif_running(netdev))
 495                         ixgbe_reinit_locked(adapter);
 496                 else
 497                         ixgbe_reset(adapter);
 498         }
 499
 500         return 0;
 501 }
 502
 503 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 504 {
 505         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 506         return adapter->msg_enable;
 507 }
 508
 509 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 510 {
 511         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 512         adapter->msg_enable = data;
 513 }
 514
 515 static int ixgbe_get_regs_len(struct net_device *netdev)
 516 {
 517 #define IXGBE_REGS_LEN  1139
 518         return IXGBE_REGS_LEN * sizeof(u32);
 519 }
 520
 521 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 522
 523 static void ixgbe_get_regs(struct net_device *netdev,
 524                            struct ethtool_regs *regs, void *p)
 525 {
 526         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 527         struct ixgbe_hw *hw = &adapter->hw;
 528         u32 *regs_buff = p;
 529         u8 i;
 530
 531         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 532
 533         regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
 534                         hw->device_id;
 535
 536         /* General Registers */
 537         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 538         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 539         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 540         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 541         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 542         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 543         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 544         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 545
 546         /* NVM Register */
 547         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
 548         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 549         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw));
 550         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 551         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 552         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 553         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 554         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 555         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 556         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw));
 557
 558         /* Interrupt */
 559         /* don't read EICR because it can clear interrupt causes, instead
 560          * read EICS which is a shadow but doesn't clear EICR */
 561         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 562         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 563         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 564         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 565         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 566         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 567         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 568         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 569         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 570         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 571         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 572         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 573
 574         /* Flow Control */
 575         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 576         for (i = 0; i < 4; i++)
 577                 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i));
 578         for (i = 0; i < 8; i++) {
 579                 switch (hw->mac.type) {
 580                 case ixgbe_mac_82598EB:
 581                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 582                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 583                         break;
 584                 case ixgbe_mac_82599EB:
 585                 case ixgbe_mac_X540:
 586                 case ixgbe_mac_X550:
 587                 case ixgbe_mac_X550EM_x:
 588                 case ixgbe_mac_x550em_a:
 589                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 590                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 591                         break;
 592                 default:
 593                         break;
 594                 }
 595         }
 596         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 597         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 598
 599         /* Receive DMA */
 600         for (i = 0; i < 64; i++)
 601                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 602         for (i = 0; i < 64; i++)
 603                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 604         for (i = 0; i < 64; i++)
 605                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 606         for (i = 0; i < 64; i++)
 607                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 608         for (i = 0; i < 64; i++)
 609                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 610         for (i = 0; i < 64; i++)
 611                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 612         for (i = 0; i < 16; i++)
 613                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 614         for (i = 0; i < 16; i++)
 615                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 616         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 617         for (i = 0; i < 8; i++)
 618                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 619         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 620         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 621
 622         /* Receive */
 623         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 624         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 625         for (i = 0; i < 16; i++)
 626                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 627         for (i = 0; i < 16; i++)
 628                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 629         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 630         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 631         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 632         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 633         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 634         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 635         for (i = 0; i < 8; i++)
 636                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 637         for (i = 0; i < 8; i++)
 638                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 639         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 640
 641         /* Transmit */
 642         for (i = 0; i < 32; i++)
 643                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 644         for (i = 0; i < 32; i++)
 645                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 646         for (i = 0; i < 32; i++)
 647                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 648         for (i = 0; i < 32; i++)
 649                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 650         for (i = 0; i < 32; i++)
 651                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 652         for (i = 0; i < 32; i++)
 653                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 654         for (i = 0; i < 32; i++)
 655                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 656         for (i = 0; i < 32; i++)
 657                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 658         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 659         for (i = 0; i < 16; i++)
 660                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 661         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 662         for (i = 0; i < 8; i++)
 663                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 664         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 665
 666         /* Wake Up */
 667         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 668         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 669         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 670         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 671         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 672         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 673         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 674         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 675         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 676
 677         /* DCB */
 678         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);   /* same as FCCFG  */
 679         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
 680
 681         switch (hw->mac.type) {
 682         case ixgbe_mac_82598EB:
 683                 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 684                 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 685                 for (i = 0; i < 8; i++)
 686                         regs_buff[833 + i] =
 687                                 IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 688                 for (i = 0; i < 8; i++)
 689                         regs_buff[841 + i] =
 690                                 IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 691                 for (i = 0; i < 8; i++)
 692                         regs_buff[849 + i] =
 693                                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 694                 for (i = 0; i < 8; i++)
 695                         regs_buff[857 + i] =
 696                                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 697                 break;
 698         case ixgbe_mac_82599EB:
 699         case ixgbe_mac_X540:
 700         case ixgbe_mac_X550:
 701         case ixgbe_mac_X550EM_x:
 702         case ixgbe_mac_x550em_a:
 703                 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
 704                 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
 705                 for (i = 0; i < 8; i++)
 706                         regs_buff[833 + i] =
 707                                 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
 708                 for (i = 0; i < 8; i++)
 709                         regs_buff[841 + i] =
 710                                 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
 711                 for (i = 0; i < 8; i++)
 712                         regs_buff[849 + i] =
 713                                 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
 714                 for (i = 0; i < 8; i++)
 715                         regs_buff[857 + i] =
 716                                 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
 717                 break;
 718         default:
 719                 break;
 720         }
 721
 722         for (i = 0; i < 8; i++)
 723                 regs_buff[865 + i] =
 724                 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
 725         for (i = 0; i < 8; i++)
 726                 regs_buff[873 + i] =
 727                 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
 728
 729         /* Statistics */
 730         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 731         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 732         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 733         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 734         for (i = 0; i < 8; i++)
 735                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 736         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 737         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 738         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 739         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 740         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 741         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 742         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 743         for (i = 0; i < 8; i++)
 744                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 745         for (i = 0; i < 8; i++)
 746                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 747         for (i = 0; i < 8; i++)
 748                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 749         for (i = 0; i < 8; i++)
 750                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 751         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 752         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 753         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 754         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 755         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 756         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 757         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 758         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 759         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 760         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 761         regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc);
 762         regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32);
 763         regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc);
 764         regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32);
 765         for (i = 0; i < 8; i++)
 766                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 767         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 768         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 769         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 770         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 771         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 772         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 773         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 774         regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor);
 775         regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32);
 776         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 777         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 778         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 779         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 780         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 781         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 782         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 783         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 784         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 785         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 786         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 787         for (i = 0; i < 16; i++)
 788                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 789         for (i = 0; i < 16; i++)
 790                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 791         for (i = 0; i < 16; i++)
 792                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 793         for (i = 0; i < 16; i++)
 794                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 795
 796         /* MAC */
 797         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 798         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 799         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 800         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 801         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 802         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 803         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 804         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 805         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 806         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 807         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 808         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 809         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 810         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 811         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 812         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 813         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 814         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 815         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 816         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 817         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 818         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 819         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 820         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 821         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 822         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 823         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 824         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 825         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 826         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 827         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 828         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 829         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 830
 831         /* Diagnostic */
 832         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 833         for (i = 0; i < 8; i++)
 834                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 835         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 836         for (i = 0; i < 4; i++)
 837                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 838         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 839         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 840         for (i = 0; i < 8; i++)
 841                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 842         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 843         for (i = 0; i < 4; i++)
 844                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 845         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 846         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 847         for (i = 0; i < 4; i++)
 848                 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i));
 849         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 850         for (i = 0; i < 4; i++)
 851                 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i));
 852         for (i = 0; i < 8; i++)
 853                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 854         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 855         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 856         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 857         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 858         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 859         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 860         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 861         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 862         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 863
 864         /* 82599 X540 specific registers  */
 865         regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
 866
 867         /* 82599 X540 specific DCB registers  */
 868         regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
 869         regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
 870         for (i = 0; i < 4; i++)
 871                 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
 872         regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
 873                                         /* same as RTTQCNRM */
 874         regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
 875                                         /* same as RTTQCNRR */
 876
 877         /* X540 specific DCB registers  */
 878         regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
 879         regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
 880 }
 881
 882 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 883 {
 884         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 885         return adapter->hw.eeprom.word_size * 2;
 886 }
 887
 888 static int ixgbe_get_eeprom(struct net_device *netdev,
 889                             struct ethtool_eeprom *eeprom, u8 *bytes)
 890 {
 891         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 892         struct ixgbe_hw *hw = &adapter->hw;
 893         u16 *eeprom_buff;
 894         int first_word, last_word, eeprom_len;
 895         int ret_val = 0;
 896         u16 i;
 897
 898         if (eeprom->len == 0)
 899                 return -EINVAL;
 900
 901         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 902
 903         first_word = eeprom->offset >> 1;
 904         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 905         eeprom_len = last_word - first_word + 1;
 906
 907         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 908         if (!eeprom_buff)
 909                 return -ENOMEM;
 910
 911         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 912                                              eeprom_buff);
 913
 914         /* Device's eeprom is always little-endian, word addressable */
 915         for (i = 0; i < eeprom_len; i++)
 916                 le16_to_cpus(&eeprom_buff[i]);
 917
 918         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 919         kfree(eeprom_buff);
 920
 921         return ret_val;
 922 }
 923
 924 static int ixgbe_set_eeprom(struct net_device *netdev,
 925                             struct ethtool_eeprom *eeprom, u8 *bytes)
 926 {
 927         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 928         struct ixgbe_hw *hw = &adapter->hw;
 929         u16 *eeprom_buff;
 930         void *ptr;
 931         int max_len, first_word, last_word, ret_val = 0;
 932         u16 i;
 933
 934         if (eeprom->len == 0)
 935                 return -EINVAL;
 936
 937         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 938                 return -EINVAL;
 939
 940         max_len = hw->eeprom.word_size * 2;
 941
 942         first_word = eeprom->offset >> 1;
 943         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 944         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 945         if (!eeprom_buff)
 946                 return -ENOMEM;
 947
 948         ptr = eeprom_buff;
 949
 950         if (eeprom->offset & 1) {
 951                 /*
 952                  * need read/modify/write of first changed EEPROM word
 953                  * only the second byte of the word is being modified
 954                  */
 955                 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
 956                 if (ret_val)
 957                         goto err;
 958
 959                 ptr++;
 960         }
 961         if ((eeprom->offset + eeprom->len) & 1) {
 962                 /*
 963                  * need read/modify/write of last changed EEPROM word
 964                  * only the first byte of the word is being modified
 965                  */
 966                 ret_val = hw->eeprom.ops.read(hw, last_word,
 967                                           &eeprom_buff[last_word - first_word]);
 968                 if (ret_val)
 969                         goto err;
 970         }
 971
 972         /* Device's eeprom is always little-endian, word addressable */
 973         for (i = 0; i < last_word - first_word + 1; i++)
 974                 le16_to_cpus(&eeprom_buff[i]);
 975
 976         memcpy(ptr, bytes, eeprom->len);
 977
 978         for (i = 0; i < last_word - first_word + 1; i++)
 979                 cpu_to_le16s(&eeprom_buff[i]);
 980
 981         ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
 982                                               last_word - first_word + 1,
 983                                               eeprom_buff);
 984
 985         /* Update the checksum */
 986         if (ret_val == 0)
 987                 hw->eeprom.ops.update_checksum(hw);
 988
 989 err:
 990         kfree(eeprom_buff);
 991         return ret_val;
 992 }
 993
 994 static void ixgbe_get_drvinfo(struct net_device *netdev,
 995                               struct ethtool_drvinfo *drvinfo)
 996 {
 997         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 998         u32 nvm_track_id;
 999
1000         strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
1001         strlcpy(drvinfo->version, ixgbe_driver_version,
1002                 sizeof(drvinfo->version));
1003
1004         nvm_track_id = (adapter->eeprom_verh << 16) |
1005                         adapter->eeprom_verl;
1006         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "0x%08x",
1007                  nvm_track_id);
1008
1009         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
1010                 sizeof(drvinfo->bus_info));
1011
1012         drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN;
1013 }
1014
1015 static void ixgbe_get_ringparam(struct net_device *netdev,
1016                                 struct ethtool_ringparam *ring)
1017 {
1018         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1019         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
1020         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1021
1022         ring->rx_max_pending = IXGBE_MAX_RXD;
1023         ring->tx_max_pending = IXGBE_MAX_TXD;
1024         ring->rx_pending = rx_ring->count;
1025         ring->tx_pending = tx_ring->count;
1026 }
1027
1028 static int ixgbe_set_ringparam(struct net_device *netdev,
1029                                struct ethtool_ringparam *ring)
1030 {
1031         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1032         struct ixgbe_ring *temp_ring;
1033         int i, err = 0;
1034         u32 new_rx_count, new_tx_count;
1035
1036         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1037                 return -EINVAL;
1038
1039         new_tx_count = clamp_t(u32, ring->tx_pending,
1040                                IXGBE_MIN_TXD, IXGBE_MAX_TXD);
1041         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
1042
1043         new_rx_count = clamp_t(u32, ring->rx_pending,
1044                                IXGBE_MIN_RXD, IXGBE_MAX_RXD);
1045         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
1046
1047         if ((new_tx_count == adapter->tx_ring_count) &&
1048             (new_rx_count == adapter->rx_ring_count)) {
1049                 /* nothing to do */
1050                 return 0;
1051         }
1052
1053         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1054                 usleep_range(1000, 2000);
1055
1056         if (!netif_running(adapter->netdev)) {
1057                 for (i = 0; i < adapter->num_tx_queues; i++)
1058                         adapter->tx_ring[i]->count = new_tx_count;
1059                 for (i = 0; i < adapter->num_rx_queues; i++)
1060                         adapter->rx_ring[i]->count = new_rx_count;
1061                 adapter->tx_ring_count = new_tx_count;
1062                 adapter->rx_ring_count = new_rx_count;
1063                 goto clear_reset;
1064         }
1065
1066         /* allocate temporary buffer to store rings in */
1067         i = max_t(int, adapter->num_tx_queues, adapter->num_rx_queues);
1068         temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));
1069
1070         if (!temp_ring) {
1071                 err = -ENOMEM;
1072                 goto clear_reset;
1073         }
1074
1075         ixgbe_down(adapter);
1076
1077         /*
1078          * Setup new Tx resources and free the old Tx resources in that order.
1079          * We can then assign the new resources to the rings via a memcpy.
1080          * The advantage to this approach is that we are guaranteed to still
1081          * have resources even in the case of an allocation failure.
1082          */
1083         if (new_tx_count != adapter->tx_ring_count) {
1084                 for (i = 0; i < adapter->num_tx_queues; i++) {
1085                         memcpy(&temp_ring[i], adapter->tx_ring[i],
1086                                sizeof(struct ixgbe_ring));
1087
1088                         temp_ring[i].count = new_tx_count;
1089                         err = ixgbe_setup_tx_resources(&temp_ring[i]);
1090                         if (err) {
1091                                 while (i) {
1092                                         i--;
1093                                         ixgbe_free_tx_resources(&temp_ring[i]);
1094                                 }
1095                                 goto err_setup;
1096                         }
1097                 }
1098
1099                 for (i = 0; i < adapter->num_tx_queues; i++) {
1100                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
1101
1102                         memcpy(adapter->tx_ring[i], &temp_ring[i],
1103                                sizeof(struct ixgbe_ring));
1104                 }
1105
1106                 adapter->tx_ring_count = new_tx_count;
1107         }
1108
1109         /* Repeat the process for the Rx rings if needed */
1110         if (new_rx_count != adapter->rx_ring_count) {
1111                 for (i = 0; i < adapter->num_rx_queues; i++) {
1112                         memcpy(&temp_ring[i], adapter->rx_ring[i],
1113                                sizeof(struct ixgbe_ring));
1114
1115                         temp_ring[i].count = new_rx_count;
1116                         err = ixgbe_setup_rx_resources(&temp_ring[i]);
1117                         if (err) {
1118                                 while (i) {
1119                                         i--;
1120                                         ixgbe_free_rx_resources(&temp_ring[i]);
1121                                 }
1122                                 goto err_setup;
1123                         }
1124
1125                 }
1126
1127                 for (i = 0; i < adapter->num_rx_queues; i++) {
1128                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
1129
1130                         memcpy(adapter->rx_ring[i], &temp_ring[i],
1131                                sizeof(struct ixgbe_ring));
1132                 }
1133
1134                 adapter->rx_ring_count = new_rx_count;
1135         }
1136
1137 err_setup:
1138         ixgbe_up(adapter);
1139         vfree(temp_ring);
1140 clear_reset:
1141         clear_bit(__IXGBE_RESETTING, &adapter->state);
1142         return err;
1143 }
1144
1145 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1146 {
1147         switch (sset) {
1148         case ETH_SS_TEST:
1149                 return IXGBE_TEST_LEN;
1150         case ETH_SS_STATS:
1151                 return IXGBE_STATS_LEN;
1152         case ETH_SS_PRIV_FLAGS:
1153                 return IXGBE_PRIV_FLAGS_STR_LEN;
1154         default:
1155                 return -EOPNOTSUPP;
1156         }
1157 }
1158
1159 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1160                                     struct ethtool_stats *stats, u64 *data)
1161 {
1162         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1163         struct rtnl_link_stats64 temp;
1164         const struct rtnl_link_stats64 *net_stats;
1165         unsigned int start;
1166         struct ixgbe_ring *ring;
1167         int i, j;
1168         char *p = NULL;
1169
1170         ixgbe_update_stats(adapter);
1171         net_stats = dev_get_stats(netdev, &temp);
1172         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1173                 switch (ixgbe_gstrings_stats[i].type) {
1174                 case NETDEV_STATS:
1175                         p = (char *) net_stats +
1176                                         ixgbe_gstrings_stats[i].stat_offset;
1177                         break;
1178                 case IXGBE_STATS:
1179                         p = (char *) adapter +
1180                                         ixgbe_gstrings_stats[i].stat_offset;
1181                         break;
1182                 default:
1183                         data[i] = 0;
1184                         continue;
1185                 }
1186
1187                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1188                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1189         }
1190         for (j = 0; j < netdev->num_tx_queues; j++) {
1191                 ring = adapter->tx_ring[j];
1192                 if (!ring) {
1193                         data[i] = 0;
1194                         data[i+1] = 0;
1195                         i += 2;
1196                         continue;
1197                 }
1198
1199                 do {
1200                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1201                         data[i]   = ring->stats.packets;
1202                         data[i+1] = ring->stats.bytes;
1203                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1204                 i += 2;
1205         }
1206         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1207                 ring = adapter->rx_ring[j];
1208                 if (!ring) {
1209                         data[i] = 0;
1210                         data[i+1] = 0;
1211                         i += 2;
1212                         continue;
1213                 }
1214
1215                 do {
1216                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1217                         data[i]   = ring->stats.packets;
1218                         data[i+1] = ring->stats.bytes;
1219                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1220                 i += 2;
1221         }
1222
1223         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1224                 data[i++] = adapter->stats.pxontxc[j];
1225                 data[i++] = adapter->stats.pxofftxc[j];
1226         }
1227         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1228                 data[i++] = adapter->stats.pxonrxc[j];
1229                 data[i++] = adapter->stats.pxoffrxc[j];
1230         }
1231 }
1232
1233 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1234                               u8 *data)
1235 {
1236         char *p = (char *)data;
1237         int i;
1238
1239         switch (stringset) {
1240         case ETH_SS_TEST:
1241                 for (i = 0; i < IXGBE_TEST_LEN; i++) {
1242                         memcpy(data, ixgbe_gstrings_test[i], ETH_GSTRING_LEN);
1243                         data += ETH_GSTRING_LEN;
1244                 }
1245                 break;
1246         case ETH_SS_STATS:
1247                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1248                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1249                                ETH_GSTRING_LEN);
1250                         p += ETH_GSTRING_LEN;
1251                 }
1252                 for (i = 0; i < netdev->num_tx_queues; i++) {
1253                         sprintf(p, "tx_queue_%u_packets", i);
1254                         p += ETH_GSTRING_LEN;
1255                         sprintf(p, "tx_queue_%u_bytes", i);
1256                         p += ETH_GSTRING_LEN;
1257                 }
1258                 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1259                         sprintf(p, "rx_queue_%u_packets", i);
1260                         p += ETH_GSTRING_LEN;
1261                         sprintf(p, "rx_queue_%u_bytes", i);
1262                         p += ETH_GSTRING_LEN;
1263                 }
1264                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1265                         sprintf(p, "tx_pb_%u_pxon", i);
1266                         p += ETH_GSTRING_LEN;
1267                         sprintf(p, "tx_pb_%u_pxoff", i);
1268                         p += ETH_GSTRING_LEN;
1269                 }
1270                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1271                         sprintf(p, "rx_pb_%u_pxon", i);
1272                         p += ETH_GSTRING_LEN;
1273                         sprintf(p, "rx_pb_%u_pxoff", i);
1274                         p += ETH_GSTRING_LEN;
1275                 }
1276                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1277                 break;
1278         case ETH_SS_PRIV_FLAGS:
1279                 memcpy(data, ixgbe_priv_flags_strings,
1280                        IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1281         }
1282 }
1283
1284 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1285 {
1286         struct ixgbe_hw *hw = &adapter->hw;
1287         bool link_up;
1288         u32 link_speed = 0;
1289
1290         if (ixgbe_removed(hw->hw_addr)) {
1291                 *data = 1;
1292                 return 1;
1293         }
1294         *data = 0;
1295
1296         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1297         if (link_up)
1298                 return *data;
1299         else
1300                 *data = 1;
1301         return *data;
1302 }
1303
1304 /* ethtool register test data */
1305 struct ixgbe_reg_test {
1306         u16 reg;
1307         u8  array_len;
1308         u8  test_type;
1309         u32 mask;
1310         u32 write;
1311 };
1312
1313 /* In the hardware, registers are laid out either singly, in arrays
1314  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1315  * most tests take place on arrays or single registers (handled
1316  * as a single-element array) and special-case the tables.
1317  * Table tests are always pattern tests.
1318  *
1319  * We also make provision for some required setup steps by specifying
1320  * registers to be written without any read-back testing.
1321  */
1322
1323 #define PATTERN_TEST    1
1324 #define SET_READ_TEST   2
1325 #define WRITE_NO_TEST   3
1326 #define TABLE32_TEST    4
1327 #define TABLE64_TEST_LO 5
1328 #define TABLE64_TEST_HI 6
1329
1330 /* default 82599 register test */
1331 static const struct ixgbe_reg_test reg_test_82599[] = {
1332         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1333         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1334         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1335         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1336         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1337         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1338         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1339         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1340         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1341         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1342         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1343         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1344         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1345         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1346         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1347         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1348         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1349         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1350         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1351         { .reg = 0 }
1352 };
1353
1354 /* default 82598 register test */
1355 static const struct ixgbe_reg_test reg_test_82598[] = {
1356         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1357         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1358         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1359         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1360         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1361         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1362         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1363         /* Enable all four RX queues before testing. */
1364         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1365         /* RDH is read-only for 82598, only test RDT. */
1366         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1367         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1368         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1369         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1370         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1371         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1372         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1373         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1374         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1375         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1376         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1377         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1378         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1379         { .reg = 0 }
1380 };
1381
1382 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1383                              u32 mask, u32 write)
1384 {
1385         u32 pat, val, before;
1386         static const u32 test_pattern[] = {
1387                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1388
1389         if (ixgbe_removed(adapter->hw.hw_addr)) {
1390                 *data = 1;
1391                 return true;
1392         }
1393         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1394                 before = ixgbe_read_reg(&adapter->hw, reg);
1395                 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1396                 val = ixgbe_read_reg(&adapter->hw, reg);
1397                 if (val != (test_pattern[pat] & write & mask)) {
1398                         e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1399                               reg, val, (test_pattern[pat] & write & mask));
1400                         *data = reg;
1401                         ixgbe_write_reg(&adapter->hw, reg, before);
1402                         return true;
1403                 }
1404                 ixgbe_write_reg(&adapter->hw, reg, before);
1405         }
1406         return false;
1407 }
1408
1409 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1410                               u32 mask, u32 write)
1411 {
1412         u32 val, before;
1413
1414         if (ixgbe_removed(adapter->hw.hw_addr)) {
1415                 *data = 1;
1416                 return true;
1417         }
1418         before = ixgbe_read_reg(&adapter->hw, reg);
1419         ixgbe_write_reg(&adapter->hw, reg, write & mask);
1420         val = ixgbe_read_reg(&adapter->hw, reg);
1421         if ((write & mask) != (val & mask)) {
1422                 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1423                       reg, (val & mask), (write & mask));
1424                 *data = reg;
1425                 ixgbe_write_reg(&adapter->hw, reg, before);
1426                 return true;
1427         }
1428         ixgbe_write_reg(&adapter->hw, reg, before);
1429         return false;
1430 }
1431
1432 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1433 {
1434         const struct ixgbe_reg_test *test;
1435         u32 value, before, after;
1436         u32 i, toggle;
1437
1438         if (ixgbe_removed(adapter->hw.hw_addr)) {
1439                 e_err(drv, "Adapter removed - register test blocked\n");
1440                 *data = 1;
1441                 return 1;
1442         }
1443         switch (adapter->hw.mac.type) {
1444         case ixgbe_mac_82598EB:
1445                 toggle = 0x7FFFF3FF;
1446                 test = reg_test_82598;
1447                 break;
1448         case ixgbe_mac_82599EB:
1449         case ixgbe_mac_X540:
1450         case ixgbe_mac_X550:
1451         case ixgbe_mac_X550EM_x:
1452         case ixgbe_mac_x550em_a:
1453                 toggle = 0x7FFFF30F;
1454                 test = reg_test_82599;
1455                 break;
1456         default:
1457                 *data = 1;
1458                 return 1;
1459         }
1460
1461         /*
1462          * Because the status register is such a special case,
1463          * we handle it separately from the rest of the register
1464          * tests.  Some bits are read-only, some toggle, and some
1465          * are writeable on newer MACs.
1466          */
1467         before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1468         value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1469         ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1470         after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1471         if (value != after) {
1472                 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1473                       after, value);
1474                 *data = 1;
1475                 return 1;
1476         }
1477         /* restore previous status */
1478         ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1479
1480         /*
1481          * Perform the remainder of the register test, looping through
1482          * the test table until we either fail or reach the null entry.
1483          */
1484         while (test->reg) {
1485                 for (i = 0; i < test->array_len; i++) {
1486                         bool b = false;
1487
1488                         switch (test->test_type) {
1489                         case PATTERN_TEST:
1490                                 b = reg_pattern_test(adapter, data,
1491                                                      test->reg + (i * 0x40),
1492                                                      test->mask,
1493                                                      test->write);
1494                                 break;
1495                         case SET_READ_TEST:
1496                                 b = reg_set_and_check(adapter, data,
1497                                                       test->reg + (i * 0x40),
1498                                                       test->mask,
1499                                                       test->write);
1500                                 break;
1501                         case WRITE_NO_TEST:
1502                                 ixgbe_write_reg(&adapter->hw,
1503                                                 test->reg + (i * 0x40),
1504                                                 test->write);
1505                                 break;
1506                         case TABLE32_TEST:
1507                                 b = reg_pattern_test(adapter, data,
1508                                                      test->reg + (i * 4),
1509                                                      test->mask,
1510                                                      test->write);
1511                                 break;
1512                         case TABLE64_TEST_LO:
1513                                 b = reg_pattern_test(adapter, data,
1514                                                      test->reg + (i * 8),
1515                                                      test->mask,
1516                                                      test->write);
1517                                 break;
1518                         case TABLE64_TEST_HI:
1519                                 b = reg_pattern_test(adapter, data,
1520                                                      (test->reg + 4) + (i * 8),
1521                                                      test->mask,
1522                                                      test->write);
1523                                 break;
1524                         }
1525                         if (b)
1526                                 return 1;
1527                 }
1528                 test++;
1529         }
1530
1531         *data = 0;
1532         return 0;
1533 }
1534
1535 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1536 {
1537         struct ixgbe_hw *hw = &adapter->hw;
1538         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1539                 *data = 1;
1540         else
1541                 *data = 0;
1542         return *data;
1543 }
1544
1545 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1546 {
1547         struct net_device *netdev = (struct net_device *) data;
1548         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1549
1550         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1551
1552         return IRQ_HANDLED;
1553 }
1554
1555 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1556 {
1557         struct net_device *netdev = adapter->netdev;
1558         u32 mask, i = 0, shared_int = true;
1559         u32 irq = adapter->pdev->irq;
1560
1561         *data = 0;
1562
1563         /* Hook up test interrupt handler just for this test */
1564         if (adapter->msix_entries) {
1565                 /* NOTE: we don't test MSI-X interrupts here, yet */
1566                 return 0;
1567         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1568                 shared_int = false;
1569                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1570                                 netdev)) {
1571                         *data = 1;
1572                         return -1;
1573                 }
1574         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1575                                 netdev->name, netdev)) {
1576                 shared_int = false;
1577         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1578                                netdev->name, netdev)) {
1579                 *data = 1;
1580                 return -1;
1581         }
1582         e_info(hw, "testing %s interrupt\n", shared_int ?
1583                "shared" : "unshared");
1584
1585         /* Disable all the interrupts */
1586         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1587         IXGBE_WRITE_FLUSH(&adapter->hw);
1588         usleep_range(10000, 20000);
1589
1590         /* Test each interrupt */
1591         for (; i < 10; i++) {
1592                 /* Interrupt to test */
1593                 mask = BIT(i);
1594
1595                 if (!shared_int) {
1596                         /*
1597                          * Disable the interrupts to be reported in
1598                          * the cause register and then force the same
1599                          * interrupt and see if one gets posted.  If
1600                          * an interrupt was posted to the bus, the
1601                          * test failed.
1602                          */
1603                         adapter->test_icr = 0;
1604                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1605                                         ~mask & 0x00007FFF);
1606                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1607                                         ~mask & 0x00007FFF);
1608                         IXGBE_WRITE_FLUSH(&adapter->hw);
1609                         usleep_range(10000, 20000);
1610
1611                         if (adapter->test_icr & mask) {
1612                                 *data = 3;
1613                                 break;
1614                         }
1615                 }
1616
1617                 /*
1618                  * Enable the interrupt to be reported in the cause
1619                  * register and then force the same interrupt and see
1620                  * if one gets posted.  If an interrupt was not posted
1621                  * to the bus, the test failed.
1622                  */
1623                 adapter->test_icr = 0;
1624                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1625                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1626                 IXGBE_WRITE_FLUSH(&adapter->hw);
1627                 usleep_range(10000, 20000);
1628
1629                 if (!(adapter->test_icr & mask)) {
1630                         *data = 4;
1631                         break;
1632                 }
1633
1634                 if (!shared_int) {
1635                         /*
1636                          * Disable the other interrupts to be reported in
1637                          * the cause register and then force the other
1638                          * interrupts and see if any get posted.  If
1639                          * an interrupt was posted to the bus, the
1640                          * test failed.
1641                          */
1642                         adapter->test_icr = 0;
1643                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1644                                         ~mask & 0x00007FFF);
1645                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1646                                         ~mask & 0x00007FFF);
1647                         IXGBE_WRITE_FLUSH(&adapter->hw);
1648                         usleep_range(10000, 20000);
1649
1650                         if (adapter->test_icr) {
1651                                 *data = 5;
1652                                 break;
1653                         }
1654                 }
1655         }
1656
1657         /* Disable all the interrupts */
1658         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1659         IXGBE_WRITE_FLUSH(&adapter->hw);
1660         usleep_range(10000, 20000);
1661
1662         /* Unhook test interrupt handler */
1663         free_irq(irq, netdev);
1664
1665         return *data;
1666 }
1667
1668 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1669 {
1670         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1671         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1672         struct ixgbe_hw *hw = &adapter->hw;
1673         u32 reg_ctl;
1674
1675         /* shut down the DMA engines now so they can be reinitialized later */
1676
1677         /* first Rx */
1678         hw->mac.ops.disable_rx(hw);
1679         ixgbe_disable_rx_queue(adapter, rx_ring);
1680
1681         /* now Tx */
1682         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1683         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1684         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1685
1686         switch (hw->mac.type) {
1687         case ixgbe_mac_82599EB:
1688         case ixgbe_mac_X540:
1689         case ixgbe_mac_X550:
1690         case ixgbe_mac_X550EM_x:
1691         case ixgbe_mac_x550em_a:
1692                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1693                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1694                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1695                 break;
1696         default:
1697                 break;
1698         }
1699
1700         ixgbe_reset(adapter);
1701
1702         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1703         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1704 }
1705
1706 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1707 {
1708         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1709         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1710         struct ixgbe_hw *hw = &adapter->hw;
1711         u32 rctl, reg_data;
1712         int ret_val;
1713         int err;
1714
1715         /* Setup Tx descriptor ring and Tx buffers */
1716         tx_ring->count = IXGBE_DEFAULT_TXD;
1717         tx_ring->queue_index = 0;
1718         tx_ring->dev = &adapter->pdev->dev;
1719         tx_ring->netdev = adapter->netdev;
1720         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1721
1722         err = ixgbe_setup_tx_resources(tx_ring);
1723         if (err)
1724                 return 1;
1725
1726         switch (adapter->hw.mac.type) {
1727         case ixgbe_mac_82599EB:
1728         case ixgbe_mac_X540:
1729         case ixgbe_mac_X550:
1730         case ixgbe_mac_X550EM_x:
1731         case ixgbe_mac_x550em_a:
1732                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1733                 reg_data |= IXGBE_DMATXCTL_TE;
1734                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1735                 break;
1736         default:
1737                 break;
1738         }
1739
1740         ixgbe_configure_tx_ring(adapter, tx_ring);
1741
1742         /* Setup Rx Descriptor ring and Rx buffers */
1743         rx_ring->count = IXGBE_DEFAULT_RXD;
1744         rx_ring->queue_index = 0;
1745         rx_ring->dev = &adapter->pdev->dev;
1746         rx_ring->netdev = adapter->netdev;
1747         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1748
1749         err = ixgbe_setup_rx_resources(rx_ring);
1750         if (err) {
1751                 ret_val = 4;
1752                 goto err_nomem;
1753         }
1754
1755         hw->mac.ops.disable_rx(hw);
1756
1757         ixgbe_configure_rx_ring(adapter, rx_ring);
1758
1759         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1760         rctl |= IXGBE_RXCTRL_DMBYPS;
1761         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1762
1763         hw->mac.ops.enable_rx(hw);
1764
1765         return 0;
1766
1767 err_nomem:
1768         ixgbe_free_desc_rings(adapter);
1769         return ret_val;
1770 }
1771
1772 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1773 {
1774         struct ixgbe_hw *hw = &adapter->hw;
1775         u32 reg_data;
1776
1777
1778         /* Setup MAC loopback */
1779         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1780         reg_data |= IXGBE_HLREG0_LPBK;
1781         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1782
1783         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1784         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1785         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1786
1787         /* X540 and X550 needs to set the MACC.FLU bit to force link up */
1788         switch (adapter->hw.mac.type) {
1789         case ixgbe_mac_X540:
1790         case ixgbe_mac_X550:
1791         case ixgbe_mac_X550EM_x:
1792         case ixgbe_mac_x550em_a:
1793                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1794                 reg_data |= IXGBE_MACC_FLU;
1795                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1796                 break;
1797         default:
1798                 if (hw->mac.orig_autoc) {
1799                         reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
1800                         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1801                 } else {
1802                         return 10;
1803                 }
1804         }
1805         IXGBE_WRITE_FLUSH(hw);
1806         usleep_range(10000, 20000);
1807
1808         /* Disable Atlas Tx lanes; re-enabled in reset path */
1809         if (hw->mac.type == ixgbe_mac_82598EB) {
1810                 u8 atlas;
1811
1812                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1813                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1814                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1815
1816                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1817                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1818                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1819
1820                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1821                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1822                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1823
1824                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1825                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1826                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1827         }
1828
1829         return 0;
1830 }
1831
1832 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1833 {
1834         u32 reg_data;
1835
1836         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1837         reg_data &= ~IXGBE_HLREG0_LPBK;
1838         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1839 }
1840
1841 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1842                                       unsigned int frame_size)
1843 {
1844         memset(skb->data, 0xFF, frame_size);
1845         frame_size >>= 1;
1846         memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1847         memset(&skb->data[frame_size + 10], 0xBE, 1);
1848         memset(&skb->data[frame_size + 12], 0xAF, 1);
1849 }
1850
1851 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1852                                      unsigned int frame_size)
1853 {
1854         unsigned char *data;
1855         bool match = true;
1856
1857         frame_size >>= 1;
1858
1859         data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1860
1861         if (data[3] != 0xFF ||
1862             data[frame_size + 10] != 0xBE ||
1863             data[frame_size + 12] != 0xAF)
1864                 match = false;
1865
1866         kunmap(rx_buffer->page);
1867
1868         return match;
1869 }
1870
1871 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1872                                   struct ixgbe_ring *tx_ring,
1873                                   unsigned int size)
1874 {
1875         union ixgbe_adv_rx_desc *rx_desc;
1876         struct ixgbe_rx_buffer *rx_buffer;
1877         struct ixgbe_tx_buffer *tx_buffer;
1878         u16 rx_ntc, tx_ntc, count = 0;
1879
1880         /* initialize next to clean and descriptor values */
1881         rx_ntc = rx_ring->next_to_clean;
1882         tx_ntc = tx_ring->next_to_clean;
1883         rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1884
1885         while (rx_desc->wb.upper.length) {
1886                 /* check Rx buffer */
1887                 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
1888
1889                 /* sync Rx buffer for CPU read */
1890                 dma_sync_single_for_cpu(rx_ring->dev,
1891                                         rx_buffer->dma,
1892                                         ixgbe_rx_bufsz(rx_ring),
1893                                         DMA_FROM_DEVICE);
1894
1895                 /* verify contents of skb */
1896                 if (ixgbe_check_lbtest_frame(rx_buffer, size))
1897                         count++;
1898
1899                 /* sync Rx buffer for device write */
1900                 dma_sync_single_for_device(rx_ring->dev,
1901                                            rx_buffer->dma,
1902                                            ixgbe_rx_bufsz(rx_ring),
1903                                            DMA_FROM_DEVICE);
1904
1905                 /* unmap buffer on Tx side */
1906                 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
1907
1908                 /* Free all the Tx ring sk_buffs */
1909                 dev_kfree_skb_any(tx_buffer->skb);
1910
1911                 /* unmap skb header data */
1912                 dma_unmap_single(tx_ring->dev,
1913                                  dma_unmap_addr(tx_buffer, dma),
1914                                  dma_unmap_len(tx_buffer, len),
1915                                  DMA_TO_DEVICE);
1916                 dma_unmap_len_set(tx_buffer, len, 0);
1917
1918                 /* increment Rx/Tx next to clean counters */
1919                 rx_ntc++;
1920                 if (rx_ntc == rx_ring->count)
1921                         rx_ntc = 0;
1922                 tx_ntc++;
1923                 if (tx_ntc == tx_ring->count)
1924                         tx_ntc = 0;
1925
1926                 /* fetch next descriptor */
1927                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1928         }
1929
1930         netdev_tx_reset_queue(txring_txq(tx_ring));
1931
1932         /* re-map buffers to ring, store next to clean values */
1933         ixgbe_alloc_rx_buffers(rx_ring, count);
1934         rx_ring->next_to_clean = rx_ntc;
1935         tx_ring->next_to_clean = tx_ntc;
1936
1937         return count;
1938 }
1939
1940 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1941 {
1942         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1943         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1944         int i, j, lc, good_cnt, ret_val = 0;
1945         unsigned int size = 1024;
1946         netdev_tx_t tx_ret_val;
1947         struct sk_buff *skb;
1948         u32 flags_orig = adapter->flags;
1949
1950         /* DCB can modify the frames on Tx */
1951         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
1952
1953         /* allocate test skb */
1954         skb = alloc_skb(size, GFP_KERNEL);
1955         if (!skb)
1956                 return 11;
1957
1958         /* place data into test skb */
1959         ixgbe_create_lbtest_frame(skb, size);
1960         skb_put(skb, size);
1961
1962         /*
1963          * Calculate the loop count based on the largest descriptor ring
1964          * The idea is to wrap the largest ring a number of times using 64
1965          * send/receive pairs during each loop
1966          */
1967
1968         if (rx_ring->count <= tx_ring->count)
1969                 lc = ((tx_ring->count / 64) * 2) + 1;
1970         else
1971                 lc = ((rx_ring->count / 64) * 2) + 1;
1972
1973         for (j = 0; j <= lc; j++) {
1974                 /* reset count of good packets */
1975                 good_cnt = 0;
1976
1977                 /* place 64 packets on the transmit queue*/
1978                 for (i = 0; i < 64; i++) {
1979                         skb_get(skb);
1980                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1981                                                            adapter,
1982                                                            tx_ring);
1983                         if (tx_ret_val == NETDEV_TX_OK)
1984                                 good_cnt++;
1985                 }
1986
1987                 if (good_cnt != 64) {
1988                         ret_val = 12;
1989                         break;
1990                 }
1991
1992                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1993                 msleep(200);
1994
1995                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1996                 if (good_cnt != 64) {
1997                         ret_val = 13;
1998                         break;
1999                 }
2000         }
2001
2002         /* free the original skb */
2003         kfree_skb(skb);
2004         adapter->flags = flags_orig;
2005
2006         return ret_val;
2007 }
2008
2009 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
2010 {
2011         *data = ixgbe_setup_desc_rings(adapter);
2012         if (*data)
2013                 goto out;
2014         *data = ixgbe_setup_loopback_test(adapter);
2015         if (*data)
2016                 goto err_loopback;
2017         *data = ixgbe_run_loopback_test(adapter);
2018         ixgbe_loopback_cleanup(adapter);
2019
2020 err_loopback:
2021         ixgbe_free_desc_rings(adapter);
2022 out:
2023         return *data;
2024 }
2025
2026 static void ixgbe_diag_test(struct net_device *netdev,
2027                             struct ethtool_test *eth_test, u64 *data)
2028 {
2029         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2030         bool if_running = netif_running(netdev);
2031
2032         if (ixgbe_removed(adapter->hw.hw_addr)) {
2033                 e_err(hw, "Adapter removed - test blocked\n");
2034                 data[0] = 1;
2035                 data[1] = 1;
2036                 data[2] = 1;
2037                 data[3] = 1;
2038                 data[4] = 1;
2039                 eth_test->flags |= ETH_TEST_FL_FAILED;
2040                 return;
2041         }
2042         set_bit(__IXGBE_TESTING, &adapter->state);
2043         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2044                 struct ixgbe_hw *hw = &adapter->hw;
2045
2046                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2047                         int i;
2048                         for (i = 0; i < adapter->num_vfs; i++) {
2049                                 if (adapter->vfinfo[i].clear_to_send) {
2050                                         netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
2051                                         data[0] = 1;
2052                                         data[1] = 1;
2053                                         data[2] = 1;
2054                                         data[3] = 1;
2055                                         data[4] = 1;
2056                                         eth_test->flags |= ETH_TEST_FL_FAILED;
2057                                         clear_bit(__IXGBE_TESTING,
2058                                                   &adapter->state);
2059                                         goto skip_ol_tests;
2060                                 }
2061                         }
2062                 }
2063
2064                 /* Offline tests */
2065                 e_info(hw, "offline testing starting\n");
2066
2067                 /* Link test performed before hardware reset so autoneg doesn't
2068                  * interfere with test result
2069                  */
2070                 if (ixgbe_link_test(adapter, &data[4]))
2071                         eth_test->flags |= ETH_TEST_FL_FAILED;
2072
2073                 if (if_running)
2074                         /* indicate we're in test mode */
2075                         ixgbe_close(netdev);
2076                 else
2077                         ixgbe_reset(adapter);
2078
2079                 e_info(hw, "register testing starting\n");
2080                 if (ixgbe_reg_test(adapter, &data[0]))
2081                         eth_test->flags |= ETH_TEST_FL_FAILED;
2082
2083                 ixgbe_reset(adapter);
2084                 e_info(hw, "eeprom testing starting\n");
2085                 if (ixgbe_eeprom_test(adapter, &data[1]))
2086                         eth_test->flags |= ETH_TEST_FL_FAILED;
2087
2088                 ixgbe_reset(adapter);
2089                 e_info(hw, "interrupt testing starting\n");
2090                 if (ixgbe_intr_test(adapter, &data[2]))
2091                         eth_test->flags |= ETH_TEST_FL_FAILED;
2092
2093                 /* If SRIOV or VMDq is enabled then skip MAC
2094                  * loopback diagnostic. */
2095                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2096                                       IXGBE_FLAG_VMDQ_ENABLED)) {
2097                         e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2098                         data[3] = 0;
2099                         goto skip_loopback;
2100                 }
2101
2102                 ixgbe_reset(adapter);
2103                 e_info(hw, "loopback testing starting\n");
2104                 if (ixgbe_loopback_test(adapter, &data[3]))
2105                         eth_test->flags |= ETH_TEST_FL_FAILED;
2106
2107 skip_loopback:
2108                 ixgbe_reset(adapter);
2109
2110                 /* clear testing bit and return adapter to previous state */
2111                 clear_bit(__IXGBE_TESTING, &adapter->state);
2112                 if (if_running)
2113                         ixgbe_open(netdev);
2114                 else if (hw->mac.ops.disable_tx_laser)
2115                         hw->mac.ops.disable_tx_laser(hw);
2116         } else {
2117                 e_info(hw, "online testing starting\n");
2118
2119                 /* Online tests */
2120                 if (ixgbe_link_test(adapter, &data[4]))
2121                         eth_test->flags |= ETH_TEST_FL_FAILED;
2122
2123                 /* Offline tests aren't run; pass by default */
2124                 data[0] = 0;
2125                 data[1] = 0;
2126                 data[2] = 0;
2127                 data[3] = 0;
2128
2129                 clear_bit(__IXGBE_TESTING, &adapter->state);
2130         }
2131
2132 skip_ol_tests:
2133         msleep_interruptible(4 * 1000);
2134 }
2135
2136 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2137                                struct ethtool_wolinfo *wol)
2138 {
2139         struct ixgbe_hw *hw = &adapter->hw;
2140         int retval = 0;
2141
2142         /* WOL not supported for all devices */
2143         if (!ixgbe_wol_supported(adapter, hw->device_id,
2144                                  hw->subsystem_device_id)) {
2145                 retval = 1;
2146                 wol->supported = 0;
2147         }
2148
2149         return retval;
2150 }
2151
2152 static void ixgbe_get_wol(struct net_device *netdev,
2153                           struct ethtool_wolinfo *wol)
2154 {
2155         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2156
2157         wol->supported = WAKE_UCAST | WAKE_MCAST |
2158                          WAKE_BCAST | WAKE_MAGIC;
2159         wol->wolopts = 0;
2160
2161         if (ixgbe_wol_exclusion(adapter, wol) ||
2162             !device_can_wakeup(&adapter->pdev->dev))
2163                 return;
2164
2165         if (adapter->wol & IXGBE_WUFC_EX)
2166                 wol->wolopts |= WAKE_UCAST;
2167         if (adapter->wol & IXGBE_WUFC_MC)
2168                 wol->wolopts |= WAKE_MCAST;
2169         if (adapter->wol & IXGBE_WUFC_BC)
2170                 wol->wolopts |= WAKE_BCAST;
2171         if (adapter->wol & IXGBE_WUFC_MAG)
2172                 wol->wolopts |= WAKE_MAGIC;
2173 }
2174
2175 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2176 {
2177         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2178
2179         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
2180                 return -EOPNOTSUPP;
2181
2182         if (ixgbe_wol_exclusion(adapter, wol))
2183                 return wol->wolopts ? -EOPNOTSUPP : 0;
2184
2185         adapter->wol = 0;
2186
2187         if (wol->wolopts & WAKE_UCAST)
2188                 adapter->wol |= IXGBE_WUFC_EX;
2189         if (wol->wolopts & WAKE_MCAST)
2190                 adapter->wol |= IXGBE_WUFC_MC;
2191         if (wol->wolopts & WAKE_BCAST)
2192                 adapter->wol |= IXGBE_WUFC_BC;
2193         if (wol->wolopts & WAKE_MAGIC)
2194                 adapter->wol |= IXGBE_WUFC_MAG;
2195
2196         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2197
2198         return 0;
2199 }
2200
2201 static int ixgbe_nway_reset(struct net_device *netdev)
2202 {
2203         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2204
2205         if (netif_running(netdev))
2206                 ixgbe_reinit_locked(adapter);
2207
2208         return 0;
2209 }
2210
2211 static int ixgbe_set_phys_id(struct net_device *netdev,
2212                              enum ethtool_phys_id_state state)
2213 {
2214         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2215         struct ixgbe_hw *hw = &adapter->hw;
2216
2217         switch (state) {
2218         case ETHTOOL_ID_ACTIVE:
2219                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2220                 return 2;
2221
2222         case ETHTOOL_ID_ON:
2223                 hw->mac.ops.led_on(hw, hw->mac.led_link_act);
2224                 break;
2225
2226         case ETHTOOL_ID_OFF:
2227                 hw->mac.ops.led_off(hw, hw->mac.led_link_act);
2228                 break;
2229
2230         case ETHTOOL_ID_INACTIVE:
2231                 /* Restore LED settings */
2232                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2233                 break;
2234         }
2235
2236         return 0;
2237 }
2238
2239 static int ixgbe_get_coalesce(struct net_device *netdev,
2240                               struct ethtool_coalesce *ec)
2241 {
2242         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2243
2244         /* only valid if in constant ITR mode */
2245         if (adapter->rx_itr_setting <= 1)
2246                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2247         else
2248                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2249
2250         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2251         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2252                 return 0;
2253
2254         /* only valid if in constant ITR mode */
2255         if (adapter->tx_itr_setting <= 1)
2256                 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2257         else
2258                 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2259
2260         return 0;
2261 }
2262
2263 /*
2264  * this function must be called before setting the new value of
2265  * rx_itr_setting
2266  */
2267 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2268 {
2269         struct net_device *netdev = adapter->netdev;
2270
2271         /* nothing to do if LRO or RSC are not enabled */
2272         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2273             !(netdev->features & NETIF_F_LRO))
2274                 return false;
2275
2276         /* check the feature flag value and enable RSC if necessary */
2277         if (adapter->rx_itr_setting == 1 ||
2278             adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2279                 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2280                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2281                         e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2282                         return true;
2283                 }
2284         /* if interrupt rate is too high then disable RSC */
2285         } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2286                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2287                 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2288                 return true;
2289         }
2290         return false;
2291 }
2292
2293 static int ixgbe_set_coalesce(struct net_device *netdev,
2294                               struct ethtool_coalesce *ec)
2295 {
2296         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2297         struct ixgbe_q_vector *q_vector;
2298         int i;
2299         u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2300         bool need_reset = false;
2301
2302         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2303                 /* reject Tx specific changes in case of mixed RxTx vectors */
2304                 if (ec->tx_coalesce_usecs)
2305                         return -EINVAL;
2306                 tx_itr_prev = adapter->rx_itr_setting;
2307         } else {
2308                 tx_itr_prev = adapter->tx_itr_setting;
2309         }
2310
2311         if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2312             (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2313                 return -EINVAL;
2314
2315         if (ec->rx_coalesce_usecs > 1)
2316                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2317         else
2318                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2319
2320         if (adapter->rx_itr_setting == 1)
2321                 rx_itr_param = IXGBE_20K_ITR;
2322         else
2323                 rx_itr_param = adapter->rx_itr_setting;
2324
2325         if (ec->tx_coalesce_usecs > 1)
2326                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2327         else
2328                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2329
2330         if (adapter->tx_itr_setting == 1)
2331                 tx_itr_param = IXGBE_12K_ITR;
2332         else
2333                 tx_itr_param = adapter->tx_itr_setting;
2334
2335         /* mixed Rx/Tx */
2336         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2337                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2338
2339         /* detect ITR changes that require update of TXDCTL.WTHRESH */
2340         if ((adapter->tx_itr_setting != 1) &&
2341             (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2342                 if ((tx_itr_prev == 1) ||
2343                     (tx_itr_prev >= IXGBE_100K_ITR))
2344                         need_reset = true;
2345         } else {
2346                 if ((tx_itr_prev != 1) &&
2347                     (tx_itr_prev < IXGBE_100K_ITR))
2348                         need_reset = true;
2349         }
2350
2351         /* check the old value and enable RSC if necessary */
2352         need_reset |= ixgbe_update_rsc(adapter);
2353
2354         for (i = 0; i < adapter->num_q_vectors; i++) {
2355                 q_vector = adapter->q_vector[i];
2356                 if (q_vector->tx.count && !q_vector->rx.count)
2357                         /* tx only */
2358                         q_vector->itr = tx_itr_param;
2359                 else
2360                         /* rx only or mixed */
2361                         q_vector->itr = rx_itr_param;
2362                 ixgbe_write_eitr(q_vector);
2363         }
2364
2365         /*
2366          * do reset here at the end to make sure EITR==0 case is handled
2367          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2368          * also locks in RSC enable/disable which requires reset
2369          */
2370         if (need_reset)
2371                 ixgbe_do_reset(netdev);
2372
2373         return 0;
2374 }
2375
2376 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2377                                         struct ethtool_rxnfc *cmd)
2378 {
2379         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2380         struct ethtool_rx_flow_spec *fsp =
2381                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2382         struct hlist_node *node2;
2383         struct ixgbe_fdir_filter *rule = NULL;
2384
2385         /* report total rule count */
2386         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2387
2388         hlist_for_each_entry_safe(rule, node2,
2389                                   &adapter->fdir_filter_list, fdir_node) {
2390                 if (fsp->location <= rule->sw_idx)
2391                         break;
2392         }
2393
2394         if (!rule || fsp->location != rule->sw_idx)
2395                 return -EINVAL;
2396
2397         /* fill out the flow spec entry */
2398
2399         /* set flow type field */
2400         switch (rule->filter.formatted.flow_type) {
2401         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2402                 fsp->flow_type = TCP_V4_FLOW;
2403                 break;
2404         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2405                 fsp->flow_type = UDP_V4_FLOW;
2406                 break;
2407         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2408                 fsp->flow_type = SCTP_V4_FLOW;
2409                 break;
2410         case IXGBE_ATR_FLOW_TYPE_IPV4:
2411                 fsp->flow_type = IP_USER_FLOW;
2412                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2413                 fsp->h_u.usr_ip4_spec.proto = 0;
2414                 fsp->m_u.usr_ip4_spec.proto = 0;
2415                 break;
2416         default:
2417                 return -EINVAL;
2418         }
2419
2420         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2421         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2422         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2423         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2424         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2425         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2426         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2427         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2428         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2429         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2430         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2431         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2432         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2433         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2434         fsp->flow_type |= FLOW_EXT;
2435
2436         /* record action */
2437         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2438                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2439         else
2440                 fsp->ring_cookie = rule->action;
2441
2442         return 0;
2443 }
2444
2445 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2446                                       struct ethtool_rxnfc *cmd,
2447                                       u32 *rule_locs)
2448 {
2449         struct hlist_node *node2;
2450         struct ixgbe_fdir_filter *rule;
2451         int cnt = 0;
2452
2453         /* report total rule count */
2454         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2455
2456         hlist_for_each_entry_safe(rule, node2,
2457                                   &adapter->fdir_filter_list, fdir_node) {
2458                 if (cnt == cmd->rule_cnt)
2459                         return -EMSGSIZE;
2460                 rule_locs[cnt] = rule->sw_idx;
2461                 cnt++;
2462         }
2463
2464         cmd->rule_cnt = cnt;
2465
2466         return 0;
2467 }
2468
2469 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2470                                    struct ethtool_rxnfc *cmd)
2471 {
2472         cmd->data = 0;
2473
2474         /* Report default options for RSS on ixgbe */
2475         switch (cmd->flow_type) {
2476         case TCP_V4_FLOW:
2477                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2478                 /* fallthrough */
2479         case UDP_V4_FLOW:
2480                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2481                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2482                 /* fallthrough */
2483         case SCTP_V4_FLOW:
2484         case AH_ESP_V4_FLOW:
2485         case AH_V4_FLOW:
2486         case ESP_V4_FLOW:
2487         case IPV4_FLOW:
2488                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2489                 break;
2490         case TCP_V6_FLOW:
2491                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2492                 /* fallthrough */
2493         case UDP_V6_FLOW:
2494                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2495                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2496                 /* fallthrough */
2497         case SCTP_V6_FLOW:
2498         case AH_ESP_V6_FLOW:
2499         case AH_V6_FLOW:
2500         case ESP_V6_FLOW:
2501         case IPV6_FLOW:
2502                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2503                 break;
2504         default:
2505                 return -EINVAL;
2506         }
2507
2508         return 0;
2509 }
2510
2511 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2512                            u32 *rule_locs)
2513 {
2514         struct ixgbe_adapter *adapter = netdev_priv(dev);
2515         int ret = -EOPNOTSUPP;
2516
2517         switch (cmd->cmd) {
2518         case ETHTOOL_GRXRINGS:
2519                 cmd->data = adapter->num_rx_queues;
2520                 ret = 0;
2521                 break;
2522         case ETHTOOL_GRXCLSRLCNT:
2523                 cmd->rule_cnt = adapter->fdir_filter_count;
2524                 ret = 0;
2525                 break;
2526         case ETHTOOL_GRXCLSRULE:
2527                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2528                 break;
2529         case ETHTOOL_GRXCLSRLALL:
2530                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2531                 break;
2532         case ETHTOOL_GRXFH:
2533                 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2534                 break;
2535         default:
2536                 break;
2537         }
2538
2539         return ret;
2540 }
2541
2542 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2543                                     struct ixgbe_fdir_filter *input,
2544                                     u16 sw_idx)
2545 {
2546         struct ixgbe_hw *hw = &adapter->hw;
2547         struct hlist_node *node2;
2548         struct ixgbe_fdir_filter *rule, *parent;
2549         int err = -EINVAL;
2550
2551         parent = NULL;
2552         rule = NULL;
2553
2554         hlist_for_each_entry_safe(rule, node2,
2555                                   &adapter->fdir_filter_list, fdir_node) {
2556                 /* hash found, or no matching entry */
2557                 if (rule->sw_idx >= sw_idx)
2558                         break;
2559                 parent = rule;
2560         }
2561
2562         /* if there is an old rule occupying our place remove it */
2563         if (rule && (rule->sw_idx == sw_idx)) {
2564                 if (!input || (rule->filter.formatted.bkt_hash !=
2565                                input->filter.formatted.bkt_hash)) {
2566                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2567                                                                 &rule->filter,
2568                                                                 sw_idx);
2569                 }
2570
2571                 hlist_del(&rule->fdir_node);
2572                 kfree(rule);
2573                 adapter->fdir_filter_count--;
2574         }
2575
2576         /*
2577          * If no input this was a delete, err should be 0 if a rule was
2578          * successfully found and removed from the list else -EINVAL
2579          */
2580         if (!input)
2581                 return err;
2582
2583         /* initialize node and set software index */
2584         INIT_HLIST_NODE(&input->fdir_node);
2585
2586         /* add filter to the list */
2587         if (parent)
2588                 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2589         else
2590                 hlist_add_head(&input->fdir_node,
2591                                &adapter->fdir_filter_list);
2592
2593         /* update counts */
2594         adapter->fdir_filter_count++;
2595
2596         return 0;
2597 }
2598
2599 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2600                                        u8 *flow_type)
2601 {
2602         switch (fsp->flow_type & ~FLOW_EXT) {
2603         case TCP_V4_FLOW:
2604                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2605                 break;
2606         case UDP_V4_FLOW:
2607                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2608                 break;
2609         case SCTP_V4_FLOW:
2610                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2611                 break;
2612         case IP_USER_FLOW:
2613                 switch (fsp->h_u.usr_ip4_spec.proto) {
2614                 case IPPROTO_TCP:
2615                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2616                         break;
2617                 case IPPROTO_UDP:
2618                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2619                         break;
2620                 case IPPROTO_SCTP:
2621                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2622                         break;
2623                 case 0:
2624                         if (!fsp->m_u.usr_ip4_spec.proto) {
2625                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2626                                 break;
2627                         }
2628                 default:
2629                         return 0;
2630                 }
2631                 break;
2632         default:
2633                 return 0;
2634         }
2635
2636         return 1;
2637 }
2638
2639 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2640                                         struct ethtool_rxnfc *cmd)
2641 {
2642         struct ethtool_rx_flow_spec *fsp =
2643                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2644         struct ixgbe_hw *hw = &adapter->hw;
2645         struct ixgbe_fdir_filter *input;
2646         union ixgbe_atr_input mask;
2647         u8 queue;
2648         int err;
2649
2650         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2651                 return -EOPNOTSUPP;
2652
2653         /* ring_cookie is a masked into a set of queues and ixgbe pools or
2654          * we use the drop index.
2655          */
2656         if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
2657                 queue = IXGBE_FDIR_DROP_QUEUE;
2658         } else {
2659                 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
2660                 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
2661
2662                 if (!vf && (ring >= adapter->num_rx_queues))
2663                         return -EINVAL;
2664                 else if (vf &&
2665                          ((vf > adapter->num_vfs) ||
2666                            ring >= adapter->num_rx_queues_per_pool))
2667                         return -EINVAL;
2668
2669                 /* Map the ring onto the absolute queue index */
2670                 if (!vf)
2671                         queue = adapter->rx_ring[ring]->reg_idx;
2672                 else
2673                         queue = ((vf - 1) *
2674                                 adapter->num_rx_queues_per_pool) + ring;
2675         }
2676
2677         /* Don't allow indexes to exist outside of available space */
2678         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2679                 e_err(drv, "Location out of range\n");
2680                 return -EINVAL;
2681         }
2682
2683         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2684         if (!input)
2685                 return -ENOMEM;
2686
2687         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2688
2689         /* set SW index */
2690         input->sw_idx = fsp->location;
2691
2692         /* record flow type */
2693         if (!ixgbe_flowspec_to_flow_type(fsp,
2694                                          &input->filter.formatted.flow_type)) {
2695                 e_err(drv, "Unrecognized flow type\n");
2696                 goto err_out;
2697         }
2698
2699         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2700                                    IXGBE_ATR_L4TYPE_MASK;
2701
2702         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2703                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2704
2705         /* Copy input into formatted structures */
2706         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2707         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2708         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2709         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2710         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2711         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2712         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2713         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2714
2715         if (fsp->flow_type & FLOW_EXT) {
2716                 input->filter.formatted.vm_pool =
2717                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2718                 mask.formatted.vm_pool =
2719                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2720                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2721                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2722                 input->filter.formatted.flex_bytes =
2723                                                 fsp->h_ext.vlan_etype;
2724                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2725         }
2726
2727         /* determine if we need to drop or route the packet */
2728         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2729                 input->action = IXGBE_FDIR_DROP_QUEUE;
2730         else
2731                 input->action = fsp->ring_cookie;
2732
2733         spin_lock(&adapter->fdir_perfect_lock);
2734
2735         if (hlist_empty(&adapter->fdir_filter_list)) {
2736                 /* save mask and program input mask into HW */
2737                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2738                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2739                 if (err) {
2740                         e_err(drv, "Error writing mask\n");
2741                         goto err_out_w_lock;
2742                 }
2743         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2744                 e_err(drv, "Only one mask supported per port\n");
2745                 goto err_out_w_lock;
2746         }
2747
2748         /* apply mask and compute/store hash */
2749         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2750
2751         /* program filters to filter memory */
2752         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2753                                 &input->filter, input->sw_idx, queue);
2754         if (err)
2755                 goto err_out_w_lock;
2756
2757         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2758
2759         spin_unlock(&adapter->fdir_perfect_lock);
2760
2761         return err;
2762 err_out_w_lock:
2763         spin_unlock(&adapter->fdir_perfect_lock);
2764 err_out:
2765         kfree(input);
2766         return -EINVAL;
2767 }
2768
2769 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2770                                         struct ethtool_rxnfc *cmd)
2771 {
2772         struct ethtool_rx_flow_spec *fsp =
2773                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2774         int err;
2775
2776         spin_lock(&adapter->fdir_perfect_lock);
2777         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2778         spin_unlock(&adapter->fdir_perfect_lock);
2779
2780         return err;
2781 }
2782
2783 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2784                        IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2785 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2786                                   struct ethtool_rxnfc *nfc)
2787 {
2788         u32 flags2 = adapter->flags2;
2789
2790         /*
2791          * RSS does not support anything other than hashing
2792          * to queues on src and dst IPs and ports
2793          */
2794         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2795                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2796                 return -EINVAL;
2797
2798         switch (nfc->flow_type) {
2799         case TCP_V4_FLOW:
2800         case TCP_V6_FLOW:
2801                 if (!(nfc->data & RXH_IP_SRC) ||
2802                     !(nfc->data & RXH_IP_DST) ||
2803                     !(nfc->data & RXH_L4_B_0_1) ||
2804                     !(nfc->data & RXH_L4_B_2_3))
2805                         return -EINVAL;
2806                 break;
2807         case UDP_V4_FLOW:
2808                 if (!(nfc->data & RXH_IP_SRC) ||
2809                     !(nfc->data & RXH_IP_DST))
2810                         return -EINVAL;
2811                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2812                 case 0:
2813                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2814                         break;
2815                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2816                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2817                         break;
2818                 default:
2819                         return -EINVAL;
2820                 }
2821                 break;
2822         case UDP_V6_FLOW:
2823                 if (!(nfc->data & RXH_IP_SRC) ||
2824                     !(nfc->data & RXH_IP_DST))
2825                         return -EINVAL;
2826                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2827                 case 0:
2828                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2829                         break;
2830                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2831                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2832                         break;
2833                 default:
2834                         return -EINVAL;
2835                 }
2836                 break;
2837         case AH_ESP_V4_FLOW:
2838         case AH_V4_FLOW:
2839         case ESP_V4_FLOW:
2840         case SCTP_V4_FLOW:
2841         case AH_ESP_V6_FLOW:
2842         case AH_V6_FLOW:
2843         case ESP_V6_FLOW:
2844         case SCTP_V6_FLOW:
2845                 if (!(nfc->data & RXH_IP_SRC) ||
2846                     !(nfc->data & RXH_IP_DST) ||
2847                     (nfc->data & RXH_L4_B_0_1) ||
2848                     (nfc->data & RXH_L4_B_2_3))
2849                         return -EINVAL;
2850                 break;
2851         default:
2852                 return -EINVAL;
2853         }
2854
2855         /* if we changed something we need to update flags */
2856         if (flags2 != adapter->flags2) {
2857                 struct ixgbe_hw *hw = &adapter->hw;
2858                 u32 mrqc;
2859                 unsigned int pf_pool = adapter->num_vfs;
2860
2861                 if ((hw->mac.type >= ixgbe_mac_X550) &&
2862                     (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2863                         mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
2864                 else
2865                         mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2866
2867                 if ((flags2 & UDP_RSS_FLAGS) &&
2868                     !(adapter->flags2 & UDP_RSS_FLAGS))
2869                         e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2870
2871                 adapter->flags2 = flags2;
2872
2873                 /* Perform hash on these packet types */
2874                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2875                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2876                       | IXGBE_MRQC_RSS_FIELD_IPV6
2877                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2878
2879                 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2880                           IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2881
2882                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2883                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2884
2885                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2886                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2887
2888                 if ((hw->mac.type >= ixgbe_mac_X550) &&
2889                     (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2890                         IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
2891                 else
2892                         IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2893         }
2894
2895         return 0;
2896 }
2897
2898 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2899 {
2900         struct ixgbe_adapter *adapter = netdev_priv(dev);
2901         int ret = -EOPNOTSUPP;
2902
2903         switch (cmd->cmd) {
2904         case ETHTOOL_SRXCLSRLINS:
2905                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2906                 break;
2907         case ETHTOOL_SRXCLSRLDEL:
2908                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2909                 break;
2910         case ETHTOOL_SRXFH:
2911                 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2912                 break;
2913         default:
2914                 break;
2915         }
2916
2917         return ret;
2918 }
2919
2920 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)
2921 {
2922         if (adapter->hw.mac.type < ixgbe_mac_X550)
2923                 return 16;
2924         else
2925                 return 64;
2926 }
2927
2928 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)
2929 {
2930         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2931
2932         return sizeof(adapter->rss_key);
2933 }
2934
2935 static u32 ixgbe_rss_indir_size(struct net_device *netdev)
2936 {
2937         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2938
2939         return ixgbe_rss_indir_tbl_entries(adapter);
2940 }
2941
2942 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)
2943 {
2944         int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter);
2945         u16 rss_m = adapter->ring_feature[RING_F_RSS].mask;
2946
2947         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
2948                 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1;
2949
2950         for (i = 0; i < reta_size; i++)
2951                 indir[i] = adapter->rss_indir_tbl[i] & rss_m;
2952 }
2953
2954 static int ixgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
2955                           u8 *hfunc)
2956 {
2957         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2958
2959         if (hfunc)
2960                 *hfunc = ETH_RSS_HASH_TOP;
2961
2962         if (indir)
2963                 ixgbe_get_reta(adapter, indir);
2964
2965         if (key)
2966                 memcpy(key, adapter->rss_key, ixgbe_get_rxfh_key_size(netdev));
2967
2968         return 0;
2969 }
2970
2971 static int ixgbe_set_rxfh(struct net_device *netdev, const u32 *indir,
2972                           const u8 *key, const u8 hfunc)
2973 {
2974         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2975         int i;
2976         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
2977
2978         if (hfunc)
2979                 return -EINVAL;
2980
2981         /* Fill out the redirection table */
2982         if (indir) {
2983                 int max_queues = min_t(int, adapter->num_rx_queues,
2984                                        ixgbe_rss_indir_tbl_max(adapter));
2985
2986                 /*Allow at least 2 queues w/ SR-IOV.*/
2987                 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
2988                     (max_queues < 2))
2989                         max_queues = 2;
2990
2991                 /* Verify user input. */
2992                 for (i = 0; i < reta_entries; i++)
2993                         if (indir[i] >= max_queues)
2994                                 return -EINVAL;
2995
2996                 for (i = 0; i < reta_entries; i++)
2997                         adapter->rss_indir_tbl[i] = indir[i];
2998         }
2999
3000         /* Fill out the rss hash key */
3001         if (key) {
3002                 memcpy(adapter->rss_key, key, ixgbe_get_rxfh_key_size(netdev));
3003                 ixgbe_store_key(adapter);
3004         }
3005
3006         ixgbe_store_reta(adapter);
3007
3008         return 0;
3009 }
3010
3011 static int ixgbe_get_ts_info(struct net_device *dev,
3012                              struct ethtool_ts_info *info)
3013 {
3014         struct ixgbe_adapter *adapter = netdev_priv(dev);
3015
3016         /* we always support timestamping disabled */
3017         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
3018
3019         switch (adapter->hw.mac.type) {
3020         case ixgbe_mac_X550:
3021         case ixgbe_mac_X550EM_x:
3022         case ixgbe_mac_x550em_a:
3023                 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
3024                 /* fallthrough */
3025         case ixgbe_mac_X540:
3026         case ixgbe_mac_82599EB:
3027                 info->so_timestamping =
3028                         SOF_TIMESTAMPING_TX_SOFTWARE |
3029                         SOF_TIMESTAMPING_RX_SOFTWARE |
3030                         SOF_TIMESTAMPING_SOFTWARE |
3031                         SOF_TIMESTAMPING_TX_HARDWARE |
3032                         SOF_TIMESTAMPING_RX_HARDWARE |
3033                         SOF_TIMESTAMPING_RAW_HARDWARE;
3034
3035                 if (adapter->ptp_clock)
3036                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
3037                 else
3038                         info->phc_index = -1;
3039
3040                 info->tx_types =
3041                         BIT(HWTSTAMP_TX_OFF) |
3042                         BIT(HWTSTAMP_TX_ON);
3043
3044                 info->rx_filters |=
3045                         BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
3046                         BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
3047                         BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
3048                 break;
3049         default:
3050                 return ethtool_op_get_ts_info(dev, info);
3051         }
3052         return 0;
3053 }
3054
3055 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
3056 {
3057         unsigned int max_combined;
3058         u8 tcs = netdev_get_num_tc(adapter->netdev);
3059
3060         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3061                 /* We only support one q_vector without MSI-X */
3062                 max_combined = 1;
3063         } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3064                 /* Limit value based on the queue mask */
3065                 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1;
3066         } else if (tcs > 1) {
3067                 /* For DCB report channels per traffic class */
3068                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3069                         /* 8 TC w/ 4 queues per TC */
3070                         max_combined = 4;
3071                 } else if (tcs > 4) {
3072                         /* 8 TC w/ 8 queues per TC */
3073                         max_combined = 8;
3074                 } else {
3075                         /* 4 TC w/ 16 queues per TC */
3076                         max_combined = 16;
3077                 }
3078         } else if (adapter->atr_sample_rate) {
3079                 /* support up to 64 queues with ATR */
3080                 max_combined = IXGBE_MAX_FDIR_INDICES;
3081         } else {
3082                 /* support up to 16 queues with RSS */
3083                 max_combined = ixgbe_max_rss_indices(adapter);
3084         }
3085
3086         return max_combined;
3087 }
3088
3089 static void ixgbe_get_channels(struct net_device *dev,
3090                                struct ethtool_channels *ch)
3091 {
3092         struct ixgbe_adapter *adapter = netdev_priv(dev);
3093
3094         /* report maximum channels */
3095         ch->max_combined = ixgbe_max_channels(adapter);
3096
3097         /* report info for other vector */
3098         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3099                 ch->max_other = NON_Q_VECTORS;
3100                 ch->other_count = NON_Q_VECTORS;
3101         }
3102
3103         /* record RSS queues */
3104         ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
3105
3106         /* nothing else to report if RSS is disabled */
3107         if (ch->combined_count == 1)
3108                 return;
3109
3110         /* we do not support ATR queueing if SR-IOV is enabled */
3111         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3112                 return;
3113
3114         /* same thing goes for being DCB enabled */
3115         if (netdev_get_num_tc(dev) > 1)
3116                 return;
3117
3118         /* if ATR is disabled we can exit */
3119         if (!adapter->atr_sample_rate)
3120                 return;
3121
3122         /* report flow director queues as maximum channels */
3123         ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
3124 }
3125
3126 static int ixgbe_set_channels(struct net_device *dev,
3127                               struct ethtool_channels *ch)
3128 {
3129         struct ixgbe_adapter *adapter = netdev_priv(dev);
3130         unsigned int count = ch->combined_count;
3131         u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3132
3133         /* verify they are not requesting separate vectors */
3134         if (!count || ch->rx_count || ch->tx_count)
3135                 return -EINVAL;
3136
3137         /* verify other_count has not changed */
3138         if (ch->other_count != NON_Q_VECTORS)
3139                 return -EINVAL;
3140
3141         /* verify the number of channels does not exceed hardware limits */
3142         if (count > ixgbe_max_channels(adapter))
3143                 return -EINVAL;
3144
3145         /* update feature limits from largest to smallest supported values */
3146         adapter->ring_feature[RING_F_FDIR].limit = count;
3147
3148         /* cap RSS limit */
3149         if (count > max_rss_indices)
3150                 count = max_rss_indices;
3151         adapter->ring_feature[RING_F_RSS].limit = count;
3152
3153 #ifdef IXGBE_FCOE
3154         /* cap FCoE limit at 8 */
3155         if (count > IXGBE_FCRETA_SIZE)
3156                 count = IXGBE_FCRETA_SIZE;
3157         adapter->ring_feature[RING_F_FCOE].limit = count;
3158
3159 #endif
3160         /* use setup TC to update any traffic class queue mapping */
3161         return ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
3162 }
3163
3164 static int ixgbe_get_module_info(struct net_device *dev,
3165                                        struct ethtool_modinfo *modinfo)
3166 {
3167         struct ixgbe_adapter *adapter = netdev_priv(dev);
3168         struct ixgbe_hw *hw = &adapter->hw;
3169         s32 status;
3170         u8 sff8472_rev, addr_mode;
3171         bool page_swap = false;
3172
3173         if (hw->phy.type == ixgbe_phy_fw)
3174                 return -ENXIO;
3175
3176         /* Check whether we support SFF-8472 or not */
3177         status = hw->phy.ops.read_i2c_eeprom(hw,
3178                                              IXGBE_SFF_SFF_8472_COMP,
3179                                              &sff8472_rev);
3180         if (status)
3181                 return -EIO;
3182
3183         /* addressing mode is not supported */
3184         status = hw->phy.ops.read_i2c_eeprom(hw,
3185                                              IXGBE_SFF_SFF_8472_SWAP,
3186                                              &addr_mode);
3187         if (status)
3188                 return -EIO;
3189
3190         if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3191                 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3192                 page_swap = true;
3193         }
3194
3195         if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap) {
3196                 /* We have a SFP, but it does not support SFF-8472 */
3197                 modinfo->type = ETH_MODULE_SFF_8079;
3198                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3199         } else {
3200                 /* We have a SFP which supports a revision of SFF-8472. */
3201                 modinfo->type = ETH_MODULE_SFF_8472;
3202                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3203         }
3204
3205         return 0;
3206 }
3207
3208 static int ixgbe_get_module_eeprom(struct net_device *dev,
3209                                          struct ethtool_eeprom *ee,
3210                                          u8 *data)
3211 {
3212         struct ixgbe_adapter *adapter = netdev_priv(dev);
3213         struct ixgbe_hw *hw = &adapter->hw;
3214         s32 status = IXGBE_ERR_PHY_ADDR_INVALID;
3215         u8 databyte = 0xFF;
3216         int i = 0;
3217
3218         if (ee->len == 0)
3219                 return -EINVAL;
3220
3221         if (hw->phy.type == ixgbe_phy_fw)
3222                 return -ENXIO;
3223
3224         for (i = ee->offset; i < ee->offset + ee->len; i++) {
3225                 /* I2C reads can take long time */
3226                 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3227                         return -EBUSY;
3228
3229                 if (i < ETH_MODULE_SFF_8079_LEN)
3230                         status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3231                 else
3232                         status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3233
3234                 if (status)
3235                         return -EIO;
3236
3237                 data[i - ee->offset] = databyte;
3238         }
3239
3240         return 0;
3241 }
3242
3243 static const struct {
3244         ixgbe_link_speed mac_speed;
3245         u32 supported;
3246 } ixgbe_ls_map[] = {
3247         { IXGBE_LINK_SPEED_10_FULL, SUPPORTED_10baseT_Full },
3248         { IXGBE_LINK_SPEED_100_FULL, SUPPORTED_100baseT_Full },
3249         { IXGBE_LINK_SPEED_1GB_FULL, SUPPORTED_1000baseT_Full },
3250         { IXGBE_LINK_SPEED_2_5GB_FULL, SUPPORTED_2500baseX_Full },
3251         { IXGBE_LINK_SPEED_10GB_FULL, SUPPORTED_10000baseT_Full },
3252 };
3253
3254 static const struct {
3255         u32 lp_advertised;
3256         u32 mac_speed;
3257 } ixgbe_lp_map[] = {
3258         { FW_PHY_ACT_UD_2_100M_TX_EEE, SUPPORTED_100baseT_Full },
3259         { FW_PHY_ACT_UD_2_1G_T_EEE, SUPPORTED_1000baseT_Full },
3260         { FW_PHY_ACT_UD_2_10G_T_EEE, SUPPORTED_10000baseT_Full },
3261         { FW_PHY_ACT_UD_2_1G_KX_EEE, SUPPORTED_1000baseKX_Full },
3262         { FW_PHY_ACT_UD_2_10G_KX4_EEE, SUPPORTED_10000baseKX4_Full },
3263         { FW_PHY_ACT_UD_2_10G_KR_EEE, SUPPORTED_10000baseKR_Full},
3264 };
3265
3266 static int
3267 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_eee *edata)
3268 {
3269         u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
3270         struct ixgbe_hw *hw = &adapter->hw;
3271         s32 rc;
3272         u16 i;
3273
3274         rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info);
3275         if (rc)
3276                 return rc;
3277
3278         edata->lp_advertised = 0;
3279         for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) {
3280                 if (info[0] & ixgbe_lp_map[i].lp_advertised)
3281                         edata->lp_advertised |= ixgbe_lp_map[i].mac_speed;
3282         }
3283
3284         edata->supported = 0;
3285         for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3286                 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed)
3287                         edata->supported |= ixgbe_ls_map[i].supported;
3288         }
3289
3290         edata->advertised = 0;
3291         for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3292                 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed)
3293                         edata->advertised |= ixgbe_ls_map[i].supported;
3294         }
3295
3296         edata->eee_enabled = !!edata->advertised;
3297         edata->tx_lpi_enabled = edata->eee_enabled;
3298         if (edata->advertised & edata->lp_advertised)
3299                 edata->eee_active = true;
3300
3301         return 0;
3302 }
3303
3304 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
3305 {
3306         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3307         struct ixgbe_hw *hw = &adapter->hw;
3308
3309         if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3310                 return -EOPNOTSUPP;
3311
3312         if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw)
3313                 return ixgbe_get_eee_fw(adapter, edata);
3314
3315         return -EOPNOTSUPP;
3316 }
3317
3318 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
3319 {
3320         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3321         struct ixgbe_hw *hw = &adapter->hw;
3322         struct ethtool_eee eee_data;
3323         s32 ret_val;
3324
3325         if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3326                 return -EOPNOTSUPP;
3327
3328         memset(&eee_data, 0, sizeof(struct ethtool_eee));
3329
3330         ret_val = ixgbe_get_eee(netdev, &eee_data);
3331         if (ret_val)
3332                 return ret_val;
3333
3334         if (eee_data.eee_enabled && !edata->eee_enabled) {
3335                 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) {
3336                         e_err(drv, "Setting EEE tx-lpi is not supported\n");
3337                         return -EINVAL;
3338                 }
3339
3340                 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) {
3341                         e_err(drv,
3342                               "Setting EEE Tx LPI timer is not supported\n");
3343                         return -EINVAL;
3344                 }
3345
3346                 if (eee_data.advertised != edata->advertised) {
3347                         e_err(drv,
3348                               "Setting EEE advertised speeds is not supported\n");
3349                         return -EINVAL;
3350                 }
3351         }
3352
3353         if (eee_data.eee_enabled != edata->eee_enabled) {
3354                 if (edata->eee_enabled) {
3355                         adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
3356                         hw->phy.eee_speeds_advertised =
3357                                                    hw->phy.eee_speeds_supported;
3358                 } else {
3359                         adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
3360                         hw->phy.eee_speeds_advertised = 0;
3361                 }
3362
3363                 /* reset link */
3364                 if (netif_running(netdev))
3365                         ixgbe_reinit_locked(adapter);
3366                 else
3367                         ixgbe_reset(adapter);
3368         }
3369
3370         return 0;
3371 }
3372
3373 static u32 ixgbe_get_priv_flags(struct net_device *netdev)
3374 {
3375         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3376         u32 priv_flags = 0;
3377
3378         if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
3379                 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX;
3380
3381         return priv_flags;
3382 }
3383
3384 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3385 {
3386         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3387         unsigned int flags2 = adapter->flags2;
3388
3389         flags2 &= ~IXGBE_FLAG2_RX_LEGACY;
3390         if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX)
3391                 flags2 |= IXGBE_FLAG2_RX_LEGACY;
3392
3393         if (flags2 != adapter->flags2) {
3394                 adapter->flags2 = flags2;
3395
3396                 /* reset interface to repopulate queues */
3397                 if (netif_running(netdev))
3398                         ixgbe_reinit_locked(adapter);
3399         }
3400
3401         return 0;
3402 }
3403
3404 static const struct ethtool_ops ixgbe_ethtool_ops = {
3405         .get_settings           = ixgbe_get_settings,
3406         .set_settings           = ixgbe_set_settings,
3407         .get_drvinfo            = ixgbe_get_drvinfo,
3408         .get_regs_len           = ixgbe_get_regs_len,
3409         .get_regs               = ixgbe_get_regs,
3410         .get_wol                = ixgbe_get_wol,
3411         .set_wol                = ixgbe_set_wol,
3412         .nway_reset             = ixgbe_nway_reset,
3413         .get_link               = ethtool_op_get_link,
3414         .get_eeprom_len         = ixgbe_get_eeprom_len,
3415         .get_eeprom             = ixgbe_get_eeprom,
3416         .set_eeprom             = ixgbe_set_eeprom,
3417         .get_ringparam          = ixgbe_get_ringparam,
3418         .set_ringparam          = ixgbe_set_ringparam,
3419         .get_pauseparam         = ixgbe_get_pauseparam,
3420         .set_pauseparam         = ixgbe_set_pauseparam,
3421         .get_msglevel           = ixgbe_get_msglevel,
3422         .set_msglevel           = ixgbe_set_msglevel,
3423         .self_test              = ixgbe_diag_test,
3424         .get_strings            = ixgbe_get_strings,
3425         .set_phys_id            = ixgbe_set_phys_id,
3426         .get_sset_count         = ixgbe_get_sset_count,
3427         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
3428         .get_coalesce           = ixgbe_get_coalesce,
3429         .set_coalesce           = ixgbe_set_coalesce,
3430         .get_rxnfc              = ixgbe_get_rxnfc,
3431         .set_rxnfc              = ixgbe_set_rxnfc,
3432         .get_rxfh_indir_size    = ixgbe_rss_indir_size,
3433         .get_rxfh_key_size      = ixgbe_get_rxfh_key_size,
3434         .get_rxfh               = ixgbe_get_rxfh,
3435         .set_rxfh               = ixgbe_set_rxfh,
3436         .get_eee                = ixgbe_get_eee,
3437         .set_eee                = ixgbe_set_eee,
3438         .get_channels           = ixgbe_get_channels,
3439         .set_channels           = ixgbe_set_channels,
3440         .get_priv_flags         = ixgbe_get_priv_flags,
3441         .set_priv_flags         = ixgbe_set_priv_flags,
3442         .get_ts_info            = ixgbe_get_ts_info,
3443         .get_module_info        = ixgbe_get_module_info,
3444         .get_module_eeprom      = ixgbe_get_module_eeprom,
3445 };
3446
3447 void ixgbe_set_ethtool_ops(struct net_device *netdev)
3448 {
3449         netdev->ethtool_ops = &ixgbe_ethtool_ops;
3450 }