drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/udp_tunnel.h>
  54 #include <net/pkt_cls.h>
  55 #include <net/tc_act/tc_gact.h>
  56 #include <net/tc_act/tc_mirred.h>
  57 #include <net/vxlan.h>
  58
  59 #include "ixgbe.h"
  60 #include "ixgbe_common.h"
  61 #include "ixgbe_dcb_82599.h"
  62 #include "ixgbe_sriov.h"
  63 #include "ixgbe_model.h"
  64
  65 char ixgbe_driver_name[] = "ixgbe";
  66 static const char ixgbe_driver_string[] =
  67                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  68 #ifdef IXGBE_FCOE
  69 char ixgbe_default_device_descr[] =
  70                               "Intel(R) 10 Gigabit Network Connection";
  71 #else
  72 static char ixgbe_default_device_descr[] =
  73                               "Intel(R) 10 Gigabit Network Connection";
  74 #endif
  75 #define DRV_VERSION "5.0.0-k"
  76 const char ixgbe_driver_version[] = DRV_VERSION;
  77 static const char ixgbe_copyright[] =
  78                                 "Copyright (c) 1999-2016 Intel Corporation.";
  79
  80 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  81
  82 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  83         [board_82598]           = &ixgbe_82598_info,
  84         [board_82599]           = &ixgbe_82599_info,
  85         [board_X540]            = &ixgbe_X540_info,
  86         [board_X550]            = &ixgbe_X550_info,
  87         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  88         [board_x550em_a]        = &ixgbe_x550em_a_info,
  89         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  90 };
  91
  92 /* ixgbe_pci_tbl - PCI Device ID Table
  93  *
  94  * Wildcard entries (PCI_ANY_ID) should come last
  95  * Last entry must be all 0s
  96  *
  97  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  98  *   Class, Class Mask, private data (not used) }
  99  */
 100 static const struct pci_device_id ixgbe_pci_tbl[] = {
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 146         /* required last entry */
 147         {0, }
 148 };
 149 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 150
 151 #ifdef CONFIG_IXGBE_DCA
 152 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 153                             void *p);
 154 static struct notifier_block dca_notifier = {
 155         .notifier_call = ixgbe_notify_dca,
 156         .next          = NULL,
 157         .priority      = 0
 158 };
 159 #endif
 160
 161 #ifdef CONFIG_PCI_IOV
 162 static unsigned int max_vfs;
 163 module_param(max_vfs, uint, 0);
 164 MODULE_PARM_DESC(max_vfs,
 165                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 166 #endif /* CONFIG_PCI_IOV */
 167
 168 static unsigned int allow_unsupported_sfp;
 169 module_param(allow_unsupported_sfp, uint, 0);
 170 MODULE_PARM_DESC(allow_unsupported_sfp,
 171                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 172
 173 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 174 static int debug = -1;
 175 module_param(debug, int, 0);
 176 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 177
 178 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 179 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 180 MODULE_LICENSE("GPL");
 181 MODULE_VERSION(DRV_VERSION);
 182
 183 static struct workqueue_struct *ixgbe_wq;
 184
 185 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 186 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 187
 188 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 189                                           u32 reg, u16 *value)
 190 {
 191         struct pci_dev *parent_dev;
 192         struct pci_bus *parent_bus;
 193
 194         parent_bus = adapter->pdev->bus->parent;
 195         if (!parent_bus)
 196                 return -1;
 197
 198         parent_dev = parent_bus->self;
 199         if (!parent_dev)
 200                 return -1;
 201
 202         if (!pci_is_pcie(parent_dev))
 203                 return -1;
 204
 205         pcie_capability_read_word(parent_dev, reg, value);
 206         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 207             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 208                 return -1;
 209         return 0;
 210 }
 211
 212 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 213 {
 214         struct ixgbe_hw *hw = &adapter->hw;
 215         u16 link_status = 0;
 216         int err;
 217
 218         hw->bus.type = ixgbe_bus_type_pci_express;
 219
 220         /* Get the negotiated link width and speed from PCI config space of the
 221          * parent, as this device is behind a switch
 222          */
 223         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 224
 225         /* assume caller will handle error case */
 226         if (err)
 227                 return err;
 228
 229         hw->bus.width = ixgbe_convert_bus_width(link_status);
 230         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 231
 232         return 0;
 233 }
 234
 235 /**
 236  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 237  * @hw: hw specific details
 238  *
 239  * This function is used by probe to determine whether a device's PCI-Express
 240  * bandwidth details should be gathered from the parent bus instead of from the
 241  * device. Used to ensure that various locations all have the correct device ID
 242  * checks.
 243  */
 244 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 245 {
 246         switch (hw->device_id) {
 247         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 248         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 249                 return true;
 250         default:
 251                 return false;
 252         }
 253 }
 254
 255 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 256                                      int expected_gts)
 257 {
 258         struct ixgbe_hw *hw = &adapter->hw;
 259         int max_gts = 0;
 260         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 261         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 262         struct pci_dev *pdev;
 263
 264         /* Some devices are not connected over PCIe and thus do not negotiate
 265          * speed. These devices do not have valid bus info, and thus any report
 266          * we generate may not be correct.
 267          */
 268         if (hw->bus.type == ixgbe_bus_type_internal)
 269                 return;
 270
 271         /* determine whether to use the parent device */
 272         if (ixgbe_pcie_from_parent(&adapter->hw))
 273                 pdev = adapter->pdev->bus->parent->self;
 274         else
 275                 pdev = adapter->pdev;
 276
 277         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 278             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 279                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 280                 return;
 281         }
 282
 283         switch (speed) {
 284         case PCIE_SPEED_2_5GT:
 285                 /* 8b/10b encoding reduces max throughput by 20% */
 286                 max_gts = 2 * width;
 287                 break;
 288         case PCIE_SPEED_5_0GT:
 289                 /* 8b/10b encoding reduces max throughput by 20% */
 290                 max_gts = 4 * width;
 291                 break;
 292         case PCIE_SPEED_8_0GT:
 293                 /* 128b/130b encoding reduces throughput by less than 2% */
 294                 max_gts = 8 * width;
 295                 break;
 296         default:
 297                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 298                 return;
 299         }
 300
 301         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 302                    max_gts);
 303         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 304                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 305                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 306                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 307                     "Unknown"),
 308                    width,
 309                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 310                     speed == PCIE_SPEED_5_0GT ? "20%" :
 311                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 312                     "Unknown"));
 313
 314         if (max_gts < expected_gts) {
 315                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 316                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 317                         expected_gts);
 318                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 319         }
 320 }
 321
 322 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 323 {
 324         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 325             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 326             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 327                 queue_work(ixgbe_wq, &adapter->service_task);
 328 }
 329
 330 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 331 {
 332         struct ixgbe_adapter *adapter = hw->back;
 333
 334         if (!hw->hw_addr)
 335                 return;
 336         hw->hw_addr = NULL;
 337         e_dev_err("Adapter removed\n");
 338         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 339                 ixgbe_service_event_schedule(adapter);
 340 }
 341
 342 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 343 {
 344         u32 value;
 345
 346         /* The following check not only optimizes a bit by not
 347          * performing a read on the status register when the
 348          * register just read was a status register read that
 349          * returned IXGBE_FAILED_READ_REG. It also blocks any
 350          * potential recursion.
 351          */
 352         if (reg == IXGBE_STATUS) {
 353                 ixgbe_remove_adapter(hw);
 354                 return;
 355         }
 356         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 357         if (value == IXGBE_FAILED_READ_REG)
 358                 ixgbe_remove_adapter(hw);
 359 }
 360
 361 /**
 362  * ixgbe_read_reg - Read from device register
 363  * @hw: hw specific details
 364  * @reg: offset of register to read
 365  *
 366  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 367  *
 368  * This function is used to read device registers. It checks for device
 369  * removal by confirming any read that returns all ones by checking the
 370  * status register value for all ones. This function avoids reading from
 371  * the hardware if a removal was previously detected in which case it
 372  * returns IXGBE_FAILED_READ_REG (all ones).
 373  */
 374 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 375 {
 376         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 377         u32 value;
 378
 379         if (ixgbe_removed(reg_addr))
 380                 return IXGBE_FAILED_READ_REG;
 381         if (unlikely(hw->phy.nw_mng_if_sel &
 382                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 383                 struct ixgbe_adapter *adapter;
 384                 int i;
 385
 386                 for (i = 0; i < 200; ++i) {
 387                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 388                         if (likely(!value))
 389                                 goto writes_completed;
 390                         if (value == IXGBE_FAILED_READ_REG) {
 391                                 ixgbe_remove_adapter(hw);
 392                                 return IXGBE_FAILED_READ_REG;
 393                         }
 394                         udelay(5);
 395                 }
 396
 397                 adapter = hw->back;
 398                 e_warn(hw, "register writes incomplete %08x\n", value);
 399         }
 400
 401 writes_completed:
 402         value = readl(reg_addr + reg);
 403         if (unlikely(value == IXGBE_FAILED_READ_REG))
 404                 ixgbe_check_remove(hw, reg);
 405         return value;
 406 }
 407
 408 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 409 {
 410         u16 value;
 411
 412         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 413         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 414                 ixgbe_remove_adapter(hw);
 415                 return true;
 416         }
 417         return false;
 418 }
 419
 420 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 421 {
 422         struct ixgbe_adapter *adapter = hw->back;
 423         u16 value;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return IXGBE_FAILED_READ_CFG_WORD;
 427         pci_read_config_word(adapter->pdev, reg, &value);
 428         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 429             ixgbe_check_cfg_remove(hw, adapter->pdev))
 430                 return IXGBE_FAILED_READ_CFG_WORD;
 431         return value;
 432 }
 433
 434 #ifdef CONFIG_PCI_IOV
 435 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 436 {
 437         struct ixgbe_adapter *adapter = hw->back;
 438         u32 value;
 439
 440         if (ixgbe_removed(hw->hw_addr))
 441                 return IXGBE_FAILED_READ_CFG_DWORD;
 442         pci_read_config_dword(adapter->pdev, reg, &value);
 443         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 444             ixgbe_check_cfg_remove(hw, adapter->pdev))
 445                 return IXGBE_FAILED_READ_CFG_DWORD;
 446         return value;
 447 }
 448 #endif /* CONFIG_PCI_IOV */
 449
 450 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 451 {
 452         struct ixgbe_adapter *adapter = hw->back;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return;
 456         pci_write_config_word(adapter->pdev, reg, value);
 457 }
 458
 459 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 460 {
 461         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 462
 463         /* flush memory to make sure state is correct before next watchdog */
 464         smp_mb__before_atomic();
 465         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 466 }
 467
 468 struct ixgbe_reg_info {
 469         u32 ofs;
 470         char *name;
 471 };
 472
 473 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 474
 475         /* General Registers */
 476         {IXGBE_CTRL, "CTRL"},
 477         {IXGBE_STATUS, "STATUS"},
 478         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 479
 480         /* Interrupt Registers */
 481         {IXGBE_EICR, "EICR"},
 482
 483         /* RX Registers */
 484         {IXGBE_SRRCTL(0), "SRRCTL"},
 485         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 486         {IXGBE_RDLEN(0), "RDLEN"},
 487         {IXGBE_RDH(0), "RDH"},
 488         {IXGBE_RDT(0), "RDT"},
 489         {IXGBE_RXDCTL(0), "RXDCTL"},
 490         {IXGBE_RDBAL(0), "RDBAL"},
 491         {IXGBE_RDBAH(0), "RDBAH"},
 492
 493         /* TX Registers */
 494         {IXGBE_TDBAL(0), "TDBAL"},
 495         {IXGBE_TDBAH(0), "TDBAH"},
 496         {IXGBE_TDLEN(0), "TDLEN"},
 497         {IXGBE_TDH(0), "TDH"},
 498         {IXGBE_TDT(0), "TDT"},
 499         {IXGBE_TXDCTL(0), "TXDCTL"},
 500
 501         /* List Terminator */
 502         { .name = NULL }
 503 };
 504
 505
 506 /*
 507  * ixgbe_regdump - register printout routine
 508  */
 509 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 510 {
 511         int i = 0, j = 0;
 512         char rname[16];
 513         u32 regs[64];
 514
 515         switch (reginfo->ofs) {
 516         case IXGBE_SRRCTL(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 519                 break;
 520         case IXGBE_DCA_RXCTRL(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 523                 break;
 524         case IXGBE_RDLEN(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 527                 break;
 528         case IXGBE_RDH(0):
 529                 for (i = 0; i < 64; i++)
 530                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 531                 break;
 532         case IXGBE_RDT(0):
 533                 for (i = 0; i < 64; i++)
 534                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 535                 break;
 536         case IXGBE_RXDCTL(0):
 537                 for (i = 0; i < 64; i++)
 538                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 539                 break;
 540         case IXGBE_RDBAL(0):
 541                 for (i = 0; i < 64; i++)
 542                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 543                 break;
 544         case IXGBE_RDBAH(0):
 545                 for (i = 0; i < 64; i++)
 546                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 547                 break;
 548         case IXGBE_TDBAL(0):
 549                 for (i = 0; i < 64; i++)
 550                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 551                 break;
 552         case IXGBE_TDBAH(0):
 553                 for (i = 0; i < 64; i++)
 554                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 555                 break;
 556         case IXGBE_TDLEN(0):
 557                 for (i = 0; i < 64; i++)
 558                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 559                 break;
 560         case IXGBE_TDH(0):
 561                 for (i = 0; i < 64; i++)
 562                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 563                 break;
 564         case IXGBE_TDT(0):
 565                 for (i = 0; i < 64; i++)
 566                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 567                 break;
 568         case IXGBE_TXDCTL(0):
 569                 for (i = 0; i < 64; i++)
 570                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 571                 break;
 572         default:
 573                 pr_info("%-15s %08x\n", reginfo->name,
 574                         IXGBE_READ_REG(hw, reginfo->ofs));
 575                 return;
 576         }
 577
 578         for (i = 0; i < 8; i++) {
 579                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 580                 pr_err("%-15s", rname);
 581                 for (j = 0; j < 8; j++)
 582                         pr_cont(" %08x", regs[i*8+j]);
 583                 pr_cont("\n");
 584         }
 585
 586 }
 587
 588 /*
 589  * ixgbe_dump - Print registers, tx-rings and rx-rings
 590  */
 591 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 592 {
 593         struct net_device *netdev = adapter->netdev;
 594         struct ixgbe_hw *hw = &adapter->hw;
 595         struct ixgbe_reg_info *reginfo;
 596         int n = 0;
 597         struct ixgbe_ring *tx_ring;
 598         struct ixgbe_tx_buffer *tx_buffer;
 599         union ixgbe_adv_tx_desc *tx_desc;
 600         struct my_u0 { u64 a; u64 b; } *u0;
 601         struct ixgbe_ring *rx_ring;
 602         union ixgbe_adv_rx_desc *rx_desc;
 603         struct ixgbe_rx_buffer *rx_buffer_info;
 604         u32 staterr;
 605         int i = 0;
 606
 607         if (!netif_msg_hw(adapter))
 608                 return;
 609
 610         /* Print netdevice Info */
 611         if (netdev) {
 612                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 613                 pr_info("Device Name     state            "
 614                         "trans_start\n");
 615                 pr_info("%-15s %016lX %016lX\n",
 616                         netdev->name,
 617                         netdev->state,
 618                         dev_trans_start(netdev));
 619         }
 620
 621         /* Print Registers */
 622         dev_info(&adapter->pdev->dev, "Register Dump\n");
 623         pr_info(" Register Name   Value\n");
 624         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 625              reginfo->name; reginfo++) {
 626                 ixgbe_regdump(hw, reginfo);
 627         }
 628
 629         /* Print TX Ring Summary */
 630         if (!netdev || !netif_running(netdev))
 631                 return;
 632
 633         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 634         pr_info(" %s     %s              %s        %s\n",
 635                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 636                 "leng", "ntw", "timestamp");
 637         for (n = 0; n < adapter->num_tx_queues; n++) {
 638                 tx_ring = adapter->tx_ring[n];
 639                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 640                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 641                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 642                            (u64)dma_unmap_addr(tx_buffer, dma),
 643                            dma_unmap_len(tx_buffer, len),
 644                            tx_buffer->next_to_watch,
 645                            (u64)tx_buffer->time_stamp);
 646         }
 647
 648         /* Print TX Rings */
 649         if (!netif_msg_tx_done(adapter))
 650                 goto rx_ring_summary;
 651
 652         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 653
 654         /* Transmit Descriptor Formats
 655          *
 656          * 82598 Advanced Transmit Descriptor
 657          *   +--------------------------------------------------------------+
 658          * 0 |         Buffer Address [63:0]                                |
 659          *   +--------------------------------------------------------------+
 660          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 661          *   +--------------------------------------------------------------+
 662          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 663          *
 664          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 665          *   +--------------------------------------------------------------+
 666          * 0 |                          RSV [63:0]                          |
 667          *   +--------------------------------------------------------------+
 668          * 8 |            RSV           |  STA  |          NXTSEQ           |
 669          *   +--------------------------------------------------------------+
 670          *   63                       36 35   32 31                         0
 671          *
 672          * 82599+ Advanced Transmit Descriptor
 673          *   +--------------------------------------------------------------+
 674          * 0 |         Buffer Address [63:0]                                |
 675          *   +--------------------------------------------------------------+
 676          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 677          *   +--------------------------------------------------------------+
 678          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 679          *
 680          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 681          *   +--------------------------------------------------------------+
 682          * 0 |                          RSV [63:0]                          |
 683          *   +--------------------------------------------------------------+
 684          * 8 |            RSV           |  STA  |           RSV             |
 685          *   +--------------------------------------------------------------+
 686          *   63                       36 35   32 31                         0
 687          */
 688
 689         for (n = 0; n < adapter->num_tx_queues; n++) {
 690                 tx_ring = adapter->tx_ring[n];
 691                 pr_info("------------------------------------\n");
 692                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 693                 pr_info("------------------------------------\n");
 694                 pr_info("%s%s    %s              %s        %s          %s\n",
 695                         "T [desc]     [address 63:0  ] ",
 696                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 697                         "leng", "ntw", "timestamp", "bi->skb");
 698
 699                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 700                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 701                         tx_buffer = &tx_ring->tx_buffer_info[i];
 702                         u0 = (struct my_u0 *)tx_desc;
 703                         if (dma_unmap_len(tx_buffer, len) > 0) {
 704                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 705                                         i,
 706                                         le64_to_cpu(u0->a),
 707                                         le64_to_cpu(u0->b),
 708                                         (u64)dma_unmap_addr(tx_buffer, dma),
 709                                         dma_unmap_len(tx_buffer, len),
 710                                         tx_buffer->next_to_watch,
 711                                         (u64)tx_buffer->time_stamp,
 712                                         tx_buffer->skb);
 713                                 if (i == tx_ring->next_to_use &&
 714                                         i == tx_ring->next_to_clean)
 715                                         pr_cont(" NTC/U\n");
 716                                 else if (i == tx_ring->next_to_use)
 717                                         pr_cont(" NTU\n");
 718                                 else if (i == tx_ring->next_to_clean)
 719                                         pr_cont(" NTC\n");
 720                                 else
 721                                         pr_cont("\n");
 722
 723                                 if (netif_msg_pktdata(adapter) &&
 724                                     tx_buffer->skb)
 725                                         print_hex_dump(KERN_INFO, "",
 726                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 727                                                 tx_buffer->skb->data,
 728                                                 dma_unmap_len(tx_buffer, len),
 729                                                 true);
 730                         }
 731                 }
 732         }
 733
 734         /* Print RX Rings Summary */
 735 rx_ring_summary:
 736         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 737         pr_info("Queue [NTU] [NTC]\n");
 738         for (n = 0; n < adapter->num_rx_queues; n++) {
 739                 rx_ring = adapter->rx_ring[n];
 740                 pr_info("%5d %5X %5X\n",
 741                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 742         }
 743
 744         /* Print RX Rings */
 745         if (!netif_msg_rx_status(adapter))
 746                 return;
 747
 748         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 749
 750         /* Receive Descriptor Formats
 751          *
 752          * 82598 Advanced Receive Descriptor (Read) Format
 753          *    63                                           1        0
 754          *    +-----------------------------------------------------+
 755          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 756          *    +----------------------------------------------+------+
 757          *  8 |       Header Buffer Address [63:1]           |  DD  |
 758          *    +-----------------------------------------------------+
 759          *
 760          *
 761          * 82598 Advanced Receive Descriptor (Write-Back) Format
 762          *
 763          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 764          *   +------------------------------------------------------+
 765          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 766          *   | Packet   | IP     |   |          |     | Type | Type |
 767          *   | Checksum | Ident  |   |          |     |      |      |
 768          *   +------------------------------------------------------+
 769          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 770          *   +------------------------------------------------------+
 771          *   63       48 47    32 31            20 19               0
 772          *
 773          * 82599+ Advanced Receive Descriptor (Read) Format
 774          *    63                                           1        0
 775          *    +-----------------------------------------------------+
 776          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 777          *    +----------------------------------------------+------+
 778          *  8 |       Header Buffer Address [63:1]           |  DD  |
 779          *    +-----------------------------------------------------+
 780          *
 781          *
 782          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 783          *
 784          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 785          *   +------------------------------------------------------+
 786          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 787          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 788          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 789          *   +------------------------------------------------------+
 790          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 791          *   +------------------------------------------------------+
 792          *   63       48 47    32 31          20 19                 0
 793          */
 794
 795         for (n = 0; n < adapter->num_rx_queues; n++) {
 796                 rx_ring = adapter->rx_ring[n];
 797                 pr_info("------------------------------------\n");
 798                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 799                 pr_info("------------------------------------\n");
 800                 pr_info("%s%s%s",
 801                         "R  [desc]      [ PktBuf     A0] ",
 802                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 803                         "<-- Adv Rx Read format\n");
 804                 pr_info("%s%s%s",
 805                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 806                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 807                         "<-- Adv Rx Write-Back format\n");
 808
 809                 for (i = 0; i < rx_ring->count; i++) {
 810                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 811                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 812                         u0 = (struct my_u0 *)rx_desc;
 813                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 814                         if (staterr & IXGBE_RXD_STAT_DD) {
 815                                 /* Descriptor Done */
 816                                 pr_info("RWB[0x%03X]     %016llX "
 817                                         "%016llX ---------------- %p", i,
 818                                         le64_to_cpu(u0->a),
 819                                         le64_to_cpu(u0->b),
 820                                         rx_buffer_info->skb);
 821                         } else {
 822                                 pr_info("R  [0x%03X]     %016llX "
 823                                         "%016llX %016llX %p", i,
 824                                         le64_to_cpu(u0->a),
 825                                         le64_to_cpu(u0->b),
 826                                         (u64)rx_buffer_info->dma,
 827                                         rx_buffer_info->skb);
 828
 829                                 if (netif_msg_pktdata(adapter) &&
 830                                     rx_buffer_info->dma) {
 831                                         print_hex_dump(KERN_INFO, "",
 832                                            DUMP_PREFIX_ADDRESS, 16, 1,
 833                                            page_address(rx_buffer_info->page) +
 834                                                     rx_buffer_info->page_offset,
 835                                            ixgbe_rx_bufsz(rx_ring), true);
 836                                 }
 837                         }
 838
 839                         if (i == rx_ring->next_to_use)
 840                                 pr_cont(" NTU\n");
 841                         else if (i == rx_ring->next_to_clean)
 842                                 pr_cont(" NTC\n");
 843                         else
 844                                 pr_cont("\n");
 845
 846                 }
 847         }
 848 }
 849
 850 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 851 {
 852         u32 ctrl_ext;
 853
 854         /* Let firmware take over control of h/w */
 855         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 856         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 857                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 858 }
 859
 860 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 861 {
 862         u32 ctrl_ext;
 863
 864         /* Let firmware know the driver has taken over */
 865         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 866         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 867                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 868 }
 869
 870 /**
 871  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 872  * @adapter: pointer to adapter struct
 873  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 874  * @queue: queue to map the corresponding interrupt to
 875  * @msix_vector: the vector to map to the corresponding queue
 876  *
 877  */
 878 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 879                            u8 queue, u8 msix_vector)
 880 {
 881         u32 ivar, index;
 882         struct ixgbe_hw *hw = &adapter->hw;
 883         switch (hw->mac.type) {
 884         case ixgbe_mac_82598EB:
 885                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 886                 if (direction == -1)
 887                         direction = 0;
 888                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 889                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 890                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 891                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 892                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 893                 break;
 894         case ixgbe_mac_82599EB:
 895         case ixgbe_mac_X540:
 896         case ixgbe_mac_X550:
 897         case ixgbe_mac_X550EM_x:
 898         case ixgbe_mac_x550em_a:
 899                 if (direction == -1) {
 900                         /* other causes */
 901                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 902                         index = ((queue & 1) * 8);
 903                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 904                         ivar &= ~(0xFF << index);
 905                         ivar |= (msix_vector << index);
 906                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 907                         break;
 908                 } else {
 909                         /* tx or rx causes */
 910                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 911                         index = ((16 * (queue & 1)) + (8 * direction));
 912                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 913                         ivar &= ~(0xFF << index);
 914                         ivar |= (msix_vector << index);
 915                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 916                         break;
 917                 }
 918         default:
 919                 break;
 920         }
 921 }
 922
 923 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 924                                           u64 qmask)
 925 {
 926         u32 mask;
 927
 928         switch (adapter->hw.mac.type) {
 929         case ixgbe_mac_82598EB:
 930                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 931                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 932                 break;
 933         case ixgbe_mac_82599EB:
 934         case ixgbe_mac_X540:
 935         case ixgbe_mac_X550:
 936         case ixgbe_mac_X550EM_x:
 937         case ixgbe_mac_x550em_a:
 938                 mask = (qmask & 0xFFFFFFFF);
 939                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 940                 mask = (qmask >> 32);
 941                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 942                 break;
 943         default:
 944                 break;
 945         }
 946 }
 947
 948 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 949 {
 950         struct ixgbe_hw *hw = &adapter->hw;
 951         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 952         int i;
 953         u32 data;
 954
 955         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 956             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 957                 return;
 958
 959         switch (hw->mac.type) {
 960         case ixgbe_mac_82598EB:
 961                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 962                 break;
 963         default:
 964                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 965         }
 966         hwstats->lxoffrxc += data;
 967
 968         /* refill credits (no tx hang) if we received xoff */
 969         if (!data)
 970                 return;
 971
 972         for (i = 0; i < adapter->num_tx_queues; i++)
 973                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 974                           &adapter->tx_ring[i]->state);
 975 }
 976
 977 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 978 {
 979         struct ixgbe_hw *hw = &adapter->hw;
 980         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 981         u32 xoff[8] = {0};
 982         u8 tc;
 983         int i;
 984         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 985
 986         if (adapter->ixgbe_ieee_pfc)
 987                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 988
 989         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 990                 ixgbe_update_xoff_rx_lfc(adapter);
 991                 return;
 992         }
 993
 994         /* update stats for each tc, only valid with PFC enabled */
 995         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 996                 u32 pxoffrxc;
 997
 998                 switch (hw->mac.type) {
 999                 case ixgbe_mac_82598EB:
1000                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1001                         break;
1002                 default:
1003                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1004                 }
1005                 hwstats->pxoffrxc[i] += pxoffrxc;
1006                 /* Get the TC for given UP */
1007                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1008                 xoff[tc] += pxoffrxc;
1009         }
1010
1011         /* disarm tx queues that have received xoff frames */
1012         for (i = 0; i < adapter->num_tx_queues; i++) {
1013                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1014
1015                 tc = tx_ring->dcb_tc;
1016                 if (xoff[tc])
1017                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1018         }
1019 }
1020
1021 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1022 {
1023         return ring->stats.packets;
1024 }
1025
1026 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1027 {
1028         struct ixgbe_adapter *adapter;
1029         struct ixgbe_hw *hw;
1030         u32 head, tail;
1031
1032         if (ring->l2_accel_priv)
1033                 adapter = ring->l2_accel_priv->real_adapter;
1034         else
1035                 adapter = netdev_priv(ring->netdev);
1036
1037         hw = &adapter->hw;
1038         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1039         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1040
1041         if (head != tail)
1042                 return (head < tail) ?
1043                         tail - head : (tail + ring->count - head);
1044
1045         return 0;
1046 }
1047
1048 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1049 {
1050         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1051         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1052         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1053
1054         clear_check_for_tx_hang(tx_ring);
1055
1056         /*
1057          * Check for a hung queue, but be thorough. This verifies
1058          * that a transmit has been completed since the previous
1059          * check AND there is at least one packet pending. The
1060          * ARMED bit is set to indicate a potential hang. The
1061          * bit is cleared if a pause frame is received to remove
1062          * false hang detection due to PFC or 802.3x frames. By
1063          * requiring this to fail twice we avoid races with
1064          * pfc clearing the ARMED bit and conditions where we
1065          * run the check_tx_hang logic with a transmit completion
1066          * pending but without time to complete it yet.
1067          */
1068         if (tx_done_old == tx_done && tx_pending)
1069                 /* make sure it is true for two checks in a row */
1070                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1071                                         &tx_ring->state);
1072         /* update completed stats and continue */
1073         tx_ring->tx_stats.tx_done_old = tx_done;
1074         /* reset the countdown */
1075         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1076
1077         return false;
1078 }
1079
1080 /**
1081  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1082  * @adapter: driver private struct
1083  **/
1084 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1085 {
1086
1087         /* Do the reset outside of interrupt context */
1088         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1089                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1090                 e_warn(drv, "initiating reset due to tx timeout\n");
1091                 ixgbe_service_event_schedule(adapter);
1092         }
1093 }
1094
1095 /**
1096  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1097  **/
1098 static int ixgbe_tx_maxrate(struct net_device *netdev,
1099                             int queue_index, u32 maxrate)
1100 {
1101         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1102         struct ixgbe_hw *hw = &adapter->hw;
1103         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1104
1105         if (!maxrate)
1106                 return 0;
1107
1108         /* Calculate the rate factor values to set */
1109         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1110         bcnrc_val /= maxrate;
1111
1112         /* clear everything but the rate factor */
1113         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1114         IXGBE_RTTBCNRC_RF_DEC_MASK;
1115
1116         /* enable the rate scheduler */
1117         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1118
1119         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1120         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1121
1122         return 0;
1123 }
1124
1125 /**
1126  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1127  * @q_vector: structure containing interrupt and ring information
1128  * @tx_ring: tx ring to clean
1129  * @napi_budget: Used to determine if we are in netpoll
1130  **/
1131 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1132                                struct ixgbe_ring *tx_ring, int napi_budget)
1133 {
1134         struct ixgbe_adapter *adapter = q_vector->adapter;
1135         struct ixgbe_tx_buffer *tx_buffer;
1136         union ixgbe_adv_tx_desc *tx_desc;
1137         unsigned int total_bytes = 0, total_packets = 0;
1138         unsigned int budget = q_vector->tx.work_limit;
1139         unsigned int i = tx_ring->next_to_clean;
1140
1141         if (test_bit(__IXGBE_DOWN, &adapter->state))
1142                 return true;
1143
1144         tx_buffer = &tx_ring->tx_buffer_info[i];
1145         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1146         i -= tx_ring->count;
1147
1148         do {
1149                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1150
1151                 /* if next_to_watch is not set then there is no work pending */
1152                 if (!eop_desc)
1153                         break;
1154
1155                 /* prevent any other reads prior to eop_desc */
1156                 read_barrier_depends();
1157
1158                 /* if DD is not set pending work has not been completed */
1159                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1160                         break;
1161
1162                 /* clear next_to_watch to prevent false hangs */
1163                 tx_buffer->next_to_watch = NULL;
1164
1165                 /* update the statistics for this packet */
1166                 total_bytes += tx_buffer->bytecount;
1167                 total_packets += tx_buffer->gso_segs;
1168
1169                 /* free the skb */
1170                 napi_consume_skb(tx_buffer->skb, napi_budget);
1171
1172                 /* unmap skb header data */
1173                 dma_unmap_single(tx_ring->dev,
1174                                  dma_unmap_addr(tx_buffer, dma),
1175                                  dma_unmap_len(tx_buffer, len),
1176                                  DMA_TO_DEVICE);
1177
1178                 /* clear tx_buffer data */
1179                 dma_unmap_len_set(tx_buffer, len, 0);
1180
1181                 /* unmap remaining buffers */
1182                 while (tx_desc != eop_desc) {
1183                         tx_buffer++;
1184                         tx_desc++;
1185                         i++;
1186                         if (unlikely(!i)) {
1187                                 i -= tx_ring->count;
1188                                 tx_buffer = tx_ring->tx_buffer_info;
1189                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1190                         }
1191
1192                         /* unmap any remaining paged data */
1193                         if (dma_unmap_len(tx_buffer, len)) {
1194                                 dma_unmap_page(tx_ring->dev,
1195                                                dma_unmap_addr(tx_buffer, dma),
1196                                                dma_unmap_len(tx_buffer, len),
1197                                                DMA_TO_DEVICE);
1198                                 dma_unmap_len_set(tx_buffer, len, 0);
1199                         }
1200                 }
1201
1202                 /* move us one more past the eop_desc for start of next pkt */
1203                 tx_buffer++;
1204                 tx_desc++;
1205                 i++;
1206                 if (unlikely(!i)) {
1207                         i -= tx_ring->count;
1208                         tx_buffer = tx_ring->tx_buffer_info;
1209                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1210                 }
1211
1212                 /* issue prefetch for next Tx descriptor */
1213                 prefetch(tx_desc);
1214
1215                 /* update budget accounting */
1216                 budget--;
1217         } while (likely(budget));
1218
1219         i += tx_ring->count;
1220         tx_ring->next_to_clean = i;
1221         u64_stats_update_begin(&tx_ring->syncp);
1222         tx_ring->stats.bytes += total_bytes;
1223         tx_ring->stats.packets += total_packets;
1224         u64_stats_update_end(&tx_ring->syncp);
1225         q_vector->tx.total_bytes += total_bytes;
1226         q_vector->tx.total_packets += total_packets;
1227
1228         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1229                 /* schedule immediate reset if we believe we hung */
1230                 struct ixgbe_hw *hw = &adapter->hw;
1231                 e_err(drv, "Detected Tx Unit Hang\n"
1232                         "  Tx Queue             <%d>\n"
1233                         "  TDH, TDT             <%x>, <%x>\n"
1234                         "  next_to_use          <%x>\n"
1235                         "  next_to_clean        <%x>\n"
1236                         "tx_buffer_info[next_to_clean]\n"
1237                         "  time_stamp           <%lx>\n"
1238                         "  jiffies              <%lx>\n",
1239                         tx_ring->queue_index,
1240                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1241                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1242                         tx_ring->next_to_use, i,
1243                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1244
1245                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1246
1247                 e_info(probe,
1248                        "tx hang %d detected on queue %d, resetting adapter\n",
1249                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1250
1251                 /* schedule immediate reset if we believe we hung */
1252                 ixgbe_tx_timeout_reset(adapter);
1253
1254                 /* the adapter is about to reset, no point in enabling stuff */
1255                 return true;
1256         }
1257
1258         netdev_tx_completed_queue(txring_txq(tx_ring),
1259                                   total_packets, total_bytes);
1260
1261 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1262         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1263                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1264                 /* Make sure that anybody stopping the queue after this
1265                  * sees the new next_to_clean.
1266                  */
1267                 smp_mb();
1268                 if (__netif_subqueue_stopped(tx_ring->netdev,
1269                                              tx_ring->queue_index)
1270                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1271                         netif_wake_subqueue(tx_ring->netdev,
1272                                             tx_ring->queue_index);
1273                         ++tx_ring->tx_stats.restart_queue;
1274                 }
1275         }
1276
1277         return !!budget;
1278 }
1279
1280 #ifdef CONFIG_IXGBE_DCA
1281 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1282                                 struct ixgbe_ring *tx_ring,
1283                                 int cpu)
1284 {
1285         struct ixgbe_hw *hw = &adapter->hw;
1286         u32 txctrl = 0;
1287         u16 reg_offset;
1288
1289         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1290                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1291
1292         switch (hw->mac.type) {
1293         case ixgbe_mac_82598EB:
1294                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1295                 break;
1296         case ixgbe_mac_82599EB:
1297         case ixgbe_mac_X540:
1298                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1299                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1300                 break;
1301         default:
1302                 /* for unknown hardware do not write register */
1303                 return;
1304         }
1305
1306         /*
1307          * We can enable relaxed ordering for reads, but not writes when
1308          * DCA is enabled.  This is due to a known issue in some chipsets
1309          * which will cause the DCA tag to be cleared.
1310          */
1311         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1312                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1313                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1314
1315         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1316 }
1317
1318 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1319                                 struct ixgbe_ring *rx_ring,
1320                                 int cpu)
1321 {
1322         struct ixgbe_hw *hw = &adapter->hw;
1323         u32 rxctrl = 0;
1324         u8 reg_idx = rx_ring->reg_idx;
1325
1326         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1327                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1328
1329         switch (hw->mac.type) {
1330         case ixgbe_mac_82599EB:
1331         case ixgbe_mac_X540:
1332                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1333                 break;
1334         default:
1335                 break;
1336         }
1337
1338         /*
1339          * We can enable relaxed ordering for reads, but not writes when
1340          * DCA is enabled.  This is due to a known issue in some chipsets
1341          * which will cause the DCA tag to be cleared.
1342          */
1343         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1344                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1345                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1346
1347         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1348 }
1349
1350 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1351 {
1352         struct ixgbe_adapter *adapter = q_vector->adapter;
1353         struct ixgbe_ring *ring;
1354         int cpu = get_cpu();
1355
1356         if (q_vector->cpu == cpu)
1357                 goto out_no_update;
1358
1359         ixgbe_for_each_ring(ring, q_vector->tx)
1360                 ixgbe_update_tx_dca(adapter, ring, cpu);
1361
1362         ixgbe_for_each_ring(ring, q_vector->rx)
1363                 ixgbe_update_rx_dca(adapter, ring, cpu);
1364
1365         q_vector->cpu = cpu;
1366 out_no_update:
1367         put_cpu();
1368 }
1369
1370 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1371 {
1372         int i;
1373
1374         /* always use CB2 mode, difference is masked in the CB driver */
1375         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1376                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1377                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1378         else
1379                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1380                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1381
1382         for (i = 0; i < adapter->num_q_vectors; i++) {
1383                 adapter->q_vector[i]->cpu = -1;
1384                 ixgbe_update_dca(adapter->q_vector[i]);
1385         }
1386 }
1387
1388 static int __ixgbe_notify_dca(struct device *dev, void *data)
1389 {
1390         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1391         unsigned long event = *(unsigned long *)data;
1392
1393         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1394                 return 0;
1395
1396         switch (event) {
1397         case DCA_PROVIDER_ADD:
1398                 /* if we're already enabled, don't do it again */
1399                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1400                         break;
1401                 if (dca_add_requester(dev) == 0) {
1402                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1403                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1405                         break;
1406                 }
1407                 /* Fall Through since DCA is disabled. */
1408         case DCA_PROVIDER_REMOVE:
1409                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1410                         dca_remove_requester(dev);
1411                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1412                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1413                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1414                 }
1415                 break;
1416         }
1417
1418         return 0;
1419 }
1420
1421 #endif /* CONFIG_IXGBE_DCA */
1422
1423 #define IXGBE_RSS_L4_TYPES_MASK \
1424         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1425          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1426          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1427          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1428
1429 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1430                                  union ixgbe_adv_rx_desc *rx_desc,
1431                                  struct sk_buff *skb)
1432 {
1433         u16 rss_type;
1434
1435         if (!(ring->netdev->features & NETIF_F_RXHASH))
1436                 return;
1437
1438         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1439                    IXGBE_RXDADV_RSSTYPE_MASK;
1440
1441         if (!rss_type)
1442                 return;
1443
1444         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1445                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1446                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1447 }
1448
1449 #ifdef IXGBE_FCOE
1450 /**
1451  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1452  * @ring: structure containing ring specific data
1453  * @rx_desc: advanced rx descriptor
1454  *
1455  * Returns : true if it is FCoE pkt
1456  */
1457 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1458                                     union ixgbe_adv_rx_desc *rx_desc)
1459 {
1460         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1461
1462         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1463                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1464                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1465                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1466 }
1467
1468 #endif /* IXGBE_FCOE */
1469 /**
1470  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1471  * @ring: structure containing ring specific data
1472  * @rx_desc: current Rx descriptor being processed
1473  * @skb: skb currently being received and modified
1474  **/
1475 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1476                                      union ixgbe_adv_rx_desc *rx_desc,
1477                                      struct sk_buff *skb)
1478 {
1479         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1480         bool encap_pkt = false;
1481
1482         skb_checksum_none_assert(skb);
1483
1484         /* Rx csum disabled */
1485         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1486                 return;
1487
1488         /* check for VXLAN and Geneve packets */
1489         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1490                 encap_pkt = true;
1491                 skb->encapsulation = 1;
1492         }
1493
1494         /* if IP and error */
1495         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1496             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1497                 ring->rx_stats.csum_err++;
1498                 return;
1499         }
1500
1501         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1502                 return;
1503
1504         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1505                 /*
1506                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1507                  * checksum errors.
1508                  */
1509                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1510                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1511                         return;
1512
1513                 ring->rx_stats.csum_err++;
1514                 return;
1515         }
1516
1517         /* It must be a TCP or UDP packet with a valid checksum */
1518         skb->ip_summed = CHECKSUM_UNNECESSARY;
1519         if (encap_pkt) {
1520                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1521                         return;
1522
1523                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1524                         skb->ip_summed = CHECKSUM_NONE;
1525                         return;
1526                 }
1527                 /* If we checked the outer header let the stack know */
1528                 skb->csum_level = 1;
1529         }
1530 }
1531
1532 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1533 {
1534         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1535 }
1536
1537 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1538                                     struct ixgbe_rx_buffer *bi)
1539 {
1540         struct page *page = bi->page;
1541         dma_addr_t dma;
1542
1543         /* since we are recycling buffers we should seldom need to alloc */
1544         if (likely(page))
1545                 return true;
1546
1547         /* alloc new page for storage */
1548         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1549         if (unlikely(!page)) {
1550                 rx_ring->rx_stats.alloc_rx_page_failed++;
1551                 return false;
1552         }
1553
1554         /* map page for use */
1555         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1556                                  ixgbe_rx_pg_size(rx_ring),
1557                                  DMA_FROM_DEVICE,
1558                                  IXGBE_RX_DMA_ATTR);
1559
1560         /*
1561          * if mapping failed free memory back to system since
1562          * there isn't much point in holding memory we can't use
1563          */
1564         if (dma_mapping_error(rx_ring->dev, dma)) {
1565                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1566
1567                 rx_ring->rx_stats.alloc_rx_page_failed++;
1568                 return false;
1569         }
1570
1571         bi->dma = dma;
1572         bi->page = page;
1573         bi->page_offset = ixgbe_rx_offset(rx_ring);
1574         bi->pagecnt_bias = 1;
1575
1576         return true;
1577 }
1578
1579 /**
1580  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1581  * @rx_ring: ring to place buffers on
1582  * @cleaned_count: number of buffers to replace
1583  **/
1584 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1585 {
1586         union ixgbe_adv_rx_desc *rx_desc;
1587         struct ixgbe_rx_buffer *bi;
1588         u16 i = rx_ring->next_to_use;
1589         u16 bufsz;
1590
1591         /* nothing to do */
1592         if (!cleaned_count)
1593                 return;
1594
1595         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1596         bi = &rx_ring->rx_buffer_info[i];
1597         i -= rx_ring->count;
1598
1599         bufsz = ixgbe_rx_bufsz(rx_ring);
1600
1601         do {
1602                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1603                         break;
1604
1605                 /* sync the buffer for use by the device */
1606                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1607                                                  bi->page_offset, bufsz,
1608                                                  DMA_FROM_DEVICE);
1609
1610                 /*
1611                  * Refresh the desc even if buffer_addrs didn't change
1612                  * because each write-back erases this info.
1613                  */
1614                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1615
1616                 rx_desc++;
1617                 bi++;
1618                 i++;
1619                 if (unlikely(!i)) {
1620                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1621                         bi = rx_ring->rx_buffer_info;
1622                         i -= rx_ring->count;
1623                 }
1624
1625                 /* clear the length for the next_to_use descriptor */
1626                 rx_desc->wb.upper.length = 0;
1627
1628                 cleaned_count--;
1629         } while (cleaned_count);
1630
1631         i += rx_ring->count;
1632
1633         if (rx_ring->next_to_use != i) {
1634                 rx_ring->next_to_use = i;
1635
1636                 /* update next to alloc since we have filled the ring */
1637                 rx_ring->next_to_alloc = i;
1638
1639                 /* Force memory writes to complete before letting h/w
1640                  * know there are new descriptors to fetch.  (Only
1641                  * applicable for weak-ordered memory model archs,
1642                  * such as IA-64).
1643                  */
1644                 wmb();
1645                 writel(i, rx_ring->tail);
1646         }
1647 }
1648
1649 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1650                                    struct sk_buff *skb)
1651 {
1652         u16 hdr_len = skb_headlen(skb);
1653
1654         /* set gso_size to avoid messing up TCP MSS */
1655         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1656                                                  IXGBE_CB(skb)->append_cnt);
1657         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1658 }
1659
1660 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1661                                    struct sk_buff *skb)
1662 {
1663         /* if append_cnt is 0 then frame is not RSC */
1664         if (!IXGBE_CB(skb)->append_cnt)
1665                 return;
1666
1667         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1668         rx_ring->rx_stats.rsc_flush++;
1669
1670         ixgbe_set_rsc_gso_size(rx_ring, skb);
1671
1672         /* gso_size is computed using append_cnt so always clear it last */
1673         IXGBE_CB(skb)->append_cnt = 0;
1674 }
1675
1676 /**
1677  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1678  * @rx_ring: rx descriptor ring packet is being transacted on
1679  * @rx_desc: pointer to the EOP Rx descriptor
1680  * @skb: pointer to current skb being populated
1681  *
1682  * This function checks the ring, descriptor, and packet information in
1683  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1684  * other fields within the skb.
1685  **/
1686 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1687                                      union ixgbe_adv_rx_desc *rx_desc,
1688                                      struct sk_buff *skb)
1689 {
1690         struct net_device *dev = rx_ring->netdev;
1691         u32 flags = rx_ring->q_vector->adapter->flags;
1692
1693         ixgbe_update_rsc_stats(rx_ring, skb);
1694
1695         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1696
1697         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1698
1699         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1700                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1701
1702         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1703             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1704                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1705                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1706         }
1707
1708         skb_record_rx_queue(skb, rx_ring->queue_index);
1709
1710         skb->protocol = eth_type_trans(skb, dev);
1711 }
1712
1713 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1714                          struct sk_buff *skb)
1715 {
1716         napi_gro_receive(&q_vector->napi, skb);
1717 }
1718
1719 /**
1720  * ixgbe_is_non_eop - process handling of non-EOP buffers
1721  * @rx_ring: Rx ring being processed
1722  * @rx_desc: Rx descriptor for current buffer
1723  * @skb: Current socket buffer containing buffer in progress
1724  *
1725  * This function updates next to clean.  If the buffer is an EOP buffer
1726  * this function exits returning false, otherwise it will place the
1727  * sk_buff in the next buffer to be chained and return true indicating
1728  * that this is in fact a non-EOP buffer.
1729  **/
1730 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1731                              union ixgbe_adv_rx_desc *rx_desc,
1732                              struct sk_buff *skb)
1733 {
1734         u32 ntc = rx_ring->next_to_clean + 1;
1735
1736         /* fetch, update, and store next to clean */
1737         ntc = (ntc < rx_ring->count) ? ntc : 0;
1738         rx_ring->next_to_clean = ntc;
1739
1740         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1741
1742         /* update RSC append count if present */
1743         if (ring_is_rsc_enabled(rx_ring)) {
1744                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1745                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1746
1747                 if (unlikely(rsc_enabled)) {
1748                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1749
1750                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1751                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1752
1753                         /* update ntc based on RSC value */
1754                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1755                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1756                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1757                 }
1758         }
1759
1760         /* if we are the last buffer then there is nothing else to do */
1761         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1762                 return false;
1763
1764         /* place skb in next buffer to be received */
1765         rx_ring->rx_buffer_info[ntc].skb = skb;
1766         rx_ring->rx_stats.non_eop_descs++;
1767
1768         return true;
1769 }
1770
1771 /**
1772  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1773  * @rx_ring: rx descriptor ring packet is being transacted on
1774  * @skb: pointer to current skb being adjusted
1775  *
1776  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1777  * main difference between this version and the original function is that
1778  * this function can make several assumptions about the state of things
1779  * that allow for significant optimizations versus the standard function.
1780  * As a result we can do things like drop a frag and maintain an accurate
1781  * truesize for the skb.
1782  */
1783 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1784                             struct sk_buff *skb)
1785 {
1786         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1787         unsigned char *va;
1788         unsigned int pull_len;
1789
1790         /*
1791          * it is valid to use page_address instead of kmap since we are
1792          * working with pages allocated out of the lomem pool per
1793          * alloc_page(GFP_ATOMIC)
1794          */
1795         va = skb_frag_address(frag);
1796
1797         /*
1798          * we need the header to contain the greater of either ETH_HLEN or
1799          * 60 bytes if the skb->len is less than 60 for skb_pad.
1800          */
1801         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1802
1803         /* align pull length to size of long to optimize memcpy performance */
1804         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1805
1806         /* update all of the pointers */
1807         skb_frag_size_sub(frag, pull_len);
1808         frag->page_offset += pull_len;
1809         skb->data_len -= pull_len;
1810         skb->tail += pull_len;
1811 }
1812
1813 /**
1814  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1815  * @rx_ring: rx descriptor ring packet is being transacted on
1816  * @skb: pointer to current skb being updated
1817  *
1818  * This function provides a basic DMA sync up for the first fragment of an
1819  * skb.  The reason for doing this is that the first fragment cannot be
1820  * unmapped until we have reached the end of packet descriptor for a buffer
1821  * chain.
1822  */
1823 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1824                                 struct sk_buff *skb)
1825 {
1826         /* if the page was released unmap it, else just sync our portion */
1827         if (unlikely(IXGBE_CB(skb)->page_released)) {
1828                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1829                                      ixgbe_rx_pg_size(rx_ring),
1830                                      DMA_FROM_DEVICE,
1831                                      IXGBE_RX_DMA_ATTR);
1832         } else {
1833                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1834
1835                 dma_sync_single_range_for_cpu(rx_ring->dev,
1836                                               IXGBE_CB(skb)->dma,
1837                                               frag->page_offset,
1838                                               skb_frag_size(frag),
1839                                               DMA_FROM_DEVICE);
1840         }
1841 }
1842
1843 /**
1844  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1845  * @rx_ring: rx descriptor ring packet is being transacted on
1846  * @rx_desc: pointer to the EOP Rx descriptor
1847  * @skb: pointer to current skb being fixed
1848  *
1849  * Check for corrupted packet headers caused by senders on the local L2
1850  * embedded NIC switch not setting up their Tx Descriptors right.  These
1851  * should be very rare.
1852  *
1853  * Also address the case where we are pulling data in on pages only
1854  * and as such no data is present in the skb header.
1855  *
1856  * In addition if skb is not at least 60 bytes we need to pad it so that
1857  * it is large enough to qualify as a valid Ethernet frame.
1858  *
1859  * Returns true if an error was encountered and skb was freed.
1860  **/
1861 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1862                                   union ixgbe_adv_rx_desc *rx_desc,
1863                                   struct sk_buff *skb)
1864 {
1865         struct net_device *netdev = rx_ring->netdev;
1866
1867         /* verify that the packet does not have any known errors */
1868         if (unlikely(ixgbe_test_staterr(rx_desc,
1869                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1870             !(netdev->features & NETIF_F_RXALL))) {
1871                 dev_kfree_skb_any(skb);
1872                 return true;
1873         }
1874
1875         /* place header in linear portion of buffer */
1876         if (!skb_headlen(skb))
1877                 ixgbe_pull_tail(rx_ring, skb);
1878
1879 #ifdef IXGBE_FCOE
1880         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1881         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1882                 return false;
1883
1884 #endif
1885         /* if eth_skb_pad returns an error the skb was freed */
1886         if (eth_skb_pad(skb))
1887                 return true;
1888
1889         return false;
1890 }
1891
1892 /**
1893  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1894  * @rx_ring: rx descriptor ring to store buffers on
1895  * @old_buff: donor buffer to have page reused
1896  *
1897  * Synchronizes page for reuse by the adapter
1898  **/
1899 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1900                                 struct ixgbe_rx_buffer *old_buff)
1901 {
1902         struct ixgbe_rx_buffer *new_buff;
1903         u16 nta = rx_ring->next_to_alloc;
1904
1905         new_buff = &rx_ring->rx_buffer_info[nta];
1906
1907         /* update, and store next to alloc */
1908         nta++;
1909         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1910
1911         /* Transfer page from old buffer to new buffer.
1912          * Move each member individually to avoid possible store
1913          * forwarding stalls and unnecessary copy of skb.
1914          */
1915         new_buff->dma           = old_buff->dma;
1916         new_buff->page          = old_buff->page;
1917         new_buff->page_offset   = old_buff->page_offset;
1918         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1919 }
1920
1921 static inline bool ixgbe_page_is_reserved(struct page *page)
1922 {
1923         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1924 }
1925
1926 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1927 {
1928         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1929         struct page *page = rx_buffer->page;
1930
1931         /* avoid re-using remote pages */
1932         if (unlikely(ixgbe_page_is_reserved(page)))
1933                 return false;
1934
1935 #if (PAGE_SIZE < 8192)
1936         /* if we are only owner of page we can reuse it */
1937         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1938                 return false;
1939 #else
1940         /* The last offset is a bit aggressive in that we assume the
1941          * worst case of FCoE being enabled and using a 3K buffer.
1942          * However this should have minimal impact as the 1K extra is
1943          * still less than one buffer in size.
1944          */
1945 #define IXGBE_LAST_OFFSET \
1946         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1947         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1948                 return false;
1949 #endif
1950
1951         /* If we have drained the page fragment pool we need to update
1952          * the pagecnt_bias and page count so that we fully restock the
1953          * number of references the driver holds.
1954          */
1955         if (unlikely(!pagecnt_bias)) {
1956                 page_ref_add(page, USHRT_MAX);
1957                 rx_buffer->pagecnt_bias = USHRT_MAX;
1958         }
1959
1960         return true;
1961 }
1962
1963 /**
1964  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1965  * @rx_ring: rx descriptor ring to transact packets on
1966  * @rx_buffer: buffer containing page to add
1967  * @rx_desc: descriptor containing length of buffer written by hardware
1968  * @skb: sk_buff to place the data into
1969  *
1970  * This function will add the data contained in rx_buffer->page to the skb.
1971  * This is done either through a direct copy if the data in the buffer is
1972  * less than the skb header size, otherwise it will just attach the page as
1973  * a frag to the skb.
1974  *
1975  * The function will then update the page offset if necessary and return
1976  * true if the buffer can be reused by the adapter.
1977  **/
1978 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1979                               struct ixgbe_rx_buffer *rx_buffer,
1980                               struct sk_buff *skb,
1981                               unsigned int size)
1982 {
1983 #if (PAGE_SIZE < 8192)
1984         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
1985 #else
1986         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
1987                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
1988                                 SKB_DATA_ALIGN(size);
1989 #endif
1990         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
1991                         rx_buffer->page_offset, size, truesize);
1992 #if (PAGE_SIZE < 8192)
1993         rx_buffer->page_offset ^= truesize;
1994 #else
1995         rx_buffer->page_offset += truesize;
1996 #endif
1997 }
1998
1999 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2000                                                    union ixgbe_adv_rx_desc *rx_desc,
2001                                                    struct sk_buff **skb,
2002                                                    const unsigned int size)
2003 {
2004         struct ixgbe_rx_buffer *rx_buffer;
2005
2006         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2007         prefetchw(rx_buffer->page);
2008         *skb = rx_buffer->skb;
2009
2010         /* Delay unmapping of the first packet. It carries the header
2011          * information, HW may still access the header after the writeback.
2012          * Only unmap it when EOP is reached
2013          */
2014         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2015                 if (!*skb)
2016                         goto skip_sync;
2017         } else {
2018                 if (*skb)
2019                         ixgbe_dma_sync_frag(rx_ring, *skb);
2020         }
2021
2022         /* we are reusing so sync this buffer for CPU use */
2023         dma_sync_single_range_for_cpu(rx_ring->dev,
2024                                       rx_buffer->dma,
2025                                       rx_buffer->page_offset,
2026                                       size,
2027                                       DMA_FROM_DEVICE);
2028 skip_sync:
2029         rx_buffer->pagecnt_bias--;
2030
2031         return rx_buffer;
2032 }
2033
2034 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2035                                 struct ixgbe_rx_buffer *rx_buffer,
2036                                 struct sk_buff *skb)
2037 {
2038         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2039                 /* hand second half of page back to the ring */
2040                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2041         } else {
2042                 if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2043                         /* the page has been released from the ring */
2044                         IXGBE_CB(skb)->page_released = true;
2045                 } else {
2046                         /* we are not reusing the buffer so unmap it */
2047                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2048                                              ixgbe_rx_pg_size(rx_ring),
2049                                              DMA_FROM_DEVICE,
2050                                              IXGBE_RX_DMA_ATTR);
2051                 }
2052                 __page_frag_cache_drain(rx_buffer->page,
2053                                         rx_buffer->pagecnt_bias);
2054         }
2055
2056         /* clear contents of rx_buffer */
2057         rx_buffer->page = NULL;
2058         rx_buffer->skb = NULL;
2059 }
2060
2061 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2062                                            struct ixgbe_rx_buffer *rx_buffer,
2063                                            union ixgbe_adv_rx_desc *rx_desc,
2064                                            unsigned int size)
2065 {
2066         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
2067 #if (PAGE_SIZE < 8192)
2068         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2069 #else
2070         unsigned int truesize = SKB_DATA_ALIGN(size);
2071 #endif
2072         struct sk_buff *skb;
2073
2074         /* prefetch first cache line of first page */
2075         prefetch(va);
2076 #if L1_CACHE_BYTES < 128
2077         prefetch(va + L1_CACHE_BYTES);
2078 #endif
2079
2080         /* allocate a skb to store the frags */
2081         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2082         if (unlikely(!skb))
2083                 return NULL;
2084
2085         if (size > IXGBE_RX_HDR_SIZE) {
2086                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2087                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2088
2089                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2090                                 rx_buffer->page_offset,
2091                                 size, truesize);
2092 #if (PAGE_SIZE < 8192)
2093                 rx_buffer->page_offset ^= truesize;
2094 #else
2095                 rx_buffer->page_offset += truesize;
2096 #endif
2097         } else {
2098                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
2099                 rx_buffer->pagecnt_bias++;
2100         }
2101
2102         return skb;
2103 }
2104
2105 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2106                                        struct ixgbe_rx_buffer *rx_buffer,
2107                                        union ixgbe_adv_rx_desc *rx_desc,
2108                                        unsigned int size)
2109 {
2110         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
2111 #if (PAGE_SIZE < 8192)
2112         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2113 #else
2114         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2115                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size);
2116 #endif
2117         struct sk_buff *skb;
2118
2119         /* prefetch first cache line of first page */
2120         prefetch(va);
2121 #if L1_CACHE_BYTES < 128
2122         prefetch(va + L1_CACHE_BYTES);
2123 #endif
2124
2125         /* build an skb to around the page buffer */
2126         skb = build_skb(va - IXGBE_SKB_PAD, truesize);
2127         if (unlikely(!skb))
2128                 return NULL;
2129
2130         /* update pointers within the skb to store the data */
2131         skb_reserve(skb, IXGBE_SKB_PAD);
2132         __skb_put(skb, size);
2133
2134         /* record DMA address if this is the start of a chain of buffers */
2135         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2136                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2137
2138         /* update buffer offset */
2139 #if (PAGE_SIZE < 8192)
2140         rx_buffer->page_offset ^= truesize;
2141 #else
2142         rx_buffer->page_offset += truesize;
2143 #endif
2144
2145         return skb;
2146 }
2147
2148 /**
2149  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2150  * @q_vector: structure containing interrupt and ring information
2151  * @rx_ring: rx descriptor ring to transact packets on
2152  * @budget: Total limit on number of packets to process
2153  *
2154  * This function provides a "bounce buffer" approach to Rx interrupt
2155  * processing.  The advantage to this is that on systems that have
2156  * expensive overhead for IOMMU access this provides a means of avoiding
2157  * it by maintaining the mapping of the page to the syste.
2158  *
2159  * Returns amount of work completed
2160  **/
2161 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2162                                struct ixgbe_ring *rx_ring,
2163                                const int budget)
2164 {
2165         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2166 #ifdef IXGBE_FCOE
2167         struct ixgbe_adapter *adapter = q_vector->adapter;
2168         int ddp_bytes;
2169         unsigned int mss = 0;
2170 #endif /* IXGBE_FCOE */
2171         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2172
2173         while (likely(total_rx_packets < budget)) {
2174                 union ixgbe_adv_rx_desc *rx_desc;
2175                 struct ixgbe_rx_buffer *rx_buffer;
2176                 struct sk_buff *skb;
2177                 unsigned int size;
2178
2179                 /* return some buffers to hardware, one at a time is too slow */
2180                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2181                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2182                         cleaned_count = 0;
2183                 }
2184
2185                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2186                 size = le16_to_cpu(rx_desc->wb.upper.length);
2187                 if (!size)
2188                         break;
2189
2190                 /* This memory barrier is needed to keep us from reading
2191                  * any other fields out of the rx_desc until we know the
2192                  * descriptor has been written back
2193                  */
2194                 dma_rmb();
2195
2196                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2197
2198                 /* retrieve a buffer from the ring */
2199                 if (skb)
2200                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2201                 else if (ring_uses_build_skb(rx_ring))
2202                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2203                                               rx_desc, size);
2204                 else
2205                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2206                                                   rx_desc, size);
2207
2208                 /* exit if we failed to retrieve a buffer */
2209                 if (!skb) {
2210                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2211                         rx_buffer->pagecnt_bias++;
2212                         break;
2213                 }
2214
2215                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2216                 cleaned_count++;
2217
2218                 /* place incomplete frames back on ring for completion */
2219                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2220                         continue;
2221
2222                 /* verify the packet layout is correct */
2223                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2224                         continue;
2225
2226                 /* probably a little skewed due to removing CRC */
2227                 total_rx_bytes += skb->len;
2228
2229                 /* populate checksum, timestamp, VLAN, and protocol */
2230                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2231
2232 #ifdef IXGBE_FCOE
2233                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2234                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2235                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2236                         /* include DDPed FCoE data */
2237                         if (ddp_bytes > 0) {
2238                                 if (!mss) {
2239                                         mss = rx_ring->netdev->mtu -
2240                                                 sizeof(struct fcoe_hdr) -
2241                                                 sizeof(struct fc_frame_header) -
2242                                                 sizeof(struct fcoe_crc_eof);
2243                                         if (mss > 512)
2244                                                 mss &= ~511;
2245                                 }
2246                                 total_rx_bytes += ddp_bytes;
2247                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2248                                                                  mss);
2249                         }
2250                         if (!ddp_bytes) {
2251                                 dev_kfree_skb_any(skb);
2252                                 continue;
2253                         }
2254                 }
2255
2256 #endif /* IXGBE_FCOE */
2257                 ixgbe_rx_skb(q_vector, skb);
2258
2259                 /* update budget accounting */
2260                 total_rx_packets++;
2261         }
2262
2263         u64_stats_update_begin(&rx_ring->syncp);
2264         rx_ring->stats.packets += total_rx_packets;
2265         rx_ring->stats.bytes += total_rx_bytes;
2266         u64_stats_update_end(&rx_ring->syncp);
2267         q_vector->rx.total_packets += total_rx_packets;
2268         q_vector->rx.total_bytes += total_rx_bytes;
2269
2270         return total_rx_packets;
2271 }
2272
2273 /**
2274  * ixgbe_configure_msix - Configure MSI-X hardware
2275  * @adapter: board private structure
2276  *
2277  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2278  * interrupts.
2279  **/
2280 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2281 {
2282         struct ixgbe_q_vector *q_vector;
2283         int v_idx;
2284         u32 mask;
2285
2286         /* Populate MSIX to EITR Select */
2287         if (adapter->num_vfs > 32) {
2288                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2289                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2290         }
2291
2292         /*
2293          * Populate the IVAR table and set the ITR values to the
2294          * corresponding register.
2295          */
2296         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2297                 struct ixgbe_ring *ring;
2298                 q_vector = adapter->q_vector[v_idx];
2299
2300                 ixgbe_for_each_ring(ring, q_vector->rx)
2301                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2302
2303                 ixgbe_for_each_ring(ring, q_vector->tx)
2304                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2305
2306                 ixgbe_write_eitr(q_vector);
2307         }
2308
2309         switch (adapter->hw.mac.type) {
2310         case ixgbe_mac_82598EB:
2311                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2312                                v_idx);
2313                 break;
2314         case ixgbe_mac_82599EB:
2315         case ixgbe_mac_X540:
2316         case ixgbe_mac_X550:
2317         case ixgbe_mac_X550EM_x:
2318         case ixgbe_mac_x550em_a:
2319                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2320                 break;
2321         default:
2322                 break;
2323         }
2324         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2325
2326         /* set up to autoclear timer, and the vectors */
2327         mask = IXGBE_EIMS_ENABLE_MASK;
2328         mask &= ~(IXGBE_EIMS_OTHER |
2329                   IXGBE_EIMS_MAILBOX |
2330                   IXGBE_EIMS_LSC);
2331
2332         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2333 }
2334
2335 enum latency_range {
2336         lowest_latency = 0,
2337         low_latency = 1,
2338         bulk_latency = 2,
2339         latency_invalid = 255
2340 };
2341
2342 /**
2343  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2344  * @q_vector: structure containing interrupt and ring information
2345  * @ring_container: structure containing ring performance data
2346  *
2347  *      Stores a new ITR value based on packets and byte
2348  *      counts during the last interrupt.  The advantage of per interrupt
2349  *      computation is faster updates and more accurate ITR for the current
2350  *      traffic pattern.  Constants in this function were computed
2351  *      based on theoretical maximum wire speed and thresholds were set based
2352  *      on testing data as well as attempting to minimize response time
2353  *      while increasing bulk throughput.
2354  *      this functionality is controlled by the InterruptThrottleRate module
2355  *      parameter (see ixgbe_param.c)
2356  **/
2357 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2358                              struct ixgbe_ring_container *ring_container)
2359 {
2360         int bytes = ring_container->total_bytes;
2361         int packets = ring_container->total_packets;
2362         u32 timepassed_us;
2363         u64 bytes_perint;
2364         u8 itr_setting = ring_container->itr;
2365
2366         if (packets == 0)
2367                 return;
2368
2369         /* simple throttlerate management
2370          *   0-10MB/s   lowest (100000 ints/s)
2371          *  10-20MB/s   low    (20000 ints/s)
2372          *  20-1249MB/s bulk   (12000 ints/s)
2373          */
2374         /* what was last interrupt timeslice? */
2375         timepassed_us = q_vector->itr >> 2;
2376         if (timepassed_us == 0)
2377                 return;
2378
2379         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2380
2381         switch (itr_setting) {
2382         case lowest_latency:
2383                 if (bytes_perint > 10)
2384                         itr_setting = low_latency;
2385                 break;
2386         case low_latency:
2387                 if (bytes_perint > 20)
2388                         itr_setting = bulk_latency;
2389                 else if (bytes_perint <= 10)
2390                         itr_setting = lowest_latency;
2391                 break;
2392         case bulk_latency:
2393                 if (bytes_perint <= 20)
2394                         itr_setting = low_latency;
2395                 break;
2396         }
2397
2398         /* clear work counters since we have the values we need */
2399         ring_container->total_bytes = 0;
2400         ring_container->total_packets = 0;
2401
2402         /* write updated itr to ring container */
2403         ring_container->itr = itr_setting;
2404 }
2405
2406 /**
2407  * ixgbe_write_eitr - write EITR register in hardware specific way
2408  * @q_vector: structure containing interrupt and ring information
2409  *
2410  * This function is made to be called by ethtool and by the driver
2411  * when it needs to update EITR registers at runtime.  Hardware
2412  * specific quirks/differences are taken care of here.
2413  */
2414 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2415 {
2416         struct ixgbe_adapter *adapter = q_vector->adapter;
2417         struct ixgbe_hw *hw = &adapter->hw;
2418         int v_idx = q_vector->v_idx;
2419         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2420
2421         switch (adapter->hw.mac.type) {
2422         case ixgbe_mac_82598EB:
2423                 /* must write high and low 16 bits to reset counter */
2424                 itr_reg |= (itr_reg << 16);
2425                 break;
2426         case ixgbe_mac_82599EB:
2427         case ixgbe_mac_X540:
2428         case ixgbe_mac_X550:
2429         case ixgbe_mac_X550EM_x:
2430         case ixgbe_mac_x550em_a:
2431                 /*
2432                  * set the WDIS bit to not clear the timer bits and cause an
2433                  * immediate assertion of the interrupt
2434                  */
2435                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2436                 break;
2437         default:
2438                 break;
2439         }
2440         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2441 }
2442
2443 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2444 {
2445         u32 new_itr = q_vector->itr;
2446         u8 current_itr;
2447
2448         ixgbe_update_itr(q_vector, &q_vector->tx);
2449         ixgbe_update_itr(q_vector, &q_vector->rx);
2450
2451         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2452
2453         switch (current_itr) {
2454         /* counts and packets in update_itr are dependent on these numbers */
2455         case lowest_latency:
2456                 new_itr = IXGBE_100K_ITR;
2457                 break;
2458         case low_latency:
2459                 new_itr = IXGBE_20K_ITR;
2460                 break;
2461         case bulk_latency:
2462                 new_itr = IXGBE_12K_ITR;
2463                 break;
2464         default:
2465                 break;
2466         }
2467
2468         if (new_itr != q_vector->itr) {
2469                 /* do an exponential smoothing */
2470                 new_itr = (10 * new_itr * q_vector->itr) /
2471                           ((9 * new_itr) + q_vector->itr);
2472
2473                 /* save the algorithm value here */
2474                 q_vector->itr = new_itr;
2475
2476                 ixgbe_write_eitr(q_vector);
2477         }
2478 }
2479
2480 /**
2481  * ixgbe_check_overtemp_subtask - check for over temperature
2482  * @adapter: pointer to adapter
2483  **/
2484 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2485 {
2486         struct ixgbe_hw *hw = &adapter->hw;
2487         u32 eicr = adapter->interrupt_event;
2488         s32 rc;
2489
2490         if (test_bit(__IXGBE_DOWN, &adapter->state))
2491                 return;
2492
2493         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2494             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2495                 return;
2496
2497         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2498
2499         switch (hw->device_id) {
2500         case IXGBE_DEV_ID_82599_T3_LOM:
2501                 /*
2502                  * Since the warning interrupt is for both ports
2503                  * we don't have to check if:
2504                  *  - This interrupt wasn't for our port.
2505                  *  - We may have missed the interrupt so always have to
2506                  *    check if we  got a LSC
2507                  */
2508                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2509                     !(eicr & IXGBE_EICR_LSC))
2510                         return;
2511
2512                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2513                         u32 speed;
2514                         bool link_up = false;
2515
2516                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2517
2518                         if (link_up)
2519                                 return;
2520                 }
2521
2522                 /* Check if this is not due to overtemp */
2523                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2524                         return;
2525
2526                 break;
2527         case IXGBE_DEV_ID_X550EM_A_1G_T:
2528         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2529                 rc = hw->phy.ops.check_overtemp(hw);
2530                 if (rc != IXGBE_ERR_OVERTEMP)
2531                         return;
2532                 break;
2533         default:
2534                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2535                         return;
2536                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2537                         return;
2538                 break;
2539         }
2540         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2541
2542         adapter->interrupt_event = 0;
2543 }
2544
2545 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2546 {
2547         struct ixgbe_hw *hw = &adapter->hw;
2548
2549         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2550             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2551                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2552                 /* write to clear the interrupt */
2553                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2554         }
2555 }
2556
2557 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2558 {
2559         struct ixgbe_hw *hw = &adapter->hw;
2560
2561         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2562                 return;
2563
2564         switch (adapter->hw.mac.type) {
2565         case ixgbe_mac_82599EB:
2566                 /*
2567                  * Need to check link state so complete overtemp check
2568                  * on service task
2569                  */
2570                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2571                      (eicr & IXGBE_EICR_LSC)) &&
2572                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2573                         adapter->interrupt_event = eicr;
2574                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2575                         ixgbe_service_event_schedule(adapter);
2576                         return;
2577                 }
2578                 return;
2579         case ixgbe_mac_x550em_a:
2580                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2581                         adapter->interrupt_event = eicr;
2582                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2583                         ixgbe_service_event_schedule(adapter);
2584                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2585                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2586                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2587                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2588                 }
2589                 return;
2590         case ixgbe_mac_X550:
2591         case ixgbe_mac_X540:
2592                 if (!(eicr & IXGBE_EICR_TS))
2593                         return;
2594                 break;
2595         default:
2596                 return;
2597         }
2598
2599         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2600 }
2601
2602 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2603 {
2604         switch (hw->mac.type) {
2605         case ixgbe_mac_82598EB:
2606                 if (hw->phy.type == ixgbe_phy_nl)
2607                         return true;
2608                 return false;
2609         case ixgbe_mac_82599EB:
2610         case ixgbe_mac_X550EM_x:
2611         case ixgbe_mac_x550em_a:
2612                 switch (hw->mac.ops.get_media_type(hw)) {
2613                 case ixgbe_media_type_fiber:
2614                 case ixgbe_media_type_fiber_qsfp:
2615                         return true;
2616                 default:
2617                         return false;
2618                 }
2619         default:
2620                 return false;
2621         }
2622 }
2623
2624 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2625 {
2626         struct ixgbe_hw *hw = &adapter->hw;
2627         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2628
2629         if (!ixgbe_is_sfp(hw))
2630                 return;
2631
2632         /* Later MAC's use different SDP */
2633         if (hw->mac.type >= ixgbe_mac_X540)
2634                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2635
2636         if (eicr & eicr_mask) {
2637                 /* Clear the interrupt */
2638                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2639                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2640                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2641                         adapter->sfp_poll_time = 0;
2642                         ixgbe_service_event_schedule(adapter);
2643                 }
2644         }
2645
2646         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2647             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2648                 /* Clear the interrupt */
2649                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2650                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2651                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2652                         ixgbe_service_event_schedule(adapter);
2653                 }
2654         }
2655 }
2656
2657 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2658 {
2659         struct ixgbe_hw *hw = &adapter->hw;
2660
2661         adapter->lsc_int++;
2662         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2663         adapter->link_check_timeout = jiffies;
2664         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2665                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2666                 IXGBE_WRITE_FLUSH(hw);
2667                 ixgbe_service_event_schedule(adapter);
2668         }
2669 }
2670
2671 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2672                                            u64 qmask)
2673 {
2674         u32 mask;
2675         struct ixgbe_hw *hw = &adapter->hw;
2676
2677         switch (hw->mac.type) {
2678         case ixgbe_mac_82598EB:
2679                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2680                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2681                 break;
2682         case ixgbe_mac_82599EB:
2683         case ixgbe_mac_X540:
2684         case ixgbe_mac_X550:
2685         case ixgbe_mac_X550EM_x:
2686         case ixgbe_mac_x550em_a:
2687                 mask = (qmask & 0xFFFFFFFF);
2688                 if (mask)
2689                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2690                 mask = (qmask >> 32);
2691                 if (mask)
2692                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2693                 break;
2694         default:
2695                 break;
2696         }
2697         /* skip the flush */
2698 }
2699
2700 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2701                                             u64 qmask)
2702 {
2703         u32 mask;
2704         struct ixgbe_hw *hw = &adapter->hw;
2705
2706         switch (hw->mac.type) {
2707         case ixgbe_mac_82598EB:
2708                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2709                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2710                 break;
2711         case ixgbe_mac_82599EB:
2712         case ixgbe_mac_X540:
2713         case ixgbe_mac_X550:
2714         case ixgbe_mac_X550EM_x:
2715         case ixgbe_mac_x550em_a:
2716                 mask = (qmask & 0xFFFFFFFF);
2717                 if (mask)
2718                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2719                 mask = (qmask >> 32);
2720                 if (mask)
2721                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2722                 break;
2723         default:
2724                 break;
2725         }
2726         /* skip the flush */
2727 }
2728
2729 /**
2730  * ixgbe_irq_enable - Enable default interrupt generation settings
2731  * @adapter: board private structure
2732  **/
2733 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2734                                     bool flush)
2735 {
2736         struct ixgbe_hw *hw = &adapter->hw;
2737         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2738
2739         /* don't reenable LSC while waiting for link */
2740         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2741                 mask &= ~IXGBE_EIMS_LSC;
2742
2743         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2744                 switch (adapter->hw.mac.type) {
2745                 case ixgbe_mac_82599EB:
2746                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2747                         break;
2748                 case ixgbe_mac_X540:
2749                 case ixgbe_mac_X550:
2750                 case ixgbe_mac_X550EM_x:
2751                 case ixgbe_mac_x550em_a:
2752                         mask |= IXGBE_EIMS_TS;
2753                         break;
2754                 default:
2755                         break;
2756                 }
2757         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2758                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2759         switch (adapter->hw.mac.type) {
2760         case ixgbe_mac_82599EB:
2761                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2762                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2763                 /* fall through */
2764         case ixgbe_mac_X540:
2765         case ixgbe_mac_X550:
2766         case ixgbe_mac_X550EM_x:
2767         case ixgbe_mac_x550em_a:
2768                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2769                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2770                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2771                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2772                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2773                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2774                 mask |= IXGBE_EIMS_ECC;
2775                 mask |= IXGBE_EIMS_MAILBOX;
2776                 break;
2777         default:
2778                 break;
2779         }
2780
2781         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2782             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2783                 mask |= IXGBE_EIMS_FLOW_DIR;
2784
2785         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2786         if (queues)
2787                 ixgbe_irq_enable_queues(adapter, ~0);
2788         if (flush)
2789                 IXGBE_WRITE_FLUSH(&adapter->hw);
2790 }
2791
2792 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2793 {
2794         struct ixgbe_adapter *adapter = data;
2795         struct ixgbe_hw *hw = &adapter->hw;
2796         u32 eicr;
2797
2798         /*
2799          * Workaround for Silicon errata.  Use clear-by-write instead
2800          * of clear-by-read.  Reading with EICS will return the
2801          * interrupt causes without clearing, which later be done
2802          * with the write to EICR.
2803          */
2804         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2805
2806         /* The lower 16bits of the EICR register are for the queue interrupts
2807          * which should be masked here in order to not accidentally clear them if
2808          * the bits are high when ixgbe_msix_other is called. There is a race
2809          * condition otherwise which results in possible performance loss
2810          * especially if the ixgbe_msix_other interrupt is triggering
2811          * consistently (as it would when PPS is turned on for the X540 device)
2812          */
2813         eicr &= 0xFFFF0000;
2814
2815         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2816
2817         if (eicr & IXGBE_EICR_LSC)
2818                 ixgbe_check_lsc(adapter);
2819
2820         if (eicr & IXGBE_EICR_MAILBOX)
2821                 ixgbe_msg_task(adapter);
2822
2823         switch (hw->mac.type) {
2824         case ixgbe_mac_82599EB:
2825         case ixgbe_mac_X540:
2826         case ixgbe_mac_X550:
2827         case ixgbe_mac_X550EM_x:
2828         case ixgbe_mac_x550em_a:
2829                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2830                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2831                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2832                         ixgbe_service_event_schedule(adapter);
2833                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2834                                         IXGBE_EICR_GPI_SDP0_X540);
2835                 }
2836                 if (eicr & IXGBE_EICR_ECC) {
2837                         e_info(link, "Received ECC Err, initiating reset\n");
2838                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2839                         ixgbe_service_event_schedule(adapter);
2840                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2841                 }
2842                 /* Handle Flow Director Full threshold interrupt */
2843                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2844                         int reinit_count = 0;
2845                         int i;
2846                         for (i = 0; i < adapter->num_tx_queues; i++) {
2847                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2848                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2849                                                        &ring->state))
2850                                         reinit_count++;
2851                         }
2852                         if (reinit_count) {
2853                                 /* no more flow director interrupts until after init */
2854                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2855                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2856                                 ixgbe_service_event_schedule(adapter);
2857                         }
2858                 }
2859                 ixgbe_check_sfp_event(adapter, eicr);
2860                 ixgbe_check_overtemp_event(adapter, eicr);
2861                 break;
2862         default:
2863                 break;
2864         }
2865
2866         ixgbe_check_fan_failure(adapter, eicr);
2867
2868         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2869                 ixgbe_ptp_check_pps_event(adapter);
2870
2871         /* re-enable the original interrupt state, no lsc, no queues */
2872         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2873                 ixgbe_irq_enable(adapter, false, false);
2874
2875         return IRQ_HANDLED;
2876 }
2877
2878 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2879 {
2880         struct ixgbe_q_vector *q_vector = data;
2881
2882         /* EIAM disabled interrupts (on this vector) for us */
2883
2884         if (q_vector->rx.ring || q_vector->tx.ring)
2885                 napi_schedule_irqoff(&q_vector->napi);
2886
2887         return IRQ_HANDLED;
2888 }
2889
2890 /**
2891  * ixgbe_poll - NAPI Rx polling callback
2892  * @napi: structure for representing this polling device
2893  * @budget: how many packets driver is allowed to clean
2894  *
2895  * This function is used for legacy and MSI, NAPI mode
2896  **/
2897 int ixgbe_poll(struct napi_struct *napi, int budget)
2898 {
2899         struct ixgbe_q_vector *q_vector =
2900                                 container_of(napi, struct ixgbe_q_vector, napi);
2901         struct ixgbe_adapter *adapter = q_vector->adapter;
2902         struct ixgbe_ring *ring;
2903         int per_ring_budget, work_done = 0;
2904         bool clean_complete = true;
2905
2906 #ifdef CONFIG_IXGBE_DCA
2907         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2908                 ixgbe_update_dca(q_vector);
2909 #endif
2910
2911         ixgbe_for_each_ring(ring, q_vector->tx) {
2912                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2913                         clean_complete = false;
2914         }
2915
2916         /* Exit if we are called by netpoll */
2917         if (budget <= 0)
2918                 return budget;
2919
2920         /* attempt to distribute budget to each queue fairly, but don't allow
2921          * the budget to go below 1 because we'll exit polling */
2922         if (q_vector->rx.count > 1)
2923                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2924         else
2925                 per_ring_budget = budget;
2926
2927         ixgbe_for_each_ring(ring, q_vector->rx) {
2928                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2929                                                  per_ring_budget);
2930
2931                 work_done += cleaned;
2932                 if (cleaned >= per_ring_budget)
2933                         clean_complete = false;
2934         }
2935
2936         /* If all work not completed, return budget and keep polling */
2937         if (!clean_complete)
2938                 return budget;
2939
2940         /* all work done, exit the polling mode */
2941         napi_complete_done(napi, work_done);
2942         if (adapter->rx_itr_setting & 1)
2943                 ixgbe_set_itr(q_vector);
2944         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2945                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2946
2947         return min(work_done, budget - 1);
2948 }
2949
2950 /**
2951  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2952  * @adapter: board private structure
2953  *
2954  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2955  * interrupts from the kernel.
2956  **/
2957 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2958 {
2959         struct net_device *netdev = adapter->netdev;
2960         int vector, err;
2961         int ri = 0, ti = 0;
2962
2963         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2964                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2965                 struct msix_entry *entry = &adapter->msix_entries[vector];
2966
2967                 if (q_vector->tx.ring && q_vector->rx.ring) {
2968                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2969                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2970                         ti++;
2971                 } else if (q_vector->rx.ring) {
2972                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2973                                  "%s-%s-%d", netdev->name, "rx", ri++);
2974                 } else if (q_vector->tx.ring) {
2975                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2976                                  "%s-%s-%d", netdev->name, "tx", ti++);
2977                 } else {
2978                         /* skip this unused q_vector */
2979                         continue;
2980                 }
2981                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2982                                   q_vector->name, q_vector);
2983                 if (err) {
2984                         e_err(probe, "request_irq failed for MSIX interrupt "
2985                               "Error: %d\n", err);
2986                         goto free_queue_irqs;
2987                 }
2988                 /* If Flow Director is enabled, set interrupt affinity */
2989                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2990                         /* assign the mask for this irq */
2991                         irq_set_affinity_hint(entry->vector,
2992                                               &q_vector->affinity_mask);
2993                 }
2994         }
2995
2996         err = request_irq(adapter->msix_entries[vector].vector,
2997                           ixgbe_msix_other, 0, netdev->name, adapter);
2998         if (err) {
2999                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3000                 goto free_queue_irqs;
3001         }
3002
3003         return 0;
3004
3005 free_queue_irqs:
3006         while (vector) {
3007                 vector--;
3008                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3009                                       NULL);
3010                 free_irq(adapter->msix_entries[vector].vector,
3011                          adapter->q_vector[vector]);
3012         }
3013         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3014         pci_disable_msix(adapter->pdev);
3015         kfree(adapter->msix_entries);
3016         adapter->msix_entries = NULL;
3017         return err;
3018 }
3019
3020 /**
3021  * ixgbe_intr - legacy mode Interrupt Handler
3022  * @irq: interrupt number
3023  * @data: pointer to a network interface device structure
3024  **/
3025 static irqreturn_t ixgbe_intr(int irq, void *data)
3026 {
3027         struct ixgbe_adapter *adapter = data;
3028         struct ixgbe_hw *hw = &adapter->hw;
3029         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3030         u32 eicr;
3031
3032         /*
3033          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3034          * before the read of EICR.
3035          */
3036         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3037
3038         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3039          * therefore no explicit interrupt disable is necessary */
3040         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3041         if (!eicr) {
3042                 /*
3043                  * shared interrupt alert!
3044                  * make sure interrupts are enabled because the read will
3045                  * have disabled interrupts due to EIAM
3046                  * finish the workaround of silicon errata on 82598.  Unmask
3047                  * the interrupt that we masked before the EICR read.
3048                  */
3049                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3050                         ixgbe_irq_enable(adapter, true, true);
3051                 return IRQ_NONE;        /* Not our interrupt */
3052         }
3053
3054         if (eicr & IXGBE_EICR_LSC)
3055                 ixgbe_check_lsc(adapter);
3056
3057         switch (hw->mac.type) {
3058         case ixgbe_mac_82599EB:
3059                 ixgbe_check_sfp_event(adapter, eicr);
3060                 /* Fall through */
3061         case ixgbe_mac_X540:
3062         case ixgbe_mac_X550:
3063         case ixgbe_mac_X550EM_x:
3064         case ixgbe_mac_x550em_a:
3065                 if (eicr & IXGBE_EICR_ECC) {
3066                         e_info(link, "Received ECC Err, initiating reset\n");
3067                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3068                         ixgbe_service_event_schedule(adapter);
3069                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3070                 }
3071                 ixgbe_check_overtemp_event(adapter, eicr);
3072                 break;
3073         default:
3074                 break;
3075         }
3076
3077         ixgbe_check_fan_failure(adapter, eicr);
3078         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3079                 ixgbe_ptp_check_pps_event(adapter);
3080
3081         /* would disable interrupts here but EIAM disabled it */
3082         napi_schedule_irqoff(&q_vector->napi);
3083
3084         /*
3085          * re-enable link(maybe) and non-queue interrupts, no flush.
3086          * ixgbe_poll will re-enable the queue interrupts
3087          */
3088         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3089                 ixgbe_irq_enable(adapter, false, false);
3090
3091         return IRQ_HANDLED;
3092 }
3093
3094 /**
3095  * ixgbe_request_irq - initialize interrupts
3096  * @adapter: board private structure
3097  *
3098  * Attempts to configure interrupts using the best available
3099  * capabilities of the hardware and kernel.
3100  **/
3101 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3102 {
3103         struct net_device *netdev = adapter->netdev;
3104         int err;
3105
3106         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3107                 err = ixgbe_request_msix_irqs(adapter);
3108         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3109                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3110                                   netdev->name, adapter);
3111         else
3112                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3113                                   netdev->name, adapter);
3114
3115         if (err)
3116                 e_err(probe, "request_irq failed, Error %d\n", err);
3117
3118         return err;
3119 }
3120
3121 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3122 {
3123         int vector;
3124
3125         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3126                 free_irq(adapter->pdev->irq, adapter);
3127                 return;
3128         }
3129
3130         if (!adapter->msix_entries)
3131                 return;
3132
3133         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3134                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3135                 struct msix_entry *entry = &adapter->msix_entries[vector];
3136
3137                 /* free only the irqs that were actually requested */
3138                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3139                         continue;
3140
3141                 /* clear the affinity_mask in the IRQ descriptor */
3142                 irq_set_affinity_hint(entry->vector, NULL);
3143
3144                 free_irq(entry->vector, q_vector);
3145         }
3146
3147         free_irq(adapter->msix_entries[vector].vector, adapter);
3148 }
3149
3150 /**
3151  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3152  * @adapter: board private structure
3153  **/
3154 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3155 {
3156         switch (adapter->hw.mac.type) {
3157         case ixgbe_mac_82598EB:
3158                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3159                 break;
3160         case ixgbe_mac_82599EB:
3161         case ixgbe_mac_X540:
3162         case ixgbe_mac_X550:
3163         case ixgbe_mac_X550EM_x:
3164         case ixgbe_mac_x550em_a:
3165                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3166                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3167                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3168                 break;
3169         default:
3170                 break;
3171         }
3172         IXGBE_WRITE_FLUSH(&adapter->hw);
3173         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3174                 int vector;
3175
3176                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3177                         synchronize_irq(adapter->msix_entries[vector].vector);
3178
3179                 synchronize_irq(adapter->msix_entries[vector++].vector);
3180         } else {
3181                 synchronize_irq(adapter->pdev->irq);
3182         }
3183 }
3184
3185 /**
3186  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3187  *
3188  **/
3189 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3190 {
3191         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3192
3193         ixgbe_write_eitr(q_vector);
3194
3195         ixgbe_set_ivar(adapter, 0, 0, 0);
3196         ixgbe_set_ivar(adapter, 1, 0, 0);
3197
3198         e_info(hw, "Legacy interrupt IVAR setup done\n");
3199 }
3200
3201 /**
3202  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3203  * @adapter: board private structure
3204  * @ring: structure containing ring specific data
3205  *
3206  * Configure the Tx descriptor ring after a reset.
3207  **/
3208 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3209                              struct ixgbe_ring *ring)
3210 {
3211         struct ixgbe_hw *hw = &adapter->hw;
3212         u64 tdba = ring->dma;
3213         int wait_loop = 10;
3214         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3215         u8 reg_idx = ring->reg_idx;
3216
3217         /* disable queue to avoid issues while updating state */
3218         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3219         IXGBE_WRITE_FLUSH(hw);
3220
3221         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3222                         (tdba & DMA_BIT_MASK(32)));
3223         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3224         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3225                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3226         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3227         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3228         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3229
3230         /*
3231          * set WTHRESH to encourage burst writeback, it should not be set
3232          * higher than 1 when:
3233          * - ITR is 0 as it could cause false TX hangs
3234          * - ITR is set to > 100k int/sec and BQL is enabled
3235          *
3236          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3237          * to or less than the number of on chip descriptors, which is
3238          * currently 40.
3239          */
3240         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3241                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3242         else
3243                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3244
3245         /*
3246          * Setting PTHRESH to 32 both improves performance
3247          * and avoids a TX hang with DFP enabled
3248          */
3249         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3250                    32;          /* PTHRESH = 32 */
3251
3252         /* reinitialize flowdirector state */
3253         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3254                 ring->atr_sample_rate = adapter->atr_sample_rate;
3255                 ring->atr_count = 0;
3256                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3257         } else {
3258                 ring->atr_sample_rate = 0;
3259         }
3260
3261         /* initialize XPS */
3262         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3263                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3264
3265                 if (q_vector)
3266                         netif_set_xps_queue(ring->netdev,
3267                                             &q_vector->affinity_mask,
3268                                             ring->queue_index);
3269         }
3270
3271         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3272
3273         /* reinitialize tx_buffer_info */
3274         memset(ring->tx_buffer_info, 0,
3275                sizeof(struct ixgbe_tx_buffer) * ring->count);
3276
3277         /* enable queue */
3278         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3279
3280         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3281         if (hw->mac.type == ixgbe_mac_82598EB &&
3282             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3283                 return;
3284
3285         /* poll to verify queue is enabled */
3286         do {
3287                 usleep_range(1000, 2000);
3288                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3289         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3290         if (!wait_loop)
3291                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3292 }
3293
3294 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3295 {
3296         struct ixgbe_hw *hw = &adapter->hw;
3297         u32 rttdcs, mtqc;
3298         u8 tcs = netdev_get_num_tc(adapter->netdev);
3299
3300         if (hw->mac.type == ixgbe_mac_82598EB)
3301                 return;
3302
3303         /* disable the arbiter while setting MTQC */
3304         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3305         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3306         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3307
3308         /* set transmit pool layout */
3309         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3310                 mtqc = IXGBE_MTQC_VT_ENA;
3311                 if (tcs > 4)
3312                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3313                 else if (tcs > 1)
3314                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3315                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3316                          IXGBE_82599_VMDQ_4Q_MASK)
3317                         mtqc |= IXGBE_MTQC_32VF;
3318                 else
3319                         mtqc |= IXGBE_MTQC_64VF;
3320         } else {
3321                 if (tcs > 4)
3322                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3323                 else if (tcs > 1)
3324                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3325                 else
3326                         mtqc = IXGBE_MTQC_64Q_1PB;
3327         }
3328
3329         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3330
3331         /* Enable Security TX Buffer IFG for multiple pb */
3332         if (tcs) {
3333                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3334                 sectx |= IXGBE_SECTX_DCB;
3335                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3336         }
3337
3338         /* re-enable the arbiter */
3339         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3340         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3341 }
3342
3343 /**
3344  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3345  * @adapter: board private structure
3346  *
3347  * Configure the Tx unit of the MAC after a reset.
3348  **/
3349 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3350 {
3351         struct ixgbe_hw *hw = &adapter->hw;
3352         u32 dmatxctl;
3353         u32 i;
3354
3355         ixgbe_setup_mtqc(adapter);
3356
3357         if (hw->mac.type != ixgbe_mac_82598EB) {
3358                 /* DMATXCTL.EN must be before Tx queues are enabled */
3359                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3360                 dmatxctl |= IXGBE_DMATXCTL_TE;
3361                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3362         }
3363
3364         /* Setup the HW Tx Head and Tail descriptor pointers */
3365         for (i = 0; i < adapter->num_tx_queues; i++)
3366                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3367 }
3368
3369 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3370                                  struct ixgbe_ring *ring)
3371 {
3372         struct ixgbe_hw *hw = &adapter->hw;
3373         u8 reg_idx = ring->reg_idx;
3374         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3375
3376         srrctl |= IXGBE_SRRCTL_DROP_EN;
3377
3378         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3379 }
3380
3381 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3382                                   struct ixgbe_ring *ring)
3383 {
3384         struct ixgbe_hw *hw = &adapter->hw;
3385         u8 reg_idx = ring->reg_idx;
3386         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3387
3388         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3389
3390         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3391 }
3392
3393 #ifdef CONFIG_IXGBE_DCB
3394 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3395 #else
3396 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3397 #endif
3398 {
3399         int i;
3400         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3401
3402         if (adapter->ixgbe_ieee_pfc)
3403                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3404
3405         /*
3406          * We should set the drop enable bit if:
3407          *  SR-IOV is enabled
3408          *   or
3409          *  Number of Rx queues > 1 and flow control is disabled
3410          *
3411          *  This allows us to avoid head of line blocking for security
3412          *  and performance reasons.
3413          */
3414         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3415             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3416                 for (i = 0; i < adapter->num_rx_queues; i++)
3417                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3418         } else {
3419                 for (i = 0; i < adapter->num_rx_queues; i++)
3420                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3421         }
3422 }
3423
3424 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3425
3426 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3427                                    struct ixgbe_ring *rx_ring)
3428 {
3429         struct ixgbe_hw *hw = &adapter->hw;
3430         u32 srrctl;
3431         u8 reg_idx = rx_ring->reg_idx;
3432
3433         if (hw->mac.type == ixgbe_mac_82598EB) {
3434                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3435
3436                 /*
3437                  * if VMDq is not active we must program one srrctl register
3438                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3439                  */
3440                 reg_idx &= mask;
3441         }
3442
3443         /* configure header buffer length, needed for RSC */
3444         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3445
3446         /* configure the packet buffer length */
3447         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3448                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3449         else
3450                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3451
3452         /* configure descriptor type */
3453         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3454
3455         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3456 }
3457
3458 /**
3459  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3460  * @adapter: device handle
3461  *
3462  *  - 82598/82599/X540:     128
3463  *  - X550(non-SRIOV mode): 512
3464  *  - X550(SRIOV mode):     64
3465  */
3466 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3467 {
3468         if (adapter->hw.mac.type < ixgbe_mac_X550)
3469                 return 128;
3470         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3471                 return 64;
3472         else
3473                 return 512;
3474 }
3475
3476 /**
3477  * ixgbe_store_reta - Write the RETA table to HW
3478  * @adapter: device handle
3479  *
3480  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3481  */
3482 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3483 {
3484         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3485         struct ixgbe_hw *hw = &adapter->hw;
3486         u32 reta = 0;
3487         u32 indices_multi;
3488         u8 *indir_tbl = adapter->rss_indir_tbl;
3489
3490         /* Fill out the redirection table as follows:
3491          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3492          *    indices.
3493          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3494          *  - X550:       8 bit wide entries containing 6 bit RSS index
3495          */
3496         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3497                 indices_multi = 0x11;
3498         else
3499                 indices_multi = 0x1;
3500
3501         /* Write redirection table to HW */
3502         for (i = 0; i < reta_entries; i++) {
3503                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3504                 if ((i & 3) == 3) {
3505                         if (i < 128)
3506                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3507                         else
3508                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3509                                                 reta);
3510                         reta = 0;
3511                 }
3512         }
3513 }
3514
3515 /**
3516  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3517  * @adapter: device handle
3518  *
3519  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3520  */
3521 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3522 {
3523         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3524         struct ixgbe_hw *hw = &adapter->hw;
3525         u32 vfreta = 0;
3526         unsigned int pf_pool = adapter->num_vfs;
3527
3528         /* Write redirection table to HW */
3529         for (i = 0; i < reta_entries; i++) {
3530                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3531                 if ((i & 3) == 3) {
3532                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3533                                         vfreta);
3534                         vfreta = 0;
3535                 }
3536         }
3537 }
3538
3539 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3540 {
3541         struct ixgbe_hw *hw = &adapter->hw;
3542         u32 i, j;
3543         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3544         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3545
3546         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3547          * make full use of any rings they may have.  We will use the
3548          * PSRTYPE register to control how many rings we use within the PF.
3549          */
3550         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3551                 rss_i = 4;
3552
3553         /* Fill out hash function seeds */
3554         for (i = 0; i < 10; i++)
3555                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3556
3557         /* Fill out redirection table */
3558         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3559
3560         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3561                 if (j == rss_i)
3562                         j = 0;
3563
3564                 adapter->rss_indir_tbl[i] = j;
3565         }
3566
3567         ixgbe_store_reta(adapter);
3568 }
3569
3570 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3571 {
3572         struct ixgbe_hw *hw = &adapter->hw;
3573         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3574         unsigned int pf_pool = adapter->num_vfs;
3575         int i, j;
3576
3577         /* Fill out hash function seeds */
3578         for (i = 0; i < 10; i++)
3579                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3580                                 adapter->rss_key[i]);
3581
3582         /* Fill out the redirection table */
3583         for (i = 0, j = 0; i < 64; i++, j++) {
3584                 if (j == rss_i)
3585                         j = 0;
3586
3587                 adapter->rss_indir_tbl[i] = j;
3588         }
3589
3590         ixgbe_store_vfreta(adapter);
3591 }
3592
3593 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3594 {
3595         struct ixgbe_hw *hw = &adapter->hw;
3596         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3597         u32 rxcsum;
3598
3599         /* Disable indicating checksum in descriptor, enables RSS hash */
3600         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3601         rxcsum |= IXGBE_RXCSUM_PCSD;
3602         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3603
3604         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3605                 if (adapter->ring_feature[RING_F_RSS].mask)
3606                         mrqc = IXGBE_MRQC_RSSEN;
3607         } else {
3608                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3609
3610                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3611                         if (tcs > 4)
3612                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3613                         else if (tcs > 1)
3614                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3615                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3616                                  IXGBE_82599_VMDQ_4Q_MASK)
3617                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3618                         else
3619                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3620                 } else {
3621                         if (tcs > 4)
3622                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3623                         else if (tcs > 1)
3624                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3625                         else
3626                                 mrqc = IXGBE_MRQC_RSSEN;
3627                 }
3628         }
3629
3630         /* Perform hash on these packet types */
3631         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3632                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3633                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3634                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3635
3636         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3637                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3638         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3639                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3640
3641         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3642         if ((hw->mac.type >= ixgbe_mac_X550) &&
3643             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3644                 unsigned int pf_pool = adapter->num_vfs;
3645
3646                 /* Enable VF RSS mode */
3647                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3648                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3649
3650                 /* Setup RSS through the VF registers */
3651                 ixgbe_setup_vfreta(adapter);
3652                 vfmrqc = IXGBE_MRQC_RSSEN;
3653                 vfmrqc |= rss_field;
3654                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3655         } else {
3656                 ixgbe_setup_reta(adapter);
3657                 mrqc |= rss_field;
3658                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3659         }
3660 }
3661
3662 /**
3663  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3664  * @adapter:    address of board private structure
3665  * @index:      index of ring to set
3666  **/
3667 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3668                                    struct ixgbe_ring *ring)
3669 {
3670         struct ixgbe_hw *hw = &adapter->hw;
3671         u32 rscctrl;
3672         u8 reg_idx = ring->reg_idx;
3673
3674         if (!ring_is_rsc_enabled(ring))
3675                 return;
3676
3677         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3678         rscctrl |= IXGBE_RSCCTL_RSCEN;
3679         /*
3680          * we must limit the number of descriptors so that the
3681          * total size of max desc * buf_len is not greater
3682          * than 65536
3683          */
3684         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3685         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3686 }
3687
3688 #define IXGBE_MAX_RX_DESC_POLL 10
3689 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3690                                        struct ixgbe_ring *ring)
3691 {
3692         struct ixgbe_hw *hw = &adapter->hw;
3693         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3694         u32 rxdctl;
3695         u8 reg_idx = ring->reg_idx;
3696
3697         if (ixgbe_removed(hw->hw_addr))
3698                 return;
3699         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3700         if (hw->mac.type == ixgbe_mac_82598EB &&
3701             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3702                 return;
3703
3704         do {
3705                 usleep_range(1000, 2000);
3706                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3707         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3708
3709         if (!wait_loop) {
3710                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3711                       "the polling period\n", reg_idx);
3712         }
3713 }
3714
3715 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3716                             struct ixgbe_ring *ring)
3717 {
3718         struct ixgbe_hw *hw = &adapter->hw;
3719         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3720         u32 rxdctl;
3721         u8 reg_idx = ring->reg_idx;
3722
3723         if (ixgbe_removed(hw->hw_addr))
3724                 return;
3725         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3726         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3727
3728         /* write value back with RXDCTL.ENABLE bit cleared */
3729         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3730
3731         if (hw->mac.type == ixgbe_mac_82598EB &&
3732             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3733                 return;
3734
3735         /* the hardware may take up to 100us to really disable the rx queue */
3736         do {
3737                 udelay(10);
3738                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3739         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3740
3741         if (!wait_loop) {
3742                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3743                       "the polling period\n", reg_idx);
3744         }
3745 }
3746
3747 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3748                              struct ixgbe_ring *ring)
3749 {
3750         struct ixgbe_hw *hw = &adapter->hw;
3751         union ixgbe_adv_rx_desc *rx_desc;
3752         u64 rdba = ring->dma;
3753         u32 rxdctl;
3754         u8 reg_idx = ring->reg_idx;
3755
3756         /* disable queue to avoid issues while updating state */
3757         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3758         ixgbe_disable_rx_queue(adapter, ring);
3759
3760         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3761         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3762         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3763                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3764         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3765         IXGBE_WRITE_FLUSH(hw);
3766
3767         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3768         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3769         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3770
3771         ixgbe_configure_srrctl(adapter, ring);
3772         ixgbe_configure_rscctl(adapter, ring);
3773
3774         if (hw->mac.type == ixgbe_mac_82598EB) {
3775                 /*
3776                  * enable cache line friendly hardware writes:
3777                  * PTHRESH=32 descriptors (half the internal cache),
3778                  * this also removes ugly rx_no_buffer_count increment
3779                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3780                  * WTHRESH=8 burst writeback up to two cache lines
3781                  */
3782                 rxdctl &= ~0x3FFFFF;
3783                 rxdctl |=  0x080420;
3784 #if (PAGE_SIZE < 8192)
3785         } else {
3786                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
3787                             IXGBE_RXDCTL_RLPML_EN);
3788
3789                 /* Limit the maximum frame size so we don't overrun the skb */
3790                 if (ring_uses_build_skb(ring) &&
3791                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
3792                         rxdctl |= IXGBE_MAX_FRAME_BUILD_SKB |
3793                                   IXGBE_RXDCTL_RLPML_EN;
3794 #endif
3795         }
3796
3797         /* initialize rx_buffer_info */
3798         memset(ring->rx_buffer_info, 0,
3799                sizeof(struct ixgbe_rx_buffer) * ring->count);
3800
3801         /* initialize Rx descriptor 0 */
3802         rx_desc = IXGBE_RX_DESC(ring, 0);
3803         rx_desc->wb.upper.length = 0;
3804
3805         /* enable receive descriptor ring */
3806         rxdctl |= IXGBE_RXDCTL_ENABLE;
3807         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3808
3809         ixgbe_rx_desc_queue_enable(adapter, ring);
3810         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3811 }
3812
3813 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3814 {
3815         struct ixgbe_hw *hw = &adapter->hw;
3816         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3817         u16 pool;
3818
3819         /* PSRTYPE must be initialized in non 82598 adapters */
3820         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3821                       IXGBE_PSRTYPE_UDPHDR |
3822                       IXGBE_PSRTYPE_IPV4HDR |
3823                       IXGBE_PSRTYPE_L2HDR |
3824                       IXGBE_PSRTYPE_IPV6HDR;
3825
3826         if (hw->mac.type == ixgbe_mac_82598EB)
3827                 return;
3828
3829         if (rss_i > 3)
3830                 psrtype |= 2u << 29;
3831         else if (rss_i > 1)
3832                 psrtype |= 1u << 29;
3833
3834         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3835                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3836 }
3837
3838 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3839 {
3840         struct ixgbe_hw *hw = &adapter->hw;
3841         u32 reg_offset, vf_shift;
3842         u32 gcr_ext, vmdctl;
3843         int i;
3844
3845         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3846                 return;
3847
3848         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3849         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3850         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3851         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3852         vmdctl |= IXGBE_VT_CTL_REPLEN;
3853         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3854
3855         vf_shift = VMDQ_P(0) % 32;
3856         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3857
3858         /* Enable only the PF's pool for Tx/Rx */
3859         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3860         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3861         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3862         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3863         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3864                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3865
3866         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3867         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3868
3869         /* clear VLAN promisc flag so VFTA will be updated if necessary */
3870         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3871
3872         /*
3873          * Set up VF register offsets for selected VT Mode,
3874          * i.e. 32 or 64 VFs for SR-IOV
3875          */
3876         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3877         case IXGBE_82599_VMDQ_8Q_MASK:
3878                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3879                 break;
3880         case IXGBE_82599_VMDQ_4Q_MASK:
3881                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3882                 break;
3883         default:
3884                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3885                 break;
3886         }
3887
3888         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3889
3890         for (i = 0; i < adapter->num_vfs; i++) {
3891                 /* configure spoof checking */
3892                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3893                                           adapter->vfinfo[i].spoofchk_enabled);
3894
3895                 /* Enable/Disable RSS query feature  */
3896                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3897                                           adapter->vfinfo[i].rss_query_enabled);
3898         }
3899 }
3900
3901 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3902 {
3903         struct ixgbe_hw *hw = &adapter->hw;
3904         struct net_device *netdev = adapter->netdev;
3905         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3906         struct ixgbe_ring *rx_ring;
3907         int i;
3908         u32 mhadd, hlreg0;
3909
3910 #ifdef IXGBE_FCOE
3911         /* adjust max frame to be able to do baby jumbo for FCoE */
3912         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3913             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3914                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3915
3916 #endif /* IXGBE_FCOE */
3917
3918         /* adjust max frame to be at least the size of a standard frame */
3919         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3920                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3921
3922         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3923         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3924                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3925                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3926
3927                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3928         }
3929
3930         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3931         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3932         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3933         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3934
3935         /*
3936          * Setup the HW Rx Head and Tail Descriptor Pointers and
3937          * the Base and Length of the Rx Descriptor Ring
3938          */
3939         for (i = 0; i < adapter->num_rx_queues; i++) {
3940                 rx_ring = adapter->rx_ring[i];
3941
3942                 clear_ring_rsc_enabled(rx_ring);
3943                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
3944                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
3945
3946                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3947                         set_ring_rsc_enabled(rx_ring);
3948
3949                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
3950                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
3951
3952                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
3953                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
3954                         continue;
3955
3956                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
3957
3958 #if (PAGE_SIZE < 8192)
3959                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3960                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
3961
3962                 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))
3963                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
3964 #endif
3965         }
3966 }
3967
3968 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3969 {
3970         struct ixgbe_hw *hw = &adapter->hw;
3971         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3972
3973         switch (hw->mac.type) {
3974         case ixgbe_mac_82598EB:
3975                 /*
3976                  * For VMDq support of different descriptor types or
3977                  * buffer sizes through the use of multiple SRRCTL
3978                  * registers, RDRXCTL.MVMEN must be set to 1
3979                  *
3980                  * also, the manual doesn't mention it clearly but DCA hints
3981                  * will only use queue 0's tags unless this bit is set.  Side
3982                  * effects of setting this bit are only that SRRCTL must be
3983                  * fully programmed [0..15]
3984                  */
3985                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3986                 break;
3987         case ixgbe_mac_X550:
3988         case ixgbe_mac_X550EM_x:
3989         case ixgbe_mac_x550em_a:
3990                 if (adapter->num_vfs)
3991                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3992                 /* fall through for older HW */
3993         case ixgbe_mac_82599EB:
3994         case ixgbe_mac_X540:
3995                 /* Disable RSC for ACK packets */
3996                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3997                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3998                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3999                 /* hardware requires some bits to be set by default */
4000                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4001                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4002                 break;
4003         default:
4004                 /* We should do nothing since we don't know this hardware */
4005                 return;
4006         }
4007
4008         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4009 }
4010
4011 /**
4012  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4013  * @adapter: board private structure
4014  *
4015  * Configure the Rx unit of the MAC after a reset.
4016  **/
4017 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4018 {
4019         struct ixgbe_hw *hw = &adapter->hw;
4020         int i;
4021         u32 rxctrl, rfctl;
4022
4023         /* disable receives while setting up the descriptors */
4024         hw->mac.ops.disable_rx(hw);
4025
4026         ixgbe_setup_psrtype(adapter);
4027         ixgbe_setup_rdrxctl(adapter);
4028
4029         /* RSC Setup */
4030         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4031         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4032         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4033                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4034
4035         /* disable NFS filtering */
4036         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4037         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4038
4039         /* Program registers for the distribution of queues */
4040         ixgbe_setup_mrqc(adapter);
4041
4042         /* set_rx_buffer_len must be called before ring initialization */
4043         ixgbe_set_rx_buffer_len(adapter);
4044
4045         /*
4046          * Setup the HW Rx Head and Tail Descriptor Pointers and
4047          * the Base and Length of the Rx Descriptor Ring
4048          */
4049         for (i = 0; i < adapter->num_rx_queues; i++)
4050                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4051
4052         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4053         /* disable drop enable for 82598 parts */
4054         if (hw->mac.type == ixgbe_mac_82598EB)
4055                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4056
4057         /* enable all receives */
4058         rxctrl |= IXGBE_RXCTRL_RXEN;
4059         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4060 }
4061
4062 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4063                                  __be16 proto, u16 vid)
4064 {
4065         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4066         struct ixgbe_hw *hw = &adapter->hw;
4067
4068         /* add VID to filter table */
4069         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4070                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4071
4072         set_bit(vid, adapter->active_vlans);
4073
4074         return 0;
4075 }
4076
4077 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4078 {
4079         u32 vlvf;
4080         int idx;
4081
4082         /* short cut the special case */
4083         if (vlan == 0)
4084                 return 0;
4085
4086         /* Search for the vlan id in the VLVF entries */
4087         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4088                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4089                 if ((vlvf & VLAN_VID_MASK) == vlan)
4090                         break;
4091         }
4092
4093         return idx;
4094 }
4095
4096 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4097 {
4098         struct ixgbe_hw *hw = &adapter->hw;
4099         u32 bits, word;
4100         int idx;
4101
4102         idx = ixgbe_find_vlvf_entry(hw, vid);
4103         if (!idx)
4104                 return;
4105
4106         /* See if any other pools are set for this VLAN filter
4107          * entry other than the PF.
4108          */
4109         word = idx * 2 + (VMDQ_P(0) / 32);
4110         bits = ~BIT(VMDQ_P(0) % 32);
4111         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4112
4113         /* Disable the filter so this falls into the default pool. */
4114         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4115                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4116                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4117                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4118         }
4119 }
4120
4121 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4122                                   __be16 proto, u16 vid)
4123 {
4124         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4125         struct ixgbe_hw *hw = &adapter->hw;
4126
4127         /* remove VID from filter table */
4128         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4129                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4130
4131         clear_bit(vid, adapter->active_vlans);
4132
4133         return 0;
4134 }
4135
4136 /**
4137  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4138  * @adapter: driver data
4139  */
4140 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4141 {
4142         struct ixgbe_hw *hw = &adapter->hw;
4143         u32 vlnctrl;
4144         int i, j;
4145
4146         switch (hw->mac.type) {
4147         case ixgbe_mac_82598EB:
4148                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4149                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4150                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4151                 break;
4152         case ixgbe_mac_82599EB:
4153         case ixgbe_mac_X540:
4154         case ixgbe_mac_X550:
4155         case ixgbe_mac_X550EM_x:
4156         case ixgbe_mac_x550em_a:
4157                 for (i = 0; i < adapter->num_rx_queues; i++) {
4158                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4159
4160                         if (ring->l2_accel_priv)
4161                                 continue;
4162                         j = ring->reg_idx;
4163                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4164                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4165                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4166                 }
4167                 break;
4168         default:
4169                 break;
4170         }
4171 }
4172
4173 /**
4174  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4175  * @adapter: driver data
4176  */
4177 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4178 {
4179         struct ixgbe_hw *hw = &adapter->hw;
4180         u32 vlnctrl;
4181         int i, j;
4182
4183         switch (hw->mac.type) {
4184         case ixgbe_mac_82598EB:
4185                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4186                 vlnctrl |= IXGBE_VLNCTRL_VME;
4187                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4188                 break;
4189         case ixgbe_mac_82599EB:
4190         case ixgbe_mac_X540:
4191         case ixgbe_mac_X550:
4192         case ixgbe_mac_X550EM_x:
4193         case ixgbe_mac_x550em_a:
4194                 for (i = 0; i < adapter->num_rx_queues; i++) {
4195                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4196
4197                         if (ring->l2_accel_priv)
4198                                 continue;
4199                         j = ring->reg_idx;
4200                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4201                         vlnctrl |= IXGBE_RXDCTL_VME;
4202                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4203                 }
4204                 break;
4205         default:
4206                 break;
4207         }
4208 }
4209
4210 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4211 {
4212         struct ixgbe_hw *hw = &adapter->hw;
4213         u32 vlnctrl, i;
4214
4215         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4216
4217         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4218         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4219                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4220                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4221         } else {
4222                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4223                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4224                 return;
4225         }
4226
4227         /* Nothing to do for 82598 */
4228         if (hw->mac.type == ixgbe_mac_82598EB)
4229                 return;
4230
4231         /* We are already in VLAN promisc, nothing to do */
4232         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4233                 return;
4234
4235         /* Set flag so we don't redo unnecessary work */
4236         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4237
4238         /* Add PF to all active pools */
4239         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4240                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4241                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4242
4243                 vlvfb |= BIT(VMDQ_P(0) % 32);
4244                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4245         }
4246
4247         /* Set all bits in the VLAN filter table array */
4248         for (i = hw->mac.vft_size; i--;)
4249                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4250 }
4251
4252 #define VFTA_BLOCK_SIZE 8
4253 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4254 {
4255         struct ixgbe_hw *hw = &adapter->hw;
4256         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4257         u32 vid_start = vfta_offset * 32;
4258         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4259         u32 i, vid, word, bits;
4260
4261         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4262                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4263
4264                 /* pull VLAN ID from VLVF */
4265                 vid = vlvf & VLAN_VID_MASK;
4266
4267                 /* only concern outselves with a certain range */
4268                 if (vid < vid_start || vid >= vid_end)
4269                         continue;
4270
4271                 if (vlvf) {
4272                         /* record VLAN ID in VFTA */
4273                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4274
4275                         /* if PF is part of this then continue */
4276                         if (test_bit(vid, adapter->active_vlans))
4277                                 continue;
4278                 }
4279
4280                 /* remove PF from the pool */
4281                 word = i * 2 + VMDQ_P(0) / 32;
4282                 bits = ~BIT(VMDQ_P(0) % 32);
4283                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4284                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4285         }
4286
4287         /* extract values from active_vlans and write back to VFTA */
4288         for (i = VFTA_BLOCK_SIZE; i--;) {
4289                 vid = (vfta_offset + i) * 32;
4290                 word = vid / BITS_PER_LONG;
4291                 bits = vid % BITS_PER_LONG;
4292
4293                 vfta[i] |= adapter->active_vlans[word] >> bits;
4294
4295                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4296         }
4297 }
4298
4299 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4300 {
4301         struct ixgbe_hw *hw = &adapter->hw;
4302         u32 vlnctrl, i;
4303
4304         /* Set VLAN filtering to enabled */
4305         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4306         vlnctrl |= IXGBE_VLNCTRL_VFE;
4307         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4308
4309         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4310             hw->mac.type == ixgbe_mac_82598EB)
4311                 return;
4312
4313         /* We are not in VLAN promisc, nothing to do */
4314         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4315                 return;
4316
4317         /* Set flag so we don't redo unnecessary work */
4318         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4319
4320         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4321                 ixgbe_scrub_vfta(adapter, i);
4322 }
4323
4324 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4325 {
4326         u16 vid = 1;
4327
4328         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4329
4330         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4331                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4332 }
4333
4334 /**
4335  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4336  * @netdev: network interface device structure
4337  *
4338  * Writes multicast address list to the MTA hash table.
4339  * Returns: -ENOMEM on failure
4340  *                0 on no addresses written
4341  *                X on writing X addresses to MTA
4342  **/
4343 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4344 {
4345         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4346         struct ixgbe_hw *hw = &adapter->hw;
4347
4348         if (!netif_running(netdev))
4349                 return 0;
4350
4351         if (hw->mac.ops.update_mc_addr_list)
4352                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4353         else
4354                 return -ENOMEM;
4355
4356 #ifdef CONFIG_PCI_IOV
4357         ixgbe_restore_vf_multicasts(adapter);
4358 #endif
4359
4360         return netdev_mc_count(netdev);
4361 }
4362
4363 #ifdef CONFIG_PCI_IOV
4364 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4365 {
4366         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4367         struct ixgbe_hw *hw = &adapter->hw;
4368         int i;
4369
4370         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4371                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4372
4373                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4374                         hw->mac.ops.set_rar(hw, i,
4375                                             mac_table->addr,
4376                                             mac_table->pool,
4377                                             IXGBE_RAH_AV);
4378                 else
4379                         hw->mac.ops.clear_rar(hw, i);
4380         }
4381 }
4382
4383 #endif
4384 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4385 {
4386         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4387         struct ixgbe_hw *hw = &adapter->hw;
4388         int i;
4389
4390         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4391                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4392                         continue;
4393
4394                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4395
4396                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4397                         hw->mac.ops.set_rar(hw, i,
4398                                             mac_table->addr,
4399                                             mac_table->pool,
4400                                             IXGBE_RAH_AV);
4401                 else
4402                         hw->mac.ops.clear_rar(hw, i);
4403         }
4404 }
4405
4406 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4407 {
4408         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4409         struct ixgbe_hw *hw = &adapter->hw;
4410         int i;
4411
4412         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4413                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4414                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4415         }
4416
4417         ixgbe_sync_mac_table(adapter);
4418 }
4419
4420 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4421 {
4422         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4423         struct ixgbe_hw *hw = &adapter->hw;
4424         int i, count = 0;
4425
4426         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4427                 /* do not count default RAR as available */
4428                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4429                         continue;
4430
4431                 /* only count unused and addresses that belong to us */
4432                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4433                         if (mac_table->pool != pool)
4434                                 continue;
4435                 }
4436
4437                 count++;
4438         }
4439
4440         return count;
4441 }
4442
4443 /* this function destroys the first RAR entry */
4444 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4445 {
4446         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4447         struct ixgbe_hw *hw = &adapter->hw;
4448
4449         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4450         mac_table->pool = VMDQ_P(0);
4451
4452         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4453
4454         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4455                             IXGBE_RAH_AV);
4456 }
4457
4458 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4459                          const u8 *addr, u16 pool)
4460 {
4461         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4462         struct ixgbe_hw *hw = &adapter->hw;
4463         int i;
4464
4465         if (is_zero_ether_addr(addr))
4466                 return -EINVAL;
4467
4468         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4469                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4470                         continue;
4471
4472                 ether_addr_copy(mac_table->addr, addr);
4473                 mac_table->pool = pool;
4474
4475                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4476                                     IXGBE_MAC_STATE_IN_USE;
4477
4478                 ixgbe_sync_mac_table(adapter);
4479
4480                 return i;
4481         }
4482
4483         return -ENOMEM;
4484 }
4485
4486 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4487                          const u8 *addr, u16 pool)
4488 {
4489         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4490         struct ixgbe_hw *hw = &adapter->hw;
4491         int i;
4492
4493         if (is_zero_ether_addr(addr))
4494                 return -EINVAL;
4495
4496         /* search table for addr, if found clear IN_USE flag and sync */
4497         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4498                 /* we can only delete an entry if it is in use */
4499                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4500                         continue;
4501                 /* we only care about entries that belong to the given pool */
4502                 if (mac_table->pool != pool)
4503                         continue;
4504                 /* we only care about a specific MAC address */
4505                 if (!ether_addr_equal(addr, mac_table->addr))
4506                         continue;
4507
4508                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4509                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4510
4511                 ixgbe_sync_mac_table(adapter);
4512
4513                 return 0;
4514         }
4515
4516         return -ENOMEM;
4517 }
4518 /**
4519  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4520  * @netdev: network interface device structure
4521  *
4522  * Writes unicast address list to the RAR table.
4523  * Returns: -ENOMEM on failure/insufficient address space
4524  *                0 on no addresses written
4525  *                X on writing X addresses to the RAR table
4526  **/
4527 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4528 {
4529         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4530         int count = 0;
4531
4532         /* return ENOMEM indicating insufficient memory for addresses */
4533         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4534                 return -ENOMEM;
4535
4536         if (!netdev_uc_empty(netdev)) {
4537                 struct netdev_hw_addr *ha;
4538                 netdev_for_each_uc_addr(ha, netdev) {
4539                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4540                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4541                         count++;
4542                 }
4543         }
4544         return count;
4545 }
4546
4547 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4548 {
4549         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4550         int ret;
4551
4552         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4553
4554         return min_t(int, ret, 0);
4555 }
4556
4557 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4558 {
4559         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4560
4561         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4562
4563         return 0;
4564 }
4565
4566 /**
4567  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4568  * @netdev: network interface device structure
4569  *
4570  * The set_rx_method entry point is called whenever the unicast/multicast
4571  * address list or the network interface flags are updated.  This routine is
4572  * responsible for configuring the hardware for proper unicast, multicast and
4573  * promiscuous mode.
4574  **/
4575 void ixgbe_set_rx_mode(struct net_device *netdev)
4576 {
4577         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4578         struct ixgbe_hw *hw = &adapter->hw;
4579         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4580         netdev_features_t features = netdev->features;
4581         int count;
4582
4583         /* Check for Promiscuous and All Multicast modes */
4584         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4585
4586         /* set all bits that we expect to always be set */
4587         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4588         fctrl |= IXGBE_FCTRL_BAM;
4589         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4590         fctrl |= IXGBE_FCTRL_PMCF;
4591
4592         /* clear the bits we are changing the status of */
4593         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4594         if (netdev->flags & IFF_PROMISC) {
4595                 hw->addr_ctrl.user_set_promisc = true;
4596                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4597                 vmolr |= IXGBE_VMOLR_MPE;
4598                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4599         } else {
4600                 if (netdev->flags & IFF_ALLMULTI) {
4601                         fctrl |= IXGBE_FCTRL_MPE;
4602                         vmolr |= IXGBE_VMOLR_MPE;
4603                 }
4604                 hw->addr_ctrl.user_set_promisc = false;
4605         }
4606
4607         /*
4608          * Write addresses to available RAR registers, if there is not
4609          * sufficient space to store all the addresses then enable
4610          * unicast promiscuous mode
4611          */
4612         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4613                 fctrl |= IXGBE_FCTRL_UPE;
4614                 vmolr |= IXGBE_VMOLR_ROPE;
4615         }
4616
4617         /* Write addresses to the MTA, if the attempt fails
4618          * then we should just turn on promiscuous mode so
4619          * that we can at least receive multicast traffic
4620          */
4621         count = ixgbe_write_mc_addr_list(netdev);
4622         if (count < 0) {
4623                 fctrl |= IXGBE_FCTRL_MPE;
4624                 vmolr |= IXGBE_VMOLR_MPE;
4625         } else if (count) {
4626                 vmolr |= IXGBE_VMOLR_ROMPE;
4627         }
4628
4629         if (hw->mac.type != ixgbe_mac_82598EB) {
4630                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4631                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4632                            IXGBE_VMOLR_ROPE);
4633                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4634         }
4635
4636         /* This is useful for sniffing bad packets. */
4637         if (features & NETIF_F_RXALL) {
4638                 /* UPE and MPE will be handled by normal PROMISC logic
4639                  * in e1000e_set_rx_mode */
4640                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4641                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4642                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4643
4644                 fctrl &= ~(IXGBE_FCTRL_DPF);
4645                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4646         }
4647
4648         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4649
4650         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4651                 ixgbe_vlan_strip_enable(adapter);
4652         else
4653                 ixgbe_vlan_strip_disable(adapter);
4654
4655         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4656                 ixgbe_vlan_promisc_disable(adapter);
4657         else
4658                 ixgbe_vlan_promisc_enable(adapter);
4659 }
4660
4661 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4662 {
4663         int q_idx;
4664
4665         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4666                 napi_enable(&adapter->q_vector[q_idx]->napi);
4667 }
4668
4669 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4670 {
4671         int q_idx;
4672
4673         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4674                 napi_disable(&adapter->q_vector[q_idx]->napi);
4675 }
4676
4677 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4678 {
4679         struct ixgbe_hw *hw = &adapter->hw;
4680         u32 vxlanctrl;
4681
4682         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4683                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4684                 return;
4685
4686         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4687         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4688
4689         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4690                 adapter->vxlan_port = 0;
4691
4692         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4693                 adapter->geneve_port = 0;
4694 }
4695
4696 #ifdef CONFIG_IXGBE_DCB
4697 /**
4698  * ixgbe_configure_dcb - Configure DCB hardware
4699  * @adapter: ixgbe adapter struct
4700  *
4701  * This is called by the driver on open to configure the DCB hardware.
4702  * This is also called by the gennetlink interface when reconfiguring
4703  * the DCB state.
4704  */
4705 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4706 {
4707         struct ixgbe_hw *hw = &adapter->hw;
4708         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4709
4710         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4711                 if (hw->mac.type == ixgbe_mac_82598EB)
4712                         netif_set_gso_max_size(adapter->netdev, 65536);
4713                 return;
4714         }
4715
4716         if (hw->mac.type == ixgbe_mac_82598EB)
4717                 netif_set_gso_max_size(adapter->netdev, 32768);
4718
4719 #ifdef IXGBE_FCOE
4720         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4721                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4722 #endif
4723
4724         /* reconfigure the hardware */
4725         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4726                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4727                                                 DCB_TX_CONFIG);
4728                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4729                                                 DCB_RX_CONFIG);
4730                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4731         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4732                 ixgbe_dcb_hw_ets(&adapter->hw,
4733                                  adapter->ixgbe_ieee_ets,
4734                                  max_frame);
4735                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4736                                         adapter->ixgbe_ieee_pfc->pfc_en,
4737                                         adapter->ixgbe_ieee_ets->prio_tc);
4738         }
4739
4740         /* Enable RSS Hash per TC */
4741         if (hw->mac.type != ixgbe_mac_82598EB) {
4742                 u32 msb = 0;
4743                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4744
4745                 while (rss_i) {
4746                         msb++;
4747                         rss_i >>= 1;
4748                 }
4749
4750                 /* write msb to all 8 TCs in one write */
4751                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4752         }
4753 }
4754 #endif
4755
4756 /* Additional bittime to account for IXGBE framing */
4757 #define IXGBE_ETH_FRAMING 20
4758
4759 /**
4760  * ixgbe_hpbthresh - calculate high water mark for flow control
4761  *
4762  * @adapter: board private structure to calculate for
4763  * @pb: packet buffer to calculate
4764  */
4765 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4766 {
4767         struct ixgbe_hw *hw = &adapter->hw;
4768         struct net_device *dev = adapter->netdev;
4769         int link, tc, kb, marker;
4770         u32 dv_id, rx_pba;
4771
4772         /* Calculate max LAN frame size */
4773         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4774
4775 #ifdef IXGBE_FCOE
4776         /* FCoE traffic class uses FCOE jumbo frames */
4777         if ((dev->features & NETIF_F_FCOE_MTU) &&
4778             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4779             (pb == ixgbe_fcoe_get_tc(adapter)))
4780                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4781 #endif
4782
4783         /* Calculate delay value for device */
4784         switch (hw->mac.type) {
4785         case ixgbe_mac_X540:
4786         case ixgbe_mac_X550:
4787         case ixgbe_mac_X550EM_x:
4788         case ixgbe_mac_x550em_a:
4789                 dv_id = IXGBE_DV_X540(link, tc);
4790                 break;
4791         default:
4792                 dv_id = IXGBE_DV(link, tc);
4793                 break;
4794         }
4795
4796         /* Loopback switch introduces additional latency */
4797         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4798                 dv_id += IXGBE_B2BT(tc);
4799
4800         /* Delay value is calculated in bit times convert to KB */
4801         kb = IXGBE_BT2KB(dv_id);
4802         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4803
4804         marker = rx_pba - kb;
4805
4806         /* It is possible that the packet buffer is not large enough
4807          * to provide required headroom. In this case throw an error
4808          * to user and a do the best we can.
4809          */
4810         if (marker < 0) {
4811                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4812                             "headroom to support flow control."
4813                             "Decrease MTU or number of traffic classes\n", pb);
4814                 marker = tc + 1;
4815         }
4816
4817         return marker;
4818 }
4819
4820 /**
4821  * ixgbe_lpbthresh - calculate low water mark for for flow control
4822  *
4823  * @adapter: board private structure to calculate for
4824  * @pb: packet buffer to calculate
4825  */
4826 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4827 {
4828         struct ixgbe_hw *hw = &adapter->hw;
4829         struct net_device *dev = adapter->netdev;
4830         int tc;
4831         u32 dv_id;
4832
4833         /* Calculate max LAN frame size */
4834         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4835
4836 #ifdef IXGBE_FCOE
4837         /* FCoE traffic class uses FCOE jumbo frames */
4838         if ((dev->features & NETIF_F_FCOE_MTU) &&
4839             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4840             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4841                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4842 #endif
4843
4844         /* Calculate delay value for device */
4845         switch (hw->mac.type) {
4846         case ixgbe_mac_X540:
4847         case ixgbe_mac_X550:
4848         case ixgbe_mac_X550EM_x:
4849         case ixgbe_mac_x550em_a:
4850                 dv_id = IXGBE_LOW_DV_X540(tc);
4851                 break;
4852         default:
4853                 dv_id = IXGBE_LOW_DV(tc);
4854                 break;
4855         }
4856
4857         /* Delay value is calculated in bit times convert to KB */
4858         return IXGBE_BT2KB(dv_id);
4859 }
4860
4861 /*
4862  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4863  */
4864 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4865 {
4866         struct ixgbe_hw *hw = &adapter->hw;
4867         int num_tc = netdev_get_num_tc(adapter->netdev);
4868         int i;
4869
4870         if (!num_tc)
4871                 num_tc = 1;
4872
4873         for (i = 0; i < num_tc; i++) {
4874                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4875                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4876
4877                 /* Low water marks must not be larger than high water marks */
4878                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4879                         hw->fc.low_water[i] = 0;
4880         }
4881
4882         for (; i < MAX_TRAFFIC_CLASS; i++)
4883                 hw->fc.high_water[i] = 0;
4884 }
4885
4886 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4887 {
4888         struct ixgbe_hw *hw = &adapter->hw;
4889         int hdrm;
4890         u8 tc = netdev_get_num_tc(adapter->netdev);
4891
4892         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4893             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4894                 hdrm = 32 << adapter->fdir_pballoc;
4895         else
4896                 hdrm = 0;
4897
4898         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4899         ixgbe_pbthresh_setup(adapter);
4900 }
4901
4902 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4903 {
4904         struct ixgbe_hw *hw = &adapter->hw;
4905         struct hlist_node *node2;
4906         struct ixgbe_fdir_filter *filter;
4907
4908         spin_lock(&adapter->fdir_perfect_lock);
4909
4910         if (!hlist_empty(&adapter->fdir_filter_list))
4911                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4912
4913         hlist_for_each_entry_safe(filter, node2,
4914                                   &adapter->fdir_filter_list, fdir_node) {
4915                 ixgbe_fdir_write_perfect_filter_82599(hw,
4916                                 &filter->filter,
4917                                 filter->sw_idx,
4918                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4919                                 IXGBE_FDIR_DROP_QUEUE :
4920                                 adapter->rx_ring[filter->action]->reg_idx);
4921         }
4922
4923         spin_unlock(&adapter->fdir_perfect_lock);
4924 }
4925
4926 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4927                                       struct ixgbe_adapter *adapter)
4928 {
4929         struct ixgbe_hw *hw = &adapter->hw;
4930         u32 vmolr;
4931
4932         /* No unicast promiscuous support for VMDQ devices. */
4933         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4934         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4935
4936         /* clear the affected bit */
4937         vmolr &= ~IXGBE_VMOLR_MPE;
4938
4939         if (dev->flags & IFF_ALLMULTI) {
4940                 vmolr |= IXGBE_VMOLR_MPE;
4941         } else {
4942                 vmolr |= IXGBE_VMOLR_ROMPE;
4943                 hw->mac.ops.update_mc_addr_list(hw, dev);
4944         }
4945         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4946         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4947 }
4948
4949 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4950 {
4951         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4952         int rss_i = adapter->num_rx_queues_per_pool;
4953         struct ixgbe_hw *hw = &adapter->hw;
4954         u16 pool = vadapter->pool;
4955         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4956                       IXGBE_PSRTYPE_UDPHDR |
4957                       IXGBE_PSRTYPE_IPV4HDR |
4958                       IXGBE_PSRTYPE_L2HDR |
4959                       IXGBE_PSRTYPE_IPV6HDR;
4960
4961         if (hw->mac.type == ixgbe_mac_82598EB)
4962                 return;
4963
4964         if (rss_i > 3)
4965                 psrtype |= 2u << 29;
4966         else if (rss_i > 1)
4967                 psrtype |= 1u << 29;
4968
4969         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4970 }
4971
4972 /**
4973  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4974  * @rx_ring: ring to free buffers from
4975  **/
4976 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4977 {
4978         u16 i = rx_ring->next_to_clean;
4979         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4980
4981         /* Free all the Rx ring sk_buffs */
4982         while (i != rx_ring->next_to_alloc) {
4983                 if (rx_buffer->skb) {
4984                         struct sk_buff *skb = rx_buffer->skb;
4985                         if (IXGBE_CB(skb)->page_released)
4986                                 dma_unmap_page_attrs(rx_ring->dev,
4987                                                      IXGBE_CB(skb)->dma,
4988                                                      ixgbe_rx_pg_size(rx_ring),
4989                                                      DMA_FROM_DEVICE,
4990                                                      IXGBE_RX_DMA_ATTR);
4991                         dev_kfree_skb(skb);
4992                 }
4993
4994                 /* Invalidate cache lines that may have been written to by
4995                  * device so that we avoid corrupting memory.
4996                  */
4997                 dma_sync_single_range_for_cpu(rx_ring->dev,
4998                                               rx_buffer->dma,
4999                                               rx_buffer->page_offset,
5000                                               ixgbe_rx_bufsz(rx_ring),
5001                                               DMA_FROM_DEVICE);
5002
5003                 /* free resources associated with mapping */
5004                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5005                                      ixgbe_rx_pg_size(rx_ring),
5006                                      DMA_FROM_DEVICE,
5007                                      IXGBE_RX_DMA_ATTR);
5008                 __page_frag_cache_drain(rx_buffer->page,
5009                                         rx_buffer->pagecnt_bias);
5010
5011                 i++;
5012                 rx_buffer++;
5013                 if (i == rx_ring->count) {
5014                         i = 0;
5015                         rx_buffer = rx_ring->rx_buffer_info;
5016                 }
5017         }
5018
5019         rx_ring->next_to_alloc = 0;
5020         rx_ring->next_to_clean = 0;
5021         rx_ring->next_to_use = 0;
5022 }
5023
5024 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5025                                    struct ixgbe_ring *rx_ring)
5026 {
5027         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5028         int index = rx_ring->queue_index + vadapter->rx_base_queue;
5029
5030         /* shutdown specific queue receive and wait for dma to settle */
5031         ixgbe_disable_rx_queue(adapter, rx_ring);
5032         usleep_range(10000, 20000);
5033         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5034         ixgbe_clean_rx_ring(rx_ring);
5035         rx_ring->l2_accel_priv = NULL;
5036 }
5037
5038 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5039                                struct ixgbe_fwd_adapter *accel)
5040 {
5041         struct ixgbe_adapter *adapter = accel->real_adapter;
5042         unsigned int rxbase = accel->rx_base_queue;
5043         unsigned int txbase = accel->tx_base_queue;
5044         int i;
5045
5046         netif_tx_stop_all_queues(vdev);
5047
5048         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5049                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5050                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5051         }
5052
5053         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5054                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
5055                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5056         }
5057
5058
5059         return 0;
5060 }
5061
5062 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5063                              struct ixgbe_fwd_adapter *accel)
5064 {
5065         struct ixgbe_adapter *adapter = accel->real_adapter;
5066         unsigned int rxbase, txbase, queues;
5067         int i, baseq, err = 0;
5068
5069         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
5070                 return 0;
5071
5072         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5073         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
5074                    accel->pool, adapter->num_rx_pools,
5075                    baseq, baseq + adapter->num_rx_queues_per_pool,
5076                    adapter->fwd_bitmask);
5077
5078         accel->netdev = vdev;
5079         accel->rx_base_queue = rxbase = baseq;
5080         accel->tx_base_queue = txbase = baseq;
5081
5082         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5083                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5084
5085         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5086                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5087                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5088                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5089         }
5090
5091         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5092                 adapter->tx_ring[txbase + i]->netdev = vdev;
5093                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5094         }
5095
5096         queues = min_t(unsigned int,
5097                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5098         err = netif_set_real_num_tx_queues(vdev, queues);
5099         if (err)
5100                 goto fwd_queue_err;
5101
5102         err = netif_set_real_num_rx_queues(vdev, queues);
5103         if (err)
5104                 goto fwd_queue_err;
5105
5106         if (is_valid_ether_addr(vdev->dev_addr))
5107                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5108
5109         ixgbe_fwd_psrtype(accel);
5110         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5111         return err;
5112 fwd_queue_err:
5113         ixgbe_fwd_ring_down(vdev, accel);
5114         return err;
5115 }
5116
5117 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5118 {
5119         if (netif_is_macvlan(upper)) {
5120                 struct macvlan_dev *dfwd = netdev_priv(upper);
5121                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5122
5123                 if (dfwd->fwd_priv)
5124                         ixgbe_fwd_ring_up(upper, vadapter);
5125         }
5126
5127         return 0;
5128 }
5129
5130 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5131 {
5132         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5133                                       ixgbe_upper_dev_walk, NULL);
5134 }
5135
5136 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5137 {
5138         struct ixgbe_hw *hw = &adapter->hw;
5139
5140         ixgbe_configure_pb(adapter);
5141 #ifdef CONFIG_IXGBE_DCB
5142         ixgbe_configure_dcb(adapter);
5143 #endif
5144         /*
5145          * We must restore virtualization before VLANs or else
5146          * the VLVF registers will not be populated
5147          */
5148         ixgbe_configure_virtualization(adapter);
5149
5150         ixgbe_set_rx_mode(adapter->netdev);
5151         ixgbe_restore_vlan(adapter);
5152
5153         switch (hw->mac.type) {
5154         case ixgbe_mac_82599EB:
5155         case ixgbe_mac_X540:
5156                 hw->mac.ops.disable_rx_buff(hw);
5157                 break;
5158         default:
5159                 break;
5160         }
5161
5162         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5163                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5164                                                 adapter->fdir_pballoc);
5165         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5166                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5167                                               adapter->fdir_pballoc);
5168                 ixgbe_fdir_filter_restore(adapter);
5169         }
5170
5171         switch (hw->mac.type) {
5172         case ixgbe_mac_82599EB:
5173         case ixgbe_mac_X540:
5174                 hw->mac.ops.enable_rx_buff(hw);
5175                 break;
5176         default:
5177                 break;
5178         }
5179
5180 #ifdef CONFIG_IXGBE_DCA
5181         /* configure DCA */
5182         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5183                 ixgbe_setup_dca(adapter);
5184 #endif /* CONFIG_IXGBE_DCA */
5185
5186 #ifdef IXGBE_FCOE
5187         /* configure FCoE L2 filters, redirection table, and Rx control */
5188         ixgbe_configure_fcoe(adapter);
5189
5190 #endif /* IXGBE_FCOE */
5191         ixgbe_configure_tx(adapter);
5192         ixgbe_configure_rx(adapter);
5193         ixgbe_configure_dfwd(adapter);
5194 }
5195
5196 /**
5197  * ixgbe_sfp_link_config - set up SFP+ link
5198  * @adapter: pointer to private adapter struct
5199  **/
5200 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5201 {
5202         /*
5203          * We are assuming the worst case scenario here, and that
5204          * is that an SFP was inserted/removed after the reset
5205          * but before SFP detection was enabled.  As such the best
5206          * solution is to just start searching as soon as we start
5207          */
5208         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5209                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5210
5211         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5212         adapter->sfp_poll_time = 0;
5213 }
5214
5215 /**
5216  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5217  * @hw: pointer to private hardware struct
5218  *
5219  * Returns 0 on success, negative on failure
5220  **/
5221 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5222 {
5223         u32 speed;
5224         bool autoneg, link_up = false;
5225         int ret = IXGBE_ERR_LINK_SETUP;
5226
5227         if (hw->mac.ops.check_link)
5228                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5229
5230         if (ret)
5231                 return ret;
5232
5233         speed = hw->phy.autoneg_advertised;
5234         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5235                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5236                                                         &autoneg);
5237         if (ret)
5238                 return ret;
5239
5240         if (hw->mac.ops.setup_link)
5241                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5242
5243         return ret;
5244 }
5245
5246 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5247 {
5248         struct ixgbe_hw *hw = &adapter->hw;
5249         u32 gpie = 0;
5250
5251         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5252                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5253                        IXGBE_GPIE_OCD;
5254                 gpie |= IXGBE_GPIE_EIAME;
5255                 /*
5256                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5257                  * this saves a register write for every interrupt
5258                  */
5259                 switch (hw->mac.type) {
5260                 case ixgbe_mac_82598EB:
5261                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5262                         break;
5263                 case ixgbe_mac_82599EB:
5264                 case ixgbe_mac_X540:
5265                 case ixgbe_mac_X550:
5266                 case ixgbe_mac_X550EM_x:
5267                 case ixgbe_mac_x550em_a:
5268                 default:
5269                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5270                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5271                         break;
5272                 }
5273         } else {
5274                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5275                  * specifically only auto mask tx and rx interrupts */
5276                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5277         }
5278
5279         /* XXX: to interrupt immediately for EICS writes, enable this */
5280         /* gpie |= IXGBE_GPIE_EIMEN; */
5281
5282         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5283                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5284
5285                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5286                 case IXGBE_82599_VMDQ_8Q_MASK:
5287                         gpie |= IXGBE_GPIE_VTMODE_16;
5288                         break;
5289                 case IXGBE_82599_VMDQ_4Q_MASK:
5290                         gpie |= IXGBE_GPIE_VTMODE_32;
5291                         break;
5292                 default:
5293                         gpie |= IXGBE_GPIE_VTMODE_64;
5294                         break;
5295                 }
5296         }
5297
5298         /* Enable Thermal over heat sensor interrupt */
5299         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5300                 switch (adapter->hw.mac.type) {
5301                 case ixgbe_mac_82599EB:
5302                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5303                         break;
5304                 default:
5305                         break;
5306                 }
5307         }
5308
5309         /* Enable fan failure interrupt */
5310         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5311                 gpie |= IXGBE_SDP1_GPIEN(hw);
5312
5313         switch (hw->mac.type) {
5314         case ixgbe_mac_82599EB:
5315                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5316                 break;
5317         case ixgbe_mac_X550EM_x:
5318         case ixgbe_mac_x550em_a:
5319                 gpie |= IXGBE_SDP0_GPIEN_X540;
5320                 break;
5321         default:
5322                 break;
5323         }
5324
5325         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5326 }
5327
5328 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5329 {
5330         struct ixgbe_hw *hw = &adapter->hw;
5331         int err;
5332         u32 ctrl_ext;
5333
5334         ixgbe_get_hw_control(adapter);
5335         ixgbe_setup_gpie(adapter);
5336
5337         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5338                 ixgbe_configure_msix(adapter);
5339         else
5340                 ixgbe_configure_msi_and_legacy(adapter);
5341
5342         /* enable the optics for 82599 SFP+ fiber */
5343         if (hw->mac.ops.enable_tx_laser)
5344                 hw->mac.ops.enable_tx_laser(hw);
5345
5346         if (hw->phy.ops.set_phy_power)
5347                 hw->phy.ops.set_phy_power(hw, true);
5348
5349         smp_mb__before_atomic();
5350         clear_bit(__IXGBE_DOWN, &adapter->state);
5351         ixgbe_napi_enable_all(adapter);
5352
5353         if (ixgbe_is_sfp(hw)) {
5354                 ixgbe_sfp_link_config(adapter);
5355         } else {
5356                 err = ixgbe_non_sfp_link_config(hw);
5357                 if (err)
5358                         e_err(probe, "link_config FAILED %d\n", err);
5359         }
5360
5361         /* clear any pending interrupts, may auto mask */
5362         IXGBE_READ_REG(hw, IXGBE_EICR);
5363         ixgbe_irq_enable(adapter, true, true);
5364
5365         /*
5366          * If this adapter has a fan, check to see if we had a failure
5367          * before we enabled the interrupt.
5368          */
5369         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5370                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5371                 if (esdp & IXGBE_ESDP_SDP1)
5372                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5373         }
5374
5375         /* bring the link up in the watchdog, this could race with our first
5376          * link up interrupt but shouldn't be a problem */
5377         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5378         adapter->link_check_timeout = jiffies;
5379         mod_timer(&adapter->service_timer, jiffies);
5380
5381         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5382         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5383         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5384         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5385 }
5386
5387 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5388 {
5389         WARN_ON(in_interrupt());
5390         /* put off any impending NetWatchDogTimeout */
5391         netif_trans_update(adapter->netdev);
5392
5393         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5394                 usleep_range(1000, 2000);
5395         if (adapter->hw.phy.type == ixgbe_phy_fw)
5396                 ixgbe_watchdog_link_is_down(adapter);
5397         ixgbe_down(adapter);
5398         /*
5399          * If SR-IOV enabled then wait a bit before bringing the adapter
5400          * back up to give the VFs time to respond to the reset.  The
5401          * two second wait is based upon the watchdog timer cycle in
5402          * the VF driver.
5403          */
5404         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5405                 msleep(2000);
5406         ixgbe_up(adapter);
5407         clear_bit(__IXGBE_RESETTING, &adapter->state);
5408 }
5409
5410 void ixgbe_up(struct ixgbe_adapter *adapter)
5411 {
5412         /* hardware has been reset, we need to reload some things */
5413         ixgbe_configure(adapter);
5414
5415         ixgbe_up_complete(adapter);
5416 }
5417
5418 void ixgbe_reset(struct ixgbe_adapter *adapter)
5419 {
5420         struct ixgbe_hw *hw = &adapter->hw;
5421         struct net_device *netdev = adapter->netdev;
5422         int err;
5423
5424         if (ixgbe_removed(hw->hw_addr))
5425                 return;
5426         /* lock SFP init bit to prevent race conditions with the watchdog */
5427         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5428                 usleep_range(1000, 2000);
5429
5430         /* clear all SFP and link config related flags while holding SFP_INIT */
5431         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5432                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5433         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5434
5435         err = hw->mac.ops.init_hw(hw);
5436         switch (err) {
5437         case 0:
5438         case IXGBE_ERR_SFP_NOT_PRESENT:
5439         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5440                 break;
5441         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5442                 e_dev_err("master disable timed out\n");
5443                 break;
5444         case IXGBE_ERR_EEPROM_VERSION:
5445                 /* We are running on a pre-production device, log a warning */
5446                 e_dev_warn("This device is a pre-production adapter/LOM. "
5447                            "Please be aware there may be issues associated with "
5448                            "your hardware.  If you are experiencing problems "
5449                            "please contact your Intel or hardware "
5450                            "representative who provided you with this "
5451                            "hardware.\n");
5452                 break;
5453         default:
5454                 e_dev_err("Hardware Error: %d\n", err);
5455         }
5456
5457         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5458
5459         /* flush entries out of MAC table */
5460         ixgbe_flush_sw_mac_table(adapter);
5461         __dev_uc_unsync(netdev, NULL);
5462
5463         /* do not flush user set addresses */
5464         ixgbe_mac_set_default_filter(adapter);
5465
5466         /* update SAN MAC vmdq pool selection */
5467         if (hw->mac.san_mac_rar_index)
5468                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5469
5470         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5471                 ixgbe_ptp_reset(adapter);
5472
5473         if (hw->phy.ops.set_phy_power) {
5474                 if (!netif_running(adapter->netdev) && !adapter->wol)
5475                         hw->phy.ops.set_phy_power(hw, false);
5476                 else
5477                         hw->phy.ops.set_phy_power(hw, true);
5478         }
5479 }
5480
5481 /**
5482  * ixgbe_clean_tx_ring - Free Tx Buffers
5483  * @tx_ring: ring to be cleaned
5484  **/
5485 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5486 {
5487         u16 i = tx_ring->next_to_clean;
5488         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5489
5490         while (i != tx_ring->next_to_use) {
5491                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5492
5493                 /* Free all the Tx ring sk_buffs */
5494                 dev_kfree_skb_any(tx_buffer->skb);
5495
5496                 /* unmap skb header data */
5497                 dma_unmap_single(tx_ring->dev,
5498                                  dma_unmap_addr(tx_buffer, dma),
5499                                  dma_unmap_len(tx_buffer, len),
5500                                  DMA_TO_DEVICE);
5501
5502                 /* check for eop_desc to determine the end of the packet */
5503                 eop_desc = tx_buffer->next_to_watch;
5504                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5505
5506                 /* unmap remaining buffers */
5507                 while (tx_desc != eop_desc) {
5508                         tx_buffer++;
5509                         tx_desc++;
5510                         i++;
5511                         if (unlikely(i == tx_ring->count)) {
5512                                 i = 0;
5513                                 tx_buffer = tx_ring->tx_buffer_info;
5514                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5515                         }
5516
5517                         /* unmap any remaining paged data */
5518                         if (dma_unmap_len(tx_buffer, len))
5519                                 dma_unmap_page(tx_ring->dev,
5520                                                dma_unmap_addr(tx_buffer, dma),
5521                                                dma_unmap_len(tx_buffer, len),
5522                                                DMA_TO_DEVICE);
5523                 }
5524
5525                 /* move us one more past the eop_desc for start of next pkt */
5526                 tx_buffer++;
5527                 i++;
5528                 if (unlikely(i == tx_ring->count)) {
5529                         i = 0;
5530                         tx_buffer = tx_ring->tx_buffer_info;
5531                 }
5532         }
5533
5534         /* reset BQL for queue */
5535         netdev_tx_reset_queue(txring_txq(tx_ring));
5536
5537         /* reset next_to_use and next_to_clean */
5538         tx_ring->next_to_use = 0;
5539         tx_ring->next_to_clean = 0;
5540 }
5541
5542 /**
5543  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5544  * @adapter: board private structure
5545  **/
5546 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5547 {
5548         int i;
5549
5550         for (i = 0; i < adapter->num_rx_queues; i++)
5551                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5552 }
5553
5554 /**
5555  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5556  * @adapter: board private structure
5557  **/
5558 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5559 {
5560         int i;
5561
5562         for (i = 0; i < adapter->num_tx_queues; i++)
5563                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5564 }
5565
5566 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5567 {
5568         struct hlist_node *node2;
5569         struct ixgbe_fdir_filter *filter;
5570
5571         spin_lock(&adapter->fdir_perfect_lock);
5572
5573         hlist_for_each_entry_safe(filter, node2,
5574                                   &adapter->fdir_filter_list, fdir_node) {
5575                 hlist_del(&filter->fdir_node);
5576                 kfree(filter);
5577         }
5578         adapter->fdir_filter_count = 0;
5579
5580         spin_unlock(&adapter->fdir_perfect_lock);
5581 }
5582
5583 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5584 {
5585         if (netif_is_macvlan(upper)) {
5586                 struct macvlan_dev *vlan = netdev_priv(upper);
5587
5588                 if (vlan->fwd_priv) {
5589                         netif_tx_stop_all_queues(upper);
5590                         netif_carrier_off(upper);
5591                         netif_tx_disable(upper);
5592                 }
5593         }
5594
5595         return 0;
5596 }
5597
5598 void ixgbe_down(struct ixgbe_adapter *adapter)
5599 {
5600         struct net_device *netdev = adapter->netdev;
5601         struct ixgbe_hw *hw = &adapter->hw;
5602         int i;
5603
5604         /* signal that we are down to the interrupt handler */
5605         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5606                 return; /* do nothing if already down */
5607
5608         /* disable receives */
5609         hw->mac.ops.disable_rx(hw);
5610
5611         /* disable all enabled rx queues */
5612         for (i = 0; i < adapter->num_rx_queues; i++)
5613                 /* this call also flushes the previous write */
5614                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5615
5616         usleep_range(10000, 20000);
5617
5618         netif_tx_stop_all_queues(netdev);
5619
5620         /* call carrier off first to avoid false dev_watchdog timeouts */
5621         netif_carrier_off(netdev);
5622         netif_tx_disable(netdev);
5623
5624         /* disable any upper devices */
5625         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5626                                       ixgbe_disable_macvlan, NULL);
5627
5628         ixgbe_irq_disable(adapter);
5629
5630         ixgbe_napi_disable_all(adapter);
5631
5632         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5633         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5634         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5635
5636         del_timer_sync(&adapter->service_timer);
5637
5638         if (adapter->num_vfs) {
5639                 /* Clear EITR Select mapping */
5640                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5641
5642                 /* Mark all the VFs as inactive */
5643                 for (i = 0 ; i < adapter->num_vfs; i++)
5644                         adapter->vfinfo[i].clear_to_send = false;
5645
5646                 /* ping all the active vfs to let them know we are going down */
5647                 ixgbe_ping_all_vfs(adapter);
5648
5649                 /* Disable all VFTE/VFRE TX/RX */
5650                 ixgbe_disable_tx_rx(adapter);
5651         }
5652
5653         /* disable transmits in the hardware now that interrupts are off */
5654         for (i = 0; i < adapter->num_tx_queues; i++) {
5655                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5656                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5657         }
5658
5659         /* Disable the Tx DMA engine on 82599 and later MAC */
5660         switch (hw->mac.type) {
5661         case ixgbe_mac_82599EB:
5662         case ixgbe_mac_X540:
5663         case ixgbe_mac_X550:
5664         case ixgbe_mac_X550EM_x:
5665         case ixgbe_mac_x550em_a:
5666                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5667                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5668                                  ~IXGBE_DMATXCTL_TE));
5669                 break;
5670         default:
5671                 break;
5672         }
5673
5674         if (!pci_channel_offline(adapter->pdev))
5675                 ixgbe_reset(adapter);
5676
5677         /* power down the optics for 82599 SFP+ fiber */
5678         if (hw->mac.ops.disable_tx_laser)
5679                 hw->mac.ops.disable_tx_laser(hw);
5680
5681         ixgbe_clean_all_tx_rings(adapter);
5682         ixgbe_clean_all_rx_rings(adapter);
5683 }
5684
5685 /**
5686  * ixgbe_eee_capable - helper function to determine EEE support on X550
5687  * @adapter: board private structure
5688  */
5689 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5690 {
5691         struct ixgbe_hw *hw = &adapter->hw;
5692
5693         switch (hw->device_id) {
5694         case IXGBE_DEV_ID_X550EM_A_1G_T:
5695         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5696                 if (!hw->phy.eee_speeds_supported)
5697                         break;
5698                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5699                 if (!hw->phy.eee_speeds_advertised)
5700                         break;
5701                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5702                 break;
5703         default:
5704                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5705                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5706                 break;
5707         }
5708 }
5709
5710 /**
5711  * ixgbe_tx_timeout - Respond to a Tx Hang
5712  * @netdev: network interface device structure
5713  **/
5714 static void ixgbe_tx_timeout(struct net_device *netdev)
5715 {
5716         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5717
5718         /* Do the reset outside of interrupt context */
5719         ixgbe_tx_timeout_reset(adapter);
5720 }
5721
5722 #ifdef CONFIG_IXGBE_DCB
5723 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5724 {
5725         struct ixgbe_hw *hw = &adapter->hw;
5726         struct tc_configuration *tc;
5727         int j;
5728
5729         switch (hw->mac.type) {
5730         case ixgbe_mac_82598EB:
5731         case ixgbe_mac_82599EB:
5732                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5733                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5734                 break;
5735         case ixgbe_mac_X540:
5736         case ixgbe_mac_X550:
5737                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5738                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5739                 break;
5740         case ixgbe_mac_X550EM_x:
5741         case ixgbe_mac_x550em_a:
5742         default:
5743                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5744                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5745                 break;
5746         }
5747
5748         /* Configure DCB traffic classes */
5749         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5750                 tc = &adapter->dcb_cfg.tc_config[j];
5751                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5752                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5753                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5754                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5755                 tc->dcb_pfc = pfc_disabled;
5756         }
5757
5758         /* Initialize default user to priority mapping, UPx->TC0 */
5759         tc = &adapter->dcb_cfg.tc_config[0];
5760         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5761         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5762
5763         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5764         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5765         adapter->dcb_cfg.pfc_mode_enable = false;
5766         adapter->dcb_set_bitmap = 0x00;
5767         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5768                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5769         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5770                sizeof(adapter->temp_dcb_cfg));
5771 }
5772 #endif
5773
5774 /**
5775  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5776  * @adapter: board private structure to initialize
5777  *
5778  * ixgbe_sw_init initializes the Adapter private data structure.
5779  * Fields are initialized based on PCI device information and
5780  * OS network device settings (MTU size).
5781  **/
5782 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5783                          const struct ixgbe_info *ii)
5784 {
5785         struct ixgbe_hw *hw = &adapter->hw;
5786         struct pci_dev *pdev = adapter->pdev;
5787         unsigned int rss, fdir;
5788         u32 fwsm;
5789         int i;
5790
5791         /* PCI config space info */
5792
5793         hw->vendor_id = pdev->vendor;
5794         hw->device_id = pdev->device;
5795         hw->revision_id = pdev->revision;
5796         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5797         hw->subsystem_device_id = pdev->subsystem_device;
5798
5799         /* get_invariants needs the device IDs */
5800         ii->get_invariants(hw);
5801
5802         /* Set common capability flags and settings */
5803         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5804         adapter->ring_feature[RING_F_RSS].limit = rss;
5805         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5806         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5807         adapter->atr_sample_rate = 20;
5808         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5809         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5810         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5811 #ifdef CONFIG_IXGBE_DCA
5812         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5813 #endif
5814 #ifdef CONFIG_IXGBE_DCB
5815         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5816         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5817 #endif
5818 #ifdef IXGBE_FCOE
5819         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5820         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5821 #ifdef CONFIG_IXGBE_DCB
5822         /* Default traffic class to use for FCoE */
5823         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5824 #endif /* CONFIG_IXGBE_DCB */
5825 #endif /* IXGBE_FCOE */
5826
5827         /* initialize static ixgbe jump table entries */
5828         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5829                                           GFP_KERNEL);
5830         if (!adapter->jump_tables[0])
5831                 return -ENOMEM;
5832         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5833
5834         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5835                 adapter->jump_tables[i] = NULL;
5836
5837         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5838                                      hw->mac.num_rar_entries,
5839                                      GFP_ATOMIC);
5840         if (!adapter->mac_table)
5841                 return -ENOMEM;
5842
5843         /* Set MAC specific capability flags and exceptions */
5844         switch (hw->mac.type) {
5845         case ixgbe_mac_82598EB:
5846                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5847
5848                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5849                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5850
5851                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5852                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5853                 adapter->atr_sample_rate = 0;
5854                 adapter->fdir_pballoc = 0;
5855 #ifdef IXGBE_FCOE
5856                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5857                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5858 #ifdef CONFIG_IXGBE_DCB
5859                 adapter->fcoe.up = 0;
5860 #endif /* IXGBE_DCB */
5861 #endif /* IXGBE_FCOE */
5862                 break;
5863         case ixgbe_mac_82599EB:
5864                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5865                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5866                 break;
5867         case ixgbe_mac_X540:
5868                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5869                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5870                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5871                 break;
5872         case ixgbe_mac_x550em_a:
5873                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5874                 switch (hw->device_id) {
5875                 case IXGBE_DEV_ID_X550EM_A_1G_T:
5876                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5877                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5878                         break;
5879                 default:
5880                         break;
5881                 }
5882         /* fall through */
5883         case ixgbe_mac_X550EM_x:
5884 #ifdef CONFIG_IXGBE_DCB
5885                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5886 #endif
5887 #ifdef IXGBE_FCOE
5888                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5889 #ifdef CONFIG_IXGBE_DCB
5890                 adapter->fcoe.up = 0;
5891 #endif /* IXGBE_DCB */
5892 #endif /* IXGBE_FCOE */
5893         /* Fall Through */
5894         case ixgbe_mac_X550:
5895                 if (hw->mac.type == ixgbe_mac_X550)
5896                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5897 #ifdef CONFIG_IXGBE_DCA
5898                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5899 #endif
5900                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5901                 break;
5902         default:
5903                 break;
5904         }
5905
5906 #ifdef IXGBE_FCOE
5907         /* FCoE support exists, always init the FCoE lock */
5908         spin_lock_init(&adapter->fcoe.lock);
5909
5910 #endif
5911         /* n-tuple support exists, always init our spinlock */
5912         spin_lock_init(&adapter->fdir_perfect_lock);
5913
5914 #ifdef CONFIG_IXGBE_DCB
5915         ixgbe_init_dcb(adapter);
5916 #endif
5917
5918         /* default flow control settings */
5919         hw->fc.requested_mode = ixgbe_fc_full;
5920         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5921         ixgbe_pbthresh_setup(adapter);
5922         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5923         hw->fc.send_xon = true;
5924         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5925
5926 #ifdef CONFIG_PCI_IOV
5927         if (max_vfs > 0)
5928                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5929
5930         /* assign number of SR-IOV VFs */
5931         if (hw->mac.type != ixgbe_mac_82598EB) {
5932                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5933                         adapter->num_vfs = 0;
5934                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5935                 } else {
5936                         adapter->num_vfs = max_vfs;
5937                 }
5938         }
5939 #endif /* CONFIG_PCI_IOV */
5940
5941         /* enable itr by default in dynamic mode */
5942         adapter->rx_itr_setting = 1;
5943         adapter->tx_itr_setting = 1;
5944
5945         /* set default ring sizes */
5946         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5947         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5948
5949         /* set default work limits */
5950         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5951
5952         /* initialize eeprom parameters */
5953         if (ixgbe_init_eeprom_params_generic(hw)) {
5954                 e_dev_err("EEPROM initialization failed\n");
5955                 return -EIO;
5956         }
5957
5958         /* PF holds first pool slot */
5959         set_bit(0, &adapter->fwd_bitmask);
5960         set_bit(__IXGBE_DOWN, &adapter->state);
5961
5962         return 0;
5963 }
5964
5965 /**
5966  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5967  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5968  *
5969  * Return 0 on success, negative on failure
5970  **/
5971 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5972 {
5973         struct device *dev = tx_ring->dev;
5974         int orig_node = dev_to_node(dev);
5975         int ring_node = -1;
5976         int size;
5977
5978         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5979
5980         if (tx_ring->q_vector)
5981                 ring_node = tx_ring->q_vector->numa_node;
5982
5983         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
5984         if (!tx_ring->tx_buffer_info)
5985                 tx_ring->tx_buffer_info = vmalloc(size);
5986         if (!tx_ring->tx_buffer_info)
5987                 goto err;
5988
5989         u64_stats_init(&tx_ring->syncp);
5990
5991         /* round up to nearest 4K */
5992         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5993         tx_ring->size = ALIGN(tx_ring->size, 4096);
5994
5995         set_dev_node(dev, ring_node);
5996         tx_ring->desc = dma_alloc_coherent(dev,
5997                                            tx_ring->size,
5998                                            &tx_ring->dma,
5999                                            GFP_KERNEL);
6000         set_dev_node(dev, orig_node);
6001         if (!tx_ring->desc)
6002                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6003                                                    &tx_ring->dma, GFP_KERNEL);
6004         if (!tx_ring->desc)
6005                 goto err;
6006
6007         tx_ring->next_to_use = 0;
6008         tx_ring->next_to_clean = 0;
6009         return 0;
6010
6011 err:
6012         vfree(tx_ring->tx_buffer_info);
6013         tx_ring->tx_buffer_info = NULL;
6014         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6015         return -ENOMEM;
6016 }
6017
6018 /**
6019  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6020  * @adapter: board private structure
6021  *
6022  * If this function returns with an error, then it's possible one or
6023  * more of the rings is populated (while the rest are not).  It is the
6024  * callers duty to clean those orphaned rings.
6025  *
6026  * Return 0 on success, negative on failure
6027  **/
6028 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6029 {
6030         int i, err = 0;
6031
6032         for (i = 0; i < adapter->num_tx_queues; i++) {
6033                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6034                 if (!err)
6035                         continue;
6036
6037                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6038                 goto err_setup_tx;
6039         }
6040
6041         return 0;
6042 err_setup_tx:
6043         /* rewind the index freeing the rings as we go */
6044         while (i--)
6045                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6046         return err;
6047 }
6048
6049 /**
6050  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6051  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6052  *
6053  * Returns 0 on success, negative on failure
6054  **/
6055 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
6056 {
6057         struct device *dev = rx_ring->dev;
6058         int orig_node = dev_to_node(dev);
6059         int ring_node = -1;
6060         int size;
6061
6062         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6063
6064         if (rx_ring->q_vector)
6065                 ring_node = rx_ring->q_vector->numa_node;
6066
6067         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6068         if (!rx_ring->rx_buffer_info)
6069                 rx_ring->rx_buffer_info = vmalloc(size);
6070         if (!rx_ring->rx_buffer_info)
6071                 goto err;
6072
6073         u64_stats_init(&rx_ring->syncp);
6074
6075         /* Round up to nearest 4K */
6076         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6077         rx_ring->size = ALIGN(rx_ring->size, 4096);
6078
6079         set_dev_node(dev, ring_node);
6080         rx_ring->desc = dma_alloc_coherent(dev,
6081                                            rx_ring->size,
6082                                            &rx_ring->dma,
6083                                            GFP_KERNEL);
6084         set_dev_node(dev, orig_node);
6085         if (!rx_ring->desc)
6086                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6087                                                    &rx_ring->dma, GFP_KERNEL);
6088         if (!rx_ring->desc)
6089                 goto err;
6090
6091         rx_ring->next_to_clean = 0;
6092         rx_ring->next_to_use = 0;
6093
6094         return 0;
6095 err:
6096         vfree(rx_ring->rx_buffer_info);
6097         rx_ring->rx_buffer_info = NULL;
6098         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6099         return -ENOMEM;
6100 }
6101
6102 /**
6103  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6104  * @adapter: board private structure
6105  *
6106  * If this function returns with an error, then it's possible one or
6107  * more of the rings is populated (while the rest are not).  It is the
6108  * callers duty to clean those orphaned rings.
6109  *
6110  * Return 0 on success, negative on failure
6111  **/
6112 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6113 {
6114         int i, err = 0;
6115
6116         for (i = 0; i < adapter->num_rx_queues; i++) {
6117                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
6118                 if (!err)
6119                         continue;
6120
6121                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6122                 goto err_setup_rx;
6123         }
6124
6125 #ifdef IXGBE_FCOE
6126         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6127         if (!err)
6128 #endif
6129                 return 0;
6130 err_setup_rx:
6131         /* rewind the index freeing the rings as we go */
6132         while (i--)
6133                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6134         return err;
6135 }
6136
6137 /**
6138  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6139  * @tx_ring: Tx descriptor ring for a specific queue
6140  *
6141  * Free all transmit software resources
6142  **/
6143 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6144 {
6145         ixgbe_clean_tx_ring(tx_ring);
6146
6147         vfree(tx_ring->tx_buffer_info);
6148         tx_ring->tx_buffer_info = NULL;
6149
6150         /* if not set, then don't free */
6151         if (!tx_ring->desc)
6152                 return;
6153
6154         dma_free_coherent(tx_ring->dev, tx_ring->size,
6155                           tx_ring->desc, tx_ring->dma);
6156
6157         tx_ring->desc = NULL;
6158 }
6159
6160 /**
6161  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6162  * @adapter: board private structure
6163  *
6164  * Free all transmit software resources
6165  **/
6166 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6167 {
6168         int i;
6169
6170         for (i = 0; i < adapter->num_tx_queues; i++)
6171                 if (adapter->tx_ring[i]->desc)
6172                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6173 }
6174
6175 /**
6176  * ixgbe_free_rx_resources - Free Rx Resources
6177  * @rx_ring: ring to clean the resources from
6178  *
6179  * Free all receive software resources
6180  **/
6181 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6182 {
6183         ixgbe_clean_rx_ring(rx_ring);
6184
6185         vfree(rx_ring->rx_buffer_info);
6186         rx_ring->rx_buffer_info = NULL;
6187
6188         /* if not set, then don't free */
6189         if (!rx_ring->desc)
6190                 return;
6191
6192         dma_free_coherent(rx_ring->dev, rx_ring->size,
6193                           rx_ring->desc, rx_ring->dma);
6194
6195         rx_ring->desc = NULL;
6196 }
6197
6198 /**
6199  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6200  * @adapter: board private structure
6201  *
6202  * Free all receive software resources
6203  **/
6204 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6205 {
6206         int i;
6207
6208 #ifdef IXGBE_FCOE
6209         ixgbe_free_fcoe_ddp_resources(adapter);
6210
6211 #endif
6212         for (i = 0; i < adapter->num_rx_queues; i++)
6213                 if (adapter->rx_ring[i]->desc)
6214                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6215 }
6216
6217 /**
6218  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6219  * @netdev: network interface device structure
6220  * @new_mtu: new value for maximum frame size
6221  *
6222  * Returns 0 on success, negative on failure
6223  **/
6224 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6225 {
6226         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6227
6228         /*
6229          * For 82599EB we cannot allow legacy VFs to enable their receive
6230          * paths when MTU greater than 1500 is configured.  So display a
6231          * warning that legacy VFs will be disabled.
6232          */
6233         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6234             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6235             (new_mtu > ETH_DATA_LEN))
6236                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6237
6238         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6239
6240         /* must set new MTU before calling down or up */
6241         netdev->mtu = new_mtu;
6242
6243         if (netif_running(netdev))
6244                 ixgbe_reinit_locked(adapter);
6245
6246         return 0;
6247 }
6248
6249 /**
6250  * ixgbe_open - Called when a network interface is made active
6251  * @netdev: network interface device structure
6252  *
6253  * Returns 0 on success, negative value on failure
6254  *
6255  * The open entry point is called when a network interface is made
6256  * active by the system (IFF_UP).  At this point all resources needed
6257  * for transmit and receive operations are allocated, the interrupt
6258  * handler is registered with the OS, the watchdog timer is started,
6259  * and the stack is notified that the interface is ready.
6260  **/
6261 int ixgbe_open(struct net_device *netdev)
6262 {
6263         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6264         struct ixgbe_hw *hw = &adapter->hw;
6265         int err, queues;
6266
6267         /* disallow open during test */
6268         if (test_bit(__IXGBE_TESTING, &adapter->state))
6269                 return -EBUSY;
6270
6271         netif_carrier_off(netdev);
6272
6273         /* allocate transmit descriptors */
6274         err = ixgbe_setup_all_tx_resources(adapter);
6275         if (err)
6276                 goto err_setup_tx;
6277
6278         /* allocate receive descriptors */
6279         err = ixgbe_setup_all_rx_resources(adapter);
6280         if (err)
6281                 goto err_setup_rx;
6282
6283         ixgbe_configure(adapter);
6284
6285         err = ixgbe_request_irq(adapter);
6286         if (err)
6287                 goto err_req_irq;
6288
6289         /* Notify the stack of the actual queue counts. */
6290         if (adapter->num_rx_pools > 1)
6291                 queues = adapter->num_rx_queues_per_pool;
6292         else
6293                 queues = adapter->num_tx_queues;
6294
6295         err = netif_set_real_num_tx_queues(netdev, queues);
6296         if (err)
6297                 goto err_set_queues;
6298
6299         if (adapter->num_rx_pools > 1 &&
6300             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6301                 queues = IXGBE_MAX_L2A_QUEUES;
6302         else
6303                 queues = adapter->num_rx_queues;
6304         err = netif_set_real_num_rx_queues(netdev, queues);
6305         if (err)
6306                 goto err_set_queues;
6307
6308         ixgbe_ptp_init(adapter);
6309
6310         ixgbe_up_complete(adapter);
6311
6312         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6313         udp_tunnel_get_rx_info(netdev);
6314
6315         return 0;
6316
6317 err_set_queues:
6318         ixgbe_free_irq(adapter);
6319 err_req_irq:
6320         ixgbe_free_all_rx_resources(adapter);
6321         if (hw->phy.ops.set_phy_power && !adapter->wol)
6322                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6323 err_setup_rx:
6324         ixgbe_free_all_tx_resources(adapter);
6325 err_setup_tx:
6326         ixgbe_reset(adapter);
6327
6328         return err;
6329 }
6330
6331 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6332 {
6333         ixgbe_ptp_suspend(adapter);
6334
6335         if (adapter->hw.phy.ops.enter_lplu) {
6336                 adapter->hw.phy.reset_disable = true;
6337                 ixgbe_down(adapter);
6338                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6339                 adapter->hw.phy.reset_disable = false;
6340         } else {
6341                 ixgbe_down(adapter);
6342         }
6343
6344         ixgbe_free_irq(adapter);
6345
6346         ixgbe_free_all_tx_resources(adapter);
6347         ixgbe_free_all_rx_resources(adapter);
6348 }
6349
6350 /**
6351  * ixgbe_close - Disables a network interface
6352  * @netdev: network interface device structure
6353  *
6354  * Returns 0, this is not allowed to fail
6355  *
6356  * The close entry point is called when an interface is de-activated
6357  * by the OS.  The hardware is still under the drivers control, but
6358  * needs to be disabled.  A global MAC reset is issued to stop the
6359  * hardware, and all transmit and receive resources are freed.
6360  **/
6361 int ixgbe_close(struct net_device *netdev)
6362 {
6363         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6364
6365         ixgbe_ptp_stop(adapter);
6366
6367         if (netif_device_present(netdev))
6368                 ixgbe_close_suspend(adapter);
6369
6370         ixgbe_fdir_filter_exit(adapter);
6371
6372         ixgbe_release_hw_control(adapter);
6373
6374         return 0;
6375 }
6376
6377 #ifdef CONFIG_PM
6378 static int ixgbe_resume(struct pci_dev *pdev)
6379 {
6380         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6381         struct net_device *netdev = adapter->netdev;
6382         u32 err;
6383
6384         adapter->hw.hw_addr = adapter->io_addr;
6385         pci_set_power_state(pdev, PCI_D0);
6386         pci_restore_state(pdev);
6387         /*
6388          * pci_restore_state clears dev->state_saved so call
6389          * pci_save_state to restore it.
6390          */
6391         pci_save_state(pdev);
6392
6393         err = pci_enable_device_mem(pdev);
6394         if (err) {
6395                 e_dev_err("Cannot enable PCI device from suspend\n");
6396                 return err;
6397         }
6398         smp_mb__before_atomic();
6399         clear_bit(__IXGBE_DISABLED, &adapter->state);
6400         pci_set_master(pdev);
6401
6402         pci_wake_from_d3(pdev, false);
6403
6404         ixgbe_reset(adapter);
6405
6406         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6407
6408         rtnl_lock();
6409         err = ixgbe_init_interrupt_scheme(adapter);
6410         if (!err && netif_running(netdev))
6411                 err = ixgbe_open(netdev);
6412
6413
6414         if (!err)
6415                 netif_device_attach(netdev);
6416         rtnl_unlock();
6417
6418         return err;
6419 }
6420 #endif /* CONFIG_PM */
6421
6422 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6423 {
6424         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6425         struct net_device *netdev = adapter->netdev;
6426         struct ixgbe_hw *hw = &adapter->hw;
6427         u32 ctrl, fctrl;
6428         u32 wufc = adapter->wol;
6429 #ifdef CONFIG_PM
6430         int retval = 0;
6431 #endif
6432
6433         rtnl_lock();
6434         netif_device_detach(netdev);
6435
6436         if (netif_running(netdev))
6437                 ixgbe_close_suspend(adapter);
6438
6439         ixgbe_clear_interrupt_scheme(adapter);
6440         rtnl_unlock();
6441
6442 #ifdef CONFIG_PM
6443         retval = pci_save_state(pdev);
6444         if (retval)
6445                 return retval;
6446
6447 #endif
6448         if (hw->mac.ops.stop_link_on_d3)
6449                 hw->mac.ops.stop_link_on_d3(hw);
6450
6451         if (wufc) {
6452                 ixgbe_set_rx_mode(netdev);
6453
6454                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6455                 if (hw->mac.ops.enable_tx_laser)
6456                         hw->mac.ops.enable_tx_laser(hw);
6457
6458                 /* turn on all-multi mode if wake on multicast is enabled */
6459                 if (wufc & IXGBE_WUFC_MC) {
6460                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6461                         fctrl |= IXGBE_FCTRL_MPE;
6462                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6463                 }
6464
6465                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6466                 ctrl |= IXGBE_CTRL_GIO_DIS;
6467                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6468
6469                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6470         } else {
6471                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6472                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6473         }
6474
6475         switch (hw->mac.type) {
6476         case ixgbe_mac_82598EB:
6477                 pci_wake_from_d3(pdev, false);
6478                 break;
6479         case ixgbe_mac_82599EB:
6480         case ixgbe_mac_X540:
6481         case ixgbe_mac_X550:
6482         case ixgbe_mac_X550EM_x:
6483         case ixgbe_mac_x550em_a:
6484                 pci_wake_from_d3(pdev, !!wufc);
6485                 break;
6486         default:
6487                 break;
6488         }
6489
6490         *enable_wake = !!wufc;
6491         if (hw->phy.ops.set_phy_power && !*enable_wake)
6492                 hw->phy.ops.set_phy_power(hw, false);
6493
6494         ixgbe_release_hw_control(adapter);
6495
6496         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6497                 pci_disable_device(pdev);
6498
6499         return 0;
6500 }
6501
6502 #ifdef CONFIG_PM
6503 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6504 {
6505         int retval;
6506         bool wake;
6507
6508         retval = __ixgbe_shutdown(pdev, &wake);
6509         if (retval)
6510                 return retval;
6511
6512         if (wake) {
6513                 pci_prepare_to_sleep(pdev);
6514         } else {
6515                 pci_wake_from_d3(pdev, false);
6516                 pci_set_power_state(pdev, PCI_D3hot);
6517         }
6518
6519         return 0;
6520 }
6521 #endif /* CONFIG_PM */
6522
6523 static void ixgbe_shutdown(struct pci_dev *pdev)
6524 {
6525         bool wake;
6526
6527         __ixgbe_shutdown(pdev, &wake);
6528
6529         if (system_state == SYSTEM_POWER_OFF) {
6530                 pci_wake_from_d3(pdev, wake);
6531                 pci_set_power_state(pdev, PCI_D3hot);
6532         }
6533 }
6534
6535 /**
6536  * ixgbe_update_stats - Update the board statistics counters.
6537  * @adapter: board private structure
6538  **/
6539 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6540 {
6541         struct net_device *netdev = adapter->netdev;
6542         struct ixgbe_hw *hw = &adapter->hw;
6543         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6544         u64 total_mpc = 0;
6545         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6546         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6547         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6548         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6549
6550         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6551             test_bit(__IXGBE_RESETTING, &adapter->state))
6552                 return;
6553
6554         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6555                 u64 rsc_count = 0;
6556                 u64 rsc_flush = 0;
6557                 for (i = 0; i < adapter->num_rx_queues; i++) {
6558                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6559                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6560                 }
6561                 adapter->rsc_total_count = rsc_count;
6562                 adapter->rsc_total_flush = rsc_flush;
6563         }
6564
6565         for (i = 0; i < adapter->num_rx_queues; i++) {
6566                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6567                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6568                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6569                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6570                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6571                 bytes += rx_ring->stats.bytes;
6572                 packets += rx_ring->stats.packets;
6573         }
6574         adapter->non_eop_descs = non_eop_descs;
6575         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6576         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6577         adapter->hw_csum_rx_error = hw_csum_rx_error;
6578         netdev->stats.rx_bytes = bytes;
6579         netdev->stats.rx_packets = packets;
6580
6581         bytes = 0;
6582         packets = 0;
6583         /* gather some stats to the adapter struct that are per queue */
6584         for (i = 0; i < adapter->num_tx_queues; i++) {
6585                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6586                 restart_queue += tx_ring->tx_stats.restart_queue;
6587                 tx_busy += tx_ring->tx_stats.tx_busy;
6588                 bytes += tx_ring->stats.bytes;
6589                 packets += tx_ring->stats.packets;
6590         }
6591         adapter->restart_queue = restart_queue;
6592         adapter->tx_busy = tx_busy;
6593         netdev->stats.tx_bytes = bytes;
6594         netdev->stats.tx_packets = packets;
6595
6596         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6597
6598         /* 8 register reads */
6599         for (i = 0; i < 8; i++) {
6600                 /* for packet buffers not used, the register should read 0 */
6601                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6602                 missed_rx += mpc;
6603                 hwstats->mpc[i] += mpc;
6604                 total_mpc += hwstats->mpc[i];
6605                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6606                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6607                 switch (hw->mac.type) {
6608                 case ixgbe_mac_82598EB:
6609                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6610                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6611                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6612                         hwstats->pxonrxc[i] +=
6613                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6614                         break;
6615                 case ixgbe_mac_82599EB:
6616                 case ixgbe_mac_X540:
6617                 case ixgbe_mac_X550:
6618                 case ixgbe_mac_X550EM_x:
6619                 case ixgbe_mac_x550em_a:
6620                         hwstats->pxonrxc[i] +=
6621                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6622                         break;
6623                 default:
6624                         break;
6625                 }
6626         }
6627
6628         /*16 register reads */
6629         for (i = 0; i < 16; i++) {
6630                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6631                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6632                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6633                     (hw->mac.type == ixgbe_mac_X540) ||
6634                     (hw->mac.type == ixgbe_mac_X550) ||
6635                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6636                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6637                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6638                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6639                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6640                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6641                 }
6642         }
6643
6644         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6645         /* work around hardware counting issue */
6646         hwstats->gprc -= missed_rx;
6647
6648         ixgbe_update_xoff_received(adapter);
6649
6650         /* 82598 hardware only has a 32 bit counter in the high register */
6651         switch (hw->mac.type) {
6652         case ixgbe_mac_82598EB:
6653                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6654                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6655                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6656                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6657                 break;
6658         case ixgbe_mac_X540:
6659         case ixgbe_mac_X550:
6660         case ixgbe_mac_X550EM_x:
6661         case ixgbe_mac_x550em_a:
6662                 /* OS2BMC stats are X540 and later */
6663                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6664                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6665                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6666                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6667         case ixgbe_mac_82599EB:
6668                 for (i = 0; i < 16; i++)
6669                         adapter->hw_rx_no_dma_resources +=
6670                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6671                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6672                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6673                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6674                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6675                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6676                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6677                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6678                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6679                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6680 #ifdef IXGBE_FCOE
6681                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6682                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6683                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6684                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6685                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6686                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6687                 /* Add up per cpu counters for total ddp aloc fail */
6688                 if (adapter->fcoe.ddp_pool) {
6689                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6690                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6691                         unsigned int cpu;
6692                         u64 noddp = 0, noddp_ext_buff = 0;
6693                         for_each_possible_cpu(cpu) {
6694                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6695                                 noddp += ddp_pool->noddp;
6696                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6697                         }
6698                         hwstats->fcoe_noddp = noddp;
6699                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6700                 }
6701 #endif /* IXGBE_FCOE */
6702                 break;
6703         default:
6704                 break;
6705         }
6706         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6707         hwstats->bprc += bprc;
6708         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6709         if (hw->mac.type == ixgbe_mac_82598EB)
6710                 hwstats->mprc -= bprc;
6711         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6712         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6713         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6714         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6715         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6716         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6717         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6718         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6719         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6720         hwstats->lxontxc += lxon;
6721         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6722         hwstats->lxofftxc += lxoff;
6723         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6724         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6725         /*
6726          * 82598 errata - tx of flow control packets is included in tx counters
6727          */
6728         xon_off_tot = lxon + lxoff;
6729         hwstats->gptc -= xon_off_tot;
6730         hwstats->mptc -= xon_off_tot;
6731         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6732         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6733         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6734         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6735         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6736         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6737         hwstats->ptc64 -= xon_off_tot;
6738         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6739         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6740         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6741         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6742         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6743         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6744
6745         /* Fill out the OS statistics structure */
6746         netdev->stats.multicast = hwstats->mprc;
6747
6748         /* Rx Errors */
6749         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6750         netdev->stats.rx_dropped = 0;
6751         netdev->stats.rx_length_errors = hwstats->rlec;
6752         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6753         netdev->stats.rx_missed_errors = total_mpc;
6754 }
6755
6756 /**
6757  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6758  * @adapter: pointer to the device adapter structure
6759  **/
6760 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6761 {
6762         struct ixgbe_hw *hw = &adapter->hw;
6763         int i;
6764
6765         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6766                 return;
6767
6768         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6769
6770         /* if interface is down do nothing */
6771         if (test_bit(__IXGBE_DOWN, &adapter->state))
6772                 return;
6773
6774         /* do nothing if we are not using signature filters */
6775         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6776                 return;
6777
6778         adapter->fdir_overflow++;
6779
6780         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6781                 for (i = 0; i < adapter->num_tx_queues; i++)
6782                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6783                                 &(adapter->tx_ring[i]->state));
6784                 /* re-enable flow director interrupts */
6785                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6786         } else {
6787                 e_err(probe, "failed to finish FDIR re-initialization, "
6788                       "ignored adding FDIR ATR filters\n");
6789         }
6790 }
6791
6792 /**
6793  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6794  * @adapter: pointer to the device adapter structure
6795  *
6796  * This function serves two purposes.  First it strobes the interrupt lines
6797  * in order to make certain interrupts are occurring.  Secondly it sets the
6798  * bits needed to check for TX hangs.  As a result we should immediately
6799  * determine if a hang has occurred.
6800  */
6801 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6802 {
6803         struct ixgbe_hw *hw = &adapter->hw;
6804         u64 eics = 0;
6805         int i;
6806
6807         /* If we're down, removing or resetting, just bail */
6808         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6809             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6810             test_bit(__IXGBE_RESETTING, &adapter->state))
6811                 return;
6812
6813         /* Force detection of hung controller */
6814         if (netif_carrier_ok(adapter->netdev)) {
6815                 for (i = 0; i < adapter->num_tx_queues; i++)
6816                         set_check_for_tx_hang(adapter->tx_ring[i]);
6817         }
6818
6819         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6820                 /*
6821                  * for legacy and MSI interrupts don't set any bits
6822                  * that are enabled for EIAM, because this operation
6823                  * would set *both* EIMS and EICS for any bit in EIAM
6824                  */
6825                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6826                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6827         } else {
6828                 /* get one bit for every active tx/rx interrupt vector */
6829                 for (i = 0; i < adapter->num_q_vectors; i++) {
6830                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6831                         if (qv->rx.ring || qv->tx.ring)
6832                                 eics |= BIT_ULL(i);
6833                 }
6834         }
6835
6836         /* Cause software interrupt to ensure rings are cleaned */
6837         ixgbe_irq_rearm_queues(adapter, eics);
6838 }
6839
6840 /**
6841  * ixgbe_watchdog_update_link - update the link status
6842  * @adapter: pointer to the device adapter structure
6843  * @link_speed: pointer to a u32 to store the link_speed
6844  **/
6845 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6846 {
6847         struct ixgbe_hw *hw = &adapter->hw;
6848         u32 link_speed = adapter->link_speed;
6849         bool link_up = adapter->link_up;
6850         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6851
6852         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6853                 return;
6854
6855         if (hw->mac.ops.check_link) {
6856                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6857         } else {
6858                 /* always assume link is up, if no check link function */
6859                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6860                 link_up = true;
6861         }
6862
6863         if (adapter->ixgbe_ieee_pfc)
6864                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6865
6866         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6867                 hw->mac.ops.fc_enable(hw);
6868                 ixgbe_set_rx_drop_en(adapter);
6869         }
6870
6871         if (link_up ||
6872             time_after(jiffies, (adapter->link_check_timeout +
6873                                  IXGBE_TRY_LINK_TIMEOUT))) {
6874                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6875                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6876                 IXGBE_WRITE_FLUSH(hw);
6877         }
6878
6879         adapter->link_up = link_up;
6880         adapter->link_speed = link_speed;
6881 }
6882
6883 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6884 {
6885 #ifdef CONFIG_IXGBE_DCB
6886         struct net_device *netdev = adapter->netdev;
6887         struct dcb_app app = {
6888                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6889                               .protocol = 0,
6890                              };
6891         u8 up = 0;
6892
6893         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6894                 up = dcb_ieee_getapp_mask(netdev, &app);
6895
6896         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6897 #endif
6898 }
6899
6900 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
6901 {
6902         if (netif_is_macvlan(upper)) {
6903                 struct macvlan_dev *vlan = netdev_priv(upper);
6904
6905                 if (vlan->fwd_priv)
6906                         netif_tx_wake_all_queues(upper);
6907         }
6908
6909         return 0;
6910 }
6911
6912 /**
6913  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6914  *                             print link up message
6915  * @adapter: pointer to the device adapter structure
6916  **/
6917 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6918 {
6919         struct net_device *netdev = adapter->netdev;
6920         struct ixgbe_hw *hw = &adapter->hw;
6921         u32 link_speed = adapter->link_speed;
6922         const char *speed_str;
6923         bool flow_rx, flow_tx;
6924
6925         /* only continue if link was previously down */
6926         if (netif_carrier_ok(netdev))
6927                 return;
6928
6929         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6930
6931         switch (hw->mac.type) {
6932         case ixgbe_mac_82598EB: {
6933                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6934                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6935                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6936                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6937         }
6938                 break;
6939         case ixgbe_mac_X540:
6940         case ixgbe_mac_X550:
6941         case ixgbe_mac_X550EM_x:
6942         case ixgbe_mac_x550em_a:
6943         case ixgbe_mac_82599EB: {
6944                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6945                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6946                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6947                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6948         }
6949                 break;
6950         default:
6951                 flow_tx = false;
6952                 flow_rx = false;
6953                 break;
6954         }
6955
6956         adapter->last_rx_ptp_check = jiffies;
6957
6958         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6959                 ixgbe_ptp_start_cyclecounter(adapter);
6960
6961         switch (link_speed) {
6962         case IXGBE_LINK_SPEED_10GB_FULL:
6963                 speed_str = "10 Gbps";
6964                 break;
6965         case IXGBE_LINK_SPEED_2_5GB_FULL:
6966                 speed_str = "2.5 Gbps";
6967                 break;
6968         case IXGBE_LINK_SPEED_1GB_FULL:
6969                 speed_str = "1 Gbps";
6970                 break;
6971         case IXGBE_LINK_SPEED_100_FULL:
6972                 speed_str = "100 Mbps";
6973                 break;
6974         case IXGBE_LINK_SPEED_10_FULL:
6975                 speed_str = "10 Mbps";
6976                 break;
6977         default:
6978                 speed_str = "unknown speed";
6979                 break;
6980         }
6981         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6982                ((flow_rx && flow_tx) ? "RX/TX" :
6983                (flow_rx ? "RX" :
6984                (flow_tx ? "TX" : "None"))));
6985
6986         netif_carrier_on(netdev);
6987         ixgbe_check_vf_rate_limit(adapter);
6988
6989         /* enable transmits */
6990         netif_tx_wake_all_queues(adapter->netdev);
6991
6992         /* enable any upper devices */
6993         rtnl_lock();
6994         netdev_walk_all_upper_dev_rcu(adapter->netdev,
6995                                       ixgbe_enable_macvlan, NULL);
6996         rtnl_unlock();
6997
6998         /* update the default user priority for VFs */
6999         ixgbe_update_default_up(adapter);
7000
7001         /* ping all the active vfs to let them know link has changed */
7002         ixgbe_ping_all_vfs(adapter);
7003 }
7004
7005 /**
7006  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7007  *                               print link down message
7008  * @adapter: pointer to the adapter structure
7009  **/
7010 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7011 {
7012         struct net_device *netdev = adapter->netdev;
7013         struct ixgbe_hw *hw = &adapter->hw;
7014
7015         adapter->link_up = false;
7016         adapter->link_speed = 0;
7017
7018         /* only continue if link was up previously */
7019         if (!netif_carrier_ok(netdev))
7020                 return;
7021
7022         /* poll for SFP+ cable when link is down */
7023         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7024                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7025
7026         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7027                 ixgbe_ptp_start_cyclecounter(adapter);
7028
7029         e_info(drv, "NIC Link is Down\n");
7030         netif_carrier_off(netdev);
7031
7032         /* ping all the active vfs to let them know link has changed */
7033         ixgbe_ping_all_vfs(adapter);
7034 }
7035
7036 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7037 {
7038         int i;
7039
7040         for (i = 0; i < adapter->num_tx_queues; i++) {
7041                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7042
7043                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7044                         return true;
7045         }
7046
7047         return false;
7048 }
7049
7050 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7051 {
7052         struct ixgbe_hw *hw = &adapter->hw;
7053         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7054         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7055
7056         int i, j;
7057
7058         if (!adapter->num_vfs)
7059                 return false;
7060
7061         /* resetting the PF is only needed for MAC before X550 */
7062         if (hw->mac.type >= ixgbe_mac_X550)
7063                 return false;
7064
7065         for (i = 0; i < adapter->num_vfs; i++) {
7066                 for (j = 0; j < q_per_pool; j++) {
7067                         u32 h, t;
7068
7069                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7070                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7071
7072                         if (h != t)
7073                                 return true;
7074                 }
7075         }
7076
7077         return false;
7078 }
7079
7080 /**
7081  * ixgbe_watchdog_flush_tx - flush queues on link down
7082  * @adapter: pointer to the device adapter structure
7083  **/
7084 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7085 {
7086         if (!netif_carrier_ok(adapter->netdev)) {
7087                 if (ixgbe_ring_tx_pending(adapter) ||
7088                     ixgbe_vf_tx_pending(adapter)) {
7089                         /* We've lost link, so the controller stops DMA,
7090                          * but we've got queued Tx work that's never going
7091                          * to get done, so reset controller to flush Tx.
7092                          * (Do the reset outside of interrupt context).
7093                          */
7094                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7095                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7096                 }
7097         }
7098 }
7099
7100 #ifdef CONFIG_PCI_IOV
7101 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
7102                                       struct pci_dev *vfdev)
7103 {
7104         if (!pci_wait_for_pending_transaction(vfdev))
7105                 e_dev_warn("Issuing VFLR with pending transactions\n");
7106
7107         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
7108         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
7109
7110         msleep(100);
7111 }
7112
7113 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7114 {
7115         struct ixgbe_hw *hw = &adapter->hw;
7116         struct pci_dev *pdev = adapter->pdev;
7117         unsigned int vf;
7118         u32 gpc;
7119
7120         if (!(netif_carrier_ok(adapter->netdev)))
7121                 return;
7122
7123         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7124         if (gpc) /* If incrementing then no need for the check below */
7125                 return;
7126         /* Check to see if a bad DMA write target from an errant or
7127          * malicious VF has caused a PCIe error.  If so then we can
7128          * issue a VFLR to the offending VF(s) and then resume without
7129          * requesting a full slot reset.
7130          */
7131
7132         if (!pdev)
7133                 return;
7134
7135         /* check status reg for all VFs owned by this PF */
7136         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7137                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7138                 u16 status_reg;
7139
7140                 if (!vfdev)
7141                         continue;
7142                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7143                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7144                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7145                         ixgbe_issue_vf_flr(adapter, vfdev);
7146         }
7147 }
7148
7149 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7150 {
7151         u32 ssvpc;
7152
7153         /* Do not perform spoof check for 82598 or if not in IOV mode */
7154         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7155             adapter->num_vfs == 0)
7156                 return;
7157
7158         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7159
7160         /*
7161          * ssvpc register is cleared on read, if zero then no
7162          * spoofed packets in the last interval.
7163          */
7164         if (!ssvpc)
7165                 return;
7166
7167         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7168 }
7169 #else
7170 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7171 {
7172 }
7173
7174 static void
7175 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7176 {
7177 }
7178 #endif /* CONFIG_PCI_IOV */
7179
7180
7181 /**
7182  * ixgbe_watchdog_subtask - check and bring link up
7183  * @adapter: pointer to the device adapter structure
7184  **/
7185 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7186 {
7187         /* if interface is down, removing or resetting, do nothing */
7188         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7189             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7190             test_bit(__IXGBE_RESETTING, &adapter->state))
7191                 return;
7192
7193         ixgbe_watchdog_update_link(adapter);
7194
7195         if (adapter->link_up)
7196                 ixgbe_watchdog_link_is_up(adapter);
7197         else
7198                 ixgbe_watchdog_link_is_down(adapter);
7199
7200         ixgbe_check_for_bad_vf(adapter);
7201         ixgbe_spoof_check(adapter);
7202         ixgbe_update_stats(adapter);
7203
7204         ixgbe_watchdog_flush_tx(adapter);
7205 }
7206
7207 /**
7208  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7209  * @adapter: the ixgbe adapter structure
7210  **/
7211 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7212 {
7213         struct ixgbe_hw *hw = &adapter->hw;
7214         s32 err;
7215
7216         /* not searching for SFP so there is nothing to do here */
7217         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7218             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7219                 return;
7220
7221         if (adapter->sfp_poll_time &&
7222             time_after(adapter->sfp_poll_time, jiffies))
7223                 return; /* If not yet time to poll for SFP */
7224
7225         /* someone else is in init, wait until next service event */
7226         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7227                 return;
7228
7229         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7230
7231         err = hw->phy.ops.identify_sfp(hw);
7232         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7233                 goto sfp_out;
7234
7235         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7236                 /* If no cable is present, then we need to reset
7237                  * the next time we find a good cable. */
7238                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7239         }
7240
7241         /* exit on error */
7242         if (err)
7243                 goto sfp_out;
7244
7245         /* exit if reset not needed */
7246         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7247                 goto sfp_out;
7248
7249         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7250
7251         /*
7252          * A module may be identified correctly, but the EEPROM may not have
7253          * support for that module.  setup_sfp() will fail in that case, so
7254          * we should not allow that module to load.
7255          */
7256         if (hw->mac.type == ixgbe_mac_82598EB)
7257                 err = hw->phy.ops.reset(hw);
7258         else
7259                 err = hw->mac.ops.setup_sfp(hw);
7260
7261         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7262                 goto sfp_out;
7263
7264         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7265         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7266
7267 sfp_out:
7268         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7269
7270         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7271             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7272                 e_dev_err("failed to initialize because an unsupported "
7273                           "SFP+ module type was detected.\n");
7274                 e_dev_err("Reload the driver after installing a "
7275                           "supported module.\n");
7276                 unregister_netdev(adapter->netdev);
7277         }
7278 }
7279
7280 /**
7281  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7282  * @adapter: the ixgbe adapter structure
7283  **/
7284 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7285 {
7286         struct ixgbe_hw *hw = &adapter->hw;
7287         u32 speed;
7288         bool autoneg = false;
7289
7290         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7291                 return;
7292
7293         /* someone else is in init, wait until next service event */
7294         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7295                 return;
7296
7297         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7298
7299         speed = hw->phy.autoneg_advertised;
7300         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7301                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7302
7303                 /* setup the highest link when no autoneg */
7304                 if (!autoneg) {
7305                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7306                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7307                 }
7308         }
7309
7310         if (hw->mac.ops.setup_link)
7311                 hw->mac.ops.setup_link(hw, speed, true);
7312
7313         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7314         adapter->link_check_timeout = jiffies;
7315         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7316 }
7317
7318 /**
7319  * ixgbe_service_timer - Timer Call-back
7320  * @data: pointer to adapter cast into an unsigned long
7321  **/
7322 static void ixgbe_service_timer(unsigned long data)
7323 {
7324         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7325         unsigned long next_event_offset;
7326
7327         /* poll faster when waiting for link */
7328         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7329                 next_event_offset = HZ / 10;
7330         else
7331                 next_event_offset = HZ * 2;
7332
7333         /* Reset the timer */
7334         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7335
7336         ixgbe_service_event_schedule(adapter);
7337 }
7338
7339 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7340 {
7341         struct ixgbe_hw *hw = &adapter->hw;
7342         u32 status;
7343
7344         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7345                 return;
7346
7347         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7348
7349         if (!hw->phy.ops.handle_lasi)
7350                 return;
7351
7352         status = hw->phy.ops.handle_lasi(&adapter->hw);
7353         if (status != IXGBE_ERR_OVERTEMP)
7354                 return;
7355
7356         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7357 }
7358
7359 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7360 {
7361         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7362                 return;
7363
7364         /* If we're already down, removing or resetting, just bail */
7365         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7366             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7367             test_bit(__IXGBE_RESETTING, &adapter->state))
7368                 return;
7369
7370         ixgbe_dump(adapter);
7371         netdev_err(adapter->netdev, "Reset adapter\n");
7372         adapter->tx_timeout_count++;
7373
7374         rtnl_lock();
7375         ixgbe_reinit_locked(adapter);
7376         rtnl_unlock();
7377 }
7378
7379 /**
7380  * ixgbe_service_task - manages and runs subtasks
7381  * @work: pointer to work_struct containing our data
7382  **/
7383 static void ixgbe_service_task(struct work_struct *work)
7384 {
7385         struct ixgbe_adapter *adapter = container_of(work,
7386                                                      struct ixgbe_adapter,
7387                                                      service_task);
7388         if (ixgbe_removed(adapter->hw.hw_addr)) {
7389                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7390                         rtnl_lock();
7391                         ixgbe_down(adapter);
7392                         rtnl_unlock();
7393                 }
7394                 ixgbe_service_event_complete(adapter);
7395                 return;
7396         }
7397         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7398                 rtnl_lock();
7399                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7400                 udp_tunnel_get_rx_info(adapter->netdev);
7401                 rtnl_unlock();
7402         }
7403         ixgbe_reset_subtask(adapter);
7404         ixgbe_phy_interrupt_subtask(adapter);
7405         ixgbe_sfp_detection_subtask(adapter);
7406         ixgbe_sfp_link_config_subtask(adapter);
7407         ixgbe_check_overtemp_subtask(adapter);
7408         ixgbe_watchdog_subtask(adapter);
7409         ixgbe_fdir_reinit_subtask(adapter);
7410         ixgbe_check_hang_subtask(adapter);
7411
7412         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7413                 ixgbe_ptp_overflow_check(adapter);
7414                 ixgbe_ptp_rx_hang(adapter);
7415         }
7416
7417         ixgbe_service_event_complete(adapter);
7418 }
7419
7420 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7421                      struct ixgbe_tx_buffer *first,
7422                      u8 *hdr_len)
7423 {
7424         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7425         struct sk_buff *skb = first->skb;
7426         union {
7427                 struct iphdr *v4;
7428                 struct ipv6hdr *v6;
7429                 unsigned char *hdr;
7430         } ip;
7431         union {
7432                 struct tcphdr *tcp;
7433                 unsigned char *hdr;
7434         } l4;
7435         u32 paylen, l4_offset;
7436         int err;
7437
7438         if (skb->ip_summed != CHECKSUM_PARTIAL)
7439                 return 0;
7440
7441         if (!skb_is_gso(skb))
7442                 return 0;
7443
7444         err = skb_cow_head(skb, 0);
7445         if (err < 0)
7446                 return err;
7447
7448         ip.hdr = skb_network_header(skb);
7449         l4.hdr = skb_checksum_start(skb);
7450
7451         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7452         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7453
7454         /* initialize outer IP header fields */
7455         if (ip.v4->version == 4) {
7456                 unsigned char *csum_start = skb_checksum_start(skb);
7457                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7458
7459                 /* IP header will have to cancel out any data that
7460                  * is not a part of the outer IP header
7461                  */
7462                 ip.v4->check = csum_fold(csum_partial(trans_start,
7463                                                       csum_start - trans_start,
7464                                                       0));
7465                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7466
7467                 ip.v4->tot_len = 0;
7468                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7469                                    IXGBE_TX_FLAGS_CSUM |
7470                                    IXGBE_TX_FLAGS_IPV4;
7471         } else {
7472                 ip.v6->payload_len = 0;
7473                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7474                                    IXGBE_TX_FLAGS_CSUM;
7475         }
7476
7477         /* determine offset of inner transport header */
7478         l4_offset = l4.hdr - skb->data;
7479
7480         /* compute length of segmentation header */
7481         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7482
7483         /* remove payload length from inner checksum */
7484         paylen = skb->len - l4_offset;
7485         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7486
7487         /* update gso size and bytecount with header size */
7488         first->gso_segs = skb_shinfo(skb)->gso_segs;
7489         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7490
7491         /* mss_l4len_id: use 0 as index for TSO */
7492         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7493         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7494
7495         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7496         vlan_macip_lens = l4.hdr - ip.hdr;
7497         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7498         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7499
7500         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7501                           mss_l4len_idx);
7502
7503         return 1;
7504 }
7505
7506 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7507 {
7508         unsigned int offset = 0;
7509
7510         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7511
7512         return offset == skb_checksum_start_offset(skb);
7513 }
7514
7515 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7516                           struct ixgbe_tx_buffer *first)
7517 {
7518         struct sk_buff *skb = first->skb;
7519         u32 vlan_macip_lens = 0;
7520         u32 type_tucmd = 0;
7521
7522         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7523 csum_failed:
7524                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7525                                          IXGBE_TX_FLAGS_CC)))
7526                         return;
7527                 goto no_csum;
7528         }
7529
7530         switch (skb->csum_offset) {
7531         case offsetof(struct tcphdr, check):
7532                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7533                 /* fall through */
7534         case offsetof(struct udphdr, check):
7535                 break;
7536         case offsetof(struct sctphdr, checksum):
7537                 /* validate that this is actually an SCTP request */
7538                 if (((first->protocol == htons(ETH_P_IP)) &&
7539                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7540                     ((first->protocol == htons(ETH_P_IPV6)) &&
7541                      ixgbe_ipv6_csum_is_sctp(skb))) {
7542                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7543                         break;
7544                 }
7545                 /* fall through */
7546         default:
7547                 skb_checksum_help(skb);
7548                 goto csum_failed;
7549         }
7550
7551         /* update TX checksum flag */
7552         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7553         vlan_macip_lens = skb_checksum_start_offset(skb) -
7554                           skb_network_offset(skb);
7555 no_csum:
7556         /* vlan_macip_lens: MACLEN, VLAN tag */
7557         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7558         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7559
7560         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7561 }
7562
7563 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7564         ((_flag <= _result) ? \
7565          ((u32)(_input & _flag) * (_result / _flag)) : \
7566          ((u32)(_input & _flag) / (_flag / _result)))
7567
7568 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7569 {
7570         /* set type for advanced descriptor with frame checksum insertion */
7571         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7572                        IXGBE_ADVTXD_DCMD_DEXT |
7573                        IXGBE_ADVTXD_DCMD_IFCS;
7574
7575         /* set HW vlan bit if vlan is present */
7576         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7577                                    IXGBE_ADVTXD_DCMD_VLE);
7578
7579         /* set segmentation enable bits for TSO/FSO */
7580         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7581                                    IXGBE_ADVTXD_DCMD_TSE);
7582
7583         /* set timestamp bit if present */
7584         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7585                                    IXGBE_ADVTXD_MAC_TSTAMP);
7586
7587         /* insert frame checksum */
7588         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7589
7590         return cmd_type;
7591 }
7592
7593 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7594                                    u32 tx_flags, unsigned int paylen)
7595 {
7596         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7597
7598         /* enable L4 checksum for TSO and TX checksum offload */
7599         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7600                                         IXGBE_TX_FLAGS_CSUM,
7601                                         IXGBE_ADVTXD_POPTS_TXSM);
7602
7603         /* enble IPv4 checksum for TSO */
7604         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7605                                         IXGBE_TX_FLAGS_IPV4,
7606                                         IXGBE_ADVTXD_POPTS_IXSM);
7607
7608         /*
7609          * Check Context must be set if Tx switch is enabled, which it
7610          * always is for case where virtual functions are running
7611          */
7612         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7613                                         IXGBE_TX_FLAGS_CC,
7614                                         IXGBE_ADVTXD_CC);
7615
7616         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7617 }
7618
7619 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7620 {
7621         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7622
7623         /* Herbert's original patch had:
7624          *  smp_mb__after_netif_stop_queue();
7625          * but since that doesn't exist yet, just open code it.
7626          */
7627         smp_mb();
7628
7629         /* We need to check again in a case another CPU has just
7630          * made room available.
7631          */
7632         if (likely(ixgbe_desc_unused(tx_ring) < size))
7633                 return -EBUSY;
7634
7635         /* A reprieve! - use start_queue because it doesn't call schedule */
7636         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7637         ++tx_ring->tx_stats.restart_queue;
7638         return 0;
7639 }
7640
7641 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7642 {
7643         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7644                 return 0;
7645
7646         return __ixgbe_maybe_stop_tx(tx_ring, size);
7647 }
7648
7649 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7650                        IXGBE_TXD_CMD_RS)
7651
7652 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7653                          struct ixgbe_tx_buffer *first,
7654                          const u8 hdr_len)
7655 {
7656         struct sk_buff *skb = first->skb;
7657         struct ixgbe_tx_buffer *tx_buffer;
7658         union ixgbe_adv_tx_desc *tx_desc;
7659         struct skb_frag_struct *frag;
7660         dma_addr_t dma;
7661         unsigned int data_len, size;
7662         u32 tx_flags = first->tx_flags;
7663         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7664         u16 i = tx_ring->next_to_use;
7665
7666         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7667
7668         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7669
7670         size = skb_headlen(skb);
7671         data_len = skb->data_len;
7672
7673 #ifdef IXGBE_FCOE
7674         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7675                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7676                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7677                         data_len = 0;
7678                 } else {
7679                         data_len -= sizeof(struct fcoe_crc_eof);
7680                 }
7681         }
7682
7683 #endif
7684         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7685
7686         tx_buffer = first;
7687
7688         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7689                 if (dma_mapping_error(tx_ring->dev, dma))
7690                         goto dma_error;
7691
7692                 /* record length, and DMA address */
7693                 dma_unmap_len_set(tx_buffer, len, size);
7694                 dma_unmap_addr_set(tx_buffer, dma, dma);
7695
7696                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7697
7698                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7699                         tx_desc->read.cmd_type_len =
7700                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7701
7702                         i++;
7703                         tx_desc++;
7704                         if (i == tx_ring->count) {
7705                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7706                                 i = 0;
7707                         }
7708                         tx_desc->read.olinfo_status = 0;
7709
7710                         dma += IXGBE_MAX_DATA_PER_TXD;
7711                         size -= IXGBE_MAX_DATA_PER_TXD;
7712
7713                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7714                 }
7715
7716                 if (likely(!data_len))
7717                         break;
7718
7719                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7720
7721                 i++;
7722                 tx_desc++;
7723                 if (i == tx_ring->count) {
7724                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7725                         i = 0;
7726                 }
7727                 tx_desc->read.olinfo_status = 0;
7728
7729 #ifdef IXGBE_FCOE
7730                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7731 #else
7732                 size = skb_frag_size(frag);
7733 #endif
7734                 data_len -= size;
7735
7736                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7737                                        DMA_TO_DEVICE);
7738
7739                 tx_buffer = &tx_ring->tx_buffer_info[i];
7740         }
7741
7742         /* write last descriptor with RS and EOP bits */
7743         cmd_type |= size | IXGBE_TXD_CMD;
7744         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7745
7746         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7747
7748         /* set the timestamp */
7749         first->time_stamp = jiffies;
7750
7751         /*
7752          * Force memory writes to complete before letting h/w know there
7753          * are new descriptors to fetch.  (Only applicable for weak-ordered
7754          * memory model archs, such as IA-64).
7755          *
7756          * We also need this memory barrier to make certain all of the
7757          * status bits have been updated before next_to_watch is written.
7758          */
7759         wmb();
7760
7761         /* set next_to_watch value indicating a packet is present */
7762         first->next_to_watch = tx_desc;
7763
7764         i++;
7765         if (i == tx_ring->count)
7766                 i = 0;
7767
7768         tx_ring->next_to_use = i;
7769
7770         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7771
7772         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7773                 writel(i, tx_ring->tail);
7774
7775                 /* we need this if more than one processor can write to our tail
7776                  * at a time, it synchronizes IO on IA64/Altix systems
7777                  */
7778                 mmiowb();
7779         }
7780
7781         return;
7782 dma_error:
7783         dev_err(tx_ring->dev, "TX DMA map failed\n");
7784         tx_buffer = &tx_ring->tx_buffer_info[i];
7785
7786         /* clear dma mappings for failed tx_buffer_info map */
7787         while (tx_buffer != first) {
7788                 if (dma_unmap_len(tx_buffer, len))
7789                         dma_unmap_page(tx_ring->dev,
7790                                        dma_unmap_addr(tx_buffer, dma),
7791                                        dma_unmap_len(tx_buffer, len),
7792                                        DMA_TO_DEVICE);
7793                 dma_unmap_len_set(tx_buffer, len, 0);
7794
7795                 if (i--)
7796                         i += tx_ring->count;
7797                 tx_buffer = &tx_ring->tx_buffer_info[i];
7798         }
7799
7800         if (dma_unmap_len(tx_buffer, len))
7801                 dma_unmap_single(tx_ring->dev,
7802                                  dma_unmap_addr(tx_buffer, dma),
7803                                  dma_unmap_len(tx_buffer, len),
7804                                  DMA_TO_DEVICE);
7805         dma_unmap_len_set(tx_buffer, len, 0);
7806
7807         dev_kfree_skb_any(first->skb);
7808         first->skb = NULL;
7809
7810         tx_ring->next_to_use = i;
7811 }
7812
7813 static void ixgbe_atr(struct ixgbe_ring *ring,
7814                       struct ixgbe_tx_buffer *first)
7815 {
7816         struct ixgbe_q_vector *q_vector = ring->q_vector;
7817         union ixgbe_atr_hash_dword input = { .dword = 0 };
7818         union ixgbe_atr_hash_dword common = { .dword = 0 };
7819         union {
7820                 unsigned char *network;
7821                 struct iphdr *ipv4;
7822                 struct ipv6hdr *ipv6;
7823         } hdr;
7824         struct tcphdr *th;
7825         unsigned int hlen;
7826         struct sk_buff *skb;
7827         __be16 vlan_id;
7828         int l4_proto;
7829
7830         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7831         if (!q_vector)
7832                 return;
7833
7834         /* do nothing if sampling is disabled */
7835         if (!ring->atr_sample_rate)
7836                 return;
7837
7838         ring->atr_count++;
7839
7840         /* currently only IPv4/IPv6 with TCP is supported */
7841         if ((first->protocol != htons(ETH_P_IP)) &&
7842             (first->protocol != htons(ETH_P_IPV6)))
7843                 return;
7844
7845         /* snag network header to get L4 type and address */
7846         skb = first->skb;
7847         hdr.network = skb_network_header(skb);
7848         if (unlikely(hdr.network <= skb->data))
7849                 return;
7850         if (skb->encapsulation &&
7851             first->protocol == htons(ETH_P_IP) &&
7852             hdr.ipv4->protocol == IPPROTO_UDP) {
7853                 struct ixgbe_adapter *adapter = q_vector->adapter;
7854
7855                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
7856                              VXLAN_HEADROOM))
7857                         return;
7858
7859                 /* verify the port is recognized as VXLAN */
7860                 if (adapter->vxlan_port &&
7861                     udp_hdr(skb)->dest == adapter->vxlan_port)
7862                         hdr.network = skb_inner_network_header(skb);
7863
7864                 if (adapter->geneve_port &&
7865                     udp_hdr(skb)->dest == adapter->geneve_port)
7866                         hdr.network = skb_inner_network_header(skb);
7867         }
7868
7869         /* Make sure we have at least [minimum IPv4 header + TCP]
7870          * or [IPv6 header] bytes
7871          */
7872         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
7873                 return;
7874
7875         /* Currently only IPv4/IPv6 with TCP is supported */
7876         switch (hdr.ipv4->version) {
7877         case IPVERSION:
7878                 /* access ihl as u8 to avoid unaligned access on ia64 */
7879                 hlen = (hdr.network[0] & 0x0F) << 2;
7880                 l4_proto = hdr.ipv4->protocol;
7881                 break;
7882         case 6:
7883                 hlen = hdr.network - skb->data;
7884                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7885                 hlen -= hdr.network - skb->data;
7886                 break;
7887         default:
7888                 return;
7889         }
7890
7891         if (l4_proto != IPPROTO_TCP)
7892                 return;
7893
7894         if (unlikely(skb_tail_pointer(skb) < hdr.network +
7895                      hlen + sizeof(struct tcphdr)))
7896                 return;
7897
7898         th = (struct tcphdr *)(hdr.network + hlen);
7899
7900         /* skip this packet since the socket is closing */
7901         if (th->fin)
7902                 return;
7903
7904         /* sample on all syn packets or once every atr sample count */
7905         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7906                 return;
7907
7908         /* reset sample count */
7909         ring->atr_count = 0;
7910
7911         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7912
7913         /*
7914          * src and dst are inverted, think how the receiver sees them
7915          *
7916          * The input is broken into two sections, a non-compressed section
7917          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7918          * is XORed together and stored in the compressed dword.
7919          */
7920         input.formatted.vlan_id = vlan_id;
7921
7922         /*
7923          * since src port and flex bytes occupy the same word XOR them together
7924          * and write the value to source port portion of compressed dword
7925          */
7926         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7927                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7928         else
7929                 common.port.src ^= th->dest ^ first->protocol;
7930         common.port.dst ^= th->source;
7931
7932         switch (hdr.ipv4->version) {
7933         case IPVERSION:
7934                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7935                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7936                 break;
7937         case 6:
7938                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7939                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7940                              hdr.ipv6->saddr.s6_addr32[1] ^
7941                              hdr.ipv6->saddr.s6_addr32[2] ^
7942                              hdr.ipv6->saddr.s6_addr32[3] ^
7943                              hdr.ipv6->daddr.s6_addr32[0] ^
7944                              hdr.ipv6->daddr.s6_addr32[1] ^
7945                              hdr.ipv6->daddr.s6_addr32[2] ^
7946                              hdr.ipv6->daddr.s6_addr32[3];
7947                 break;
7948         default:
7949                 break;
7950         }
7951
7952         if (hdr.network != skb_network_header(skb))
7953                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7954
7955         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7956         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7957                                               input, common, ring->queue_index);
7958 }
7959
7960 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7961                               void *accel_priv, select_queue_fallback_t fallback)
7962 {
7963         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7964 #ifdef IXGBE_FCOE
7965         struct ixgbe_adapter *adapter;
7966         struct ixgbe_ring_feature *f;
7967         int txq;
7968 #endif
7969
7970         if (fwd_adapter)
7971                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7972
7973 #ifdef IXGBE_FCOE
7974
7975         /*
7976          * only execute the code below if protocol is FCoE
7977          * or FIP and we have FCoE enabled on the adapter
7978          */
7979         switch (vlan_get_protocol(skb)) {
7980         case htons(ETH_P_FCOE):
7981         case htons(ETH_P_FIP):
7982                 adapter = netdev_priv(dev);
7983
7984                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7985                         break;
7986         default:
7987                 return fallback(dev, skb);
7988         }
7989
7990         f = &adapter->ring_feature[RING_F_FCOE];
7991
7992         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7993                                            smp_processor_id();
7994
7995         while (txq >= f->indices)
7996                 txq -= f->indices;
7997
7998         return txq + f->offset;
7999 #else
8000         return fallback(dev, skb);
8001 #endif
8002 }
8003
8004 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8005                           struct ixgbe_adapter *adapter,
8006                           struct ixgbe_ring *tx_ring)
8007 {
8008         struct ixgbe_tx_buffer *first;
8009         int tso;
8010         u32 tx_flags = 0;
8011         unsigned short f;
8012         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8013         __be16 protocol = skb->protocol;
8014         u8 hdr_len = 0;
8015
8016         /*
8017          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8018          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8019          *       + 2 desc gap to keep tail from touching head,
8020          *       + 1 desc for context descriptor,
8021          * otherwise try next time
8022          */
8023         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8024                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8025
8026         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8027                 tx_ring->tx_stats.tx_busy++;
8028                 return NETDEV_TX_BUSY;
8029         }
8030
8031         /* record the location of the first descriptor for this packet */
8032         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8033         first->skb = skb;
8034         first->bytecount = skb->len;
8035         first->gso_segs = 1;
8036
8037         /* if we have a HW VLAN tag being added default to the HW one */
8038         if (skb_vlan_tag_present(skb)) {
8039                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8040                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8041         /* else if it is a SW VLAN check the next protocol and store the tag */
8042         } else if (protocol == htons(ETH_P_8021Q)) {
8043                 struct vlan_hdr *vhdr, _vhdr;
8044                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8045                 if (!vhdr)
8046                         goto out_drop;
8047
8048                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8049                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8050                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8051         }
8052         protocol = vlan_get_protocol(skb);
8053
8054         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8055             adapter->ptp_clock &&
8056             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8057                                    &adapter->state)) {
8058                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8059                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8060
8061                 /* schedule check for Tx timestamp */
8062                 adapter->ptp_tx_skb = skb_get(skb);
8063                 adapter->ptp_tx_start = jiffies;
8064                 schedule_work(&adapter->ptp_tx_work);
8065         }
8066
8067         skb_tx_timestamp(skb);
8068
8069 #ifdef CONFIG_PCI_IOV
8070         /*
8071          * Use the l2switch_enable flag - would be false if the DMA
8072          * Tx switch had been disabled.
8073          */
8074         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8075                 tx_flags |= IXGBE_TX_FLAGS_CC;
8076
8077 #endif
8078         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8079         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8080             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8081              (skb->priority != TC_PRIO_CONTROL))) {
8082                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8083                 tx_flags |= (skb->priority & 0x7) <<
8084                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8085                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8086                         struct vlan_ethhdr *vhdr;
8087
8088                         if (skb_cow_head(skb, 0))
8089                                 goto out_drop;
8090                         vhdr = (struct vlan_ethhdr *)skb->data;
8091                         vhdr->h_vlan_TCI = htons(tx_flags >>
8092                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8093                 } else {
8094                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8095                 }
8096         }
8097
8098         /* record initial flags and protocol */
8099         first->tx_flags = tx_flags;
8100         first->protocol = protocol;
8101
8102 #ifdef IXGBE_FCOE
8103         /* setup tx offload for FCoE */
8104         if ((protocol == htons(ETH_P_FCOE)) &&
8105             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8106                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8107                 if (tso < 0)
8108                         goto out_drop;
8109
8110                 goto xmit_fcoe;
8111         }
8112
8113 #endif /* IXGBE_FCOE */
8114         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8115         if (tso < 0)
8116                 goto out_drop;
8117         else if (!tso)
8118                 ixgbe_tx_csum(tx_ring, first);
8119
8120         /* add the ATR filter if ATR is on */
8121         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8122                 ixgbe_atr(tx_ring, first);
8123
8124 #ifdef IXGBE_FCOE
8125 xmit_fcoe:
8126 #endif /* IXGBE_FCOE */
8127         ixgbe_tx_map(tx_ring, first, hdr_len);
8128
8129         return NETDEV_TX_OK;
8130
8131 out_drop:
8132         dev_kfree_skb_any(first->skb);
8133         first->skb = NULL;
8134
8135         return NETDEV_TX_OK;
8136 }
8137
8138 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8139                                       struct net_device *netdev,
8140                                       struct ixgbe_ring *ring)
8141 {
8142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8143         struct ixgbe_ring *tx_ring;
8144
8145         /*
8146          * The minimum packet size for olinfo paylen is 17 so pad the skb
8147          * in order to meet this minimum size requirement.
8148          */
8149         if (skb_put_padto(skb, 17))
8150                 return NETDEV_TX_OK;
8151
8152         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8153
8154         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8155 }
8156
8157 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8158                                     struct net_device *netdev)
8159 {
8160         return __ixgbe_xmit_frame(skb, netdev, NULL);
8161 }
8162
8163 /**
8164  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8165  * @netdev: network interface device structure
8166  * @p: pointer to an address structure
8167  *
8168  * Returns 0 on success, negative on failure
8169  **/
8170 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8171 {
8172         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8173         struct ixgbe_hw *hw = &adapter->hw;
8174         struct sockaddr *addr = p;
8175
8176         if (!is_valid_ether_addr(addr->sa_data))
8177                 return -EADDRNOTAVAIL;
8178
8179         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8180         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8181
8182         ixgbe_mac_set_default_filter(adapter);
8183
8184         return 0;
8185 }
8186
8187 static int
8188 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8189 {
8190         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8191         struct ixgbe_hw *hw = &adapter->hw;
8192         u16 value;
8193         int rc;
8194
8195         if (prtad != hw->phy.mdio.prtad)
8196                 return -EINVAL;
8197         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8198         if (!rc)
8199                 rc = value;
8200         return rc;
8201 }
8202
8203 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8204                             u16 addr, u16 value)
8205 {
8206         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8207         struct ixgbe_hw *hw = &adapter->hw;
8208
8209         if (prtad != hw->phy.mdio.prtad)
8210                 return -EINVAL;
8211         return hw->phy.ops.write_reg(hw, addr, devad, value);
8212 }
8213
8214 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8215 {
8216         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8217
8218         switch (cmd) {
8219         case SIOCSHWTSTAMP:
8220                 return ixgbe_ptp_set_ts_config(adapter, req);
8221         case SIOCGHWTSTAMP:
8222                 return ixgbe_ptp_get_ts_config(adapter, req);
8223         default:
8224                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8225         }
8226 }
8227
8228 /**
8229  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8230  * netdev->dev_addrs
8231  * @netdev: network interface device structure
8232  *
8233  * Returns non-zero on failure
8234  **/
8235 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8236 {
8237         int err = 0;
8238         struct ixgbe_adapter *adapter = netdev_priv(dev);
8239         struct ixgbe_hw *hw = &adapter->hw;
8240
8241         if (is_valid_ether_addr(hw->mac.san_addr)) {
8242                 rtnl_lock();
8243                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8244                 rtnl_unlock();
8245
8246                 /* update SAN MAC vmdq pool selection */
8247                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8248         }
8249         return err;
8250 }
8251
8252 /**
8253  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8254  * netdev->dev_addrs
8255  * @netdev: network interface device structure
8256  *
8257  * Returns non-zero on failure
8258  **/
8259 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8260 {
8261         int err = 0;
8262         struct ixgbe_adapter *adapter = netdev_priv(dev);
8263         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8264
8265         if (is_valid_ether_addr(mac->san_addr)) {
8266                 rtnl_lock();
8267                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8268                 rtnl_unlock();
8269         }
8270         return err;
8271 }
8272
8273 #ifdef CONFIG_NET_POLL_CONTROLLER
8274 /*
8275  * Polling 'interrupt' - used by things like netconsole to send skbs
8276  * without having to re-enable interrupts. It's not called while
8277  * the interrupt routine is executing.
8278  */
8279 static void ixgbe_netpoll(struct net_device *netdev)
8280 {
8281         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8282         int i;
8283
8284         /* if interface is down do nothing */
8285         if (test_bit(__IXGBE_DOWN, &adapter->state))
8286                 return;
8287
8288         /* loop through and schedule all active queues */
8289         for (i = 0; i < adapter->num_q_vectors; i++)
8290                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8291 }
8292
8293 #endif
8294
8295 static void ixgbe_get_stats64(struct net_device *netdev,
8296                               struct rtnl_link_stats64 *stats)
8297 {
8298         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8299         int i;
8300
8301         rcu_read_lock();
8302         for (i = 0; i < adapter->num_rx_queues; i++) {
8303                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8304                 u64 bytes, packets;
8305                 unsigned int start;
8306
8307                 if (ring) {
8308                         do {
8309                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8310                                 packets = ring->stats.packets;
8311                                 bytes   = ring->stats.bytes;
8312                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8313                         stats->rx_packets += packets;
8314                         stats->rx_bytes   += bytes;
8315                 }
8316         }
8317
8318         for (i = 0; i < adapter->num_tx_queues; i++) {
8319                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8320                 u64 bytes, packets;
8321                 unsigned int start;
8322
8323                 if (ring) {
8324                         do {
8325                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8326                                 packets = ring->stats.packets;
8327                                 bytes   = ring->stats.bytes;
8328                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8329                         stats->tx_packets += packets;
8330                         stats->tx_bytes   += bytes;
8331                 }
8332         }
8333         rcu_read_unlock();
8334
8335         /* following stats updated by ixgbe_watchdog_task() */
8336         stats->multicast        = netdev->stats.multicast;
8337         stats->rx_errors        = netdev->stats.rx_errors;
8338         stats->rx_length_errors = netdev->stats.rx_length_errors;
8339         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8340         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8341 }
8342
8343 #ifdef CONFIG_IXGBE_DCB
8344 /**
8345  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8346  * @adapter: pointer to ixgbe_adapter
8347  * @tc: number of traffic classes currently enabled
8348  *
8349  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8350  * 802.1Q priority maps to a packet buffer that exists.
8351  */
8352 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8353 {
8354         struct ixgbe_hw *hw = &adapter->hw;
8355         u32 reg, rsave;
8356         int i;
8357
8358         /* 82598 have a static priority to TC mapping that can not
8359          * be changed so no validation is needed.
8360          */
8361         if (hw->mac.type == ixgbe_mac_82598EB)
8362                 return;
8363
8364         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8365         rsave = reg;
8366
8367         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8368                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8369
8370                 /* If up2tc is out of bounds default to zero */
8371                 if (up2tc > tc)
8372                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8373         }
8374
8375         if (reg != rsave)
8376                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8377
8378         return;
8379 }
8380
8381 /**
8382  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8383  * @adapter: Pointer to adapter struct
8384  *
8385  * Populate the netdev user priority to tc map
8386  */
8387 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8388 {
8389         struct net_device *dev = adapter->netdev;
8390         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8391         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8392         u8 prio;
8393
8394         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8395                 u8 tc = 0;
8396
8397                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8398                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8399                 else if (ets)
8400                         tc = ets->prio_tc[prio];
8401
8402                 netdev_set_prio_tc_map(dev, prio, tc);
8403         }
8404 }
8405
8406 #endif /* CONFIG_IXGBE_DCB */
8407 /**
8408  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8409  *
8410  * @netdev: net device to configure
8411  * @tc: number of traffic classes to enable
8412  */
8413 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8414 {
8415         struct ixgbe_adapter *adapter = netdev_priv(dev);
8416         struct ixgbe_hw *hw = &adapter->hw;
8417         bool pools;
8418
8419         /* Hardware supports up to 8 traffic classes */
8420         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8421                 return -EINVAL;
8422
8423         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8424                 return -EINVAL;
8425
8426         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8427         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8428                 return -EBUSY;
8429
8430         /* Hardware has to reinitialize queues and interrupts to
8431          * match packet buffer alignment. Unfortunately, the
8432          * hardware is not flexible enough to do this dynamically.
8433          */
8434         if (netif_running(dev))
8435                 ixgbe_close(dev);
8436         else
8437                 ixgbe_reset(adapter);
8438
8439         ixgbe_clear_interrupt_scheme(adapter);
8440
8441 #ifdef CONFIG_IXGBE_DCB
8442         if (tc) {
8443                 netdev_set_num_tc(dev, tc);
8444                 ixgbe_set_prio_tc_map(adapter);
8445
8446                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8447
8448                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8449                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8450                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8451                 }
8452         } else {
8453                 netdev_reset_tc(dev);
8454
8455                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8456                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8457
8458                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8459
8460                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8461                 adapter->dcb_cfg.pfc_mode_enable = false;
8462         }
8463
8464         ixgbe_validate_rtr(adapter, tc);
8465
8466 #endif /* CONFIG_IXGBE_DCB */
8467         ixgbe_init_interrupt_scheme(adapter);
8468
8469         if (netif_running(dev))
8470                 return ixgbe_open(dev);
8471
8472         return 0;
8473 }
8474
8475 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8476                                struct tc_cls_u32_offload *cls)
8477 {
8478         u32 hdl = cls->knode.handle;
8479         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8480         u32 loc = cls->knode.handle & 0xfffff;
8481         int err = 0, i, j;
8482         struct ixgbe_jump_table *jump = NULL;
8483
8484         if (loc > IXGBE_MAX_HW_ENTRIES)
8485                 return -EINVAL;
8486
8487         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8488                 return -EINVAL;
8489
8490         /* Clear this filter in the link data it is associated with */
8491         if (uhtid != 0x800) {
8492                 jump = adapter->jump_tables[uhtid];
8493                 if (!jump)
8494                         return -EINVAL;
8495                 if (!test_bit(loc - 1, jump->child_loc_map))
8496                         return -EINVAL;
8497                 clear_bit(loc - 1, jump->child_loc_map);
8498         }
8499
8500         /* Check if the filter being deleted is a link */
8501         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8502                 jump = adapter->jump_tables[i];
8503                 if (jump && jump->link_hdl == hdl) {
8504                         /* Delete filters in the hardware in the child hash
8505                          * table associated with this link
8506                          */
8507                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8508                                 if (!test_bit(j, jump->child_loc_map))
8509                                         continue;
8510                                 spin_lock(&adapter->fdir_perfect_lock);
8511                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8512                                                                       NULL,
8513                                                                       j + 1);
8514                                 spin_unlock(&adapter->fdir_perfect_lock);
8515                                 clear_bit(j, jump->child_loc_map);
8516                         }
8517                         /* Remove resources for this link */
8518                         kfree(jump->input);
8519                         kfree(jump->mask);
8520                         kfree(jump);
8521                         adapter->jump_tables[i] = NULL;
8522                         return err;
8523                 }
8524         }
8525
8526         spin_lock(&adapter->fdir_perfect_lock);
8527         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8528         spin_unlock(&adapter->fdir_perfect_lock);
8529         return err;
8530 }
8531
8532 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8533                                             __be16 protocol,
8534                                             struct tc_cls_u32_offload *cls)
8535 {
8536         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8537
8538         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8539                 return -EINVAL;
8540
8541         /* This ixgbe devices do not support hash tables at the moment
8542          * so abort when given hash tables.
8543          */
8544         if (cls->hnode.divisor > 0)
8545                 return -EINVAL;
8546
8547         set_bit(uhtid - 1, &adapter->tables);
8548         return 0;
8549 }
8550
8551 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8552                                             struct tc_cls_u32_offload *cls)
8553 {
8554         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8555
8556         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8557                 return -EINVAL;
8558
8559         clear_bit(uhtid - 1, &adapter->tables);
8560         return 0;
8561 }
8562
8563 #ifdef CONFIG_NET_CLS_ACT
8564 struct upper_walk_data {
8565         struct ixgbe_adapter *adapter;
8566         u64 action;
8567         int ifindex;
8568         u8 queue;
8569 };
8570
8571 static int get_macvlan_queue(struct net_device *upper, void *_data)
8572 {
8573         if (netif_is_macvlan(upper)) {
8574                 struct macvlan_dev *dfwd = netdev_priv(upper);
8575                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8576                 struct upper_walk_data *data = _data;
8577                 struct ixgbe_adapter *adapter = data->adapter;
8578                 int ifindex = data->ifindex;
8579
8580                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8581                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8582                         data->action = data->queue;
8583                         return 1;
8584                 }
8585         }
8586
8587         return 0;
8588 }
8589
8590 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8591                                   u8 *queue, u64 *action)
8592 {
8593         unsigned int num_vfs = adapter->num_vfs, vf;
8594         struct upper_walk_data data;
8595         struct net_device *upper;
8596
8597         /* redirect to a SRIOV VF */
8598         for (vf = 0; vf < num_vfs; ++vf) {
8599                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8600                 if (upper->ifindex == ifindex) {
8601                         if (adapter->num_rx_pools > 1)
8602                                 *queue = vf * 2;
8603                         else
8604                                 *queue = vf * adapter->num_rx_queues_per_pool;
8605
8606                         *action = vf + 1;
8607                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8608                         return 0;
8609                 }
8610         }
8611
8612         /* redirect to a offloaded macvlan netdev */
8613         data.adapter = adapter;
8614         data.ifindex = ifindex;
8615         data.action = 0;
8616         data.queue = 0;
8617         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8618                                           get_macvlan_queue, &data)) {
8619                 *action = data.action;
8620                 *queue = data.queue;
8621
8622                 return 0;
8623         }
8624
8625         return -EINVAL;
8626 }
8627
8628 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8629                             struct tcf_exts *exts, u64 *action, u8 *queue)
8630 {
8631         const struct tc_action *a;
8632         LIST_HEAD(actions);
8633         int err;
8634
8635         if (tc_no_actions(exts))
8636                 return -EINVAL;
8637
8638         tcf_exts_to_list(exts, &actions);
8639         list_for_each_entry(a, &actions, list) {
8640
8641                 /* Drop action */
8642                 if (is_tcf_gact_shot(a)) {
8643                         *action = IXGBE_FDIR_DROP_QUEUE;
8644                         *queue = IXGBE_FDIR_DROP_QUEUE;
8645                         return 0;
8646                 }
8647
8648                 /* Redirect to a VF or a offloaded macvlan */
8649                 if (is_tcf_mirred_egress_redirect(a)) {
8650                         int ifindex = tcf_mirred_ifindex(a);
8651
8652                         err = handle_redirect_action(adapter, ifindex, queue,
8653                                                      action);
8654                         if (err == 0)
8655                                 return err;
8656                 }
8657         }
8658
8659         return -EINVAL;
8660 }
8661 #else
8662 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8663                             struct tcf_exts *exts, u64 *action, u8 *queue)
8664 {
8665         return -EINVAL;
8666 }
8667 #endif /* CONFIG_NET_CLS_ACT */
8668
8669 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8670                                     union ixgbe_atr_input *mask,
8671                                     struct tc_cls_u32_offload *cls,
8672                                     struct ixgbe_mat_field *field_ptr,
8673                                     struct ixgbe_nexthdr *nexthdr)
8674 {
8675         int i, j, off;
8676         __be32 val, m;
8677         bool found_entry = false, found_jump_field = false;
8678
8679         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8680                 off = cls->knode.sel->keys[i].off;
8681                 val = cls->knode.sel->keys[i].val;
8682                 m = cls->knode.sel->keys[i].mask;
8683
8684                 for (j = 0; field_ptr[j].val; j++) {
8685                         if (field_ptr[j].off == off) {
8686                                 field_ptr[j].val(input, mask, val, m);
8687                                 input->filter.formatted.flow_type |=
8688                                         field_ptr[j].type;
8689                                 found_entry = true;
8690                                 break;
8691                         }
8692                 }
8693                 if (nexthdr) {
8694                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
8695                             nexthdr->val == cls->knode.sel->keys[i].val &&
8696                             nexthdr->mask == cls->knode.sel->keys[i].mask)
8697                                 found_jump_field = true;
8698                         else
8699                                 continue;
8700                 }
8701         }
8702
8703         if (nexthdr && !found_jump_field)
8704                 return -EINVAL;
8705
8706         if (!found_entry)
8707                 return 0;
8708
8709         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8710                                     IXGBE_ATR_L4TYPE_MASK;
8711
8712         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8713                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8714
8715         return 0;
8716 }
8717
8718 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8719                                   __be16 protocol,
8720                                   struct tc_cls_u32_offload *cls)
8721 {
8722         u32 loc = cls->knode.handle & 0xfffff;
8723         struct ixgbe_hw *hw = &adapter->hw;
8724         struct ixgbe_mat_field *field_ptr;
8725         struct ixgbe_fdir_filter *input = NULL;
8726         union ixgbe_atr_input *mask = NULL;
8727         struct ixgbe_jump_table *jump = NULL;
8728         int i, err = -EINVAL;
8729         u8 queue;
8730         u32 uhtid, link_uhtid;
8731
8732         uhtid = TC_U32_USERHTID(cls->knode.handle);
8733         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8734
8735         /* At the moment cls_u32 jumps to network layer and skips past
8736          * L2 headers. The canonical method to match L2 frames is to use
8737          * negative values. However this is error prone at best but really
8738          * just broken because there is no way to "know" what sort of hdr
8739          * is in front of the network layer. Fix cls_u32 to support L2
8740          * headers when needed.
8741          */
8742         if (protocol != htons(ETH_P_IP))
8743                 return err;
8744
8745         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8746                 e_err(drv, "Location out of range\n");
8747                 return err;
8748         }
8749
8750         /* cls u32 is a graph starting at root node 0x800. The driver tracks
8751          * links and also the fields used to advance the parser across each
8752          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8753          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8754          * To add support for new nodes update ixgbe_model.h parse structures
8755          * this function _should_ be generic try not to hardcode values here.
8756          */
8757         if (uhtid == 0x800) {
8758                 field_ptr = (adapter->jump_tables[0])->mat;
8759         } else {
8760                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8761                         return err;
8762                 if (!adapter->jump_tables[uhtid])
8763                         return err;
8764                 field_ptr = (adapter->jump_tables[uhtid])->mat;
8765         }
8766
8767         if (!field_ptr)
8768                 return err;
8769
8770         /* At this point we know the field_ptr is valid and need to either
8771          * build cls_u32 link or attach filter. Because adding a link to
8772          * a handle that does not exist is invalid and the same for adding
8773          * rules to handles that don't exist.
8774          */
8775
8776         if (link_uhtid) {
8777                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8778
8779                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8780                         return err;
8781
8782                 if (!test_bit(link_uhtid - 1, &adapter->tables))
8783                         return err;
8784
8785                 /* Multiple filters as links to the same hash table are not
8786                  * supported. To add a new filter with the same next header
8787                  * but different match/jump conditions, create a new hash table
8788                  * and link to it.
8789                  */
8790                 if (adapter->jump_tables[link_uhtid] &&
8791                     (adapter->jump_tables[link_uhtid])->link_hdl) {
8792                         e_err(drv, "Link filter exists for link: %x\n",
8793                               link_uhtid);
8794                         return err;
8795                 }
8796
8797                 for (i = 0; nexthdr[i].jump; i++) {
8798                         if (nexthdr[i].o != cls->knode.sel->offoff ||
8799                             nexthdr[i].s != cls->knode.sel->offshift ||
8800                             nexthdr[i].m != cls->knode.sel->offmask)
8801                                 return err;
8802
8803                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8804                         if (!jump)
8805                                 return -ENOMEM;
8806                         input = kzalloc(sizeof(*input), GFP_KERNEL);
8807                         if (!input) {
8808                                 err = -ENOMEM;
8809                                 goto free_jump;
8810                         }
8811                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8812                         if (!mask) {
8813                                 err = -ENOMEM;
8814                                 goto free_input;
8815                         }
8816                         jump->input = input;
8817                         jump->mask = mask;
8818                         jump->link_hdl = cls->knode.handle;
8819
8820                         err = ixgbe_clsu32_build_input(input, mask, cls,
8821                                                        field_ptr, &nexthdr[i]);
8822                         if (!err) {
8823                                 jump->mat = nexthdr[i].jump;
8824                                 adapter->jump_tables[link_uhtid] = jump;
8825                                 break;
8826                         }
8827                 }
8828                 return 0;
8829         }
8830
8831         input = kzalloc(sizeof(*input), GFP_KERNEL);
8832         if (!input)
8833                 return -ENOMEM;
8834         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8835         if (!mask) {
8836                 err = -ENOMEM;
8837                 goto free_input;
8838         }
8839
8840         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8841                 if ((adapter->jump_tables[uhtid])->input)
8842                         memcpy(input, (adapter->jump_tables[uhtid])->input,
8843                                sizeof(*input));
8844                 if ((adapter->jump_tables[uhtid])->mask)
8845                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8846                                sizeof(*mask));
8847
8848                 /* Lookup in all child hash tables if this location is already
8849                  * filled with a filter
8850                  */
8851                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8852                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
8853
8854                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
8855                                 e_err(drv, "Filter exists in location: %x\n",
8856                                       loc);
8857                                 err = -EINVAL;
8858                                 goto err_out;
8859                         }
8860                 }
8861         }
8862         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8863         if (err)
8864                 goto err_out;
8865
8866         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8867                                &queue);
8868         if (err < 0)
8869                 goto err_out;
8870
8871         input->sw_idx = loc;
8872
8873         spin_lock(&adapter->fdir_perfect_lock);
8874
8875         if (hlist_empty(&adapter->fdir_filter_list)) {
8876                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8877                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8878                 if (err)
8879                         goto err_out_w_lock;
8880         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8881                 err = -EINVAL;
8882                 goto err_out_w_lock;
8883         }
8884
8885         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8886         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8887                                                     input->sw_idx, queue);
8888         if (!err)
8889                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8890         spin_unlock(&adapter->fdir_perfect_lock);
8891
8892         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8893                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8894
8895         kfree(mask);
8896         return err;
8897 err_out_w_lock:
8898         spin_unlock(&adapter->fdir_perfect_lock);
8899 err_out:
8900         kfree(mask);
8901 free_input:
8902         kfree(input);
8903 free_jump:
8904         kfree(jump);
8905         return err;
8906 }
8907
8908 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8909                             struct tc_to_netdev *tc)
8910 {
8911         struct ixgbe_adapter *adapter = netdev_priv(dev);
8912
8913         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8914             tc->type == TC_SETUP_CLSU32) {
8915                 switch (tc->cls_u32->command) {
8916                 case TC_CLSU32_NEW_KNODE:
8917                 case TC_CLSU32_REPLACE_KNODE:
8918                         return ixgbe_configure_clsu32(adapter,
8919                                                       proto, tc->cls_u32);
8920                 case TC_CLSU32_DELETE_KNODE:
8921                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8922                 case TC_CLSU32_NEW_HNODE:
8923                 case TC_CLSU32_REPLACE_HNODE:
8924                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8925                                                                 tc->cls_u32);
8926                 case TC_CLSU32_DELETE_HNODE:
8927                         return ixgbe_configure_clsu32_del_hnode(adapter,
8928                                                                 tc->cls_u32);
8929                 default:
8930                         return -EINVAL;
8931                 }
8932         }
8933
8934         if (tc->type != TC_SETUP_MQPRIO)
8935                 return -EINVAL;
8936
8937         return ixgbe_setup_tc(dev, tc->tc);
8938 }
8939
8940 #ifdef CONFIG_PCI_IOV
8941 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8942 {
8943         struct net_device *netdev = adapter->netdev;
8944
8945         rtnl_lock();
8946         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8947         rtnl_unlock();
8948 }
8949
8950 #endif
8951 void ixgbe_do_reset(struct net_device *netdev)
8952 {
8953         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8954
8955         if (netif_running(netdev))
8956                 ixgbe_reinit_locked(adapter);
8957         else
8958                 ixgbe_reset(adapter);
8959 }
8960
8961 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8962                                             netdev_features_t features)
8963 {
8964         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8965
8966         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8967         if (!(features & NETIF_F_RXCSUM))
8968                 features &= ~NETIF_F_LRO;
8969
8970         /* Turn off LRO if not RSC capable */
8971         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8972                 features &= ~NETIF_F_LRO;
8973
8974         return features;
8975 }
8976
8977 static int ixgbe_set_features(struct net_device *netdev,
8978                               netdev_features_t features)
8979 {
8980         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8981         netdev_features_t changed = netdev->features ^ features;
8982         bool need_reset = false;
8983
8984         /* Make sure RSC matches LRO, reset if change */
8985         if (!(features & NETIF_F_LRO)) {
8986                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8987                         need_reset = true;
8988                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8989         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8990                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8991                 if (adapter->rx_itr_setting == 1 ||
8992                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8993                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8994                         need_reset = true;
8995                 } else if ((changed ^ features) & NETIF_F_LRO) {
8996                         e_info(probe, "rx-usecs set too low, "
8997                                "disabling RSC\n");
8998                 }
8999         }
9000
9001         /*
9002          * Check if Flow Director n-tuple support or hw_tc support was
9003          * enabled or disabled.  If the state changed, we need to reset.
9004          */
9005         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9006                 /* turn off ATR, enable perfect filters and reset */
9007                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9008                         need_reset = true;
9009
9010                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9011                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9012         } else {
9013                 /* turn off perfect filters, enable ATR and reset */
9014                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9015                         need_reset = true;
9016
9017                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9018
9019                 /* We cannot enable ATR if SR-IOV is enabled */
9020                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9021                     /* We cannot enable ATR if we have 2 or more tcs */
9022                     (netdev_get_num_tc(netdev) > 1) ||
9023                     /* We cannot enable ATR if RSS is disabled */
9024                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9025                     /* A sample rate of 0 indicates ATR disabled */
9026                     (!adapter->atr_sample_rate))
9027                         ; /* do nothing not supported */
9028                 else /* otherwise supported and set the flag */
9029                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9030         }
9031
9032         if (changed & NETIF_F_RXALL)
9033                 need_reset = true;
9034
9035         netdev->features = features;
9036
9037         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9038                 if (features & NETIF_F_RXCSUM) {
9039                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9040                 } else {
9041                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9042
9043                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9044                 }
9045         }
9046
9047         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9048                 if (features & NETIF_F_RXCSUM) {
9049                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9050                 } else {
9051                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9052
9053                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9054                 }
9055         }
9056
9057         if (need_reset)
9058                 ixgbe_do_reset(netdev);
9059         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9060                             NETIF_F_HW_VLAN_CTAG_FILTER))
9061                 ixgbe_set_rx_mode(netdev);
9062
9063         return 0;
9064 }
9065
9066 /**
9067  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9068  * @dev: The port's netdev
9069  * @ti: Tunnel endpoint information
9070  **/
9071 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9072                                       struct udp_tunnel_info *ti)
9073 {
9074         struct ixgbe_adapter *adapter = netdev_priv(dev);
9075         struct ixgbe_hw *hw = &adapter->hw;
9076         __be16 port = ti->port;
9077         u32 port_shift = 0;
9078         u32 reg;
9079
9080         if (ti->sa_family != AF_INET)
9081                 return;
9082
9083         switch (ti->type) {
9084         case UDP_TUNNEL_TYPE_VXLAN:
9085                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9086                         return;
9087
9088                 if (adapter->vxlan_port == port)
9089                         return;
9090
9091                 if (adapter->vxlan_port) {
9092                         netdev_info(dev,
9093                                     "VXLAN port %d set, not adding port %d\n",
9094                                     ntohs(adapter->vxlan_port),
9095                                     ntohs(port));
9096                         return;
9097                 }
9098
9099                 adapter->vxlan_port = port;
9100                 break;
9101         case UDP_TUNNEL_TYPE_GENEVE:
9102                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9103                         return;
9104
9105                 if (adapter->geneve_port == port)
9106                         return;
9107
9108                 if (adapter->geneve_port) {
9109                         netdev_info(dev,
9110                                     "GENEVE port %d set, not adding port %d\n",
9111                                     ntohs(adapter->geneve_port),
9112                                     ntohs(port));
9113                         return;
9114                 }
9115
9116                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9117                 adapter->geneve_port = port;
9118                 break;
9119         default:
9120                 return;
9121         }
9122
9123         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9124         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9125 }
9126
9127 /**
9128  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9129  * @dev: The port's netdev
9130  * @ti: Tunnel endpoint information
9131  **/
9132 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9133                                       struct udp_tunnel_info *ti)
9134 {
9135         struct ixgbe_adapter *adapter = netdev_priv(dev);
9136         u32 port_mask;
9137
9138         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9139             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9140                 return;
9141
9142         if (ti->sa_family != AF_INET)
9143                 return;
9144
9145         switch (ti->type) {
9146         case UDP_TUNNEL_TYPE_VXLAN:
9147                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9148                         return;
9149
9150                 if (adapter->vxlan_port != ti->port) {
9151                         netdev_info(dev, "VXLAN port %d not found\n",
9152                                     ntohs(ti->port));
9153                         return;
9154                 }
9155
9156                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9157                 break;
9158         case UDP_TUNNEL_TYPE_GENEVE:
9159                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9160                         return;
9161
9162                 if (adapter->geneve_port != ti->port) {
9163                         netdev_info(dev, "GENEVE port %d not found\n",
9164                                     ntohs(ti->port));
9165                         return;
9166                 }
9167
9168                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9169                 break;
9170         default:
9171                 return;
9172         }
9173
9174         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9175         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9176 }
9177
9178 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9179                              struct net_device *dev,
9180                              const unsigned char *addr, u16 vid,
9181                              u16 flags)
9182 {
9183         /* guarantee we can provide a unique filter for the unicast address */
9184         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9185                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9186                 u16 pool = VMDQ_P(0);
9187
9188                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9189                         return -ENOMEM;
9190         }
9191
9192         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9193 }
9194
9195 /**
9196  * ixgbe_configure_bridge_mode - set various bridge modes
9197  * @adapter - the private structure
9198  * @mode - requested bridge mode
9199  *
9200  * Configure some settings require for various bridge modes.
9201  **/
9202 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9203                                        __u16 mode)
9204 {
9205         struct ixgbe_hw *hw = &adapter->hw;
9206         unsigned int p, num_pools;
9207         u32 vmdctl;
9208
9209         switch (mode) {
9210         case BRIDGE_MODE_VEPA:
9211                 /* disable Tx loopback, rely on switch hairpin mode */
9212                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9213
9214                 /* must enable Rx switching replication to allow multicast
9215                  * packet reception on all VFs, and to enable source address
9216                  * pruning.
9217                  */
9218                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9219                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9220                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9221
9222                 /* enable Rx source address pruning. Note, this requires
9223                  * replication to be enabled or else it does nothing.
9224                  */
9225                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9226                 for (p = 0; p < num_pools; p++) {
9227                         if (hw->mac.ops.set_source_address_pruning)
9228                                 hw->mac.ops.set_source_address_pruning(hw,
9229                                                                        true,
9230                                                                        p);
9231                 }
9232                 break;
9233         case BRIDGE_MODE_VEB:
9234                 /* enable Tx loopback for internal VF/PF communication */
9235                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9236                                 IXGBE_PFDTXGSWC_VT_LBEN);
9237
9238                 /* disable Rx switching replication unless we have SR-IOV
9239                  * virtual functions
9240                  */
9241                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9242                 if (!adapter->num_vfs)
9243                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9244                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9245
9246                 /* disable Rx source address pruning, since we don't expect to
9247                  * be receiving external loopback of our transmitted frames.
9248                  */
9249                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9250                 for (p = 0; p < num_pools; p++) {
9251                         if (hw->mac.ops.set_source_address_pruning)
9252                                 hw->mac.ops.set_source_address_pruning(hw,
9253                                                                        false,
9254                                                                        p);
9255                 }
9256                 break;
9257         default:
9258                 return -EINVAL;
9259         }
9260
9261         adapter->bridge_mode = mode;
9262
9263         e_info(drv, "enabling bridge mode: %s\n",
9264                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9265
9266         return 0;
9267 }
9268
9269 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9270                                     struct nlmsghdr *nlh, u16 flags)
9271 {
9272         struct ixgbe_adapter *adapter = netdev_priv(dev);
9273         struct nlattr *attr, *br_spec;
9274         int rem;
9275
9276         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9277                 return -EOPNOTSUPP;
9278
9279         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9280         if (!br_spec)
9281                 return -EINVAL;
9282
9283         nla_for_each_nested(attr, br_spec, rem) {
9284                 int status;
9285                 __u16 mode;
9286
9287                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9288                         continue;
9289
9290                 if (nla_len(attr) < sizeof(mode))
9291                         return -EINVAL;
9292
9293                 mode = nla_get_u16(attr);
9294                 status = ixgbe_configure_bridge_mode(adapter, mode);
9295                 if (status)
9296                         return status;
9297
9298                 break;
9299         }
9300
9301         return 0;
9302 }
9303
9304 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9305                                     struct net_device *dev,
9306                                     u32 filter_mask, int nlflags)
9307 {
9308         struct ixgbe_adapter *adapter = netdev_priv(dev);
9309
9310         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9311                 return 0;
9312
9313         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9314                                        adapter->bridge_mode, 0, 0, nlflags,
9315                                        filter_mask, NULL);
9316 }
9317
9318 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9319 {
9320         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9321         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9322         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9323         unsigned int limit;
9324         int pool, err;
9325
9326         /* Hardware has a limited number of available pools. Each VF, and the
9327          * PF require a pool. Check to ensure we don't attempt to use more
9328          * then the available number of pools.
9329          */
9330         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9331                 return ERR_PTR(-EINVAL);
9332
9333 #ifdef CONFIG_RPS
9334         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9335                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9336                             vdev->name);
9337                 return ERR_PTR(-EINVAL);
9338         }
9339 #endif
9340         /* Check for hardware restriction on number of rx/tx queues */
9341         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9342             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9343                 netdev_info(pdev,
9344                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9345                             pdev->name);
9346                 return ERR_PTR(-EINVAL);
9347         }
9348
9349         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9350               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9351             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9352                 return ERR_PTR(-EBUSY);
9353
9354         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9355         if (!fwd_adapter)
9356                 return ERR_PTR(-ENOMEM);
9357
9358         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9359         adapter->num_rx_pools++;
9360         set_bit(pool, &adapter->fwd_bitmask);
9361         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9362
9363         /* Enable VMDq flag so device will be set in VM mode */
9364         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9365         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9366         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9367
9368         /* Force reinit of ring allocation with VMDQ enabled */
9369         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9370         if (err)
9371                 goto fwd_add_err;
9372         fwd_adapter->pool = pool;
9373         fwd_adapter->real_adapter = adapter;
9374
9375         if (netif_running(pdev)) {
9376                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9377                 if (err)
9378                         goto fwd_add_err;
9379                 netif_tx_start_all_queues(vdev);
9380         }
9381
9382         return fwd_adapter;
9383 fwd_add_err:
9384         /* unwind counter and free adapter struct */
9385         netdev_info(pdev,
9386                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9387         clear_bit(pool, &adapter->fwd_bitmask);
9388         adapter->num_rx_pools--;
9389         kfree(fwd_adapter);
9390         return ERR_PTR(err);
9391 }
9392
9393 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9394 {
9395         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9396         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9397         unsigned int limit;
9398
9399         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9400         adapter->num_rx_pools--;
9401
9402         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9403         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9404         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9405         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9406         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9407                    fwd_adapter->pool, adapter->num_rx_pools,
9408                    fwd_adapter->rx_base_queue,
9409                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9410                    adapter->fwd_bitmask);
9411         kfree(fwd_adapter);
9412 }
9413
9414 #define IXGBE_MAX_MAC_HDR_LEN           127
9415 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9416
9417 static netdev_features_t
9418 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9419                      netdev_features_t features)
9420 {
9421         unsigned int network_hdr_len, mac_hdr_len;
9422
9423         /* Make certain the headers can be described by a context descriptor */
9424         mac_hdr_len = skb_network_header(skb) - skb->data;
9425         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9426                 return features & ~(NETIF_F_HW_CSUM |
9427                                     NETIF_F_SCTP_CRC |
9428                                     NETIF_F_HW_VLAN_CTAG_TX |
9429                                     NETIF_F_TSO |
9430                                     NETIF_F_TSO6);
9431
9432         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9433         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9434                 return features & ~(NETIF_F_HW_CSUM |
9435                                     NETIF_F_SCTP_CRC |
9436                                     NETIF_F_TSO |
9437                                     NETIF_F_TSO6);
9438
9439         /* We can only support IPV4 TSO in tunnels if we can mangle the
9440          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9441          */
9442         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9443                 features &= ~NETIF_F_TSO;
9444
9445         return features;
9446 }
9447
9448 static const struct net_device_ops ixgbe_netdev_ops = {
9449         .ndo_open               = ixgbe_open,
9450         .ndo_stop               = ixgbe_close,
9451         .ndo_start_xmit         = ixgbe_xmit_frame,
9452         .ndo_select_queue       = ixgbe_select_queue,
9453         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9454         .ndo_validate_addr      = eth_validate_addr,
9455         .ndo_set_mac_address    = ixgbe_set_mac,
9456         .ndo_change_mtu         = ixgbe_change_mtu,
9457         .ndo_tx_timeout         = ixgbe_tx_timeout,
9458         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9459         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9460         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9461         .ndo_do_ioctl           = ixgbe_ioctl,
9462         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9463         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9464         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9465         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9466         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9467         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9468         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9469         .ndo_get_stats64        = ixgbe_get_stats64,
9470         .ndo_setup_tc           = __ixgbe_setup_tc,
9471 #ifdef CONFIG_NET_POLL_CONTROLLER
9472         .ndo_poll_controller    = ixgbe_netpoll,
9473 #endif
9474 #ifdef IXGBE_FCOE
9475         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9476         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9477         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9478         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9479         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9480         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9481         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9482 #endif /* IXGBE_FCOE */
9483         .ndo_set_features = ixgbe_set_features,
9484         .ndo_fix_features = ixgbe_fix_features,
9485         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9486         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9487         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9488         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9489         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9490         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9491         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
9492         .ndo_features_check     = ixgbe_features_check,
9493 };
9494
9495 /**
9496  * ixgbe_enumerate_functions - Get the number of ports this device has
9497  * @adapter: adapter structure
9498  *
9499  * This function enumerates the phsyical functions co-located on a single slot,
9500  * in order to determine how many ports a device has. This is most useful in
9501  * determining the required GT/s of PCIe bandwidth necessary for optimal
9502  * performance.
9503  **/
9504 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9505 {
9506         struct pci_dev *entry, *pdev = adapter->pdev;
9507         int physfns = 0;
9508
9509         /* Some cards can not use the generic count PCIe functions method,
9510          * because they are behind a parent switch, so we hardcode these with
9511          * the correct number of functions.
9512          */
9513         if (ixgbe_pcie_from_parent(&adapter->hw))
9514                 physfns = 4;
9515
9516         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9517                 /* don't count virtual functions */
9518                 if (entry->is_virtfn)
9519                         continue;
9520
9521                 /* When the devices on the bus don't all match our device ID,
9522                  * we can't reliably determine the correct number of
9523                  * functions. This can occur if a function has been direct
9524                  * attached to a virtual machine using VT-d, for example. In
9525                  * this case, simply return -1 to indicate this.
9526                  */
9527                 if ((entry->vendor != pdev->vendor) ||
9528                     (entry->device != pdev->device))
9529                         return -1;
9530
9531                 physfns++;
9532         }
9533
9534         return physfns;
9535 }
9536
9537 /**
9538  * ixgbe_wol_supported - Check whether device supports WoL
9539  * @adapter: the adapter private structure
9540  * @device_id: the device ID
9541  * @subdev_id: the subsystem device ID
9542  *
9543  * This function is used by probe and ethtool to determine
9544  * which devices have WoL support
9545  *
9546  **/
9547 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9548                          u16 subdevice_id)
9549 {
9550         struct ixgbe_hw *hw = &adapter->hw;
9551         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9552
9553         /* WOL not supported on 82598 */
9554         if (hw->mac.type == ixgbe_mac_82598EB)
9555                 return false;
9556
9557         /* check eeprom to see if WOL is enabled for X540 and newer */
9558         if (hw->mac.type >= ixgbe_mac_X540) {
9559                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9560                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9561                      (hw->bus.func == 0)))
9562                         return true;
9563         }
9564
9565         /* WOL is determined based on device IDs for 82599 MACs */
9566         switch (device_id) {
9567         case IXGBE_DEV_ID_82599_SFP:
9568                 /* Only these subdevices could supports WOL */
9569                 switch (subdevice_id) {
9570                 case IXGBE_SUBDEV_ID_82599_560FLR:
9571                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9572                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9573                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9574                         /* only support first port */
9575                         if (hw->bus.func != 0)
9576                                 break;
9577                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9578                 case IXGBE_SUBDEV_ID_82599_SFP:
9579                 case IXGBE_SUBDEV_ID_82599_RNDC:
9580                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9581                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9582                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9583                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9584                         return true;
9585                 }
9586                 break;
9587         case IXGBE_DEV_ID_82599EN_SFP:
9588                 /* Only these subdevices support WOL */
9589                 switch (subdevice_id) {
9590                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9591                         return true;
9592                 }
9593                 break;
9594         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9595                 /* All except this subdevice support WOL */
9596                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9597                         return true;
9598                 break;
9599         case IXGBE_DEV_ID_82599_KX4:
9600                 return  true;
9601         default:
9602                 break;
9603         }
9604
9605         return false;
9606 }
9607
9608 /**
9609  * ixgbe_probe - Device Initialization Routine
9610  * @pdev: PCI device information struct
9611  * @ent: entry in ixgbe_pci_tbl
9612  *
9613  * Returns 0 on success, negative on failure
9614  *
9615  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9616  * The OS initialization, configuring of the adapter private structure,
9617  * and a hardware reset occur.
9618  **/
9619 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9620 {
9621         struct net_device *netdev;
9622         struct ixgbe_adapter *adapter = NULL;
9623         struct ixgbe_hw *hw;
9624         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9625         int i, err, pci_using_dac, expected_gts;
9626         unsigned int indices = MAX_TX_QUEUES;
9627         u8 part_str[IXGBE_PBANUM_LENGTH];
9628         bool disable_dev = false;
9629 #ifdef IXGBE_FCOE
9630         u16 device_caps;
9631 #endif
9632         u32 eec;
9633
9634         /* Catch broken hardware that put the wrong VF device ID in
9635          * the PCIe SR-IOV capability.
9636          */
9637         if (pdev->is_virtfn) {
9638                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9639                      pci_name(pdev), pdev->vendor, pdev->device);
9640                 return -EINVAL;
9641         }
9642
9643         err = pci_enable_device_mem(pdev);
9644         if (err)
9645                 return err;
9646
9647         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9648                 pci_using_dac = 1;
9649         } else {
9650                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9651                 if (err) {
9652                         dev_err(&pdev->dev,
9653                                 "No usable DMA configuration, aborting\n");
9654                         goto err_dma;
9655                 }
9656                 pci_using_dac = 0;
9657         }
9658
9659         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9660         if (err) {
9661                 dev_err(&pdev->dev,
9662                         "pci_request_selected_regions failed 0x%x\n", err);
9663                 goto err_pci_reg;
9664         }
9665
9666         pci_enable_pcie_error_reporting(pdev);
9667
9668         pci_set_master(pdev);
9669         pci_save_state(pdev);
9670
9671         if (ii->mac == ixgbe_mac_82598EB) {
9672 #ifdef CONFIG_IXGBE_DCB
9673                 /* 8 TC w/ 4 queues per TC */
9674                 indices = 4 * MAX_TRAFFIC_CLASS;
9675 #else
9676                 indices = IXGBE_MAX_RSS_INDICES;
9677 #endif
9678         }
9679
9680         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9681         if (!netdev) {
9682                 err = -ENOMEM;
9683                 goto err_alloc_etherdev;
9684         }
9685
9686         SET_NETDEV_DEV(netdev, &pdev->dev);
9687
9688         adapter = netdev_priv(netdev);
9689
9690         adapter->netdev = netdev;
9691         adapter->pdev = pdev;
9692         hw = &adapter->hw;
9693         hw->back = adapter;
9694         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9695
9696         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9697                               pci_resource_len(pdev, 0));
9698         adapter->io_addr = hw->hw_addr;
9699         if (!hw->hw_addr) {
9700                 err = -EIO;
9701                 goto err_ioremap;
9702         }
9703
9704         netdev->netdev_ops = &ixgbe_netdev_ops;
9705         ixgbe_set_ethtool_ops(netdev);
9706         netdev->watchdog_timeo = 5 * HZ;
9707         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9708
9709         /* Setup hw api */
9710         hw->mac.ops   = *ii->mac_ops;
9711         hw->mac.type  = ii->mac;
9712         hw->mvals     = ii->mvals;
9713         if (ii->link_ops)
9714                 hw->link.ops  = *ii->link_ops;
9715
9716         /* EEPROM */
9717         hw->eeprom.ops = *ii->eeprom_ops;
9718         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9719         if (ixgbe_removed(hw->hw_addr)) {
9720                 err = -EIO;
9721                 goto err_ioremap;
9722         }
9723         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9724         if (!(eec & BIT(8)))
9725                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9726
9727         /* PHY */
9728         hw->phy.ops = *ii->phy_ops;
9729         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9730         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9731         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9732         hw->phy.mdio.mmds = 0;
9733         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9734         hw->phy.mdio.dev = netdev;
9735         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9736         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9737
9738         /* setup the private structure */
9739         err = ixgbe_sw_init(adapter, ii);
9740         if (err)
9741                 goto err_sw_init;
9742
9743         /* Make sure the SWFW semaphore is in a valid state */
9744         if (hw->mac.ops.init_swfw_sync)
9745                 hw->mac.ops.init_swfw_sync(hw);
9746
9747         /* Make it possible the adapter to be woken up via WOL */
9748         switch (adapter->hw.mac.type) {
9749         case ixgbe_mac_82599EB:
9750         case ixgbe_mac_X540:
9751         case ixgbe_mac_X550:
9752         case ixgbe_mac_X550EM_x:
9753         case ixgbe_mac_x550em_a:
9754                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9755                 break;
9756         default:
9757                 break;
9758         }
9759
9760         /*
9761          * If there is a fan on this device and it has failed log the
9762          * failure.
9763          */
9764         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9765                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9766                 if (esdp & IXGBE_ESDP_SDP1)
9767                         e_crit(probe, "Fan has stopped, replace the adapter\n");
9768         }
9769
9770         if (allow_unsupported_sfp)
9771                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9772
9773         /* reset_hw fills in the perm_addr as well */
9774         hw->phy.reset_if_overtemp = true;
9775         err = hw->mac.ops.reset_hw(hw);
9776         hw->phy.reset_if_overtemp = false;
9777         ixgbe_set_eee_capable(adapter);
9778         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9779                 err = 0;
9780         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9781                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9782                 e_dev_err("Reload the driver after installing a supported module.\n");
9783                 goto err_sw_init;
9784         } else if (err) {
9785                 e_dev_err("HW Init failed: %d\n", err);
9786                 goto err_sw_init;
9787         }
9788
9789 #ifdef CONFIG_PCI_IOV
9790         /* SR-IOV not supported on the 82598 */
9791         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9792                 goto skip_sriov;
9793         /* Mailbox */
9794         ixgbe_init_mbx_params_pf(hw);
9795         hw->mbx.ops = ii->mbx_ops;
9796         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9797         ixgbe_enable_sriov(adapter);
9798 skip_sriov:
9799
9800 #endif
9801         netdev->features = NETIF_F_SG |
9802                            NETIF_F_TSO |
9803                            NETIF_F_TSO6 |
9804                            NETIF_F_RXHASH |
9805                            NETIF_F_RXCSUM |
9806                            NETIF_F_HW_CSUM;
9807
9808 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9809                                     NETIF_F_GSO_GRE_CSUM | \
9810                                     NETIF_F_GSO_IPXIP4 | \
9811                                     NETIF_F_GSO_IPXIP6 | \
9812                                     NETIF_F_GSO_UDP_TUNNEL | \
9813                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
9814
9815         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9816         netdev->features |= NETIF_F_GSO_PARTIAL |
9817                             IXGBE_GSO_PARTIAL_FEATURES;
9818
9819         if (hw->mac.type >= ixgbe_mac_82599EB)
9820                 netdev->features |= NETIF_F_SCTP_CRC;
9821
9822         /* copy netdev features into list of user selectable features */
9823         netdev->hw_features |= netdev->features |
9824                                NETIF_F_HW_VLAN_CTAG_FILTER |
9825                                NETIF_F_HW_VLAN_CTAG_RX |
9826                                NETIF_F_HW_VLAN_CTAG_TX |
9827                                NETIF_F_RXALL |
9828                                NETIF_F_HW_L2FW_DOFFLOAD;
9829
9830         if (hw->mac.type >= ixgbe_mac_82599EB)
9831                 netdev->hw_features |= NETIF_F_NTUPLE |
9832                                        NETIF_F_HW_TC;
9833
9834         if (pci_using_dac)
9835                 netdev->features |= NETIF_F_HIGHDMA;
9836
9837         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9838         netdev->hw_enc_features |= netdev->vlan_features;
9839         netdev->mpls_features |= NETIF_F_HW_CSUM;
9840
9841         /* set this bit last since it cannot be part of vlan_features */
9842         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9843                             NETIF_F_HW_VLAN_CTAG_RX |
9844                             NETIF_F_HW_VLAN_CTAG_TX;
9845
9846         netdev->priv_flags |= IFF_UNICAST_FLT;
9847         netdev->priv_flags |= IFF_SUPP_NOFCS;
9848
9849         /* MTU range: 68 - 9710 */
9850         netdev->min_mtu = ETH_MIN_MTU;
9851         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
9852
9853 #ifdef CONFIG_IXGBE_DCB
9854         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9855                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
9856 #endif
9857
9858 #ifdef IXGBE_FCOE
9859         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9860                 unsigned int fcoe_l;
9861
9862                 if (hw->mac.ops.get_device_caps) {
9863                         hw->mac.ops.get_device_caps(hw, &device_caps);
9864                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9865                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9866                 }
9867
9868
9869                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9870                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9871
9872                 netdev->features |= NETIF_F_FSO |
9873                                     NETIF_F_FCOE_CRC;
9874
9875                 netdev->vlan_features |= NETIF_F_FSO |
9876                                          NETIF_F_FCOE_CRC |
9877                                          NETIF_F_FCOE_MTU;
9878         }
9879 #endif /* IXGBE_FCOE */
9880
9881         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9882                 netdev->hw_features |= NETIF_F_LRO;
9883         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9884                 netdev->features |= NETIF_F_LRO;
9885
9886         /* make sure the EEPROM is good */
9887         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9888                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9889                 err = -EIO;
9890                 goto err_sw_init;
9891         }
9892
9893         eth_platform_get_mac_address(&adapter->pdev->dev,
9894                                      adapter->hw.mac.perm_addr);
9895
9896         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9897
9898         if (!is_valid_ether_addr(netdev->dev_addr)) {
9899                 e_dev_err("invalid MAC address\n");
9900                 err = -EIO;
9901                 goto err_sw_init;
9902         }
9903
9904         /* Set hw->mac.addr to permanent MAC address */
9905         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9906         ixgbe_mac_set_default_filter(adapter);
9907
9908         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9909                     (unsigned long) adapter);
9910
9911         if (ixgbe_removed(hw->hw_addr)) {
9912                 err = -EIO;
9913                 goto err_sw_init;
9914         }
9915         INIT_WORK(&adapter->service_task, ixgbe_service_task);
9916         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9917         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9918
9919         err = ixgbe_init_interrupt_scheme(adapter);
9920         if (err)
9921                 goto err_sw_init;
9922
9923         /* WOL not supported for all devices */
9924         adapter->wol = 0;
9925         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9926         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9927                                                 pdev->subsystem_device);
9928         if (hw->wol_enabled)
9929                 adapter->wol = IXGBE_WUFC_MAG;
9930
9931         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9932
9933         /* save off EEPROM version number */
9934         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9935         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9936
9937         /* pick up the PCI bus settings for reporting later */
9938         if (ixgbe_pcie_from_parent(hw))
9939                 ixgbe_get_parent_bus_info(adapter);
9940         else
9941                  hw->mac.ops.get_bus_info(hw);
9942
9943         /* calculate the expected PCIe bandwidth required for optimal
9944          * performance. Note that some older parts will never have enough
9945          * bandwidth due to being older generation PCIe parts. We clamp these
9946          * parts to ensure no warning is displayed if it can't be fixed.
9947          */
9948         switch (hw->mac.type) {
9949         case ixgbe_mac_82598EB:
9950                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9951                 break;
9952         default:
9953                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9954                 break;
9955         }
9956
9957         /* don't check link if we failed to enumerate functions */
9958         if (expected_gts > 0)
9959                 ixgbe_check_minimum_link(adapter, expected_gts);
9960
9961         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9962         if (err)
9963                 strlcpy(part_str, "Unknown", sizeof(part_str));
9964         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9965                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9966                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9967                            part_str);
9968         else
9969                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9970                            hw->mac.type, hw->phy.type, part_str);
9971
9972         e_dev_info("%pM\n", netdev->dev_addr);
9973
9974         /* reset the hardware with the new settings */
9975         err = hw->mac.ops.start_hw(hw);
9976         if (err == IXGBE_ERR_EEPROM_VERSION) {
9977                 /* We are running on a pre-production device, log a warning */
9978                 e_dev_warn("This device is a pre-production adapter/LOM. "
9979                            "Please be aware there may be issues associated "
9980                            "with your hardware.  If you are experiencing "
9981                            "problems please contact your Intel or hardware "
9982                            "representative who provided you with this "
9983                            "hardware.\n");
9984         }
9985         strcpy(netdev->name, "eth%d");
9986         err = register_netdev(netdev);
9987         if (err)
9988                 goto err_register;
9989
9990         pci_set_drvdata(pdev, adapter);
9991
9992         /* power down the optics for 82599 SFP+ fiber */
9993         if (hw->mac.ops.disable_tx_laser)
9994                 hw->mac.ops.disable_tx_laser(hw);
9995
9996         /* carrier off reporting is important to ethtool even BEFORE open */
9997         netif_carrier_off(netdev);
9998
9999 #ifdef CONFIG_IXGBE_DCA
10000         if (dca_add_requester(&pdev->dev) == 0) {
10001                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10002                 ixgbe_setup_dca(adapter);
10003         }
10004 #endif
10005         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10006                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10007                 for (i = 0; i < adapter->num_vfs; i++)
10008                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10009         }
10010
10011         /* firmware requires driver version to be 0xFFFFFFFF
10012          * since os does not support feature
10013          */
10014         if (hw->mac.ops.set_fw_drv_ver)
10015                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10016                                            sizeof(ixgbe_driver_version) - 1,
10017                                            ixgbe_driver_version);
10018
10019         /* add san mac addr to netdev */
10020         ixgbe_add_sanmac_netdev(netdev);
10021
10022         e_dev_info("%s\n", ixgbe_default_device_descr);
10023
10024 #ifdef CONFIG_IXGBE_HWMON
10025         if (ixgbe_sysfs_init(adapter))
10026                 e_err(probe, "failed to allocate sysfs resources\n");
10027 #endif /* CONFIG_IXGBE_HWMON */
10028
10029         ixgbe_dbg_adapter_init(adapter);
10030
10031         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10032         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10033                 hw->mac.ops.setup_link(hw,
10034                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10035                         true);
10036
10037         return 0;
10038
10039 err_register:
10040         ixgbe_release_hw_control(adapter);
10041         ixgbe_clear_interrupt_scheme(adapter);
10042 err_sw_init:
10043         ixgbe_disable_sriov(adapter);
10044         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10045         iounmap(adapter->io_addr);
10046         kfree(adapter->jump_tables[0]);
10047         kfree(adapter->mac_table);
10048 err_ioremap:
10049         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10050         free_netdev(netdev);
10051 err_alloc_etherdev:
10052         pci_release_mem_regions(pdev);
10053 err_pci_reg:
10054 err_dma:
10055         if (!adapter || disable_dev)
10056                 pci_disable_device(pdev);
10057         return err;
10058 }
10059
10060 /**
10061  * ixgbe_remove - Device Removal Routine
10062  * @pdev: PCI device information struct
10063  *
10064  * ixgbe_remove is called by the PCI subsystem to alert the driver
10065  * that it should release a PCI device.  The could be caused by a
10066  * Hot-Plug event, or because the driver is going to be removed from
10067  * memory.
10068  **/
10069 static void ixgbe_remove(struct pci_dev *pdev)
10070 {
10071         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10072         struct net_device *netdev;
10073         bool disable_dev;
10074         int i;
10075
10076         /* if !adapter then we already cleaned up in probe */
10077         if (!adapter)
10078                 return;
10079
10080         netdev  = adapter->netdev;
10081         ixgbe_dbg_adapter_exit(adapter);
10082
10083         set_bit(__IXGBE_REMOVING, &adapter->state);
10084         cancel_work_sync(&adapter->service_task);
10085
10086
10087 #ifdef CONFIG_IXGBE_DCA
10088         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10089                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10090                 dca_remove_requester(&pdev->dev);
10091                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10092                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10093         }
10094
10095 #endif
10096 #ifdef CONFIG_IXGBE_HWMON
10097         ixgbe_sysfs_exit(adapter);
10098 #endif /* CONFIG_IXGBE_HWMON */
10099
10100         /* remove the added san mac */
10101         ixgbe_del_sanmac_netdev(netdev);
10102
10103 #ifdef CONFIG_PCI_IOV
10104         ixgbe_disable_sriov(adapter);
10105 #endif
10106         if (netdev->reg_state == NETREG_REGISTERED)
10107                 unregister_netdev(netdev);
10108
10109         ixgbe_clear_interrupt_scheme(adapter);
10110
10111         ixgbe_release_hw_control(adapter);
10112
10113 #ifdef CONFIG_DCB
10114         kfree(adapter->ixgbe_ieee_pfc);
10115         kfree(adapter->ixgbe_ieee_ets);
10116
10117 #endif
10118         iounmap(adapter->io_addr);
10119         pci_release_mem_regions(pdev);
10120
10121         e_dev_info("complete\n");
10122
10123         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10124                 if (adapter->jump_tables[i]) {
10125                         kfree(adapter->jump_tables[i]->input);
10126                         kfree(adapter->jump_tables[i]->mask);
10127                 }
10128                 kfree(adapter->jump_tables[i]);
10129         }
10130
10131         kfree(adapter->mac_table);
10132         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10133         free_netdev(netdev);
10134
10135         pci_disable_pcie_error_reporting(pdev);
10136
10137         if (disable_dev)
10138                 pci_disable_device(pdev);
10139 }
10140
10141 /**
10142  * ixgbe_io_error_detected - called when PCI error is detected
10143  * @pdev: Pointer to PCI device
10144  * @state: The current pci connection state
10145  *
10146  * This function is called after a PCI bus error affecting
10147  * this device has been detected.
10148  */
10149 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10150                                                 pci_channel_state_t state)
10151 {
10152         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10153         struct net_device *netdev = adapter->netdev;
10154
10155 #ifdef CONFIG_PCI_IOV
10156         struct ixgbe_hw *hw = &adapter->hw;
10157         struct pci_dev *bdev, *vfdev;
10158         u32 dw0, dw1, dw2, dw3;
10159         int vf, pos;
10160         u16 req_id, pf_func;
10161
10162         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10163             adapter->num_vfs == 0)
10164                 goto skip_bad_vf_detection;
10165
10166         bdev = pdev->bus->self;
10167         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10168                 bdev = bdev->bus->self;
10169
10170         if (!bdev)
10171                 goto skip_bad_vf_detection;
10172
10173         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10174         if (!pos)
10175                 goto skip_bad_vf_detection;
10176
10177         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10178         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10179         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10180         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10181         if (ixgbe_removed(hw->hw_addr))
10182                 goto skip_bad_vf_detection;
10183
10184         req_id = dw1 >> 16;
10185         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10186         if (!(req_id & 0x0080))
10187                 goto skip_bad_vf_detection;
10188
10189         pf_func = req_id & 0x01;
10190         if ((pf_func & 1) == (pdev->devfn & 1)) {
10191                 unsigned int device_id;
10192
10193                 vf = (req_id & 0x7F) >> 1;
10194                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10195                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10196                                 "%8.8x\tdw3: %8.8x\n",
10197                 dw0, dw1, dw2, dw3);
10198                 switch (adapter->hw.mac.type) {
10199                 case ixgbe_mac_82599EB:
10200                         device_id = IXGBE_82599_VF_DEVICE_ID;
10201                         break;
10202                 case ixgbe_mac_X540:
10203                         device_id = IXGBE_X540_VF_DEVICE_ID;
10204                         break;
10205                 case ixgbe_mac_X550:
10206                         device_id = IXGBE_DEV_ID_X550_VF;
10207                         break;
10208                 case ixgbe_mac_X550EM_x:
10209                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10210                         break;
10211                 case ixgbe_mac_x550em_a:
10212                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10213                         break;
10214                 default:
10215                         device_id = 0;
10216                         break;
10217                 }
10218
10219                 /* Find the pci device of the offending VF */
10220                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10221                 while (vfdev) {
10222                         if (vfdev->devfn == (req_id & 0xFF))
10223                                 break;
10224                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10225                                                device_id, vfdev);
10226                 }
10227                 /*
10228                  * There's a slim chance the VF could have been hot plugged,
10229                  * so if it is no longer present we don't need to issue the
10230                  * VFLR.  Just clean up the AER in that case.
10231                  */
10232                 if (vfdev) {
10233                         ixgbe_issue_vf_flr(adapter, vfdev);
10234                         /* Free device reference count */
10235                         pci_dev_put(vfdev);
10236                 }
10237
10238                 pci_cleanup_aer_uncorrect_error_status(pdev);
10239         }
10240
10241         /*
10242          * Even though the error may have occurred on the other port
10243          * we still need to increment the vf error reference count for
10244          * both ports because the I/O resume function will be called
10245          * for both of them.
10246          */
10247         adapter->vferr_refcount++;
10248
10249         return PCI_ERS_RESULT_RECOVERED;
10250
10251 skip_bad_vf_detection:
10252 #endif /* CONFIG_PCI_IOV */
10253         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10254                 return PCI_ERS_RESULT_DISCONNECT;
10255
10256         rtnl_lock();
10257         netif_device_detach(netdev);
10258
10259         if (state == pci_channel_io_perm_failure) {
10260                 rtnl_unlock();
10261                 return PCI_ERS_RESULT_DISCONNECT;
10262         }
10263
10264         if (netif_running(netdev))
10265                 ixgbe_close_suspend(adapter);
10266
10267         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10268                 pci_disable_device(pdev);
10269         rtnl_unlock();
10270
10271         /* Request a slot reset. */
10272         return PCI_ERS_RESULT_NEED_RESET;
10273 }
10274
10275 /**
10276  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10277  * @pdev: Pointer to PCI device
10278  *
10279  * Restart the card from scratch, as if from a cold-boot.
10280  */
10281 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10282 {
10283         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10284         pci_ers_result_t result;
10285         int err;
10286
10287         if (pci_enable_device_mem(pdev)) {
10288                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10289                 result = PCI_ERS_RESULT_DISCONNECT;
10290         } else {
10291                 smp_mb__before_atomic();
10292                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10293                 adapter->hw.hw_addr = adapter->io_addr;
10294                 pci_set_master(pdev);
10295                 pci_restore_state(pdev);
10296                 pci_save_state(pdev);
10297
10298                 pci_wake_from_d3(pdev, false);
10299
10300                 ixgbe_reset(adapter);
10301                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10302                 result = PCI_ERS_RESULT_RECOVERED;
10303         }
10304
10305         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10306         if (err) {
10307                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10308                           "failed 0x%0x\n", err);
10309                 /* non-fatal, continue */
10310         }
10311
10312         return result;
10313 }
10314
10315 /**
10316  * ixgbe_io_resume - called when traffic can start flowing again.
10317  * @pdev: Pointer to PCI device
10318  *
10319  * This callback is called when the error recovery driver tells us that
10320  * its OK to resume normal operation.
10321  */
10322 static void ixgbe_io_resume(struct pci_dev *pdev)
10323 {
10324         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10325         struct net_device *netdev = adapter->netdev;
10326
10327 #ifdef CONFIG_PCI_IOV
10328         if (adapter->vferr_refcount) {
10329                 e_info(drv, "Resuming after VF err\n");
10330                 adapter->vferr_refcount--;
10331                 return;
10332         }
10333
10334 #endif
10335         rtnl_lock();
10336         if (netif_running(netdev))
10337                 ixgbe_open(netdev);
10338
10339         netif_device_attach(netdev);
10340         rtnl_unlock();
10341 }
10342
10343 static const struct pci_error_handlers ixgbe_err_handler = {
10344         .error_detected = ixgbe_io_error_detected,
10345         .slot_reset = ixgbe_io_slot_reset,
10346         .resume = ixgbe_io_resume,
10347 };
10348
10349 static struct pci_driver ixgbe_driver = {
10350         .name     = ixgbe_driver_name,
10351         .id_table = ixgbe_pci_tbl,
10352         .probe    = ixgbe_probe,
10353         .remove   = ixgbe_remove,
10354 #ifdef CONFIG_PM
10355         .suspend  = ixgbe_suspend,
10356         .resume   = ixgbe_resume,
10357 #endif
10358         .shutdown = ixgbe_shutdown,
10359         .sriov_configure = ixgbe_pci_sriov_configure,
10360         .err_handler = &ixgbe_err_handler
10361 };
10362
10363 /**
10364  * ixgbe_init_module - Driver Registration Routine
10365  *
10366  * ixgbe_init_module is the first routine called when the driver is
10367  * loaded. All it does is register with the PCI subsystem.
10368  **/
10369 static int __init ixgbe_init_module(void)
10370 {
10371         int ret;
10372         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10373         pr_info("%s\n", ixgbe_copyright);
10374
10375         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10376         if (!ixgbe_wq) {
10377                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10378                 return -ENOMEM;
10379         }
10380
10381         ixgbe_dbg_init();
10382
10383         ret = pci_register_driver(&ixgbe_driver);
10384         if (ret) {
10385                 destroy_workqueue(ixgbe_wq);
10386                 ixgbe_dbg_exit();
10387                 return ret;
10388         }
10389
10390 #ifdef CONFIG_IXGBE_DCA
10391         dca_register_notify(&dca_notifier);
10392 #endif
10393
10394         return 0;
10395 }
10396
10397 module_init(ixgbe_init_module);
10398
10399 /**
10400  * ixgbe_exit_module - Driver Exit Cleanup Routine
10401  *
10402  * ixgbe_exit_module is called just before the driver is removed
10403  * from memory.
10404  **/
10405 static void __exit ixgbe_exit_module(void)
10406 {
10407 #ifdef CONFIG_IXGBE_DCA
10408         dca_unregister_notify(&dca_notifier);
10409 #endif
10410         pci_unregister_driver(&ixgbe_driver);
10411
10412         ixgbe_dbg_exit();
10413         if (ixgbe_wq) {
10414                 destroy_workqueue(ixgbe_wq);
10415                 ixgbe_wq = NULL;
10416         }
10417 }
10418
10419 #ifdef CONFIG_IXGBE_DCA
10420 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10421                             void *p)
10422 {
10423         int ret_val;
10424
10425         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10426                                          __ixgbe_notify_dca);
10427
10428         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10429 }
10430
10431 #endif /* CONFIG_IXGBE_DCA */
10432
10433 module_exit(ixgbe_exit_module);
10434
10435 /* ixgbe_main.c */