1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name[] = "ixgbe";
56 static const char ixgbe_driver_string[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version[] = DRV_VERSION;
71 static const char ixgbe_copyright[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info *ixgbe_info_tbl[] = {
75 [board_82598] = &ixgbe_82598_info,
76 [board_82599] = &ixgbe_82599_info,
77 [board_X540] = &ixgbe_X540_info,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs;
134 module_param(max_vfs, uint, 0);
135 MODULE_PARM_DESC(max_vfs,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp;
140 module_param(allow_unsupported_sfp, uint, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug = -1;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
156 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
158 schedule_work(&adapter->service_task);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
170 struct ixgbe_reg_info {
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
177 /* General Registers */
178 {IXGBE_CTRL, "CTRL"},
179 {IXGBE_STATUS, "STATUS"},
180 {IXGBE_CTRL_EXT, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
217 switch (reginfo->ofs) {
218 case IXGBE_SRRCTL(0):
219 for (i = 0; i < 64; i++)
220 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i = 0; i < 64; i++)
224 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
227 for (i = 0; i < 64; i++)
228 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
231 for (i = 0; i < 64; i++)
232 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
235 for (i = 0; i < 64; i++)
236 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
238 case IXGBE_RXDCTL(0):
239 for (i = 0; i < 64; i++)
240 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
243 for (i = 0; i < 64; i++)
244 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
247 for (i = 0; i < 64; i++)
248 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
251 for (i = 0; i < 64; i++)
252 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
255 for (i = 0; i < 64; i++)
256 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
259 for (i = 0; i < 64; i++)
260 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
263 for (i = 0; i < 64; i++)
264 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
267 for (i = 0; i < 64; i++)
268 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
270 case IXGBE_TXDCTL(0):
271 for (i = 0; i < 64; i++)
272 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
275 pr_info("%-15s %08x\n", reginfo->name,
276 IXGBE_READ_REG(hw, reginfo->ofs));
280 for (i = 0; i < 8; i++) {
281 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
282 pr_err("%-15s", rname);
283 for (j = 0; j < 8; j++)
284 pr_cont(" %08x", regs[i*8+j]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter *adapter)
295 struct net_device *netdev = adapter->netdev;
296 struct ixgbe_hw *hw = &adapter->hw;
297 struct ixgbe_reg_info *reginfo;
299 struct ixgbe_ring *tx_ring;
300 struct ixgbe_tx_buffer *tx_buffer;
301 union ixgbe_adv_tx_desc *tx_desc;
302 struct my_u0 { u64 a; u64 b; } *u0;
303 struct ixgbe_ring *rx_ring;
304 union ixgbe_adv_rx_desc *rx_desc;
305 struct ixgbe_rx_buffer *rx_buffer_info;
309 if (!netif_msg_hw(adapter))
312 /* Print netdevice Info */
314 dev_info(&adapter->pdev->dev, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter->pdev->dev, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
328 reginfo->name; reginfo++) {
329 ixgbe_regdump(hw, reginfo);
332 /* Print TX Ring Summary */
333 if (!netdev || !netif_running(netdev))
336 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n = 0; n < adapter->num_tx_queues; n++) {
339 tx_ring = adapter->tx_ring[n];
340 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n, tx_ring->next_to_use, tx_ring->next_to_clean,
343 (u64)dma_unmap_addr(tx_buffer, dma),
344 dma_unmap_len(tx_buffer, len),
345 tx_buffer->next_to_watch,
346 (u64)tx_buffer->time_stamp);
350 if (!netif_msg_tx_done(adapter))
351 goto rx_ring_summary;
353 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n = 0; n < adapter->num_tx_queues; n++) {
367 tx_ring = adapter->tx_ring[n];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
376 tx_desc = IXGBE_TX_DESC(tx_ring, i);
377 tx_buffer = &tx_ring->tx_buffer_info[i];
378 u0 = (struct my_u0 *)tx_desc;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i,
383 (u64)dma_unmap_addr(tx_buffer, dma),
384 dma_unmap_len(tx_buffer, len),
385 tx_buffer->next_to_watch,
386 (u64)tx_buffer->time_stamp,
388 if (i == tx_ring->next_to_use &&
389 i == tx_ring->next_to_clean)
391 else if (i == tx_ring->next_to_use)
393 else if (i == tx_ring->next_to_clean)
398 if (netif_msg_pktdata(adapter) &&
399 dma_unmap_len(tx_buffer, len) != 0)
400 print_hex_dump(KERN_INFO, "",
401 DUMP_PREFIX_ADDRESS, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer,
404 dma_unmap_len(tx_buffer, len),
409 /* Print RX Rings Summary */
411 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n = 0; n < adapter->num_rx_queues; n++) {
414 rx_ring = adapter->rx_ring[n];
415 pr_info("%5d %5X %5X\n",
416 n, rx_ring->next_to_use, rx_ring->next_to_clean);
420 if (!netif_msg_rx_status(adapter))
423 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n = 0; n < adapter->num_rx_queues; n++) {
446 rx_ring = adapter->rx_ring[n];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i = 0; i < rx_ring->count; i++) {
458 rx_buffer_info = &rx_ring->rx_buffer_info[i];
459 rx_desc = IXGBE_RX_DESC(rx_ring, i);
460 u0 = (struct my_u0 *)rx_desc;
461 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
462 if (staterr & IXGBE_RXD_STAT_DD) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i,
468 rx_buffer_info->skb);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i,
474 (u64)rx_buffer_info->dma,
475 rx_buffer_info->skb);
477 if (netif_msg_pktdata(adapter)) {
478 print_hex_dump(KERN_INFO, "",
479 DUMP_PREFIX_ADDRESS, 16, 1,
480 phys_to_virt(rx_buffer_info->dma),
481 ixgbe_rx_bufsz(rx_ring), true);
485 if (i == rx_ring->next_to_use)
487 else if (i == rx_ring->next_to_clean)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
503 /* Let firmware take over control of h/w */
504 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
505 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
506 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
516 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
528 u8 queue, u8 msix_vector)
531 struct ixgbe_hw *hw = &adapter->hw;
532 switch (hw->mac.type) {
533 case ixgbe_mac_82598EB:
534 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
537 index = (((direction * 64) + queue) >> 2) & 0x1F;
538 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
539 ivar &= ~(0xFF << (8 * (queue & 0x3)));
540 ivar |= (msix_vector << (8 * (queue & 0x3)));
541 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
543 case ixgbe_mac_82599EB:
545 if (direction == -1) {
547 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
548 index = ((queue & 1) * 8);
549 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
550 ivar &= ~(0xFF << index);
551 ivar |= (msix_vector << index);
552 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
555 /* tx or rx causes */
556 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
557 index = ((16 * (queue & 1)) + (8 * direction));
558 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
559 ivar &= ~(0xFF << index);
560 ivar |= (msix_vector << index);
561 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
574 switch (adapter->hw.mac.type) {
575 case ixgbe_mac_82598EB:
576 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
577 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
579 case ixgbe_mac_82599EB:
581 mask = (qmask & 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
583 mask = (qmask >> 32);
584 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
592 struct ixgbe_tx_buffer *tx_buffer)
594 if (tx_buffer->skb) {
595 dev_kfree_skb_any(tx_buffer->skb);
596 if (dma_unmap_len(tx_buffer, len))
597 dma_unmap_single(ring->dev,
598 dma_unmap_addr(tx_buffer, dma),
599 dma_unmap_len(tx_buffer, len),
601 } else if (dma_unmap_len(tx_buffer, len)) {
602 dma_unmap_page(ring->dev,
603 dma_unmap_addr(tx_buffer, dma),
604 dma_unmap_len(tx_buffer, len),
607 tx_buffer->next_to_watch = NULL;
608 tx_buffer->skb = NULL;
609 dma_unmap_len_set(tx_buffer, len, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
615 struct ixgbe_hw *hw = &adapter->hw;
616 struct ixgbe_hw_stats *hwstats = &adapter->stats;
620 if ((hw->fc.current_mode != ixgbe_fc_full) &&
621 (hw->fc.current_mode != ixgbe_fc_rx_pause))
624 switch (hw->mac.type) {
625 case ixgbe_mac_82598EB:
626 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
629 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
631 hwstats->lxoffrxc += data;
633 /* refill credits (no tx hang) if we received xoff */
637 for (i = 0; i < adapter->num_tx_queues; i++)
638 clear_bit(__IXGBE_HANG_CHECK_ARMED,
639 &adapter->tx_ring[i]->state);
642 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
644 struct ixgbe_hw *hw = &adapter->hw;
645 struct ixgbe_hw_stats *hwstats = &adapter->stats;
648 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
650 if (adapter->ixgbe_ieee_pfc)
651 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
653 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
654 ixgbe_update_xoff_rx_lfc(adapter);
658 /* update stats for each tc, only valid with PFC enabled */
659 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
660 switch (hw->mac.type) {
661 case ixgbe_mac_82598EB:
662 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
665 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
667 hwstats->pxoffrxc[i] += xoff[i];
670 /* disarm tx queues that have received xoff frames */
671 for (i = 0; i < adapter->num_tx_queues; i++) {
672 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
673 u8 tc = tx_ring->dcb_tc;
676 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
680 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
682 return ring->stats.packets;
685 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
687 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
688 struct ixgbe_hw *hw = &adapter->hw;
690 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
691 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
694 return (head < tail) ?
695 tail - head : (tail + ring->count - head);
700 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
702 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
703 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
704 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
707 clear_check_for_tx_hang(tx_ring);
710 * Check for a hung queue, but be thorough. This verifies
711 * that a transmit has been completed since the previous
712 * check AND there is at least one packet pending. The
713 * ARMED bit is set to indicate a potential hang. The
714 * bit is cleared if a pause frame is received to remove
715 * false hang detection due to PFC or 802.3x frames. By
716 * requiring this to fail twice we avoid races with
717 * pfc clearing the ARMED bit and conditions where we
718 * run the check_tx_hang logic with a transmit completion
719 * pending but without time to complete it yet.
721 if ((tx_done_old == tx_done) && tx_pending) {
722 /* make sure it is true for two checks in a row */
723 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
726 /* update completed stats and continue */
727 tx_ring->tx_stats.tx_done_old = tx_done;
728 /* reset the countdown */
729 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
736 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
737 * @adapter: driver private struct
739 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
742 /* Do the reset outside of interrupt context */
743 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
744 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
745 ixgbe_service_event_schedule(adapter);
750 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
751 * @q_vector: structure containing interrupt and ring information
752 * @tx_ring: tx ring to clean
754 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
755 struct ixgbe_ring *tx_ring)
757 struct ixgbe_adapter *adapter = q_vector->adapter;
758 struct ixgbe_tx_buffer *tx_buffer;
759 union ixgbe_adv_tx_desc *tx_desc;
760 unsigned int total_bytes = 0, total_packets = 0;
761 unsigned int budget = q_vector->tx.work_limit;
762 unsigned int i = tx_ring->next_to_clean;
764 if (test_bit(__IXGBE_DOWN, &adapter->state))
767 tx_buffer = &tx_ring->tx_buffer_info[i];
768 tx_desc = IXGBE_TX_DESC(tx_ring, i);
772 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
774 /* if next_to_watch is not set then there is no work pending */
778 /* prevent any other reads prior to eop_desc */
781 /* if DD is not set pending work has not been completed */
782 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
785 /* clear next_to_watch to prevent false hangs */
786 tx_buffer->next_to_watch = NULL;
788 /* update the statistics for this packet */
789 total_bytes += tx_buffer->bytecount;
790 total_packets += tx_buffer->gso_segs;
792 #ifdef CONFIG_IXGBE_PTP
793 if (unlikely(tx_buffer->tx_flags &
794 IXGBE_TX_FLAGS_TSTAMP))
795 ixgbe_ptp_tx_hwtstamp(q_vector,
800 dev_kfree_skb_any(tx_buffer->skb);
802 /* unmap skb header data */
803 dma_unmap_single(tx_ring->dev,
804 dma_unmap_addr(tx_buffer, dma),
805 dma_unmap_len(tx_buffer, len),
808 /* clear tx_buffer data */
809 tx_buffer->skb = NULL;
810 dma_unmap_len_set(tx_buffer, len, 0);
812 /* unmap remaining buffers */
813 while (tx_desc != eop_desc) {
819 tx_buffer = tx_ring->tx_buffer_info;
820 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
823 /* unmap any remaining paged data */
824 if (dma_unmap_len(tx_buffer, len)) {
825 dma_unmap_page(tx_ring->dev,
826 dma_unmap_addr(tx_buffer, dma),
827 dma_unmap_len(tx_buffer, len),
829 dma_unmap_len_set(tx_buffer, len, 0);
833 /* move us one more past the eop_desc for start of next pkt */
839 tx_buffer = tx_ring->tx_buffer_info;
840 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
843 /* issue prefetch for next Tx descriptor */
846 /* update budget accounting */
848 } while (likely(budget));
851 tx_ring->next_to_clean = i;
852 u64_stats_update_begin(&tx_ring->syncp);
853 tx_ring->stats.bytes += total_bytes;
854 tx_ring->stats.packets += total_packets;
855 u64_stats_update_end(&tx_ring->syncp);
856 q_vector->tx.total_bytes += total_bytes;
857 q_vector->tx.total_packets += total_packets;
859 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
860 /* schedule immediate reset if we believe we hung */
861 struct ixgbe_hw *hw = &adapter->hw;
862 e_err(drv, "Detected Tx Unit Hang\n"
864 " TDH, TDT <%x>, <%x>\n"
865 " next_to_use <%x>\n"
866 " next_to_clean <%x>\n"
867 "tx_buffer_info[next_to_clean]\n"
868 " time_stamp <%lx>\n"
870 tx_ring->queue_index,
871 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
872 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
873 tx_ring->next_to_use, i,
874 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
876 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
879 "tx hang %d detected on queue %d, resetting adapter\n",
880 adapter->tx_timeout_count + 1, tx_ring->queue_index);
882 /* schedule immediate reset if we believe we hung */
883 ixgbe_tx_timeout_reset(adapter);
885 /* the adapter is about to reset, no point in enabling stuff */
889 netdev_tx_completed_queue(txring_txq(tx_ring),
890 total_packets, total_bytes);
892 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
893 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
894 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
895 /* Make sure that anybody stopping the queue after this
896 * sees the new next_to_clean.
899 if (__netif_subqueue_stopped(tx_ring->netdev,
900 tx_ring->queue_index)
901 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
902 netif_wake_subqueue(tx_ring->netdev,
903 tx_ring->queue_index);
904 ++tx_ring->tx_stats.restart_queue;
911 #ifdef CONFIG_IXGBE_DCA
912 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
913 struct ixgbe_ring *tx_ring,
916 struct ixgbe_hw *hw = &adapter->hw;
917 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
920 switch (hw->mac.type) {
921 case ixgbe_mac_82598EB:
922 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
924 case ixgbe_mac_82599EB:
926 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
927 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
930 /* for unknown hardware do not write register */
935 * We can enable relaxed ordering for reads, but not writes when
936 * DCA is enabled. This is due to a known issue in some chipsets
937 * which will cause the DCA tag to be cleared.
939 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
940 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
941 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
943 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
946 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
947 struct ixgbe_ring *rx_ring,
950 struct ixgbe_hw *hw = &adapter->hw;
951 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
952 u8 reg_idx = rx_ring->reg_idx;
955 switch (hw->mac.type) {
956 case ixgbe_mac_82599EB:
958 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
965 * We can enable relaxed ordering for reads, but not writes when
966 * DCA is enabled. This is due to a known issue in some chipsets
967 * which will cause the DCA tag to be cleared.
969 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
970 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
971 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
973 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
976 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
978 struct ixgbe_adapter *adapter = q_vector->adapter;
979 struct ixgbe_ring *ring;
982 if (q_vector->cpu == cpu)
985 ixgbe_for_each_ring(ring, q_vector->tx)
986 ixgbe_update_tx_dca(adapter, ring, cpu);
988 ixgbe_for_each_ring(ring, q_vector->rx)
989 ixgbe_update_rx_dca(adapter, ring, cpu);
996 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1001 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1004 /* always use CB2 mode, difference is masked in the CB driver */
1005 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1007 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1008 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1012 for (i = 0; i < num_q_vectors; i++) {
1013 adapter->q_vector[i]->cpu = -1;
1014 ixgbe_update_dca(adapter->q_vector[i]);
1018 static int __ixgbe_notify_dca(struct device *dev, void *data)
1020 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1021 unsigned long event = *(unsigned long *)data;
1023 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1027 case DCA_PROVIDER_ADD:
1028 /* if we're already enabled, don't do it again */
1029 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1031 if (dca_add_requester(dev) == 0) {
1032 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1033 ixgbe_setup_dca(adapter);
1036 /* Fall Through since DCA is disabled. */
1037 case DCA_PROVIDER_REMOVE:
1038 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1039 dca_remove_requester(dev);
1040 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1041 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1049 #endif /* CONFIG_IXGBE_DCA */
1050 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1051 union ixgbe_adv_rx_desc *rx_desc,
1052 struct sk_buff *skb)
1054 if (ring->netdev->features & NETIF_F_RXHASH)
1055 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1060 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1061 * @ring: structure containing ring specific data
1062 * @rx_desc: advanced rx descriptor
1064 * Returns : true if it is FCoE pkt
1066 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1067 union ixgbe_adv_rx_desc *rx_desc)
1069 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1071 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1072 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1073 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1074 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1077 #endif /* IXGBE_FCOE */
1079 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1080 * @ring: structure containing ring specific data
1081 * @rx_desc: current Rx descriptor being processed
1082 * @skb: skb currently being received and modified
1084 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1085 union ixgbe_adv_rx_desc *rx_desc,
1086 struct sk_buff *skb)
1088 skb_checksum_none_assert(skb);
1090 /* Rx csum disabled */
1091 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1094 /* if IP and error */
1095 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1096 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1097 ring->rx_stats.csum_err++;
1101 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1104 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1105 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1108 * 82599 errata, UDP frames with a 0 checksum can be marked as
1111 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1112 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1115 ring->rx_stats.csum_err++;
1119 /* It must be a TCP or UDP packet with a valid checksum */
1120 skb->ip_summed = CHECKSUM_UNNECESSARY;
1123 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1125 rx_ring->next_to_use = val;
1127 /* update next to alloc since we have filled the ring */
1128 rx_ring->next_to_alloc = val;
1130 * Force memory writes to complete before letting h/w
1131 * know there are new descriptors to fetch. (Only
1132 * applicable for weak-ordered memory model archs,
1136 writel(val, rx_ring->tail);
1139 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1140 struct ixgbe_rx_buffer *bi)
1142 struct page *page = bi->page;
1143 dma_addr_t dma = bi->dma;
1145 /* since we are recycling buffers we should seldom need to alloc */
1149 /* alloc new page for storage */
1150 if (likely(!page)) {
1151 page = alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1152 ixgbe_rx_pg_order(rx_ring));
1153 if (unlikely(!page)) {
1154 rx_ring->rx_stats.alloc_rx_page_failed++;
1160 /* map page for use */
1161 dma = dma_map_page(rx_ring->dev, page, 0,
1162 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1165 * if mapping failed free memory back to system since
1166 * there isn't much point in holding memory we can't use
1168 if (dma_mapping_error(rx_ring->dev, dma)) {
1169 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1172 rx_ring->rx_stats.alloc_rx_page_failed++;
1177 bi->page_offset ^= ixgbe_rx_bufsz(rx_ring);
1183 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1184 * @rx_ring: ring to place buffers on
1185 * @cleaned_count: number of buffers to replace
1187 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1189 union ixgbe_adv_rx_desc *rx_desc;
1190 struct ixgbe_rx_buffer *bi;
1191 u16 i = rx_ring->next_to_use;
1197 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1198 bi = &rx_ring->rx_buffer_info[i];
1199 i -= rx_ring->count;
1202 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1206 * Refresh the desc even if buffer_addrs didn't change
1207 * because each write-back erases this info.
1209 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1215 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1216 bi = rx_ring->rx_buffer_info;
1217 i -= rx_ring->count;
1220 /* clear the hdr_addr for the next_to_use descriptor */
1221 rx_desc->read.hdr_addr = 0;
1224 } while (cleaned_count);
1226 i += rx_ring->count;
1228 if (rx_ring->next_to_use != i)
1229 ixgbe_release_rx_desc(rx_ring, i);
1233 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1234 * @data: pointer to the start of the headers
1235 * @max_len: total length of section to find headers in
1237 * This function is meant to determine the length of headers that will
1238 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1239 * motivation of doing this is to only perform one pull for IPv4 TCP
1240 * packets so that we can do basic things like calculating the gso_size
1241 * based on the average data per packet.
1243 static unsigned int ixgbe_get_headlen(unsigned char *data,
1244 unsigned int max_len)
1247 unsigned char *network;
1250 struct vlan_hdr *vlan;
1255 u8 nexthdr = 0; /* default to not TCP */
1258 /* this should never happen, but better safe than sorry */
1259 if (max_len < ETH_HLEN)
1262 /* initialize network frame pointer */
1265 /* set first protocol and move network header forward */
1266 protocol = hdr.eth->h_proto;
1267 hdr.network += ETH_HLEN;
1269 /* handle any vlan tag if present */
1270 if (protocol == __constant_htons(ETH_P_8021Q)) {
1271 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1274 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1275 hdr.network += VLAN_HLEN;
1278 /* handle L3 protocols */
1279 if (protocol == __constant_htons(ETH_P_IP)) {
1280 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1283 /* access ihl as a u8 to avoid unaligned access on ia64 */
1284 hlen = (hdr.network[0] & 0x0F) << 2;
1286 /* verify hlen meets minimum size requirements */
1287 if (hlen < sizeof(struct iphdr))
1288 return hdr.network - data;
1290 /* record next protocol */
1291 nexthdr = hdr.ipv4->protocol;
1292 hdr.network += hlen;
1294 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1295 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1297 hdr.network += FCOE_HEADER_LEN;
1300 return hdr.network - data;
1303 /* finally sort out TCP */
1304 if (nexthdr == IPPROTO_TCP) {
1305 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1308 /* access doff as a u8 to avoid unaligned access on ia64 */
1309 hlen = (hdr.network[12] & 0xF0) >> 2;
1311 /* verify hlen meets minimum size requirements */
1312 if (hlen < sizeof(struct tcphdr))
1313 return hdr.network - data;
1315 hdr.network += hlen;
1319 * If everything has gone correctly hdr.network should be the
1320 * data section of the packet and will be the end of the header.
1321 * If not then it probably represents the end of the last recognized
1324 if ((hdr.network - data) < max_len)
1325 return hdr.network - data;
1330 static void ixgbe_get_rsc_cnt(struct ixgbe_ring *rx_ring,
1331 union ixgbe_adv_rx_desc *rx_desc,
1332 struct sk_buff *skb)
1337 if (!ring_is_rsc_enabled(rx_ring))
1340 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1341 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1343 /* If this is an RSC frame rsc_cnt should be non-zero */
1347 rsc_cnt = le32_to_cpu(rsc_enabled);
1348 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1350 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1353 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1354 struct sk_buff *skb)
1356 u16 hdr_len = skb_headlen(skb);
1358 /* set gso_size to avoid messing up TCP MSS */
1359 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1360 IXGBE_CB(skb)->append_cnt);
1363 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1364 struct sk_buff *skb)
1366 /* if append_cnt is 0 then frame is not RSC */
1367 if (!IXGBE_CB(skb)->append_cnt)
1370 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1371 rx_ring->rx_stats.rsc_flush++;
1373 ixgbe_set_rsc_gso_size(rx_ring, skb);
1375 /* gso_size is computed using append_cnt so always clear it last */
1376 IXGBE_CB(skb)->append_cnt = 0;
1380 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1381 * @rx_ring: rx descriptor ring packet is being transacted on
1382 * @rx_desc: pointer to the EOP Rx descriptor
1383 * @skb: pointer to current skb being populated
1385 * This function checks the ring, descriptor, and packet information in
1386 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1387 * other fields within the skb.
1389 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1390 union ixgbe_adv_rx_desc *rx_desc,
1391 struct sk_buff *skb)
1393 struct net_device *dev = rx_ring->netdev;
1395 ixgbe_update_rsc_stats(rx_ring, skb);
1397 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1399 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1401 #ifdef CONFIG_IXGBE_PTP
1402 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS))
1403 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, skb);
1406 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
1407 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1408 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1409 __vlan_hwaccel_put_tag(skb, vid);
1412 skb_record_rx_queue(skb, rx_ring->queue_index);
1414 skb->protocol = eth_type_trans(skb, dev);
1417 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1418 struct sk_buff *skb)
1420 struct ixgbe_adapter *adapter = q_vector->adapter;
1422 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1423 napi_gro_receive(&q_vector->napi, skb);
1429 * ixgbe_is_non_eop - process handling of non-EOP buffers
1430 * @rx_ring: Rx ring being processed
1431 * @rx_desc: Rx descriptor for current buffer
1432 * @skb: Current socket buffer containing buffer in progress
1434 * This function updates next to clean. If the buffer is an EOP buffer
1435 * this function exits returning false, otherwise it will place the
1436 * sk_buff in the next buffer to be chained and return true indicating
1437 * that this is in fact a non-EOP buffer.
1439 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1440 union ixgbe_adv_rx_desc *rx_desc,
1441 struct sk_buff *skb)
1443 u32 ntc = rx_ring->next_to_clean + 1;
1445 /* fetch, update, and store next to clean */
1446 ntc = (ntc < rx_ring->count) ? ntc : 0;
1447 rx_ring->next_to_clean = ntc;
1449 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1451 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1454 /* append_cnt indicates packet is RSC, if so fetch nextp */
1455 if (IXGBE_CB(skb)->append_cnt) {
1456 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1457 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1458 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1461 /* place skb in next buffer to be received */
1462 rx_ring->rx_buffer_info[ntc].skb = skb;
1463 rx_ring->rx_stats.non_eop_descs++;
1469 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1470 * @rx_ring: rx descriptor ring packet is being transacted on
1471 * @rx_desc: pointer to the EOP Rx descriptor
1472 * @skb: pointer to current skb being fixed
1474 * Check for corrupted packet headers caused by senders on the local L2
1475 * embedded NIC switch not setting up their Tx Descriptors right. These
1476 * should be very rare.
1478 * Also address the case where we are pulling data in on pages only
1479 * and as such no data is present in the skb header.
1481 * In addition if skb is not at least 60 bytes we need to pad it so that
1482 * it is large enough to qualify as a valid Ethernet frame.
1484 * Returns true if an error was encountered and skb was freed.
1486 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1487 union ixgbe_adv_rx_desc *rx_desc,
1488 struct sk_buff *skb)
1490 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1491 struct net_device *netdev = rx_ring->netdev;
1493 unsigned int pull_len;
1495 /* if the page was released unmap it, else just sync our portion */
1496 if (unlikely(IXGBE_CB(skb)->page_released)) {
1497 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1498 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1499 IXGBE_CB(skb)->page_released = false;
1501 dma_sync_single_range_for_cpu(rx_ring->dev,
1504 ixgbe_rx_bufsz(rx_ring),
1507 IXGBE_CB(skb)->dma = 0;
1509 /* verify that the packet does not have any known errors */
1510 if (unlikely(ixgbe_test_staterr(rx_desc,
1511 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1512 !(netdev->features & NETIF_F_RXALL))) {
1513 dev_kfree_skb_any(skb);
1518 * it is valid to use page_address instead of kmap since we are
1519 * working with pages allocated out of the lomem pool per
1520 * alloc_page(GFP_ATOMIC)
1522 va = skb_frag_address(frag);
1525 * we need the header to contain the greater of either ETH_HLEN or
1526 * 60 bytes if the skb->len is less than 60 for skb_pad.
1528 pull_len = skb_frag_size(frag);
1530 pull_len = ixgbe_get_headlen(va, pull_len);
1532 /* align pull length to size of long to optimize memcpy performance */
1533 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1535 /* update all of the pointers */
1536 skb_frag_size_sub(frag, pull_len);
1537 frag->page_offset += pull_len;
1538 skb->data_len -= pull_len;
1539 skb->tail += pull_len;
1542 * if we sucked the frag empty then we should free it,
1543 * if there are other frags here something is screwed up in hardware
1545 if (skb_frag_size(frag) == 0) {
1546 BUG_ON(skb_shinfo(skb)->nr_frags != 1);
1547 skb_shinfo(skb)->nr_frags = 0;
1548 __skb_frag_unref(frag);
1549 skb->truesize -= ixgbe_rx_bufsz(rx_ring);
1553 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1554 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1558 /* if skb_pad returns an error the skb was freed */
1559 if (unlikely(skb->len < 60)) {
1560 int pad_len = 60 - skb->len;
1562 if (skb_pad(skb, pad_len))
1564 __skb_put(skb, pad_len);
1571 * ixgbe_can_reuse_page - determine if we can reuse a page
1572 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1574 * Returns true if page can be reused in another Rx buffer
1576 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer *rx_buffer)
1578 struct page *page = rx_buffer->page;
1580 /* if we are only owner of page and it is local we can reuse it */
1581 return likely(page_count(page) == 1) &&
1582 likely(page_to_nid(page) == numa_node_id());
1586 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1587 * @rx_ring: rx descriptor ring to store buffers on
1588 * @old_buff: donor buffer to have page reused
1590 * Syncronizes page for reuse by the adapter
1592 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1593 struct ixgbe_rx_buffer *old_buff)
1595 struct ixgbe_rx_buffer *new_buff;
1596 u16 nta = rx_ring->next_to_alloc;
1597 u16 bufsz = ixgbe_rx_bufsz(rx_ring);
1599 new_buff = &rx_ring->rx_buffer_info[nta];
1601 /* update, and store next to alloc */
1603 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1605 /* transfer page from old buffer to new buffer */
1606 new_buff->page = old_buff->page;
1607 new_buff->dma = old_buff->dma;
1609 /* flip page offset to other buffer and store to new_buff */
1610 new_buff->page_offset = old_buff->page_offset ^ bufsz;
1612 /* sync the buffer for use by the device */
1613 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1614 new_buff->page_offset, bufsz,
1617 /* bump ref count on page before it is given to the stack */
1618 get_page(new_buff->page);
1622 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1623 * @rx_ring: rx descriptor ring to transact packets on
1624 * @rx_buffer: buffer containing page to add
1625 * @rx_desc: descriptor containing length of buffer written by hardware
1626 * @skb: sk_buff to place the data into
1628 * This function is based on skb_add_rx_frag. I would have used that
1629 * function however it doesn't handle the truesize case correctly since we
1630 * are allocating more memory than might be used for a single receive.
1632 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1633 struct ixgbe_rx_buffer *rx_buffer,
1634 struct sk_buff *skb, int size)
1636 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
1637 rx_buffer->page, rx_buffer->page_offset,
1640 skb->data_len += size;
1641 skb->truesize += ixgbe_rx_bufsz(rx_ring);
1645 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1646 * @q_vector: structure containing interrupt and ring information
1647 * @rx_ring: rx descriptor ring to transact packets on
1648 * @budget: Total limit on number of packets to process
1650 * This function provides a "bounce buffer" approach to Rx interrupt
1651 * processing. The advantage to this is that on systems that have
1652 * expensive overhead for IOMMU access this provides a means of avoiding
1653 * it by maintaining the mapping of the page to the syste.
1655 * Returns true if all work is completed without reaching budget
1657 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1658 struct ixgbe_ring *rx_ring,
1661 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1663 struct ixgbe_adapter *adapter = q_vector->adapter;
1665 #endif /* IXGBE_FCOE */
1666 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1669 struct ixgbe_rx_buffer *rx_buffer;
1670 union ixgbe_adv_rx_desc *rx_desc;
1671 struct sk_buff *skb;
1675 /* return some buffers to hardware, one at a time is too slow */
1676 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1677 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1681 ntc = rx_ring->next_to_clean;
1682 rx_desc = IXGBE_RX_DESC(rx_ring, ntc);
1683 rx_buffer = &rx_ring->rx_buffer_info[ntc];
1685 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1689 * This memory barrier is needed to keep us from reading
1690 * any other fields out of the rx_desc until we know the
1691 * RXD_STAT_DD bit is set
1695 page = rx_buffer->page;
1698 skb = rx_buffer->skb;
1701 void *page_addr = page_address(page) +
1702 rx_buffer->page_offset;
1704 /* prefetch first cache line of first page */
1705 prefetch(page_addr);
1706 #if L1_CACHE_BYTES < 128
1707 prefetch(page_addr + L1_CACHE_BYTES);
1710 /* allocate a skb to store the frags */
1711 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1713 if (unlikely(!skb)) {
1714 rx_ring->rx_stats.alloc_rx_buff_failed++;
1719 * we will be copying header into skb->data in
1720 * pskb_may_pull so it is in our interest to prefetch
1721 * it now to avoid a possible cache miss
1723 prefetchw(skb->data);
1726 * Delay unmapping of the first packet. It carries the
1727 * header information, HW may still access the header
1728 * after the writeback. Only unmap it when EOP is
1731 IXGBE_CB(skb)->dma = rx_buffer->dma;
1733 /* we are reusing so sync this buffer for CPU use */
1734 dma_sync_single_range_for_cpu(rx_ring->dev,
1736 rx_buffer->page_offset,
1737 ixgbe_rx_bufsz(rx_ring),
1741 /* pull page into skb */
1742 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb,
1743 le16_to_cpu(rx_desc->wb.upper.length));
1745 if (ixgbe_can_reuse_page(rx_buffer)) {
1746 /* hand second half of page back to the ring */
1747 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1748 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1749 /* the page has been released from the ring */
1750 IXGBE_CB(skb)->page_released = true;
1752 /* we are not reusing the buffer so unmap it */
1753 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1754 ixgbe_rx_pg_size(rx_ring),
1758 /* clear contents of buffer_info */
1759 rx_buffer->skb = NULL;
1761 rx_buffer->page = NULL;
1763 ixgbe_get_rsc_cnt(rx_ring, rx_desc, skb);
1767 /* place incomplete frames back on ring for completion */
1768 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1771 /* verify the packet layout is correct */
1772 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1775 /* probably a little skewed due to removing CRC */
1776 total_rx_bytes += skb->len;
1779 /* populate checksum, timestamp, VLAN, and protocol */
1780 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1783 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1784 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
1785 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1787 dev_kfree_skb_any(skb);
1792 #endif /* IXGBE_FCOE */
1793 ixgbe_rx_skb(q_vector, skb);
1795 /* update budget accounting */
1797 } while (likely(budget));
1800 /* include DDPed FCoE data */
1801 if (ddp_bytes > 0) {
1804 mss = rx_ring->netdev->mtu - sizeof(struct fcoe_hdr) -
1805 sizeof(struct fc_frame_header) -
1806 sizeof(struct fcoe_crc_eof);
1809 total_rx_bytes += ddp_bytes;
1810 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1813 #endif /* IXGBE_FCOE */
1814 u64_stats_update_begin(&rx_ring->syncp);
1815 rx_ring->stats.packets += total_rx_packets;
1816 rx_ring->stats.bytes += total_rx_bytes;
1817 u64_stats_update_end(&rx_ring->syncp);
1818 q_vector->rx.total_packets += total_rx_packets;
1819 q_vector->rx.total_bytes += total_rx_bytes;
1822 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1828 * ixgbe_configure_msix - Configure MSI-X hardware
1829 * @adapter: board private structure
1831 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1834 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1836 struct ixgbe_q_vector *q_vector;
1837 int q_vectors, v_idx;
1840 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1842 /* Populate MSIX to EITR Select */
1843 if (adapter->num_vfs > 32) {
1844 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1845 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1849 * Populate the IVAR table and set the ITR values to the
1850 * corresponding register.
1852 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
1853 struct ixgbe_ring *ring;
1854 q_vector = adapter->q_vector[v_idx];
1856 ixgbe_for_each_ring(ring, q_vector->rx)
1857 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1859 ixgbe_for_each_ring(ring, q_vector->tx)
1860 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1862 if (q_vector->tx.ring && !q_vector->rx.ring) {
1863 /* tx only vector */
1864 if (adapter->tx_itr_setting == 1)
1865 q_vector->itr = IXGBE_10K_ITR;
1867 q_vector->itr = adapter->tx_itr_setting;
1869 /* rx or rx/tx vector */
1870 if (adapter->rx_itr_setting == 1)
1871 q_vector->itr = IXGBE_20K_ITR;
1873 q_vector->itr = adapter->rx_itr_setting;
1876 ixgbe_write_eitr(q_vector);
1879 switch (adapter->hw.mac.type) {
1880 case ixgbe_mac_82598EB:
1881 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1884 case ixgbe_mac_82599EB:
1885 case ixgbe_mac_X540:
1886 ixgbe_set_ivar(adapter, -1, 1, v_idx);
1891 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
1893 /* set up to autoclear timer, and the vectors */
1894 mask = IXGBE_EIMS_ENABLE_MASK;
1895 mask &= ~(IXGBE_EIMS_OTHER |
1896 IXGBE_EIMS_MAILBOX |
1899 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1902 enum latency_range {
1906 latency_invalid = 255
1910 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1911 * @q_vector: structure containing interrupt and ring information
1912 * @ring_container: structure containing ring performance data
1914 * Stores a new ITR value based on packets and byte
1915 * counts during the last interrupt. The advantage of per interrupt
1916 * computation is faster updates and more accurate ITR for the current
1917 * traffic pattern. Constants in this function were computed
1918 * based on theoretical maximum wire speed and thresholds were set based
1919 * on testing data as well as attempting to minimize response time
1920 * while increasing bulk throughput.
1921 * this functionality is controlled by the InterruptThrottleRate module
1922 * parameter (see ixgbe_param.c)
1924 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
1925 struct ixgbe_ring_container *ring_container)
1927 int bytes = ring_container->total_bytes;
1928 int packets = ring_container->total_packets;
1931 u8 itr_setting = ring_container->itr;
1936 /* simple throttlerate management
1937 * 0-10MB/s lowest (100000 ints/s)
1938 * 10-20MB/s low (20000 ints/s)
1939 * 20-1249MB/s bulk (8000 ints/s)
1941 /* what was last interrupt timeslice? */
1942 timepassed_us = q_vector->itr >> 2;
1943 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1945 switch (itr_setting) {
1946 case lowest_latency:
1947 if (bytes_perint > 10)
1948 itr_setting = low_latency;
1951 if (bytes_perint > 20)
1952 itr_setting = bulk_latency;
1953 else if (bytes_perint <= 10)
1954 itr_setting = lowest_latency;
1957 if (bytes_perint <= 20)
1958 itr_setting = low_latency;
1962 /* clear work counters since we have the values we need */
1963 ring_container->total_bytes = 0;
1964 ring_container->total_packets = 0;
1966 /* write updated itr to ring container */
1967 ring_container->itr = itr_setting;
1971 * ixgbe_write_eitr - write EITR register in hardware specific way
1972 * @q_vector: structure containing interrupt and ring information
1974 * This function is made to be called by ethtool and by the driver
1975 * when it needs to update EITR registers at runtime. Hardware
1976 * specific quirks/differences are taken care of here.
1978 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1980 struct ixgbe_adapter *adapter = q_vector->adapter;
1981 struct ixgbe_hw *hw = &adapter->hw;
1982 int v_idx = q_vector->v_idx;
1983 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1985 switch (adapter->hw.mac.type) {
1986 case ixgbe_mac_82598EB:
1987 /* must write high and low 16 bits to reset counter */
1988 itr_reg |= (itr_reg << 16);
1990 case ixgbe_mac_82599EB:
1991 case ixgbe_mac_X540:
1993 * set the WDIS bit to not clear the timer bits and cause an
1994 * immediate assertion of the interrupt
1996 itr_reg |= IXGBE_EITR_CNT_WDIS;
2001 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2004 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2006 u32 new_itr = q_vector->itr;
2009 ixgbe_update_itr(q_vector, &q_vector->tx);
2010 ixgbe_update_itr(q_vector, &q_vector->rx);
2012 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2014 switch (current_itr) {
2015 /* counts and packets in update_itr are dependent on these numbers */
2016 case lowest_latency:
2017 new_itr = IXGBE_100K_ITR;
2020 new_itr = IXGBE_20K_ITR;
2023 new_itr = IXGBE_8K_ITR;
2029 if (new_itr != q_vector->itr) {
2030 /* do an exponential smoothing */
2031 new_itr = (10 * new_itr * q_vector->itr) /
2032 ((9 * new_itr) + q_vector->itr);
2034 /* save the algorithm value here */
2035 q_vector->itr = new_itr;
2037 ixgbe_write_eitr(q_vector);
2042 * ixgbe_check_overtemp_subtask - check for over temperature
2043 * @adapter: pointer to adapter
2045 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2047 struct ixgbe_hw *hw = &adapter->hw;
2048 u32 eicr = adapter->interrupt_event;
2050 if (test_bit(__IXGBE_DOWN, &adapter->state))
2053 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2054 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2057 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2059 switch (hw->device_id) {
2060 case IXGBE_DEV_ID_82599_T3_LOM:
2062 * Since the warning interrupt is for both ports
2063 * we don't have to check if:
2064 * - This interrupt wasn't for our port.
2065 * - We may have missed the interrupt so always have to
2066 * check if we got a LSC
2068 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2069 !(eicr & IXGBE_EICR_LSC))
2072 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2074 bool link_up = false;
2076 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2082 /* Check if this is not due to overtemp */
2083 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2088 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2093 "Network adapter has been stopped because it has over heated. "
2094 "Restart the computer. If the problem persists, "
2095 "power off the system and replace the adapter\n");
2097 adapter->interrupt_event = 0;
2100 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2102 struct ixgbe_hw *hw = &adapter->hw;
2104 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2105 (eicr & IXGBE_EICR_GPI_SDP1)) {
2106 e_crit(probe, "Fan has stopped, replace the adapter\n");
2107 /* write to clear the interrupt */
2108 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2112 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2114 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2117 switch (adapter->hw.mac.type) {
2118 case ixgbe_mac_82599EB:
2120 * Need to check link state so complete overtemp check
2123 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2124 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2125 adapter->interrupt_event = eicr;
2126 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2127 ixgbe_service_event_schedule(adapter);
2131 case ixgbe_mac_X540:
2132 if (!(eicr & IXGBE_EICR_TS))
2140 "Network adapter has been stopped because it has over heated. "
2141 "Restart the computer. If the problem persists, "
2142 "power off the system and replace the adapter\n");
2145 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2147 struct ixgbe_hw *hw = &adapter->hw;
2149 if (eicr & IXGBE_EICR_GPI_SDP2) {
2150 /* Clear the interrupt */
2151 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2152 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2153 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2154 ixgbe_service_event_schedule(adapter);
2158 if (eicr & IXGBE_EICR_GPI_SDP1) {
2159 /* Clear the interrupt */
2160 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2161 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2162 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2163 ixgbe_service_event_schedule(adapter);
2168 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2170 struct ixgbe_hw *hw = &adapter->hw;
2173 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2174 adapter->link_check_timeout = jiffies;
2175 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2176 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2177 IXGBE_WRITE_FLUSH(hw);
2178 ixgbe_service_event_schedule(adapter);
2182 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2186 struct ixgbe_hw *hw = &adapter->hw;
2188 switch (hw->mac.type) {
2189 case ixgbe_mac_82598EB:
2190 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2191 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2193 case ixgbe_mac_82599EB:
2194 case ixgbe_mac_X540:
2195 mask = (qmask & 0xFFFFFFFF);
2197 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2198 mask = (qmask >> 32);
2200 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2205 /* skip the flush */
2208 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2212 struct ixgbe_hw *hw = &adapter->hw;
2214 switch (hw->mac.type) {
2215 case ixgbe_mac_82598EB:
2216 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2217 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2219 case ixgbe_mac_82599EB:
2220 case ixgbe_mac_X540:
2221 mask = (qmask & 0xFFFFFFFF);
2223 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2224 mask = (qmask >> 32);
2226 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2231 /* skip the flush */
2235 * ixgbe_irq_enable - Enable default interrupt generation settings
2236 * @adapter: board private structure
2238 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2241 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2243 /* don't reenable LSC while waiting for link */
2244 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2245 mask &= ~IXGBE_EIMS_LSC;
2247 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2248 switch (adapter->hw.mac.type) {
2249 case ixgbe_mac_82599EB:
2250 mask |= IXGBE_EIMS_GPI_SDP0;
2252 case ixgbe_mac_X540:
2253 mask |= IXGBE_EIMS_TS;
2258 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2259 mask |= IXGBE_EIMS_GPI_SDP1;
2260 switch (adapter->hw.mac.type) {
2261 case ixgbe_mac_82599EB:
2262 mask |= IXGBE_EIMS_GPI_SDP1;
2263 mask |= IXGBE_EIMS_GPI_SDP2;
2264 case ixgbe_mac_X540:
2265 mask |= IXGBE_EIMS_ECC;
2266 mask |= IXGBE_EIMS_MAILBOX;
2271 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2272 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2273 mask |= IXGBE_EIMS_FLOW_DIR;
2275 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2277 ixgbe_irq_enable_queues(adapter, ~0);
2279 IXGBE_WRITE_FLUSH(&adapter->hw);
2282 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2284 struct ixgbe_adapter *adapter = data;
2285 struct ixgbe_hw *hw = &adapter->hw;
2289 * Workaround for Silicon errata. Use clear-by-write instead
2290 * of clear-by-read. Reading with EICS will return the
2291 * interrupt causes without clearing, which later be done
2292 * with the write to EICR.
2294 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2295 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2297 if (eicr & IXGBE_EICR_LSC)
2298 ixgbe_check_lsc(adapter);
2300 if (eicr & IXGBE_EICR_MAILBOX)
2301 ixgbe_msg_task(adapter);
2303 switch (hw->mac.type) {
2304 case ixgbe_mac_82599EB:
2305 case ixgbe_mac_X540:
2306 if (eicr & IXGBE_EICR_ECC)
2307 e_info(link, "Received unrecoverable ECC Err, please "
2309 /* Handle Flow Director Full threshold interrupt */
2310 if (eicr & IXGBE_EICR_FLOW_DIR) {
2311 int reinit_count = 0;
2313 for (i = 0; i < adapter->num_tx_queues; i++) {
2314 struct ixgbe_ring *ring = adapter->tx_ring[i];
2315 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2320 /* no more flow director interrupts until after init */
2321 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2322 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2323 ixgbe_service_event_schedule(adapter);
2326 ixgbe_check_sfp_event(adapter, eicr);
2327 ixgbe_check_overtemp_event(adapter, eicr);
2333 ixgbe_check_fan_failure(adapter, eicr);
2334 #ifdef CONFIG_IXGBE_PTP
2335 ixgbe_ptp_check_pps_event(adapter, eicr);
2338 /* re-enable the original interrupt state, no lsc, no queues */
2339 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2340 ixgbe_irq_enable(adapter, false, false);
2345 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2347 struct ixgbe_q_vector *q_vector = data;
2349 /* EIAM disabled interrupts (on this vector) for us */
2351 if (q_vector->rx.ring || q_vector->tx.ring)
2352 napi_schedule(&q_vector->napi);
2358 * ixgbe_poll - NAPI Rx polling callback
2359 * @napi: structure for representing this polling device
2360 * @budget: how many packets driver is allowed to clean
2362 * This function is used for legacy and MSI, NAPI mode
2364 int ixgbe_poll(struct napi_struct *napi, int budget)
2366 struct ixgbe_q_vector *q_vector =
2367 container_of(napi, struct ixgbe_q_vector, napi);
2368 struct ixgbe_adapter *adapter = q_vector->adapter;
2369 struct ixgbe_ring *ring;
2370 int per_ring_budget;
2371 bool clean_complete = true;
2373 #ifdef CONFIG_IXGBE_DCA
2374 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2375 ixgbe_update_dca(q_vector);
2378 ixgbe_for_each_ring(ring, q_vector->tx)
2379 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2381 /* attempt to distribute budget to each queue fairly, but don't allow
2382 * the budget to go below 1 because we'll exit polling */
2383 if (q_vector->rx.count > 1)
2384 per_ring_budget = max(budget/q_vector->rx.count, 1);
2386 per_ring_budget = budget;
2388 ixgbe_for_each_ring(ring, q_vector->rx)
2389 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2392 /* If all work not completed, return budget and keep polling */
2393 if (!clean_complete)
2396 /* all work done, exit the polling mode */
2397 napi_complete(napi);
2398 if (adapter->rx_itr_setting & 1)
2399 ixgbe_set_itr(q_vector);
2400 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2401 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2407 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2408 * @adapter: board private structure
2410 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2411 * interrupts from the kernel.
2413 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2415 struct net_device *netdev = adapter->netdev;
2416 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2420 for (vector = 0; vector < q_vectors; vector++) {
2421 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2422 struct msix_entry *entry = &adapter->msix_entries[vector];
2424 if (q_vector->tx.ring && q_vector->rx.ring) {
2425 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2426 "%s-%s-%d", netdev->name, "TxRx", ri++);
2428 } else if (q_vector->rx.ring) {
2429 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2430 "%s-%s-%d", netdev->name, "rx", ri++);
2431 } else if (q_vector->tx.ring) {
2432 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2433 "%s-%s-%d", netdev->name, "tx", ti++);
2435 /* skip this unused q_vector */
2438 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2439 q_vector->name, q_vector);
2441 e_err(probe, "request_irq failed for MSIX interrupt "
2442 "Error: %d\n", err);
2443 goto free_queue_irqs;
2445 /* If Flow Director is enabled, set interrupt affinity */
2446 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2447 /* assign the mask for this irq */
2448 irq_set_affinity_hint(entry->vector,
2449 &q_vector->affinity_mask);
2453 err = request_irq(adapter->msix_entries[vector].vector,
2454 ixgbe_msix_other, 0, netdev->name, adapter);
2456 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2457 goto free_queue_irqs;
2465 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2467 free_irq(adapter->msix_entries[vector].vector,
2468 adapter->q_vector[vector]);
2470 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2471 pci_disable_msix(adapter->pdev);
2472 kfree(adapter->msix_entries);
2473 adapter->msix_entries = NULL;
2478 * ixgbe_intr - legacy mode Interrupt Handler
2479 * @irq: interrupt number
2480 * @data: pointer to a network interface device structure
2482 static irqreturn_t ixgbe_intr(int irq, void *data)
2484 struct ixgbe_adapter *adapter = data;
2485 struct ixgbe_hw *hw = &adapter->hw;
2486 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2490 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2491 * before the read of EICR.
2493 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2495 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2496 * therefore no explicit interrupt disable is necessary */
2497 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2500 * shared interrupt alert!
2501 * make sure interrupts are enabled because the read will
2502 * have disabled interrupts due to EIAM
2503 * finish the workaround of silicon errata on 82598. Unmask
2504 * the interrupt that we masked before the EICR read.
2506 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2507 ixgbe_irq_enable(adapter, true, true);
2508 return IRQ_NONE; /* Not our interrupt */
2511 if (eicr & IXGBE_EICR_LSC)
2512 ixgbe_check_lsc(adapter);
2514 switch (hw->mac.type) {
2515 case ixgbe_mac_82599EB:
2516 ixgbe_check_sfp_event(adapter, eicr);
2518 case ixgbe_mac_X540:
2519 if (eicr & IXGBE_EICR_ECC)
2520 e_info(link, "Received unrecoverable ECC err, please "
2522 ixgbe_check_overtemp_event(adapter, eicr);
2528 ixgbe_check_fan_failure(adapter, eicr);
2529 #ifdef CONFIG_IXGBE_PTP
2530 ixgbe_ptp_check_pps_event(adapter, eicr);
2533 /* would disable interrupts here but EIAM disabled it */
2534 napi_schedule(&q_vector->napi);
2537 * re-enable link(maybe) and non-queue interrupts, no flush.
2538 * ixgbe_poll will re-enable the queue interrupts
2540 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2541 ixgbe_irq_enable(adapter, false, false);
2547 * ixgbe_request_irq - initialize interrupts
2548 * @adapter: board private structure
2550 * Attempts to configure interrupts using the best available
2551 * capabilities of the hardware and kernel.
2553 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2555 struct net_device *netdev = adapter->netdev;
2558 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2559 err = ixgbe_request_msix_irqs(adapter);
2560 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2561 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2562 netdev->name, adapter);
2564 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2565 netdev->name, adapter);
2568 e_err(probe, "request_irq failed, Error %d\n", err);
2573 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2575 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2578 q_vectors = adapter->num_msix_vectors;
2580 free_irq(adapter->msix_entries[i].vector, adapter);
2583 for (; i >= 0; i--) {
2584 /* free only the irqs that were actually requested */
2585 if (!adapter->q_vector[i]->rx.ring &&
2586 !adapter->q_vector[i]->tx.ring)
2589 /* clear the affinity_mask in the IRQ descriptor */
2590 irq_set_affinity_hint(adapter->msix_entries[i].vector,
2593 free_irq(adapter->msix_entries[i].vector,
2594 adapter->q_vector[i]);
2597 free_irq(adapter->pdev->irq, adapter);
2602 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2603 * @adapter: board private structure
2605 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2607 switch (adapter->hw.mac.type) {
2608 case ixgbe_mac_82598EB:
2609 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2611 case ixgbe_mac_82599EB:
2612 case ixgbe_mac_X540:
2613 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2614 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2615 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2620 IXGBE_WRITE_FLUSH(&adapter->hw);
2621 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2623 for (i = 0; i < adapter->num_msix_vectors; i++)
2624 synchronize_irq(adapter->msix_entries[i].vector);
2626 synchronize_irq(adapter->pdev->irq);
2631 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2634 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2636 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2639 if (adapter->rx_itr_setting == 1)
2640 q_vector->itr = IXGBE_20K_ITR;
2642 q_vector->itr = adapter->rx_itr_setting;
2644 ixgbe_write_eitr(q_vector);
2646 ixgbe_set_ivar(adapter, 0, 0, 0);
2647 ixgbe_set_ivar(adapter, 1, 0, 0);
2649 e_info(hw, "Legacy interrupt IVAR setup done\n");
2653 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2654 * @adapter: board private structure
2655 * @ring: structure containing ring specific data
2657 * Configure the Tx descriptor ring after a reset.
2659 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2660 struct ixgbe_ring *ring)
2662 struct ixgbe_hw *hw = &adapter->hw;
2663 u64 tdba = ring->dma;
2665 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2666 u8 reg_idx = ring->reg_idx;
2668 /* disable queue to avoid issues while updating state */
2669 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2670 IXGBE_WRITE_FLUSH(hw);
2672 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2673 (tdba & DMA_BIT_MASK(32)));
2674 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2675 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2676 ring->count * sizeof(union ixgbe_adv_tx_desc));
2677 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2678 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2679 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2682 * set WTHRESH to encourage burst writeback, it should not be set
2683 * higher than 1 when ITR is 0 as it could cause false TX hangs
2685 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2686 * to or less than the number of on chip descriptors, which is
2689 if (!ring->q_vector || (ring->q_vector->itr < 8))
2690 txdctl |= (1 << 16); /* WTHRESH = 1 */
2692 txdctl |= (8 << 16); /* WTHRESH = 8 */
2695 * Setting PTHRESH to 32 both improves performance
2696 * and avoids a TX hang with DFP enabled
2698 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2699 32; /* PTHRESH = 32 */
2701 /* reinitialize flowdirector state */
2702 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2703 adapter->atr_sample_rate) {
2704 ring->atr_sample_rate = adapter->atr_sample_rate;
2705 ring->atr_count = 0;
2706 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2708 ring->atr_sample_rate = 0;
2711 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2714 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2716 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2717 if (hw->mac.type == ixgbe_mac_82598EB &&
2718 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2721 /* poll to verify queue is enabled */
2723 usleep_range(1000, 2000);
2724 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2725 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2727 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2730 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2732 struct ixgbe_hw *hw = &adapter->hw;
2735 u8 tcs = netdev_get_num_tc(adapter->netdev);
2737 if (hw->mac.type == ixgbe_mac_82598EB)
2740 /* disable the arbiter while setting MTQC */
2741 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2742 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2743 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2745 /* set transmit pool layout */
2746 switch (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2747 case (IXGBE_FLAG_SRIOV_ENABLED):
2748 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2749 (IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF));
2753 reg = IXGBE_MTQC_64Q_1PB;
2755 reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2757 reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2759 IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg);
2761 /* Enable Security TX Buffer IFG for multiple pb */
2763 reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2764 reg |= IXGBE_SECTX_DCB;
2765 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg);
2770 /* re-enable the arbiter */
2771 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2772 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2776 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2777 * @adapter: board private structure
2779 * Configure the Tx unit of the MAC after a reset.
2781 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2783 struct ixgbe_hw *hw = &adapter->hw;
2787 ixgbe_setup_mtqc(adapter);
2789 if (hw->mac.type != ixgbe_mac_82598EB) {
2790 /* DMATXCTL.EN must be before Tx queues are enabled */
2791 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2792 dmatxctl |= IXGBE_DMATXCTL_TE;
2793 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2796 /* Setup the HW Tx Head and Tail descriptor pointers */
2797 for (i = 0; i < adapter->num_tx_queues; i++)
2798 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2801 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2802 struct ixgbe_ring *ring)
2804 struct ixgbe_hw *hw = &adapter->hw;
2805 u8 reg_idx = ring->reg_idx;
2806 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2808 srrctl |= IXGBE_SRRCTL_DROP_EN;
2810 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2813 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2814 struct ixgbe_ring *ring)
2816 struct ixgbe_hw *hw = &adapter->hw;
2817 u8 reg_idx = ring->reg_idx;
2818 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2820 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2822 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2825 #ifdef CONFIG_IXGBE_DCB
2826 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2828 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2832 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2834 if (adapter->ixgbe_ieee_pfc)
2835 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2838 * We should set the drop enable bit if:
2841 * Number of Rx queues > 1 and flow control is disabled
2843 * This allows us to avoid head of line blocking for security
2844 * and performance reasons.
2846 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2847 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2848 for (i = 0; i < adapter->num_rx_queues; i++)
2849 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2851 for (i = 0; i < adapter->num_rx_queues; i++)
2852 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2856 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2858 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2859 struct ixgbe_ring *rx_ring)
2862 u8 reg_idx = rx_ring->reg_idx;
2864 switch (adapter->hw.mac.type) {
2865 case ixgbe_mac_82598EB: {
2866 struct ixgbe_ring_feature *feature = adapter->ring_feature;
2867 const int mask = feature[RING_F_RSS].mask;
2868 reg_idx = reg_idx & mask;
2871 case ixgbe_mac_82599EB:
2872 case ixgbe_mac_X540:
2877 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(reg_idx));
2879 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
2880 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
2881 if (adapter->num_vfs)
2882 srrctl |= IXGBE_SRRCTL_DROP_EN;
2884 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
2885 IXGBE_SRRCTL_BSIZEHDR_MASK;
2887 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2888 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2890 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2892 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
2894 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(reg_idx), srrctl);
2897 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2899 struct ixgbe_hw *hw = &adapter->hw;
2900 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2901 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2902 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2903 u32 mrqc = 0, reta = 0;
2906 u8 tcs = netdev_get_num_tc(adapter->netdev);
2907 int maxq = adapter->ring_feature[RING_F_RSS].indices;
2910 maxq = min(maxq, adapter->num_tx_queues / tcs);
2912 /* Fill out hash function seeds */
2913 for (i = 0; i < 10; i++)
2914 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2916 /* Fill out redirection table */
2917 for (i = 0, j = 0; i < 128; i++, j++) {
2920 /* reta = 4-byte sliding window of
2921 * 0x00..(indices-1)(indices-1)00..etc. */
2922 reta = (reta << 8) | (j * 0x11);
2924 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2927 /* Disable indicating checksum in descriptor, enables RSS hash */
2928 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2929 rxcsum |= IXGBE_RXCSUM_PCSD;
2930 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2932 if (adapter->hw.mac.type == ixgbe_mac_82598EB &&
2933 (adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
2934 mrqc = IXGBE_MRQC_RSSEN;
2936 int mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
2937 | IXGBE_FLAG_SRIOV_ENABLED);
2940 case (IXGBE_FLAG_RSS_ENABLED):
2942 mrqc = IXGBE_MRQC_RSSEN;
2944 mrqc = IXGBE_MRQC_RTRSS4TCEN;
2946 mrqc = IXGBE_MRQC_RTRSS8TCEN;
2948 case (IXGBE_FLAG_SRIOV_ENABLED):
2949 mrqc = IXGBE_MRQC_VMDQEN;
2956 /* Perform hash on these packet types */
2957 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2958 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2959 | IXGBE_MRQC_RSS_FIELD_IPV6
2960 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2962 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2963 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2964 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2965 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2967 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2971 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2972 * @adapter: address of board private structure
2973 * @index: index of ring to set
2975 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
2976 struct ixgbe_ring *ring)
2978 struct ixgbe_hw *hw = &adapter->hw;
2980 u8 reg_idx = ring->reg_idx;
2982 if (!ring_is_rsc_enabled(ring))
2985 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
2986 rscctrl |= IXGBE_RSCCTL_RSCEN;
2988 * we must limit the number of descriptors so that the
2989 * total size of max desc * buf_len is not greater
2992 #if (PAGE_SIZE <= 8192)
2993 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2994 #elif (PAGE_SIZE <= 16384)
2995 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2997 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2999 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3002 #define IXGBE_MAX_RX_DESC_POLL 10
3003 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3004 struct ixgbe_ring *ring)
3006 struct ixgbe_hw *hw = &adapter->hw;
3007 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3009 u8 reg_idx = ring->reg_idx;
3011 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3012 if (hw->mac.type == ixgbe_mac_82598EB &&
3013 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3017 usleep_range(1000, 2000);
3018 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3019 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3022 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3023 "the polling period\n", reg_idx);
3027 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3028 struct ixgbe_ring *ring)
3030 struct ixgbe_hw *hw = &adapter->hw;
3031 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3033 u8 reg_idx = ring->reg_idx;
3035 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3036 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3038 /* write value back with RXDCTL.ENABLE bit cleared */
3039 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3041 if (hw->mac.type == ixgbe_mac_82598EB &&
3042 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3045 /* the hardware may take up to 100us to really disable the rx queue */
3048 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3049 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3052 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3053 "the polling period\n", reg_idx);
3057 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3058 struct ixgbe_ring *ring)
3060 struct ixgbe_hw *hw = &adapter->hw;
3061 u64 rdba = ring->dma;
3063 u8 reg_idx = ring->reg_idx;
3065 /* disable queue to avoid issues while updating state */
3066 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3067 ixgbe_disable_rx_queue(adapter, ring);
3069 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3070 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3071 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3072 ring->count * sizeof(union ixgbe_adv_rx_desc));
3073 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3074 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3075 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3077 ixgbe_configure_srrctl(adapter, ring);
3078 ixgbe_configure_rscctl(adapter, ring);
3080 /* If operating in IOV mode set RLPML for X540 */
3081 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3082 hw->mac.type == ixgbe_mac_X540) {
3083 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
3084 rxdctl |= ((ring->netdev->mtu + ETH_HLEN +
3085 ETH_FCS_LEN + VLAN_HLEN) | IXGBE_RXDCTL_RLPML_EN);
3088 if (hw->mac.type == ixgbe_mac_82598EB) {
3090 * enable cache line friendly hardware writes:
3091 * PTHRESH=32 descriptors (half the internal cache),
3092 * this also removes ugly rx_no_buffer_count increment
3093 * HTHRESH=4 descriptors (to minimize latency on fetch)
3094 * WTHRESH=8 burst writeback up to two cache lines
3096 rxdctl &= ~0x3FFFFF;
3100 /* enable receive descriptor ring */
3101 rxdctl |= IXGBE_RXDCTL_ENABLE;
3102 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3104 ixgbe_rx_desc_queue_enable(adapter, ring);
3105 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3108 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3110 struct ixgbe_hw *hw = &adapter->hw;
3113 /* PSRTYPE must be initialized in non 82598 adapters */
3114 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3115 IXGBE_PSRTYPE_UDPHDR |
3116 IXGBE_PSRTYPE_IPV4HDR |
3117 IXGBE_PSRTYPE_L2HDR |
3118 IXGBE_PSRTYPE_IPV6HDR;
3120 if (hw->mac.type == ixgbe_mac_82598EB)
3123 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
3124 psrtype |= (adapter->num_rx_queues_per_pool << 29);
3126 for (p = 0; p < adapter->num_rx_pools; p++)
3127 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(adapter->num_vfs + p),
3131 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3133 struct ixgbe_hw *hw = &adapter->hw;
3136 u32 reg_offset, vf_shift;
3140 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3143 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3144 vt_reg_bits = IXGBE_VMD_CTL_VMDQ_EN | IXGBE_VT_CTL_REPLEN;
3145 vt_reg_bits |= (adapter->num_vfs << IXGBE_VT_CTL_POOL_SHIFT);
3146 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
3148 vf_shift = adapter->num_vfs % 32;
3149 reg_offset = (adapter->num_vfs >= 32) ? 1 : 0;
3151 /* Enable only the PF's pool for Tx/Rx */
3152 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
3153 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), 0);
3154 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
3155 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), 0);
3156 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3158 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3159 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
3162 * Set up VF register offsets for selected VT Mode,
3163 * i.e. 32 or 64 VFs for SR-IOV
3165 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
3166 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN;
3167 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64;
3168 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3170 /* enable Tx loopback for VF/PF communication */
3171 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3172 /* Enable MAC Anti-Spoofing */
3173 hw->mac.ops.set_mac_anti_spoofing(hw,
3174 (adapter->num_vfs != 0),
3176 /* For VFs that have spoof checking turned off */
3177 for (i = 0; i < adapter->num_vfs; i++) {
3178 if (!adapter->vfinfo[i].spoofchk_enabled)
3179 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3183 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3185 struct ixgbe_hw *hw = &adapter->hw;
3186 struct net_device *netdev = adapter->netdev;
3187 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3188 struct ixgbe_ring *rx_ring;
3193 /* adjust max frame to be able to do baby jumbo for FCoE */
3194 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3195 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3196 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3198 #endif /* IXGBE_FCOE */
3199 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3200 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3201 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3202 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3204 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3207 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3208 max_frame += VLAN_HLEN;
3210 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3211 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3212 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3213 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3216 * Setup the HW Rx Head and Tail Descriptor Pointers and
3217 * the Base and Length of the Rx Descriptor Ring
3219 for (i = 0; i < adapter->num_rx_queues; i++) {
3220 rx_ring = adapter->rx_ring[i];
3221 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3222 set_ring_rsc_enabled(rx_ring);
3224 clear_ring_rsc_enabled(rx_ring);
3228 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3230 struct ixgbe_hw *hw = &adapter->hw;
3231 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3233 switch (hw->mac.type) {
3234 case ixgbe_mac_82598EB:
3236 * For VMDq support of different descriptor types or
3237 * buffer sizes through the use of multiple SRRCTL
3238 * registers, RDRXCTL.MVMEN must be set to 1
3240 * also, the manual doesn't mention it clearly but DCA hints
3241 * will only use queue 0's tags unless this bit is set. Side
3242 * effects of setting this bit are only that SRRCTL must be
3243 * fully programmed [0..15]
3245 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3247 case ixgbe_mac_82599EB:
3248 case ixgbe_mac_X540:
3249 /* Disable RSC for ACK packets */
3250 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3251 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3252 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3253 /* hardware requires some bits to be set by default */
3254 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3255 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3258 /* We should do nothing since we don't know this hardware */
3262 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3266 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3267 * @adapter: board private structure
3269 * Configure the Rx unit of the MAC after a reset.
3271 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3273 struct ixgbe_hw *hw = &adapter->hw;
3277 /* disable receives while setting up the descriptors */
3278 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3279 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3281 ixgbe_setup_psrtype(adapter);
3282 ixgbe_setup_rdrxctl(adapter);
3284 /* Program registers for the distribution of queues */
3285 ixgbe_setup_mrqc(adapter);
3287 /* set_rx_buffer_len must be called before ring initialization */
3288 ixgbe_set_rx_buffer_len(adapter);
3291 * Setup the HW Rx Head and Tail Descriptor Pointers and
3292 * the Base and Length of the Rx Descriptor Ring
3294 for (i = 0; i < adapter->num_rx_queues; i++)
3295 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3297 /* disable drop enable for 82598 parts */
3298 if (hw->mac.type == ixgbe_mac_82598EB)
3299 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3301 /* enable all receives */
3302 rxctrl |= IXGBE_RXCTRL_RXEN;
3303 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3306 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3308 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3309 struct ixgbe_hw *hw = &adapter->hw;
3310 int pool_ndx = adapter->num_vfs;
3312 /* add VID to filter table */
3313 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
3314 set_bit(vid, adapter->active_vlans);
3319 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3321 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3322 struct ixgbe_hw *hw = &adapter->hw;
3323 int pool_ndx = adapter->num_vfs;
3325 /* remove VID from filter table */
3326 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
3327 clear_bit(vid, adapter->active_vlans);
3333 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3334 * @adapter: driver data
3336 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3338 struct ixgbe_hw *hw = &adapter->hw;
3341 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3342 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3343 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3347 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3348 * @adapter: driver data
3350 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3352 struct ixgbe_hw *hw = &adapter->hw;
3355 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3356 vlnctrl |= IXGBE_VLNCTRL_VFE;
3357 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3358 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3362 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3363 * @adapter: driver data
3365 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3367 struct ixgbe_hw *hw = &adapter->hw;
3371 switch (hw->mac.type) {
3372 case ixgbe_mac_82598EB:
3373 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3374 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3375 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3377 case ixgbe_mac_82599EB:
3378 case ixgbe_mac_X540:
3379 for (i = 0; i < adapter->num_rx_queues; i++) {
3380 j = adapter->rx_ring[i]->reg_idx;
3381 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3382 vlnctrl &= ~IXGBE_RXDCTL_VME;
3383 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3392 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3393 * @adapter: driver data
3395 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3397 struct ixgbe_hw *hw = &adapter->hw;
3401 switch (hw->mac.type) {
3402 case ixgbe_mac_82598EB:
3403 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3404 vlnctrl |= IXGBE_VLNCTRL_VME;
3405 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3407 case ixgbe_mac_82599EB:
3408 case ixgbe_mac_X540:
3409 for (i = 0; i < adapter->num_rx_queues; i++) {
3410 j = adapter->rx_ring[i]->reg_idx;
3411 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3412 vlnctrl |= IXGBE_RXDCTL_VME;
3413 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3421 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3425 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3427 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3428 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3432 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3433 * @netdev: network interface device structure
3435 * Writes unicast address list to the RAR table.
3436 * Returns: -ENOMEM on failure/insufficient address space
3437 * 0 on no addresses written
3438 * X on writing X addresses to the RAR table
3440 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3442 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3443 struct ixgbe_hw *hw = &adapter->hw;
3444 unsigned int vfn = adapter->num_vfs;
3445 unsigned int rar_entries = IXGBE_MAX_PF_MACVLANS;
3448 /* return ENOMEM indicating insufficient memory for addresses */
3449 if (netdev_uc_count(netdev) > rar_entries)
3452 if (!netdev_uc_empty(netdev) && rar_entries) {
3453 struct netdev_hw_addr *ha;
3454 /* return error if we do not support writing to RAR table */
3455 if (!hw->mac.ops.set_rar)
3458 netdev_for_each_uc_addr(ha, netdev) {
3461 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3466 /* write the addresses in reverse order to avoid write combining */
3467 for (; rar_entries > 0 ; rar_entries--)
3468 hw->mac.ops.clear_rar(hw, rar_entries);
3474 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3475 * @netdev: network interface device structure
3477 * The set_rx_method entry point is called whenever the unicast/multicast
3478 * address list or the network interface flags are updated. This routine is
3479 * responsible for configuring the hardware for proper unicast, multicast and
3482 void ixgbe_set_rx_mode(struct net_device *netdev)
3484 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3485 struct ixgbe_hw *hw = &adapter->hw;
3486 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3489 /* Check for Promiscuous and All Multicast modes */
3491 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3493 /* set all bits that we expect to always be set */
3494 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3495 fctrl |= IXGBE_FCTRL_BAM;
3496 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3497 fctrl |= IXGBE_FCTRL_PMCF;
3499 /* clear the bits we are changing the status of */
3500 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3502 if (netdev->flags & IFF_PROMISC) {
3503 hw->addr_ctrl.user_set_promisc = true;
3504 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3505 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3506 /* don't hardware filter vlans in promisc mode */
3507 ixgbe_vlan_filter_disable(adapter);
3509 if (netdev->flags & IFF_ALLMULTI) {
3510 fctrl |= IXGBE_FCTRL_MPE;
3511 vmolr |= IXGBE_VMOLR_MPE;
3514 * Write addresses to the MTA, if the attempt fails
3515 * then we should just turn on promiscuous mode so
3516 * that we can at least receive multicast traffic
3518 hw->mac.ops.update_mc_addr_list(hw, netdev);
3519 vmolr |= IXGBE_VMOLR_ROMPE;
3521 ixgbe_vlan_filter_enable(adapter);
3522 hw->addr_ctrl.user_set_promisc = false;
3526 * Write addresses to available RAR registers, if there is not
3527 * sufficient space to store all the addresses then enable
3528 * unicast promiscuous mode
3530 count = ixgbe_write_uc_addr_list(netdev);
3532 fctrl |= IXGBE_FCTRL_UPE;
3533 vmolr |= IXGBE_VMOLR_ROPE;
3536 if (adapter->num_vfs) {
3537 ixgbe_restore_vf_multicasts(adapter);
3538 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3539 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3541 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
3544 /* This is useful for sniffing bad packets. */
3545 if (adapter->netdev->features & NETIF_F_RXALL) {
3546 /* UPE and MPE will be handled by normal PROMISC logic
3547 * in e1000e_set_rx_mode */
3548 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3549 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3550 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3552 fctrl &= ~(IXGBE_FCTRL_DPF);
3553 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3556 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3558 if (netdev->features & NETIF_F_HW_VLAN_RX)
3559 ixgbe_vlan_strip_enable(adapter);
3561 ixgbe_vlan_strip_disable(adapter);
3564 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3567 struct ixgbe_q_vector *q_vector;
3568 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3570 /* legacy and MSI only use one vector */
3571 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3574 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3575 q_vector = adapter->q_vector[q_idx];
3576 napi_enable(&q_vector->napi);
3580 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3583 struct ixgbe_q_vector *q_vector;
3584 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3586 /* legacy and MSI only use one vector */
3587 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3590 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3591 q_vector = adapter->q_vector[q_idx];
3592 napi_disable(&q_vector->napi);
3596 #ifdef CONFIG_IXGBE_DCB
3598 * ixgbe_configure_dcb - Configure DCB hardware
3599 * @adapter: ixgbe adapter struct
3601 * This is called by the driver on open to configure the DCB hardware.
3602 * This is also called by the gennetlink interface when reconfiguring
3605 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3607 struct ixgbe_hw *hw = &adapter->hw;
3608 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3610 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3611 if (hw->mac.type == ixgbe_mac_82598EB)
3612 netif_set_gso_max_size(adapter->netdev, 65536);
3616 if (hw->mac.type == ixgbe_mac_82598EB)
3617 netif_set_gso_max_size(adapter->netdev, 32768);
3619 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3622 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3623 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3626 /* reconfigure the hardware */
3627 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3628 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3630 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3632 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3633 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3634 ixgbe_dcb_hw_ets(&adapter->hw,
3635 adapter->ixgbe_ieee_ets,
3637 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3638 adapter->ixgbe_ieee_pfc->pfc_en,
3639 adapter->ixgbe_ieee_ets->prio_tc);
3642 /* Enable RSS Hash per TC */
3643 if (hw->mac.type != ixgbe_mac_82598EB) {
3647 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
3649 u8 cnt = adapter->netdev->tc_to_txq[i].count;
3654 reg |= msb << IXGBE_RQTC_SHIFT_TC(i);
3656 IXGBE_WRITE_REG(hw, IXGBE_RQTC, reg);
3661 /* Additional bittime to account for IXGBE framing */
3662 #define IXGBE_ETH_FRAMING 20
3665 * ixgbe_hpbthresh - calculate high water mark for flow control
3667 * @adapter: board private structure to calculate for
3668 * @pb - packet buffer to calculate
3670 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3672 struct ixgbe_hw *hw = &adapter->hw;
3673 struct net_device *dev = adapter->netdev;
3674 int link, tc, kb, marker;
3677 /* Calculate max LAN frame size */
3678 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3681 /* FCoE traffic class uses FCOE jumbo frames */
3682 if (dev->features & NETIF_F_FCOE_MTU) {
3685 #ifdef CONFIG_IXGBE_DCB
3686 fcoe_pb = netdev_get_prio_tc_map(dev, adapter->fcoe.up);
3689 if (fcoe_pb == pb && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE)
3690 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3694 /* Calculate delay value for device */
3695 switch (hw->mac.type) {
3696 case ixgbe_mac_X540:
3697 dv_id = IXGBE_DV_X540(link, tc);
3700 dv_id = IXGBE_DV(link, tc);
3704 /* Loopback switch introduces additional latency */
3705 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3706 dv_id += IXGBE_B2BT(tc);
3708 /* Delay value is calculated in bit times convert to KB */
3709 kb = IXGBE_BT2KB(dv_id);
3710 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3712 marker = rx_pba - kb;
3714 /* It is possible that the packet buffer is not large enough
3715 * to provide required headroom. In this case throw an error
3716 * to user and a do the best we can.
3719 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3720 "headroom to support flow control."
3721 "Decrease MTU or number of traffic classes\n", pb);
3729 * ixgbe_lpbthresh - calculate low water mark for for flow control
3731 * @adapter: board private structure to calculate for
3732 * @pb - packet buffer to calculate
3734 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3736 struct ixgbe_hw *hw = &adapter->hw;
3737 struct net_device *dev = adapter->netdev;
3741 /* Calculate max LAN frame size */
3742 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3744 /* Calculate delay value for device */
3745 switch (hw->mac.type) {
3746 case ixgbe_mac_X540:
3747 dv_id = IXGBE_LOW_DV_X540(tc);
3750 dv_id = IXGBE_LOW_DV(tc);
3754 /* Delay value is calculated in bit times convert to KB */
3755 return IXGBE_BT2KB(dv_id);
3759 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3761 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3763 struct ixgbe_hw *hw = &adapter->hw;
3764 int num_tc = netdev_get_num_tc(adapter->netdev);
3770 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3772 for (i = 0; i < num_tc; i++) {
3773 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3775 /* Low water marks must not be larger than high water marks */
3776 if (hw->fc.low_water > hw->fc.high_water[i])
3777 hw->fc.low_water = 0;
3781 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3783 struct ixgbe_hw *hw = &adapter->hw;
3785 u8 tc = netdev_get_num_tc(adapter->netdev);
3787 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3788 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3789 hdrm = 32 << adapter->fdir_pballoc;
3793 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3794 ixgbe_pbthresh_setup(adapter);
3797 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3799 struct ixgbe_hw *hw = &adapter->hw;
3800 struct hlist_node *node, *node2;
3801 struct ixgbe_fdir_filter *filter;
3803 spin_lock(&adapter->fdir_perfect_lock);
3805 if (!hlist_empty(&adapter->fdir_filter_list))
3806 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3808 hlist_for_each_entry_safe(filter, node, node2,
3809 &adapter->fdir_filter_list, fdir_node) {
3810 ixgbe_fdir_write_perfect_filter_82599(hw,
3813 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3814 IXGBE_FDIR_DROP_QUEUE :
3815 adapter->rx_ring[filter->action]->reg_idx);
3818 spin_unlock(&adapter->fdir_perfect_lock);
3821 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3823 struct ixgbe_hw *hw = &adapter->hw;
3825 ixgbe_configure_pb(adapter);
3826 #ifdef CONFIG_IXGBE_DCB
3827 ixgbe_configure_dcb(adapter);
3830 ixgbe_set_rx_mode(adapter->netdev);
3831 ixgbe_restore_vlan(adapter);
3834 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
3835 ixgbe_configure_fcoe(adapter);
3837 #endif /* IXGBE_FCOE */
3839 switch (hw->mac.type) {
3840 case ixgbe_mac_82599EB:
3841 case ixgbe_mac_X540:
3842 hw->mac.ops.disable_rx_buff(hw);
3848 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3849 ixgbe_init_fdir_signature_82599(&adapter->hw,
3850 adapter->fdir_pballoc);
3851 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3852 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3853 adapter->fdir_pballoc);
3854 ixgbe_fdir_filter_restore(adapter);
3857 switch (hw->mac.type) {
3858 case ixgbe_mac_82599EB:
3859 case ixgbe_mac_X540:
3860 hw->mac.ops.enable_rx_buff(hw);
3866 ixgbe_configure_virtualization(adapter);
3868 ixgbe_configure_tx(adapter);
3869 ixgbe_configure_rx(adapter);
3872 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3874 switch (hw->phy.type) {
3875 case ixgbe_phy_sfp_avago:
3876 case ixgbe_phy_sfp_ftl:
3877 case ixgbe_phy_sfp_intel:
3878 case ixgbe_phy_sfp_unknown:
3879 case ixgbe_phy_sfp_passive_tyco:
3880 case ixgbe_phy_sfp_passive_unknown:
3881 case ixgbe_phy_sfp_active_unknown:
3882 case ixgbe_phy_sfp_ftl_active:
3885 if (hw->mac.type == ixgbe_mac_82598EB)
3893 * ixgbe_sfp_link_config - set up SFP+ link
3894 * @adapter: pointer to private adapter struct
3896 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3899 * We are assuming the worst case scenario here, and that
3900 * is that an SFP was inserted/removed after the reset
3901 * but before SFP detection was enabled. As such the best
3902 * solution is to just start searching as soon as we start
3904 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3905 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
3907 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
3911 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3912 * @hw: pointer to private hardware struct
3914 * Returns 0 on success, negative on failure
3916 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
3919 bool negotiation, link_up = false;
3920 u32 ret = IXGBE_ERR_LINK_SETUP;
3922 if (hw->mac.ops.check_link)
3923 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3928 autoneg = hw->phy.autoneg_advertised;
3929 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
3930 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3935 if (hw->mac.ops.setup_link)
3936 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
3941 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
3943 struct ixgbe_hw *hw = &adapter->hw;
3946 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3947 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
3949 gpie |= IXGBE_GPIE_EIAME;
3951 * use EIAM to auto-mask when MSI-X interrupt is asserted
3952 * this saves a register write for every interrupt
3954 switch (hw->mac.type) {
3955 case ixgbe_mac_82598EB:
3956 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3958 case ixgbe_mac_82599EB:
3959 case ixgbe_mac_X540:
3961 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3962 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3966 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3967 * specifically only auto mask tx and rx interrupts */
3968 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3971 /* XXX: to interrupt immediately for EICS writes, enable this */
3972 /* gpie |= IXGBE_GPIE_EIMEN; */
3974 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3975 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
3976 gpie |= IXGBE_GPIE_VTMODE_64;
3979 /* Enable Thermal over heat sensor interrupt */
3980 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
3981 switch (adapter->hw.mac.type) {
3982 case ixgbe_mac_82599EB:
3983 gpie |= IXGBE_SDP0_GPIEN;
3985 case ixgbe_mac_X540:
3986 gpie |= IXGBE_EIMS_TS;
3993 /* Enable fan failure interrupt */
3994 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3995 gpie |= IXGBE_SDP1_GPIEN;
3997 if (hw->mac.type == ixgbe_mac_82599EB) {
3998 gpie |= IXGBE_SDP1_GPIEN;
3999 gpie |= IXGBE_SDP2_GPIEN;
4002 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4005 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4007 struct ixgbe_hw *hw = &adapter->hw;
4011 ixgbe_get_hw_control(adapter);
4012 ixgbe_setup_gpie(adapter);
4014 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4015 ixgbe_configure_msix(adapter);
4017 ixgbe_configure_msi_and_legacy(adapter);
4019 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
4020 if (hw->mac.ops.enable_tx_laser &&
4021 ((hw->phy.multispeed_fiber) ||
4022 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4023 (hw->mac.type == ixgbe_mac_82599EB))))
4024 hw->mac.ops.enable_tx_laser(hw);
4026 clear_bit(__IXGBE_DOWN, &adapter->state);
4027 ixgbe_napi_enable_all(adapter);
4029 if (ixgbe_is_sfp(hw)) {
4030 ixgbe_sfp_link_config(adapter);
4032 err = ixgbe_non_sfp_link_config(hw);
4034 e_err(probe, "link_config FAILED %d\n", err);
4037 /* clear any pending interrupts, may auto mask */
4038 IXGBE_READ_REG(hw, IXGBE_EICR);
4039 ixgbe_irq_enable(adapter, true, true);
4042 * If this adapter has a fan, check to see if we had a failure
4043 * before we enabled the interrupt.
4045 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4046 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4047 if (esdp & IXGBE_ESDP_SDP1)
4048 e_crit(drv, "Fan has stopped, replace the adapter\n");
4051 /* enable transmits */
4052 netif_tx_start_all_queues(adapter->netdev);
4054 /* bring the link up in the watchdog, this could race with our first
4055 * link up interrupt but shouldn't be a problem */
4056 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4057 adapter->link_check_timeout = jiffies;
4058 mod_timer(&adapter->service_timer, jiffies);
4060 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4061 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4062 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4063 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4066 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4068 WARN_ON(in_interrupt());
4069 /* put off any impending NetWatchDogTimeout */
4070 adapter->netdev->trans_start = jiffies;
4072 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4073 usleep_range(1000, 2000);
4074 ixgbe_down(adapter);
4076 * If SR-IOV enabled then wait a bit before bringing the adapter
4077 * back up to give the VFs time to respond to the reset. The
4078 * two second wait is based upon the watchdog timer cycle in
4081 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4084 clear_bit(__IXGBE_RESETTING, &adapter->state);
4087 void ixgbe_up(struct ixgbe_adapter *adapter)
4089 /* hardware has been reset, we need to reload some things */
4090 ixgbe_configure(adapter);
4092 ixgbe_up_complete(adapter);
4095 void ixgbe_reset(struct ixgbe_adapter *adapter)
4097 struct ixgbe_hw *hw = &adapter->hw;
4100 /* lock SFP init bit to prevent race conditions with the watchdog */
4101 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4102 usleep_range(1000, 2000);
4104 /* clear all SFP and link config related flags while holding SFP_INIT */
4105 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4106 IXGBE_FLAG2_SFP_NEEDS_RESET);
4107 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4109 err = hw->mac.ops.init_hw(hw);
4112 case IXGBE_ERR_SFP_NOT_PRESENT:
4113 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4115 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4116 e_dev_err("master disable timed out\n");
4118 case IXGBE_ERR_EEPROM_VERSION:
4119 /* We are running on a pre-production device, log a warning */
4120 e_dev_warn("This device is a pre-production adapter/LOM. "
4121 "Please be aware there may be issues associated with "
4122 "your hardware. If you are experiencing problems "
4123 "please contact your Intel or hardware "
4124 "representative who provided you with this "
4128 e_dev_err("Hardware Error: %d\n", err);
4131 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4133 /* reprogram the RAR[0] in case user changed it. */
4134 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
4139 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4140 * @rx_ring: ring to setup
4142 * On many IA platforms the L1 cache has a critical stride of 4K, this
4143 * results in each receive buffer starting in the same cache set. To help
4144 * reduce the pressure on this cache set we can interleave the offsets so
4145 * that only every other buffer will be in the same cache set.
4147 static void ixgbe_init_rx_page_offset(struct ixgbe_ring *rx_ring)
4149 struct ixgbe_rx_buffer *rx_buffer = rx_ring->rx_buffer_info;
4152 for (i = 0; i < rx_ring->count; i += 2) {
4153 rx_buffer[0].page_offset = 0;
4154 rx_buffer[1].page_offset = ixgbe_rx_bufsz(rx_ring);
4155 rx_buffer = &rx_buffer[2];
4160 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4161 * @rx_ring: ring to free buffers from
4163 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4165 struct device *dev = rx_ring->dev;
4169 /* ring already cleared, nothing to do */
4170 if (!rx_ring->rx_buffer_info)
4173 /* Free all the Rx ring sk_buffs */
4174 for (i = 0; i < rx_ring->count; i++) {
4175 struct ixgbe_rx_buffer *rx_buffer;
4177 rx_buffer = &rx_ring->rx_buffer_info[i];
4178 if (rx_buffer->skb) {
4179 struct sk_buff *skb = rx_buffer->skb;
4180 if (IXGBE_CB(skb)->page_released) {
4183 ixgbe_rx_bufsz(rx_ring),
4185 IXGBE_CB(skb)->page_released = false;
4189 rx_buffer->skb = NULL;
4191 dma_unmap_page(dev, rx_buffer->dma,
4192 ixgbe_rx_pg_size(rx_ring),
4195 if (rx_buffer->page)
4196 __free_pages(rx_buffer->page,
4197 ixgbe_rx_pg_order(rx_ring));
4198 rx_buffer->page = NULL;
4201 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4202 memset(rx_ring->rx_buffer_info, 0, size);
4204 ixgbe_init_rx_page_offset(rx_ring);
4206 /* Zero out the descriptor ring */
4207 memset(rx_ring->desc, 0, rx_ring->size);
4209 rx_ring->next_to_alloc = 0;
4210 rx_ring->next_to_clean = 0;
4211 rx_ring->next_to_use = 0;
4215 * ixgbe_clean_tx_ring - Free Tx Buffers
4216 * @tx_ring: ring to be cleaned
4218 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4220 struct ixgbe_tx_buffer *tx_buffer_info;
4224 /* ring already cleared, nothing to do */
4225 if (!tx_ring->tx_buffer_info)
4228 /* Free all the Tx ring sk_buffs */
4229 for (i = 0; i < tx_ring->count; i++) {
4230 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4231 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4234 netdev_tx_reset_queue(txring_txq(tx_ring));
4236 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4237 memset(tx_ring->tx_buffer_info, 0, size);
4239 /* Zero out the descriptor ring */
4240 memset(tx_ring->desc, 0, tx_ring->size);
4242 tx_ring->next_to_use = 0;
4243 tx_ring->next_to_clean = 0;
4247 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4248 * @adapter: board private structure
4250 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4254 for (i = 0; i < adapter->num_rx_queues; i++)
4255 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4259 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4260 * @adapter: board private structure
4262 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4266 for (i = 0; i < adapter->num_tx_queues; i++)
4267 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4270 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4272 struct hlist_node *node, *node2;
4273 struct ixgbe_fdir_filter *filter;
4275 spin_lock(&adapter->fdir_perfect_lock);
4277 hlist_for_each_entry_safe(filter, node, node2,
4278 &adapter->fdir_filter_list, fdir_node) {
4279 hlist_del(&filter->fdir_node);
4282 adapter->fdir_filter_count = 0;
4284 spin_unlock(&adapter->fdir_perfect_lock);
4287 void ixgbe_down(struct ixgbe_adapter *adapter)
4289 struct net_device *netdev = adapter->netdev;
4290 struct ixgbe_hw *hw = &adapter->hw;
4294 /* signal that we are down to the interrupt handler */
4295 set_bit(__IXGBE_DOWN, &adapter->state);
4297 /* disable receives */
4298 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4299 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4301 /* disable all enabled rx queues */
4302 for (i = 0; i < adapter->num_rx_queues; i++)
4303 /* this call also flushes the previous write */
4304 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4306 usleep_range(10000, 20000);
4308 netif_tx_stop_all_queues(netdev);
4310 /* call carrier off first to avoid false dev_watchdog timeouts */
4311 netif_carrier_off(netdev);
4312 netif_tx_disable(netdev);
4314 ixgbe_irq_disable(adapter);
4316 ixgbe_napi_disable_all(adapter);
4318 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4319 IXGBE_FLAG2_RESET_REQUESTED);
4320 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4322 del_timer_sync(&adapter->service_timer);
4324 if (adapter->num_vfs) {
4325 /* Clear EITR Select mapping */
4326 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4328 /* Mark all the VFs as inactive */
4329 for (i = 0 ; i < adapter->num_vfs; i++)
4330 adapter->vfinfo[i].clear_to_send = false;
4332 /* ping all the active vfs to let them know we are going down */
4333 ixgbe_ping_all_vfs(adapter);
4335 /* Disable all VFTE/VFRE TX/RX */
4336 ixgbe_disable_tx_rx(adapter);
4339 /* disable transmits in the hardware now that interrupts are off */
4340 for (i = 0; i < adapter->num_tx_queues; i++) {
4341 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4342 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4345 /* Disable the Tx DMA engine on 82599 and X540 */
4346 switch (hw->mac.type) {
4347 case ixgbe_mac_82599EB:
4348 case ixgbe_mac_X540:
4349 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4350 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4351 ~IXGBE_DMATXCTL_TE));
4357 if (!pci_channel_offline(adapter->pdev))
4358 ixgbe_reset(adapter);
4360 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4361 if (hw->mac.ops.disable_tx_laser &&
4362 ((hw->phy.multispeed_fiber) ||
4363 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4364 (hw->mac.type == ixgbe_mac_82599EB))))
4365 hw->mac.ops.disable_tx_laser(hw);
4367 ixgbe_clean_all_tx_rings(adapter);
4368 ixgbe_clean_all_rx_rings(adapter);
4370 #ifdef CONFIG_IXGBE_DCA
4371 /* since we reset the hardware DCA settings were cleared */
4372 ixgbe_setup_dca(adapter);
4377 * ixgbe_tx_timeout - Respond to a Tx Hang
4378 * @netdev: network interface device structure
4380 static void ixgbe_tx_timeout(struct net_device *netdev)
4382 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4384 /* Do the reset outside of interrupt context */
4385 ixgbe_tx_timeout_reset(adapter);
4389 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4390 * @adapter: board private structure to initialize
4392 * ixgbe_sw_init initializes the Adapter private data structure.
4393 * Fields are initialized based on PCI device information and
4394 * OS network device settings (MTU size).
4396 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4398 struct ixgbe_hw *hw = &adapter->hw;
4399 struct pci_dev *pdev = adapter->pdev;
4401 #ifdef CONFIG_IXGBE_DCB
4403 struct tc_configuration *tc;
4406 /* PCI config space info */
4408 hw->vendor_id = pdev->vendor;
4409 hw->device_id = pdev->device;
4410 hw->revision_id = pdev->revision;
4411 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4412 hw->subsystem_device_id = pdev->subsystem_device;
4414 /* Set capability flags */
4415 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4416 adapter->ring_feature[RING_F_RSS].indices = rss;
4417 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
4418 switch (hw->mac.type) {
4419 case ixgbe_mac_82598EB:
4420 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4421 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4422 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
4424 case ixgbe_mac_X540:
4425 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4426 case ixgbe_mac_82599EB:
4427 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
4428 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4429 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4430 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4431 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4432 /* Flow Director hash filters enabled */
4433 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4434 adapter->atr_sample_rate = 20;
4435 adapter->ring_feature[RING_F_FDIR].indices =
4436 IXGBE_MAX_FDIR_INDICES;
4437 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4439 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4440 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4441 adapter->ring_feature[RING_F_FCOE].indices = 0;
4442 #ifdef CONFIG_IXGBE_DCB
4443 /* Default traffic class to use for FCoE */
4444 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4446 #endif /* IXGBE_FCOE */
4452 /* n-tuple support exists, always init our spinlock */
4453 spin_lock_init(&adapter->fdir_perfect_lock);
4455 #ifdef CONFIG_IXGBE_DCB
4456 switch (hw->mac.type) {
4457 case ixgbe_mac_X540:
4458 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4459 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4462 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4463 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4467 /* Configure DCB traffic classes */
4468 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4469 tc = &adapter->dcb_cfg.tc_config[j];
4470 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4471 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4472 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4473 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4474 tc->dcb_pfc = pfc_disabled;
4477 /* Initialize default user to priority mapping, UPx->TC0 */
4478 tc = &adapter->dcb_cfg.tc_config[0];
4479 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4480 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4482 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4483 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4484 adapter->dcb_cfg.pfc_mode_enable = false;
4485 adapter->dcb_set_bitmap = 0x00;
4486 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4487 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4488 sizeof(adapter->temp_dcb_cfg));
4492 /* default flow control settings */
4493 hw->fc.requested_mode = ixgbe_fc_full;
4494 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4495 ixgbe_pbthresh_setup(adapter);
4496 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4497 hw->fc.send_xon = true;
4498 hw->fc.disable_fc_autoneg = false;
4500 /* enable itr by default in dynamic mode */
4501 adapter->rx_itr_setting = 1;
4502 adapter->tx_itr_setting = 1;
4504 /* set default ring sizes */
4505 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4506 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4508 /* set default work limits */
4509 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4511 /* initialize eeprom parameters */
4512 if (ixgbe_init_eeprom_params_generic(hw)) {
4513 e_dev_err("EEPROM initialization failed\n");
4517 set_bit(__IXGBE_DOWN, &adapter->state);
4523 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4524 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4526 * Return 0 on success, negative on failure
4528 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4530 struct device *dev = tx_ring->dev;
4531 int orig_node = dev_to_node(dev);
4535 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4537 if (tx_ring->q_vector)
4538 numa_node = tx_ring->q_vector->numa_node;
4540 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4541 if (!tx_ring->tx_buffer_info)
4542 tx_ring->tx_buffer_info = vzalloc(size);
4543 if (!tx_ring->tx_buffer_info)
4546 /* round up to nearest 4K */
4547 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4548 tx_ring->size = ALIGN(tx_ring->size, 4096);
4550 set_dev_node(dev, numa_node);
4551 tx_ring->desc = dma_alloc_coherent(dev,
4555 set_dev_node(dev, orig_node);
4557 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4558 &tx_ring->dma, GFP_KERNEL);
4562 tx_ring->next_to_use = 0;
4563 tx_ring->next_to_clean = 0;
4567 vfree(tx_ring->tx_buffer_info);
4568 tx_ring->tx_buffer_info = NULL;
4569 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4574 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4575 * @adapter: board private structure
4577 * If this function returns with an error, then it's possible one or
4578 * more of the rings is populated (while the rest are not). It is the
4579 * callers duty to clean those orphaned rings.
4581 * Return 0 on success, negative on failure
4583 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4587 for (i = 0; i < adapter->num_tx_queues; i++) {
4588 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4591 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4599 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4600 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4602 * Returns 0 on success, negative on failure
4604 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4606 struct device *dev = rx_ring->dev;
4607 int orig_node = dev_to_node(dev);
4611 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4613 if (rx_ring->q_vector)
4614 numa_node = rx_ring->q_vector->numa_node;
4616 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4617 if (!rx_ring->rx_buffer_info)
4618 rx_ring->rx_buffer_info = vzalloc(size);
4619 if (!rx_ring->rx_buffer_info)
4622 /* Round up to nearest 4K */
4623 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4624 rx_ring->size = ALIGN(rx_ring->size, 4096);
4626 set_dev_node(dev, numa_node);
4627 rx_ring->desc = dma_alloc_coherent(dev,
4631 set_dev_node(dev, orig_node);
4633 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4634 &rx_ring->dma, GFP_KERNEL);
4638 rx_ring->next_to_clean = 0;
4639 rx_ring->next_to_use = 0;
4641 ixgbe_init_rx_page_offset(rx_ring);
4645 vfree(rx_ring->rx_buffer_info);
4646 rx_ring->rx_buffer_info = NULL;
4647 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4652 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4653 * @adapter: board private structure
4655 * If this function returns with an error, then it's possible one or
4656 * more of the rings is populated (while the rest are not). It is the
4657 * callers duty to clean those orphaned rings.
4659 * Return 0 on success, negative on failure
4661 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4665 for (i = 0; i < adapter->num_rx_queues; i++) {
4666 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4669 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4677 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4678 * @tx_ring: Tx descriptor ring for a specific queue
4680 * Free all transmit software resources
4682 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4684 ixgbe_clean_tx_ring(tx_ring);
4686 vfree(tx_ring->tx_buffer_info);
4687 tx_ring->tx_buffer_info = NULL;
4689 /* if not set, then don't free */
4693 dma_free_coherent(tx_ring->dev, tx_ring->size,
4694 tx_ring->desc, tx_ring->dma);
4696 tx_ring->desc = NULL;
4700 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4701 * @adapter: board private structure
4703 * Free all transmit software resources
4705 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4709 for (i = 0; i < adapter->num_tx_queues; i++)
4710 if (adapter->tx_ring[i]->desc)
4711 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4715 * ixgbe_free_rx_resources - Free Rx Resources
4716 * @rx_ring: ring to clean the resources from
4718 * Free all receive software resources
4720 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4722 ixgbe_clean_rx_ring(rx_ring);
4724 vfree(rx_ring->rx_buffer_info);
4725 rx_ring->rx_buffer_info = NULL;
4727 /* if not set, then don't free */
4731 dma_free_coherent(rx_ring->dev, rx_ring->size,
4732 rx_ring->desc, rx_ring->dma);
4734 rx_ring->desc = NULL;
4738 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4739 * @adapter: board private structure
4741 * Free all receive software resources
4743 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4747 for (i = 0; i < adapter->num_rx_queues; i++)
4748 if (adapter->rx_ring[i]->desc)
4749 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4753 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4754 * @netdev: network interface device structure
4755 * @new_mtu: new value for maximum frame size
4757 * Returns 0 on success, negative on failure
4759 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4761 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4762 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4764 /* MTU < 68 is an error and causes problems on some kernels */
4765 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4769 * For 82599EB we cannot allow PF to change MTU greater than 1500
4770 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4771 * don't allocate and chain buffers correctly.
4773 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4774 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4775 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4778 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4780 /* must set new MTU before calling down or up */
4781 netdev->mtu = new_mtu;
4783 if (netif_running(netdev))
4784 ixgbe_reinit_locked(adapter);
4790 * ixgbe_open - Called when a network interface is made active
4791 * @netdev: network interface device structure
4793 * Returns 0 on success, negative value on failure
4795 * The open entry point is called when a network interface is made
4796 * active by the system (IFF_UP). At this point all resources needed
4797 * for transmit and receive operations are allocated, the interrupt
4798 * handler is registered with the OS, the watchdog timer is started,
4799 * and the stack is notified that the interface is ready.
4801 static int ixgbe_open(struct net_device *netdev)
4803 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4806 /* disallow open during test */
4807 if (test_bit(__IXGBE_TESTING, &adapter->state))
4810 netif_carrier_off(netdev);
4812 /* allocate transmit descriptors */
4813 err = ixgbe_setup_all_tx_resources(adapter);
4817 /* allocate receive descriptors */
4818 err = ixgbe_setup_all_rx_resources(adapter);
4822 ixgbe_configure(adapter);
4824 err = ixgbe_request_irq(adapter);
4828 ixgbe_up_complete(adapter);
4834 ixgbe_free_all_rx_resources(adapter);
4836 ixgbe_free_all_tx_resources(adapter);
4837 ixgbe_reset(adapter);
4843 * ixgbe_close - Disables a network interface
4844 * @netdev: network interface device structure
4846 * Returns 0, this is not allowed to fail
4848 * The close entry point is called when an interface is de-activated
4849 * by the OS. The hardware is still under the drivers control, but
4850 * needs to be disabled. A global MAC reset is issued to stop the
4851 * hardware, and all transmit and receive resources are freed.
4853 static int ixgbe_close(struct net_device *netdev)
4855 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4857 ixgbe_down(adapter);
4858 ixgbe_free_irq(adapter);
4860 ixgbe_fdir_filter_exit(adapter);
4862 ixgbe_free_all_tx_resources(adapter);
4863 ixgbe_free_all_rx_resources(adapter);
4865 ixgbe_release_hw_control(adapter);
4871 static int ixgbe_resume(struct pci_dev *pdev)
4873 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4874 struct net_device *netdev = adapter->netdev;
4877 pci_set_power_state(pdev, PCI_D0);
4878 pci_restore_state(pdev);
4880 * pci_restore_state clears dev->state_saved so call
4881 * pci_save_state to restore it.
4883 pci_save_state(pdev);
4885 err = pci_enable_device_mem(pdev);
4887 e_dev_err("Cannot enable PCI device from suspend\n");
4890 pci_set_master(pdev);
4892 pci_wake_from_d3(pdev, false);
4895 err = ixgbe_init_interrupt_scheme(adapter);
4898 e_dev_err("Cannot initialize interrupts for device\n");
4902 ixgbe_reset(adapter);
4904 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4906 if (netif_running(netdev)) {
4907 err = ixgbe_open(netdev);
4912 netif_device_attach(netdev);
4916 #endif /* CONFIG_PM */
4918 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
4920 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4921 struct net_device *netdev = adapter->netdev;
4922 struct ixgbe_hw *hw = &adapter->hw;
4924 u32 wufc = adapter->wol;
4929 netif_device_detach(netdev);
4931 if (netif_running(netdev)) {
4933 ixgbe_down(adapter);
4934 ixgbe_free_irq(adapter);
4935 ixgbe_free_all_tx_resources(adapter);
4936 ixgbe_free_all_rx_resources(adapter);
4940 ixgbe_clear_interrupt_scheme(adapter);
4943 retval = pci_save_state(pdev);
4949 ixgbe_set_rx_mode(netdev);
4952 * enable the optics for both mult-speed fiber and
4953 * 82599 SFP+ fiber as we can WoL.
4955 if (hw->mac.ops.enable_tx_laser &&
4956 (hw->phy.multispeed_fiber ||
4957 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber &&
4958 hw->mac.type == ixgbe_mac_82599EB)))
4959 hw->mac.ops.enable_tx_laser(hw);
4961 /* turn on all-multi mode if wake on multicast is enabled */
4962 if (wufc & IXGBE_WUFC_MC) {
4963 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4964 fctrl |= IXGBE_FCTRL_MPE;
4965 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4968 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
4969 ctrl |= IXGBE_CTRL_GIO_DIS;
4970 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
4972 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
4974 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
4975 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4978 switch (hw->mac.type) {
4979 case ixgbe_mac_82598EB:
4980 pci_wake_from_d3(pdev, false);
4982 case ixgbe_mac_82599EB:
4983 case ixgbe_mac_X540:
4984 pci_wake_from_d3(pdev, !!wufc);
4990 *enable_wake = !!wufc;
4992 ixgbe_release_hw_control(adapter);
4994 pci_disable_device(pdev);
5000 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5005 retval = __ixgbe_shutdown(pdev, &wake);
5010 pci_prepare_to_sleep(pdev);
5012 pci_wake_from_d3(pdev, false);
5013 pci_set_power_state(pdev, PCI_D3hot);
5018 #endif /* CONFIG_PM */
5020 static void ixgbe_shutdown(struct pci_dev *pdev)
5024 __ixgbe_shutdown(pdev, &wake);
5026 if (system_state == SYSTEM_POWER_OFF) {
5027 pci_wake_from_d3(pdev, wake);
5028 pci_set_power_state(pdev, PCI_D3hot);
5033 * ixgbe_update_stats - Update the board statistics counters.
5034 * @adapter: board private structure
5036 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5038 struct net_device *netdev = adapter->netdev;
5039 struct ixgbe_hw *hw = &adapter->hw;
5040 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5042 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5043 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5044 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5045 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5047 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5049 u64 fcoe_noddp_counts_sum = 0, fcoe_noddp_ext_buff_counts_sum = 0;
5050 #endif /* IXGBE_FCOE */
5052 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5053 test_bit(__IXGBE_RESETTING, &adapter->state))
5056 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5059 for (i = 0; i < adapter->num_rx_queues; i++) {
5060 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5061 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5063 adapter->rsc_total_count = rsc_count;
5064 adapter->rsc_total_flush = rsc_flush;
5067 for (i = 0; i < adapter->num_rx_queues; i++) {
5068 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5069 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5070 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5071 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5072 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5073 bytes += rx_ring->stats.bytes;
5074 packets += rx_ring->stats.packets;
5076 adapter->non_eop_descs = non_eop_descs;
5077 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5078 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5079 adapter->hw_csum_rx_error = hw_csum_rx_error;
5080 netdev->stats.rx_bytes = bytes;
5081 netdev->stats.rx_packets = packets;
5085 /* gather some stats to the adapter struct that are per queue */
5086 for (i = 0; i < adapter->num_tx_queues; i++) {
5087 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5088 restart_queue += tx_ring->tx_stats.restart_queue;
5089 tx_busy += tx_ring->tx_stats.tx_busy;
5090 bytes += tx_ring->stats.bytes;
5091 packets += tx_ring->stats.packets;
5093 adapter->restart_queue = restart_queue;
5094 adapter->tx_busy = tx_busy;
5095 netdev->stats.tx_bytes = bytes;
5096 netdev->stats.tx_packets = packets;
5098 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5100 /* 8 register reads */
5101 for (i = 0; i < 8; i++) {
5102 /* for packet buffers not used, the register should read 0 */
5103 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5105 hwstats->mpc[i] += mpc;
5106 total_mpc += hwstats->mpc[i];
5107 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5108 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5109 switch (hw->mac.type) {
5110 case ixgbe_mac_82598EB:
5111 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5112 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5113 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5114 hwstats->pxonrxc[i] +=
5115 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5117 case ixgbe_mac_82599EB:
5118 case ixgbe_mac_X540:
5119 hwstats->pxonrxc[i] +=
5120 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5127 /*16 register reads */
5128 for (i = 0; i < 16; i++) {
5129 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5130 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5131 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5132 (hw->mac.type == ixgbe_mac_X540)) {
5133 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5134 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5135 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5136 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5140 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5141 /* work around hardware counting issue */
5142 hwstats->gprc -= missed_rx;
5144 ixgbe_update_xoff_received(adapter);
5146 /* 82598 hardware only has a 32 bit counter in the high register */
5147 switch (hw->mac.type) {
5148 case ixgbe_mac_82598EB:
5149 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5150 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5151 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5152 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5154 case ixgbe_mac_X540:
5155 /* OS2BMC stats are X540 only*/
5156 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5157 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5158 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5159 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5160 case ixgbe_mac_82599EB:
5161 for (i = 0; i < 16; i++)
5162 adapter->hw_rx_no_dma_resources +=
5163 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5164 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5165 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5166 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5167 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5168 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5169 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5170 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5171 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5172 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5174 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5175 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5176 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5177 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5178 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5179 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5180 /* Add up per cpu counters for total ddp aloc fail */
5181 if (fcoe->pcpu_noddp && fcoe->pcpu_noddp_ext_buff) {
5182 for_each_possible_cpu(cpu) {
5183 fcoe_noddp_counts_sum +=
5184 *per_cpu_ptr(fcoe->pcpu_noddp, cpu);
5185 fcoe_noddp_ext_buff_counts_sum +=
5187 pcpu_noddp_ext_buff, cpu);
5190 hwstats->fcoe_noddp = fcoe_noddp_counts_sum;
5191 hwstats->fcoe_noddp_ext_buff = fcoe_noddp_ext_buff_counts_sum;
5192 #endif /* IXGBE_FCOE */
5197 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5198 hwstats->bprc += bprc;
5199 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5200 if (hw->mac.type == ixgbe_mac_82598EB)
5201 hwstats->mprc -= bprc;
5202 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5203 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5204 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5205 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5206 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5207 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5208 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5209 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5210 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5211 hwstats->lxontxc += lxon;
5212 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5213 hwstats->lxofftxc += lxoff;
5214 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5215 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5217 * 82598 errata - tx of flow control packets is included in tx counters
5219 xon_off_tot = lxon + lxoff;
5220 hwstats->gptc -= xon_off_tot;
5221 hwstats->mptc -= xon_off_tot;
5222 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5223 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5224 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5225 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5226 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5227 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5228 hwstats->ptc64 -= xon_off_tot;
5229 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5230 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5231 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5232 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5233 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5234 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5236 /* Fill out the OS statistics structure */
5237 netdev->stats.multicast = hwstats->mprc;
5240 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5241 netdev->stats.rx_dropped = 0;
5242 netdev->stats.rx_length_errors = hwstats->rlec;
5243 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5244 netdev->stats.rx_missed_errors = total_mpc;
5248 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5249 * @adapter - pointer to the device adapter structure
5251 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5253 struct ixgbe_hw *hw = &adapter->hw;
5256 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5259 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5261 /* if interface is down do nothing */
5262 if (test_bit(__IXGBE_DOWN, &adapter->state))
5265 /* do nothing if we are not using signature filters */
5266 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5269 adapter->fdir_overflow++;
5271 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5272 for (i = 0; i < adapter->num_tx_queues; i++)
5273 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5274 &(adapter->tx_ring[i]->state));
5275 /* re-enable flow director interrupts */
5276 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5278 e_err(probe, "failed to finish FDIR re-initialization, "
5279 "ignored adding FDIR ATR filters\n");
5284 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5285 * @adapter - pointer to the device adapter structure
5287 * This function serves two purposes. First it strobes the interrupt lines
5288 * in order to make certain interrupts are occurring. Secondly it sets the
5289 * bits needed to check for TX hangs. As a result we should immediately
5290 * determine if a hang has occurred.
5292 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5294 struct ixgbe_hw *hw = &adapter->hw;
5298 /* If we're down or resetting, just bail */
5299 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5300 test_bit(__IXGBE_RESETTING, &adapter->state))
5303 /* Force detection of hung controller */
5304 if (netif_carrier_ok(adapter->netdev)) {
5305 for (i = 0; i < adapter->num_tx_queues; i++)
5306 set_check_for_tx_hang(adapter->tx_ring[i]);
5309 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5311 * for legacy and MSI interrupts don't set any bits
5312 * that are enabled for EIAM, because this operation
5313 * would set *both* EIMS and EICS for any bit in EIAM
5315 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5316 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5318 /* get one bit for every active tx/rx interrupt vector */
5319 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
5320 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5321 if (qv->rx.ring || qv->tx.ring)
5322 eics |= ((u64)1 << i);
5326 /* Cause software interrupt to ensure rings are cleaned */
5327 ixgbe_irq_rearm_queues(adapter, eics);
5332 * ixgbe_watchdog_update_link - update the link status
5333 * @adapter - pointer to the device adapter structure
5334 * @link_speed - pointer to a u32 to store the link_speed
5336 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5338 struct ixgbe_hw *hw = &adapter->hw;
5339 u32 link_speed = adapter->link_speed;
5340 bool link_up = adapter->link_up;
5341 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5343 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5346 if (hw->mac.ops.check_link) {
5347 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5349 /* always assume link is up, if no check link function */
5350 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5354 if (adapter->ixgbe_ieee_pfc)
5355 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5357 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5358 hw->mac.ops.fc_enable(hw);
5359 ixgbe_set_rx_drop_en(adapter);
5363 time_after(jiffies, (adapter->link_check_timeout +
5364 IXGBE_TRY_LINK_TIMEOUT))) {
5365 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5366 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5367 IXGBE_WRITE_FLUSH(hw);
5370 adapter->link_up = link_up;
5371 adapter->link_speed = link_speed;
5375 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5376 * print link up message
5377 * @adapter - pointer to the device adapter structure
5379 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5381 struct net_device *netdev = adapter->netdev;
5382 struct ixgbe_hw *hw = &adapter->hw;
5383 u32 link_speed = adapter->link_speed;
5384 bool flow_rx, flow_tx;
5386 /* only continue if link was previously down */
5387 if (netif_carrier_ok(netdev))
5390 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5392 switch (hw->mac.type) {
5393 case ixgbe_mac_82598EB: {
5394 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5395 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5396 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5397 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5400 case ixgbe_mac_X540:
5401 case ixgbe_mac_82599EB: {
5402 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5403 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5404 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5405 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5414 #ifdef CONFIG_IXGBE_PTP
5415 ixgbe_ptp_start_cyclecounter(adapter);
5418 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5419 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5421 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5423 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5426 ((flow_rx && flow_tx) ? "RX/TX" :
5428 (flow_tx ? "TX" : "None"))));
5430 netif_carrier_on(netdev);
5431 ixgbe_check_vf_rate_limit(adapter);
5435 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5436 * print link down message
5437 * @adapter - pointer to the adapter structure
5439 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5441 struct net_device *netdev = adapter->netdev;
5442 struct ixgbe_hw *hw = &adapter->hw;
5444 adapter->link_up = false;
5445 adapter->link_speed = 0;
5447 /* only continue if link was up previously */
5448 if (!netif_carrier_ok(netdev))
5451 /* poll for SFP+ cable when link is down */
5452 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5453 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5455 #ifdef CONFIG_IXGBE_PTP
5456 ixgbe_ptp_start_cyclecounter(adapter);
5459 e_info(drv, "NIC Link is Down\n");
5460 netif_carrier_off(netdev);
5464 * ixgbe_watchdog_flush_tx - flush queues on link down
5465 * @adapter - pointer to the device adapter structure
5467 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5470 int some_tx_pending = 0;
5472 if (!netif_carrier_ok(adapter->netdev)) {
5473 for (i = 0; i < adapter->num_tx_queues; i++) {
5474 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5475 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5476 some_tx_pending = 1;
5481 if (some_tx_pending) {
5482 /* We've lost link, so the controller stops DMA,
5483 * but we've got queued Tx work that's never going
5484 * to get done, so reset controller to flush Tx.
5485 * (Do the reset outside of interrupt context).
5487 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5492 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5496 /* Do not perform spoof check for 82598 */
5497 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5500 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5503 * ssvpc register is cleared on read, if zero then no
5504 * spoofed packets in the last interval.
5509 e_warn(drv, "%d Spoofed packets detected\n", ssvpc);
5513 * ixgbe_watchdog_subtask - check and bring link up
5514 * @adapter - pointer to the device adapter structure
5516 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5518 /* if interface is down do nothing */
5519 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5520 test_bit(__IXGBE_RESETTING, &adapter->state))
5523 ixgbe_watchdog_update_link(adapter);
5525 if (adapter->link_up)
5526 ixgbe_watchdog_link_is_up(adapter);
5528 ixgbe_watchdog_link_is_down(adapter);
5530 ixgbe_spoof_check(adapter);
5531 ixgbe_update_stats(adapter);
5533 ixgbe_watchdog_flush_tx(adapter);
5537 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5538 * @adapter - the ixgbe adapter structure
5540 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5542 struct ixgbe_hw *hw = &adapter->hw;
5545 /* not searching for SFP so there is nothing to do here */
5546 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5547 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5550 /* someone else is in init, wait until next service event */
5551 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5554 err = hw->phy.ops.identify_sfp(hw);
5555 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5558 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5559 /* If no cable is present, then we need to reset
5560 * the next time we find a good cable. */
5561 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5568 /* exit if reset not needed */
5569 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5572 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5575 * A module may be identified correctly, but the EEPROM may not have
5576 * support for that module. setup_sfp() will fail in that case, so
5577 * we should not allow that module to load.
5579 if (hw->mac.type == ixgbe_mac_82598EB)
5580 err = hw->phy.ops.reset(hw);
5582 err = hw->mac.ops.setup_sfp(hw);
5584 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5587 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5588 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5591 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5593 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5594 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5595 e_dev_err("failed to initialize because an unsupported "
5596 "SFP+ module type was detected.\n");
5597 e_dev_err("Reload the driver after installing a "
5598 "supported module.\n");
5599 unregister_netdev(adapter->netdev);
5604 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5605 * @adapter - the ixgbe adapter structure
5607 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5609 struct ixgbe_hw *hw = &adapter->hw;
5613 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5616 /* someone else is in init, wait until next service event */
5617 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5620 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5622 autoneg = hw->phy.autoneg_advertised;
5623 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5624 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5625 if (hw->mac.ops.setup_link)
5626 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5628 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5629 adapter->link_check_timeout = jiffies;
5630 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5633 #ifdef CONFIG_PCI_IOV
5634 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5637 struct ixgbe_hw *hw = &adapter->hw;
5638 struct net_device *netdev = adapter->netdev;
5642 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5643 if (gpc) /* If incrementing then no need for the check below */
5646 * Check to see if a bad DMA write target from an errant or
5647 * malicious VF has caused a PCIe error. If so then we can
5648 * issue a VFLR to the offending VF(s) and then resume without
5649 * requesting a full slot reset.
5652 for (vf = 0; vf < adapter->num_vfs; vf++) {
5653 ciaa = (vf << 16) | 0x80000000;
5654 /* 32 bit read so align, we really want status at offset 6 */
5655 ciaa |= PCI_COMMAND;
5656 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5657 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5659 /* disable debug mode asap after reading data */
5660 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5661 /* Get the upper 16 bits which will be the PCI status reg */
5663 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5664 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5666 ciaa = (vf << 16) | 0x80000000;
5668 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5669 ciad = 0x00008000; /* VFLR */
5670 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5672 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5679 * ixgbe_service_timer - Timer Call-back
5680 * @data: pointer to adapter cast into an unsigned long
5682 static void ixgbe_service_timer(unsigned long data)
5684 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5685 unsigned long next_event_offset;
5688 /* poll faster when waiting for link */
5689 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5690 next_event_offset = HZ / 10;
5692 next_event_offset = HZ * 2;
5694 #ifdef CONFIG_PCI_IOV
5696 * don't bother with SR-IOV VF DMA hang check if there are
5697 * no VFs or the link is down
5699 if (!adapter->num_vfs ||
5700 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5701 goto normal_timer_service;
5703 /* If we have VFs allocated then we must check for DMA hangs */
5704 ixgbe_check_for_bad_vf(adapter);
5705 next_event_offset = HZ / 50;
5706 adapter->timer_event_accumulator++;
5708 if (adapter->timer_event_accumulator >= 100)
5709 adapter->timer_event_accumulator = 0;
5713 normal_timer_service:
5715 /* Reset the timer */
5716 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5719 ixgbe_service_event_schedule(adapter);
5722 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5724 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5727 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5729 /* If we're already down or resetting, just bail */
5730 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5731 test_bit(__IXGBE_RESETTING, &adapter->state))
5734 ixgbe_dump(adapter);
5735 netdev_err(adapter->netdev, "Reset adapter\n");
5736 adapter->tx_timeout_count++;
5738 ixgbe_reinit_locked(adapter);
5742 * ixgbe_service_task - manages and runs subtasks
5743 * @work: pointer to work_struct containing our data
5745 static void ixgbe_service_task(struct work_struct *work)
5747 struct ixgbe_adapter *adapter = container_of(work,
5748 struct ixgbe_adapter,
5751 ixgbe_reset_subtask(adapter);
5752 ixgbe_sfp_detection_subtask(adapter);
5753 ixgbe_sfp_link_config_subtask(adapter);
5754 ixgbe_check_overtemp_subtask(adapter);
5755 ixgbe_watchdog_subtask(adapter);
5756 ixgbe_fdir_reinit_subtask(adapter);
5757 ixgbe_check_hang_subtask(adapter);
5758 #ifdef CONFIG_IXGBE_PTP
5759 ixgbe_ptp_overflow_check(adapter);
5762 ixgbe_service_event_complete(adapter);
5765 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5766 struct ixgbe_tx_buffer *first,
5769 struct sk_buff *skb = first->skb;
5770 u32 vlan_macip_lens, type_tucmd;
5771 u32 mss_l4len_idx, l4len;
5773 if (!skb_is_gso(skb))
5776 if (skb_header_cloned(skb)) {
5777 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5782 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5783 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5785 if (first->protocol == __constant_htons(ETH_P_IP)) {
5786 struct iphdr *iph = ip_hdr(skb);
5789 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5793 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5794 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5795 IXGBE_TX_FLAGS_CSUM |
5796 IXGBE_TX_FLAGS_IPV4;
5797 } else if (skb_is_gso_v6(skb)) {
5798 ipv6_hdr(skb)->payload_len = 0;
5799 tcp_hdr(skb)->check =
5800 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5801 &ipv6_hdr(skb)->daddr,
5803 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5804 IXGBE_TX_FLAGS_CSUM;
5807 /* compute header lengths */
5808 l4len = tcp_hdrlen(skb);
5809 *hdr_len = skb_transport_offset(skb) + l4len;
5811 /* update gso size and bytecount with header size */
5812 first->gso_segs = skb_shinfo(skb)->gso_segs;
5813 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5815 /* mss_l4len_id: use 1 as index for TSO */
5816 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5817 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5818 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5820 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5821 vlan_macip_lens = skb_network_header_len(skb);
5822 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5823 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5825 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5831 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5832 struct ixgbe_tx_buffer *first)
5834 struct sk_buff *skb = first->skb;
5835 u32 vlan_macip_lens = 0;
5836 u32 mss_l4len_idx = 0;
5839 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5840 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
5841 !(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
5845 switch (first->protocol) {
5846 case __constant_htons(ETH_P_IP):
5847 vlan_macip_lens |= skb_network_header_len(skb);
5848 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5849 l4_hdr = ip_hdr(skb)->protocol;
5851 case __constant_htons(ETH_P_IPV6):
5852 vlan_macip_lens |= skb_network_header_len(skb);
5853 l4_hdr = ipv6_hdr(skb)->nexthdr;
5856 if (unlikely(net_ratelimit())) {
5857 dev_warn(tx_ring->dev,
5858 "partial checksum but proto=%x!\n",
5866 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5867 mss_l4len_idx = tcp_hdrlen(skb) <<
5868 IXGBE_ADVTXD_L4LEN_SHIFT;
5871 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5872 mss_l4len_idx = sizeof(struct sctphdr) <<
5873 IXGBE_ADVTXD_L4LEN_SHIFT;
5876 mss_l4len_idx = sizeof(struct udphdr) <<
5877 IXGBE_ADVTXD_L4LEN_SHIFT;
5880 if (unlikely(net_ratelimit())) {
5881 dev_warn(tx_ring->dev,
5882 "partial checksum but l4 proto=%x!\n",
5888 /* update TX checksum flag */
5889 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
5892 /* vlan_macip_lens: MACLEN, VLAN tag */
5893 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5894 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5896 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
5897 type_tucmd, mss_l4len_idx);
5900 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
5902 /* set type for advanced descriptor with frame checksum insertion */
5903 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
5904 IXGBE_ADVTXD_DCMD_IFCS |
5905 IXGBE_ADVTXD_DCMD_DEXT);
5907 /* set HW vlan bit if vlan is present */
5908 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
5909 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
5911 #ifdef CONFIG_IXGBE_PTP
5912 if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
5913 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
5916 /* set segmentation enable bits for TSO/FSO */
5918 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
5920 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5922 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
5927 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
5928 u32 tx_flags, unsigned int paylen)
5930 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
5932 /* enable L4 checksum for TSO and TX checksum offload */
5933 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
5934 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
5936 /* enble IPv4 checksum for TSO */
5937 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
5938 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
5940 /* use index 1 context for TSO/FSO/FCOE */
5942 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
5944 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5946 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
5949 * Check Context must be set if Tx switch is enabled, which it
5950 * always is for case where virtual functions are running
5953 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
5955 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
5957 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
5959 tx_desc->read.olinfo_status = olinfo_status;
5962 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5965 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
5966 struct ixgbe_tx_buffer *first,
5970 struct sk_buff *skb = first->skb;
5971 struct ixgbe_tx_buffer *tx_buffer;
5972 union ixgbe_adv_tx_desc *tx_desc;
5973 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
5974 unsigned int data_len = skb->data_len;
5975 unsigned int size = skb_headlen(skb);
5976 unsigned int paylen = skb->len - hdr_len;
5977 u32 tx_flags = first->tx_flags;
5979 u16 i = tx_ring->next_to_use;
5981 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5983 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
5984 cmd_type = ixgbe_tx_cmd_type(tx_flags);
5987 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5988 if (data_len < sizeof(struct fcoe_crc_eof)) {
5989 size -= sizeof(struct fcoe_crc_eof) - data_len;
5992 data_len -= sizeof(struct fcoe_crc_eof);
5997 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5998 if (dma_mapping_error(tx_ring->dev, dma))
6001 /* record length, and DMA address */
6002 dma_unmap_len_set(first, len, size);
6003 dma_unmap_addr_set(first, dma, dma);
6005 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6008 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6009 tx_desc->read.cmd_type_len =
6010 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
6014 if (i == tx_ring->count) {
6015 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6019 dma += IXGBE_MAX_DATA_PER_TXD;
6020 size -= IXGBE_MAX_DATA_PER_TXD;
6022 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6023 tx_desc->read.olinfo_status = 0;
6026 if (likely(!data_len))
6029 if (unlikely(skb->no_fcs))
6030 cmd_type &= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS));
6031 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
6035 if (i == tx_ring->count) {
6036 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6041 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6043 size = skb_frag_size(frag);
6047 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6049 if (dma_mapping_error(tx_ring->dev, dma))
6052 tx_buffer = &tx_ring->tx_buffer_info[i];
6053 dma_unmap_len_set(tx_buffer, len, size);
6054 dma_unmap_addr_set(tx_buffer, dma, dma);
6056 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6057 tx_desc->read.olinfo_status = 0;
6062 /* write last descriptor with RS and EOP bits */
6063 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6064 tx_desc->read.cmd_type_len = cmd_type;
6066 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6068 /* set the timestamp */
6069 first->time_stamp = jiffies;
6072 * Force memory writes to complete before letting h/w know there
6073 * are new descriptors to fetch. (Only applicable for weak-ordered
6074 * memory model archs, such as IA-64).
6076 * We also need this memory barrier to make certain all of the
6077 * status bits have been updated before next_to_watch is written.
6081 /* set next_to_watch value indicating a packet is present */
6082 first->next_to_watch = tx_desc;
6085 if (i == tx_ring->count)
6088 tx_ring->next_to_use = i;
6090 /* notify HW of packet */
6091 writel(i, tx_ring->tail);
6095 dev_err(tx_ring->dev, "TX DMA map failed\n");
6097 /* clear dma mappings for failed tx_buffer_info map */
6099 tx_buffer = &tx_ring->tx_buffer_info[i];
6100 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6101 if (tx_buffer == first)
6108 tx_ring->next_to_use = i;
6111 static void ixgbe_atr(struct ixgbe_ring *ring,
6112 struct ixgbe_tx_buffer *first)
6114 struct ixgbe_q_vector *q_vector = ring->q_vector;
6115 union ixgbe_atr_hash_dword input = { .dword = 0 };
6116 union ixgbe_atr_hash_dword common = { .dword = 0 };
6118 unsigned char *network;
6120 struct ipv6hdr *ipv6;
6125 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6129 /* do nothing if sampling is disabled */
6130 if (!ring->atr_sample_rate)
6135 /* snag network header to get L4 type and address */
6136 hdr.network = skb_network_header(first->skb);
6138 /* Currently only IPv4/IPv6 with TCP is supported */
6139 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6140 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6141 (first->protocol != __constant_htons(ETH_P_IP) ||
6142 hdr.ipv4->protocol != IPPROTO_TCP))
6145 th = tcp_hdr(first->skb);
6147 /* skip this packet since it is invalid or the socket is closing */
6151 /* sample on all syn packets or once every atr sample count */
6152 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6155 /* reset sample count */
6156 ring->atr_count = 0;
6158 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6161 * src and dst are inverted, think how the receiver sees them
6163 * The input is broken into two sections, a non-compressed section
6164 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6165 * is XORed together and stored in the compressed dword.
6167 input.formatted.vlan_id = vlan_id;
6170 * since src port and flex bytes occupy the same word XOR them together
6171 * and write the value to source port portion of compressed dword
6173 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6174 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6176 common.port.src ^= th->dest ^ first->protocol;
6177 common.port.dst ^= th->source;
6179 if (first->protocol == __constant_htons(ETH_P_IP)) {
6180 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6181 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6183 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6184 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6185 hdr.ipv6->saddr.s6_addr32[1] ^
6186 hdr.ipv6->saddr.s6_addr32[2] ^
6187 hdr.ipv6->saddr.s6_addr32[3] ^
6188 hdr.ipv6->daddr.s6_addr32[0] ^
6189 hdr.ipv6->daddr.s6_addr32[1] ^
6190 hdr.ipv6->daddr.s6_addr32[2] ^
6191 hdr.ipv6->daddr.s6_addr32[3];
6194 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6195 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6196 input, common, ring->queue_index);
6199 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6201 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6202 /* Herbert's original patch had:
6203 * smp_mb__after_netif_stop_queue();
6204 * but since that doesn't exist yet, just open code it. */
6207 /* We need to check again in a case another CPU has just
6208 * made room available. */
6209 if (likely(ixgbe_desc_unused(tx_ring) < size))
6212 /* A reprieve! - use start_queue because it doesn't call schedule */
6213 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6214 ++tx_ring->tx_stats.restart_queue;
6218 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6220 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6222 return __ixgbe_maybe_stop_tx(tx_ring, size);
6225 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6227 struct ixgbe_adapter *adapter = netdev_priv(dev);
6228 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6231 __be16 protocol = vlan_get_protocol(skb);
6233 if (((protocol == htons(ETH_P_FCOE)) ||
6234 (protocol == htons(ETH_P_FIP))) &&
6235 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6236 txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1);
6237 txq += adapter->ring_feature[RING_F_FCOE].mask;
6242 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6243 while (unlikely(txq >= dev->real_num_tx_queues))
6244 txq -= dev->real_num_tx_queues;
6248 return skb_tx_hash(dev, skb);
6251 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6252 struct ixgbe_adapter *adapter,
6253 struct ixgbe_ring *tx_ring)
6255 struct ixgbe_tx_buffer *first;
6258 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6261 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6262 __be16 protocol = skb->protocol;
6266 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6267 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6268 * + 2 desc gap to keep tail from touching head,
6269 * + 1 desc for context descriptor,
6270 * otherwise try next time
6272 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6273 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6274 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6276 count += skb_shinfo(skb)->nr_frags;
6278 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6279 tx_ring->tx_stats.tx_busy++;
6280 return NETDEV_TX_BUSY;
6283 /* record the location of the first descriptor for this packet */
6284 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6286 first->bytecount = skb->len;
6287 first->gso_segs = 1;
6289 /* if we have a HW VLAN tag being added default to the HW one */
6290 if (vlan_tx_tag_present(skb)) {
6291 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6292 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6293 /* else if it is a SW VLAN check the next protocol and store the tag */
6294 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6295 struct vlan_hdr *vhdr, _vhdr;
6296 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6300 protocol = vhdr->h_vlan_encapsulated_proto;
6301 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6302 IXGBE_TX_FLAGS_VLAN_SHIFT;
6303 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6306 skb_tx_timestamp(skb);
6308 #ifdef CONFIG_IXGBE_PTP
6309 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6310 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6311 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
6315 #ifdef CONFIG_PCI_IOV
6317 * Use the l2switch_enable flag - would be false if the DMA
6318 * Tx switch had been disabled.
6320 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6321 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6324 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6325 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6326 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6327 (skb->priority != TC_PRIO_CONTROL))) {
6328 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6329 tx_flags |= (skb->priority & 0x7) <<
6330 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6331 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6332 struct vlan_ethhdr *vhdr;
6333 if (skb_header_cloned(skb) &&
6334 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6336 vhdr = (struct vlan_ethhdr *)skb->data;
6337 vhdr->h_vlan_TCI = htons(tx_flags >>
6338 IXGBE_TX_FLAGS_VLAN_SHIFT);
6340 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6344 /* record initial flags and protocol */
6345 first->tx_flags = tx_flags;
6346 first->protocol = protocol;
6349 /* setup tx offload for FCoE */
6350 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6351 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6352 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6359 #endif /* IXGBE_FCOE */
6360 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6364 ixgbe_tx_csum(tx_ring, first);
6366 /* add the ATR filter if ATR is on */
6367 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6368 ixgbe_atr(tx_ring, first);
6372 #endif /* IXGBE_FCOE */
6373 ixgbe_tx_map(tx_ring, first, hdr_len);
6375 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6377 return NETDEV_TX_OK;
6380 dev_kfree_skb_any(first->skb);
6383 return NETDEV_TX_OK;
6386 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6387 struct net_device *netdev)
6389 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6390 struct ixgbe_ring *tx_ring;
6392 if (skb->len <= 0) {
6393 dev_kfree_skb_any(skb);
6394 return NETDEV_TX_OK;
6398 * The minimum packet size for olinfo paylen is 17 so pad the skb
6399 * in order to meet this minimum size requirement.
6401 if (skb->len < 17) {
6402 if (skb_padto(skb, 17))
6403 return NETDEV_TX_OK;
6407 tx_ring = adapter->tx_ring[skb->queue_mapping];
6408 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6412 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6413 * @netdev: network interface device structure
6414 * @p: pointer to an address structure
6416 * Returns 0 on success, negative on failure
6418 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6420 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6421 struct ixgbe_hw *hw = &adapter->hw;
6422 struct sockaddr *addr = p;
6424 if (!is_valid_ether_addr(addr->sa_data))
6425 return -EADDRNOTAVAIL;
6427 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6428 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6430 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6437 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6439 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6440 struct ixgbe_hw *hw = &adapter->hw;
6444 if (prtad != hw->phy.mdio.prtad)
6446 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6452 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6453 u16 addr, u16 value)
6455 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6456 struct ixgbe_hw *hw = &adapter->hw;
6458 if (prtad != hw->phy.mdio.prtad)
6460 return hw->phy.ops.write_reg(hw, addr, devad, value);
6463 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6465 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6468 #ifdef CONFIG_IXGBE_PTP
6470 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
6473 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6478 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6480 * @netdev: network interface device structure
6482 * Returns non-zero on failure
6484 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6487 struct ixgbe_adapter *adapter = netdev_priv(dev);
6488 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6490 if (is_valid_ether_addr(mac->san_addr)) {
6492 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6499 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6501 * @netdev: network interface device structure
6503 * Returns non-zero on failure
6505 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6508 struct ixgbe_adapter *adapter = netdev_priv(dev);
6509 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6511 if (is_valid_ether_addr(mac->san_addr)) {
6513 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6519 #ifdef CONFIG_NET_POLL_CONTROLLER
6521 * Polling 'interrupt' - used by things like netconsole to send skbs
6522 * without having to re-enable interrupts. It's not called while
6523 * the interrupt routine is executing.
6525 static void ixgbe_netpoll(struct net_device *netdev)
6527 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6530 /* if interface is down do nothing */
6531 if (test_bit(__IXGBE_DOWN, &adapter->state))
6534 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6535 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6536 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
6537 for (i = 0; i < num_q_vectors; i++) {
6538 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
6539 ixgbe_msix_clean_rings(0, q_vector);
6542 ixgbe_intr(adapter->pdev->irq, netdev);
6544 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6548 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6549 struct rtnl_link_stats64 *stats)
6551 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6555 for (i = 0; i < adapter->num_rx_queues; i++) {
6556 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6562 start = u64_stats_fetch_begin_bh(&ring->syncp);
6563 packets = ring->stats.packets;
6564 bytes = ring->stats.bytes;
6565 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6566 stats->rx_packets += packets;
6567 stats->rx_bytes += bytes;
6571 for (i = 0; i < adapter->num_tx_queues; i++) {
6572 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6578 start = u64_stats_fetch_begin_bh(&ring->syncp);
6579 packets = ring->stats.packets;
6580 bytes = ring->stats.bytes;
6581 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6582 stats->tx_packets += packets;
6583 stats->tx_bytes += bytes;
6587 /* following stats updated by ixgbe_watchdog_task() */
6588 stats->multicast = netdev->stats.multicast;
6589 stats->rx_errors = netdev->stats.rx_errors;
6590 stats->rx_length_errors = netdev->stats.rx_length_errors;
6591 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6592 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6596 #ifdef CONFIG_IXGBE_DCB
6597 /* ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6598 * #adapter: pointer to ixgbe_adapter
6599 * @tc: number of traffic classes currently enabled
6601 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6602 * 802.1Q priority maps to a packet buffer that exists.
6604 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6606 struct ixgbe_hw *hw = &adapter->hw;
6610 /* 82598 have a static priority to TC mapping that can not
6611 * be changed so no validation is needed.
6613 if (hw->mac.type == ixgbe_mac_82598EB)
6616 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6619 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6620 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6622 /* If up2tc is out of bounds default to zero */
6624 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6628 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6633 /* ixgbe_setup_tc - routine to configure net_device for multiple traffic
6636 * @netdev: net device to configure
6637 * @tc: number of traffic classes to enable
6639 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6641 struct ixgbe_adapter *adapter = netdev_priv(dev);
6642 struct ixgbe_hw *hw = &adapter->hw;
6644 /* Multiple traffic classes requires multiple queues */
6645 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6646 e_err(drv, "Enable failed, needs MSI-X\n");
6650 /* Hardware supports up to 8 traffic classes */
6651 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6652 (hw->mac.type == ixgbe_mac_82598EB &&
6653 tc < MAX_TRAFFIC_CLASS))
6656 /* Hardware has to reinitialize queues and interrupts to
6657 * match packet buffer alignment. Unfortunately, the
6658 * hardware is not flexible enough to do this dynamically.
6660 if (netif_running(dev))
6662 ixgbe_clear_interrupt_scheme(adapter);
6665 netdev_set_num_tc(dev, tc);
6666 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6667 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6669 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6670 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6671 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6674 netdev_reset_tc(dev);
6675 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6676 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6678 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6679 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6681 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6682 adapter->dcb_cfg.pfc_mode_enable = false;
6685 ixgbe_init_interrupt_scheme(adapter);
6686 ixgbe_validate_rtr(adapter, tc);
6687 if (netif_running(dev))
6693 #endif /* CONFIG_IXGBE_DCB */
6694 void ixgbe_do_reset(struct net_device *netdev)
6696 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6698 if (netif_running(netdev))
6699 ixgbe_reinit_locked(adapter);
6701 ixgbe_reset(adapter);
6704 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6705 netdev_features_t features)
6707 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6709 /* return error if RXHASH is being enabled when RSS is not supported */
6710 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
6711 features &= ~NETIF_F_RXHASH;
6713 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6714 if (!(features & NETIF_F_RXCSUM))
6715 features &= ~NETIF_F_LRO;
6717 /* Turn off LRO if not RSC capable */
6718 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6719 features &= ~NETIF_F_LRO;
6724 static int ixgbe_set_features(struct net_device *netdev,
6725 netdev_features_t features)
6727 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6728 netdev_features_t changed = netdev->features ^ features;
6729 bool need_reset = false;
6731 /* Make sure RSC matches LRO, reset if change */
6732 if (!(features & NETIF_F_LRO)) {
6733 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6735 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6736 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6737 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6738 if (adapter->rx_itr_setting == 1 ||
6739 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6740 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6742 } else if ((changed ^ features) & NETIF_F_LRO) {
6743 e_info(probe, "rx-usecs set too low, "
6749 * Check if Flow Director n-tuple support was enabled or disabled. If
6750 * the state changed, we need to reset.
6752 if (!(features & NETIF_F_NTUPLE)) {
6753 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
6754 /* turn off Flow Director, set ATR and reset */
6755 if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
6756 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
6757 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6760 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6761 } else if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
6762 /* turn off ATR, enable perfect filters and reset */
6763 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6764 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6768 if (features & NETIF_F_HW_VLAN_RX)
6769 ixgbe_vlan_strip_enable(adapter);
6771 ixgbe_vlan_strip_disable(adapter);
6773 if (changed & NETIF_F_RXALL)
6776 netdev->features = features;
6778 ixgbe_do_reset(netdev);
6783 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm,
6784 struct net_device *dev,
6785 unsigned char *addr,
6788 struct ixgbe_adapter *adapter = netdev_priv(dev);
6789 int err = -EOPNOTSUPP;
6791 if (ndm->ndm_state & NUD_PERMANENT) {
6792 pr_info("%s: FDB only supports static addresses\n",
6797 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6798 if (is_unicast_ether_addr(addr))
6799 err = dev_uc_add_excl(dev, addr);
6800 else if (is_multicast_ether_addr(addr))
6801 err = dev_mc_add_excl(dev, addr);
6806 /* Only return duplicate errors if NLM_F_EXCL is set */
6807 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6813 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
6814 struct net_device *dev,
6815 unsigned char *addr)
6817 struct ixgbe_adapter *adapter = netdev_priv(dev);
6818 int err = -EOPNOTSUPP;
6820 if (ndm->ndm_state & NUD_PERMANENT) {
6821 pr_info("%s: FDB only supports static addresses\n",
6826 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6827 if (is_unicast_ether_addr(addr))
6828 err = dev_uc_del(dev, addr);
6829 else if (is_multicast_ether_addr(addr))
6830 err = dev_mc_del(dev, addr);
6838 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
6839 struct netlink_callback *cb,
6840 struct net_device *dev,
6843 struct ixgbe_adapter *adapter = netdev_priv(dev);
6845 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6846 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
6851 static const struct net_device_ops ixgbe_netdev_ops = {
6852 .ndo_open = ixgbe_open,
6853 .ndo_stop = ixgbe_close,
6854 .ndo_start_xmit = ixgbe_xmit_frame,
6855 .ndo_select_queue = ixgbe_select_queue,
6856 .ndo_set_rx_mode = ixgbe_set_rx_mode,
6857 .ndo_validate_addr = eth_validate_addr,
6858 .ndo_set_mac_address = ixgbe_set_mac,
6859 .ndo_change_mtu = ixgbe_change_mtu,
6860 .ndo_tx_timeout = ixgbe_tx_timeout,
6861 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6862 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
6863 .ndo_do_ioctl = ixgbe_ioctl,
6864 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6865 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6866 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6867 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
6868 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
6869 .ndo_get_stats64 = ixgbe_get_stats64,
6870 #ifdef CONFIG_IXGBE_DCB
6871 .ndo_setup_tc = ixgbe_setup_tc,
6873 #ifdef CONFIG_NET_POLL_CONTROLLER
6874 .ndo_poll_controller = ixgbe_netpoll,
6877 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6878 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
6879 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
6880 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6881 .ndo_fcoe_disable = ixgbe_fcoe_disable,
6882 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
6883 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
6884 #endif /* IXGBE_FCOE */
6885 .ndo_set_features = ixgbe_set_features,
6886 .ndo_fix_features = ixgbe_fix_features,
6887 .ndo_fdb_add = ixgbe_ndo_fdb_add,
6888 .ndo_fdb_del = ixgbe_ndo_fdb_del,
6889 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
6892 static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
6893 const struct ixgbe_info *ii)
6895 #ifdef CONFIG_PCI_IOV
6896 struct ixgbe_hw *hw = &adapter->hw;
6898 if (hw->mac.type == ixgbe_mac_82598EB)
6901 /* The 82599 supports up to 64 VFs per physical function
6902 * but this implementation limits allocation to 63 so that
6903 * basic networking resources are still available to the
6904 * physical function. If the user requests greater thn
6905 * 63 VFs then it is an error - reset to default of zero.
6907 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
6908 ixgbe_enable_sriov(adapter, ii);
6909 #endif /* CONFIG_PCI_IOV */
6913 * ixgbe_wol_supported - Check whether device supports WoL
6914 * @hw: hw specific details
6915 * @device_id: the device ID
6916 * @subdev_id: the subsystem device ID
6918 * This function is used by probe and ethtool to determine
6919 * which devices have WoL support
6922 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
6925 struct ixgbe_hw *hw = &adapter->hw;
6926 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
6927 int is_wol_supported = 0;
6929 switch (device_id) {
6930 case IXGBE_DEV_ID_82599_SFP:
6931 /* Only these subdevices could supports WOL */
6932 switch (subdevice_id) {
6933 case IXGBE_SUBDEV_ID_82599_560FLR:
6934 /* only support first port */
6935 if (hw->bus.func != 0)
6937 case IXGBE_SUBDEV_ID_82599_SFP:
6938 is_wol_supported = 1;
6942 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
6943 /* All except this subdevice support WOL */
6944 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
6945 is_wol_supported = 1;
6947 case IXGBE_DEV_ID_82599_KX4:
6948 is_wol_supported = 1;
6950 case IXGBE_DEV_ID_X540T:
6951 /* check eeprom to see if enabled wol */
6952 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
6953 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
6954 (hw->bus.func == 0))) {
6955 is_wol_supported = 1;
6960 return is_wol_supported;
6964 * ixgbe_probe - Device Initialization Routine
6965 * @pdev: PCI device information struct
6966 * @ent: entry in ixgbe_pci_tbl
6968 * Returns 0 on success, negative on failure
6970 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6971 * The OS initialization, configuring of the adapter private structure,
6972 * and a hardware reset occur.
6974 static int __devinit ixgbe_probe(struct pci_dev *pdev,
6975 const struct pci_device_id *ent)
6977 struct net_device *netdev;
6978 struct ixgbe_adapter *adapter = NULL;
6979 struct ixgbe_hw *hw;
6980 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
6981 static int cards_found;
6982 int i, err, pci_using_dac;
6983 u8 part_str[IXGBE_PBANUM_LENGTH];
6984 unsigned int indices = num_possible_cpus();
6990 /* Catch broken hardware that put the wrong VF device ID in
6991 * the PCIe SR-IOV capability.
6993 if (pdev->is_virtfn) {
6994 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
6995 pci_name(pdev), pdev->vendor, pdev->device);
6999 err = pci_enable_device_mem(pdev);
7003 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
7004 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7007 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
7009 err = dma_set_coherent_mask(&pdev->dev,
7013 "No usable DMA configuration, aborting\n");
7020 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7021 IORESOURCE_MEM), ixgbe_driver_name);
7024 "pci_request_selected_regions failed 0x%x\n", err);
7028 pci_enable_pcie_error_reporting(pdev);
7030 pci_set_master(pdev);
7031 pci_save_state(pdev);
7033 #ifdef CONFIG_IXGBE_DCB
7034 indices *= MAX_TRAFFIC_CLASS;
7037 if (ii->mac == ixgbe_mac_82598EB)
7038 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
7040 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
7043 indices += min_t(unsigned int, num_possible_cpus(),
7044 IXGBE_MAX_FCOE_INDICES);
7046 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7049 goto err_alloc_etherdev;
7052 SET_NETDEV_DEV(netdev, &pdev->dev);
7054 adapter = netdev_priv(netdev);
7055 pci_set_drvdata(pdev, adapter);
7057 adapter->netdev = netdev;
7058 adapter->pdev = pdev;
7061 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7063 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7064 pci_resource_len(pdev, 0));
7070 for (i = 1; i <= 5; i++) {
7071 if (pci_resource_len(pdev, i) == 0)
7075 netdev->netdev_ops = &ixgbe_netdev_ops;
7076 ixgbe_set_ethtool_ops(netdev);
7077 netdev->watchdog_timeo = 5 * HZ;
7078 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7080 adapter->bd_number = cards_found;
7083 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7084 hw->mac.type = ii->mac;
7087 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7088 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7089 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7090 if (!(eec & (1 << 8)))
7091 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7094 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7095 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7096 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7097 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7098 hw->phy.mdio.mmds = 0;
7099 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7100 hw->phy.mdio.dev = netdev;
7101 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7102 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7104 ii->get_invariants(hw);
7106 /* setup the private structure */
7107 err = ixgbe_sw_init(adapter);
7111 /* Make it possible the adapter to be woken up via WOL */
7112 switch (adapter->hw.mac.type) {
7113 case ixgbe_mac_82599EB:
7114 case ixgbe_mac_X540:
7115 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7122 * If there is a fan on this device and it has failed log the
7125 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7126 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7127 if (esdp & IXGBE_ESDP_SDP1)
7128 e_crit(probe, "Fan has stopped, replace the adapter\n");
7131 if (allow_unsupported_sfp)
7132 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7134 /* reset_hw fills in the perm_addr as well */
7135 hw->phy.reset_if_overtemp = true;
7136 err = hw->mac.ops.reset_hw(hw);
7137 hw->phy.reset_if_overtemp = false;
7138 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7139 hw->mac.type == ixgbe_mac_82598EB) {
7141 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7142 e_dev_err("failed to load because an unsupported SFP+ "
7143 "module type was detected.\n");
7144 e_dev_err("Reload the driver after installing a supported "
7148 e_dev_err("HW Init failed: %d\n", err);
7152 ixgbe_probe_vf(adapter, ii);
7154 netdev->features = NETIF_F_SG |
7157 NETIF_F_HW_VLAN_TX |
7158 NETIF_F_HW_VLAN_RX |
7159 NETIF_F_HW_VLAN_FILTER |
7165 netdev->hw_features = netdev->features;
7167 switch (adapter->hw.mac.type) {
7168 case ixgbe_mac_82599EB:
7169 case ixgbe_mac_X540:
7170 netdev->features |= NETIF_F_SCTP_CSUM;
7171 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7178 netdev->hw_features |= NETIF_F_RXALL;
7180 netdev->vlan_features |= NETIF_F_TSO;
7181 netdev->vlan_features |= NETIF_F_TSO6;
7182 netdev->vlan_features |= NETIF_F_IP_CSUM;
7183 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7184 netdev->vlan_features |= NETIF_F_SG;
7186 netdev->priv_flags |= IFF_UNICAST_FLT;
7187 netdev->priv_flags |= IFF_SUPP_NOFCS;
7189 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7190 adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
7191 IXGBE_FLAG_DCB_ENABLED);
7193 #ifdef CONFIG_IXGBE_DCB
7194 netdev->dcbnl_ops = &dcbnl_ops;
7198 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7199 if (hw->mac.ops.get_device_caps) {
7200 hw->mac.ops.get_device_caps(hw, &device_caps);
7201 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7202 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7205 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7206 netdev->vlan_features |= NETIF_F_FCOE_CRC;
7207 netdev->vlan_features |= NETIF_F_FSO;
7208 netdev->vlan_features |= NETIF_F_FCOE_MTU;
7210 #endif /* IXGBE_FCOE */
7211 if (pci_using_dac) {
7212 netdev->features |= NETIF_F_HIGHDMA;
7213 netdev->vlan_features |= NETIF_F_HIGHDMA;
7216 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7217 netdev->hw_features |= NETIF_F_LRO;
7218 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7219 netdev->features |= NETIF_F_LRO;
7221 /* make sure the EEPROM is good */
7222 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7223 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7228 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7229 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7231 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
7232 e_dev_err("invalid MAC address\n");
7237 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7238 (unsigned long) adapter);
7240 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7241 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7243 err = ixgbe_init_interrupt_scheme(adapter);
7247 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
7248 netdev->hw_features &= ~NETIF_F_RXHASH;
7249 netdev->features &= ~NETIF_F_RXHASH;
7252 /* WOL not supported for all devices */
7254 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7255 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7256 adapter->wol = IXGBE_WUFC_MAG;
7258 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7260 #ifdef CONFIG_IXGBE_PTP
7261 ixgbe_ptp_init(adapter);
7262 #endif /* CONFIG_IXGBE_PTP*/
7264 /* save off EEPROM version number */
7265 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7266 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7268 /* pick up the PCI bus settings for reporting later */
7269 hw->mac.ops.get_bus_info(hw);
7271 /* print bus type/speed/width info */
7272 e_dev_info("(PCI Express:%s:%s) %pM\n",
7273 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7274 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7276 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7277 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7278 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7282 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7284 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7285 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7286 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7287 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7290 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7291 hw->mac.type, hw->phy.type, part_str);
7293 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7294 e_dev_warn("PCI-Express bandwidth available for this card is "
7295 "not sufficient for optimal performance.\n");
7296 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7300 /* reset the hardware with the new settings */
7301 err = hw->mac.ops.start_hw(hw);
7302 if (err == IXGBE_ERR_EEPROM_VERSION) {
7303 /* We are running on a pre-production device, log a warning */
7304 e_dev_warn("This device is a pre-production adapter/LOM. "
7305 "Please be aware there may be issues associated "
7306 "with your hardware. If you are experiencing "
7307 "problems please contact your Intel or hardware "
7308 "representative who provided you with this "
7311 strcpy(netdev->name, "eth%d");
7312 err = register_netdev(netdev);
7316 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7317 if (hw->mac.ops.disable_tx_laser &&
7318 ((hw->phy.multispeed_fiber) ||
7319 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
7320 (hw->mac.type == ixgbe_mac_82599EB))))
7321 hw->mac.ops.disable_tx_laser(hw);
7323 /* carrier off reporting is important to ethtool even BEFORE open */
7324 netif_carrier_off(netdev);
7326 #ifdef CONFIG_IXGBE_DCA
7327 if (dca_add_requester(&pdev->dev) == 0) {
7328 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7329 ixgbe_setup_dca(adapter);
7332 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7333 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7334 for (i = 0; i < adapter->num_vfs; i++)
7335 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7338 /* firmware requires driver version to be 0xFFFFFFFF
7339 * since os does not support feature
7341 if (hw->mac.ops.set_fw_drv_ver)
7342 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7345 /* add san mac addr to netdev */
7346 ixgbe_add_sanmac_netdev(netdev);
7348 e_dev_info("%s\n", ixgbe_default_device_descr);
7351 #ifdef CONFIG_IXGBE_HWMON
7352 if (ixgbe_sysfs_init(adapter))
7353 e_err(probe, "failed to allocate sysfs resources\n");
7354 #endif /* CONFIG_IXGBE_HWMON */
7359 ixgbe_release_hw_control(adapter);
7360 ixgbe_clear_interrupt_scheme(adapter);
7362 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7363 ixgbe_disable_sriov(adapter);
7364 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7365 iounmap(hw->hw_addr);
7367 free_netdev(netdev);
7369 pci_release_selected_regions(pdev,
7370 pci_select_bars(pdev, IORESOURCE_MEM));
7373 pci_disable_device(pdev);
7378 * ixgbe_remove - Device Removal Routine
7379 * @pdev: PCI device information struct
7381 * ixgbe_remove is called by the PCI subsystem to alert the driver
7382 * that it should release a PCI device. The could be caused by a
7383 * Hot-Plug event, or because the driver is going to be removed from
7386 static void __devexit ixgbe_remove(struct pci_dev *pdev)
7388 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7389 struct net_device *netdev = adapter->netdev;
7391 set_bit(__IXGBE_DOWN, &adapter->state);
7392 cancel_work_sync(&adapter->service_task);
7394 #ifdef CONFIG_IXGBE_PTP
7395 ixgbe_ptp_stop(adapter);
7398 #ifdef CONFIG_IXGBE_DCA
7399 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7400 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7401 dca_remove_requester(&pdev->dev);
7402 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7406 #ifdef CONFIG_IXGBE_HWMON
7407 ixgbe_sysfs_exit(adapter);
7408 #endif /* CONFIG_IXGBE_HWMON */
7411 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7412 ixgbe_cleanup_fcoe(adapter);
7414 #endif /* IXGBE_FCOE */
7416 /* remove the added san mac */
7417 ixgbe_del_sanmac_netdev(netdev);
7419 if (netdev->reg_state == NETREG_REGISTERED)
7420 unregister_netdev(netdev);
7422 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7423 if (!(ixgbe_check_vf_assignment(adapter)))
7424 ixgbe_disable_sriov(adapter);
7426 e_dev_warn("Unloading driver while VFs are assigned "
7427 "- VFs will not be deallocated\n");
7430 ixgbe_clear_interrupt_scheme(adapter);
7432 ixgbe_release_hw_control(adapter);
7435 kfree(adapter->ixgbe_ieee_pfc);
7436 kfree(adapter->ixgbe_ieee_ets);
7439 iounmap(adapter->hw.hw_addr);
7440 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7443 e_dev_info("complete\n");
7445 free_netdev(netdev);
7447 pci_disable_pcie_error_reporting(pdev);
7449 pci_disable_device(pdev);
7453 * ixgbe_io_error_detected - called when PCI error is detected
7454 * @pdev: Pointer to PCI device
7455 * @state: The current pci connection state
7457 * This function is called after a PCI bus error affecting
7458 * this device has been detected.
7460 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7461 pci_channel_state_t state)
7463 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7464 struct net_device *netdev = adapter->netdev;
7466 #ifdef CONFIG_PCI_IOV
7467 struct pci_dev *bdev, *vfdev;
7468 u32 dw0, dw1, dw2, dw3;
7470 u16 req_id, pf_func;
7472 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7473 adapter->num_vfs == 0)
7474 goto skip_bad_vf_detection;
7476 bdev = pdev->bus->self;
7477 while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
7478 bdev = bdev->bus->self;
7481 goto skip_bad_vf_detection;
7483 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7485 goto skip_bad_vf_detection;
7487 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7488 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7489 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7490 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7493 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7494 if (!(req_id & 0x0080))
7495 goto skip_bad_vf_detection;
7497 pf_func = req_id & 0x01;
7498 if ((pf_func & 1) == (pdev->devfn & 1)) {
7499 unsigned int device_id;
7501 vf = (req_id & 0x7F) >> 1;
7502 e_dev_err("VF %d has caused a PCIe error\n", vf);
7503 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7504 "%8.8x\tdw3: %8.8x\n",
7505 dw0, dw1, dw2, dw3);
7506 switch (adapter->hw.mac.type) {
7507 case ixgbe_mac_82599EB:
7508 device_id = IXGBE_82599_VF_DEVICE_ID;
7510 case ixgbe_mac_X540:
7511 device_id = IXGBE_X540_VF_DEVICE_ID;
7518 /* Find the pci device of the offending VF */
7519 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID, device_id, NULL);
7521 if (vfdev->devfn == (req_id & 0xFF))
7523 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID,
7527 * There's a slim chance the VF could have been hot plugged,
7528 * so if it is no longer present we don't need to issue the
7529 * VFLR. Just clean up the AER in that case.
7532 e_dev_err("Issuing VFLR to VF %d\n", vf);
7533 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7536 pci_cleanup_aer_uncorrect_error_status(pdev);
7540 * Even though the error may have occurred on the other port
7541 * we still need to increment the vf error reference count for
7542 * both ports because the I/O resume function will be called
7545 adapter->vferr_refcount++;
7547 return PCI_ERS_RESULT_RECOVERED;
7549 skip_bad_vf_detection:
7550 #endif /* CONFIG_PCI_IOV */
7551 netif_device_detach(netdev);
7553 if (state == pci_channel_io_perm_failure)
7554 return PCI_ERS_RESULT_DISCONNECT;
7556 if (netif_running(netdev))
7557 ixgbe_down(adapter);
7558 pci_disable_device(pdev);
7560 /* Request a slot reset. */
7561 return PCI_ERS_RESULT_NEED_RESET;
7565 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7566 * @pdev: Pointer to PCI device
7568 * Restart the card from scratch, as if from a cold-boot.
7570 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7572 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7573 pci_ers_result_t result;
7576 if (pci_enable_device_mem(pdev)) {
7577 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7578 result = PCI_ERS_RESULT_DISCONNECT;
7580 pci_set_master(pdev);
7581 pci_restore_state(pdev);
7582 pci_save_state(pdev);
7584 pci_wake_from_d3(pdev, false);
7586 ixgbe_reset(adapter);
7587 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7588 result = PCI_ERS_RESULT_RECOVERED;
7591 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7593 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7594 "failed 0x%0x\n", err);
7595 /* non-fatal, continue */
7602 * ixgbe_io_resume - called when traffic can start flowing again.
7603 * @pdev: Pointer to PCI device
7605 * This callback is called when the error recovery driver tells us that
7606 * its OK to resume normal operation.
7608 static void ixgbe_io_resume(struct pci_dev *pdev)
7610 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7611 struct net_device *netdev = adapter->netdev;
7613 #ifdef CONFIG_PCI_IOV
7614 if (adapter->vferr_refcount) {
7615 e_info(drv, "Resuming after VF err\n");
7616 adapter->vferr_refcount--;
7621 if (netif_running(netdev))
7624 netif_device_attach(netdev);
7627 static struct pci_error_handlers ixgbe_err_handler = {
7628 .error_detected = ixgbe_io_error_detected,
7629 .slot_reset = ixgbe_io_slot_reset,
7630 .resume = ixgbe_io_resume,
7633 static struct pci_driver ixgbe_driver = {
7634 .name = ixgbe_driver_name,
7635 .id_table = ixgbe_pci_tbl,
7636 .probe = ixgbe_probe,
7637 .remove = __devexit_p(ixgbe_remove),
7639 .suspend = ixgbe_suspend,
7640 .resume = ixgbe_resume,
7642 .shutdown = ixgbe_shutdown,
7643 .err_handler = &ixgbe_err_handler
7647 * ixgbe_init_module - Driver Registration Routine
7649 * ixgbe_init_module is the first routine called when the driver is
7650 * loaded. All it does is register with the PCI subsystem.
7652 static int __init ixgbe_init_module(void)
7655 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7656 pr_info("%s\n", ixgbe_copyright);
7658 #ifdef CONFIG_IXGBE_DCA
7659 dca_register_notify(&dca_notifier);
7662 ret = pci_register_driver(&ixgbe_driver);
7666 module_init(ixgbe_init_module);
7669 * ixgbe_exit_module - Driver Exit Cleanup Routine
7671 * ixgbe_exit_module is called just before the driver is removed
7674 static void __exit ixgbe_exit_module(void)
7676 #ifdef CONFIG_IXGBE_DCA
7677 dca_unregister_notify(&dca_notifier);
7679 pci_unregister_driver(&ixgbe_driver);
7680 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7683 #ifdef CONFIG_IXGBE_DCA
7684 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7689 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7690 __ixgbe_notify_dca);
7692 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7695 #endif /* CONFIG_IXGBE_DCA */
7697 module_exit(ixgbe_exit_module);