1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2015 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
56 #include <linux/of_net.h>
60 #include <asm/idprom.h>
65 #include "ixgbe_common.h"
66 #include "ixgbe_dcb_82599.h"
67 #include "ixgbe_sriov.h"
68 #ifdef CONFIG_IXGBE_VXLAN
69 #include <net/vxlan.h>
72 char ixgbe_driver_name[] = "ixgbe";
73 static const char ixgbe_driver_string[] =
74 "Intel(R) 10 Gigabit PCI Express Network Driver";
76 char ixgbe_default_device_descr[] =
77 "Intel(R) 10 Gigabit Network Connection";
79 static char ixgbe_default_device_descr[] =
80 "Intel(R) 10 Gigabit Network Connection";
82 #define DRV_VERSION "4.2.1-k"
83 const char ixgbe_driver_version[] = DRV_VERSION;
84 static const char ixgbe_copyright[] =
85 "Copyright (c) 1999-2015 Intel Corporation.";
87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
90 [board_82598] = &ixgbe_82598_info,
91 [board_82599] = &ixgbe_82599_info,
92 [board_X540] = &ixgbe_X540_info,
93 [board_X550] = &ixgbe_X550_info,
94 [board_X550EM_x] = &ixgbe_X550EM_x_info,
97 /* ixgbe_pci_tbl - PCI Device ID Table
99 * Wildcard entries (PCI_ANY_ID) should come last
100 * Last entry must be all 0s
102 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
103 * Class, Class Mask, private data (not used) }
105 static const struct pci_device_id ixgbe_pci_tbl[] = {
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
141 /* required last entry */
144 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
146 #ifdef CONFIG_IXGBE_DCA
147 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
149 static struct notifier_block dca_notifier = {
150 .notifier_call = ixgbe_notify_dca,
156 #ifdef CONFIG_PCI_IOV
157 static unsigned int max_vfs;
158 module_param(max_vfs, uint, 0);
159 MODULE_PARM_DESC(max_vfs,
160 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
161 #endif /* CONFIG_PCI_IOV */
163 static unsigned int allow_unsupported_sfp;
164 module_param(allow_unsupported_sfp, uint, 0);
165 MODULE_PARM_DESC(allow_unsupported_sfp,
166 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
169 static int debug = -1;
170 module_param(debug, int, 0);
171 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION);
178 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
183 struct pci_dev *parent_dev;
184 struct pci_bus *parent_bus;
186 parent_bus = adapter->pdev->bus->parent;
190 parent_dev = parent_bus->self;
194 if (!pci_is_pcie(parent_dev))
197 pcie_capability_read_word(parent_dev, reg, value);
198 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
199 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
206 struct ixgbe_hw *hw = &adapter->hw;
210 hw->bus.type = ixgbe_bus_type_pci_express;
212 /* Get the negotiated link width and speed from PCI config space of the
213 * parent, as this device is behind a switch
215 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
217 /* assume caller will handle error case */
221 hw->bus.width = ixgbe_convert_bus_width(link_status);
222 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
228 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
229 * @hw: hw specific details
231 * This function is used by probe to determine whether a device's PCI-Express
232 * bandwidth details should be gathered from the parent bus instead of from the
233 * device. Used to ensure that various locations all have the correct device ID
236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
238 switch (hw->device_id) {
239 case IXGBE_DEV_ID_82599_SFP_SF_QP:
240 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
250 struct ixgbe_hw *hw = &adapter->hw;
252 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
253 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
254 struct pci_dev *pdev;
256 /* Some devices are not connected over PCIe and thus do not negotiate
257 * speed. These devices do not have valid bus info, and thus any report
258 * we generate may not be correct.
260 if (hw->bus.type == ixgbe_bus_type_internal)
263 /* determine whether to use the parent device */
264 if (ixgbe_pcie_from_parent(&adapter->hw))
265 pdev = adapter->pdev->bus->parent->self;
267 pdev = adapter->pdev;
269 if (pcie_get_minimum_link(pdev, &speed, &width) ||
270 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
271 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
276 case PCIE_SPEED_2_5GT:
277 /* 8b/10b encoding reduces max throughput by 20% */
280 case PCIE_SPEED_5_0GT:
281 /* 8b/10b encoding reduces max throughput by 20% */
284 case PCIE_SPEED_8_0GT:
285 /* 128b/130b encoding reduces throughput by less than 2% */
289 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
293 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
295 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
296 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
297 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
298 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
301 (speed == PCIE_SPEED_2_5GT ? "20%" :
302 speed == PCIE_SPEED_5_0GT ? "20%" :
303 speed == PCIE_SPEED_8_0GT ? "<2%" :
306 if (max_gts < expected_gts) {
307 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
308 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
310 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
314 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
316 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
317 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
318 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
319 schedule_work(&adapter->service_task);
322 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
324 struct ixgbe_adapter *adapter = hw->back;
329 e_dev_err("Adapter removed\n");
330 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
331 ixgbe_service_event_schedule(adapter);
334 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
338 /* The following check not only optimizes a bit by not
339 * performing a read on the status register when the
340 * register just read was a status register read that
341 * returned IXGBE_FAILED_READ_REG. It also blocks any
342 * potential recursion.
344 if (reg == IXGBE_STATUS) {
345 ixgbe_remove_adapter(hw);
348 value = ixgbe_read_reg(hw, IXGBE_STATUS);
349 if (value == IXGBE_FAILED_READ_REG)
350 ixgbe_remove_adapter(hw);
354 * ixgbe_read_reg - Read from device register
355 * @hw: hw specific details
356 * @reg: offset of register to read
358 * Returns : value read or IXGBE_FAILED_READ_REG if removed
360 * This function is used to read device registers. It checks for device
361 * removal by confirming any read that returns all ones by checking the
362 * status register value for all ones. This function avoids reading from
363 * the hardware if a removal was previously detected in which case it
364 * returns IXGBE_FAILED_READ_REG (all ones).
366 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
368 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
371 if (ixgbe_removed(reg_addr))
372 return IXGBE_FAILED_READ_REG;
373 value = readl(reg_addr + reg);
374 if (unlikely(value == IXGBE_FAILED_READ_REG))
375 ixgbe_check_remove(hw, reg);
379 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
383 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
384 if (value == IXGBE_FAILED_READ_CFG_WORD) {
385 ixgbe_remove_adapter(hw);
391 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
393 struct ixgbe_adapter *adapter = hw->back;
396 if (ixgbe_removed(hw->hw_addr))
397 return IXGBE_FAILED_READ_CFG_WORD;
398 pci_read_config_word(adapter->pdev, reg, &value);
399 if (value == IXGBE_FAILED_READ_CFG_WORD &&
400 ixgbe_check_cfg_remove(hw, adapter->pdev))
401 return IXGBE_FAILED_READ_CFG_WORD;
405 #ifdef CONFIG_PCI_IOV
406 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
408 struct ixgbe_adapter *adapter = hw->back;
411 if (ixgbe_removed(hw->hw_addr))
412 return IXGBE_FAILED_READ_CFG_DWORD;
413 pci_read_config_dword(adapter->pdev, reg, &value);
414 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
415 ixgbe_check_cfg_remove(hw, adapter->pdev))
416 return IXGBE_FAILED_READ_CFG_DWORD;
419 #endif /* CONFIG_PCI_IOV */
421 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
423 struct ixgbe_adapter *adapter = hw->back;
425 if (ixgbe_removed(hw->hw_addr))
427 pci_write_config_word(adapter->pdev, reg, value);
430 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
432 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
434 /* flush memory to make sure state is correct before next watchdog */
435 smp_mb__before_atomic();
436 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
439 struct ixgbe_reg_info {
444 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
446 /* General Registers */
447 {IXGBE_CTRL, "CTRL"},
448 {IXGBE_STATUS, "STATUS"},
449 {IXGBE_CTRL_EXT, "CTRL_EXT"},
451 /* Interrupt Registers */
452 {IXGBE_EICR, "EICR"},
455 {IXGBE_SRRCTL(0), "SRRCTL"},
456 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
457 {IXGBE_RDLEN(0), "RDLEN"},
458 {IXGBE_RDH(0), "RDH"},
459 {IXGBE_RDT(0), "RDT"},
460 {IXGBE_RXDCTL(0), "RXDCTL"},
461 {IXGBE_RDBAL(0), "RDBAL"},
462 {IXGBE_RDBAH(0), "RDBAH"},
465 {IXGBE_TDBAL(0), "TDBAL"},
466 {IXGBE_TDBAH(0), "TDBAH"},
467 {IXGBE_TDLEN(0), "TDLEN"},
468 {IXGBE_TDH(0), "TDH"},
469 {IXGBE_TDT(0), "TDT"},
470 {IXGBE_TXDCTL(0), "TXDCTL"},
472 /* List Terminator */
478 * ixgbe_regdump - register printout routine
480 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
486 switch (reginfo->ofs) {
487 case IXGBE_SRRCTL(0):
488 for (i = 0; i < 64; i++)
489 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
491 case IXGBE_DCA_RXCTRL(0):
492 for (i = 0; i < 64; i++)
493 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
496 for (i = 0; i < 64; i++)
497 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
500 for (i = 0; i < 64; i++)
501 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
504 for (i = 0; i < 64; i++)
505 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
507 case IXGBE_RXDCTL(0):
508 for (i = 0; i < 64; i++)
509 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
512 for (i = 0; i < 64; i++)
513 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
516 for (i = 0; i < 64; i++)
517 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
520 for (i = 0; i < 64; i++)
521 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
524 for (i = 0; i < 64; i++)
525 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
528 for (i = 0; i < 64; i++)
529 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
532 for (i = 0; i < 64; i++)
533 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
536 for (i = 0; i < 64; i++)
537 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
539 case IXGBE_TXDCTL(0):
540 for (i = 0; i < 64; i++)
541 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
544 pr_info("%-15s %08x\n", reginfo->name,
545 IXGBE_READ_REG(hw, reginfo->ofs));
549 for (i = 0; i < 8; i++) {
550 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
551 pr_err("%-15s", rname);
552 for (j = 0; j < 8; j++)
553 pr_cont(" %08x", regs[i*8+j]);
560 * ixgbe_dump - Print registers, tx-rings and rx-rings
562 static void ixgbe_dump(struct ixgbe_adapter *adapter)
564 struct net_device *netdev = adapter->netdev;
565 struct ixgbe_hw *hw = &adapter->hw;
566 struct ixgbe_reg_info *reginfo;
568 struct ixgbe_ring *tx_ring;
569 struct ixgbe_tx_buffer *tx_buffer;
570 union ixgbe_adv_tx_desc *tx_desc;
571 struct my_u0 { u64 a; u64 b; } *u0;
572 struct ixgbe_ring *rx_ring;
573 union ixgbe_adv_rx_desc *rx_desc;
574 struct ixgbe_rx_buffer *rx_buffer_info;
578 if (!netif_msg_hw(adapter))
581 /* Print netdevice Info */
583 dev_info(&adapter->pdev->dev, "Net device Info\n");
584 pr_info("Device Name state "
585 "trans_start last_rx\n");
586 pr_info("%-15s %016lX %016lX %016lX\n",
593 /* Print Registers */
594 dev_info(&adapter->pdev->dev, "Register Dump\n");
595 pr_info(" Register Name Value\n");
596 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
597 reginfo->name; reginfo++) {
598 ixgbe_regdump(hw, reginfo);
601 /* Print TX Ring Summary */
602 if (!netdev || !netif_running(netdev))
605 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
606 pr_info(" %s %s %s %s\n",
607 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
608 "leng", "ntw", "timestamp");
609 for (n = 0; n < adapter->num_tx_queues; n++) {
610 tx_ring = adapter->tx_ring[n];
611 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
612 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
613 n, tx_ring->next_to_use, tx_ring->next_to_clean,
614 (u64)dma_unmap_addr(tx_buffer, dma),
615 dma_unmap_len(tx_buffer, len),
616 tx_buffer->next_to_watch,
617 (u64)tx_buffer->time_stamp);
621 if (!netif_msg_tx_done(adapter))
622 goto rx_ring_summary;
624 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
626 /* Transmit Descriptor Formats
628 * 82598 Advanced Transmit Descriptor
629 * +--------------------------------------------------------------+
630 * 0 | Buffer Address [63:0] |
631 * +--------------------------------------------------------------+
632 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
633 * +--------------------------------------------------------------+
634 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
636 * 82598 Advanced Transmit Descriptor (Write-Back Format)
637 * +--------------------------------------------------------------+
639 * +--------------------------------------------------------------+
640 * 8 | RSV | STA | NXTSEQ |
641 * +--------------------------------------------------------------+
644 * 82599+ Advanced Transmit Descriptor
645 * +--------------------------------------------------------------+
646 * 0 | Buffer Address [63:0] |
647 * +--------------------------------------------------------------+
648 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
649 * +--------------------------------------------------------------+
650 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
652 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
653 * +--------------------------------------------------------------+
655 * +--------------------------------------------------------------+
656 * 8 | RSV | STA | RSV |
657 * +--------------------------------------------------------------+
661 for (n = 0; n < adapter->num_tx_queues; n++) {
662 tx_ring = adapter->tx_ring[n];
663 pr_info("------------------------------------\n");
664 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
665 pr_info("------------------------------------\n");
666 pr_info("%s%s %s %s %s %s\n",
667 "T [desc] [address 63:0 ] ",
668 "[PlPOIdStDDt Ln] [bi->dma ] ",
669 "leng", "ntw", "timestamp", "bi->skb");
671 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
672 tx_desc = IXGBE_TX_DESC(tx_ring, i);
673 tx_buffer = &tx_ring->tx_buffer_info[i];
674 u0 = (struct my_u0 *)tx_desc;
675 if (dma_unmap_len(tx_buffer, len) > 0) {
676 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
680 (u64)dma_unmap_addr(tx_buffer, dma),
681 dma_unmap_len(tx_buffer, len),
682 tx_buffer->next_to_watch,
683 (u64)tx_buffer->time_stamp,
685 if (i == tx_ring->next_to_use &&
686 i == tx_ring->next_to_clean)
688 else if (i == tx_ring->next_to_use)
690 else if (i == tx_ring->next_to_clean)
695 if (netif_msg_pktdata(adapter) &&
697 print_hex_dump(KERN_INFO, "",
698 DUMP_PREFIX_ADDRESS, 16, 1,
699 tx_buffer->skb->data,
700 dma_unmap_len(tx_buffer, len),
706 /* Print RX Rings Summary */
708 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
709 pr_info("Queue [NTU] [NTC]\n");
710 for (n = 0; n < adapter->num_rx_queues; n++) {
711 rx_ring = adapter->rx_ring[n];
712 pr_info("%5d %5X %5X\n",
713 n, rx_ring->next_to_use, rx_ring->next_to_clean);
717 if (!netif_msg_rx_status(adapter))
720 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
722 /* Receive Descriptor Formats
724 * 82598 Advanced Receive Descriptor (Read) Format
726 * +-----------------------------------------------------+
727 * 0 | Packet Buffer Address [63:1] |A0/NSE|
728 * +----------------------------------------------+------+
729 * 8 | Header Buffer Address [63:1] | DD |
730 * +-----------------------------------------------------+
733 * 82598 Advanced Receive Descriptor (Write-Back) Format
735 * 63 48 47 32 31 30 21 20 16 15 4 3 0
736 * +------------------------------------------------------+
737 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
738 * | Packet | IP | | | | Type | Type |
739 * | Checksum | Ident | | | | | |
740 * +------------------------------------------------------+
741 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
742 * +------------------------------------------------------+
743 * 63 48 47 32 31 20 19 0
745 * 82599+ Advanced Receive Descriptor (Read) Format
747 * +-----------------------------------------------------+
748 * 0 | Packet Buffer Address [63:1] |A0/NSE|
749 * +----------------------------------------------+------+
750 * 8 | Header Buffer Address [63:1] | DD |
751 * +-----------------------------------------------------+
754 * 82599+ Advanced Receive Descriptor (Write-Back) Format
756 * 63 48 47 32 31 30 21 20 17 16 4 3 0
757 * +------------------------------------------------------+
758 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
759 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
760 * |/ Flow Dir Flt ID | | | | | |
761 * +------------------------------------------------------+
762 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
763 * +------------------------------------------------------+
764 * 63 48 47 32 31 20 19 0
767 for (n = 0; n < adapter->num_rx_queues; n++) {
768 rx_ring = adapter->rx_ring[n];
769 pr_info("------------------------------------\n");
770 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
771 pr_info("------------------------------------\n");
773 "R [desc] [ PktBuf A0] ",
774 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
775 "<-- Adv Rx Read format\n");
777 "RWB[desc] [PcsmIpSHl PtRs] ",
778 "[vl er S cks ln] ---------------- [bi->skb ] ",
779 "<-- Adv Rx Write-Back format\n");
781 for (i = 0; i < rx_ring->count; i++) {
782 rx_buffer_info = &rx_ring->rx_buffer_info[i];
783 rx_desc = IXGBE_RX_DESC(rx_ring, i);
784 u0 = (struct my_u0 *)rx_desc;
785 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
786 if (staterr & IXGBE_RXD_STAT_DD) {
787 /* Descriptor Done */
788 pr_info("RWB[0x%03X] %016llX "
789 "%016llX ---------------- %p", i,
792 rx_buffer_info->skb);
794 pr_info("R [0x%03X] %016llX "
795 "%016llX %016llX %p", i,
798 (u64)rx_buffer_info->dma,
799 rx_buffer_info->skb);
801 if (netif_msg_pktdata(adapter) &&
802 rx_buffer_info->dma) {
803 print_hex_dump(KERN_INFO, "",
804 DUMP_PREFIX_ADDRESS, 16, 1,
805 page_address(rx_buffer_info->page) +
806 rx_buffer_info->page_offset,
807 ixgbe_rx_bufsz(rx_ring), true);
811 if (i == rx_ring->next_to_use)
813 else if (i == rx_ring->next_to_clean)
822 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
826 /* Let firmware take over control of h/w */
827 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
828 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
829 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
832 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
836 /* Let firmware know the driver has taken over */
837 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
838 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
839 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
843 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
844 * @adapter: pointer to adapter struct
845 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
846 * @queue: queue to map the corresponding interrupt to
847 * @msix_vector: the vector to map to the corresponding queue
850 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
851 u8 queue, u8 msix_vector)
854 struct ixgbe_hw *hw = &adapter->hw;
855 switch (hw->mac.type) {
856 case ixgbe_mac_82598EB:
857 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
860 index = (((direction * 64) + queue) >> 2) & 0x1F;
861 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
862 ivar &= ~(0xFF << (8 * (queue & 0x3)));
863 ivar |= (msix_vector << (8 * (queue & 0x3)));
864 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
866 case ixgbe_mac_82599EB:
869 case ixgbe_mac_X550EM_x:
870 if (direction == -1) {
872 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
873 index = ((queue & 1) * 8);
874 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
875 ivar &= ~(0xFF << index);
876 ivar |= (msix_vector << index);
877 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
880 /* tx or rx causes */
881 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
882 index = ((16 * (queue & 1)) + (8 * direction));
883 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
884 ivar &= ~(0xFF << index);
885 ivar |= (msix_vector << index);
886 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
894 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
899 switch (adapter->hw.mac.type) {
900 case ixgbe_mac_82598EB:
901 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
902 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
904 case ixgbe_mac_82599EB:
907 case ixgbe_mac_X550EM_x:
908 mask = (qmask & 0xFFFFFFFF);
909 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
910 mask = (qmask >> 32);
911 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
918 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
919 struct ixgbe_tx_buffer *tx_buffer)
921 if (tx_buffer->skb) {
922 dev_kfree_skb_any(tx_buffer->skb);
923 if (dma_unmap_len(tx_buffer, len))
924 dma_unmap_single(ring->dev,
925 dma_unmap_addr(tx_buffer, dma),
926 dma_unmap_len(tx_buffer, len),
928 } else if (dma_unmap_len(tx_buffer, len)) {
929 dma_unmap_page(ring->dev,
930 dma_unmap_addr(tx_buffer, dma),
931 dma_unmap_len(tx_buffer, len),
934 tx_buffer->next_to_watch = NULL;
935 tx_buffer->skb = NULL;
936 dma_unmap_len_set(tx_buffer, len, 0);
937 /* tx_buffer must be completely set up in the transmit path */
940 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
942 struct ixgbe_hw *hw = &adapter->hw;
943 struct ixgbe_hw_stats *hwstats = &adapter->stats;
947 if ((hw->fc.current_mode != ixgbe_fc_full) &&
948 (hw->fc.current_mode != ixgbe_fc_rx_pause))
951 switch (hw->mac.type) {
952 case ixgbe_mac_82598EB:
953 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
956 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
958 hwstats->lxoffrxc += data;
960 /* refill credits (no tx hang) if we received xoff */
964 for (i = 0; i < adapter->num_tx_queues; i++)
965 clear_bit(__IXGBE_HANG_CHECK_ARMED,
966 &adapter->tx_ring[i]->state);
969 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
971 struct ixgbe_hw *hw = &adapter->hw;
972 struct ixgbe_hw_stats *hwstats = &adapter->stats;
976 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
978 if (adapter->ixgbe_ieee_pfc)
979 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
981 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
982 ixgbe_update_xoff_rx_lfc(adapter);
986 /* update stats for each tc, only valid with PFC enabled */
987 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
990 switch (hw->mac.type) {
991 case ixgbe_mac_82598EB:
992 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
995 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
997 hwstats->pxoffrxc[i] += pxoffrxc;
998 /* Get the TC for given UP */
999 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1000 xoff[tc] += pxoffrxc;
1003 /* disarm tx queues that have received xoff frames */
1004 for (i = 0; i < adapter->num_tx_queues; i++) {
1005 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1007 tc = tx_ring->dcb_tc;
1009 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1013 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1015 return ring->stats.packets;
1018 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1020 struct ixgbe_adapter *adapter;
1021 struct ixgbe_hw *hw;
1024 if (ring->l2_accel_priv)
1025 adapter = ring->l2_accel_priv->real_adapter;
1027 adapter = netdev_priv(ring->netdev);
1030 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1031 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1034 return (head < tail) ?
1035 tail - head : (tail + ring->count - head);
1040 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1042 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1043 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1044 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1046 clear_check_for_tx_hang(tx_ring);
1049 * Check for a hung queue, but be thorough. This verifies
1050 * that a transmit has been completed since the previous
1051 * check AND there is at least one packet pending. The
1052 * ARMED bit is set to indicate a potential hang. The
1053 * bit is cleared if a pause frame is received to remove
1054 * false hang detection due to PFC or 802.3x frames. By
1055 * requiring this to fail twice we avoid races with
1056 * pfc clearing the ARMED bit and conditions where we
1057 * run the check_tx_hang logic with a transmit completion
1058 * pending but without time to complete it yet.
1060 if (tx_done_old == tx_done && tx_pending)
1061 /* make sure it is true for two checks in a row */
1062 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1064 /* update completed stats and continue */
1065 tx_ring->tx_stats.tx_done_old = tx_done;
1066 /* reset the countdown */
1067 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1073 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1074 * @adapter: driver private struct
1076 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1079 /* Do the reset outside of interrupt context */
1080 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1081 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1082 e_warn(drv, "initiating reset due to tx timeout\n");
1083 ixgbe_service_event_schedule(adapter);
1088 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1089 * @q_vector: structure containing interrupt and ring information
1090 * @tx_ring: tx ring to clean
1092 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1093 struct ixgbe_ring *tx_ring)
1095 struct ixgbe_adapter *adapter = q_vector->adapter;
1096 struct ixgbe_tx_buffer *tx_buffer;
1097 union ixgbe_adv_tx_desc *tx_desc;
1098 unsigned int total_bytes = 0, total_packets = 0;
1099 unsigned int budget = q_vector->tx.work_limit;
1100 unsigned int i = tx_ring->next_to_clean;
1102 if (test_bit(__IXGBE_DOWN, &adapter->state))
1105 tx_buffer = &tx_ring->tx_buffer_info[i];
1106 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1107 i -= tx_ring->count;
1110 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1112 /* if next_to_watch is not set then there is no work pending */
1116 /* prevent any other reads prior to eop_desc */
1117 read_barrier_depends();
1119 /* if DD is not set pending work has not been completed */
1120 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1123 /* clear next_to_watch to prevent false hangs */
1124 tx_buffer->next_to_watch = NULL;
1126 /* update the statistics for this packet */
1127 total_bytes += tx_buffer->bytecount;
1128 total_packets += tx_buffer->gso_segs;
1131 dev_consume_skb_any(tx_buffer->skb);
1133 /* unmap skb header data */
1134 dma_unmap_single(tx_ring->dev,
1135 dma_unmap_addr(tx_buffer, dma),
1136 dma_unmap_len(tx_buffer, len),
1139 /* clear tx_buffer data */
1140 tx_buffer->skb = NULL;
1141 dma_unmap_len_set(tx_buffer, len, 0);
1143 /* unmap remaining buffers */
1144 while (tx_desc != eop_desc) {
1149 i -= tx_ring->count;
1150 tx_buffer = tx_ring->tx_buffer_info;
1151 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1154 /* unmap any remaining paged data */
1155 if (dma_unmap_len(tx_buffer, len)) {
1156 dma_unmap_page(tx_ring->dev,
1157 dma_unmap_addr(tx_buffer, dma),
1158 dma_unmap_len(tx_buffer, len),
1160 dma_unmap_len_set(tx_buffer, len, 0);
1164 /* move us one more past the eop_desc for start of next pkt */
1169 i -= tx_ring->count;
1170 tx_buffer = tx_ring->tx_buffer_info;
1171 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1174 /* issue prefetch for next Tx descriptor */
1177 /* update budget accounting */
1179 } while (likely(budget));
1181 i += tx_ring->count;
1182 tx_ring->next_to_clean = i;
1183 u64_stats_update_begin(&tx_ring->syncp);
1184 tx_ring->stats.bytes += total_bytes;
1185 tx_ring->stats.packets += total_packets;
1186 u64_stats_update_end(&tx_ring->syncp);
1187 q_vector->tx.total_bytes += total_bytes;
1188 q_vector->tx.total_packets += total_packets;
1190 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1191 /* schedule immediate reset if we believe we hung */
1192 struct ixgbe_hw *hw = &adapter->hw;
1193 e_err(drv, "Detected Tx Unit Hang\n"
1195 " TDH, TDT <%x>, <%x>\n"
1196 " next_to_use <%x>\n"
1197 " next_to_clean <%x>\n"
1198 "tx_buffer_info[next_to_clean]\n"
1199 " time_stamp <%lx>\n"
1201 tx_ring->queue_index,
1202 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1203 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1204 tx_ring->next_to_use, i,
1205 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1207 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1210 "tx hang %d detected on queue %d, resetting adapter\n",
1211 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1213 /* schedule immediate reset if we believe we hung */
1214 ixgbe_tx_timeout_reset(adapter);
1216 /* the adapter is about to reset, no point in enabling stuff */
1220 netdev_tx_completed_queue(txring_txq(tx_ring),
1221 total_packets, total_bytes);
1223 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1224 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1225 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1226 /* Make sure that anybody stopping the queue after this
1227 * sees the new next_to_clean.
1230 if (__netif_subqueue_stopped(tx_ring->netdev,
1231 tx_ring->queue_index)
1232 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1233 netif_wake_subqueue(tx_ring->netdev,
1234 tx_ring->queue_index);
1235 ++tx_ring->tx_stats.restart_queue;
1242 #ifdef CONFIG_IXGBE_DCA
1243 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1244 struct ixgbe_ring *tx_ring,
1247 struct ixgbe_hw *hw = &adapter->hw;
1251 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1252 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1254 switch (hw->mac.type) {
1255 case ixgbe_mac_82598EB:
1256 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1258 case ixgbe_mac_82599EB:
1259 case ixgbe_mac_X540:
1260 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1261 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1264 /* for unknown hardware do not write register */
1269 * We can enable relaxed ordering for reads, but not writes when
1270 * DCA is enabled. This is due to a known issue in some chipsets
1271 * which will cause the DCA tag to be cleared.
1273 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1274 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1275 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1277 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1280 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1281 struct ixgbe_ring *rx_ring,
1284 struct ixgbe_hw *hw = &adapter->hw;
1286 u8 reg_idx = rx_ring->reg_idx;
1288 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1289 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1291 switch (hw->mac.type) {
1292 case ixgbe_mac_82599EB:
1293 case ixgbe_mac_X540:
1294 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1301 * We can enable relaxed ordering for reads, but not writes when
1302 * DCA is enabled. This is due to a known issue in some chipsets
1303 * which will cause the DCA tag to be cleared.
1305 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1306 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1307 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1309 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1312 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1314 struct ixgbe_adapter *adapter = q_vector->adapter;
1315 struct ixgbe_ring *ring;
1316 int cpu = get_cpu();
1318 if (q_vector->cpu == cpu)
1321 ixgbe_for_each_ring(ring, q_vector->tx)
1322 ixgbe_update_tx_dca(adapter, ring, cpu);
1324 ixgbe_for_each_ring(ring, q_vector->rx)
1325 ixgbe_update_rx_dca(adapter, ring, cpu);
1327 q_vector->cpu = cpu;
1332 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1336 /* always use CB2 mode, difference is masked in the CB driver */
1337 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1339 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1341 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1342 IXGBE_DCA_CTRL_DCA_DISABLE);
1344 for (i = 0; i < adapter->num_q_vectors; i++) {
1345 adapter->q_vector[i]->cpu = -1;
1346 ixgbe_update_dca(adapter->q_vector[i]);
1350 static int __ixgbe_notify_dca(struct device *dev, void *data)
1352 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1353 unsigned long event = *(unsigned long *)data;
1355 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1359 case DCA_PROVIDER_ADD:
1360 /* if we're already enabled, don't do it again */
1361 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1363 if (dca_add_requester(dev) == 0) {
1364 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1365 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1366 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1369 /* Fall Through since DCA is disabled. */
1370 case DCA_PROVIDER_REMOVE:
1371 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1372 dca_remove_requester(dev);
1373 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1374 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1375 IXGBE_DCA_CTRL_DCA_DISABLE);
1383 #endif /* CONFIG_IXGBE_DCA */
1385 #define IXGBE_RSS_L4_TYPES_MASK \
1386 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1387 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1388 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1389 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1391 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1392 union ixgbe_adv_rx_desc *rx_desc,
1393 struct sk_buff *skb)
1397 if (!(ring->netdev->features & NETIF_F_RXHASH))
1400 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1401 IXGBE_RXDADV_RSSTYPE_MASK;
1406 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1407 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1408 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1413 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1414 * @ring: structure containing ring specific data
1415 * @rx_desc: advanced rx descriptor
1417 * Returns : true if it is FCoE pkt
1419 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1420 union ixgbe_adv_rx_desc *rx_desc)
1422 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1424 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1425 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1426 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1427 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1430 #endif /* IXGBE_FCOE */
1432 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1433 * @ring: structure containing ring specific data
1434 * @rx_desc: current Rx descriptor being processed
1435 * @skb: skb currently being received and modified
1437 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1438 union ixgbe_adv_rx_desc *rx_desc,
1439 struct sk_buff *skb)
1441 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1442 __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1443 bool encap_pkt = false;
1445 skb_checksum_none_assert(skb);
1447 /* Rx csum disabled */
1448 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1451 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1452 (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1454 skb->encapsulation = 1;
1457 /* if IP and error */
1458 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1459 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1460 ring->rx_stats.csum_err++;
1464 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1467 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1469 * 82599 errata, UDP frames with a 0 checksum can be marked as
1472 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1473 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1476 ring->rx_stats.csum_err++;
1480 /* It must be a TCP or UDP packet with a valid checksum */
1481 skb->ip_summed = CHECKSUM_UNNECESSARY;
1483 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1486 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1487 ring->rx_stats.csum_err++;
1490 /* If we checked the outer header let the stack know */
1491 skb->csum_level = 1;
1495 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1496 struct ixgbe_rx_buffer *bi)
1498 struct page *page = bi->page;
1501 /* since we are recycling buffers we should seldom need to alloc */
1505 /* alloc new page for storage */
1506 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1507 if (unlikely(!page)) {
1508 rx_ring->rx_stats.alloc_rx_page_failed++;
1512 /* map page for use */
1513 dma = dma_map_page(rx_ring->dev, page, 0,
1514 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1517 * if mapping failed free memory back to system since
1518 * there isn't much point in holding memory we can't use
1520 if (dma_mapping_error(rx_ring->dev, dma)) {
1521 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1523 rx_ring->rx_stats.alloc_rx_page_failed++;
1529 bi->page_offset = 0;
1535 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1536 * @rx_ring: ring to place buffers on
1537 * @cleaned_count: number of buffers to replace
1539 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1541 union ixgbe_adv_rx_desc *rx_desc;
1542 struct ixgbe_rx_buffer *bi;
1543 u16 i = rx_ring->next_to_use;
1549 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1550 bi = &rx_ring->rx_buffer_info[i];
1551 i -= rx_ring->count;
1554 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1558 * Refresh the desc even if buffer_addrs didn't change
1559 * because each write-back erases this info.
1561 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1567 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1568 bi = rx_ring->rx_buffer_info;
1569 i -= rx_ring->count;
1572 /* clear the status bits for the next_to_use descriptor */
1573 rx_desc->wb.upper.status_error = 0;
1576 } while (cleaned_count);
1578 i += rx_ring->count;
1580 if (rx_ring->next_to_use != i) {
1581 rx_ring->next_to_use = i;
1583 /* update next to alloc since we have filled the ring */
1584 rx_ring->next_to_alloc = i;
1586 /* Force memory writes to complete before letting h/w
1587 * know there are new descriptors to fetch. (Only
1588 * applicable for weak-ordered memory model archs,
1592 writel(i, rx_ring->tail);
1596 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1597 struct sk_buff *skb)
1599 u16 hdr_len = skb_headlen(skb);
1601 /* set gso_size to avoid messing up TCP MSS */
1602 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1603 IXGBE_CB(skb)->append_cnt);
1604 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1607 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1608 struct sk_buff *skb)
1610 /* if append_cnt is 0 then frame is not RSC */
1611 if (!IXGBE_CB(skb)->append_cnt)
1614 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1615 rx_ring->rx_stats.rsc_flush++;
1617 ixgbe_set_rsc_gso_size(rx_ring, skb);
1619 /* gso_size is computed using append_cnt so always clear it last */
1620 IXGBE_CB(skb)->append_cnt = 0;
1624 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1625 * @rx_ring: rx descriptor ring packet is being transacted on
1626 * @rx_desc: pointer to the EOP Rx descriptor
1627 * @skb: pointer to current skb being populated
1629 * This function checks the ring, descriptor, and packet information in
1630 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1631 * other fields within the skb.
1633 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1634 union ixgbe_adv_rx_desc *rx_desc,
1635 struct sk_buff *skb)
1637 struct net_device *dev = rx_ring->netdev;
1639 ixgbe_update_rsc_stats(rx_ring, skb);
1641 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1643 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1645 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1646 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1648 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1649 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1650 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1651 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1654 skb_record_rx_queue(skb, rx_ring->queue_index);
1656 skb->protocol = eth_type_trans(skb, dev);
1659 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1660 struct sk_buff *skb)
1662 if (ixgbe_qv_busy_polling(q_vector))
1663 netif_receive_skb(skb);
1665 napi_gro_receive(&q_vector->napi, skb);
1669 * ixgbe_is_non_eop - process handling of non-EOP buffers
1670 * @rx_ring: Rx ring being processed
1671 * @rx_desc: Rx descriptor for current buffer
1672 * @skb: Current socket buffer containing buffer in progress
1674 * This function updates next to clean. If the buffer is an EOP buffer
1675 * this function exits returning false, otherwise it will place the
1676 * sk_buff in the next buffer to be chained and return true indicating
1677 * that this is in fact a non-EOP buffer.
1679 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1680 union ixgbe_adv_rx_desc *rx_desc,
1681 struct sk_buff *skb)
1683 u32 ntc = rx_ring->next_to_clean + 1;
1685 /* fetch, update, and store next to clean */
1686 ntc = (ntc < rx_ring->count) ? ntc : 0;
1687 rx_ring->next_to_clean = ntc;
1689 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1691 /* update RSC append count if present */
1692 if (ring_is_rsc_enabled(rx_ring)) {
1693 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1694 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1696 if (unlikely(rsc_enabled)) {
1697 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1699 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1700 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1702 /* update ntc based on RSC value */
1703 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1704 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1705 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1709 /* if we are the last buffer then there is nothing else to do */
1710 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1713 /* place skb in next buffer to be received */
1714 rx_ring->rx_buffer_info[ntc].skb = skb;
1715 rx_ring->rx_stats.non_eop_descs++;
1721 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1722 * @rx_ring: rx descriptor ring packet is being transacted on
1723 * @skb: pointer to current skb being adjusted
1725 * This function is an ixgbe specific version of __pskb_pull_tail. The
1726 * main difference between this version and the original function is that
1727 * this function can make several assumptions about the state of things
1728 * that allow for significant optimizations versus the standard function.
1729 * As a result we can do things like drop a frag and maintain an accurate
1730 * truesize for the skb.
1732 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1733 struct sk_buff *skb)
1735 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1737 unsigned int pull_len;
1740 * it is valid to use page_address instead of kmap since we are
1741 * working with pages allocated out of the lomem pool per
1742 * alloc_page(GFP_ATOMIC)
1744 va = skb_frag_address(frag);
1747 * we need the header to contain the greater of either ETH_HLEN or
1748 * 60 bytes if the skb->len is less than 60 for skb_pad.
1750 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1752 /* align pull length to size of long to optimize memcpy performance */
1753 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1755 /* update all of the pointers */
1756 skb_frag_size_sub(frag, pull_len);
1757 frag->page_offset += pull_len;
1758 skb->data_len -= pull_len;
1759 skb->tail += pull_len;
1763 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1764 * @rx_ring: rx descriptor ring packet is being transacted on
1765 * @skb: pointer to current skb being updated
1767 * This function provides a basic DMA sync up for the first fragment of an
1768 * skb. The reason for doing this is that the first fragment cannot be
1769 * unmapped until we have reached the end of packet descriptor for a buffer
1772 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1773 struct sk_buff *skb)
1775 /* if the page was released unmap it, else just sync our portion */
1776 if (unlikely(IXGBE_CB(skb)->page_released)) {
1777 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1778 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1779 IXGBE_CB(skb)->page_released = false;
1781 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1783 dma_sync_single_range_for_cpu(rx_ring->dev,
1786 ixgbe_rx_bufsz(rx_ring),
1789 IXGBE_CB(skb)->dma = 0;
1793 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1794 * @rx_ring: rx descriptor ring packet is being transacted on
1795 * @rx_desc: pointer to the EOP Rx descriptor
1796 * @skb: pointer to current skb being fixed
1798 * Check for corrupted packet headers caused by senders on the local L2
1799 * embedded NIC switch not setting up their Tx Descriptors right. These
1800 * should be very rare.
1802 * Also address the case where we are pulling data in on pages only
1803 * and as such no data is present in the skb header.
1805 * In addition if skb is not at least 60 bytes we need to pad it so that
1806 * it is large enough to qualify as a valid Ethernet frame.
1808 * Returns true if an error was encountered and skb was freed.
1810 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1811 union ixgbe_adv_rx_desc *rx_desc,
1812 struct sk_buff *skb)
1814 struct net_device *netdev = rx_ring->netdev;
1816 /* verify that the packet does not have any known errors */
1817 if (unlikely(ixgbe_test_staterr(rx_desc,
1818 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1819 !(netdev->features & NETIF_F_RXALL))) {
1820 dev_kfree_skb_any(skb);
1824 /* place header in linear portion of buffer */
1825 if (skb_is_nonlinear(skb))
1826 ixgbe_pull_tail(rx_ring, skb);
1829 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1830 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1834 /* if eth_skb_pad returns an error the skb was freed */
1835 if (eth_skb_pad(skb))
1842 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1843 * @rx_ring: rx descriptor ring to store buffers on
1844 * @old_buff: donor buffer to have page reused
1846 * Synchronizes page for reuse by the adapter
1848 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1849 struct ixgbe_rx_buffer *old_buff)
1851 struct ixgbe_rx_buffer *new_buff;
1852 u16 nta = rx_ring->next_to_alloc;
1854 new_buff = &rx_ring->rx_buffer_info[nta];
1856 /* update, and store next to alloc */
1858 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1860 /* transfer page from old buffer to new buffer */
1861 *new_buff = *old_buff;
1863 /* sync the buffer for use by the device */
1864 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1865 new_buff->page_offset,
1866 ixgbe_rx_bufsz(rx_ring),
1870 static inline bool ixgbe_page_is_reserved(struct page *page)
1872 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1876 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1877 * @rx_ring: rx descriptor ring to transact packets on
1878 * @rx_buffer: buffer containing page to add
1879 * @rx_desc: descriptor containing length of buffer written by hardware
1880 * @skb: sk_buff to place the data into
1882 * This function will add the data contained in rx_buffer->page to the skb.
1883 * This is done either through a direct copy if the data in the buffer is
1884 * less than the skb header size, otherwise it will just attach the page as
1885 * a frag to the skb.
1887 * The function will then update the page offset if necessary and return
1888 * true if the buffer can be reused by the adapter.
1890 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1891 struct ixgbe_rx_buffer *rx_buffer,
1892 union ixgbe_adv_rx_desc *rx_desc,
1893 struct sk_buff *skb)
1895 struct page *page = rx_buffer->page;
1896 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1897 #if (PAGE_SIZE < 8192)
1898 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1900 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1901 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1902 ixgbe_rx_bufsz(rx_ring);
1905 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1906 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1908 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1910 /* page is not reserved, we can reuse buffer as-is */
1911 if (likely(!ixgbe_page_is_reserved(page)))
1914 /* this page cannot be reused so discard it */
1915 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1919 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1920 rx_buffer->page_offset, size, truesize);
1922 /* avoid re-using remote pages */
1923 if (unlikely(ixgbe_page_is_reserved(page)))
1926 #if (PAGE_SIZE < 8192)
1927 /* if we are only owner of page we can reuse it */
1928 if (unlikely(page_count(page) != 1))
1931 /* flip page offset to other buffer */
1932 rx_buffer->page_offset ^= truesize;
1934 /* move offset up to the next cache line */
1935 rx_buffer->page_offset += truesize;
1937 if (rx_buffer->page_offset > last_offset)
1941 /* Even if we own the page, we are not allowed to use atomic_set()
1942 * This would break get_page_unless_zero() users.
1944 atomic_inc(&page->_count);
1949 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1950 union ixgbe_adv_rx_desc *rx_desc)
1952 struct ixgbe_rx_buffer *rx_buffer;
1953 struct sk_buff *skb;
1956 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1957 page = rx_buffer->page;
1960 skb = rx_buffer->skb;
1963 void *page_addr = page_address(page) +
1964 rx_buffer->page_offset;
1966 /* prefetch first cache line of first page */
1967 prefetch(page_addr);
1968 #if L1_CACHE_BYTES < 128
1969 prefetch(page_addr + L1_CACHE_BYTES);
1972 /* allocate a skb to store the frags */
1973 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1975 if (unlikely(!skb)) {
1976 rx_ring->rx_stats.alloc_rx_buff_failed++;
1981 * we will be copying header into skb->data in
1982 * pskb_may_pull so it is in our interest to prefetch
1983 * it now to avoid a possible cache miss
1985 prefetchw(skb->data);
1988 * Delay unmapping of the first packet. It carries the
1989 * header information, HW may still access the header
1990 * after the writeback. Only unmap it when EOP is
1993 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1996 IXGBE_CB(skb)->dma = rx_buffer->dma;
1998 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1999 ixgbe_dma_sync_frag(rx_ring, skb);
2002 /* we are reusing so sync this buffer for CPU use */
2003 dma_sync_single_range_for_cpu(rx_ring->dev,
2005 rx_buffer->page_offset,
2006 ixgbe_rx_bufsz(rx_ring),
2009 rx_buffer->skb = NULL;
2012 /* pull page into skb */
2013 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2014 /* hand second half of page back to the ring */
2015 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2016 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2017 /* the page has been released from the ring */
2018 IXGBE_CB(skb)->page_released = true;
2020 /* we are not reusing the buffer so unmap it */
2021 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2022 ixgbe_rx_pg_size(rx_ring),
2026 /* clear contents of buffer_info */
2027 rx_buffer->page = NULL;
2033 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2034 * @q_vector: structure containing interrupt and ring information
2035 * @rx_ring: rx descriptor ring to transact packets on
2036 * @budget: Total limit on number of packets to process
2038 * This function provides a "bounce buffer" approach to Rx interrupt
2039 * processing. The advantage to this is that on systems that have
2040 * expensive overhead for IOMMU access this provides a means of avoiding
2041 * it by maintaining the mapping of the page to the syste.
2043 * Returns amount of work completed
2045 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2046 struct ixgbe_ring *rx_ring,
2049 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2051 struct ixgbe_adapter *adapter = q_vector->adapter;
2053 unsigned int mss = 0;
2054 #endif /* IXGBE_FCOE */
2055 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2057 while (likely(total_rx_packets < budget)) {
2058 union ixgbe_adv_rx_desc *rx_desc;
2059 struct sk_buff *skb;
2061 /* return some buffers to hardware, one at a time is too slow */
2062 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2063 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2067 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2069 if (!rx_desc->wb.upper.status_error)
2072 /* This memory barrier is needed to keep us from reading
2073 * any other fields out of the rx_desc until we know the
2074 * descriptor has been written back
2078 /* retrieve a buffer from the ring */
2079 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2081 /* exit if we failed to retrieve a buffer */
2087 /* place incomplete frames back on ring for completion */
2088 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2091 /* verify the packet layout is correct */
2092 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2095 /* probably a little skewed due to removing CRC */
2096 total_rx_bytes += skb->len;
2098 /* populate checksum, timestamp, VLAN, and protocol */
2099 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2102 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2103 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2104 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2105 /* include DDPed FCoE data */
2106 if (ddp_bytes > 0) {
2108 mss = rx_ring->netdev->mtu -
2109 sizeof(struct fcoe_hdr) -
2110 sizeof(struct fc_frame_header) -
2111 sizeof(struct fcoe_crc_eof);
2115 total_rx_bytes += ddp_bytes;
2116 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2120 dev_kfree_skb_any(skb);
2125 #endif /* IXGBE_FCOE */
2126 skb_mark_napi_id(skb, &q_vector->napi);
2127 ixgbe_rx_skb(q_vector, skb);
2129 /* update budget accounting */
2133 u64_stats_update_begin(&rx_ring->syncp);
2134 rx_ring->stats.packets += total_rx_packets;
2135 rx_ring->stats.bytes += total_rx_bytes;
2136 u64_stats_update_end(&rx_ring->syncp);
2137 q_vector->rx.total_packets += total_rx_packets;
2138 q_vector->rx.total_bytes += total_rx_bytes;
2140 return total_rx_packets;
2143 #ifdef CONFIG_NET_RX_BUSY_POLL
2144 /* must be called with local_bh_disable()d */
2145 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2147 struct ixgbe_q_vector *q_vector =
2148 container_of(napi, struct ixgbe_q_vector, napi);
2149 struct ixgbe_adapter *adapter = q_vector->adapter;
2150 struct ixgbe_ring *ring;
2153 if (test_bit(__IXGBE_DOWN, &adapter->state))
2154 return LL_FLUSH_FAILED;
2156 if (!ixgbe_qv_lock_poll(q_vector))
2157 return LL_FLUSH_BUSY;
2159 ixgbe_for_each_ring(ring, q_vector->rx) {
2160 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2161 #ifdef BP_EXTENDED_STATS
2163 ring->stats.cleaned += found;
2165 ring->stats.misses++;
2171 ixgbe_qv_unlock_poll(q_vector);
2175 #endif /* CONFIG_NET_RX_BUSY_POLL */
2178 * ixgbe_configure_msix - Configure MSI-X hardware
2179 * @adapter: board private structure
2181 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2184 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2186 struct ixgbe_q_vector *q_vector;
2190 /* Populate MSIX to EITR Select */
2191 if (adapter->num_vfs > 32) {
2192 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2193 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2197 * Populate the IVAR table and set the ITR values to the
2198 * corresponding register.
2200 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2201 struct ixgbe_ring *ring;
2202 q_vector = adapter->q_vector[v_idx];
2204 ixgbe_for_each_ring(ring, q_vector->rx)
2205 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2207 ixgbe_for_each_ring(ring, q_vector->tx)
2208 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2210 ixgbe_write_eitr(q_vector);
2213 switch (adapter->hw.mac.type) {
2214 case ixgbe_mac_82598EB:
2215 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2218 case ixgbe_mac_82599EB:
2219 case ixgbe_mac_X540:
2220 case ixgbe_mac_X550:
2221 case ixgbe_mac_X550EM_x:
2222 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2227 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2229 /* set up to autoclear timer, and the vectors */
2230 mask = IXGBE_EIMS_ENABLE_MASK;
2231 mask &= ~(IXGBE_EIMS_OTHER |
2232 IXGBE_EIMS_MAILBOX |
2235 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2238 enum latency_range {
2242 latency_invalid = 255
2246 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2247 * @q_vector: structure containing interrupt and ring information
2248 * @ring_container: structure containing ring performance data
2250 * Stores a new ITR value based on packets and byte
2251 * counts during the last interrupt. The advantage of per interrupt
2252 * computation is faster updates and more accurate ITR for the current
2253 * traffic pattern. Constants in this function were computed
2254 * based on theoretical maximum wire speed and thresholds were set based
2255 * on testing data as well as attempting to minimize response time
2256 * while increasing bulk throughput.
2257 * this functionality is controlled by the InterruptThrottleRate module
2258 * parameter (see ixgbe_param.c)
2260 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2261 struct ixgbe_ring_container *ring_container)
2263 int bytes = ring_container->total_bytes;
2264 int packets = ring_container->total_packets;
2267 u8 itr_setting = ring_container->itr;
2272 /* simple throttlerate management
2273 * 0-10MB/s lowest (100000 ints/s)
2274 * 10-20MB/s low (20000 ints/s)
2275 * 20-1249MB/s bulk (12000 ints/s)
2277 /* what was last interrupt timeslice? */
2278 timepassed_us = q_vector->itr >> 2;
2279 if (timepassed_us == 0)
2282 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2284 switch (itr_setting) {
2285 case lowest_latency:
2286 if (bytes_perint > 10)
2287 itr_setting = low_latency;
2290 if (bytes_perint > 20)
2291 itr_setting = bulk_latency;
2292 else if (bytes_perint <= 10)
2293 itr_setting = lowest_latency;
2296 if (bytes_perint <= 20)
2297 itr_setting = low_latency;
2301 /* clear work counters since we have the values we need */
2302 ring_container->total_bytes = 0;
2303 ring_container->total_packets = 0;
2305 /* write updated itr to ring container */
2306 ring_container->itr = itr_setting;
2310 * ixgbe_write_eitr - write EITR register in hardware specific way
2311 * @q_vector: structure containing interrupt and ring information
2313 * This function is made to be called by ethtool and by the driver
2314 * when it needs to update EITR registers at runtime. Hardware
2315 * specific quirks/differences are taken care of here.
2317 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2319 struct ixgbe_adapter *adapter = q_vector->adapter;
2320 struct ixgbe_hw *hw = &adapter->hw;
2321 int v_idx = q_vector->v_idx;
2322 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2324 switch (adapter->hw.mac.type) {
2325 case ixgbe_mac_82598EB:
2326 /* must write high and low 16 bits to reset counter */
2327 itr_reg |= (itr_reg << 16);
2329 case ixgbe_mac_82599EB:
2330 case ixgbe_mac_X540:
2331 case ixgbe_mac_X550:
2332 case ixgbe_mac_X550EM_x:
2334 * set the WDIS bit to not clear the timer bits and cause an
2335 * immediate assertion of the interrupt
2337 itr_reg |= IXGBE_EITR_CNT_WDIS;
2342 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2345 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2347 u32 new_itr = q_vector->itr;
2350 ixgbe_update_itr(q_vector, &q_vector->tx);
2351 ixgbe_update_itr(q_vector, &q_vector->rx);
2353 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2355 switch (current_itr) {
2356 /* counts and packets in update_itr are dependent on these numbers */
2357 case lowest_latency:
2358 new_itr = IXGBE_100K_ITR;
2361 new_itr = IXGBE_20K_ITR;
2364 new_itr = IXGBE_12K_ITR;
2370 if (new_itr != q_vector->itr) {
2371 /* do an exponential smoothing */
2372 new_itr = (10 * new_itr * q_vector->itr) /
2373 ((9 * new_itr) + q_vector->itr);
2375 /* save the algorithm value here */
2376 q_vector->itr = new_itr;
2378 ixgbe_write_eitr(q_vector);
2383 * ixgbe_check_overtemp_subtask - check for over temperature
2384 * @adapter: pointer to adapter
2386 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2388 struct ixgbe_hw *hw = &adapter->hw;
2389 u32 eicr = adapter->interrupt_event;
2391 if (test_bit(__IXGBE_DOWN, &adapter->state))
2394 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2395 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2398 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2400 switch (hw->device_id) {
2401 case IXGBE_DEV_ID_82599_T3_LOM:
2403 * Since the warning interrupt is for both ports
2404 * we don't have to check if:
2405 * - This interrupt wasn't for our port.
2406 * - We may have missed the interrupt so always have to
2407 * check if we got a LSC
2409 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2410 !(eicr & IXGBE_EICR_LSC))
2413 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2415 bool link_up = false;
2417 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2423 /* Check if this is not due to overtemp */
2424 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2429 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2431 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2435 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2437 adapter->interrupt_event = 0;
2440 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2442 struct ixgbe_hw *hw = &adapter->hw;
2444 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2445 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2446 e_crit(probe, "Fan has stopped, replace the adapter\n");
2447 /* write to clear the interrupt */
2448 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2452 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2454 struct ixgbe_hw *hw = &adapter->hw;
2456 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2459 switch (adapter->hw.mac.type) {
2460 case ixgbe_mac_82599EB:
2462 * Need to check link state so complete overtemp check
2465 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2466 (eicr & IXGBE_EICR_LSC)) &&
2467 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2468 adapter->interrupt_event = eicr;
2469 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2470 ixgbe_service_event_schedule(adapter);
2474 case ixgbe_mac_X540:
2475 if (!(eicr & IXGBE_EICR_TS))
2482 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2485 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2487 switch (hw->mac.type) {
2488 case ixgbe_mac_82598EB:
2489 if (hw->phy.type == ixgbe_phy_nl)
2492 case ixgbe_mac_82599EB:
2493 case ixgbe_mac_X550EM_x:
2494 switch (hw->mac.ops.get_media_type(hw)) {
2495 case ixgbe_media_type_fiber:
2496 case ixgbe_media_type_fiber_qsfp:
2506 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2508 struct ixgbe_hw *hw = &adapter->hw;
2509 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2511 if (!ixgbe_is_sfp(hw))
2514 /* Later MAC's use different SDP */
2515 if (hw->mac.type >= ixgbe_mac_X540)
2516 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2518 if (eicr & eicr_mask) {
2519 /* Clear the interrupt */
2520 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2521 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2522 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2523 adapter->sfp_poll_time = 0;
2524 ixgbe_service_event_schedule(adapter);
2528 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2529 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2530 /* Clear the interrupt */
2531 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2532 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2533 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2534 ixgbe_service_event_schedule(adapter);
2539 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2541 struct ixgbe_hw *hw = &adapter->hw;
2544 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2545 adapter->link_check_timeout = jiffies;
2546 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2547 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2548 IXGBE_WRITE_FLUSH(hw);
2549 ixgbe_service_event_schedule(adapter);
2553 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2557 struct ixgbe_hw *hw = &adapter->hw;
2559 switch (hw->mac.type) {
2560 case ixgbe_mac_82598EB:
2561 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2562 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2564 case ixgbe_mac_82599EB:
2565 case ixgbe_mac_X540:
2566 case ixgbe_mac_X550:
2567 case ixgbe_mac_X550EM_x:
2568 mask = (qmask & 0xFFFFFFFF);
2570 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2571 mask = (qmask >> 32);
2573 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2578 /* skip the flush */
2581 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2585 struct ixgbe_hw *hw = &adapter->hw;
2587 switch (hw->mac.type) {
2588 case ixgbe_mac_82598EB:
2589 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2590 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2592 case ixgbe_mac_82599EB:
2593 case ixgbe_mac_X540:
2594 case ixgbe_mac_X550:
2595 case ixgbe_mac_X550EM_x:
2596 mask = (qmask & 0xFFFFFFFF);
2598 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2599 mask = (qmask >> 32);
2601 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2606 /* skip the flush */
2610 * ixgbe_irq_enable - Enable default interrupt generation settings
2611 * @adapter: board private structure
2613 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2616 struct ixgbe_hw *hw = &adapter->hw;
2617 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2619 /* don't reenable LSC while waiting for link */
2620 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2621 mask &= ~IXGBE_EIMS_LSC;
2623 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2624 switch (adapter->hw.mac.type) {
2625 case ixgbe_mac_82599EB:
2626 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2628 case ixgbe_mac_X540:
2629 case ixgbe_mac_X550:
2630 case ixgbe_mac_X550EM_x:
2631 mask |= IXGBE_EIMS_TS;
2636 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2637 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2638 switch (adapter->hw.mac.type) {
2639 case ixgbe_mac_82599EB:
2640 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2641 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2643 case ixgbe_mac_X540:
2644 case ixgbe_mac_X550:
2645 case ixgbe_mac_X550EM_x:
2646 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2647 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2648 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2649 mask |= IXGBE_EICR_GPI_SDP0_X540;
2650 mask |= IXGBE_EIMS_ECC;
2651 mask |= IXGBE_EIMS_MAILBOX;
2657 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2658 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2659 mask |= IXGBE_EIMS_FLOW_DIR;
2661 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2663 ixgbe_irq_enable_queues(adapter, ~0);
2665 IXGBE_WRITE_FLUSH(&adapter->hw);
2668 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2670 struct ixgbe_adapter *adapter = data;
2671 struct ixgbe_hw *hw = &adapter->hw;
2675 * Workaround for Silicon errata. Use clear-by-write instead
2676 * of clear-by-read. Reading with EICS will return the
2677 * interrupt causes without clearing, which later be done
2678 * with the write to EICR.
2680 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2682 /* The lower 16bits of the EICR register are for the queue interrupts
2683 * which should be masked here in order to not accidentally clear them if
2684 * the bits are high when ixgbe_msix_other is called. There is a race
2685 * condition otherwise which results in possible performance loss
2686 * especially if the ixgbe_msix_other interrupt is triggering
2687 * consistently (as it would when PPS is turned on for the X540 device)
2691 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2693 if (eicr & IXGBE_EICR_LSC)
2694 ixgbe_check_lsc(adapter);
2696 if (eicr & IXGBE_EICR_MAILBOX)
2697 ixgbe_msg_task(adapter);
2699 switch (hw->mac.type) {
2700 case ixgbe_mac_82599EB:
2701 case ixgbe_mac_X540:
2702 case ixgbe_mac_X550:
2703 case ixgbe_mac_X550EM_x:
2704 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2705 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2706 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2707 ixgbe_service_event_schedule(adapter);
2708 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2709 IXGBE_EICR_GPI_SDP0_X540);
2711 if (eicr & IXGBE_EICR_ECC) {
2712 e_info(link, "Received ECC Err, initiating reset\n");
2713 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2714 ixgbe_service_event_schedule(adapter);
2715 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2717 /* Handle Flow Director Full threshold interrupt */
2718 if (eicr & IXGBE_EICR_FLOW_DIR) {
2719 int reinit_count = 0;
2721 for (i = 0; i < adapter->num_tx_queues; i++) {
2722 struct ixgbe_ring *ring = adapter->tx_ring[i];
2723 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2728 /* no more flow director interrupts until after init */
2729 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2730 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2731 ixgbe_service_event_schedule(adapter);
2734 ixgbe_check_sfp_event(adapter, eicr);
2735 ixgbe_check_overtemp_event(adapter, eicr);
2741 ixgbe_check_fan_failure(adapter, eicr);
2743 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2744 ixgbe_ptp_check_pps_event(adapter, eicr);
2746 /* re-enable the original interrupt state, no lsc, no queues */
2747 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2748 ixgbe_irq_enable(adapter, false, false);
2753 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2755 struct ixgbe_q_vector *q_vector = data;
2757 /* EIAM disabled interrupts (on this vector) for us */
2759 if (q_vector->rx.ring || q_vector->tx.ring)
2760 napi_schedule(&q_vector->napi);
2766 * ixgbe_poll - NAPI Rx polling callback
2767 * @napi: structure for representing this polling device
2768 * @budget: how many packets driver is allowed to clean
2770 * This function is used for legacy and MSI, NAPI mode
2772 int ixgbe_poll(struct napi_struct *napi, int budget)
2774 struct ixgbe_q_vector *q_vector =
2775 container_of(napi, struct ixgbe_q_vector, napi);
2776 struct ixgbe_adapter *adapter = q_vector->adapter;
2777 struct ixgbe_ring *ring;
2778 int per_ring_budget;
2779 bool clean_complete = true;
2781 #ifdef CONFIG_IXGBE_DCA
2782 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2783 ixgbe_update_dca(q_vector);
2786 ixgbe_for_each_ring(ring, q_vector->tx)
2787 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2789 if (!ixgbe_qv_lock_napi(q_vector))
2792 /* attempt to distribute budget to each queue fairly, but don't allow
2793 * the budget to go below 1 because we'll exit polling */
2794 if (q_vector->rx.count > 1)
2795 per_ring_budget = max(budget/q_vector->rx.count, 1);
2797 per_ring_budget = budget;
2799 ixgbe_for_each_ring(ring, q_vector->rx)
2800 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2801 per_ring_budget) < per_ring_budget);
2803 ixgbe_qv_unlock_napi(q_vector);
2804 /* If all work not completed, return budget and keep polling */
2805 if (!clean_complete)
2808 /* all work done, exit the polling mode */
2809 napi_complete(napi);
2810 if (adapter->rx_itr_setting & 1)
2811 ixgbe_set_itr(q_vector);
2812 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2813 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2819 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2820 * @adapter: board private structure
2822 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2823 * interrupts from the kernel.
2825 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2827 struct net_device *netdev = adapter->netdev;
2831 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2832 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2833 struct msix_entry *entry = &adapter->msix_entries[vector];
2835 if (q_vector->tx.ring && q_vector->rx.ring) {
2836 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2837 "%s-%s-%d", netdev->name, "TxRx", ri++);
2839 } else if (q_vector->rx.ring) {
2840 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2841 "%s-%s-%d", netdev->name, "rx", ri++);
2842 } else if (q_vector->tx.ring) {
2843 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2844 "%s-%s-%d", netdev->name, "tx", ti++);
2846 /* skip this unused q_vector */
2849 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2850 q_vector->name, q_vector);
2852 e_err(probe, "request_irq failed for MSIX interrupt "
2853 "Error: %d\n", err);
2854 goto free_queue_irqs;
2856 /* If Flow Director is enabled, set interrupt affinity */
2857 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2858 /* assign the mask for this irq */
2859 irq_set_affinity_hint(entry->vector,
2860 &q_vector->affinity_mask);
2864 err = request_irq(adapter->msix_entries[vector].vector,
2865 ixgbe_msix_other, 0, netdev->name, adapter);
2867 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2868 goto free_queue_irqs;
2876 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2878 free_irq(adapter->msix_entries[vector].vector,
2879 adapter->q_vector[vector]);
2881 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2882 pci_disable_msix(adapter->pdev);
2883 kfree(adapter->msix_entries);
2884 adapter->msix_entries = NULL;
2889 * ixgbe_intr - legacy mode Interrupt Handler
2890 * @irq: interrupt number
2891 * @data: pointer to a network interface device structure
2893 static irqreturn_t ixgbe_intr(int irq, void *data)
2895 struct ixgbe_adapter *adapter = data;
2896 struct ixgbe_hw *hw = &adapter->hw;
2897 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2901 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2902 * before the read of EICR.
2904 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2906 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2907 * therefore no explicit interrupt disable is necessary */
2908 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2911 * shared interrupt alert!
2912 * make sure interrupts are enabled because the read will
2913 * have disabled interrupts due to EIAM
2914 * finish the workaround of silicon errata on 82598. Unmask
2915 * the interrupt that we masked before the EICR read.
2917 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2918 ixgbe_irq_enable(adapter, true, true);
2919 return IRQ_NONE; /* Not our interrupt */
2922 if (eicr & IXGBE_EICR_LSC)
2923 ixgbe_check_lsc(adapter);
2925 switch (hw->mac.type) {
2926 case ixgbe_mac_82599EB:
2927 ixgbe_check_sfp_event(adapter, eicr);
2929 case ixgbe_mac_X540:
2930 case ixgbe_mac_X550:
2931 case ixgbe_mac_X550EM_x:
2932 if (eicr & IXGBE_EICR_ECC) {
2933 e_info(link, "Received ECC Err, initiating reset\n");
2934 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2935 ixgbe_service_event_schedule(adapter);
2936 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2938 ixgbe_check_overtemp_event(adapter, eicr);
2944 ixgbe_check_fan_failure(adapter, eicr);
2945 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2946 ixgbe_ptp_check_pps_event(adapter, eicr);
2948 /* would disable interrupts here but EIAM disabled it */
2949 napi_schedule(&q_vector->napi);
2952 * re-enable link(maybe) and non-queue interrupts, no flush.
2953 * ixgbe_poll will re-enable the queue interrupts
2955 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2956 ixgbe_irq_enable(adapter, false, false);
2962 * ixgbe_request_irq - initialize interrupts
2963 * @adapter: board private structure
2965 * Attempts to configure interrupts using the best available
2966 * capabilities of the hardware and kernel.
2968 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2970 struct net_device *netdev = adapter->netdev;
2973 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2974 err = ixgbe_request_msix_irqs(adapter);
2975 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2976 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2977 netdev->name, adapter);
2979 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2980 netdev->name, adapter);
2983 e_err(probe, "request_irq failed, Error %d\n", err);
2988 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2992 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2993 free_irq(adapter->pdev->irq, adapter);
2997 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2998 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2999 struct msix_entry *entry = &adapter->msix_entries[vector];
3001 /* free only the irqs that were actually requested */
3002 if (!q_vector->rx.ring && !q_vector->tx.ring)
3005 /* clear the affinity_mask in the IRQ descriptor */
3006 irq_set_affinity_hint(entry->vector, NULL);
3008 free_irq(entry->vector, q_vector);
3011 free_irq(adapter->msix_entries[vector++].vector, adapter);
3015 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3016 * @adapter: board private structure
3018 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3020 switch (adapter->hw.mac.type) {
3021 case ixgbe_mac_82598EB:
3022 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3024 case ixgbe_mac_82599EB:
3025 case ixgbe_mac_X540:
3026 case ixgbe_mac_X550:
3027 case ixgbe_mac_X550EM_x:
3028 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3029 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3030 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3035 IXGBE_WRITE_FLUSH(&adapter->hw);
3036 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3039 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3040 synchronize_irq(adapter->msix_entries[vector].vector);
3042 synchronize_irq(adapter->msix_entries[vector++].vector);
3044 synchronize_irq(adapter->pdev->irq);
3049 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3052 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3054 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3056 ixgbe_write_eitr(q_vector);
3058 ixgbe_set_ivar(adapter, 0, 0, 0);
3059 ixgbe_set_ivar(adapter, 1, 0, 0);
3061 e_info(hw, "Legacy interrupt IVAR setup done\n");
3065 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3066 * @adapter: board private structure
3067 * @ring: structure containing ring specific data
3069 * Configure the Tx descriptor ring after a reset.
3071 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3072 struct ixgbe_ring *ring)
3074 struct ixgbe_hw *hw = &adapter->hw;
3075 u64 tdba = ring->dma;
3077 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3078 u8 reg_idx = ring->reg_idx;
3080 /* disable queue to avoid issues while updating state */
3081 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3082 IXGBE_WRITE_FLUSH(hw);
3084 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3085 (tdba & DMA_BIT_MASK(32)));
3086 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3087 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3088 ring->count * sizeof(union ixgbe_adv_tx_desc));
3089 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3090 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3091 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3094 * set WTHRESH to encourage burst writeback, it should not be set
3095 * higher than 1 when:
3096 * - ITR is 0 as it could cause false TX hangs
3097 * - ITR is set to > 100k int/sec and BQL is enabled
3099 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3100 * to or less than the number of on chip descriptors, which is
3103 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3104 txdctl |= (1 << 16); /* WTHRESH = 1 */
3106 txdctl |= (8 << 16); /* WTHRESH = 8 */
3109 * Setting PTHRESH to 32 both improves performance
3110 * and avoids a TX hang with DFP enabled
3112 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3113 32; /* PTHRESH = 32 */
3115 /* reinitialize flowdirector state */
3116 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3117 ring->atr_sample_rate = adapter->atr_sample_rate;
3118 ring->atr_count = 0;
3119 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3121 ring->atr_sample_rate = 0;
3124 /* initialize XPS */
3125 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3126 struct ixgbe_q_vector *q_vector = ring->q_vector;
3129 netif_set_xps_queue(ring->netdev,
3130 &q_vector->affinity_mask,
3134 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3137 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3139 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3140 if (hw->mac.type == ixgbe_mac_82598EB &&
3141 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3144 /* poll to verify queue is enabled */
3146 usleep_range(1000, 2000);
3147 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3148 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3150 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3153 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3155 struct ixgbe_hw *hw = &adapter->hw;
3157 u8 tcs = netdev_get_num_tc(adapter->netdev);
3159 if (hw->mac.type == ixgbe_mac_82598EB)
3162 /* disable the arbiter while setting MTQC */
3163 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3164 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3165 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3167 /* set transmit pool layout */
3168 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3169 mtqc = IXGBE_MTQC_VT_ENA;
3171 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3173 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3174 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3175 mtqc |= IXGBE_MTQC_32VF;
3177 mtqc |= IXGBE_MTQC_64VF;
3180 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3182 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3184 mtqc = IXGBE_MTQC_64Q_1PB;
3187 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3189 /* Enable Security TX Buffer IFG for multiple pb */
3191 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3192 sectx |= IXGBE_SECTX_DCB;
3193 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3196 /* re-enable the arbiter */
3197 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3198 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3202 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3203 * @adapter: board private structure
3205 * Configure the Tx unit of the MAC after a reset.
3207 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3209 struct ixgbe_hw *hw = &adapter->hw;
3213 ixgbe_setup_mtqc(adapter);
3215 if (hw->mac.type != ixgbe_mac_82598EB) {
3216 /* DMATXCTL.EN must be before Tx queues are enabled */
3217 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3218 dmatxctl |= IXGBE_DMATXCTL_TE;
3219 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3222 /* Setup the HW Tx Head and Tail descriptor pointers */
3223 for (i = 0; i < adapter->num_tx_queues; i++)
3224 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3227 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3228 struct ixgbe_ring *ring)
3230 struct ixgbe_hw *hw = &adapter->hw;
3231 u8 reg_idx = ring->reg_idx;
3232 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3234 srrctl |= IXGBE_SRRCTL_DROP_EN;
3236 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3239 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3240 struct ixgbe_ring *ring)
3242 struct ixgbe_hw *hw = &adapter->hw;
3243 u8 reg_idx = ring->reg_idx;
3244 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3246 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3248 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3251 #ifdef CONFIG_IXGBE_DCB
3252 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3254 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3258 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3260 if (adapter->ixgbe_ieee_pfc)
3261 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3264 * We should set the drop enable bit if:
3267 * Number of Rx queues > 1 and flow control is disabled
3269 * This allows us to avoid head of line blocking for security
3270 * and performance reasons.
3272 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3273 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3274 for (i = 0; i < adapter->num_rx_queues; i++)
3275 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3277 for (i = 0; i < adapter->num_rx_queues; i++)
3278 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3282 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3284 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3285 struct ixgbe_ring *rx_ring)
3287 struct ixgbe_hw *hw = &adapter->hw;
3289 u8 reg_idx = rx_ring->reg_idx;
3291 if (hw->mac.type == ixgbe_mac_82598EB) {
3292 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3295 * if VMDq is not active we must program one srrctl register
3296 * per RSS queue since we have enabled RDRXCTL.MVMEN
3301 /* configure header buffer length, needed for RSC */
3302 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3304 /* configure the packet buffer length */
3305 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3307 /* configure descriptor type */
3308 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3310 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3314 * Return a number of entries in the RSS indirection table
3316 * @adapter: device handle
3318 * - 82598/82599/X540: 128
3319 * - X550(non-SRIOV mode): 512
3320 * - X550(SRIOV mode): 64
3322 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3324 if (adapter->hw.mac.type < ixgbe_mac_X550)
3326 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3333 * Write the RETA table to HW
3335 * @adapter: device handle
3337 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3339 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3341 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3342 struct ixgbe_hw *hw = &adapter->hw;
3345 u8 *indir_tbl = adapter->rss_indir_tbl;
3347 /* Fill out the redirection table as follows:
3348 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3350 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3351 * - X550: 8 bit wide entries containing 6 bit RSS index
3353 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3354 indices_multi = 0x11;
3356 indices_multi = 0x1;
3358 /* Write redirection table to HW */
3359 for (i = 0; i < reta_entries; i++) {
3360 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3363 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3365 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3373 * Write the RETA table to HW (for x550 devices in SRIOV mode)
3375 * @adapter: device handle
3377 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3379 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3381 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3382 struct ixgbe_hw *hw = &adapter->hw;
3384 unsigned int pf_pool = adapter->num_vfs;
3386 /* Write redirection table to HW */
3387 for (i = 0; i < reta_entries; i++) {
3388 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3390 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3397 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3399 struct ixgbe_hw *hw = &adapter->hw;
3401 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3402 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3404 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3405 * make full use of any rings they may have. We will use the
3406 * PSRTYPE register to control how many rings we use within the PF.
3408 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3411 /* Fill out hash function seeds */
3412 for (i = 0; i < 10; i++)
3413 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3415 /* Fill out redirection table */
3416 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3418 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3422 adapter->rss_indir_tbl[i] = j;
3425 ixgbe_store_reta(adapter);
3428 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3430 struct ixgbe_hw *hw = &adapter->hw;
3431 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3432 unsigned int pf_pool = adapter->num_vfs;
3435 /* Fill out hash function seeds */
3436 for (i = 0; i < 10; i++)
3437 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3438 adapter->rss_key[i]);
3440 /* Fill out the redirection table */
3441 for (i = 0, j = 0; i < 64; i++, j++) {
3445 adapter->rss_indir_tbl[i] = j;
3448 ixgbe_store_vfreta(adapter);
3451 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3453 struct ixgbe_hw *hw = &adapter->hw;
3454 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3457 /* Disable indicating checksum in descriptor, enables RSS hash */
3458 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3459 rxcsum |= IXGBE_RXCSUM_PCSD;
3460 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3462 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3463 if (adapter->ring_feature[RING_F_RSS].mask)
3464 mrqc = IXGBE_MRQC_RSSEN;
3466 u8 tcs = netdev_get_num_tc(adapter->netdev);
3468 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3470 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3472 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3473 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3474 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3476 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3479 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3481 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3483 mrqc = IXGBE_MRQC_RSSEN;
3487 /* Perform hash on these packet types */
3488 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3489 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3490 IXGBE_MRQC_RSS_FIELD_IPV6 |
3491 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3493 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3494 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3495 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3496 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3498 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3499 if ((hw->mac.type >= ixgbe_mac_X550) &&
3500 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3501 unsigned int pf_pool = adapter->num_vfs;
3503 /* Enable VF RSS mode */
3504 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3505 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3507 /* Setup RSS through the VF registers */
3508 ixgbe_setup_vfreta(adapter);
3509 vfmrqc = IXGBE_MRQC_RSSEN;
3510 vfmrqc |= rss_field;
3511 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3513 ixgbe_setup_reta(adapter);
3515 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3520 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3521 * @adapter: address of board private structure
3522 * @index: index of ring to set
3524 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3525 struct ixgbe_ring *ring)
3527 struct ixgbe_hw *hw = &adapter->hw;
3529 u8 reg_idx = ring->reg_idx;
3531 if (!ring_is_rsc_enabled(ring))
3534 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3535 rscctrl |= IXGBE_RSCCTL_RSCEN;
3537 * we must limit the number of descriptors so that the
3538 * total size of max desc * buf_len is not greater
3541 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3542 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3545 #define IXGBE_MAX_RX_DESC_POLL 10
3546 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3547 struct ixgbe_ring *ring)
3549 struct ixgbe_hw *hw = &adapter->hw;
3550 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3552 u8 reg_idx = ring->reg_idx;
3554 if (ixgbe_removed(hw->hw_addr))
3556 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3557 if (hw->mac.type == ixgbe_mac_82598EB &&
3558 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3562 usleep_range(1000, 2000);
3563 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3564 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3567 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3568 "the polling period\n", reg_idx);
3572 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3573 struct ixgbe_ring *ring)
3575 struct ixgbe_hw *hw = &adapter->hw;
3576 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3578 u8 reg_idx = ring->reg_idx;
3580 if (ixgbe_removed(hw->hw_addr))
3582 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3583 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3585 /* write value back with RXDCTL.ENABLE bit cleared */
3586 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3588 if (hw->mac.type == ixgbe_mac_82598EB &&
3589 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3592 /* the hardware may take up to 100us to really disable the rx queue */
3595 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3596 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3599 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3600 "the polling period\n", reg_idx);
3604 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3605 struct ixgbe_ring *ring)
3607 struct ixgbe_hw *hw = &adapter->hw;
3608 u64 rdba = ring->dma;
3610 u8 reg_idx = ring->reg_idx;
3612 /* disable queue to avoid issues while updating state */
3613 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3614 ixgbe_disable_rx_queue(adapter, ring);
3616 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3617 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3618 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3619 ring->count * sizeof(union ixgbe_adv_rx_desc));
3620 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3621 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3622 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3624 ixgbe_configure_srrctl(adapter, ring);
3625 ixgbe_configure_rscctl(adapter, ring);
3627 if (hw->mac.type == ixgbe_mac_82598EB) {
3629 * enable cache line friendly hardware writes:
3630 * PTHRESH=32 descriptors (half the internal cache),
3631 * this also removes ugly rx_no_buffer_count increment
3632 * HTHRESH=4 descriptors (to minimize latency on fetch)
3633 * WTHRESH=8 burst writeback up to two cache lines
3635 rxdctl &= ~0x3FFFFF;
3639 /* enable receive descriptor ring */
3640 rxdctl |= IXGBE_RXDCTL_ENABLE;
3641 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3643 ixgbe_rx_desc_queue_enable(adapter, ring);
3644 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3647 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3649 struct ixgbe_hw *hw = &adapter->hw;
3650 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3653 /* PSRTYPE must be initialized in non 82598 adapters */
3654 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3655 IXGBE_PSRTYPE_UDPHDR |
3656 IXGBE_PSRTYPE_IPV4HDR |
3657 IXGBE_PSRTYPE_L2HDR |
3658 IXGBE_PSRTYPE_IPV6HDR;
3660 if (hw->mac.type == ixgbe_mac_82598EB)
3668 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3669 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3672 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3674 struct ixgbe_hw *hw = &adapter->hw;
3675 u32 reg_offset, vf_shift;
3676 u32 gcr_ext, vmdctl;
3679 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3682 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3683 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3684 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3685 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3686 vmdctl |= IXGBE_VT_CTL_REPLEN;
3687 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3689 vf_shift = VMDQ_P(0) % 32;
3690 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3692 /* Enable only the PF's pool for Tx/Rx */
3693 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3694 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3695 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3696 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3697 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3698 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3700 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3701 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3704 * Set up VF register offsets for selected VT Mode,
3705 * i.e. 32 or 64 VFs for SR-IOV
3707 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3708 case IXGBE_82599_VMDQ_8Q_MASK:
3709 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3711 case IXGBE_82599_VMDQ_4Q_MASK:
3712 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3715 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3719 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3722 /* Enable MAC Anti-Spoofing */
3723 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3726 /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be
3727 * calling set_ethertype_anti_spoofing for each VF in loop below
3729 if (hw->mac.ops.set_ethertype_anti_spoofing) {
3730 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3731 (IXGBE_ETQF_FILTER_EN |
3732 IXGBE_ETQF_TX_ANTISPOOF |
3735 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC),
3736 (IXGBE_ETQF_FILTER_EN |
3737 IXGBE_ETQF_TX_ANTISPOOF |
3741 /* For VFs that have spoof checking turned off */
3742 for (i = 0; i < adapter->num_vfs; i++) {
3743 if (!adapter->vfinfo[i].spoofchk_enabled)
3744 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3746 /* enable ethertype anti spoofing if hw supports it */
3747 if (hw->mac.ops.set_ethertype_anti_spoofing)
3748 hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3750 /* Enable/Disable RSS query feature */
3751 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3752 adapter->vfinfo[i].rss_query_enabled);
3756 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3758 struct ixgbe_hw *hw = &adapter->hw;
3759 struct net_device *netdev = adapter->netdev;
3760 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3761 struct ixgbe_ring *rx_ring;
3766 /* adjust max frame to be able to do baby jumbo for FCoE */
3767 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3768 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3769 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3771 #endif /* IXGBE_FCOE */
3773 /* adjust max frame to be at least the size of a standard frame */
3774 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3775 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3777 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3778 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3779 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3780 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3782 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3785 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3786 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3787 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3788 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3791 * Setup the HW Rx Head and Tail Descriptor Pointers and
3792 * the Base and Length of the Rx Descriptor Ring
3794 for (i = 0; i < adapter->num_rx_queues; i++) {
3795 rx_ring = adapter->rx_ring[i];
3796 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3797 set_ring_rsc_enabled(rx_ring);
3799 clear_ring_rsc_enabled(rx_ring);
3803 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3805 struct ixgbe_hw *hw = &adapter->hw;
3806 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3808 switch (hw->mac.type) {
3809 case ixgbe_mac_82598EB:
3811 * For VMDq support of different descriptor types or
3812 * buffer sizes through the use of multiple SRRCTL
3813 * registers, RDRXCTL.MVMEN must be set to 1
3815 * also, the manual doesn't mention it clearly but DCA hints
3816 * will only use queue 0's tags unless this bit is set. Side
3817 * effects of setting this bit are only that SRRCTL must be
3818 * fully programmed [0..15]
3820 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3822 case ixgbe_mac_X550:
3823 case ixgbe_mac_X550EM_x:
3824 if (adapter->num_vfs)
3825 rdrxctl |= IXGBE_RDRXCTL_PSP;
3826 /* fall through for older HW */
3827 case ixgbe_mac_82599EB:
3828 case ixgbe_mac_X540:
3829 /* Disable RSC for ACK packets */
3830 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3831 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3832 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3833 /* hardware requires some bits to be set by default */
3834 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3835 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3838 /* We should do nothing since we don't know this hardware */
3842 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3846 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3847 * @adapter: board private structure
3849 * Configure the Rx unit of the MAC after a reset.
3851 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3853 struct ixgbe_hw *hw = &adapter->hw;
3857 /* disable receives while setting up the descriptors */
3858 hw->mac.ops.disable_rx(hw);
3860 ixgbe_setup_psrtype(adapter);
3861 ixgbe_setup_rdrxctl(adapter);
3864 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3865 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3866 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3867 rfctl |= IXGBE_RFCTL_RSC_DIS;
3868 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3870 /* Program registers for the distribution of queues */
3871 ixgbe_setup_mrqc(adapter);
3873 /* set_rx_buffer_len must be called before ring initialization */
3874 ixgbe_set_rx_buffer_len(adapter);
3877 * Setup the HW Rx Head and Tail Descriptor Pointers and
3878 * the Base and Length of the Rx Descriptor Ring
3880 for (i = 0; i < adapter->num_rx_queues; i++)
3881 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3883 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3884 /* disable drop enable for 82598 parts */
3885 if (hw->mac.type == ixgbe_mac_82598EB)
3886 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3888 /* enable all receives */
3889 rxctrl |= IXGBE_RXCTRL_RXEN;
3890 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3893 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3894 __be16 proto, u16 vid)
3896 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3897 struct ixgbe_hw *hw = &adapter->hw;
3899 /* add VID to filter table */
3900 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3901 set_bit(vid, adapter->active_vlans);
3906 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3907 __be16 proto, u16 vid)
3909 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3910 struct ixgbe_hw *hw = &adapter->hw;
3912 /* remove VID from filter table */
3913 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3914 clear_bit(vid, adapter->active_vlans);
3920 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3921 * @adapter: driver data
3923 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3925 struct ixgbe_hw *hw = &adapter->hw;
3929 switch (hw->mac.type) {
3930 case ixgbe_mac_82598EB:
3931 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3932 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3933 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3935 case ixgbe_mac_82599EB:
3936 case ixgbe_mac_X540:
3937 case ixgbe_mac_X550:
3938 case ixgbe_mac_X550EM_x:
3939 for (i = 0; i < adapter->num_rx_queues; i++) {
3940 struct ixgbe_ring *ring = adapter->rx_ring[i];
3942 if (ring->l2_accel_priv)
3945 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3946 vlnctrl &= ~IXGBE_RXDCTL_VME;
3947 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3956 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3957 * @adapter: driver data
3959 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3961 struct ixgbe_hw *hw = &adapter->hw;
3965 switch (hw->mac.type) {
3966 case ixgbe_mac_82598EB:
3967 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3968 vlnctrl |= IXGBE_VLNCTRL_VME;
3969 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3971 case ixgbe_mac_82599EB:
3972 case ixgbe_mac_X540:
3973 case ixgbe_mac_X550:
3974 case ixgbe_mac_X550EM_x:
3975 for (i = 0; i < adapter->num_rx_queues; i++) {
3976 struct ixgbe_ring *ring = adapter->rx_ring[i];
3978 if (ring->l2_accel_priv)
3981 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3982 vlnctrl |= IXGBE_RXDCTL_VME;
3983 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3991 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3995 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3997 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3998 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4002 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4003 * @netdev: network interface device structure
4005 * Writes multicast address list to the MTA hash table.
4006 * Returns: -ENOMEM on failure
4007 * 0 on no addresses written
4008 * X on writing X addresses to MTA
4010 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4012 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4013 struct ixgbe_hw *hw = &adapter->hw;
4015 if (!netif_running(netdev))
4018 if (hw->mac.ops.update_mc_addr_list)
4019 hw->mac.ops.update_mc_addr_list(hw, netdev);
4023 #ifdef CONFIG_PCI_IOV
4024 ixgbe_restore_vf_multicasts(adapter);
4027 return netdev_mc_count(netdev);
4030 #ifdef CONFIG_PCI_IOV
4031 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4033 struct ixgbe_hw *hw = &adapter->hw;
4035 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4036 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4037 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4038 adapter->mac_table[i].queue,
4041 hw->mac.ops.clear_rar(hw, i);
4043 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4048 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4050 struct ixgbe_hw *hw = &adapter->hw;
4052 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4053 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4054 if (adapter->mac_table[i].state &
4055 IXGBE_MAC_STATE_IN_USE)
4056 hw->mac.ops.set_rar(hw, i,
4057 adapter->mac_table[i].addr,
4058 adapter->mac_table[i].queue,
4061 hw->mac.ops.clear_rar(hw, i);
4063 adapter->mac_table[i].state &=
4064 ~(IXGBE_MAC_STATE_MODIFIED);
4069 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4072 struct ixgbe_hw *hw = &adapter->hw;
4074 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4075 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4076 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4077 eth_zero_addr(adapter->mac_table[i].addr);
4078 adapter->mac_table[i].queue = 0;
4080 ixgbe_sync_mac_table(adapter);
4083 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4085 struct ixgbe_hw *hw = &adapter->hw;
4088 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4089 if (adapter->mac_table[i].state == 0)
4095 /* this function destroys the first RAR entry */
4096 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4099 struct ixgbe_hw *hw = &adapter->hw;
4101 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4102 adapter->mac_table[0].queue = VMDQ_P(0);
4103 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4104 IXGBE_MAC_STATE_IN_USE);
4105 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4106 adapter->mac_table[0].queue,
4110 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4112 struct ixgbe_hw *hw = &adapter->hw;
4115 if (is_zero_ether_addr(addr))
4118 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4119 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4121 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4122 IXGBE_MAC_STATE_IN_USE);
4123 ether_addr_copy(adapter->mac_table[i].addr, addr);
4124 adapter->mac_table[i].queue = queue;
4125 ixgbe_sync_mac_table(adapter);
4131 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4133 /* search table for addr, if found, set to 0 and sync */
4135 struct ixgbe_hw *hw = &adapter->hw;
4137 if (is_zero_ether_addr(addr))
4140 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4141 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4142 adapter->mac_table[i].queue == queue) {
4143 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4144 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4145 eth_zero_addr(adapter->mac_table[i].addr);
4146 adapter->mac_table[i].queue = 0;
4147 ixgbe_sync_mac_table(adapter);
4154 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4155 * @netdev: network interface device structure
4157 * Writes unicast address list to the RAR table.
4158 * Returns: -ENOMEM on failure/insufficient address space
4159 * 0 on no addresses written
4160 * X on writing X addresses to the RAR table
4162 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4164 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4167 /* return ENOMEM indicating insufficient memory for addresses */
4168 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4171 if (!netdev_uc_empty(netdev)) {
4172 struct netdev_hw_addr *ha;
4173 netdev_for_each_uc_addr(ha, netdev) {
4174 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4175 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4183 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4184 * @netdev: network interface device structure
4186 * The set_rx_method entry point is called whenever the unicast/multicast
4187 * address list or the network interface flags are updated. This routine is
4188 * responsible for configuring the hardware for proper unicast, multicast and
4191 void ixgbe_set_rx_mode(struct net_device *netdev)
4193 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4194 struct ixgbe_hw *hw = &adapter->hw;
4195 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4199 /* Check for Promiscuous and All Multicast modes */
4200 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4201 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4203 /* set all bits that we expect to always be set */
4204 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4205 fctrl |= IXGBE_FCTRL_BAM;
4206 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4207 fctrl |= IXGBE_FCTRL_PMCF;
4209 /* clear the bits we are changing the status of */
4210 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4211 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4212 if (netdev->flags & IFF_PROMISC) {
4213 hw->addr_ctrl.user_set_promisc = true;
4214 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4215 vmolr |= IXGBE_VMOLR_MPE;
4216 /* Only disable hardware filter vlans in promiscuous mode
4217 * if SR-IOV and VMDQ are disabled - otherwise ensure
4218 * that hardware VLAN filters remain enabled.
4220 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4221 IXGBE_FLAG_SRIOV_ENABLED))
4222 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4224 if (netdev->flags & IFF_ALLMULTI) {
4225 fctrl |= IXGBE_FCTRL_MPE;
4226 vmolr |= IXGBE_VMOLR_MPE;
4228 vlnctrl |= IXGBE_VLNCTRL_VFE;
4229 hw->addr_ctrl.user_set_promisc = false;
4233 * Write addresses to available RAR registers, if there is not
4234 * sufficient space to store all the addresses then enable
4235 * unicast promiscuous mode
4237 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4239 fctrl |= IXGBE_FCTRL_UPE;
4240 vmolr |= IXGBE_VMOLR_ROPE;
4243 /* Write addresses to the MTA, if the attempt fails
4244 * then we should just turn on promiscuous mode so
4245 * that we can at least receive multicast traffic
4247 count = ixgbe_write_mc_addr_list(netdev);
4249 fctrl |= IXGBE_FCTRL_MPE;
4250 vmolr |= IXGBE_VMOLR_MPE;
4252 vmolr |= IXGBE_VMOLR_ROMPE;
4255 if (hw->mac.type != ixgbe_mac_82598EB) {
4256 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4257 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4259 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4262 /* This is useful for sniffing bad packets. */
4263 if (adapter->netdev->features & NETIF_F_RXALL) {
4264 /* UPE and MPE will be handled by normal PROMISC logic
4265 * in e1000e_set_rx_mode */
4266 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4267 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4268 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4270 fctrl &= ~(IXGBE_FCTRL_DPF);
4271 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4274 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4275 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4277 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4278 ixgbe_vlan_strip_enable(adapter);
4280 ixgbe_vlan_strip_disable(adapter);
4283 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4287 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4288 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4289 napi_enable(&adapter->q_vector[q_idx]->napi);
4293 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4297 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4298 napi_disable(&adapter->q_vector[q_idx]->napi);
4299 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4300 pr_info("QV %d locked\n", q_idx);
4301 usleep_range(1000, 20000);
4306 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4308 switch (adapter->hw.mac.type) {
4309 case ixgbe_mac_X550:
4310 case ixgbe_mac_X550EM_x:
4311 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4312 #ifdef CONFIG_IXGBE_VXLAN
4313 adapter->vxlan_port = 0;
4321 #ifdef CONFIG_IXGBE_DCB
4323 * ixgbe_configure_dcb - Configure DCB hardware
4324 * @adapter: ixgbe adapter struct
4326 * This is called by the driver on open to configure the DCB hardware.
4327 * This is also called by the gennetlink interface when reconfiguring
4330 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4332 struct ixgbe_hw *hw = &adapter->hw;
4333 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4335 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4336 if (hw->mac.type == ixgbe_mac_82598EB)
4337 netif_set_gso_max_size(adapter->netdev, 65536);
4341 if (hw->mac.type == ixgbe_mac_82598EB)
4342 netif_set_gso_max_size(adapter->netdev, 32768);
4345 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4346 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4349 /* reconfigure the hardware */
4350 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4351 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4353 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4355 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4356 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4357 ixgbe_dcb_hw_ets(&adapter->hw,
4358 adapter->ixgbe_ieee_ets,
4360 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4361 adapter->ixgbe_ieee_pfc->pfc_en,
4362 adapter->ixgbe_ieee_ets->prio_tc);
4365 /* Enable RSS Hash per TC */
4366 if (hw->mac.type != ixgbe_mac_82598EB) {
4368 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4375 /* write msb to all 8 TCs in one write */
4376 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4381 /* Additional bittime to account for IXGBE framing */
4382 #define IXGBE_ETH_FRAMING 20
4385 * ixgbe_hpbthresh - calculate high water mark for flow control
4387 * @adapter: board private structure to calculate for
4388 * @pb: packet buffer to calculate
4390 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4392 struct ixgbe_hw *hw = &adapter->hw;
4393 struct net_device *dev = adapter->netdev;
4394 int link, tc, kb, marker;
4397 /* Calculate max LAN frame size */
4398 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4401 /* FCoE traffic class uses FCOE jumbo frames */
4402 if ((dev->features & NETIF_F_FCOE_MTU) &&
4403 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4404 (pb == ixgbe_fcoe_get_tc(adapter)))
4405 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4408 /* Calculate delay value for device */
4409 switch (hw->mac.type) {
4410 case ixgbe_mac_X540:
4411 case ixgbe_mac_X550:
4412 case ixgbe_mac_X550EM_x:
4413 dv_id = IXGBE_DV_X540(link, tc);
4416 dv_id = IXGBE_DV(link, tc);
4420 /* Loopback switch introduces additional latency */
4421 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4422 dv_id += IXGBE_B2BT(tc);
4424 /* Delay value is calculated in bit times convert to KB */
4425 kb = IXGBE_BT2KB(dv_id);
4426 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4428 marker = rx_pba - kb;
4430 /* It is possible that the packet buffer is not large enough
4431 * to provide required headroom. In this case throw an error
4432 * to user and a do the best we can.
4435 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4436 "headroom to support flow control."
4437 "Decrease MTU or number of traffic classes\n", pb);
4445 * ixgbe_lpbthresh - calculate low water mark for for flow control
4447 * @adapter: board private structure to calculate for
4448 * @pb: packet buffer to calculate
4450 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4452 struct ixgbe_hw *hw = &adapter->hw;
4453 struct net_device *dev = adapter->netdev;
4457 /* Calculate max LAN frame size */
4458 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4461 /* FCoE traffic class uses FCOE jumbo frames */
4462 if ((dev->features & NETIF_F_FCOE_MTU) &&
4463 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4464 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4465 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4468 /* Calculate delay value for device */
4469 switch (hw->mac.type) {
4470 case ixgbe_mac_X540:
4471 case ixgbe_mac_X550:
4472 case ixgbe_mac_X550EM_x:
4473 dv_id = IXGBE_LOW_DV_X540(tc);
4476 dv_id = IXGBE_LOW_DV(tc);
4480 /* Delay value is calculated in bit times convert to KB */
4481 return IXGBE_BT2KB(dv_id);
4485 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4487 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4489 struct ixgbe_hw *hw = &adapter->hw;
4490 int num_tc = netdev_get_num_tc(adapter->netdev);
4496 for (i = 0; i < num_tc; i++) {
4497 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4498 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4500 /* Low water marks must not be larger than high water marks */
4501 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4502 hw->fc.low_water[i] = 0;
4505 for (; i < MAX_TRAFFIC_CLASS; i++)
4506 hw->fc.high_water[i] = 0;
4509 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4511 struct ixgbe_hw *hw = &adapter->hw;
4513 u8 tc = netdev_get_num_tc(adapter->netdev);
4515 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4516 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4517 hdrm = 32 << adapter->fdir_pballoc;
4521 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4522 ixgbe_pbthresh_setup(adapter);
4525 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4527 struct ixgbe_hw *hw = &adapter->hw;
4528 struct hlist_node *node2;
4529 struct ixgbe_fdir_filter *filter;
4531 spin_lock(&adapter->fdir_perfect_lock);
4533 if (!hlist_empty(&adapter->fdir_filter_list))
4534 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4536 hlist_for_each_entry_safe(filter, node2,
4537 &adapter->fdir_filter_list, fdir_node) {
4538 ixgbe_fdir_write_perfect_filter_82599(hw,
4541 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4542 IXGBE_FDIR_DROP_QUEUE :
4543 adapter->rx_ring[filter->action]->reg_idx);
4546 spin_unlock(&adapter->fdir_perfect_lock);
4549 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4550 struct ixgbe_adapter *adapter)
4552 struct ixgbe_hw *hw = &adapter->hw;
4555 /* No unicast promiscuous support for VMDQ devices. */
4556 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4557 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4559 /* clear the affected bit */
4560 vmolr &= ~IXGBE_VMOLR_MPE;
4562 if (dev->flags & IFF_ALLMULTI) {
4563 vmolr |= IXGBE_VMOLR_MPE;
4565 vmolr |= IXGBE_VMOLR_ROMPE;
4566 hw->mac.ops.update_mc_addr_list(hw, dev);
4568 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4569 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4572 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4574 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4575 int rss_i = adapter->num_rx_queues_per_pool;
4576 struct ixgbe_hw *hw = &adapter->hw;
4577 u16 pool = vadapter->pool;
4578 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4579 IXGBE_PSRTYPE_UDPHDR |
4580 IXGBE_PSRTYPE_IPV4HDR |
4581 IXGBE_PSRTYPE_L2HDR |
4582 IXGBE_PSRTYPE_IPV6HDR;
4584 if (hw->mac.type == ixgbe_mac_82598EB)
4592 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4596 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4597 * @rx_ring: ring to free buffers from
4599 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4601 struct device *dev = rx_ring->dev;
4605 /* ring already cleared, nothing to do */
4606 if (!rx_ring->rx_buffer_info)
4609 /* Free all the Rx ring sk_buffs */
4610 for (i = 0; i < rx_ring->count; i++) {
4611 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4613 if (rx_buffer->skb) {
4614 struct sk_buff *skb = rx_buffer->skb;
4615 if (IXGBE_CB(skb)->page_released)
4618 ixgbe_rx_bufsz(rx_ring),
4621 rx_buffer->skb = NULL;
4624 if (!rx_buffer->page)
4627 dma_unmap_page(dev, rx_buffer->dma,
4628 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4629 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4631 rx_buffer->page = NULL;
4634 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4635 memset(rx_ring->rx_buffer_info, 0, size);
4637 /* Zero out the descriptor ring */
4638 memset(rx_ring->desc, 0, rx_ring->size);
4640 rx_ring->next_to_alloc = 0;
4641 rx_ring->next_to_clean = 0;
4642 rx_ring->next_to_use = 0;
4645 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4646 struct ixgbe_ring *rx_ring)
4648 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4649 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4651 /* shutdown specific queue receive and wait for dma to settle */
4652 ixgbe_disable_rx_queue(adapter, rx_ring);
4653 usleep_range(10000, 20000);
4654 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4655 ixgbe_clean_rx_ring(rx_ring);
4656 rx_ring->l2_accel_priv = NULL;
4659 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4660 struct ixgbe_fwd_adapter *accel)
4662 struct ixgbe_adapter *adapter = accel->real_adapter;
4663 unsigned int rxbase = accel->rx_base_queue;
4664 unsigned int txbase = accel->tx_base_queue;
4667 netif_tx_stop_all_queues(vdev);
4669 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4670 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4671 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4674 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4675 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4676 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4683 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4684 struct ixgbe_fwd_adapter *accel)
4686 struct ixgbe_adapter *adapter = accel->real_adapter;
4687 unsigned int rxbase, txbase, queues;
4688 int i, baseq, err = 0;
4690 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4693 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4694 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4695 accel->pool, adapter->num_rx_pools,
4696 baseq, baseq + adapter->num_rx_queues_per_pool,
4697 adapter->fwd_bitmask);
4699 accel->netdev = vdev;
4700 accel->rx_base_queue = rxbase = baseq;
4701 accel->tx_base_queue = txbase = baseq;
4703 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4704 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4706 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4707 adapter->rx_ring[rxbase + i]->netdev = vdev;
4708 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4709 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4712 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4713 adapter->tx_ring[txbase + i]->netdev = vdev;
4714 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4717 queues = min_t(unsigned int,
4718 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4719 err = netif_set_real_num_tx_queues(vdev, queues);
4723 err = netif_set_real_num_rx_queues(vdev, queues);
4727 if (is_valid_ether_addr(vdev->dev_addr))
4728 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4730 ixgbe_fwd_psrtype(accel);
4731 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4734 ixgbe_fwd_ring_down(vdev, accel);
4738 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4740 struct net_device *upper;
4741 struct list_head *iter;
4744 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4745 if (netif_is_macvlan(upper)) {
4746 struct macvlan_dev *dfwd = netdev_priv(upper);
4747 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4749 if (dfwd->fwd_priv) {
4750 err = ixgbe_fwd_ring_up(upper, vadapter);
4758 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4760 struct ixgbe_hw *hw = &adapter->hw;
4762 ixgbe_configure_pb(adapter);
4763 #ifdef CONFIG_IXGBE_DCB
4764 ixgbe_configure_dcb(adapter);
4767 * We must restore virtualization before VLANs or else
4768 * the VLVF registers will not be populated
4770 ixgbe_configure_virtualization(adapter);
4772 ixgbe_set_rx_mode(adapter->netdev);
4773 ixgbe_restore_vlan(adapter);
4775 switch (hw->mac.type) {
4776 case ixgbe_mac_82599EB:
4777 case ixgbe_mac_X540:
4778 hw->mac.ops.disable_rx_buff(hw);
4784 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4785 ixgbe_init_fdir_signature_82599(&adapter->hw,
4786 adapter->fdir_pballoc);
4787 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4788 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4789 adapter->fdir_pballoc);
4790 ixgbe_fdir_filter_restore(adapter);
4793 switch (hw->mac.type) {
4794 case ixgbe_mac_82599EB:
4795 case ixgbe_mac_X540:
4796 hw->mac.ops.enable_rx_buff(hw);
4802 #ifdef CONFIG_IXGBE_DCA
4804 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
4805 ixgbe_setup_dca(adapter);
4806 #endif /* CONFIG_IXGBE_DCA */
4809 /* configure FCoE L2 filters, redirection table, and Rx control */
4810 ixgbe_configure_fcoe(adapter);
4812 #endif /* IXGBE_FCOE */
4813 ixgbe_configure_tx(adapter);
4814 ixgbe_configure_rx(adapter);
4815 ixgbe_configure_dfwd(adapter);
4819 * ixgbe_sfp_link_config - set up SFP+ link
4820 * @adapter: pointer to private adapter struct
4822 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4825 * We are assuming the worst case scenario here, and that
4826 * is that an SFP was inserted/removed after the reset
4827 * but before SFP detection was enabled. As such the best
4828 * solution is to just start searching as soon as we start
4830 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4831 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4833 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4834 adapter->sfp_poll_time = 0;
4838 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4839 * @hw: pointer to private hardware struct
4841 * Returns 0 on success, negative on failure
4843 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4846 bool autoneg, link_up = false;
4847 int ret = IXGBE_ERR_LINK_SETUP;
4849 if (hw->mac.ops.check_link)
4850 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4855 speed = hw->phy.autoneg_advertised;
4856 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4857 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4862 if (hw->mac.ops.setup_link)
4863 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4868 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4870 struct ixgbe_hw *hw = &adapter->hw;
4873 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4874 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4876 gpie |= IXGBE_GPIE_EIAME;
4878 * use EIAM to auto-mask when MSI-X interrupt is asserted
4879 * this saves a register write for every interrupt
4881 switch (hw->mac.type) {
4882 case ixgbe_mac_82598EB:
4883 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4885 case ixgbe_mac_82599EB:
4886 case ixgbe_mac_X540:
4887 case ixgbe_mac_X550:
4888 case ixgbe_mac_X550EM_x:
4890 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4891 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4895 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4896 * specifically only auto mask tx and rx interrupts */
4897 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4900 /* XXX: to interrupt immediately for EICS writes, enable this */
4901 /* gpie |= IXGBE_GPIE_EIMEN; */
4903 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4904 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4906 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4907 case IXGBE_82599_VMDQ_8Q_MASK:
4908 gpie |= IXGBE_GPIE_VTMODE_16;
4910 case IXGBE_82599_VMDQ_4Q_MASK:
4911 gpie |= IXGBE_GPIE_VTMODE_32;
4914 gpie |= IXGBE_GPIE_VTMODE_64;
4919 /* Enable Thermal over heat sensor interrupt */
4920 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4921 switch (adapter->hw.mac.type) {
4922 case ixgbe_mac_82599EB:
4923 gpie |= IXGBE_SDP0_GPIEN_8259X;
4930 /* Enable fan failure interrupt */
4931 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4932 gpie |= IXGBE_SDP1_GPIEN(hw);
4934 switch (hw->mac.type) {
4935 case ixgbe_mac_82599EB:
4936 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
4938 case ixgbe_mac_X550EM_x:
4939 gpie |= IXGBE_SDP0_GPIEN_X540;
4945 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4948 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4950 struct ixgbe_hw *hw = &adapter->hw;
4954 ixgbe_get_hw_control(adapter);
4955 ixgbe_setup_gpie(adapter);
4957 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4958 ixgbe_configure_msix(adapter);
4960 ixgbe_configure_msi_and_legacy(adapter);
4962 /* enable the optics for 82599 SFP+ fiber */
4963 if (hw->mac.ops.enable_tx_laser)
4964 hw->mac.ops.enable_tx_laser(hw);
4966 if (hw->phy.ops.set_phy_power)
4967 hw->phy.ops.set_phy_power(hw, true);
4969 smp_mb__before_atomic();
4970 clear_bit(__IXGBE_DOWN, &adapter->state);
4971 ixgbe_napi_enable_all(adapter);
4973 if (ixgbe_is_sfp(hw)) {
4974 ixgbe_sfp_link_config(adapter);
4976 err = ixgbe_non_sfp_link_config(hw);
4978 e_err(probe, "link_config FAILED %d\n", err);
4981 /* clear any pending interrupts, may auto mask */
4982 IXGBE_READ_REG(hw, IXGBE_EICR);
4983 ixgbe_irq_enable(adapter, true, true);
4986 * If this adapter has a fan, check to see if we had a failure
4987 * before we enabled the interrupt.
4989 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4990 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4991 if (esdp & IXGBE_ESDP_SDP1)
4992 e_crit(drv, "Fan has stopped, replace the adapter\n");
4995 /* bring the link up in the watchdog, this could race with our first
4996 * link up interrupt but shouldn't be a problem */
4997 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4998 adapter->link_check_timeout = jiffies;
4999 mod_timer(&adapter->service_timer, jiffies);
5001 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5002 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5003 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5004 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5007 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5009 WARN_ON(in_interrupt());
5010 /* put off any impending NetWatchDogTimeout */
5011 adapter->netdev->trans_start = jiffies;
5013 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5014 usleep_range(1000, 2000);
5015 ixgbe_down(adapter);
5017 * If SR-IOV enabled then wait a bit before bringing the adapter
5018 * back up to give the VFs time to respond to the reset. The
5019 * two second wait is based upon the watchdog timer cycle in
5022 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5025 clear_bit(__IXGBE_RESETTING, &adapter->state);
5028 void ixgbe_up(struct ixgbe_adapter *adapter)
5030 /* hardware has been reset, we need to reload some things */
5031 ixgbe_configure(adapter);
5033 ixgbe_up_complete(adapter);
5036 void ixgbe_reset(struct ixgbe_adapter *adapter)
5038 struct ixgbe_hw *hw = &adapter->hw;
5039 struct net_device *netdev = adapter->netdev;
5041 u8 old_addr[ETH_ALEN];
5043 if (ixgbe_removed(hw->hw_addr))
5045 /* lock SFP init bit to prevent race conditions with the watchdog */
5046 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5047 usleep_range(1000, 2000);
5049 /* clear all SFP and link config related flags while holding SFP_INIT */
5050 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5051 IXGBE_FLAG2_SFP_NEEDS_RESET);
5052 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5054 err = hw->mac.ops.init_hw(hw);
5057 case IXGBE_ERR_SFP_NOT_PRESENT:
5058 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5060 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5061 e_dev_err("master disable timed out\n");
5063 case IXGBE_ERR_EEPROM_VERSION:
5064 /* We are running on a pre-production device, log a warning */
5065 e_dev_warn("This device is a pre-production adapter/LOM. "
5066 "Please be aware there may be issues associated with "
5067 "your hardware. If you are experiencing problems "
5068 "please contact your Intel or hardware "
5069 "representative who provided you with this "
5073 e_dev_err("Hardware Error: %d\n", err);
5076 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5077 /* do not flush user set addresses */
5078 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5079 ixgbe_flush_sw_mac_table(adapter);
5080 ixgbe_mac_set_default_filter(adapter, old_addr);
5082 /* update SAN MAC vmdq pool selection */
5083 if (hw->mac.san_mac_rar_index)
5084 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5086 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5087 ixgbe_ptp_reset(adapter);
5089 if (hw->phy.ops.set_phy_power) {
5090 if (!netif_running(adapter->netdev) && !adapter->wol)
5091 hw->phy.ops.set_phy_power(hw, false);
5093 hw->phy.ops.set_phy_power(hw, true);
5098 * ixgbe_clean_tx_ring - Free Tx Buffers
5099 * @tx_ring: ring to be cleaned
5101 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5103 struct ixgbe_tx_buffer *tx_buffer_info;
5107 /* ring already cleared, nothing to do */
5108 if (!tx_ring->tx_buffer_info)
5111 /* Free all the Tx ring sk_buffs */
5112 for (i = 0; i < tx_ring->count; i++) {
5113 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5114 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5117 netdev_tx_reset_queue(txring_txq(tx_ring));
5119 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5120 memset(tx_ring->tx_buffer_info, 0, size);
5122 /* Zero out the descriptor ring */
5123 memset(tx_ring->desc, 0, tx_ring->size);
5125 tx_ring->next_to_use = 0;
5126 tx_ring->next_to_clean = 0;
5130 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5131 * @adapter: board private structure
5133 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5137 for (i = 0; i < adapter->num_rx_queues; i++)
5138 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5142 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5143 * @adapter: board private structure
5145 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5149 for (i = 0; i < adapter->num_tx_queues; i++)
5150 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5153 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5155 struct hlist_node *node2;
5156 struct ixgbe_fdir_filter *filter;
5158 spin_lock(&adapter->fdir_perfect_lock);
5160 hlist_for_each_entry_safe(filter, node2,
5161 &adapter->fdir_filter_list, fdir_node) {
5162 hlist_del(&filter->fdir_node);
5165 adapter->fdir_filter_count = 0;
5167 spin_unlock(&adapter->fdir_perfect_lock);
5170 void ixgbe_down(struct ixgbe_adapter *adapter)
5172 struct net_device *netdev = adapter->netdev;
5173 struct ixgbe_hw *hw = &adapter->hw;
5174 struct net_device *upper;
5175 struct list_head *iter;
5178 /* signal that we are down to the interrupt handler */
5179 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5180 return; /* do nothing if already down */
5182 /* disable receives */
5183 hw->mac.ops.disable_rx(hw);
5185 /* disable all enabled rx queues */
5186 for (i = 0; i < adapter->num_rx_queues; i++)
5187 /* this call also flushes the previous write */
5188 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5190 usleep_range(10000, 20000);
5192 netif_tx_stop_all_queues(netdev);
5194 /* call carrier off first to avoid false dev_watchdog timeouts */
5195 netif_carrier_off(netdev);
5196 netif_tx_disable(netdev);
5198 /* disable any upper devices */
5199 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5200 if (netif_is_macvlan(upper)) {
5201 struct macvlan_dev *vlan = netdev_priv(upper);
5203 if (vlan->fwd_priv) {
5204 netif_tx_stop_all_queues(upper);
5205 netif_carrier_off(upper);
5206 netif_tx_disable(upper);
5211 ixgbe_irq_disable(adapter);
5213 ixgbe_napi_disable_all(adapter);
5215 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5216 IXGBE_FLAG2_RESET_REQUESTED);
5217 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5219 del_timer_sync(&adapter->service_timer);
5221 if (adapter->num_vfs) {
5222 /* Clear EITR Select mapping */
5223 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5225 /* Mark all the VFs as inactive */
5226 for (i = 0 ; i < adapter->num_vfs; i++)
5227 adapter->vfinfo[i].clear_to_send = false;
5229 /* ping all the active vfs to let them know we are going down */
5230 ixgbe_ping_all_vfs(adapter);
5232 /* Disable all VFTE/VFRE TX/RX */
5233 ixgbe_disable_tx_rx(adapter);
5236 /* disable transmits in the hardware now that interrupts are off */
5237 for (i = 0; i < adapter->num_tx_queues; i++) {
5238 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5239 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5242 /* Disable the Tx DMA engine on 82599 and later MAC */
5243 switch (hw->mac.type) {
5244 case ixgbe_mac_82599EB:
5245 case ixgbe_mac_X540:
5246 case ixgbe_mac_X550:
5247 case ixgbe_mac_X550EM_x:
5248 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5249 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5250 ~IXGBE_DMATXCTL_TE));
5256 if (!pci_channel_offline(adapter->pdev))
5257 ixgbe_reset(adapter);
5259 /* power down the optics for 82599 SFP+ fiber */
5260 if (hw->mac.ops.disable_tx_laser)
5261 hw->mac.ops.disable_tx_laser(hw);
5263 ixgbe_clean_all_tx_rings(adapter);
5264 ixgbe_clean_all_rx_rings(adapter);
5268 * ixgbe_tx_timeout - Respond to a Tx Hang
5269 * @netdev: network interface device structure
5271 static void ixgbe_tx_timeout(struct net_device *netdev)
5273 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5275 /* Do the reset outside of interrupt context */
5276 ixgbe_tx_timeout_reset(adapter);
5280 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5281 * @adapter: board private structure to initialize
5283 * ixgbe_sw_init initializes the Adapter private data structure.
5284 * Fields are initialized based on PCI device information and
5285 * OS network device settings (MTU size).
5287 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5289 struct ixgbe_hw *hw = &adapter->hw;
5290 struct pci_dev *pdev = adapter->pdev;
5291 unsigned int rss, fdir;
5293 #ifdef CONFIG_IXGBE_DCB
5295 struct tc_configuration *tc;
5298 /* PCI config space info */
5300 hw->vendor_id = pdev->vendor;
5301 hw->device_id = pdev->device;
5302 hw->revision_id = pdev->revision;
5303 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5304 hw->subsystem_device_id = pdev->subsystem_device;
5306 /* Set common capability flags and settings */
5307 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5308 adapter->ring_feature[RING_F_RSS].limit = rss;
5309 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5310 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5311 adapter->atr_sample_rate = 20;
5312 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5313 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5314 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5315 #ifdef CONFIG_IXGBE_DCA
5316 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5319 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5320 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5321 #ifdef CONFIG_IXGBE_DCB
5322 /* Default traffic class to use for FCoE */
5323 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5324 #endif /* CONFIG_IXGBE_DCB */
5325 #endif /* IXGBE_FCOE */
5327 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5328 hw->mac.num_rar_entries,
5331 /* Set MAC specific capability flags and exceptions */
5332 switch (hw->mac.type) {
5333 case ixgbe_mac_82598EB:
5334 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5336 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5337 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5339 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5340 adapter->ring_feature[RING_F_FDIR].limit = 0;
5341 adapter->atr_sample_rate = 0;
5342 adapter->fdir_pballoc = 0;
5344 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5345 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5346 #ifdef CONFIG_IXGBE_DCB
5347 adapter->fcoe.up = 0;
5348 #endif /* IXGBE_DCB */
5349 #endif /* IXGBE_FCOE */
5351 case ixgbe_mac_82599EB:
5352 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5353 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5355 case ixgbe_mac_X540:
5356 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5357 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5358 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5360 case ixgbe_mac_X550EM_x:
5361 case ixgbe_mac_X550:
5362 #ifdef CONFIG_IXGBE_DCA
5363 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5365 #ifdef CONFIG_IXGBE_VXLAN
5366 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5374 /* FCoE support exists, always init the FCoE lock */
5375 spin_lock_init(&adapter->fcoe.lock);
5378 /* n-tuple support exists, always init our spinlock */
5379 spin_lock_init(&adapter->fdir_perfect_lock);
5381 #ifdef CONFIG_IXGBE_DCB
5382 switch (hw->mac.type) {
5383 case ixgbe_mac_X540:
5384 case ixgbe_mac_X550:
5385 case ixgbe_mac_X550EM_x:
5386 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5387 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5390 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5391 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5395 /* Configure DCB traffic classes */
5396 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5397 tc = &adapter->dcb_cfg.tc_config[j];
5398 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5399 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5400 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5401 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5402 tc->dcb_pfc = pfc_disabled;
5405 /* Initialize default user to priority mapping, UPx->TC0 */
5406 tc = &adapter->dcb_cfg.tc_config[0];
5407 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5408 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5410 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5411 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5412 adapter->dcb_cfg.pfc_mode_enable = false;
5413 adapter->dcb_set_bitmap = 0x00;
5414 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5415 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5416 sizeof(adapter->temp_dcb_cfg));
5420 /* default flow control settings */
5421 hw->fc.requested_mode = ixgbe_fc_full;
5422 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5423 ixgbe_pbthresh_setup(adapter);
5424 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5425 hw->fc.send_xon = true;
5426 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5428 #ifdef CONFIG_PCI_IOV
5430 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5432 /* assign number of SR-IOV VFs */
5433 if (hw->mac.type != ixgbe_mac_82598EB) {
5434 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5435 adapter->num_vfs = 0;
5436 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5438 adapter->num_vfs = max_vfs;
5441 #endif /* CONFIG_PCI_IOV */
5443 /* enable itr by default in dynamic mode */
5444 adapter->rx_itr_setting = 1;
5445 adapter->tx_itr_setting = 1;
5447 /* set default ring sizes */
5448 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5449 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5451 /* set default work limits */
5452 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5454 /* initialize eeprom parameters */
5455 if (ixgbe_init_eeprom_params_generic(hw)) {
5456 e_dev_err("EEPROM initialization failed\n");
5460 /* PF holds first pool slot */
5461 set_bit(0, &adapter->fwd_bitmask);
5462 set_bit(__IXGBE_DOWN, &adapter->state);
5468 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5469 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5471 * Return 0 on success, negative on failure
5473 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5475 struct device *dev = tx_ring->dev;
5476 int orig_node = dev_to_node(dev);
5480 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5482 if (tx_ring->q_vector)
5483 ring_node = tx_ring->q_vector->numa_node;
5485 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5486 if (!tx_ring->tx_buffer_info)
5487 tx_ring->tx_buffer_info = vzalloc(size);
5488 if (!tx_ring->tx_buffer_info)
5491 u64_stats_init(&tx_ring->syncp);
5493 /* round up to nearest 4K */
5494 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5495 tx_ring->size = ALIGN(tx_ring->size, 4096);
5497 set_dev_node(dev, ring_node);
5498 tx_ring->desc = dma_alloc_coherent(dev,
5502 set_dev_node(dev, orig_node);
5504 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5505 &tx_ring->dma, GFP_KERNEL);
5509 tx_ring->next_to_use = 0;
5510 tx_ring->next_to_clean = 0;
5514 vfree(tx_ring->tx_buffer_info);
5515 tx_ring->tx_buffer_info = NULL;
5516 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5521 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5522 * @adapter: board private structure
5524 * If this function returns with an error, then it's possible one or
5525 * more of the rings is populated (while the rest are not). It is the
5526 * callers duty to clean those orphaned rings.
5528 * Return 0 on success, negative on failure
5530 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5534 for (i = 0; i < adapter->num_tx_queues; i++) {
5535 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5539 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5545 /* rewind the index freeing the rings as we go */
5547 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5552 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5553 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5555 * Returns 0 on success, negative on failure
5557 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5559 struct device *dev = rx_ring->dev;
5560 int orig_node = dev_to_node(dev);
5564 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5566 if (rx_ring->q_vector)
5567 ring_node = rx_ring->q_vector->numa_node;
5569 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5570 if (!rx_ring->rx_buffer_info)
5571 rx_ring->rx_buffer_info = vzalloc(size);
5572 if (!rx_ring->rx_buffer_info)
5575 u64_stats_init(&rx_ring->syncp);
5577 /* Round up to nearest 4K */
5578 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5579 rx_ring->size = ALIGN(rx_ring->size, 4096);
5581 set_dev_node(dev, ring_node);
5582 rx_ring->desc = dma_alloc_coherent(dev,
5586 set_dev_node(dev, orig_node);
5588 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5589 &rx_ring->dma, GFP_KERNEL);
5593 rx_ring->next_to_clean = 0;
5594 rx_ring->next_to_use = 0;
5598 vfree(rx_ring->rx_buffer_info);
5599 rx_ring->rx_buffer_info = NULL;
5600 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5605 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5606 * @adapter: board private structure
5608 * If this function returns with an error, then it's possible one or
5609 * more of the rings is populated (while the rest are not). It is the
5610 * callers duty to clean those orphaned rings.
5612 * Return 0 on success, negative on failure
5614 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5618 for (i = 0; i < adapter->num_rx_queues; i++) {
5619 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5623 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5628 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5633 /* rewind the index freeing the rings as we go */
5635 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5640 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5641 * @tx_ring: Tx descriptor ring for a specific queue
5643 * Free all transmit software resources
5645 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5647 ixgbe_clean_tx_ring(tx_ring);
5649 vfree(tx_ring->tx_buffer_info);
5650 tx_ring->tx_buffer_info = NULL;
5652 /* if not set, then don't free */
5656 dma_free_coherent(tx_ring->dev, tx_ring->size,
5657 tx_ring->desc, tx_ring->dma);
5659 tx_ring->desc = NULL;
5663 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5664 * @adapter: board private structure
5666 * Free all transmit software resources
5668 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5672 for (i = 0; i < adapter->num_tx_queues; i++)
5673 if (adapter->tx_ring[i]->desc)
5674 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5678 * ixgbe_free_rx_resources - Free Rx Resources
5679 * @rx_ring: ring to clean the resources from
5681 * Free all receive software resources
5683 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5685 ixgbe_clean_rx_ring(rx_ring);
5687 vfree(rx_ring->rx_buffer_info);
5688 rx_ring->rx_buffer_info = NULL;
5690 /* if not set, then don't free */
5694 dma_free_coherent(rx_ring->dev, rx_ring->size,
5695 rx_ring->desc, rx_ring->dma);
5697 rx_ring->desc = NULL;
5701 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5702 * @adapter: board private structure
5704 * Free all receive software resources
5706 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5711 ixgbe_free_fcoe_ddp_resources(adapter);
5714 for (i = 0; i < adapter->num_rx_queues; i++)
5715 if (adapter->rx_ring[i]->desc)
5716 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5720 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5721 * @netdev: network interface device structure
5722 * @new_mtu: new value for maximum frame size
5724 * Returns 0 on success, negative on failure
5726 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5728 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5729 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5731 /* MTU < 68 is an error and causes problems on some kernels */
5732 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5736 * For 82599EB we cannot allow legacy VFs to enable their receive
5737 * paths when MTU greater than 1500 is configured. So display a
5738 * warning that legacy VFs will be disabled.
5740 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5741 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5742 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5743 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5745 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5747 /* must set new MTU before calling down or up */
5748 netdev->mtu = new_mtu;
5750 if (netif_running(netdev))
5751 ixgbe_reinit_locked(adapter);
5757 * ixgbe_open - Called when a network interface is made active
5758 * @netdev: network interface device structure
5760 * Returns 0 on success, negative value on failure
5762 * The open entry point is called when a network interface is made
5763 * active by the system (IFF_UP). At this point all resources needed
5764 * for transmit and receive operations are allocated, the interrupt
5765 * handler is registered with the OS, the watchdog timer is started,
5766 * and the stack is notified that the interface is ready.
5768 static int ixgbe_open(struct net_device *netdev)
5770 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5771 struct ixgbe_hw *hw = &adapter->hw;
5774 /* disallow open during test */
5775 if (test_bit(__IXGBE_TESTING, &adapter->state))
5778 netif_carrier_off(netdev);
5780 /* allocate transmit descriptors */
5781 err = ixgbe_setup_all_tx_resources(adapter);
5785 /* allocate receive descriptors */
5786 err = ixgbe_setup_all_rx_resources(adapter);
5790 ixgbe_configure(adapter);
5792 err = ixgbe_request_irq(adapter);
5796 /* Notify the stack of the actual queue counts. */
5797 if (adapter->num_rx_pools > 1)
5798 queues = adapter->num_rx_queues_per_pool;
5800 queues = adapter->num_tx_queues;
5802 err = netif_set_real_num_tx_queues(netdev, queues);
5804 goto err_set_queues;
5806 if (adapter->num_rx_pools > 1 &&
5807 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5808 queues = IXGBE_MAX_L2A_QUEUES;
5810 queues = adapter->num_rx_queues;
5811 err = netif_set_real_num_rx_queues(netdev, queues);
5813 goto err_set_queues;
5815 ixgbe_ptp_init(adapter);
5817 ixgbe_up_complete(adapter);
5819 ixgbe_clear_vxlan_port(adapter);
5820 #ifdef CONFIG_IXGBE_VXLAN
5821 vxlan_get_rx_port(netdev);
5827 ixgbe_free_irq(adapter);
5829 ixgbe_free_all_rx_resources(adapter);
5830 if (hw->phy.ops.set_phy_power && !adapter->wol)
5831 hw->phy.ops.set_phy_power(&adapter->hw, false);
5833 ixgbe_free_all_tx_resources(adapter);
5835 ixgbe_reset(adapter);
5840 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5842 ixgbe_ptp_suspend(adapter);
5844 if (adapter->hw.phy.ops.enter_lplu) {
5845 adapter->hw.phy.reset_disable = true;
5846 ixgbe_down(adapter);
5847 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5848 adapter->hw.phy.reset_disable = false;
5850 ixgbe_down(adapter);
5853 ixgbe_free_irq(adapter);
5855 ixgbe_free_all_tx_resources(adapter);
5856 ixgbe_free_all_rx_resources(adapter);
5860 * ixgbe_close - Disables a network interface
5861 * @netdev: network interface device structure
5863 * Returns 0, this is not allowed to fail
5865 * The close entry point is called when an interface is de-activated
5866 * by the OS. The hardware is still under the drivers control, but
5867 * needs to be disabled. A global MAC reset is issued to stop the
5868 * hardware, and all transmit and receive resources are freed.
5870 static int ixgbe_close(struct net_device *netdev)
5872 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5874 ixgbe_ptp_stop(adapter);
5876 ixgbe_close_suspend(adapter);
5878 ixgbe_fdir_filter_exit(adapter);
5880 ixgbe_release_hw_control(adapter);
5886 static int ixgbe_resume(struct pci_dev *pdev)
5888 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5889 struct net_device *netdev = adapter->netdev;
5892 adapter->hw.hw_addr = adapter->io_addr;
5893 pci_set_power_state(pdev, PCI_D0);
5894 pci_restore_state(pdev);
5896 * pci_restore_state clears dev->state_saved so call
5897 * pci_save_state to restore it.
5899 pci_save_state(pdev);
5901 err = pci_enable_device_mem(pdev);
5903 e_dev_err("Cannot enable PCI device from suspend\n");
5906 smp_mb__before_atomic();
5907 clear_bit(__IXGBE_DISABLED, &adapter->state);
5908 pci_set_master(pdev);
5910 pci_wake_from_d3(pdev, false);
5912 ixgbe_reset(adapter);
5914 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5917 err = ixgbe_init_interrupt_scheme(adapter);
5918 if (!err && netif_running(netdev))
5919 err = ixgbe_open(netdev);
5926 netif_device_attach(netdev);
5930 #endif /* CONFIG_PM */
5932 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5934 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5935 struct net_device *netdev = adapter->netdev;
5936 struct ixgbe_hw *hw = &adapter->hw;
5938 u32 wufc = adapter->wol;
5943 netif_device_detach(netdev);
5946 if (netif_running(netdev))
5947 ixgbe_close_suspend(adapter);
5950 ixgbe_clear_interrupt_scheme(adapter);
5953 retval = pci_save_state(pdev);
5958 if (hw->mac.ops.stop_link_on_d3)
5959 hw->mac.ops.stop_link_on_d3(hw);
5962 ixgbe_set_rx_mode(netdev);
5964 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5965 if (hw->mac.ops.enable_tx_laser)
5966 hw->mac.ops.enable_tx_laser(hw);
5968 /* turn on all-multi mode if wake on multicast is enabled */
5969 if (wufc & IXGBE_WUFC_MC) {
5970 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5971 fctrl |= IXGBE_FCTRL_MPE;
5972 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5975 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5976 ctrl |= IXGBE_CTRL_GIO_DIS;
5977 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5979 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5981 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5982 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5985 switch (hw->mac.type) {
5986 case ixgbe_mac_82598EB:
5987 pci_wake_from_d3(pdev, false);
5989 case ixgbe_mac_82599EB:
5990 case ixgbe_mac_X540:
5991 case ixgbe_mac_X550:
5992 case ixgbe_mac_X550EM_x:
5993 pci_wake_from_d3(pdev, !!wufc);
5999 *enable_wake = !!wufc;
6000 if (hw->phy.ops.set_phy_power && !*enable_wake)
6001 hw->phy.ops.set_phy_power(hw, false);
6003 ixgbe_release_hw_control(adapter);
6005 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6006 pci_disable_device(pdev);
6012 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6017 retval = __ixgbe_shutdown(pdev, &wake);
6022 pci_prepare_to_sleep(pdev);
6024 pci_wake_from_d3(pdev, false);
6025 pci_set_power_state(pdev, PCI_D3hot);
6030 #endif /* CONFIG_PM */
6032 static void ixgbe_shutdown(struct pci_dev *pdev)
6036 __ixgbe_shutdown(pdev, &wake);
6038 if (system_state == SYSTEM_POWER_OFF) {
6039 pci_wake_from_d3(pdev, wake);
6040 pci_set_power_state(pdev, PCI_D3hot);
6045 * ixgbe_update_stats - Update the board statistics counters.
6046 * @adapter: board private structure
6048 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6050 struct net_device *netdev = adapter->netdev;
6051 struct ixgbe_hw *hw = &adapter->hw;
6052 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6054 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6055 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6056 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6057 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6059 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6060 test_bit(__IXGBE_RESETTING, &adapter->state))
6063 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6066 for (i = 0; i < adapter->num_rx_queues; i++) {
6067 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6068 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6070 adapter->rsc_total_count = rsc_count;
6071 adapter->rsc_total_flush = rsc_flush;
6074 for (i = 0; i < adapter->num_rx_queues; i++) {
6075 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6076 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6077 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6078 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6079 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6080 bytes += rx_ring->stats.bytes;
6081 packets += rx_ring->stats.packets;
6083 adapter->non_eop_descs = non_eop_descs;
6084 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6085 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6086 adapter->hw_csum_rx_error = hw_csum_rx_error;
6087 netdev->stats.rx_bytes = bytes;
6088 netdev->stats.rx_packets = packets;
6092 /* gather some stats to the adapter struct that are per queue */
6093 for (i = 0; i < adapter->num_tx_queues; i++) {
6094 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6095 restart_queue += tx_ring->tx_stats.restart_queue;
6096 tx_busy += tx_ring->tx_stats.tx_busy;
6097 bytes += tx_ring->stats.bytes;
6098 packets += tx_ring->stats.packets;
6100 adapter->restart_queue = restart_queue;
6101 adapter->tx_busy = tx_busy;
6102 netdev->stats.tx_bytes = bytes;
6103 netdev->stats.tx_packets = packets;
6105 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6107 /* 8 register reads */
6108 for (i = 0; i < 8; i++) {
6109 /* for packet buffers not used, the register should read 0 */
6110 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6112 hwstats->mpc[i] += mpc;
6113 total_mpc += hwstats->mpc[i];
6114 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6115 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6116 switch (hw->mac.type) {
6117 case ixgbe_mac_82598EB:
6118 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6119 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6120 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6121 hwstats->pxonrxc[i] +=
6122 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6124 case ixgbe_mac_82599EB:
6125 case ixgbe_mac_X540:
6126 case ixgbe_mac_X550:
6127 case ixgbe_mac_X550EM_x:
6128 hwstats->pxonrxc[i] +=
6129 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6136 /*16 register reads */
6137 for (i = 0; i < 16; i++) {
6138 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6139 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6140 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6141 (hw->mac.type == ixgbe_mac_X540) ||
6142 (hw->mac.type == ixgbe_mac_X550) ||
6143 (hw->mac.type == ixgbe_mac_X550EM_x)) {
6144 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6145 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6146 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6147 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6151 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6152 /* work around hardware counting issue */
6153 hwstats->gprc -= missed_rx;
6155 ixgbe_update_xoff_received(adapter);
6157 /* 82598 hardware only has a 32 bit counter in the high register */
6158 switch (hw->mac.type) {
6159 case ixgbe_mac_82598EB:
6160 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6161 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6162 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6163 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6165 case ixgbe_mac_X540:
6166 case ixgbe_mac_X550:
6167 case ixgbe_mac_X550EM_x:
6168 /* OS2BMC stats are X540 and later */
6169 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6170 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6171 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6172 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6173 case ixgbe_mac_82599EB:
6174 for (i = 0; i < 16; i++)
6175 adapter->hw_rx_no_dma_resources +=
6176 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6177 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6178 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6179 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6180 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6181 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6182 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6183 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6184 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6185 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6187 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6188 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6189 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6190 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6191 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6192 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6193 /* Add up per cpu counters for total ddp aloc fail */
6194 if (adapter->fcoe.ddp_pool) {
6195 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6196 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6198 u64 noddp = 0, noddp_ext_buff = 0;
6199 for_each_possible_cpu(cpu) {
6200 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6201 noddp += ddp_pool->noddp;
6202 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6204 hwstats->fcoe_noddp = noddp;
6205 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6207 #endif /* IXGBE_FCOE */
6212 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6213 hwstats->bprc += bprc;
6214 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6215 if (hw->mac.type == ixgbe_mac_82598EB)
6216 hwstats->mprc -= bprc;
6217 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6218 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6219 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6220 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6221 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6222 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6223 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6224 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6225 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6226 hwstats->lxontxc += lxon;
6227 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6228 hwstats->lxofftxc += lxoff;
6229 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6230 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6232 * 82598 errata - tx of flow control packets is included in tx counters
6234 xon_off_tot = lxon + lxoff;
6235 hwstats->gptc -= xon_off_tot;
6236 hwstats->mptc -= xon_off_tot;
6237 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6238 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6239 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6240 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6241 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6242 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6243 hwstats->ptc64 -= xon_off_tot;
6244 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6245 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6246 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6247 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6248 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6249 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6251 /* Fill out the OS statistics structure */
6252 netdev->stats.multicast = hwstats->mprc;
6255 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6256 netdev->stats.rx_dropped = 0;
6257 netdev->stats.rx_length_errors = hwstats->rlec;
6258 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6259 netdev->stats.rx_missed_errors = total_mpc;
6263 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6264 * @adapter: pointer to the device adapter structure
6266 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6268 struct ixgbe_hw *hw = &adapter->hw;
6271 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6274 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6276 /* if interface is down do nothing */
6277 if (test_bit(__IXGBE_DOWN, &adapter->state))
6280 /* do nothing if we are not using signature filters */
6281 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6284 adapter->fdir_overflow++;
6286 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6287 for (i = 0; i < adapter->num_tx_queues; i++)
6288 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6289 &(adapter->tx_ring[i]->state));
6290 /* re-enable flow director interrupts */
6291 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6293 e_err(probe, "failed to finish FDIR re-initialization, "
6294 "ignored adding FDIR ATR filters\n");
6299 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6300 * @adapter: pointer to the device adapter structure
6302 * This function serves two purposes. First it strobes the interrupt lines
6303 * in order to make certain interrupts are occurring. Secondly it sets the
6304 * bits needed to check for TX hangs. As a result we should immediately
6305 * determine if a hang has occurred.
6307 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6309 struct ixgbe_hw *hw = &adapter->hw;
6313 /* If we're down, removing or resetting, just bail */
6314 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6315 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6316 test_bit(__IXGBE_RESETTING, &adapter->state))
6319 /* Force detection of hung controller */
6320 if (netif_carrier_ok(adapter->netdev)) {
6321 for (i = 0; i < adapter->num_tx_queues; i++)
6322 set_check_for_tx_hang(adapter->tx_ring[i]);
6325 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6327 * for legacy and MSI interrupts don't set any bits
6328 * that are enabled for EIAM, because this operation
6329 * would set *both* EIMS and EICS for any bit in EIAM
6331 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6332 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6334 /* get one bit for every active tx/rx interrupt vector */
6335 for (i = 0; i < adapter->num_q_vectors; i++) {
6336 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6337 if (qv->rx.ring || qv->tx.ring)
6338 eics |= ((u64)1 << i);
6342 /* Cause software interrupt to ensure rings are cleaned */
6343 ixgbe_irq_rearm_queues(adapter, eics);
6347 * ixgbe_watchdog_update_link - update the link status
6348 * @adapter: pointer to the device adapter structure
6349 * @link_speed: pointer to a u32 to store the link_speed
6351 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6353 struct ixgbe_hw *hw = &adapter->hw;
6354 u32 link_speed = adapter->link_speed;
6355 bool link_up = adapter->link_up;
6356 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6358 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6361 if (hw->mac.ops.check_link) {
6362 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6364 /* always assume link is up, if no check link function */
6365 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6369 if (adapter->ixgbe_ieee_pfc)
6370 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6372 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6373 hw->mac.ops.fc_enable(hw);
6374 ixgbe_set_rx_drop_en(adapter);
6378 time_after(jiffies, (adapter->link_check_timeout +
6379 IXGBE_TRY_LINK_TIMEOUT))) {
6380 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6381 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6382 IXGBE_WRITE_FLUSH(hw);
6385 adapter->link_up = link_up;
6386 adapter->link_speed = link_speed;
6389 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6391 #ifdef CONFIG_IXGBE_DCB
6392 struct net_device *netdev = adapter->netdev;
6393 struct dcb_app app = {
6394 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6399 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6400 up = dcb_ieee_getapp_mask(netdev, &app);
6402 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6407 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6408 * print link up message
6409 * @adapter: pointer to the device adapter structure
6411 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6413 struct net_device *netdev = adapter->netdev;
6414 struct ixgbe_hw *hw = &adapter->hw;
6415 struct net_device *upper;
6416 struct list_head *iter;
6417 u32 link_speed = adapter->link_speed;
6418 const char *speed_str;
6419 bool flow_rx, flow_tx;
6421 /* only continue if link was previously down */
6422 if (netif_carrier_ok(netdev))
6425 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6427 switch (hw->mac.type) {
6428 case ixgbe_mac_82598EB: {
6429 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6430 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6431 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6432 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6435 case ixgbe_mac_X540:
6436 case ixgbe_mac_X550:
6437 case ixgbe_mac_X550EM_x:
6438 case ixgbe_mac_82599EB: {
6439 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6440 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6441 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6442 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6451 adapter->last_rx_ptp_check = jiffies;
6453 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6454 ixgbe_ptp_start_cyclecounter(adapter);
6456 switch (link_speed) {
6457 case IXGBE_LINK_SPEED_10GB_FULL:
6458 speed_str = "10 Gbps";
6460 case IXGBE_LINK_SPEED_2_5GB_FULL:
6461 speed_str = "2.5 Gbps";
6463 case IXGBE_LINK_SPEED_1GB_FULL:
6464 speed_str = "1 Gbps";
6466 case IXGBE_LINK_SPEED_100_FULL:
6467 speed_str = "100 Mbps";
6470 speed_str = "unknown speed";
6473 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6474 ((flow_rx && flow_tx) ? "RX/TX" :
6476 (flow_tx ? "TX" : "None"))));
6478 netif_carrier_on(netdev);
6479 ixgbe_check_vf_rate_limit(adapter);
6481 /* enable transmits */
6482 netif_tx_wake_all_queues(adapter->netdev);
6484 /* enable any upper devices */
6486 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6487 if (netif_is_macvlan(upper)) {
6488 struct macvlan_dev *vlan = netdev_priv(upper);
6491 netif_tx_wake_all_queues(upper);
6496 /* update the default user priority for VFs */
6497 ixgbe_update_default_up(adapter);
6499 /* ping all the active vfs to let them know link has changed */
6500 ixgbe_ping_all_vfs(adapter);
6504 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6505 * print link down message
6506 * @adapter: pointer to the adapter structure
6508 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6510 struct net_device *netdev = adapter->netdev;
6511 struct ixgbe_hw *hw = &adapter->hw;
6513 adapter->link_up = false;
6514 adapter->link_speed = 0;
6516 /* only continue if link was up previously */
6517 if (!netif_carrier_ok(netdev))
6520 /* poll for SFP+ cable when link is down */
6521 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6522 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6524 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6525 ixgbe_ptp_start_cyclecounter(adapter);
6527 e_info(drv, "NIC Link is Down\n");
6528 netif_carrier_off(netdev);
6530 /* ping all the active vfs to let them know link has changed */
6531 ixgbe_ping_all_vfs(adapter);
6534 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6538 for (i = 0; i < adapter->num_tx_queues; i++) {
6539 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6541 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6548 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6550 struct ixgbe_hw *hw = &adapter->hw;
6551 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6552 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6556 if (!adapter->num_vfs)
6559 /* resetting the PF is only needed for MAC before X550 */
6560 if (hw->mac.type >= ixgbe_mac_X550)
6563 for (i = 0; i < adapter->num_vfs; i++) {
6564 for (j = 0; j < q_per_pool; j++) {
6567 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6568 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6579 * ixgbe_watchdog_flush_tx - flush queues on link down
6580 * @adapter: pointer to the device adapter structure
6582 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6584 if (!netif_carrier_ok(adapter->netdev)) {
6585 if (ixgbe_ring_tx_pending(adapter) ||
6586 ixgbe_vf_tx_pending(adapter)) {
6587 /* We've lost link, so the controller stops DMA,
6588 * but we've got queued Tx work that's never going
6589 * to get done, so reset controller to flush Tx.
6590 * (Do the reset outside of interrupt context).
6592 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6593 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6598 #ifdef CONFIG_PCI_IOV
6599 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6600 struct pci_dev *vfdev)
6602 if (!pci_wait_for_pending_transaction(vfdev))
6603 e_dev_warn("Issuing VFLR with pending transactions\n");
6605 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6606 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6611 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6613 struct ixgbe_hw *hw = &adapter->hw;
6614 struct pci_dev *pdev = adapter->pdev;
6615 struct pci_dev *vfdev;
6618 unsigned short vf_id;
6620 if (!(netif_carrier_ok(adapter->netdev)))
6623 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6624 if (gpc) /* If incrementing then no need for the check below */
6626 /* Check to see if a bad DMA write target from an errant or
6627 * malicious VF has caused a PCIe error. If so then we can
6628 * issue a VFLR to the offending VF(s) and then resume without
6629 * requesting a full slot reset.
6635 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6639 /* get the device ID for the VF */
6640 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6642 /* check status reg for all VFs owned by this PF */
6643 vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6645 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6648 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6649 if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6651 ixgbe_issue_vf_flr(adapter, vfdev);
6654 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6658 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6662 /* Do not perform spoof check for 82598 or if not in IOV mode */
6663 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6664 adapter->num_vfs == 0)
6667 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6670 * ssvpc register is cleared on read, if zero then no
6671 * spoofed packets in the last interval.
6676 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6679 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6684 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6687 #endif /* CONFIG_PCI_IOV */
6691 * ixgbe_watchdog_subtask - check and bring link up
6692 * @adapter: pointer to the device adapter structure
6694 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6696 /* if interface is down, removing or resetting, do nothing */
6697 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6698 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6699 test_bit(__IXGBE_RESETTING, &adapter->state))
6702 ixgbe_watchdog_update_link(adapter);
6704 if (adapter->link_up)
6705 ixgbe_watchdog_link_is_up(adapter);
6707 ixgbe_watchdog_link_is_down(adapter);
6709 ixgbe_check_for_bad_vf(adapter);
6710 ixgbe_spoof_check(adapter);
6711 ixgbe_update_stats(adapter);
6713 ixgbe_watchdog_flush_tx(adapter);
6717 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6718 * @adapter: the ixgbe adapter structure
6720 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6722 struct ixgbe_hw *hw = &adapter->hw;
6725 /* not searching for SFP so there is nothing to do here */
6726 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6727 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6730 if (adapter->sfp_poll_time &&
6731 time_after(adapter->sfp_poll_time, jiffies))
6732 return; /* If not yet time to poll for SFP */
6734 /* someone else is in init, wait until next service event */
6735 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6738 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
6740 err = hw->phy.ops.identify_sfp(hw);
6741 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6744 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6745 /* If no cable is present, then we need to reset
6746 * the next time we find a good cable. */
6747 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6754 /* exit if reset not needed */
6755 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6758 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6761 * A module may be identified correctly, but the EEPROM may not have
6762 * support for that module. setup_sfp() will fail in that case, so
6763 * we should not allow that module to load.
6765 if (hw->mac.type == ixgbe_mac_82598EB)
6766 err = hw->phy.ops.reset(hw);
6768 err = hw->mac.ops.setup_sfp(hw);
6770 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6773 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6774 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6777 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6779 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6780 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6781 e_dev_err("failed to initialize because an unsupported "
6782 "SFP+ module type was detected.\n");
6783 e_dev_err("Reload the driver after installing a "
6784 "supported module.\n");
6785 unregister_netdev(adapter->netdev);
6790 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6791 * @adapter: the ixgbe adapter structure
6793 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6795 struct ixgbe_hw *hw = &adapter->hw;
6797 bool autoneg = false;
6799 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6802 /* someone else is in init, wait until next service event */
6803 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6806 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6808 speed = hw->phy.autoneg_advertised;
6809 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6810 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6812 /* setup the highest link when no autoneg */
6814 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6815 speed = IXGBE_LINK_SPEED_10GB_FULL;
6819 if (hw->mac.ops.setup_link)
6820 hw->mac.ops.setup_link(hw, speed, true);
6822 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6823 adapter->link_check_timeout = jiffies;
6824 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6828 * ixgbe_service_timer - Timer Call-back
6829 * @data: pointer to adapter cast into an unsigned long
6831 static void ixgbe_service_timer(unsigned long data)
6833 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6834 unsigned long next_event_offset;
6836 /* poll faster when waiting for link */
6837 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6838 next_event_offset = HZ / 10;
6840 next_event_offset = HZ * 2;
6842 /* Reset the timer */
6843 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6845 ixgbe_service_event_schedule(adapter);
6848 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6850 struct ixgbe_hw *hw = &adapter->hw;
6853 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6856 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6858 if (!hw->phy.ops.handle_lasi)
6861 status = hw->phy.ops.handle_lasi(&adapter->hw);
6862 if (status != IXGBE_ERR_OVERTEMP)
6865 e_crit(drv, "%s\n", ixgbe_overheat_msg);
6868 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6870 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6873 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6875 /* If we're already down, removing or resetting, just bail */
6876 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6877 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6878 test_bit(__IXGBE_RESETTING, &adapter->state))
6881 ixgbe_dump(adapter);
6882 netdev_err(adapter->netdev, "Reset adapter\n");
6883 adapter->tx_timeout_count++;
6886 ixgbe_reinit_locked(adapter);
6891 * ixgbe_service_task - manages and runs subtasks
6892 * @work: pointer to work_struct containing our data
6894 static void ixgbe_service_task(struct work_struct *work)
6896 struct ixgbe_adapter *adapter = container_of(work,
6897 struct ixgbe_adapter,
6899 if (ixgbe_removed(adapter->hw.hw_addr)) {
6900 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6902 ixgbe_down(adapter);
6905 ixgbe_service_event_complete(adapter);
6908 #ifdef CONFIG_IXGBE_VXLAN
6909 if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6910 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6911 vxlan_get_rx_port(adapter->netdev);
6913 #endif /* CONFIG_IXGBE_VXLAN */
6914 ixgbe_reset_subtask(adapter);
6915 ixgbe_phy_interrupt_subtask(adapter);
6916 ixgbe_sfp_detection_subtask(adapter);
6917 ixgbe_sfp_link_config_subtask(adapter);
6918 ixgbe_check_overtemp_subtask(adapter);
6919 ixgbe_watchdog_subtask(adapter);
6920 ixgbe_fdir_reinit_subtask(adapter);
6921 ixgbe_check_hang_subtask(adapter);
6923 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6924 ixgbe_ptp_overflow_check(adapter);
6925 ixgbe_ptp_rx_hang(adapter);
6928 ixgbe_service_event_complete(adapter);
6931 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6932 struct ixgbe_tx_buffer *first,
6935 struct sk_buff *skb = first->skb;
6936 u32 vlan_macip_lens, type_tucmd;
6937 u32 mss_l4len_idx, l4len;
6940 if (skb->ip_summed != CHECKSUM_PARTIAL)
6943 if (!skb_is_gso(skb))
6946 err = skb_cow_head(skb, 0);
6950 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6951 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6953 if (first->protocol == htons(ETH_P_IP)) {
6954 struct iphdr *iph = ip_hdr(skb);
6957 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6961 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6962 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6963 IXGBE_TX_FLAGS_CSUM |
6964 IXGBE_TX_FLAGS_IPV4;
6965 } else if (skb_is_gso_v6(skb)) {
6966 ipv6_hdr(skb)->payload_len = 0;
6967 tcp_hdr(skb)->check =
6968 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6969 &ipv6_hdr(skb)->daddr,
6971 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6972 IXGBE_TX_FLAGS_CSUM;
6975 /* compute header lengths */
6976 l4len = tcp_hdrlen(skb);
6977 *hdr_len = skb_transport_offset(skb) + l4len;
6979 /* update gso size and bytecount with header size */
6980 first->gso_segs = skb_shinfo(skb)->gso_segs;
6981 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6983 /* mss_l4len_id: use 0 as index for TSO */
6984 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6985 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6987 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6988 vlan_macip_lens = skb_network_header_len(skb);
6989 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6990 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6992 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6998 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6999 struct ixgbe_tx_buffer *first)
7001 struct sk_buff *skb = first->skb;
7002 u32 vlan_macip_lens = 0;
7003 u32 mss_l4len_idx = 0;
7006 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7007 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
7008 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
7010 vlan_macip_lens = skb_network_offset(skb) <<
7011 IXGBE_ADVTXD_MACLEN_SHIFT;
7016 struct ipv6hdr *ipv6;
7020 struct tcphdr *tcphdr;
7024 if (skb->encapsulation) {
7025 network_hdr.raw = skb_inner_network_header(skb);
7026 transport_hdr.raw = skb_inner_transport_header(skb);
7027 vlan_macip_lens = skb_inner_network_offset(skb) <<
7028 IXGBE_ADVTXD_MACLEN_SHIFT;
7030 network_hdr.raw = skb_network_header(skb);
7031 transport_hdr.raw = skb_transport_header(skb);
7032 vlan_macip_lens = skb_network_offset(skb) <<
7033 IXGBE_ADVTXD_MACLEN_SHIFT;
7036 /* use first 4 bits to determine IP version */
7037 switch (network_hdr.ipv4->version) {
7039 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7040 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7041 l4_hdr = network_hdr.ipv4->protocol;
7044 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7045 l4_hdr = network_hdr.ipv6->nexthdr;
7048 if (unlikely(net_ratelimit())) {
7049 dev_warn(tx_ring->dev,
7050 "partial checksum but version=%d\n",
7051 network_hdr.ipv4->version);
7057 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7058 mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7059 IXGBE_ADVTXD_L4LEN_SHIFT;
7062 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7063 mss_l4len_idx = sizeof(struct sctphdr) <<
7064 IXGBE_ADVTXD_L4LEN_SHIFT;
7067 mss_l4len_idx = sizeof(struct udphdr) <<
7068 IXGBE_ADVTXD_L4LEN_SHIFT;
7071 if (unlikely(net_ratelimit())) {
7072 dev_warn(tx_ring->dev,
7073 "partial checksum but l4 proto=%x!\n",
7079 /* update TX checksum flag */
7080 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7083 /* vlan_macip_lens: MACLEN, VLAN tag */
7084 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7086 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7087 type_tucmd, mss_l4len_idx);
7090 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7091 ((_flag <= _result) ? \
7092 ((u32)(_input & _flag) * (_result / _flag)) : \
7093 ((u32)(_input & _flag) / (_flag / _result)))
7095 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7097 /* set type for advanced descriptor with frame checksum insertion */
7098 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7099 IXGBE_ADVTXD_DCMD_DEXT |
7100 IXGBE_ADVTXD_DCMD_IFCS;
7102 /* set HW vlan bit if vlan is present */
7103 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7104 IXGBE_ADVTXD_DCMD_VLE);
7106 /* set segmentation enable bits for TSO/FSO */
7107 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7108 IXGBE_ADVTXD_DCMD_TSE);
7110 /* set timestamp bit if present */
7111 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7112 IXGBE_ADVTXD_MAC_TSTAMP);
7114 /* insert frame checksum */
7115 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7120 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7121 u32 tx_flags, unsigned int paylen)
7123 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7125 /* enable L4 checksum for TSO and TX checksum offload */
7126 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7127 IXGBE_TX_FLAGS_CSUM,
7128 IXGBE_ADVTXD_POPTS_TXSM);
7130 /* enble IPv4 checksum for TSO */
7131 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7132 IXGBE_TX_FLAGS_IPV4,
7133 IXGBE_ADVTXD_POPTS_IXSM);
7136 * Check Context must be set if Tx switch is enabled, which it
7137 * always is for case where virtual functions are running
7139 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7143 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7146 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7148 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7150 /* Herbert's original patch had:
7151 * smp_mb__after_netif_stop_queue();
7152 * but since that doesn't exist yet, just open code it.
7156 /* We need to check again in a case another CPU has just
7157 * made room available.
7159 if (likely(ixgbe_desc_unused(tx_ring) < size))
7162 /* A reprieve! - use start_queue because it doesn't call schedule */
7163 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7164 ++tx_ring->tx_stats.restart_queue;
7168 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7170 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7173 return __ixgbe_maybe_stop_tx(tx_ring, size);
7176 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7179 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7180 struct ixgbe_tx_buffer *first,
7183 struct sk_buff *skb = first->skb;
7184 struct ixgbe_tx_buffer *tx_buffer;
7185 union ixgbe_adv_tx_desc *tx_desc;
7186 struct skb_frag_struct *frag;
7188 unsigned int data_len, size;
7189 u32 tx_flags = first->tx_flags;
7190 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7191 u16 i = tx_ring->next_to_use;
7193 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7195 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7197 size = skb_headlen(skb);
7198 data_len = skb->data_len;
7201 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7202 if (data_len < sizeof(struct fcoe_crc_eof)) {
7203 size -= sizeof(struct fcoe_crc_eof) - data_len;
7206 data_len -= sizeof(struct fcoe_crc_eof);
7211 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7215 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7216 if (dma_mapping_error(tx_ring->dev, dma))
7219 /* record length, and DMA address */
7220 dma_unmap_len_set(tx_buffer, len, size);
7221 dma_unmap_addr_set(tx_buffer, dma, dma);
7223 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7225 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7226 tx_desc->read.cmd_type_len =
7227 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7231 if (i == tx_ring->count) {
7232 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7235 tx_desc->read.olinfo_status = 0;
7237 dma += IXGBE_MAX_DATA_PER_TXD;
7238 size -= IXGBE_MAX_DATA_PER_TXD;
7240 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7243 if (likely(!data_len))
7246 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7250 if (i == tx_ring->count) {
7251 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7254 tx_desc->read.olinfo_status = 0;
7257 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7259 size = skb_frag_size(frag);
7263 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7266 tx_buffer = &tx_ring->tx_buffer_info[i];
7269 /* write last descriptor with RS and EOP bits */
7270 cmd_type |= size | IXGBE_TXD_CMD;
7271 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7273 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7275 /* set the timestamp */
7276 first->time_stamp = jiffies;
7279 * Force memory writes to complete before letting h/w know there
7280 * are new descriptors to fetch. (Only applicable for weak-ordered
7281 * memory model archs, such as IA-64).
7283 * We also need this memory barrier to make certain all of the
7284 * status bits have been updated before next_to_watch is written.
7288 /* set next_to_watch value indicating a packet is present */
7289 first->next_to_watch = tx_desc;
7292 if (i == tx_ring->count)
7295 tx_ring->next_to_use = i;
7297 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7299 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7300 writel(i, tx_ring->tail);
7302 /* we need this if more than one processor can write to our tail
7303 * at a time, it synchronizes IO on IA64/Altix systems
7310 dev_err(tx_ring->dev, "TX DMA map failed\n");
7312 /* clear dma mappings for failed tx_buffer_info map */
7314 tx_buffer = &tx_ring->tx_buffer_info[i];
7315 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7316 if (tx_buffer == first)
7323 tx_ring->next_to_use = i;
7326 static void ixgbe_atr(struct ixgbe_ring *ring,
7327 struct ixgbe_tx_buffer *first)
7329 struct ixgbe_q_vector *q_vector = ring->q_vector;
7330 union ixgbe_atr_hash_dword input = { .dword = 0 };
7331 union ixgbe_atr_hash_dword common = { .dword = 0 };
7333 unsigned char *network;
7335 struct ipv6hdr *ipv6;
7338 struct sk_buff *skb;
7339 #ifdef CONFIG_IXGBE_VXLAN
7341 #endif /* CONFIG_IXGBE_VXLAN */
7344 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7348 /* do nothing if sampling is disabled */
7349 if (!ring->atr_sample_rate)
7354 /* snag network header to get L4 type and address */
7356 hdr.network = skb_network_header(skb);
7357 if (skb->encapsulation) {
7358 #ifdef CONFIG_IXGBE_VXLAN
7359 struct ixgbe_adapter *adapter = q_vector->adapter;
7361 if (!adapter->vxlan_port)
7363 if (first->protocol != htons(ETH_P_IP) ||
7364 hdr.ipv4->version != IPVERSION ||
7365 hdr.ipv4->protocol != IPPROTO_UDP) {
7368 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7371 hdr.network = skb_inner_network_header(skb);
7372 th = inner_tcp_hdr(skb);
7375 #endif /* CONFIG_IXGBE_VXLAN */
7377 /* Currently only IPv4/IPv6 with TCP is supported */
7378 if ((first->protocol != htons(ETH_P_IPV6) ||
7379 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7380 (first->protocol != htons(ETH_P_IP) ||
7381 hdr.ipv4->protocol != IPPROTO_TCP))
7386 /* skip this packet since it is invalid or the socket is closing */
7390 /* sample on all syn packets or once every atr sample count */
7391 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7394 /* reset sample count */
7395 ring->atr_count = 0;
7397 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7400 * src and dst are inverted, think how the receiver sees them
7402 * The input is broken into two sections, a non-compressed section
7403 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7404 * is XORed together and stored in the compressed dword.
7406 input.formatted.vlan_id = vlan_id;
7409 * since src port and flex bytes occupy the same word XOR them together
7410 * and write the value to source port portion of compressed dword
7412 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7413 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7415 common.port.src ^= th->dest ^ first->protocol;
7416 common.port.dst ^= th->source;
7418 if (first->protocol == htons(ETH_P_IP)) {
7419 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7420 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7422 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7423 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7424 hdr.ipv6->saddr.s6_addr32[1] ^
7425 hdr.ipv6->saddr.s6_addr32[2] ^
7426 hdr.ipv6->saddr.s6_addr32[3] ^
7427 hdr.ipv6->daddr.s6_addr32[0] ^
7428 hdr.ipv6->daddr.s6_addr32[1] ^
7429 hdr.ipv6->daddr.s6_addr32[2] ^
7430 hdr.ipv6->daddr.s6_addr32[3];
7433 #ifdef CONFIG_IXGBE_VXLAN
7435 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7436 #endif /* CONFIG_IXGBE_VXLAN */
7438 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7439 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7440 input, common, ring->queue_index);
7443 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7444 void *accel_priv, select_queue_fallback_t fallback)
7446 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7448 struct ixgbe_adapter *adapter;
7449 struct ixgbe_ring_feature *f;
7454 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7459 * only execute the code below if protocol is FCoE
7460 * or FIP and we have FCoE enabled on the adapter
7462 switch (vlan_get_protocol(skb)) {
7463 case htons(ETH_P_FCOE):
7464 case htons(ETH_P_FIP):
7465 adapter = netdev_priv(dev);
7467 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7470 return fallback(dev, skb);
7473 f = &adapter->ring_feature[RING_F_FCOE];
7475 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7478 while (txq >= f->indices)
7481 return txq + f->offset;
7483 return fallback(dev, skb);
7487 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7488 struct ixgbe_adapter *adapter,
7489 struct ixgbe_ring *tx_ring)
7491 struct ixgbe_tx_buffer *first;
7495 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7496 __be16 protocol = skb->protocol;
7500 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7501 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7502 * + 2 desc gap to keep tail from touching head,
7503 * + 1 desc for context descriptor,
7504 * otherwise try next time
7506 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7507 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7509 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7510 tx_ring->tx_stats.tx_busy++;
7511 return NETDEV_TX_BUSY;
7514 /* record the location of the first descriptor for this packet */
7515 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7517 first->bytecount = skb->len;
7518 first->gso_segs = 1;
7520 /* if we have a HW VLAN tag being added default to the HW one */
7521 if (skb_vlan_tag_present(skb)) {
7522 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7523 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7524 /* else if it is a SW VLAN check the next protocol and store the tag */
7525 } else if (protocol == htons(ETH_P_8021Q)) {
7526 struct vlan_hdr *vhdr, _vhdr;
7527 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7531 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7532 IXGBE_TX_FLAGS_VLAN_SHIFT;
7533 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7535 protocol = vlan_get_protocol(skb);
7537 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7538 adapter->ptp_clock &&
7539 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7541 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7542 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7544 /* schedule check for Tx timestamp */
7545 adapter->ptp_tx_skb = skb_get(skb);
7546 adapter->ptp_tx_start = jiffies;
7547 schedule_work(&adapter->ptp_tx_work);
7550 skb_tx_timestamp(skb);
7552 #ifdef CONFIG_PCI_IOV
7554 * Use the l2switch_enable flag - would be false if the DMA
7555 * Tx switch had been disabled.
7557 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7558 tx_flags |= IXGBE_TX_FLAGS_CC;
7561 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7562 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7563 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7564 (skb->priority != TC_PRIO_CONTROL))) {
7565 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7566 tx_flags |= (skb->priority & 0x7) <<
7567 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7568 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7569 struct vlan_ethhdr *vhdr;
7571 if (skb_cow_head(skb, 0))
7573 vhdr = (struct vlan_ethhdr *)skb->data;
7574 vhdr->h_vlan_TCI = htons(tx_flags >>
7575 IXGBE_TX_FLAGS_VLAN_SHIFT);
7577 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7581 /* record initial flags and protocol */
7582 first->tx_flags = tx_flags;
7583 first->protocol = protocol;
7586 /* setup tx offload for FCoE */
7587 if ((protocol == htons(ETH_P_FCOE)) &&
7588 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7589 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7596 #endif /* IXGBE_FCOE */
7597 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7601 ixgbe_tx_csum(tx_ring, first);
7603 /* add the ATR filter if ATR is on */
7604 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7605 ixgbe_atr(tx_ring, first);
7609 #endif /* IXGBE_FCOE */
7610 ixgbe_tx_map(tx_ring, first, hdr_len);
7612 return NETDEV_TX_OK;
7615 dev_kfree_skb_any(first->skb);
7618 return NETDEV_TX_OK;
7621 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7622 struct net_device *netdev,
7623 struct ixgbe_ring *ring)
7625 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7626 struct ixgbe_ring *tx_ring;
7629 * The minimum packet size for olinfo paylen is 17 so pad the skb
7630 * in order to meet this minimum size requirement.
7632 if (skb_put_padto(skb, 17))
7633 return NETDEV_TX_OK;
7635 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7637 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7640 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7641 struct net_device *netdev)
7643 return __ixgbe_xmit_frame(skb, netdev, NULL);
7647 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7648 * @netdev: network interface device structure
7649 * @p: pointer to an address structure
7651 * Returns 0 on success, negative on failure
7653 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7655 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7656 struct ixgbe_hw *hw = &adapter->hw;
7657 struct sockaddr *addr = p;
7660 if (!is_valid_ether_addr(addr->sa_data))
7661 return -EADDRNOTAVAIL;
7663 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7664 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7665 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7667 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7668 return ret > 0 ? 0 : ret;
7672 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7674 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7675 struct ixgbe_hw *hw = &adapter->hw;
7679 if (prtad != hw->phy.mdio.prtad)
7681 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7687 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7688 u16 addr, u16 value)
7690 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7691 struct ixgbe_hw *hw = &adapter->hw;
7693 if (prtad != hw->phy.mdio.prtad)
7695 return hw->phy.ops.write_reg(hw, addr, devad, value);
7698 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7700 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7704 return ixgbe_ptp_set_ts_config(adapter, req);
7706 return ixgbe_ptp_get_ts_config(adapter, req);
7708 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7713 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7715 * @netdev: network interface device structure
7717 * Returns non-zero on failure
7719 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7722 struct ixgbe_adapter *adapter = netdev_priv(dev);
7723 struct ixgbe_hw *hw = &adapter->hw;
7725 if (is_valid_ether_addr(hw->mac.san_addr)) {
7727 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7730 /* update SAN MAC vmdq pool selection */
7731 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7737 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7739 * @netdev: network interface device structure
7741 * Returns non-zero on failure
7743 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7746 struct ixgbe_adapter *adapter = netdev_priv(dev);
7747 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7749 if (is_valid_ether_addr(mac->san_addr)) {
7751 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7757 #ifdef CONFIG_NET_POLL_CONTROLLER
7759 * Polling 'interrupt' - used by things like netconsole to send skbs
7760 * without having to re-enable interrupts. It's not called while
7761 * the interrupt routine is executing.
7763 static void ixgbe_netpoll(struct net_device *netdev)
7765 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7768 /* if interface is down do nothing */
7769 if (test_bit(__IXGBE_DOWN, &adapter->state))
7772 /* loop through and schedule all active queues */
7773 for (i = 0; i < adapter->num_q_vectors; i++)
7774 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7778 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7779 struct rtnl_link_stats64 *stats)
7781 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7785 for (i = 0; i < adapter->num_rx_queues; i++) {
7786 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7792 start = u64_stats_fetch_begin_irq(&ring->syncp);
7793 packets = ring->stats.packets;
7794 bytes = ring->stats.bytes;
7795 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7796 stats->rx_packets += packets;
7797 stats->rx_bytes += bytes;
7801 for (i = 0; i < adapter->num_tx_queues; i++) {
7802 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7808 start = u64_stats_fetch_begin_irq(&ring->syncp);
7809 packets = ring->stats.packets;
7810 bytes = ring->stats.bytes;
7811 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7812 stats->tx_packets += packets;
7813 stats->tx_bytes += bytes;
7817 /* following stats updated by ixgbe_watchdog_task() */
7818 stats->multicast = netdev->stats.multicast;
7819 stats->rx_errors = netdev->stats.rx_errors;
7820 stats->rx_length_errors = netdev->stats.rx_length_errors;
7821 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7822 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7826 #ifdef CONFIG_IXGBE_DCB
7828 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7829 * @adapter: pointer to ixgbe_adapter
7830 * @tc: number of traffic classes currently enabled
7832 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7833 * 802.1Q priority maps to a packet buffer that exists.
7835 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7837 struct ixgbe_hw *hw = &adapter->hw;
7841 /* 82598 have a static priority to TC mapping that can not
7842 * be changed so no validation is needed.
7844 if (hw->mac.type == ixgbe_mac_82598EB)
7847 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7850 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7851 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7853 /* If up2tc is out of bounds default to zero */
7855 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7859 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7865 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7866 * @adapter: Pointer to adapter struct
7868 * Populate the netdev user priority to tc map
7870 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7872 struct net_device *dev = adapter->netdev;
7873 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7874 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7877 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7880 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7881 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7883 tc = ets->prio_tc[prio];
7885 netdev_set_prio_tc_map(dev, prio, tc);
7889 #endif /* CONFIG_IXGBE_DCB */
7891 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7893 * @netdev: net device to configure
7894 * @tc: number of traffic classes to enable
7896 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7898 struct ixgbe_adapter *adapter = netdev_priv(dev);
7899 struct ixgbe_hw *hw = &adapter->hw;
7902 /* Hardware supports up to 8 traffic classes */
7903 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7906 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7909 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7910 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7913 /* Hardware has to reinitialize queues and interrupts to
7914 * match packet buffer alignment. Unfortunately, the
7915 * hardware is not flexible enough to do this dynamically.
7917 if (netif_running(dev))
7919 ixgbe_clear_interrupt_scheme(adapter);
7921 #ifdef CONFIG_IXGBE_DCB
7923 netdev_set_num_tc(dev, tc);
7924 ixgbe_set_prio_tc_map(adapter);
7926 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7928 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7929 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7930 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7933 netdev_reset_tc(dev);
7935 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7936 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7938 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7940 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7941 adapter->dcb_cfg.pfc_mode_enable = false;
7944 ixgbe_validate_rtr(adapter, tc);
7946 #endif /* CONFIG_IXGBE_DCB */
7947 ixgbe_init_interrupt_scheme(adapter);
7949 if (netif_running(dev))
7950 return ixgbe_open(dev);
7955 #ifdef CONFIG_PCI_IOV
7956 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7958 struct net_device *netdev = adapter->netdev;
7961 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7966 void ixgbe_do_reset(struct net_device *netdev)
7968 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7970 if (netif_running(netdev))
7971 ixgbe_reinit_locked(adapter);
7973 ixgbe_reset(adapter);
7976 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7977 netdev_features_t features)
7979 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7981 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7982 if (!(features & NETIF_F_RXCSUM))
7983 features &= ~NETIF_F_LRO;
7985 /* Turn off LRO if not RSC capable */
7986 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7987 features &= ~NETIF_F_LRO;
7992 static int ixgbe_set_features(struct net_device *netdev,
7993 netdev_features_t features)
7995 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7996 netdev_features_t changed = netdev->features ^ features;
7997 bool need_reset = false;
7999 /* Make sure RSC matches LRO, reset if change */
8000 if (!(features & NETIF_F_LRO)) {
8001 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8003 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8004 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8005 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8006 if (adapter->rx_itr_setting == 1 ||
8007 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8008 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8010 } else if ((changed ^ features) & NETIF_F_LRO) {
8011 e_info(probe, "rx-usecs set too low, "
8017 * Check if Flow Director n-tuple support was enabled or disabled. If
8018 * the state changed, we need to reset.
8020 switch (features & NETIF_F_NTUPLE) {
8021 case NETIF_F_NTUPLE:
8022 /* turn off ATR, enable perfect filters and reset */
8023 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8026 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8027 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8030 /* turn off perfect filters, enable ATR and reset */
8031 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8034 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8036 /* We cannot enable ATR if SR-IOV is enabled */
8037 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8040 /* We cannot enable ATR if we have 2 or more traffic classes */
8041 if (netdev_get_num_tc(netdev) > 1)
8044 /* We cannot enable ATR if RSS is disabled */
8045 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8048 /* A sample rate of 0 indicates ATR disabled */
8049 if (!adapter->atr_sample_rate)
8052 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8056 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8057 ixgbe_vlan_strip_enable(adapter);
8059 ixgbe_vlan_strip_disable(adapter);
8061 if (changed & NETIF_F_RXALL)
8064 netdev->features = features;
8066 #ifdef CONFIG_IXGBE_VXLAN
8067 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8068 if (features & NETIF_F_RXCSUM)
8069 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8071 ixgbe_clear_vxlan_port(adapter);
8073 #endif /* CONFIG_IXGBE_VXLAN */
8076 ixgbe_do_reset(netdev);
8081 #ifdef CONFIG_IXGBE_VXLAN
8083 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8084 * @dev: The port's netdev
8085 * @sa_family: Socket Family that VXLAN is notifiying us about
8086 * @port: New UDP port number that VXLAN started listening to
8088 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8091 struct ixgbe_adapter *adapter = netdev_priv(dev);
8092 struct ixgbe_hw *hw = &adapter->hw;
8093 u16 new_port = ntohs(port);
8095 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8098 if (sa_family == AF_INET6)
8101 if (adapter->vxlan_port == new_port)
8104 if (adapter->vxlan_port) {
8106 "Hit Max num of VXLAN ports, not adding port %d\n",
8111 adapter->vxlan_port = new_port;
8112 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8116 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8117 * @dev: The port's netdev
8118 * @sa_family: Socket Family that VXLAN is notifying us about
8119 * @port: UDP port number that VXLAN stopped listening to
8121 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8124 struct ixgbe_adapter *adapter = netdev_priv(dev);
8125 u16 new_port = ntohs(port);
8127 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8130 if (sa_family == AF_INET6)
8133 if (adapter->vxlan_port != new_port) {
8134 netdev_info(dev, "Port %d was not found, not deleting\n",
8139 ixgbe_clear_vxlan_port(adapter);
8140 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8142 #endif /* CONFIG_IXGBE_VXLAN */
8144 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8145 struct net_device *dev,
8146 const unsigned char *addr, u16 vid,
8149 /* guarantee we can provide a unique filter for the unicast address */
8150 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8151 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8155 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8159 * ixgbe_configure_bridge_mode - set various bridge modes
8160 * @adapter - the private structure
8161 * @mode - requested bridge mode
8163 * Configure some settings require for various bridge modes.
8165 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8168 struct ixgbe_hw *hw = &adapter->hw;
8169 unsigned int p, num_pools;
8173 case BRIDGE_MODE_VEPA:
8174 /* disable Tx loopback, rely on switch hairpin mode */
8175 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8177 /* must enable Rx switching replication to allow multicast
8178 * packet reception on all VFs, and to enable source address
8181 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8182 vmdctl |= IXGBE_VT_CTL_REPLEN;
8183 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8185 /* enable Rx source address pruning. Note, this requires
8186 * replication to be enabled or else it does nothing.
8188 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8189 for (p = 0; p < num_pools; p++) {
8190 if (hw->mac.ops.set_source_address_pruning)
8191 hw->mac.ops.set_source_address_pruning(hw,
8196 case BRIDGE_MODE_VEB:
8197 /* enable Tx loopback for internal VF/PF communication */
8198 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8199 IXGBE_PFDTXGSWC_VT_LBEN);
8201 /* disable Rx switching replication unless we have SR-IOV
8204 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8205 if (!adapter->num_vfs)
8206 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8207 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8209 /* disable Rx source address pruning, since we don't expect to
8210 * be receiving external loopback of our transmitted frames.
8212 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8213 for (p = 0; p < num_pools; p++) {
8214 if (hw->mac.ops.set_source_address_pruning)
8215 hw->mac.ops.set_source_address_pruning(hw,
8224 adapter->bridge_mode = mode;
8226 e_info(drv, "enabling bridge mode: %s\n",
8227 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8232 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8233 struct nlmsghdr *nlh, u16 flags)
8235 struct ixgbe_adapter *adapter = netdev_priv(dev);
8236 struct nlattr *attr, *br_spec;
8239 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8242 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8246 nla_for_each_nested(attr, br_spec, rem) {
8250 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8253 if (nla_len(attr) < sizeof(mode))
8256 mode = nla_get_u16(attr);
8257 status = ixgbe_configure_bridge_mode(adapter, mode);
8267 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8268 struct net_device *dev,
8269 u32 filter_mask, int nlflags)
8271 struct ixgbe_adapter *adapter = netdev_priv(dev);
8273 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8276 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8277 adapter->bridge_mode, 0, 0, nlflags,
8281 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8283 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8284 struct ixgbe_adapter *adapter = netdev_priv(pdev);
8285 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8289 /* Hardware has a limited number of available pools. Each VF, and the
8290 * PF require a pool. Check to ensure we don't attempt to use more
8291 * then the available number of pools.
8293 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8294 return ERR_PTR(-EINVAL);
8297 if (vdev->num_rx_queues != vdev->num_tx_queues) {
8298 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8300 return ERR_PTR(-EINVAL);
8303 /* Check for hardware restriction on number of rx/tx queues */
8304 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8305 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8307 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8309 return ERR_PTR(-EINVAL);
8312 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8313 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8314 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8315 return ERR_PTR(-EBUSY);
8317 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8319 return ERR_PTR(-ENOMEM);
8321 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8322 adapter->num_rx_pools++;
8323 set_bit(pool, &adapter->fwd_bitmask);
8324 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8326 /* Enable VMDq flag so device will be set in VM mode */
8327 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8328 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8329 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8331 /* Force reinit of ring allocation with VMDQ enabled */
8332 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8335 fwd_adapter->pool = pool;
8336 fwd_adapter->real_adapter = adapter;
8337 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8340 netif_tx_start_all_queues(vdev);
8343 /* unwind counter and free adapter struct */
8345 "%s: dfwd hardware acceleration failed\n", vdev->name);
8346 clear_bit(pool, &adapter->fwd_bitmask);
8347 adapter->num_rx_pools--;
8349 return ERR_PTR(err);
8352 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8354 struct ixgbe_fwd_adapter *fwd_adapter = priv;
8355 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8358 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8359 adapter->num_rx_pools--;
8361 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8362 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8363 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8364 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8365 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8366 fwd_adapter->pool, adapter->num_rx_pools,
8367 fwd_adapter->rx_base_queue,
8368 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8369 adapter->fwd_bitmask);
8373 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8374 static netdev_features_t
8375 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8376 netdev_features_t features)
8378 if (!skb->encapsulation)
8381 if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8382 IXGBE_MAX_TUNNEL_HDR_LEN))
8383 return features & ~NETIF_F_ALL_CSUM;
8388 static const struct net_device_ops ixgbe_netdev_ops = {
8389 .ndo_open = ixgbe_open,
8390 .ndo_stop = ixgbe_close,
8391 .ndo_start_xmit = ixgbe_xmit_frame,
8392 .ndo_select_queue = ixgbe_select_queue,
8393 .ndo_set_rx_mode = ixgbe_set_rx_mode,
8394 .ndo_validate_addr = eth_validate_addr,
8395 .ndo_set_mac_address = ixgbe_set_mac,
8396 .ndo_change_mtu = ixgbe_change_mtu,
8397 .ndo_tx_timeout = ixgbe_tx_timeout,
8398 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
8399 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
8400 .ndo_do_ioctl = ixgbe_ioctl,
8401 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
8402 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
8403 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
8404 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
8405 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8406 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
8407 .ndo_get_stats64 = ixgbe_get_stats64,
8408 #ifdef CONFIG_IXGBE_DCB
8409 .ndo_setup_tc = ixgbe_setup_tc,
8411 #ifdef CONFIG_NET_POLL_CONTROLLER
8412 .ndo_poll_controller = ixgbe_netpoll,
8414 #ifdef CONFIG_NET_RX_BUSY_POLL
8415 .ndo_busy_poll = ixgbe_low_latency_recv,
8418 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8419 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8420 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8421 .ndo_fcoe_enable = ixgbe_fcoe_enable,
8422 .ndo_fcoe_disable = ixgbe_fcoe_disable,
8423 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8424 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8425 #endif /* IXGBE_FCOE */
8426 .ndo_set_features = ixgbe_set_features,
8427 .ndo_fix_features = ixgbe_fix_features,
8428 .ndo_fdb_add = ixgbe_ndo_fdb_add,
8429 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
8430 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
8431 .ndo_dfwd_add_station = ixgbe_fwd_add,
8432 .ndo_dfwd_del_station = ixgbe_fwd_del,
8433 #ifdef CONFIG_IXGBE_VXLAN
8434 .ndo_add_vxlan_port = ixgbe_add_vxlan_port,
8435 .ndo_del_vxlan_port = ixgbe_del_vxlan_port,
8436 #endif /* CONFIG_IXGBE_VXLAN */
8437 .ndo_features_check = ixgbe_features_check,
8441 * ixgbe_enumerate_functions - Get the number of ports this device has
8442 * @adapter: adapter structure
8444 * This function enumerates the phsyical functions co-located on a single slot,
8445 * in order to determine how many ports a device has. This is most useful in
8446 * determining the required GT/s of PCIe bandwidth necessary for optimal
8449 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8451 struct pci_dev *entry, *pdev = adapter->pdev;
8454 /* Some cards can not use the generic count PCIe functions method,
8455 * because they are behind a parent switch, so we hardcode these with
8456 * the correct number of functions.
8458 if (ixgbe_pcie_from_parent(&adapter->hw))
8461 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8462 /* don't count virtual functions */
8463 if (entry->is_virtfn)
8466 /* When the devices on the bus don't all match our device ID,
8467 * we can't reliably determine the correct number of
8468 * functions. This can occur if a function has been direct
8469 * attached to a virtual machine using VT-d, for example. In
8470 * this case, simply return -1 to indicate this.
8472 if ((entry->vendor != pdev->vendor) ||
8473 (entry->device != pdev->device))
8483 * ixgbe_wol_supported - Check whether device supports WoL
8484 * @hw: hw specific details
8485 * @device_id: the device ID
8486 * @subdev_id: the subsystem device ID
8488 * This function is used by probe and ethtool to determine
8489 * which devices have WoL support
8492 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8495 struct ixgbe_hw *hw = &adapter->hw;
8496 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8497 int is_wol_supported = 0;
8499 switch (device_id) {
8500 case IXGBE_DEV_ID_82599_SFP:
8501 /* Only these subdevices could supports WOL */
8502 switch (subdevice_id) {
8503 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8504 case IXGBE_SUBDEV_ID_82599_560FLR:
8505 /* only support first port */
8506 if (hw->bus.func != 0)
8508 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8509 case IXGBE_SUBDEV_ID_82599_SFP:
8510 case IXGBE_SUBDEV_ID_82599_RNDC:
8511 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8512 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8513 is_wol_supported = 1;
8517 case IXGBE_DEV_ID_82599EN_SFP:
8518 /* Only this subdevice supports WOL */
8519 switch (subdevice_id) {
8520 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8521 is_wol_supported = 1;
8525 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8526 /* All except this subdevice support WOL */
8527 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8528 is_wol_supported = 1;
8530 case IXGBE_DEV_ID_82599_KX4:
8531 is_wol_supported = 1;
8533 case IXGBE_DEV_ID_X540T:
8534 case IXGBE_DEV_ID_X540T1:
8535 case IXGBE_DEV_ID_X550T:
8536 case IXGBE_DEV_ID_X550EM_X_KX4:
8537 case IXGBE_DEV_ID_X550EM_X_KR:
8538 case IXGBE_DEV_ID_X550EM_X_10G_T:
8539 /* check eeprom to see if enabled wol */
8540 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8541 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8542 (hw->bus.func == 0))) {
8543 is_wol_supported = 1;
8548 return is_wol_supported;
8552 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8553 * @adapter: Pointer to adapter struct
8555 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8558 struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8559 struct ixgbe_hw *hw = &adapter->hw;
8560 const unsigned char *addr;
8562 addr = of_get_mac_address(dp);
8564 ether_addr_copy(hw->mac.perm_addr, addr);
8567 #endif /* CONFIG_OF */
8570 ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8571 #endif /* CONFIG_SPARC */
8575 * ixgbe_probe - Device Initialization Routine
8576 * @pdev: PCI device information struct
8577 * @ent: entry in ixgbe_pci_tbl
8579 * Returns 0 on success, negative on failure
8581 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8582 * The OS initialization, configuring of the adapter private structure,
8583 * and a hardware reset occur.
8585 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8587 struct net_device *netdev;
8588 struct ixgbe_adapter *adapter = NULL;
8589 struct ixgbe_hw *hw;
8590 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8591 int i, err, pci_using_dac, expected_gts;
8592 unsigned int indices = MAX_TX_QUEUES;
8593 u8 part_str[IXGBE_PBANUM_LENGTH];
8594 bool disable_dev = false;
8600 /* Catch broken hardware that put the wrong VF device ID in
8601 * the PCIe SR-IOV capability.
8603 if (pdev->is_virtfn) {
8604 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8605 pci_name(pdev), pdev->vendor, pdev->device);
8609 err = pci_enable_device_mem(pdev);
8613 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8616 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8619 "No usable DMA configuration, aborting\n");
8625 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8626 IORESOURCE_MEM), ixgbe_driver_name);
8629 "pci_request_selected_regions failed 0x%x\n", err);
8633 pci_enable_pcie_error_reporting(pdev);
8635 pci_set_master(pdev);
8636 pci_save_state(pdev);
8638 if (ii->mac == ixgbe_mac_82598EB) {
8639 #ifdef CONFIG_IXGBE_DCB
8640 /* 8 TC w/ 4 queues per TC */
8641 indices = 4 * MAX_TRAFFIC_CLASS;
8643 indices = IXGBE_MAX_RSS_INDICES;
8647 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8650 goto err_alloc_etherdev;
8653 SET_NETDEV_DEV(netdev, &pdev->dev);
8655 adapter = netdev_priv(netdev);
8657 adapter->netdev = netdev;
8658 adapter->pdev = pdev;
8661 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8663 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8664 pci_resource_len(pdev, 0));
8665 adapter->io_addr = hw->hw_addr;
8671 netdev->netdev_ops = &ixgbe_netdev_ops;
8672 ixgbe_set_ethtool_ops(netdev);
8673 netdev->watchdog_timeo = 5 * HZ;
8674 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8677 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8678 hw->mac.type = ii->mac;
8679 hw->mvals = ii->mvals;
8682 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8683 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8684 if (ixgbe_removed(hw->hw_addr)) {
8688 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8689 if (!(eec & (1 << 8)))
8690 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8693 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8694 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8695 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8696 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8697 hw->phy.mdio.mmds = 0;
8698 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8699 hw->phy.mdio.dev = netdev;
8700 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8701 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8703 ii->get_invariants(hw);
8705 /* setup the private structure */
8706 err = ixgbe_sw_init(adapter);
8710 /* Make it possible the adapter to be woken up via WOL */
8711 switch (adapter->hw.mac.type) {
8712 case ixgbe_mac_82599EB:
8713 case ixgbe_mac_X540:
8714 case ixgbe_mac_X550:
8715 case ixgbe_mac_X550EM_x:
8716 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8723 * If there is a fan on this device and it has failed log the
8726 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8727 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8728 if (esdp & IXGBE_ESDP_SDP1)
8729 e_crit(probe, "Fan has stopped, replace the adapter\n");
8732 if (allow_unsupported_sfp)
8733 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8735 /* reset_hw fills in the perm_addr as well */
8736 hw->phy.reset_if_overtemp = true;
8737 err = hw->mac.ops.reset_hw(hw);
8738 hw->phy.reset_if_overtemp = false;
8739 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8741 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8742 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8743 e_dev_err("Reload the driver after installing a supported module.\n");
8746 e_dev_err("HW Init failed: %d\n", err);
8750 #ifdef CONFIG_PCI_IOV
8751 /* SR-IOV not supported on the 82598 */
8752 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8755 ixgbe_init_mbx_params_pf(hw);
8756 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8757 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8758 ixgbe_enable_sriov(adapter);
8762 netdev->features = NETIF_F_SG |
8765 NETIF_F_HW_VLAN_CTAG_TX |
8766 NETIF_F_HW_VLAN_CTAG_RX |
8772 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8774 switch (adapter->hw.mac.type) {
8775 case ixgbe_mac_82599EB:
8776 case ixgbe_mac_X540:
8777 case ixgbe_mac_X550:
8778 case ixgbe_mac_X550EM_x:
8779 netdev->features |= NETIF_F_SCTP_CSUM;
8780 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8787 netdev->hw_features |= NETIF_F_RXALL;
8788 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8790 netdev->vlan_features |= NETIF_F_TSO;
8791 netdev->vlan_features |= NETIF_F_TSO6;
8792 netdev->vlan_features |= NETIF_F_IP_CSUM;
8793 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8794 netdev->vlan_features |= NETIF_F_SG;
8796 netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8799 netdev->priv_flags |= IFF_UNICAST_FLT;
8800 netdev->priv_flags |= IFF_SUPP_NOFCS;
8802 #ifdef CONFIG_IXGBE_VXLAN
8803 switch (adapter->hw.mac.type) {
8804 case ixgbe_mac_X550:
8805 case ixgbe_mac_X550EM_x:
8806 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8813 #endif /* CONFIG_IXGBE_VXLAN */
8815 #ifdef CONFIG_IXGBE_DCB
8816 netdev->dcbnl_ops = &dcbnl_ops;
8820 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8821 unsigned int fcoe_l;
8823 if (hw->mac.ops.get_device_caps) {
8824 hw->mac.ops.get_device_caps(hw, &device_caps);
8825 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8826 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8830 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8831 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8833 netdev->features |= NETIF_F_FSO |
8836 netdev->vlan_features |= NETIF_F_FSO |
8840 #endif /* IXGBE_FCOE */
8841 if (pci_using_dac) {
8842 netdev->features |= NETIF_F_HIGHDMA;
8843 netdev->vlan_features |= NETIF_F_HIGHDMA;
8846 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8847 netdev->hw_features |= NETIF_F_LRO;
8848 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8849 netdev->features |= NETIF_F_LRO;
8851 /* make sure the EEPROM is good */
8852 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8853 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8858 ixgbe_get_platform_mac_addr(adapter);
8860 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8862 if (!is_valid_ether_addr(netdev->dev_addr)) {
8863 e_dev_err("invalid MAC address\n");
8868 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8870 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8871 (unsigned long) adapter);
8873 if (ixgbe_removed(hw->hw_addr)) {
8877 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8878 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8879 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8881 err = ixgbe_init_interrupt_scheme(adapter);
8885 /* WOL not supported for all devices */
8887 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8888 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8889 pdev->subsystem_device);
8890 if (hw->wol_enabled)
8891 adapter->wol = IXGBE_WUFC_MAG;
8893 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8895 /* save off EEPROM version number */
8896 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8897 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8899 /* pick up the PCI bus settings for reporting later */
8900 if (ixgbe_pcie_from_parent(hw))
8901 ixgbe_get_parent_bus_info(adapter);
8903 hw->mac.ops.get_bus_info(hw);
8905 /* calculate the expected PCIe bandwidth required for optimal
8906 * performance. Note that some older parts will never have enough
8907 * bandwidth due to being older generation PCIe parts. We clamp these
8908 * parts to ensure no warning is displayed if it can't be fixed.
8910 switch (hw->mac.type) {
8911 case ixgbe_mac_82598EB:
8912 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8915 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8919 /* don't check link if we failed to enumerate functions */
8920 if (expected_gts > 0)
8921 ixgbe_check_minimum_link(adapter, expected_gts);
8923 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8925 strlcpy(part_str, "Unknown", sizeof(part_str));
8926 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8927 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8928 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8931 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8932 hw->mac.type, hw->phy.type, part_str);
8934 e_dev_info("%pM\n", netdev->dev_addr);
8936 /* reset the hardware with the new settings */
8937 err = hw->mac.ops.start_hw(hw);
8938 if (err == IXGBE_ERR_EEPROM_VERSION) {
8939 /* We are running on a pre-production device, log a warning */
8940 e_dev_warn("This device is a pre-production adapter/LOM. "
8941 "Please be aware there may be issues associated "
8942 "with your hardware. If you are experiencing "
8943 "problems please contact your Intel or hardware "
8944 "representative who provided you with this "
8947 strcpy(netdev->name, "eth%d");
8948 err = register_netdev(netdev);
8952 pci_set_drvdata(pdev, adapter);
8954 /* power down the optics for 82599 SFP+ fiber */
8955 if (hw->mac.ops.disable_tx_laser)
8956 hw->mac.ops.disable_tx_laser(hw);
8958 /* carrier off reporting is important to ethtool even BEFORE open */
8959 netif_carrier_off(netdev);
8961 #ifdef CONFIG_IXGBE_DCA
8962 if (dca_add_requester(&pdev->dev) == 0) {
8963 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8964 ixgbe_setup_dca(adapter);
8967 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8968 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8969 for (i = 0; i < adapter->num_vfs; i++)
8970 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8973 /* firmware requires driver version to be 0xFFFFFFFF
8974 * since os does not support feature
8976 if (hw->mac.ops.set_fw_drv_ver)
8977 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8980 /* add san mac addr to netdev */
8981 ixgbe_add_sanmac_netdev(netdev);
8983 e_dev_info("%s\n", ixgbe_default_device_descr);
8985 #ifdef CONFIG_IXGBE_HWMON
8986 if (ixgbe_sysfs_init(adapter))
8987 e_err(probe, "failed to allocate sysfs resources\n");
8988 #endif /* CONFIG_IXGBE_HWMON */
8990 ixgbe_dbg_adapter_init(adapter);
8992 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8993 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8994 hw->mac.ops.setup_link(hw,
8995 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9001 ixgbe_release_hw_control(adapter);
9002 ixgbe_clear_interrupt_scheme(adapter);
9004 ixgbe_disable_sriov(adapter);
9005 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9006 iounmap(adapter->io_addr);
9007 kfree(adapter->mac_table);
9009 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9010 free_netdev(netdev);
9012 pci_release_selected_regions(pdev,
9013 pci_select_bars(pdev, IORESOURCE_MEM));
9016 if (!adapter || disable_dev)
9017 pci_disable_device(pdev);
9022 * ixgbe_remove - Device Removal Routine
9023 * @pdev: PCI device information struct
9025 * ixgbe_remove is called by the PCI subsystem to alert the driver
9026 * that it should release a PCI device. The could be caused by a
9027 * Hot-Plug event, or because the driver is going to be removed from
9030 static void ixgbe_remove(struct pci_dev *pdev)
9032 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9033 struct net_device *netdev;
9036 /* if !adapter then we already cleaned up in probe */
9040 netdev = adapter->netdev;
9041 ixgbe_dbg_adapter_exit(adapter);
9043 set_bit(__IXGBE_REMOVING, &adapter->state);
9044 cancel_work_sync(&adapter->service_task);
9047 #ifdef CONFIG_IXGBE_DCA
9048 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9049 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9050 dca_remove_requester(&pdev->dev);
9051 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9052 IXGBE_DCA_CTRL_DCA_DISABLE);
9056 #ifdef CONFIG_IXGBE_HWMON
9057 ixgbe_sysfs_exit(adapter);
9058 #endif /* CONFIG_IXGBE_HWMON */
9060 /* remove the added san mac */
9061 ixgbe_del_sanmac_netdev(netdev);
9063 #ifdef CONFIG_PCI_IOV
9064 ixgbe_disable_sriov(adapter);
9066 if (netdev->reg_state == NETREG_REGISTERED)
9067 unregister_netdev(netdev);
9069 ixgbe_clear_interrupt_scheme(adapter);
9071 ixgbe_release_hw_control(adapter);
9074 kfree(adapter->ixgbe_ieee_pfc);
9075 kfree(adapter->ixgbe_ieee_ets);
9078 iounmap(adapter->io_addr);
9079 pci_release_selected_regions(pdev, pci_select_bars(pdev,
9082 e_dev_info("complete\n");
9084 kfree(adapter->mac_table);
9085 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9086 free_netdev(netdev);
9088 pci_disable_pcie_error_reporting(pdev);
9091 pci_disable_device(pdev);
9095 * ixgbe_io_error_detected - called when PCI error is detected
9096 * @pdev: Pointer to PCI device
9097 * @state: The current pci connection state
9099 * This function is called after a PCI bus error affecting
9100 * this device has been detected.
9102 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9103 pci_channel_state_t state)
9105 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9106 struct net_device *netdev = adapter->netdev;
9108 #ifdef CONFIG_PCI_IOV
9109 struct ixgbe_hw *hw = &adapter->hw;
9110 struct pci_dev *bdev, *vfdev;
9111 u32 dw0, dw1, dw2, dw3;
9113 u16 req_id, pf_func;
9115 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9116 adapter->num_vfs == 0)
9117 goto skip_bad_vf_detection;
9119 bdev = pdev->bus->self;
9120 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9121 bdev = bdev->bus->self;
9124 goto skip_bad_vf_detection;
9126 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9128 goto skip_bad_vf_detection;
9130 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9131 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9132 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9133 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9134 if (ixgbe_removed(hw->hw_addr))
9135 goto skip_bad_vf_detection;
9138 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9139 if (!(req_id & 0x0080))
9140 goto skip_bad_vf_detection;
9142 pf_func = req_id & 0x01;
9143 if ((pf_func & 1) == (pdev->devfn & 1)) {
9144 unsigned int device_id;
9146 vf = (req_id & 0x7F) >> 1;
9147 e_dev_err("VF %d has caused a PCIe error\n", vf);
9148 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9149 "%8.8x\tdw3: %8.8x\n",
9150 dw0, dw1, dw2, dw3);
9151 switch (adapter->hw.mac.type) {
9152 case ixgbe_mac_82599EB:
9153 device_id = IXGBE_82599_VF_DEVICE_ID;
9155 case ixgbe_mac_X540:
9156 device_id = IXGBE_X540_VF_DEVICE_ID;
9158 case ixgbe_mac_X550:
9159 device_id = IXGBE_DEV_ID_X550_VF;
9161 case ixgbe_mac_X550EM_x:
9162 device_id = IXGBE_DEV_ID_X550EM_X_VF;
9169 /* Find the pci device of the offending VF */
9170 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9172 if (vfdev->devfn == (req_id & 0xFF))
9174 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9178 * There's a slim chance the VF could have been hot plugged,
9179 * so if it is no longer present we don't need to issue the
9180 * VFLR. Just clean up the AER in that case.
9183 ixgbe_issue_vf_flr(adapter, vfdev);
9184 /* Free device reference count */
9188 pci_cleanup_aer_uncorrect_error_status(pdev);
9192 * Even though the error may have occurred on the other port
9193 * we still need to increment the vf error reference count for
9194 * both ports because the I/O resume function will be called
9197 adapter->vferr_refcount++;
9199 return PCI_ERS_RESULT_RECOVERED;
9201 skip_bad_vf_detection:
9202 #endif /* CONFIG_PCI_IOV */
9203 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9204 return PCI_ERS_RESULT_DISCONNECT;
9207 netif_device_detach(netdev);
9209 if (state == pci_channel_io_perm_failure) {
9211 return PCI_ERS_RESULT_DISCONNECT;
9214 if (netif_running(netdev))
9215 ixgbe_down(adapter);
9217 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9218 pci_disable_device(pdev);
9221 /* Request a slot reset. */
9222 return PCI_ERS_RESULT_NEED_RESET;
9226 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9227 * @pdev: Pointer to PCI device
9229 * Restart the card from scratch, as if from a cold-boot.
9231 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9233 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9234 pci_ers_result_t result;
9237 if (pci_enable_device_mem(pdev)) {
9238 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9239 result = PCI_ERS_RESULT_DISCONNECT;
9241 smp_mb__before_atomic();
9242 clear_bit(__IXGBE_DISABLED, &adapter->state);
9243 adapter->hw.hw_addr = adapter->io_addr;
9244 pci_set_master(pdev);
9245 pci_restore_state(pdev);
9246 pci_save_state(pdev);
9248 pci_wake_from_d3(pdev, false);
9250 ixgbe_reset(adapter);
9251 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9252 result = PCI_ERS_RESULT_RECOVERED;
9255 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9257 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9258 "failed 0x%0x\n", err);
9259 /* non-fatal, continue */
9266 * ixgbe_io_resume - called when traffic can start flowing again.
9267 * @pdev: Pointer to PCI device
9269 * This callback is called when the error recovery driver tells us that
9270 * its OK to resume normal operation.
9272 static void ixgbe_io_resume(struct pci_dev *pdev)
9274 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9275 struct net_device *netdev = adapter->netdev;
9277 #ifdef CONFIG_PCI_IOV
9278 if (adapter->vferr_refcount) {
9279 e_info(drv, "Resuming after VF err\n");
9280 adapter->vferr_refcount--;
9285 if (netif_running(netdev))
9288 netif_device_attach(netdev);
9291 static const struct pci_error_handlers ixgbe_err_handler = {
9292 .error_detected = ixgbe_io_error_detected,
9293 .slot_reset = ixgbe_io_slot_reset,
9294 .resume = ixgbe_io_resume,
9297 static struct pci_driver ixgbe_driver = {
9298 .name = ixgbe_driver_name,
9299 .id_table = ixgbe_pci_tbl,
9300 .probe = ixgbe_probe,
9301 .remove = ixgbe_remove,
9303 .suspend = ixgbe_suspend,
9304 .resume = ixgbe_resume,
9306 .shutdown = ixgbe_shutdown,
9307 .sriov_configure = ixgbe_pci_sriov_configure,
9308 .err_handler = &ixgbe_err_handler
9312 * ixgbe_init_module - Driver Registration Routine
9314 * ixgbe_init_module is the first routine called when the driver is
9315 * loaded. All it does is register with the PCI subsystem.
9317 static int __init ixgbe_init_module(void)
9320 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9321 pr_info("%s\n", ixgbe_copyright);
9325 ret = pci_register_driver(&ixgbe_driver);
9331 #ifdef CONFIG_IXGBE_DCA
9332 dca_register_notify(&dca_notifier);
9338 module_init(ixgbe_init_module);
9341 * ixgbe_exit_module - Driver Exit Cleanup Routine
9343 * ixgbe_exit_module is called just before the driver is removed
9346 static void __exit ixgbe_exit_module(void)
9348 #ifdef CONFIG_IXGBE_DCA
9349 dca_unregister_notify(&dca_notifier);
9351 pci_unregister_driver(&ixgbe_driver);
9356 #ifdef CONFIG_IXGBE_DCA
9357 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9362 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9363 __ixgbe_notify_dca);
9365 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9368 #endif /* CONFIG_IXGBE_DCA */
9370 module_exit(ixgbe_exit_module);