1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name[] = "ixgbe";
56 static const char ixgbe_driver_string[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version[] = DRV_VERSION;
71 static const char ixgbe_copyright[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info *ixgbe_info_tbl[] = {
75 [board_82598] = &ixgbe_82598_info,
76 [board_82599] = &ixgbe_82599_info,
77 [board_X540] = &ixgbe_X540_info,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs;
134 module_param(max_vfs, uint, 0);
135 MODULE_PARM_DESC(max_vfs,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp;
140 module_param(allow_unsupported_sfp, uint, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug = -1;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
156 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
158 schedule_work(&adapter->service_task);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
170 struct ixgbe_reg_info {
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
177 /* General Registers */
178 {IXGBE_CTRL, "CTRL"},
179 {IXGBE_STATUS, "STATUS"},
180 {IXGBE_CTRL_EXT, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
217 switch (reginfo->ofs) {
218 case IXGBE_SRRCTL(0):
219 for (i = 0; i < 64; i++)
220 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i = 0; i < 64; i++)
224 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
227 for (i = 0; i < 64; i++)
228 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
231 for (i = 0; i < 64; i++)
232 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
235 for (i = 0; i < 64; i++)
236 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
238 case IXGBE_RXDCTL(0):
239 for (i = 0; i < 64; i++)
240 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
243 for (i = 0; i < 64; i++)
244 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
247 for (i = 0; i < 64; i++)
248 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
251 for (i = 0; i < 64; i++)
252 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
255 for (i = 0; i < 64; i++)
256 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
259 for (i = 0; i < 64; i++)
260 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
263 for (i = 0; i < 64; i++)
264 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
267 for (i = 0; i < 64; i++)
268 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
270 case IXGBE_TXDCTL(0):
271 for (i = 0; i < 64; i++)
272 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
275 pr_info("%-15s %08x\n", reginfo->name,
276 IXGBE_READ_REG(hw, reginfo->ofs));
280 for (i = 0; i < 8; i++) {
281 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
282 pr_err("%-15s", rname);
283 for (j = 0; j < 8; j++)
284 pr_cont(" %08x", regs[i*8+j]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter *adapter)
295 struct net_device *netdev = adapter->netdev;
296 struct ixgbe_hw *hw = &adapter->hw;
297 struct ixgbe_reg_info *reginfo;
299 struct ixgbe_ring *tx_ring;
300 struct ixgbe_tx_buffer *tx_buffer;
301 union ixgbe_adv_tx_desc *tx_desc;
302 struct my_u0 { u64 a; u64 b; } *u0;
303 struct ixgbe_ring *rx_ring;
304 union ixgbe_adv_rx_desc *rx_desc;
305 struct ixgbe_rx_buffer *rx_buffer_info;
309 if (!netif_msg_hw(adapter))
312 /* Print netdevice Info */
314 dev_info(&adapter->pdev->dev, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter->pdev->dev, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
328 reginfo->name; reginfo++) {
329 ixgbe_regdump(hw, reginfo);
332 /* Print TX Ring Summary */
333 if (!netdev || !netif_running(netdev))
336 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n = 0; n < adapter->num_tx_queues; n++) {
339 tx_ring = adapter->tx_ring[n];
340 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n, tx_ring->next_to_use, tx_ring->next_to_clean,
343 (u64)dma_unmap_addr(tx_buffer, dma),
344 dma_unmap_len(tx_buffer, len),
345 tx_buffer->next_to_watch,
346 (u64)tx_buffer->time_stamp);
350 if (!netif_msg_tx_done(adapter))
351 goto rx_ring_summary;
353 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n = 0; n < adapter->num_tx_queues; n++) {
367 tx_ring = adapter->tx_ring[n];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
376 tx_desc = IXGBE_TX_DESC(tx_ring, i);
377 tx_buffer = &tx_ring->tx_buffer_info[i];
378 u0 = (struct my_u0 *)tx_desc;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i,
383 (u64)dma_unmap_addr(tx_buffer, dma),
384 dma_unmap_len(tx_buffer, len),
385 tx_buffer->next_to_watch,
386 (u64)tx_buffer->time_stamp,
388 if (i == tx_ring->next_to_use &&
389 i == tx_ring->next_to_clean)
391 else if (i == tx_ring->next_to_use)
393 else if (i == tx_ring->next_to_clean)
398 if (netif_msg_pktdata(adapter) &&
399 dma_unmap_len(tx_buffer, len) != 0)
400 print_hex_dump(KERN_INFO, "",
401 DUMP_PREFIX_ADDRESS, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer,
404 dma_unmap_len(tx_buffer, len),
409 /* Print RX Rings Summary */
411 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n = 0; n < adapter->num_rx_queues; n++) {
414 rx_ring = adapter->rx_ring[n];
415 pr_info("%5d %5X %5X\n",
416 n, rx_ring->next_to_use, rx_ring->next_to_clean);
420 if (!netif_msg_rx_status(adapter))
423 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n = 0; n < adapter->num_rx_queues; n++) {
446 rx_ring = adapter->rx_ring[n];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i = 0; i < rx_ring->count; i++) {
458 rx_buffer_info = &rx_ring->rx_buffer_info[i];
459 rx_desc = IXGBE_RX_DESC(rx_ring, i);
460 u0 = (struct my_u0 *)rx_desc;
461 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
462 if (staterr & IXGBE_RXD_STAT_DD) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i,
468 rx_buffer_info->skb);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i,
474 (u64)rx_buffer_info->dma,
475 rx_buffer_info->skb);
477 if (netif_msg_pktdata(adapter)) {
478 print_hex_dump(KERN_INFO, "",
479 DUMP_PREFIX_ADDRESS, 16, 1,
480 phys_to_virt(rx_buffer_info->dma),
481 ixgbe_rx_bufsz(rx_ring), true);
485 if (i == rx_ring->next_to_use)
487 else if (i == rx_ring->next_to_clean)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
503 /* Let firmware take over control of h/w */
504 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
505 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
506 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
516 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
528 u8 queue, u8 msix_vector)
531 struct ixgbe_hw *hw = &adapter->hw;
532 switch (hw->mac.type) {
533 case ixgbe_mac_82598EB:
534 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
537 index = (((direction * 64) + queue) >> 2) & 0x1F;
538 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
539 ivar &= ~(0xFF << (8 * (queue & 0x3)));
540 ivar |= (msix_vector << (8 * (queue & 0x3)));
541 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
543 case ixgbe_mac_82599EB:
545 if (direction == -1) {
547 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
548 index = ((queue & 1) * 8);
549 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
550 ivar &= ~(0xFF << index);
551 ivar |= (msix_vector << index);
552 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
555 /* tx or rx causes */
556 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
557 index = ((16 * (queue & 1)) + (8 * direction));
558 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
559 ivar &= ~(0xFF << index);
560 ivar |= (msix_vector << index);
561 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
574 switch (adapter->hw.mac.type) {
575 case ixgbe_mac_82598EB:
576 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
577 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
579 case ixgbe_mac_82599EB:
581 mask = (qmask & 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
583 mask = (qmask >> 32);
584 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
592 struct ixgbe_tx_buffer *tx_buffer)
594 if (tx_buffer->skb) {
595 dev_kfree_skb_any(tx_buffer->skb);
596 if (dma_unmap_len(tx_buffer, len))
597 dma_unmap_single(ring->dev,
598 dma_unmap_addr(tx_buffer, dma),
599 dma_unmap_len(tx_buffer, len),
601 } else if (dma_unmap_len(tx_buffer, len)) {
602 dma_unmap_page(ring->dev,
603 dma_unmap_addr(tx_buffer, dma),
604 dma_unmap_len(tx_buffer, len),
607 tx_buffer->next_to_watch = NULL;
608 tx_buffer->skb = NULL;
609 dma_unmap_len_set(tx_buffer, len, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
615 struct ixgbe_hw *hw = &adapter->hw;
616 struct ixgbe_hw_stats *hwstats = &adapter->stats;
620 if ((hw->fc.current_mode != ixgbe_fc_full) &&
621 (hw->fc.current_mode != ixgbe_fc_rx_pause))
624 switch (hw->mac.type) {
625 case ixgbe_mac_82598EB:
626 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
629 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
631 hwstats->lxoffrxc += data;
633 /* refill credits (no tx hang) if we received xoff */
637 for (i = 0; i < adapter->num_tx_queues; i++)
638 clear_bit(__IXGBE_HANG_CHECK_ARMED,
639 &adapter->tx_ring[i]->state);
642 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
644 struct ixgbe_hw *hw = &adapter->hw;
645 struct ixgbe_hw_stats *hwstats = &adapter->stats;
648 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
650 if (adapter->ixgbe_ieee_pfc)
651 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
653 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
654 ixgbe_update_xoff_rx_lfc(adapter);
658 /* update stats for each tc, only valid with PFC enabled */
659 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
660 switch (hw->mac.type) {
661 case ixgbe_mac_82598EB:
662 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
665 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
667 hwstats->pxoffrxc[i] += xoff[i];
670 /* disarm tx queues that have received xoff frames */
671 for (i = 0; i < adapter->num_tx_queues; i++) {
672 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
673 u8 tc = tx_ring->dcb_tc;
676 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
680 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
682 return ring->stats.packets;
685 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
687 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
688 struct ixgbe_hw *hw = &adapter->hw;
690 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
691 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
694 return (head < tail) ?
695 tail - head : (tail + ring->count - head);
700 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
702 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
703 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
704 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
707 clear_check_for_tx_hang(tx_ring);
710 * Check for a hung queue, but be thorough. This verifies
711 * that a transmit has been completed since the previous
712 * check AND there is at least one packet pending. The
713 * ARMED bit is set to indicate a potential hang. The
714 * bit is cleared if a pause frame is received to remove
715 * false hang detection due to PFC or 802.3x frames. By
716 * requiring this to fail twice we avoid races with
717 * pfc clearing the ARMED bit and conditions where we
718 * run the check_tx_hang logic with a transmit completion
719 * pending but without time to complete it yet.
721 if ((tx_done_old == tx_done) && tx_pending) {
722 /* make sure it is true for two checks in a row */
723 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
726 /* update completed stats and continue */
727 tx_ring->tx_stats.tx_done_old = tx_done;
728 /* reset the countdown */
729 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
736 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
737 * @adapter: driver private struct
739 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
742 /* Do the reset outside of interrupt context */
743 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
744 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
745 ixgbe_service_event_schedule(adapter);
750 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
751 * @q_vector: structure containing interrupt and ring information
752 * @tx_ring: tx ring to clean
754 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
755 struct ixgbe_ring *tx_ring)
757 struct ixgbe_adapter *adapter = q_vector->adapter;
758 struct ixgbe_tx_buffer *tx_buffer;
759 union ixgbe_adv_tx_desc *tx_desc;
760 unsigned int total_bytes = 0, total_packets = 0;
761 unsigned int budget = q_vector->tx.work_limit;
762 unsigned int i = tx_ring->next_to_clean;
764 if (test_bit(__IXGBE_DOWN, &adapter->state))
767 tx_buffer = &tx_ring->tx_buffer_info[i];
768 tx_desc = IXGBE_TX_DESC(tx_ring, i);
772 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
774 /* if next_to_watch is not set then there is no work pending */
778 /* prevent any other reads prior to eop_desc */
781 /* if DD is not set pending work has not been completed */
782 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
785 /* clear next_to_watch to prevent false hangs */
786 tx_buffer->next_to_watch = NULL;
788 /* update the statistics for this packet */
789 total_bytes += tx_buffer->bytecount;
790 total_packets += tx_buffer->gso_segs;
792 #ifdef CONFIG_IXGBE_PTP
793 if (unlikely(tx_buffer->tx_flags & IXGBE_TX_FLAGS_TSTAMP))
794 ixgbe_ptp_tx_hwtstamp(q_vector, tx_buffer->skb);
798 dev_kfree_skb_any(tx_buffer->skb);
800 /* unmap skb header data */
801 dma_unmap_single(tx_ring->dev,
802 dma_unmap_addr(tx_buffer, dma),
803 dma_unmap_len(tx_buffer, len),
806 /* clear tx_buffer data */
807 tx_buffer->skb = NULL;
808 dma_unmap_len_set(tx_buffer, len, 0);
810 /* unmap remaining buffers */
811 while (tx_desc != eop_desc) {
817 tx_buffer = tx_ring->tx_buffer_info;
818 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
821 /* unmap any remaining paged data */
822 if (dma_unmap_len(tx_buffer, len)) {
823 dma_unmap_page(tx_ring->dev,
824 dma_unmap_addr(tx_buffer, dma),
825 dma_unmap_len(tx_buffer, len),
827 dma_unmap_len_set(tx_buffer, len, 0);
831 /* move us one more past the eop_desc for start of next pkt */
837 tx_buffer = tx_ring->tx_buffer_info;
838 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
841 /* issue prefetch for next Tx descriptor */
844 /* update budget accounting */
846 } while (likely(budget));
849 tx_ring->next_to_clean = i;
850 u64_stats_update_begin(&tx_ring->syncp);
851 tx_ring->stats.bytes += total_bytes;
852 tx_ring->stats.packets += total_packets;
853 u64_stats_update_end(&tx_ring->syncp);
854 q_vector->tx.total_bytes += total_bytes;
855 q_vector->tx.total_packets += total_packets;
857 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
858 /* schedule immediate reset if we believe we hung */
859 struct ixgbe_hw *hw = &adapter->hw;
860 e_err(drv, "Detected Tx Unit Hang\n"
862 " TDH, TDT <%x>, <%x>\n"
863 " next_to_use <%x>\n"
864 " next_to_clean <%x>\n"
865 "tx_buffer_info[next_to_clean]\n"
866 " time_stamp <%lx>\n"
868 tx_ring->queue_index,
869 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
870 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
871 tx_ring->next_to_use, i,
872 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
874 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
877 "tx hang %d detected on queue %d, resetting adapter\n",
878 adapter->tx_timeout_count + 1, tx_ring->queue_index);
880 /* schedule immediate reset if we believe we hung */
881 ixgbe_tx_timeout_reset(adapter);
883 /* the adapter is about to reset, no point in enabling stuff */
887 netdev_tx_completed_queue(txring_txq(tx_ring),
888 total_packets, total_bytes);
890 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
891 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
892 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
893 /* Make sure that anybody stopping the queue after this
894 * sees the new next_to_clean.
897 if (__netif_subqueue_stopped(tx_ring->netdev,
898 tx_ring->queue_index)
899 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
900 netif_wake_subqueue(tx_ring->netdev,
901 tx_ring->queue_index);
902 ++tx_ring->tx_stats.restart_queue;
909 #ifdef CONFIG_IXGBE_DCA
910 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
911 struct ixgbe_ring *tx_ring,
914 struct ixgbe_hw *hw = &adapter->hw;
915 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
918 switch (hw->mac.type) {
919 case ixgbe_mac_82598EB:
920 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
922 case ixgbe_mac_82599EB:
924 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
925 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
928 /* for unknown hardware do not write register */
933 * We can enable relaxed ordering for reads, but not writes when
934 * DCA is enabled. This is due to a known issue in some chipsets
935 * which will cause the DCA tag to be cleared.
937 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
938 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
939 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
941 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
944 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
945 struct ixgbe_ring *rx_ring,
948 struct ixgbe_hw *hw = &adapter->hw;
949 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
950 u8 reg_idx = rx_ring->reg_idx;
953 switch (hw->mac.type) {
954 case ixgbe_mac_82599EB:
956 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
963 * We can enable relaxed ordering for reads, but not writes when
964 * DCA is enabled. This is due to a known issue in some chipsets
965 * which will cause the DCA tag to be cleared.
967 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
968 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
969 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
971 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
974 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
976 struct ixgbe_adapter *adapter = q_vector->adapter;
977 struct ixgbe_ring *ring;
980 if (q_vector->cpu == cpu)
983 ixgbe_for_each_ring(ring, q_vector->tx)
984 ixgbe_update_tx_dca(adapter, ring, cpu);
986 ixgbe_for_each_ring(ring, q_vector->rx)
987 ixgbe_update_rx_dca(adapter, ring, cpu);
994 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
998 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1001 /* always use CB2 mode, difference is masked in the CB driver */
1002 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1004 for (i = 0; i < adapter->num_q_vectors; i++) {
1005 adapter->q_vector[i]->cpu = -1;
1006 ixgbe_update_dca(adapter->q_vector[i]);
1010 static int __ixgbe_notify_dca(struct device *dev, void *data)
1012 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1013 unsigned long event = *(unsigned long *)data;
1015 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1019 case DCA_PROVIDER_ADD:
1020 /* if we're already enabled, don't do it again */
1021 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1023 if (dca_add_requester(dev) == 0) {
1024 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1025 ixgbe_setup_dca(adapter);
1028 /* Fall Through since DCA is disabled. */
1029 case DCA_PROVIDER_REMOVE:
1030 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1031 dca_remove_requester(dev);
1032 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1041 #endif /* CONFIG_IXGBE_DCA */
1042 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1043 union ixgbe_adv_rx_desc *rx_desc,
1044 struct sk_buff *skb)
1046 if (ring->netdev->features & NETIF_F_RXHASH)
1047 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1052 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1053 * @ring: structure containing ring specific data
1054 * @rx_desc: advanced rx descriptor
1056 * Returns : true if it is FCoE pkt
1058 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1059 union ixgbe_adv_rx_desc *rx_desc)
1061 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1063 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1064 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1065 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1066 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1069 #endif /* IXGBE_FCOE */
1071 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1072 * @ring: structure containing ring specific data
1073 * @rx_desc: current Rx descriptor being processed
1074 * @skb: skb currently being received and modified
1076 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1077 union ixgbe_adv_rx_desc *rx_desc,
1078 struct sk_buff *skb)
1080 skb_checksum_none_assert(skb);
1082 /* Rx csum disabled */
1083 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1086 /* if IP and error */
1087 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1088 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1089 ring->rx_stats.csum_err++;
1093 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1096 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1097 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1100 * 82599 errata, UDP frames with a 0 checksum can be marked as
1103 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1104 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1107 ring->rx_stats.csum_err++;
1111 /* It must be a TCP or UDP packet with a valid checksum */
1112 skb->ip_summed = CHECKSUM_UNNECESSARY;
1115 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1117 rx_ring->next_to_use = val;
1119 /* update next to alloc since we have filled the ring */
1120 rx_ring->next_to_alloc = val;
1122 * Force memory writes to complete before letting h/w
1123 * know there are new descriptors to fetch. (Only
1124 * applicable for weak-ordered memory model archs,
1128 writel(val, rx_ring->tail);
1131 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1132 struct ixgbe_rx_buffer *bi)
1134 struct page *page = bi->page;
1135 dma_addr_t dma = bi->dma;
1137 /* since we are recycling buffers we should seldom need to alloc */
1141 /* alloc new page for storage */
1142 if (likely(!page)) {
1143 page = alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1144 ixgbe_rx_pg_order(rx_ring));
1145 if (unlikely(!page)) {
1146 rx_ring->rx_stats.alloc_rx_page_failed++;
1152 /* map page for use */
1153 dma = dma_map_page(rx_ring->dev, page, 0,
1154 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1157 * if mapping failed free memory back to system since
1158 * there isn't much point in holding memory we can't use
1160 if (dma_mapping_error(rx_ring->dev, dma)) {
1161 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1164 rx_ring->rx_stats.alloc_rx_page_failed++;
1169 bi->page_offset ^= ixgbe_rx_bufsz(rx_ring);
1175 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1176 * @rx_ring: ring to place buffers on
1177 * @cleaned_count: number of buffers to replace
1179 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1181 union ixgbe_adv_rx_desc *rx_desc;
1182 struct ixgbe_rx_buffer *bi;
1183 u16 i = rx_ring->next_to_use;
1189 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1190 bi = &rx_ring->rx_buffer_info[i];
1191 i -= rx_ring->count;
1194 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1198 * Refresh the desc even if buffer_addrs didn't change
1199 * because each write-back erases this info.
1201 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1207 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1208 bi = rx_ring->rx_buffer_info;
1209 i -= rx_ring->count;
1212 /* clear the hdr_addr for the next_to_use descriptor */
1213 rx_desc->read.hdr_addr = 0;
1216 } while (cleaned_count);
1218 i += rx_ring->count;
1220 if (rx_ring->next_to_use != i)
1221 ixgbe_release_rx_desc(rx_ring, i);
1225 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1226 * @data: pointer to the start of the headers
1227 * @max_len: total length of section to find headers in
1229 * This function is meant to determine the length of headers that will
1230 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1231 * motivation of doing this is to only perform one pull for IPv4 TCP
1232 * packets so that we can do basic things like calculating the gso_size
1233 * based on the average data per packet.
1235 static unsigned int ixgbe_get_headlen(unsigned char *data,
1236 unsigned int max_len)
1239 unsigned char *network;
1242 struct vlan_hdr *vlan;
1247 u8 nexthdr = 0; /* default to not TCP */
1250 /* this should never happen, but better safe than sorry */
1251 if (max_len < ETH_HLEN)
1254 /* initialize network frame pointer */
1257 /* set first protocol and move network header forward */
1258 protocol = hdr.eth->h_proto;
1259 hdr.network += ETH_HLEN;
1261 /* handle any vlan tag if present */
1262 if (protocol == __constant_htons(ETH_P_8021Q)) {
1263 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1266 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1267 hdr.network += VLAN_HLEN;
1270 /* handle L3 protocols */
1271 if (protocol == __constant_htons(ETH_P_IP)) {
1272 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1275 /* access ihl as a u8 to avoid unaligned access on ia64 */
1276 hlen = (hdr.network[0] & 0x0F) << 2;
1278 /* verify hlen meets minimum size requirements */
1279 if (hlen < sizeof(struct iphdr))
1280 return hdr.network - data;
1282 /* record next protocol */
1283 nexthdr = hdr.ipv4->protocol;
1284 hdr.network += hlen;
1286 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1287 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1289 hdr.network += FCOE_HEADER_LEN;
1292 return hdr.network - data;
1295 /* finally sort out TCP */
1296 if (nexthdr == IPPROTO_TCP) {
1297 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1300 /* access doff as a u8 to avoid unaligned access on ia64 */
1301 hlen = (hdr.network[12] & 0xF0) >> 2;
1303 /* verify hlen meets minimum size requirements */
1304 if (hlen < sizeof(struct tcphdr))
1305 return hdr.network - data;
1307 hdr.network += hlen;
1311 * If everything has gone correctly hdr.network should be the
1312 * data section of the packet and will be the end of the header.
1313 * If not then it probably represents the end of the last recognized
1316 if ((hdr.network - data) < max_len)
1317 return hdr.network - data;
1322 static void ixgbe_get_rsc_cnt(struct ixgbe_ring *rx_ring,
1323 union ixgbe_adv_rx_desc *rx_desc,
1324 struct sk_buff *skb)
1329 if (!ring_is_rsc_enabled(rx_ring))
1332 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1333 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1335 /* If this is an RSC frame rsc_cnt should be non-zero */
1339 rsc_cnt = le32_to_cpu(rsc_enabled);
1340 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1342 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1345 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1346 struct sk_buff *skb)
1348 u16 hdr_len = skb_headlen(skb);
1350 /* set gso_size to avoid messing up TCP MSS */
1351 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1352 IXGBE_CB(skb)->append_cnt);
1355 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1356 struct sk_buff *skb)
1358 /* if append_cnt is 0 then frame is not RSC */
1359 if (!IXGBE_CB(skb)->append_cnt)
1362 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1363 rx_ring->rx_stats.rsc_flush++;
1365 ixgbe_set_rsc_gso_size(rx_ring, skb);
1367 /* gso_size is computed using append_cnt so always clear it last */
1368 IXGBE_CB(skb)->append_cnt = 0;
1372 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1373 * @rx_ring: rx descriptor ring packet is being transacted on
1374 * @rx_desc: pointer to the EOP Rx descriptor
1375 * @skb: pointer to current skb being populated
1377 * This function checks the ring, descriptor, and packet information in
1378 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1379 * other fields within the skb.
1381 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1382 union ixgbe_adv_rx_desc *rx_desc,
1383 struct sk_buff *skb)
1385 struct net_device *dev = rx_ring->netdev;
1387 ixgbe_update_rsc_stats(rx_ring, skb);
1389 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1391 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1393 #ifdef CONFIG_IXGBE_PTP
1394 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
1397 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
1398 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1399 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1400 __vlan_hwaccel_put_tag(skb, vid);
1403 skb_record_rx_queue(skb, rx_ring->queue_index);
1405 skb->protocol = eth_type_trans(skb, dev);
1408 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1409 struct sk_buff *skb)
1411 struct ixgbe_adapter *adapter = q_vector->adapter;
1413 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1414 napi_gro_receive(&q_vector->napi, skb);
1420 * ixgbe_is_non_eop - process handling of non-EOP buffers
1421 * @rx_ring: Rx ring being processed
1422 * @rx_desc: Rx descriptor for current buffer
1423 * @skb: Current socket buffer containing buffer in progress
1425 * This function updates next to clean. If the buffer is an EOP buffer
1426 * this function exits returning false, otherwise it will place the
1427 * sk_buff in the next buffer to be chained and return true indicating
1428 * that this is in fact a non-EOP buffer.
1430 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1431 union ixgbe_adv_rx_desc *rx_desc,
1432 struct sk_buff *skb)
1434 u32 ntc = rx_ring->next_to_clean + 1;
1436 /* fetch, update, and store next to clean */
1437 ntc = (ntc < rx_ring->count) ? ntc : 0;
1438 rx_ring->next_to_clean = ntc;
1440 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1442 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1445 /* append_cnt indicates packet is RSC, if so fetch nextp */
1446 if (IXGBE_CB(skb)->append_cnt) {
1447 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1448 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1449 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1452 /* place skb in next buffer to be received */
1453 rx_ring->rx_buffer_info[ntc].skb = skb;
1454 rx_ring->rx_stats.non_eop_descs++;
1460 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1461 * @rx_ring: rx descriptor ring packet is being transacted on
1462 * @rx_desc: pointer to the EOP Rx descriptor
1463 * @skb: pointer to current skb being fixed
1465 * Check for corrupted packet headers caused by senders on the local L2
1466 * embedded NIC switch not setting up their Tx Descriptors right. These
1467 * should be very rare.
1469 * Also address the case where we are pulling data in on pages only
1470 * and as such no data is present in the skb header.
1472 * In addition if skb is not at least 60 bytes we need to pad it so that
1473 * it is large enough to qualify as a valid Ethernet frame.
1475 * Returns true if an error was encountered and skb was freed.
1477 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1478 union ixgbe_adv_rx_desc *rx_desc,
1479 struct sk_buff *skb)
1481 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1482 struct net_device *netdev = rx_ring->netdev;
1484 unsigned int pull_len;
1486 /* if the page was released unmap it, else just sync our portion */
1487 if (unlikely(IXGBE_CB(skb)->page_released)) {
1488 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1489 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1490 IXGBE_CB(skb)->page_released = false;
1492 dma_sync_single_range_for_cpu(rx_ring->dev,
1495 ixgbe_rx_bufsz(rx_ring),
1498 IXGBE_CB(skb)->dma = 0;
1500 /* verify that the packet does not have any known errors */
1501 if (unlikely(ixgbe_test_staterr(rx_desc,
1502 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1503 !(netdev->features & NETIF_F_RXALL))) {
1504 dev_kfree_skb_any(skb);
1509 * it is valid to use page_address instead of kmap since we are
1510 * working with pages allocated out of the lomem pool per
1511 * alloc_page(GFP_ATOMIC)
1513 va = skb_frag_address(frag);
1516 * we need the header to contain the greater of either ETH_HLEN or
1517 * 60 bytes if the skb->len is less than 60 for skb_pad.
1519 pull_len = skb_frag_size(frag);
1521 pull_len = ixgbe_get_headlen(va, pull_len);
1523 /* align pull length to size of long to optimize memcpy performance */
1524 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1526 /* update all of the pointers */
1527 skb_frag_size_sub(frag, pull_len);
1528 frag->page_offset += pull_len;
1529 skb->data_len -= pull_len;
1530 skb->tail += pull_len;
1533 * if we sucked the frag empty then we should free it,
1534 * if there are other frags here something is screwed up in hardware
1536 if (skb_frag_size(frag) == 0) {
1537 BUG_ON(skb_shinfo(skb)->nr_frags != 1);
1538 skb_shinfo(skb)->nr_frags = 0;
1539 __skb_frag_unref(frag);
1540 skb->truesize -= ixgbe_rx_bufsz(rx_ring);
1544 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1545 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1549 /* if skb_pad returns an error the skb was freed */
1550 if (unlikely(skb->len < 60)) {
1551 int pad_len = 60 - skb->len;
1553 if (skb_pad(skb, pad_len))
1555 __skb_put(skb, pad_len);
1562 * ixgbe_can_reuse_page - determine if we can reuse a page
1563 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1565 * Returns true if page can be reused in another Rx buffer
1567 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer *rx_buffer)
1569 struct page *page = rx_buffer->page;
1571 /* if we are only owner of page and it is local we can reuse it */
1572 return likely(page_count(page) == 1) &&
1573 likely(page_to_nid(page) == numa_node_id());
1577 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1578 * @rx_ring: rx descriptor ring to store buffers on
1579 * @old_buff: donor buffer to have page reused
1581 * Syncronizes page for reuse by the adapter
1583 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1584 struct ixgbe_rx_buffer *old_buff)
1586 struct ixgbe_rx_buffer *new_buff;
1587 u16 nta = rx_ring->next_to_alloc;
1588 u16 bufsz = ixgbe_rx_bufsz(rx_ring);
1590 new_buff = &rx_ring->rx_buffer_info[nta];
1592 /* update, and store next to alloc */
1594 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1596 /* transfer page from old buffer to new buffer */
1597 new_buff->page = old_buff->page;
1598 new_buff->dma = old_buff->dma;
1600 /* flip page offset to other buffer and store to new_buff */
1601 new_buff->page_offset = old_buff->page_offset ^ bufsz;
1603 /* sync the buffer for use by the device */
1604 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1605 new_buff->page_offset, bufsz,
1608 /* bump ref count on page before it is given to the stack */
1609 get_page(new_buff->page);
1613 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1614 * @rx_ring: rx descriptor ring to transact packets on
1615 * @rx_buffer: buffer containing page to add
1616 * @rx_desc: descriptor containing length of buffer written by hardware
1617 * @skb: sk_buff to place the data into
1619 * This function is based on skb_add_rx_frag. I would have used that
1620 * function however it doesn't handle the truesize case correctly since we
1621 * are allocating more memory than might be used for a single receive.
1623 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1624 struct ixgbe_rx_buffer *rx_buffer,
1625 struct sk_buff *skb, int size)
1627 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
1628 rx_buffer->page, rx_buffer->page_offset,
1631 skb->data_len += size;
1632 skb->truesize += ixgbe_rx_bufsz(rx_ring);
1636 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1637 * @q_vector: structure containing interrupt and ring information
1638 * @rx_ring: rx descriptor ring to transact packets on
1639 * @budget: Total limit on number of packets to process
1641 * This function provides a "bounce buffer" approach to Rx interrupt
1642 * processing. The advantage to this is that on systems that have
1643 * expensive overhead for IOMMU access this provides a means of avoiding
1644 * it by maintaining the mapping of the page to the syste.
1646 * Returns true if all work is completed without reaching budget
1648 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1649 struct ixgbe_ring *rx_ring,
1652 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1654 struct ixgbe_adapter *adapter = q_vector->adapter;
1656 #endif /* IXGBE_FCOE */
1657 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1660 struct ixgbe_rx_buffer *rx_buffer;
1661 union ixgbe_adv_rx_desc *rx_desc;
1662 struct sk_buff *skb;
1666 /* return some buffers to hardware, one at a time is too slow */
1667 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1668 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1672 ntc = rx_ring->next_to_clean;
1673 rx_desc = IXGBE_RX_DESC(rx_ring, ntc);
1674 rx_buffer = &rx_ring->rx_buffer_info[ntc];
1676 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1680 * This memory barrier is needed to keep us from reading
1681 * any other fields out of the rx_desc until we know the
1682 * RXD_STAT_DD bit is set
1686 page = rx_buffer->page;
1689 skb = rx_buffer->skb;
1692 void *page_addr = page_address(page) +
1693 rx_buffer->page_offset;
1695 /* prefetch first cache line of first page */
1696 prefetch(page_addr);
1697 #if L1_CACHE_BYTES < 128
1698 prefetch(page_addr + L1_CACHE_BYTES);
1701 /* allocate a skb to store the frags */
1702 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1704 if (unlikely(!skb)) {
1705 rx_ring->rx_stats.alloc_rx_buff_failed++;
1710 * we will be copying header into skb->data in
1711 * pskb_may_pull so it is in our interest to prefetch
1712 * it now to avoid a possible cache miss
1714 prefetchw(skb->data);
1717 * Delay unmapping of the first packet. It carries the
1718 * header information, HW may still access the header
1719 * after the writeback. Only unmap it when EOP is
1722 IXGBE_CB(skb)->dma = rx_buffer->dma;
1724 /* we are reusing so sync this buffer for CPU use */
1725 dma_sync_single_range_for_cpu(rx_ring->dev,
1727 rx_buffer->page_offset,
1728 ixgbe_rx_bufsz(rx_ring),
1732 /* pull page into skb */
1733 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb,
1734 le16_to_cpu(rx_desc->wb.upper.length));
1736 if (ixgbe_can_reuse_page(rx_buffer)) {
1737 /* hand second half of page back to the ring */
1738 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1739 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1740 /* the page has been released from the ring */
1741 IXGBE_CB(skb)->page_released = true;
1743 /* we are not reusing the buffer so unmap it */
1744 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1745 ixgbe_rx_pg_size(rx_ring),
1749 /* clear contents of buffer_info */
1750 rx_buffer->skb = NULL;
1752 rx_buffer->page = NULL;
1754 ixgbe_get_rsc_cnt(rx_ring, rx_desc, skb);
1758 /* place incomplete frames back on ring for completion */
1759 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1762 /* verify the packet layout is correct */
1763 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1766 /* probably a little skewed due to removing CRC */
1767 total_rx_bytes += skb->len;
1770 /* populate checksum, timestamp, VLAN, and protocol */
1771 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1774 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1775 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
1776 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1778 dev_kfree_skb_any(skb);
1783 #endif /* IXGBE_FCOE */
1784 ixgbe_rx_skb(q_vector, skb);
1786 /* update budget accounting */
1788 } while (likely(budget));
1791 /* include DDPed FCoE data */
1792 if (ddp_bytes > 0) {
1795 mss = rx_ring->netdev->mtu - sizeof(struct fcoe_hdr) -
1796 sizeof(struct fc_frame_header) -
1797 sizeof(struct fcoe_crc_eof);
1800 total_rx_bytes += ddp_bytes;
1801 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1804 #endif /* IXGBE_FCOE */
1805 u64_stats_update_begin(&rx_ring->syncp);
1806 rx_ring->stats.packets += total_rx_packets;
1807 rx_ring->stats.bytes += total_rx_bytes;
1808 u64_stats_update_end(&rx_ring->syncp);
1809 q_vector->rx.total_packets += total_rx_packets;
1810 q_vector->rx.total_bytes += total_rx_bytes;
1813 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1819 * ixgbe_configure_msix - Configure MSI-X hardware
1820 * @adapter: board private structure
1822 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1825 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1827 struct ixgbe_q_vector *q_vector;
1831 /* Populate MSIX to EITR Select */
1832 if (adapter->num_vfs > 32) {
1833 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1834 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1838 * Populate the IVAR table and set the ITR values to the
1839 * corresponding register.
1841 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1842 struct ixgbe_ring *ring;
1843 q_vector = adapter->q_vector[v_idx];
1845 ixgbe_for_each_ring(ring, q_vector->rx)
1846 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1848 ixgbe_for_each_ring(ring, q_vector->tx)
1849 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1851 if (q_vector->tx.ring && !q_vector->rx.ring) {
1852 /* tx only vector */
1853 if (adapter->tx_itr_setting == 1)
1854 q_vector->itr = IXGBE_10K_ITR;
1856 q_vector->itr = adapter->tx_itr_setting;
1858 /* rx or rx/tx vector */
1859 if (adapter->rx_itr_setting == 1)
1860 q_vector->itr = IXGBE_20K_ITR;
1862 q_vector->itr = adapter->rx_itr_setting;
1865 ixgbe_write_eitr(q_vector);
1868 switch (adapter->hw.mac.type) {
1869 case ixgbe_mac_82598EB:
1870 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1873 case ixgbe_mac_82599EB:
1874 case ixgbe_mac_X540:
1875 ixgbe_set_ivar(adapter, -1, 1, v_idx);
1880 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
1882 /* set up to autoclear timer, and the vectors */
1883 mask = IXGBE_EIMS_ENABLE_MASK;
1884 mask &= ~(IXGBE_EIMS_OTHER |
1885 IXGBE_EIMS_MAILBOX |
1888 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1891 enum latency_range {
1895 latency_invalid = 255
1899 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1900 * @q_vector: structure containing interrupt and ring information
1901 * @ring_container: structure containing ring performance data
1903 * Stores a new ITR value based on packets and byte
1904 * counts during the last interrupt. The advantage of per interrupt
1905 * computation is faster updates and more accurate ITR for the current
1906 * traffic pattern. Constants in this function were computed
1907 * based on theoretical maximum wire speed and thresholds were set based
1908 * on testing data as well as attempting to minimize response time
1909 * while increasing bulk throughput.
1910 * this functionality is controlled by the InterruptThrottleRate module
1911 * parameter (see ixgbe_param.c)
1913 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
1914 struct ixgbe_ring_container *ring_container)
1916 int bytes = ring_container->total_bytes;
1917 int packets = ring_container->total_packets;
1920 u8 itr_setting = ring_container->itr;
1925 /* simple throttlerate management
1926 * 0-10MB/s lowest (100000 ints/s)
1927 * 10-20MB/s low (20000 ints/s)
1928 * 20-1249MB/s bulk (8000 ints/s)
1930 /* what was last interrupt timeslice? */
1931 timepassed_us = q_vector->itr >> 2;
1932 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1934 switch (itr_setting) {
1935 case lowest_latency:
1936 if (bytes_perint > 10)
1937 itr_setting = low_latency;
1940 if (bytes_perint > 20)
1941 itr_setting = bulk_latency;
1942 else if (bytes_perint <= 10)
1943 itr_setting = lowest_latency;
1946 if (bytes_perint <= 20)
1947 itr_setting = low_latency;
1951 /* clear work counters since we have the values we need */
1952 ring_container->total_bytes = 0;
1953 ring_container->total_packets = 0;
1955 /* write updated itr to ring container */
1956 ring_container->itr = itr_setting;
1960 * ixgbe_write_eitr - write EITR register in hardware specific way
1961 * @q_vector: structure containing interrupt and ring information
1963 * This function is made to be called by ethtool and by the driver
1964 * when it needs to update EITR registers at runtime. Hardware
1965 * specific quirks/differences are taken care of here.
1967 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1969 struct ixgbe_adapter *adapter = q_vector->adapter;
1970 struct ixgbe_hw *hw = &adapter->hw;
1971 int v_idx = q_vector->v_idx;
1972 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1974 switch (adapter->hw.mac.type) {
1975 case ixgbe_mac_82598EB:
1976 /* must write high and low 16 bits to reset counter */
1977 itr_reg |= (itr_reg << 16);
1979 case ixgbe_mac_82599EB:
1980 case ixgbe_mac_X540:
1982 * set the WDIS bit to not clear the timer bits and cause an
1983 * immediate assertion of the interrupt
1985 itr_reg |= IXGBE_EITR_CNT_WDIS;
1990 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1993 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
1995 u32 new_itr = q_vector->itr;
1998 ixgbe_update_itr(q_vector, &q_vector->tx);
1999 ixgbe_update_itr(q_vector, &q_vector->rx);
2001 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2003 switch (current_itr) {
2004 /* counts and packets in update_itr are dependent on these numbers */
2005 case lowest_latency:
2006 new_itr = IXGBE_100K_ITR;
2009 new_itr = IXGBE_20K_ITR;
2012 new_itr = IXGBE_8K_ITR;
2018 if (new_itr != q_vector->itr) {
2019 /* do an exponential smoothing */
2020 new_itr = (10 * new_itr * q_vector->itr) /
2021 ((9 * new_itr) + q_vector->itr);
2023 /* save the algorithm value here */
2024 q_vector->itr = new_itr;
2026 ixgbe_write_eitr(q_vector);
2031 * ixgbe_check_overtemp_subtask - check for over temperature
2032 * @adapter: pointer to adapter
2034 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2036 struct ixgbe_hw *hw = &adapter->hw;
2037 u32 eicr = adapter->interrupt_event;
2039 if (test_bit(__IXGBE_DOWN, &adapter->state))
2042 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2043 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2046 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2048 switch (hw->device_id) {
2049 case IXGBE_DEV_ID_82599_T3_LOM:
2051 * Since the warning interrupt is for both ports
2052 * we don't have to check if:
2053 * - This interrupt wasn't for our port.
2054 * - We may have missed the interrupt so always have to
2055 * check if we got a LSC
2057 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2058 !(eicr & IXGBE_EICR_LSC))
2061 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2063 bool link_up = false;
2065 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2071 /* Check if this is not due to overtemp */
2072 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2077 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2082 "Network adapter has been stopped because it has over heated. "
2083 "Restart the computer. If the problem persists, "
2084 "power off the system and replace the adapter\n");
2086 adapter->interrupt_event = 0;
2089 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2091 struct ixgbe_hw *hw = &adapter->hw;
2093 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2094 (eicr & IXGBE_EICR_GPI_SDP1)) {
2095 e_crit(probe, "Fan has stopped, replace the adapter\n");
2096 /* write to clear the interrupt */
2097 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2101 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2103 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2106 switch (adapter->hw.mac.type) {
2107 case ixgbe_mac_82599EB:
2109 * Need to check link state so complete overtemp check
2112 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2113 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2114 adapter->interrupt_event = eicr;
2115 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2116 ixgbe_service_event_schedule(adapter);
2120 case ixgbe_mac_X540:
2121 if (!(eicr & IXGBE_EICR_TS))
2129 "Network adapter has been stopped because it has over heated. "
2130 "Restart the computer. If the problem persists, "
2131 "power off the system and replace the adapter\n");
2134 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2136 struct ixgbe_hw *hw = &adapter->hw;
2138 if (eicr & IXGBE_EICR_GPI_SDP2) {
2139 /* Clear the interrupt */
2140 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2141 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2142 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2143 ixgbe_service_event_schedule(adapter);
2147 if (eicr & IXGBE_EICR_GPI_SDP1) {
2148 /* Clear the interrupt */
2149 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2150 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2151 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2152 ixgbe_service_event_schedule(adapter);
2157 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2159 struct ixgbe_hw *hw = &adapter->hw;
2162 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2163 adapter->link_check_timeout = jiffies;
2164 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2165 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2166 IXGBE_WRITE_FLUSH(hw);
2167 ixgbe_service_event_schedule(adapter);
2171 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2175 struct ixgbe_hw *hw = &adapter->hw;
2177 switch (hw->mac.type) {
2178 case ixgbe_mac_82598EB:
2179 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2180 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2182 case ixgbe_mac_82599EB:
2183 case ixgbe_mac_X540:
2184 mask = (qmask & 0xFFFFFFFF);
2186 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2187 mask = (qmask >> 32);
2189 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2194 /* skip the flush */
2197 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2201 struct ixgbe_hw *hw = &adapter->hw;
2203 switch (hw->mac.type) {
2204 case ixgbe_mac_82598EB:
2205 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2206 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2208 case ixgbe_mac_82599EB:
2209 case ixgbe_mac_X540:
2210 mask = (qmask & 0xFFFFFFFF);
2212 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2213 mask = (qmask >> 32);
2215 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2220 /* skip the flush */
2224 * ixgbe_irq_enable - Enable default interrupt generation settings
2225 * @adapter: board private structure
2227 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2230 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2232 /* don't reenable LSC while waiting for link */
2233 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2234 mask &= ~IXGBE_EIMS_LSC;
2236 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2237 switch (adapter->hw.mac.type) {
2238 case ixgbe_mac_82599EB:
2239 mask |= IXGBE_EIMS_GPI_SDP0;
2241 case ixgbe_mac_X540:
2242 mask |= IXGBE_EIMS_TS;
2247 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2248 mask |= IXGBE_EIMS_GPI_SDP1;
2249 switch (adapter->hw.mac.type) {
2250 case ixgbe_mac_82599EB:
2251 mask |= IXGBE_EIMS_GPI_SDP1;
2252 mask |= IXGBE_EIMS_GPI_SDP2;
2253 case ixgbe_mac_X540:
2254 mask |= IXGBE_EIMS_ECC;
2255 mask |= IXGBE_EIMS_MAILBOX;
2260 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2261 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2262 mask |= IXGBE_EIMS_FLOW_DIR;
2264 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2266 ixgbe_irq_enable_queues(adapter, ~0);
2268 IXGBE_WRITE_FLUSH(&adapter->hw);
2271 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2273 struct ixgbe_adapter *adapter = data;
2274 struct ixgbe_hw *hw = &adapter->hw;
2278 * Workaround for Silicon errata. Use clear-by-write instead
2279 * of clear-by-read. Reading with EICS will return the
2280 * interrupt causes without clearing, which later be done
2281 * with the write to EICR.
2283 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2284 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2286 if (eicr & IXGBE_EICR_LSC)
2287 ixgbe_check_lsc(adapter);
2289 if (eicr & IXGBE_EICR_MAILBOX)
2290 ixgbe_msg_task(adapter);
2292 switch (hw->mac.type) {
2293 case ixgbe_mac_82599EB:
2294 case ixgbe_mac_X540:
2295 if (eicr & IXGBE_EICR_ECC)
2296 e_info(link, "Received unrecoverable ECC Err, please "
2298 /* Handle Flow Director Full threshold interrupt */
2299 if (eicr & IXGBE_EICR_FLOW_DIR) {
2300 int reinit_count = 0;
2302 for (i = 0; i < adapter->num_tx_queues; i++) {
2303 struct ixgbe_ring *ring = adapter->tx_ring[i];
2304 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2309 /* no more flow director interrupts until after init */
2310 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2311 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2312 ixgbe_service_event_schedule(adapter);
2315 ixgbe_check_sfp_event(adapter, eicr);
2316 ixgbe_check_overtemp_event(adapter, eicr);
2322 ixgbe_check_fan_failure(adapter, eicr);
2323 #ifdef CONFIG_IXGBE_PTP
2324 ixgbe_ptp_check_pps_event(adapter, eicr);
2327 /* re-enable the original interrupt state, no lsc, no queues */
2328 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2329 ixgbe_irq_enable(adapter, false, false);
2334 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2336 struct ixgbe_q_vector *q_vector = data;
2338 /* EIAM disabled interrupts (on this vector) for us */
2340 if (q_vector->rx.ring || q_vector->tx.ring)
2341 napi_schedule(&q_vector->napi);
2347 * ixgbe_poll - NAPI Rx polling callback
2348 * @napi: structure for representing this polling device
2349 * @budget: how many packets driver is allowed to clean
2351 * This function is used for legacy and MSI, NAPI mode
2353 int ixgbe_poll(struct napi_struct *napi, int budget)
2355 struct ixgbe_q_vector *q_vector =
2356 container_of(napi, struct ixgbe_q_vector, napi);
2357 struct ixgbe_adapter *adapter = q_vector->adapter;
2358 struct ixgbe_ring *ring;
2359 int per_ring_budget;
2360 bool clean_complete = true;
2362 #ifdef CONFIG_IXGBE_DCA
2363 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2364 ixgbe_update_dca(q_vector);
2367 ixgbe_for_each_ring(ring, q_vector->tx)
2368 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2370 /* attempt to distribute budget to each queue fairly, but don't allow
2371 * the budget to go below 1 because we'll exit polling */
2372 if (q_vector->rx.count > 1)
2373 per_ring_budget = max(budget/q_vector->rx.count, 1);
2375 per_ring_budget = budget;
2377 ixgbe_for_each_ring(ring, q_vector->rx)
2378 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2381 /* If all work not completed, return budget and keep polling */
2382 if (!clean_complete)
2385 /* all work done, exit the polling mode */
2386 napi_complete(napi);
2387 if (adapter->rx_itr_setting & 1)
2388 ixgbe_set_itr(q_vector);
2389 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2390 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2396 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2397 * @adapter: board private structure
2399 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2400 * interrupts from the kernel.
2402 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2404 struct net_device *netdev = adapter->netdev;
2408 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2409 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2410 struct msix_entry *entry = &adapter->msix_entries[vector];
2412 if (q_vector->tx.ring && q_vector->rx.ring) {
2413 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2414 "%s-%s-%d", netdev->name, "TxRx", ri++);
2416 } else if (q_vector->rx.ring) {
2417 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2418 "%s-%s-%d", netdev->name, "rx", ri++);
2419 } else if (q_vector->tx.ring) {
2420 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2421 "%s-%s-%d", netdev->name, "tx", ti++);
2423 /* skip this unused q_vector */
2426 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2427 q_vector->name, q_vector);
2429 e_err(probe, "request_irq failed for MSIX interrupt "
2430 "Error: %d\n", err);
2431 goto free_queue_irqs;
2433 /* If Flow Director is enabled, set interrupt affinity */
2434 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2435 /* assign the mask for this irq */
2436 irq_set_affinity_hint(entry->vector,
2437 &q_vector->affinity_mask);
2441 err = request_irq(adapter->msix_entries[vector].vector,
2442 ixgbe_msix_other, 0, netdev->name, adapter);
2444 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2445 goto free_queue_irqs;
2453 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2455 free_irq(adapter->msix_entries[vector].vector,
2456 adapter->q_vector[vector]);
2458 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2459 pci_disable_msix(adapter->pdev);
2460 kfree(adapter->msix_entries);
2461 adapter->msix_entries = NULL;
2466 * ixgbe_intr - legacy mode Interrupt Handler
2467 * @irq: interrupt number
2468 * @data: pointer to a network interface device structure
2470 static irqreturn_t ixgbe_intr(int irq, void *data)
2472 struct ixgbe_adapter *adapter = data;
2473 struct ixgbe_hw *hw = &adapter->hw;
2474 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2478 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2479 * before the read of EICR.
2481 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2483 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2484 * therefore no explicit interrupt disable is necessary */
2485 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2488 * shared interrupt alert!
2489 * make sure interrupts are enabled because the read will
2490 * have disabled interrupts due to EIAM
2491 * finish the workaround of silicon errata on 82598. Unmask
2492 * the interrupt that we masked before the EICR read.
2494 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2495 ixgbe_irq_enable(adapter, true, true);
2496 return IRQ_NONE; /* Not our interrupt */
2499 if (eicr & IXGBE_EICR_LSC)
2500 ixgbe_check_lsc(adapter);
2502 switch (hw->mac.type) {
2503 case ixgbe_mac_82599EB:
2504 ixgbe_check_sfp_event(adapter, eicr);
2506 case ixgbe_mac_X540:
2507 if (eicr & IXGBE_EICR_ECC)
2508 e_info(link, "Received unrecoverable ECC err, please "
2510 ixgbe_check_overtemp_event(adapter, eicr);
2516 ixgbe_check_fan_failure(adapter, eicr);
2517 #ifdef CONFIG_IXGBE_PTP
2518 ixgbe_ptp_check_pps_event(adapter, eicr);
2521 /* would disable interrupts here but EIAM disabled it */
2522 napi_schedule(&q_vector->napi);
2525 * re-enable link(maybe) and non-queue interrupts, no flush.
2526 * ixgbe_poll will re-enable the queue interrupts
2528 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2529 ixgbe_irq_enable(adapter, false, false);
2535 * ixgbe_request_irq - initialize interrupts
2536 * @adapter: board private structure
2538 * Attempts to configure interrupts using the best available
2539 * capabilities of the hardware and kernel.
2541 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2543 struct net_device *netdev = adapter->netdev;
2546 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2547 err = ixgbe_request_msix_irqs(adapter);
2548 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2549 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2550 netdev->name, adapter);
2552 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2553 netdev->name, adapter);
2556 e_err(probe, "request_irq failed, Error %d\n", err);
2561 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2565 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2566 free_irq(adapter->pdev->irq, adapter);
2570 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2571 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2572 struct msix_entry *entry = &adapter->msix_entries[vector];
2574 /* free only the irqs that were actually requested */
2575 if (!q_vector->rx.ring && !q_vector->tx.ring)
2578 /* clear the affinity_mask in the IRQ descriptor */
2579 irq_set_affinity_hint(entry->vector, NULL);
2581 free_irq(entry->vector, q_vector);
2584 free_irq(adapter->msix_entries[vector++].vector, adapter);
2588 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2589 * @adapter: board private structure
2591 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2593 switch (adapter->hw.mac.type) {
2594 case ixgbe_mac_82598EB:
2595 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2597 case ixgbe_mac_82599EB:
2598 case ixgbe_mac_X540:
2599 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2600 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2601 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2606 IXGBE_WRITE_FLUSH(&adapter->hw);
2607 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2610 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2611 synchronize_irq(adapter->msix_entries[vector].vector);
2613 synchronize_irq(adapter->msix_entries[vector++].vector);
2615 synchronize_irq(adapter->pdev->irq);
2620 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2623 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2625 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2628 if (adapter->rx_itr_setting == 1)
2629 q_vector->itr = IXGBE_20K_ITR;
2631 q_vector->itr = adapter->rx_itr_setting;
2633 ixgbe_write_eitr(q_vector);
2635 ixgbe_set_ivar(adapter, 0, 0, 0);
2636 ixgbe_set_ivar(adapter, 1, 0, 0);
2638 e_info(hw, "Legacy interrupt IVAR setup done\n");
2642 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2643 * @adapter: board private structure
2644 * @ring: structure containing ring specific data
2646 * Configure the Tx descriptor ring after a reset.
2648 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2649 struct ixgbe_ring *ring)
2651 struct ixgbe_hw *hw = &adapter->hw;
2652 u64 tdba = ring->dma;
2654 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2655 u8 reg_idx = ring->reg_idx;
2657 /* disable queue to avoid issues while updating state */
2658 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2659 IXGBE_WRITE_FLUSH(hw);
2661 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2662 (tdba & DMA_BIT_MASK(32)));
2663 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2664 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2665 ring->count * sizeof(union ixgbe_adv_tx_desc));
2666 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2667 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2668 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2671 * set WTHRESH to encourage burst writeback, it should not be set
2672 * higher than 1 when ITR is 0 as it could cause false TX hangs
2674 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2675 * to or less than the number of on chip descriptors, which is
2678 if (!ring->q_vector || (ring->q_vector->itr < 8))
2679 txdctl |= (1 << 16); /* WTHRESH = 1 */
2681 txdctl |= (8 << 16); /* WTHRESH = 8 */
2684 * Setting PTHRESH to 32 both improves performance
2685 * and avoids a TX hang with DFP enabled
2687 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2688 32; /* PTHRESH = 32 */
2690 /* reinitialize flowdirector state */
2691 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2692 adapter->atr_sample_rate) {
2693 ring->atr_sample_rate = adapter->atr_sample_rate;
2694 ring->atr_count = 0;
2695 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2697 ring->atr_sample_rate = 0;
2700 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2703 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2705 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2706 if (hw->mac.type == ixgbe_mac_82598EB &&
2707 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2710 /* poll to verify queue is enabled */
2712 usleep_range(1000, 2000);
2713 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2714 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2716 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2719 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2721 struct ixgbe_hw *hw = &adapter->hw;
2723 u8 tcs = netdev_get_num_tc(adapter->netdev);
2725 if (hw->mac.type == ixgbe_mac_82598EB)
2728 /* disable the arbiter while setting MTQC */
2729 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2730 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2731 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2733 /* set transmit pool layout */
2734 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2735 mtqc = IXGBE_MTQC_VT_ENA;
2737 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2739 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2740 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2741 mtqc |= IXGBE_MTQC_32VF;
2743 mtqc |= IXGBE_MTQC_64VF;
2746 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2748 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2750 mtqc = IXGBE_MTQC_64Q_1PB;
2753 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
2755 /* Enable Security TX Buffer IFG for multiple pb */
2757 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2758 sectx |= IXGBE_SECTX_DCB;
2759 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
2762 /* re-enable the arbiter */
2763 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2764 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2768 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2769 * @adapter: board private structure
2771 * Configure the Tx unit of the MAC after a reset.
2773 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2775 struct ixgbe_hw *hw = &adapter->hw;
2779 ixgbe_setup_mtqc(adapter);
2781 if (hw->mac.type != ixgbe_mac_82598EB) {
2782 /* DMATXCTL.EN must be before Tx queues are enabled */
2783 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2784 dmatxctl |= IXGBE_DMATXCTL_TE;
2785 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2788 /* Setup the HW Tx Head and Tail descriptor pointers */
2789 for (i = 0; i < adapter->num_tx_queues; i++)
2790 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2793 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2794 struct ixgbe_ring *ring)
2796 struct ixgbe_hw *hw = &adapter->hw;
2797 u8 reg_idx = ring->reg_idx;
2798 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2800 srrctl |= IXGBE_SRRCTL_DROP_EN;
2802 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2805 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2806 struct ixgbe_ring *ring)
2808 struct ixgbe_hw *hw = &adapter->hw;
2809 u8 reg_idx = ring->reg_idx;
2810 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2812 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2814 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2817 #ifdef CONFIG_IXGBE_DCB
2818 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2820 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2824 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2826 if (adapter->ixgbe_ieee_pfc)
2827 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2830 * We should set the drop enable bit if:
2833 * Number of Rx queues > 1 and flow control is disabled
2835 * This allows us to avoid head of line blocking for security
2836 * and performance reasons.
2838 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2839 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2840 for (i = 0; i < adapter->num_rx_queues; i++)
2841 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2843 for (i = 0; i < adapter->num_rx_queues; i++)
2844 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2848 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2850 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2851 struct ixgbe_ring *rx_ring)
2853 struct ixgbe_hw *hw = &adapter->hw;
2855 u8 reg_idx = rx_ring->reg_idx;
2857 if (hw->mac.type == ixgbe_mac_82598EB) {
2858 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
2861 * if VMDq is not active we must program one srrctl register
2862 * per RSS queue since we have enabled RDRXCTL.MVMEN
2867 /* configure header buffer length, needed for RSC */
2868 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
2870 /* configure the packet buffer length */
2871 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2872 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2874 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2877 /* configure descriptor type */
2878 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
2880 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2883 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2885 struct ixgbe_hw *hw = &adapter->hw;
2886 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2887 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2888 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2889 u32 mrqc = 0, reta = 0;
2892 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2894 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2898 * Program table for at least 2 queues w/ SR-IOV so that VFs can
2899 * make full use of any rings they may have. We will use the
2900 * PSRTYPE register to control how many rings we use within the PF.
2902 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
2905 /* Fill out hash function seeds */
2906 for (i = 0; i < 10; i++)
2907 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2909 /* Fill out redirection table */
2910 for (i = 0, j = 0; i < 128; i++, j++) {
2913 /* reta = 4-byte sliding window of
2914 * 0x00..(indices-1)(indices-1)00..etc. */
2915 reta = (reta << 8) | (j * 0x11);
2917 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2920 /* Disable indicating checksum in descriptor, enables RSS hash */
2921 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2922 rxcsum |= IXGBE_RXCSUM_PCSD;
2923 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2925 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2926 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
2927 mrqc = IXGBE_MRQC_RSSEN;
2929 u8 tcs = netdev_get_num_tc(adapter->netdev);
2931 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2933 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
2935 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
2936 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2937 mrqc = IXGBE_MRQC_VMDQRSS32EN;
2939 mrqc = IXGBE_MRQC_VMDQRSS64EN;
2942 mrqc = IXGBE_MRQC_RTRSS8TCEN;
2944 mrqc = IXGBE_MRQC_RTRSS4TCEN;
2946 mrqc = IXGBE_MRQC_RSSEN;
2950 /* Perform hash on these packet types */
2951 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
2952 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
2953 IXGBE_MRQC_RSS_FIELD_IPV6 |
2954 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2956 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2957 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2958 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2959 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2961 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2965 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2966 * @adapter: address of board private structure
2967 * @index: index of ring to set
2969 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
2970 struct ixgbe_ring *ring)
2972 struct ixgbe_hw *hw = &adapter->hw;
2974 u8 reg_idx = ring->reg_idx;
2976 if (!ring_is_rsc_enabled(ring))
2979 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
2980 rscctrl |= IXGBE_RSCCTL_RSCEN;
2982 * we must limit the number of descriptors so that the
2983 * total size of max desc * buf_len is not greater
2986 #if (PAGE_SIZE <= 8192)
2987 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2988 #elif (PAGE_SIZE <= 16384)
2989 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2991 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2993 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
2996 #define IXGBE_MAX_RX_DESC_POLL 10
2997 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2998 struct ixgbe_ring *ring)
3000 struct ixgbe_hw *hw = &adapter->hw;
3001 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3003 u8 reg_idx = ring->reg_idx;
3005 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3006 if (hw->mac.type == ixgbe_mac_82598EB &&
3007 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3011 usleep_range(1000, 2000);
3012 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3013 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3016 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3017 "the polling period\n", reg_idx);
3021 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3022 struct ixgbe_ring *ring)
3024 struct ixgbe_hw *hw = &adapter->hw;
3025 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3027 u8 reg_idx = ring->reg_idx;
3029 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3030 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3032 /* write value back with RXDCTL.ENABLE bit cleared */
3033 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3035 if (hw->mac.type == ixgbe_mac_82598EB &&
3036 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3039 /* the hardware may take up to 100us to really disable the rx queue */
3042 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3043 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3046 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3047 "the polling period\n", reg_idx);
3051 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3052 struct ixgbe_ring *ring)
3054 struct ixgbe_hw *hw = &adapter->hw;
3055 u64 rdba = ring->dma;
3057 u8 reg_idx = ring->reg_idx;
3059 /* disable queue to avoid issues while updating state */
3060 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3061 ixgbe_disable_rx_queue(adapter, ring);
3063 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3064 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3065 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3066 ring->count * sizeof(union ixgbe_adv_rx_desc));
3067 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3068 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3069 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3071 ixgbe_configure_srrctl(adapter, ring);
3072 ixgbe_configure_rscctl(adapter, ring);
3074 /* If operating in IOV mode set RLPML for X540 */
3075 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3076 hw->mac.type == ixgbe_mac_X540) {
3077 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
3078 rxdctl |= ((ring->netdev->mtu + ETH_HLEN +
3079 ETH_FCS_LEN + VLAN_HLEN) | IXGBE_RXDCTL_RLPML_EN);
3082 if (hw->mac.type == ixgbe_mac_82598EB) {
3084 * enable cache line friendly hardware writes:
3085 * PTHRESH=32 descriptors (half the internal cache),
3086 * this also removes ugly rx_no_buffer_count increment
3087 * HTHRESH=4 descriptors (to minimize latency on fetch)
3088 * WTHRESH=8 burst writeback up to two cache lines
3090 rxdctl &= ~0x3FFFFF;
3094 /* enable receive descriptor ring */
3095 rxdctl |= IXGBE_RXDCTL_ENABLE;
3096 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3098 ixgbe_rx_desc_queue_enable(adapter, ring);
3099 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3102 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3104 struct ixgbe_hw *hw = &adapter->hw;
3107 /* PSRTYPE must be initialized in non 82598 adapters */
3108 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3109 IXGBE_PSRTYPE_UDPHDR |
3110 IXGBE_PSRTYPE_IPV4HDR |
3111 IXGBE_PSRTYPE_L2HDR |
3112 IXGBE_PSRTYPE_IPV6HDR;
3114 if (hw->mac.type == ixgbe_mac_82598EB)
3117 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3118 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3125 for (p = 0; p < adapter->num_rx_pools; p++)
3126 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(adapter->num_vfs + p),
3130 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3132 struct ixgbe_hw *hw = &adapter->hw;
3133 u32 reg_offset, vf_shift;
3134 u32 gcr_ext, vmdctl;
3137 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3140 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3141 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3142 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3143 vmdctl |= (adapter->num_vfs << IXGBE_VT_CTL_POOL_SHIFT);
3144 vmdctl |= IXGBE_VT_CTL_REPLEN;
3145 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3147 vf_shift = adapter->num_vfs % 32;
3148 reg_offset = (adapter->num_vfs >= 32) ? 1 : 0;
3150 /* Enable only the PF's pool for Tx/Rx */
3151 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3152 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3153 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3154 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3155 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3157 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3158 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
3161 * Set up VF register offsets for selected VT Mode,
3162 * i.e. 32 or 64 VFs for SR-IOV
3164 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3165 case IXGBE_82599_VMDQ_8Q_MASK:
3166 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3168 case IXGBE_82599_VMDQ_4Q_MASK:
3169 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3172 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3176 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3178 /* enable Tx loopback for VF/PF communication */
3179 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3181 /* Enable MAC Anti-Spoofing */
3182 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3184 /* For VFs that have spoof checking turned off */
3185 for (i = 0; i < adapter->num_vfs; i++) {
3186 if (!adapter->vfinfo[i].spoofchk_enabled)
3187 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3191 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3193 struct ixgbe_hw *hw = &adapter->hw;
3194 struct net_device *netdev = adapter->netdev;
3195 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3196 struct ixgbe_ring *rx_ring;
3201 /* adjust max frame to be able to do baby jumbo for FCoE */
3202 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3203 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3204 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3206 #endif /* IXGBE_FCOE */
3207 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3208 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3209 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3210 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3212 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3215 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3216 max_frame += VLAN_HLEN;
3218 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3219 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3220 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3221 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3224 * Setup the HW Rx Head and Tail Descriptor Pointers and
3225 * the Base and Length of the Rx Descriptor Ring
3227 for (i = 0; i < adapter->num_rx_queues; i++) {
3228 rx_ring = adapter->rx_ring[i];
3229 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3230 set_ring_rsc_enabled(rx_ring);
3232 clear_ring_rsc_enabled(rx_ring);
3236 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3238 struct ixgbe_hw *hw = &adapter->hw;
3239 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3241 switch (hw->mac.type) {
3242 case ixgbe_mac_82598EB:
3244 * For VMDq support of different descriptor types or
3245 * buffer sizes through the use of multiple SRRCTL
3246 * registers, RDRXCTL.MVMEN must be set to 1
3248 * also, the manual doesn't mention it clearly but DCA hints
3249 * will only use queue 0's tags unless this bit is set. Side
3250 * effects of setting this bit are only that SRRCTL must be
3251 * fully programmed [0..15]
3253 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3255 case ixgbe_mac_82599EB:
3256 case ixgbe_mac_X540:
3257 /* Disable RSC for ACK packets */
3258 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3259 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3260 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3261 /* hardware requires some bits to be set by default */
3262 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3263 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3266 /* We should do nothing since we don't know this hardware */
3270 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3274 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3275 * @adapter: board private structure
3277 * Configure the Rx unit of the MAC after a reset.
3279 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3281 struct ixgbe_hw *hw = &adapter->hw;
3285 /* disable receives while setting up the descriptors */
3286 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3287 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3289 ixgbe_setup_psrtype(adapter);
3290 ixgbe_setup_rdrxctl(adapter);
3292 /* Program registers for the distribution of queues */
3293 ixgbe_setup_mrqc(adapter);
3295 /* set_rx_buffer_len must be called before ring initialization */
3296 ixgbe_set_rx_buffer_len(adapter);
3299 * Setup the HW Rx Head and Tail Descriptor Pointers and
3300 * the Base and Length of the Rx Descriptor Ring
3302 for (i = 0; i < adapter->num_rx_queues; i++)
3303 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3305 /* disable drop enable for 82598 parts */
3306 if (hw->mac.type == ixgbe_mac_82598EB)
3307 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3309 /* enable all receives */
3310 rxctrl |= IXGBE_RXCTRL_RXEN;
3311 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3314 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3316 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3317 struct ixgbe_hw *hw = &adapter->hw;
3318 int pool_ndx = adapter->num_vfs;
3320 /* add VID to filter table */
3321 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
3322 set_bit(vid, adapter->active_vlans);
3327 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3329 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3330 struct ixgbe_hw *hw = &adapter->hw;
3331 int pool_ndx = adapter->num_vfs;
3333 /* remove VID from filter table */
3334 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
3335 clear_bit(vid, adapter->active_vlans);
3341 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3342 * @adapter: driver data
3344 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3346 struct ixgbe_hw *hw = &adapter->hw;
3349 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3350 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3351 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3355 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3356 * @adapter: driver data
3358 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3360 struct ixgbe_hw *hw = &adapter->hw;
3363 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3364 vlnctrl |= IXGBE_VLNCTRL_VFE;
3365 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3366 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3370 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3371 * @adapter: driver data
3373 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3375 struct ixgbe_hw *hw = &adapter->hw;
3379 switch (hw->mac.type) {
3380 case ixgbe_mac_82598EB:
3381 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3382 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3383 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3385 case ixgbe_mac_82599EB:
3386 case ixgbe_mac_X540:
3387 for (i = 0; i < adapter->num_rx_queues; i++) {
3388 j = adapter->rx_ring[i]->reg_idx;
3389 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3390 vlnctrl &= ~IXGBE_RXDCTL_VME;
3391 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3400 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3401 * @adapter: driver data
3403 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3405 struct ixgbe_hw *hw = &adapter->hw;
3409 switch (hw->mac.type) {
3410 case ixgbe_mac_82598EB:
3411 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3412 vlnctrl |= IXGBE_VLNCTRL_VME;
3413 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3415 case ixgbe_mac_82599EB:
3416 case ixgbe_mac_X540:
3417 for (i = 0; i < adapter->num_rx_queues; i++) {
3418 j = adapter->rx_ring[i]->reg_idx;
3419 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3420 vlnctrl |= IXGBE_RXDCTL_VME;
3421 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3429 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3433 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3435 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3436 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3440 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3441 * @netdev: network interface device structure
3443 * Writes unicast address list to the RAR table.
3444 * Returns: -ENOMEM on failure/insufficient address space
3445 * 0 on no addresses written
3446 * X on writing X addresses to the RAR table
3448 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3450 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3451 struct ixgbe_hw *hw = &adapter->hw;
3452 unsigned int vfn = adapter->num_vfs;
3453 unsigned int rar_entries = IXGBE_MAX_PF_MACVLANS;
3456 /* return ENOMEM indicating insufficient memory for addresses */
3457 if (netdev_uc_count(netdev) > rar_entries)
3460 if (!netdev_uc_empty(netdev) && rar_entries) {
3461 struct netdev_hw_addr *ha;
3462 /* return error if we do not support writing to RAR table */
3463 if (!hw->mac.ops.set_rar)
3466 netdev_for_each_uc_addr(ha, netdev) {
3469 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3474 /* write the addresses in reverse order to avoid write combining */
3475 for (; rar_entries > 0 ; rar_entries--)
3476 hw->mac.ops.clear_rar(hw, rar_entries);
3482 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3483 * @netdev: network interface device structure
3485 * The set_rx_method entry point is called whenever the unicast/multicast
3486 * address list or the network interface flags are updated. This routine is
3487 * responsible for configuring the hardware for proper unicast, multicast and
3490 void ixgbe_set_rx_mode(struct net_device *netdev)
3492 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3493 struct ixgbe_hw *hw = &adapter->hw;
3494 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3497 /* Check for Promiscuous and All Multicast modes */
3499 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3501 /* set all bits that we expect to always be set */
3502 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3503 fctrl |= IXGBE_FCTRL_BAM;
3504 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3505 fctrl |= IXGBE_FCTRL_PMCF;
3507 /* clear the bits we are changing the status of */
3508 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3510 if (netdev->flags & IFF_PROMISC) {
3511 hw->addr_ctrl.user_set_promisc = true;
3512 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3513 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3514 /* don't hardware filter vlans in promisc mode */
3515 ixgbe_vlan_filter_disable(adapter);
3517 if (netdev->flags & IFF_ALLMULTI) {
3518 fctrl |= IXGBE_FCTRL_MPE;
3519 vmolr |= IXGBE_VMOLR_MPE;
3522 * Write addresses to the MTA, if the attempt fails
3523 * then we should just turn on promiscuous mode so
3524 * that we can at least receive multicast traffic
3526 hw->mac.ops.update_mc_addr_list(hw, netdev);
3527 vmolr |= IXGBE_VMOLR_ROMPE;
3529 ixgbe_vlan_filter_enable(adapter);
3530 hw->addr_ctrl.user_set_promisc = false;
3534 * Write addresses to available RAR registers, if there is not
3535 * sufficient space to store all the addresses then enable
3536 * unicast promiscuous mode
3538 count = ixgbe_write_uc_addr_list(netdev);
3540 fctrl |= IXGBE_FCTRL_UPE;
3541 vmolr |= IXGBE_VMOLR_ROPE;
3544 if (adapter->num_vfs) {
3545 ixgbe_restore_vf_multicasts(adapter);
3546 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3547 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3549 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
3552 /* This is useful for sniffing bad packets. */
3553 if (adapter->netdev->features & NETIF_F_RXALL) {
3554 /* UPE and MPE will be handled by normal PROMISC logic
3555 * in e1000e_set_rx_mode */
3556 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3557 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3558 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3560 fctrl &= ~(IXGBE_FCTRL_DPF);
3561 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3564 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3566 if (netdev->features & NETIF_F_HW_VLAN_RX)
3567 ixgbe_vlan_strip_enable(adapter);
3569 ixgbe_vlan_strip_disable(adapter);
3572 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3576 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3577 napi_enable(&adapter->q_vector[q_idx]->napi);
3580 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3584 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3585 napi_disable(&adapter->q_vector[q_idx]->napi);
3588 #ifdef CONFIG_IXGBE_DCB
3590 * ixgbe_configure_dcb - Configure DCB hardware
3591 * @adapter: ixgbe adapter struct
3593 * This is called by the driver on open to configure the DCB hardware.
3594 * This is also called by the gennetlink interface when reconfiguring
3597 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3599 struct ixgbe_hw *hw = &adapter->hw;
3600 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3602 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3603 if (hw->mac.type == ixgbe_mac_82598EB)
3604 netif_set_gso_max_size(adapter->netdev, 65536);
3608 if (hw->mac.type == ixgbe_mac_82598EB)
3609 netif_set_gso_max_size(adapter->netdev, 32768);
3611 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3614 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3615 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3618 /* reconfigure the hardware */
3619 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3620 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3622 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3624 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3625 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3626 ixgbe_dcb_hw_ets(&adapter->hw,
3627 adapter->ixgbe_ieee_ets,
3629 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3630 adapter->ixgbe_ieee_pfc->pfc_en,
3631 adapter->ixgbe_ieee_ets->prio_tc);
3634 /* Enable RSS Hash per TC */
3635 if (hw->mac.type != ixgbe_mac_82598EB) {
3637 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
3644 /* write msb to all 8 TCs in one write */
3645 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
3650 /* Additional bittime to account for IXGBE framing */
3651 #define IXGBE_ETH_FRAMING 20
3654 * ixgbe_hpbthresh - calculate high water mark for flow control
3656 * @adapter: board private structure to calculate for
3657 * @pb: packet buffer to calculate
3659 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3661 struct ixgbe_hw *hw = &adapter->hw;
3662 struct net_device *dev = adapter->netdev;
3663 int link, tc, kb, marker;
3666 /* Calculate max LAN frame size */
3667 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3670 /* FCoE traffic class uses FCOE jumbo frames */
3671 if ((dev->features & NETIF_F_FCOE_MTU) &&
3672 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
3673 (pb == ixgbe_fcoe_get_tc(adapter)))
3674 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3677 /* Calculate delay value for device */
3678 switch (hw->mac.type) {
3679 case ixgbe_mac_X540:
3680 dv_id = IXGBE_DV_X540(link, tc);
3683 dv_id = IXGBE_DV(link, tc);
3687 /* Loopback switch introduces additional latency */
3688 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3689 dv_id += IXGBE_B2BT(tc);
3691 /* Delay value is calculated in bit times convert to KB */
3692 kb = IXGBE_BT2KB(dv_id);
3693 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3695 marker = rx_pba - kb;
3697 /* It is possible that the packet buffer is not large enough
3698 * to provide required headroom. In this case throw an error
3699 * to user and a do the best we can.
3702 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3703 "headroom to support flow control."
3704 "Decrease MTU or number of traffic classes\n", pb);
3712 * ixgbe_lpbthresh - calculate low water mark for for flow control
3714 * @adapter: board private structure to calculate for
3715 * @pb: packet buffer to calculate
3717 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3719 struct ixgbe_hw *hw = &adapter->hw;
3720 struct net_device *dev = adapter->netdev;
3724 /* Calculate max LAN frame size */
3725 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3727 /* Calculate delay value for device */
3728 switch (hw->mac.type) {
3729 case ixgbe_mac_X540:
3730 dv_id = IXGBE_LOW_DV_X540(tc);
3733 dv_id = IXGBE_LOW_DV(tc);
3737 /* Delay value is calculated in bit times convert to KB */
3738 return IXGBE_BT2KB(dv_id);
3742 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3744 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3746 struct ixgbe_hw *hw = &adapter->hw;
3747 int num_tc = netdev_get_num_tc(adapter->netdev);
3753 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3755 for (i = 0; i < num_tc; i++) {
3756 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3758 /* Low water marks must not be larger than high water marks */
3759 if (hw->fc.low_water > hw->fc.high_water[i])
3760 hw->fc.low_water = 0;
3764 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3766 struct ixgbe_hw *hw = &adapter->hw;
3768 u8 tc = netdev_get_num_tc(adapter->netdev);
3770 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3771 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3772 hdrm = 32 << adapter->fdir_pballoc;
3776 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3777 ixgbe_pbthresh_setup(adapter);
3780 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3782 struct ixgbe_hw *hw = &adapter->hw;
3783 struct hlist_node *node, *node2;
3784 struct ixgbe_fdir_filter *filter;
3786 spin_lock(&adapter->fdir_perfect_lock);
3788 if (!hlist_empty(&adapter->fdir_filter_list))
3789 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3791 hlist_for_each_entry_safe(filter, node, node2,
3792 &adapter->fdir_filter_list, fdir_node) {
3793 ixgbe_fdir_write_perfect_filter_82599(hw,
3796 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3797 IXGBE_FDIR_DROP_QUEUE :
3798 adapter->rx_ring[filter->action]->reg_idx);
3801 spin_unlock(&adapter->fdir_perfect_lock);
3804 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3806 struct ixgbe_hw *hw = &adapter->hw;
3808 ixgbe_configure_pb(adapter);
3809 #ifdef CONFIG_IXGBE_DCB
3810 ixgbe_configure_dcb(adapter);
3813 ixgbe_set_rx_mode(adapter->netdev);
3814 ixgbe_restore_vlan(adapter);
3817 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
3818 ixgbe_configure_fcoe(adapter);
3820 #endif /* IXGBE_FCOE */
3822 switch (hw->mac.type) {
3823 case ixgbe_mac_82599EB:
3824 case ixgbe_mac_X540:
3825 hw->mac.ops.disable_rx_buff(hw);
3831 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3832 ixgbe_init_fdir_signature_82599(&adapter->hw,
3833 adapter->fdir_pballoc);
3834 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3835 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3836 adapter->fdir_pballoc);
3837 ixgbe_fdir_filter_restore(adapter);
3840 switch (hw->mac.type) {
3841 case ixgbe_mac_82599EB:
3842 case ixgbe_mac_X540:
3843 hw->mac.ops.enable_rx_buff(hw);
3849 ixgbe_configure_virtualization(adapter);
3851 ixgbe_configure_tx(adapter);
3852 ixgbe_configure_rx(adapter);
3855 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3857 switch (hw->phy.type) {
3858 case ixgbe_phy_sfp_avago:
3859 case ixgbe_phy_sfp_ftl:
3860 case ixgbe_phy_sfp_intel:
3861 case ixgbe_phy_sfp_unknown:
3862 case ixgbe_phy_sfp_passive_tyco:
3863 case ixgbe_phy_sfp_passive_unknown:
3864 case ixgbe_phy_sfp_active_unknown:
3865 case ixgbe_phy_sfp_ftl_active:
3868 if (hw->mac.type == ixgbe_mac_82598EB)
3876 * ixgbe_sfp_link_config - set up SFP+ link
3877 * @adapter: pointer to private adapter struct
3879 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3882 * We are assuming the worst case scenario here, and that
3883 * is that an SFP was inserted/removed after the reset
3884 * but before SFP detection was enabled. As such the best
3885 * solution is to just start searching as soon as we start
3887 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3888 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
3890 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
3894 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3895 * @hw: pointer to private hardware struct
3897 * Returns 0 on success, negative on failure
3899 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
3902 bool negotiation, link_up = false;
3903 u32 ret = IXGBE_ERR_LINK_SETUP;
3905 if (hw->mac.ops.check_link)
3906 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3911 autoneg = hw->phy.autoneg_advertised;
3912 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
3913 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3918 if (hw->mac.ops.setup_link)
3919 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
3924 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
3926 struct ixgbe_hw *hw = &adapter->hw;
3929 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3930 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
3932 gpie |= IXGBE_GPIE_EIAME;
3934 * use EIAM to auto-mask when MSI-X interrupt is asserted
3935 * this saves a register write for every interrupt
3937 switch (hw->mac.type) {
3938 case ixgbe_mac_82598EB:
3939 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3941 case ixgbe_mac_82599EB:
3942 case ixgbe_mac_X540:
3944 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3945 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3949 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3950 * specifically only auto mask tx and rx interrupts */
3951 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3954 /* XXX: to interrupt immediately for EICS writes, enable this */
3955 /* gpie |= IXGBE_GPIE_EIMEN; */
3957 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3958 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
3960 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3961 case IXGBE_82599_VMDQ_8Q_MASK:
3962 gpie |= IXGBE_GPIE_VTMODE_16;
3964 case IXGBE_82599_VMDQ_4Q_MASK:
3965 gpie |= IXGBE_GPIE_VTMODE_32;
3968 gpie |= IXGBE_GPIE_VTMODE_64;
3973 /* Enable Thermal over heat sensor interrupt */
3974 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
3975 switch (adapter->hw.mac.type) {
3976 case ixgbe_mac_82599EB:
3977 gpie |= IXGBE_SDP0_GPIEN;
3979 case ixgbe_mac_X540:
3980 gpie |= IXGBE_EIMS_TS;
3987 /* Enable fan failure interrupt */
3988 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3989 gpie |= IXGBE_SDP1_GPIEN;
3991 if (hw->mac.type == ixgbe_mac_82599EB) {
3992 gpie |= IXGBE_SDP1_GPIEN;
3993 gpie |= IXGBE_SDP2_GPIEN;
3996 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3999 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4001 struct ixgbe_hw *hw = &adapter->hw;
4005 ixgbe_get_hw_control(adapter);
4006 ixgbe_setup_gpie(adapter);
4008 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4009 ixgbe_configure_msix(adapter);
4011 ixgbe_configure_msi_and_legacy(adapter);
4013 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
4014 if (hw->mac.ops.enable_tx_laser &&
4015 ((hw->phy.multispeed_fiber) ||
4016 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4017 (hw->mac.type == ixgbe_mac_82599EB))))
4018 hw->mac.ops.enable_tx_laser(hw);
4020 clear_bit(__IXGBE_DOWN, &adapter->state);
4021 ixgbe_napi_enable_all(adapter);
4023 if (ixgbe_is_sfp(hw)) {
4024 ixgbe_sfp_link_config(adapter);
4026 err = ixgbe_non_sfp_link_config(hw);
4028 e_err(probe, "link_config FAILED %d\n", err);
4031 /* clear any pending interrupts, may auto mask */
4032 IXGBE_READ_REG(hw, IXGBE_EICR);
4033 ixgbe_irq_enable(adapter, true, true);
4036 * If this adapter has a fan, check to see if we had a failure
4037 * before we enabled the interrupt.
4039 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4040 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4041 if (esdp & IXGBE_ESDP_SDP1)
4042 e_crit(drv, "Fan has stopped, replace the adapter\n");
4045 /* enable transmits */
4046 netif_tx_start_all_queues(adapter->netdev);
4048 /* bring the link up in the watchdog, this could race with our first
4049 * link up interrupt but shouldn't be a problem */
4050 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4051 adapter->link_check_timeout = jiffies;
4052 mod_timer(&adapter->service_timer, jiffies);
4054 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4055 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4056 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4057 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4060 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4062 WARN_ON(in_interrupt());
4063 /* put off any impending NetWatchDogTimeout */
4064 adapter->netdev->trans_start = jiffies;
4066 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4067 usleep_range(1000, 2000);
4068 ixgbe_down(adapter);
4070 * If SR-IOV enabled then wait a bit before bringing the adapter
4071 * back up to give the VFs time to respond to the reset. The
4072 * two second wait is based upon the watchdog timer cycle in
4075 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4078 clear_bit(__IXGBE_RESETTING, &adapter->state);
4081 void ixgbe_up(struct ixgbe_adapter *adapter)
4083 /* hardware has been reset, we need to reload some things */
4084 ixgbe_configure(adapter);
4086 ixgbe_up_complete(adapter);
4089 void ixgbe_reset(struct ixgbe_adapter *adapter)
4091 struct ixgbe_hw *hw = &adapter->hw;
4094 /* lock SFP init bit to prevent race conditions with the watchdog */
4095 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4096 usleep_range(1000, 2000);
4098 /* clear all SFP and link config related flags while holding SFP_INIT */
4099 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4100 IXGBE_FLAG2_SFP_NEEDS_RESET);
4101 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4103 err = hw->mac.ops.init_hw(hw);
4106 case IXGBE_ERR_SFP_NOT_PRESENT:
4107 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4109 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4110 e_dev_err("master disable timed out\n");
4112 case IXGBE_ERR_EEPROM_VERSION:
4113 /* We are running on a pre-production device, log a warning */
4114 e_dev_warn("This device is a pre-production adapter/LOM. "
4115 "Please be aware there may be issues associated with "
4116 "your hardware. If you are experiencing problems "
4117 "please contact your Intel or hardware "
4118 "representative who provided you with this "
4122 e_dev_err("Hardware Error: %d\n", err);
4125 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4127 /* reprogram the RAR[0] in case user changed it. */
4128 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
4133 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4134 * @rx_ring: ring to setup
4136 * On many IA platforms the L1 cache has a critical stride of 4K, this
4137 * results in each receive buffer starting in the same cache set. To help
4138 * reduce the pressure on this cache set we can interleave the offsets so
4139 * that only every other buffer will be in the same cache set.
4141 static void ixgbe_init_rx_page_offset(struct ixgbe_ring *rx_ring)
4143 struct ixgbe_rx_buffer *rx_buffer = rx_ring->rx_buffer_info;
4146 for (i = 0; i < rx_ring->count; i += 2) {
4147 rx_buffer[0].page_offset = 0;
4148 rx_buffer[1].page_offset = ixgbe_rx_bufsz(rx_ring);
4149 rx_buffer = &rx_buffer[2];
4154 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4155 * @rx_ring: ring to free buffers from
4157 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4159 struct device *dev = rx_ring->dev;
4163 /* ring already cleared, nothing to do */
4164 if (!rx_ring->rx_buffer_info)
4167 /* Free all the Rx ring sk_buffs */
4168 for (i = 0; i < rx_ring->count; i++) {
4169 struct ixgbe_rx_buffer *rx_buffer;
4171 rx_buffer = &rx_ring->rx_buffer_info[i];
4172 if (rx_buffer->skb) {
4173 struct sk_buff *skb = rx_buffer->skb;
4174 if (IXGBE_CB(skb)->page_released) {
4177 ixgbe_rx_bufsz(rx_ring),
4179 IXGBE_CB(skb)->page_released = false;
4183 rx_buffer->skb = NULL;
4185 dma_unmap_page(dev, rx_buffer->dma,
4186 ixgbe_rx_pg_size(rx_ring),
4189 if (rx_buffer->page)
4190 __free_pages(rx_buffer->page,
4191 ixgbe_rx_pg_order(rx_ring));
4192 rx_buffer->page = NULL;
4195 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4196 memset(rx_ring->rx_buffer_info, 0, size);
4198 ixgbe_init_rx_page_offset(rx_ring);
4200 /* Zero out the descriptor ring */
4201 memset(rx_ring->desc, 0, rx_ring->size);
4203 rx_ring->next_to_alloc = 0;
4204 rx_ring->next_to_clean = 0;
4205 rx_ring->next_to_use = 0;
4209 * ixgbe_clean_tx_ring - Free Tx Buffers
4210 * @tx_ring: ring to be cleaned
4212 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4214 struct ixgbe_tx_buffer *tx_buffer_info;
4218 /* ring already cleared, nothing to do */
4219 if (!tx_ring->tx_buffer_info)
4222 /* Free all the Tx ring sk_buffs */
4223 for (i = 0; i < tx_ring->count; i++) {
4224 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4225 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4228 netdev_tx_reset_queue(txring_txq(tx_ring));
4230 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4231 memset(tx_ring->tx_buffer_info, 0, size);
4233 /* Zero out the descriptor ring */
4234 memset(tx_ring->desc, 0, tx_ring->size);
4236 tx_ring->next_to_use = 0;
4237 tx_ring->next_to_clean = 0;
4241 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4242 * @adapter: board private structure
4244 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4248 for (i = 0; i < adapter->num_rx_queues; i++)
4249 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4253 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4254 * @adapter: board private structure
4256 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4260 for (i = 0; i < adapter->num_tx_queues; i++)
4261 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4264 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4266 struct hlist_node *node, *node2;
4267 struct ixgbe_fdir_filter *filter;
4269 spin_lock(&adapter->fdir_perfect_lock);
4271 hlist_for_each_entry_safe(filter, node, node2,
4272 &adapter->fdir_filter_list, fdir_node) {
4273 hlist_del(&filter->fdir_node);
4276 adapter->fdir_filter_count = 0;
4278 spin_unlock(&adapter->fdir_perfect_lock);
4281 void ixgbe_down(struct ixgbe_adapter *adapter)
4283 struct net_device *netdev = adapter->netdev;
4284 struct ixgbe_hw *hw = &adapter->hw;
4288 /* signal that we are down to the interrupt handler */
4289 set_bit(__IXGBE_DOWN, &adapter->state);
4291 /* disable receives */
4292 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4293 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4295 /* disable all enabled rx queues */
4296 for (i = 0; i < adapter->num_rx_queues; i++)
4297 /* this call also flushes the previous write */
4298 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4300 usleep_range(10000, 20000);
4302 netif_tx_stop_all_queues(netdev);
4304 /* call carrier off first to avoid false dev_watchdog timeouts */
4305 netif_carrier_off(netdev);
4306 netif_tx_disable(netdev);
4308 ixgbe_irq_disable(adapter);
4310 ixgbe_napi_disable_all(adapter);
4312 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4313 IXGBE_FLAG2_RESET_REQUESTED);
4314 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4316 del_timer_sync(&adapter->service_timer);
4318 if (adapter->num_vfs) {
4319 /* Clear EITR Select mapping */
4320 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4322 /* Mark all the VFs as inactive */
4323 for (i = 0 ; i < adapter->num_vfs; i++)
4324 adapter->vfinfo[i].clear_to_send = false;
4326 /* ping all the active vfs to let them know we are going down */
4327 ixgbe_ping_all_vfs(adapter);
4329 /* Disable all VFTE/VFRE TX/RX */
4330 ixgbe_disable_tx_rx(adapter);
4333 /* disable transmits in the hardware now that interrupts are off */
4334 for (i = 0; i < adapter->num_tx_queues; i++) {
4335 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4336 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4339 /* Disable the Tx DMA engine on 82599 and X540 */
4340 switch (hw->mac.type) {
4341 case ixgbe_mac_82599EB:
4342 case ixgbe_mac_X540:
4343 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4344 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4345 ~IXGBE_DMATXCTL_TE));
4351 if (!pci_channel_offline(adapter->pdev))
4352 ixgbe_reset(adapter);
4354 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4355 if (hw->mac.ops.disable_tx_laser &&
4356 ((hw->phy.multispeed_fiber) ||
4357 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4358 (hw->mac.type == ixgbe_mac_82599EB))))
4359 hw->mac.ops.disable_tx_laser(hw);
4361 ixgbe_clean_all_tx_rings(adapter);
4362 ixgbe_clean_all_rx_rings(adapter);
4364 #ifdef CONFIG_IXGBE_DCA
4365 /* since we reset the hardware DCA settings were cleared */
4366 ixgbe_setup_dca(adapter);
4371 * ixgbe_tx_timeout - Respond to a Tx Hang
4372 * @netdev: network interface device structure
4374 static void ixgbe_tx_timeout(struct net_device *netdev)
4376 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4378 /* Do the reset outside of interrupt context */
4379 ixgbe_tx_timeout_reset(adapter);
4383 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4384 * @adapter: board private structure to initialize
4386 * ixgbe_sw_init initializes the Adapter private data structure.
4387 * Fields are initialized based on PCI device information and
4388 * OS network device settings (MTU size).
4390 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4392 struct ixgbe_hw *hw = &adapter->hw;
4393 struct pci_dev *pdev = adapter->pdev;
4395 #ifdef CONFIG_IXGBE_DCB
4397 struct tc_configuration *tc;
4400 /* PCI config space info */
4402 hw->vendor_id = pdev->vendor;
4403 hw->device_id = pdev->device;
4404 hw->revision_id = pdev->revision;
4405 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4406 hw->subsystem_device_id = pdev->subsystem_device;
4408 /* Set capability flags */
4409 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4410 adapter->ring_feature[RING_F_RSS].limit = rss;
4411 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
4412 switch (hw->mac.type) {
4413 case ixgbe_mac_82598EB:
4414 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4415 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4416 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
4418 case ixgbe_mac_X540:
4419 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4420 case ixgbe_mac_82599EB:
4421 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
4422 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4423 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4424 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4425 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4426 /* Flow Director hash filters enabled */
4427 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4428 adapter->atr_sample_rate = 20;
4429 adapter->ring_feature[RING_F_FDIR].limit =
4430 IXGBE_MAX_FDIR_INDICES;
4431 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4433 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4434 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4435 #ifdef CONFIG_IXGBE_DCB
4436 /* Default traffic class to use for FCoE */
4437 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4439 #endif /* IXGBE_FCOE */
4445 /* n-tuple support exists, always init our spinlock */
4446 spin_lock_init(&adapter->fdir_perfect_lock);
4448 #ifdef CONFIG_IXGBE_DCB
4449 switch (hw->mac.type) {
4450 case ixgbe_mac_X540:
4451 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4452 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4455 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4456 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4460 /* Configure DCB traffic classes */
4461 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4462 tc = &adapter->dcb_cfg.tc_config[j];
4463 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4464 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4465 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4466 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4467 tc->dcb_pfc = pfc_disabled;
4470 /* Initialize default user to priority mapping, UPx->TC0 */
4471 tc = &adapter->dcb_cfg.tc_config[0];
4472 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4473 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4475 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4476 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4477 adapter->dcb_cfg.pfc_mode_enable = false;
4478 adapter->dcb_set_bitmap = 0x00;
4479 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4480 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4481 sizeof(adapter->temp_dcb_cfg));
4485 /* default flow control settings */
4486 hw->fc.requested_mode = ixgbe_fc_full;
4487 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4488 ixgbe_pbthresh_setup(adapter);
4489 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4490 hw->fc.send_xon = true;
4491 hw->fc.disable_fc_autoneg = false;
4493 /* enable itr by default in dynamic mode */
4494 adapter->rx_itr_setting = 1;
4495 adapter->tx_itr_setting = 1;
4497 /* set default ring sizes */
4498 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4499 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4501 /* set default work limits */
4502 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4504 /* initialize eeprom parameters */
4505 if (ixgbe_init_eeprom_params_generic(hw)) {
4506 e_dev_err("EEPROM initialization failed\n");
4510 set_bit(__IXGBE_DOWN, &adapter->state);
4516 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4517 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4519 * Return 0 on success, negative on failure
4521 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4523 struct device *dev = tx_ring->dev;
4524 int orig_node = dev_to_node(dev);
4528 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4530 if (tx_ring->q_vector)
4531 numa_node = tx_ring->q_vector->numa_node;
4533 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4534 if (!tx_ring->tx_buffer_info)
4535 tx_ring->tx_buffer_info = vzalloc(size);
4536 if (!tx_ring->tx_buffer_info)
4539 /* round up to nearest 4K */
4540 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4541 tx_ring->size = ALIGN(tx_ring->size, 4096);
4543 set_dev_node(dev, numa_node);
4544 tx_ring->desc = dma_alloc_coherent(dev,
4548 set_dev_node(dev, orig_node);
4550 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4551 &tx_ring->dma, GFP_KERNEL);
4555 tx_ring->next_to_use = 0;
4556 tx_ring->next_to_clean = 0;
4560 vfree(tx_ring->tx_buffer_info);
4561 tx_ring->tx_buffer_info = NULL;
4562 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4567 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4568 * @adapter: board private structure
4570 * If this function returns with an error, then it's possible one or
4571 * more of the rings is populated (while the rest are not). It is the
4572 * callers duty to clean those orphaned rings.
4574 * Return 0 on success, negative on failure
4576 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4580 for (i = 0; i < adapter->num_tx_queues; i++) {
4581 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4585 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4591 /* rewind the index freeing the rings as we go */
4593 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4598 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4599 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4601 * Returns 0 on success, negative on failure
4603 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4605 struct device *dev = rx_ring->dev;
4606 int orig_node = dev_to_node(dev);
4610 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4612 if (rx_ring->q_vector)
4613 numa_node = rx_ring->q_vector->numa_node;
4615 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4616 if (!rx_ring->rx_buffer_info)
4617 rx_ring->rx_buffer_info = vzalloc(size);
4618 if (!rx_ring->rx_buffer_info)
4621 /* Round up to nearest 4K */
4622 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4623 rx_ring->size = ALIGN(rx_ring->size, 4096);
4625 set_dev_node(dev, numa_node);
4626 rx_ring->desc = dma_alloc_coherent(dev,
4630 set_dev_node(dev, orig_node);
4632 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4633 &rx_ring->dma, GFP_KERNEL);
4637 rx_ring->next_to_clean = 0;
4638 rx_ring->next_to_use = 0;
4640 ixgbe_init_rx_page_offset(rx_ring);
4644 vfree(rx_ring->rx_buffer_info);
4645 rx_ring->rx_buffer_info = NULL;
4646 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4651 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4652 * @adapter: board private structure
4654 * If this function returns with an error, then it's possible one or
4655 * more of the rings is populated (while the rest are not). It is the
4656 * callers duty to clean those orphaned rings.
4658 * Return 0 on success, negative on failure
4660 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4664 for (i = 0; i < adapter->num_rx_queues; i++) {
4665 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4669 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4675 /* rewind the index freeing the rings as we go */
4677 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4682 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4683 * @tx_ring: Tx descriptor ring for a specific queue
4685 * Free all transmit software resources
4687 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4689 ixgbe_clean_tx_ring(tx_ring);
4691 vfree(tx_ring->tx_buffer_info);
4692 tx_ring->tx_buffer_info = NULL;
4694 /* if not set, then don't free */
4698 dma_free_coherent(tx_ring->dev, tx_ring->size,
4699 tx_ring->desc, tx_ring->dma);
4701 tx_ring->desc = NULL;
4705 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4706 * @adapter: board private structure
4708 * Free all transmit software resources
4710 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4714 for (i = 0; i < adapter->num_tx_queues; i++)
4715 if (adapter->tx_ring[i]->desc)
4716 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4720 * ixgbe_free_rx_resources - Free Rx Resources
4721 * @rx_ring: ring to clean the resources from
4723 * Free all receive software resources
4725 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4727 ixgbe_clean_rx_ring(rx_ring);
4729 vfree(rx_ring->rx_buffer_info);
4730 rx_ring->rx_buffer_info = NULL;
4732 /* if not set, then don't free */
4736 dma_free_coherent(rx_ring->dev, rx_ring->size,
4737 rx_ring->desc, rx_ring->dma);
4739 rx_ring->desc = NULL;
4743 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4744 * @adapter: board private structure
4746 * Free all receive software resources
4748 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4752 for (i = 0; i < adapter->num_rx_queues; i++)
4753 if (adapter->rx_ring[i]->desc)
4754 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4758 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4759 * @netdev: network interface device structure
4760 * @new_mtu: new value for maximum frame size
4762 * Returns 0 on success, negative on failure
4764 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4766 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4767 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4769 /* MTU < 68 is an error and causes problems on some kernels */
4770 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4774 * For 82599EB we cannot allow PF to change MTU greater than 1500
4775 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4776 * don't allocate and chain buffers correctly.
4778 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4779 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4780 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4783 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4785 /* must set new MTU before calling down or up */
4786 netdev->mtu = new_mtu;
4788 if (netif_running(netdev))
4789 ixgbe_reinit_locked(adapter);
4795 * ixgbe_open - Called when a network interface is made active
4796 * @netdev: network interface device structure
4798 * Returns 0 on success, negative value on failure
4800 * The open entry point is called when a network interface is made
4801 * active by the system (IFF_UP). At this point all resources needed
4802 * for transmit and receive operations are allocated, the interrupt
4803 * handler is registered with the OS, the watchdog timer is started,
4804 * and the stack is notified that the interface is ready.
4806 static int ixgbe_open(struct net_device *netdev)
4808 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4811 /* disallow open during test */
4812 if (test_bit(__IXGBE_TESTING, &adapter->state))
4815 netif_carrier_off(netdev);
4817 /* allocate transmit descriptors */
4818 err = ixgbe_setup_all_tx_resources(adapter);
4822 /* allocate receive descriptors */
4823 err = ixgbe_setup_all_rx_resources(adapter);
4827 ixgbe_configure(adapter);
4829 err = ixgbe_request_irq(adapter);
4833 /* Notify the stack of the actual queue counts. */
4834 err = netif_set_real_num_tx_queues(netdev,
4835 adapter->num_rx_pools > 1 ? 1 :
4836 adapter->num_tx_queues);
4838 goto err_set_queues;
4841 err = netif_set_real_num_rx_queues(netdev,
4842 adapter->num_rx_pools > 1 ? 1 :
4843 adapter->num_rx_queues);
4845 goto err_set_queues;
4847 ixgbe_up_complete(adapter);
4852 ixgbe_free_irq(adapter);
4854 ixgbe_free_all_rx_resources(adapter);
4856 ixgbe_free_all_tx_resources(adapter);
4858 ixgbe_reset(adapter);
4864 * ixgbe_close - Disables a network interface
4865 * @netdev: network interface device structure
4867 * Returns 0, this is not allowed to fail
4869 * The close entry point is called when an interface is de-activated
4870 * by the OS. The hardware is still under the drivers control, but
4871 * needs to be disabled. A global MAC reset is issued to stop the
4872 * hardware, and all transmit and receive resources are freed.
4874 static int ixgbe_close(struct net_device *netdev)
4876 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4878 ixgbe_down(adapter);
4879 ixgbe_free_irq(adapter);
4881 ixgbe_fdir_filter_exit(adapter);
4883 ixgbe_free_all_tx_resources(adapter);
4884 ixgbe_free_all_rx_resources(adapter);
4886 ixgbe_release_hw_control(adapter);
4892 static int ixgbe_resume(struct pci_dev *pdev)
4894 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4895 struct net_device *netdev = adapter->netdev;
4898 pci_set_power_state(pdev, PCI_D0);
4899 pci_restore_state(pdev);
4901 * pci_restore_state clears dev->state_saved so call
4902 * pci_save_state to restore it.
4904 pci_save_state(pdev);
4906 err = pci_enable_device_mem(pdev);
4908 e_dev_err("Cannot enable PCI device from suspend\n");
4911 pci_set_master(pdev);
4913 pci_wake_from_d3(pdev, false);
4915 ixgbe_reset(adapter);
4917 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4920 err = ixgbe_init_interrupt_scheme(adapter);
4921 if (!err && netif_running(netdev))
4922 err = ixgbe_open(netdev);
4929 netif_device_attach(netdev);
4933 #endif /* CONFIG_PM */
4935 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
4937 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4938 struct net_device *netdev = adapter->netdev;
4939 struct ixgbe_hw *hw = &adapter->hw;
4941 u32 wufc = adapter->wol;
4946 netif_device_detach(netdev);
4948 if (netif_running(netdev)) {
4950 ixgbe_down(adapter);
4951 ixgbe_free_irq(adapter);
4952 ixgbe_free_all_tx_resources(adapter);
4953 ixgbe_free_all_rx_resources(adapter);
4957 ixgbe_clear_interrupt_scheme(adapter);
4960 retval = pci_save_state(pdev);
4966 ixgbe_set_rx_mode(netdev);
4969 * enable the optics for both mult-speed fiber and
4970 * 82599 SFP+ fiber as we can WoL.
4972 if (hw->mac.ops.enable_tx_laser &&
4973 (hw->phy.multispeed_fiber ||
4974 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber &&
4975 hw->mac.type == ixgbe_mac_82599EB)))
4976 hw->mac.ops.enable_tx_laser(hw);
4978 /* turn on all-multi mode if wake on multicast is enabled */
4979 if (wufc & IXGBE_WUFC_MC) {
4980 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4981 fctrl |= IXGBE_FCTRL_MPE;
4982 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4985 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
4986 ctrl |= IXGBE_CTRL_GIO_DIS;
4987 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
4989 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
4991 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
4992 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4995 switch (hw->mac.type) {
4996 case ixgbe_mac_82598EB:
4997 pci_wake_from_d3(pdev, false);
4999 case ixgbe_mac_82599EB:
5000 case ixgbe_mac_X540:
5001 pci_wake_from_d3(pdev, !!wufc);
5007 *enable_wake = !!wufc;
5009 ixgbe_release_hw_control(adapter);
5011 pci_disable_device(pdev);
5017 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5022 retval = __ixgbe_shutdown(pdev, &wake);
5027 pci_prepare_to_sleep(pdev);
5029 pci_wake_from_d3(pdev, false);
5030 pci_set_power_state(pdev, PCI_D3hot);
5035 #endif /* CONFIG_PM */
5037 static void ixgbe_shutdown(struct pci_dev *pdev)
5041 __ixgbe_shutdown(pdev, &wake);
5043 if (system_state == SYSTEM_POWER_OFF) {
5044 pci_wake_from_d3(pdev, wake);
5045 pci_set_power_state(pdev, PCI_D3hot);
5050 * ixgbe_update_stats - Update the board statistics counters.
5051 * @adapter: board private structure
5053 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5055 struct net_device *netdev = adapter->netdev;
5056 struct ixgbe_hw *hw = &adapter->hw;
5057 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5059 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5060 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5061 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5062 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5064 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5066 u64 fcoe_noddp_counts_sum = 0, fcoe_noddp_ext_buff_counts_sum = 0;
5067 #endif /* IXGBE_FCOE */
5069 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5070 test_bit(__IXGBE_RESETTING, &adapter->state))
5073 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5076 for (i = 0; i < adapter->num_rx_queues; i++) {
5077 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5078 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5080 adapter->rsc_total_count = rsc_count;
5081 adapter->rsc_total_flush = rsc_flush;
5084 for (i = 0; i < adapter->num_rx_queues; i++) {
5085 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5086 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5087 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5088 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5089 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5090 bytes += rx_ring->stats.bytes;
5091 packets += rx_ring->stats.packets;
5093 adapter->non_eop_descs = non_eop_descs;
5094 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5095 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5096 adapter->hw_csum_rx_error = hw_csum_rx_error;
5097 netdev->stats.rx_bytes = bytes;
5098 netdev->stats.rx_packets = packets;
5102 /* gather some stats to the adapter struct that are per queue */
5103 for (i = 0; i < adapter->num_tx_queues; i++) {
5104 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5105 restart_queue += tx_ring->tx_stats.restart_queue;
5106 tx_busy += tx_ring->tx_stats.tx_busy;
5107 bytes += tx_ring->stats.bytes;
5108 packets += tx_ring->stats.packets;
5110 adapter->restart_queue = restart_queue;
5111 adapter->tx_busy = tx_busy;
5112 netdev->stats.tx_bytes = bytes;
5113 netdev->stats.tx_packets = packets;
5115 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5117 /* 8 register reads */
5118 for (i = 0; i < 8; i++) {
5119 /* for packet buffers not used, the register should read 0 */
5120 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5122 hwstats->mpc[i] += mpc;
5123 total_mpc += hwstats->mpc[i];
5124 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5125 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5126 switch (hw->mac.type) {
5127 case ixgbe_mac_82598EB:
5128 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5129 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5130 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5131 hwstats->pxonrxc[i] +=
5132 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5134 case ixgbe_mac_82599EB:
5135 case ixgbe_mac_X540:
5136 hwstats->pxonrxc[i] +=
5137 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5144 /*16 register reads */
5145 for (i = 0; i < 16; i++) {
5146 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5147 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5148 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5149 (hw->mac.type == ixgbe_mac_X540)) {
5150 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5151 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5152 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5153 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5157 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5158 /* work around hardware counting issue */
5159 hwstats->gprc -= missed_rx;
5161 ixgbe_update_xoff_received(adapter);
5163 /* 82598 hardware only has a 32 bit counter in the high register */
5164 switch (hw->mac.type) {
5165 case ixgbe_mac_82598EB:
5166 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5167 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5168 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5169 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5171 case ixgbe_mac_X540:
5172 /* OS2BMC stats are X540 only*/
5173 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5174 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5175 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5176 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5177 case ixgbe_mac_82599EB:
5178 for (i = 0; i < 16; i++)
5179 adapter->hw_rx_no_dma_resources +=
5180 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5181 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5182 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5183 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5184 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5185 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5186 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5187 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5188 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5189 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5191 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5192 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5193 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5194 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5195 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5196 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5197 /* Add up per cpu counters for total ddp aloc fail */
5198 if (fcoe->pcpu_noddp && fcoe->pcpu_noddp_ext_buff) {
5199 for_each_possible_cpu(cpu) {
5200 fcoe_noddp_counts_sum +=
5201 *per_cpu_ptr(fcoe->pcpu_noddp, cpu);
5202 fcoe_noddp_ext_buff_counts_sum +=
5204 pcpu_noddp_ext_buff, cpu);
5207 hwstats->fcoe_noddp = fcoe_noddp_counts_sum;
5208 hwstats->fcoe_noddp_ext_buff = fcoe_noddp_ext_buff_counts_sum;
5209 #endif /* IXGBE_FCOE */
5214 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5215 hwstats->bprc += bprc;
5216 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5217 if (hw->mac.type == ixgbe_mac_82598EB)
5218 hwstats->mprc -= bprc;
5219 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5220 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5221 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5222 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5223 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5224 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5225 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5226 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5227 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5228 hwstats->lxontxc += lxon;
5229 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5230 hwstats->lxofftxc += lxoff;
5231 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5232 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5234 * 82598 errata - tx of flow control packets is included in tx counters
5236 xon_off_tot = lxon + lxoff;
5237 hwstats->gptc -= xon_off_tot;
5238 hwstats->mptc -= xon_off_tot;
5239 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5240 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5241 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5242 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5243 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5244 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5245 hwstats->ptc64 -= xon_off_tot;
5246 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5247 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5248 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5249 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5250 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5251 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5253 /* Fill out the OS statistics structure */
5254 netdev->stats.multicast = hwstats->mprc;
5257 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5258 netdev->stats.rx_dropped = 0;
5259 netdev->stats.rx_length_errors = hwstats->rlec;
5260 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5261 netdev->stats.rx_missed_errors = total_mpc;
5265 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5266 * @adapter: pointer to the device adapter structure
5268 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5270 struct ixgbe_hw *hw = &adapter->hw;
5273 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5276 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5278 /* if interface is down do nothing */
5279 if (test_bit(__IXGBE_DOWN, &adapter->state))
5282 /* do nothing if we are not using signature filters */
5283 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5286 adapter->fdir_overflow++;
5288 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5289 for (i = 0; i < adapter->num_tx_queues; i++)
5290 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5291 &(adapter->tx_ring[i]->state));
5292 /* re-enable flow director interrupts */
5293 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5295 e_err(probe, "failed to finish FDIR re-initialization, "
5296 "ignored adding FDIR ATR filters\n");
5301 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5302 * @adapter: pointer to the device adapter structure
5304 * This function serves two purposes. First it strobes the interrupt lines
5305 * in order to make certain interrupts are occurring. Secondly it sets the
5306 * bits needed to check for TX hangs. As a result we should immediately
5307 * determine if a hang has occurred.
5309 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5311 struct ixgbe_hw *hw = &adapter->hw;
5315 /* If we're down or resetting, just bail */
5316 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5317 test_bit(__IXGBE_RESETTING, &adapter->state))
5320 /* Force detection of hung controller */
5321 if (netif_carrier_ok(adapter->netdev)) {
5322 for (i = 0; i < adapter->num_tx_queues; i++)
5323 set_check_for_tx_hang(adapter->tx_ring[i]);
5326 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5328 * for legacy and MSI interrupts don't set any bits
5329 * that are enabled for EIAM, because this operation
5330 * would set *both* EIMS and EICS for any bit in EIAM
5332 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5333 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5335 /* get one bit for every active tx/rx interrupt vector */
5336 for (i = 0; i < adapter->num_q_vectors; i++) {
5337 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5338 if (qv->rx.ring || qv->tx.ring)
5339 eics |= ((u64)1 << i);
5343 /* Cause software interrupt to ensure rings are cleaned */
5344 ixgbe_irq_rearm_queues(adapter, eics);
5349 * ixgbe_watchdog_update_link - update the link status
5350 * @adapter: pointer to the device adapter structure
5351 * @link_speed: pointer to a u32 to store the link_speed
5353 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5355 struct ixgbe_hw *hw = &adapter->hw;
5356 u32 link_speed = adapter->link_speed;
5357 bool link_up = adapter->link_up;
5358 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5360 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5363 if (hw->mac.ops.check_link) {
5364 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5366 /* always assume link is up, if no check link function */
5367 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5371 if (adapter->ixgbe_ieee_pfc)
5372 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5374 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5375 hw->mac.ops.fc_enable(hw);
5376 ixgbe_set_rx_drop_en(adapter);
5380 time_after(jiffies, (adapter->link_check_timeout +
5381 IXGBE_TRY_LINK_TIMEOUT))) {
5382 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5383 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5384 IXGBE_WRITE_FLUSH(hw);
5387 adapter->link_up = link_up;
5388 adapter->link_speed = link_speed;
5392 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5393 * print link up message
5394 * @adapter: pointer to the device adapter structure
5396 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5398 struct net_device *netdev = adapter->netdev;
5399 struct ixgbe_hw *hw = &adapter->hw;
5400 u32 link_speed = adapter->link_speed;
5401 bool flow_rx, flow_tx;
5403 /* only continue if link was previously down */
5404 if (netif_carrier_ok(netdev))
5407 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5409 switch (hw->mac.type) {
5410 case ixgbe_mac_82598EB: {
5411 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5412 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5413 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5414 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5417 case ixgbe_mac_X540:
5418 case ixgbe_mac_82599EB: {
5419 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5420 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5421 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5422 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5431 #ifdef CONFIG_IXGBE_PTP
5432 ixgbe_ptp_start_cyclecounter(adapter);
5435 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5436 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5438 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5440 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5443 ((flow_rx && flow_tx) ? "RX/TX" :
5445 (flow_tx ? "TX" : "None"))));
5447 netif_carrier_on(netdev);
5448 ixgbe_check_vf_rate_limit(adapter);
5450 /* ping all the active vfs to let them know link has changed */
5451 ixgbe_ping_all_vfs(adapter);
5455 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5456 * print link down message
5457 * @adapter: pointer to the adapter structure
5459 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5461 struct net_device *netdev = adapter->netdev;
5462 struct ixgbe_hw *hw = &adapter->hw;
5464 adapter->link_up = false;
5465 adapter->link_speed = 0;
5467 /* only continue if link was up previously */
5468 if (!netif_carrier_ok(netdev))
5471 /* poll for SFP+ cable when link is down */
5472 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5473 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5475 #ifdef CONFIG_IXGBE_PTP
5476 ixgbe_ptp_start_cyclecounter(adapter);
5479 e_info(drv, "NIC Link is Down\n");
5480 netif_carrier_off(netdev);
5482 /* ping all the active vfs to let them know link has changed */
5483 ixgbe_ping_all_vfs(adapter);
5487 * ixgbe_watchdog_flush_tx - flush queues on link down
5488 * @adapter: pointer to the device adapter structure
5490 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5493 int some_tx_pending = 0;
5495 if (!netif_carrier_ok(adapter->netdev)) {
5496 for (i = 0; i < adapter->num_tx_queues; i++) {
5497 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5498 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5499 some_tx_pending = 1;
5504 if (some_tx_pending) {
5505 /* We've lost link, so the controller stops DMA,
5506 * but we've got queued Tx work that's never going
5507 * to get done, so reset controller to flush Tx.
5508 * (Do the reset outside of interrupt context).
5510 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5515 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5519 /* Do not perform spoof check for 82598 */
5520 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5523 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5526 * ssvpc register is cleared on read, if zero then no
5527 * spoofed packets in the last interval.
5532 e_warn(drv, "%d Spoofed packets detected\n", ssvpc);
5536 * ixgbe_watchdog_subtask - check and bring link up
5537 * @adapter: pointer to the device adapter structure
5539 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5541 /* if interface is down do nothing */
5542 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5543 test_bit(__IXGBE_RESETTING, &adapter->state))
5546 ixgbe_watchdog_update_link(adapter);
5548 if (adapter->link_up)
5549 ixgbe_watchdog_link_is_up(adapter);
5551 ixgbe_watchdog_link_is_down(adapter);
5553 ixgbe_spoof_check(adapter);
5554 ixgbe_update_stats(adapter);
5556 ixgbe_watchdog_flush_tx(adapter);
5560 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5561 * @adapter: the ixgbe adapter structure
5563 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5565 struct ixgbe_hw *hw = &adapter->hw;
5568 /* not searching for SFP so there is nothing to do here */
5569 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5570 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5573 /* someone else is in init, wait until next service event */
5574 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5577 err = hw->phy.ops.identify_sfp(hw);
5578 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5581 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5582 /* If no cable is present, then we need to reset
5583 * the next time we find a good cable. */
5584 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5591 /* exit if reset not needed */
5592 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5595 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5598 * A module may be identified correctly, but the EEPROM may not have
5599 * support for that module. setup_sfp() will fail in that case, so
5600 * we should not allow that module to load.
5602 if (hw->mac.type == ixgbe_mac_82598EB)
5603 err = hw->phy.ops.reset(hw);
5605 err = hw->mac.ops.setup_sfp(hw);
5607 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5610 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5611 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5614 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5616 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5617 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5618 e_dev_err("failed to initialize because an unsupported "
5619 "SFP+ module type was detected.\n");
5620 e_dev_err("Reload the driver after installing a "
5621 "supported module.\n");
5622 unregister_netdev(adapter->netdev);
5627 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5628 * @adapter: the ixgbe adapter structure
5630 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5632 struct ixgbe_hw *hw = &adapter->hw;
5636 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5639 /* someone else is in init, wait until next service event */
5640 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5643 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5645 autoneg = hw->phy.autoneg_advertised;
5646 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5647 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5648 if (hw->mac.ops.setup_link)
5649 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5651 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5652 adapter->link_check_timeout = jiffies;
5653 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5656 #ifdef CONFIG_PCI_IOV
5657 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5660 struct ixgbe_hw *hw = &adapter->hw;
5661 struct net_device *netdev = adapter->netdev;
5665 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5666 if (gpc) /* If incrementing then no need for the check below */
5669 * Check to see if a bad DMA write target from an errant or
5670 * malicious VF has caused a PCIe error. If so then we can
5671 * issue a VFLR to the offending VF(s) and then resume without
5672 * requesting a full slot reset.
5675 for (vf = 0; vf < adapter->num_vfs; vf++) {
5676 ciaa = (vf << 16) | 0x80000000;
5677 /* 32 bit read so align, we really want status at offset 6 */
5678 ciaa |= PCI_COMMAND;
5679 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5680 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5682 /* disable debug mode asap after reading data */
5683 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5684 /* Get the upper 16 bits which will be the PCI status reg */
5686 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5687 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5689 ciaa = (vf << 16) | 0x80000000;
5691 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5692 ciad = 0x00008000; /* VFLR */
5693 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5695 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5702 * ixgbe_service_timer - Timer Call-back
5703 * @data: pointer to adapter cast into an unsigned long
5705 static void ixgbe_service_timer(unsigned long data)
5707 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5708 unsigned long next_event_offset;
5711 /* poll faster when waiting for link */
5712 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5713 next_event_offset = HZ / 10;
5715 next_event_offset = HZ * 2;
5717 #ifdef CONFIG_PCI_IOV
5719 * don't bother with SR-IOV VF DMA hang check if there are
5720 * no VFs or the link is down
5722 if (!adapter->num_vfs ||
5723 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5724 goto normal_timer_service;
5726 /* If we have VFs allocated then we must check for DMA hangs */
5727 ixgbe_check_for_bad_vf(adapter);
5728 next_event_offset = HZ / 50;
5729 adapter->timer_event_accumulator++;
5731 if (adapter->timer_event_accumulator >= 100)
5732 adapter->timer_event_accumulator = 0;
5736 normal_timer_service:
5738 /* Reset the timer */
5739 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5742 ixgbe_service_event_schedule(adapter);
5745 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5747 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5750 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5752 /* If we're already down or resetting, just bail */
5753 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5754 test_bit(__IXGBE_RESETTING, &adapter->state))
5757 ixgbe_dump(adapter);
5758 netdev_err(adapter->netdev, "Reset adapter\n");
5759 adapter->tx_timeout_count++;
5761 ixgbe_reinit_locked(adapter);
5765 * ixgbe_service_task - manages and runs subtasks
5766 * @work: pointer to work_struct containing our data
5768 static void ixgbe_service_task(struct work_struct *work)
5770 struct ixgbe_adapter *adapter = container_of(work,
5771 struct ixgbe_adapter,
5774 ixgbe_reset_subtask(adapter);
5775 ixgbe_sfp_detection_subtask(adapter);
5776 ixgbe_sfp_link_config_subtask(adapter);
5777 ixgbe_check_overtemp_subtask(adapter);
5778 ixgbe_watchdog_subtask(adapter);
5779 ixgbe_fdir_reinit_subtask(adapter);
5780 ixgbe_check_hang_subtask(adapter);
5781 #ifdef CONFIG_IXGBE_PTP
5782 ixgbe_ptp_overflow_check(adapter);
5785 ixgbe_service_event_complete(adapter);
5788 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5789 struct ixgbe_tx_buffer *first,
5792 struct sk_buff *skb = first->skb;
5793 u32 vlan_macip_lens, type_tucmd;
5794 u32 mss_l4len_idx, l4len;
5796 if (!skb_is_gso(skb))
5799 if (skb_header_cloned(skb)) {
5800 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5805 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5806 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5808 if (first->protocol == __constant_htons(ETH_P_IP)) {
5809 struct iphdr *iph = ip_hdr(skb);
5812 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5816 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5817 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5818 IXGBE_TX_FLAGS_CSUM |
5819 IXGBE_TX_FLAGS_IPV4;
5820 } else if (skb_is_gso_v6(skb)) {
5821 ipv6_hdr(skb)->payload_len = 0;
5822 tcp_hdr(skb)->check =
5823 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5824 &ipv6_hdr(skb)->daddr,
5826 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5827 IXGBE_TX_FLAGS_CSUM;
5830 /* compute header lengths */
5831 l4len = tcp_hdrlen(skb);
5832 *hdr_len = skb_transport_offset(skb) + l4len;
5834 /* update gso size and bytecount with header size */
5835 first->gso_segs = skb_shinfo(skb)->gso_segs;
5836 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5838 /* mss_l4len_id: use 1 as index for TSO */
5839 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5840 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5841 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5843 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5844 vlan_macip_lens = skb_network_header_len(skb);
5845 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5846 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5848 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5854 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5855 struct ixgbe_tx_buffer *first)
5857 struct sk_buff *skb = first->skb;
5858 u32 vlan_macip_lens = 0;
5859 u32 mss_l4len_idx = 0;
5862 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5863 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
5864 !(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
5868 switch (first->protocol) {
5869 case __constant_htons(ETH_P_IP):
5870 vlan_macip_lens |= skb_network_header_len(skb);
5871 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5872 l4_hdr = ip_hdr(skb)->protocol;
5874 case __constant_htons(ETH_P_IPV6):
5875 vlan_macip_lens |= skb_network_header_len(skb);
5876 l4_hdr = ipv6_hdr(skb)->nexthdr;
5879 if (unlikely(net_ratelimit())) {
5880 dev_warn(tx_ring->dev,
5881 "partial checksum but proto=%x!\n",
5889 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5890 mss_l4len_idx = tcp_hdrlen(skb) <<
5891 IXGBE_ADVTXD_L4LEN_SHIFT;
5894 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5895 mss_l4len_idx = sizeof(struct sctphdr) <<
5896 IXGBE_ADVTXD_L4LEN_SHIFT;
5899 mss_l4len_idx = sizeof(struct udphdr) <<
5900 IXGBE_ADVTXD_L4LEN_SHIFT;
5903 if (unlikely(net_ratelimit())) {
5904 dev_warn(tx_ring->dev,
5905 "partial checksum but l4 proto=%x!\n",
5911 /* update TX checksum flag */
5912 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
5915 /* vlan_macip_lens: MACLEN, VLAN tag */
5916 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5917 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5919 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
5920 type_tucmd, mss_l4len_idx);
5923 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
5925 /* set type for advanced descriptor with frame checksum insertion */
5926 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
5927 IXGBE_ADVTXD_DCMD_IFCS |
5928 IXGBE_ADVTXD_DCMD_DEXT);
5930 /* set HW vlan bit if vlan is present */
5931 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
5932 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
5934 #ifdef CONFIG_IXGBE_PTP
5935 if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
5936 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
5939 /* set segmentation enable bits for TSO/FSO */
5941 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
5943 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5945 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
5950 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
5951 u32 tx_flags, unsigned int paylen)
5953 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
5955 /* enable L4 checksum for TSO and TX checksum offload */
5956 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
5957 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
5959 /* enble IPv4 checksum for TSO */
5960 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
5961 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
5963 /* use index 1 context for TSO/FSO/FCOE */
5965 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
5967 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5969 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
5972 * Check Context must be set if Tx switch is enabled, which it
5973 * always is for case where virtual functions are running
5976 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
5978 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
5980 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
5982 tx_desc->read.olinfo_status = olinfo_status;
5985 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5988 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
5989 struct ixgbe_tx_buffer *first,
5993 struct sk_buff *skb = first->skb;
5994 struct ixgbe_tx_buffer *tx_buffer;
5995 union ixgbe_adv_tx_desc *tx_desc;
5996 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
5997 unsigned int data_len = skb->data_len;
5998 unsigned int size = skb_headlen(skb);
5999 unsigned int paylen = skb->len - hdr_len;
6000 u32 tx_flags = first->tx_flags;
6002 u16 i = tx_ring->next_to_use;
6004 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6006 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
6007 cmd_type = ixgbe_tx_cmd_type(tx_flags);
6010 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6011 if (data_len < sizeof(struct fcoe_crc_eof)) {
6012 size -= sizeof(struct fcoe_crc_eof) - data_len;
6015 data_len -= sizeof(struct fcoe_crc_eof);
6020 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6021 if (dma_mapping_error(tx_ring->dev, dma))
6024 /* record length, and DMA address */
6025 dma_unmap_len_set(first, len, size);
6026 dma_unmap_addr_set(first, dma, dma);
6028 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6031 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6032 tx_desc->read.cmd_type_len =
6033 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
6037 if (i == tx_ring->count) {
6038 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6042 dma += IXGBE_MAX_DATA_PER_TXD;
6043 size -= IXGBE_MAX_DATA_PER_TXD;
6045 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6046 tx_desc->read.olinfo_status = 0;
6049 if (likely(!data_len))
6052 if (unlikely(skb->no_fcs))
6053 cmd_type &= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS));
6054 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
6058 if (i == tx_ring->count) {
6059 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6064 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6066 size = skb_frag_size(frag);
6070 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6072 if (dma_mapping_error(tx_ring->dev, dma))
6075 tx_buffer = &tx_ring->tx_buffer_info[i];
6076 dma_unmap_len_set(tx_buffer, len, size);
6077 dma_unmap_addr_set(tx_buffer, dma, dma);
6079 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6080 tx_desc->read.olinfo_status = 0;
6085 /* write last descriptor with RS and EOP bits */
6086 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6087 tx_desc->read.cmd_type_len = cmd_type;
6089 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6091 /* set the timestamp */
6092 first->time_stamp = jiffies;
6095 * Force memory writes to complete before letting h/w know there
6096 * are new descriptors to fetch. (Only applicable for weak-ordered
6097 * memory model archs, such as IA-64).
6099 * We also need this memory barrier to make certain all of the
6100 * status bits have been updated before next_to_watch is written.
6104 /* set next_to_watch value indicating a packet is present */
6105 first->next_to_watch = tx_desc;
6108 if (i == tx_ring->count)
6111 tx_ring->next_to_use = i;
6113 /* notify HW of packet */
6114 writel(i, tx_ring->tail);
6118 dev_err(tx_ring->dev, "TX DMA map failed\n");
6120 /* clear dma mappings for failed tx_buffer_info map */
6122 tx_buffer = &tx_ring->tx_buffer_info[i];
6123 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6124 if (tx_buffer == first)
6131 tx_ring->next_to_use = i;
6134 static void ixgbe_atr(struct ixgbe_ring *ring,
6135 struct ixgbe_tx_buffer *first)
6137 struct ixgbe_q_vector *q_vector = ring->q_vector;
6138 union ixgbe_atr_hash_dword input = { .dword = 0 };
6139 union ixgbe_atr_hash_dword common = { .dword = 0 };
6141 unsigned char *network;
6143 struct ipv6hdr *ipv6;
6148 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6152 /* do nothing if sampling is disabled */
6153 if (!ring->atr_sample_rate)
6158 /* snag network header to get L4 type and address */
6159 hdr.network = skb_network_header(first->skb);
6161 /* Currently only IPv4/IPv6 with TCP is supported */
6162 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6163 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6164 (first->protocol != __constant_htons(ETH_P_IP) ||
6165 hdr.ipv4->protocol != IPPROTO_TCP))
6168 th = tcp_hdr(first->skb);
6170 /* skip this packet since it is invalid or the socket is closing */
6174 /* sample on all syn packets or once every atr sample count */
6175 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6178 /* reset sample count */
6179 ring->atr_count = 0;
6181 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6184 * src and dst are inverted, think how the receiver sees them
6186 * The input is broken into two sections, a non-compressed section
6187 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6188 * is XORed together and stored in the compressed dword.
6190 input.formatted.vlan_id = vlan_id;
6193 * since src port and flex bytes occupy the same word XOR them together
6194 * and write the value to source port portion of compressed dword
6196 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6197 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6199 common.port.src ^= th->dest ^ first->protocol;
6200 common.port.dst ^= th->source;
6202 if (first->protocol == __constant_htons(ETH_P_IP)) {
6203 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6204 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6206 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6207 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6208 hdr.ipv6->saddr.s6_addr32[1] ^
6209 hdr.ipv6->saddr.s6_addr32[2] ^
6210 hdr.ipv6->saddr.s6_addr32[3] ^
6211 hdr.ipv6->daddr.s6_addr32[0] ^
6212 hdr.ipv6->daddr.s6_addr32[1] ^
6213 hdr.ipv6->daddr.s6_addr32[2] ^
6214 hdr.ipv6->daddr.s6_addr32[3];
6217 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6218 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6219 input, common, ring->queue_index);
6222 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6224 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6225 /* Herbert's original patch had:
6226 * smp_mb__after_netif_stop_queue();
6227 * but since that doesn't exist yet, just open code it. */
6230 /* We need to check again in a case another CPU has just
6231 * made room available. */
6232 if (likely(ixgbe_desc_unused(tx_ring) < size))
6235 /* A reprieve! - use start_queue because it doesn't call schedule */
6236 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6237 ++tx_ring->tx_stats.restart_queue;
6241 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6243 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6245 return __ixgbe_maybe_stop_tx(tx_ring, size);
6248 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6250 struct ixgbe_adapter *adapter = netdev_priv(dev);
6251 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6254 __be16 protocol = vlan_get_protocol(skb);
6256 if (((protocol == htons(ETH_P_FCOE)) ||
6257 (protocol == htons(ETH_P_FIP))) &&
6258 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6259 struct ixgbe_ring_feature *f;
6261 f = &adapter->ring_feature[RING_F_FCOE];
6263 while (txq >= f->indices)
6265 txq += adapter->ring_feature[RING_F_FCOE].offset;
6271 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6272 while (unlikely(txq >= dev->real_num_tx_queues))
6273 txq -= dev->real_num_tx_queues;
6277 return skb_tx_hash(dev, skb);
6280 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6281 struct ixgbe_adapter *adapter,
6282 struct ixgbe_ring *tx_ring)
6284 struct ixgbe_tx_buffer *first;
6287 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6290 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6291 __be16 protocol = skb->protocol;
6295 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6296 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6297 * + 2 desc gap to keep tail from touching head,
6298 * + 1 desc for context descriptor,
6299 * otherwise try next time
6301 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6302 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6303 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6305 count += skb_shinfo(skb)->nr_frags;
6307 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6308 tx_ring->tx_stats.tx_busy++;
6309 return NETDEV_TX_BUSY;
6312 /* record the location of the first descriptor for this packet */
6313 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6315 first->bytecount = skb->len;
6316 first->gso_segs = 1;
6318 /* if we have a HW VLAN tag being added default to the HW one */
6319 if (vlan_tx_tag_present(skb)) {
6320 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6321 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6322 /* else if it is a SW VLAN check the next protocol and store the tag */
6323 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6324 struct vlan_hdr *vhdr, _vhdr;
6325 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6329 protocol = vhdr->h_vlan_encapsulated_proto;
6330 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6331 IXGBE_TX_FLAGS_VLAN_SHIFT;
6332 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6335 skb_tx_timestamp(skb);
6337 #ifdef CONFIG_IXGBE_PTP
6338 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6339 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6340 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
6344 #ifdef CONFIG_PCI_IOV
6346 * Use the l2switch_enable flag - would be false if the DMA
6347 * Tx switch had been disabled.
6349 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6350 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6353 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6354 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6355 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6356 (skb->priority != TC_PRIO_CONTROL))) {
6357 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6358 tx_flags |= (skb->priority & 0x7) <<
6359 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6360 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6361 struct vlan_ethhdr *vhdr;
6362 if (skb_header_cloned(skb) &&
6363 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6365 vhdr = (struct vlan_ethhdr *)skb->data;
6366 vhdr->h_vlan_TCI = htons(tx_flags >>
6367 IXGBE_TX_FLAGS_VLAN_SHIFT);
6369 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6373 /* record initial flags and protocol */
6374 first->tx_flags = tx_flags;
6375 first->protocol = protocol;
6378 /* setup tx offload for FCoE */
6379 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6380 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6381 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6388 #endif /* IXGBE_FCOE */
6389 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6393 ixgbe_tx_csum(tx_ring, first);
6395 /* add the ATR filter if ATR is on */
6396 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6397 ixgbe_atr(tx_ring, first);
6401 #endif /* IXGBE_FCOE */
6402 ixgbe_tx_map(tx_ring, first, hdr_len);
6404 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6406 return NETDEV_TX_OK;
6409 dev_kfree_skb_any(first->skb);
6412 return NETDEV_TX_OK;
6415 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6416 struct net_device *netdev)
6418 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6419 struct ixgbe_ring *tx_ring;
6422 * The minimum packet size for olinfo paylen is 17 so pad the skb
6423 * in order to meet this minimum size requirement.
6425 if (unlikely(skb->len < 17)) {
6426 if (skb_pad(skb, 17 - skb->len))
6427 return NETDEV_TX_OK;
6431 tx_ring = adapter->tx_ring[skb->queue_mapping];
6432 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6436 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6437 * @netdev: network interface device structure
6438 * @p: pointer to an address structure
6440 * Returns 0 on success, negative on failure
6442 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6444 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6445 struct ixgbe_hw *hw = &adapter->hw;
6446 struct sockaddr *addr = p;
6448 if (!is_valid_ether_addr(addr->sa_data))
6449 return -EADDRNOTAVAIL;
6451 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6452 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6454 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6461 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6463 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6464 struct ixgbe_hw *hw = &adapter->hw;
6468 if (prtad != hw->phy.mdio.prtad)
6470 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6476 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6477 u16 addr, u16 value)
6479 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6480 struct ixgbe_hw *hw = &adapter->hw;
6482 if (prtad != hw->phy.mdio.prtad)
6484 return hw->phy.ops.write_reg(hw, addr, devad, value);
6487 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6489 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6492 #ifdef CONFIG_IXGBE_PTP
6494 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
6497 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6502 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6504 * @netdev: network interface device structure
6506 * Returns non-zero on failure
6508 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6511 struct ixgbe_adapter *adapter = netdev_priv(dev);
6512 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6514 if (is_valid_ether_addr(mac->san_addr)) {
6516 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6523 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6525 * @netdev: network interface device structure
6527 * Returns non-zero on failure
6529 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6532 struct ixgbe_adapter *adapter = netdev_priv(dev);
6533 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6535 if (is_valid_ether_addr(mac->san_addr)) {
6537 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6543 #ifdef CONFIG_NET_POLL_CONTROLLER
6545 * Polling 'interrupt' - used by things like netconsole to send skbs
6546 * without having to re-enable interrupts. It's not called while
6547 * the interrupt routine is executing.
6549 static void ixgbe_netpoll(struct net_device *netdev)
6551 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6554 /* if interface is down do nothing */
6555 if (test_bit(__IXGBE_DOWN, &adapter->state))
6558 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6559 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6560 for (i = 0; i < adapter->num_q_vectors; i++)
6561 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
6563 ixgbe_intr(adapter->pdev->irq, netdev);
6565 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6569 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6570 struct rtnl_link_stats64 *stats)
6572 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6576 for (i = 0; i < adapter->num_rx_queues; i++) {
6577 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6583 start = u64_stats_fetch_begin_bh(&ring->syncp);
6584 packets = ring->stats.packets;
6585 bytes = ring->stats.bytes;
6586 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6587 stats->rx_packets += packets;
6588 stats->rx_bytes += bytes;
6592 for (i = 0; i < adapter->num_tx_queues; i++) {
6593 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6599 start = u64_stats_fetch_begin_bh(&ring->syncp);
6600 packets = ring->stats.packets;
6601 bytes = ring->stats.bytes;
6602 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6603 stats->tx_packets += packets;
6604 stats->tx_bytes += bytes;
6608 /* following stats updated by ixgbe_watchdog_task() */
6609 stats->multicast = netdev->stats.multicast;
6610 stats->rx_errors = netdev->stats.rx_errors;
6611 stats->rx_length_errors = netdev->stats.rx_length_errors;
6612 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6613 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6617 #ifdef CONFIG_IXGBE_DCB
6619 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6620 * @adapter: pointer to ixgbe_adapter
6621 * @tc: number of traffic classes currently enabled
6623 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6624 * 802.1Q priority maps to a packet buffer that exists.
6626 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6628 struct ixgbe_hw *hw = &adapter->hw;
6632 /* 82598 have a static priority to TC mapping that can not
6633 * be changed so no validation is needed.
6635 if (hw->mac.type == ixgbe_mac_82598EB)
6638 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6641 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6642 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6644 /* If up2tc is out of bounds default to zero */
6646 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6650 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6656 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
6657 * @adapter: Pointer to adapter struct
6659 * Populate the netdev user priority to tc map
6661 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
6663 struct net_device *dev = adapter->netdev;
6664 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
6665 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
6668 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
6671 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
6672 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
6674 tc = ets->prio_tc[prio];
6676 netdev_set_prio_tc_map(dev, prio, tc);
6681 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6683 * @netdev: net device to configure
6684 * @tc: number of traffic classes to enable
6686 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6688 struct ixgbe_adapter *adapter = netdev_priv(dev);
6689 struct ixgbe_hw *hw = &adapter->hw;
6691 /* Multiple traffic classes requires multiple queues */
6692 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6693 e_err(drv, "Enable failed, needs MSI-X\n");
6697 /* Hardware supports up to 8 traffic classes */
6698 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6699 (hw->mac.type == ixgbe_mac_82598EB &&
6700 tc < MAX_TRAFFIC_CLASS))
6703 /* Hardware has to reinitialize queues and interrupts to
6704 * match packet buffer alignment. Unfortunately, the
6705 * hardware is not flexible enough to do this dynamically.
6707 if (netif_running(dev))
6709 ixgbe_clear_interrupt_scheme(adapter);
6712 netdev_set_num_tc(dev, tc);
6713 ixgbe_set_prio_tc_map(adapter);
6715 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6716 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6718 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6719 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6720 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6723 netdev_reset_tc(dev);
6725 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6726 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6728 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6729 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6731 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6732 adapter->dcb_cfg.pfc_mode_enable = false;
6735 ixgbe_init_interrupt_scheme(adapter);
6736 ixgbe_validate_rtr(adapter, tc);
6737 if (netif_running(dev))
6743 #endif /* CONFIG_IXGBE_DCB */
6744 void ixgbe_do_reset(struct net_device *netdev)
6746 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6748 if (netif_running(netdev))
6749 ixgbe_reinit_locked(adapter);
6751 ixgbe_reset(adapter);
6754 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6755 netdev_features_t features)
6757 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6759 /* return error if RXHASH is being enabled when RSS is not supported */
6760 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
6761 features &= ~NETIF_F_RXHASH;
6763 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6764 if (!(features & NETIF_F_RXCSUM))
6765 features &= ~NETIF_F_LRO;
6767 /* Turn off LRO if not RSC capable */
6768 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6769 features &= ~NETIF_F_LRO;
6774 static int ixgbe_set_features(struct net_device *netdev,
6775 netdev_features_t features)
6777 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6778 netdev_features_t changed = netdev->features ^ features;
6779 bool need_reset = false;
6781 /* Make sure RSC matches LRO, reset if change */
6782 if (!(features & NETIF_F_LRO)) {
6783 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6785 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6786 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6787 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6788 if (adapter->rx_itr_setting == 1 ||
6789 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6790 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6792 } else if ((changed ^ features) & NETIF_F_LRO) {
6793 e_info(probe, "rx-usecs set too low, "
6799 * Check if Flow Director n-tuple support was enabled or disabled. If
6800 * the state changed, we need to reset.
6802 if (!(features & NETIF_F_NTUPLE)) {
6803 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
6804 /* turn off Flow Director, set ATR and reset */
6805 if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
6806 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
6807 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6810 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6811 } else if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
6812 /* turn off ATR, enable perfect filters and reset */
6813 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6814 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6818 if (features & NETIF_F_HW_VLAN_RX)
6819 ixgbe_vlan_strip_enable(adapter);
6821 ixgbe_vlan_strip_disable(adapter);
6823 if (changed & NETIF_F_RXALL)
6826 netdev->features = features;
6828 ixgbe_do_reset(netdev);
6833 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm,
6834 struct net_device *dev,
6835 unsigned char *addr,
6838 struct ixgbe_adapter *adapter = netdev_priv(dev);
6839 int err = -EOPNOTSUPP;
6841 if (ndm->ndm_state & NUD_PERMANENT) {
6842 pr_info("%s: FDB only supports static addresses\n",
6847 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6848 if (is_unicast_ether_addr(addr))
6849 err = dev_uc_add_excl(dev, addr);
6850 else if (is_multicast_ether_addr(addr))
6851 err = dev_mc_add_excl(dev, addr);
6856 /* Only return duplicate errors if NLM_F_EXCL is set */
6857 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6863 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
6864 struct net_device *dev,
6865 unsigned char *addr)
6867 struct ixgbe_adapter *adapter = netdev_priv(dev);
6868 int err = -EOPNOTSUPP;
6870 if (ndm->ndm_state & NUD_PERMANENT) {
6871 pr_info("%s: FDB only supports static addresses\n",
6876 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6877 if (is_unicast_ether_addr(addr))
6878 err = dev_uc_del(dev, addr);
6879 else if (is_multicast_ether_addr(addr))
6880 err = dev_mc_del(dev, addr);
6888 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
6889 struct netlink_callback *cb,
6890 struct net_device *dev,
6893 struct ixgbe_adapter *adapter = netdev_priv(dev);
6895 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6896 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
6901 static const struct net_device_ops ixgbe_netdev_ops = {
6902 .ndo_open = ixgbe_open,
6903 .ndo_stop = ixgbe_close,
6904 .ndo_start_xmit = ixgbe_xmit_frame,
6905 .ndo_select_queue = ixgbe_select_queue,
6906 .ndo_set_rx_mode = ixgbe_set_rx_mode,
6907 .ndo_validate_addr = eth_validate_addr,
6908 .ndo_set_mac_address = ixgbe_set_mac,
6909 .ndo_change_mtu = ixgbe_change_mtu,
6910 .ndo_tx_timeout = ixgbe_tx_timeout,
6911 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6912 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
6913 .ndo_do_ioctl = ixgbe_ioctl,
6914 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6915 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6916 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6917 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
6918 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
6919 .ndo_get_stats64 = ixgbe_get_stats64,
6920 #ifdef CONFIG_IXGBE_DCB
6921 .ndo_setup_tc = ixgbe_setup_tc,
6923 #ifdef CONFIG_NET_POLL_CONTROLLER
6924 .ndo_poll_controller = ixgbe_netpoll,
6927 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6928 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
6929 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
6930 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6931 .ndo_fcoe_disable = ixgbe_fcoe_disable,
6932 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
6933 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
6934 #endif /* IXGBE_FCOE */
6935 .ndo_set_features = ixgbe_set_features,
6936 .ndo_fix_features = ixgbe_fix_features,
6937 .ndo_fdb_add = ixgbe_ndo_fdb_add,
6938 .ndo_fdb_del = ixgbe_ndo_fdb_del,
6939 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
6942 static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
6943 const struct ixgbe_info *ii)
6945 #ifdef CONFIG_PCI_IOV
6946 struct ixgbe_hw *hw = &adapter->hw;
6948 if (hw->mac.type == ixgbe_mac_82598EB)
6951 /* The 82599 supports up to 64 VFs per physical function
6952 * but this implementation limits allocation to 63 so that
6953 * basic networking resources are still available to the
6954 * physical function. If the user requests greater thn
6955 * 63 VFs then it is an error - reset to default of zero.
6957 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
6958 ixgbe_enable_sriov(adapter, ii);
6959 #endif /* CONFIG_PCI_IOV */
6963 * ixgbe_wol_supported - Check whether device supports WoL
6964 * @hw: hw specific details
6965 * @device_id: the device ID
6966 * @subdev_id: the subsystem device ID
6968 * This function is used by probe and ethtool to determine
6969 * which devices have WoL support
6972 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
6975 struct ixgbe_hw *hw = &adapter->hw;
6976 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
6977 int is_wol_supported = 0;
6979 switch (device_id) {
6980 case IXGBE_DEV_ID_82599_SFP:
6981 /* Only these subdevices could supports WOL */
6982 switch (subdevice_id) {
6983 case IXGBE_SUBDEV_ID_82599_560FLR:
6984 /* only support first port */
6985 if (hw->bus.func != 0)
6987 case IXGBE_SUBDEV_ID_82599_SFP:
6988 is_wol_supported = 1;
6992 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
6993 /* All except this subdevice support WOL */
6994 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
6995 is_wol_supported = 1;
6997 case IXGBE_DEV_ID_82599_KX4:
6998 is_wol_supported = 1;
7000 case IXGBE_DEV_ID_X540T:
7001 /* check eeprom to see if enabled wol */
7002 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
7003 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
7004 (hw->bus.func == 0))) {
7005 is_wol_supported = 1;
7010 return is_wol_supported;
7014 * ixgbe_probe - Device Initialization Routine
7015 * @pdev: PCI device information struct
7016 * @ent: entry in ixgbe_pci_tbl
7018 * Returns 0 on success, negative on failure
7020 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7021 * The OS initialization, configuring of the adapter private structure,
7022 * and a hardware reset occur.
7024 static int __devinit ixgbe_probe(struct pci_dev *pdev,
7025 const struct pci_device_id *ent)
7027 struct net_device *netdev;
7028 struct ixgbe_adapter *adapter = NULL;
7029 struct ixgbe_hw *hw;
7030 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7031 static int cards_found;
7032 int i, err, pci_using_dac;
7033 u8 part_str[IXGBE_PBANUM_LENGTH];
7034 unsigned int indices = num_possible_cpus();
7040 /* Catch broken hardware that put the wrong VF device ID in
7041 * the PCIe SR-IOV capability.
7043 if (pdev->is_virtfn) {
7044 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7045 pci_name(pdev), pdev->vendor, pdev->device);
7049 err = pci_enable_device_mem(pdev);
7053 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
7054 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7057 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
7059 err = dma_set_coherent_mask(&pdev->dev,
7063 "No usable DMA configuration, aborting\n");
7070 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7071 IORESOURCE_MEM), ixgbe_driver_name);
7074 "pci_request_selected_regions failed 0x%x\n", err);
7078 pci_enable_pcie_error_reporting(pdev);
7080 pci_set_master(pdev);
7081 pci_save_state(pdev);
7083 #ifdef CONFIG_IXGBE_DCB
7084 indices *= MAX_TRAFFIC_CLASS;
7087 if (ii->mac == ixgbe_mac_82598EB)
7088 #ifdef CONFIG_IXGBE_DCB
7089 indices = min_t(unsigned int, indices, MAX_TRAFFIC_CLASS * 4);
7091 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
7094 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
7097 indices += min_t(unsigned int, num_possible_cpus(),
7098 IXGBE_MAX_FCOE_INDICES);
7100 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7103 goto err_alloc_etherdev;
7106 SET_NETDEV_DEV(netdev, &pdev->dev);
7108 adapter = netdev_priv(netdev);
7109 pci_set_drvdata(pdev, adapter);
7111 adapter->netdev = netdev;
7112 adapter->pdev = pdev;
7115 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7117 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7118 pci_resource_len(pdev, 0));
7124 for (i = 1; i <= 5; i++) {
7125 if (pci_resource_len(pdev, i) == 0)
7129 netdev->netdev_ops = &ixgbe_netdev_ops;
7130 ixgbe_set_ethtool_ops(netdev);
7131 netdev->watchdog_timeo = 5 * HZ;
7132 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7134 adapter->bd_number = cards_found;
7137 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7138 hw->mac.type = ii->mac;
7141 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7142 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7143 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7144 if (!(eec & (1 << 8)))
7145 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7148 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7149 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7150 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7151 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7152 hw->phy.mdio.mmds = 0;
7153 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7154 hw->phy.mdio.dev = netdev;
7155 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7156 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7158 ii->get_invariants(hw);
7160 /* setup the private structure */
7161 err = ixgbe_sw_init(adapter);
7165 /* Make it possible the adapter to be woken up via WOL */
7166 switch (adapter->hw.mac.type) {
7167 case ixgbe_mac_82599EB:
7168 case ixgbe_mac_X540:
7169 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7176 * If there is a fan on this device and it has failed log the
7179 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7180 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7181 if (esdp & IXGBE_ESDP_SDP1)
7182 e_crit(probe, "Fan has stopped, replace the adapter\n");
7185 if (allow_unsupported_sfp)
7186 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7188 /* reset_hw fills in the perm_addr as well */
7189 hw->phy.reset_if_overtemp = true;
7190 err = hw->mac.ops.reset_hw(hw);
7191 hw->phy.reset_if_overtemp = false;
7192 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7193 hw->mac.type == ixgbe_mac_82598EB) {
7195 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7196 e_dev_err("failed to load because an unsupported SFP+ "
7197 "module type was detected.\n");
7198 e_dev_err("Reload the driver after installing a supported "
7202 e_dev_err("HW Init failed: %d\n", err);
7206 ixgbe_probe_vf(adapter, ii);
7208 netdev->features = NETIF_F_SG |
7211 NETIF_F_HW_VLAN_TX |
7212 NETIF_F_HW_VLAN_RX |
7213 NETIF_F_HW_VLAN_FILTER |
7219 netdev->hw_features = netdev->features;
7221 switch (adapter->hw.mac.type) {
7222 case ixgbe_mac_82599EB:
7223 case ixgbe_mac_X540:
7224 netdev->features |= NETIF_F_SCTP_CSUM;
7225 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7232 netdev->hw_features |= NETIF_F_RXALL;
7234 netdev->vlan_features |= NETIF_F_TSO;
7235 netdev->vlan_features |= NETIF_F_TSO6;
7236 netdev->vlan_features |= NETIF_F_IP_CSUM;
7237 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7238 netdev->vlan_features |= NETIF_F_SG;
7240 netdev->priv_flags |= IFF_UNICAST_FLT;
7241 netdev->priv_flags |= IFF_SUPP_NOFCS;
7243 #ifdef CONFIG_IXGBE_DCB
7244 netdev->dcbnl_ops = &dcbnl_ops;
7248 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7249 if (hw->mac.ops.get_device_caps) {
7250 hw->mac.ops.get_device_caps(hw, &device_caps);
7251 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7252 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7255 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7256 netdev->vlan_features |= NETIF_F_FCOE_CRC;
7257 netdev->vlan_features |= NETIF_F_FSO;
7258 netdev->vlan_features |= NETIF_F_FCOE_MTU;
7260 #endif /* IXGBE_FCOE */
7261 if (pci_using_dac) {
7262 netdev->features |= NETIF_F_HIGHDMA;
7263 netdev->vlan_features |= NETIF_F_HIGHDMA;
7266 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7267 netdev->hw_features |= NETIF_F_LRO;
7268 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7269 netdev->features |= NETIF_F_LRO;
7271 /* make sure the EEPROM is good */
7272 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7273 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7278 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7279 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7281 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
7282 e_dev_err("invalid MAC address\n");
7287 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7288 (unsigned long) adapter);
7290 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7291 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7293 err = ixgbe_init_interrupt_scheme(adapter);
7297 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
7298 netdev->hw_features &= ~NETIF_F_RXHASH;
7299 netdev->features &= ~NETIF_F_RXHASH;
7302 /* WOL not supported for all devices */
7304 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7305 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7306 adapter->wol = IXGBE_WUFC_MAG;
7308 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7310 #ifdef CONFIG_IXGBE_PTP
7311 ixgbe_ptp_init(adapter);
7312 #endif /* CONFIG_IXGBE_PTP*/
7314 /* save off EEPROM version number */
7315 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7316 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7318 /* pick up the PCI bus settings for reporting later */
7319 hw->mac.ops.get_bus_info(hw);
7321 /* print bus type/speed/width info */
7322 e_dev_info("(PCI Express:%s:%s) %pM\n",
7323 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7324 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7326 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7327 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7328 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7332 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7334 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7335 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7336 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7337 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7340 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7341 hw->mac.type, hw->phy.type, part_str);
7343 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7344 e_dev_warn("PCI-Express bandwidth available for this card is "
7345 "not sufficient for optimal performance.\n");
7346 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7350 /* reset the hardware with the new settings */
7351 err = hw->mac.ops.start_hw(hw);
7352 if (err == IXGBE_ERR_EEPROM_VERSION) {
7353 /* We are running on a pre-production device, log a warning */
7354 e_dev_warn("This device is a pre-production adapter/LOM. "
7355 "Please be aware there may be issues associated "
7356 "with your hardware. If you are experiencing "
7357 "problems please contact your Intel or hardware "
7358 "representative who provided you with this "
7361 strcpy(netdev->name, "eth%d");
7362 err = register_netdev(netdev);
7366 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7367 if (hw->mac.ops.disable_tx_laser &&
7368 ((hw->phy.multispeed_fiber) ||
7369 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
7370 (hw->mac.type == ixgbe_mac_82599EB))))
7371 hw->mac.ops.disable_tx_laser(hw);
7373 /* carrier off reporting is important to ethtool even BEFORE open */
7374 netif_carrier_off(netdev);
7376 #ifdef CONFIG_IXGBE_DCA
7377 if (dca_add_requester(&pdev->dev) == 0) {
7378 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7379 ixgbe_setup_dca(adapter);
7382 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7383 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7384 for (i = 0; i < adapter->num_vfs; i++)
7385 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7388 /* firmware requires driver version to be 0xFFFFFFFF
7389 * since os does not support feature
7391 if (hw->mac.ops.set_fw_drv_ver)
7392 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7395 /* add san mac addr to netdev */
7396 ixgbe_add_sanmac_netdev(netdev);
7398 e_dev_info("%s\n", ixgbe_default_device_descr);
7401 #ifdef CONFIG_IXGBE_HWMON
7402 if (ixgbe_sysfs_init(adapter))
7403 e_err(probe, "failed to allocate sysfs resources\n");
7404 #endif /* CONFIG_IXGBE_HWMON */
7409 ixgbe_release_hw_control(adapter);
7410 ixgbe_clear_interrupt_scheme(adapter);
7412 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7413 ixgbe_disable_sriov(adapter);
7414 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7415 iounmap(hw->hw_addr);
7417 free_netdev(netdev);
7419 pci_release_selected_regions(pdev,
7420 pci_select_bars(pdev, IORESOURCE_MEM));
7423 pci_disable_device(pdev);
7428 * ixgbe_remove - Device Removal Routine
7429 * @pdev: PCI device information struct
7431 * ixgbe_remove is called by the PCI subsystem to alert the driver
7432 * that it should release a PCI device. The could be caused by a
7433 * Hot-Plug event, or because the driver is going to be removed from
7436 static void __devexit ixgbe_remove(struct pci_dev *pdev)
7438 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7439 struct net_device *netdev = adapter->netdev;
7441 set_bit(__IXGBE_DOWN, &adapter->state);
7442 cancel_work_sync(&adapter->service_task);
7444 #ifdef CONFIG_IXGBE_PTP
7445 ixgbe_ptp_stop(adapter);
7448 #ifdef CONFIG_IXGBE_DCA
7449 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7450 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7451 dca_remove_requester(&pdev->dev);
7452 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7456 #ifdef CONFIG_IXGBE_HWMON
7457 ixgbe_sysfs_exit(adapter);
7458 #endif /* CONFIG_IXGBE_HWMON */
7461 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7462 ixgbe_cleanup_fcoe(adapter);
7464 #endif /* IXGBE_FCOE */
7466 /* remove the added san mac */
7467 ixgbe_del_sanmac_netdev(netdev);
7469 if (netdev->reg_state == NETREG_REGISTERED)
7470 unregister_netdev(netdev);
7472 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7473 if (!(ixgbe_check_vf_assignment(adapter)))
7474 ixgbe_disable_sriov(adapter);
7476 e_dev_warn("Unloading driver while VFs are assigned "
7477 "- VFs will not be deallocated\n");
7480 ixgbe_clear_interrupt_scheme(adapter);
7482 ixgbe_release_hw_control(adapter);
7485 kfree(adapter->ixgbe_ieee_pfc);
7486 kfree(adapter->ixgbe_ieee_ets);
7489 iounmap(adapter->hw.hw_addr);
7490 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7493 e_dev_info("complete\n");
7495 free_netdev(netdev);
7497 pci_disable_pcie_error_reporting(pdev);
7499 pci_disable_device(pdev);
7503 * ixgbe_io_error_detected - called when PCI error is detected
7504 * @pdev: Pointer to PCI device
7505 * @state: The current pci connection state
7507 * This function is called after a PCI bus error affecting
7508 * this device has been detected.
7510 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7511 pci_channel_state_t state)
7513 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7514 struct net_device *netdev = adapter->netdev;
7516 #ifdef CONFIG_PCI_IOV
7517 struct pci_dev *bdev, *vfdev;
7518 u32 dw0, dw1, dw2, dw3;
7520 u16 req_id, pf_func;
7522 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7523 adapter->num_vfs == 0)
7524 goto skip_bad_vf_detection;
7526 bdev = pdev->bus->self;
7527 while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
7528 bdev = bdev->bus->self;
7531 goto skip_bad_vf_detection;
7533 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7535 goto skip_bad_vf_detection;
7537 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7538 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7539 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7540 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7543 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7544 if (!(req_id & 0x0080))
7545 goto skip_bad_vf_detection;
7547 pf_func = req_id & 0x01;
7548 if ((pf_func & 1) == (pdev->devfn & 1)) {
7549 unsigned int device_id;
7551 vf = (req_id & 0x7F) >> 1;
7552 e_dev_err("VF %d has caused a PCIe error\n", vf);
7553 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7554 "%8.8x\tdw3: %8.8x\n",
7555 dw0, dw1, dw2, dw3);
7556 switch (adapter->hw.mac.type) {
7557 case ixgbe_mac_82599EB:
7558 device_id = IXGBE_82599_VF_DEVICE_ID;
7560 case ixgbe_mac_X540:
7561 device_id = IXGBE_X540_VF_DEVICE_ID;
7568 /* Find the pci device of the offending VF */
7569 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID, device_id, NULL);
7571 if (vfdev->devfn == (req_id & 0xFF))
7573 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID,
7577 * There's a slim chance the VF could have been hot plugged,
7578 * so if it is no longer present we don't need to issue the
7579 * VFLR. Just clean up the AER in that case.
7582 e_dev_err("Issuing VFLR to VF %d\n", vf);
7583 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7586 pci_cleanup_aer_uncorrect_error_status(pdev);
7590 * Even though the error may have occurred on the other port
7591 * we still need to increment the vf error reference count for
7592 * both ports because the I/O resume function will be called
7595 adapter->vferr_refcount++;
7597 return PCI_ERS_RESULT_RECOVERED;
7599 skip_bad_vf_detection:
7600 #endif /* CONFIG_PCI_IOV */
7601 netif_device_detach(netdev);
7603 if (state == pci_channel_io_perm_failure)
7604 return PCI_ERS_RESULT_DISCONNECT;
7606 if (netif_running(netdev))
7607 ixgbe_down(adapter);
7608 pci_disable_device(pdev);
7610 /* Request a slot reset. */
7611 return PCI_ERS_RESULT_NEED_RESET;
7615 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7616 * @pdev: Pointer to PCI device
7618 * Restart the card from scratch, as if from a cold-boot.
7620 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7622 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7623 pci_ers_result_t result;
7626 if (pci_enable_device_mem(pdev)) {
7627 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7628 result = PCI_ERS_RESULT_DISCONNECT;
7630 pci_set_master(pdev);
7631 pci_restore_state(pdev);
7632 pci_save_state(pdev);
7634 pci_wake_from_d3(pdev, false);
7636 ixgbe_reset(adapter);
7637 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7638 result = PCI_ERS_RESULT_RECOVERED;
7641 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7643 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7644 "failed 0x%0x\n", err);
7645 /* non-fatal, continue */
7652 * ixgbe_io_resume - called when traffic can start flowing again.
7653 * @pdev: Pointer to PCI device
7655 * This callback is called when the error recovery driver tells us that
7656 * its OK to resume normal operation.
7658 static void ixgbe_io_resume(struct pci_dev *pdev)
7660 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7661 struct net_device *netdev = adapter->netdev;
7663 #ifdef CONFIG_PCI_IOV
7664 if (adapter->vferr_refcount) {
7665 e_info(drv, "Resuming after VF err\n");
7666 adapter->vferr_refcount--;
7671 if (netif_running(netdev))
7674 netif_device_attach(netdev);
7677 static struct pci_error_handlers ixgbe_err_handler = {
7678 .error_detected = ixgbe_io_error_detected,
7679 .slot_reset = ixgbe_io_slot_reset,
7680 .resume = ixgbe_io_resume,
7683 static struct pci_driver ixgbe_driver = {
7684 .name = ixgbe_driver_name,
7685 .id_table = ixgbe_pci_tbl,
7686 .probe = ixgbe_probe,
7687 .remove = __devexit_p(ixgbe_remove),
7689 .suspend = ixgbe_suspend,
7690 .resume = ixgbe_resume,
7692 .shutdown = ixgbe_shutdown,
7693 .err_handler = &ixgbe_err_handler
7697 * ixgbe_init_module - Driver Registration Routine
7699 * ixgbe_init_module is the first routine called when the driver is
7700 * loaded. All it does is register with the PCI subsystem.
7702 static int __init ixgbe_init_module(void)
7705 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7706 pr_info("%s\n", ixgbe_copyright);
7708 #ifdef CONFIG_IXGBE_DCA
7709 dca_register_notify(&dca_notifier);
7712 ret = pci_register_driver(&ixgbe_driver);
7716 module_init(ixgbe_init_module);
7719 * ixgbe_exit_module - Driver Exit Cleanup Routine
7721 * ixgbe_exit_module is called just before the driver is removed
7724 static void __exit ixgbe_exit_module(void)
7726 #ifdef CONFIG_IXGBE_DCA
7727 dca_unregister_notify(&dca_notifier);
7729 pci_unregister_driver(&ixgbe_driver);
7730 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7733 #ifdef CONFIG_IXGBE_DCA
7734 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7739 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7740 __ixgbe_notify_dca);
7742 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7745 #endif /* CONFIG_IXGBE_DCA */
7747 module_exit(ixgbe_exit_module);