1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/ethtool.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_macvlan.h>
49 #include <linux/if_bridge.h>
50 #include <linux/prefetch.h>
51 #include <scsi/fc/fc_fcoe.h>
54 #include "ixgbe_common.h"
55 #include "ixgbe_dcb_82599.h"
56 #include "ixgbe_sriov.h"
58 char ixgbe_driver_name[] = "ixgbe";
59 static const char ixgbe_driver_string[] =
60 "Intel(R) 10 Gigabit PCI Express Network Driver";
62 char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
65 static char ixgbe_default_device_descr[] =
66 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION "3.19.1-k"
69 const char ixgbe_driver_version[] = DRV_VERSION;
70 static const char ixgbe_copyright[] =
71 "Copyright (c) 1999-2014 Intel Corporation.";
73 static const struct ixgbe_info *ixgbe_info_tbl[] = {
74 [board_82598] = &ixgbe_82598_info,
75 [board_82599] = &ixgbe_82599_info,
76 [board_X540] = &ixgbe_X540_info,
79 /* ixgbe_pci_tbl - PCI Device ID Table
81 * Wildcard entries (PCI_ANY_ID) should come last
82 * Last entry must be all 0s
84 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
85 * Class, Class Mask, private data (not used) }
87 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
126 static struct notifier_block dca_notifier = {
127 .notifier_call = ixgbe_notify_dca,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs;
135 module_param(max_vfs, uint, 0);
136 MODULE_PARM_DESC(max_vfs,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp;
141 module_param(allow_unsupported_sfp, uint, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug = -1;
147 module_param(debug, int, 0);
148 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION);
155 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
157 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
160 struct pci_dev *parent_dev;
161 struct pci_bus *parent_bus;
163 parent_bus = adapter->pdev->bus->parent;
167 parent_dev = parent_bus->self;
171 if (!pci_is_pcie(parent_dev))
174 pcie_capability_read_word(parent_dev, reg, value);
175 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
176 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
181 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
183 struct ixgbe_hw *hw = &adapter->hw;
187 hw->bus.type = ixgbe_bus_type_pci_express;
189 /* Get the negotiated link width and speed from PCI config space of the
190 * parent, as this device is behind a switch
192 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
194 /* assume caller will handle error case */
198 hw->bus.width = ixgbe_convert_bus_width(link_status);
199 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
205 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
206 * @hw: hw specific details
208 * This function is used by probe to determine whether a device's PCI-Express
209 * bandwidth details should be gathered from the parent bus instead of from the
210 * device. Used to ensure that various locations all have the correct device ID
213 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
215 switch (hw->device_id) {
216 case IXGBE_DEV_ID_82599_SFP_SF_QP:
217 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
224 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
228 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
229 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
230 struct pci_dev *pdev;
232 /* determine whether to use the the parent device
234 if (ixgbe_pcie_from_parent(&adapter->hw))
235 pdev = adapter->pdev->bus->parent->self;
237 pdev = adapter->pdev;
239 if (pcie_get_minimum_link(pdev, &speed, &width) ||
240 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
241 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
246 case PCIE_SPEED_2_5GT:
247 /* 8b/10b encoding reduces max throughput by 20% */
250 case PCIE_SPEED_5_0GT:
251 /* 8b/10b encoding reduces max throughput by 20% */
254 case PCIE_SPEED_8_0GT:
255 /* 128b/130b encoding reduces throughput by less than 2% */
259 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
263 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
265 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
266 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
267 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
268 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
271 (speed == PCIE_SPEED_2_5GT ? "20%" :
272 speed == PCIE_SPEED_5_0GT ? "20%" :
273 speed == PCIE_SPEED_8_0GT ? "<2%" :
276 if (max_gts < expected_gts) {
277 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
278 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
280 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
284 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
286 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
287 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
288 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
289 schedule_work(&adapter->service_task);
292 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
294 struct ixgbe_adapter *adapter = hw->back;
299 e_dev_err("Adapter removed\n");
300 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
301 ixgbe_service_event_schedule(adapter);
304 void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
308 /* The following check not only optimizes a bit by not
309 * performing a read on the status register when the
310 * register just read was a status register read that
311 * returned IXGBE_FAILED_READ_REG. It also blocks any
312 * potential recursion.
314 if (reg == IXGBE_STATUS) {
315 ixgbe_remove_adapter(hw);
318 value = ixgbe_read_reg(hw, IXGBE_STATUS);
319 if (value == IXGBE_FAILED_READ_REG)
320 ixgbe_remove_adapter(hw);
323 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
327 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
328 if (value == IXGBE_FAILED_READ_CFG_WORD) {
329 ixgbe_remove_adapter(hw);
335 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
337 struct ixgbe_adapter *adapter = hw->back;
340 if (ixgbe_removed(hw->hw_addr))
341 return IXGBE_FAILED_READ_CFG_WORD;
342 pci_read_config_word(adapter->pdev, reg, &value);
343 if (value == IXGBE_FAILED_READ_CFG_WORD &&
344 ixgbe_check_cfg_remove(hw, adapter->pdev))
345 return IXGBE_FAILED_READ_CFG_WORD;
349 #ifdef CONFIG_PCI_IOV
350 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
352 struct ixgbe_adapter *adapter = hw->back;
355 if (ixgbe_removed(hw->hw_addr))
356 return IXGBE_FAILED_READ_CFG_DWORD;
357 pci_read_config_dword(adapter->pdev, reg, &value);
358 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
359 ixgbe_check_cfg_remove(hw, adapter->pdev))
360 return IXGBE_FAILED_READ_CFG_DWORD;
363 #endif /* CONFIG_PCI_IOV */
365 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
367 struct ixgbe_adapter *adapter = hw->back;
369 if (ixgbe_removed(hw->hw_addr))
371 pci_write_config_word(adapter->pdev, reg, value);
374 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
376 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
378 /* flush memory to make sure state is correct before next watchdog */
379 smp_mb__before_clear_bit();
380 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
383 struct ixgbe_reg_info {
388 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
390 /* General Registers */
391 {IXGBE_CTRL, "CTRL"},
392 {IXGBE_STATUS, "STATUS"},
393 {IXGBE_CTRL_EXT, "CTRL_EXT"},
395 /* Interrupt Registers */
396 {IXGBE_EICR, "EICR"},
399 {IXGBE_SRRCTL(0), "SRRCTL"},
400 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
401 {IXGBE_RDLEN(0), "RDLEN"},
402 {IXGBE_RDH(0), "RDH"},
403 {IXGBE_RDT(0), "RDT"},
404 {IXGBE_RXDCTL(0), "RXDCTL"},
405 {IXGBE_RDBAL(0), "RDBAL"},
406 {IXGBE_RDBAH(0), "RDBAH"},
409 {IXGBE_TDBAL(0), "TDBAL"},
410 {IXGBE_TDBAH(0), "TDBAH"},
411 {IXGBE_TDLEN(0), "TDLEN"},
412 {IXGBE_TDH(0), "TDH"},
413 {IXGBE_TDT(0), "TDT"},
414 {IXGBE_TXDCTL(0), "TXDCTL"},
416 /* List Terminator */
422 * ixgbe_regdump - register printout routine
424 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
430 switch (reginfo->ofs) {
431 case IXGBE_SRRCTL(0):
432 for (i = 0; i < 64; i++)
433 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
435 case IXGBE_DCA_RXCTRL(0):
436 for (i = 0; i < 64; i++)
437 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
440 for (i = 0; i < 64; i++)
441 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
444 for (i = 0; i < 64; i++)
445 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
448 for (i = 0; i < 64; i++)
449 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
451 case IXGBE_RXDCTL(0):
452 for (i = 0; i < 64; i++)
453 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
456 for (i = 0; i < 64; i++)
457 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
460 for (i = 0; i < 64; i++)
461 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
464 for (i = 0; i < 64; i++)
465 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
468 for (i = 0; i < 64; i++)
469 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
472 for (i = 0; i < 64; i++)
473 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
476 for (i = 0; i < 64; i++)
477 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
480 for (i = 0; i < 64; i++)
481 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
483 case IXGBE_TXDCTL(0):
484 for (i = 0; i < 64; i++)
485 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
488 pr_info("%-15s %08x\n", reginfo->name,
489 IXGBE_READ_REG(hw, reginfo->ofs));
493 for (i = 0; i < 8; i++) {
494 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
495 pr_err("%-15s", rname);
496 for (j = 0; j < 8; j++)
497 pr_cont(" %08x", regs[i*8+j]);
504 * ixgbe_dump - Print registers, tx-rings and rx-rings
506 static void ixgbe_dump(struct ixgbe_adapter *adapter)
508 struct net_device *netdev = adapter->netdev;
509 struct ixgbe_hw *hw = &adapter->hw;
510 struct ixgbe_reg_info *reginfo;
512 struct ixgbe_ring *tx_ring;
513 struct ixgbe_tx_buffer *tx_buffer;
514 union ixgbe_adv_tx_desc *tx_desc;
515 struct my_u0 { u64 a; u64 b; } *u0;
516 struct ixgbe_ring *rx_ring;
517 union ixgbe_adv_rx_desc *rx_desc;
518 struct ixgbe_rx_buffer *rx_buffer_info;
522 if (!netif_msg_hw(adapter))
525 /* Print netdevice Info */
527 dev_info(&adapter->pdev->dev, "Net device Info\n");
528 pr_info("Device Name state "
529 "trans_start last_rx\n");
530 pr_info("%-15s %016lX %016lX %016lX\n",
537 /* Print Registers */
538 dev_info(&adapter->pdev->dev, "Register Dump\n");
539 pr_info(" Register Name Value\n");
540 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
541 reginfo->name; reginfo++) {
542 ixgbe_regdump(hw, reginfo);
545 /* Print TX Ring Summary */
546 if (!netdev || !netif_running(netdev))
549 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
550 pr_info(" %s %s %s %s\n",
551 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
552 "leng", "ntw", "timestamp");
553 for (n = 0; n < adapter->num_tx_queues; n++) {
554 tx_ring = adapter->tx_ring[n];
555 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
556 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
557 n, tx_ring->next_to_use, tx_ring->next_to_clean,
558 (u64)dma_unmap_addr(tx_buffer, dma),
559 dma_unmap_len(tx_buffer, len),
560 tx_buffer->next_to_watch,
561 (u64)tx_buffer->time_stamp);
565 if (!netif_msg_tx_done(adapter))
566 goto rx_ring_summary;
568 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
570 /* Transmit Descriptor Formats
572 * 82598 Advanced Transmit Descriptor
573 * +--------------------------------------------------------------+
574 * 0 | Buffer Address [63:0] |
575 * +--------------------------------------------------------------+
576 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
577 * +--------------------------------------------------------------+
578 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
580 * 82598 Advanced Transmit Descriptor (Write-Back Format)
581 * +--------------------------------------------------------------+
583 * +--------------------------------------------------------------+
584 * 8 | RSV | STA | NXTSEQ |
585 * +--------------------------------------------------------------+
588 * 82599+ Advanced Transmit Descriptor
589 * +--------------------------------------------------------------+
590 * 0 | Buffer Address [63:0] |
591 * +--------------------------------------------------------------+
592 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
593 * +--------------------------------------------------------------+
594 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
596 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
597 * +--------------------------------------------------------------+
599 * +--------------------------------------------------------------+
600 * 8 | RSV | STA | RSV |
601 * +--------------------------------------------------------------+
605 for (n = 0; n < adapter->num_tx_queues; n++) {
606 tx_ring = adapter->tx_ring[n];
607 pr_info("------------------------------------\n");
608 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
609 pr_info("------------------------------------\n");
610 pr_info("%s%s %s %s %s %s\n",
611 "T [desc] [address 63:0 ] ",
612 "[PlPOIdStDDt Ln] [bi->dma ] ",
613 "leng", "ntw", "timestamp", "bi->skb");
615 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
616 tx_desc = IXGBE_TX_DESC(tx_ring, i);
617 tx_buffer = &tx_ring->tx_buffer_info[i];
618 u0 = (struct my_u0 *)tx_desc;
619 if (dma_unmap_len(tx_buffer, len) > 0) {
620 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
624 (u64)dma_unmap_addr(tx_buffer, dma),
625 dma_unmap_len(tx_buffer, len),
626 tx_buffer->next_to_watch,
627 (u64)tx_buffer->time_stamp,
629 if (i == tx_ring->next_to_use &&
630 i == tx_ring->next_to_clean)
632 else if (i == tx_ring->next_to_use)
634 else if (i == tx_ring->next_to_clean)
639 if (netif_msg_pktdata(adapter) &&
641 print_hex_dump(KERN_INFO, "",
642 DUMP_PREFIX_ADDRESS, 16, 1,
643 tx_buffer->skb->data,
644 dma_unmap_len(tx_buffer, len),
650 /* Print RX Rings Summary */
652 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
653 pr_info("Queue [NTU] [NTC]\n");
654 for (n = 0; n < adapter->num_rx_queues; n++) {
655 rx_ring = adapter->rx_ring[n];
656 pr_info("%5d %5X %5X\n",
657 n, rx_ring->next_to_use, rx_ring->next_to_clean);
661 if (!netif_msg_rx_status(adapter))
664 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
666 /* Receive Descriptor Formats
668 * 82598 Advanced Receive Descriptor (Read) Format
670 * +-----------------------------------------------------+
671 * 0 | Packet Buffer Address [63:1] |A0/NSE|
672 * +----------------------------------------------+------+
673 * 8 | Header Buffer Address [63:1] | DD |
674 * +-----------------------------------------------------+
677 * 82598 Advanced Receive Descriptor (Write-Back) Format
679 * 63 48 47 32 31 30 21 20 16 15 4 3 0
680 * +------------------------------------------------------+
681 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
682 * | Packet | IP | | | | Type | Type |
683 * | Checksum | Ident | | | | | |
684 * +------------------------------------------------------+
685 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
686 * +------------------------------------------------------+
687 * 63 48 47 32 31 20 19 0
689 * 82599+ Advanced Receive Descriptor (Read) Format
691 * +-----------------------------------------------------+
692 * 0 | Packet Buffer Address [63:1] |A0/NSE|
693 * +----------------------------------------------+------+
694 * 8 | Header Buffer Address [63:1] | DD |
695 * +-----------------------------------------------------+
698 * 82599+ Advanced Receive Descriptor (Write-Back) Format
700 * 63 48 47 32 31 30 21 20 17 16 4 3 0
701 * +------------------------------------------------------+
702 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
703 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
704 * |/ Flow Dir Flt ID | | | | | |
705 * +------------------------------------------------------+
706 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
707 * +------------------------------------------------------+
708 * 63 48 47 32 31 20 19 0
711 for (n = 0; n < adapter->num_rx_queues; n++) {
712 rx_ring = adapter->rx_ring[n];
713 pr_info("------------------------------------\n");
714 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
715 pr_info("------------------------------------\n");
717 "R [desc] [ PktBuf A0] ",
718 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
719 "<-- Adv Rx Read format\n");
721 "RWB[desc] [PcsmIpSHl PtRs] ",
722 "[vl er S cks ln] ---------------- [bi->skb ] ",
723 "<-- Adv Rx Write-Back format\n");
725 for (i = 0; i < rx_ring->count; i++) {
726 rx_buffer_info = &rx_ring->rx_buffer_info[i];
727 rx_desc = IXGBE_RX_DESC(rx_ring, i);
728 u0 = (struct my_u0 *)rx_desc;
729 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
730 if (staterr & IXGBE_RXD_STAT_DD) {
731 /* Descriptor Done */
732 pr_info("RWB[0x%03X] %016llX "
733 "%016llX ---------------- %p", i,
736 rx_buffer_info->skb);
738 pr_info("R [0x%03X] %016llX "
739 "%016llX %016llX %p", i,
742 (u64)rx_buffer_info->dma,
743 rx_buffer_info->skb);
745 if (netif_msg_pktdata(adapter) &&
746 rx_buffer_info->dma) {
747 print_hex_dump(KERN_INFO, "",
748 DUMP_PREFIX_ADDRESS, 16, 1,
749 page_address(rx_buffer_info->page) +
750 rx_buffer_info->page_offset,
751 ixgbe_rx_bufsz(rx_ring), true);
755 if (i == rx_ring->next_to_use)
757 else if (i == rx_ring->next_to_clean)
769 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
773 /* Let firmware take over control of h/w */
774 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
775 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
776 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
779 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
783 /* Let firmware know the driver has taken over */
784 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
785 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
786 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
790 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
791 * @adapter: pointer to adapter struct
792 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
793 * @queue: queue to map the corresponding interrupt to
794 * @msix_vector: the vector to map to the corresponding queue
797 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
798 u8 queue, u8 msix_vector)
801 struct ixgbe_hw *hw = &adapter->hw;
802 switch (hw->mac.type) {
803 case ixgbe_mac_82598EB:
804 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
807 index = (((direction * 64) + queue) >> 2) & 0x1F;
808 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
809 ivar &= ~(0xFF << (8 * (queue & 0x3)));
810 ivar |= (msix_vector << (8 * (queue & 0x3)));
811 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
813 case ixgbe_mac_82599EB:
815 if (direction == -1) {
817 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
818 index = ((queue & 1) * 8);
819 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
820 ivar &= ~(0xFF << index);
821 ivar |= (msix_vector << index);
822 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
825 /* tx or rx causes */
826 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
827 index = ((16 * (queue & 1)) + (8 * direction));
828 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
829 ivar &= ~(0xFF << index);
830 ivar |= (msix_vector << index);
831 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
839 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
844 switch (adapter->hw.mac.type) {
845 case ixgbe_mac_82598EB:
846 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
847 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
849 case ixgbe_mac_82599EB:
851 mask = (qmask & 0xFFFFFFFF);
852 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
853 mask = (qmask >> 32);
854 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
861 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
862 struct ixgbe_tx_buffer *tx_buffer)
864 if (tx_buffer->skb) {
865 dev_kfree_skb_any(tx_buffer->skb);
866 if (dma_unmap_len(tx_buffer, len))
867 dma_unmap_single(ring->dev,
868 dma_unmap_addr(tx_buffer, dma),
869 dma_unmap_len(tx_buffer, len),
871 } else if (dma_unmap_len(tx_buffer, len)) {
872 dma_unmap_page(ring->dev,
873 dma_unmap_addr(tx_buffer, dma),
874 dma_unmap_len(tx_buffer, len),
877 tx_buffer->next_to_watch = NULL;
878 tx_buffer->skb = NULL;
879 dma_unmap_len_set(tx_buffer, len, 0);
880 /* tx_buffer must be completely set up in the transmit path */
883 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
885 struct ixgbe_hw *hw = &adapter->hw;
886 struct ixgbe_hw_stats *hwstats = &adapter->stats;
890 if ((hw->fc.current_mode != ixgbe_fc_full) &&
891 (hw->fc.current_mode != ixgbe_fc_rx_pause))
894 switch (hw->mac.type) {
895 case ixgbe_mac_82598EB:
896 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
899 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
901 hwstats->lxoffrxc += data;
903 /* refill credits (no tx hang) if we received xoff */
907 for (i = 0; i < adapter->num_tx_queues; i++)
908 clear_bit(__IXGBE_HANG_CHECK_ARMED,
909 &adapter->tx_ring[i]->state);
912 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
914 struct ixgbe_hw *hw = &adapter->hw;
915 struct ixgbe_hw_stats *hwstats = &adapter->stats;
919 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
921 if (adapter->ixgbe_ieee_pfc)
922 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
924 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
925 ixgbe_update_xoff_rx_lfc(adapter);
929 /* update stats for each tc, only valid with PFC enabled */
930 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
933 switch (hw->mac.type) {
934 case ixgbe_mac_82598EB:
935 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
938 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
940 hwstats->pxoffrxc[i] += pxoffrxc;
941 /* Get the TC for given UP */
942 tc = netdev_get_prio_tc_map(adapter->netdev, i);
943 xoff[tc] += pxoffrxc;
946 /* disarm tx queues that have received xoff frames */
947 for (i = 0; i < adapter->num_tx_queues; i++) {
948 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
950 tc = tx_ring->dcb_tc;
952 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
956 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
958 return ring->stats.packets;
961 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
963 struct ixgbe_adapter *adapter;
967 if (ring->l2_accel_priv)
968 adapter = ring->l2_accel_priv->real_adapter;
970 adapter = netdev_priv(ring->netdev);
973 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
974 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
977 return (head < tail) ?
978 tail - head : (tail + ring->count - head);
983 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
985 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
986 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
987 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
990 clear_check_for_tx_hang(tx_ring);
993 * Check for a hung queue, but be thorough. This verifies
994 * that a transmit has been completed since the previous
995 * check AND there is at least one packet pending. The
996 * ARMED bit is set to indicate a potential hang. The
997 * bit is cleared if a pause frame is received to remove
998 * false hang detection due to PFC or 802.3x frames. By
999 * requiring this to fail twice we avoid races with
1000 * pfc clearing the ARMED bit and conditions where we
1001 * run the check_tx_hang logic with a transmit completion
1002 * pending but without time to complete it yet.
1004 if ((tx_done_old == tx_done) && tx_pending) {
1005 /* make sure it is true for two checks in a row */
1006 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1009 /* update completed stats and continue */
1010 tx_ring->tx_stats.tx_done_old = tx_done;
1011 /* reset the countdown */
1012 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1019 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1020 * @adapter: driver private struct
1022 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1025 /* Do the reset outside of interrupt context */
1026 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1027 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1028 e_warn(drv, "initiating reset due to tx timeout\n");
1029 ixgbe_service_event_schedule(adapter);
1034 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1035 * @q_vector: structure containing interrupt and ring information
1036 * @tx_ring: tx ring to clean
1038 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1039 struct ixgbe_ring *tx_ring)
1041 struct ixgbe_adapter *adapter = q_vector->adapter;
1042 struct ixgbe_tx_buffer *tx_buffer;
1043 union ixgbe_adv_tx_desc *tx_desc;
1044 unsigned int total_bytes = 0, total_packets = 0;
1045 unsigned int budget = q_vector->tx.work_limit;
1046 unsigned int i = tx_ring->next_to_clean;
1048 if (test_bit(__IXGBE_DOWN, &adapter->state))
1051 tx_buffer = &tx_ring->tx_buffer_info[i];
1052 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1053 i -= tx_ring->count;
1056 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1058 /* if next_to_watch is not set then there is no work pending */
1062 /* prevent any other reads prior to eop_desc */
1063 read_barrier_depends();
1065 /* if DD is not set pending work has not been completed */
1066 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1069 /* clear next_to_watch to prevent false hangs */
1070 tx_buffer->next_to_watch = NULL;
1072 /* update the statistics for this packet */
1073 total_bytes += tx_buffer->bytecount;
1074 total_packets += tx_buffer->gso_segs;
1077 dev_kfree_skb_any(tx_buffer->skb);
1079 /* unmap skb header data */
1080 dma_unmap_single(tx_ring->dev,
1081 dma_unmap_addr(tx_buffer, dma),
1082 dma_unmap_len(tx_buffer, len),
1085 /* clear tx_buffer data */
1086 tx_buffer->skb = NULL;
1087 dma_unmap_len_set(tx_buffer, len, 0);
1089 /* unmap remaining buffers */
1090 while (tx_desc != eop_desc) {
1095 i -= tx_ring->count;
1096 tx_buffer = tx_ring->tx_buffer_info;
1097 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1100 /* unmap any remaining paged data */
1101 if (dma_unmap_len(tx_buffer, len)) {
1102 dma_unmap_page(tx_ring->dev,
1103 dma_unmap_addr(tx_buffer, dma),
1104 dma_unmap_len(tx_buffer, len),
1106 dma_unmap_len_set(tx_buffer, len, 0);
1110 /* move us one more past the eop_desc for start of next pkt */
1115 i -= tx_ring->count;
1116 tx_buffer = tx_ring->tx_buffer_info;
1117 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1120 /* issue prefetch for next Tx descriptor */
1123 /* update budget accounting */
1125 } while (likely(budget));
1127 i += tx_ring->count;
1128 tx_ring->next_to_clean = i;
1129 u64_stats_update_begin(&tx_ring->syncp);
1130 tx_ring->stats.bytes += total_bytes;
1131 tx_ring->stats.packets += total_packets;
1132 u64_stats_update_end(&tx_ring->syncp);
1133 q_vector->tx.total_bytes += total_bytes;
1134 q_vector->tx.total_packets += total_packets;
1136 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1137 /* schedule immediate reset if we believe we hung */
1138 struct ixgbe_hw *hw = &adapter->hw;
1139 e_err(drv, "Detected Tx Unit Hang\n"
1141 " TDH, TDT <%x>, <%x>\n"
1142 " next_to_use <%x>\n"
1143 " next_to_clean <%x>\n"
1144 "tx_buffer_info[next_to_clean]\n"
1145 " time_stamp <%lx>\n"
1147 tx_ring->queue_index,
1148 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1149 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1150 tx_ring->next_to_use, i,
1151 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1153 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1156 "tx hang %d detected on queue %d, resetting adapter\n",
1157 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1159 /* schedule immediate reset if we believe we hung */
1160 ixgbe_tx_timeout_reset(adapter);
1162 /* the adapter is about to reset, no point in enabling stuff */
1166 netdev_tx_completed_queue(txring_txq(tx_ring),
1167 total_packets, total_bytes);
1169 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1170 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1171 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1172 /* Make sure that anybody stopping the queue after this
1173 * sees the new next_to_clean.
1176 if (__netif_subqueue_stopped(tx_ring->netdev,
1177 tx_ring->queue_index)
1178 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1179 netif_wake_subqueue(tx_ring->netdev,
1180 tx_ring->queue_index);
1181 ++tx_ring->tx_stats.restart_queue;
1188 #ifdef CONFIG_IXGBE_DCA
1189 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1190 struct ixgbe_ring *tx_ring,
1193 struct ixgbe_hw *hw = &adapter->hw;
1194 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1197 switch (hw->mac.type) {
1198 case ixgbe_mac_82598EB:
1199 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1201 case ixgbe_mac_82599EB:
1202 case ixgbe_mac_X540:
1203 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1204 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1207 /* for unknown hardware do not write register */
1212 * We can enable relaxed ordering for reads, but not writes when
1213 * DCA is enabled. This is due to a known issue in some chipsets
1214 * which will cause the DCA tag to be cleared.
1216 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1217 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1218 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1220 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1223 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1224 struct ixgbe_ring *rx_ring,
1227 struct ixgbe_hw *hw = &adapter->hw;
1228 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1229 u8 reg_idx = rx_ring->reg_idx;
1232 switch (hw->mac.type) {
1233 case ixgbe_mac_82599EB:
1234 case ixgbe_mac_X540:
1235 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1242 * We can enable relaxed ordering for reads, but not writes when
1243 * DCA is enabled. This is due to a known issue in some chipsets
1244 * which will cause the DCA tag to be cleared.
1246 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1247 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1249 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1252 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1254 struct ixgbe_adapter *adapter = q_vector->adapter;
1255 struct ixgbe_ring *ring;
1256 int cpu = get_cpu();
1258 if (q_vector->cpu == cpu)
1261 ixgbe_for_each_ring(ring, q_vector->tx)
1262 ixgbe_update_tx_dca(adapter, ring, cpu);
1264 ixgbe_for_each_ring(ring, q_vector->rx)
1265 ixgbe_update_rx_dca(adapter, ring, cpu);
1267 q_vector->cpu = cpu;
1272 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1276 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1279 /* always use CB2 mode, difference is masked in the CB driver */
1280 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1282 for (i = 0; i < adapter->num_q_vectors; i++) {
1283 adapter->q_vector[i]->cpu = -1;
1284 ixgbe_update_dca(adapter->q_vector[i]);
1288 static int __ixgbe_notify_dca(struct device *dev, void *data)
1290 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1291 unsigned long event = *(unsigned long *)data;
1293 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1297 case DCA_PROVIDER_ADD:
1298 /* if we're already enabled, don't do it again */
1299 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1301 if (dca_add_requester(dev) == 0) {
1302 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1303 ixgbe_setup_dca(adapter);
1306 /* Fall Through since DCA is disabled. */
1307 case DCA_PROVIDER_REMOVE:
1308 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1309 dca_remove_requester(dev);
1310 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1311 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1319 #endif /* CONFIG_IXGBE_DCA */
1320 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1321 union ixgbe_adv_rx_desc *rx_desc,
1322 struct sk_buff *skb)
1324 if (ring->netdev->features & NETIF_F_RXHASH)
1326 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1332 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1333 * @ring: structure containing ring specific data
1334 * @rx_desc: advanced rx descriptor
1336 * Returns : true if it is FCoE pkt
1338 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1339 union ixgbe_adv_rx_desc *rx_desc)
1341 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1343 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1344 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1345 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1346 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1349 #endif /* IXGBE_FCOE */
1351 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1352 * @ring: structure containing ring specific data
1353 * @rx_desc: current Rx descriptor being processed
1354 * @skb: skb currently being received and modified
1356 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1357 union ixgbe_adv_rx_desc *rx_desc,
1358 struct sk_buff *skb)
1360 skb_checksum_none_assert(skb);
1362 /* Rx csum disabled */
1363 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1366 /* if IP and error */
1367 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1368 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1369 ring->rx_stats.csum_err++;
1373 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1376 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1377 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1380 * 82599 errata, UDP frames with a 0 checksum can be marked as
1383 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1384 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1387 ring->rx_stats.csum_err++;
1391 /* It must be a TCP or UDP packet with a valid checksum */
1392 skb->ip_summed = CHECKSUM_UNNECESSARY;
1395 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1397 rx_ring->next_to_use = val;
1399 /* update next to alloc since we have filled the ring */
1400 rx_ring->next_to_alloc = val;
1402 * Force memory writes to complete before letting h/w
1403 * know there are new descriptors to fetch. (Only
1404 * applicable for weak-ordered memory model archs,
1408 ixgbe_write_tail(rx_ring, val);
1411 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1412 struct ixgbe_rx_buffer *bi)
1414 struct page *page = bi->page;
1415 dma_addr_t dma = bi->dma;
1417 /* since we are recycling buffers we should seldom need to alloc */
1421 /* alloc new page for storage */
1422 if (likely(!page)) {
1423 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1424 bi->skb, ixgbe_rx_pg_order(rx_ring));
1425 if (unlikely(!page)) {
1426 rx_ring->rx_stats.alloc_rx_page_failed++;
1432 /* map page for use */
1433 dma = dma_map_page(rx_ring->dev, page, 0,
1434 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1437 * if mapping failed free memory back to system since
1438 * there isn't much point in holding memory we can't use
1440 if (dma_mapping_error(rx_ring->dev, dma)) {
1441 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1444 rx_ring->rx_stats.alloc_rx_page_failed++;
1449 bi->page_offset = 0;
1455 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1456 * @rx_ring: ring to place buffers on
1457 * @cleaned_count: number of buffers to replace
1459 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1461 union ixgbe_adv_rx_desc *rx_desc;
1462 struct ixgbe_rx_buffer *bi;
1463 u16 i = rx_ring->next_to_use;
1469 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1470 bi = &rx_ring->rx_buffer_info[i];
1471 i -= rx_ring->count;
1474 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1478 * Refresh the desc even if buffer_addrs didn't change
1479 * because each write-back erases this info.
1481 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1487 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1488 bi = rx_ring->rx_buffer_info;
1489 i -= rx_ring->count;
1492 /* clear the hdr_addr for the next_to_use descriptor */
1493 rx_desc->read.hdr_addr = 0;
1496 } while (cleaned_count);
1498 i += rx_ring->count;
1500 if (rx_ring->next_to_use != i)
1501 ixgbe_release_rx_desc(rx_ring, i);
1505 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1506 * @data: pointer to the start of the headers
1507 * @max_len: total length of section to find headers in
1509 * This function is meant to determine the length of headers that will
1510 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1511 * motivation of doing this is to only perform one pull for IPv4 TCP
1512 * packets so that we can do basic things like calculating the gso_size
1513 * based on the average data per packet.
1515 static unsigned int ixgbe_get_headlen(unsigned char *data,
1516 unsigned int max_len)
1519 unsigned char *network;
1522 struct vlan_hdr *vlan;
1525 struct ipv6hdr *ipv6;
1528 u8 nexthdr = 0; /* default to not TCP */
1531 /* this should never happen, but better safe than sorry */
1532 if (max_len < ETH_HLEN)
1535 /* initialize network frame pointer */
1538 /* set first protocol and move network header forward */
1539 protocol = hdr.eth->h_proto;
1540 hdr.network += ETH_HLEN;
1542 /* handle any vlan tag if present */
1543 if (protocol == htons(ETH_P_8021Q)) {
1544 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1547 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1548 hdr.network += VLAN_HLEN;
1551 /* handle L3 protocols */
1552 if (protocol == htons(ETH_P_IP)) {
1553 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1556 /* access ihl as a u8 to avoid unaligned access on ia64 */
1557 hlen = (hdr.network[0] & 0x0F) << 2;
1559 /* verify hlen meets minimum size requirements */
1560 if (hlen < sizeof(struct iphdr))
1561 return hdr.network - data;
1563 /* record next protocol if header is present */
1564 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
1565 nexthdr = hdr.ipv4->protocol;
1566 } else if (protocol == htons(ETH_P_IPV6)) {
1567 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
1570 /* record next protocol */
1571 nexthdr = hdr.ipv6->nexthdr;
1572 hlen = sizeof(struct ipv6hdr);
1574 } else if (protocol == htons(ETH_P_FCOE)) {
1575 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1577 hlen = FCOE_HEADER_LEN;
1580 return hdr.network - data;
1583 /* relocate pointer to start of L4 header */
1584 hdr.network += hlen;
1586 /* finally sort out TCP/UDP */
1587 if (nexthdr == IPPROTO_TCP) {
1588 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1591 /* access doff as a u8 to avoid unaligned access on ia64 */
1592 hlen = (hdr.network[12] & 0xF0) >> 2;
1594 /* verify hlen meets minimum size requirements */
1595 if (hlen < sizeof(struct tcphdr))
1596 return hdr.network - data;
1598 hdr.network += hlen;
1599 } else if (nexthdr == IPPROTO_UDP) {
1600 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
1603 hdr.network += sizeof(struct udphdr);
1607 * If everything has gone correctly hdr.network should be the
1608 * data section of the packet and will be the end of the header.
1609 * If not then it probably represents the end of the last recognized
1612 if ((hdr.network - data) < max_len)
1613 return hdr.network - data;
1618 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1619 struct sk_buff *skb)
1621 u16 hdr_len = skb_headlen(skb);
1623 /* set gso_size to avoid messing up TCP MSS */
1624 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1625 IXGBE_CB(skb)->append_cnt);
1626 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1629 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1630 struct sk_buff *skb)
1632 /* if append_cnt is 0 then frame is not RSC */
1633 if (!IXGBE_CB(skb)->append_cnt)
1636 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1637 rx_ring->rx_stats.rsc_flush++;
1639 ixgbe_set_rsc_gso_size(rx_ring, skb);
1641 /* gso_size is computed using append_cnt so always clear it last */
1642 IXGBE_CB(skb)->append_cnt = 0;
1646 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1647 * @rx_ring: rx descriptor ring packet is being transacted on
1648 * @rx_desc: pointer to the EOP Rx descriptor
1649 * @skb: pointer to current skb being populated
1651 * This function checks the ring, descriptor, and packet information in
1652 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1653 * other fields within the skb.
1655 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1656 union ixgbe_adv_rx_desc *rx_desc,
1657 struct sk_buff *skb)
1659 struct net_device *dev = rx_ring->netdev;
1661 ixgbe_update_rsc_stats(rx_ring, skb);
1663 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1665 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1667 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1669 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1670 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1671 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1672 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1675 skb_record_rx_queue(skb, rx_ring->queue_index);
1677 skb->protocol = eth_type_trans(skb, dev);
1680 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1681 struct sk_buff *skb)
1683 struct ixgbe_adapter *adapter = q_vector->adapter;
1685 if (ixgbe_qv_busy_polling(q_vector))
1686 netif_receive_skb(skb);
1687 else if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1688 napi_gro_receive(&q_vector->napi, skb);
1694 * ixgbe_is_non_eop - process handling of non-EOP buffers
1695 * @rx_ring: Rx ring being processed
1696 * @rx_desc: Rx descriptor for current buffer
1697 * @skb: Current socket buffer containing buffer in progress
1699 * This function updates next to clean. If the buffer is an EOP buffer
1700 * this function exits returning false, otherwise it will place the
1701 * sk_buff in the next buffer to be chained and return true indicating
1702 * that this is in fact a non-EOP buffer.
1704 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1705 union ixgbe_adv_rx_desc *rx_desc,
1706 struct sk_buff *skb)
1708 u32 ntc = rx_ring->next_to_clean + 1;
1710 /* fetch, update, and store next to clean */
1711 ntc = (ntc < rx_ring->count) ? ntc : 0;
1712 rx_ring->next_to_clean = ntc;
1714 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1716 /* update RSC append count if present */
1717 if (ring_is_rsc_enabled(rx_ring)) {
1718 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1719 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1721 if (unlikely(rsc_enabled)) {
1722 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1724 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1725 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1727 /* update ntc based on RSC value */
1728 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1729 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1730 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1734 /* if we are the last buffer then there is nothing else to do */
1735 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1738 /* place skb in next buffer to be received */
1739 rx_ring->rx_buffer_info[ntc].skb = skb;
1740 rx_ring->rx_stats.non_eop_descs++;
1746 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1747 * @rx_ring: rx descriptor ring packet is being transacted on
1748 * @skb: pointer to current skb being adjusted
1750 * This function is an ixgbe specific version of __pskb_pull_tail. The
1751 * main difference between this version and the original function is that
1752 * this function can make several assumptions about the state of things
1753 * that allow for significant optimizations versus the standard function.
1754 * As a result we can do things like drop a frag and maintain an accurate
1755 * truesize for the skb.
1757 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1758 struct sk_buff *skb)
1760 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1762 unsigned int pull_len;
1765 * it is valid to use page_address instead of kmap since we are
1766 * working with pages allocated out of the lomem pool per
1767 * alloc_page(GFP_ATOMIC)
1769 va = skb_frag_address(frag);
1772 * we need the header to contain the greater of either ETH_HLEN or
1773 * 60 bytes if the skb->len is less than 60 for skb_pad.
1775 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1777 /* align pull length to size of long to optimize memcpy performance */
1778 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1780 /* update all of the pointers */
1781 skb_frag_size_sub(frag, pull_len);
1782 frag->page_offset += pull_len;
1783 skb->data_len -= pull_len;
1784 skb->tail += pull_len;
1788 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1789 * @rx_ring: rx descriptor ring packet is being transacted on
1790 * @skb: pointer to current skb being updated
1792 * This function provides a basic DMA sync up for the first fragment of an
1793 * skb. The reason for doing this is that the first fragment cannot be
1794 * unmapped until we have reached the end of packet descriptor for a buffer
1797 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1798 struct sk_buff *skb)
1800 /* if the page was released unmap it, else just sync our portion */
1801 if (unlikely(IXGBE_CB(skb)->page_released)) {
1802 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1803 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1804 IXGBE_CB(skb)->page_released = false;
1806 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1808 dma_sync_single_range_for_cpu(rx_ring->dev,
1811 ixgbe_rx_bufsz(rx_ring),
1814 IXGBE_CB(skb)->dma = 0;
1818 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1819 * @rx_ring: rx descriptor ring packet is being transacted on
1820 * @rx_desc: pointer to the EOP Rx descriptor
1821 * @skb: pointer to current skb being fixed
1823 * Check for corrupted packet headers caused by senders on the local L2
1824 * embedded NIC switch not setting up their Tx Descriptors right. These
1825 * should be very rare.
1827 * Also address the case where we are pulling data in on pages only
1828 * and as such no data is present in the skb header.
1830 * In addition if skb is not at least 60 bytes we need to pad it so that
1831 * it is large enough to qualify as a valid Ethernet frame.
1833 * Returns true if an error was encountered and skb was freed.
1835 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1836 union ixgbe_adv_rx_desc *rx_desc,
1837 struct sk_buff *skb)
1839 struct net_device *netdev = rx_ring->netdev;
1841 /* verify that the packet does not have any known errors */
1842 if (unlikely(ixgbe_test_staterr(rx_desc,
1843 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1844 !(netdev->features & NETIF_F_RXALL))) {
1845 dev_kfree_skb_any(skb);
1849 /* place header in linear portion of buffer */
1850 if (skb_is_nonlinear(skb))
1851 ixgbe_pull_tail(rx_ring, skb);
1854 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1855 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1859 /* if skb_pad returns an error the skb was freed */
1860 if (unlikely(skb->len < 60)) {
1861 int pad_len = 60 - skb->len;
1863 if (skb_pad(skb, pad_len))
1865 __skb_put(skb, pad_len);
1872 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1873 * @rx_ring: rx descriptor ring to store buffers on
1874 * @old_buff: donor buffer to have page reused
1876 * Synchronizes page for reuse by the adapter
1878 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1879 struct ixgbe_rx_buffer *old_buff)
1881 struct ixgbe_rx_buffer *new_buff;
1882 u16 nta = rx_ring->next_to_alloc;
1884 new_buff = &rx_ring->rx_buffer_info[nta];
1886 /* update, and store next to alloc */
1888 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1890 /* transfer page from old buffer to new buffer */
1891 new_buff->page = old_buff->page;
1892 new_buff->dma = old_buff->dma;
1893 new_buff->page_offset = old_buff->page_offset;
1895 /* sync the buffer for use by the device */
1896 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1897 new_buff->page_offset,
1898 ixgbe_rx_bufsz(rx_ring),
1903 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1904 * @rx_ring: rx descriptor ring to transact packets on
1905 * @rx_buffer: buffer containing page to add
1906 * @rx_desc: descriptor containing length of buffer written by hardware
1907 * @skb: sk_buff to place the data into
1909 * This function will add the data contained in rx_buffer->page to the skb.
1910 * This is done either through a direct copy if the data in the buffer is
1911 * less than the skb header size, otherwise it will just attach the page as
1912 * a frag to the skb.
1914 * The function will then update the page offset if necessary and return
1915 * true if the buffer can be reused by the adapter.
1917 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1918 struct ixgbe_rx_buffer *rx_buffer,
1919 union ixgbe_adv_rx_desc *rx_desc,
1920 struct sk_buff *skb)
1922 struct page *page = rx_buffer->page;
1923 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1924 #if (PAGE_SIZE < 8192)
1925 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1927 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1928 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1929 ixgbe_rx_bufsz(rx_ring);
1932 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1933 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1935 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1937 /* we can reuse buffer as-is, just make sure it is local */
1938 if (likely(page_to_nid(page) == numa_node_id()))
1941 /* this page cannot be reused so discard it */
1946 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1947 rx_buffer->page_offset, size, truesize);
1949 /* avoid re-using remote pages */
1950 if (unlikely(page_to_nid(page) != numa_node_id()))
1953 #if (PAGE_SIZE < 8192)
1954 /* if we are only owner of page we can reuse it */
1955 if (unlikely(page_count(page) != 1))
1958 /* flip page offset to other buffer */
1959 rx_buffer->page_offset ^= truesize;
1962 * since we are the only owner of the page and we need to
1963 * increment it, just set the value to 2 in order to avoid
1964 * an unecessary locked operation
1966 atomic_set(&page->_count, 2);
1968 /* move offset up to the next cache line */
1969 rx_buffer->page_offset += truesize;
1971 if (rx_buffer->page_offset > last_offset)
1974 /* bump ref count on page before it is given to the stack */
1981 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1982 union ixgbe_adv_rx_desc *rx_desc)
1984 struct ixgbe_rx_buffer *rx_buffer;
1985 struct sk_buff *skb;
1988 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1989 page = rx_buffer->page;
1992 skb = rx_buffer->skb;
1995 void *page_addr = page_address(page) +
1996 rx_buffer->page_offset;
1998 /* prefetch first cache line of first page */
1999 prefetch(page_addr);
2000 #if L1_CACHE_BYTES < 128
2001 prefetch(page_addr + L1_CACHE_BYTES);
2004 /* allocate a skb to store the frags */
2005 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
2007 if (unlikely(!skb)) {
2008 rx_ring->rx_stats.alloc_rx_buff_failed++;
2013 * we will be copying header into skb->data in
2014 * pskb_may_pull so it is in our interest to prefetch
2015 * it now to avoid a possible cache miss
2017 prefetchw(skb->data);
2020 * Delay unmapping of the first packet. It carries the
2021 * header information, HW may still access the header
2022 * after the writeback. Only unmap it when EOP is
2025 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2028 IXGBE_CB(skb)->dma = rx_buffer->dma;
2030 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2031 ixgbe_dma_sync_frag(rx_ring, skb);
2034 /* we are reusing so sync this buffer for CPU use */
2035 dma_sync_single_range_for_cpu(rx_ring->dev,
2037 rx_buffer->page_offset,
2038 ixgbe_rx_bufsz(rx_ring),
2042 /* pull page into skb */
2043 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2044 /* hand second half of page back to the ring */
2045 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2046 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2047 /* the page has been released from the ring */
2048 IXGBE_CB(skb)->page_released = true;
2050 /* we are not reusing the buffer so unmap it */
2051 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2052 ixgbe_rx_pg_size(rx_ring),
2056 /* clear contents of buffer_info */
2057 rx_buffer->skb = NULL;
2059 rx_buffer->page = NULL;
2065 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2066 * @q_vector: structure containing interrupt and ring information
2067 * @rx_ring: rx descriptor ring to transact packets on
2068 * @budget: Total limit on number of packets to process
2070 * This function provides a "bounce buffer" approach to Rx interrupt
2071 * processing. The advantage to this is that on systems that have
2072 * expensive overhead for IOMMU access this provides a means of avoiding
2073 * it by maintaining the mapping of the page to the syste.
2075 * Returns amount of work completed
2077 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2078 struct ixgbe_ring *rx_ring,
2081 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2083 struct ixgbe_adapter *adapter = q_vector->adapter;
2085 unsigned int mss = 0;
2086 #endif /* IXGBE_FCOE */
2087 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2089 while (likely(total_rx_packets < budget)) {
2090 union ixgbe_adv_rx_desc *rx_desc;
2091 struct sk_buff *skb;
2093 /* return some buffers to hardware, one at a time is too slow */
2094 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2095 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2099 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2101 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
2105 * This memory barrier is needed to keep us from reading
2106 * any other fields out of the rx_desc until we know the
2107 * RXD_STAT_DD bit is set
2111 /* retrieve a buffer from the ring */
2112 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2114 /* exit if we failed to retrieve a buffer */
2120 /* place incomplete frames back on ring for completion */
2121 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2124 /* verify the packet layout is correct */
2125 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2128 /* probably a little skewed due to removing CRC */
2129 total_rx_bytes += skb->len;
2131 /* populate checksum, timestamp, VLAN, and protocol */
2132 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2135 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2136 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2137 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2138 /* include DDPed FCoE data */
2139 if (ddp_bytes > 0) {
2141 mss = rx_ring->netdev->mtu -
2142 sizeof(struct fcoe_hdr) -
2143 sizeof(struct fc_frame_header) -
2144 sizeof(struct fcoe_crc_eof);
2148 total_rx_bytes += ddp_bytes;
2149 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2153 dev_kfree_skb_any(skb);
2158 #endif /* IXGBE_FCOE */
2159 skb_mark_napi_id(skb, &q_vector->napi);
2160 ixgbe_rx_skb(q_vector, skb);
2162 /* update budget accounting */
2166 u64_stats_update_begin(&rx_ring->syncp);
2167 rx_ring->stats.packets += total_rx_packets;
2168 rx_ring->stats.bytes += total_rx_bytes;
2169 u64_stats_update_end(&rx_ring->syncp);
2170 q_vector->rx.total_packets += total_rx_packets;
2171 q_vector->rx.total_bytes += total_rx_bytes;
2174 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2176 return total_rx_packets;
2179 #ifdef CONFIG_NET_RX_BUSY_POLL
2180 /* must be called with local_bh_disable()d */
2181 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2183 struct ixgbe_q_vector *q_vector =
2184 container_of(napi, struct ixgbe_q_vector, napi);
2185 struct ixgbe_adapter *adapter = q_vector->adapter;
2186 struct ixgbe_ring *ring;
2189 if (test_bit(__IXGBE_DOWN, &adapter->state))
2190 return LL_FLUSH_FAILED;
2192 if (!ixgbe_qv_lock_poll(q_vector))
2193 return LL_FLUSH_BUSY;
2195 ixgbe_for_each_ring(ring, q_vector->rx) {
2196 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2197 #ifdef BP_EXTENDED_STATS
2199 ring->stats.cleaned += found;
2201 ring->stats.misses++;
2207 ixgbe_qv_unlock_poll(q_vector);
2211 #endif /* CONFIG_NET_RX_BUSY_POLL */
2214 * ixgbe_configure_msix - Configure MSI-X hardware
2215 * @adapter: board private structure
2217 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2220 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2222 struct ixgbe_q_vector *q_vector;
2226 /* Populate MSIX to EITR Select */
2227 if (adapter->num_vfs > 32) {
2228 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2229 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2233 * Populate the IVAR table and set the ITR values to the
2234 * corresponding register.
2236 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2237 struct ixgbe_ring *ring;
2238 q_vector = adapter->q_vector[v_idx];
2240 ixgbe_for_each_ring(ring, q_vector->rx)
2241 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2243 ixgbe_for_each_ring(ring, q_vector->tx)
2244 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2246 ixgbe_write_eitr(q_vector);
2249 switch (adapter->hw.mac.type) {
2250 case ixgbe_mac_82598EB:
2251 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2254 case ixgbe_mac_82599EB:
2255 case ixgbe_mac_X540:
2256 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2261 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2263 /* set up to autoclear timer, and the vectors */
2264 mask = IXGBE_EIMS_ENABLE_MASK;
2265 mask &= ~(IXGBE_EIMS_OTHER |
2266 IXGBE_EIMS_MAILBOX |
2269 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2272 enum latency_range {
2276 latency_invalid = 255
2280 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2281 * @q_vector: structure containing interrupt and ring information
2282 * @ring_container: structure containing ring performance data
2284 * Stores a new ITR value based on packets and byte
2285 * counts during the last interrupt. The advantage of per interrupt
2286 * computation is faster updates and more accurate ITR for the current
2287 * traffic pattern. Constants in this function were computed
2288 * based on theoretical maximum wire speed and thresholds were set based
2289 * on testing data as well as attempting to minimize response time
2290 * while increasing bulk throughput.
2291 * this functionality is controlled by the InterruptThrottleRate module
2292 * parameter (see ixgbe_param.c)
2294 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2295 struct ixgbe_ring_container *ring_container)
2297 int bytes = ring_container->total_bytes;
2298 int packets = ring_container->total_packets;
2301 u8 itr_setting = ring_container->itr;
2306 /* simple throttlerate management
2307 * 0-10MB/s lowest (100000 ints/s)
2308 * 10-20MB/s low (20000 ints/s)
2309 * 20-1249MB/s bulk (8000 ints/s)
2311 /* what was last interrupt timeslice? */
2312 timepassed_us = q_vector->itr >> 2;
2313 if (timepassed_us == 0)
2316 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2318 switch (itr_setting) {
2319 case lowest_latency:
2320 if (bytes_perint > 10)
2321 itr_setting = low_latency;
2324 if (bytes_perint > 20)
2325 itr_setting = bulk_latency;
2326 else if (bytes_perint <= 10)
2327 itr_setting = lowest_latency;
2330 if (bytes_perint <= 20)
2331 itr_setting = low_latency;
2335 /* clear work counters since we have the values we need */
2336 ring_container->total_bytes = 0;
2337 ring_container->total_packets = 0;
2339 /* write updated itr to ring container */
2340 ring_container->itr = itr_setting;
2344 * ixgbe_write_eitr - write EITR register in hardware specific way
2345 * @q_vector: structure containing interrupt and ring information
2347 * This function is made to be called by ethtool and by the driver
2348 * when it needs to update EITR registers at runtime. Hardware
2349 * specific quirks/differences are taken care of here.
2351 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2353 struct ixgbe_adapter *adapter = q_vector->adapter;
2354 struct ixgbe_hw *hw = &adapter->hw;
2355 int v_idx = q_vector->v_idx;
2356 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2358 switch (adapter->hw.mac.type) {
2359 case ixgbe_mac_82598EB:
2360 /* must write high and low 16 bits to reset counter */
2361 itr_reg |= (itr_reg << 16);
2363 case ixgbe_mac_82599EB:
2364 case ixgbe_mac_X540:
2366 * set the WDIS bit to not clear the timer bits and cause an
2367 * immediate assertion of the interrupt
2369 itr_reg |= IXGBE_EITR_CNT_WDIS;
2374 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2377 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2379 u32 new_itr = q_vector->itr;
2382 ixgbe_update_itr(q_vector, &q_vector->tx);
2383 ixgbe_update_itr(q_vector, &q_vector->rx);
2385 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2387 switch (current_itr) {
2388 /* counts and packets in update_itr are dependent on these numbers */
2389 case lowest_latency:
2390 new_itr = IXGBE_100K_ITR;
2393 new_itr = IXGBE_20K_ITR;
2396 new_itr = IXGBE_8K_ITR;
2402 if (new_itr != q_vector->itr) {
2403 /* do an exponential smoothing */
2404 new_itr = (10 * new_itr * q_vector->itr) /
2405 ((9 * new_itr) + q_vector->itr);
2407 /* save the algorithm value here */
2408 q_vector->itr = new_itr;
2410 ixgbe_write_eitr(q_vector);
2415 * ixgbe_check_overtemp_subtask - check for over temperature
2416 * @adapter: pointer to adapter
2418 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2420 struct ixgbe_hw *hw = &adapter->hw;
2421 u32 eicr = adapter->interrupt_event;
2423 if (test_bit(__IXGBE_DOWN, &adapter->state))
2426 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2427 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2430 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2432 switch (hw->device_id) {
2433 case IXGBE_DEV_ID_82599_T3_LOM:
2435 * Since the warning interrupt is for both ports
2436 * we don't have to check if:
2437 * - This interrupt wasn't for our port.
2438 * - We may have missed the interrupt so always have to
2439 * check if we got a LSC
2441 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2442 !(eicr & IXGBE_EICR_LSC))
2445 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2447 bool link_up = false;
2449 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2455 /* Check if this is not due to overtemp */
2456 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2461 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2466 "Network adapter has been stopped because it has over heated. "
2467 "Restart the computer. If the problem persists, "
2468 "power off the system and replace the adapter\n");
2470 adapter->interrupt_event = 0;
2473 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2475 struct ixgbe_hw *hw = &adapter->hw;
2477 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2478 (eicr & IXGBE_EICR_GPI_SDP1)) {
2479 e_crit(probe, "Fan has stopped, replace the adapter\n");
2480 /* write to clear the interrupt */
2481 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2485 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2487 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2490 switch (adapter->hw.mac.type) {
2491 case ixgbe_mac_82599EB:
2493 * Need to check link state so complete overtemp check
2496 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2497 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2498 adapter->interrupt_event = eicr;
2499 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2500 ixgbe_service_event_schedule(adapter);
2504 case ixgbe_mac_X540:
2505 if (!(eicr & IXGBE_EICR_TS))
2513 "Network adapter has been stopped because it has over heated. "
2514 "Restart the computer. If the problem persists, "
2515 "power off the system and replace the adapter\n");
2518 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2520 struct ixgbe_hw *hw = &adapter->hw;
2522 if (eicr & IXGBE_EICR_GPI_SDP2) {
2523 /* Clear the interrupt */
2524 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2525 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2526 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2527 ixgbe_service_event_schedule(adapter);
2531 if (eicr & IXGBE_EICR_GPI_SDP1) {
2532 /* Clear the interrupt */
2533 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2534 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2535 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2536 ixgbe_service_event_schedule(adapter);
2541 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2543 struct ixgbe_hw *hw = &adapter->hw;
2546 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2547 adapter->link_check_timeout = jiffies;
2548 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2549 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2550 IXGBE_WRITE_FLUSH(hw);
2551 ixgbe_service_event_schedule(adapter);
2555 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2559 struct ixgbe_hw *hw = &adapter->hw;
2561 switch (hw->mac.type) {
2562 case ixgbe_mac_82598EB:
2563 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2564 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2566 case ixgbe_mac_82599EB:
2567 case ixgbe_mac_X540:
2568 mask = (qmask & 0xFFFFFFFF);
2570 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2571 mask = (qmask >> 32);
2573 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2578 /* skip the flush */
2581 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2585 struct ixgbe_hw *hw = &adapter->hw;
2587 switch (hw->mac.type) {
2588 case ixgbe_mac_82598EB:
2589 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2590 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2592 case ixgbe_mac_82599EB:
2593 case ixgbe_mac_X540:
2594 mask = (qmask & 0xFFFFFFFF);
2596 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2597 mask = (qmask >> 32);
2599 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2604 /* skip the flush */
2608 * ixgbe_irq_enable - Enable default interrupt generation settings
2609 * @adapter: board private structure
2611 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2614 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2616 /* don't reenable LSC while waiting for link */
2617 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2618 mask &= ~IXGBE_EIMS_LSC;
2620 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2621 switch (adapter->hw.mac.type) {
2622 case ixgbe_mac_82599EB:
2623 mask |= IXGBE_EIMS_GPI_SDP0;
2625 case ixgbe_mac_X540:
2626 mask |= IXGBE_EIMS_TS;
2631 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2632 mask |= IXGBE_EIMS_GPI_SDP1;
2633 switch (adapter->hw.mac.type) {
2634 case ixgbe_mac_82599EB:
2635 mask |= IXGBE_EIMS_GPI_SDP1;
2636 mask |= IXGBE_EIMS_GPI_SDP2;
2637 case ixgbe_mac_X540:
2638 mask |= IXGBE_EIMS_ECC;
2639 mask |= IXGBE_EIMS_MAILBOX;
2645 if (adapter->hw.mac.type == ixgbe_mac_X540)
2646 mask |= IXGBE_EIMS_TIMESYNC;
2648 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2649 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2650 mask |= IXGBE_EIMS_FLOW_DIR;
2652 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2654 ixgbe_irq_enable_queues(adapter, ~0);
2656 IXGBE_WRITE_FLUSH(&adapter->hw);
2659 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2661 struct ixgbe_adapter *adapter = data;
2662 struct ixgbe_hw *hw = &adapter->hw;
2666 * Workaround for Silicon errata. Use clear-by-write instead
2667 * of clear-by-read. Reading with EICS will return the
2668 * interrupt causes without clearing, which later be done
2669 * with the write to EICR.
2671 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2673 /* The lower 16bits of the EICR register are for the queue interrupts
2674 * which should be masked here in order to not accidently clear them if
2675 * the bits are high when ixgbe_msix_other is called. There is a race
2676 * condition otherwise which results in possible performance loss
2677 * especially if the ixgbe_msix_other interrupt is triggering
2678 * consistently (as it would when PPS is turned on for the X540 device)
2682 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2684 if (eicr & IXGBE_EICR_LSC)
2685 ixgbe_check_lsc(adapter);
2687 if (eicr & IXGBE_EICR_MAILBOX)
2688 ixgbe_msg_task(adapter);
2690 switch (hw->mac.type) {
2691 case ixgbe_mac_82599EB:
2692 case ixgbe_mac_X540:
2693 if (eicr & IXGBE_EICR_ECC) {
2694 e_info(link, "Received ECC Err, initiating reset\n");
2695 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2696 ixgbe_service_event_schedule(adapter);
2697 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2699 /* Handle Flow Director Full threshold interrupt */
2700 if (eicr & IXGBE_EICR_FLOW_DIR) {
2701 int reinit_count = 0;
2703 for (i = 0; i < adapter->num_tx_queues; i++) {
2704 struct ixgbe_ring *ring = adapter->tx_ring[i];
2705 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2710 /* no more flow director interrupts until after init */
2711 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2712 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2713 ixgbe_service_event_schedule(adapter);
2716 ixgbe_check_sfp_event(adapter, eicr);
2717 ixgbe_check_overtemp_event(adapter, eicr);
2723 ixgbe_check_fan_failure(adapter, eicr);
2725 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2726 ixgbe_ptp_check_pps_event(adapter, eicr);
2728 /* re-enable the original interrupt state, no lsc, no queues */
2729 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2730 ixgbe_irq_enable(adapter, false, false);
2735 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2737 struct ixgbe_q_vector *q_vector = data;
2739 /* EIAM disabled interrupts (on this vector) for us */
2741 if (q_vector->rx.ring || q_vector->tx.ring)
2742 napi_schedule(&q_vector->napi);
2748 * ixgbe_poll - NAPI Rx polling callback
2749 * @napi: structure for representing this polling device
2750 * @budget: how many packets driver is allowed to clean
2752 * This function is used for legacy and MSI, NAPI mode
2754 int ixgbe_poll(struct napi_struct *napi, int budget)
2756 struct ixgbe_q_vector *q_vector =
2757 container_of(napi, struct ixgbe_q_vector, napi);
2758 struct ixgbe_adapter *adapter = q_vector->adapter;
2759 struct ixgbe_ring *ring;
2760 int per_ring_budget;
2761 bool clean_complete = true;
2763 #ifdef CONFIG_IXGBE_DCA
2764 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2765 ixgbe_update_dca(q_vector);
2768 ixgbe_for_each_ring(ring, q_vector->tx)
2769 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2771 if (!ixgbe_qv_lock_napi(q_vector))
2774 /* attempt to distribute budget to each queue fairly, but don't allow
2775 * the budget to go below 1 because we'll exit polling */
2776 if (q_vector->rx.count > 1)
2777 per_ring_budget = max(budget/q_vector->rx.count, 1);
2779 per_ring_budget = budget;
2781 ixgbe_for_each_ring(ring, q_vector->rx)
2782 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2783 per_ring_budget) < per_ring_budget);
2785 ixgbe_qv_unlock_napi(q_vector);
2786 /* If all work not completed, return budget and keep polling */
2787 if (!clean_complete)
2790 /* all work done, exit the polling mode */
2791 napi_complete(napi);
2792 if (adapter->rx_itr_setting & 1)
2793 ixgbe_set_itr(q_vector);
2794 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2795 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2801 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2802 * @adapter: board private structure
2804 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2805 * interrupts from the kernel.
2807 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2809 struct net_device *netdev = adapter->netdev;
2813 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2814 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2815 struct msix_entry *entry = &adapter->msix_entries[vector];
2817 if (q_vector->tx.ring && q_vector->rx.ring) {
2818 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2819 "%s-%s-%d", netdev->name, "TxRx", ri++);
2821 } else if (q_vector->rx.ring) {
2822 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2823 "%s-%s-%d", netdev->name, "rx", ri++);
2824 } else if (q_vector->tx.ring) {
2825 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2826 "%s-%s-%d", netdev->name, "tx", ti++);
2828 /* skip this unused q_vector */
2831 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2832 q_vector->name, q_vector);
2834 e_err(probe, "request_irq failed for MSIX interrupt "
2835 "Error: %d\n", err);
2836 goto free_queue_irqs;
2838 /* If Flow Director is enabled, set interrupt affinity */
2839 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2840 /* assign the mask for this irq */
2841 irq_set_affinity_hint(entry->vector,
2842 &q_vector->affinity_mask);
2846 err = request_irq(adapter->msix_entries[vector].vector,
2847 ixgbe_msix_other, 0, netdev->name, adapter);
2849 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2850 goto free_queue_irqs;
2858 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2860 free_irq(adapter->msix_entries[vector].vector,
2861 adapter->q_vector[vector]);
2863 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2864 pci_disable_msix(adapter->pdev);
2865 kfree(adapter->msix_entries);
2866 adapter->msix_entries = NULL;
2871 * ixgbe_intr - legacy mode Interrupt Handler
2872 * @irq: interrupt number
2873 * @data: pointer to a network interface device structure
2875 static irqreturn_t ixgbe_intr(int irq, void *data)
2877 struct ixgbe_adapter *adapter = data;
2878 struct ixgbe_hw *hw = &adapter->hw;
2879 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2883 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2884 * before the read of EICR.
2886 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2888 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2889 * therefore no explicit interrupt disable is necessary */
2890 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2893 * shared interrupt alert!
2894 * make sure interrupts are enabled because the read will
2895 * have disabled interrupts due to EIAM
2896 * finish the workaround of silicon errata on 82598. Unmask
2897 * the interrupt that we masked before the EICR read.
2899 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2900 ixgbe_irq_enable(adapter, true, true);
2901 return IRQ_NONE; /* Not our interrupt */
2904 if (eicr & IXGBE_EICR_LSC)
2905 ixgbe_check_lsc(adapter);
2907 switch (hw->mac.type) {
2908 case ixgbe_mac_82599EB:
2909 ixgbe_check_sfp_event(adapter, eicr);
2911 case ixgbe_mac_X540:
2912 if (eicr & IXGBE_EICR_ECC) {
2913 e_info(link, "Received ECC Err, initiating reset\n");
2914 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2915 ixgbe_service_event_schedule(adapter);
2916 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2918 ixgbe_check_overtemp_event(adapter, eicr);
2924 ixgbe_check_fan_failure(adapter, eicr);
2925 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2926 ixgbe_ptp_check_pps_event(adapter, eicr);
2928 /* would disable interrupts here but EIAM disabled it */
2929 napi_schedule(&q_vector->napi);
2932 * re-enable link(maybe) and non-queue interrupts, no flush.
2933 * ixgbe_poll will re-enable the queue interrupts
2935 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2936 ixgbe_irq_enable(adapter, false, false);
2942 * ixgbe_request_irq - initialize interrupts
2943 * @adapter: board private structure
2945 * Attempts to configure interrupts using the best available
2946 * capabilities of the hardware and kernel.
2948 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2950 struct net_device *netdev = adapter->netdev;
2953 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2954 err = ixgbe_request_msix_irqs(adapter);
2955 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2956 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2957 netdev->name, adapter);
2959 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2960 netdev->name, adapter);
2963 e_err(probe, "request_irq failed, Error %d\n", err);
2968 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2972 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2973 free_irq(adapter->pdev->irq, adapter);
2977 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2978 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2979 struct msix_entry *entry = &adapter->msix_entries[vector];
2981 /* free only the irqs that were actually requested */
2982 if (!q_vector->rx.ring && !q_vector->tx.ring)
2985 /* clear the affinity_mask in the IRQ descriptor */
2986 irq_set_affinity_hint(entry->vector, NULL);
2988 free_irq(entry->vector, q_vector);
2991 free_irq(adapter->msix_entries[vector++].vector, adapter);
2995 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2996 * @adapter: board private structure
2998 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3000 switch (adapter->hw.mac.type) {
3001 case ixgbe_mac_82598EB:
3002 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3004 case ixgbe_mac_82599EB:
3005 case ixgbe_mac_X540:
3006 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3007 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3008 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3013 IXGBE_WRITE_FLUSH(&adapter->hw);
3014 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3017 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3018 synchronize_irq(adapter->msix_entries[vector].vector);
3020 synchronize_irq(adapter->msix_entries[vector++].vector);
3022 synchronize_irq(adapter->pdev->irq);
3027 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3030 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3032 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3034 ixgbe_write_eitr(q_vector);
3036 ixgbe_set_ivar(adapter, 0, 0, 0);
3037 ixgbe_set_ivar(adapter, 1, 0, 0);
3039 e_info(hw, "Legacy interrupt IVAR setup done\n");
3043 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3044 * @adapter: board private structure
3045 * @ring: structure containing ring specific data
3047 * Configure the Tx descriptor ring after a reset.
3049 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3050 struct ixgbe_ring *ring)
3052 struct ixgbe_hw *hw = &adapter->hw;
3053 u64 tdba = ring->dma;
3055 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3056 u8 reg_idx = ring->reg_idx;
3058 /* disable queue to avoid issues while updating state */
3059 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3060 IXGBE_WRITE_FLUSH(hw);
3062 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3063 (tdba & DMA_BIT_MASK(32)));
3064 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3065 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3066 ring->count * sizeof(union ixgbe_adv_tx_desc));
3067 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3068 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3069 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3072 * set WTHRESH to encourage burst writeback, it should not be set
3073 * higher than 1 when:
3074 * - ITR is 0 as it could cause false TX hangs
3075 * - ITR is set to > 100k int/sec and BQL is enabled
3077 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3078 * to or less than the number of on chip descriptors, which is
3081 #if IS_ENABLED(CONFIG_BQL)
3082 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3084 if (!ring->q_vector || (ring->q_vector->itr < 8))
3086 txdctl |= (1 << 16); /* WTHRESH = 1 */
3088 txdctl |= (8 << 16); /* WTHRESH = 8 */
3091 * Setting PTHRESH to 32 both improves performance
3092 * and avoids a TX hang with DFP enabled
3094 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3095 32; /* PTHRESH = 32 */
3097 /* reinitialize flowdirector state */
3098 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3099 ring->atr_sample_rate = adapter->atr_sample_rate;
3100 ring->atr_count = 0;
3101 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3103 ring->atr_sample_rate = 0;
3106 /* initialize XPS */
3107 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3108 struct ixgbe_q_vector *q_vector = ring->q_vector;
3111 netif_set_xps_queue(ring->netdev,
3112 &q_vector->affinity_mask,
3116 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3119 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3121 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3122 if (hw->mac.type == ixgbe_mac_82598EB &&
3123 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3126 /* poll to verify queue is enabled */
3128 usleep_range(1000, 2000);
3129 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3130 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3132 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3135 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3137 struct ixgbe_hw *hw = &adapter->hw;
3139 u8 tcs = netdev_get_num_tc(adapter->netdev);
3141 if (hw->mac.type == ixgbe_mac_82598EB)
3144 /* disable the arbiter while setting MTQC */
3145 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3146 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3147 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3149 /* set transmit pool layout */
3150 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3151 mtqc = IXGBE_MTQC_VT_ENA;
3153 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3155 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3156 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3157 mtqc |= IXGBE_MTQC_32VF;
3159 mtqc |= IXGBE_MTQC_64VF;
3162 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3164 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3166 mtqc = IXGBE_MTQC_64Q_1PB;
3169 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3171 /* Enable Security TX Buffer IFG for multiple pb */
3173 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3174 sectx |= IXGBE_SECTX_DCB;
3175 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3178 /* re-enable the arbiter */
3179 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3180 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3184 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3185 * @adapter: board private structure
3187 * Configure the Tx unit of the MAC after a reset.
3189 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3191 struct ixgbe_hw *hw = &adapter->hw;
3195 ixgbe_setup_mtqc(adapter);
3197 if (hw->mac.type != ixgbe_mac_82598EB) {
3198 /* DMATXCTL.EN must be before Tx queues are enabled */
3199 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3200 dmatxctl |= IXGBE_DMATXCTL_TE;
3201 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3204 /* Setup the HW Tx Head and Tail descriptor pointers */
3205 for (i = 0; i < adapter->num_tx_queues; i++)
3206 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3209 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3210 struct ixgbe_ring *ring)
3212 struct ixgbe_hw *hw = &adapter->hw;
3213 u8 reg_idx = ring->reg_idx;
3214 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3216 srrctl |= IXGBE_SRRCTL_DROP_EN;
3218 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3221 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3222 struct ixgbe_ring *ring)
3224 struct ixgbe_hw *hw = &adapter->hw;
3225 u8 reg_idx = ring->reg_idx;
3226 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3228 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3230 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3233 #ifdef CONFIG_IXGBE_DCB
3234 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3236 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3240 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3242 if (adapter->ixgbe_ieee_pfc)
3243 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3246 * We should set the drop enable bit if:
3249 * Number of Rx queues > 1 and flow control is disabled
3251 * This allows us to avoid head of line blocking for security
3252 * and performance reasons.
3254 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3255 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3256 for (i = 0; i < adapter->num_rx_queues; i++)
3257 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3259 for (i = 0; i < adapter->num_rx_queues; i++)
3260 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3264 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3266 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3267 struct ixgbe_ring *rx_ring)
3269 struct ixgbe_hw *hw = &adapter->hw;
3271 u8 reg_idx = rx_ring->reg_idx;
3273 if (hw->mac.type == ixgbe_mac_82598EB) {
3274 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3277 * if VMDq is not active we must program one srrctl register
3278 * per RSS queue since we have enabled RDRXCTL.MVMEN
3283 /* configure header buffer length, needed for RSC */
3284 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3286 /* configure the packet buffer length */
3287 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3289 /* configure descriptor type */
3290 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3292 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3295 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3297 struct ixgbe_hw *hw = &adapter->hw;
3298 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3299 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3300 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3301 u32 mrqc = 0, reta = 0;
3304 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3307 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3308 * make full use of any rings they may have. We will use the
3309 * PSRTYPE register to control how many rings we use within the PF.
3311 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3314 /* Fill out hash function seeds */
3315 for (i = 0; i < 10; i++)
3316 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3318 /* Fill out redirection table */
3319 for (i = 0, j = 0; i < 128; i++, j++) {
3322 /* reta = 4-byte sliding window of
3323 * 0x00..(indices-1)(indices-1)00..etc. */
3324 reta = (reta << 8) | (j * 0x11);
3326 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3329 /* Disable indicating checksum in descriptor, enables RSS hash */
3330 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3331 rxcsum |= IXGBE_RXCSUM_PCSD;
3332 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3334 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3335 if (adapter->ring_feature[RING_F_RSS].mask)
3336 mrqc = IXGBE_MRQC_RSSEN;
3338 u8 tcs = netdev_get_num_tc(adapter->netdev);
3340 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3342 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3344 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3345 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3346 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3348 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3351 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3353 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3355 mrqc = IXGBE_MRQC_RSSEN;
3359 /* Perform hash on these packet types */
3360 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3361 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3362 IXGBE_MRQC_RSS_FIELD_IPV6 |
3363 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3365 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3366 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3367 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3368 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3370 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3374 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3375 * @adapter: address of board private structure
3376 * @index: index of ring to set
3378 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3379 struct ixgbe_ring *ring)
3381 struct ixgbe_hw *hw = &adapter->hw;
3383 u8 reg_idx = ring->reg_idx;
3385 if (!ring_is_rsc_enabled(ring))
3388 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3389 rscctrl |= IXGBE_RSCCTL_RSCEN;
3391 * we must limit the number of descriptors so that the
3392 * total size of max desc * buf_len is not greater
3395 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3396 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3399 #define IXGBE_MAX_RX_DESC_POLL 10
3400 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3401 struct ixgbe_ring *ring)
3403 struct ixgbe_hw *hw = &adapter->hw;
3404 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3406 u8 reg_idx = ring->reg_idx;
3408 if (ixgbe_removed(hw->hw_addr))
3410 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3411 if (hw->mac.type == ixgbe_mac_82598EB &&
3412 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3416 usleep_range(1000, 2000);
3417 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3418 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3421 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3422 "the polling period\n", reg_idx);
3426 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3427 struct ixgbe_ring *ring)
3429 struct ixgbe_hw *hw = &adapter->hw;
3430 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3432 u8 reg_idx = ring->reg_idx;
3434 if (ixgbe_removed(hw->hw_addr))
3436 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3437 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3439 /* write value back with RXDCTL.ENABLE bit cleared */
3440 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3442 if (hw->mac.type == ixgbe_mac_82598EB &&
3443 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3446 /* the hardware may take up to 100us to really disable the rx queue */
3449 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3450 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3453 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3454 "the polling period\n", reg_idx);
3458 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3459 struct ixgbe_ring *ring)
3461 struct ixgbe_hw *hw = &adapter->hw;
3462 u64 rdba = ring->dma;
3464 u8 reg_idx = ring->reg_idx;
3466 /* disable queue to avoid issues while updating state */
3467 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3468 ixgbe_disable_rx_queue(adapter, ring);
3470 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3471 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3472 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3473 ring->count * sizeof(union ixgbe_adv_rx_desc));
3474 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3475 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3476 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3478 ixgbe_configure_srrctl(adapter, ring);
3479 ixgbe_configure_rscctl(adapter, ring);
3481 if (hw->mac.type == ixgbe_mac_82598EB) {
3483 * enable cache line friendly hardware writes:
3484 * PTHRESH=32 descriptors (half the internal cache),
3485 * this also removes ugly rx_no_buffer_count increment
3486 * HTHRESH=4 descriptors (to minimize latency on fetch)
3487 * WTHRESH=8 burst writeback up to two cache lines
3489 rxdctl &= ~0x3FFFFF;
3493 /* enable receive descriptor ring */
3494 rxdctl |= IXGBE_RXDCTL_ENABLE;
3495 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3497 ixgbe_rx_desc_queue_enable(adapter, ring);
3498 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3501 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3503 struct ixgbe_hw *hw = &adapter->hw;
3504 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3507 /* PSRTYPE must be initialized in non 82598 adapters */
3508 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3509 IXGBE_PSRTYPE_UDPHDR |
3510 IXGBE_PSRTYPE_IPV4HDR |
3511 IXGBE_PSRTYPE_L2HDR |
3512 IXGBE_PSRTYPE_IPV6HDR;
3514 if (hw->mac.type == ixgbe_mac_82598EB)
3522 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3523 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3526 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3528 struct ixgbe_hw *hw = &adapter->hw;
3529 u32 reg_offset, vf_shift;
3530 u32 gcr_ext, vmdctl;
3533 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3536 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3537 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3538 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3539 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3540 vmdctl |= IXGBE_VT_CTL_REPLEN;
3541 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3543 vf_shift = VMDQ_P(0) % 32;
3544 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3546 /* Enable only the PF's pool for Tx/Rx */
3547 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3548 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3549 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3550 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3551 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3552 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3554 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3555 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3558 * Set up VF register offsets for selected VT Mode,
3559 * i.e. 32 or 64 VFs for SR-IOV
3561 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3562 case IXGBE_82599_VMDQ_8Q_MASK:
3563 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3565 case IXGBE_82599_VMDQ_4Q_MASK:
3566 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3569 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3573 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3576 /* Enable MAC Anti-Spoofing */
3577 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3579 /* For VFs that have spoof checking turned off */
3580 for (i = 0; i < adapter->num_vfs; i++) {
3581 if (!adapter->vfinfo[i].spoofchk_enabled)
3582 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3586 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3588 struct ixgbe_hw *hw = &adapter->hw;
3589 struct net_device *netdev = adapter->netdev;
3590 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3591 struct ixgbe_ring *rx_ring;
3596 /* adjust max frame to be able to do baby jumbo for FCoE */
3597 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3598 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3599 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3601 #endif /* IXGBE_FCOE */
3603 /* adjust max frame to be at least the size of a standard frame */
3604 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3605 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3607 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3608 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3609 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3610 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3612 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3615 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3616 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3617 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3618 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3621 * Setup the HW Rx Head and Tail Descriptor Pointers and
3622 * the Base and Length of the Rx Descriptor Ring
3624 for (i = 0; i < adapter->num_rx_queues; i++) {
3625 rx_ring = adapter->rx_ring[i];
3626 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3627 set_ring_rsc_enabled(rx_ring);
3629 clear_ring_rsc_enabled(rx_ring);
3633 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3635 struct ixgbe_hw *hw = &adapter->hw;
3636 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3638 switch (hw->mac.type) {
3639 case ixgbe_mac_82598EB:
3641 * For VMDq support of different descriptor types or
3642 * buffer sizes through the use of multiple SRRCTL
3643 * registers, RDRXCTL.MVMEN must be set to 1
3645 * also, the manual doesn't mention it clearly but DCA hints
3646 * will only use queue 0's tags unless this bit is set. Side
3647 * effects of setting this bit are only that SRRCTL must be
3648 * fully programmed [0..15]
3650 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3652 case ixgbe_mac_82599EB:
3653 case ixgbe_mac_X540:
3654 /* Disable RSC for ACK packets */
3655 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3656 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3657 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3658 /* hardware requires some bits to be set by default */
3659 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3660 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3663 /* We should do nothing since we don't know this hardware */
3667 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3671 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3672 * @adapter: board private structure
3674 * Configure the Rx unit of the MAC after a reset.
3676 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3678 struct ixgbe_hw *hw = &adapter->hw;
3682 /* disable receives while setting up the descriptors */
3683 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3684 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3686 ixgbe_setup_psrtype(adapter);
3687 ixgbe_setup_rdrxctl(adapter);
3690 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3691 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3692 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3693 rfctl |= IXGBE_RFCTL_RSC_DIS;
3694 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3696 /* Program registers for the distribution of queues */
3697 ixgbe_setup_mrqc(adapter);
3699 /* set_rx_buffer_len must be called before ring initialization */
3700 ixgbe_set_rx_buffer_len(adapter);
3703 * Setup the HW Rx Head and Tail Descriptor Pointers and
3704 * the Base and Length of the Rx Descriptor Ring
3706 for (i = 0; i < adapter->num_rx_queues; i++)
3707 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3709 /* disable drop enable for 82598 parts */
3710 if (hw->mac.type == ixgbe_mac_82598EB)
3711 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3713 /* enable all receives */
3714 rxctrl |= IXGBE_RXCTRL_RXEN;
3715 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3718 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3719 __be16 proto, u16 vid)
3721 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3722 struct ixgbe_hw *hw = &adapter->hw;
3724 /* add VID to filter table */
3725 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3726 set_bit(vid, adapter->active_vlans);
3731 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3732 __be16 proto, u16 vid)
3734 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3735 struct ixgbe_hw *hw = &adapter->hw;
3737 /* remove VID from filter table */
3738 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3739 clear_bit(vid, adapter->active_vlans);
3745 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3746 * @adapter: driver data
3748 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3750 struct ixgbe_hw *hw = &adapter->hw;
3753 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3754 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3755 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3759 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3760 * @adapter: driver data
3762 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3764 struct ixgbe_hw *hw = &adapter->hw;
3767 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3768 vlnctrl |= IXGBE_VLNCTRL_VFE;
3769 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3770 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3774 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3775 * @adapter: driver data
3777 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3779 struct ixgbe_hw *hw = &adapter->hw;
3783 switch (hw->mac.type) {
3784 case ixgbe_mac_82598EB:
3785 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3786 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3787 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3789 case ixgbe_mac_82599EB:
3790 case ixgbe_mac_X540:
3791 for (i = 0; i < adapter->num_rx_queues; i++) {
3792 struct ixgbe_ring *ring = adapter->rx_ring[i];
3794 if (ring->l2_accel_priv)
3797 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3798 vlnctrl &= ~IXGBE_RXDCTL_VME;
3799 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3808 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3809 * @adapter: driver data
3811 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3813 struct ixgbe_hw *hw = &adapter->hw;
3817 switch (hw->mac.type) {
3818 case ixgbe_mac_82598EB:
3819 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3820 vlnctrl |= IXGBE_VLNCTRL_VME;
3821 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3823 case ixgbe_mac_82599EB:
3824 case ixgbe_mac_X540:
3825 for (i = 0; i < adapter->num_rx_queues; i++) {
3826 struct ixgbe_ring *ring = adapter->rx_ring[i];
3828 if (ring->l2_accel_priv)
3831 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3832 vlnctrl |= IXGBE_RXDCTL_VME;
3833 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3841 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3845 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3847 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3848 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3852 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3853 * @netdev: network interface device structure
3855 * Writes unicast address list to the RAR table.
3856 * Returns: -ENOMEM on failure/insufficient address space
3857 * 0 on no addresses written
3858 * X on writing X addresses to the RAR table
3860 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3862 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3863 struct ixgbe_hw *hw = &adapter->hw;
3864 unsigned int rar_entries = hw->mac.num_rar_entries - 1;
3867 /* In SR-IOV/VMDQ modes significantly less RAR entries are available */
3868 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3869 rar_entries = IXGBE_MAX_PF_MACVLANS - 1;
3871 /* return ENOMEM indicating insufficient memory for addresses */
3872 if (netdev_uc_count(netdev) > rar_entries)
3875 if (!netdev_uc_empty(netdev)) {
3876 struct netdev_hw_addr *ha;
3877 /* return error if we do not support writing to RAR table */
3878 if (!hw->mac.ops.set_rar)
3881 netdev_for_each_uc_addr(ha, netdev) {
3884 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3885 VMDQ_P(0), IXGBE_RAH_AV);
3889 /* write the addresses in reverse order to avoid write combining */
3890 for (; rar_entries > 0 ; rar_entries--)
3891 hw->mac.ops.clear_rar(hw, rar_entries);
3897 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3898 * @netdev: network interface device structure
3900 * The set_rx_method entry point is called whenever the unicast/multicast
3901 * address list or the network interface flags are updated. This routine is
3902 * responsible for configuring the hardware for proper unicast, multicast and
3905 void ixgbe_set_rx_mode(struct net_device *netdev)
3907 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3908 struct ixgbe_hw *hw = &adapter->hw;
3909 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3912 /* Check for Promiscuous and All Multicast modes */
3914 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3916 /* set all bits that we expect to always be set */
3917 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3918 fctrl |= IXGBE_FCTRL_BAM;
3919 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3920 fctrl |= IXGBE_FCTRL_PMCF;
3922 /* clear the bits we are changing the status of */
3923 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3925 if (netdev->flags & IFF_PROMISC) {
3926 hw->addr_ctrl.user_set_promisc = true;
3927 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3928 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3929 /* Only disable hardware filter vlans in promiscuous mode
3930 * if SR-IOV and VMDQ are disabled - otherwise ensure
3931 * that hardware VLAN filters remain enabled.
3933 if (!(adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
3934 IXGBE_FLAG_SRIOV_ENABLED)))
3935 ixgbe_vlan_filter_disable(adapter);
3937 ixgbe_vlan_filter_enable(adapter);
3939 if (netdev->flags & IFF_ALLMULTI) {
3940 fctrl |= IXGBE_FCTRL_MPE;
3941 vmolr |= IXGBE_VMOLR_MPE;
3943 ixgbe_vlan_filter_enable(adapter);
3944 hw->addr_ctrl.user_set_promisc = false;
3948 * Write addresses to available RAR registers, if there is not
3949 * sufficient space to store all the addresses then enable
3950 * unicast promiscuous mode
3952 count = ixgbe_write_uc_addr_list(netdev);
3954 fctrl |= IXGBE_FCTRL_UPE;
3955 vmolr |= IXGBE_VMOLR_ROPE;
3958 /* Write addresses to the MTA, if the attempt fails
3959 * then we should just turn on promiscuous mode so
3960 * that we can at least receive multicast traffic
3962 hw->mac.ops.update_mc_addr_list(hw, netdev);
3963 vmolr |= IXGBE_VMOLR_ROMPE;
3965 if (adapter->num_vfs)
3966 ixgbe_restore_vf_multicasts(adapter);
3968 if (hw->mac.type != ixgbe_mac_82598EB) {
3969 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
3970 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3972 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
3975 /* This is useful for sniffing bad packets. */
3976 if (adapter->netdev->features & NETIF_F_RXALL) {
3977 /* UPE and MPE will be handled by normal PROMISC logic
3978 * in e1000e_set_rx_mode */
3979 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3980 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3981 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3983 fctrl &= ~(IXGBE_FCTRL_DPF);
3984 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3987 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3989 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3990 ixgbe_vlan_strip_enable(adapter);
3992 ixgbe_vlan_strip_disable(adapter);
3995 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3999 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4000 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4001 napi_enable(&adapter->q_vector[q_idx]->napi);
4005 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4009 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4010 napi_disable(&adapter->q_vector[q_idx]->napi);
4011 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4012 pr_info("QV %d locked\n", q_idx);
4013 usleep_range(1000, 20000);
4018 #ifdef CONFIG_IXGBE_DCB
4020 * ixgbe_configure_dcb - Configure DCB hardware
4021 * @adapter: ixgbe adapter struct
4023 * This is called by the driver on open to configure the DCB hardware.
4024 * This is also called by the gennetlink interface when reconfiguring
4027 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4029 struct ixgbe_hw *hw = &adapter->hw;
4030 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4032 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4033 if (hw->mac.type == ixgbe_mac_82598EB)
4034 netif_set_gso_max_size(adapter->netdev, 65536);
4038 if (hw->mac.type == ixgbe_mac_82598EB)
4039 netif_set_gso_max_size(adapter->netdev, 32768);
4042 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4043 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4046 /* reconfigure the hardware */
4047 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4048 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4050 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4052 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4053 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4054 ixgbe_dcb_hw_ets(&adapter->hw,
4055 adapter->ixgbe_ieee_ets,
4057 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4058 adapter->ixgbe_ieee_pfc->pfc_en,
4059 adapter->ixgbe_ieee_ets->prio_tc);
4062 /* Enable RSS Hash per TC */
4063 if (hw->mac.type != ixgbe_mac_82598EB) {
4065 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4072 /* write msb to all 8 TCs in one write */
4073 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4078 /* Additional bittime to account for IXGBE framing */
4079 #define IXGBE_ETH_FRAMING 20
4082 * ixgbe_hpbthresh - calculate high water mark for flow control
4084 * @adapter: board private structure to calculate for
4085 * @pb: packet buffer to calculate
4087 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4089 struct ixgbe_hw *hw = &adapter->hw;
4090 struct net_device *dev = adapter->netdev;
4091 int link, tc, kb, marker;
4094 /* Calculate max LAN frame size */
4095 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4098 /* FCoE traffic class uses FCOE jumbo frames */
4099 if ((dev->features & NETIF_F_FCOE_MTU) &&
4100 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4101 (pb == ixgbe_fcoe_get_tc(adapter)))
4102 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4105 /* Calculate delay value for device */
4106 switch (hw->mac.type) {
4107 case ixgbe_mac_X540:
4108 dv_id = IXGBE_DV_X540(link, tc);
4111 dv_id = IXGBE_DV(link, tc);
4115 /* Loopback switch introduces additional latency */
4116 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4117 dv_id += IXGBE_B2BT(tc);
4119 /* Delay value is calculated in bit times convert to KB */
4120 kb = IXGBE_BT2KB(dv_id);
4121 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4123 marker = rx_pba - kb;
4125 /* It is possible that the packet buffer is not large enough
4126 * to provide required headroom. In this case throw an error
4127 * to user and a do the best we can.
4130 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4131 "headroom to support flow control."
4132 "Decrease MTU or number of traffic classes\n", pb);
4140 * ixgbe_lpbthresh - calculate low water mark for for flow control
4142 * @adapter: board private structure to calculate for
4143 * @pb: packet buffer to calculate
4145 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
4147 struct ixgbe_hw *hw = &adapter->hw;
4148 struct net_device *dev = adapter->netdev;
4152 /* Calculate max LAN frame size */
4153 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4155 /* Calculate delay value for device */
4156 switch (hw->mac.type) {
4157 case ixgbe_mac_X540:
4158 dv_id = IXGBE_LOW_DV_X540(tc);
4161 dv_id = IXGBE_LOW_DV(tc);
4165 /* Delay value is calculated in bit times convert to KB */
4166 return IXGBE_BT2KB(dv_id);
4170 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4172 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4174 struct ixgbe_hw *hw = &adapter->hw;
4175 int num_tc = netdev_get_num_tc(adapter->netdev);
4181 hw->fc.low_water = ixgbe_lpbthresh(adapter);
4183 for (i = 0; i < num_tc; i++) {
4184 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4186 /* Low water marks must not be larger than high water marks */
4187 if (hw->fc.low_water > hw->fc.high_water[i])
4188 hw->fc.low_water = 0;
4192 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4194 struct ixgbe_hw *hw = &adapter->hw;
4196 u8 tc = netdev_get_num_tc(adapter->netdev);
4198 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4199 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4200 hdrm = 32 << adapter->fdir_pballoc;
4204 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4205 ixgbe_pbthresh_setup(adapter);
4208 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4210 struct ixgbe_hw *hw = &adapter->hw;
4211 struct hlist_node *node2;
4212 struct ixgbe_fdir_filter *filter;
4214 spin_lock(&adapter->fdir_perfect_lock);
4216 if (!hlist_empty(&adapter->fdir_filter_list))
4217 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4219 hlist_for_each_entry_safe(filter, node2,
4220 &adapter->fdir_filter_list, fdir_node) {
4221 ixgbe_fdir_write_perfect_filter_82599(hw,
4224 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4225 IXGBE_FDIR_DROP_QUEUE :
4226 adapter->rx_ring[filter->action]->reg_idx);
4229 spin_unlock(&adapter->fdir_perfect_lock);
4232 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4233 struct ixgbe_adapter *adapter)
4235 struct ixgbe_hw *hw = &adapter->hw;
4238 /* No unicast promiscuous support for VMDQ devices. */
4239 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4240 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4242 /* clear the affected bit */
4243 vmolr &= ~IXGBE_VMOLR_MPE;
4245 if (dev->flags & IFF_ALLMULTI) {
4246 vmolr |= IXGBE_VMOLR_MPE;
4248 vmolr |= IXGBE_VMOLR_ROMPE;
4249 hw->mac.ops.update_mc_addr_list(hw, dev);
4251 ixgbe_write_uc_addr_list(adapter->netdev);
4252 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4255 static void ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4258 struct ixgbe_hw *hw = &adapter->hw;
4261 entry = hw->mac.num_rar_entries - pool;
4262 hw->mac.ops.set_rar(hw, entry, addr, VMDQ_P(pool), IXGBE_RAH_AV);
4265 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4267 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4268 int rss_i = adapter->num_rx_queues_per_pool;
4269 struct ixgbe_hw *hw = &adapter->hw;
4270 u16 pool = vadapter->pool;
4271 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4272 IXGBE_PSRTYPE_UDPHDR |
4273 IXGBE_PSRTYPE_IPV4HDR |
4274 IXGBE_PSRTYPE_L2HDR |
4275 IXGBE_PSRTYPE_IPV6HDR;
4277 if (hw->mac.type == ixgbe_mac_82598EB)
4285 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4289 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4290 * @rx_ring: ring to free buffers from
4292 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4294 struct device *dev = rx_ring->dev;
4298 /* ring already cleared, nothing to do */
4299 if (!rx_ring->rx_buffer_info)
4302 /* Free all the Rx ring sk_buffs */
4303 for (i = 0; i < rx_ring->count; i++) {
4304 struct ixgbe_rx_buffer *rx_buffer;
4306 rx_buffer = &rx_ring->rx_buffer_info[i];
4307 if (rx_buffer->skb) {
4308 struct sk_buff *skb = rx_buffer->skb;
4309 if (IXGBE_CB(skb)->page_released) {
4312 ixgbe_rx_bufsz(rx_ring),
4314 IXGBE_CB(skb)->page_released = false;
4318 rx_buffer->skb = NULL;
4320 dma_unmap_page(dev, rx_buffer->dma,
4321 ixgbe_rx_pg_size(rx_ring),
4324 if (rx_buffer->page)
4325 __free_pages(rx_buffer->page,
4326 ixgbe_rx_pg_order(rx_ring));
4327 rx_buffer->page = NULL;
4330 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4331 memset(rx_ring->rx_buffer_info, 0, size);
4333 /* Zero out the descriptor ring */
4334 memset(rx_ring->desc, 0, rx_ring->size);
4336 rx_ring->next_to_alloc = 0;
4337 rx_ring->next_to_clean = 0;
4338 rx_ring->next_to_use = 0;
4341 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4342 struct ixgbe_ring *rx_ring)
4344 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4345 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4347 /* shutdown specific queue receive and wait for dma to settle */
4348 ixgbe_disable_rx_queue(adapter, rx_ring);
4349 usleep_range(10000, 20000);
4350 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4351 ixgbe_clean_rx_ring(rx_ring);
4352 rx_ring->l2_accel_priv = NULL;
4355 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4356 struct ixgbe_fwd_adapter *accel)
4358 struct ixgbe_adapter *adapter = accel->real_adapter;
4359 unsigned int rxbase = accel->rx_base_queue;
4360 unsigned int txbase = accel->tx_base_queue;
4363 netif_tx_stop_all_queues(vdev);
4365 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4366 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4367 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4370 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4371 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4372 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4379 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4380 struct ixgbe_fwd_adapter *accel)
4382 struct ixgbe_adapter *adapter = accel->real_adapter;
4383 unsigned int rxbase, txbase, queues;
4384 int i, baseq, err = 0;
4386 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4389 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4390 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4391 accel->pool, adapter->num_rx_pools,
4392 baseq, baseq + adapter->num_rx_queues_per_pool,
4393 adapter->fwd_bitmask);
4395 accel->netdev = vdev;
4396 accel->rx_base_queue = rxbase = baseq;
4397 accel->tx_base_queue = txbase = baseq;
4399 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4400 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4402 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4403 adapter->rx_ring[rxbase + i]->netdev = vdev;
4404 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4405 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4408 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4409 adapter->tx_ring[txbase + i]->netdev = vdev;
4410 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4413 queues = min_t(unsigned int,
4414 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4415 err = netif_set_real_num_tx_queues(vdev, queues);
4419 err = netif_set_real_num_rx_queues(vdev, queues);
4423 if (is_valid_ether_addr(vdev->dev_addr))
4424 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4426 ixgbe_fwd_psrtype(accel);
4427 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4430 ixgbe_fwd_ring_down(vdev, accel);
4434 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4436 struct net_device *upper;
4437 struct list_head *iter;
4440 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4441 if (netif_is_macvlan(upper)) {
4442 struct macvlan_dev *dfwd = netdev_priv(upper);
4443 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4445 if (dfwd->fwd_priv) {
4446 err = ixgbe_fwd_ring_up(upper, vadapter);
4454 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4456 struct ixgbe_hw *hw = &adapter->hw;
4458 ixgbe_configure_pb(adapter);
4459 #ifdef CONFIG_IXGBE_DCB
4460 ixgbe_configure_dcb(adapter);
4463 * We must restore virtualization before VLANs or else
4464 * the VLVF registers will not be populated
4466 ixgbe_configure_virtualization(adapter);
4468 ixgbe_set_rx_mode(adapter->netdev);
4469 ixgbe_restore_vlan(adapter);
4471 switch (hw->mac.type) {
4472 case ixgbe_mac_82599EB:
4473 case ixgbe_mac_X540:
4474 hw->mac.ops.disable_rx_buff(hw);
4480 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4481 ixgbe_init_fdir_signature_82599(&adapter->hw,
4482 adapter->fdir_pballoc);
4483 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4484 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4485 adapter->fdir_pballoc);
4486 ixgbe_fdir_filter_restore(adapter);
4489 switch (hw->mac.type) {
4490 case ixgbe_mac_82599EB:
4491 case ixgbe_mac_X540:
4492 hw->mac.ops.enable_rx_buff(hw);
4499 /* configure FCoE L2 filters, redirection table, and Rx control */
4500 ixgbe_configure_fcoe(adapter);
4502 #endif /* IXGBE_FCOE */
4503 ixgbe_configure_tx(adapter);
4504 ixgbe_configure_rx(adapter);
4505 ixgbe_configure_dfwd(adapter);
4508 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
4510 switch (hw->phy.type) {
4511 case ixgbe_phy_sfp_avago:
4512 case ixgbe_phy_sfp_ftl:
4513 case ixgbe_phy_sfp_intel:
4514 case ixgbe_phy_sfp_unknown:
4515 case ixgbe_phy_sfp_passive_tyco:
4516 case ixgbe_phy_sfp_passive_unknown:
4517 case ixgbe_phy_sfp_active_unknown:
4518 case ixgbe_phy_sfp_ftl_active:
4519 case ixgbe_phy_qsfp_passive_unknown:
4520 case ixgbe_phy_qsfp_active_unknown:
4521 case ixgbe_phy_qsfp_intel:
4522 case ixgbe_phy_qsfp_unknown:
4525 if (hw->mac.type == ixgbe_mac_82598EB)
4533 * ixgbe_sfp_link_config - set up SFP+ link
4534 * @adapter: pointer to private adapter struct
4536 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4539 * We are assuming the worst case scenario here, and that
4540 * is that an SFP was inserted/removed after the reset
4541 * but before SFP detection was enabled. As such the best
4542 * solution is to just start searching as soon as we start
4544 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4545 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4547 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4551 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4552 * @hw: pointer to private hardware struct
4554 * Returns 0 on success, negative on failure
4556 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4559 bool autoneg, link_up = false;
4560 u32 ret = IXGBE_ERR_LINK_SETUP;
4562 if (hw->mac.ops.check_link)
4563 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4568 speed = hw->phy.autoneg_advertised;
4569 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4570 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4575 if (hw->mac.ops.setup_link)
4576 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4581 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4583 struct ixgbe_hw *hw = &adapter->hw;
4586 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4587 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4589 gpie |= IXGBE_GPIE_EIAME;
4591 * use EIAM to auto-mask when MSI-X interrupt is asserted
4592 * this saves a register write for every interrupt
4594 switch (hw->mac.type) {
4595 case ixgbe_mac_82598EB:
4596 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4598 case ixgbe_mac_82599EB:
4599 case ixgbe_mac_X540:
4601 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4602 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4606 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4607 * specifically only auto mask tx and rx interrupts */
4608 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4611 /* XXX: to interrupt immediately for EICS writes, enable this */
4612 /* gpie |= IXGBE_GPIE_EIMEN; */
4614 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4615 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4617 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4618 case IXGBE_82599_VMDQ_8Q_MASK:
4619 gpie |= IXGBE_GPIE_VTMODE_16;
4621 case IXGBE_82599_VMDQ_4Q_MASK:
4622 gpie |= IXGBE_GPIE_VTMODE_32;
4625 gpie |= IXGBE_GPIE_VTMODE_64;
4630 /* Enable Thermal over heat sensor interrupt */
4631 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4632 switch (adapter->hw.mac.type) {
4633 case ixgbe_mac_82599EB:
4634 gpie |= IXGBE_SDP0_GPIEN;
4636 case ixgbe_mac_X540:
4637 gpie |= IXGBE_EIMS_TS;
4644 /* Enable fan failure interrupt */
4645 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4646 gpie |= IXGBE_SDP1_GPIEN;
4648 if (hw->mac.type == ixgbe_mac_82599EB) {
4649 gpie |= IXGBE_SDP1_GPIEN;
4650 gpie |= IXGBE_SDP2_GPIEN;
4653 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4656 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4658 struct ixgbe_hw *hw = &adapter->hw;
4662 ixgbe_get_hw_control(adapter);
4663 ixgbe_setup_gpie(adapter);
4665 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4666 ixgbe_configure_msix(adapter);
4668 ixgbe_configure_msi_and_legacy(adapter);
4670 /* enable the optics for 82599 SFP+ fiber */
4671 if (hw->mac.ops.enable_tx_laser)
4672 hw->mac.ops.enable_tx_laser(hw);
4674 smp_mb__before_clear_bit();
4675 clear_bit(__IXGBE_DOWN, &adapter->state);
4676 ixgbe_napi_enable_all(adapter);
4678 if (ixgbe_is_sfp(hw)) {
4679 ixgbe_sfp_link_config(adapter);
4681 err = ixgbe_non_sfp_link_config(hw);
4683 e_err(probe, "link_config FAILED %d\n", err);
4686 /* clear any pending interrupts, may auto mask */
4687 IXGBE_READ_REG(hw, IXGBE_EICR);
4688 ixgbe_irq_enable(adapter, true, true);
4691 * If this adapter has a fan, check to see if we had a failure
4692 * before we enabled the interrupt.
4694 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4695 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4696 if (esdp & IXGBE_ESDP_SDP1)
4697 e_crit(drv, "Fan has stopped, replace the adapter\n");
4700 /* bring the link up in the watchdog, this could race with our first
4701 * link up interrupt but shouldn't be a problem */
4702 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4703 adapter->link_check_timeout = jiffies;
4704 mod_timer(&adapter->service_timer, jiffies);
4706 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4707 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4708 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4709 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4712 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4714 WARN_ON(in_interrupt());
4715 /* put off any impending NetWatchDogTimeout */
4716 adapter->netdev->trans_start = jiffies;
4718 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4719 usleep_range(1000, 2000);
4720 ixgbe_down(adapter);
4722 * If SR-IOV enabled then wait a bit before bringing the adapter
4723 * back up to give the VFs time to respond to the reset. The
4724 * two second wait is based upon the watchdog timer cycle in
4727 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4730 clear_bit(__IXGBE_RESETTING, &adapter->state);
4733 void ixgbe_up(struct ixgbe_adapter *adapter)
4735 /* hardware has been reset, we need to reload some things */
4736 ixgbe_configure(adapter);
4738 ixgbe_up_complete(adapter);
4741 void ixgbe_reset(struct ixgbe_adapter *adapter)
4743 struct ixgbe_hw *hw = &adapter->hw;
4746 if (ixgbe_removed(hw->hw_addr))
4748 /* lock SFP init bit to prevent race conditions with the watchdog */
4749 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4750 usleep_range(1000, 2000);
4752 /* clear all SFP and link config related flags while holding SFP_INIT */
4753 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4754 IXGBE_FLAG2_SFP_NEEDS_RESET);
4755 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4757 err = hw->mac.ops.init_hw(hw);
4760 case IXGBE_ERR_SFP_NOT_PRESENT:
4761 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4763 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4764 e_dev_err("master disable timed out\n");
4766 case IXGBE_ERR_EEPROM_VERSION:
4767 /* We are running on a pre-production device, log a warning */
4768 e_dev_warn("This device is a pre-production adapter/LOM. "
4769 "Please be aware there may be issues associated with "
4770 "your hardware. If you are experiencing problems "
4771 "please contact your Intel or hardware "
4772 "representative who provided you with this "
4776 e_dev_err("Hardware Error: %d\n", err);
4779 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4781 /* reprogram the RAR[0] in case user changed it. */
4782 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
4784 /* update SAN MAC vmdq pool selection */
4785 if (hw->mac.san_mac_rar_index)
4786 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4788 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
4789 ixgbe_ptp_reset(adapter);
4793 * ixgbe_clean_tx_ring - Free Tx Buffers
4794 * @tx_ring: ring to be cleaned
4796 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4798 struct ixgbe_tx_buffer *tx_buffer_info;
4802 /* ring already cleared, nothing to do */
4803 if (!tx_ring->tx_buffer_info)
4806 /* Free all the Tx ring sk_buffs */
4807 for (i = 0; i < tx_ring->count; i++) {
4808 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4809 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4812 netdev_tx_reset_queue(txring_txq(tx_ring));
4814 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4815 memset(tx_ring->tx_buffer_info, 0, size);
4817 /* Zero out the descriptor ring */
4818 memset(tx_ring->desc, 0, tx_ring->size);
4820 tx_ring->next_to_use = 0;
4821 tx_ring->next_to_clean = 0;
4825 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4826 * @adapter: board private structure
4828 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4832 for (i = 0; i < adapter->num_rx_queues; i++)
4833 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4837 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4838 * @adapter: board private structure
4840 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4844 for (i = 0; i < adapter->num_tx_queues; i++)
4845 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4848 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4850 struct hlist_node *node2;
4851 struct ixgbe_fdir_filter *filter;
4853 spin_lock(&adapter->fdir_perfect_lock);
4855 hlist_for_each_entry_safe(filter, node2,
4856 &adapter->fdir_filter_list, fdir_node) {
4857 hlist_del(&filter->fdir_node);
4860 adapter->fdir_filter_count = 0;
4862 spin_unlock(&adapter->fdir_perfect_lock);
4865 void ixgbe_down(struct ixgbe_adapter *adapter)
4867 struct net_device *netdev = adapter->netdev;
4868 struct ixgbe_hw *hw = &adapter->hw;
4869 struct net_device *upper;
4870 struct list_head *iter;
4874 /* signal that we are down to the interrupt handler */
4875 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
4876 return; /* do nothing if already down */
4878 /* disable receives */
4879 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4880 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4882 /* disable all enabled rx queues */
4883 for (i = 0; i < adapter->num_rx_queues; i++)
4884 /* this call also flushes the previous write */
4885 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4887 usleep_range(10000, 20000);
4889 netif_tx_stop_all_queues(netdev);
4891 /* call carrier off first to avoid false dev_watchdog timeouts */
4892 netif_carrier_off(netdev);
4893 netif_tx_disable(netdev);
4895 /* disable any upper devices */
4896 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4897 if (netif_is_macvlan(upper)) {
4898 struct macvlan_dev *vlan = netdev_priv(upper);
4900 if (vlan->fwd_priv) {
4901 netif_tx_stop_all_queues(upper);
4902 netif_carrier_off(upper);
4903 netif_tx_disable(upper);
4908 ixgbe_irq_disable(adapter);
4910 ixgbe_napi_disable_all(adapter);
4912 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4913 IXGBE_FLAG2_RESET_REQUESTED);
4914 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4916 del_timer_sync(&adapter->service_timer);
4918 if (adapter->num_vfs) {
4919 /* Clear EITR Select mapping */
4920 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4922 /* Mark all the VFs as inactive */
4923 for (i = 0 ; i < adapter->num_vfs; i++)
4924 adapter->vfinfo[i].clear_to_send = false;
4926 /* ping all the active vfs to let them know we are going down */
4927 ixgbe_ping_all_vfs(adapter);
4929 /* Disable all VFTE/VFRE TX/RX */
4930 ixgbe_disable_tx_rx(adapter);
4933 /* disable transmits in the hardware now that interrupts are off */
4934 for (i = 0; i < adapter->num_tx_queues; i++) {
4935 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4936 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4939 /* Disable the Tx DMA engine on 82599 and X540 */
4940 switch (hw->mac.type) {
4941 case ixgbe_mac_82599EB:
4942 case ixgbe_mac_X540:
4943 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4944 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4945 ~IXGBE_DMATXCTL_TE));
4951 if (!pci_channel_offline(adapter->pdev))
4952 ixgbe_reset(adapter);
4954 /* power down the optics for 82599 SFP+ fiber */
4955 if (hw->mac.ops.disable_tx_laser)
4956 hw->mac.ops.disable_tx_laser(hw);
4958 ixgbe_clean_all_tx_rings(adapter);
4959 ixgbe_clean_all_rx_rings(adapter);
4961 #ifdef CONFIG_IXGBE_DCA
4962 /* since we reset the hardware DCA settings were cleared */
4963 ixgbe_setup_dca(adapter);
4968 * ixgbe_tx_timeout - Respond to a Tx Hang
4969 * @netdev: network interface device structure
4971 static void ixgbe_tx_timeout(struct net_device *netdev)
4973 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4975 /* Do the reset outside of interrupt context */
4976 ixgbe_tx_timeout_reset(adapter);
4980 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4981 * @adapter: board private structure to initialize
4983 * ixgbe_sw_init initializes the Adapter private data structure.
4984 * Fields are initialized based on PCI device information and
4985 * OS network device settings (MTU size).
4987 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
4989 struct ixgbe_hw *hw = &adapter->hw;
4990 struct pci_dev *pdev = adapter->pdev;
4991 unsigned int rss, fdir;
4993 #ifdef CONFIG_IXGBE_DCB
4995 struct tc_configuration *tc;
4998 /* PCI config space info */
5000 hw->vendor_id = pdev->vendor;
5001 hw->device_id = pdev->device;
5002 hw->revision_id = pdev->revision;
5003 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5004 hw->subsystem_device_id = pdev->subsystem_device;
5006 /* Set common capability flags and settings */
5007 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
5008 adapter->ring_feature[RING_F_RSS].limit = rss;
5009 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5010 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5011 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5012 adapter->atr_sample_rate = 20;
5013 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5014 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5015 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5016 #ifdef CONFIG_IXGBE_DCA
5017 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5020 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5021 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5022 #ifdef CONFIG_IXGBE_DCB
5023 /* Default traffic class to use for FCoE */
5024 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5025 #endif /* CONFIG_IXGBE_DCB */
5026 #endif /* IXGBE_FCOE */
5028 /* Set MAC specific capability flags and exceptions */
5029 switch (hw->mac.type) {
5030 case ixgbe_mac_82598EB:
5031 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5032 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5034 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5035 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5037 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5038 adapter->ring_feature[RING_F_FDIR].limit = 0;
5039 adapter->atr_sample_rate = 0;
5040 adapter->fdir_pballoc = 0;
5042 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5043 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5044 #ifdef CONFIG_IXGBE_DCB
5045 adapter->fcoe.up = 0;
5046 #endif /* IXGBE_DCB */
5047 #endif /* IXGBE_FCOE */
5049 case ixgbe_mac_82599EB:
5050 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5051 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5053 case ixgbe_mac_X540:
5054 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5055 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5056 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5063 /* FCoE support exists, always init the FCoE lock */
5064 spin_lock_init(&adapter->fcoe.lock);
5067 /* n-tuple support exists, always init our spinlock */
5068 spin_lock_init(&adapter->fdir_perfect_lock);
5070 #ifdef CONFIG_IXGBE_DCB
5071 switch (hw->mac.type) {
5072 case ixgbe_mac_X540:
5073 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5074 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5077 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5078 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5082 /* Configure DCB traffic classes */
5083 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5084 tc = &adapter->dcb_cfg.tc_config[j];
5085 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5086 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5087 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5088 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5089 tc->dcb_pfc = pfc_disabled;
5092 /* Initialize default user to priority mapping, UPx->TC0 */
5093 tc = &adapter->dcb_cfg.tc_config[0];
5094 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5095 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5097 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5098 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5099 adapter->dcb_cfg.pfc_mode_enable = false;
5100 adapter->dcb_set_bitmap = 0x00;
5101 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5102 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5103 sizeof(adapter->temp_dcb_cfg));
5107 /* default flow control settings */
5108 hw->fc.requested_mode = ixgbe_fc_full;
5109 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5110 ixgbe_pbthresh_setup(adapter);
5111 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5112 hw->fc.send_xon = true;
5113 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5115 #ifdef CONFIG_PCI_IOV
5117 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5119 /* assign number of SR-IOV VFs */
5120 if (hw->mac.type != ixgbe_mac_82598EB) {
5121 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5122 adapter->num_vfs = 0;
5123 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5125 adapter->num_vfs = max_vfs;
5128 #endif /* CONFIG_PCI_IOV */
5130 /* enable itr by default in dynamic mode */
5131 adapter->rx_itr_setting = 1;
5132 adapter->tx_itr_setting = 1;
5134 /* set default ring sizes */
5135 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5136 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5138 /* set default work limits */
5139 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5141 /* initialize eeprom parameters */
5142 if (ixgbe_init_eeprom_params_generic(hw)) {
5143 e_dev_err("EEPROM initialization failed\n");
5147 /* PF holds first pool slot */
5148 set_bit(0, &adapter->fwd_bitmask);
5149 set_bit(__IXGBE_DOWN, &adapter->state);
5155 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5156 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5158 * Return 0 on success, negative on failure
5160 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5162 struct device *dev = tx_ring->dev;
5163 int orig_node = dev_to_node(dev);
5167 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5169 if (tx_ring->q_vector)
5170 numa_node = tx_ring->q_vector->numa_node;
5172 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
5173 if (!tx_ring->tx_buffer_info)
5174 tx_ring->tx_buffer_info = vzalloc(size);
5175 if (!tx_ring->tx_buffer_info)
5178 u64_stats_init(&tx_ring->syncp);
5180 /* round up to nearest 4K */
5181 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5182 tx_ring->size = ALIGN(tx_ring->size, 4096);
5184 set_dev_node(dev, numa_node);
5185 tx_ring->desc = dma_alloc_coherent(dev,
5189 set_dev_node(dev, orig_node);
5191 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5192 &tx_ring->dma, GFP_KERNEL);
5196 tx_ring->next_to_use = 0;
5197 tx_ring->next_to_clean = 0;
5201 vfree(tx_ring->tx_buffer_info);
5202 tx_ring->tx_buffer_info = NULL;
5203 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5208 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5209 * @adapter: board private structure
5211 * If this function returns with an error, then it's possible one or
5212 * more of the rings is populated (while the rest are not). It is the
5213 * callers duty to clean those orphaned rings.
5215 * Return 0 on success, negative on failure
5217 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5221 for (i = 0; i < adapter->num_tx_queues; i++) {
5222 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5226 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5232 /* rewind the index freeing the rings as we go */
5234 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5239 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5240 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5242 * Returns 0 on success, negative on failure
5244 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5246 struct device *dev = rx_ring->dev;
5247 int orig_node = dev_to_node(dev);
5251 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5253 if (rx_ring->q_vector)
5254 numa_node = rx_ring->q_vector->numa_node;
5256 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
5257 if (!rx_ring->rx_buffer_info)
5258 rx_ring->rx_buffer_info = vzalloc(size);
5259 if (!rx_ring->rx_buffer_info)
5262 u64_stats_init(&rx_ring->syncp);
5264 /* Round up to nearest 4K */
5265 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5266 rx_ring->size = ALIGN(rx_ring->size, 4096);
5268 set_dev_node(dev, numa_node);
5269 rx_ring->desc = dma_alloc_coherent(dev,
5273 set_dev_node(dev, orig_node);
5275 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5276 &rx_ring->dma, GFP_KERNEL);
5280 rx_ring->next_to_clean = 0;
5281 rx_ring->next_to_use = 0;
5285 vfree(rx_ring->rx_buffer_info);
5286 rx_ring->rx_buffer_info = NULL;
5287 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5292 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5293 * @adapter: board private structure
5295 * If this function returns with an error, then it's possible one or
5296 * more of the rings is populated (while the rest are not). It is the
5297 * callers duty to clean those orphaned rings.
5299 * Return 0 on success, negative on failure
5301 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5305 for (i = 0; i < adapter->num_rx_queues; i++) {
5306 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5310 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5315 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5320 /* rewind the index freeing the rings as we go */
5322 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5327 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5328 * @tx_ring: Tx descriptor ring for a specific queue
5330 * Free all transmit software resources
5332 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5334 ixgbe_clean_tx_ring(tx_ring);
5336 vfree(tx_ring->tx_buffer_info);
5337 tx_ring->tx_buffer_info = NULL;
5339 /* if not set, then don't free */
5343 dma_free_coherent(tx_ring->dev, tx_ring->size,
5344 tx_ring->desc, tx_ring->dma);
5346 tx_ring->desc = NULL;
5350 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5351 * @adapter: board private structure
5353 * Free all transmit software resources
5355 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5359 for (i = 0; i < adapter->num_tx_queues; i++)
5360 if (adapter->tx_ring[i]->desc)
5361 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5365 * ixgbe_free_rx_resources - Free Rx Resources
5366 * @rx_ring: ring to clean the resources from
5368 * Free all receive software resources
5370 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5372 ixgbe_clean_rx_ring(rx_ring);
5374 vfree(rx_ring->rx_buffer_info);
5375 rx_ring->rx_buffer_info = NULL;
5377 /* if not set, then don't free */
5381 dma_free_coherent(rx_ring->dev, rx_ring->size,
5382 rx_ring->desc, rx_ring->dma);
5384 rx_ring->desc = NULL;
5388 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5389 * @adapter: board private structure
5391 * Free all receive software resources
5393 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5398 ixgbe_free_fcoe_ddp_resources(adapter);
5401 for (i = 0; i < adapter->num_rx_queues; i++)
5402 if (adapter->rx_ring[i]->desc)
5403 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5407 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5408 * @netdev: network interface device structure
5409 * @new_mtu: new value for maximum frame size
5411 * Returns 0 on success, negative on failure
5413 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5415 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5416 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5418 /* MTU < 68 is an error and causes problems on some kernels */
5419 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5423 * For 82599EB we cannot allow legacy VFs to enable their receive
5424 * paths when MTU greater than 1500 is configured. So display a
5425 * warning that legacy VFs will be disabled.
5427 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5428 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5429 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5430 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5432 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5434 /* must set new MTU before calling down or up */
5435 netdev->mtu = new_mtu;
5437 if (netif_running(netdev))
5438 ixgbe_reinit_locked(adapter);
5444 * ixgbe_open - Called when a network interface is made active
5445 * @netdev: network interface device structure
5447 * Returns 0 on success, negative value on failure
5449 * The open entry point is called when a network interface is made
5450 * active by the system (IFF_UP). At this point all resources needed
5451 * for transmit and receive operations are allocated, the interrupt
5452 * handler is registered with the OS, the watchdog timer is started,
5453 * and the stack is notified that the interface is ready.
5455 static int ixgbe_open(struct net_device *netdev)
5457 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5460 /* disallow open during test */
5461 if (test_bit(__IXGBE_TESTING, &adapter->state))
5464 netif_carrier_off(netdev);
5466 /* allocate transmit descriptors */
5467 err = ixgbe_setup_all_tx_resources(adapter);
5471 /* allocate receive descriptors */
5472 err = ixgbe_setup_all_rx_resources(adapter);
5476 ixgbe_configure(adapter);
5478 err = ixgbe_request_irq(adapter);
5482 /* Notify the stack of the actual queue counts. */
5483 if (adapter->num_rx_pools > 1)
5484 queues = adapter->num_rx_queues_per_pool;
5486 queues = adapter->num_tx_queues;
5488 err = netif_set_real_num_tx_queues(netdev, queues);
5490 goto err_set_queues;
5492 if (adapter->num_rx_pools > 1 &&
5493 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5494 queues = IXGBE_MAX_L2A_QUEUES;
5496 queues = adapter->num_rx_queues;
5497 err = netif_set_real_num_rx_queues(netdev, queues);
5499 goto err_set_queues;
5501 ixgbe_ptp_init(adapter);
5503 ixgbe_up_complete(adapter);
5508 ixgbe_free_irq(adapter);
5510 ixgbe_free_all_rx_resources(adapter);
5512 ixgbe_free_all_tx_resources(adapter);
5514 ixgbe_reset(adapter);
5520 * ixgbe_close - Disables a network interface
5521 * @netdev: network interface device structure
5523 * Returns 0, this is not allowed to fail
5525 * The close entry point is called when an interface is de-activated
5526 * by the OS. The hardware is still under the drivers control, but
5527 * needs to be disabled. A global MAC reset is issued to stop the
5528 * hardware, and all transmit and receive resources are freed.
5530 static int ixgbe_close(struct net_device *netdev)
5532 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5534 ixgbe_ptp_stop(adapter);
5536 ixgbe_down(adapter);
5537 ixgbe_free_irq(adapter);
5539 ixgbe_fdir_filter_exit(adapter);
5541 ixgbe_free_all_tx_resources(adapter);
5542 ixgbe_free_all_rx_resources(adapter);
5544 ixgbe_release_hw_control(adapter);
5550 static int ixgbe_resume(struct pci_dev *pdev)
5552 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5553 struct net_device *netdev = adapter->netdev;
5556 adapter->hw.hw_addr = adapter->io_addr;
5557 pci_set_power_state(pdev, PCI_D0);
5558 pci_restore_state(pdev);
5560 * pci_restore_state clears dev->state_saved so call
5561 * pci_save_state to restore it.
5563 pci_save_state(pdev);
5565 err = pci_enable_device_mem(pdev);
5567 e_dev_err("Cannot enable PCI device from suspend\n");
5570 smp_mb__before_clear_bit();
5571 clear_bit(__IXGBE_DISABLED, &adapter->state);
5572 pci_set_master(pdev);
5574 pci_wake_from_d3(pdev, false);
5576 ixgbe_reset(adapter);
5578 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5581 err = ixgbe_init_interrupt_scheme(adapter);
5582 if (!err && netif_running(netdev))
5583 err = ixgbe_open(netdev);
5590 netif_device_attach(netdev);
5594 #endif /* CONFIG_PM */
5596 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5598 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5599 struct net_device *netdev = adapter->netdev;
5600 struct ixgbe_hw *hw = &adapter->hw;
5602 u32 wufc = adapter->wol;
5607 netif_device_detach(netdev);
5610 if (netif_running(netdev)) {
5611 ixgbe_down(adapter);
5612 ixgbe_free_irq(adapter);
5613 ixgbe_free_all_tx_resources(adapter);
5614 ixgbe_free_all_rx_resources(adapter);
5618 ixgbe_clear_interrupt_scheme(adapter);
5621 retval = pci_save_state(pdev);
5626 if (hw->mac.ops.stop_link_on_d3)
5627 hw->mac.ops.stop_link_on_d3(hw);
5630 ixgbe_set_rx_mode(netdev);
5632 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5633 if (hw->mac.ops.enable_tx_laser)
5634 hw->mac.ops.enable_tx_laser(hw);
5636 /* turn on all-multi mode if wake on multicast is enabled */
5637 if (wufc & IXGBE_WUFC_MC) {
5638 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5639 fctrl |= IXGBE_FCTRL_MPE;
5640 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5643 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5644 ctrl |= IXGBE_CTRL_GIO_DIS;
5645 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5647 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5649 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5650 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5653 switch (hw->mac.type) {
5654 case ixgbe_mac_82598EB:
5655 pci_wake_from_d3(pdev, false);
5657 case ixgbe_mac_82599EB:
5658 case ixgbe_mac_X540:
5659 pci_wake_from_d3(pdev, !!wufc);
5665 *enable_wake = !!wufc;
5667 ixgbe_release_hw_control(adapter);
5669 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5670 pci_disable_device(pdev);
5676 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5681 retval = __ixgbe_shutdown(pdev, &wake);
5686 pci_prepare_to_sleep(pdev);
5688 pci_wake_from_d3(pdev, false);
5689 pci_set_power_state(pdev, PCI_D3hot);
5694 #endif /* CONFIG_PM */
5696 static void ixgbe_shutdown(struct pci_dev *pdev)
5700 __ixgbe_shutdown(pdev, &wake);
5702 if (system_state == SYSTEM_POWER_OFF) {
5703 pci_wake_from_d3(pdev, wake);
5704 pci_set_power_state(pdev, PCI_D3hot);
5709 * ixgbe_update_stats - Update the board statistics counters.
5710 * @adapter: board private structure
5712 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5714 struct net_device *netdev = adapter->netdev;
5715 struct ixgbe_hw *hw = &adapter->hw;
5716 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5718 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5719 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5720 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5721 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5723 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5724 test_bit(__IXGBE_RESETTING, &adapter->state))
5727 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5730 for (i = 0; i < adapter->num_rx_queues; i++) {
5731 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5732 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5734 adapter->rsc_total_count = rsc_count;
5735 adapter->rsc_total_flush = rsc_flush;
5738 for (i = 0; i < adapter->num_rx_queues; i++) {
5739 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5740 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5741 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5742 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5743 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5744 bytes += rx_ring->stats.bytes;
5745 packets += rx_ring->stats.packets;
5747 adapter->non_eop_descs = non_eop_descs;
5748 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5749 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5750 adapter->hw_csum_rx_error = hw_csum_rx_error;
5751 netdev->stats.rx_bytes = bytes;
5752 netdev->stats.rx_packets = packets;
5756 /* gather some stats to the adapter struct that are per queue */
5757 for (i = 0; i < adapter->num_tx_queues; i++) {
5758 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5759 restart_queue += tx_ring->tx_stats.restart_queue;
5760 tx_busy += tx_ring->tx_stats.tx_busy;
5761 bytes += tx_ring->stats.bytes;
5762 packets += tx_ring->stats.packets;
5764 adapter->restart_queue = restart_queue;
5765 adapter->tx_busy = tx_busy;
5766 netdev->stats.tx_bytes = bytes;
5767 netdev->stats.tx_packets = packets;
5769 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5771 /* 8 register reads */
5772 for (i = 0; i < 8; i++) {
5773 /* for packet buffers not used, the register should read 0 */
5774 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5776 hwstats->mpc[i] += mpc;
5777 total_mpc += hwstats->mpc[i];
5778 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5779 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5780 switch (hw->mac.type) {
5781 case ixgbe_mac_82598EB:
5782 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5783 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5784 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5785 hwstats->pxonrxc[i] +=
5786 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5788 case ixgbe_mac_82599EB:
5789 case ixgbe_mac_X540:
5790 hwstats->pxonrxc[i] +=
5791 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5798 /*16 register reads */
5799 for (i = 0; i < 16; i++) {
5800 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5801 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5802 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5803 (hw->mac.type == ixgbe_mac_X540)) {
5804 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5805 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5806 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5807 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5811 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5812 /* work around hardware counting issue */
5813 hwstats->gprc -= missed_rx;
5815 ixgbe_update_xoff_received(adapter);
5817 /* 82598 hardware only has a 32 bit counter in the high register */
5818 switch (hw->mac.type) {
5819 case ixgbe_mac_82598EB:
5820 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5821 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5822 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5823 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5825 case ixgbe_mac_X540:
5826 /* OS2BMC stats are X540 only*/
5827 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5828 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5829 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5830 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5831 case ixgbe_mac_82599EB:
5832 for (i = 0; i < 16; i++)
5833 adapter->hw_rx_no_dma_resources +=
5834 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5835 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5836 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5837 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5838 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5839 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5840 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5841 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5842 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5843 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5845 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5846 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5847 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5848 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5849 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5850 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5851 /* Add up per cpu counters for total ddp aloc fail */
5852 if (adapter->fcoe.ddp_pool) {
5853 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5854 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5856 u64 noddp = 0, noddp_ext_buff = 0;
5857 for_each_possible_cpu(cpu) {
5858 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
5859 noddp += ddp_pool->noddp;
5860 noddp_ext_buff += ddp_pool->noddp_ext_buff;
5862 hwstats->fcoe_noddp = noddp;
5863 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
5865 #endif /* IXGBE_FCOE */
5870 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5871 hwstats->bprc += bprc;
5872 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5873 if (hw->mac.type == ixgbe_mac_82598EB)
5874 hwstats->mprc -= bprc;
5875 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5876 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5877 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5878 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5879 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5880 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5881 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5882 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5883 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5884 hwstats->lxontxc += lxon;
5885 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5886 hwstats->lxofftxc += lxoff;
5887 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5888 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5890 * 82598 errata - tx of flow control packets is included in tx counters
5892 xon_off_tot = lxon + lxoff;
5893 hwstats->gptc -= xon_off_tot;
5894 hwstats->mptc -= xon_off_tot;
5895 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5896 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5897 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5898 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5899 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5900 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5901 hwstats->ptc64 -= xon_off_tot;
5902 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5903 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5904 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5905 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5906 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5907 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5909 /* Fill out the OS statistics structure */
5910 netdev->stats.multicast = hwstats->mprc;
5913 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5914 netdev->stats.rx_dropped = 0;
5915 netdev->stats.rx_length_errors = hwstats->rlec;
5916 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5917 netdev->stats.rx_missed_errors = total_mpc;
5921 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5922 * @adapter: pointer to the device adapter structure
5924 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5926 struct ixgbe_hw *hw = &adapter->hw;
5929 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5932 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5934 /* if interface is down do nothing */
5935 if (test_bit(__IXGBE_DOWN, &adapter->state))
5938 /* do nothing if we are not using signature filters */
5939 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5942 adapter->fdir_overflow++;
5944 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5945 for (i = 0; i < adapter->num_tx_queues; i++)
5946 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5947 &(adapter->tx_ring[i]->state));
5948 /* re-enable flow director interrupts */
5949 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5951 e_err(probe, "failed to finish FDIR re-initialization, "
5952 "ignored adding FDIR ATR filters\n");
5957 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5958 * @adapter: pointer to the device adapter structure
5960 * This function serves two purposes. First it strobes the interrupt lines
5961 * in order to make certain interrupts are occurring. Secondly it sets the
5962 * bits needed to check for TX hangs. As a result we should immediately
5963 * determine if a hang has occurred.
5965 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5967 struct ixgbe_hw *hw = &adapter->hw;
5971 /* If we're down, removing or resetting, just bail */
5972 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5973 test_bit(__IXGBE_REMOVING, &adapter->state) ||
5974 test_bit(__IXGBE_RESETTING, &adapter->state))
5977 /* Force detection of hung controller */
5978 if (netif_carrier_ok(adapter->netdev)) {
5979 for (i = 0; i < adapter->num_tx_queues; i++)
5980 set_check_for_tx_hang(adapter->tx_ring[i]);
5983 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5985 * for legacy and MSI interrupts don't set any bits
5986 * that are enabled for EIAM, because this operation
5987 * would set *both* EIMS and EICS for any bit in EIAM
5989 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5990 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5992 /* get one bit for every active tx/rx interrupt vector */
5993 for (i = 0; i < adapter->num_q_vectors; i++) {
5994 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5995 if (qv->rx.ring || qv->tx.ring)
5996 eics |= ((u64)1 << i);
6000 /* Cause software interrupt to ensure rings are cleaned */
6001 ixgbe_irq_rearm_queues(adapter, eics);
6006 * ixgbe_watchdog_update_link - update the link status
6007 * @adapter: pointer to the device adapter structure
6008 * @link_speed: pointer to a u32 to store the link_speed
6010 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6012 struct ixgbe_hw *hw = &adapter->hw;
6013 u32 link_speed = adapter->link_speed;
6014 bool link_up = adapter->link_up;
6015 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6017 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6020 if (hw->mac.ops.check_link) {
6021 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6023 /* always assume link is up, if no check link function */
6024 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6028 if (adapter->ixgbe_ieee_pfc)
6029 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6031 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6032 hw->mac.ops.fc_enable(hw);
6033 ixgbe_set_rx_drop_en(adapter);
6037 time_after(jiffies, (adapter->link_check_timeout +
6038 IXGBE_TRY_LINK_TIMEOUT))) {
6039 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6040 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6041 IXGBE_WRITE_FLUSH(hw);
6044 adapter->link_up = link_up;
6045 adapter->link_speed = link_speed;
6048 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6050 #ifdef CONFIG_IXGBE_DCB
6051 struct net_device *netdev = adapter->netdev;
6052 struct dcb_app app = {
6053 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6058 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6059 up = dcb_ieee_getapp_mask(netdev, &app);
6061 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6066 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6067 * print link up message
6068 * @adapter: pointer to the device adapter structure
6070 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6072 struct net_device *netdev = adapter->netdev;
6073 struct ixgbe_hw *hw = &adapter->hw;
6074 struct net_device *upper;
6075 struct list_head *iter;
6076 u32 link_speed = adapter->link_speed;
6077 bool flow_rx, flow_tx;
6079 /* only continue if link was previously down */
6080 if (netif_carrier_ok(netdev))
6083 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6085 switch (hw->mac.type) {
6086 case ixgbe_mac_82598EB: {
6087 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6088 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6089 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6090 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6093 case ixgbe_mac_X540:
6094 case ixgbe_mac_82599EB: {
6095 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6096 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6097 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6098 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6107 adapter->last_rx_ptp_check = jiffies;
6109 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6110 ixgbe_ptp_start_cyclecounter(adapter);
6112 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6113 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6115 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6117 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6120 ((flow_rx && flow_tx) ? "RX/TX" :
6122 (flow_tx ? "TX" : "None"))));
6124 netif_carrier_on(netdev);
6125 ixgbe_check_vf_rate_limit(adapter);
6127 /* enable transmits */
6128 netif_tx_wake_all_queues(adapter->netdev);
6130 /* enable any upper devices */
6132 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6133 if (netif_is_macvlan(upper)) {
6134 struct macvlan_dev *vlan = netdev_priv(upper);
6137 netif_tx_wake_all_queues(upper);
6142 /* update the default user priority for VFs */
6143 ixgbe_update_default_up(adapter);
6145 /* ping all the active vfs to let them know link has changed */
6146 ixgbe_ping_all_vfs(adapter);
6150 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6151 * print link down message
6152 * @adapter: pointer to the adapter structure
6154 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6156 struct net_device *netdev = adapter->netdev;
6157 struct ixgbe_hw *hw = &adapter->hw;
6159 adapter->link_up = false;
6160 adapter->link_speed = 0;
6162 /* only continue if link was up previously */
6163 if (!netif_carrier_ok(netdev))
6166 /* poll for SFP+ cable when link is down */
6167 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6168 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6170 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6171 ixgbe_ptp_start_cyclecounter(adapter);
6173 e_info(drv, "NIC Link is Down\n");
6174 netif_carrier_off(netdev);
6176 /* ping all the active vfs to let them know link has changed */
6177 ixgbe_ping_all_vfs(adapter);
6181 * ixgbe_watchdog_flush_tx - flush queues on link down
6182 * @adapter: pointer to the device adapter structure
6184 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6187 int some_tx_pending = 0;
6189 if (!netif_carrier_ok(adapter->netdev)) {
6190 for (i = 0; i < adapter->num_tx_queues; i++) {
6191 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6192 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
6193 some_tx_pending = 1;
6198 if (some_tx_pending) {
6199 /* We've lost link, so the controller stops DMA,
6200 * but we've got queued Tx work that's never going
6201 * to get done, so reset controller to flush Tx.
6202 * (Do the reset outside of interrupt context).
6204 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6205 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6210 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6214 /* Do not perform spoof check for 82598 or if not in IOV mode */
6215 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6216 adapter->num_vfs == 0)
6219 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6222 * ssvpc register is cleared on read, if zero then no
6223 * spoofed packets in the last interval.
6228 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6232 * ixgbe_watchdog_subtask - check and bring link up
6233 * @adapter: pointer to the device adapter structure
6235 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6237 /* if interface is down, removing or resetting, do nothing */
6238 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6239 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6240 test_bit(__IXGBE_RESETTING, &adapter->state))
6243 ixgbe_watchdog_update_link(adapter);
6245 if (adapter->link_up)
6246 ixgbe_watchdog_link_is_up(adapter);
6248 ixgbe_watchdog_link_is_down(adapter);
6250 ixgbe_spoof_check(adapter);
6251 ixgbe_update_stats(adapter);
6253 ixgbe_watchdog_flush_tx(adapter);
6257 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6258 * @adapter: the ixgbe adapter structure
6260 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6262 struct ixgbe_hw *hw = &adapter->hw;
6265 /* not searching for SFP so there is nothing to do here */
6266 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6267 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6270 /* someone else is in init, wait until next service event */
6271 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6274 err = hw->phy.ops.identify_sfp(hw);
6275 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6278 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6279 /* If no cable is present, then we need to reset
6280 * the next time we find a good cable. */
6281 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6288 /* exit if reset not needed */
6289 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6292 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6295 * A module may be identified correctly, but the EEPROM may not have
6296 * support for that module. setup_sfp() will fail in that case, so
6297 * we should not allow that module to load.
6299 if (hw->mac.type == ixgbe_mac_82598EB)
6300 err = hw->phy.ops.reset(hw);
6302 err = hw->mac.ops.setup_sfp(hw);
6304 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6307 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6308 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6311 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6313 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6314 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6315 e_dev_err("failed to initialize because an unsupported "
6316 "SFP+ module type was detected.\n");
6317 e_dev_err("Reload the driver after installing a "
6318 "supported module.\n");
6319 unregister_netdev(adapter->netdev);
6324 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6325 * @adapter: the ixgbe adapter structure
6327 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6329 struct ixgbe_hw *hw = &adapter->hw;
6331 bool autoneg = false;
6333 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6336 /* someone else is in init, wait until next service event */
6337 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6340 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6342 speed = hw->phy.autoneg_advertised;
6343 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6344 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6346 /* setup the highest link when no autoneg */
6348 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6349 speed = IXGBE_LINK_SPEED_10GB_FULL;
6353 if (hw->mac.ops.setup_link)
6354 hw->mac.ops.setup_link(hw, speed, true);
6356 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6357 adapter->link_check_timeout = jiffies;
6358 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6361 #ifdef CONFIG_PCI_IOV
6362 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6365 struct ixgbe_hw *hw = &adapter->hw;
6366 struct net_device *netdev = adapter->netdev;
6370 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6371 if (gpc) /* If incrementing then no need for the check below */
6374 * Check to see if a bad DMA write target from an errant or
6375 * malicious VF has caused a PCIe error. If so then we can
6376 * issue a VFLR to the offending VF(s) and then resume without
6377 * requesting a full slot reset.
6380 for (vf = 0; vf < adapter->num_vfs; vf++) {
6381 ciaa = (vf << 16) | 0x80000000;
6382 /* 32 bit read so align, we really want status at offset 6 */
6383 ciaa |= PCI_COMMAND;
6384 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6385 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
6387 /* disable debug mode asap after reading data */
6388 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6389 /* Get the upper 16 bits which will be the PCI status reg */
6391 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
6392 netdev_err(netdev, "VF %d Hung DMA\n", vf);
6394 ciaa = (vf << 16) | 0x80000000;
6396 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6397 ciad = 0x00008000; /* VFLR */
6398 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
6400 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6407 * ixgbe_service_timer - Timer Call-back
6408 * @data: pointer to adapter cast into an unsigned long
6410 static void ixgbe_service_timer(unsigned long data)
6412 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6413 unsigned long next_event_offset;
6416 /* poll faster when waiting for link */
6417 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6418 next_event_offset = HZ / 10;
6420 next_event_offset = HZ * 2;
6422 #ifdef CONFIG_PCI_IOV
6424 * don't bother with SR-IOV VF DMA hang check if there are
6425 * no VFs or the link is down
6427 if (!adapter->num_vfs ||
6428 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6429 goto normal_timer_service;
6431 /* If we have VFs allocated then we must check for DMA hangs */
6432 ixgbe_check_for_bad_vf(adapter);
6433 next_event_offset = HZ / 50;
6434 adapter->timer_event_accumulator++;
6436 if (adapter->timer_event_accumulator >= 100)
6437 adapter->timer_event_accumulator = 0;
6441 normal_timer_service:
6443 /* Reset the timer */
6444 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6447 ixgbe_service_event_schedule(adapter);
6450 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6452 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6455 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6457 /* If we're already down, removing or resetting, just bail */
6458 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6459 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6460 test_bit(__IXGBE_RESETTING, &adapter->state))
6463 ixgbe_dump(adapter);
6464 netdev_err(adapter->netdev, "Reset adapter\n");
6465 adapter->tx_timeout_count++;
6468 ixgbe_reinit_locked(adapter);
6473 * ixgbe_service_task - manages and runs subtasks
6474 * @work: pointer to work_struct containing our data
6476 static void ixgbe_service_task(struct work_struct *work)
6478 struct ixgbe_adapter *adapter = container_of(work,
6479 struct ixgbe_adapter,
6481 if (ixgbe_removed(adapter->hw.hw_addr)) {
6482 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6484 ixgbe_down(adapter);
6487 ixgbe_service_event_complete(adapter);
6490 ixgbe_reset_subtask(adapter);
6491 ixgbe_sfp_detection_subtask(adapter);
6492 ixgbe_sfp_link_config_subtask(adapter);
6493 ixgbe_check_overtemp_subtask(adapter);
6494 ixgbe_watchdog_subtask(adapter);
6495 ixgbe_fdir_reinit_subtask(adapter);
6496 ixgbe_check_hang_subtask(adapter);
6498 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6499 ixgbe_ptp_overflow_check(adapter);
6500 ixgbe_ptp_rx_hang(adapter);
6503 ixgbe_service_event_complete(adapter);
6506 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6507 struct ixgbe_tx_buffer *first,
6510 struct sk_buff *skb = first->skb;
6511 u32 vlan_macip_lens, type_tucmd;
6512 u32 mss_l4len_idx, l4len;
6515 if (skb->ip_summed != CHECKSUM_PARTIAL)
6518 if (!skb_is_gso(skb))
6521 err = skb_cow_head(skb, 0);
6525 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6526 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6528 if (first->protocol == htons(ETH_P_IP)) {
6529 struct iphdr *iph = ip_hdr(skb);
6532 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6536 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6537 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6538 IXGBE_TX_FLAGS_CSUM |
6539 IXGBE_TX_FLAGS_IPV4;
6540 } else if (skb_is_gso_v6(skb)) {
6541 ipv6_hdr(skb)->payload_len = 0;
6542 tcp_hdr(skb)->check =
6543 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6544 &ipv6_hdr(skb)->daddr,
6546 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6547 IXGBE_TX_FLAGS_CSUM;
6550 /* compute header lengths */
6551 l4len = tcp_hdrlen(skb);
6552 *hdr_len = skb_transport_offset(skb) + l4len;
6554 /* update gso size and bytecount with header size */
6555 first->gso_segs = skb_shinfo(skb)->gso_segs;
6556 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6558 /* mss_l4len_id: use 0 as index for TSO */
6559 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6560 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6562 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6563 vlan_macip_lens = skb_network_header_len(skb);
6564 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6565 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6567 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6573 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6574 struct ixgbe_tx_buffer *first)
6576 struct sk_buff *skb = first->skb;
6577 u32 vlan_macip_lens = 0;
6578 u32 mss_l4len_idx = 0;
6581 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6582 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6583 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6587 switch (first->protocol) {
6588 case htons(ETH_P_IP):
6589 vlan_macip_lens |= skb_network_header_len(skb);
6590 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6591 l4_hdr = ip_hdr(skb)->protocol;
6593 case htons(ETH_P_IPV6):
6594 vlan_macip_lens |= skb_network_header_len(skb);
6595 l4_hdr = ipv6_hdr(skb)->nexthdr;
6598 if (unlikely(net_ratelimit())) {
6599 dev_warn(tx_ring->dev,
6600 "partial checksum but proto=%x!\n",
6608 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6609 mss_l4len_idx = tcp_hdrlen(skb) <<
6610 IXGBE_ADVTXD_L4LEN_SHIFT;
6613 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6614 mss_l4len_idx = sizeof(struct sctphdr) <<
6615 IXGBE_ADVTXD_L4LEN_SHIFT;
6618 mss_l4len_idx = sizeof(struct udphdr) <<
6619 IXGBE_ADVTXD_L4LEN_SHIFT;
6622 if (unlikely(net_ratelimit())) {
6623 dev_warn(tx_ring->dev,
6624 "partial checksum but l4 proto=%x!\n",
6630 /* update TX checksum flag */
6631 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6634 /* vlan_macip_lens: MACLEN, VLAN tag */
6635 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6636 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6638 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6639 type_tucmd, mss_l4len_idx);
6642 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6643 ((_flag <= _result) ? \
6644 ((u32)(_input & _flag) * (_result / _flag)) : \
6645 ((u32)(_input & _flag) / (_flag / _result)))
6647 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6649 /* set type for advanced descriptor with frame checksum insertion */
6650 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6651 IXGBE_ADVTXD_DCMD_DEXT |
6652 IXGBE_ADVTXD_DCMD_IFCS;
6654 /* set HW vlan bit if vlan is present */
6655 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6656 IXGBE_ADVTXD_DCMD_VLE);
6658 /* set segmentation enable bits for TSO/FSO */
6659 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6660 IXGBE_ADVTXD_DCMD_TSE);
6662 /* set timestamp bit if present */
6663 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6664 IXGBE_ADVTXD_MAC_TSTAMP);
6666 /* insert frame checksum */
6667 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6672 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6673 u32 tx_flags, unsigned int paylen)
6675 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
6677 /* enable L4 checksum for TSO and TX checksum offload */
6678 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6679 IXGBE_TX_FLAGS_CSUM,
6680 IXGBE_ADVTXD_POPTS_TXSM);
6682 /* enble IPv4 checksum for TSO */
6683 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6684 IXGBE_TX_FLAGS_IPV4,
6685 IXGBE_ADVTXD_POPTS_IXSM);
6688 * Check Context must be set if Tx switch is enabled, which it
6689 * always is for case where virtual functions are running
6691 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6695 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6698 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6701 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6702 struct ixgbe_tx_buffer *first,
6705 struct sk_buff *skb = first->skb;
6706 struct ixgbe_tx_buffer *tx_buffer;
6707 union ixgbe_adv_tx_desc *tx_desc;
6708 struct skb_frag_struct *frag;
6710 unsigned int data_len, size;
6711 u32 tx_flags = first->tx_flags;
6712 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
6713 u16 i = tx_ring->next_to_use;
6715 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6717 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
6719 size = skb_headlen(skb);
6720 data_len = skb->data_len;
6723 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6724 if (data_len < sizeof(struct fcoe_crc_eof)) {
6725 size -= sizeof(struct fcoe_crc_eof) - data_len;
6728 data_len -= sizeof(struct fcoe_crc_eof);
6733 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6737 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6738 if (dma_mapping_error(tx_ring->dev, dma))
6741 /* record length, and DMA address */
6742 dma_unmap_len_set(tx_buffer, len, size);
6743 dma_unmap_addr_set(tx_buffer, dma, dma);
6745 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6747 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6748 tx_desc->read.cmd_type_len =
6749 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
6753 if (i == tx_ring->count) {
6754 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6757 tx_desc->read.olinfo_status = 0;
6759 dma += IXGBE_MAX_DATA_PER_TXD;
6760 size -= IXGBE_MAX_DATA_PER_TXD;
6762 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6765 if (likely(!data_len))
6768 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6772 if (i == tx_ring->count) {
6773 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6776 tx_desc->read.olinfo_status = 0;
6779 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6781 size = skb_frag_size(frag);
6785 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6788 tx_buffer = &tx_ring->tx_buffer_info[i];
6791 /* write last descriptor with RS and EOP bits */
6792 cmd_type |= size | IXGBE_TXD_CMD;
6793 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6795 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6797 /* set the timestamp */
6798 first->time_stamp = jiffies;
6801 * Force memory writes to complete before letting h/w know there
6802 * are new descriptors to fetch. (Only applicable for weak-ordered
6803 * memory model archs, such as IA-64).
6805 * We also need this memory barrier to make certain all of the
6806 * status bits have been updated before next_to_watch is written.
6810 /* set next_to_watch value indicating a packet is present */
6811 first->next_to_watch = tx_desc;
6814 if (i == tx_ring->count)
6817 tx_ring->next_to_use = i;
6819 /* notify HW of packet */
6820 ixgbe_write_tail(tx_ring, i);
6824 dev_err(tx_ring->dev, "TX DMA map failed\n");
6826 /* clear dma mappings for failed tx_buffer_info map */
6828 tx_buffer = &tx_ring->tx_buffer_info[i];
6829 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6830 if (tx_buffer == first)
6837 tx_ring->next_to_use = i;
6840 static void ixgbe_atr(struct ixgbe_ring *ring,
6841 struct ixgbe_tx_buffer *first)
6843 struct ixgbe_q_vector *q_vector = ring->q_vector;
6844 union ixgbe_atr_hash_dword input = { .dword = 0 };
6845 union ixgbe_atr_hash_dword common = { .dword = 0 };
6847 unsigned char *network;
6849 struct ipv6hdr *ipv6;
6854 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6858 /* do nothing if sampling is disabled */
6859 if (!ring->atr_sample_rate)
6864 /* snag network header to get L4 type and address */
6865 hdr.network = skb_network_header(first->skb);
6867 /* Currently only IPv4/IPv6 with TCP is supported */
6868 if ((first->protocol != htons(ETH_P_IPV6) ||
6869 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6870 (first->protocol != htons(ETH_P_IP) ||
6871 hdr.ipv4->protocol != IPPROTO_TCP))
6874 th = tcp_hdr(first->skb);
6876 /* skip this packet since it is invalid or the socket is closing */
6880 /* sample on all syn packets or once every atr sample count */
6881 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6884 /* reset sample count */
6885 ring->atr_count = 0;
6887 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6890 * src and dst are inverted, think how the receiver sees them
6892 * The input is broken into two sections, a non-compressed section
6893 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6894 * is XORed together and stored in the compressed dword.
6896 input.formatted.vlan_id = vlan_id;
6899 * since src port and flex bytes occupy the same word XOR them together
6900 * and write the value to source port portion of compressed dword
6902 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6903 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
6905 common.port.src ^= th->dest ^ first->protocol;
6906 common.port.dst ^= th->source;
6908 if (first->protocol == htons(ETH_P_IP)) {
6909 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6910 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6912 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6913 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6914 hdr.ipv6->saddr.s6_addr32[1] ^
6915 hdr.ipv6->saddr.s6_addr32[2] ^
6916 hdr.ipv6->saddr.s6_addr32[3] ^
6917 hdr.ipv6->daddr.s6_addr32[0] ^
6918 hdr.ipv6->daddr.s6_addr32[1] ^
6919 hdr.ipv6->daddr.s6_addr32[2] ^
6920 hdr.ipv6->daddr.s6_addr32[3];
6923 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6924 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6925 input, common, ring->queue_index);
6928 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6930 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6931 /* Herbert's original patch had:
6932 * smp_mb__after_netif_stop_queue();
6933 * but since that doesn't exist yet, just open code it. */
6936 /* We need to check again in a case another CPU has just
6937 * made room available. */
6938 if (likely(ixgbe_desc_unused(tx_ring) < size))
6941 /* A reprieve! - use start_queue because it doesn't call schedule */
6942 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6943 ++tx_ring->tx_stats.restart_queue;
6947 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6949 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6951 return __ixgbe_maybe_stop_tx(tx_ring, size);
6954 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
6955 void *accel_priv, select_queue_fallback_t fallback)
6957 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
6959 struct ixgbe_adapter *adapter;
6960 struct ixgbe_ring_feature *f;
6965 return skb->queue_mapping + fwd_adapter->tx_base_queue;
6970 * only execute the code below if protocol is FCoE
6971 * or FIP and we have FCoE enabled on the adapter
6973 switch (vlan_get_protocol(skb)) {
6974 case htons(ETH_P_FCOE):
6975 case htons(ETH_P_FIP):
6976 adapter = netdev_priv(dev);
6978 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
6981 return fallback(dev, skb);
6984 f = &adapter->ring_feature[RING_F_FCOE];
6986 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6989 while (txq >= f->indices)
6992 return txq + f->offset;
6994 return fallback(dev, skb);
6998 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6999 struct ixgbe_adapter *adapter,
7000 struct ixgbe_ring *tx_ring)
7002 struct ixgbe_tx_buffer *first;
7006 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7007 __be16 protocol = skb->protocol;
7011 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7012 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7013 * + 2 desc gap to keep tail from touching head,
7014 * + 1 desc for context descriptor,
7015 * otherwise try next time
7017 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7018 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7020 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7021 tx_ring->tx_stats.tx_busy++;
7022 return NETDEV_TX_BUSY;
7025 /* record the location of the first descriptor for this packet */
7026 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7028 first->bytecount = skb->len;
7029 first->gso_segs = 1;
7031 /* if we have a HW VLAN tag being added default to the HW one */
7032 if (vlan_tx_tag_present(skb)) {
7033 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7034 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7035 /* else if it is a SW VLAN check the next protocol and store the tag */
7036 } else if (protocol == htons(ETH_P_8021Q)) {
7037 struct vlan_hdr *vhdr, _vhdr;
7038 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7042 protocol = vhdr->h_vlan_encapsulated_proto;
7043 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7044 IXGBE_TX_FLAGS_VLAN_SHIFT;
7045 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7048 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
7049 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7050 &adapter->state))) {
7051 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7052 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7054 /* schedule check for Tx timestamp */
7055 adapter->ptp_tx_skb = skb_get(skb);
7056 adapter->ptp_tx_start = jiffies;
7057 schedule_work(&adapter->ptp_tx_work);
7060 skb_tx_timestamp(skb);
7062 #ifdef CONFIG_PCI_IOV
7064 * Use the l2switch_enable flag - would be false if the DMA
7065 * Tx switch had been disabled.
7067 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7068 tx_flags |= IXGBE_TX_FLAGS_CC;
7071 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7072 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7073 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7074 (skb->priority != TC_PRIO_CONTROL))) {
7075 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7076 tx_flags |= (skb->priority & 0x7) <<
7077 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7078 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7079 struct vlan_ethhdr *vhdr;
7081 if (skb_cow_head(skb, 0))
7083 vhdr = (struct vlan_ethhdr *)skb->data;
7084 vhdr->h_vlan_TCI = htons(tx_flags >>
7085 IXGBE_TX_FLAGS_VLAN_SHIFT);
7087 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7091 /* record initial flags and protocol */
7092 first->tx_flags = tx_flags;
7093 first->protocol = protocol;
7096 /* setup tx offload for FCoE */
7097 if ((protocol == htons(ETH_P_FCOE)) &&
7098 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7099 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7106 #endif /* IXGBE_FCOE */
7107 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7111 ixgbe_tx_csum(tx_ring, first);
7113 /* add the ATR filter if ATR is on */
7114 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7115 ixgbe_atr(tx_ring, first);
7119 #endif /* IXGBE_FCOE */
7120 ixgbe_tx_map(tx_ring, first, hdr_len);
7122 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7124 return NETDEV_TX_OK;
7127 dev_kfree_skb_any(first->skb);
7130 return NETDEV_TX_OK;
7133 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7134 struct net_device *netdev,
7135 struct ixgbe_ring *ring)
7137 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7138 struct ixgbe_ring *tx_ring;
7141 * The minimum packet size for olinfo paylen is 17 so pad the skb
7142 * in order to meet this minimum size requirement.
7144 if (unlikely(skb->len < 17)) {
7145 if (skb_pad(skb, 17 - skb->len))
7146 return NETDEV_TX_OK;
7148 skb_set_tail_pointer(skb, 17);
7151 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7153 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7156 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7157 struct net_device *netdev)
7159 return __ixgbe_xmit_frame(skb, netdev, NULL);
7163 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7164 * @netdev: network interface device structure
7165 * @p: pointer to an address structure
7167 * Returns 0 on success, negative on failure
7169 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7171 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7172 struct ixgbe_hw *hw = &adapter->hw;
7173 struct sockaddr *addr = p;
7175 if (!is_valid_ether_addr(addr->sa_data))
7176 return -EADDRNOTAVAIL;
7178 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7179 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7181 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
7187 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7189 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7190 struct ixgbe_hw *hw = &adapter->hw;
7194 if (prtad != hw->phy.mdio.prtad)
7196 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7202 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7203 u16 addr, u16 value)
7205 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7206 struct ixgbe_hw *hw = &adapter->hw;
7208 if (prtad != hw->phy.mdio.prtad)
7210 return hw->phy.ops.write_reg(hw, addr, devad, value);
7213 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7215 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7219 return ixgbe_ptp_set_ts_config(adapter, req);
7221 return ixgbe_ptp_get_ts_config(adapter, req);
7223 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7228 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7230 * @netdev: network interface device structure
7232 * Returns non-zero on failure
7234 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7237 struct ixgbe_adapter *adapter = netdev_priv(dev);
7238 struct ixgbe_hw *hw = &adapter->hw;
7240 if (is_valid_ether_addr(hw->mac.san_addr)) {
7242 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7245 /* update SAN MAC vmdq pool selection */
7246 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7252 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7254 * @netdev: network interface device structure
7256 * Returns non-zero on failure
7258 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7261 struct ixgbe_adapter *adapter = netdev_priv(dev);
7262 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7264 if (is_valid_ether_addr(mac->san_addr)) {
7266 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7272 #ifdef CONFIG_NET_POLL_CONTROLLER
7274 * Polling 'interrupt' - used by things like netconsole to send skbs
7275 * without having to re-enable interrupts. It's not called while
7276 * the interrupt routine is executing.
7278 static void ixgbe_netpoll(struct net_device *netdev)
7280 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7283 /* if interface is down do nothing */
7284 if (test_bit(__IXGBE_DOWN, &adapter->state))
7287 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
7288 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
7289 for (i = 0; i < adapter->num_q_vectors; i++)
7290 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7292 ixgbe_intr(adapter->pdev->irq, netdev);
7294 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
7298 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7299 struct rtnl_link_stats64 *stats)
7301 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7305 for (i = 0; i < adapter->num_rx_queues; i++) {
7306 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7312 start = u64_stats_fetch_begin_irq(&ring->syncp);
7313 packets = ring->stats.packets;
7314 bytes = ring->stats.bytes;
7315 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7316 stats->rx_packets += packets;
7317 stats->rx_bytes += bytes;
7321 for (i = 0; i < adapter->num_tx_queues; i++) {
7322 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7328 start = u64_stats_fetch_begin_irq(&ring->syncp);
7329 packets = ring->stats.packets;
7330 bytes = ring->stats.bytes;
7331 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7332 stats->tx_packets += packets;
7333 stats->tx_bytes += bytes;
7337 /* following stats updated by ixgbe_watchdog_task() */
7338 stats->multicast = netdev->stats.multicast;
7339 stats->rx_errors = netdev->stats.rx_errors;
7340 stats->rx_length_errors = netdev->stats.rx_length_errors;
7341 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7342 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7346 #ifdef CONFIG_IXGBE_DCB
7348 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7349 * @adapter: pointer to ixgbe_adapter
7350 * @tc: number of traffic classes currently enabled
7352 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7353 * 802.1Q priority maps to a packet buffer that exists.
7355 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7357 struct ixgbe_hw *hw = &adapter->hw;
7361 /* 82598 have a static priority to TC mapping that can not
7362 * be changed so no validation is needed.
7364 if (hw->mac.type == ixgbe_mac_82598EB)
7367 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7370 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7371 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7373 /* If up2tc is out of bounds default to zero */
7375 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7379 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7385 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7386 * @adapter: Pointer to adapter struct
7388 * Populate the netdev user priority to tc map
7390 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7392 struct net_device *dev = adapter->netdev;
7393 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7394 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7397 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7400 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7401 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7403 tc = ets->prio_tc[prio];
7405 netdev_set_prio_tc_map(dev, prio, tc);
7409 #endif /* CONFIG_IXGBE_DCB */
7411 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7413 * @netdev: net device to configure
7414 * @tc: number of traffic classes to enable
7416 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7418 struct ixgbe_adapter *adapter = netdev_priv(dev);
7419 struct ixgbe_hw *hw = &adapter->hw;
7422 /* Hardware supports up to 8 traffic classes */
7423 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7424 (hw->mac.type == ixgbe_mac_82598EB &&
7425 tc < MAX_TRAFFIC_CLASS))
7428 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7429 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7432 /* Hardware has to reinitialize queues and interrupts to
7433 * match packet buffer alignment. Unfortunately, the
7434 * hardware is not flexible enough to do this dynamically.
7436 if (netif_running(dev))
7438 ixgbe_clear_interrupt_scheme(adapter);
7440 #ifdef CONFIG_IXGBE_DCB
7442 netdev_set_num_tc(dev, tc);
7443 ixgbe_set_prio_tc_map(adapter);
7445 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7447 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7448 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7449 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7452 netdev_reset_tc(dev);
7454 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7455 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7457 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7459 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7460 adapter->dcb_cfg.pfc_mode_enable = false;
7463 ixgbe_validate_rtr(adapter, tc);
7465 #endif /* CONFIG_IXGBE_DCB */
7466 ixgbe_init_interrupt_scheme(adapter);
7468 if (netif_running(dev))
7469 return ixgbe_open(dev);
7474 #ifdef CONFIG_PCI_IOV
7475 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7477 struct net_device *netdev = adapter->netdev;
7480 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7485 void ixgbe_do_reset(struct net_device *netdev)
7487 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7489 if (netif_running(netdev))
7490 ixgbe_reinit_locked(adapter);
7492 ixgbe_reset(adapter);
7495 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7496 netdev_features_t features)
7498 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7500 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7501 if (!(features & NETIF_F_RXCSUM))
7502 features &= ~NETIF_F_LRO;
7504 /* Turn off LRO if not RSC capable */
7505 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7506 features &= ~NETIF_F_LRO;
7511 static int ixgbe_set_features(struct net_device *netdev,
7512 netdev_features_t features)
7514 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7515 netdev_features_t changed = netdev->features ^ features;
7516 bool need_reset = false;
7518 /* Make sure RSC matches LRO, reset if change */
7519 if (!(features & NETIF_F_LRO)) {
7520 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7522 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7523 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7524 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7525 if (adapter->rx_itr_setting == 1 ||
7526 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7527 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7529 } else if ((changed ^ features) & NETIF_F_LRO) {
7530 e_info(probe, "rx-usecs set too low, "
7536 * Check if Flow Director n-tuple support was enabled or disabled. If
7537 * the state changed, we need to reset.
7539 switch (features & NETIF_F_NTUPLE) {
7540 case NETIF_F_NTUPLE:
7541 /* turn off ATR, enable perfect filters and reset */
7542 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7545 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7546 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7549 /* turn off perfect filters, enable ATR and reset */
7550 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7553 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7555 /* We cannot enable ATR if SR-IOV is enabled */
7556 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7559 /* We cannot enable ATR if we have 2 or more traffic classes */
7560 if (netdev_get_num_tc(netdev) > 1)
7563 /* We cannot enable ATR if RSS is disabled */
7564 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7567 /* A sample rate of 0 indicates ATR disabled */
7568 if (!adapter->atr_sample_rate)
7571 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7575 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7576 ixgbe_vlan_strip_enable(adapter);
7578 ixgbe_vlan_strip_disable(adapter);
7580 if (changed & NETIF_F_RXALL)
7583 netdev->features = features;
7585 ixgbe_do_reset(netdev);
7590 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7591 struct net_device *dev,
7592 const unsigned char *addr,
7595 struct ixgbe_adapter *adapter = netdev_priv(dev);
7598 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7599 return ndo_dflt_fdb_add(ndm, tb, dev, addr, flags);
7601 /* Hardware does not support aging addresses so if a
7602 * ndm_state is given only allow permanent addresses
7604 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7605 pr_info("%s: FDB only supports static addresses\n",
7610 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7611 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
7613 if (netdev_uc_count(dev) < rar_uc_entries)
7614 err = dev_uc_add_excl(dev, addr);
7617 } else if (is_multicast_ether_addr(addr)) {
7618 err = dev_mc_add_excl(dev, addr);
7623 /* Only return duplicate errors if NLM_F_EXCL is set */
7624 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7630 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7631 struct nlmsghdr *nlh)
7633 struct ixgbe_adapter *adapter = netdev_priv(dev);
7634 struct nlattr *attr, *br_spec;
7637 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7640 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7642 nla_for_each_nested(attr, br_spec, rem) {
7646 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7649 mode = nla_get_u16(attr);
7650 if (mode == BRIDGE_MODE_VEPA) {
7652 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7653 } else if (mode == BRIDGE_MODE_VEB) {
7654 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7655 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7659 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7661 e_info(drv, "enabling bridge mode: %s\n",
7662 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7668 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7669 struct net_device *dev,
7672 struct ixgbe_adapter *adapter = netdev_priv(dev);
7675 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7678 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7679 mode = BRIDGE_MODE_VEB;
7681 mode = BRIDGE_MODE_VEPA;
7683 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
7686 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
7688 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
7689 struct ixgbe_adapter *adapter = netdev_priv(pdev);
7694 if (vdev->num_rx_queues != vdev->num_tx_queues) {
7695 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
7697 return ERR_PTR(-EINVAL);
7700 /* Check for hardware restriction on number of rx/tx queues */
7701 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
7702 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
7704 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7706 return ERR_PTR(-EINVAL);
7709 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7710 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
7711 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
7712 return ERR_PTR(-EBUSY);
7714 fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
7716 return ERR_PTR(-ENOMEM);
7718 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
7719 adapter->num_rx_pools++;
7720 set_bit(pool, &adapter->fwd_bitmask);
7721 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7723 /* Enable VMDq flag so device will be set in VM mode */
7724 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
7725 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7726 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
7728 /* Force reinit of ring allocation with VMDQ enabled */
7729 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7732 fwd_adapter->pool = pool;
7733 fwd_adapter->real_adapter = adapter;
7734 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
7737 netif_tx_start_all_queues(vdev);
7740 /* unwind counter and free adapter struct */
7742 "%s: dfwd hardware acceleration failed\n", vdev->name);
7743 clear_bit(pool, &adapter->fwd_bitmask);
7744 adapter->num_rx_pools--;
7746 return ERR_PTR(err);
7749 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
7751 struct ixgbe_fwd_adapter *fwd_adapter = priv;
7752 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
7755 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
7756 adapter->num_rx_pools--;
7758 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7759 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7760 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
7761 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7762 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7763 fwd_adapter->pool, adapter->num_rx_pools,
7764 fwd_adapter->rx_base_queue,
7765 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
7766 adapter->fwd_bitmask);
7770 static const struct net_device_ops ixgbe_netdev_ops = {
7771 .ndo_open = ixgbe_open,
7772 .ndo_stop = ixgbe_close,
7773 .ndo_start_xmit = ixgbe_xmit_frame,
7774 .ndo_select_queue = ixgbe_select_queue,
7775 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7776 .ndo_validate_addr = eth_validate_addr,
7777 .ndo_set_mac_address = ixgbe_set_mac,
7778 .ndo_change_mtu = ixgbe_change_mtu,
7779 .ndo_tx_timeout = ixgbe_tx_timeout,
7780 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7781 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7782 .ndo_do_ioctl = ixgbe_ioctl,
7783 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7784 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7785 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
7786 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7787 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7788 .ndo_get_stats64 = ixgbe_get_stats64,
7789 #ifdef CONFIG_IXGBE_DCB
7790 .ndo_setup_tc = ixgbe_setup_tc,
7792 #ifdef CONFIG_NET_POLL_CONTROLLER
7793 .ndo_poll_controller = ixgbe_netpoll,
7795 #ifdef CONFIG_NET_RX_BUSY_POLL
7796 .ndo_busy_poll = ixgbe_low_latency_recv,
7799 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7800 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7801 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7802 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7803 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7804 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7805 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7806 #endif /* IXGBE_FCOE */
7807 .ndo_set_features = ixgbe_set_features,
7808 .ndo_fix_features = ixgbe_fix_features,
7809 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7810 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7811 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7812 .ndo_dfwd_add_station = ixgbe_fwd_add,
7813 .ndo_dfwd_del_station = ixgbe_fwd_del,
7817 * ixgbe_enumerate_functions - Get the number of ports this device has
7818 * @adapter: adapter structure
7820 * This function enumerates the phsyical functions co-located on a single slot,
7821 * in order to determine how many ports a device has. This is most useful in
7822 * determining the required GT/s of PCIe bandwidth necessary for optimal
7825 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
7827 struct list_head *entry;
7830 /* Some cards can not use the generic count PCIe functions method,
7831 * because they are behind a parent switch, so we hardcode these with
7832 * the correct number of functions.
7834 if (ixgbe_pcie_from_parent(&adapter->hw)) {
7837 list_for_each(entry, &adapter->pdev->bus_list) {
7838 struct pci_dev *pdev =
7839 list_entry(entry, struct pci_dev, bus_list);
7840 /* don't count virtual functions */
7841 if (!pdev->is_virtfn)
7850 * ixgbe_wol_supported - Check whether device supports WoL
7851 * @hw: hw specific details
7852 * @device_id: the device ID
7853 * @subdev_id: the subsystem device ID
7855 * This function is used by probe and ethtool to determine
7856 * which devices have WoL support
7859 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
7862 struct ixgbe_hw *hw = &adapter->hw;
7863 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
7864 int is_wol_supported = 0;
7866 switch (device_id) {
7867 case IXGBE_DEV_ID_82599_SFP:
7868 /* Only these subdevices could supports WOL */
7869 switch (subdevice_id) {
7870 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
7871 case IXGBE_SUBDEV_ID_82599_560FLR:
7872 /* only support first port */
7873 if (hw->bus.func != 0)
7875 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
7876 case IXGBE_SUBDEV_ID_82599_SFP:
7877 case IXGBE_SUBDEV_ID_82599_RNDC:
7878 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
7879 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
7880 is_wol_supported = 1;
7884 case IXGBE_DEV_ID_82599EN_SFP:
7885 /* Only this subdevice supports WOL */
7886 switch (subdevice_id) {
7887 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
7888 is_wol_supported = 1;
7892 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
7893 /* All except this subdevice support WOL */
7894 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
7895 is_wol_supported = 1;
7897 case IXGBE_DEV_ID_82599_KX4:
7898 is_wol_supported = 1;
7900 case IXGBE_DEV_ID_X540T:
7901 case IXGBE_DEV_ID_X540T1:
7902 /* check eeprom to see if enabled wol */
7903 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
7904 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
7905 (hw->bus.func == 0))) {
7906 is_wol_supported = 1;
7911 return is_wol_supported;
7915 * ixgbe_probe - Device Initialization Routine
7916 * @pdev: PCI device information struct
7917 * @ent: entry in ixgbe_pci_tbl
7919 * Returns 0 on success, negative on failure
7921 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7922 * The OS initialization, configuring of the adapter private structure,
7923 * and a hardware reset occur.
7925 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7927 struct net_device *netdev;
7928 struct ixgbe_adapter *adapter = NULL;
7929 struct ixgbe_hw *hw;
7930 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7931 static int cards_found;
7932 int i, err, pci_using_dac, expected_gts;
7933 unsigned int indices = MAX_TX_QUEUES;
7934 u8 part_str[IXGBE_PBANUM_LENGTH];
7940 /* Catch broken hardware that put the wrong VF device ID in
7941 * the PCIe SR-IOV capability.
7943 if (pdev->is_virtfn) {
7944 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7945 pci_name(pdev), pdev->vendor, pdev->device);
7949 err = pci_enable_device_mem(pdev);
7953 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
7956 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7959 "No usable DMA configuration, aborting\n");
7965 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7966 IORESOURCE_MEM), ixgbe_driver_name);
7969 "pci_request_selected_regions failed 0x%x\n", err);
7973 pci_enable_pcie_error_reporting(pdev);
7975 pci_set_master(pdev);
7976 pci_save_state(pdev);
7978 if (ii->mac == ixgbe_mac_82598EB) {
7979 #ifdef CONFIG_IXGBE_DCB
7980 /* 8 TC w/ 4 queues per TC */
7981 indices = 4 * MAX_TRAFFIC_CLASS;
7983 indices = IXGBE_MAX_RSS_INDICES;
7987 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7990 goto err_alloc_etherdev;
7993 SET_NETDEV_DEV(netdev, &pdev->dev);
7995 adapter = netdev_priv(netdev);
7996 pci_set_drvdata(pdev, adapter);
7998 adapter->netdev = netdev;
7999 adapter->pdev = pdev;
8002 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8004 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8005 pci_resource_len(pdev, 0));
8006 adapter->io_addr = hw->hw_addr;
8012 netdev->netdev_ops = &ixgbe_netdev_ops;
8013 ixgbe_set_ethtool_ops(netdev);
8014 netdev->watchdog_timeo = 5 * HZ;
8015 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
8017 adapter->bd_number = cards_found;
8020 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8021 hw->mac.type = ii->mac;
8024 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8025 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
8026 if (ixgbe_removed(hw->hw_addr)) {
8030 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8031 if (!(eec & (1 << 8)))
8032 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8035 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8036 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8037 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8038 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8039 hw->phy.mdio.mmds = 0;
8040 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8041 hw->phy.mdio.dev = netdev;
8042 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8043 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8045 ii->get_invariants(hw);
8047 /* setup the private structure */
8048 err = ixgbe_sw_init(adapter);
8052 /* Make it possible the adapter to be woken up via WOL */
8053 switch (adapter->hw.mac.type) {
8054 case ixgbe_mac_82599EB:
8055 case ixgbe_mac_X540:
8056 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8063 * If there is a fan on this device and it has failed log the
8066 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8067 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8068 if (esdp & IXGBE_ESDP_SDP1)
8069 e_crit(probe, "Fan has stopped, replace the adapter\n");
8072 if (allow_unsupported_sfp)
8073 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8075 /* reset_hw fills in the perm_addr as well */
8076 hw->phy.reset_if_overtemp = true;
8077 err = hw->mac.ops.reset_hw(hw);
8078 hw->phy.reset_if_overtemp = false;
8079 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8080 hw->mac.type == ixgbe_mac_82598EB) {
8082 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8083 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8084 e_dev_err("Reload the driver after installing a supported module.\n");
8087 e_dev_err("HW Init failed: %d\n", err);
8091 #ifdef CONFIG_PCI_IOV
8092 /* SR-IOV not supported on the 82598 */
8093 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8096 ixgbe_init_mbx_params_pf(hw);
8097 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8098 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8099 ixgbe_enable_sriov(adapter);
8103 netdev->features = NETIF_F_SG |
8106 NETIF_F_HW_VLAN_CTAG_TX |
8107 NETIF_F_HW_VLAN_CTAG_RX |
8108 NETIF_F_HW_VLAN_CTAG_FILTER |
8114 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8116 switch (adapter->hw.mac.type) {
8117 case ixgbe_mac_82599EB:
8118 case ixgbe_mac_X540:
8119 netdev->features |= NETIF_F_SCTP_CSUM;
8120 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8127 netdev->hw_features |= NETIF_F_RXALL;
8129 netdev->vlan_features |= NETIF_F_TSO;
8130 netdev->vlan_features |= NETIF_F_TSO6;
8131 netdev->vlan_features |= NETIF_F_IP_CSUM;
8132 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8133 netdev->vlan_features |= NETIF_F_SG;
8135 netdev->priv_flags |= IFF_UNICAST_FLT;
8136 netdev->priv_flags |= IFF_SUPP_NOFCS;
8138 #ifdef CONFIG_IXGBE_DCB
8139 netdev->dcbnl_ops = &dcbnl_ops;
8143 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8144 unsigned int fcoe_l;
8146 if (hw->mac.ops.get_device_caps) {
8147 hw->mac.ops.get_device_caps(hw, &device_caps);
8148 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8149 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8153 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8154 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8156 netdev->features |= NETIF_F_FSO |
8159 netdev->vlan_features |= NETIF_F_FSO |
8163 #endif /* IXGBE_FCOE */
8164 if (pci_using_dac) {
8165 netdev->features |= NETIF_F_HIGHDMA;
8166 netdev->vlan_features |= NETIF_F_HIGHDMA;
8169 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8170 netdev->hw_features |= NETIF_F_LRO;
8171 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8172 netdev->features |= NETIF_F_LRO;
8174 /* make sure the EEPROM is good */
8175 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8176 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8181 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8183 if (!is_valid_ether_addr(netdev->dev_addr)) {
8184 e_dev_err("invalid MAC address\n");
8189 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8190 (unsigned long) adapter);
8192 if (ixgbe_removed(hw->hw_addr)) {
8196 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8197 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8198 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8200 err = ixgbe_init_interrupt_scheme(adapter);
8204 /* WOL not supported for all devices */
8206 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8207 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8208 pdev->subsystem_device);
8209 if (hw->wol_enabled)
8210 adapter->wol = IXGBE_WUFC_MAG;
8212 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8214 /* save off EEPROM version number */
8215 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8216 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8218 /* pick up the PCI bus settings for reporting later */
8219 hw->mac.ops.get_bus_info(hw);
8220 if (ixgbe_pcie_from_parent(hw))
8221 ixgbe_get_parent_bus_info(adapter);
8223 /* calculate the expected PCIe bandwidth required for optimal
8224 * performance. Note that some older parts will never have enough
8225 * bandwidth due to being older generation PCIe parts. We clamp these
8226 * parts to ensure no warning is displayed if it can't be fixed.
8228 switch (hw->mac.type) {
8229 case ixgbe_mac_82598EB:
8230 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8233 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8236 ixgbe_check_minimum_link(adapter, expected_gts);
8238 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
8240 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
8241 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8242 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8243 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8246 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8247 hw->mac.type, hw->phy.type, part_str);
8249 e_dev_info("%pM\n", netdev->dev_addr);
8251 /* reset the hardware with the new settings */
8252 err = hw->mac.ops.start_hw(hw);
8253 if (err == IXGBE_ERR_EEPROM_VERSION) {
8254 /* We are running on a pre-production device, log a warning */
8255 e_dev_warn("This device is a pre-production adapter/LOM. "
8256 "Please be aware there may be issues associated "
8257 "with your hardware. If you are experiencing "
8258 "problems please contact your Intel or hardware "
8259 "representative who provided you with this "
8262 strcpy(netdev->name, "eth%d");
8263 err = register_netdev(netdev);
8267 /* power down the optics for 82599 SFP+ fiber */
8268 if (hw->mac.ops.disable_tx_laser)
8269 hw->mac.ops.disable_tx_laser(hw);
8271 /* carrier off reporting is important to ethtool even BEFORE open */
8272 netif_carrier_off(netdev);
8274 #ifdef CONFIG_IXGBE_DCA
8275 if (dca_add_requester(&pdev->dev) == 0) {
8276 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8277 ixgbe_setup_dca(adapter);
8280 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8281 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8282 for (i = 0; i < adapter->num_vfs; i++)
8283 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8286 /* firmware requires driver version to be 0xFFFFFFFF
8287 * since os does not support feature
8289 if (hw->mac.ops.set_fw_drv_ver)
8290 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8293 /* add san mac addr to netdev */
8294 ixgbe_add_sanmac_netdev(netdev);
8296 e_dev_info("%s\n", ixgbe_default_device_descr);
8299 #ifdef CONFIG_IXGBE_HWMON
8300 if (ixgbe_sysfs_init(adapter))
8301 e_err(probe, "failed to allocate sysfs resources\n");
8302 #endif /* CONFIG_IXGBE_HWMON */
8304 ixgbe_dbg_adapter_init(adapter);
8306 /* Need link setup for MNG FW, else wait for IXGBE_UP */
8307 if (ixgbe_mng_enabled(hw) && hw->mac.ops.setup_link)
8308 hw->mac.ops.setup_link(hw,
8309 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8315 ixgbe_release_hw_control(adapter);
8316 ixgbe_clear_interrupt_scheme(adapter);
8318 ixgbe_disable_sriov(adapter);
8319 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8320 iounmap(adapter->io_addr);
8322 free_netdev(netdev);
8324 pci_release_selected_regions(pdev,
8325 pci_select_bars(pdev, IORESOURCE_MEM));
8328 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8329 pci_disable_device(pdev);
8334 * ixgbe_remove - Device Removal Routine
8335 * @pdev: PCI device information struct
8337 * ixgbe_remove is called by the PCI subsystem to alert the driver
8338 * that it should release a PCI device. The could be caused by a
8339 * Hot-Plug event, or because the driver is going to be removed from
8342 static void ixgbe_remove(struct pci_dev *pdev)
8344 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8345 struct net_device *netdev = adapter->netdev;
8347 ixgbe_dbg_adapter_exit(adapter);
8349 set_bit(__IXGBE_REMOVING, &adapter->state);
8350 cancel_work_sync(&adapter->service_task);
8353 #ifdef CONFIG_IXGBE_DCA
8354 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8355 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8356 dca_remove_requester(&pdev->dev);
8357 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8361 #ifdef CONFIG_IXGBE_HWMON
8362 ixgbe_sysfs_exit(adapter);
8363 #endif /* CONFIG_IXGBE_HWMON */
8365 /* remove the added san mac */
8366 ixgbe_del_sanmac_netdev(netdev);
8368 if (netdev->reg_state == NETREG_REGISTERED)
8369 unregister_netdev(netdev);
8371 #ifdef CONFIG_PCI_IOV
8373 * Only disable SR-IOV on unload if the user specified the now
8374 * deprecated max_vfs module parameter.
8377 ixgbe_disable_sriov(adapter);
8379 ixgbe_clear_interrupt_scheme(adapter);
8381 ixgbe_release_hw_control(adapter);
8384 kfree(adapter->ixgbe_ieee_pfc);
8385 kfree(adapter->ixgbe_ieee_ets);
8388 iounmap(adapter->io_addr);
8389 pci_release_selected_regions(pdev, pci_select_bars(pdev,
8392 e_dev_info("complete\n");
8394 free_netdev(netdev);
8396 pci_disable_pcie_error_reporting(pdev);
8398 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8399 pci_disable_device(pdev);
8403 * ixgbe_io_error_detected - called when PCI error is detected
8404 * @pdev: Pointer to PCI device
8405 * @state: The current pci connection state
8407 * This function is called after a PCI bus error affecting
8408 * this device has been detected.
8410 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8411 pci_channel_state_t state)
8413 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8414 struct net_device *netdev = adapter->netdev;
8416 #ifdef CONFIG_PCI_IOV
8417 struct ixgbe_hw *hw = &adapter->hw;
8418 struct pci_dev *bdev, *vfdev;
8419 u32 dw0, dw1, dw2, dw3;
8421 u16 req_id, pf_func;
8423 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8424 adapter->num_vfs == 0)
8425 goto skip_bad_vf_detection;
8427 bdev = pdev->bus->self;
8428 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8429 bdev = bdev->bus->self;
8432 goto skip_bad_vf_detection;
8434 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8436 goto skip_bad_vf_detection;
8438 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8439 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8440 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8441 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8442 if (ixgbe_removed(hw->hw_addr))
8443 goto skip_bad_vf_detection;
8446 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8447 if (!(req_id & 0x0080))
8448 goto skip_bad_vf_detection;
8450 pf_func = req_id & 0x01;
8451 if ((pf_func & 1) == (pdev->devfn & 1)) {
8452 unsigned int device_id;
8454 vf = (req_id & 0x7F) >> 1;
8455 e_dev_err("VF %d has caused a PCIe error\n", vf);
8456 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8457 "%8.8x\tdw3: %8.8x\n",
8458 dw0, dw1, dw2, dw3);
8459 switch (adapter->hw.mac.type) {
8460 case ixgbe_mac_82599EB:
8461 device_id = IXGBE_82599_VF_DEVICE_ID;
8463 case ixgbe_mac_X540:
8464 device_id = IXGBE_X540_VF_DEVICE_ID;
8471 /* Find the pci device of the offending VF */
8472 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8474 if (vfdev->devfn == (req_id & 0xFF))
8476 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8480 * There's a slim chance the VF could have been hot plugged,
8481 * so if it is no longer present we don't need to issue the
8482 * VFLR. Just clean up the AER in that case.
8485 e_dev_err("Issuing VFLR to VF %d\n", vf);
8486 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
8487 /* Free device reference count */
8491 pci_cleanup_aer_uncorrect_error_status(pdev);
8495 * Even though the error may have occurred on the other port
8496 * we still need to increment the vf error reference count for
8497 * both ports because the I/O resume function will be called
8500 adapter->vferr_refcount++;
8502 return PCI_ERS_RESULT_RECOVERED;
8504 skip_bad_vf_detection:
8505 #endif /* CONFIG_PCI_IOV */
8506 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
8507 return PCI_ERS_RESULT_DISCONNECT;
8510 netif_device_detach(netdev);
8512 if (state == pci_channel_io_perm_failure) {
8514 return PCI_ERS_RESULT_DISCONNECT;
8517 if (netif_running(netdev))
8518 ixgbe_down(adapter);
8520 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8521 pci_disable_device(pdev);
8524 /* Request a slot reset. */
8525 return PCI_ERS_RESULT_NEED_RESET;
8529 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8530 * @pdev: Pointer to PCI device
8532 * Restart the card from scratch, as if from a cold-boot.
8534 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
8536 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8537 pci_ers_result_t result;
8540 if (pci_enable_device_mem(pdev)) {
8541 e_err(probe, "Cannot re-enable PCI device after reset.\n");
8542 result = PCI_ERS_RESULT_DISCONNECT;
8544 smp_mb__before_clear_bit();
8545 clear_bit(__IXGBE_DISABLED, &adapter->state);
8546 adapter->hw.hw_addr = adapter->io_addr;
8547 pci_set_master(pdev);
8548 pci_restore_state(pdev);
8549 pci_save_state(pdev);
8551 pci_wake_from_d3(pdev, false);
8553 ixgbe_reset(adapter);
8554 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8555 result = PCI_ERS_RESULT_RECOVERED;
8558 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8560 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8561 "failed 0x%0x\n", err);
8562 /* non-fatal, continue */
8569 * ixgbe_io_resume - called when traffic can start flowing again.
8570 * @pdev: Pointer to PCI device
8572 * This callback is called when the error recovery driver tells us that
8573 * its OK to resume normal operation.
8575 static void ixgbe_io_resume(struct pci_dev *pdev)
8577 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8578 struct net_device *netdev = adapter->netdev;
8580 #ifdef CONFIG_PCI_IOV
8581 if (adapter->vferr_refcount) {
8582 e_info(drv, "Resuming after VF err\n");
8583 adapter->vferr_refcount--;
8588 if (netif_running(netdev))
8591 netif_device_attach(netdev);
8594 static const struct pci_error_handlers ixgbe_err_handler = {
8595 .error_detected = ixgbe_io_error_detected,
8596 .slot_reset = ixgbe_io_slot_reset,
8597 .resume = ixgbe_io_resume,
8600 static struct pci_driver ixgbe_driver = {
8601 .name = ixgbe_driver_name,
8602 .id_table = ixgbe_pci_tbl,
8603 .probe = ixgbe_probe,
8604 .remove = ixgbe_remove,
8606 .suspend = ixgbe_suspend,
8607 .resume = ixgbe_resume,
8609 .shutdown = ixgbe_shutdown,
8610 .sriov_configure = ixgbe_pci_sriov_configure,
8611 .err_handler = &ixgbe_err_handler
8615 * ixgbe_init_module - Driver Registration Routine
8617 * ixgbe_init_module is the first routine called when the driver is
8618 * loaded. All it does is register with the PCI subsystem.
8620 static int __init ixgbe_init_module(void)
8623 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
8624 pr_info("%s\n", ixgbe_copyright);
8628 ret = pci_register_driver(&ixgbe_driver);
8634 #ifdef CONFIG_IXGBE_DCA
8635 dca_register_notify(&dca_notifier);
8641 module_init(ixgbe_init_module);
8644 * ixgbe_exit_module - Driver Exit Cleanup Routine
8646 * ixgbe_exit_module is called just before the driver is removed
8649 static void __exit ixgbe_exit_module(void)
8651 #ifdef CONFIG_IXGBE_DCA
8652 dca_unregister_notify(&dca_notifier);
8654 pci_unregister_driver(&ixgbe_driver);
8658 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8661 #ifdef CONFIG_IXGBE_DCA
8662 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
8667 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
8668 __ixgbe_notify_dca);
8670 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
8673 #endif /* CONFIG_IXGBE_DCA */
8675 module_exit(ixgbe_exit_module);