drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/udp_tunnel.h>
  54 #include <net/pkt_cls.h>
  55 #include <net/tc_act/tc_gact.h>
  56 #include <net/tc_act/tc_mirred.h>
  57 #include <net/vxlan.h>
  58
  59 #include "ixgbe.h"
  60 #include "ixgbe_common.h"
  61 #include "ixgbe_dcb_82599.h"
  62 #include "ixgbe_sriov.h"
  63 #include "ixgbe_model.h"
  64
  65 char ixgbe_driver_name[] = "ixgbe";
  66 static const char ixgbe_driver_string[] =
  67                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  68 #ifdef IXGBE_FCOE
  69 char ixgbe_default_device_descr[] =
  70                               "Intel(R) 10 Gigabit Network Connection";
  71 #else
  72 static char ixgbe_default_device_descr[] =
  73                               "Intel(R) 10 Gigabit Network Connection";
  74 #endif
  75 #define DRV_VERSION "4.4.0-k"
  76 const char ixgbe_driver_version[] = DRV_VERSION;
  77 static const char ixgbe_copyright[] =
  78                                 "Copyright (c) 1999-2016 Intel Corporation.";
  79
  80 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  81
  82 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  83         [board_82598]           = &ixgbe_82598_info,
  84         [board_82599]           = &ixgbe_82599_info,
  85         [board_X540]            = &ixgbe_X540_info,
  86         [board_X550]            = &ixgbe_X550_info,
  87         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  88         [board_x550em_a]        = &ixgbe_x550em_a_info,
  89         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  90 };
  91
  92 /* ixgbe_pci_tbl - PCI Device ID Table
  93  *
  94  * Wildcard entries (PCI_ANY_ID) should come last
  95  * Last entry must be all 0s
  96  *
  97  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  98  *   Class, Class Mask, private data (not used) }
  99  */
 100 static const struct pci_device_id ixgbe_pci_tbl[] = {
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 146         /* required last entry */
 147         {0, }
 148 };
 149 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 150
 151 #ifdef CONFIG_IXGBE_DCA
 152 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 153                             void *p);
 154 static struct notifier_block dca_notifier = {
 155         .notifier_call = ixgbe_notify_dca,
 156         .next          = NULL,
 157         .priority      = 0
 158 };
 159 #endif
 160
 161 #ifdef CONFIG_PCI_IOV
 162 static unsigned int max_vfs;
 163 module_param(max_vfs, uint, 0);
 164 MODULE_PARM_DESC(max_vfs,
 165                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 166 #endif /* CONFIG_PCI_IOV */
 167
 168 static unsigned int allow_unsupported_sfp;
 169 module_param(allow_unsupported_sfp, uint, 0);
 170 MODULE_PARM_DESC(allow_unsupported_sfp,
 171                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 172
 173 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 174 static int debug = -1;
 175 module_param(debug, int, 0);
 176 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 177
 178 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 179 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 180 MODULE_LICENSE("GPL");
 181 MODULE_VERSION(DRV_VERSION);
 182
 183 static struct workqueue_struct *ixgbe_wq;
 184
 185 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 186 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 187
 188 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 189                                           u32 reg, u16 *value)
 190 {
 191         struct pci_dev *parent_dev;
 192         struct pci_bus *parent_bus;
 193
 194         parent_bus = adapter->pdev->bus->parent;
 195         if (!parent_bus)
 196                 return -1;
 197
 198         parent_dev = parent_bus->self;
 199         if (!parent_dev)
 200                 return -1;
 201
 202         if (!pci_is_pcie(parent_dev))
 203                 return -1;
 204
 205         pcie_capability_read_word(parent_dev, reg, value);
 206         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 207             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 208                 return -1;
 209         return 0;
 210 }
 211
 212 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 213 {
 214         struct ixgbe_hw *hw = &adapter->hw;
 215         u16 link_status = 0;
 216         int err;
 217
 218         hw->bus.type = ixgbe_bus_type_pci_express;
 219
 220         /* Get the negotiated link width and speed from PCI config space of the
 221          * parent, as this device is behind a switch
 222          */
 223         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 224
 225         /* assume caller will handle error case */
 226         if (err)
 227                 return err;
 228
 229         hw->bus.width = ixgbe_convert_bus_width(link_status);
 230         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 231
 232         return 0;
 233 }
 234
 235 /**
 236  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 237  * @hw: hw specific details
 238  *
 239  * This function is used by probe to determine whether a device's PCI-Express
 240  * bandwidth details should be gathered from the parent bus instead of from the
 241  * device. Used to ensure that various locations all have the correct device ID
 242  * checks.
 243  */
 244 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 245 {
 246         switch (hw->device_id) {
 247         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 248         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 249                 return true;
 250         default:
 251                 return false;
 252         }
 253 }
 254
 255 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 256                                      int expected_gts)
 257 {
 258         struct ixgbe_hw *hw = &adapter->hw;
 259         int max_gts = 0;
 260         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 261         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 262         struct pci_dev *pdev;
 263
 264         /* Some devices are not connected over PCIe and thus do not negotiate
 265          * speed. These devices do not have valid bus info, and thus any report
 266          * we generate may not be correct.
 267          */
 268         if (hw->bus.type == ixgbe_bus_type_internal)
 269                 return;
 270
 271         /* determine whether to use the parent device */
 272         if (ixgbe_pcie_from_parent(&adapter->hw))
 273                 pdev = adapter->pdev->bus->parent->self;
 274         else
 275                 pdev = adapter->pdev;
 276
 277         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 278             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 279                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 280                 return;
 281         }
 282
 283         switch (speed) {
 284         case PCIE_SPEED_2_5GT:
 285                 /* 8b/10b encoding reduces max throughput by 20% */
 286                 max_gts = 2 * width;
 287                 break;
 288         case PCIE_SPEED_5_0GT:
 289                 /* 8b/10b encoding reduces max throughput by 20% */
 290                 max_gts = 4 * width;
 291                 break;
 292         case PCIE_SPEED_8_0GT:
 293                 /* 128b/130b encoding reduces throughput by less than 2% */
 294                 max_gts = 8 * width;
 295                 break;
 296         default:
 297                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 298                 return;
 299         }
 300
 301         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 302                    max_gts);
 303         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 304                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 305                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 306                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 307                     "Unknown"),
 308                    width,
 309                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 310                     speed == PCIE_SPEED_5_0GT ? "20%" :
 311                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 312                     "Unknown"));
 313
 314         if (max_gts < expected_gts) {
 315                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 316                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 317                         expected_gts);
 318                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 319         }
 320 }
 321
 322 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 323 {
 324         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 325             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 326             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 327                 queue_work(ixgbe_wq, &adapter->service_task);
 328 }
 329
 330 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 331 {
 332         struct ixgbe_adapter *adapter = hw->back;
 333
 334         if (!hw->hw_addr)
 335                 return;
 336         hw->hw_addr = NULL;
 337         e_dev_err("Adapter removed\n");
 338         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 339                 ixgbe_service_event_schedule(adapter);
 340 }
 341
 342 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 343 {
 344         u32 value;
 345
 346         /* The following check not only optimizes a bit by not
 347          * performing a read on the status register when the
 348          * register just read was a status register read that
 349          * returned IXGBE_FAILED_READ_REG. It also blocks any
 350          * potential recursion.
 351          */
 352         if (reg == IXGBE_STATUS) {
 353                 ixgbe_remove_adapter(hw);
 354                 return;
 355         }
 356         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 357         if (value == IXGBE_FAILED_READ_REG)
 358                 ixgbe_remove_adapter(hw);
 359 }
 360
 361 /**
 362  * ixgbe_read_reg - Read from device register
 363  * @hw: hw specific details
 364  * @reg: offset of register to read
 365  *
 366  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 367  *
 368  * This function is used to read device registers. It checks for device
 369  * removal by confirming any read that returns all ones by checking the
 370  * status register value for all ones. This function avoids reading from
 371  * the hardware if a removal was previously detected in which case it
 372  * returns IXGBE_FAILED_READ_REG (all ones).
 373  */
 374 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 375 {
 376         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 377         u32 value;
 378
 379         if (ixgbe_removed(reg_addr))
 380                 return IXGBE_FAILED_READ_REG;
 381         if (unlikely(hw->phy.nw_mng_if_sel &
 382                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 383                 struct ixgbe_adapter *adapter;
 384                 int i;
 385
 386                 for (i = 0; i < 200; ++i) {
 387                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 388                         if (likely(!value))
 389                                 goto writes_completed;
 390                         if (value == IXGBE_FAILED_READ_REG) {
 391                                 ixgbe_remove_adapter(hw);
 392                                 return IXGBE_FAILED_READ_REG;
 393                         }
 394                         udelay(5);
 395                 }
 396
 397                 adapter = hw->back;
 398                 e_warn(hw, "register writes incomplete %08x\n", value);
 399         }
 400
 401 writes_completed:
 402         value = readl(reg_addr + reg);
 403         if (unlikely(value == IXGBE_FAILED_READ_REG))
 404                 ixgbe_check_remove(hw, reg);
 405         return value;
 406 }
 407
 408 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 409 {
 410         u16 value;
 411
 412         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 413         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 414                 ixgbe_remove_adapter(hw);
 415                 return true;
 416         }
 417         return false;
 418 }
 419
 420 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 421 {
 422         struct ixgbe_adapter *adapter = hw->back;
 423         u16 value;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return IXGBE_FAILED_READ_CFG_WORD;
 427         pci_read_config_word(adapter->pdev, reg, &value);
 428         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 429             ixgbe_check_cfg_remove(hw, adapter->pdev))
 430                 return IXGBE_FAILED_READ_CFG_WORD;
 431         return value;
 432 }
 433
 434 #ifdef CONFIG_PCI_IOV
 435 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 436 {
 437         struct ixgbe_adapter *adapter = hw->back;
 438         u32 value;
 439
 440         if (ixgbe_removed(hw->hw_addr))
 441                 return IXGBE_FAILED_READ_CFG_DWORD;
 442         pci_read_config_dword(adapter->pdev, reg, &value);
 443         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 444             ixgbe_check_cfg_remove(hw, adapter->pdev))
 445                 return IXGBE_FAILED_READ_CFG_DWORD;
 446         return value;
 447 }
 448 #endif /* CONFIG_PCI_IOV */
 449
 450 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 451 {
 452         struct ixgbe_adapter *adapter = hw->back;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return;
 456         pci_write_config_word(adapter->pdev, reg, value);
 457 }
 458
 459 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 460 {
 461         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 462
 463         /* flush memory to make sure state is correct before next watchdog */
 464         smp_mb__before_atomic();
 465         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 466 }
 467
 468 struct ixgbe_reg_info {
 469         u32 ofs;
 470         char *name;
 471 };
 472
 473 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 474
 475         /* General Registers */
 476         {IXGBE_CTRL, "CTRL"},
 477         {IXGBE_STATUS, "STATUS"},
 478         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 479
 480         /* Interrupt Registers */
 481         {IXGBE_EICR, "EICR"},
 482
 483         /* RX Registers */
 484         {IXGBE_SRRCTL(0), "SRRCTL"},
 485         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 486         {IXGBE_RDLEN(0), "RDLEN"},
 487         {IXGBE_RDH(0), "RDH"},
 488         {IXGBE_RDT(0), "RDT"},
 489         {IXGBE_RXDCTL(0), "RXDCTL"},
 490         {IXGBE_RDBAL(0), "RDBAL"},
 491         {IXGBE_RDBAH(0), "RDBAH"},
 492
 493         /* TX Registers */
 494         {IXGBE_TDBAL(0), "TDBAL"},
 495         {IXGBE_TDBAH(0), "TDBAH"},
 496         {IXGBE_TDLEN(0), "TDLEN"},
 497         {IXGBE_TDH(0), "TDH"},
 498         {IXGBE_TDT(0), "TDT"},
 499         {IXGBE_TXDCTL(0), "TXDCTL"},
 500
 501         /* List Terminator */
 502         { .name = NULL }
 503 };
 504
 505
 506 /*
 507  * ixgbe_regdump - register printout routine
 508  */
 509 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 510 {
 511         int i = 0, j = 0;
 512         char rname[16];
 513         u32 regs[64];
 514
 515         switch (reginfo->ofs) {
 516         case IXGBE_SRRCTL(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 519                 break;
 520         case IXGBE_DCA_RXCTRL(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 523                 break;
 524         case IXGBE_RDLEN(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 527                 break;
 528         case IXGBE_RDH(0):
 529                 for (i = 0; i < 64; i++)
 530                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 531                 break;
 532         case IXGBE_RDT(0):
 533                 for (i = 0; i < 64; i++)
 534                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 535                 break;
 536         case IXGBE_RXDCTL(0):
 537                 for (i = 0; i < 64; i++)
 538                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 539                 break;
 540         case IXGBE_RDBAL(0):
 541                 for (i = 0; i < 64; i++)
 542                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 543                 break;
 544         case IXGBE_RDBAH(0):
 545                 for (i = 0; i < 64; i++)
 546                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 547                 break;
 548         case IXGBE_TDBAL(0):
 549                 for (i = 0; i < 64; i++)
 550                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 551                 break;
 552         case IXGBE_TDBAH(0):
 553                 for (i = 0; i < 64; i++)
 554                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 555                 break;
 556         case IXGBE_TDLEN(0):
 557                 for (i = 0; i < 64; i++)
 558                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 559                 break;
 560         case IXGBE_TDH(0):
 561                 for (i = 0; i < 64; i++)
 562                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 563                 break;
 564         case IXGBE_TDT(0):
 565                 for (i = 0; i < 64; i++)
 566                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 567                 break;
 568         case IXGBE_TXDCTL(0):
 569                 for (i = 0; i < 64; i++)
 570                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 571                 break;
 572         default:
 573                 pr_info("%-15s %08x\n", reginfo->name,
 574                         IXGBE_READ_REG(hw, reginfo->ofs));
 575                 return;
 576         }
 577
 578         for (i = 0; i < 8; i++) {
 579                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 580                 pr_err("%-15s", rname);
 581                 for (j = 0; j < 8; j++)
 582                         pr_cont(" %08x", regs[i*8+j]);
 583                 pr_cont("\n");
 584         }
 585
 586 }
 587
 588 /*
 589  * ixgbe_dump - Print registers, tx-rings and rx-rings
 590  */
 591 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 592 {
 593         struct net_device *netdev = adapter->netdev;
 594         struct ixgbe_hw *hw = &adapter->hw;
 595         struct ixgbe_reg_info *reginfo;
 596         int n = 0;
 597         struct ixgbe_ring *tx_ring;
 598         struct ixgbe_tx_buffer *tx_buffer;
 599         union ixgbe_adv_tx_desc *tx_desc;
 600         struct my_u0 { u64 a; u64 b; } *u0;
 601         struct ixgbe_ring *rx_ring;
 602         union ixgbe_adv_rx_desc *rx_desc;
 603         struct ixgbe_rx_buffer *rx_buffer_info;
 604         u32 staterr;
 605         int i = 0;
 606
 607         if (!netif_msg_hw(adapter))
 608                 return;
 609
 610         /* Print netdevice Info */
 611         if (netdev) {
 612                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 613                 pr_info("Device Name     state            "
 614                         "trans_start\n");
 615                 pr_info("%-15s %016lX %016lX\n",
 616                         netdev->name,
 617                         netdev->state,
 618                         dev_trans_start(netdev));
 619         }
 620
 621         /* Print Registers */
 622         dev_info(&adapter->pdev->dev, "Register Dump\n");
 623         pr_info(" Register Name   Value\n");
 624         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 625              reginfo->name; reginfo++) {
 626                 ixgbe_regdump(hw, reginfo);
 627         }
 628
 629         /* Print TX Ring Summary */
 630         if (!netdev || !netif_running(netdev))
 631                 return;
 632
 633         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 634         pr_info(" %s     %s              %s        %s\n",
 635                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 636                 "leng", "ntw", "timestamp");
 637         for (n = 0; n < adapter->num_tx_queues; n++) {
 638                 tx_ring = adapter->tx_ring[n];
 639                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 640                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 641                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 642                            (u64)dma_unmap_addr(tx_buffer, dma),
 643                            dma_unmap_len(tx_buffer, len),
 644                            tx_buffer->next_to_watch,
 645                            (u64)tx_buffer->time_stamp);
 646         }
 647
 648         /* Print TX Rings */
 649         if (!netif_msg_tx_done(adapter))
 650                 goto rx_ring_summary;
 651
 652         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 653
 654         /* Transmit Descriptor Formats
 655          *
 656          * 82598 Advanced Transmit Descriptor
 657          *   +--------------------------------------------------------------+
 658          * 0 |         Buffer Address [63:0]                                |
 659          *   +--------------------------------------------------------------+
 660          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 661          *   +--------------------------------------------------------------+
 662          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 663          *
 664          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 665          *   +--------------------------------------------------------------+
 666          * 0 |                          RSV [63:0]                          |
 667          *   +--------------------------------------------------------------+
 668          * 8 |            RSV           |  STA  |          NXTSEQ           |
 669          *   +--------------------------------------------------------------+
 670          *   63                       36 35   32 31                         0
 671          *
 672          * 82599+ Advanced Transmit Descriptor
 673          *   +--------------------------------------------------------------+
 674          * 0 |         Buffer Address [63:0]                                |
 675          *   +--------------------------------------------------------------+
 676          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 677          *   +--------------------------------------------------------------+
 678          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 679          *
 680          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 681          *   +--------------------------------------------------------------+
 682          * 0 |                          RSV [63:0]                          |
 683          *   +--------------------------------------------------------------+
 684          * 8 |            RSV           |  STA  |           RSV             |
 685          *   +--------------------------------------------------------------+
 686          *   63                       36 35   32 31                         0
 687          */
 688
 689         for (n = 0; n < adapter->num_tx_queues; n++) {
 690                 tx_ring = adapter->tx_ring[n];
 691                 pr_info("------------------------------------\n");
 692                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 693                 pr_info("------------------------------------\n");
 694                 pr_info("%s%s    %s              %s        %s          %s\n",
 695                         "T [desc]     [address 63:0  ] ",
 696                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 697                         "leng", "ntw", "timestamp", "bi->skb");
 698
 699                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 700                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 701                         tx_buffer = &tx_ring->tx_buffer_info[i];
 702                         u0 = (struct my_u0 *)tx_desc;
 703                         if (dma_unmap_len(tx_buffer, len) > 0) {
 704                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 705                                         i,
 706                                         le64_to_cpu(u0->a),
 707                                         le64_to_cpu(u0->b),
 708                                         (u64)dma_unmap_addr(tx_buffer, dma),
 709                                         dma_unmap_len(tx_buffer, len),
 710                                         tx_buffer->next_to_watch,
 711                                         (u64)tx_buffer->time_stamp,
 712                                         tx_buffer->skb);
 713                                 if (i == tx_ring->next_to_use &&
 714                                         i == tx_ring->next_to_clean)
 715                                         pr_cont(" NTC/U\n");
 716                                 else if (i == tx_ring->next_to_use)
 717                                         pr_cont(" NTU\n");
 718                                 else if (i == tx_ring->next_to_clean)
 719                                         pr_cont(" NTC\n");
 720                                 else
 721                                         pr_cont("\n");
 722
 723                                 if (netif_msg_pktdata(adapter) &&
 724                                     tx_buffer->skb)
 725                                         print_hex_dump(KERN_INFO, "",
 726                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 727                                                 tx_buffer->skb->data,
 728                                                 dma_unmap_len(tx_buffer, len),
 729                                                 true);
 730                         }
 731                 }
 732         }
 733
 734         /* Print RX Rings Summary */
 735 rx_ring_summary:
 736         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 737         pr_info("Queue [NTU] [NTC]\n");
 738         for (n = 0; n < adapter->num_rx_queues; n++) {
 739                 rx_ring = adapter->rx_ring[n];
 740                 pr_info("%5d %5X %5X\n",
 741                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 742         }
 743
 744         /* Print RX Rings */
 745         if (!netif_msg_rx_status(adapter))
 746                 return;
 747
 748         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 749
 750         /* Receive Descriptor Formats
 751          *
 752          * 82598 Advanced Receive Descriptor (Read) Format
 753          *    63                                           1        0
 754          *    +-----------------------------------------------------+
 755          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 756          *    +----------------------------------------------+------+
 757          *  8 |       Header Buffer Address [63:1]           |  DD  |
 758          *    +-----------------------------------------------------+
 759          *
 760          *
 761          * 82598 Advanced Receive Descriptor (Write-Back) Format
 762          *
 763          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 764          *   +------------------------------------------------------+
 765          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 766          *   | Packet   | IP     |   |          |     | Type | Type |
 767          *   | Checksum | Ident  |   |          |     |      |      |
 768          *   +------------------------------------------------------+
 769          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 770          *   +------------------------------------------------------+
 771          *   63       48 47    32 31            20 19               0
 772          *
 773          * 82599+ Advanced Receive Descriptor (Read) Format
 774          *    63                                           1        0
 775          *    +-----------------------------------------------------+
 776          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 777          *    +----------------------------------------------+------+
 778          *  8 |       Header Buffer Address [63:1]           |  DD  |
 779          *    +-----------------------------------------------------+
 780          *
 781          *
 782          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 783          *
 784          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 785          *   +------------------------------------------------------+
 786          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 787          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 788          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 789          *   +------------------------------------------------------+
 790          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 791          *   +------------------------------------------------------+
 792          *   63       48 47    32 31          20 19                 0
 793          */
 794
 795         for (n = 0; n < adapter->num_rx_queues; n++) {
 796                 rx_ring = adapter->rx_ring[n];
 797                 pr_info("------------------------------------\n");
 798                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 799                 pr_info("------------------------------------\n");
 800                 pr_info("%s%s%s",
 801                         "R  [desc]      [ PktBuf     A0] ",
 802                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 803                         "<-- Adv Rx Read format\n");
 804                 pr_info("%s%s%s",
 805                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 806                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 807                         "<-- Adv Rx Write-Back format\n");
 808
 809                 for (i = 0; i < rx_ring->count; i++) {
 810                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 811                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 812                         u0 = (struct my_u0 *)rx_desc;
 813                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 814                         if (staterr & IXGBE_RXD_STAT_DD) {
 815                                 /* Descriptor Done */
 816                                 pr_info("RWB[0x%03X]     %016llX "
 817                                         "%016llX ---------------- %p", i,
 818                                         le64_to_cpu(u0->a),
 819                                         le64_to_cpu(u0->b),
 820                                         rx_buffer_info->skb);
 821                         } else {
 822                                 pr_info("R  [0x%03X]     %016llX "
 823                                         "%016llX %016llX %p", i,
 824                                         le64_to_cpu(u0->a),
 825                                         le64_to_cpu(u0->b),
 826                                         (u64)rx_buffer_info->dma,
 827                                         rx_buffer_info->skb);
 828
 829                                 if (netif_msg_pktdata(adapter) &&
 830                                     rx_buffer_info->dma) {
 831                                         print_hex_dump(KERN_INFO, "",
 832                                            DUMP_PREFIX_ADDRESS, 16, 1,
 833                                            page_address(rx_buffer_info->page) +
 834                                                     rx_buffer_info->page_offset,
 835                                            ixgbe_rx_bufsz(rx_ring), true);
 836                                 }
 837                         }
 838
 839                         if (i == rx_ring->next_to_use)
 840                                 pr_cont(" NTU\n");
 841                         else if (i == rx_ring->next_to_clean)
 842                                 pr_cont(" NTC\n");
 843                         else
 844                                 pr_cont("\n");
 845
 846                 }
 847         }
 848 }
 849
 850 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 851 {
 852         u32 ctrl_ext;
 853
 854         /* Let firmware take over control of h/w */
 855         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 856         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 857                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 858 }
 859
 860 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 861 {
 862         u32 ctrl_ext;
 863
 864         /* Let firmware know the driver has taken over */
 865         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 866         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 867                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 868 }
 869
 870 /**
 871  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 872  * @adapter: pointer to adapter struct
 873  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 874  * @queue: queue to map the corresponding interrupt to
 875  * @msix_vector: the vector to map to the corresponding queue
 876  *
 877  */
 878 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 879                            u8 queue, u8 msix_vector)
 880 {
 881         u32 ivar, index;
 882         struct ixgbe_hw *hw = &adapter->hw;
 883         switch (hw->mac.type) {
 884         case ixgbe_mac_82598EB:
 885                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 886                 if (direction == -1)
 887                         direction = 0;
 888                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 889                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 890                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 891                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 892                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 893                 break;
 894         case ixgbe_mac_82599EB:
 895         case ixgbe_mac_X540:
 896         case ixgbe_mac_X550:
 897         case ixgbe_mac_X550EM_x:
 898         case ixgbe_mac_x550em_a:
 899                 if (direction == -1) {
 900                         /* other causes */
 901                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 902                         index = ((queue & 1) * 8);
 903                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 904                         ivar &= ~(0xFF << index);
 905                         ivar |= (msix_vector << index);
 906                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 907                         break;
 908                 } else {
 909                         /* tx or rx causes */
 910                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 911                         index = ((16 * (queue & 1)) + (8 * direction));
 912                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 913                         ivar &= ~(0xFF << index);
 914                         ivar |= (msix_vector << index);
 915                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 916                         break;
 917                 }
 918         default:
 919                 break;
 920         }
 921 }
 922
 923 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 924                                           u64 qmask)
 925 {
 926         u32 mask;
 927
 928         switch (adapter->hw.mac.type) {
 929         case ixgbe_mac_82598EB:
 930                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 931                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 932                 break;
 933         case ixgbe_mac_82599EB:
 934         case ixgbe_mac_X540:
 935         case ixgbe_mac_X550:
 936         case ixgbe_mac_X550EM_x:
 937         case ixgbe_mac_x550em_a:
 938                 mask = (qmask & 0xFFFFFFFF);
 939                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 940                 mask = (qmask >> 32);
 941                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 942                 break;
 943         default:
 944                 break;
 945         }
 946 }
 947
 948 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 949                                       struct ixgbe_tx_buffer *tx_buffer)
 950 {
 951         if (tx_buffer->skb) {
 952                 dev_kfree_skb_any(tx_buffer->skb);
 953                 if (dma_unmap_len(tx_buffer, len))
 954                         dma_unmap_single(ring->dev,
 955                                          dma_unmap_addr(tx_buffer, dma),
 956                                          dma_unmap_len(tx_buffer, len),
 957                                          DMA_TO_DEVICE);
 958         } else if (dma_unmap_len(tx_buffer, len)) {
 959                 dma_unmap_page(ring->dev,
 960                                dma_unmap_addr(tx_buffer, dma),
 961                                dma_unmap_len(tx_buffer, len),
 962                                DMA_TO_DEVICE);
 963         }
 964         tx_buffer->next_to_watch = NULL;
 965         tx_buffer->skb = NULL;
 966         dma_unmap_len_set(tx_buffer, len, 0);
 967         /* tx_buffer must be completely set up in the transmit path */
 968 }
 969
 970 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 971 {
 972         struct ixgbe_hw *hw = &adapter->hw;
 973         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 974         int i;
 975         u32 data;
 976
 977         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 978             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 979                 return;
 980
 981         switch (hw->mac.type) {
 982         case ixgbe_mac_82598EB:
 983                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 984                 break;
 985         default:
 986                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 987         }
 988         hwstats->lxoffrxc += data;
 989
 990         /* refill credits (no tx hang) if we received xoff */
 991         if (!data)
 992                 return;
 993
 994         for (i = 0; i < adapter->num_tx_queues; i++)
 995                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 996                           &adapter->tx_ring[i]->state);
 997 }
 998
 999 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1000 {
1001         struct ixgbe_hw *hw = &adapter->hw;
1002         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1003         u32 xoff[8] = {0};
1004         u8 tc;
1005         int i;
1006         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1007
1008         if (adapter->ixgbe_ieee_pfc)
1009                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1010
1011         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1012                 ixgbe_update_xoff_rx_lfc(adapter);
1013                 return;
1014         }
1015
1016         /* update stats for each tc, only valid with PFC enabled */
1017         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1018                 u32 pxoffrxc;
1019
1020                 switch (hw->mac.type) {
1021                 case ixgbe_mac_82598EB:
1022                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1023                         break;
1024                 default:
1025                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1026                 }
1027                 hwstats->pxoffrxc[i] += pxoffrxc;
1028                 /* Get the TC for given UP */
1029                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1030                 xoff[tc] += pxoffrxc;
1031         }
1032
1033         /* disarm tx queues that have received xoff frames */
1034         for (i = 0; i < adapter->num_tx_queues; i++) {
1035                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1036
1037                 tc = tx_ring->dcb_tc;
1038                 if (xoff[tc])
1039                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1040         }
1041 }
1042
1043 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1044 {
1045         return ring->stats.packets;
1046 }
1047
1048 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1049 {
1050         struct ixgbe_adapter *adapter;
1051         struct ixgbe_hw *hw;
1052         u32 head, tail;
1053
1054         if (ring->l2_accel_priv)
1055                 adapter = ring->l2_accel_priv->real_adapter;
1056         else
1057                 adapter = netdev_priv(ring->netdev);
1058
1059         hw = &adapter->hw;
1060         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1061         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1062
1063         if (head != tail)
1064                 return (head < tail) ?
1065                         tail - head : (tail + ring->count - head);
1066
1067         return 0;
1068 }
1069
1070 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1071 {
1072         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1073         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1074         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1075
1076         clear_check_for_tx_hang(tx_ring);
1077
1078         /*
1079          * Check for a hung queue, but be thorough. This verifies
1080          * that a transmit has been completed since the previous
1081          * check AND there is at least one packet pending. The
1082          * ARMED bit is set to indicate a potential hang. The
1083          * bit is cleared if a pause frame is received to remove
1084          * false hang detection due to PFC or 802.3x frames. By
1085          * requiring this to fail twice we avoid races with
1086          * pfc clearing the ARMED bit and conditions where we
1087          * run the check_tx_hang logic with a transmit completion
1088          * pending but without time to complete it yet.
1089          */
1090         if (tx_done_old == tx_done && tx_pending)
1091                 /* make sure it is true for two checks in a row */
1092                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1093                                         &tx_ring->state);
1094         /* update completed stats and continue */
1095         tx_ring->tx_stats.tx_done_old = tx_done;
1096         /* reset the countdown */
1097         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1098
1099         return false;
1100 }
1101
1102 /**
1103  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1104  * @adapter: driver private struct
1105  **/
1106 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1107 {
1108
1109         /* Do the reset outside of interrupt context */
1110         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1111                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1112                 e_warn(drv, "initiating reset due to tx timeout\n");
1113                 ixgbe_service_event_schedule(adapter);
1114         }
1115 }
1116
1117 /**
1118  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1119  **/
1120 static int ixgbe_tx_maxrate(struct net_device *netdev,
1121                             int queue_index, u32 maxrate)
1122 {
1123         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1124         struct ixgbe_hw *hw = &adapter->hw;
1125         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1126
1127         if (!maxrate)
1128                 return 0;
1129
1130         /* Calculate the rate factor values to set */
1131         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1132         bcnrc_val /= maxrate;
1133
1134         /* clear everything but the rate factor */
1135         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1136         IXGBE_RTTBCNRC_RF_DEC_MASK;
1137
1138         /* enable the rate scheduler */
1139         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1140
1141         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1142         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1143
1144         return 0;
1145 }
1146
1147 /**
1148  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1149  * @q_vector: structure containing interrupt and ring information
1150  * @tx_ring: tx ring to clean
1151  * @napi_budget: Used to determine if we are in netpoll
1152  **/
1153 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1154                                struct ixgbe_ring *tx_ring, int napi_budget)
1155 {
1156         struct ixgbe_adapter *adapter = q_vector->adapter;
1157         struct ixgbe_tx_buffer *tx_buffer;
1158         union ixgbe_adv_tx_desc *tx_desc;
1159         unsigned int total_bytes = 0, total_packets = 0;
1160         unsigned int budget = q_vector->tx.work_limit;
1161         unsigned int i = tx_ring->next_to_clean;
1162
1163         if (test_bit(__IXGBE_DOWN, &adapter->state))
1164                 return true;
1165
1166         tx_buffer = &tx_ring->tx_buffer_info[i];
1167         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1168         i -= tx_ring->count;
1169
1170         do {
1171                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1172
1173                 /* if next_to_watch is not set then there is no work pending */
1174                 if (!eop_desc)
1175                         break;
1176
1177                 /* prevent any other reads prior to eop_desc */
1178                 read_barrier_depends();
1179
1180                 /* if DD is not set pending work has not been completed */
1181                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1182                         break;
1183
1184                 /* clear next_to_watch to prevent false hangs */
1185                 tx_buffer->next_to_watch = NULL;
1186
1187                 /* update the statistics for this packet */
1188                 total_bytes += tx_buffer->bytecount;
1189                 total_packets += tx_buffer->gso_segs;
1190
1191                 /* free the skb */
1192                 napi_consume_skb(tx_buffer->skb, napi_budget);
1193
1194                 /* unmap skb header data */
1195                 dma_unmap_single(tx_ring->dev,
1196                                  dma_unmap_addr(tx_buffer, dma),
1197                                  dma_unmap_len(tx_buffer, len),
1198                                  DMA_TO_DEVICE);
1199
1200                 /* clear tx_buffer data */
1201                 tx_buffer->skb = NULL;
1202                 dma_unmap_len_set(tx_buffer, len, 0);
1203
1204                 /* unmap remaining buffers */
1205                 while (tx_desc != eop_desc) {
1206                         tx_buffer++;
1207                         tx_desc++;
1208                         i++;
1209                         if (unlikely(!i)) {
1210                                 i -= tx_ring->count;
1211                                 tx_buffer = tx_ring->tx_buffer_info;
1212                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1213                         }
1214
1215                         /* unmap any remaining paged data */
1216                         if (dma_unmap_len(tx_buffer, len)) {
1217                                 dma_unmap_page(tx_ring->dev,
1218                                                dma_unmap_addr(tx_buffer, dma),
1219                                                dma_unmap_len(tx_buffer, len),
1220                                                DMA_TO_DEVICE);
1221                                 dma_unmap_len_set(tx_buffer, len, 0);
1222                         }
1223                 }
1224
1225                 /* move us one more past the eop_desc for start of next pkt */
1226                 tx_buffer++;
1227                 tx_desc++;
1228                 i++;
1229                 if (unlikely(!i)) {
1230                         i -= tx_ring->count;
1231                         tx_buffer = tx_ring->tx_buffer_info;
1232                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1233                 }
1234
1235                 /* issue prefetch for next Tx descriptor */
1236                 prefetch(tx_desc);
1237
1238                 /* update budget accounting */
1239                 budget--;
1240         } while (likely(budget));
1241
1242         i += tx_ring->count;
1243         tx_ring->next_to_clean = i;
1244         u64_stats_update_begin(&tx_ring->syncp);
1245         tx_ring->stats.bytes += total_bytes;
1246         tx_ring->stats.packets += total_packets;
1247         u64_stats_update_end(&tx_ring->syncp);
1248         q_vector->tx.total_bytes += total_bytes;
1249         q_vector->tx.total_packets += total_packets;
1250
1251         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1252                 /* schedule immediate reset if we believe we hung */
1253                 struct ixgbe_hw *hw = &adapter->hw;
1254                 e_err(drv, "Detected Tx Unit Hang\n"
1255                         "  Tx Queue             <%d>\n"
1256                         "  TDH, TDT             <%x>, <%x>\n"
1257                         "  next_to_use          <%x>\n"
1258                         "  next_to_clean        <%x>\n"
1259                         "tx_buffer_info[next_to_clean]\n"
1260                         "  time_stamp           <%lx>\n"
1261                         "  jiffies              <%lx>\n",
1262                         tx_ring->queue_index,
1263                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1264                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1265                         tx_ring->next_to_use, i,
1266                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1267
1268                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1269
1270                 e_info(probe,
1271                        "tx hang %d detected on queue %d, resetting adapter\n",
1272                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1273
1274                 /* schedule immediate reset if we believe we hung */
1275                 ixgbe_tx_timeout_reset(adapter);
1276
1277                 /* the adapter is about to reset, no point in enabling stuff */
1278                 return true;
1279         }
1280
1281         netdev_tx_completed_queue(txring_txq(tx_ring),
1282                                   total_packets, total_bytes);
1283
1284 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1285         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1286                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1287                 /* Make sure that anybody stopping the queue after this
1288                  * sees the new next_to_clean.
1289                  */
1290                 smp_mb();
1291                 if (__netif_subqueue_stopped(tx_ring->netdev,
1292                                              tx_ring->queue_index)
1293                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1294                         netif_wake_subqueue(tx_ring->netdev,
1295                                             tx_ring->queue_index);
1296                         ++tx_ring->tx_stats.restart_queue;
1297                 }
1298         }
1299
1300         return !!budget;
1301 }
1302
1303 #ifdef CONFIG_IXGBE_DCA
1304 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1305                                 struct ixgbe_ring *tx_ring,
1306                                 int cpu)
1307 {
1308         struct ixgbe_hw *hw = &adapter->hw;
1309         u32 txctrl = 0;
1310         u16 reg_offset;
1311
1312         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1313                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1314
1315         switch (hw->mac.type) {
1316         case ixgbe_mac_82598EB:
1317                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1318                 break;
1319         case ixgbe_mac_82599EB:
1320         case ixgbe_mac_X540:
1321                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1322                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1323                 break;
1324         default:
1325                 /* for unknown hardware do not write register */
1326                 return;
1327         }
1328
1329         /*
1330          * We can enable relaxed ordering for reads, but not writes when
1331          * DCA is enabled.  This is due to a known issue in some chipsets
1332          * which will cause the DCA tag to be cleared.
1333          */
1334         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1335                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1336                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1337
1338         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1339 }
1340
1341 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1342                                 struct ixgbe_ring *rx_ring,
1343                                 int cpu)
1344 {
1345         struct ixgbe_hw *hw = &adapter->hw;
1346         u32 rxctrl = 0;
1347         u8 reg_idx = rx_ring->reg_idx;
1348
1349         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1350                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1351
1352         switch (hw->mac.type) {
1353         case ixgbe_mac_82599EB:
1354         case ixgbe_mac_X540:
1355                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1356                 break;
1357         default:
1358                 break;
1359         }
1360
1361         /*
1362          * We can enable relaxed ordering for reads, but not writes when
1363          * DCA is enabled.  This is due to a known issue in some chipsets
1364          * which will cause the DCA tag to be cleared.
1365          */
1366         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1367                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1368                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1369
1370         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1371 }
1372
1373 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1374 {
1375         struct ixgbe_adapter *adapter = q_vector->adapter;
1376         struct ixgbe_ring *ring;
1377         int cpu = get_cpu();
1378
1379         if (q_vector->cpu == cpu)
1380                 goto out_no_update;
1381
1382         ixgbe_for_each_ring(ring, q_vector->tx)
1383                 ixgbe_update_tx_dca(adapter, ring, cpu);
1384
1385         ixgbe_for_each_ring(ring, q_vector->rx)
1386                 ixgbe_update_rx_dca(adapter, ring, cpu);
1387
1388         q_vector->cpu = cpu;
1389 out_no_update:
1390         put_cpu();
1391 }
1392
1393 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1394 {
1395         int i;
1396
1397         /* always use CB2 mode, difference is masked in the CB driver */
1398         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1399                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1400                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1401         else
1402                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1403                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1404
1405         for (i = 0; i < adapter->num_q_vectors; i++) {
1406                 adapter->q_vector[i]->cpu = -1;
1407                 ixgbe_update_dca(adapter->q_vector[i]);
1408         }
1409 }
1410
1411 static int __ixgbe_notify_dca(struct device *dev, void *data)
1412 {
1413         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1414         unsigned long event = *(unsigned long *)data;
1415
1416         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1417                 return 0;
1418
1419         switch (event) {
1420         case DCA_PROVIDER_ADD:
1421                 /* if we're already enabled, don't do it again */
1422                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1423                         break;
1424                 if (dca_add_requester(dev) == 0) {
1425                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1426                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1427                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1428                         break;
1429                 }
1430                 /* Fall Through since DCA is disabled. */
1431         case DCA_PROVIDER_REMOVE:
1432                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1433                         dca_remove_requester(dev);
1434                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1435                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1436                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1437                 }
1438                 break;
1439         }
1440
1441         return 0;
1442 }
1443
1444 #endif /* CONFIG_IXGBE_DCA */
1445
1446 #define IXGBE_RSS_L4_TYPES_MASK \
1447         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1448          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1449          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1450          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1451
1452 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1453                                  union ixgbe_adv_rx_desc *rx_desc,
1454                                  struct sk_buff *skb)
1455 {
1456         u16 rss_type;
1457
1458         if (!(ring->netdev->features & NETIF_F_RXHASH))
1459                 return;
1460
1461         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1462                    IXGBE_RXDADV_RSSTYPE_MASK;
1463
1464         if (!rss_type)
1465                 return;
1466
1467         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1468                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1469                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1470 }
1471
1472 #ifdef IXGBE_FCOE
1473 /**
1474  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1475  * @ring: structure containing ring specific data
1476  * @rx_desc: advanced rx descriptor
1477  *
1478  * Returns : true if it is FCoE pkt
1479  */
1480 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1481                                     union ixgbe_adv_rx_desc *rx_desc)
1482 {
1483         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1484
1485         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1486                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1487                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1488                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1489 }
1490
1491 #endif /* IXGBE_FCOE */
1492 /**
1493  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1494  * @ring: structure containing ring specific data
1495  * @rx_desc: current Rx descriptor being processed
1496  * @skb: skb currently being received and modified
1497  **/
1498 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1499                                      union ixgbe_adv_rx_desc *rx_desc,
1500                                      struct sk_buff *skb)
1501 {
1502         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1503         bool encap_pkt = false;
1504
1505         skb_checksum_none_assert(skb);
1506
1507         /* Rx csum disabled */
1508         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1509                 return;
1510
1511         /* check for VXLAN and Geneve packets */
1512         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1513                 encap_pkt = true;
1514                 skb->encapsulation = 1;
1515         }
1516
1517         /* if IP and error */
1518         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1519             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1520                 ring->rx_stats.csum_err++;
1521                 return;
1522         }
1523
1524         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1525                 return;
1526
1527         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1528                 /*
1529                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1530                  * checksum errors.
1531                  */
1532                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1533                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1534                         return;
1535
1536                 ring->rx_stats.csum_err++;
1537                 return;
1538         }
1539
1540         /* It must be a TCP or UDP packet with a valid checksum */
1541         skb->ip_summed = CHECKSUM_UNNECESSARY;
1542         if (encap_pkt) {
1543                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1544                         return;
1545
1546                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1547                         skb->ip_summed = CHECKSUM_NONE;
1548                         return;
1549                 }
1550                 /* If we checked the outer header let the stack know */
1551                 skb->csum_level = 1;
1552         }
1553 }
1554
1555 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1556                                     struct ixgbe_rx_buffer *bi)
1557 {
1558         struct page *page = bi->page;
1559         dma_addr_t dma;
1560
1561         /* since we are recycling buffers we should seldom need to alloc */
1562         if (likely(page))
1563                 return true;
1564
1565         /* alloc new page for storage */
1566         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1567         if (unlikely(!page)) {
1568                 rx_ring->rx_stats.alloc_rx_page_failed++;
1569                 return false;
1570         }
1571
1572         /* map page for use */
1573         dma = dma_map_page(rx_ring->dev, page, 0,
1574                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1575
1576         /*
1577          * if mapping failed free memory back to system since
1578          * there isn't much point in holding memory we can't use
1579          */
1580         if (dma_mapping_error(rx_ring->dev, dma)) {
1581                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1582
1583                 rx_ring->rx_stats.alloc_rx_page_failed++;
1584                 return false;
1585         }
1586
1587         bi->dma = dma;
1588         bi->page = page;
1589         bi->page_offset = 0;
1590
1591         return true;
1592 }
1593
1594 /**
1595  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1596  * @rx_ring: ring to place buffers on
1597  * @cleaned_count: number of buffers to replace
1598  **/
1599 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1600 {
1601         union ixgbe_adv_rx_desc *rx_desc;
1602         struct ixgbe_rx_buffer *bi;
1603         u16 i = rx_ring->next_to_use;
1604
1605         /* nothing to do */
1606         if (!cleaned_count)
1607                 return;
1608
1609         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1610         bi = &rx_ring->rx_buffer_info[i];
1611         i -= rx_ring->count;
1612
1613         do {
1614                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1615                         break;
1616
1617                 /*
1618                  * Refresh the desc even if buffer_addrs didn't change
1619                  * because each write-back erases this info.
1620                  */
1621                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1622
1623                 rx_desc++;
1624                 bi++;
1625                 i++;
1626                 if (unlikely(!i)) {
1627                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1628                         bi = rx_ring->rx_buffer_info;
1629                         i -= rx_ring->count;
1630                 }
1631
1632                 /* clear the status bits for the next_to_use descriptor */
1633                 rx_desc->wb.upper.status_error = 0;
1634
1635                 cleaned_count--;
1636         } while (cleaned_count);
1637
1638         i += rx_ring->count;
1639
1640         if (rx_ring->next_to_use != i) {
1641                 rx_ring->next_to_use = i;
1642
1643                 /* update next to alloc since we have filled the ring */
1644                 rx_ring->next_to_alloc = i;
1645
1646                 /* Force memory writes to complete before letting h/w
1647                  * know there are new descriptors to fetch.  (Only
1648                  * applicable for weak-ordered memory model archs,
1649                  * such as IA-64).
1650                  */
1651                 wmb();
1652                 writel(i, rx_ring->tail);
1653         }
1654 }
1655
1656 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1657                                    struct sk_buff *skb)
1658 {
1659         u16 hdr_len = skb_headlen(skb);
1660
1661         /* set gso_size to avoid messing up TCP MSS */
1662         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1663                                                  IXGBE_CB(skb)->append_cnt);
1664         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1665 }
1666
1667 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1668                                    struct sk_buff *skb)
1669 {
1670         /* if append_cnt is 0 then frame is not RSC */
1671         if (!IXGBE_CB(skb)->append_cnt)
1672                 return;
1673
1674         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1675         rx_ring->rx_stats.rsc_flush++;
1676
1677         ixgbe_set_rsc_gso_size(rx_ring, skb);
1678
1679         /* gso_size is computed using append_cnt so always clear it last */
1680         IXGBE_CB(skb)->append_cnt = 0;
1681 }
1682
1683 /**
1684  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1685  * @rx_ring: rx descriptor ring packet is being transacted on
1686  * @rx_desc: pointer to the EOP Rx descriptor
1687  * @skb: pointer to current skb being populated
1688  *
1689  * This function checks the ring, descriptor, and packet information in
1690  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1691  * other fields within the skb.
1692  **/
1693 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1694                                      union ixgbe_adv_rx_desc *rx_desc,
1695                                      struct sk_buff *skb)
1696 {
1697         struct net_device *dev = rx_ring->netdev;
1698         u32 flags = rx_ring->q_vector->adapter->flags;
1699
1700         ixgbe_update_rsc_stats(rx_ring, skb);
1701
1702         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1703
1704         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1705
1706         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1707                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1708
1709         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1710             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1711                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1712                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1713         }
1714
1715         skb_record_rx_queue(skb, rx_ring->queue_index);
1716
1717         skb->protocol = eth_type_trans(skb, dev);
1718 }
1719
1720 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1721                          struct sk_buff *skb)
1722 {
1723         skb_mark_napi_id(skb, &q_vector->napi);
1724         if (ixgbe_qv_busy_polling(q_vector))
1725                 netif_receive_skb(skb);
1726         else
1727                 napi_gro_receive(&q_vector->napi, skb);
1728 }
1729
1730 /**
1731  * ixgbe_is_non_eop - process handling of non-EOP buffers
1732  * @rx_ring: Rx ring being processed
1733  * @rx_desc: Rx descriptor for current buffer
1734  * @skb: Current socket buffer containing buffer in progress
1735  *
1736  * This function updates next to clean.  If the buffer is an EOP buffer
1737  * this function exits returning false, otherwise it will place the
1738  * sk_buff in the next buffer to be chained and return true indicating
1739  * that this is in fact a non-EOP buffer.
1740  **/
1741 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1742                              union ixgbe_adv_rx_desc *rx_desc,
1743                              struct sk_buff *skb)
1744 {
1745         u32 ntc = rx_ring->next_to_clean + 1;
1746
1747         /* fetch, update, and store next to clean */
1748         ntc = (ntc < rx_ring->count) ? ntc : 0;
1749         rx_ring->next_to_clean = ntc;
1750
1751         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1752
1753         /* update RSC append count if present */
1754         if (ring_is_rsc_enabled(rx_ring)) {
1755                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1756                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1757
1758                 if (unlikely(rsc_enabled)) {
1759                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1760
1761                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1762                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1763
1764                         /* update ntc based on RSC value */
1765                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1766                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1767                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1768                 }
1769         }
1770
1771         /* if we are the last buffer then there is nothing else to do */
1772         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1773                 return false;
1774
1775         /* place skb in next buffer to be received */
1776         rx_ring->rx_buffer_info[ntc].skb = skb;
1777         rx_ring->rx_stats.non_eop_descs++;
1778
1779         return true;
1780 }
1781
1782 /**
1783  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1784  * @rx_ring: rx descriptor ring packet is being transacted on
1785  * @skb: pointer to current skb being adjusted
1786  *
1787  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1788  * main difference between this version and the original function is that
1789  * this function can make several assumptions about the state of things
1790  * that allow for significant optimizations versus the standard function.
1791  * As a result we can do things like drop a frag and maintain an accurate
1792  * truesize for the skb.
1793  */
1794 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1795                             struct sk_buff *skb)
1796 {
1797         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1798         unsigned char *va;
1799         unsigned int pull_len;
1800
1801         /*
1802          * it is valid to use page_address instead of kmap since we are
1803          * working with pages allocated out of the lomem pool per
1804          * alloc_page(GFP_ATOMIC)
1805          */
1806         va = skb_frag_address(frag);
1807
1808         /*
1809          * we need the header to contain the greater of either ETH_HLEN or
1810          * 60 bytes if the skb->len is less than 60 for skb_pad.
1811          */
1812         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1813
1814         /* align pull length to size of long to optimize memcpy performance */
1815         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1816
1817         /* update all of the pointers */
1818         skb_frag_size_sub(frag, pull_len);
1819         frag->page_offset += pull_len;
1820         skb->data_len -= pull_len;
1821         skb->tail += pull_len;
1822 }
1823
1824 /**
1825  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1826  * @rx_ring: rx descriptor ring packet is being transacted on
1827  * @skb: pointer to current skb being updated
1828  *
1829  * This function provides a basic DMA sync up for the first fragment of an
1830  * skb.  The reason for doing this is that the first fragment cannot be
1831  * unmapped until we have reached the end of packet descriptor for a buffer
1832  * chain.
1833  */
1834 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1835                                 struct sk_buff *skb)
1836 {
1837         /* if the page was released unmap it, else just sync our portion */
1838         if (unlikely(IXGBE_CB(skb)->page_released)) {
1839                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1840                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1841                 IXGBE_CB(skb)->page_released = false;
1842         } else {
1843                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1844
1845                 dma_sync_single_range_for_cpu(rx_ring->dev,
1846                                               IXGBE_CB(skb)->dma,
1847                                               frag->page_offset,
1848                                               ixgbe_rx_bufsz(rx_ring),
1849                                               DMA_FROM_DEVICE);
1850         }
1851         IXGBE_CB(skb)->dma = 0;
1852 }
1853
1854 /**
1855  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1856  * @rx_ring: rx descriptor ring packet is being transacted on
1857  * @rx_desc: pointer to the EOP Rx descriptor
1858  * @skb: pointer to current skb being fixed
1859  *
1860  * Check for corrupted packet headers caused by senders on the local L2
1861  * embedded NIC switch not setting up their Tx Descriptors right.  These
1862  * should be very rare.
1863  *
1864  * Also address the case where we are pulling data in on pages only
1865  * and as such no data is present in the skb header.
1866  *
1867  * In addition if skb is not at least 60 bytes we need to pad it so that
1868  * it is large enough to qualify as a valid Ethernet frame.
1869  *
1870  * Returns true if an error was encountered and skb was freed.
1871  **/
1872 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1873                                   union ixgbe_adv_rx_desc *rx_desc,
1874                                   struct sk_buff *skb)
1875 {
1876         struct net_device *netdev = rx_ring->netdev;
1877
1878         /* verify that the packet does not have any known errors */
1879         if (unlikely(ixgbe_test_staterr(rx_desc,
1880                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1881             !(netdev->features & NETIF_F_RXALL))) {
1882                 dev_kfree_skb_any(skb);
1883                 return true;
1884         }
1885
1886         /* place header in linear portion of buffer */
1887         if (skb_is_nonlinear(skb))
1888                 ixgbe_pull_tail(rx_ring, skb);
1889
1890 #ifdef IXGBE_FCOE
1891         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1892         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1893                 return false;
1894
1895 #endif
1896         /* if eth_skb_pad returns an error the skb was freed */
1897         if (eth_skb_pad(skb))
1898                 return true;
1899
1900         return false;
1901 }
1902
1903 /**
1904  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1905  * @rx_ring: rx descriptor ring to store buffers on
1906  * @old_buff: donor buffer to have page reused
1907  *
1908  * Synchronizes page for reuse by the adapter
1909  **/
1910 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1911                                 struct ixgbe_rx_buffer *old_buff)
1912 {
1913         struct ixgbe_rx_buffer *new_buff;
1914         u16 nta = rx_ring->next_to_alloc;
1915
1916         new_buff = &rx_ring->rx_buffer_info[nta];
1917
1918         /* update, and store next to alloc */
1919         nta++;
1920         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1921
1922         /* transfer page from old buffer to new buffer */
1923         *new_buff = *old_buff;
1924
1925         /* sync the buffer for use by the device */
1926         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1927                                          new_buff->page_offset,
1928                                          ixgbe_rx_bufsz(rx_ring),
1929                                          DMA_FROM_DEVICE);
1930 }
1931
1932 static inline bool ixgbe_page_is_reserved(struct page *page)
1933 {
1934         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1935 }
1936
1937 /**
1938  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1939  * @rx_ring: rx descriptor ring to transact packets on
1940  * @rx_buffer: buffer containing page to add
1941  * @rx_desc: descriptor containing length of buffer written by hardware
1942  * @skb: sk_buff to place the data into
1943  *
1944  * This function will add the data contained in rx_buffer->page to the skb.
1945  * This is done either through a direct copy if the data in the buffer is
1946  * less than the skb header size, otherwise it will just attach the page as
1947  * a frag to the skb.
1948  *
1949  * The function will then update the page offset if necessary and return
1950  * true if the buffer can be reused by the adapter.
1951  **/
1952 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1953                               struct ixgbe_rx_buffer *rx_buffer,
1954                               union ixgbe_adv_rx_desc *rx_desc,
1955                               struct sk_buff *skb)
1956 {
1957         struct page *page = rx_buffer->page;
1958         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1959 #if (PAGE_SIZE < 8192)
1960         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1961 #else
1962         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1963         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1964                                    ixgbe_rx_bufsz(rx_ring);
1965 #endif
1966
1967         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1968                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1969
1970                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1971
1972                 /* page is not reserved, we can reuse buffer as-is */
1973                 if (likely(!ixgbe_page_is_reserved(page)))
1974                         return true;
1975
1976                 /* this page cannot be reused so discard it */
1977                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1978                 return false;
1979         }
1980
1981         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1982                         rx_buffer->page_offset, size, truesize);
1983
1984         /* avoid re-using remote pages */
1985         if (unlikely(ixgbe_page_is_reserved(page)))
1986                 return false;
1987
1988 #if (PAGE_SIZE < 8192)
1989         /* if we are only owner of page we can reuse it */
1990         if (unlikely(page_count(page) != 1))
1991                 return false;
1992
1993         /* flip page offset to other buffer */
1994         rx_buffer->page_offset ^= truesize;
1995 #else
1996         /* move offset up to the next cache line */
1997         rx_buffer->page_offset += truesize;
1998
1999         if (rx_buffer->page_offset > last_offset)
2000                 return false;
2001 #endif
2002
2003         /* Even if we own the page, we are not allowed to use atomic_set()
2004          * This would break get_page_unless_zero() users.
2005          */
2006         page_ref_inc(page);
2007
2008         return true;
2009 }
2010
2011 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2012                                              union ixgbe_adv_rx_desc *rx_desc)
2013 {
2014         struct ixgbe_rx_buffer *rx_buffer;
2015         struct sk_buff *skb;
2016         struct page *page;
2017
2018         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2019         page = rx_buffer->page;
2020         prefetchw(page);
2021
2022         skb = rx_buffer->skb;
2023
2024         if (likely(!skb)) {
2025                 void *page_addr = page_address(page) +
2026                                   rx_buffer->page_offset;
2027
2028                 /* prefetch first cache line of first page */
2029                 prefetch(page_addr);
2030 #if L1_CACHE_BYTES < 128
2031                 prefetch(page_addr + L1_CACHE_BYTES);
2032 #endif
2033
2034                 /* allocate a skb to store the frags */
2035                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2036                                      IXGBE_RX_HDR_SIZE);
2037                 if (unlikely(!skb)) {
2038                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2039                         return NULL;
2040                 }
2041
2042                 /*
2043                  * we will be copying header into skb->data in
2044                  * pskb_may_pull so it is in our interest to prefetch
2045                  * it now to avoid a possible cache miss
2046                  */
2047                 prefetchw(skb->data);
2048
2049                 /*
2050                  * Delay unmapping of the first packet. It carries the
2051                  * header information, HW may still access the header
2052                  * after the writeback.  Only unmap it when EOP is
2053                  * reached
2054                  */
2055                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2056                         goto dma_sync;
2057
2058                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2059         } else {
2060                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2061                         ixgbe_dma_sync_frag(rx_ring, skb);
2062
2063 dma_sync:
2064                 /* we are reusing so sync this buffer for CPU use */
2065                 dma_sync_single_range_for_cpu(rx_ring->dev,
2066                                               rx_buffer->dma,
2067                                               rx_buffer->page_offset,
2068                                               ixgbe_rx_bufsz(rx_ring),
2069                                               DMA_FROM_DEVICE);
2070
2071                 rx_buffer->skb = NULL;
2072         }
2073
2074         /* pull page into skb */
2075         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2076                 /* hand second half of page back to the ring */
2077                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2078         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2079                 /* the page has been released from the ring */
2080                 IXGBE_CB(skb)->page_released = true;
2081         } else {
2082                 /* we are not reusing the buffer so unmap it */
2083                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2084                                ixgbe_rx_pg_size(rx_ring),
2085                                DMA_FROM_DEVICE);
2086         }
2087
2088         /* clear contents of buffer_info */
2089         rx_buffer->page = NULL;
2090
2091         return skb;
2092 }
2093
2094 /**
2095  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2096  * @q_vector: structure containing interrupt and ring information
2097  * @rx_ring: rx descriptor ring to transact packets on
2098  * @budget: Total limit on number of packets to process
2099  *
2100  * This function provides a "bounce buffer" approach to Rx interrupt
2101  * processing.  The advantage to this is that on systems that have
2102  * expensive overhead for IOMMU access this provides a means of avoiding
2103  * it by maintaining the mapping of the page to the syste.
2104  *
2105  * Returns amount of work completed
2106  **/
2107 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2108                                struct ixgbe_ring *rx_ring,
2109                                const int budget)
2110 {
2111         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2112 #ifdef IXGBE_FCOE
2113         struct ixgbe_adapter *adapter = q_vector->adapter;
2114         int ddp_bytes;
2115         unsigned int mss = 0;
2116 #endif /* IXGBE_FCOE */
2117         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2118
2119         while (likely(total_rx_packets < budget)) {
2120                 union ixgbe_adv_rx_desc *rx_desc;
2121                 struct sk_buff *skb;
2122
2123                 /* return some buffers to hardware, one at a time is too slow */
2124                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2125                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2126                         cleaned_count = 0;
2127                 }
2128
2129                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2130
2131                 if (!rx_desc->wb.upper.status_error)
2132                         break;
2133
2134                 /* This memory barrier is needed to keep us from reading
2135                  * any other fields out of the rx_desc until we know the
2136                  * descriptor has been written back
2137                  */
2138                 dma_rmb();
2139
2140                 /* retrieve a buffer from the ring */
2141                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2142
2143                 /* exit if we failed to retrieve a buffer */
2144                 if (!skb)
2145                         break;
2146
2147                 cleaned_count++;
2148
2149                 /* place incomplete frames back on ring for completion */
2150                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2151                         continue;
2152
2153                 /* verify the packet layout is correct */
2154                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2155                         continue;
2156
2157                 /* probably a little skewed due to removing CRC */
2158                 total_rx_bytes += skb->len;
2159
2160                 /* populate checksum, timestamp, VLAN, and protocol */
2161                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2162
2163 #ifdef IXGBE_FCOE
2164                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2165                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2166                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2167                         /* include DDPed FCoE data */
2168                         if (ddp_bytes > 0) {
2169                                 if (!mss) {
2170                                         mss = rx_ring->netdev->mtu -
2171                                                 sizeof(struct fcoe_hdr) -
2172                                                 sizeof(struct fc_frame_header) -
2173                                                 sizeof(struct fcoe_crc_eof);
2174                                         if (mss > 512)
2175                                                 mss &= ~511;
2176                                 }
2177                                 total_rx_bytes += ddp_bytes;
2178                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2179                                                                  mss);
2180                         }
2181                         if (!ddp_bytes) {
2182                                 dev_kfree_skb_any(skb);
2183                                 continue;
2184                         }
2185                 }
2186
2187 #endif /* IXGBE_FCOE */
2188                 ixgbe_rx_skb(q_vector, skb);
2189
2190                 /* update budget accounting */
2191                 total_rx_packets++;
2192         }
2193
2194         u64_stats_update_begin(&rx_ring->syncp);
2195         rx_ring->stats.packets += total_rx_packets;
2196         rx_ring->stats.bytes += total_rx_bytes;
2197         u64_stats_update_end(&rx_ring->syncp);
2198         q_vector->rx.total_packets += total_rx_packets;
2199         q_vector->rx.total_bytes += total_rx_bytes;
2200
2201         return total_rx_packets;
2202 }
2203
2204 #ifdef CONFIG_NET_RX_BUSY_POLL
2205 /* must be called with local_bh_disable()d */
2206 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2207 {
2208         struct ixgbe_q_vector *q_vector =
2209                         container_of(napi, struct ixgbe_q_vector, napi);
2210         struct ixgbe_adapter *adapter = q_vector->adapter;
2211         struct ixgbe_ring  *ring;
2212         int found = 0;
2213
2214         if (test_bit(__IXGBE_DOWN, &adapter->state))
2215                 return LL_FLUSH_FAILED;
2216
2217         if (!ixgbe_qv_lock_poll(q_vector))
2218                 return LL_FLUSH_BUSY;
2219
2220         ixgbe_for_each_ring(ring, q_vector->rx) {
2221                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2222 #ifdef BP_EXTENDED_STATS
2223                 if (found)
2224                         ring->stats.cleaned += found;
2225                 else
2226                         ring->stats.misses++;
2227 #endif
2228                 if (found)
2229                         break;
2230         }
2231
2232         ixgbe_qv_unlock_poll(q_vector);
2233
2234         return found;
2235 }
2236 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2237
2238 /**
2239  * ixgbe_configure_msix - Configure MSI-X hardware
2240  * @adapter: board private structure
2241  *
2242  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2243  * interrupts.
2244  **/
2245 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2246 {
2247         struct ixgbe_q_vector *q_vector;
2248         int v_idx;
2249         u32 mask;
2250
2251         /* Populate MSIX to EITR Select */
2252         if (adapter->num_vfs > 32) {
2253                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2254                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2255         }
2256
2257         /*
2258          * Populate the IVAR table and set the ITR values to the
2259          * corresponding register.
2260          */
2261         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2262                 struct ixgbe_ring *ring;
2263                 q_vector = adapter->q_vector[v_idx];
2264
2265                 ixgbe_for_each_ring(ring, q_vector->rx)
2266                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2267
2268                 ixgbe_for_each_ring(ring, q_vector->tx)
2269                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2270
2271                 ixgbe_write_eitr(q_vector);
2272         }
2273
2274         switch (adapter->hw.mac.type) {
2275         case ixgbe_mac_82598EB:
2276                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2277                                v_idx);
2278                 break;
2279         case ixgbe_mac_82599EB:
2280         case ixgbe_mac_X540:
2281         case ixgbe_mac_X550:
2282         case ixgbe_mac_X550EM_x:
2283         case ixgbe_mac_x550em_a:
2284                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2285                 break;
2286         default:
2287                 break;
2288         }
2289         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2290
2291         /* set up to autoclear timer, and the vectors */
2292         mask = IXGBE_EIMS_ENABLE_MASK;
2293         mask &= ~(IXGBE_EIMS_OTHER |
2294                   IXGBE_EIMS_MAILBOX |
2295                   IXGBE_EIMS_LSC);
2296
2297         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2298 }
2299
2300 enum latency_range {
2301         lowest_latency = 0,
2302         low_latency = 1,
2303         bulk_latency = 2,
2304         latency_invalid = 255
2305 };
2306
2307 /**
2308  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2309  * @q_vector: structure containing interrupt and ring information
2310  * @ring_container: structure containing ring performance data
2311  *
2312  *      Stores a new ITR value based on packets and byte
2313  *      counts during the last interrupt.  The advantage of per interrupt
2314  *      computation is faster updates and more accurate ITR for the current
2315  *      traffic pattern.  Constants in this function were computed
2316  *      based on theoretical maximum wire speed and thresholds were set based
2317  *      on testing data as well as attempting to minimize response time
2318  *      while increasing bulk throughput.
2319  *      this functionality is controlled by the InterruptThrottleRate module
2320  *      parameter (see ixgbe_param.c)
2321  **/
2322 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2323                              struct ixgbe_ring_container *ring_container)
2324 {
2325         int bytes = ring_container->total_bytes;
2326         int packets = ring_container->total_packets;
2327         u32 timepassed_us;
2328         u64 bytes_perint;
2329         u8 itr_setting = ring_container->itr;
2330
2331         if (packets == 0)
2332                 return;
2333
2334         /* simple throttlerate management
2335          *   0-10MB/s   lowest (100000 ints/s)
2336          *  10-20MB/s   low    (20000 ints/s)
2337          *  20-1249MB/s bulk   (12000 ints/s)
2338          */
2339         /* what was last interrupt timeslice? */
2340         timepassed_us = q_vector->itr >> 2;
2341         if (timepassed_us == 0)
2342                 return;
2343
2344         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2345
2346         switch (itr_setting) {
2347         case lowest_latency:
2348                 if (bytes_perint > 10)
2349                         itr_setting = low_latency;
2350                 break;
2351         case low_latency:
2352                 if (bytes_perint > 20)
2353                         itr_setting = bulk_latency;
2354                 else if (bytes_perint <= 10)
2355                         itr_setting = lowest_latency;
2356                 break;
2357         case bulk_latency:
2358                 if (bytes_perint <= 20)
2359                         itr_setting = low_latency;
2360                 break;
2361         }
2362
2363         /* clear work counters since we have the values we need */
2364         ring_container->total_bytes = 0;
2365         ring_container->total_packets = 0;
2366
2367         /* write updated itr to ring container */
2368         ring_container->itr = itr_setting;
2369 }
2370
2371 /**
2372  * ixgbe_write_eitr - write EITR register in hardware specific way
2373  * @q_vector: structure containing interrupt and ring information
2374  *
2375  * This function is made to be called by ethtool and by the driver
2376  * when it needs to update EITR registers at runtime.  Hardware
2377  * specific quirks/differences are taken care of here.
2378  */
2379 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2380 {
2381         struct ixgbe_adapter *adapter = q_vector->adapter;
2382         struct ixgbe_hw *hw = &adapter->hw;
2383         int v_idx = q_vector->v_idx;
2384         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2385
2386         switch (adapter->hw.mac.type) {
2387         case ixgbe_mac_82598EB:
2388                 /* must write high and low 16 bits to reset counter */
2389                 itr_reg |= (itr_reg << 16);
2390                 break;
2391         case ixgbe_mac_82599EB:
2392         case ixgbe_mac_X540:
2393         case ixgbe_mac_X550:
2394         case ixgbe_mac_X550EM_x:
2395         case ixgbe_mac_x550em_a:
2396                 /*
2397                  * set the WDIS bit to not clear the timer bits and cause an
2398                  * immediate assertion of the interrupt
2399                  */
2400                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2401                 break;
2402         default:
2403                 break;
2404         }
2405         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2406 }
2407
2408 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2409 {
2410         u32 new_itr = q_vector->itr;
2411         u8 current_itr;
2412
2413         ixgbe_update_itr(q_vector, &q_vector->tx);
2414         ixgbe_update_itr(q_vector, &q_vector->rx);
2415
2416         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2417
2418         switch (current_itr) {
2419         /* counts and packets in update_itr are dependent on these numbers */
2420         case lowest_latency:
2421                 new_itr = IXGBE_100K_ITR;
2422                 break;
2423         case low_latency:
2424                 new_itr = IXGBE_20K_ITR;
2425                 break;
2426         case bulk_latency:
2427                 new_itr = IXGBE_12K_ITR;
2428                 break;
2429         default:
2430                 break;
2431         }
2432
2433         if (new_itr != q_vector->itr) {
2434                 /* do an exponential smoothing */
2435                 new_itr = (10 * new_itr * q_vector->itr) /
2436                           ((9 * new_itr) + q_vector->itr);
2437
2438                 /* save the algorithm value here */
2439                 q_vector->itr = new_itr;
2440
2441                 ixgbe_write_eitr(q_vector);
2442         }
2443 }
2444
2445 /**
2446  * ixgbe_check_overtemp_subtask - check for over temperature
2447  * @adapter: pointer to adapter
2448  **/
2449 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2450 {
2451         struct ixgbe_hw *hw = &adapter->hw;
2452         u32 eicr = adapter->interrupt_event;
2453         s32 rc;
2454
2455         if (test_bit(__IXGBE_DOWN, &adapter->state))
2456                 return;
2457
2458         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2459             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2460                 return;
2461
2462         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2463
2464         switch (hw->device_id) {
2465         case IXGBE_DEV_ID_82599_T3_LOM:
2466                 /*
2467                  * Since the warning interrupt is for both ports
2468                  * we don't have to check if:
2469                  *  - This interrupt wasn't for our port.
2470                  *  - We may have missed the interrupt so always have to
2471                  *    check if we  got a LSC
2472                  */
2473                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2474                     !(eicr & IXGBE_EICR_LSC))
2475                         return;
2476
2477                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2478                         u32 speed;
2479                         bool link_up = false;
2480
2481                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2482
2483                         if (link_up)
2484                                 return;
2485                 }
2486
2487                 /* Check if this is not due to overtemp */
2488                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2489                         return;
2490
2491                 break;
2492         case IXGBE_DEV_ID_X550EM_A_1G_T:
2493         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2494                 rc = hw->phy.ops.check_overtemp(hw);
2495                 if (rc != IXGBE_ERR_OVERTEMP)
2496                         return;
2497                 break;
2498         default:
2499                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2500                         return;
2501                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2502                         return;
2503                 break;
2504         }
2505         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2506
2507         adapter->interrupt_event = 0;
2508 }
2509
2510 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2511 {
2512         struct ixgbe_hw *hw = &adapter->hw;
2513
2514         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2515             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2516                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2517                 /* write to clear the interrupt */
2518                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2519         }
2520 }
2521
2522 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2523 {
2524         struct ixgbe_hw *hw = &adapter->hw;
2525
2526         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2527                 return;
2528
2529         switch (adapter->hw.mac.type) {
2530         case ixgbe_mac_82599EB:
2531                 /*
2532                  * Need to check link state so complete overtemp check
2533                  * on service task
2534                  */
2535                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2536                      (eicr & IXGBE_EICR_LSC)) &&
2537                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2538                         adapter->interrupt_event = eicr;
2539                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2540                         ixgbe_service_event_schedule(adapter);
2541                         return;
2542                 }
2543                 return;
2544         case ixgbe_mac_x550em_a:
2545                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2546                         adapter->interrupt_event = eicr;
2547                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2548                         ixgbe_service_event_schedule(adapter);
2549                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2550                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2551                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2552                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2553                 }
2554                 return;
2555         case ixgbe_mac_X550:
2556         case ixgbe_mac_X540:
2557                 if (!(eicr & IXGBE_EICR_TS))
2558                         return;
2559                 break;
2560         default:
2561                 return;
2562         }
2563
2564         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2565 }
2566
2567 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2568 {
2569         switch (hw->mac.type) {
2570         case ixgbe_mac_82598EB:
2571                 if (hw->phy.type == ixgbe_phy_nl)
2572                         return true;
2573                 return false;
2574         case ixgbe_mac_82599EB:
2575         case ixgbe_mac_X550EM_x:
2576         case ixgbe_mac_x550em_a:
2577                 switch (hw->mac.ops.get_media_type(hw)) {
2578                 case ixgbe_media_type_fiber:
2579                 case ixgbe_media_type_fiber_qsfp:
2580                         return true;
2581                 default:
2582                         return false;
2583                 }
2584         default:
2585                 return false;
2586         }
2587 }
2588
2589 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2590 {
2591         struct ixgbe_hw *hw = &adapter->hw;
2592         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2593
2594         if (!ixgbe_is_sfp(hw))
2595                 return;
2596
2597         /* Later MAC's use different SDP */
2598         if (hw->mac.type >= ixgbe_mac_X540)
2599                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2600
2601         if (eicr & eicr_mask) {
2602                 /* Clear the interrupt */
2603                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2604                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2605                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2606                         adapter->sfp_poll_time = 0;
2607                         ixgbe_service_event_schedule(adapter);
2608                 }
2609         }
2610
2611         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2612             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2613                 /* Clear the interrupt */
2614                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2615                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2616                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2617                         ixgbe_service_event_schedule(adapter);
2618                 }
2619         }
2620 }
2621
2622 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2623 {
2624         struct ixgbe_hw *hw = &adapter->hw;
2625
2626         adapter->lsc_int++;
2627         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2628         adapter->link_check_timeout = jiffies;
2629         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2630                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2631                 IXGBE_WRITE_FLUSH(hw);
2632                 ixgbe_service_event_schedule(adapter);
2633         }
2634 }
2635
2636 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2637                                            u64 qmask)
2638 {
2639         u32 mask;
2640         struct ixgbe_hw *hw = &adapter->hw;
2641
2642         switch (hw->mac.type) {
2643         case ixgbe_mac_82598EB:
2644                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2645                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2646                 break;
2647         case ixgbe_mac_82599EB:
2648         case ixgbe_mac_X540:
2649         case ixgbe_mac_X550:
2650         case ixgbe_mac_X550EM_x:
2651         case ixgbe_mac_x550em_a:
2652                 mask = (qmask & 0xFFFFFFFF);
2653                 if (mask)
2654                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2655                 mask = (qmask >> 32);
2656                 if (mask)
2657                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2658                 break;
2659         default:
2660                 break;
2661         }
2662         /* skip the flush */
2663 }
2664
2665 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2666                                             u64 qmask)
2667 {
2668         u32 mask;
2669         struct ixgbe_hw *hw = &adapter->hw;
2670
2671         switch (hw->mac.type) {
2672         case ixgbe_mac_82598EB:
2673                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2674                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2675                 break;
2676         case ixgbe_mac_82599EB:
2677         case ixgbe_mac_X540:
2678         case ixgbe_mac_X550:
2679         case ixgbe_mac_X550EM_x:
2680         case ixgbe_mac_x550em_a:
2681                 mask = (qmask & 0xFFFFFFFF);
2682                 if (mask)
2683                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2684                 mask = (qmask >> 32);
2685                 if (mask)
2686                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2687                 break;
2688         default:
2689                 break;
2690         }
2691         /* skip the flush */
2692 }
2693
2694 /**
2695  * ixgbe_irq_enable - Enable default interrupt generation settings
2696  * @adapter: board private structure
2697  **/
2698 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2699                                     bool flush)
2700 {
2701         struct ixgbe_hw *hw = &adapter->hw;
2702         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2703
2704         /* don't reenable LSC while waiting for link */
2705         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2706                 mask &= ~IXGBE_EIMS_LSC;
2707
2708         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2709                 switch (adapter->hw.mac.type) {
2710                 case ixgbe_mac_82599EB:
2711                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2712                         break;
2713                 case ixgbe_mac_X540:
2714                 case ixgbe_mac_X550:
2715                 case ixgbe_mac_X550EM_x:
2716                 case ixgbe_mac_x550em_a:
2717                         mask |= IXGBE_EIMS_TS;
2718                         break;
2719                 default:
2720                         break;
2721                 }
2722         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2723                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2724         switch (adapter->hw.mac.type) {
2725         case ixgbe_mac_82599EB:
2726                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2727                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2728                 /* fall through */
2729         case ixgbe_mac_X540:
2730         case ixgbe_mac_X550:
2731         case ixgbe_mac_X550EM_x:
2732         case ixgbe_mac_x550em_a:
2733                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2734                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2735                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2736                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2737                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2738                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2739                 mask |= IXGBE_EIMS_ECC;
2740                 mask |= IXGBE_EIMS_MAILBOX;
2741                 break;
2742         default:
2743                 break;
2744         }
2745
2746         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2747             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2748                 mask |= IXGBE_EIMS_FLOW_DIR;
2749
2750         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2751         if (queues)
2752                 ixgbe_irq_enable_queues(adapter, ~0);
2753         if (flush)
2754                 IXGBE_WRITE_FLUSH(&adapter->hw);
2755 }
2756
2757 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2758 {
2759         struct ixgbe_adapter *adapter = data;
2760         struct ixgbe_hw *hw = &adapter->hw;
2761         u32 eicr;
2762
2763         /*
2764          * Workaround for Silicon errata.  Use clear-by-write instead
2765          * of clear-by-read.  Reading with EICS will return the
2766          * interrupt causes without clearing, which later be done
2767          * with the write to EICR.
2768          */
2769         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2770
2771         /* The lower 16bits of the EICR register are for the queue interrupts
2772          * which should be masked here in order to not accidentally clear them if
2773          * the bits are high when ixgbe_msix_other is called. There is a race
2774          * condition otherwise which results in possible performance loss
2775          * especially if the ixgbe_msix_other interrupt is triggering
2776          * consistently (as it would when PPS is turned on for the X540 device)
2777          */
2778         eicr &= 0xFFFF0000;
2779
2780         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2781
2782         if (eicr & IXGBE_EICR_LSC)
2783                 ixgbe_check_lsc(adapter);
2784
2785         if (eicr & IXGBE_EICR_MAILBOX)
2786                 ixgbe_msg_task(adapter);
2787
2788         switch (hw->mac.type) {
2789         case ixgbe_mac_82599EB:
2790         case ixgbe_mac_X540:
2791         case ixgbe_mac_X550:
2792         case ixgbe_mac_X550EM_x:
2793         case ixgbe_mac_x550em_a:
2794                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2795                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2796                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2797                         ixgbe_service_event_schedule(adapter);
2798                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2799                                         IXGBE_EICR_GPI_SDP0_X540);
2800                 }
2801                 if (eicr & IXGBE_EICR_ECC) {
2802                         e_info(link, "Received ECC Err, initiating reset\n");
2803                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2804                         ixgbe_service_event_schedule(adapter);
2805                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2806                 }
2807                 /* Handle Flow Director Full threshold interrupt */
2808                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2809                         int reinit_count = 0;
2810                         int i;
2811                         for (i = 0; i < adapter->num_tx_queues; i++) {
2812                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2813                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2814                                                        &ring->state))
2815                                         reinit_count++;
2816                         }
2817                         if (reinit_count) {
2818                                 /* no more flow director interrupts until after init */
2819                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2820                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2821                                 ixgbe_service_event_schedule(adapter);
2822                         }
2823                 }
2824                 ixgbe_check_sfp_event(adapter, eicr);
2825                 ixgbe_check_overtemp_event(adapter, eicr);
2826                 break;
2827         default:
2828                 break;
2829         }
2830
2831         ixgbe_check_fan_failure(adapter, eicr);
2832
2833         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2834                 ixgbe_ptp_check_pps_event(adapter);
2835
2836         /* re-enable the original interrupt state, no lsc, no queues */
2837         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2838                 ixgbe_irq_enable(adapter, false, false);
2839
2840         return IRQ_HANDLED;
2841 }
2842
2843 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2844 {
2845         struct ixgbe_q_vector *q_vector = data;
2846
2847         /* EIAM disabled interrupts (on this vector) for us */
2848
2849         if (q_vector->rx.ring || q_vector->tx.ring)
2850                 napi_schedule_irqoff(&q_vector->napi);
2851
2852         return IRQ_HANDLED;
2853 }
2854
2855 /**
2856  * ixgbe_poll - NAPI Rx polling callback
2857  * @napi: structure for representing this polling device
2858  * @budget: how many packets driver is allowed to clean
2859  *
2860  * This function is used for legacy and MSI, NAPI mode
2861  **/
2862 int ixgbe_poll(struct napi_struct *napi, int budget)
2863 {
2864         struct ixgbe_q_vector *q_vector =
2865                                 container_of(napi, struct ixgbe_q_vector, napi);
2866         struct ixgbe_adapter *adapter = q_vector->adapter;
2867         struct ixgbe_ring *ring;
2868         int per_ring_budget, work_done = 0;
2869         bool clean_complete = true;
2870
2871 #ifdef CONFIG_IXGBE_DCA
2872         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2873                 ixgbe_update_dca(q_vector);
2874 #endif
2875
2876         ixgbe_for_each_ring(ring, q_vector->tx) {
2877                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2878                         clean_complete = false;
2879         }
2880
2881         /* Exit if we are called by netpoll or busy polling is active */
2882         if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2883                 return budget;
2884
2885         /* attempt to distribute budget to each queue fairly, but don't allow
2886          * the budget to go below 1 because we'll exit polling */
2887         if (q_vector->rx.count > 1)
2888                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2889         else
2890                 per_ring_budget = budget;
2891
2892         ixgbe_for_each_ring(ring, q_vector->rx) {
2893                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2894                                                  per_ring_budget);
2895
2896                 work_done += cleaned;
2897                 if (cleaned >= per_ring_budget)
2898                         clean_complete = false;
2899         }
2900
2901         ixgbe_qv_unlock_napi(q_vector);
2902         /* If all work not completed, return budget and keep polling */
2903         if (!clean_complete)
2904                 return budget;
2905
2906         /* all work done, exit the polling mode */
2907         napi_complete_done(napi, work_done);
2908         if (adapter->rx_itr_setting & 1)
2909                 ixgbe_set_itr(q_vector);
2910         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2911                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2912
2913         return min(work_done, budget - 1);
2914 }
2915
2916 /**
2917  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2918  * @adapter: board private structure
2919  *
2920  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2921  * interrupts from the kernel.
2922  **/
2923 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2924 {
2925         struct net_device *netdev = adapter->netdev;
2926         int vector, err;
2927         int ri = 0, ti = 0;
2928
2929         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2930                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2931                 struct msix_entry *entry = &adapter->msix_entries[vector];
2932
2933                 if (q_vector->tx.ring && q_vector->rx.ring) {
2934                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2935                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2936                         ti++;
2937                 } else if (q_vector->rx.ring) {
2938                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2939                                  "%s-%s-%d", netdev->name, "rx", ri++);
2940                 } else if (q_vector->tx.ring) {
2941                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2942                                  "%s-%s-%d", netdev->name, "tx", ti++);
2943                 } else {
2944                         /* skip this unused q_vector */
2945                         continue;
2946                 }
2947                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2948                                   q_vector->name, q_vector);
2949                 if (err) {
2950                         e_err(probe, "request_irq failed for MSIX interrupt "
2951                               "Error: %d\n", err);
2952                         goto free_queue_irqs;
2953                 }
2954                 /* If Flow Director is enabled, set interrupt affinity */
2955                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2956                         /* assign the mask for this irq */
2957                         irq_set_affinity_hint(entry->vector,
2958                                               &q_vector->affinity_mask);
2959                 }
2960         }
2961
2962         err = request_irq(adapter->msix_entries[vector].vector,
2963                           ixgbe_msix_other, 0, netdev->name, adapter);
2964         if (err) {
2965                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2966                 goto free_queue_irqs;
2967         }
2968
2969         return 0;
2970
2971 free_queue_irqs:
2972         while (vector) {
2973                 vector--;
2974                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2975                                       NULL);
2976                 free_irq(adapter->msix_entries[vector].vector,
2977                          adapter->q_vector[vector]);
2978         }
2979         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2980         pci_disable_msix(adapter->pdev);
2981         kfree(adapter->msix_entries);
2982         adapter->msix_entries = NULL;
2983         return err;
2984 }
2985
2986 /**
2987  * ixgbe_intr - legacy mode Interrupt Handler
2988  * @irq: interrupt number
2989  * @data: pointer to a network interface device structure
2990  **/
2991 static irqreturn_t ixgbe_intr(int irq, void *data)
2992 {
2993         struct ixgbe_adapter *adapter = data;
2994         struct ixgbe_hw *hw = &adapter->hw;
2995         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2996         u32 eicr;
2997
2998         /*
2999          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3000          * before the read of EICR.
3001          */
3002         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3003
3004         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3005          * therefore no explicit interrupt disable is necessary */
3006         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3007         if (!eicr) {
3008                 /*
3009                  * shared interrupt alert!
3010                  * make sure interrupts are enabled because the read will
3011                  * have disabled interrupts due to EIAM
3012                  * finish the workaround of silicon errata on 82598.  Unmask
3013                  * the interrupt that we masked before the EICR read.
3014                  */
3015                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3016                         ixgbe_irq_enable(adapter, true, true);
3017                 return IRQ_NONE;        /* Not our interrupt */
3018         }
3019
3020         if (eicr & IXGBE_EICR_LSC)
3021                 ixgbe_check_lsc(adapter);
3022
3023         switch (hw->mac.type) {
3024         case ixgbe_mac_82599EB:
3025                 ixgbe_check_sfp_event(adapter, eicr);
3026                 /* Fall through */
3027         case ixgbe_mac_X540:
3028         case ixgbe_mac_X550:
3029         case ixgbe_mac_X550EM_x:
3030         case ixgbe_mac_x550em_a:
3031                 if (eicr & IXGBE_EICR_ECC) {
3032                         e_info(link, "Received ECC Err, initiating reset\n");
3033                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3034                         ixgbe_service_event_schedule(adapter);
3035                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3036                 }
3037                 ixgbe_check_overtemp_event(adapter, eicr);
3038                 break;
3039         default:
3040                 break;
3041         }
3042
3043         ixgbe_check_fan_failure(adapter, eicr);
3044         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3045                 ixgbe_ptp_check_pps_event(adapter);
3046
3047         /* would disable interrupts here but EIAM disabled it */
3048         napi_schedule_irqoff(&q_vector->napi);
3049
3050         /*
3051          * re-enable link(maybe) and non-queue interrupts, no flush.
3052          * ixgbe_poll will re-enable the queue interrupts
3053          */
3054         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3055                 ixgbe_irq_enable(adapter, false, false);
3056
3057         return IRQ_HANDLED;
3058 }
3059
3060 /**
3061  * ixgbe_request_irq - initialize interrupts
3062  * @adapter: board private structure
3063  *
3064  * Attempts to configure interrupts using the best available
3065  * capabilities of the hardware and kernel.
3066  **/
3067 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3068 {
3069         struct net_device *netdev = adapter->netdev;
3070         int err;
3071
3072         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3073                 err = ixgbe_request_msix_irqs(adapter);
3074         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3075                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3076                                   netdev->name, adapter);
3077         else
3078                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3079                                   netdev->name, adapter);
3080
3081         if (err)
3082                 e_err(probe, "request_irq failed, Error %d\n", err);
3083
3084         return err;
3085 }
3086
3087 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3088 {
3089         int vector;
3090
3091         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3092                 free_irq(adapter->pdev->irq, adapter);
3093                 return;
3094         }
3095
3096         if (!adapter->msix_entries)
3097                 return;
3098
3099         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3100                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3101                 struct msix_entry *entry = &adapter->msix_entries[vector];
3102
3103                 /* free only the irqs that were actually requested */
3104                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3105                         continue;
3106
3107                 /* clear the affinity_mask in the IRQ descriptor */
3108                 irq_set_affinity_hint(entry->vector, NULL);
3109
3110                 free_irq(entry->vector, q_vector);
3111         }
3112
3113         free_irq(adapter->msix_entries[vector].vector, adapter);
3114 }
3115
3116 /**
3117  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3118  * @adapter: board private structure
3119  **/
3120 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3121 {
3122         switch (adapter->hw.mac.type) {
3123         case ixgbe_mac_82598EB:
3124                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3125                 break;
3126         case ixgbe_mac_82599EB:
3127         case ixgbe_mac_X540:
3128         case ixgbe_mac_X550:
3129         case ixgbe_mac_X550EM_x:
3130         case ixgbe_mac_x550em_a:
3131                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3132                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3133                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3134                 break;
3135         default:
3136                 break;
3137         }
3138         IXGBE_WRITE_FLUSH(&adapter->hw);
3139         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3140                 int vector;
3141
3142                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3143                         synchronize_irq(adapter->msix_entries[vector].vector);
3144
3145                 synchronize_irq(adapter->msix_entries[vector++].vector);
3146         } else {
3147                 synchronize_irq(adapter->pdev->irq);
3148         }
3149 }
3150
3151 /**
3152  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3153  *
3154  **/
3155 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3156 {
3157         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3158
3159         ixgbe_write_eitr(q_vector);
3160
3161         ixgbe_set_ivar(adapter, 0, 0, 0);
3162         ixgbe_set_ivar(adapter, 1, 0, 0);
3163
3164         e_info(hw, "Legacy interrupt IVAR setup done\n");
3165 }
3166
3167 /**
3168  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3169  * @adapter: board private structure
3170  * @ring: structure containing ring specific data
3171  *
3172  * Configure the Tx descriptor ring after a reset.
3173  **/
3174 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3175                              struct ixgbe_ring *ring)
3176 {
3177         struct ixgbe_hw *hw = &adapter->hw;
3178         u64 tdba = ring->dma;
3179         int wait_loop = 10;
3180         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3181         u8 reg_idx = ring->reg_idx;
3182
3183         /* disable queue to avoid issues while updating state */
3184         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3185         IXGBE_WRITE_FLUSH(hw);
3186
3187         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3188                         (tdba & DMA_BIT_MASK(32)));
3189         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3190         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3191                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3192         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3193         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3194         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3195
3196         /*
3197          * set WTHRESH to encourage burst writeback, it should not be set
3198          * higher than 1 when:
3199          * - ITR is 0 as it could cause false TX hangs
3200          * - ITR is set to > 100k int/sec and BQL is enabled
3201          *
3202          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3203          * to or less than the number of on chip descriptors, which is
3204          * currently 40.
3205          */
3206         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3207                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3208         else
3209                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3210
3211         /*
3212          * Setting PTHRESH to 32 both improves performance
3213          * and avoids a TX hang with DFP enabled
3214          */
3215         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3216                    32;          /* PTHRESH = 32 */
3217
3218         /* reinitialize flowdirector state */
3219         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3220                 ring->atr_sample_rate = adapter->atr_sample_rate;
3221                 ring->atr_count = 0;
3222                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3223         } else {
3224                 ring->atr_sample_rate = 0;
3225         }
3226
3227         /* initialize XPS */
3228         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3229                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3230
3231                 if (q_vector)
3232                         netif_set_xps_queue(ring->netdev,
3233                                             &q_vector->affinity_mask,
3234                                             ring->queue_index);
3235         }
3236
3237         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3238
3239         /* enable queue */
3240         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3241
3242         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3243         if (hw->mac.type == ixgbe_mac_82598EB &&
3244             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3245                 return;
3246
3247         /* poll to verify queue is enabled */
3248         do {
3249                 usleep_range(1000, 2000);
3250                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3251         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3252         if (!wait_loop)
3253                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3254 }
3255
3256 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3257 {
3258         struct ixgbe_hw *hw = &adapter->hw;
3259         u32 rttdcs, mtqc;
3260         u8 tcs = netdev_get_num_tc(adapter->netdev);
3261
3262         if (hw->mac.type == ixgbe_mac_82598EB)
3263                 return;
3264
3265         /* disable the arbiter while setting MTQC */
3266         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3267         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3268         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3269
3270         /* set transmit pool layout */
3271         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3272                 mtqc = IXGBE_MTQC_VT_ENA;
3273                 if (tcs > 4)
3274                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3275                 else if (tcs > 1)
3276                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3277                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3278                          IXGBE_82599_VMDQ_4Q_MASK)
3279                         mtqc |= IXGBE_MTQC_32VF;
3280                 else
3281                         mtqc |= IXGBE_MTQC_64VF;
3282         } else {
3283                 if (tcs > 4)
3284                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3285                 else if (tcs > 1)
3286                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3287                 else
3288                         mtqc = IXGBE_MTQC_64Q_1PB;
3289         }
3290
3291         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3292
3293         /* Enable Security TX Buffer IFG for multiple pb */
3294         if (tcs) {
3295                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3296                 sectx |= IXGBE_SECTX_DCB;
3297                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3298         }
3299
3300         /* re-enable the arbiter */
3301         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3302         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3303 }
3304
3305 /**
3306  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3307  * @adapter: board private structure
3308  *
3309  * Configure the Tx unit of the MAC after a reset.
3310  **/
3311 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3312 {
3313         struct ixgbe_hw *hw = &adapter->hw;
3314         u32 dmatxctl;
3315         u32 i;
3316
3317         ixgbe_setup_mtqc(adapter);
3318
3319         if (hw->mac.type != ixgbe_mac_82598EB) {
3320                 /* DMATXCTL.EN must be before Tx queues are enabled */
3321                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3322                 dmatxctl |= IXGBE_DMATXCTL_TE;
3323                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3324         }
3325
3326         /* Setup the HW Tx Head and Tail descriptor pointers */
3327         for (i = 0; i < adapter->num_tx_queues; i++)
3328                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3329 }
3330
3331 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3332                                  struct ixgbe_ring *ring)
3333 {
3334         struct ixgbe_hw *hw = &adapter->hw;
3335         u8 reg_idx = ring->reg_idx;
3336         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3337
3338         srrctl |= IXGBE_SRRCTL_DROP_EN;
3339
3340         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3341 }
3342
3343 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3344                                   struct ixgbe_ring *ring)
3345 {
3346         struct ixgbe_hw *hw = &adapter->hw;
3347         u8 reg_idx = ring->reg_idx;
3348         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3349
3350         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3351
3352         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3353 }
3354
3355 #ifdef CONFIG_IXGBE_DCB
3356 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3357 #else
3358 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3359 #endif
3360 {
3361         int i;
3362         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3363
3364         if (adapter->ixgbe_ieee_pfc)
3365                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3366
3367         /*
3368          * We should set the drop enable bit if:
3369          *  SR-IOV is enabled
3370          *   or
3371          *  Number of Rx queues > 1 and flow control is disabled
3372          *
3373          *  This allows us to avoid head of line blocking for security
3374          *  and performance reasons.
3375          */
3376         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3377             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3378                 for (i = 0; i < adapter->num_rx_queues; i++)
3379                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3380         } else {
3381                 for (i = 0; i < adapter->num_rx_queues; i++)
3382                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3383         }
3384 }
3385
3386 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3387
3388 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3389                                    struct ixgbe_ring *rx_ring)
3390 {
3391         struct ixgbe_hw *hw = &adapter->hw;
3392         u32 srrctl;
3393         u8 reg_idx = rx_ring->reg_idx;
3394
3395         if (hw->mac.type == ixgbe_mac_82598EB) {
3396                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3397
3398                 /*
3399                  * if VMDq is not active we must program one srrctl register
3400                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3401                  */
3402                 reg_idx &= mask;
3403         }
3404
3405         /* configure header buffer length, needed for RSC */
3406         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3407
3408         /* configure the packet buffer length */
3409         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3410
3411         /* configure descriptor type */
3412         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3413
3414         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3415 }
3416
3417 /**
3418  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3419  * @adapter: device handle
3420  *
3421  *  - 82598/82599/X540:     128
3422  *  - X550(non-SRIOV mode): 512
3423  *  - X550(SRIOV mode):     64
3424  */
3425 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3426 {
3427         if (adapter->hw.mac.type < ixgbe_mac_X550)
3428                 return 128;
3429         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3430                 return 64;
3431         else
3432                 return 512;
3433 }
3434
3435 /**
3436  * ixgbe_store_reta - Write the RETA table to HW
3437  * @adapter: device handle
3438  *
3439  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3440  */
3441 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3442 {
3443         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3444         struct ixgbe_hw *hw = &adapter->hw;
3445         u32 reta = 0;
3446         u32 indices_multi;
3447         u8 *indir_tbl = adapter->rss_indir_tbl;
3448
3449         /* Fill out the redirection table as follows:
3450          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3451          *    indices.
3452          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3453          *  - X550:       8 bit wide entries containing 6 bit RSS index
3454          */
3455         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3456                 indices_multi = 0x11;
3457         else
3458                 indices_multi = 0x1;
3459
3460         /* Write redirection table to HW */
3461         for (i = 0; i < reta_entries; i++) {
3462                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3463                 if ((i & 3) == 3) {
3464                         if (i < 128)
3465                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3466                         else
3467                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3468                                                 reta);
3469                         reta = 0;
3470                 }
3471         }
3472 }
3473
3474 /**
3475  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3476  * @adapter: device handle
3477  *
3478  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3479  */
3480 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3481 {
3482         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3483         struct ixgbe_hw *hw = &adapter->hw;
3484         u32 vfreta = 0;
3485         unsigned int pf_pool = adapter->num_vfs;
3486
3487         /* Write redirection table to HW */
3488         for (i = 0; i < reta_entries; i++) {
3489                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3490                 if ((i & 3) == 3) {
3491                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3492                                         vfreta);
3493                         vfreta = 0;
3494                 }
3495         }
3496 }
3497
3498 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3499 {
3500         struct ixgbe_hw *hw = &adapter->hw;
3501         u32 i, j;
3502         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3503         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3504
3505         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3506          * make full use of any rings they may have.  We will use the
3507          * PSRTYPE register to control how many rings we use within the PF.
3508          */
3509         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3510                 rss_i = 4;
3511
3512         /* Fill out hash function seeds */
3513         for (i = 0; i < 10; i++)
3514                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3515
3516         /* Fill out redirection table */
3517         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3518
3519         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3520                 if (j == rss_i)
3521                         j = 0;
3522
3523                 adapter->rss_indir_tbl[i] = j;
3524         }
3525
3526         ixgbe_store_reta(adapter);
3527 }
3528
3529 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3530 {
3531         struct ixgbe_hw *hw = &adapter->hw;
3532         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3533         unsigned int pf_pool = adapter->num_vfs;
3534         int i, j;
3535
3536         /* Fill out hash function seeds */
3537         for (i = 0; i < 10; i++)
3538                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3539                                 adapter->rss_key[i]);
3540
3541         /* Fill out the redirection table */
3542         for (i = 0, j = 0; i < 64; i++, j++) {
3543                 if (j == rss_i)
3544                         j = 0;
3545
3546                 adapter->rss_indir_tbl[i] = j;
3547         }
3548
3549         ixgbe_store_vfreta(adapter);
3550 }
3551
3552 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3553 {
3554         struct ixgbe_hw *hw = &adapter->hw;
3555         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3556         u32 rxcsum;
3557
3558         /* Disable indicating checksum in descriptor, enables RSS hash */
3559         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3560         rxcsum |= IXGBE_RXCSUM_PCSD;
3561         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3562
3563         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3564                 if (adapter->ring_feature[RING_F_RSS].mask)
3565                         mrqc = IXGBE_MRQC_RSSEN;
3566         } else {
3567                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3568
3569                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3570                         if (tcs > 4)
3571                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3572                         else if (tcs > 1)
3573                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3574                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3575                                  IXGBE_82599_VMDQ_4Q_MASK)
3576                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3577                         else
3578                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3579                 } else {
3580                         if (tcs > 4)
3581                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3582                         else if (tcs > 1)
3583                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3584                         else
3585                                 mrqc = IXGBE_MRQC_RSSEN;
3586                 }
3587         }
3588
3589         /* Perform hash on these packet types */
3590         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3591                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3592                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3593                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3594
3595         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3596                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3597         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3598                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3599
3600         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3601         if ((hw->mac.type >= ixgbe_mac_X550) &&
3602             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3603                 unsigned int pf_pool = adapter->num_vfs;
3604
3605                 /* Enable VF RSS mode */
3606                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3607                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3608
3609                 /* Setup RSS through the VF registers */
3610                 ixgbe_setup_vfreta(adapter);
3611                 vfmrqc = IXGBE_MRQC_RSSEN;
3612                 vfmrqc |= rss_field;
3613                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3614         } else {
3615                 ixgbe_setup_reta(adapter);
3616                 mrqc |= rss_field;
3617                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3618         }
3619 }
3620
3621 /**
3622  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3623  * @adapter:    address of board private structure
3624  * @index:      index of ring to set
3625  **/
3626 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3627                                    struct ixgbe_ring *ring)
3628 {
3629         struct ixgbe_hw *hw = &adapter->hw;
3630         u32 rscctrl;
3631         u8 reg_idx = ring->reg_idx;
3632
3633         if (!ring_is_rsc_enabled(ring))
3634                 return;
3635
3636         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3637         rscctrl |= IXGBE_RSCCTL_RSCEN;
3638         /*
3639          * we must limit the number of descriptors so that the
3640          * total size of max desc * buf_len is not greater
3641          * than 65536
3642          */
3643         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3644         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3645 }
3646
3647 #define IXGBE_MAX_RX_DESC_POLL 10
3648 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3649                                        struct ixgbe_ring *ring)
3650 {
3651         struct ixgbe_hw *hw = &adapter->hw;
3652         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3653         u32 rxdctl;
3654         u8 reg_idx = ring->reg_idx;
3655
3656         if (ixgbe_removed(hw->hw_addr))
3657                 return;
3658         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3659         if (hw->mac.type == ixgbe_mac_82598EB &&
3660             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3661                 return;
3662
3663         do {
3664                 usleep_range(1000, 2000);
3665                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3666         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3667
3668         if (!wait_loop) {
3669                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3670                       "the polling period\n", reg_idx);
3671         }
3672 }
3673
3674 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3675                             struct ixgbe_ring *ring)
3676 {
3677         struct ixgbe_hw *hw = &adapter->hw;
3678         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3679         u32 rxdctl;
3680         u8 reg_idx = ring->reg_idx;
3681
3682         if (ixgbe_removed(hw->hw_addr))
3683                 return;
3684         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3685         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3686
3687         /* write value back with RXDCTL.ENABLE bit cleared */
3688         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3689
3690         if (hw->mac.type == ixgbe_mac_82598EB &&
3691             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3692                 return;
3693
3694         /* the hardware may take up to 100us to really disable the rx queue */
3695         do {
3696                 udelay(10);
3697                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3698         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3699
3700         if (!wait_loop) {
3701                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3702                       "the polling period\n", reg_idx);
3703         }
3704 }
3705
3706 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3707                              struct ixgbe_ring *ring)
3708 {
3709         struct ixgbe_hw *hw = &adapter->hw;
3710         u64 rdba = ring->dma;
3711         u32 rxdctl;
3712         u8 reg_idx = ring->reg_idx;
3713
3714         /* disable queue to avoid issues while updating state */
3715         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3716         ixgbe_disable_rx_queue(adapter, ring);
3717
3718         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3719         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3720         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3721                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3722         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3723         IXGBE_WRITE_FLUSH(hw);
3724
3725         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3726         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3727         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3728
3729         ixgbe_configure_srrctl(adapter, ring);
3730         ixgbe_configure_rscctl(adapter, ring);
3731
3732         if (hw->mac.type == ixgbe_mac_82598EB) {
3733                 /*
3734                  * enable cache line friendly hardware writes:
3735                  * PTHRESH=32 descriptors (half the internal cache),
3736                  * this also removes ugly rx_no_buffer_count increment
3737                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3738                  * WTHRESH=8 burst writeback up to two cache lines
3739                  */
3740                 rxdctl &= ~0x3FFFFF;
3741                 rxdctl |=  0x080420;
3742         }
3743
3744         /* enable receive descriptor ring */
3745         rxdctl |= IXGBE_RXDCTL_ENABLE;
3746         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3747
3748         ixgbe_rx_desc_queue_enable(adapter, ring);
3749         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3750 }
3751
3752 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3753 {
3754         struct ixgbe_hw *hw = &adapter->hw;
3755         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3756         u16 pool;
3757
3758         /* PSRTYPE must be initialized in non 82598 adapters */
3759         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3760                       IXGBE_PSRTYPE_UDPHDR |
3761                       IXGBE_PSRTYPE_IPV4HDR |
3762                       IXGBE_PSRTYPE_L2HDR |
3763                       IXGBE_PSRTYPE_IPV6HDR;
3764
3765         if (hw->mac.type == ixgbe_mac_82598EB)
3766                 return;
3767
3768         if (rss_i > 3)
3769                 psrtype |= 2u << 29;
3770         else if (rss_i > 1)
3771                 psrtype |= 1u << 29;
3772
3773         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3774                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3775 }
3776
3777 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3778 {
3779         struct ixgbe_hw *hw = &adapter->hw;
3780         u32 reg_offset, vf_shift;
3781         u32 gcr_ext, vmdctl;
3782         int i;
3783
3784         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3785                 return;
3786
3787         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3788         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3789         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3790         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3791         vmdctl |= IXGBE_VT_CTL_REPLEN;
3792         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3793
3794         vf_shift = VMDQ_P(0) % 32;
3795         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3796
3797         /* Enable only the PF's pool for Tx/Rx */
3798         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3799         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3800         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3801         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3802         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3803                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3804
3805         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3806         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3807
3808         /* clear VLAN promisc flag so VFTA will be updated if necessary */
3809         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3810
3811         /*
3812          * Set up VF register offsets for selected VT Mode,
3813          * i.e. 32 or 64 VFs for SR-IOV
3814          */
3815         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3816         case IXGBE_82599_VMDQ_8Q_MASK:
3817                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3818                 break;
3819         case IXGBE_82599_VMDQ_4Q_MASK:
3820                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3821                 break;
3822         default:
3823                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3824                 break;
3825         }
3826
3827         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3828
3829         for (i = 0; i < adapter->num_vfs; i++) {
3830                 /* configure spoof checking */
3831                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3832                                           adapter->vfinfo[i].spoofchk_enabled);
3833
3834                 /* Enable/Disable RSS query feature  */
3835                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3836                                           adapter->vfinfo[i].rss_query_enabled);
3837         }
3838 }
3839
3840 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3841 {
3842         struct ixgbe_hw *hw = &adapter->hw;
3843         struct net_device *netdev = adapter->netdev;
3844         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3845         struct ixgbe_ring *rx_ring;
3846         int i;
3847         u32 mhadd, hlreg0;
3848
3849 #ifdef IXGBE_FCOE
3850         /* adjust max frame to be able to do baby jumbo for FCoE */
3851         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3852             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3853                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3854
3855 #endif /* IXGBE_FCOE */
3856
3857         /* adjust max frame to be at least the size of a standard frame */
3858         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3859                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3860
3861         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3862         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3863                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3864                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3865
3866                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3867         }
3868
3869         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3870         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3871         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3872         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3873
3874         /*
3875          * Setup the HW Rx Head and Tail Descriptor Pointers and
3876          * the Base and Length of the Rx Descriptor Ring
3877          */
3878         for (i = 0; i < adapter->num_rx_queues; i++) {
3879                 rx_ring = adapter->rx_ring[i];
3880                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3881                         set_ring_rsc_enabled(rx_ring);
3882                 else
3883                         clear_ring_rsc_enabled(rx_ring);
3884         }
3885 }
3886
3887 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3888 {
3889         struct ixgbe_hw *hw = &adapter->hw;
3890         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3891
3892         switch (hw->mac.type) {
3893         case ixgbe_mac_82598EB:
3894                 /*
3895                  * For VMDq support of different descriptor types or
3896                  * buffer sizes through the use of multiple SRRCTL
3897                  * registers, RDRXCTL.MVMEN must be set to 1
3898                  *
3899                  * also, the manual doesn't mention it clearly but DCA hints
3900                  * will only use queue 0's tags unless this bit is set.  Side
3901                  * effects of setting this bit are only that SRRCTL must be
3902                  * fully programmed [0..15]
3903                  */
3904                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3905                 break;
3906         case ixgbe_mac_X550:
3907         case ixgbe_mac_X550EM_x:
3908         case ixgbe_mac_x550em_a:
3909                 if (adapter->num_vfs)
3910                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3911                 /* fall through for older HW */
3912         case ixgbe_mac_82599EB:
3913         case ixgbe_mac_X540:
3914                 /* Disable RSC for ACK packets */
3915                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3916                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3917                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3918                 /* hardware requires some bits to be set by default */
3919                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3920                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3921                 break;
3922         default:
3923                 /* We should do nothing since we don't know this hardware */
3924                 return;
3925         }
3926
3927         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3928 }
3929
3930 /**
3931  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3932  * @adapter: board private structure
3933  *
3934  * Configure the Rx unit of the MAC after a reset.
3935  **/
3936 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3937 {
3938         struct ixgbe_hw *hw = &adapter->hw;
3939         int i;
3940         u32 rxctrl, rfctl;
3941
3942         /* disable receives while setting up the descriptors */
3943         hw->mac.ops.disable_rx(hw);
3944
3945         ixgbe_setup_psrtype(adapter);
3946         ixgbe_setup_rdrxctl(adapter);
3947
3948         /* RSC Setup */
3949         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3950         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3951         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3952                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3953
3954         /* disable NFS filtering */
3955         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
3956         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3957
3958         /* Program registers for the distribution of queues */
3959         ixgbe_setup_mrqc(adapter);
3960
3961         /* set_rx_buffer_len must be called before ring initialization */
3962         ixgbe_set_rx_buffer_len(adapter);
3963
3964         /*
3965          * Setup the HW Rx Head and Tail Descriptor Pointers and
3966          * the Base and Length of the Rx Descriptor Ring
3967          */
3968         for (i = 0; i < adapter->num_rx_queues; i++)
3969                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3970
3971         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3972         /* disable drop enable for 82598 parts */
3973         if (hw->mac.type == ixgbe_mac_82598EB)
3974                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3975
3976         /* enable all receives */
3977         rxctrl |= IXGBE_RXCTRL_RXEN;
3978         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3979 }
3980
3981 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3982                                  __be16 proto, u16 vid)
3983 {
3984         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3985         struct ixgbe_hw *hw = &adapter->hw;
3986
3987         /* add VID to filter table */
3988         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3989                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3990
3991         set_bit(vid, adapter->active_vlans);
3992
3993         return 0;
3994 }
3995
3996 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3997 {
3998         u32 vlvf;
3999         int idx;
4000
4001         /* short cut the special case */
4002         if (vlan == 0)
4003                 return 0;
4004
4005         /* Search for the vlan id in the VLVF entries */
4006         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4007                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4008                 if ((vlvf & VLAN_VID_MASK) == vlan)
4009                         break;
4010         }
4011
4012         return idx;
4013 }
4014
4015 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4016 {
4017         struct ixgbe_hw *hw = &adapter->hw;
4018         u32 bits, word;
4019         int idx;
4020
4021         idx = ixgbe_find_vlvf_entry(hw, vid);
4022         if (!idx)
4023                 return;
4024
4025         /* See if any other pools are set for this VLAN filter
4026          * entry other than the PF.
4027          */
4028         word = idx * 2 + (VMDQ_P(0) / 32);
4029         bits = ~BIT(VMDQ_P(0) % 32);
4030         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4031
4032         /* Disable the filter so this falls into the default pool. */
4033         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4034                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4035                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4036                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4037         }
4038 }
4039
4040 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4041                                   __be16 proto, u16 vid)
4042 {
4043         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4044         struct ixgbe_hw *hw = &adapter->hw;
4045
4046         /* remove VID from filter table */
4047         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4048                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4049
4050         clear_bit(vid, adapter->active_vlans);
4051
4052         return 0;
4053 }
4054
4055 /**
4056  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4057  * @adapter: driver data
4058  */
4059 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4060 {
4061         struct ixgbe_hw *hw = &adapter->hw;
4062         u32 vlnctrl;
4063         int i, j;
4064
4065         switch (hw->mac.type) {
4066         case ixgbe_mac_82598EB:
4067                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4068                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4069                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4070                 break;
4071         case ixgbe_mac_82599EB:
4072         case ixgbe_mac_X540:
4073         case ixgbe_mac_X550:
4074         case ixgbe_mac_X550EM_x:
4075         case ixgbe_mac_x550em_a:
4076                 for (i = 0; i < adapter->num_rx_queues; i++) {
4077                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4078
4079                         if (ring->l2_accel_priv)
4080                                 continue;
4081                         j = ring->reg_idx;
4082                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4083                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4084                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4085                 }
4086                 break;
4087         default:
4088                 break;
4089         }
4090 }
4091
4092 /**
4093  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4094  * @adapter: driver data
4095  */
4096 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4097 {
4098         struct ixgbe_hw *hw = &adapter->hw;
4099         u32 vlnctrl;
4100         int i, j;
4101
4102         switch (hw->mac.type) {
4103         case ixgbe_mac_82598EB:
4104                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4105                 vlnctrl |= IXGBE_VLNCTRL_VME;
4106                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4107                 break;
4108         case ixgbe_mac_82599EB:
4109         case ixgbe_mac_X540:
4110         case ixgbe_mac_X550:
4111         case ixgbe_mac_X550EM_x:
4112         case ixgbe_mac_x550em_a:
4113                 for (i = 0; i < adapter->num_rx_queues; i++) {
4114                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4115
4116                         if (ring->l2_accel_priv)
4117                                 continue;
4118                         j = ring->reg_idx;
4119                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4120                         vlnctrl |= IXGBE_RXDCTL_VME;
4121                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4122                 }
4123                 break;
4124         default:
4125                 break;
4126         }
4127 }
4128
4129 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4130 {
4131         struct ixgbe_hw *hw = &adapter->hw;
4132         u32 vlnctrl, i;
4133
4134         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4135
4136         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4137         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4138                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4139                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4140         } else {
4141                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4142                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4143                 return;
4144         }
4145
4146         /* Nothing to do for 82598 */
4147         if (hw->mac.type == ixgbe_mac_82598EB)
4148                 return;
4149
4150         /* We are already in VLAN promisc, nothing to do */
4151         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4152                 return;
4153
4154         /* Set flag so we don't redo unnecessary work */
4155         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4156
4157         /* Add PF to all active pools */
4158         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4159                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4160                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4161
4162                 vlvfb |= BIT(VMDQ_P(0) % 32);
4163                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4164         }
4165
4166         /* Set all bits in the VLAN filter table array */
4167         for (i = hw->mac.vft_size; i--;)
4168                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4169 }
4170
4171 #define VFTA_BLOCK_SIZE 8
4172 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4173 {
4174         struct ixgbe_hw *hw = &adapter->hw;
4175         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4176         u32 vid_start = vfta_offset * 32;
4177         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4178         u32 i, vid, word, bits;
4179
4180         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4181                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4182
4183                 /* pull VLAN ID from VLVF */
4184                 vid = vlvf & VLAN_VID_MASK;
4185
4186                 /* only concern outselves with a certain range */
4187                 if (vid < vid_start || vid >= vid_end)
4188                         continue;
4189
4190                 if (vlvf) {
4191                         /* record VLAN ID in VFTA */
4192                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4193
4194                         /* if PF is part of this then continue */
4195                         if (test_bit(vid, adapter->active_vlans))
4196                                 continue;
4197                 }
4198
4199                 /* remove PF from the pool */
4200                 word = i * 2 + VMDQ_P(0) / 32;
4201                 bits = ~BIT(VMDQ_P(0) % 32);
4202                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4203                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4204         }
4205
4206         /* extract values from active_vlans and write back to VFTA */
4207         for (i = VFTA_BLOCK_SIZE; i--;) {
4208                 vid = (vfta_offset + i) * 32;
4209                 word = vid / BITS_PER_LONG;
4210                 bits = vid % BITS_PER_LONG;
4211
4212                 vfta[i] |= adapter->active_vlans[word] >> bits;
4213
4214                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4215         }
4216 }
4217
4218 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4219 {
4220         struct ixgbe_hw *hw = &adapter->hw;
4221         u32 vlnctrl, i;
4222
4223         /* Set VLAN filtering to enabled */
4224         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4225         vlnctrl |= IXGBE_VLNCTRL_VFE;
4226         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4227
4228         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4229             hw->mac.type == ixgbe_mac_82598EB)
4230                 return;
4231
4232         /* We are not in VLAN promisc, nothing to do */
4233         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4234                 return;
4235
4236         /* Set flag so we don't redo unnecessary work */
4237         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4238
4239         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4240                 ixgbe_scrub_vfta(adapter, i);
4241 }
4242
4243 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4244 {
4245         u16 vid = 1;
4246
4247         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4248
4249         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4250                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4251 }
4252
4253 /**
4254  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4255  * @netdev: network interface device structure
4256  *
4257  * Writes multicast address list to the MTA hash table.
4258  * Returns: -ENOMEM on failure
4259  *                0 on no addresses written
4260  *                X on writing X addresses to MTA
4261  **/
4262 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4263 {
4264         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4265         struct ixgbe_hw *hw = &adapter->hw;
4266
4267         if (!netif_running(netdev))
4268                 return 0;
4269
4270         if (hw->mac.ops.update_mc_addr_list)
4271                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4272         else
4273                 return -ENOMEM;
4274
4275 #ifdef CONFIG_PCI_IOV
4276         ixgbe_restore_vf_multicasts(adapter);
4277 #endif
4278
4279         return netdev_mc_count(netdev);
4280 }
4281
4282 #ifdef CONFIG_PCI_IOV
4283 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4284 {
4285         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4286         struct ixgbe_hw *hw = &adapter->hw;
4287         int i;
4288
4289         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4290                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4291
4292                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4293                         hw->mac.ops.set_rar(hw, i,
4294                                             mac_table->addr,
4295                                             mac_table->pool,
4296                                             IXGBE_RAH_AV);
4297                 else
4298                         hw->mac.ops.clear_rar(hw, i);
4299         }
4300 }
4301
4302 #endif
4303 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4304 {
4305         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4306         struct ixgbe_hw *hw = &adapter->hw;
4307         int i;
4308
4309         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4310                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4311                         continue;
4312
4313                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4314
4315                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4316                         hw->mac.ops.set_rar(hw, i,
4317                                             mac_table->addr,
4318                                             mac_table->pool,
4319                                             IXGBE_RAH_AV);
4320                 else
4321                         hw->mac.ops.clear_rar(hw, i);
4322         }
4323 }
4324
4325 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4326 {
4327         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4328         struct ixgbe_hw *hw = &adapter->hw;
4329         int i;
4330
4331         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4332                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4333                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4334         }
4335
4336         ixgbe_sync_mac_table(adapter);
4337 }
4338
4339 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4340 {
4341         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4342         struct ixgbe_hw *hw = &adapter->hw;
4343         int i, count = 0;
4344
4345         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4346                 /* do not count default RAR as available */
4347                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4348                         continue;
4349
4350                 /* only count unused and addresses that belong to us */
4351                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4352                         if (mac_table->pool != pool)
4353                                 continue;
4354                 }
4355
4356                 count++;
4357         }
4358
4359         return count;
4360 }
4361
4362 /* this function destroys the first RAR entry */
4363 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4364 {
4365         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4366         struct ixgbe_hw *hw = &adapter->hw;
4367
4368         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4369         mac_table->pool = VMDQ_P(0);
4370
4371         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4372
4373         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4374                             IXGBE_RAH_AV);
4375 }
4376
4377 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4378                          const u8 *addr, u16 pool)
4379 {
4380         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4381         struct ixgbe_hw *hw = &adapter->hw;
4382         int i;
4383
4384         if (is_zero_ether_addr(addr))
4385                 return -EINVAL;
4386
4387         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4388                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4389                         continue;
4390
4391                 ether_addr_copy(mac_table->addr, addr);
4392                 mac_table->pool = pool;
4393
4394                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4395                                     IXGBE_MAC_STATE_IN_USE;
4396
4397                 ixgbe_sync_mac_table(adapter);
4398
4399                 return i;
4400         }
4401
4402         return -ENOMEM;
4403 }
4404
4405 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4406                          const u8 *addr, u16 pool)
4407 {
4408         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4409         struct ixgbe_hw *hw = &adapter->hw;
4410         int i;
4411
4412         if (is_zero_ether_addr(addr))
4413                 return -EINVAL;
4414
4415         /* search table for addr, if found clear IN_USE flag and sync */
4416         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4417                 /* we can only delete an entry if it is in use */
4418                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4419                         continue;
4420                 /* we only care about entries that belong to the given pool */
4421                 if (mac_table->pool != pool)
4422                         continue;
4423                 /* we only care about a specific MAC address */
4424                 if (!ether_addr_equal(addr, mac_table->addr))
4425                         continue;
4426
4427                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4428                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4429
4430                 ixgbe_sync_mac_table(adapter);
4431
4432                 return 0;
4433         }
4434
4435         return -ENOMEM;
4436 }
4437 /**
4438  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4439  * @netdev: network interface device structure
4440  *
4441  * Writes unicast address list to the RAR table.
4442  * Returns: -ENOMEM on failure/insufficient address space
4443  *                0 on no addresses written
4444  *                X on writing X addresses to the RAR table
4445  **/
4446 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4447 {
4448         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4449         int count = 0;
4450
4451         /* return ENOMEM indicating insufficient memory for addresses */
4452         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4453                 return -ENOMEM;
4454
4455         if (!netdev_uc_empty(netdev)) {
4456                 struct netdev_hw_addr *ha;
4457                 netdev_for_each_uc_addr(ha, netdev) {
4458                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4459                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4460                         count++;
4461                 }
4462         }
4463         return count;
4464 }
4465
4466 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4467 {
4468         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4469         int ret;
4470
4471         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4472
4473         return min_t(int, ret, 0);
4474 }
4475
4476 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4477 {
4478         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4479
4480         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4481
4482         return 0;
4483 }
4484
4485 /**
4486  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4487  * @netdev: network interface device structure
4488  *
4489  * The set_rx_method entry point is called whenever the unicast/multicast
4490  * address list or the network interface flags are updated.  This routine is
4491  * responsible for configuring the hardware for proper unicast, multicast and
4492  * promiscuous mode.
4493  **/
4494 void ixgbe_set_rx_mode(struct net_device *netdev)
4495 {
4496         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4497         struct ixgbe_hw *hw = &adapter->hw;
4498         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4499         netdev_features_t features = netdev->features;
4500         int count;
4501
4502         /* Check for Promiscuous and All Multicast modes */
4503         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4504
4505         /* set all bits that we expect to always be set */
4506         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4507         fctrl |= IXGBE_FCTRL_BAM;
4508         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4509         fctrl |= IXGBE_FCTRL_PMCF;
4510
4511         /* clear the bits we are changing the status of */
4512         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4513         if (netdev->flags & IFF_PROMISC) {
4514                 hw->addr_ctrl.user_set_promisc = true;
4515                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4516                 vmolr |= IXGBE_VMOLR_MPE;
4517                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4518         } else {
4519                 if (netdev->flags & IFF_ALLMULTI) {
4520                         fctrl |= IXGBE_FCTRL_MPE;
4521                         vmolr |= IXGBE_VMOLR_MPE;
4522                 }
4523                 hw->addr_ctrl.user_set_promisc = false;
4524         }
4525
4526         /*
4527          * Write addresses to available RAR registers, if there is not
4528          * sufficient space to store all the addresses then enable
4529          * unicast promiscuous mode
4530          */
4531         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4532                 fctrl |= IXGBE_FCTRL_UPE;
4533                 vmolr |= IXGBE_VMOLR_ROPE;
4534         }
4535
4536         /* Write addresses to the MTA, if the attempt fails
4537          * then we should just turn on promiscuous mode so
4538          * that we can at least receive multicast traffic
4539          */
4540         count = ixgbe_write_mc_addr_list(netdev);
4541         if (count < 0) {
4542                 fctrl |= IXGBE_FCTRL_MPE;
4543                 vmolr |= IXGBE_VMOLR_MPE;
4544         } else if (count) {
4545                 vmolr |= IXGBE_VMOLR_ROMPE;
4546         }
4547
4548         if (hw->mac.type != ixgbe_mac_82598EB) {
4549                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4550                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4551                            IXGBE_VMOLR_ROPE);
4552                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4553         }
4554
4555         /* This is useful for sniffing bad packets. */
4556         if (features & NETIF_F_RXALL) {
4557                 /* UPE and MPE will be handled by normal PROMISC logic
4558                  * in e1000e_set_rx_mode */
4559                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4560                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4561                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4562
4563                 fctrl &= ~(IXGBE_FCTRL_DPF);
4564                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4565         }
4566
4567         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4568
4569         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4570                 ixgbe_vlan_strip_enable(adapter);
4571         else
4572                 ixgbe_vlan_strip_disable(adapter);
4573
4574         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4575                 ixgbe_vlan_promisc_disable(adapter);
4576         else
4577                 ixgbe_vlan_promisc_enable(adapter);
4578 }
4579
4580 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4581 {
4582         int q_idx;
4583
4584         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4585                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4586                 napi_enable(&adapter->q_vector[q_idx]->napi);
4587         }
4588 }
4589
4590 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4591 {
4592         int q_idx;
4593
4594         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4595                 napi_disable(&adapter->q_vector[q_idx]->napi);
4596                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4597                         pr_info("QV %d locked\n", q_idx);
4598                         usleep_range(1000, 20000);
4599                 }
4600         }
4601 }
4602
4603 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4604 {
4605         struct ixgbe_hw *hw = &adapter->hw;
4606         u32 vxlanctrl;
4607
4608         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4609                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4610                 return;
4611
4612         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4613         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4614
4615         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4616                 adapter->vxlan_port = 0;
4617
4618         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4619                 adapter->geneve_port = 0;
4620 }
4621
4622 #ifdef CONFIG_IXGBE_DCB
4623 /**
4624  * ixgbe_configure_dcb - Configure DCB hardware
4625  * @adapter: ixgbe adapter struct
4626  *
4627  * This is called by the driver on open to configure the DCB hardware.
4628  * This is also called by the gennetlink interface when reconfiguring
4629  * the DCB state.
4630  */
4631 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4632 {
4633         struct ixgbe_hw *hw = &adapter->hw;
4634         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4635
4636         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4637                 if (hw->mac.type == ixgbe_mac_82598EB)
4638                         netif_set_gso_max_size(adapter->netdev, 65536);
4639                 return;
4640         }
4641
4642         if (hw->mac.type == ixgbe_mac_82598EB)
4643                 netif_set_gso_max_size(adapter->netdev, 32768);
4644
4645 #ifdef IXGBE_FCOE
4646         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4647                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4648 #endif
4649
4650         /* reconfigure the hardware */
4651         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4652                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4653                                                 DCB_TX_CONFIG);
4654                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4655                                                 DCB_RX_CONFIG);
4656                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4657         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4658                 ixgbe_dcb_hw_ets(&adapter->hw,
4659                                  adapter->ixgbe_ieee_ets,
4660                                  max_frame);
4661                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4662                                         adapter->ixgbe_ieee_pfc->pfc_en,
4663                                         adapter->ixgbe_ieee_ets->prio_tc);
4664         }
4665
4666         /* Enable RSS Hash per TC */
4667         if (hw->mac.type != ixgbe_mac_82598EB) {
4668                 u32 msb = 0;
4669                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4670
4671                 while (rss_i) {
4672                         msb++;
4673                         rss_i >>= 1;
4674                 }
4675
4676                 /* write msb to all 8 TCs in one write */
4677                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4678         }
4679 }
4680 #endif
4681
4682 /* Additional bittime to account for IXGBE framing */
4683 #define IXGBE_ETH_FRAMING 20
4684
4685 /**
4686  * ixgbe_hpbthresh - calculate high water mark for flow control
4687  *
4688  * @adapter: board private structure to calculate for
4689  * @pb: packet buffer to calculate
4690  */
4691 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4692 {
4693         struct ixgbe_hw *hw = &adapter->hw;
4694         struct net_device *dev = adapter->netdev;
4695         int link, tc, kb, marker;
4696         u32 dv_id, rx_pba;
4697
4698         /* Calculate max LAN frame size */
4699         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4700
4701 #ifdef IXGBE_FCOE
4702         /* FCoE traffic class uses FCOE jumbo frames */
4703         if ((dev->features & NETIF_F_FCOE_MTU) &&
4704             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4705             (pb == ixgbe_fcoe_get_tc(adapter)))
4706                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4707 #endif
4708
4709         /* Calculate delay value for device */
4710         switch (hw->mac.type) {
4711         case ixgbe_mac_X540:
4712         case ixgbe_mac_X550:
4713         case ixgbe_mac_X550EM_x:
4714         case ixgbe_mac_x550em_a:
4715                 dv_id = IXGBE_DV_X540(link, tc);
4716                 break;
4717         default:
4718                 dv_id = IXGBE_DV(link, tc);
4719                 break;
4720         }
4721
4722         /* Loopback switch introduces additional latency */
4723         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4724                 dv_id += IXGBE_B2BT(tc);
4725
4726         /* Delay value is calculated in bit times convert to KB */
4727         kb = IXGBE_BT2KB(dv_id);
4728         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4729
4730         marker = rx_pba - kb;
4731
4732         /* It is possible that the packet buffer is not large enough
4733          * to provide required headroom. In this case throw an error
4734          * to user and a do the best we can.
4735          */
4736         if (marker < 0) {
4737                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4738                             "headroom to support flow control."
4739                             "Decrease MTU or number of traffic classes\n", pb);
4740                 marker = tc + 1;
4741         }
4742
4743         return marker;
4744 }
4745
4746 /**
4747  * ixgbe_lpbthresh - calculate low water mark for for flow control
4748  *
4749  * @adapter: board private structure to calculate for
4750  * @pb: packet buffer to calculate
4751  */
4752 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4753 {
4754         struct ixgbe_hw *hw = &adapter->hw;
4755         struct net_device *dev = adapter->netdev;
4756         int tc;
4757         u32 dv_id;
4758
4759         /* Calculate max LAN frame size */
4760         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4761
4762 #ifdef IXGBE_FCOE
4763         /* FCoE traffic class uses FCOE jumbo frames */
4764         if ((dev->features & NETIF_F_FCOE_MTU) &&
4765             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4766             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4767                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4768 #endif
4769
4770         /* Calculate delay value for device */
4771         switch (hw->mac.type) {
4772         case ixgbe_mac_X540:
4773         case ixgbe_mac_X550:
4774         case ixgbe_mac_X550EM_x:
4775         case ixgbe_mac_x550em_a:
4776                 dv_id = IXGBE_LOW_DV_X540(tc);
4777                 break;
4778         default:
4779                 dv_id = IXGBE_LOW_DV(tc);
4780                 break;
4781         }
4782
4783         /* Delay value is calculated in bit times convert to KB */
4784         return IXGBE_BT2KB(dv_id);
4785 }
4786
4787 /*
4788  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4789  */
4790 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4791 {
4792         struct ixgbe_hw *hw = &adapter->hw;
4793         int num_tc = netdev_get_num_tc(adapter->netdev);
4794         int i;
4795
4796         if (!num_tc)
4797                 num_tc = 1;
4798
4799         for (i = 0; i < num_tc; i++) {
4800                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4801                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4802
4803                 /* Low water marks must not be larger than high water marks */
4804                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4805                         hw->fc.low_water[i] = 0;
4806         }
4807
4808         for (; i < MAX_TRAFFIC_CLASS; i++)
4809                 hw->fc.high_water[i] = 0;
4810 }
4811
4812 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4813 {
4814         struct ixgbe_hw *hw = &adapter->hw;
4815         int hdrm;
4816         u8 tc = netdev_get_num_tc(adapter->netdev);
4817
4818         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4819             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4820                 hdrm = 32 << adapter->fdir_pballoc;
4821         else
4822                 hdrm = 0;
4823
4824         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4825         ixgbe_pbthresh_setup(adapter);
4826 }
4827
4828 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4829 {
4830         struct ixgbe_hw *hw = &adapter->hw;
4831         struct hlist_node *node2;
4832         struct ixgbe_fdir_filter *filter;
4833
4834         spin_lock(&adapter->fdir_perfect_lock);
4835
4836         if (!hlist_empty(&adapter->fdir_filter_list))
4837                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4838
4839         hlist_for_each_entry_safe(filter, node2,
4840                                   &adapter->fdir_filter_list, fdir_node) {
4841                 ixgbe_fdir_write_perfect_filter_82599(hw,
4842                                 &filter->filter,
4843                                 filter->sw_idx,
4844                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4845                                 IXGBE_FDIR_DROP_QUEUE :
4846                                 adapter->rx_ring[filter->action]->reg_idx);
4847         }
4848
4849         spin_unlock(&adapter->fdir_perfect_lock);
4850 }
4851
4852 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4853                                       struct ixgbe_adapter *adapter)
4854 {
4855         struct ixgbe_hw *hw = &adapter->hw;
4856         u32 vmolr;
4857
4858         /* No unicast promiscuous support for VMDQ devices. */
4859         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4860         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4861
4862         /* clear the affected bit */
4863         vmolr &= ~IXGBE_VMOLR_MPE;
4864
4865         if (dev->flags & IFF_ALLMULTI) {
4866                 vmolr |= IXGBE_VMOLR_MPE;
4867         } else {
4868                 vmolr |= IXGBE_VMOLR_ROMPE;
4869                 hw->mac.ops.update_mc_addr_list(hw, dev);
4870         }
4871         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4872         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4873 }
4874
4875 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4876 {
4877         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4878         int rss_i = adapter->num_rx_queues_per_pool;
4879         struct ixgbe_hw *hw = &adapter->hw;
4880         u16 pool = vadapter->pool;
4881         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4882                       IXGBE_PSRTYPE_UDPHDR |
4883                       IXGBE_PSRTYPE_IPV4HDR |
4884                       IXGBE_PSRTYPE_L2HDR |
4885                       IXGBE_PSRTYPE_IPV6HDR;
4886
4887         if (hw->mac.type == ixgbe_mac_82598EB)
4888                 return;
4889
4890         if (rss_i > 3)
4891                 psrtype |= 2u << 29;
4892         else if (rss_i > 1)
4893                 psrtype |= 1u << 29;
4894
4895         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4896 }
4897
4898 /**
4899  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4900  * @rx_ring: ring to free buffers from
4901  **/
4902 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4903 {
4904         struct device *dev = rx_ring->dev;
4905         unsigned long size;
4906         u16 i;
4907
4908         /* ring already cleared, nothing to do */
4909         if (!rx_ring->rx_buffer_info)
4910                 return;
4911
4912         /* Free all the Rx ring sk_buffs */
4913         for (i = 0; i < rx_ring->count; i++) {
4914                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4915
4916                 if (rx_buffer->skb) {
4917                         struct sk_buff *skb = rx_buffer->skb;
4918                         if (IXGBE_CB(skb)->page_released)
4919                                 dma_unmap_page(dev,
4920                                                IXGBE_CB(skb)->dma,
4921                                                ixgbe_rx_bufsz(rx_ring),
4922                                                DMA_FROM_DEVICE);
4923                         dev_kfree_skb(skb);
4924                         rx_buffer->skb = NULL;
4925                 }
4926
4927                 if (!rx_buffer->page)
4928                         continue;
4929
4930                 dma_unmap_page(dev, rx_buffer->dma,
4931                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4932                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4933
4934                 rx_buffer->page = NULL;
4935         }
4936
4937         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4938         memset(rx_ring->rx_buffer_info, 0, size);
4939
4940         /* Zero out the descriptor ring */
4941         memset(rx_ring->desc, 0, rx_ring->size);
4942
4943         rx_ring->next_to_alloc = 0;
4944         rx_ring->next_to_clean = 0;
4945         rx_ring->next_to_use = 0;
4946 }
4947
4948 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4949                                    struct ixgbe_ring *rx_ring)
4950 {
4951         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4952         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4953
4954         /* shutdown specific queue receive and wait for dma to settle */
4955         ixgbe_disable_rx_queue(adapter, rx_ring);
4956         usleep_range(10000, 20000);
4957         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4958         ixgbe_clean_rx_ring(rx_ring);
4959         rx_ring->l2_accel_priv = NULL;
4960 }
4961
4962 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4963                                struct ixgbe_fwd_adapter *accel)
4964 {
4965         struct ixgbe_adapter *adapter = accel->real_adapter;
4966         unsigned int rxbase = accel->rx_base_queue;
4967         unsigned int txbase = accel->tx_base_queue;
4968         int i;
4969
4970         netif_tx_stop_all_queues(vdev);
4971
4972         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4973                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4974                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4975         }
4976
4977         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4978                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4979                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4980         }
4981
4982
4983         return 0;
4984 }
4985
4986 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4987                              struct ixgbe_fwd_adapter *accel)
4988 {
4989         struct ixgbe_adapter *adapter = accel->real_adapter;
4990         unsigned int rxbase, txbase, queues;
4991         int i, baseq, err = 0;
4992
4993         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4994                 return 0;
4995
4996         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4997         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4998                    accel->pool, adapter->num_rx_pools,
4999                    baseq, baseq + adapter->num_rx_queues_per_pool,
5000                    adapter->fwd_bitmask);
5001
5002         accel->netdev = vdev;
5003         accel->rx_base_queue = rxbase = baseq;
5004         accel->tx_base_queue = txbase = baseq;
5005
5006         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5007                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5008
5009         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5010                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5011                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5012                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5013         }
5014
5015         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5016                 adapter->tx_ring[txbase + i]->netdev = vdev;
5017                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5018         }
5019
5020         queues = min_t(unsigned int,
5021                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5022         err = netif_set_real_num_tx_queues(vdev, queues);
5023         if (err)
5024                 goto fwd_queue_err;
5025
5026         err = netif_set_real_num_rx_queues(vdev, queues);
5027         if (err)
5028                 goto fwd_queue_err;
5029
5030         if (is_valid_ether_addr(vdev->dev_addr))
5031                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5032
5033         ixgbe_fwd_psrtype(accel);
5034         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5035         return err;
5036 fwd_queue_err:
5037         ixgbe_fwd_ring_down(vdev, accel);
5038         return err;
5039 }
5040
5041 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5042 {
5043         if (netif_is_macvlan(upper)) {
5044                 struct macvlan_dev *dfwd = netdev_priv(upper);
5045                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5046
5047                 if (dfwd->fwd_priv)
5048                         ixgbe_fwd_ring_up(upper, vadapter);
5049         }
5050
5051         return 0;
5052 }
5053
5054 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5055 {
5056         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5057                                       ixgbe_upper_dev_walk, NULL);
5058 }
5059
5060 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5061 {
5062         struct ixgbe_hw *hw = &adapter->hw;
5063
5064         ixgbe_configure_pb(adapter);
5065 #ifdef CONFIG_IXGBE_DCB
5066         ixgbe_configure_dcb(adapter);
5067 #endif
5068         /*
5069          * We must restore virtualization before VLANs or else
5070          * the VLVF registers will not be populated
5071          */
5072         ixgbe_configure_virtualization(adapter);
5073
5074         ixgbe_set_rx_mode(adapter->netdev);
5075         ixgbe_restore_vlan(adapter);
5076
5077         switch (hw->mac.type) {
5078         case ixgbe_mac_82599EB:
5079         case ixgbe_mac_X540:
5080                 hw->mac.ops.disable_rx_buff(hw);
5081                 break;
5082         default:
5083                 break;
5084         }
5085
5086         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5087                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5088                                                 adapter->fdir_pballoc);
5089         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5090                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5091                                               adapter->fdir_pballoc);
5092                 ixgbe_fdir_filter_restore(adapter);
5093         }
5094
5095         switch (hw->mac.type) {
5096         case ixgbe_mac_82599EB:
5097         case ixgbe_mac_X540:
5098                 hw->mac.ops.enable_rx_buff(hw);
5099                 break;
5100         default:
5101                 break;
5102         }
5103
5104 #ifdef CONFIG_IXGBE_DCA
5105         /* configure DCA */
5106         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5107                 ixgbe_setup_dca(adapter);
5108 #endif /* CONFIG_IXGBE_DCA */
5109
5110 #ifdef IXGBE_FCOE
5111         /* configure FCoE L2 filters, redirection table, and Rx control */
5112         ixgbe_configure_fcoe(adapter);
5113
5114 #endif /* IXGBE_FCOE */
5115         ixgbe_configure_tx(adapter);
5116         ixgbe_configure_rx(adapter);
5117         ixgbe_configure_dfwd(adapter);
5118 }
5119
5120 /**
5121  * ixgbe_sfp_link_config - set up SFP+ link
5122  * @adapter: pointer to private adapter struct
5123  **/
5124 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5125 {
5126         /*
5127          * We are assuming the worst case scenario here, and that
5128          * is that an SFP was inserted/removed after the reset
5129          * but before SFP detection was enabled.  As such the best
5130          * solution is to just start searching as soon as we start
5131          */
5132         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5133                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5134
5135         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5136         adapter->sfp_poll_time = 0;
5137 }
5138
5139 /**
5140  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5141  * @hw: pointer to private hardware struct
5142  *
5143  * Returns 0 on success, negative on failure
5144  **/
5145 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5146 {
5147         u32 speed;
5148         bool autoneg, link_up = false;
5149         int ret = IXGBE_ERR_LINK_SETUP;
5150
5151         if (hw->mac.ops.check_link)
5152                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5153
5154         if (ret)
5155                 return ret;
5156
5157         speed = hw->phy.autoneg_advertised;
5158         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5159                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5160                                                         &autoneg);
5161         if (ret)
5162                 return ret;
5163
5164         if (hw->mac.ops.setup_link)
5165                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5166
5167         return ret;
5168 }
5169
5170 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5171 {
5172         struct ixgbe_hw *hw = &adapter->hw;
5173         u32 gpie = 0;
5174
5175         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5176                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5177                        IXGBE_GPIE_OCD;
5178                 gpie |= IXGBE_GPIE_EIAME;
5179                 /*
5180                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5181                  * this saves a register write for every interrupt
5182                  */
5183                 switch (hw->mac.type) {
5184                 case ixgbe_mac_82598EB:
5185                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5186                         break;
5187                 case ixgbe_mac_82599EB:
5188                 case ixgbe_mac_X540:
5189                 case ixgbe_mac_X550:
5190                 case ixgbe_mac_X550EM_x:
5191                 case ixgbe_mac_x550em_a:
5192                 default:
5193                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5194                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5195                         break;
5196                 }
5197         } else {
5198                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5199                  * specifically only auto mask tx and rx interrupts */
5200                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5201         }
5202
5203         /* XXX: to interrupt immediately for EICS writes, enable this */
5204         /* gpie |= IXGBE_GPIE_EIMEN; */
5205
5206         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5207                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5208
5209                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5210                 case IXGBE_82599_VMDQ_8Q_MASK:
5211                         gpie |= IXGBE_GPIE_VTMODE_16;
5212                         break;
5213                 case IXGBE_82599_VMDQ_4Q_MASK:
5214                         gpie |= IXGBE_GPIE_VTMODE_32;
5215                         break;
5216                 default:
5217                         gpie |= IXGBE_GPIE_VTMODE_64;
5218                         break;
5219                 }
5220         }
5221
5222         /* Enable Thermal over heat sensor interrupt */
5223         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5224                 switch (adapter->hw.mac.type) {
5225                 case ixgbe_mac_82599EB:
5226                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5227                         break;
5228                 default:
5229                         break;
5230                 }
5231         }
5232
5233         /* Enable fan failure interrupt */
5234         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5235                 gpie |= IXGBE_SDP1_GPIEN(hw);
5236
5237         switch (hw->mac.type) {
5238         case ixgbe_mac_82599EB:
5239                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5240                 break;
5241         case ixgbe_mac_X550EM_x:
5242         case ixgbe_mac_x550em_a:
5243                 gpie |= IXGBE_SDP0_GPIEN_X540;
5244                 break;
5245         default:
5246                 break;
5247         }
5248
5249         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5250 }
5251
5252 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5253 {
5254         struct ixgbe_hw *hw = &adapter->hw;
5255         int err;
5256         u32 ctrl_ext;
5257
5258         ixgbe_get_hw_control(adapter);
5259         ixgbe_setup_gpie(adapter);
5260
5261         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5262                 ixgbe_configure_msix(adapter);
5263         else
5264                 ixgbe_configure_msi_and_legacy(adapter);
5265
5266         /* enable the optics for 82599 SFP+ fiber */
5267         if (hw->mac.ops.enable_tx_laser)
5268                 hw->mac.ops.enable_tx_laser(hw);
5269
5270         if (hw->phy.ops.set_phy_power)
5271                 hw->phy.ops.set_phy_power(hw, true);
5272
5273         smp_mb__before_atomic();
5274         clear_bit(__IXGBE_DOWN, &adapter->state);
5275         ixgbe_napi_enable_all(adapter);
5276
5277         if (ixgbe_is_sfp(hw)) {
5278                 ixgbe_sfp_link_config(adapter);
5279         } else {
5280                 err = ixgbe_non_sfp_link_config(hw);
5281                 if (err)
5282                         e_err(probe, "link_config FAILED %d\n", err);
5283         }
5284
5285         /* clear any pending interrupts, may auto mask */
5286         IXGBE_READ_REG(hw, IXGBE_EICR);
5287         ixgbe_irq_enable(adapter, true, true);
5288
5289         /*
5290          * If this adapter has a fan, check to see if we had a failure
5291          * before we enabled the interrupt.
5292          */
5293         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5294                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5295                 if (esdp & IXGBE_ESDP_SDP1)
5296                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5297         }
5298
5299         /* bring the link up in the watchdog, this could race with our first
5300          * link up interrupt but shouldn't be a problem */
5301         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5302         adapter->link_check_timeout = jiffies;
5303         mod_timer(&adapter->service_timer, jiffies);
5304
5305         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5306         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5307         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5308         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5309 }
5310
5311 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5312 {
5313         WARN_ON(in_interrupt());
5314         /* put off any impending NetWatchDogTimeout */
5315         netif_trans_update(adapter->netdev);
5316
5317         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5318                 usleep_range(1000, 2000);
5319         if (adapter->hw.phy.type == ixgbe_phy_fw)
5320                 ixgbe_watchdog_link_is_down(adapter);
5321         ixgbe_down(adapter);
5322         /*
5323          * If SR-IOV enabled then wait a bit before bringing the adapter
5324          * back up to give the VFs time to respond to the reset.  The
5325          * two second wait is based upon the watchdog timer cycle in
5326          * the VF driver.
5327          */
5328         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5329                 msleep(2000);
5330         ixgbe_up(adapter);
5331         clear_bit(__IXGBE_RESETTING, &adapter->state);
5332 }
5333
5334 void ixgbe_up(struct ixgbe_adapter *adapter)
5335 {
5336         /* hardware has been reset, we need to reload some things */
5337         ixgbe_configure(adapter);
5338
5339         ixgbe_up_complete(adapter);
5340 }
5341
5342 void ixgbe_reset(struct ixgbe_adapter *adapter)
5343 {
5344         struct ixgbe_hw *hw = &adapter->hw;
5345         struct net_device *netdev = adapter->netdev;
5346         int err;
5347
5348         if (ixgbe_removed(hw->hw_addr))
5349                 return;
5350         /* lock SFP init bit to prevent race conditions with the watchdog */
5351         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5352                 usleep_range(1000, 2000);
5353
5354         /* clear all SFP and link config related flags while holding SFP_INIT */
5355         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5356                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5357         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5358
5359         err = hw->mac.ops.init_hw(hw);
5360         switch (err) {
5361         case 0:
5362         case IXGBE_ERR_SFP_NOT_PRESENT:
5363         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5364                 break;
5365         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5366                 e_dev_err("master disable timed out\n");
5367                 break;
5368         case IXGBE_ERR_EEPROM_VERSION:
5369                 /* We are running on a pre-production device, log a warning */
5370                 e_dev_warn("This device is a pre-production adapter/LOM. "
5371                            "Please be aware there may be issues associated with "
5372                            "your hardware.  If you are experiencing problems "
5373                            "please contact your Intel or hardware "
5374                            "representative who provided you with this "
5375                            "hardware.\n");
5376                 break;
5377         default:
5378                 e_dev_err("Hardware Error: %d\n", err);
5379         }
5380
5381         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5382
5383         /* flush entries out of MAC table */
5384         ixgbe_flush_sw_mac_table(adapter);
5385         __dev_uc_unsync(netdev, NULL);
5386
5387         /* do not flush user set addresses */
5388         ixgbe_mac_set_default_filter(adapter);
5389
5390         /* update SAN MAC vmdq pool selection */
5391         if (hw->mac.san_mac_rar_index)
5392                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5393
5394         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5395                 ixgbe_ptp_reset(adapter);
5396
5397         if (hw->phy.ops.set_phy_power) {
5398                 if (!netif_running(adapter->netdev) && !adapter->wol)
5399                         hw->phy.ops.set_phy_power(hw, false);
5400                 else
5401                         hw->phy.ops.set_phy_power(hw, true);
5402         }
5403 }
5404
5405 /**
5406  * ixgbe_clean_tx_ring - Free Tx Buffers
5407  * @tx_ring: ring to be cleaned
5408  **/
5409 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5410 {
5411         struct ixgbe_tx_buffer *tx_buffer_info;
5412         unsigned long size;
5413         u16 i;
5414
5415         /* ring already cleared, nothing to do */
5416         if (!tx_ring->tx_buffer_info)
5417                 return;
5418
5419         /* Free all the Tx ring sk_buffs */
5420         for (i = 0; i < tx_ring->count; i++) {
5421                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5422                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5423         }
5424
5425         netdev_tx_reset_queue(txring_txq(tx_ring));
5426
5427         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5428         memset(tx_ring->tx_buffer_info, 0, size);
5429
5430         /* Zero out the descriptor ring */
5431         memset(tx_ring->desc, 0, tx_ring->size);
5432
5433         tx_ring->next_to_use = 0;
5434         tx_ring->next_to_clean = 0;
5435 }
5436
5437 /**
5438  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5439  * @adapter: board private structure
5440  **/
5441 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5442 {
5443         int i;
5444
5445         for (i = 0; i < adapter->num_rx_queues; i++)
5446                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5447 }
5448
5449 /**
5450  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5451  * @adapter: board private structure
5452  **/
5453 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5454 {
5455         int i;
5456
5457         for (i = 0; i < adapter->num_tx_queues; i++)
5458                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5459 }
5460
5461 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5462 {
5463         struct hlist_node *node2;
5464         struct ixgbe_fdir_filter *filter;
5465
5466         spin_lock(&adapter->fdir_perfect_lock);
5467
5468         hlist_for_each_entry_safe(filter, node2,
5469                                   &adapter->fdir_filter_list, fdir_node) {
5470                 hlist_del(&filter->fdir_node);
5471                 kfree(filter);
5472         }
5473         adapter->fdir_filter_count = 0;
5474
5475         spin_unlock(&adapter->fdir_perfect_lock);
5476 }
5477
5478 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5479 {
5480         if (netif_is_macvlan(upper)) {
5481                 struct macvlan_dev *vlan = netdev_priv(upper);
5482
5483                 if (vlan->fwd_priv) {
5484                         netif_tx_stop_all_queues(upper);
5485                         netif_carrier_off(upper);
5486                         netif_tx_disable(upper);
5487                 }
5488         }
5489
5490         return 0;
5491 }
5492
5493 void ixgbe_down(struct ixgbe_adapter *adapter)
5494 {
5495         struct net_device *netdev = adapter->netdev;
5496         struct ixgbe_hw *hw = &adapter->hw;
5497         int i;
5498
5499         /* signal that we are down to the interrupt handler */
5500         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5501                 return; /* do nothing if already down */
5502
5503         /* disable receives */
5504         hw->mac.ops.disable_rx(hw);
5505
5506         /* disable all enabled rx queues */
5507         for (i = 0; i < adapter->num_rx_queues; i++)
5508                 /* this call also flushes the previous write */
5509                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5510
5511         usleep_range(10000, 20000);
5512
5513         netif_tx_stop_all_queues(netdev);
5514
5515         /* call carrier off first to avoid false dev_watchdog timeouts */
5516         netif_carrier_off(netdev);
5517         netif_tx_disable(netdev);
5518
5519         /* disable any upper devices */
5520         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5521                                       ixgbe_disable_macvlan, NULL);
5522
5523         ixgbe_irq_disable(adapter);
5524
5525         ixgbe_napi_disable_all(adapter);
5526
5527         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5528         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5529         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5530
5531         del_timer_sync(&adapter->service_timer);
5532
5533         if (adapter->num_vfs) {
5534                 /* Clear EITR Select mapping */
5535                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5536
5537                 /* Mark all the VFs as inactive */
5538                 for (i = 0 ; i < adapter->num_vfs; i++)
5539                         adapter->vfinfo[i].clear_to_send = false;
5540
5541                 /* ping all the active vfs to let them know we are going down */
5542                 ixgbe_ping_all_vfs(adapter);
5543
5544                 /* Disable all VFTE/VFRE TX/RX */
5545                 ixgbe_disable_tx_rx(adapter);
5546         }
5547
5548         /* disable transmits in the hardware now that interrupts are off */
5549         for (i = 0; i < adapter->num_tx_queues; i++) {
5550                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5551                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5552         }
5553
5554         /* Disable the Tx DMA engine on 82599 and later MAC */
5555         switch (hw->mac.type) {
5556         case ixgbe_mac_82599EB:
5557         case ixgbe_mac_X540:
5558         case ixgbe_mac_X550:
5559         case ixgbe_mac_X550EM_x:
5560         case ixgbe_mac_x550em_a:
5561                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5562                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5563                                  ~IXGBE_DMATXCTL_TE));
5564                 break;
5565         default:
5566                 break;
5567         }
5568
5569         if (!pci_channel_offline(adapter->pdev))
5570                 ixgbe_reset(adapter);
5571
5572         /* power down the optics for 82599 SFP+ fiber */
5573         if (hw->mac.ops.disable_tx_laser)
5574                 hw->mac.ops.disable_tx_laser(hw);
5575
5576         ixgbe_clean_all_tx_rings(adapter);
5577         ixgbe_clean_all_rx_rings(adapter);
5578 }
5579
5580 /**
5581  * ixgbe_eee_capable - helper function to determine EEE support on X550
5582  * @adapter: board private structure
5583  */
5584 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5585 {
5586         struct ixgbe_hw *hw = &adapter->hw;
5587
5588         switch (hw->device_id) {
5589         case IXGBE_DEV_ID_X550EM_A_1G_T:
5590         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5591                 if (!hw->phy.eee_speeds_supported)
5592                         break;
5593                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5594                 if (!hw->phy.eee_speeds_advertised)
5595                         break;
5596                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5597                 break;
5598         default:
5599                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5600                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5601                 break;
5602         }
5603 }
5604
5605 /**
5606  * ixgbe_tx_timeout - Respond to a Tx Hang
5607  * @netdev: network interface device structure
5608  **/
5609 static void ixgbe_tx_timeout(struct net_device *netdev)
5610 {
5611         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5612
5613         /* Do the reset outside of interrupt context */
5614         ixgbe_tx_timeout_reset(adapter);
5615 }
5616
5617 #ifdef CONFIG_IXGBE_DCB
5618 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5619 {
5620         struct ixgbe_hw *hw = &adapter->hw;
5621         struct tc_configuration *tc;
5622         int j;
5623
5624         switch (hw->mac.type) {
5625         case ixgbe_mac_82598EB:
5626         case ixgbe_mac_82599EB:
5627                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5628                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5629                 break;
5630         case ixgbe_mac_X540:
5631         case ixgbe_mac_X550:
5632                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5633                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5634                 break;
5635         case ixgbe_mac_X550EM_x:
5636         case ixgbe_mac_x550em_a:
5637         default:
5638                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5639                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5640                 break;
5641         }
5642
5643         /* Configure DCB traffic classes */
5644         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5645                 tc = &adapter->dcb_cfg.tc_config[j];
5646                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5647                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5648                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5649                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5650                 tc->dcb_pfc = pfc_disabled;
5651         }
5652
5653         /* Initialize default user to priority mapping, UPx->TC0 */
5654         tc = &adapter->dcb_cfg.tc_config[0];
5655         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5656         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5657
5658         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5659         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5660         adapter->dcb_cfg.pfc_mode_enable = false;
5661         adapter->dcb_set_bitmap = 0x00;
5662         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5663                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5664         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5665                sizeof(adapter->temp_dcb_cfg));
5666 }
5667 #endif
5668
5669 /**
5670  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5671  * @adapter: board private structure to initialize
5672  *
5673  * ixgbe_sw_init initializes the Adapter private data structure.
5674  * Fields are initialized based on PCI device information and
5675  * OS network device settings (MTU size).
5676  **/
5677 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5678                          const struct ixgbe_info *ii)
5679 {
5680         struct ixgbe_hw *hw = &adapter->hw;
5681         struct pci_dev *pdev = adapter->pdev;
5682         unsigned int rss, fdir;
5683         u32 fwsm;
5684         int i;
5685
5686         /* PCI config space info */
5687
5688         hw->vendor_id = pdev->vendor;
5689         hw->device_id = pdev->device;
5690         hw->revision_id = pdev->revision;
5691         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5692         hw->subsystem_device_id = pdev->subsystem_device;
5693
5694         /* get_invariants needs the device IDs */
5695         ii->get_invariants(hw);
5696
5697         /* Set common capability flags and settings */
5698         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5699         adapter->ring_feature[RING_F_RSS].limit = rss;
5700         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5701         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5702         adapter->atr_sample_rate = 20;
5703         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5704         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5705         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5706 #ifdef CONFIG_IXGBE_DCA
5707         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5708 #endif
5709 #ifdef CONFIG_IXGBE_DCB
5710         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5711         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5712 #endif
5713 #ifdef IXGBE_FCOE
5714         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5715         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5716 #ifdef CONFIG_IXGBE_DCB
5717         /* Default traffic class to use for FCoE */
5718         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5719 #endif /* CONFIG_IXGBE_DCB */
5720 #endif /* IXGBE_FCOE */
5721
5722         /* initialize static ixgbe jump table entries */
5723         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5724                                           GFP_KERNEL);
5725         if (!adapter->jump_tables[0])
5726                 return -ENOMEM;
5727         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5728
5729         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5730                 adapter->jump_tables[i] = NULL;
5731
5732         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5733                                      hw->mac.num_rar_entries,
5734                                      GFP_ATOMIC);
5735         if (!adapter->mac_table)
5736                 return -ENOMEM;
5737
5738         /* Set MAC specific capability flags and exceptions */
5739         switch (hw->mac.type) {
5740         case ixgbe_mac_82598EB:
5741                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5742
5743                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5744                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5745
5746                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5747                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5748                 adapter->atr_sample_rate = 0;
5749                 adapter->fdir_pballoc = 0;
5750 #ifdef IXGBE_FCOE
5751                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5752                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5753 #ifdef CONFIG_IXGBE_DCB
5754                 adapter->fcoe.up = 0;
5755 #endif /* IXGBE_DCB */
5756 #endif /* IXGBE_FCOE */
5757                 break;
5758         case ixgbe_mac_82599EB:
5759                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5760                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5761                 break;
5762         case ixgbe_mac_X540:
5763                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5764                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5765                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5766                 break;
5767         case ixgbe_mac_x550em_a:
5768                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5769                 switch (hw->device_id) {
5770                 case IXGBE_DEV_ID_X550EM_A_1G_T:
5771                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5772                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5773                         break;
5774                 default:
5775                         break;
5776                 }
5777         /* fall through */
5778         case ixgbe_mac_X550EM_x:
5779 #ifdef CONFIG_IXGBE_DCB
5780                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5781 #endif
5782 #ifdef IXGBE_FCOE
5783                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5784 #ifdef CONFIG_IXGBE_DCB
5785                 adapter->fcoe.up = 0;
5786 #endif /* IXGBE_DCB */
5787 #endif /* IXGBE_FCOE */
5788         /* Fall Through */
5789         case ixgbe_mac_X550:
5790                 if (hw->mac.type == ixgbe_mac_X550)
5791                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5792 #ifdef CONFIG_IXGBE_DCA
5793                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5794 #endif
5795                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5796                 break;
5797         default:
5798                 break;
5799         }
5800
5801 #ifdef IXGBE_FCOE
5802         /* FCoE support exists, always init the FCoE lock */
5803         spin_lock_init(&adapter->fcoe.lock);
5804
5805 #endif
5806         /* n-tuple support exists, always init our spinlock */
5807         spin_lock_init(&adapter->fdir_perfect_lock);
5808
5809 #ifdef CONFIG_IXGBE_DCB
5810         ixgbe_init_dcb(adapter);
5811 #endif
5812
5813         /* default flow control settings */
5814         hw->fc.requested_mode = ixgbe_fc_full;
5815         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5816         ixgbe_pbthresh_setup(adapter);
5817         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5818         hw->fc.send_xon = true;
5819         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5820
5821 #ifdef CONFIG_PCI_IOV
5822         if (max_vfs > 0)
5823                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5824
5825         /* assign number of SR-IOV VFs */
5826         if (hw->mac.type != ixgbe_mac_82598EB) {
5827                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5828                         adapter->num_vfs = 0;
5829                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5830                 } else {
5831                         adapter->num_vfs = max_vfs;
5832                 }
5833         }
5834 #endif /* CONFIG_PCI_IOV */
5835
5836         /* enable itr by default in dynamic mode */
5837         adapter->rx_itr_setting = 1;
5838         adapter->tx_itr_setting = 1;
5839
5840         /* set default ring sizes */
5841         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5842         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5843
5844         /* set default work limits */
5845         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5846
5847         /* initialize eeprom parameters */
5848         if (ixgbe_init_eeprom_params_generic(hw)) {
5849                 e_dev_err("EEPROM initialization failed\n");
5850                 return -EIO;
5851         }
5852
5853         /* PF holds first pool slot */
5854         set_bit(0, &adapter->fwd_bitmask);
5855         set_bit(__IXGBE_DOWN, &adapter->state);
5856
5857         return 0;
5858 }
5859
5860 /**
5861  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5862  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5863  *
5864  * Return 0 on success, negative on failure
5865  **/
5866 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5867 {
5868         struct device *dev = tx_ring->dev;
5869         int orig_node = dev_to_node(dev);
5870         int ring_node = -1;
5871         int size;
5872
5873         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5874
5875         if (tx_ring->q_vector)
5876                 ring_node = tx_ring->q_vector->numa_node;
5877
5878         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5879         if (!tx_ring->tx_buffer_info)
5880                 tx_ring->tx_buffer_info = vzalloc(size);
5881         if (!tx_ring->tx_buffer_info)
5882                 goto err;
5883
5884         u64_stats_init(&tx_ring->syncp);
5885
5886         /* round up to nearest 4K */
5887         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5888         tx_ring->size = ALIGN(tx_ring->size, 4096);
5889
5890         set_dev_node(dev, ring_node);
5891         tx_ring->desc = dma_alloc_coherent(dev,
5892                                            tx_ring->size,
5893                                            &tx_ring->dma,
5894                                            GFP_KERNEL);
5895         set_dev_node(dev, orig_node);
5896         if (!tx_ring->desc)
5897                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5898                                                    &tx_ring->dma, GFP_KERNEL);
5899         if (!tx_ring->desc)
5900                 goto err;
5901
5902         tx_ring->next_to_use = 0;
5903         tx_ring->next_to_clean = 0;
5904         return 0;
5905
5906 err:
5907         vfree(tx_ring->tx_buffer_info);
5908         tx_ring->tx_buffer_info = NULL;
5909         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5910         return -ENOMEM;
5911 }
5912
5913 /**
5914  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5915  * @adapter: board private structure
5916  *
5917  * If this function returns with an error, then it's possible one or
5918  * more of the rings is populated (while the rest are not).  It is the
5919  * callers duty to clean those orphaned rings.
5920  *
5921  * Return 0 on success, negative on failure
5922  **/
5923 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5924 {
5925         int i, err = 0;
5926
5927         for (i = 0; i < adapter->num_tx_queues; i++) {
5928                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5929                 if (!err)
5930                         continue;
5931
5932                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5933                 goto err_setup_tx;
5934         }
5935
5936         return 0;
5937 err_setup_tx:
5938         /* rewind the index freeing the rings as we go */
5939         while (i--)
5940                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5941         return err;
5942 }
5943
5944 /**
5945  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5946  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5947  *
5948  * Returns 0 on success, negative on failure
5949  **/
5950 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5951 {
5952         struct device *dev = rx_ring->dev;
5953         int orig_node = dev_to_node(dev);
5954         int ring_node = -1;
5955         int size;
5956
5957         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5958
5959         if (rx_ring->q_vector)
5960                 ring_node = rx_ring->q_vector->numa_node;
5961
5962         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5963         if (!rx_ring->rx_buffer_info)
5964                 rx_ring->rx_buffer_info = vzalloc(size);
5965         if (!rx_ring->rx_buffer_info)
5966                 goto err;
5967
5968         u64_stats_init(&rx_ring->syncp);
5969
5970         /* Round up to nearest 4K */
5971         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5972         rx_ring->size = ALIGN(rx_ring->size, 4096);
5973
5974         set_dev_node(dev, ring_node);
5975         rx_ring->desc = dma_alloc_coherent(dev,
5976                                            rx_ring->size,
5977                                            &rx_ring->dma,
5978                                            GFP_KERNEL);
5979         set_dev_node(dev, orig_node);
5980         if (!rx_ring->desc)
5981                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5982                                                    &rx_ring->dma, GFP_KERNEL);
5983         if (!rx_ring->desc)
5984                 goto err;
5985
5986         rx_ring->next_to_clean = 0;
5987         rx_ring->next_to_use = 0;
5988
5989         return 0;
5990 err:
5991         vfree(rx_ring->rx_buffer_info);
5992         rx_ring->rx_buffer_info = NULL;
5993         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5994         return -ENOMEM;
5995 }
5996
5997 /**
5998  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5999  * @adapter: board private structure
6000  *
6001  * If this function returns with an error, then it's possible one or
6002  * more of the rings is populated (while the rest are not).  It is the
6003  * callers duty to clean those orphaned rings.
6004  *
6005  * Return 0 on success, negative on failure
6006  **/
6007 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6008 {
6009         int i, err = 0;
6010
6011         for (i = 0; i < adapter->num_rx_queues; i++) {
6012                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
6013                 if (!err)
6014                         continue;
6015
6016                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6017                 goto err_setup_rx;
6018         }
6019
6020 #ifdef IXGBE_FCOE
6021         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6022         if (!err)
6023 #endif
6024                 return 0;
6025 err_setup_rx:
6026         /* rewind the index freeing the rings as we go */
6027         while (i--)
6028                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6029         return err;
6030 }
6031
6032 /**
6033  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6034  * @tx_ring: Tx descriptor ring for a specific queue
6035  *
6036  * Free all transmit software resources
6037  **/
6038 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6039 {
6040         ixgbe_clean_tx_ring(tx_ring);
6041
6042         vfree(tx_ring->tx_buffer_info);
6043         tx_ring->tx_buffer_info = NULL;
6044
6045         /* if not set, then don't free */
6046         if (!tx_ring->desc)
6047                 return;
6048
6049         dma_free_coherent(tx_ring->dev, tx_ring->size,
6050                           tx_ring->desc, tx_ring->dma);
6051
6052         tx_ring->desc = NULL;
6053 }
6054
6055 /**
6056  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6057  * @adapter: board private structure
6058  *
6059  * Free all transmit software resources
6060  **/
6061 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6062 {
6063         int i;
6064
6065         for (i = 0; i < adapter->num_tx_queues; i++)
6066                 if (adapter->tx_ring[i]->desc)
6067                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6068 }
6069
6070 /**
6071  * ixgbe_free_rx_resources - Free Rx Resources
6072  * @rx_ring: ring to clean the resources from
6073  *
6074  * Free all receive software resources
6075  **/
6076 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6077 {
6078         ixgbe_clean_rx_ring(rx_ring);
6079
6080         vfree(rx_ring->rx_buffer_info);
6081         rx_ring->rx_buffer_info = NULL;
6082
6083         /* if not set, then don't free */
6084         if (!rx_ring->desc)
6085                 return;
6086
6087         dma_free_coherent(rx_ring->dev, rx_ring->size,
6088                           rx_ring->desc, rx_ring->dma);
6089
6090         rx_ring->desc = NULL;
6091 }
6092
6093 /**
6094  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6095  * @adapter: board private structure
6096  *
6097  * Free all receive software resources
6098  **/
6099 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6100 {
6101         int i;
6102
6103 #ifdef IXGBE_FCOE
6104         ixgbe_free_fcoe_ddp_resources(adapter);
6105
6106 #endif
6107         for (i = 0; i < adapter->num_rx_queues; i++)
6108                 if (adapter->rx_ring[i]->desc)
6109                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6110 }
6111
6112 /**
6113  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6114  * @netdev: network interface device structure
6115  * @new_mtu: new value for maximum frame size
6116  *
6117  * Returns 0 on success, negative on failure
6118  **/
6119 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6120 {
6121         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6122
6123         /*
6124          * For 82599EB we cannot allow legacy VFs to enable their receive
6125          * paths when MTU greater than 1500 is configured.  So display a
6126          * warning that legacy VFs will be disabled.
6127          */
6128         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6129             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6130             (new_mtu > ETH_DATA_LEN))
6131                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6132
6133         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6134
6135         /* must set new MTU before calling down or up */
6136         netdev->mtu = new_mtu;
6137
6138         if (netif_running(netdev))
6139                 ixgbe_reinit_locked(adapter);
6140
6141         return 0;
6142 }
6143
6144 /**
6145  * ixgbe_open - Called when a network interface is made active
6146  * @netdev: network interface device structure
6147  *
6148  * Returns 0 on success, negative value on failure
6149  *
6150  * The open entry point is called when a network interface is made
6151  * active by the system (IFF_UP).  At this point all resources needed
6152  * for transmit and receive operations are allocated, the interrupt
6153  * handler is registered with the OS, the watchdog timer is started,
6154  * and the stack is notified that the interface is ready.
6155  **/
6156 int ixgbe_open(struct net_device *netdev)
6157 {
6158         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6159         struct ixgbe_hw *hw = &adapter->hw;
6160         int err, queues;
6161
6162         /* disallow open during test */
6163         if (test_bit(__IXGBE_TESTING, &adapter->state))
6164                 return -EBUSY;
6165
6166         netif_carrier_off(netdev);
6167
6168         /* allocate transmit descriptors */
6169         err = ixgbe_setup_all_tx_resources(adapter);
6170         if (err)
6171                 goto err_setup_tx;
6172
6173         /* allocate receive descriptors */
6174         err = ixgbe_setup_all_rx_resources(adapter);
6175         if (err)
6176                 goto err_setup_rx;
6177
6178         ixgbe_configure(adapter);
6179
6180         err = ixgbe_request_irq(adapter);
6181         if (err)
6182                 goto err_req_irq;
6183
6184         /* Notify the stack of the actual queue counts. */
6185         if (adapter->num_rx_pools > 1)
6186                 queues = adapter->num_rx_queues_per_pool;
6187         else
6188                 queues = adapter->num_tx_queues;
6189
6190         err = netif_set_real_num_tx_queues(netdev, queues);
6191         if (err)
6192                 goto err_set_queues;
6193
6194         if (adapter->num_rx_pools > 1 &&
6195             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6196                 queues = IXGBE_MAX_L2A_QUEUES;
6197         else
6198                 queues = adapter->num_rx_queues;
6199         err = netif_set_real_num_rx_queues(netdev, queues);
6200         if (err)
6201                 goto err_set_queues;
6202
6203         ixgbe_ptp_init(adapter);
6204
6205         ixgbe_up_complete(adapter);
6206
6207         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6208         udp_tunnel_get_rx_info(netdev);
6209
6210         return 0;
6211
6212 err_set_queues:
6213         ixgbe_free_irq(adapter);
6214 err_req_irq:
6215         ixgbe_free_all_rx_resources(adapter);
6216         if (hw->phy.ops.set_phy_power && !adapter->wol)
6217                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6218 err_setup_rx:
6219         ixgbe_free_all_tx_resources(adapter);
6220 err_setup_tx:
6221         ixgbe_reset(adapter);
6222
6223         return err;
6224 }
6225
6226 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6227 {
6228         ixgbe_ptp_suspend(adapter);
6229
6230         if (adapter->hw.phy.ops.enter_lplu) {
6231                 adapter->hw.phy.reset_disable = true;
6232                 ixgbe_down(adapter);
6233                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6234                 adapter->hw.phy.reset_disable = false;
6235         } else {
6236                 ixgbe_down(adapter);
6237         }
6238
6239         ixgbe_free_irq(adapter);
6240
6241         ixgbe_free_all_tx_resources(adapter);
6242         ixgbe_free_all_rx_resources(adapter);
6243 }
6244
6245 /**
6246  * ixgbe_close - Disables a network interface
6247  * @netdev: network interface device structure
6248  *
6249  * Returns 0, this is not allowed to fail
6250  *
6251  * The close entry point is called when an interface is de-activated
6252  * by the OS.  The hardware is still under the drivers control, but
6253  * needs to be disabled.  A global MAC reset is issued to stop the
6254  * hardware, and all transmit and receive resources are freed.
6255  **/
6256 int ixgbe_close(struct net_device *netdev)
6257 {
6258         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6259
6260         ixgbe_ptp_stop(adapter);
6261
6262         if (netif_device_present(netdev))
6263                 ixgbe_close_suspend(adapter);
6264
6265         ixgbe_fdir_filter_exit(adapter);
6266
6267         ixgbe_release_hw_control(adapter);
6268
6269         return 0;
6270 }
6271
6272 #ifdef CONFIG_PM
6273 static int ixgbe_resume(struct pci_dev *pdev)
6274 {
6275         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6276         struct net_device *netdev = adapter->netdev;
6277         u32 err;
6278
6279         adapter->hw.hw_addr = adapter->io_addr;
6280         pci_set_power_state(pdev, PCI_D0);
6281         pci_restore_state(pdev);
6282         /*
6283          * pci_restore_state clears dev->state_saved so call
6284          * pci_save_state to restore it.
6285          */
6286         pci_save_state(pdev);
6287
6288         err = pci_enable_device_mem(pdev);
6289         if (err) {
6290                 e_dev_err("Cannot enable PCI device from suspend\n");
6291                 return err;
6292         }
6293         smp_mb__before_atomic();
6294         clear_bit(__IXGBE_DISABLED, &adapter->state);
6295         pci_set_master(pdev);
6296
6297         pci_wake_from_d3(pdev, false);
6298
6299         ixgbe_reset(adapter);
6300
6301         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6302
6303         rtnl_lock();
6304         err = ixgbe_init_interrupt_scheme(adapter);
6305         if (!err && netif_running(netdev))
6306                 err = ixgbe_open(netdev);
6307
6308
6309         if (!err)
6310                 netif_device_attach(netdev);
6311         rtnl_unlock();
6312
6313         return err;
6314 }
6315 #endif /* CONFIG_PM */
6316
6317 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6318 {
6319         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6320         struct net_device *netdev = adapter->netdev;
6321         struct ixgbe_hw *hw = &adapter->hw;
6322         u32 ctrl, fctrl;
6323         u32 wufc = adapter->wol;
6324 #ifdef CONFIG_PM
6325         int retval = 0;
6326 #endif
6327
6328         rtnl_lock();
6329         netif_device_detach(netdev);
6330
6331         if (netif_running(netdev))
6332                 ixgbe_close_suspend(adapter);
6333
6334         ixgbe_clear_interrupt_scheme(adapter);
6335         rtnl_unlock();
6336
6337 #ifdef CONFIG_PM
6338         retval = pci_save_state(pdev);
6339         if (retval)
6340                 return retval;
6341
6342 #endif
6343         if (hw->mac.ops.stop_link_on_d3)
6344                 hw->mac.ops.stop_link_on_d3(hw);
6345
6346         if (wufc) {
6347                 ixgbe_set_rx_mode(netdev);
6348
6349                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6350                 if (hw->mac.ops.enable_tx_laser)
6351                         hw->mac.ops.enable_tx_laser(hw);
6352
6353                 /* turn on all-multi mode if wake on multicast is enabled */
6354                 if (wufc & IXGBE_WUFC_MC) {
6355                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6356                         fctrl |= IXGBE_FCTRL_MPE;
6357                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6358                 }
6359
6360                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6361                 ctrl |= IXGBE_CTRL_GIO_DIS;
6362                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6363
6364                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6365         } else {
6366                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6367                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6368         }
6369
6370         switch (hw->mac.type) {
6371         case ixgbe_mac_82598EB:
6372                 pci_wake_from_d3(pdev, false);
6373                 break;
6374         case ixgbe_mac_82599EB:
6375         case ixgbe_mac_X540:
6376         case ixgbe_mac_X550:
6377         case ixgbe_mac_X550EM_x:
6378         case ixgbe_mac_x550em_a:
6379                 pci_wake_from_d3(pdev, !!wufc);
6380                 break;
6381         default:
6382                 break;
6383         }
6384
6385         *enable_wake = !!wufc;
6386         if (hw->phy.ops.set_phy_power && !*enable_wake)
6387                 hw->phy.ops.set_phy_power(hw, false);
6388
6389         ixgbe_release_hw_control(adapter);
6390
6391         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6392                 pci_disable_device(pdev);
6393
6394         return 0;
6395 }
6396
6397 #ifdef CONFIG_PM
6398 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6399 {
6400         int retval;
6401         bool wake;
6402
6403         retval = __ixgbe_shutdown(pdev, &wake);
6404         if (retval)
6405                 return retval;
6406
6407         if (wake) {
6408                 pci_prepare_to_sleep(pdev);
6409         } else {
6410                 pci_wake_from_d3(pdev, false);
6411                 pci_set_power_state(pdev, PCI_D3hot);
6412         }
6413
6414         return 0;
6415 }
6416 #endif /* CONFIG_PM */
6417
6418 static void ixgbe_shutdown(struct pci_dev *pdev)
6419 {
6420         bool wake;
6421
6422         __ixgbe_shutdown(pdev, &wake);
6423
6424         if (system_state == SYSTEM_POWER_OFF) {
6425                 pci_wake_from_d3(pdev, wake);
6426                 pci_set_power_state(pdev, PCI_D3hot);
6427         }
6428 }
6429
6430 /**
6431  * ixgbe_update_stats - Update the board statistics counters.
6432  * @adapter: board private structure
6433  **/
6434 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6435 {
6436         struct net_device *netdev = adapter->netdev;
6437         struct ixgbe_hw *hw = &adapter->hw;
6438         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6439         u64 total_mpc = 0;
6440         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6441         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6442         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6443         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6444
6445         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6446             test_bit(__IXGBE_RESETTING, &adapter->state))
6447                 return;
6448
6449         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6450                 u64 rsc_count = 0;
6451                 u64 rsc_flush = 0;
6452                 for (i = 0; i < adapter->num_rx_queues; i++) {
6453                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6454                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6455                 }
6456                 adapter->rsc_total_count = rsc_count;
6457                 adapter->rsc_total_flush = rsc_flush;
6458         }
6459
6460         for (i = 0; i < adapter->num_rx_queues; i++) {
6461                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6462                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6463                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6464                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6465                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6466                 bytes += rx_ring->stats.bytes;
6467                 packets += rx_ring->stats.packets;
6468         }
6469         adapter->non_eop_descs = non_eop_descs;
6470         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6471         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6472         adapter->hw_csum_rx_error = hw_csum_rx_error;
6473         netdev->stats.rx_bytes = bytes;
6474         netdev->stats.rx_packets = packets;
6475
6476         bytes = 0;
6477         packets = 0;
6478         /* gather some stats to the adapter struct that are per queue */
6479         for (i = 0; i < adapter->num_tx_queues; i++) {
6480                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6481                 restart_queue += tx_ring->tx_stats.restart_queue;
6482                 tx_busy += tx_ring->tx_stats.tx_busy;
6483                 bytes += tx_ring->stats.bytes;
6484                 packets += tx_ring->stats.packets;
6485         }
6486         adapter->restart_queue = restart_queue;
6487         adapter->tx_busy = tx_busy;
6488         netdev->stats.tx_bytes = bytes;
6489         netdev->stats.tx_packets = packets;
6490
6491         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6492
6493         /* 8 register reads */
6494         for (i = 0; i < 8; i++) {
6495                 /* for packet buffers not used, the register should read 0 */
6496                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6497                 missed_rx += mpc;
6498                 hwstats->mpc[i] += mpc;
6499                 total_mpc += hwstats->mpc[i];
6500                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6501                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6502                 switch (hw->mac.type) {
6503                 case ixgbe_mac_82598EB:
6504                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6505                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6506                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6507                         hwstats->pxonrxc[i] +=
6508                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6509                         break;
6510                 case ixgbe_mac_82599EB:
6511                 case ixgbe_mac_X540:
6512                 case ixgbe_mac_X550:
6513                 case ixgbe_mac_X550EM_x:
6514                 case ixgbe_mac_x550em_a:
6515                         hwstats->pxonrxc[i] +=
6516                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6517                         break;
6518                 default:
6519                         break;
6520                 }
6521         }
6522
6523         /*16 register reads */
6524         for (i = 0; i < 16; i++) {
6525                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6526                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6527                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6528                     (hw->mac.type == ixgbe_mac_X540) ||
6529                     (hw->mac.type == ixgbe_mac_X550) ||
6530                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6531                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6532                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6533                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6534                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6535                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6536                 }
6537         }
6538
6539         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6540         /* work around hardware counting issue */
6541         hwstats->gprc -= missed_rx;
6542
6543         ixgbe_update_xoff_received(adapter);
6544
6545         /* 82598 hardware only has a 32 bit counter in the high register */
6546         switch (hw->mac.type) {
6547         case ixgbe_mac_82598EB:
6548                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6549                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6550                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6551                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6552                 break;
6553         case ixgbe_mac_X540:
6554         case ixgbe_mac_X550:
6555         case ixgbe_mac_X550EM_x:
6556         case ixgbe_mac_x550em_a:
6557                 /* OS2BMC stats are X540 and later */
6558                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6559                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6560                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6561                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6562         case ixgbe_mac_82599EB:
6563                 for (i = 0; i < 16; i++)
6564                         adapter->hw_rx_no_dma_resources +=
6565                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6566                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6567                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6568                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6569                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6570                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6571                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6572                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6573                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6574                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6575 #ifdef IXGBE_FCOE
6576                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6577                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6578                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6579                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6580                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6581                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6582                 /* Add up per cpu counters for total ddp aloc fail */
6583                 if (adapter->fcoe.ddp_pool) {
6584                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6585                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6586                         unsigned int cpu;
6587                         u64 noddp = 0, noddp_ext_buff = 0;
6588                         for_each_possible_cpu(cpu) {
6589                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6590                                 noddp += ddp_pool->noddp;
6591                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6592                         }
6593                         hwstats->fcoe_noddp = noddp;
6594                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6595                 }
6596 #endif /* IXGBE_FCOE */
6597                 break;
6598         default:
6599                 break;
6600         }
6601         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6602         hwstats->bprc += bprc;
6603         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6604         if (hw->mac.type == ixgbe_mac_82598EB)
6605                 hwstats->mprc -= bprc;
6606         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6607         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6608         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6609         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6610         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6611         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6612         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6613         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6614         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6615         hwstats->lxontxc += lxon;
6616         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6617         hwstats->lxofftxc += lxoff;
6618         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6619         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6620         /*
6621          * 82598 errata - tx of flow control packets is included in tx counters
6622          */
6623         xon_off_tot = lxon + lxoff;
6624         hwstats->gptc -= xon_off_tot;
6625         hwstats->mptc -= xon_off_tot;
6626         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6627         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6628         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6629         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6630         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6631         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6632         hwstats->ptc64 -= xon_off_tot;
6633         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6634         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6635         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6636         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6637         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6638         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6639
6640         /* Fill out the OS statistics structure */
6641         netdev->stats.multicast = hwstats->mprc;
6642
6643         /* Rx Errors */
6644         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6645         netdev->stats.rx_dropped = 0;
6646         netdev->stats.rx_length_errors = hwstats->rlec;
6647         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6648         netdev->stats.rx_missed_errors = total_mpc;
6649 }
6650
6651 /**
6652  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6653  * @adapter: pointer to the device adapter structure
6654  **/
6655 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6656 {
6657         struct ixgbe_hw *hw = &adapter->hw;
6658         int i;
6659
6660         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6661                 return;
6662
6663         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6664
6665         /* if interface is down do nothing */
6666         if (test_bit(__IXGBE_DOWN, &adapter->state))
6667                 return;
6668
6669         /* do nothing if we are not using signature filters */
6670         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6671                 return;
6672
6673         adapter->fdir_overflow++;
6674
6675         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6676                 for (i = 0; i < adapter->num_tx_queues; i++)
6677                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6678                                 &(adapter->tx_ring[i]->state));
6679                 /* re-enable flow director interrupts */
6680                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6681         } else {
6682                 e_err(probe, "failed to finish FDIR re-initialization, "
6683                       "ignored adding FDIR ATR filters\n");
6684         }
6685 }
6686
6687 /**
6688  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6689  * @adapter: pointer to the device adapter structure
6690  *
6691  * This function serves two purposes.  First it strobes the interrupt lines
6692  * in order to make certain interrupts are occurring.  Secondly it sets the
6693  * bits needed to check for TX hangs.  As a result we should immediately
6694  * determine if a hang has occurred.
6695  */
6696 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6697 {
6698         struct ixgbe_hw *hw = &adapter->hw;
6699         u64 eics = 0;
6700         int i;
6701
6702         /* If we're down, removing or resetting, just bail */
6703         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6704             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6705             test_bit(__IXGBE_RESETTING, &adapter->state))
6706                 return;
6707
6708         /* Force detection of hung controller */
6709         if (netif_carrier_ok(adapter->netdev)) {
6710                 for (i = 0; i < adapter->num_tx_queues; i++)
6711                         set_check_for_tx_hang(adapter->tx_ring[i]);
6712         }
6713
6714         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6715                 /*
6716                  * for legacy and MSI interrupts don't set any bits
6717                  * that are enabled for EIAM, because this operation
6718                  * would set *both* EIMS and EICS for any bit in EIAM
6719                  */
6720                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6721                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6722         } else {
6723                 /* get one bit for every active tx/rx interrupt vector */
6724                 for (i = 0; i < adapter->num_q_vectors; i++) {
6725                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6726                         if (qv->rx.ring || qv->tx.ring)
6727                                 eics |= BIT_ULL(i);
6728                 }
6729         }
6730
6731         /* Cause software interrupt to ensure rings are cleaned */
6732         ixgbe_irq_rearm_queues(adapter, eics);
6733 }
6734
6735 /**
6736  * ixgbe_watchdog_update_link - update the link status
6737  * @adapter: pointer to the device adapter structure
6738  * @link_speed: pointer to a u32 to store the link_speed
6739  **/
6740 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6741 {
6742         struct ixgbe_hw *hw = &adapter->hw;
6743         u32 link_speed = adapter->link_speed;
6744         bool link_up = adapter->link_up;
6745         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6746
6747         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6748                 return;
6749
6750         if (hw->mac.ops.check_link) {
6751                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6752         } else {
6753                 /* always assume link is up, if no check link function */
6754                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6755                 link_up = true;
6756         }
6757
6758         if (adapter->ixgbe_ieee_pfc)
6759                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6760
6761         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6762                 hw->mac.ops.fc_enable(hw);
6763                 ixgbe_set_rx_drop_en(adapter);
6764         }
6765
6766         if (link_up ||
6767             time_after(jiffies, (adapter->link_check_timeout +
6768                                  IXGBE_TRY_LINK_TIMEOUT))) {
6769                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6770                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6771                 IXGBE_WRITE_FLUSH(hw);
6772         }
6773
6774         adapter->link_up = link_up;
6775         adapter->link_speed = link_speed;
6776 }
6777
6778 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6779 {
6780 #ifdef CONFIG_IXGBE_DCB
6781         struct net_device *netdev = adapter->netdev;
6782         struct dcb_app app = {
6783                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6784                               .protocol = 0,
6785                              };
6786         u8 up = 0;
6787
6788         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6789                 up = dcb_ieee_getapp_mask(netdev, &app);
6790
6791         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6792 #endif
6793 }
6794
6795 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
6796 {
6797         if (netif_is_macvlan(upper)) {
6798                 struct macvlan_dev *vlan = netdev_priv(upper);
6799
6800                 if (vlan->fwd_priv)
6801                         netif_tx_wake_all_queues(upper);
6802         }
6803
6804         return 0;
6805 }
6806
6807 /**
6808  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6809  *                             print link up message
6810  * @adapter: pointer to the device adapter structure
6811  **/
6812 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6813 {
6814         struct net_device *netdev = adapter->netdev;
6815         struct ixgbe_hw *hw = &adapter->hw;
6816         u32 link_speed = adapter->link_speed;
6817         const char *speed_str;
6818         bool flow_rx, flow_tx;
6819
6820         /* only continue if link was previously down */
6821         if (netif_carrier_ok(netdev))
6822                 return;
6823
6824         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6825
6826         switch (hw->mac.type) {
6827         case ixgbe_mac_82598EB: {
6828                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6829                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6830                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6831                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6832         }
6833                 break;
6834         case ixgbe_mac_X540:
6835         case ixgbe_mac_X550:
6836         case ixgbe_mac_X550EM_x:
6837         case ixgbe_mac_x550em_a:
6838         case ixgbe_mac_82599EB: {
6839                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6840                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6841                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6842                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6843         }
6844                 break;
6845         default:
6846                 flow_tx = false;
6847                 flow_rx = false;
6848                 break;
6849         }
6850
6851         adapter->last_rx_ptp_check = jiffies;
6852
6853         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6854                 ixgbe_ptp_start_cyclecounter(adapter);
6855
6856         switch (link_speed) {
6857         case IXGBE_LINK_SPEED_10GB_FULL:
6858                 speed_str = "10 Gbps";
6859                 break;
6860         case IXGBE_LINK_SPEED_2_5GB_FULL:
6861                 speed_str = "2.5 Gbps";
6862                 break;
6863         case IXGBE_LINK_SPEED_1GB_FULL:
6864                 speed_str = "1 Gbps";
6865                 break;
6866         case IXGBE_LINK_SPEED_100_FULL:
6867                 speed_str = "100 Mbps";
6868                 break;
6869         case IXGBE_LINK_SPEED_10_FULL:
6870                 speed_str = "10 Mbps";
6871                 break;
6872         default:
6873                 speed_str = "unknown speed";
6874                 break;
6875         }
6876         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6877                ((flow_rx && flow_tx) ? "RX/TX" :
6878                (flow_rx ? "RX" :
6879                (flow_tx ? "TX" : "None"))));
6880
6881         netif_carrier_on(netdev);
6882         ixgbe_check_vf_rate_limit(adapter);
6883
6884         /* enable transmits */
6885         netif_tx_wake_all_queues(adapter->netdev);
6886
6887         /* enable any upper devices */
6888         rtnl_lock();
6889         netdev_walk_all_upper_dev_rcu(adapter->netdev,
6890                                       ixgbe_enable_macvlan, NULL);
6891         rtnl_unlock();
6892
6893         /* update the default user priority for VFs */
6894         ixgbe_update_default_up(adapter);
6895
6896         /* ping all the active vfs to let them know link has changed */
6897         ixgbe_ping_all_vfs(adapter);
6898 }
6899
6900 /**
6901  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6902  *                               print link down message
6903  * @adapter: pointer to the adapter structure
6904  **/
6905 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6906 {
6907         struct net_device *netdev = adapter->netdev;
6908         struct ixgbe_hw *hw = &adapter->hw;
6909
6910         adapter->link_up = false;
6911         adapter->link_speed = 0;
6912
6913         /* only continue if link was up previously */
6914         if (!netif_carrier_ok(netdev))
6915                 return;
6916
6917         /* poll for SFP+ cable when link is down */
6918         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6919                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6920
6921         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6922                 ixgbe_ptp_start_cyclecounter(adapter);
6923
6924         e_info(drv, "NIC Link is Down\n");
6925         netif_carrier_off(netdev);
6926
6927         /* ping all the active vfs to let them know link has changed */
6928         ixgbe_ping_all_vfs(adapter);
6929 }
6930
6931 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6932 {
6933         int i;
6934
6935         for (i = 0; i < adapter->num_tx_queues; i++) {
6936                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6937
6938                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6939                         return true;
6940         }
6941
6942         return false;
6943 }
6944
6945 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6946 {
6947         struct ixgbe_hw *hw = &adapter->hw;
6948         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6949         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6950
6951         int i, j;
6952
6953         if (!adapter->num_vfs)
6954                 return false;
6955
6956         /* resetting the PF is only needed for MAC before X550 */
6957         if (hw->mac.type >= ixgbe_mac_X550)
6958                 return false;
6959
6960         for (i = 0; i < adapter->num_vfs; i++) {
6961                 for (j = 0; j < q_per_pool; j++) {
6962                         u32 h, t;
6963
6964                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6965                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6966
6967                         if (h != t)
6968                                 return true;
6969                 }
6970         }
6971
6972         return false;
6973 }
6974
6975 /**
6976  * ixgbe_watchdog_flush_tx - flush queues on link down
6977  * @adapter: pointer to the device adapter structure
6978  **/
6979 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6980 {
6981         if (!netif_carrier_ok(adapter->netdev)) {
6982                 if (ixgbe_ring_tx_pending(adapter) ||
6983                     ixgbe_vf_tx_pending(adapter)) {
6984                         /* We've lost link, so the controller stops DMA,
6985                          * but we've got queued Tx work that's never going
6986                          * to get done, so reset controller to flush Tx.
6987                          * (Do the reset outside of interrupt context).
6988                          */
6989                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6990                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6991                 }
6992         }
6993 }
6994
6995 #ifdef CONFIG_PCI_IOV
6996 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6997                                       struct pci_dev *vfdev)
6998 {
6999         if (!pci_wait_for_pending_transaction(vfdev))
7000                 e_dev_warn("Issuing VFLR with pending transactions\n");
7001
7002         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
7003         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
7004
7005         msleep(100);
7006 }
7007
7008 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7009 {
7010         struct ixgbe_hw *hw = &adapter->hw;
7011         struct pci_dev *pdev = adapter->pdev;
7012         unsigned int vf;
7013         u32 gpc;
7014
7015         if (!(netif_carrier_ok(adapter->netdev)))
7016                 return;
7017
7018         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7019         if (gpc) /* If incrementing then no need for the check below */
7020                 return;
7021         /* Check to see if a bad DMA write target from an errant or
7022          * malicious VF has caused a PCIe error.  If so then we can
7023          * issue a VFLR to the offending VF(s) and then resume without
7024          * requesting a full slot reset.
7025          */
7026
7027         if (!pdev)
7028                 return;
7029
7030         /* check status reg for all VFs owned by this PF */
7031         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7032                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7033                 u16 status_reg;
7034
7035                 if (!vfdev)
7036                         continue;
7037                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7038                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7039                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7040                         ixgbe_issue_vf_flr(adapter, vfdev);
7041         }
7042 }
7043
7044 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7045 {
7046         u32 ssvpc;
7047
7048         /* Do not perform spoof check for 82598 or if not in IOV mode */
7049         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7050             adapter->num_vfs == 0)
7051                 return;
7052
7053         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7054
7055         /*
7056          * ssvpc register is cleared on read, if zero then no
7057          * spoofed packets in the last interval.
7058          */
7059         if (!ssvpc)
7060                 return;
7061
7062         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7063 }
7064 #else
7065 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7066 {
7067 }
7068
7069 static void
7070 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7071 {
7072 }
7073 #endif /* CONFIG_PCI_IOV */
7074
7075
7076 /**
7077  * ixgbe_watchdog_subtask - check and bring link up
7078  * @adapter: pointer to the device adapter structure
7079  **/
7080 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7081 {
7082         /* if interface is down, removing or resetting, do nothing */
7083         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7084             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7085             test_bit(__IXGBE_RESETTING, &adapter->state))
7086                 return;
7087
7088         ixgbe_watchdog_update_link(adapter);
7089
7090         if (adapter->link_up)
7091                 ixgbe_watchdog_link_is_up(adapter);
7092         else
7093                 ixgbe_watchdog_link_is_down(adapter);
7094
7095         ixgbe_check_for_bad_vf(adapter);
7096         ixgbe_spoof_check(adapter);
7097         ixgbe_update_stats(adapter);
7098
7099         ixgbe_watchdog_flush_tx(adapter);
7100 }
7101
7102 /**
7103  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7104  * @adapter: the ixgbe adapter structure
7105  **/
7106 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7107 {
7108         struct ixgbe_hw *hw = &adapter->hw;
7109         s32 err;
7110
7111         /* not searching for SFP so there is nothing to do here */
7112         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7113             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7114                 return;
7115
7116         if (adapter->sfp_poll_time &&
7117             time_after(adapter->sfp_poll_time, jiffies))
7118                 return; /* If not yet time to poll for SFP */
7119
7120         /* someone else is in init, wait until next service event */
7121         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7122                 return;
7123
7124         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7125
7126         err = hw->phy.ops.identify_sfp(hw);
7127         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7128                 goto sfp_out;
7129
7130         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7131                 /* If no cable is present, then we need to reset
7132                  * the next time we find a good cable. */
7133                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7134         }
7135
7136         /* exit on error */
7137         if (err)
7138                 goto sfp_out;
7139
7140         /* exit if reset not needed */
7141         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7142                 goto sfp_out;
7143
7144         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7145
7146         /*
7147          * A module may be identified correctly, but the EEPROM may not have
7148          * support for that module.  setup_sfp() will fail in that case, so
7149          * we should not allow that module to load.
7150          */
7151         if (hw->mac.type == ixgbe_mac_82598EB)
7152                 err = hw->phy.ops.reset(hw);
7153         else
7154                 err = hw->mac.ops.setup_sfp(hw);
7155
7156         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7157                 goto sfp_out;
7158
7159         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7160         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7161
7162 sfp_out:
7163         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7164
7165         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7166             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7167                 e_dev_err("failed to initialize because an unsupported "
7168                           "SFP+ module type was detected.\n");
7169                 e_dev_err("Reload the driver after installing a "
7170                           "supported module.\n");
7171                 unregister_netdev(adapter->netdev);
7172         }
7173 }
7174
7175 /**
7176  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7177  * @adapter: the ixgbe adapter structure
7178  **/
7179 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7180 {
7181         struct ixgbe_hw *hw = &adapter->hw;
7182         u32 speed;
7183         bool autoneg = false;
7184
7185         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7186                 return;
7187
7188         /* someone else is in init, wait until next service event */
7189         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7190                 return;
7191
7192         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7193
7194         speed = hw->phy.autoneg_advertised;
7195         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7196                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7197
7198                 /* setup the highest link when no autoneg */
7199                 if (!autoneg) {
7200                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7201                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7202                 }
7203         }
7204
7205         if (hw->mac.ops.setup_link)
7206                 hw->mac.ops.setup_link(hw, speed, true);
7207
7208         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7209         adapter->link_check_timeout = jiffies;
7210         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7211 }
7212
7213 /**
7214  * ixgbe_service_timer - Timer Call-back
7215  * @data: pointer to adapter cast into an unsigned long
7216  **/
7217 static void ixgbe_service_timer(unsigned long data)
7218 {
7219         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7220         unsigned long next_event_offset;
7221
7222         /* poll faster when waiting for link */
7223         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7224                 next_event_offset = HZ / 10;
7225         else
7226                 next_event_offset = HZ * 2;
7227
7228         /* Reset the timer */
7229         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7230
7231         ixgbe_service_event_schedule(adapter);
7232 }
7233
7234 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7235 {
7236         struct ixgbe_hw *hw = &adapter->hw;
7237         u32 status;
7238
7239         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7240                 return;
7241
7242         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7243
7244         if (!hw->phy.ops.handle_lasi)
7245                 return;
7246
7247         status = hw->phy.ops.handle_lasi(&adapter->hw);
7248         if (status != IXGBE_ERR_OVERTEMP)
7249                 return;
7250
7251         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7252 }
7253
7254 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7255 {
7256         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7257                 return;
7258
7259         /* If we're already down, removing or resetting, just bail */
7260         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7261             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7262             test_bit(__IXGBE_RESETTING, &adapter->state))
7263                 return;
7264
7265         ixgbe_dump(adapter);
7266         netdev_err(adapter->netdev, "Reset adapter\n");
7267         adapter->tx_timeout_count++;
7268
7269         rtnl_lock();
7270         ixgbe_reinit_locked(adapter);
7271         rtnl_unlock();
7272 }
7273
7274 /**
7275  * ixgbe_service_task - manages and runs subtasks
7276  * @work: pointer to work_struct containing our data
7277  **/
7278 static void ixgbe_service_task(struct work_struct *work)
7279 {
7280         struct ixgbe_adapter *adapter = container_of(work,
7281                                                      struct ixgbe_adapter,
7282                                                      service_task);
7283         if (ixgbe_removed(adapter->hw.hw_addr)) {
7284                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7285                         rtnl_lock();
7286                         ixgbe_down(adapter);
7287                         rtnl_unlock();
7288                 }
7289                 ixgbe_service_event_complete(adapter);
7290                 return;
7291         }
7292         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7293                 rtnl_lock();
7294                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7295                 udp_tunnel_get_rx_info(adapter->netdev);
7296                 rtnl_unlock();
7297         }
7298         ixgbe_reset_subtask(adapter);
7299         ixgbe_phy_interrupt_subtask(adapter);
7300         ixgbe_sfp_detection_subtask(adapter);
7301         ixgbe_sfp_link_config_subtask(adapter);
7302         ixgbe_check_overtemp_subtask(adapter);
7303         ixgbe_watchdog_subtask(adapter);
7304         ixgbe_fdir_reinit_subtask(adapter);
7305         ixgbe_check_hang_subtask(adapter);
7306
7307         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7308                 ixgbe_ptp_overflow_check(adapter);
7309                 ixgbe_ptp_rx_hang(adapter);
7310         }
7311
7312         ixgbe_service_event_complete(adapter);
7313 }
7314
7315 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7316                      struct ixgbe_tx_buffer *first,
7317                      u8 *hdr_len)
7318 {
7319         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7320         struct sk_buff *skb = first->skb;
7321         union {
7322                 struct iphdr *v4;
7323                 struct ipv6hdr *v6;
7324                 unsigned char *hdr;
7325         } ip;
7326         union {
7327                 struct tcphdr *tcp;
7328                 unsigned char *hdr;
7329         } l4;
7330         u32 paylen, l4_offset;
7331         int err;
7332
7333         if (skb->ip_summed != CHECKSUM_PARTIAL)
7334                 return 0;
7335
7336         if (!skb_is_gso(skb))
7337                 return 0;
7338
7339         err = skb_cow_head(skb, 0);
7340         if (err < 0)
7341                 return err;
7342
7343         ip.hdr = skb_network_header(skb);
7344         l4.hdr = skb_checksum_start(skb);
7345
7346         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7347         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7348
7349         /* initialize outer IP header fields */
7350         if (ip.v4->version == 4) {
7351                 unsigned char *csum_start = skb_checksum_start(skb);
7352                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7353
7354                 /* IP header will have to cancel out any data that
7355                  * is not a part of the outer IP header
7356                  */
7357                 ip.v4->check = csum_fold(csum_partial(trans_start,
7358                                                       csum_start - trans_start,
7359                                                       0));
7360                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7361
7362                 ip.v4->tot_len = 0;
7363                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7364                                    IXGBE_TX_FLAGS_CSUM |
7365                                    IXGBE_TX_FLAGS_IPV4;
7366         } else {
7367                 ip.v6->payload_len = 0;
7368                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7369                                    IXGBE_TX_FLAGS_CSUM;
7370         }
7371
7372         /* determine offset of inner transport header */
7373         l4_offset = l4.hdr - skb->data;
7374
7375         /* compute length of segmentation header */
7376         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7377
7378         /* remove payload length from inner checksum */
7379         paylen = skb->len - l4_offset;
7380         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7381
7382         /* update gso size and bytecount with header size */
7383         first->gso_segs = skb_shinfo(skb)->gso_segs;
7384         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7385
7386         /* mss_l4len_id: use 0 as index for TSO */
7387         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7388         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7389
7390         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7391         vlan_macip_lens = l4.hdr - ip.hdr;
7392         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7393         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7394
7395         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7396                           mss_l4len_idx);
7397
7398         return 1;
7399 }
7400
7401 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7402 {
7403         unsigned int offset = 0;
7404
7405         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7406
7407         return offset == skb_checksum_start_offset(skb);
7408 }
7409
7410 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7411                           struct ixgbe_tx_buffer *first)
7412 {
7413         struct sk_buff *skb = first->skb;
7414         u32 vlan_macip_lens = 0;
7415         u32 type_tucmd = 0;
7416
7417         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7418 csum_failed:
7419                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7420                                          IXGBE_TX_FLAGS_CC)))
7421                         return;
7422                 goto no_csum;
7423         }
7424
7425         switch (skb->csum_offset) {
7426         case offsetof(struct tcphdr, check):
7427                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7428                 /* fall through */
7429         case offsetof(struct udphdr, check):
7430                 break;
7431         case offsetof(struct sctphdr, checksum):
7432                 /* validate that this is actually an SCTP request */
7433                 if (((first->protocol == htons(ETH_P_IP)) &&
7434                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7435                     ((first->protocol == htons(ETH_P_IPV6)) &&
7436                      ixgbe_ipv6_csum_is_sctp(skb))) {
7437                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7438                         break;
7439                 }
7440                 /* fall through */
7441         default:
7442                 skb_checksum_help(skb);
7443                 goto csum_failed;
7444         }
7445
7446         /* update TX checksum flag */
7447         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7448         vlan_macip_lens = skb_checksum_start_offset(skb) -
7449                           skb_network_offset(skb);
7450 no_csum:
7451         /* vlan_macip_lens: MACLEN, VLAN tag */
7452         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7453         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7454
7455         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7456 }
7457
7458 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7459         ((_flag <= _result) ? \
7460          ((u32)(_input & _flag) * (_result / _flag)) : \
7461          ((u32)(_input & _flag) / (_flag / _result)))
7462
7463 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7464 {
7465         /* set type for advanced descriptor with frame checksum insertion */
7466         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7467                        IXGBE_ADVTXD_DCMD_DEXT |
7468                        IXGBE_ADVTXD_DCMD_IFCS;
7469
7470         /* set HW vlan bit if vlan is present */
7471         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7472                                    IXGBE_ADVTXD_DCMD_VLE);
7473
7474         /* set segmentation enable bits for TSO/FSO */
7475         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7476                                    IXGBE_ADVTXD_DCMD_TSE);
7477
7478         /* set timestamp bit if present */
7479         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7480                                    IXGBE_ADVTXD_MAC_TSTAMP);
7481
7482         /* insert frame checksum */
7483         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7484
7485         return cmd_type;
7486 }
7487
7488 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7489                                    u32 tx_flags, unsigned int paylen)
7490 {
7491         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7492
7493         /* enable L4 checksum for TSO and TX checksum offload */
7494         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7495                                         IXGBE_TX_FLAGS_CSUM,
7496                                         IXGBE_ADVTXD_POPTS_TXSM);
7497
7498         /* enble IPv4 checksum for TSO */
7499         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7500                                         IXGBE_TX_FLAGS_IPV4,
7501                                         IXGBE_ADVTXD_POPTS_IXSM);
7502
7503         /*
7504          * Check Context must be set if Tx switch is enabled, which it
7505          * always is for case where virtual functions are running
7506          */
7507         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7508                                         IXGBE_TX_FLAGS_CC,
7509                                         IXGBE_ADVTXD_CC);
7510
7511         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7512 }
7513
7514 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7515 {
7516         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7517
7518         /* Herbert's original patch had:
7519          *  smp_mb__after_netif_stop_queue();
7520          * but since that doesn't exist yet, just open code it.
7521          */
7522         smp_mb();
7523
7524         /* We need to check again in a case another CPU has just
7525          * made room available.
7526          */
7527         if (likely(ixgbe_desc_unused(tx_ring) < size))
7528                 return -EBUSY;
7529
7530         /* A reprieve! - use start_queue because it doesn't call schedule */
7531         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7532         ++tx_ring->tx_stats.restart_queue;
7533         return 0;
7534 }
7535
7536 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7537 {
7538         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7539                 return 0;
7540
7541         return __ixgbe_maybe_stop_tx(tx_ring, size);
7542 }
7543
7544 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7545                        IXGBE_TXD_CMD_RS)
7546
7547 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7548                          struct ixgbe_tx_buffer *first,
7549                          const u8 hdr_len)
7550 {
7551         struct sk_buff *skb = first->skb;
7552         struct ixgbe_tx_buffer *tx_buffer;
7553         union ixgbe_adv_tx_desc *tx_desc;
7554         struct skb_frag_struct *frag;
7555         dma_addr_t dma;
7556         unsigned int data_len, size;
7557         u32 tx_flags = first->tx_flags;
7558         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7559         u16 i = tx_ring->next_to_use;
7560
7561         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7562
7563         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7564
7565         size = skb_headlen(skb);
7566         data_len = skb->data_len;
7567
7568 #ifdef IXGBE_FCOE
7569         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7570                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7571                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7572                         data_len = 0;
7573                 } else {
7574                         data_len -= sizeof(struct fcoe_crc_eof);
7575                 }
7576         }
7577
7578 #endif
7579         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7580
7581         tx_buffer = first;
7582
7583         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7584                 if (dma_mapping_error(tx_ring->dev, dma))
7585                         goto dma_error;
7586
7587                 /* record length, and DMA address */
7588                 dma_unmap_len_set(tx_buffer, len, size);
7589                 dma_unmap_addr_set(tx_buffer, dma, dma);
7590
7591                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7592
7593                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7594                         tx_desc->read.cmd_type_len =
7595                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7596
7597                         i++;
7598                         tx_desc++;
7599                         if (i == tx_ring->count) {
7600                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7601                                 i = 0;
7602                         }
7603                         tx_desc->read.olinfo_status = 0;
7604
7605                         dma += IXGBE_MAX_DATA_PER_TXD;
7606                         size -= IXGBE_MAX_DATA_PER_TXD;
7607
7608                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7609                 }
7610
7611                 if (likely(!data_len))
7612                         break;
7613
7614                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7615
7616                 i++;
7617                 tx_desc++;
7618                 if (i == tx_ring->count) {
7619                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7620                         i = 0;
7621                 }
7622                 tx_desc->read.olinfo_status = 0;
7623
7624 #ifdef IXGBE_FCOE
7625                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7626 #else
7627                 size = skb_frag_size(frag);
7628 #endif
7629                 data_len -= size;
7630
7631                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7632                                        DMA_TO_DEVICE);
7633
7634                 tx_buffer = &tx_ring->tx_buffer_info[i];
7635         }
7636
7637         /* write last descriptor with RS and EOP bits */
7638         cmd_type |= size | IXGBE_TXD_CMD;
7639         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7640
7641         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7642
7643         /* set the timestamp */
7644         first->time_stamp = jiffies;
7645
7646         /*
7647          * Force memory writes to complete before letting h/w know there
7648          * are new descriptors to fetch.  (Only applicable for weak-ordered
7649          * memory model archs, such as IA-64).
7650          *
7651          * We also need this memory barrier to make certain all of the
7652          * status bits have been updated before next_to_watch is written.
7653          */
7654         wmb();
7655
7656         /* set next_to_watch value indicating a packet is present */
7657         first->next_to_watch = tx_desc;
7658
7659         i++;
7660         if (i == tx_ring->count)
7661                 i = 0;
7662
7663         tx_ring->next_to_use = i;
7664
7665         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7666
7667         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7668                 writel(i, tx_ring->tail);
7669
7670                 /* we need this if more than one processor can write to our tail
7671                  * at a time, it synchronizes IO on IA64/Altix systems
7672                  */
7673                 mmiowb();
7674         }
7675
7676         return;
7677 dma_error:
7678         dev_err(tx_ring->dev, "TX DMA map failed\n");
7679
7680         /* clear dma mappings for failed tx_buffer_info map */
7681         for (;;) {
7682                 tx_buffer = &tx_ring->tx_buffer_info[i];
7683                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7684                 if (tx_buffer == first)
7685                         break;
7686                 if (i == 0)
7687                         i = tx_ring->count;
7688                 i--;
7689         }
7690
7691         tx_ring->next_to_use = i;
7692 }
7693
7694 static void ixgbe_atr(struct ixgbe_ring *ring,
7695                       struct ixgbe_tx_buffer *first)
7696 {
7697         struct ixgbe_q_vector *q_vector = ring->q_vector;
7698         union ixgbe_atr_hash_dword input = { .dword = 0 };
7699         union ixgbe_atr_hash_dword common = { .dword = 0 };
7700         union {
7701                 unsigned char *network;
7702                 struct iphdr *ipv4;
7703                 struct ipv6hdr *ipv6;
7704         } hdr;
7705         struct tcphdr *th;
7706         unsigned int hlen;
7707         struct sk_buff *skb;
7708         __be16 vlan_id;
7709         int l4_proto;
7710
7711         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7712         if (!q_vector)
7713                 return;
7714
7715         /* do nothing if sampling is disabled */
7716         if (!ring->atr_sample_rate)
7717                 return;
7718
7719         ring->atr_count++;
7720
7721         /* currently only IPv4/IPv6 with TCP is supported */
7722         if ((first->protocol != htons(ETH_P_IP)) &&
7723             (first->protocol != htons(ETH_P_IPV6)))
7724                 return;
7725
7726         /* snag network header to get L4 type and address */
7727         skb = first->skb;
7728         hdr.network = skb_network_header(skb);
7729         if (unlikely(hdr.network <= skb->data))
7730                 return;
7731         if (skb->encapsulation &&
7732             first->protocol == htons(ETH_P_IP) &&
7733             hdr.ipv4->protocol == IPPROTO_UDP) {
7734                 struct ixgbe_adapter *adapter = q_vector->adapter;
7735
7736                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
7737                              VXLAN_HEADROOM))
7738                         return;
7739
7740                 /* verify the port is recognized as VXLAN */
7741                 if (adapter->vxlan_port &&
7742                     udp_hdr(skb)->dest == adapter->vxlan_port)
7743                         hdr.network = skb_inner_network_header(skb);
7744
7745                 if (adapter->geneve_port &&
7746                     udp_hdr(skb)->dest == adapter->geneve_port)
7747                         hdr.network = skb_inner_network_header(skb);
7748         }
7749
7750         /* Make sure we have at least [minimum IPv4 header + TCP]
7751          * or [IPv6 header] bytes
7752          */
7753         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
7754                 return;
7755
7756         /* Currently only IPv4/IPv6 with TCP is supported */
7757         switch (hdr.ipv4->version) {
7758         case IPVERSION:
7759                 /* access ihl as u8 to avoid unaligned access on ia64 */
7760                 hlen = (hdr.network[0] & 0x0F) << 2;
7761                 l4_proto = hdr.ipv4->protocol;
7762                 break;
7763         case 6:
7764                 hlen = hdr.network - skb->data;
7765                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7766                 hlen -= hdr.network - skb->data;
7767                 break;
7768         default:
7769                 return;
7770         }
7771
7772         if (l4_proto != IPPROTO_TCP)
7773                 return;
7774
7775         if (unlikely(skb_tail_pointer(skb) < hdr.network +
7776                      hlen + sizeof(struct tcphdr)))
7777                 return;
7778
7779         th = (struct tcphdr *)(hdr.network + hlen);
7780
7781         /* skip this packet since the socket is closing */
7782         if (th->fin)
7783                 return;
7784
7785         /* sample on all syn packets or once every atr sample count */
7786         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7787                 return;
7788
7789         /* reset sample count */
7790         ring->atr_count = 0;
7791
7792         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7793
7794         /*
7795          * src and dst are inverted, think how the receiver sees them
7796          *
7797          * The input is broken into two sections, a non-compressed section
7798          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7799          * is XORed together and stored in the compressed dword.
7800          */
7801         input.formatted.vlan_id = vlan_id;
7802
7803         /*
7804          * since src port and flex bytes occupy the same word XOR them together
7805          * and write the value to source port portion of compressed dword
7806          */
7807         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7808                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7809         else
7810                 common.port.src ^= th->dest ^ first->protocol;
7811         common.port.dst ^= th->source;
7812
7813         switch (hdr.ipv4->version) {
7814         case IPVERSION:
7815                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7816                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7817                 break;
7818         case 6:
7819                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7820                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7821                              hdr.ipv6->saddr.s6_addr32[1] ^
7822                              hdr.ipv6->saddr.s6_addr32[2] ^
7823                              hdr.ipv6->saddr.s6_addr32[3] ^
7824                              hdr.ipv6->daddr.s6_addr32[0] ^
7825                              hdr.ipv6->daddr.s6_addr32[1] ^
7826                              hdr.ipv6->daddr.s6_addr32[2] ^
7827                              hdr.ipv6->daddr.s6_addr32[3];
7828                 break;
7829         default:
7830                 break;
7831         }
7832
7833         if (hdr.network != skb_network_header(skb))
7834                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7835
7836         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7837         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7838                                               input, common, ring->queue_index);
7839 }
7840
7841 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7842                               void *accel_priv, select_queue_fallback_t fallback)
7843 {
7844         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7845 #ifdef IXGBE_FCOE
7846         struct ixgbe_adapter *adapter;
7847         struct ixgbe_ring_feature *f;
7848         int txq;
7849 #endif
7850
7851         if (fwd_adapter)
7852                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7853
7854 #ifdef IXGBE_FCOE
7855
7856         /*
7857          * only execute the code below if protocol is FCoE
7858          * or FIP and we have FCoE enabled on the adapter
7859          */
7860         switch (vlan_get_protocol(skb)) {
7861         case htons(ETH_P_FCOE):
7862         case htons(ETH_P_FIP):
7863                 adapter = netdev_priv(dev);
7864
7865                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7866                         break;
7867         default:
7868                 return fallback(dev, skb);
7869         }
7870
7871         f = &adapter->ring_feature[RING_F_FCOE];
7872
7873         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7874                                            smp_processor_id();
7875
7876         while (txq >= f->indices)
7877                 txq -= f->indices;
7878
7879         return txq + f->offset;
7880 #else
7881         return fallback(dev, skb);
7882 #endif
7883 }
7884
7885 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7886                           struct ixgbe_adapter *adapter,
7887                           struct ixgbe_ring *tx_ring)
7888 {
7889         struct ixgbe_tx_buffer *first;
7890         int tso;
7891         u32 tx_flags = 0;
7892         unsigned short f;
7893         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7894         __be16 protocol = skb->protocol;
7895         u8 hdr_len = 0;
7896
7897         /*
7898          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7899          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7900          *       + 2 desc gap to keep tail from touching head,
7901          *       + 1 desc for context descriptor,
7902          * otherwise try next time
7903          */
7904         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7905                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7906
7907         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7908                 tx_ring->tx_stats.tx_busy++;
7909                 return NETDEV_TX_BUSY;
7910         }
7911
7912         /* record the location of the first descriptor for this packet */
7913         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7914         first->skb = skb;
7915         first->bytecount = skb->len;
7916         first->gso_segs = 1;
7917
7918         /* if we have a HW VLAN tag being added default to the HW one */
7919         if (skb_vlan_tag_present(skb)) {
7920                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7921                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7922         /* else if it is a SW VLAN check the next protocol and store the tag */
7923         } else if (protocol == htons(ETH_P_8021Q)) {
7924                 struct vlan_hdr *vhdr, _vhdr;
7925                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7926                 if (!vhdr)
7927                         goto out_drop;
7928
7929                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7930                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7931                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7932         }
7933         protocol = vlan_get_protocol(skb);
7934
7935         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7936             adapter->ptp_clock &&
7937             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7938                                    &adapter->state)) {
7939                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7940                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7941
7942                 /* schedule check for Tx timestamp */
7943                 adapter->ptp_tx_skb = skb_get(skb);
7944                 adapter->ptp_tx_start = jiffies;
7945                 schedule_work(&adapter->ptp_tx_work);
7946         }
7947
7948         skb_tx_timestamp(skb);
7949
7950 #ifdef CONFIG_PCI_IOV
7951         /*
7952          * Use the l2switch_enable flag - would be false if the DMA
7953          * Tx switch had been disabled.
7954          */
7955         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7956                 tx_flags |= IXGBE_TX_FLAGS_CC;
7957
7958 #endif
7959         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7960         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7961             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7962              (skb->priority != TC_PRIO_CONTROL))) {
7963                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7964                 tx_flags |= (skb->priority & 0x7) <<
7965                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7966                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7967                         struct vlan_ethhdr *vhdr;
7968
7969                         if (skb_cow_head(skb, 0))
7970                                 goto out_drop;
7971                         vhdr = (struct vlan_ethhdr *)skb->data;
7972                         vhdr->h_vlan_TCI = htons(tx_flags >>
7973                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7974                 } else {
7975                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7976                 }
7977         }
7978
7979         /* record initial flags and protocol */
7980         first->tx_flags = tx_flags;
7981         first->protocol = protocol;
7982
7983 #ifdef IXGBE_FCOE
7984         /* setup tx offload for FCoE */
7985         if ((protocol == htons(ETH_P_FCOE)) &&
7986             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7987                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7988                 if (tso < 0)
7989                         goto out_drop;
7990
7991                 goto xmit_fcoe;
7992         }
7993
7994 #endif /* IXGBE_FCOE */
7995         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7996         if (tso < 0)
7997                 goto out_drop;
7998         else if (!tso)
7999                 ixgbe_tx_csum(tx_ring, first);
8000
8001         /* add the ATR filter if ATR is on */
8002         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8003                 ixgbe_atr(tx_ring, first);
8004
8005 #ifdef IXGBE_FCOE
8006 xmit_fcoe:
8007 #endif /* IXGBE_FCOE */
8008         ixgbe_tx_map(tx_ring, first, hdr_len);
8009
8010         return NETDEV_TX_OK;
8011
8012 out_drop:
8013         dev_kfree_skb_any(first->skb);
8014         first->skb = NULL;
8015
8016         return NETDEV_TX_OK;
8017 }
8018
8019 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8020                                       struct net_device *netdev,
8021                                       struct ixgbe_ring *ring)
8022 {
8023         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8024         struct ixgbe_ring *tx_ring;
8025
8026         /*
8027          * The minimum packet size for olinfo paylen is 17 so pad the skb
8028          * in order to meet this minimum size requirement.
8029          */
8030         if (skb_put_padto(skb, 17))
8031                 return NETDEV_TX_OK;
8032
8033         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8034
8035         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8036 }
8037
8038 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8039                                     struct net_device *netdev)
8040 {
8041         return __ixgbe_xmit_frame(skb, netdev, NULL);
8042 }
8043
8044 /**
8045  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8046  * @netdev: network interface device structure
8047  * @p: pointer to an address structure
8048  *
8049  * Returns 0 on success, negative on failure
8050  **/
8051 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8052 {
8053         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8054         struct ixgbe_hw *hw = &adapter->hw;
8055         struct sockaddr *addr = p;
8056
8057         if (!is_valid_ether_addr(addr->sa_data))
8058                 return -EADDRNOTAVAIL;
8059
8060         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8061         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8062
8063         ixgbe_mac_set_default_filter(adapter);
8064
8065         return 0;
8066 }
8067
8068 static int
8069 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8070 {
8071         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8072         struct ixgbe_hw *hw = &adapter->hw;
8073         u16 value;
8074         int rc;
8075
8076         if (prtad != hw->phy.mdio.prtad)
8077                 return -EINVAL;
8078         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8079         if (!rc)
8080                 rc = value;
8081         return rc;
8082 }
8083
8084 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8085                             u16 addr, u16 value)
8086 {
8087         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8088         struct ixgbe_hw *hw = &adapter->hw;
8089
8090         if (prtad != hw->phy.mdio.prtad)
8091                 return -EINVAL;
8092         return hw->phy.ops.write_reg(hw, addr, devad, value);
8093 }
8094
8095 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8096 {
8097         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8098
8099         switch (cmd) {
8100         case SIOCSHWTSTAMP:
8101                 return ixgbe_ptp_set_ts_config(adapter, req);
8102         case SIOCGHWTSTAMP:
8103                 return ixgbe_ptp_get_ts_config(adapter, req);
8104         default:
8105                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8106         }
8107 }
8108
8109 /**
8110  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8111  * netdev->dev_addrs
8112  * @netdev: network interface device structure
8113  *
8114  * Returns non-zero on failure
8115  **/
8116 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8117 {
8118         int err = 0;
8119         struct ixgbe_adapter *adapter = netdev_priv(dev);
8120         struct ixgbe_hw *hw = &adapter->hw;
8121
8122         if (is_valid_ether_addr(hw->mac.san_addr)) {
8123                 rtnl_lock();
8124                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8125                 rtnl_unlock();
8126
8127                 /* update SAN MAC vmdq pool selection */
8128                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8129         }
8130         return err;
8131 }
8132
8133 /**
8134  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8135  * netdev->dev_addrs
8136  * @netdev: network interface device structure
8137  *
8138  * Returns non-zero on failure
8139  **/
8140 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8141 {
8142         int err = 0;
8143         struct ixgbe_adapter *adapter = netdev_priv(dev);
8144         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8145
8146         if (is_valid_ether_addr(mac->san_addr)) {
8147                 rtnl_lock();
8148                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8149                 rtnl_unlock();
8150         }
8151         return err;
8152 }
8153
8154 #ifdef CONFIG_NET_POLL_CONTROLLER
8155 /*
8156  * Polling 'interrupt' - used by things like netconsole to send skbs
8157  * without having to re-enable interrupts. It's not called while
8158  * the interrupt routine is executing.
8159  */
8160 static void ixgbe_netpoll(struct net_device *netdev)
8161 {
8162         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8163         int i;
8164
8165         /* if interface is down do nothing */
8166         if (test_bit(__IXGBE_DOWN, &adapter->state))
8167                 return;
8168
8169         /* loop through and schedule all active queues */
8170         for (i = 0; i < adapter->num_q_vectors; i++)
8171                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8172 }
8173
8174 #endif
8175
8176 static void ixgbe_get_stats64(struct net_device *netdev,
8177                               struct rtnl_link_stats64 *stats)
8178 {
8179         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8180         int i;
8181
8182         rcu_read_lock();
8183         for (i = 0; i < adapter->num_rx_queues; i++) {
8184                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8185                 u64 bytes, packets;
8186                 unsigned int start;
8187
8188                 if (ring) {
8189                         do {
8190                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8191                                 packets = ring->stats.packets;
8192                                 bytes   = ring->stats.bytes;
8193                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8194                         stats->rx_packets += packets;
8195                         stats->rx_bytes   += bytes;
8196                 }
8197         }
8198
8199         for (i = 0; i < adapter->num_tx_queues; i++) {
8200                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8201                 u64 bytes, packets;
8202                 unsigned int start;
8203
8204                 if (ring) {
8205                         do {
8206                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8207                                 packets = ring->stats.packets;
8208                                 bytes   = ring->stats.bytes;
8209                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8210                         stats->tx_packets += packets;
8211                         stats->tx_bytes   += bytes;
8212                 }
8213         }
8214         rcu_read_unlock();
8215
8216         /* following stats updated by ixgbe_watchdog_task() */
8217         stats->multicast        = netdev->stats.multicast;
8218         stats->rx_errors        = netdev->stats.rx_errors;
8219         stats->rx_length_errors = netdev->stats.rx_length_errors;
8220         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8221         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8222 }
8223
8224 #ifdef CONFIG_IXGBE_DCB
8225 /**
8226  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8227  * @adapter: pointer to ixgbe_adapter
8228  * @tc: number of traffic classes currently enabled
8229  *
8230  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8231  * 802.1Q priority maps to a packet buffer that exists.
8232  */
8233 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8234 {
8235         struct ixgbe_hw *hw = &adapter->hw;
8236         u32 reg, rsave;
8237         int i;
8238
8239         /* 82598 have a static priority to TC mapping that can not
8240          * be changed so no validation is needed.
8241          */
8242         if (hw->mac.type == ixgbe_mac_82598EB)
8243                 return;
8244
8245         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8246         rsave = reg;
8247
8248         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8249                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8250
8251                 /* If up2tc is out of bounds default to zero */
8252                 if (up2tc > tc)
8253                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8254         }
8255
8256         if (reg != rsave)
8257                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8258
8259         return;
8260 }
8261
8262 /**
8263  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8264  * @adapter: Pointer to adapter struct
8265  *
8266  * Populate the netdev user priority to tc map
8267  */
8268 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8269 {
8270         struct net_device *dev = adapter->netdev;
8271         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8272         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8273         u8 prio;
8274
8275         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8276                 u8 tc = 0;
8277
8278                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8279                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8280                 else if (ets)
8281                         tc = ets->prio_tc[prio];
8282
8283                 netdev_set_prio_tc_map(dev, prio, tc);
8284         }
8285 }
8286
8287 #endif /* CONFIG_IXGBE_DCB */
8288 /**
8289  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8290  *
8291  * @netdev: net device to configure
8292  * @tc: number of traffic classes to enable
8293  */
8294 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8295 {
8296         struct ixgbe_adapter *adapter = netdev_priv(dev);
8297         struct ixgbe_hw *hw = &adapter->hw;
8298         bool pools;
8299
8300         /* Hardware supports up to 8 traffic classes */
8301         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8302                 return -EINVAL;
8303
8304         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8305                 return -EINVAL;
8306
8307         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8308         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8309                 return -EBUSY;
8310
8311         /* Hardware has to reinitialize queues and interrupts to
8312          * match packet buffer alignment. Unfortunately, the
8313          * hardware is not flexible enough to do this dynamically.
8314          */
8315         if (netif_running(dev))
8316                 ixgbe_close(dev);
8317         else
8318                 ixgbe_reset(adapter);
8319
8320         ixgbe_clear_interrupt_scheme(adapter);
8321
8322 #ifdef CONFIG_IXGBE_DCB
8323         if (tc) {
8324                 netdev_set_num_tc(dev, tc);
8325                 ixgbe_set_prio_tc_map(adapter);
8326
8327                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8328
8329                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8330                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8331                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8332                 }
8333         } else {
8334                 netdev_reset_tc(dev);
8335
8336                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8337                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8338
8339                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8340
8341                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8342                 adapter->dcb_cfg.pfc_mode_enable = false;
8343         }
8344
8345         ixgbe_validate_rtr(adapter, tc);
8346
8347 #endif /* CONFIG_IXGBE_DCB */
8348         ixgbe_init_interrupt_scheme(adapter);
8349
8350         if (netif_running(dev))
8351                 return ixgbe_open(dev);
8352
8353         return 0;
8354 }
8355
8356 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8357                                struct tc_cls_u32_offload *cls)
8358 {
8359         u32 hdl = cls->knode.handle;
8360         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8361         u32 loc = cls->knode.handle & 0xfffff;
8362         int err = 0, i, j;
8363         struct ixgbe_jump_table *jump = NULL;
8364
8365         if (loc > IXGBE_MAX_HW_ENTRIES)
8366                 return -EINVAL;
8367
8368         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8369                 return -EINVAL;
8370
8371         /* Clear this filter in the link data it is associated with */
8372         if (uhtid != 0x800) {
8373                 jump = adapter->jump_tables[uhtid];
8374                 if (!jump)
8375                         return -EINVAL;
8376                 if (!test_bit(loc - 1, jump->child_loc_map))
8377                         return -EINVAL;
8378                 clear_bit(loc - 1, jump->child_loc_map);
8379         }
8380
8381         /* Check if the filter being deleted is a link */
8382         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8383                 jump = adapter->jump_tables[i];
8384                 if (jump && jump->link_hdl == hdl) {
8385                         /* Delete filters in the hardware in the child hash
8386                          * table associated with this link
8387                          */
8388                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8389                                 if (!test_bit(j, jump->child_loc_map))
8390                                         continue;
8391                                 spin_lock(&adapter->fdir_perfect_lock);
8392                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8393                                                                       NULL,
8394                                                                       j + 1);
8395                                 spin_unlock(&adapter->fdir_perfect_lock);
8396                                 clear_bit(j, jump->child_loc_map);
8397                         }
8398                         /* Remove resources for this link */
8399                         kfree(jump->input);
8400                         kfree(jump->mask);
8401                         kfree(jump);
8402                         adapter->jump_tables[i] = NULL;
8403                         return err;
8404                 }
8405         }
8406
8407         spin_lock(&adapter->fdir_perfect_lock);
8408         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8409         spin_unlock(&adapter->fdir_perfect_lock);
8410         return err;
8411 }
8412
8413 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8414                                             __be16 protocol,
8415                                             struct tc_cls_u32_offload *cls)
8416 {
8417         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8418
8419         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8420                 return -EINVAL;
8421
8422         /* This ixgbe devices do not support hash tables at the moment
8423          * so abort when given hash tables.
8424          */
8425         if (cls->hnode.divisor > 0)
8426                 return -EINVAL;
8427
8428         set_bit(uhtid - 1, &adapter->tables);
8429         return 0;
8430 }
8431
8432 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8433                                             struct tc_cls_u32_offload *cls)
8434 {
8435         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8436
8437         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8438                 return -EINVAL;
8439
8440         clear_bit(uhtid - 1, &adapter->tables);
8441         return 0;
8442 }
8443
8444 #ifdef CONFIG_NET_CLS_ACT
8445 struct upper_walk_data {
8446         struct ixgbe_adapter *adapter;
8447         u64 action;
8448         int ifindex;
8449         u8 queue;
8450 };
8451
8452 static int get_macvlan_queue(struct net_device *upper, void *_data)
8453 {
8454         if (netif_is_macvlan(upper)) {
8455                 struct macvlan_dev *dfwd = netdev_priv(upper);
8456                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8457                 struct upper_walk_data *data = _data;
8458                 struct ixgbe_adapter *adapter = data->adapter;
8459                 int ifindex = data->ifindex;
8460
8461                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8462                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8463                         data->action = data->queue;
8464                         return 1;
8465                 }
8466         }
8467
8468         return 0;
8469 }
8470
8471 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8472                                   u8 *queue, u64 *action)
8473 {
8474         unsigned int num_vfs = adapter->num_vfs, vf;
8475         struct upper_walk_data data;
8476         struct net_device *upper;
8477
8478         /* redirect to a SRIOV VF */
8479         for (vf = 0; vf < num_vfs; ++vf) {
8480                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8481                 if (upper->ifindex == ifindex) {
8482                         if (adapter->num_rx_pools > 1)
8483                                 *queue = vf * 2;
8484                         else
8485                                 *queue = vf * adapter->num_rx_queues_per_pool;
8486
8487                         *action = vf + 1;
8488                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8489                         return 0;
8490                 }
8491         }
8492
8493         /* redirect to a offloaded macvlan netdev */
8494         data.adapter = adapter;
8495         data.ifindex = ifindex;
8496         data.action = 0;
8497         data.queue = 0;
8498         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8499                                           get_macvlan_queue, &data)) {
8500                 *action = data.action;
8501                 *queue = data.queue;
8502
8503                 return 0;
8504         }
8505
8506         return -EINVAL;
8507 }
8508
8509 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8510                             struct tcf_exts *exts, u64 *action, u8 *queue)
8511 {
8512         const struct tc_action *a;
8513         LIST_HEAD(actions);
8514         int err;
8515
8516         if (tc_no_actions(exts))
8517                 return -EINVAL;
8518
8519         tcf_exts_to_list(exts, &actions);
8520         list_for_each_entry(a, &actions, list) {
8521
8522                 /* Drop action */
8523                 if (is_tcf_gact_shot(a)) {
8524                         *action = IXGBE_FDIR_DROP_QUEUE;
8525                         *queue = IXGBE_FDIR_DROP_QUEUE;
8526                         return 0;
8527                 }
8528
8529                 /* Redirect to a VF or a offloaded macvlan */
8530                 if (is_tcf_mirred_egress_redirect(a)) {
8531                         int ifindex = tcf_mirred_ifindex(a);
8532
8533                         err = handle_redirect_action(adapter, ifindex, queue,
8534                                                      action);
8535                         if (err == 0)
8536                                 return err;
8537                 }
8538         }
8539
8540         return -EINVAL;
8541 }
8542 #else
8543 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8544                             struct tcf_exts *exts, u64 *action, u8 *queue)
8545 {
8546         return -EINVAL;
8547 }
8548 #endif /* CONFIG_NET_CLS_ACT */
8549
8550 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8551                                     union ixgbe_atr_input *mask,
8552                                     struct tc_cls_u32_offload *cls,
8553                                     struct ixgbe_mat_field *field_ptr,
8554                                     struct ixgbe_nexthdr *nexthdr)
8555 {
8556         int i, j, off;
8557         __be32 val, m;
8558         bool found_entry = false, found_jump_field = false;
8559
8560         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8561                 off = cls->knode.sel->keys[i].off;
8562                 val = cls->knode.sel->keys[i].val;
8563                 m = cls->knode.sel->keys[i].mask;
8564
8565                 for (j = 0; field_ptr[j].val; j++) {
8566                         if (field_ptr[j].off == off) {
8567                                 field_ptr[j].val(input, mask, val, m);
8568                                 input->filter.formatted.flow_type |=
8569                                         field_ptr[j].type;
8570                                 found_entry = true;
8571                                 break;
8572                         }
8573                 }
8574                 if (nexthdr) {
8575                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
8576                             nexthdr->val == cls->knode.sel->keys[i].val &&
8577                             nexthdr->mask == cls->knode.sel->keys[i].mask)
8578                                 found_jump_field = true;
8579                         else
8580                                 continue;
8581                 }
8582         }
8583
8584         if (nexthdr && !found_jump_field)
8585                 return -EINVAL;
8586
8587         if (!found_entry)
8588                 return 0;
8589
8590         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8591                                     IXGBE_ATR_L4TYPE_MASK;
8592
8593         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8594                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8595
8596         return 0;
8597 }
8598
8599 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8600                                   __be16 protocol,
8601                                   struct tc_cls_u32_offload *cls)
8602 {
8603         u32 loc = cls->knode.handle & 0xfffff;
8604         struct ixgbe_hw *hw = &adapter->hw;
8605         struct ixgbe_mat_field *field_ptr;
8606         struct ixgbe_fdir_filter *input = NULL;
8607         union ixgbe_atr_input *mask = NULL;
8608         struct ixgbe_jump_table *jump = NULL;
8609         int i, err = -EINVAL;
8610         u8 queue;
8611         u32 uhtid, link_uhtid;
8612
8613         uhtid = TC_U32_USERHTID(cls->knode.handle);
8614         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8615
8616         /* At the moment cls_u32 jumps to network layer and skips past
8617          * L2 headers. The canonical method to match L2 frames is to use
8618          * negative values. However this is error prone at best but really
8619          * just broken because there is no way to "know" what sort of hdr
8620          * is in front of the network layer. Fix cls_u32 to support L2
8621          * headers when needed.
8622          */
8623         if (protocol != htons(ETH_P_IP))
8624                 return err;
8625
8626         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8627                 e_err(drv, "Location out of range\n");
8628                 return err;
8629         }
8630
8631         /* cls u32 is a graph starting at root node 0x800. The driver tracks
8632          * links and also the fields used to advance the parser across each
8633          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8634          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8635          * To add support for new nodes update ixgbe_model.h parse structures
8636          * this function _should_ be generic try not to hardcode values here.
8637          */
8638         if (uhtid == 0x800) {
8639                 field_ptr = (adapter->jump_tables[0])->mat;
8640         } else {
8641                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8642                         return err;
8643                 if (!adapter->jump_tables[uhtid])
8644                         return err;
8645                 field_ptr = (adapter->jump_tables[uhtid])->mat;
8646         }
8647
8648         if (!field_ptr)
8649                 return err;
8650
8651         /* At this point we know the field_ptr is valid and need to either
8652          * build cls_u32 link or attach filter. Because adding a link to
8653          * a handle that does not exist is invalid and the same for adding
8654          * rules to handles that don't exist.
8655          */
8656
8657         if (link_uhtid) {
8658                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8659
8660                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8661                         return err;
8662
8663                 if (!test_bit(link_uhtid - 1, &adapter->tables))
8664                         return err;
8665
8666                 /* Multiple filters as links to the same hash table are not
8667                  * supported. To add a new filter with the same next header
8668                  * but different match/jump conditions, create a new hash table
8669                  * and link to it.
8670                  */
8671                 if (adapter->jump_tables[link_uhtid] &&
8672                     (adapter->jump_tables[link_uhtid])->link_hdl) {
8673                         e_err(drv, "Link filter exists for link: %x\n",
8674                               link_uhtid);
8675                         return err;
8676                 }
8677
8678                 for (i = 0; nexthdr[i].jump; i++) {
8679                         if (nexthdr[i].o != cls->knode.sel->offoff ||
8680                             nexthdr[i].s != cls->knode.sel->offshift ||
8681                             nexthdr[i].m != cls->knode.sel->offmask)
8682                                 return err;
8683
8684                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8685                         if (!jump)
8686                                 return -ENOMEM;
8687                         input = kzalloc(sizeof(*input), GFP_KERNEL);
8688                         if (!input) {
8689                                 err = -ENOMEM;
8690                                 goto free_jump;
8691                         }
8692                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8693                         if (!mask) {
8694                                 err = -ENOMEM;
8695                                 goto free_input;
8696                         }
8697                         jump->input = input;
8698                         jump->mask = mask;
8699                         jump->link_hdl = cls->knode.handle;
8700
8701                         err = ixgbe_clsu32_build_input(input, mask, cls,
8702                                                        field_ptr, &nexthdr[i]);
8703                         if (!err) {
8704                                 jump->mat = nexthdr[i].jump;
8705                                 adapter->jump_tables[link_uhtid] = jump;
8706                                 break;
8707                         }
8708                 }
8709                 return 0;
8710         }
8711
8712         input = kzalloc(sizeof(*input), GFP_KERNEL);
8713         if (!input)
8714                 return -ENOMEM;
8715         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8716         if (!mask) {
8717                 err = -ENOMEM;
8718                 goto free_input;
8719         }
8720
8721         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8722                 if ((adapter->jump_tables[uhtid])->input)
8723                         memcpy(input, (adapter->jump_tables[uhtid])->input,
8724                                sizeof(*input));
8725                 if ((adapter->jump_tables[uhtid])->mask)
8726                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8727                                sizeof(*mask));
8728
8729                 /* Lookup in all child hash tables if this location is already
8730                  * filled with a filter
8731                  */
8732                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8733                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
8734
8735                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
8736                                 e_err(drv, "Filter exists in location: %x\n",
8737                                       loc);
8738                                 err = -EINVAL;
8739                                 goto err_out;
8740                         }
8741                 }
8742         }
8743         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8744         if (err)
8745                 goto err_out;
8746
8747         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8748                                &queue);
8749         if (err < 0)
8750                 goto err_out;
8751
8752         input->sw_idx = loc;
8753
8754         spin_lock(&adapter->fdir_perfect_lock);
8755
8756         if (hlist_empty(&adapter->fdir_filter_list)) {
8757                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8758                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8759                 if (err)
8760                         goto err_out_w_lock;
8761         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8762                 err = -EINVAL;
8763                 goto err_out_w_lock;
8764         }
8765
8766         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8767         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8768                                                     input->sw_idx, queue);
8769         if (!err)
8770                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8771         spin_unlock(&adapter->fdir_perfect_lock);
8772
8773         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8774                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8775
8776         kfree(mask);
8777         return err;
8778 err_out_w_lock:
8779         spin_unlock(&adapter->fdir_perfect_lock);
8780 err_out:
8781         kfree(mask);
8782 free_input:
8783         kfree(input);
8784 free_jump:
8785         kfree(jump);
8786         return err;
8787 }
8788
8789 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8790                             struct tc_to_netdev *tc)
8791 {
8792         struct ixgbe_adapter *adapter = netdev_priv(dev);
8793
8794         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8795             tc->type == TC_SETUP_CLSU32) {
8796                 switch (tc->cls_u32->command) {
8797                 case TC_CLSU32_NEW_KNODE:
8798                 case TC_CLSU32_REPLACE_KNODE:
8799                         return ixgbe_configure_clsu32(adapter,
8800                                                       proto, tc->cls_u32);
8801                 case TC_CLSU32_DELETE_KNODE:
8802                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8803                 case TC_CLSU32_NEW_HNODE:
8804                 case TC_CLSU32_REPLACE_HNODE:
8805                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8806                                                                 tc->cls_u32);
8807                 case TC_CLSU32_DELETE_HNODE:
8808                         return ixgbe_configure_clsu32_del_hnode(adapter,
8809                                                                 tc->cls_u32);
8810                 default:
8811                         return -EINVAL;
8812                 }
8813         }
8814
8815         if (tc->type != TC_SETUP_MQPRIO)
8816                 return -EINVAL;
8817
8818         return ixgbe_setup_tc(dev, tc->tc);
8819 }
8820
8821 #ifdef CONFIG_PCI_IOV
8822 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8823 {
8824         struct net_device *netdev = adapter->netdev;
8825
8826         rtnl_lock();
8827         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8828         rtnl_unlock();
8829 }
8830
8831 #endif
8832 void ixgbe_do_reset(struct net_device *netdev)
8833 {
8834         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8835
8836         if (netif_running(netdev))
8837                 ixgbe_reinit_locked(adapter);
8838         else
8839                 ixgbe_reset(adapter);
8840 }
8841
8842 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8843                                             netdev_features_t features)
8844 {
8845         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8846
8847         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8848         if (!(features & NETIF_F_RXCSUM))
8849                 features &= ~NETIF_F_LRO;
8850
8851         /* Turn off LRO if not RSC capable */
8852         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8853                 features &= ~NETIF_F_LRO;
8854
8855         return features;
8856 }
8857
8858 static int ixgbe_set_features(struct net_device *netdev,
8859                               netdev_features_t features)
8860 {
8861         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8862         netdev_features_t changed = netdev->features ^ features;
8863         bool need_reset = false;
8864
8865         /* Make sure RSC matches LRO, reset if change */
8866         if (!(features & NETIF_F_LRO)) {
8867                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8868                         need_reset = true;
8869                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8870         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8871                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8872                 if (adapter->rx_itr_setting == 1 ||
8873                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8874                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8875                         need_reset = true;
8876                 } else if ((changed ^ features) & NETIF_F_LRO) {
8877                         e_info(probe, "rx-usecs set too low, "
8878                                "disabling RSC\n");
8879                 }
8880         }
8881
8882         /*
8883          * Check if Flow Director n-tuple support or hw_tc support was
8884          * enabled or disabled.  If the state changed, we need to reset.
8885          */
8886         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8887                 /* turn off ATR, enable perfect filters and reset */
8888                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8889                         need_reset = true;
8890
8891                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8892                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8893         } else {
8894                 /* turn off perfect filters, enable ATR and reset */
8895                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8896                         need_reset = true;
8897
8898                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8899
8900                 /* We cannot enable ATR if SR-IOV is enabled */
8901                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8902                     /* We cannot enable ATR if we have 2 or more tcs */
8903                     (netdev_get_num_tc(netdev) > 1) ||
8904                     /* We cannot enable ATR if RSS is disabled */
8905                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8906                     /* A sample rate of 0 indicates ATR disabled */
8907                     (!adapter->atr_sample_rate))
8908                         ; /* do nothing not supported */
8909                 else /* otherwise supported and set the flag */
8910                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8911         }
8912
8913         if (changed & NETIF_F_RXALL)
8914                 need_reset = true;
8915
8916         netdev->features = features;
8917
8918         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8919                 if (features & NETIF_F_RXCSUM) {
8920                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8921                 } else {
8922                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8923
8924                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8925                 }
8926         }
8927
8928         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
8929                 if (features & NETIF_F_RXCSUM) {
8930                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8931                 } else {
8932                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8933
8934                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8935                 }
8936         }
8937
8938         if (need_reset)
8939                 ixgbe_do_reset(netdev);
8940         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8941                             NETIF_F_HW_VLAN_CTAG_FILTER))
8942                 ixgbe_set_rx_mode(netdev);
8943
8944         return 0;
8945 }
8946
8947 /**
8948  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
8949  * @dev: The port's netdev
8950  * @ti: Tunnel endpoint information
8951  **/
8952 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
8953                                       struct udp_tunnel_info *ti)
8954 {
8955         struct ixgbe_adapter *adapter = netdev_priv(dev);
8956         struct ixgbe_hw *hw = &adapter->hw;
8957         __be16 port = ti->port;
8958         u32 port_shift = 0;
8959         u32 reg;
8960
8961         if (ti->sa_family != AF_INET)
8962                 return;
8963
8964         switch (ti->type) {
8965         case UDP_TUNNEL_TYPE_VXLAN:
8966                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8967                         return;
8968
8969                 if (adapter->vxlan_port == port)
8970                         return;
8971
8972                 if (adapter->vxlan_port) {
8973                         netdev_info(dev,
8974                                     "VXLAN port %d set, not adding port %d\n",
8975                                     ntohs(adapter->vxlan_port),
8976                                     ntohs(port));
8977                         return;
8978                 }
8979
8980                 adapter->vxlan_port = port;
8981                 break;
8982         case UDP_TUNNEL_TYPE_GENEVE:
8983                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8984                         return;
8985
8986                 if (adapter->geneve_port == port)
8987                         return;
8988
8989                 if (adapter->geneve_port) {
8990                         netdev_info(dev,
8991                                     "GENEVE port %d set, not adding port %d\n",
8992                                     ntohs(adapter->geneve_port),
8993                                     ntohs(port));
8994                         return;
8995                 }
8996
8997                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
8998                 adapter->geneve_port = port;
8999                 break;
9000         default:
9001                 return;
9002         }
9003
9004         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9005         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9006 }
9007
9008 /**
9009  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9010  * @dev: The port's netdev
9011  * @ti: Tunnel endpoint information
9012  **/
9013 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9014                                       struct udp_tunnel_info *ti)
9015 {
9016         struct ixgbe_adapter *adapter = netdev_priv(dev);
9017         u32 port_mask;
9018
9019         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9020             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9021                 return;
9022
9023         if (ti->sa_family != AF_INET)
9024                 return;
9025
9026         switch (ti->type) {
9027         case UDP_TUNNEL_TYPE_VXLAN:
9028                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9029                         return;
9030
9031                 if (adapter->vxlan_port != ti->port) {
9032                         netdev_info(dev, "VXLAN port %d not found\n",
9033                                     ntohs(ti->port));
9034                         return;
9035                 }
9036
9037                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9038                 break;
9039         case UDP_TUNNEL_TYPE_GENEVE:
9040                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9041                         return;
9042
9043                 if (adapter->geneve_port != ti->port) {
9044                         netdev_info(dev, "GENEVE port %d not found\n",
9045                                     ntohs(ti->port));
9046                         return;
9047                 }
9048
9049                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9050                 break;
9051         default:
9052                 return;
9053         }
9054
9055         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9056         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9057 }
9058
9059 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9060                              struct net_device *dev,
9061                              const unsigned char *addr, u16 vid,
9062                              u16 flags)
9063 {
9064         /* guarantee we can provide a unique filter for the unicast address */
9065         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9066                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9067                 u16 pool = VMDQ_P(0);
9068
9069                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9070                         return -ENOMEM;
9071         }
9072
9073         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9074 }
9075
9076 /**
9077  * ixgbe_configure_bridge_mode - set various bridge modes
9078  * @adapter - the private structure
9079  * @mode - requested bridge mode
9080  *
9081  * Configure some settings require for various bridge modes.
9082  **/
9083 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9084                                        __u16 mode)
9085 {
9086         struct ixgbe_hw *hw = &adapter->hw;
9087         unsigned int p, num_pools;
9088         u32 vmdctl;
9089
9090         switch (mode) {
9091         case BRIDGE_MODE_VEPA:
9092                 /* disable Tx loopback, rely on switch hairpin mode */
9093                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9094
9095                 /* must enable Rx switching replication to allow multicast
9096                  * packet reception on all VFs, and to enable source address
9097                  * pruning.
9098                  */
9099                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9100                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9101                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9102
9103                 /* enable Rx source address pruning. Note, this requires
9104                  * replication to be enabled or else it does nothing.
9105                  */
9106                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9107                 for (p = 0; p < num_pools; p++) {
9108                         if (hw->mac.ops.set_source_address_pruning)
9109                                 hw->mac.ops.set_source_address_pruning(hw,
9110                                                                        true,
9111                                                                        p);
9112                 }
9113                 break;
9114         case BRIDGE_MODE_VEB:
9115                 /* enable Tx loopback for internal VF/PF communication */
9116                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9117                                 IXGBE_PFDTXGSWC_VT_LBEN);
9118
9119                 /* disable Rx switching replication unless we have SR-IOV
9120                  * virtual functions
9121                  */
9122                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9123                 if (!adapter->num_vfs)
9124                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9125                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9126
9127                 /* disable Rx source address pruning, since we don't expect to
9128                  * be receiving external loopback of our transmitted frames.
9129                  */
9130                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9131                 for (p = 0; p < num_pools; p++) {
9132                         if (hw->mac.ops.set_source_address_pruning)
9133                                 hw->mac.ops.set_source_address_pruning(hw,
9134                                                                        false,
9135                                                                        p);
9136                 }
9137                 break;
9138         default:
9139                 return -EINVAL;
9140         }
9141
9142         adapter->bridge_mode = mode;
9143
9144         e_info(drv, "enabling bridge mode: %s\n",
9145                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9146
9147         return 0;
9148 }
9149
9150 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9151                                     struct nlmsghdr *nlh, u16 flags)
9152 {
9153         struct ixgbe_adapter *adapter = netdev_priv(dev);
9154         struct nlattr *attr, *br_spec;
9155         int rem;
9156
9157         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9158                 return -EOPNOTSUPP;
9159
9160         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9161         if (!br_spec)
9162                 return -EINVAL;
9163
9164         nla_for_each_nested(attr, br_spec, rem) {
9165                 int status;
9166                 __u16 mode;
9167
9168                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9169                         continue;
9170
9171                 if (nla_len(attr) < sizeof(mode))
9172                         return -EINVAL;
9173
9174                 mode = nla_get_u16(attr);
9175                 status = ixgbe_configure_bridge_mode(adapter, mode);
9176                 if (status)
9177                         return status;
9178
9179                 break;
9180         }
9181
9182         return 0;
9183 }
9184
9185 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9186                                     struct net_device *dev,
9187                                     u32 filter_mask, int nlflags)
9188 {
9189         struct ixgbe_adapter *adapter = netdev_priv(dev);
9190
9191         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9192                 return 0;
9193
9194         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9195                                        adapter->bridge_mode, 0, 0, nlflags,
9196                                        filter_mask, NULL);
9197 }
9198
9199 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9200 {
9201         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9202         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9203         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9204         unsigned int limit;
9205         int pool, err;
9206
9207         /* Hardware has a limited number of available pools. Each VF, and the
9208          * PF require a pool. Check to ensure we don't attempt to use more
9209          * then the available number of pools.
9210          */
9211         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9212                 return ERR_PTR(-EINVAL);
9213
9214 #ifdef CONFIG_RPS
9215         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9216                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9217                             vdev->name);
9218                 return ERR_PTR(-EINVAL);
9219         }
9220 #endif
9221         /* Check for hardware restriction on number of rx/tx queues */
9222         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9223             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9224                 netdev_info(pdev,
9225                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9226                             pdev->name);
9227                 return ERR_PTR(-EINVAL);
9228         }
9229
9230         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9231               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9232             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9233                 return ERR_PTR(-EBUSY);
9234
9235         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9236         if (!fwd_adapter)
9237                 return ERR_PTR(-ENOMEM);
9238
9239         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9240         adapter->num_rx_pools++;
9241         set_bit(pool, &adapter->fwd_bitmask);
9242         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9243
9244         /* Enable VMDq flag so device will be set in VM mode */
9245         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9246         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9247         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9248
9249         /* Force reinit of ring allocation with VMDQ enabled */
9250         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9251         if (err)
9252                 goto fwd_add_err;
9253         fwd_adapter->pool = pool;
9254         fwd_adapter->real_adapter = adapter;
9255
9256         if (netif_running(pdev)) {
9257                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9258                 if (err)
9259                         goto fwd_add_err;
9260                 netif_tx_start_all_queues(vdev);
9261         }
9262
9263         return fwd_adapter;
9264 fwd_add_err:
9265         /* unwind counter and free adapter struct */
9266         netdev_info(pdev,
9267                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9268         clear_bit(pool, &adapter->fwd_bitmask);
9269         adapter->num_rx_pools--;
9270         kfree(fwd_adapter);
9271         return ERR_PTR(err);
9272 }
9273
9274 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9275 {
9276         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9277         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9278         unsigned int limit;
9279
9280         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9281         adapter->num_rx_pools--;
9282
9283         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9284         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9285         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9286         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9287         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9288                    fwd_adapter->pool, adapter->num_rx_pools,
9289                    fwd_adapter->rx_base_queue,
9290                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9291                    adapter->fwd_bitmask);
9292         kfree(fwd_adapter);
9293 }
9294
9295 #define IXGBE_MAX_MAC_HDR_LEN           127
9296 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9297
9298 static netdev_features_t
9299 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9300                      netdev_features_t features)
9301 {
9302         unsigned int network_hdr_len, mac_hdr_len;
9303
9304         /* Make certain the headers can be described by a context descriptor */
9305         mac_hdr_len = skb_network_header(skb) - skb->data;
9306         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9307                 return features & ~(NETIF_F_HW_CSUM |
9308                                     NETIF_F_SCTP_CRC |
9309                                     NETIF_F_HW_VLAN_CTAG_TX |
9310                                     NETIF_F_TSO |
9311                                     NETIF_F_TSO6);
9312
9313         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9314         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9315                 return features & ~(NETIF_F_HW_CSUM |
9316                                     NETIF_F_SCTP_CRC |
9317                                     NETIF_F_TSO |
9318                                     NETIF_F_TSO6);
9319
9320         /* We can only support IPV4 TSO in tunnels if we can mangle the
9321          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9322          */
9323         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9324                 features &= ~NETIF_F_TSO;
9325
9326         return features;
9327 }
9328
9329 static const struct net_device_ops ixgbe_netdev_ops = {
9330         .ndo_open               = ixgbe_open,
9331         .ndo_stop               = ixgbe_close,
9332         .ndo_start_xmit         = ixgbe_xmit_frame,
9333         .ndo_select_queue       = ixgbe_select_queue,
9334         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9335         .ndo_validate_addr      = eth_validate_addr,
9336         .ndo_set_mac_address    = ixgbe_set_mac,
9337         .ndo_change_mtu         = ixgbe_change_mtu,
9338         .ndo_tx_timeout         = ixgbe_tx_timeout,
9339         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9340         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9341         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9342         .ndo_do_ioctl           = ixgbe_ioctl,
9343         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9344         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9345         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9346         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9347         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9348         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9349         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9350         .ndo_get_stats64        = ixgbe_get_stats64,
9351         .ndo_setup_tc           = __ixgbe_setup_tc,
9352 #ifdef CONFIG_NET_POLL_CONTROLLER
9353         .ndo_poll_controller    = ixgbe_netpoll,
9354 #endif
9355 #ifdef CONFIG_NET_RX_BUSY_POLL
9356         .ndo_busy_poll          = ixgbe_low_latency_recv,
9357 #endif
9358 #ifdef IXGBE_FCOE
9359         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9360         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9361         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9362         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9363         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9364         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9365         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9366 #endif /* IXGBE_FCOE */
9367         .ndo_set_features = ixgbe_set_features,
9368         .ndo_fix_features = ixgbe_fix_features,
9369         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9370         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9371         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9372         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9373         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9374         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9375         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
9376         .ndo_features_check     = ixgbe_features_check,
9377 };
9378
9379 /**
9380  * ixgbe_enumerate_functions - Get the number of ports this device has
9381  * @adapter: adapter structure
9382  *
9383  * This function enumerates the phsyical functions co-located on a single slot,
9384  * in order to determine how many ports a device has. This is most useful in
9385  * determining the required GT/s of PCIe bandwidth necessary for optimal
9386  * performance.
9387  **/
9388 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9389 {
9390         struct pci_dev *entry, *pdev = adapter->pdev;
9391         int physfns = 0;
9392
9393         /* Some cards can not use the generic count PCIe functions method,
9394          * because they are behind a parent switch, so we hardcode these with
9395          * the correct number of functions.
9396          */
9397         if (ixgbe_pcie_from_parent(&adapter->hw))
9398                 physfns = 4;
9399
9400         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9401                 /* don't count virtual functions */
9402                 if (entry->is_virtfn)
9403                         continue;
9404
9405                 /* When the devices on the bus don't all match our device ID,
9406                  * we can't reliably determine the correct number of
9407                  * functions. This can occur if a function has been direct
9408                  * attached to a virtual machine using VT-d, for example. In
9409                  * this case, simply return -1 to indicate this.
9410                  */
9411                 if ((entry->vendor != pdev->vendor) ||
9412                     (entry->device != pdev->device))
9413                         return -1;
9414
9415                 physfns++;
9416         }
9417
9418         return physfns;
9419 }
9420
9421 /**
9422  * ixgbe_wol_supported - Check whether device supports WoL
9423  * @adapter: the adapter private structure
9424  * @device_id: the device ID
9425  * @subdev_id: the subsystem device ID
9426  *
9427  * This function is used by probe and ethtool to determine
9428  * which devices have WoL support
9429  *
9430  **/
9431 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9432                          u16 subdevice_id)
9433 {
9434         struct ixgbe_hw *hw = &adapter->hw;
9435         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9436
9437         /* WOL not supported on 82598 */
9438         if (hw->mac.type == ixgbe_mac_82598EB)
9439                 return false;
9440
9441         /* check eeprom to see if WOL is enabled for X540 and newer */
9442         if (hw->mac.type >= ixgbe_mac_X540) {
9443                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9444                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9445                      (hw->bus.func == 0)))
9446                         return true;
9447         }
9448
9449         /* WOL is determined based on device IDs for 82599 MACs */
9450         switch (device_id) {
9451         case IXGBE_DEV_ID_82599_SFP:
9452                 /* Only these subdevices could supports WOL */
9453                 switch (subdevice_id) {
9454                 case IXGBE_SUBDEV_ID_82599_560FLR:
9455                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9456                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9457                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9458                         /* only support first port */
9459                         if (hw->bus.func != 0)
9460                                 break;
9461                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9462                 case IXGBE_SUBDEV_ID_82599_SFP:
9463                 case IXGBE_SUBDEV_ID_82599_RNDC:
9464                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9465                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9466                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9467                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9468                         return true;
9469                 }
9470                 break;
9471         case IXGBE_DEV_ID_82599EN_SFP:
9472                 /* Only these subdevices support WOL */
9473                 switch (subdevice_id) {
9474                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9475                         return true;
9476                 }
9477                 break;
9478         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9479                 /* All except this subdevice support WOL */
9480                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9481                         return true;
9482                 break;
9483         case IXGBE_DEV_ID_82599_KX4:
9484                 return  true;
9485         default:
9486                 break;
9487         }
9488
9489         return false;
9490 }
9491
9492 /**
9493  * ixgbe_probe - Device Initialization Routine
9494  * @pdev: PCI device information struct
9495  * @ent: entry in ixgbe_pci_tbl
9496  *
9497  * Returns 0 on success, negative on failure
9498  *
9499  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9500  * The OS initialization, configuring of the adapter private structure,
9501  * and a hardware reset occur.
9502  **/
9503 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9504 {
9505         struct net_device *netdev;
9506         struct ixgbe_adapter *adapter = NULL;
9507         struct ixgbe_hw *hw;
9508         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9509         int i, err, pci_using_dac, expected_gts;
9510         unsigned int indices = MAX_TX_QUEUES;
9511         u8 part_str[IXGBE_PBANUM_LENGTH];
9512         bool disable_dev = false;
9513 #ifdef IXGBE_FCOE
9514         u16 device_caps;
9515 #endif
9516         u32 eec;
9517
9518         /* Catch broken hardware that put the wrong VF device ID in
9519          * the PCIe SR-IOV capability.
9520          */
9521         if (pdev->is_virtfn) {
9522                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9523                      pci_name(pdev), pdev->vendor, pdev->device);
9524                 return -EINVAL;
9525         }
9526
9527         err = pci_enable_device_mem(pdev);
9528         if (err)
9529                 return err;
9530
9531         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9532                 pci_using_dac = 1;
9533         } else {
9534                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9535                 if (err) {
9536                         dev_err(&pdev->dev,
9537                                 "No usable DMA configuration, aborting\n");
9538                         goto err_dma;
9539                 }
9540                 pci_using_dac = 0;
9541         }
9542
9543         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9544         if (err) {
9545                 dev_err(&pdev->dev,
9546                         "pci_request_selected_regions failed 0x%x\n", err);
9547                 goto err_pci_reg;
9548         }
9549
9550         pci_enable_pcie_error_reporting(pdev);
9551
9552         pci_set_master(pdev);
9553         pci_save_state(pdev);
9554
9555         if (ii->mac == ixgbe_mac_82598EB) {
9556 #ifdef CONFIG_IXGBE_DCB
9557                 /* 8 TC w/ 4 queues per TC */
9558                 indices = 4 * MAX_TRAFFIC_CLASS;
9559 #else
9560                 indices = IXGBE_MAX_RSS_INDICES;
9561 #endif
9562         }
9563
9564         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9565         if (!netdev) {
9566                 err = -ENOMEM;
9567                 goto err_alloc_etherdev;
9568         }
9569
9570         SET_NETDEV_DEV(netdev, &pdev->dev);
9571
9572         adapter = netdev_priv(netdev);
9573
9574         adapter->netdev = netdev;
9575         adapter->pdev = pdev;
9576         hw = &adapter->hw;
9577         hw->back = adapter;
9578         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9579
9580         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9581                               pci_resource_len(pdev, 0));
9582         adapter->io_addr = hw->hw_addr;
9583         if (!hw->hw_addr) {
9584                 err = -EIO;
9585                 goto err_ioremap;
9586         }
9587
9588         netdev->netdev_ops = &ixgbe_netdev_ops;
9589         ixgbe_set_ethtool_ops(netdev);
9590         netdev->watchdog_timeo = 5 * HZ;
9591         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9592
9593         /* Setup hw api */
9594         hw->mac.ops   = *ii->mac_ops;
9595         hw->mac.type  = ii->mac;
9596         hw->mvals     = ii->mvals;
9597         if (ii->link_ops)
9598                 hw->link.ops  = *ii->link_ops;
9599
9600         /* EEPROM */
9601         hw->eeprom.ops = *ii->eeprom_ops;
9602         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9603         if (ixgbe_removed(hw->hw_addr)) {
9604                 err = -EIO;
9605                 goto err_ioremap;
9606         }
9607         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9608         if (!(eec & BIT(8)))
9609                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9610
9611         /* PHY */
9612         hw->phy.ops = *ii->phy_ops;
9613         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9614         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9615         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9616         hw->phy.mdio.mmds = 0;
9617         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9618         hw->phy.mdio.dev = netdev;
9619         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9620         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9621
9622         /* setup the private structure */
9623         err = ixgbe_sw_init(adapter, ii);
9624         if (err)
9625                 goto err_sw_init;
9626
9627         /* Make sure the SWFW semaphore is in a valid state */
9628         if (hw->mac.ops.init_swfw_sync)
9629                 hw->mac.ops.init_swfw_sync(hw);
9630
9631         /* Make it possible the adapter to be woken up via WOL */
9632         switch (adapter->hw.mac.type) {
9633         case ixgbe_mac_82599EB:
9634         case ixgbe_mac_X540:
9635         case ixgbe_mac_X550:
9636         case ixgbe_mac_X550EM_x:
9637         case ixgbe_mac_x550em_a:
9638                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9639                 break;
9640         default:
9641                 break;
9642         }
9643
9644         /*
9645          * If there is a fan on this device and it has failed log the
9646          * failure.
9647          */
9648         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9649                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9650                 if (esdp & IXGBE_ESDP_SDP1)
9651                         e_crit(probe, "Fan has stopped, replace the adapter\n");
9652         }
9653
9654         if (allow_unsupported_sfp)
9655                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9656
9657         /* reset_hw fills in the perm_addr as well */
9658         hw->phy.reset_if_overtemp = true;
9659         err = hw->mac.ops.reset_hw(hw);
9660         hw->phy.reset_if_overtemp = false;
9661         ixgbe_set_eee_capable(adapter);
9662         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9663                 err = 0;
9664         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9665                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9666                 e_dev_err("Reload the driver after installing a supported module.\n");
9667                 goto err_sw_init;
9668         } else if (err) {
9669                 e_dev_err("HW Init failed: %d\n", err);
9670                 goto err_sw_init;
9671         }
9672
9673 #ifdef CONFIG_PCI_IOV
9674         /* SR-IOV not supported on the 82598 */
9675         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9676                 goto skip_sriov;
9677         /* Mailbox */
9678         ixgbe_init_mbx_params_pf(hw);
9679         hw->mbx.ops = ii->mbx_ops;
9680         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9681         ixgbe_enable_sriov(adapter);
9682 skip_sriov:
9683
9684 #endif
9685         netdev->features = NETIF_F_SG |
9686                            NETIF_F_TSO |
9687                            NETIF_F_TSO6 |
9688                            NETIF_F_RXHASH |
9689                            NETIF_F_RXCSUM |
9690                            NETIF_F_HW_CSUM;
9691
9692 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9693                                     NETIF_F_GSO_GRE_CSUM | \
9694                                     NETIF_F_GSO_IPXIP4 | \
9695                                     NETIF_F_GSO_IPXIP6 | \
9696                                     NETIF_F_GSO_UDP_TUNNEL | \
9697                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
9698
9699         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9700         netdev->features |= NETIF_F_GSO_PARTIAL |
9701                             IXGBE_GSO_PARTIAL_FEATURES;
9702
9703         if (hw->mac.type >= ixgbe_mac_82599EB)
9704                 netdev->features |= NETIF_F_SCTP_CRC;
9705
9706         /* copy netdev features into list of user selectable features */
9707         netdev->hw_features |= netdev->features |
9708                                NETIF_F_HW_VLAN_CTAG_FILTER |
9709                                NETIF_F_HW_VLAN_CTAG_RX |
9710                                NETIF_F_HW_VLAN_CTAG_TX |
9711                                NETIF_F_RXALL |
9712                                NETIF_F_HW_L2FW_DOFFLOAD;
9713
9714         if (hw->mac.type >= ixgbe_mac_82599EB)
9715                 netdev->hw_features |= NETIF_F_NTUPLE |
9716                                        NETIF_F_HW_TC;
9717
9718         if (pci_using_dac)
9719                 netdev->features |= NETIF_F_HIGHDMA;
9720
9721         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9722         netdev->hw_enc_features |= netdev->vlan_features;
9723         netdev->mpls_features |= NETIF_F_HW_CSUM;
9724
9725         /* set this bit last since it cannot be part of vlan_features */
9726         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9727                             NETIF_F_HW_VLAN_CTAG_RX |
9728                             NETIF_F_HW_VLAN_CTAG_TX;
9729
9730         netdev->priv_flags |= IFF_UNICAST_FLT;
9731         netdev->priv_flags |= IFF_SUPP_NOFCS;
9732
9733         /* MTU range: 68 - 9710 */
9734         netdev->min_mtu = ETH_MIN_MTU;
9735         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
9736
9737 #ifdef CONFIG_IXGBE_DCB
9738         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9739                 netdev->dcbnl_ops = &dcbnl_ops;
9740 #endif
9741
9742 #ifdef IXGBE_FCOE
9743         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9744                 unsigned int fcoe_l;
9745
9746                 if (hw->mac.ops.get_device_caps) {
9747                         hw->mac.ops.get_device_caps(hw, &device_caps);
9748                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9749                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9750                 }
9751
9752
9753                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9754                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9755
9756                 netdev->features |= NETIF_F_FSO |
9757                                     NETIF_F_FCOE_CRC;
9758
9759                 netdev->vlan_features |= NETIF_F_FSO |
9760                                          NETIF_F_FCOE_CRC |
9761                                          NETIF_F_FCOE_MTU;
9762         }
9763 #endif /* IXGBE_FCOE */
9764
9765         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9766                 netdev->hw_features |= NETIF_F_LRO;
9767         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9768                 netdev->features |= NETIF_F_LRO;
9769
9770         /* make sure the EEPROM is good */
9771         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9772                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9773                 err = -EIO;
9774                 goto err_sw_init;
9775         }
9776
9777         eth_platform_get_mac_address(&adapter->pdev->dev,
9778                                      adapter->hw.mac.perm_addr);
9779
9780         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9781
9782         if (!is_valid_ether_addr(netdev->dev_addr)) {
9783                 e_dev_err("invalid MAC address\n");
9784                 err = -EIO;
9785                 goto err_sw_init;
9786         }
9787
9788         /* Set hw->mac.addr to permanent MAC address */
9789         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9790         ixgbe_mac_set_default_filter(adapter);
9791
9792         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9793                     (unsigned long) adapter);
9794
9795         if (ixgbe_removed(hw->hw_addr)) {
9796                 err = -EIO;
9797                 goto err_sw_init;
9798         }
9799         INIT_WORK(&adapter->service_task, ixgbe_service_task);
9800         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9801         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9802
9803         err = ixgbe_init_interrupt_scheme(adapter);
9804         if (err)
9805                 goto err_sw_init;
9806
9807         /* WOL not supported for all devices */
9808         adapter->wol = 0;
9809         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9810         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9811                                                 pdev->subsystem_device);
9812         if (hw->wol_enabled)
9813                 adapter->wol = IXGBE_WUFC_MAG;
9814
9815         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9816
9817         /* save off EEPROM version number */
9818         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9819         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9820
9821         /* pick up the PCI bus settings for reporting later */
9822         if (ixgbe_pcie_from_parent(hw))
9823                 ixgbe_get_parent_bus_info(adapter);
9824         else
9825                  hw->mac.ops.get_bus_info(hw);
9826
9827         /* calculate the expected PCIe bandwidth required for optimal
9828          * performance. Note that some older parts will never have enough
9829          * bandwidth due to being older generation PCIe parts. We clamp these
9830          * parts to ensure no warning is displayed if it can't be fixed.
9831          */
9832         switch (hw->mac.type) {
9833         case ixgbe_mac_82598EB:
9834                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9835                 break;
9836         default:
9837                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9838                 break;
9839         }
9840
9841         /* don't check link if we failed to enumerate functions */
9842         if (expected_gts > 0)
9843                 ixgbe_check_minimum_link(adapter, expected_gts);
9844
9845         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9846         if (err)
9847                 strlcpy(part_str, "Unknown", sizeof(part_str));
9848         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9849                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9850                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9851                            part_str);
9852         else
9853                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9854                            hw->mac.type, hw->phy.type, part_str);
9855
9856         e_dev_info("%pM\n", netdev->dev_addr);
9857
9858         /* reset the hardware with the new settings */
9859         err = hw->mac.ops.start_hw(hw);
9860         if (err == IXGBE_ERR_EEPROM_VERSION) {
9861                 /* We are running on a pre-production device, log a warning */
9862                 e_dev_warn("This device is a pre-production adapter/LOM. "
9863                            "Please be aware there may be issues associated "
9864                            "with your hardware.  If you are experiencing "
9865                            "problems please contact your Intel or hardware "
9866                            "representative who provided you with this "
9867                            "hardware.\n");
9868         }
9869         strcpy(netdev->name, "eth%d");
9870         err = register_netdev(netdev);
9871         if (err)
9872                 goto err_register;
9873
9874         pci_set_drvdata(pdev, adapter);
9875
9876         /* power down the optics for 82599 SFP+ fiber */
9877         if (hw->mac.ops.disable_tx_laser)
9878                 hw->mac.ops.disable_tx_laser(hw);
9879
9880         /* carrier off reporting is important to ethtool even BEFORE open */
9881         netif_carrier_off(netdev);
9882
9883 #ifdef CONFIG_IXGBE_DCA
9884         if (dca_add_requester(&pdev->dev) == 0) {
9885                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9886                 ixgbe_setup_dca(adapter);
9887         }
9888 #endif
9889         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9890                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9891                 for (i = 0; i < adapter->num_vfs; i++)
9892                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
9893         }
9894
9895         /* firmware requires driver version to be 0xFFFFFFFF
9896          * since os does not support feature
9897          */
9898         if (hw->mac.ops.set_fw_drv_ver)
9899                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
9900                                            sizeof(ixgbe_driver_version) - 1,
9901                                            ixgbe_driver_version);
9902
9903         /* add san mac addr to netdev */
9904         ixgbe_add_sanmac_netdev(netdev);
9905
9906         e_dev_info("%s\n", ixgbe_default_device_descr);
9907
9908 #ifdef CONFIG_IXGBE_HWMON
9909         if (ixgbe_sysfs_init(adapter))
9910                 e_err(probe, "failed to allocate sysfs resources\n");
9911 #endif /* CONFIG_IXGBE_HWMON */
9912
9913         ixgbe_dbg_adapter_init(adapter);
9914
9915         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9916         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9917                 hw->mac.ops.setup_link(hw,
9918                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9919                         true);
9920
9921         return 0;
9922
9923 err_register:
9924         ixgbe_release_hw_control(adapter);
9925         ixgbe_clear_interrupt_scheme(adapter);
9926 err_sw_init:
9927         ixgbe_disable_sriov(adapter);
9928         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9929         iounmap(adapter->io_addr);
9930         kfree(adapter->jump_tables[0]);
9931         kfree(adapter->mac_table);
9932 err_ioremap:
9933         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9934         free_netdev(netdev);
9935 err_alloc_etherdev:
9936         pci_release_mem_regions(pdev);
9937 err_pci_reg:
9938 err_dma:
9939         if (!adapter || disable_dev)
9940                 pci_disable_device(pdev);
9941         return err;
9942 }
9943
9944 /**
9945  * ixgbe_remove - Device Removal Routine
9946  * @pdev: PCI device information struct
9947  *
9948  * ixgbe_remove is called by the PCI subsystem to alert the driver
9949  * that it should release a PCI device.  The could be caused by a
9950  * Hot-Plug event, or because the driver is going to be removed from
9951  * memory.
9952  **/
9953 static void ixgbe_remove(struct pci_dev *pdev)
9954 {
9955         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9956         struct net_device *netdev;
9957         bool disable_dev;
9958         int i;
9959
9960         /* if !adapter then we already cleaned up in probe */
9961         if (!adapter)
9962                 return;
9963
9964         netdev  = adapter->netdev;
9965         ixgbe_dbg_adapter_exit(adapter);
9966
9967         set_bit(__IXGBE_REMOVING, &adapter->state);
9968         cancel_work_sync(&adapter->service_task);
9969
9970
9971 #ifdef CONFIG_IXGBE_DCA
9972         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9973                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9974                 dca_remove_requester(&pdev->dev);
9975                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9976                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9977         }
9978
9979 #endif
9980 #ifdef CONFIG_IXGBE_HWMON
9981         ixgbe_sysfs_exit(adapter);
9982 #endif /* CONFIG_IXGBE_HWMON */
9983
9984         /* remove the added san mac */
9985         ixgbe_del_sanmac_netdev(netdev);
9986
9987 #ifdef CONFIG_PCI_IOV
9988         ixgbe_disable_sriov(adapter);
9989 #endif
9990         if (netdev->reg_state == NETREG_REGISTERED)
9991                 unregister_netdev(netdev);
9992
9993         ixgbe_clear_interrupt_scheme(adapter);
9994
9995         ixgbe_release_hw_control(adapter);
9996
9997 #ifdef CONFIG_DCB
9998         kfree(adapter->ixgbe_ieee_pfc);
9999         kfree(adapter->ixgbe_ieee_ets);
10000
10001 #endif
10002         iounmap(adapter->io_addr);
10003         pci_release_mem_regions(pdev);
10004
10005         e_dev_info("complete\n");
10006
10007         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10008                 if (adapter->jump_tables[i]) {
10009                         kfree(adapter->jump_tables[i]->input);
10010                         kfree(adapter->jump_tables[i]->mask);
10011                 }
10012                 kfree(adapter->jump_tables[i]);
10013         }
10014
10015         kfree(adapter->mac_table);
10016         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10017         free_netdev(netdev);
10018
10019         pci_disable_pcie_error_reporting(pdev);
10020
10021         if (disable_dev)
10022                 pci_disable_device(pdev);
10023 }
10024
10025 /**
10026  * ixgbe_io_error_detected - called when PCI error is detected
10027  * @pdev: Pointer to PCI device
10028  * @state: The current pci connection state
10029  *
10030  * This function is called after a PCI bus error affecting
10031  * this device has been detected.
10032  */
10033 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10034                                                 pci_channel_state_t state)
10035 {
10036         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10037         struct net_device *netdev = adapter->netdev;
10038
10039 #ifdef CONFIG_PCI_IOV
10040         struct ixgbe_hw *hw = &adapter->hw;
10041         struct pci_dev *bdev, *vfdev;
10042         u32 dw0, dw1, dw2, dw3;
10043         int vf, pos;
10044         u16 req_id, pf_func;
10045
10046         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10047             adapter->num_vfs == 0)
10048                 goto skip_bad_vf_detection;
10049
10050         bdev = pdev->bus->self;
10051         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10052                 bdev = bdev->bus->self;
10053
10054         if (!bdev)
10055                 goto skip_bad_vf_detection;
10056
10057         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10058         if (!pos)
10059                 goto skip_bad_vf_detection;
10060
10061         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10062         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10063         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10064         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10065         if (ixgbe_removed(hw->hw_addr))
10066                 goto skip_bad_vf_detection;
10067
10068         req_id = dw1 >> 16;
10069         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10070         if (!(req_id & 0x0080))
10071                 goto skip_bad_vf_detection;
10072
10073         pf_func = req_id & 0x01;
10074         if ((pf_func & 1) == (pdev->devfn & 1)) {
10075                 unsigned int device_id;
10076
10077                 vf = (req_id & 0x7F) >> 1;
10078                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10079                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10080                                 "%8.8x\tdw3: %8.8x\n",
10081                 dw0, dw1, dw2, dw3);
10082                 switch (adapter->hw.mac.type) {
10083                 case ixgbe_mac_82599EB:
10084                         device_id = IXGBE_82599_VF_DEVICE_ID;
10085                         break;
10086                 case ixgbe_mac_X540:
10087                         device_id = IXGBE_X540_VF_DEVICE_ID;
10088                         break;
10089                 case ixgbe_mac_X550:
10090                         device_id = IXGBE_DEV_ID_X550_VF;
10091                         break;
10092                 case ixgbe_mac_X550EM_x:
10093                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10094                         break;
10095                 case ixgbe_mac_x550em_a:
10096                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10097                         break;
10098                 default:
10099                         device_id = 0;
10100                         break;
10101                 }
10102
10103                 /* Find the pci device of the offending VF */
10104                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10105                 while (vfdev) {
10106                         if (vfdev->devfn == (req_id & 0xFF))
10107                                 break;
10108                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10109                                                device_id, vfdev);
10110                 }
10111                 /*
10112                  * There's a slim chance the VF could have been hot plugged,
10113                  * so if it is no longer present we don't need to issue the
10114                  * VFLR.  Just clean up the AER in that case.
10115                  */
10116                 if (vfdev) {
10117                         ixgbe_issue_vf_flr(adapter, vfdev);
10118                         /* Free device reference count */
10119                         pci_dev_put(vfdev);
10120                 }
10121
10122                 pci_cleanup_aer_uncorrect_error_status(pdev);
10123         }
10124
10125         /*
10126          * Even though the error may have occurred on the other port
10127          * we still need to increment the vf error reference count for
10128          * both ports because the I/O resume function will be called
10129          * for both of them.
10130          */
10131         adapter->vferr_refcount++;
10132
10133         return PCI_ERS_RESULT_RECOVERED;
10134
10135 skip_bad_vf_detection:
10136 #endif /* CONFIG_PCI_IOV */
10137         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10138                 return PCI_ERS_RESULT_DISCONNECT;
10139
10140         rtnl_lock();
10141         netif_device_detach(netdev);
10142
10143         if (state == pci_channel_io_perm_failure) {
10144                 rtnl_unlock();
10145                 return PCI_ERS_RESULT_DISCONNECT;
10146         }
10147
10148         if (netif_running(netdev))
10149                 ixgbe_close_suspend(adapter);
10150
10151         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10152                 pci_disable_device(pdev);
10153         rtnl_unlock();
10154
10155         /* Request a slot reset. */
10156         return PCI_ERS_RESULT_NEED_RESET;
10157 }
10158
10159 /**
10160  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10161  * @pdev: Pointer to PCI device
10162  *
10163  * Restart the card from scratch, as if from a cold-boot.
10164  */
10165 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10166 {
10167         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10168         pci_ers_result_t result;
10169         int err;
10170
10171         if (pci_enable_device_mem(pdev)) {
10172                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10173                 result = PCI_ERS_RESULT_DISCONNECT;
10174         } else {
10175                 smp_mb__before_atomic();
10176                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10177                 adapter->hw.hw_addr = adapter->io_addr;
10178                 pci_set_master(pdev);
10179                 pci_restore_state(pdev);
10180                 pci_save_state(pdev);
10181
10182                 pci_wake_from_d3(pdev, false);
10183
10184                 ixgbe_reset(adapter);
10185                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10186                 result = PCI_ERS_RESULT_RECOVERED;
10187         }
10188
10189         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10190         if (err) {
10191                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10192                           "failed 0x%0x\n", err);
10193                 /* non-fatal, continue */
10194         }
10195
10196         return result;
10197 }
10198
10199 /**
10200  * ixgbe_io_resume - called when traffic can start flowing again.
10201  * @pdev: Pointer to PCI device
10202  *
10203  * This callback is called when the error recovery driver tells us that
10204  * its OK to resume normal operation.
10205  */
10206 static void ixgbe_io_resume(struct pci_dev *pdev)
10207 {
10208         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10209         struct net_device *netdev = adapter->netdev;
10210
10211 #ifdef CONFIG_PCI_IOV
10212         if (adapter->vferr_refcount) {
10213                 e_info(drv, "Resuming after VF err\n");
10214                 adapter->vferr_refcount--;
10215                 return;
10216         }
10217
10218 #endif
10219         rtnl_lock();
10220         if (netif_running(netdev))
10221                 ixgbe_open(netdev);
10222
10223         netif_device_attach(netdev);
10224         rtnl_unlock();
10225 }
10226
10227 static const struct pci_error_handlers ixgbe_err_handler = {
10228         .error_detected = ixgbe_io_error_detected,
10229         .slot_reset = ixgbe_io_slot_reset,
10230         .resume = ixgbe_io_resume,
10231 };
10232
10233 static struct pci_driver ixgbe_driver = {
10234         .name     = ixgbe_driver_name,
10235         .id_table = ixgbe_pci_tbl,
10236         .probe    = ixgbe_probe,
10237         .remove   = ixgbe_remove,
10238 #ifdef CONFIG_PM
10239         .suspend  = ixgbe_suspend,
10240         .resume   = ixgbe_resume,
10241 #endif
10242         .shutdown = ixgbe_shutdown,
10243         .sriov_configure = ixgbe_pci_sriov_configure,
10244         .err_handler = &ixgbe_err_handler
10245 };
10246
10247 /**
10248  * ixgbe_init_module - Driver Registration Routine
10249  *
10250  * ixgbe_init_module is the first routine called when the driver is
10251  * loaded. All it does is register with the PCI subsystem.
10252  **/
10253 static int __init ixgbe_init_module(void)
10254 {
10255         int ret;
10256         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10257         pr_info("%s\n", ixgbe_copyright);
10258
10259         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10260         if (!ixgbe_wq) {
10261                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10262                 return -ENOMEM;
10263         }
10264
10265         ixgbe_dbg_init();
10266
10267         ret = pci_register_driver(&ixgbe_driver);
10268         if (ret) {
10269                 destroy_workqueue(ixgbe_wq);
10270                 ixgbe_dbg_exit();
10271                 return ret;
10272         }
10273
10274 #ifdef CONFIG_IXGBE_DCA
10275         dca_register_notify(&dca_notifier);
10276 #endif
10277
10278         return 0;
10279 }
10280
10281 module_init(ixgbe_init_module);
10282
10283 /**
10284  * ixgbe_exit_module - Driver Exit Cleanup Routine
10285  *
10286  * ixgbe_exit_module is called just before the driver is removed
10287  * from memory.
10288  **/
10289 static void __exit ixgbe_exit_module(void)
10290 {
10291 #ifdef CONFIG_IXGBE_DCA
10292         dca_unregister_notify(&dca_notifier);
10293 #endif
10294         pci_unregister_driver(&ixgbe_driver);
10295
10296         ixgbe_dbg_exit();
10297         if (ixgbe_wq) {
10298                 destroy_workqueue(ixgbe_wq);
10299                 ixgbe_wq = NULL;
10300         }
10301 }
10302
10303 #ifdef CONFIG_IXGBE_DCA
10304 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10305                             void *p)
10306 {
10307         int ret_val;
10308
10309         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10310                                          __ixgbe_notify_dca);
10311
10312         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10313 }
10314
10315 #endif /* CONFIG_IXGBE_DCA */
10316
10317 module_exit(ixgbe_exit_module);
10318
10319 /* ixgbe_main.c */