drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/udp_tunnel.h>
  54 #include <net/pkt_cls.h>
  55 #include <net/tc_act/tc_gact.h>
  56 #include <net/tc_act/tc_mirred.h>
  57 #include <net/vxlan.h>
  58
  59 #include "ixgbe.h"
  60 #include "ixgbe_common.h"
  61 #include "ixgbe_dcb_82599.h"
  62 #include "ixgbe_sriov.h"
  63 #include "ixgbe_model.h"
  64
  65 char ixgbe_driver_name[] = "ixgbe";
  66 static const char ixgbe_driver_string[] =
  67                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  68 #ifdef IXGBE_FCOE
  69 char ixgbe_default_device_descr[] =
  70                               "Intel(R) 10 Gigabit Network Connection";
  71 #else
  72 static char ixgbe_default_device_descr[] =
  73                               "Intel(R) 10 Gigabit Network Connection";
  74 #endif
  75 #define DRV_VERSION "4.4.0-k"
  76 const char ixgbe_driver_version[] = DRV_VERSION;
  77 static const char ixgbe_copyright[] =
  78                                 "Copyright (c) 1999-2016 Intel Corporation.";
  79
  80 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  81
  82 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  83         [board_82598]           = &ixgbe_82598_info,
  84         [board_82599]           = &ixgbe_82599_info,
  85         [board_X540]            = &ixgbe_X540_info,
  86         [board_X550]            = &ixgbe_X550_info,
  87         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  88         [board_x550em_a]        = &ixgbe_x550em_a_info,
  89         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  90 };
  91
  92 /* ixgbe_pci_tbl - PCI Device ID Table
  93  *
  94  * Wildcard entries (PCI_ANY_ID) should come last
  95  * Last entry must be all 0s
  96  *
  97  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  98  *   Class, Class Mask, private data (not used) }
  99  */
 100 static const struct pci_device_id ixgbe_pci_tbl[] = {
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 146         /* required last entry */
 147         {0, }
 148 };
 149 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 150
 151 #ifdef CONFIG_IXGBE_DCA
 152 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 153                             void *p);
 154 static struct notifier_block dca_notifier = {
 155         .notifier_call = ixgbe_notify_dca,
 156         .next          = NULL,
 157         .priority      = 0
 158 };
 159 #endif
 160
 161 #ifdef CONFIG_PCI_IOV
 162 static unsigned int max_vfs;
 163 module_param(max_vfs, uint, 0);
 164 MODULE_PARM_DESC(max_vfs,
 165                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 166 #endif /* CONFIG_PCI_IOV */
 167
 168 static unsigned int allow_unsupported_sfp;
 169 module_param(allow_unsupported_sfp, uint, 0);
 170 MODULE_PARM_DESC(allow_unsupported_sfp,
 171                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 172
 173 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 174 static int debug = -1;
 175 module_param(debug, int, 0);
 176 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 177
 178 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 179 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 180 MODULE_LICENSE("GPL");
 181 MODULE_VERSION(DRV_VERSION);
 182
 183 static struct workqueue_struct *ixgbe_wq;
 184
 185 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 186 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 187
 188 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 189                                           u32 reg, u16 *value)
 190 {
 191         struct pci_dev *parent_dev;
 192         struct pci_bus *parent_bus;
 193
 194         parent_bus = adapter->pdev->bus->parent;
 195         if (!parent_bus)
 196                 return -1;
 197
 198         parent_dev = parent_bus->self;
 199         if (!parent_dev)
 200                 return -1;
 201
 202         if (!pci_is_pcie(parent_dev))
 203                 return -1;
 204
 205         pcie_capability_read_word(parent_dev, reg, value);
 206         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 207             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 208                 return -1;
 209         return 0;
 210 }
 211
 212 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 213 {
 214         struct ixgbe_hw *hw = &adapter->hw;
 215         u16 link_status = 0;
 216         int err;
 217
 218         hw->bus.type = ixgbe_bus_type_pci_express;
 219
 220         /* Get the negotiated link width and speed from PCI config space of the
 221          * parent, as this device is behind a switch
 222          */
 223         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 224
 225         /* assume caller will handle error case */
 226         if (err)
 227                 return err;
 228
 229         hw->bus.width = ixgbe_convert_bus_width(link_status);
 230         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 231
 232         return 0;
 233 }
 234
 235 /**
 236  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 237  * @hw: hw specific details
 238  *
 239  * This function is used by probe to determine whether a device's PCI-Express
 240  * bandwidth details should be gathered from the parent bus instead of from the
 241  * device. Used to ensure that various locations all have the correct device ID
 242  * checks.
 243  */
 244 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 245 {
 246         switch (hw->device_id) {
 247         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 248         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 249                 return true;
 250         default:
 251                 return false;
 252         }
 253 }
 254
 255 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 256                                      int expected_gts)
 257 {
 258         struct ixgbe_hw *hw = &adapter->hw;
 259         int max_gts = 0;
 260         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 261         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 262         struct pci_dev *pdev;
 263
 264         /* Some devices are not connected over PCIe and thus do not negotiate
 265          * speed. These devices do not have valid bus info, and thus any report
 266          * we generate may not be correct.
 267          */
 268         if (hw->bus.type == ixgbe_bus_type_internal)
 269                 return;
 270
 271         /* determine whether to use the parent device */
 272         if (ixgbe_pcie_from_parent(&adapter->hw))
 273                 pdev = adapter->pdev->bus->parent->self;
 274         else
 275                 pdev = adapter->pdev;
 276
 277         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 278             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 279                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 280                 return;
 281         }
 282
 283         switch (speed) {
 284         case PCIE_SPEED_2_5GT:
 285                 /* 8b/10b encoding reduces max throughput by 20% */
 286                 max_gts = 2 * width;
 287                 break;
 288         case PCIE_SPEED_5_0GT:
 289                 /* 8b/10b encoding reduces max throughput by 20% */
 290                 max_gts = 4 * width;
 291                 break;
 292         case PCIE_SPEED_8_0GT:
 293                 /* 128b/130b encoding reduces throughput by less than 2% */
 294                 max_gts = 8 * width;
 295                 break;
 296         default:
 297                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 298                 return;
 299         }
 300
 301         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 302                    max_gts);
 303         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 304                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 305                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 306                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 307                     "Unknown"),
 308                    width,
 309                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 310                     speed == PCIE_SPEED_5_0GT ? "20%" :
 311                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 312                     "Unknown"));
 313
 314         if (max_gts < expected_gts) {
 315                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 316                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 317                         expected_gts);
 318                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 319         }
 320 }
 321
 322 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 323 {
 324         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 325             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 326             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 327                 queue_work(ixgbe_wq, &adapter->service_task);
 328 }
 329
 330 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 331 {
 332         struct ixgbe_adapter *adapter = hw->back;
 333
 334         if (!hw->hw_addr)
 335                 return;
 336         hw->hw_addr = NULL;
 337         e_dev_err("Adapter removed\n");
 338         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 339                 ixgbe_service_event_schedule(adapter);
 340 }
 341
 342 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 343 {
 344         u32 value;
 345
 346         /* The following check not only optimizes a bit by not
 347          * performing a read on the status register when the
 348          * register just read was a status register read that
 349          * returned IXGBE_FAILED_READ_REG. It also blocks any
 350          * potential recursion.
 351          */
 352         if (reg == IXGBE_STATUS) {
 353                 ixgbe_remove_adapter(hw);
 354                 return;
 355         }
 356         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 357         if (value == IXGBE_FAILED_READ_REG)
 358                 ixgbe_remove_adapter(hw);
 359 }
 360
 361 /**
 362  * ixgbe_read_reg - Read from device register
 363  * @hw: hw specific details
 364  * @reg: offset of register to read
 365  *
 366  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 367  *
 368  * This function is used to read device registers. It checks for device
 369  * removal by confirming any read that returns all ones by checking the
 370  * status register value for all ones. This function avoids reading from
 371  * the hardware if a removal was previously detected in which case it
 372  * returns IXGBE_FAILED_READ_REG (all ones).
 373  */
 374 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 375 {
 376         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 377         u32 value;
 378
 379         if (ixgbe_removed(reg_addr))
 380                 return IXGBE_FAILED_READ_REG;
 381         if (unlikely(hw->phy.nw_mng_if_sel &
 382                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 383                 struct ixgbe_adapter *adapter;
 384                 int i;
 385
 386                 for (i = 0; i < 200; ++i) {
 387                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 388                         if (likely(!value))
 389                                 goto writes_completed;
 390                         if (value == IXGBE_FAILED_READ_REG) {
 391                                 ixgbe_remove_adapter(hw);
 392                                 return IXGBE_FAILED_READ_REG;
 393                         }
 394                         udelay(5);
 395                 }
 396
 397                 adapter = hw->back;
 398                 e_warn(hw, "register writes incomplete %08x\n", value);
 399         }
 400
 401 writes_completed:
 402         value = readl(reg_addr + reg);
 403         if (unlikely(value == IXGBE_FAILED_READ_REG))
 404                 ixgbe_check_remove(hw, reg);
 405         return value;
 406 }
 407
 408 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 409 {
 410         u16 value;
 411
 412         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 413         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 414                 ixgbe_remove_adapter(hw);
 415                 return true;
 416         }
 417         return false;
 418 }
 419
 420 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 421 {
 422         struct ixgbe_adapter *adapter = hw->back;
 423         u16 value;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return IXGBE_FAILED_READ_CFG_WORD;
 427         pci_read_config_word(adapter->pdev, reg, &value);
 428         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 429             ixgbe_check_cfg_remove(hw, adapter->pdev))
 430                 return IXGBE_FAILED_READ_CFG_WORD;
 431         return value;
 432 }
 433
 434 #ifdef CONFIG_PCI_IOV
 435 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 436 {
 437         struct ixgbe_adapter *adapter = hw->back;
 438         u32 value;
 439
 440         if (ixgbe_removed(hw->hw_addr))
 441                 return IXGBE_FAILED_READ_CFG_DWORD;
 442         pci_read_config_dword(adapter->pdev, reg, &value);
 443         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 444             ixgbe_check_cfg_remove(hw, adapter->pdev))
 445                 return IXGBE_FAILED_READ_CFG_DWORD;
 446         return value;
 447 }
 448 #endif /* CONFIG_PCI_IOV */
 449
 450 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 451 {
 452         struct ixgbe_adapter *adapter = hw->back;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return;
 456         pci_write_config_word(adapter->pdev, reg, value);
 457 }
 458
 459 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 460 {
 461         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 462
 463         /* flush memory to make sure state is correct before next watchdog */
 464         smp_mb__before_atomic();
 465         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 466 }
 467
 468 struct ixgbe_reg_info {
 469         u32 ofs;
 470         char *name;
 471 };
 472
 473 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 474
 475         /* General Registers */
 476         {IXGBE_CTRL, "CTRL"},
 477         {IXGBE_STATUS, "STATUS"},
 478         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 479
 480         /* Interrupt Registers */
 481         {IXGBE_EICR, "EICR"},
 482
 483         /* RX Registers */
 484         {IXGBE_SRRCTL(0), "SRRCTL"},
 485         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 486         {IXGBE_RDLEN(0), "RDLEN"},
 487         {IXGBE_RDH(0), "RDH"},
 488         {IXGBE_RDT(0), "RDT"},
 489         {IXGBE_RXDCTL(0), "RXDCTL"},
 490         {IXGBE_RDBAL(0), "RDBAL"},
 491         {IXGBE_RDBAH(0), "RDBAH"},
 492
 493         /* TX Registers */
 494         {IXGBE_TDBAL(0), "TDBAL"},
 495         {IXGBE_TDBAH(0), "TDBAH"},
 496         {IXGBE_TDLEN(0), "TDLEN"},
 497         {IXGBE_TDH(0), "TDH"},
 498         {IXGBE_TDT(0), "TDT"},
 499         {IXGBE_TXDCTL(0), "TXDCTL"},
 500
 501         /* List Terminator */
 502         { .name = NULL }
 503 };
 504
 505
 506 /*
 507  * ixgbe_regdump - register printout routine
 508  */
 509 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 510 {
 511         int i = 0, j = 0;
 512         char rname[16];
 513         u32 regs[64];
 514
 515         switch (reginfo->ofs) {
 516         case IXGBE_SRRCTL(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 519                 break;
 520         case IXGBE_DCA_RXCTRL(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 523                 break;
 524         case IXGBE_RDLEN(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 527                 break;
 528         case IXGBE_RDH(0):
 529                 for (i = 0; i < 64; i++)
 530                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 531                 break;
 532         case IXGBE_RDT(0):
 533                 for (i = 0; i < 64; i++)
 534                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 535                 break;
 536         case IXGBE_RXDCTL(0):
 537                 for (i = 0; i < 64; i++)
 538                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 539                 break;
 540         case IXGBE_RDBAL(0):
 541                 for (i = 0; i < 64; i++)
 542                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 543                 break;
 544         case IXGBE_RDBAH(0):
 545                 for (i = 0; i < 64; i++)
 546                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 547                 break;
 548         case IXGBE_TDBAL(0):
 549                 for (i = 0; i < 64; i++)
 550                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 551                 break;
 552         case IXGBE_TDBAH(0):
 553                 for (i = 0; i < 64; i++)
 554                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 555                 break;
 556         case IXGBE_TDLEN(0):
 557                 for (i = 0; i < 64; i++)
 558                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 559                 break;
 560         case IXGBE_TDH(0):
 561                 for (i = 0; i < 64; i++)
 562                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 563                 break;
 564         case IXGBE_TDT(0):
 565                 for (i = 0; i < 64; i++)
 566                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 567                 break;
 568         case IXGBE_TXDCTL(0):
 569                 for (i = 0; i < 64; i++)
 570                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 571                 break;
 572         default:
 573                 pr_info("%-15s %08x\n", reginfo->name,
 574                         IXGBE_READ_REG(hw, reginfo->ofs));
 575                 return;
 576         }
 577
 578         for (i = 0; i < 8; i++) {
 579                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 580                 pr_err("%-15s", rname);
 581                 for (j = 0; j < 8; j++)
 582                         pr_cont(" %08x", regs[i*8+j]);
 583                 pr_cont("\n");
 584         }
 585
 586 }
 587
 588 /*
 589  * ixgbe_dump - Print registers, tx-rings and rx-rings
 590  */
 591 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 592 {
 593         struct net_device *netdev = adapter->netdev;
 594         struct ixgbe_hw *hw = &adapter->hw;
 595         struct ixgbe_reg_info *reginfo;
 596         int n = 0;
 597         struct ixgbe_ring *tx_ring;
 598         struct ixgbe_tx_buffer *tx_buffer;
 599         union ixgbe_adv_tx_desc *tx_desc;
 600         struct my_u0 { u64 a; u64 b; } *u0;
 601         struct ixgbe_ring *rx_ring;
 602         union ixgbe_adv_rx_desc *rx_desc;
 603         struct ixgbe_rx_buffer *rx_buffer_info;
 604         u32 staterr;
 605         int i = 0;
 606
 607         if (!netif_msg_hw(adapter))
 608                 return;
 609
 610         /* Print netdevice Info */
 611         if (netdev) {
 612                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 613                 pr_info("Device Name     state            "
 614                         "trans_start      last_rx\n");
 615                 pr_info("%-15s %016lX %016lX %016lX\n",
 616                         netdev->name,
 617                         netdev->state,
 618                         dev_trans_start(netdev),
 619                         netdev->last_rx);
 620         }
 621
 622         /* Print Registers */
 623         dev_info(&adapter->pdev->dev, "Register Dump\n");
 624         pr_info(" Register Name   Value\n");
 625         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 626              reginfo->name; reginfo++) {
 627                 ixgbe_regdump(hw, reginfo);
 628         }
 629
 630         /* Print TX Ring Summary */
 631         if (!netdev || !netif_running(netdev))
 632                 return;
 633
 634         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 635         pr_info(" %s     %s              %s        %s\n",
 636                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 637                 "leng", "ntw", "timestamp");
 638         for (n = 0; n < adapter->num_tx_queues; n++) {
 639                 tx_ring = adapter->tx_ring[n];
 640                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 641                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 642                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 643                            (u64)dma_unmap_addr(tx_buffer, dma),
 644                            dma_unmap_len(tx_buffer, len),
 645                            tx_buffer->next_to_watch,
 646                            (u64)tx_buffer->time_stamp);
 647         }
 648
 649         /* Print TX Rings */
 650         if (!netif_msg_tx_done(adapter))
 651                 goto rx_ring_summary;
 652
 653         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 654
 655         /* Transmit Descriptor Formats
 656          *
 657          * 82598 Advanced Transmit Descriptor
 658          *   +--------------------------------------------------------------+
 659          * 0 |         Buffer Address [63:0]                                |
 660          *   +--------------------------------------------------------------+
 661          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 662          *   +--------------------------------------------------------------+
 663          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 664          *
 665          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 666          *   +--------------------------------------------------------------+
 667          * 0 |                          RSV [63:0]                          |
 668          *   +--------------------------------------------------------------+
 669          * 8 |            RSV           |  STA  |          NXTSEQ           |
 670          *   +--------------------------------------------------------------+
 671          *   63                       36 35   32 31                         0
 672          *
 673          * 82599+ Advanced Transmit Descriptor
 674          *   +--------------------------------------------------------------+
 675          * 0 |         Buffer Address [63:0]                                |
 676          *   +--------------------------------------------------------------+
 677          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 678          *   +--------------------------------------------------------------+
 679          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 680          *
 681          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 682          *   +--------------------------------------------------------------+
 683          * 0 |                          RSV [63:0]                          |
 684          *   +--------------------------------------------------------------+
 685          * 8 |            RSV           |  STA  |           RSV             |
 686          *   +--------------------------------------------------------------+
 687          *   63                       36 35   32 31                         0
 688          */
 689
 690         for (n = 0; n < adapter->num_tx_queues; n++) {
 691                 tx_ring = adapter->tx_ring[n];
 692                 pr_info("------------------------------------\n");
 693                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 694                 pr_info("------------------------------------\n");
 695                 pr_info("%s%s    %s              %s        %s          %s\n",
 696                         "T [desc]     [address 63:0  ] ",
 697                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 698                         "leng", "ntw", "timestamp", "bi->skb");
 699
 700                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 701                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 702                         tx_buffer = &tx_ring->tx_buffer_info[i];
 703                         u0 = (struct my_u0 *)tx_desc;
 704                         if (dma_unmap_len(tx_buffer, len) > 0) {
 705                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 706                                         i,
 707                                         le64_to_cpu(u0->a),
 708                                         le64_to_cpu(u0->b),
 709                                         (u64)dma_unmap_addr(tx_buffer, dma),
 710                                         dma_unmap_len(tx_buffer, len),
 711                                         tx_buffer->next_to_watch,
 712                                         (u64)tx_buffer->time_stamp,
 713                                         tx_buffer->skb);
 714                                 if (i == tx_ring->next_to_use &&
 715                                         i == tx_ring->next_to_clean)
 716                                         pr_cont(" NTC/U\n");
 717                                 else if (i == tx_ring->next_to_use)
 718                                         pr_cont(" NTU\n");
 719                                 else if (i == tx_ring->next_to_clean)
 720                                         pr_cont(" NTC\n");
 721                                 else
 722                                         pr_cont("\n");
 723
 724                                 if (netif_msg_pktdata(adapter) &&
 725                                     tx_buffer->skb)
 726                                         print_hex_dump(KERN_INFO, "",
 727                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 728                                                 tx_buffer->skb->data,
 729                                                 dma_unmap_len(tx_buffer, len),
 730                                                 true);
 731                         }
 732                 }
 733         }
 734
 735         /* Print RX Rings Summary */
 736 rx_ring_summary:
 737         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 738         pr_info("Queue [NTU] [NTC]\n");
 739         for (n = 0; n < adapter->num_rx_queues; n++) {
 740                 rx_ring = adapter->rx_ring[n];
 741                 pr_info("%5d %5X %5X\n",
 742                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 743         }
 744
 745         /* Print RX Rings */
 746         if (!netif_msg_rx_status(adapter))
 747                 return;
 748
 749         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 750
 751         /* Receive Descriptor Formats
 752          *
 753          * 82598 Advanced Receive Descriptor (Read) Format
 754          *    63                                           1        0
 755          *    +-----------------------------------------------------+
 756          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 757          *    +----------------------------------------------+------+
 758          *  8 |       Header Buffer Address [63:1]           |  DD  |
 759          *    +-----------------------------------------------------+
 760          *
 761          *
 762          * 82598 Advanced Receive Descriptor (Write-Back) Format
 763          *
 764          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 765          *   +------------------------------------------------------+
 766          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 767          *   | Packet   | IP     |   |          |     | Type | Type |
 768          *   | Checksum | Ident  |   |          |     |      |      |
 769          *   +------------------------------------------------------+
 770          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 771          *   +------------------------------------------------------+
 772          *   63       48 47    32 31            20 19               0
 773          *
 774          * 82599+ Advanced Receive Descriptor (Read) Format
 775          *    63                                           1        0
 776          *    +-----------------------------------------------------+
 777          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 778          *    +----------------------------------------------+------+
 779          *  8 |       Header Buffer Address [63:1]           |  DD  |
 780          *    +-----------------------------------------------------+
 781          *
 782          *
 783          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 784          *
 785          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 786          *   +------------------------------------------------------+
 787          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 788          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 789          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 790          *   +------------------------------------------------------+
 791          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 792          *   +------------------------------------------------------+
 793          *   63       48 47    32 31          20 19                 0
 794          */
 795
 796         for (n = 0; n < adapter->num_rx_queues; n++) {
 797                 rx_ring = adapter->rx_ring[n];
 798                 pr_info("------------------------------------\n");
 799                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 800                 pr_info("------------------------------------\n");
 801                 pr_info("%s%s%s",
 802                         "R  [desc]      [ PktBuf     A0] ",
 803                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 804                         "<-- Adv Rx Read format\n");
 805                 pr_info("%s%s%s",
 806                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 807                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 808                         "<-- Adv Rx Write-Back format\n");
 809
 810                 for (i = 0; i < rx_ring->count; i++) {
 811                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 812                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 813                         u0 = (struct my_u0 *)rx_desc;
 814                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 815                         if (staterr & IXGBE_RXD_STAT_DD) {
 816                                 /* Descriptor Done */
 817                                 pr_info("RWB[0x%03X]     %016llX "
 818                                         "%016llX ---------------- %p", i,
 819                                         le64_to_cpu(u0->a),
 820                                         le64_to_cpu(u0->b),
 821                                         rx_buffer_info->skb);
 822                         } else {
 823                                 pr_info("R  [0x%03X]     %016llX "
 824                                         "%016llX %016llX %p", i,
 825                                         le64_to_cpu(u0->a),
 826                                         le64_to_cpu(u0->b),
 827                                         (u64)rx_buffer_info->dma,
 828                                         rx_buffer_info->skb);
 829
 830                                 if (netif_msg_pktdata(adapter) &&
 831                                     rx_buffer_info->dma) {
 832                                         print_hex_dump(KERN_INFO, "",
 833                                            DUMP_PREFIX_ADDRESS, 16, 1,
 834                                            page_address(rx_buffer_info->page) +
 835                                                     rx_buffer_info->page_offset,
 836                                            ixgbe_rx_bufsz(rx_ring), true);
 837                                 }
 838                         }
 839
 840                         if (i == rx_ring->next_to_use)
 841                                 pr_cont(" NTU\n");
 842                         else if (i == rx_ring->next_to_clean)
 843                                 pr_cont(" NTC\n");
 844                         else
 845                                 pr_cont("\n");
 846
 847                 }
 848         }
 849 }
 850
 851 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 852 {
 853         u32 ctrl_ext;
 854
 855         /* Let firmware take over control of h/w */
 856         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 857         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 858                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 859 }
 860
 861 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 862 {
 863         u32 ctrl_ext;
 864
 865         /* Let firmware know the driver has taken over */
 866         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 867         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 868                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 869 }
 870
 871 /**
 872  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 873  * @adapter: pointer to adapter struct
 874  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 875  * @queue: queue to map the corresponding interrupt to
 876  * @msix_vector: the vector to map to the corresponding queue
 877  *
 878  */
 879 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 880                            u8 queue, u8 msix_vector)
 881 {
 882         u32 ivar, index;
 883         struct ixgbe_hw *hw = &adapter->hw;
 884         switch (hw->mac.type) {
 885         case ixgbe_mac_82598EB:
 886                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 887                 if (direction == -1)
 888                         direction = 0;
 889                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 890                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 891                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 892                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 893                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 894                 break;
 895         case ixgbe_mac_82599EB:
 896         case ixgbe_mac_X540:
 897         case ixgbe_mac_X550:
 898         case ixgbe_mac_X550EM_x:
 899         case ixgbe_mac_x550em_a:
 900                 if (direction == -1) {
 901                         /* other causes */
 902                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 903                         index = ((queue & 1) * 8);
 904                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 905                         ivar &= ~(0xFF << index);
 906                         ivar |= (msix_vector << index);
 907                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 908                         break;
 909                 } else {
 910                         /* tx or rx causes */
 911                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 912                         index = ((16 * (queue & 1)) + (8 * direction));
 913                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 914                         ivar &= ~(0xFF << index);
 915                         ivar |= (msix_vector << index);
 916                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 917                         break;
 918                 }
 919         default:
 920                 break;
 921         }
 922 }
 923
 924 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 925                                           u64 qmask)
 926 {
 927         u32 mask;
 928
 929         switch (adapter->hw.mac.type) {
 930         case ixgbe_mac_82598EB:
 931                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 932                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 933                 break;
 934         case ixgbe_mac_82599EB:
 935         case ixgbe_mac_X540:
 936         case ixgbe_mac_X550:
 937         case ixgbe_mac_X550EM_x:
 938         case ixgbe_mac_x550em_a:
 939                 mask = (qmask & 0xFFFFFFFF);
 940                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 941                 mask = (qmask >> 32);
 942                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 943                 break;
 944         default:
 945                 break;
 946         }
 947 }
 948
 949 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 950                                       struct ixgbe_tx_buffer *tx_buffer)
 951 {
 952         if (tx_buffer->skb) {
 953                 dev_kfree_skb_any(tx_buffer->skb);
 954                 if (dma_unmap_len(tx_buffer, len))
 955                         dma_unmap_single(ring->dev,
 956                                          dma_unmap_addr(tx_buffer, dma),
 957                                          dma_unmap_len(tx_buffer, len),
 958                                          DMA_TO_DEVICE);
 959         } else if (dma_unmap_len(tx_buffer, len)) {
 960                 dma_unmap_page(ring->dev,
 961                                dma_unmap_addr(tx_buffer, dma),
 962                                dma_unmap_len(tx_buffer, len),
 963                                DMA_TO_DEVICE);
 964         }
 965         tx_buffer->next_to_watch = NULL;
 966         tx_buffer->skb = NULL;
 967         dma_unmap_len_set(tx_buffer, len, 0);
 968         /* tx_buffer must be completely set up in the transmit path */
 969 }
 970
 971 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 972 {
 973         struct ixgbe_hw *hw = &adapter->hw;
 974         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 975         int i;
 976         u32 data;
 977
 978         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 979             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 980                 return;
 981
 982         switch (hw->mac.type) {
 983         case ixgbe_mac_82598EB:
 984                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 985                 break;
 986         default:
 987                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 988         }
 989         hwstats->lxoffrxc += data;
 990
 991         /* refill credits (no tx hang) if we received xoff */
 992         if (!data)
 993                 return;
 994
 995         for (i = 0; i < adapter->num_tx_queues; i++)
 996                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 997                           &adapter->tx_ring[i]->state);
 998 }
 999
1000 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1001 {
1002         struct ixgbe_hw *hw = &adapter->hw;
1003         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1004         u32 xoff[8] = {0};
1005         u8 tc;
1006         int i;
1007         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1008
1009         if (adapter->ixgbe_ieee_pfc)
1010                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1011
1012         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1013                 ixgbe_update_xoff_rx_lfc(adapter);
1014                 return;
1015         }
1016
1017         /* update stats for each tc, only valid with PFC enabled */
1018         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1019                 u32 pxoffrxc;
1020
1021                 switch (hw->mac.type) {
1022                 case ixgbe_mac_82598EB:
1023                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1024                         break;
1025                 default:
1026                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1027                 }
1028                 hwstats->pxoffrxc[i] += pxoffrxc;
1029                 /* Get the TC for given UP */
1030                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1031                 xoff[tc] += pxoffrxc;
1032         }
1033
1034         /* disarm tx queues that have received xoff frames */
1035         for (i = 0; i < adapter->num_tx_queues; i++) {
1036                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1037
1038                 tc = tx_ring->dcb_tc;
1039                 if (xoff[tc])
1040                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1041         }
1042 }
1043
1044 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1045 {
1046         return ring->stats.packets;
1047 }
1048
1049 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1050 {
1051         struct ixgbe_adapter *adapter;
1052         struct ixgbe_hw *hw;
1053         u32 head, tail;
1054
1055         if (ring->l2_accel_priv)
1056                 adapter = ring->l2_accel_priv->real_adapter;
1057         else
1058                 adapter = netdev_priv(ring->netdev);
1059
1060         hw = &adapter->hw;
1061         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1062         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1063
1064         if (head != tail)
1065                 return (head < tail) ?
1066                         tail - head : (tail + ring->count - head);
1067
1068         return 0;
1069 }
1070
1071 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1072 {
1073         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1074         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1075         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1076
1077         clear_check_for_tx_hang(tx_ring);
1078
1079         /*
1080          * Check for a hung queue, but be thorough. This verifies
1081          * that a transmit has been completed since the previous
1082          * check AND there is at least one packet pending. The
1083          * ARMED bit is set to indicate a potential hang. The
1084          * bit is cleared if a pause frame is received to remove
1085          * false hang detection due to PFC or 802.3x frames. By
1086          * requiring this to fail twice we avoid races with
1087          * pfc clearing the ARMED bit and conditions where we
1088          * run the check_tx_hang logic with a transmit completion
1089          * pending but without time to complete it yet.
1090          */
1091         if (tx_done_old == tx_done && tx_pending)
1092                 /* make sure it is true for two checks in a row */
1093                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1094                                         &tx_ring->state);
1095         /* update completed stats and continue */
1096         tx_ring->tx_stats.tx_done_old = tx_done;
1097         /* reset the countdown */
1098         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1099
1100         return false;
1101 }
1102
1103 /**
1104  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1105  * @adapter: driver private struct
1106  **/
1107 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1108 {
1109
1110         /* Do the reset outside of interrupt context */
1111         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1112                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1113                 e_warn(drv, "initiating reset due to tx timeout\n");
1114                 ixgbe_service_event_schedule(adapter);
1115         }
1116 }
1117
1118 /**
1119  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1120  **/
1121 static int ixgbe_tx_maxrate(struct net_device *netdev,
1122                             int queue_index, u32 maxrate)
1123 {
1124         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1125         struct ixgbe_hw *hw = &adapter->hw;
1126         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1127
1128         if (!maxrate)
1129                 return 0;
1130
1131         /* Calculate the rate factor values to set */
1132         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1133         bcnrc_val /= maxrate;
1134
1135         /* clear everything but the rate factor */
1136         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1137         IXGBE_RTTBCNRC_RF_DEC_MASK;
1138
1139         /* enable the rate scheduler */
1140         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1141
1142         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1143         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1144
1145         return 0;
1146 }
1147
1148 /**
1149  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1150  * @q_vector: structure containing interrupt and ring information
1151  * @tx_ring: tx ring to clean
1152  * @napi_budget: Used to determine if we are in netpoll
1153  **/
1154 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1155                                struct ixgbe_ring *tx_ring, int napi_budget)
1156 {
1157         struct ixgbe_adapter *adapter = q_vector->adapter;
1158         struct ixgbe_tx_buffer *tx_buffer;
1159         union ixgbe_adv_tx_desc *tx_desc;
1160         unsigned int total_bytes = 0, total_packets = 0;
1161         unsigned int budget = q_vector->tx.work_limit;
1162         unsigned int i = tx_ring->next_to_clean;
1163
1164         if (test_bit(__IXGBE_DOWN, &adapter->state))
1165                 return true;
1166
1167         tx_buffer = &tx_ring->tx_buffer_info[i];
1168         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1169         i -= tx_ring->count;
1170
1171         do {
1172                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1173
1174                 /* if next_to_watch is not set then there is no work pending */
1175                 if (!eop_desc)
1176                         break;
1177
1178                 /* prevent any other reads prior to eop_desc */
1179                 read_barrier_depends();
1180
1181                 /* if DD is not set pending work has not been completed */
1182                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1183                         break;
1184
1185                 /* clear next_to_watch to prevent false hangs */
1186                 tx_buffer->next_to_watch = NULL;
1187
1188                 /* update the statistics for this packet */
1189                 total_bytes += tx_buffer->bytecount;
1190                 total_packets += tx_buffer->gso_segs;
1191
1192                 /* free the skb */
1193                 napi_consume_skb(tx_buffer->skb, napi_budget);
1194
1195                 /* unmap skb header data */
1196                 dma_unmap_single(tx_ring->dev,
1197                                  dma_unmap_addr(tx_buffer, dma),
1198                                  dma_unmap_len(tx_buffer, len),
1199                                  DMA_TO_DEVICE);
1200
1201                 /* clear tx_buffer data */
1202                 tx_buffer->skb = NULL;
1203                 dma_unmap_len_set(tx_buffer, len, 0);
1204
1205                 /* unmap remaining buffers */
1206                 while (tx_desc != eop_desc) {
1207                         tx_buffer++;
1208                         tx_desc++;
1209                         i++;
1210                         if (unlikely(!i)) {
1211                                 i -= tx_ring->count;
1212                                 tx_buffer = tx_ring->tx_buffer_info;
1213                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1214                         }
1215
1216                         /* unmap any remaining paged data */
1217                         if (dma_unmap_len(tx_buffer, len)) {
1218                                 dma_unmap_page(tx_ring->dev,
1219                                                dma_unmap_addr(tx_buffer, dma),
1220                                                dma_unmap_len(tx_buffer, len),
1221                                                DMA_TO_DEVICE);
1222                                 dma_unmap_len_set(tx_buffer, len, 0);
1223                         }
1224                 }
1225
1226                 /* move us one more past the eop_desc for start of next pkt */
1227                 tx_buffer++;
1228                 tx_desc++;
1229                 i++;
1230                 if (unlikely(!i)) {
1231                         i -= tx_ring->count;
1232                         tx_buffer = tx_ring->tx_buffer_info;
1233                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1234                 }
1235
1236                 /* issue prefetch for next Tx descriptor */
1237                 prefetch(tx_desc);
1238
1239                 /* update budget accounting */
1240                 budget--;
1241         } while (likely(budget));
1242
1243         i += tx_ring->count;
1244         tx_ring->next_to_clean = i;
1245         u64_stats_update_begin(&tx_ring->syncp);
1246         tx_ring->stats.bytes += total_bytes;
1247         tx_ring->stats.packets += total_packets;
1248         u64_stats_update_end(&tx_ring->syncp);
1249         q_vector->tx.total_bytes += total_bytes;
1250         q_vector->tx.total_packets += total_packets;
1251
1252         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1253                 /* schedule immediate reset if we believe we hung */
1254                 struct ixgbe_hw *hw = &adapter->hw;
1255                 e_err(drv, "Detected Tx Unit Hang\n"
1256                         "  Tx Queue             <%d>\n"
1257                         "  TDH, TDT             <%x>, <%x>\n"
1258                         "  next_to_use          <%x>\n"
1259                         "  next_to_clean        <%x>\n"
1260                         "tx_buffer_info[next_to_clean]\n"
1261                         "  time_stamp           <%lx>\n"
1262                         "  jiffies              <%lx>\n",
1263                         tx_ring->queue_index,
1264                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1265                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1266                         tx_ring->next_to_use, i,
1267                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1268
1269                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1270
1271                 e_info(probe,
1272                        "tx hang %d detected on queue %d, resetting adapter\n",
1273                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1274
1275                 /* schedule immediate reset if we believe we hung */
1276                 ixgbe_tx_timeout_reset(adapter);
1277
1278                 /* the adapter is about to reset, no point in enabling stuff */
1279                 return true;
1280         }
1281
1282         netdev_tx_completed_queue(txring_txq(tx_ring),
1283                                   total_packets, total_bytes);
1284
1285 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1286         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1287                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1288                 /* Make sure that anybody stopping the queue after this
1289                  * sees the new next_to_clean.
1290                  */
1291                 smp_mb();
1292                 if (__netif_subqueue_stopped(tx_ring->netdev,
1293                                              tx_ring->queue_index)
1294                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1295                         netif_wake_subqueue(tx_ring->netdev,
1296                                             tx_ring->queue_index);
1297                         ++tx_ring->tx_stats.restart_queue;
1298                 }
1299         }
1300
1301         return !!budget;
1302 }
1303
1304 #ifdef CONFIG_IXGBE_DCA
1305 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1306                                 struct ixgbe_ring *tx_ring,
1307                                 int cpu)
1308 {
1309         struct ixgbe_hw *hw = &adapter->hw;
1310         u32 txctrl = 0;
1311         u16 reg_offset;
1312
1313         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1314                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1315
1316         switch (hw->mac.type) {
1317         case ixgbe_mac_82598EB:
1318                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1319                 break;
1320         case ixgbe_mac_82599EB:
1321         case ixgbe_mac_X540:
1322                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1323                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1324                 break;
1325         default:
1326                 /* for unknown hardware do not write register */
1327                 return;
1328         }
1329
1330         /*
1331          * We can enable relaxed ordering for reads, but not writes when
1332          * DCA is enabled.  This is due to a known issue in some chipsets
1333          * which will cause the DCA tag to be cleared.
1334          */
1335         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1336                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1337                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1338
1339         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1340 }
1341
1342 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1343                                 struct ixgbe_ring *rx_ring,
1344                                 int cpu)
1345 {
1346         struct ixgbe_hw *hw = &adapter->hw;
1347         u32 rxctrl = 0;
1348         u8 reg_idx = rx_ring->reg_idx;
1349
1350         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1351                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1352
1353         switch (hw->mac.type) {
1354         case ixgbe_mac_82599EB:
1355         case ixgbe_mac_X540:
1356                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1357                 break;
1358         default:
1359                 break;
1360         }
1361
1362         /*
1363          * We can enable relaxed ordering for reads, but not writes when
1364          * DCA is enabled.  This is due to a known issue in some chipsets
1365          * which will cause the DCA tag to be cleared.
1366          */
1367         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1368                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1369                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1370
1371         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1372 }
1373
1374 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1375 {
1376         struct ixgbe_adapter *adapter = q_vector->adapter;
1377         struct ixgbe_ring *ring;
1378         int cpu = get_cpu();
1379
1380         if (q_vector->cpu == cpu)
1381                 goto out_no_update;
1382
1383         ixgbe_for_each_ring(ring, q_vector->tx)
1384                 ixgbe_update_tx_dca(adapter, ring, cpu);
1385
1386         ixgbe_for_each_ring(ring, q_vector->rx)
1387                 ixgbe_update_rx_dca(adapter, ring, cpu);
1388
1389         q_vector->cpu = cpu;
1390 out_no_update:
1391         put_cpu();
1392 }
1393
1394 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1395 {
1396         int i;
1397
1398         /* always use CB2 mode, difference is masked in the CB driver */
1399         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1400                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1401                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1402         else
1403                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1405
1406         for (i = 0; i < adapter->num_q_vectors; i++) {
1407                 adapter->q_vector[i]->cpu = -1;
1408                 ixgbe_update_dca(adapter->q_vector[i]);
1409         }
1410 }
1411
1412 static int __ixgbe_notify_dca(struct device *dev, void *data)
1413 {
1414         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1415         unsigned long event = *(unsigned long *)data;
1416
1417         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1418                 return 0;
1419
1420         switch (event) {
1421         case DCA_PROVIDER_ADD:
1422                 /* if we're already enabled, don't do it again */
1423                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1424                         break;
1425                 if (dca_add_requester(dev) == 0) {
1426                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1427                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1429                         break;
1430                 }
1431                 /* Fall Through since DCA is disabled. */
1432         case DCA_PROVIDER_REMOVE:
1433                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1434                         dca_remove_requester(dev);
1435                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1436                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1437                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1438                 }
1439                 break;
1440         }
1441
1442         return 0;
1443 }
1444
1445 #endif /* CONFIG_IXGBE_DCA */
1446
1447 #define IXGBE_RSS_L4_TYPES_MASK \
1448         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1449          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1450          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1451          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1452
1453 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1454                                  union ixgbe_adv_rx_desc *rx_desc,
1455                                  struct sk_buff *skb)
1456 {
1457         u16 rss_type;
1458
1459         if (!(ring->netdev->features & NETIF_F_RXHASH))
1460                 return;
1461
1462         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1463                    IXGBE_RXDADV_RSSTYPE_MASK;
1464
1465         if (!rss_type)
1466                 return;
1467
1468         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1469                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1470                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1471 }
1472
1473 #ifdef IXGBE_FCOE
1474 /**
1475  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1476  * @ring: structure containing ring specific data
1477  * @rx_desc: advanced rx descriptor
1478  *
1479  * Returns : true if it is FCoE pkt
1480  */
1481 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1482                                     union ixgbe_adv_rx_desc *rx_desc)
1483 {
1484         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1485
1486         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1487                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1488                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1489                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1490 }
1491
1492 #endif /* IXGBE_FCOE */
1493 /**
1494  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1495  * @ring: structure containing ring specific data
1496  * @rx_desc: current Rx descriptor being processed
1497  * @skb: skb currently being received and modified
1498  **/
1499 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1500                                      union ixgbe_adv_rx_desc *rx_desc,
1501                                      struct sk_buff *skb)
1502 {
1503         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1504         bool encap_pkt = false;
1505
1506         skb_checksum_none_assert(skb);
1507
1508         /* Rx csum disabled */
1509         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1510                 return;
1511
1512         /* check for VXLAN and Geneve packets */
1513         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1514                 encap_pkt = true;
1515                 skb->encapsulation = 1;
1516         }
1517
1518         /* if IP and error */
1519         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1520             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1521                 ring->rx_stats.csum_err++;
1522                 return;
1523         }
1524
1525         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1526                 return;
1527
1528         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1529                 /*
1530                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1531                  * checksum errors.
1532                  */
1533                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1534                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1535                         return;
1536
1537                 ring->rx_stats.csum_err++;
1538                 return;
1539         }
1540
1541         /* It must be a TCP or UDP packet with a valid checksum */
1542         skb->ip_summed = CHECKSUM_UNNECESSARY;
1543         if (encap_pkt) {
1544                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1545                         return;
1546
1547                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1548                         skb->ip_summed = CHECKSUM_NONE;
1549                         return;
1550                 }
1551                 /* If we checked the outer header let the stack know */
1552                 skb->csum_level = 1;
1553         }
1554 }
1555
1556 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1557                                     struct ixgbe_rx_buffer *bi)
1558 {
1559         struct page *page = bi->page;
1560         dma_addr_t dma;
1561
1562         /* since we are recycling buffers we should seldom need to alloc */
1563         if (likely(page))
1564                 return true;
1565
1566         /* alloc new page for storage */
1567         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1568         if (unlikely(!page)) {
1569                 rx_ring->rx_stats.alloc_rx_page_failed++;
1570                 return false;
1571         }
1572
1573         /* map page for use */
1574         dma = dma_map_page(rx_ring->dev, page, 0,
1575                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1576
1577         /*
1578          * if mapping failed free memory back to system since
1579          * there isn't much point in holding memory we can't use
1580          */
1581         if (dma_mapping_error(rx_ring->dev, dma)) {
1582                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1583
1584                 rx_ring->rx_stats.alloc_rx_page_failed++;
1585                 return false;
1586         }
1587
1588         bi->dma = dma;
1589         bi->page = page;
1590         bi->page_offset = 0;
1591
1592         return true;
1593 }
1594
1595 /**
1596  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1597  * @rx_ring: ring to place buffers on
1598  * @cleaned_count: number of buffers to replace
1599  **/
1600 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1601 {
1602         union ixgbe_adv_rx_desc *rx_desc;
1603         struct ixgbe_rx_buffer *bi;
1604         u16 i = rx_ring->next_to_use;
1605
1606         /* nothing to do */
1607         if (!cleaned_count)
1608                 return;
1609
1610         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1611         bi = &rx_ring->rx_buffer_info[i];
1612         i -= rx_ring->count;
1613
1614         do {
1615                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1616                         break;
1617
1618                 /*
1619                  * Refresh the desc even if buffer_addrs didn't change
1620                  * because each write-back erases this info.
1621                  */
1622                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1623
1624                 rx_desc++;
1625                 bi++;
1626                 i++;
1627                 if (unlikely(!i)) {
1628                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1629                         bi = rx_ring->rx_buffer_info;
1630                         i -= rx_ring->count;
1631                 }
1632
1633                 /* clear the status bits for the next_to_use descriptor */
1634                 rx_desc->wb.upper.status_error = 0;
1635
1636                 cleaned_count--;
1637         } while (cleaned_count);
1638
1639         i += rx_ring->count;
1640
1641         if (rx_ring->next_to_use != i) {
1642                 rx_ring->next_to_use = i;
1643
1644                 /* update next to alloc since we have filled the ring */
1645                 rx_ring->next_to_alloc = i;
1646
1647                 /* Force memory writes to complete before letting h/w
1648                  * know there are new descriptors to fetch.  (Only
1649                  * applicable for weak-ordered memory model archs,
1650                  * such as IA-64).
1651                  */
1652                 wmb();
1653                 writel(i, rx_ring->tail);
1654         }
1655 }
1656
1657 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1658                                    struct sk_buff *skb)
1659 {
1660         u16 hdr_len = skb_headlen(skb);
1661
1662         /* set gso_size to avoid messing up TCP MSS */
1663         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1664                                                  IXGBE_CB(skb)->append_cnt);
1665         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1666 }
1667
1668 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1669                                    struct sk_buff *skb)
1670 {
1671         /* if append_cnt is 0 then frame is not RSC */
1672         if (!IXGBE_CB(skb)->append_cnt)
1673                 return;
1674
1675         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1676         rx_ring->rx_stats.rsc_flush++;
1677
1678         ixgbe_set_rsc_gso_size(rx_ring, skb);
1679
1680         /* gso_size is computed using append_cnt so always clear it last */
1681         IXGBE_CB(skb)->append_cnt = 0;
1682 }
1683
1684 /**
1685  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1686  * @rx_ring: rx descriptor ring packet is being transacted on
1687  * @rx_desc: pointer to the EOP Rx descriptor
1688  * @skb: pointer to current skb being populated
1689  *
1690  * This function checks the ring, descriptor, and packet information in
1691  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1692  * other fields within the skb.
1693  **/
1694 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1695                                      union ixgbe_adv_rx_desc *rx_desc,
1696                                      struct sk_buff *skb)
1697 {
1698         struct net_device *dev = rx_ring->netdev;
1699         u32 flags = rx_ring->q_vector->adapter->flags;
1700
1701         ixgbe_update_rsc_stats(rx_ring, skb);
1702
1703         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1704
1705         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1706
1707         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1708                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1709
1710         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1711             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1712                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1713                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1714         }
1715
1716         skb_record_rx_queue(skb, rx_ring->queue_index);
1717
1718         skb->protocol = eth_type_trans(skb, dev);
1719 }
1720
1721 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1722                          struct sk_buff *skb)
1723 {
1724         skb_mark_napi_id(skb, &q_vector->napi);
1725         if (ixgbe_qv_busy_polling(q_vector))
1726                 netif_receive_skb(skb);
1727         else
1728                 napi_gro_receive(&q_vector->napi, skb);
1729 }
1730
1731 /**
1732  * ixgbe_is_non_eop - process handling of non-EOP buffers
1733  * @rx_ring: Rx ring being processed
1734  * @rx_desc: Rx descriptor for current buffer
1735  * @skb: Current socket buffer containing buffer in progress
1736  *
1737  * This function updates next to clean.  If the buffer is an EOP buffer
1738  * this function exits returning false, otherwise it will place the
1739  * sk_buff in the next buffer to be chained and return true indicating
1740  * that this is in fact a non-EOP buffer.
1741  **/
1742 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1743                              union ixgbe_adv_rx_desc *rx_desc,
1744                              struct sk_buff *skb)
1745 {
1746         u32 ntc = rx_ring->next_to_clean + 1;
1747
1748         /* fetch, update, and store next to clean */
1749         ntc = (ntc < rx_ring->count) ? ntc : 0;
1750         rx_ring->next_to_clean = ntc;
1751
1752         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1753
1754         /* update RSC append count if present */
1755         if (ring_is_rsc_enabled(rx_ring)) {
1756                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1757                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1758
1759                 if (unlikely(rsc_enabled)) {
1760                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1761
1762                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1763                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1764
1765                         /* update ntc based on RSC value */
1766                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1767                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1768                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1769                 }
1770         }
1771
1772         /* if we are the last buffer then there is nothing else to do */
1773         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1774                 return false;
1775
1776         /* place skb in next buffer to be received */
1777         rx_ring->rx_buffer_info[ntc].skb = skb;
1778         rx_ring->rx_stats.non_eop_descs++;
1779
1780         return true;
1781 }
1782
1783 /**
1784  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1785  * @rx_ring: rx descriptor ring packet is being transacted on
1786  * @skb: pointer to current skb being adjusted
1787  *
1788  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1789  * main difference between this version and the original function is that
1790  * this function can make several assumptions about the state of things
1791  * that allow for significant optimizations versus the standard function.
1792  * As a result we can do things like drop a frag and maintain an accurate
1793  * truesize for the skb.
1794  */
1795 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1796                             struct sk_buff *skb)
1797 {
1798         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1799         unsigned char *va;
1800         unsigned int pull_len;
1801
1802         /*
1803          * it is valid to use page_address instead of kmap since we are
1804          * working with pages allocated out of the lomem pool per
1805          * alloc_page(GFP_ATOMIC)
1806          */
1807         va = skb_frag_address(frag);
1808
1809         /*
1810          * we need the header to contain the greater of either ETH_HLEN or
1811          * 60 bytes if the skb->len is less than 60 for skb_pad.
1812          */
1813         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1814
1815         /* align pull length to size of long to optimize memcpy performance */
1816         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1817
1818         /* update all of the pointers */
1819         skb_frag_size_sub(frag, pull_len);
1820         frag->page_offset += pull_len;
1821         skb->data_len -= pull_len;
1822         skb->tail += pull_len;
1823 }
1824
1825 /**
1826  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1827  * @rx_ring: rx descriptor ring packet is being transacted on
1828  * @skb: pointer to current skb being updated
1829  *
1830  * This function provides a basic DMA sync up for the first fragment of an
1831  * skb.  The reason for doing this is that the first fragment cannot be
1832  * unmapped until we have reached the end of packet descriptor for a buffer
1833  * chain.
1834  */
1835 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1836                                 struct sk_buff *skb)
1837 {
1838         /* if the page was released unmap it, else just sync our portion */
1839         if (unlikely(IXGBE_CB(skb)->page_released)) {
1840                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1841                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1842                 IXGBE_CB(skb)->page_released = false;
1843         } else {
1844                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1845
1846                 dma_sync_single_range_for_cpu(rx_ring->dev,
1847                                               IXGBE_CB(skb)->dma,
1848                                               frag->page_offset,
1849                                               ixgbe_rx_bufsz(rx_ring),
1850                                               DMA_FROM_DEVICE);
1851         }
1852         IXGBE_CB(skb)->dma = 0;
1853 }
1854
1855 /**
1856  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1857  * @rx_ring: rx descriptor ring packet is being transacted on
1858  * @rx_desc: pointer to the EOP Rx descriptor
1859  * @skb: pointer to current skb being fixed
1860  *
1861  * Check for corrupted packet headers caused by senders on the local L2
1862  * embedded NIC switch not setting up their Tx Descriptors right.  These
1863  * should be very rare.
1864  *
1865  * Also address the case where we are pulling data in on pages only
1866  * and as such no data is present in the skb header.
1867  *
1868  * In addition if skb is not at least 60 bytes we need to pad it so that
1869  * it is large enough to qualify as a valid Ethernet frame.
1870  *
1871  * Returns true if an error was encountered and skb was freed.
1872  **/
1873 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1874                                   union ixgbe_adv_rx_desc *rx_desc,
1875                                   struct sk_buff *skb)
1876 {
1877         struct net_device *netdev = rx_ring->netdev;
1878
1879         /* verify that the packet does not have any known errors */
1880         if (unlikely(ixgbe_test_staterr(rx_desc,
1881                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1882             !(netdev->features & NETIF_F_RXALL))) {
1883                 dev_kfree_skb_any(skb);
1884                 return true;
1885         }
1886
1887         /* place header in linear portion of buffer */
1888         if (skb_is_nonlinear(skb))
1889                 ixgbe_pull_tail(rx_ring, skb);
1890
1891 #ifdef IXGBE_FCOE
1892         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1893         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1894                 return false;
1895
1896 #endif
1897         /* if eth_skb_pad returns an error the skb was freed */
1898         if (eth_skb_pad(skb))
1899                 return true;
1900
1901         return false;
1902 }
1903
1904 /**
1905  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1906  * @rx_ring: rx descriptor ring to store buffers on
1907  * @old_buff: donor buffer to have page reused
1908  *
1909  * Synchronizes page for reuse by the adapter
1910  **/
1911 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1912                                 struct ixgbe_rx_buffer *old_buff)
1913 {
1914         struct ixgbe_rx_buffer *new_buff;
1915         u16 nta = rx_ring->next_to_alloc;
1916
1917         new_buff = &rx_ring->rx_buffer_info[nta];
1918
1919         /* update, and store next to alloc */
1920         nta++;
1921         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1922
1923         /* transfer page from old buffer to new buffer */
1924         *new_buff = *old_buff;
1925
1926         /* sync the buffer for use by the device */
1927         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1928                                          new_buff->page_offset,
1929                                          ixgbe_rx_bufsz(rx_ring),
1930                                          DMA_FROM_DEVICE);
1931 }
1932
1933 static inline bool ixgbe_page_is_reserved(struct page *page)
1934 {
1935         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1936 }
1937
1938 /**
1939  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1940  * @rx_ring: rx descriptor ring to transact packets on
1941  * @rx_buffer: buffer containing page to add
1942  * @rx_desc: descriptor containing length of buffer written by hardware
1943  * @skb: sk_buff to place the data into
1944  *
1945  * This function will add the data contained in rx_buffer->page to the skb.
1946  * This is done either through a direct copy if the data in the buffer is
1947  * less than the skb header size, otherwise it will just attach the page as
1948  * a frag to the skb.
1949  *
1950  * The function will then update the page offset if necessary and return
1951  * true if the buffer can be reused by the adapter.
1952  **/
1953 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1954                               struct ixgbe_rx_buffer *rx_buffer,
1955                               union ixgbe_adv_rx_desc *rx_desc,
1956                               struct sk_buff *skb)
1957 {
1958         struct page *page = rx_buffer->page;
1959         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1960 #if (PAGE_SIZE < 8192)
1961         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1962 #else
1963         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1964         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1965                                    ixgbe_rx_bufsz(rx_ring);
1966 #endif
1967
1968         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1969                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1970
1971                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1972
1973                 /* page is not reserved, we can reuse buffer as-is */
1974                 if (likely(!ixgbe_page_is_reserved(page)))
1975                         return true;
1976
1977                 /* this page cannot be reused so discard it */
1978                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1979                 return false;
1980         }
1981
1982         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1983                         rx_buffer->page_offset, size, truesize);
1984
1985         /* avoid re-using remote pages */
1986         if (unlikely(ixgbe_page_is_reserved(page)))
1987                 return false;
1988
1989 #if (PAGE_SIZE < 8192)
1990         /* if we are only owner of page we can reuse it */
1991         if (unlikely(page_count(page) != 1))
1992                 return false;
1993
1994         /* flip page offset to other buffer */
1995         rx_buffer->page_offset ^= truesize;
1996 #else
1997         /* move offset up to the next cache line */
1998         rx_buffer->page_offset += truesize;
1999
2000         if (rx_buffer->page_offset > last_offset)
2001                 return false;
2002 #endif
2003
2004         /* Even if we own the page, we are not allowed to use atomic_set()
2005          * This would break get_page_unless_zero() users.
2006          */
2007         page_ref_inc(page);
2008
2009         return true;
2010 }
2011
2012 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2013                                              union ixgbe_adv_rx_desc *rx_desc)
2014 {
2015         struct ixgbe_rx_buffer *rx_buffer;
2016         struct sk_buff *skb;
2017         struct page *page;
2018
2019         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2020         page = rx_buffer->page;
2021         prefetchw(page);
2022
2023         skb = rx_buffer->skb;
2024
2025         if (likely(!skb)) {
2026                 void *page_addr = page_address(page) +
2027                                   rx_buffer->page_offset;
2028
2029                 /* prefetch first cache line of first page */
2030                 prefetch(page_addr);
2031 #if L1_CACHE_BYTES < 128
2032                 prefetch(page_addr + L1_CACHE_BYTES);
2033 #endif
2034
2035                 /* allocate a skb to store the frags */
2036                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2037                                      IXGBE_RX_HDR_SIZE);
2038                 if (unlikely(!skb)) {
2039                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2040                         return NULL;
2041                 }
2042
2043                 /*
2044                  * we will be copying header into skb->data in
2045                  * pskb_may_pull so it is in our interest to prefetch
2046                  * it now to avoid a possible cache miss
2047                  */
2048                 prefetchw(skb->data);
2049
2050                 /*
2051                  * Delay unmapping of the first packet. It carries the
2052                  * header information, HW may still access the header
2053                  * after the writeback.  Only unmap it when EOP is
2054                  * reached
2055                  */
2056                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2057                         goto dma_sync;
2058
2059                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2060         } else {
2061                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2062                         ixgbe_dma_sync_frag(rx_ring, skb);
2063
2064 dma_sync:
2065                 /* we are reusing so sync this buffer for CPU use */
2066                 dma_sync_single_range_for_cpu(rx_ring->dev,
2067                                               rx_buffer->dma,
2068                                               rx_buffer->page_offset,
2069                                               ixgbe_rx_bufsz(rx_ring),
2070                                               DMA_FROM_DEVICE);
2071
2072                 rx_buffer->skb = NULL;
2073         }
2074
2075         /* pull page into skb */
2076         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2077                 /* hand second half of page back to the ring */
2078                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2079         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2080                 /* the page has been released from the ring */
2081                 IXGBE_CB(skb)->page_released = true;
2082         } else {
2083                 /* we are not reusing the buffer so unmap it */
2084                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2085                                ixgbe_rx_pg_size(rx_ring),
2086                                DMA_FROM_DEVICE);
2087         }
2088
2089         /* clear contents of buffer_info */
2090         rx_buffer->page = NULL;
2091
2092         return skb;
2093 }
2094
2095 /**
2096  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2097  * @q_vector: structure containing interrupt and ring information
2098  * @rx_ring: rx descriptor ring to transact packets on
2099  * @budget: Total limit on number of packets to process
2100  *
2101  * This function provides a "bounce buffer" approach to Rx interrupt
2102  * processing.  The advantage to this is that on systems that have
2103  * expensive overhead for IOMMU access this provides a means of avoiding
2104  * it by maintaining the mapping of the page to the syste.
2105  *
2106  * Returns amount of work completed
2107  **/
2108 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2109                                struct ixgbe_ring *rx_ring,
2110                                const int budget)
2111 {
2112         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2113 #ifdef IXGBE_FCOE
2114         struct ixgbe_adapter *adapter = q_vector->adapter;
2115         int ddp_bytes;
2116         unsigned int mss = 0;
2117 #endif /* IXGBE_FCOE */
2118         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2119
2120         while (likely(total_rx_packets < budget)) {
2121                 union ixgbe_adv_rx_desc *rx_desc;
2122                 struct sk_buff *skb;
2123
2124                 /* return some buffers to hardware, one at a time is too slow */
2125                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2126                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2127                         cleaned_count = 0;
2128                 }
2129
2130                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2131
2132                 if (!rx_desc->wb.upper.status_error)
2133                         break;
2134
2135                 /* This memory barrier is needed to keep us from reading
2136                  * any other fields out of the rx_desc until we know the
2137                  * descriptor has been written back
2138                  */
2139                 dma_rmb();
2140
2141                 /* retrieve a buffer from the ring */
2142                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2143
2144                 /* exit if we failed to retrieve a buffer */
2145                 if (!skb)
2146                         break;
2147
2148                 cleaned_count++;
2149
2150                 /* place incomplete frames back on ring for completion */
2151                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2152                         continue;
2153
2154                 /* verify the packet layout is correct */
2155                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2156                         continue;
2157
2158                 /* probably a little skewed due to removing CRC */
2159                 total_rx_bytes += skb->len;
2160
2161                 /* populate checksum, timestamp, VLAN, and protocol */
2162                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2163
2164 #ifdef IXGBE_FCOE
2165                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2166                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2167                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2168                         /* include DDPed FCoE data */
2169                         if (ddp_bytes > 0) {
2170                                 if (!mss) {
2171                                         mss = rx_ring->netdev->mtu -
2172                                                 sizeof(struct fcoe_hdr) -
2173                                                 sizeof(struct fc_frame_header) -
2174                                                 sizeof(struct fcoe_crc_eof);
2175                                         if (mss > 512)
2176                                                 mss &= ~511;
2177                                 }
2178                                 total_rx_bytes += ddp_bytes;
2179                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2180                                                                  mss);
2181                         }
2182                         if (!ddp_bytes) {
2183                                 dev_kfree_skb_any(skb);
2184                                 continue;
2185                         }
2186                 }
2187
2188 #endif /* IXGBE_FCOE */
2189                 ixgbe_rx_skb(q_vector, skb);
2190
2191                 /* update budget accounting */
2192                 total_rx_packets++;
2193         }
2194
2195         u64_stats_update_begin(&rx_ring->syncp);
2196         rx_ring->stats.packets += total_rx_packets;
2197         rx_ring->stats.bytes += total_rx_bytes;
2198         u64_stats_update_end(&rx_ring->syncp);
2199         q_vector->rx.total_packets += total_rx_packets;
2200         q_vector->rx.total_bytes += total_rx_bytes;
2201
2202         return total_rx_packets;
2203 }
2204
2205 #ifdef CONFIG_NET_RX_BUSY_POLL
2206 /* must be called with local_bh_disable()d */
2207 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2208 {
2209         struct ixgbe_q_vector *q_vector =
2210                         container_of(napi, struct ixgbe_q_vector, napi);
2211         struct ixgbe_adapter *adapter = q_vector->adapter;
2212         struct ixgbe_ring  *ring;
2213         int found = 0;
2214
2215         if (test_bit(__IXGBE_DOWN, &adapter->state))
2216                 return LL_FLUSH_FAILED;
2217
2218         if (!ixgbe_qv_lock_poll(q_vector))
2219                 return LL_FLUSH_BUSY;
2220
2221         ixgbe_for_each_ring(ring, q_vector->rx) {
2222                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2223 #ifdef BP_EXTENDED_STATS
2224                 if (found)
2225                         ring->stats.cleaned += found;
2226                 else
2227                         ring->stats.misses++;
2228 #endif
2229                 if (found)
2230                         break;
2231         }
2232
2233         ixgbe_qv_unlock_poll(q_vector);
2234
2235         return found;
2236 }
2237 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2238
2239 /**
2240  * ixgbe_configure_msix - Configure MSI-X hardware
2241  * @adapter: board private structure
2242  *
2243  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2244  * interrupts.
2245  **/
2246 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2247 {
2248         struct ixgbe_q_vector *q_vector;
2249         int v_idx;
2250         u32 mask;
2251
2252         /* Populate MSIX to EITR Select */
2253         if (adapter->num_vfs > 32) {
2254                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2255                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2256         }
2257
2258         /*
2259          * Populate the IVAR table and set the ITR values to the
2260          * corresponding register.
2261          */
2262         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2263                 struct ixgbe_ring *ring;
2264                 q_vector = adapter->q_vector[v_idx];
2265
2266                 ixgbe_for_each_ring(ring, q_vector->rx)
2267                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2268
2269                 ixgbe_for_each_ring(ring, q_vector->tx)
2270                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2271
2272                 ixgbe_write_eitr(q_vector);
2273         }
2274
2275         switch (adapter->hw.mac.type) {
2276         case ixgbe_mac_82598EB:
2277                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2278                                v_idx);
2279                 break;
2280         case ixgbe_mac_82599EB:
2281         case ixgbe_mac_X540:
2282         case ixgbe_mac_X550:
2283         case ixgbe_mac_X550EM_x:
2284         case ixgbe_mac_x550em_a:
2285                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2286                 break;
2287         default:
2288                 break;
2289         }
2290         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2291
2292         /* set up to autoclear timer, and the vectors */
2293         mask = IXGBE_EIMS_ENABLE_MASK;
2294         mask &= ~(IXGBE_EIMS_OTHER |
2295                   IXGBE_EIMS_MAILBOX |
2296                   IXGBE_EIMS_LSC);
2297
2298         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2299 }
2300
2301 enum latency_range {
2302         lowest_latency = 0,
2303         low_latency = 1,
2304         bulk_latency = 2,
2305         latency_invalid = 255
2306 };
2307
2308 /**
2309  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2310  * @q_vector: structure containing interrupt and ring information
2311  * @ring_container: structure containing ring performance data
2312  *
2313  *      Stores a new ITR value based on packets and byte
2314  *      counts during the last interrupt.  The advantage of per interrupt
2315  *      computation is faster updates and more accurate ITR for the current
2316  *      traffic pattern.  Constants in this function were computed
2317  *      based on theoretical maximum wire speed and thresholds were set based
2318  *      on testing data as well as attempting to minimize response time
2319  *      while increasing bulk throughput.
2320  *      this functionality is controlled by the InterruptThrottleRate module
2321  *      parameter (see ixgbe_param.c)
2322  **/
2323 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2324                              struct ixgbe_ring_container *ring_container)
2325 {
2326         int bytes = ring_container->total_bytes;
2327         int packets = ring_container->total_packets;
2328         u32 timepassed_us;
2329         u64 bytes_perint;
2330         u8 itr_setting = ring_container->itr;
2331
2332         if (packets == 0)
2333                 return;
2334
2335         /* simple throttlerate management
2336          *   0-10MB/s   lowest (100000 ints/s)
2337          *  10-20MB/s   low    (20000 ints/s)
2338          *  20-1249MB/s bulk   (12000 ints/s)
2339          */
2340         /* what was last interrupt timeslice? */
2341         timepassed_us = q_vector->itr >> 2;
2342         if (timepassed_us == 0)
2343                 return;
2344
2345         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2346
2347         switch (itr_setting) {
2348         case lowest_latency:
2349                 if (bytes_perint > 10)
2350                         itr_setting = low_latency;
2351                 break;
2352         case low_latency:
2353                 if (bytes_perint > 20)
2354                         itr_setting = bulk_latency;
2355                 else if (bytes_perint <= 10)
2356                         itr_setting = lowest_latency;
2357                 break;
2358         case bulk_latency:
2359                 if (bytes_perint <= 20)
2360                         itr_setting = low_latency;
2361                 break;
2362         }
2363
2364         /* clear work counters since we have the values we need */
2365         ring_container->total_bytes = 0;
2366         ring_container->total_packets = 0;
2367
2368         /* write updated itr to ring container */
2369         ring_container->itr = itr_setting;
2370 }
2371
2372 /**
2373  * ixgbe_write_eitr - write EITR register in hardware specific way
2374  * @q_vector: structure containing interrupt and ring information
2375  *
2376  * This function is made to be called by ethtool and by the driver
2377  * when it needs to update EITR registers at runtime.  Hardware
2378  * specific quirks/differences are taken care of here.
2379  */
2380 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2381 {
2382         struct ixgbe_adapter *adapter = q_vector->adapter;
2383         struct ixgbe_hw *hw = &adapter->hw;
2384         int v_idx = q_vector->v_idx;
2385         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2386
2387         switch (adapter->hw.mac.type) {
2388         case ixgbe_mac_82598EB:
2389                 /* must write high and low 16 bits to reset counter */
2390                 itr_reg |= (itr_reg << 16);
2391                 break;
2392         case ixgbe_mac_82599EB:
2393         case ixgbe_mac_X540:
2394         case ixgbe_mac_X550:
2395         case ixgbe_mac_X550EM_x:
2396         case ixgbe_mac_x550em_a:
2397                 /*
2398                  * set the WDIS bit to not clear the timer bits and cause an
2399                  * immediate assertion of the interrupt
2400                  */
2401                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2402                 break;
2403         default:
2404                 break;
2405         }
2406         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2407 }
2408
2409 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2410 {
2411         u32 new_itr = q_vector->itr;
2412         u8 current_itr;
2413
2414         ixgbe_update_itr(q_vector, &q_vector->tx);
2415         ixgbe_update_itr(q_vector, &q_vector->rx);
2416
2417         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2418
2419         switch (current_itr) {
2420         /* counts and packets in update_itr are dependent on these numbers */
2421         case lowest_latency:
2422                 new_itr = IXGBE_100K_ITR;
2423                 break;
2424         case low_latency:
2425                 new_itr = IXGBE_20K_ITR;
2426                 break;
2427         case bulk_latency:
2428                 new_itr = IXGBE_12K_ITR;
2429                 break;
2430         default:
2431                 break;
2432         }
2433
2434         if (new_itr != q_vector->itr) {
2435                 /* do an exponential smoothing */
2436                 new_itr = (10 * new_itr * q_vector->itr) /
2437                           ((9 * new_itr) + q_vector->itr);
2438
2439                 /* save the algorithm value here */
2440                 q_vector->itr = new_itr;
2441
2442                 ixgbe_write_eitr(q_vector);
2443         }
2444 }
2445
2446 /**
2447  * ixgbe_check_overtemp_subtask - check for over temperature
2448  * @adapter: pointer to adapter
2449  **/
2450 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2451 {
2452         struct ixgbe_hw *hw = &adapter->hw;
2453         u32 eicr = adapter->interrupt_event;
2454         s32 rc;
2455
2456         if (test_bit(__IXGBE_DOWN, &adapter->state))
2457                 return;
2458
2459         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2460             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2461                 return;
2462
2463         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2464
2465         switch (hw->device_id) {
2466         case IXGBE_DEV_ID_82599_T3_LOM:
2467                 /*
2468                  * Since the warning interrupt is for both ports
2469                  * we don't have to check if:
2470                  *  - This interrupt wasn't for our port.
2471                  *  - We may have missed the interrupt so always have to
2472                  *    check if we  got a LSC
2473                  */
2474                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2475                     !(eicr & IXGBE_EICR_LSC))
2476                         return;
2477
2478                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2479                         u32 speed;
2480                         bool link_up = false;
2481
2482                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2483
2484                         if (link_up)
2485                                 return;
2486                 }
2487
2488                 /* Check if this is not due to overtemp */
2489                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2490                         return;
2491
2492                 break;
2493         case IXGBE_DEV_ID_X550EM_A_1G_T:
2494         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2495                 rc = hw->phy.ops.check_overtemp(hw);
2496                 if (rc != IXGBE_ERR_OVERTEMP)
2497                         return;
2498                 break;
2499         default:
2500                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2501                         return;
2502                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2503                         return;
2504                 break;
2505         }
2506         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2507
2508         adapter->interrupt_event = 0;
2509 }
2510
2511 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2512 {
2513         struct ixgbe_hw *hw = &adapter->hw;
2514
2515         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2516             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2517                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2518                 /* write to clear the interrupt */
2519                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2520         }
2521 }
2522
2523 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2524 {
2525         struct ixgbe_hw *hw = &adapter->hw;
2526
2527         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2528                 return;
2529
2530         switch (adapter->hw.mac.type) {
2531         case ixgbe_mac_82599EB:
2532                 /*
2533                  * Need to check link state so complete overtemp check
2534                  * on service task
2535                  */
2536                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2537                      (eicr & IXGBE_EICR_LSC)) &&
2538                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2539                         adapter->interrupt_event = eicr;
2540                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2541                         ixgbe_service_event_schedule(adapter);
2542                         return;
2543                 }
2544                 return;
2545         case ixgbe_mac_x550em_a:
2546                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2547                         adapter->interrupt_event = eicr;
2548                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2549                         ixgbe_service_event_schedule(adapter);
2550                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2551                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2552                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2553                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2554                 }
2555                 return;
2556         case ixgbe_mac_X550:
2557         case ixgbe_mac_X540:
2558                 if (!(eicr & IXGBE_EICR_TS))
2559                         return;
2560                 break;
2561         default:
2562                 return;
2563         }
2564
2565         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2566 }
2567
2568 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2569 {
2570         switch (hw->mac.type) {
2571         case ixgbe_mac_82598EB:
2572                 if (hw->phy.type == ixgbe_phy_nl)
2573                         return true;
2574                 return false;
2575         case ixgbe_mac_82599EB:
2576         case ixgbe_mac_X550EM_x:
2577         case ixgbe_mac_x550em_a:
2578                 switch (hw->mac.ops.get_media_type(hw)) {
2579                 case ixgbe_media_type_fiber:
2580                 case ixgbe_media_type_fiber_qsfp:
2581                         return true;
2582                 default:
2583                         return false;
2584                 }
2585         default:
2586                 return false;
2587         }
2588 }
2589
2590 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2591 {
2592         struct ixgbe_hw *hw = &adapter->hw;
2593         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2594
2595         if (!ixgbe_is_sfp(hw))
2596                 return;
2597
2598         /* Later MAC's use different SDP */
2599         if (hw->mac.type >= ixgbe_mac_X540)
2600                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2601
2602         if (eicr & eicr_mask) {
2603                 /* Clear the interrupt */
2604                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2605                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2606                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2607                         adapter->sfp_poll_time = 0;
2608                         ixgbe_service_event_schedule(adapter);
2609                 }
2610         }
2611
2612         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2613             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2614                 /* Clear the interrupt */
2615                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2616                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2617                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2618                         ixgbe_service_event_schedule(adapter);
2619                 }
2620         }
2621 }
2622
2623 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2624 {
2625         struct ixgbe_hw *hw = &adapter->hw;
2626
2627         adapter->lsc_int++;
2628         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2629         adapter->link_check_timeout = jiffies;
2630         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2631                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2632                 IXGBE_WRITE_FLUSH(hw);
2633                 ixgbe_service_event_schedule(adapter);
2634         }
2635 }
2636
2637 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2638                                            u64 qmask)
2639 {
2640         u32 mask;
2641         struct ixgbe_hw *hw = &adapter->hw;
2642
2643         switch (hw->mac.type) {
2644         case ixgbe_mac_82598EB:
2645                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2646                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2647                 break;
2648         case ixgbe_mac_82599EB:
2649         case ixgbe_mac_X540:
2650         case ixgbe_mac_X550:
2651         case ixgbe_mac_X550EM_x:
2652         case ixgbe_mac_x550em_a:
2653                 mask = (qmask & 0xFFFFFFFF);
2654                 if (mask)
2655                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2656                 mask = (qmask >> 32);
2657                 if (mask)
2658                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2659                 break;
2660         default:
2661                 break;
2662         }
2663         /* skip the flush */
2664 }
2665
2666 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2667                                             u64 qmask)
2668 {
2669         u32 mask;
2670         struct ixgbe_hw *hw = &adapter->hw;
2671
2672         switch (hw->mac.type) {
2673         case ixgbe_mac_82598EB:
2674                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2675                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2676                 break;
2677         case ixgbe_mac_82599EB:
2678         case ixgbe_mac_X540:
2679         case ixgbe_mac_X550:
2680         case ixgbe_mac_X550EM_x:
2681         case ixgbe_mac_x550em_a:
2682                 mask = (qmask & 0xFFFFFFFF);
2683                 if (mask)
2684                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2685                 mask = (qmask >> 32);
2686                 if (mask)
2687                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2688                 break;
2689         default:
2690                 break;
2691         }
2692         /* skip the flush */
2693 }
2694
2695 /**
2696  * ixgbe_irq_enable - Enable default interrupt generation settings
2697  * @adapter: board private structure
2698  **/
2699 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2700                                     bool flush)
2701 {
2702         struct ixgbe_hw *hw = &adapter->hw;
2703         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2704
2705         /* don't reenable LSC while waiting for link */
2706         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2707                 mask &= ~IXGBE_EIMS_LSC;
2708
2709         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2710                 switch (adapter->hw.mac.type) {
2711                 case ixgbe_mac_82599EB:
2712                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2713                         break;
2714                 case ixgbe_mac_X540:
2715                 case ixgbe_mac_X550:
2716                 case ixgbe_mac_X550EM_x:
2717                 case ixgbe_mac_x550em_a:
2718                         mask |= IXGBE_EIMS_TS;
2719                         break;
2720                 default:
2721                         break;
2722                 }
2723         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2724                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2725         switch (adapter->hw.mac.type) {
2726         case ixgbe_mac_82599EB:
2727                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2728                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2729                 /* fall through */
2730         case ixgbe_mac_X540:
2731         case ixgbe_mac_X550:
2732         case ixgbe_mac_X550EM_x:
2733         case ixgbe_mac_x550em_a:
2734                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2735                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2736                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2737                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2738                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2739                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2740                 mask |= IXGBE_EIMS_ECC;
2741                 mask |= IXGBE_EIMS_MAILBOX;
2742                 break;
2743         default:
2744                 break;
2745         }
2746
2747         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2748             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2749                 mask |= IXGBE_EIMS_FLOW_DIR;
2750
2751         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2752         if (queues)
2753                 ixgbe_irq_enable_queues(adapter, ~0);
2754         if (flush)
2755                 IXGBE_WRITE_FLUSH(&adapter->hw);
2756 }
2757
2758 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2759 {
2760         struct ixgbe_adapter *adapter = data;
2761         struct ixgbe_hw *hw = &adapter->hw;
2762         u32 eicr;
2763
2764         /*
2765          * Workaround for Silicon errata.  Use clear-by-write instead
2766          * of clear-by-read.  Reading with EICS will return the
2767          * interrupt causes without clearing, which later be done
2768          * with the write to EICR.
2769          */
2770         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2771
2772         /* The lower 16bits of the EICR register are for the queue interrupts
2773          * which should be masked here in order to not accidentally clear them if
2774          * the bits are high when ixgbe_msix_other is called. There is a race
2775          * condition otherwise which results in possible performance loss
2776          * especially if the ixgbe_msix_other interrupt is triggering
2777          * consistently (as it would when PPS is turned on for the X540 device)
2778          */
2779         eicr &= 0xFFFF0000;
2780
2781         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2782
2783         if (eicr & IXGBE_EICR_LSC)
2784                 ixgbe_check_lsc(adapter);
2785
2786         if (eicr & IXGBE_EICR_MAILBOX)
2787                 ixgbe_msg_task(adapter);
2788
2789         switch (hw->mac.type) {
2790         case ixgbe_mac_82599EB:
2791         case ixgbe_mac_X540:
2792         case ixgbe_mac_X550:
2793         case ixgbe_mac_X550EM_x:
2794         case ixgbe_mac_x550em_a:
2795                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2796                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2797                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2798                         ixgbe_service_event_schedule(adapter);
2799                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2800                                         IXGBE_EICR_GPI_SDP0_X540);
2801                 }
2802                 if (eicr & IXGBE_EICR_ECC) {
2803                         e_info(link, "Received ECC Err, initiating reset\n");
2804                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2805                         ixgbe_service_event_schedule(adapter);
2806                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2807                 }
2808                 /* Handle Flow Director Full threshold interrupt */
2809                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2810                         int reinit_count = 0;
2811                         int i;
2812                         for (i = 0; i < adapter->num_tx_queues; i++) {
2813                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2814                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2815                                                        &ring->state))
2816                                         reinit_count++;
2817                         }
2818                         if (reinit_count) {
2819                                 /* no more flow director interrupts until after init */
2820                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2821                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2822                                 ixgbe_service_event_schedule(adapter);
2823                         }
2824                 }
2825                 ixgbe_check_sfp_event(adapter, eicr);
2826                 ixgbe_check_overtemp_event(adapter, eicr);
2827                 break;
2828         default:
2829                 break;
2830         }
2831
2832         ixgbe_check_fan_failure(adapter, eicr);
2833
2834         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2835                 ixgbe_ptp_check_pps_event(adapter);
2836
2837         /* re-enable the original interrupt state, no lsc, no queues */
2838         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2839                 ixgbe_irq_enable(adapter, false, false);
2840
2841         return IRQ_HANDLED;
2842 }
2843
2844 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2845 {
2846         struct ixgbe_q_vector *q_vector = data;
2847
2848         /* EIAM disabled interrupts (on this vector) for us */
2849
2850         if (q_vector->rx.ring || q_vector->tx.ring)
2851                 napi_schedule_irqoff(&q_vector->napi);
2852
2853         return IRQ_HANDLED;
2854 }
2855
2856 /**
2857  * ixgbe_poll - NAPI Rx polling callback
2858  * @napi: structure for representing this polling device
2859  * @budget: how many packets driver is allowed to clean
2860  *
2861  * This function is used for legacy and MSI, NAPI mode
2862  **/
2863 int ixgbe_poll(struct napi_struct *napi, int budget)
2864 {
2865         struct ixgbe_q_vector *q_vector =
2866                                 container_of(napi, struct ixgbe_q_vector, napi);
2867         struct ixgbe_adapter *adapter = q_vector->adapter;
2868         struct ixgbe_ring *ring;
2869         int per_ring_budget, work_done = 0;
2870         bool clean_complete = true;
2871
2872 #ifdef CONFIG_IXGBE_DCA
2873         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2874                 ixgbe_update_dca(q_vector);
2875 #endif
2876
2877         ixgbe_for_each_ring(ring, q_vector->tx) {
2878                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2879                         clean_complete = false;
2880         }
2881
2882         /* Exit if we are called by netpoll or busy polling is active */
2883         if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2884                 return budget;
2885
2886         /* attempt to distribute budget to each queue fairly, but don't allow
2887          * the budget to go below 1 because we'll exit polling */
2888         if (q_vector->rx.count > 1)
2889                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2890         else
2891                 per_ring_budget = budget;
2892
2893         ixgbe_for_each_ring(ring, q_vector->rx) {
2894                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2895                                                  per_ring_budget);
2896
2897                 work_done += cleaned;
2898                 if (cleaned >= per_ring_budget)
2899                         clean_complete = false;
2900         }
2901
2902         ixgbe_qv_unlock_napi(q_vector);
2903         /* If all work not completed, return budget and keep polling */
2904         if (!clean_complete)
2905                 return budget;
2906
2907         /* all work done, exit the polling mode */
2908         napi_complete_done(napi, work_done);
2909         if (adapter->rx_itr_setting & 1)
2910                 ixgbe_set_itr(q_vector);
2911         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2912                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2913
2914         return min(work_done, budget - 1);
2915 }
2916
2917 /**
2918  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2919  * @adapter: board private structure
2920  *
2921  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2922  * interrupts from the kernel.
2923  **/
2924 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2925 {
2926         struct net_device *netdev = adapter->netdev;
2927         int vector, err;
2928         int ri = 0, ti = 0;
2929
2930         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2931                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2932                 struct msix_entry *entry = &adapter->msix_entries[vector];
2933
2934                 if (q_vector->tx.ring && q_vector->rx.ring) {
2935                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2936                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2937                         ti++;
2938                 } else if (q_vector->rx.ring) {
2939                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2940                                  "%s-%s-%d", netdev->name, "rx", ri++);
2941                 } else if (q_vector->tx.ring) {
2942                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2943                                  "%s-%s-%d", netdev->name, "tx", ti++);
2944                 } else {
2945                         /* skip this unused q_vector */
2946                         continue;
2947                 }
2948                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2949                                   q_vector->name, q_vector);
2950                 if (err) {
2951                         e_err(probe, "request_irq failed for MSIX interrupt "
2952                               "Error: %d\n", err);
2953                         goto free_queue_irqs;
2954                 }
2955                 /* If Flow Director is enabled, set interrupt affinity */
2956                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2957                         /* assign the mask for this irq */
2958                         irq_set_affinity_hint(entry->vector,
2959                                               &q_vector->affinity_mask);
2960                 }
2961         }
2962
2963         err = request_irq(adapter->msix_entries[vector].vector,
2964                           ixgbe_msix_other, 0, netdev->name, adapter);
2965         if (err) {
2966                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2967                 goto free_queue_irqs;
2968         }
2969
2970         return 0;
2971
2972 free_queue_irqs:
2973         while (vector) {
2974                 vector--;
2975                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2976                                       NULL);
2977                 free_irq(adapter->msix_entries[vector].vector,
2978                          adapter->q_vector[vector]);
2979         }
2980         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2981         pci_disable_msix(adapter->pdev);
2982         kfree(adapter->msix_entries);
2983         adapter->msix_entries = NULL;
2984         return err;
2985 }
2986
2987 /**
2988  * ixgbe_intr - legacy mode Interrupt Handler
2989  * @irq: interrupt number
2990  * @data: pointer to a network interface device structure
2991  **/
2992 static irqreturn_t ixgbe_intr(int irq, void *data)
2993 {
2994         struct ixgbe_adapter *adapter = data;
2995         struct ixgbe_hw *hw = &adapter->hw;
2996         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2997         u32 eicr;
2998
2999         /*
3000          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3001          * before the read of EICR.
3002          */
3003         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3004
3005         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3006          * therefore no explicit interrupt disable is necessary */
3007         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3008         if (!eicr) {
3009                 /*
3010                  * shared interrupt alert!
3011                  * make sure interrupts are enabled because the read will
3012                  * have disabled interrupts due to EIAM
3013                  * finish the workaround of silicon errata on 82598.  Unmask
3014                  * the interrupt that we masked before the EICR read.
3015                  */
3016                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3017                         ixgbe_irq_enable(adapter, true, true);
3018                 return IRQ_NONE;        /* Not our interrupt */
3019         }
3020
3021         if (eicr & IXGBE_EICR_LSC)
3022                 ixgbe_check_lsc(adapter);
3023
3024         switch (hw->mac.type) {
3025         case ixgbe_mac_82599EB:
3026                 ixgbe_check_sfp_event(adapter, eicr);
3027                 /* Fall through */
3028         case ixgbe_mac_X540:
3029         case ixgbe_mac_X550:
3030         case ixgbe_mac_X550EM_x:
3031         case ixgbe_mac_x550em_a:
3032                 if (eicr & IXGBE_EICR_ECC) {
3033                         e_info(link, "Received ECC Err, initiating reset\n");
3034                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3035                         ixgbe_service_event_schedule(adapter);
3036                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3037                 }
3038                 ixgbe_check_overtemp_event(adapter, eicr);
3039                 break;
3040         default:
3041                 break;
3042         }
3043
3044         ixgbe_check_fan_failure(adapter, eicr);
3045         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3046                 ixgbe_ptp_check_pps_event(adapter);
3047
3048         /* would disable interrupts here but EIAM disabled it */
3049         napi_schedule_irqoff(&q_vector->napi);
3050
3051         /*
3052          * re-enable link(maybe) and non-queue interrupts, no flush.
3053          * ixgbe_poll will re-enable the queue interrupts
3054          */
3055         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3056                 ixgbe_irq_enable(adapter, false, false);
3057
3058         return IRQ_HANDLED;
3059 }
3060
3061 /**
3062  * ixgbe_request_irq - initialize interrupts
3063  * @adapter: board private structure
3064  *
3065  * Attempts to configure interrupts using the best available
3066  * capabilities of the hardware and kernel.
3067  **/
3068 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3069 {
3070         struct net_device *netdev = adapter->netdev;
3071         int err;
3072
3073         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3074                 err = ixgbe_request_msix_irqs(adapter);
3075         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3076                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3077                                   netdev->name, adapter);
3078         else
3079                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3080                                   netdev->name, adapter);
3081
3082         if (err)
3083                 e_err(probe, "request_irq failed, Error %d\n", err);
3084
3085         return err;
3086 }
3087
3088 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3089 {
3090         int vector;
3091
3092         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3093                 free_irq(adapter->pdev->irq, adapter);
3094                 return;
3095         }
3096
3097         if (!adapter->msix_entries)
3098                 return;
3099
3100         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3101                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3102                 struct msix_entry *entry = &adapter->msix_entries[vector];
3103
3104                 /* free only the irqs that were actually requested */
3105                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3106                         continue;
3107
3108                 /* clear the affinity_mask in the IRQ descriptor */
3109                 irq_set_affinity_hint(entry->vector, NULL);
3110
3111                 free_irq(entry->vector, q_vector);
3112         }
3113
3114         free_irq(adapter->msix_entries[vector].vector, adapter);
3115 }
3116
3117 /**
3118  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3119  * @adapter: board private structure
3120  **/
3121 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3122 {
3123         switch (adapter->hw.mac.type) {
3124         case ixgbe_mac_82598EB:
3125                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3126                 break;
3127         case ixgbe_mac_82599EB:
3128         case ixgbe_mac_X540:
3129         case ixgbe_mac_X550:
3130         case ixgbe_mac_X550EM_x:
3131         case ixgbe_mac_x550em_a:
3132                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3133                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3134                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3135                 break;
3136         default:
3137                 break;
3138         }
3139         IXGBE_WRITE_FLUSH(&adapter->hw);
3140         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3141                 int vector;
3142
3143                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3144                         synchronize_irq(adapter->msix_entries[vector].vector);
3145
3146                 synchronize_irq(adapter->msix_entries[vector++].vector);
3147         } else {
3148                 synchronize_irq(adapter->pdev->irq);
3149         }
3150 }
3151
3152 /**
3153  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3154  *
3155  **/
3156 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3157 {
3158         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3159
3160         ixgbe_write_eitr(q_vector);
3161
3162         ixgbe_set_ivar(adapter, 0, 0, 0);
3163         ixgbe_set_ivar(adapter, 1, 0, 0);
3164
3165         e_info(hw, "Legacy interrupt IVAR setup done\n");
3166 }
3167
3168 /**
3169  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3170  * @adapter: board private structure
3171  * @ring: structure containing ring specific data
3172  *
3173  * Configure the Tx descriptor ring after a reset.
3174  **/
3175 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3176                              struct ixgbe_ring *ring)
3177 {
3178         struct ixgbe_hw *hw = &adapter->hw;
3179         u64 tdba = ring->dma;
3180         int wait_loop = 10;
3181         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3182         u8 reg_idx = ring->reg_idx;
3183
3184         /* disable queue to avoid issues while updating state */
3185         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3186         IXGBE_WRITE_FLUSH(hw);
3187
3188         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3189                         (tdba & DMA_BIT_MASK(32)));
3190         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3191         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3192                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3193         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3194         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3195         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3196
3197         /*
3198          * set WTHRESH to encourage burst writeback, it should not be set
3199          * higher than 1 when:
3200          * - ITR is 0 as it could cause false TX hangs
3201          * - ITR is set to > 100k int/sec and BQL is enabled
3202          *
3203          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3204          * to or less than the number of on chip descriptors, which is
3205          * currently 40.
3206          */
3207         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3208                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3209         else
3210                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3211
3212         /*
3213          * Setting PTHRESH to 32 both improves performance
3214          * and avoids a TX hang with DFP enabled
3215          */
3216         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3217                    32;          /* PTHRESH = 32 */
3218
3219         /* reinitialize flowdirector state */
3220         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3221                 ring->atr_sample_rate = adapter->atr_sample_rate;
3222                 ring->atr_count = 0;
3223                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3224         } else {
3225                 ring->atr_sample_rate = 0;
3226         }
3227
3228         /* initialize XPS */
3229         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3230                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3231
3232                 if (q_vector)
3233                         netif_set_xps_queue(ring->netdev,
3234                                             &q_vector->affinity_mask,
3235                                             ring->queue_index);
3236         }
3237
3238         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3239
3240         /* enable queue */
3241         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3242
3243         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3244         if (hw->mac.type == ixgbe_mac_82598EB &&
3245             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3246                 return;
3247
3248         /* poll to verify queue is enabled */
3249         do {
3250                 usleep_range(1000, 2000);
3251                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3252         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3253         if (!wait_loop)
3254                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3255 }
3256
3257 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3258 {
3259         struct ixgbe_hw *hw = &adapter->hw;
3260         u32 rttdcs, mtqc;
3261         u8 tcs = netdev_get_num_tc(adapter->netdev);
3262
3263         if (hw->mac.type == ixgbe_mac_82598EB)
3264                 return;
3265
3266         /* disable the arbiter while setting MTQC */
3267         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3268         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3269         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3270
3271         /* set transmit pool layout */
3272         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3273                 mtqc = IXGBE_MTQC_VT_ENA;
3274                 if (tcs > 4)
3275                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3276                 else if (tcs > 1)
3277                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3278                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3279                          IXGBE_82599_VMDQ_4Q_MASK)
3280                         mtqc |= IXGBE_MTQC_32VF;
3281                 else
3282                         mtqc |= IXGBE_MTQC_64VF;
3283         } else {
3284                 if (tcs > 4)
3285                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3286                 else if (tcs > 1)
3287                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3288                 else
3289                         mtqc = IXGBE_MTQC_64Q_1PB;
3290         }
3291
3292         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3293
3294         /* Enable Security TX Buffer IFG for multiple pb */
3295         if (tcs) {
3296                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3297                 sectx |= IXGBE_SECTX_DCB;
3298                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3299         }
3300
3301         /* re-enable the arbiter */
3302         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3303         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3304 }
3305
3306 /**
3307  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3308  * @adapter: board private structure
3309  *
3310  * Configure the Tx unit of the MAC after a reset.
3311  **/
3312 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3313 {
3314         struct ixgbe_hw *hw = &adapter->hw;
3315         u32 dmatxctl;
3316         u32 i;
3317
3318         ixgbe_setup_mtqc(adapter);
3319
3320         if (hw->mac.type != ixgbe_mac_82598EB) {
3321                 /* DMATXCTL.EN must be before Tx queues are enabled */
3322                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3323                 dmatxctl |= IXGBE_DMATXCTL_TE;
3324                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3325         }
3326
3327         /* Setup the HW Tx Head and Tail descriptor pointers */
3328         for (i = 0; i < adapter->num_tx_queues; i++)
3329                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3330 }
3331
3332 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3333                                  struct ixgbe_ring *ring)
3334 {
3335         struct ixgbe_hw *hw = &adapter->hw;
3336         u8 reg_idx = ring->reg_idx;
3337         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3338
3339         srrctl |= IXGBE_SRRCTL_DROP_EN;
3340
3341         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3342 }
3343
3344 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3345                                   struct ixgbe_ring *ring)
3346 {
3347         struct ixgbe_hw *hw = &adapter->hw;
3348         u8 reg_idx = ring->reg_idx;
3349         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3350
3351         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3352
3353         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3354 }
3355
3356 #ifdef CONFIG_IXGBE_DCB
3357 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3358 #else
3359 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3360 #endif
3361 {
3362         int i;
3363         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3364
3365         if (adapter->ixgbe_ieee_pfc)
3366                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3367
3368         /*
3369          * We should set the drop enable bit if:
3370          *  SR-IOV is enabled
3371          *   or
3372          *  Number of Rx queues > 1 and flow control is disabled
3373          *
3374          *  This allows us to avoid head of line blocking for security
3375          *  and performance reasons.
3376          */
3377         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3378             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3379                 for (i = 0; i < adapter->num_rx_queues; i++)
3380                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3381         } else {
3382                 for (i = 0; i < adapter->num_rx_queues; i++)
3383                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3384         }
3385 }
3386
3387 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3388
3389 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3390                                    struct ixgbe_ring *rx_ring)
3391 {
3392         struct ixgbe_hw *hw = &adapter->hw;
3393         u32 srrctl;
3394         u8 reg_idx = rx_ring->reg_idx;
3395
3396         if (hw->mac.type == ixgbe_mac_82598EB) {
3397                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3398
3399                 /*
3400                  * if VMDq is not active we must program one srrctl register
3401                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3402                  */
3403                 reg_idx &= mask;
3404         }
3405
3406         /* configure header buffer length, needed for RSC */
3407         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3408
3409         /* configure the packet buffer length */
3410         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3411
3412         /* configure descriptor type */
3413         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3414
3415         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3416 }
3417
3418 /**
3419  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3420  * @adapter: device handle
3421  *
3422  *  - 82598/82599/X540:     128
3423  *  - X550(non-SRIOV mode): 512
3424  *  - X550(SRIOV mode):     64
3425  */
3426 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3427 {
3428         if (adapter->hw.mac.type < ixgbe_mac_X550)
3429                 return 128;
3430         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3431                 return 64;
3432         else
3433                 return 512;
3434 }
3435
3436 /**
3437  * ixgbe_store_reta - Write the RETA table to HW
3438  * @adapter: device handle
3439  *
3440  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3441  */
3442 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3443 {
3444         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3445         struct ixgbe_hw *hw = &adapter->hw;
3446         u32 reta = 0;
3447         u32 indices_multi;
3448         u8 *indir_tbl = adapter->rss_indir_tbl;
3449
3450         /* Fill out the redirection table as follows:
3451          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3452          *    indices.
3453          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3454          *  - X550:       8 bit wide entries containing 6 bit RSS index
3455          */
3456         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3457                 indices_multi = 0x11;
3458         else
3459                 indices_multi = 0x1;
3460
3461         /* Write redirection table to HW */
3462         for (i = 0; i < reta_entries; i++) {
3463                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3464                 if ((i & 3) == 3) {
3465                         if (i < 128)
3466                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3467                         else
3468                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3469                                                 reta);
3470                         reta = 0;
3471                 }
3472         }
3473 }
3474
3475 /**
3476  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3477  * @adapter: device handle
3478  *
3479  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3480  */
3481 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3482 {
3483         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3484         struct ixgbe_hw *hw = &adapter->hw;
3485         u32 vfreta = 0;
3486         unsigned int pf_pool = adapter->num_vfs;
3487
3488         /* Write redirection table to HW */
3489         for (i = 0; i < reta_entries; i++) {
3490                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3491                 if ((i & 3) == 3) {
3492                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3493                                         vfreta);
3494                         vfreta = 0;
3495                 }
3496         }
3497 }
3498
3499 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3500 {
3501         struct ixgbe_hw *hw = &adapter->hw;
3502         u32 i, j;
3503         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3504         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3505
3506         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3507          * make full use of any rings they may have.  We will use the
3508          * PSRTYPE register to control how many rings we use within the PF.
3509          */
3510         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3511                 rss_i = 4;
3512
3513         /* Fill out hash function seeds */
3514         for (i = 0; i < 10; i++)
3515                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3516
3517         /* Fill out redirection table */
3518         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3519
3520         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3521                 if (j == rss_i)
3522                         j = 0;
3523
3524                 adapter->rss_indir_tbl[i] = j;
3525         }
3526
3527         ixgbe_store_reta(adapter);
3528 }
3529
3530 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3531 {
3532         struct ixgbe_hw *hw = &adapter->hw;
3533         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3534         unsigned int pf_pool = adapter->num_vfs;
3535         int i, j;
3536
3537         /* Fill out hash function seeds */
3538         for (i = 0; i < 10; i++)
3539                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3540                                 adapter->rss_key[i]);
3541
3542         /* Fill out the redirection table */
3543         for (i = 0, j = 0; i < 64; i++, j++) {
3544                 if (j == rss_i)
3545                         j = 0;
3546
3547                 adapter->rss_indir_tbl[i] = j;
3548         }
3549
3550         ixgbe_store_vfreta(adapter);
3551 }
3552
3553 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3554 {
3555         struct ixgbe_hw *hw = &adapter->hw;
3556         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3557         u32 rxcsum;
3558
3559         /* Disable indicating checksum in descriptor, enables RSS hash */
3560         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3561         rxcsum |= IXGBE_RXCSUM_PCSD;
3562         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3563
3564         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3565                 if (adapter->ring_feature[RING_F_RSS].mask)
3566                         mrqc = IXGBE_MRQC_RSSEN;
3567         } else {
3568                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3569
3570                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3571                         if (tcs > 4)
3572                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3573                         else if (tcs > 1)
3574                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3575                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3576                                  IXGBE_82599_VMDQ_4Q_MASK)
3577                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3578                         else
3579                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3580                 } else {
3581                         if (tcs > 4)
3582                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3583                         else if (tcs > 1)
3584                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3585                         else
3586                                 mrqc = IXGBE_MRQC_RSSEN;
3587                 }
3588         }
3589
3590         /* Perform hash on these packet types */
3591         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3592                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3593                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3594                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3595
3596         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3597                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3598         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3599                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3600
3601         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3602         if ((hw->mac.type >= ixgbe_mac_X550) &&
3603             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3604                 unsigned int pf_pool = adapter->num_vfs;
3605
3606                 /* Enable VF RSS mode */
3607                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3608                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3609
3610                 /* Setup RSS through the VF registers */
3611                 ixgbe_setup_vfreta(adapter);
3612                 vfmrqc = IXGBE_MRQC_RSSEN;
3613                 vfmrqc |= rss_field;
3614                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3615         } else {
3616                 ixgbe_setup_reta(adapter);
3617                 mrqc |= rss_field;
3618                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3619         }
3620 }
3621
3622 /**
3623  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3624  * @adapter:    address of board private structure
3625  * @index:      index of ring to set
3626  **/
3627 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3628                                    struct ixgbe_ring *ring)
3629 {
3630         struct ixgbe_hw *hw = &adapter->hw;
3631         u32 rscctrl;
3632         u8 reg_idx = ring->reg_idx;
3633
3634         if (!ring_is_rsc_enabled(ring))
3635                 return;
3636
3637         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3638         rscctrl |= IXGBE_RSCCTL_RSCEN;
3639         /*
3640          * we must limit the number of descriptors so that the
3641          * total size of max desc * buf_len is not greater
3642          * than 65536
3643          */
3644         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3645         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3646 }
3647
3648 #define IXGBE_MAX_RX_DESC_POLL 10
3649 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3650                                        struct ixgbe_ring *ring)
3651 {
3652         struct ixgbe_hw *hw = &adapter->hw;
3653         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3654         u32 rxdctl;
3655         u8 reg_idx = ring->reg_idx;
3656
3657         if (ixgbe_removed(hw->hw_addr))
3658                 return;
3659         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3660         if (hw->mac.type == ixgbe_mac_82598EB &&
3661             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3662                 return;
3663
3664         do {
3665                 usleep_range(1000, 2000);
3666                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3667         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3668
3669         if (!wait_loop) {
3670                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3671                       "the polling period\n", reg_idx);
3672         }
3673 }
3674
3675 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3676                             struct ixgbe_ring *ring)
3677 {
3678         struct ixgbe_hw *hw = &adapter->hw;
3679         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3680         u32 rxdctl;
3681         u8 reg_idx = ring->reg_idx;
3682
3683         if (ixgbe_removed(hw->hw_addr))
3684                 return;
3685         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3686         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3687
3688         /* write value back with RXDCTL.ENABLE bit cleared */
3689         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3690
3691         if (hw->mac.type == ixgbe_mac_82598EB &&
3692             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3693                 return;
3694
3695         /* the hardware may take up to 100us to really disable the rx queue */
3696         do {
3697                 udelay(10);
3698                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3699         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3700
3701         if (!wait_loop) {
3702                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3703                       "the polling period\n", reg_idx);
3704         }
3705 }
3706
3707 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3708                              struct ixgbe_ring *ring)
3709 {
3710         struct ixgbe_hw *hw = &adapter->hw;
3711         u64 rdba = ring->dma;
3712         u32 rxdctl;
3713         u8 reg_idx = ring->reg_idx;
3714
3715         /* disable queue to avoid issues while updating state */
3716         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3717         ixgbe_disable_rx_queue(adapter, ring);
3718
3719         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3720         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3721         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3722                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3723         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3724         IXGBE_WRITE_FLUSH(hw);
3725
3726         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3727         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3728         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3729
3730         ixgbe_configure_srrctl(adapter, ring);
3731         ixgbe_configure_rscctl(adapter, ring);
3732
3733         if (hw->mac.type == ixgbe_mac_82598EB) {
3734                 /*
3735                  * enable cache line friendly hardware writes:
3736                  * PTHRESH=32 descriptors (half the internal cache),
3737                  * this also removes ugly rx_no_buffer_count increment
3738                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3739                  * WTHRESH=8 burst writeback up to two cache lines
3740                  */
3741                 rxdctl &= ~0x3FFFFF;
3742                 rxdctl |=  0x080420;
3743         }
3744
3745         /* enable receive descriptor ring */
3746         rxdctl |= IXGBE_RXDCTL_ENABLE;
3747         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3748
3749         ixgbe_rx_desc_queue_enable(adapter, ring);
3750         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3751 }
3752
3753 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3754 {
3755         struct ixgbe_hw *hw = &adapter->hw;
3756         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3757         u16 pool;
3758
3759         /* PSRTYPE must be initialized in non 82598 adapters */
3760         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3761                       IXGBE_PSRTYPE_UDPHDR |
3762                       IXGBE_PSRTYPE_IPV4HDR |
3763                       IXGBE_PSRTYPE_L2HDR |
3764                       IXGBE_PSRTYPE_IPV6HDR;
3765
3766         if (hw->mac.type == ixgbe_mac_82598EB)
3767                 return;
3768
3769         if (rss_i > 3)
3770                 psrtype |= 2u << 29;
3771         else if (rss_i > 1)
3772                 psrtype |= 1u << 29;
3773
3774         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3775                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3776 }
3777
3778 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3779 {
3780         struct ixgbe_hw *hw = &adapter->hw;
3781         u32 reg_offset, vf_shift;
3782         u32 gcr_ext, vmdctl;
3783         int i;
3784
3785         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3786                 return;
3787
3788         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3789         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3790         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3791         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3792         vmdctl |= IXGBE_VT_CTL_REPLEN;
3793         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3794
3795         vf_shift = VMDQ_P(0) % 32;
3796         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3797
3798         /* Enable only the PF's pool for Tx/Rx */
3799         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3800         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3801         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3802         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3803         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3804                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3805
3806         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3807         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3808
3809         /* clear VLAN promisc flag so VFTA will be updated if necessary */
3810         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3811
3812         /*
3813          * Set up VF register offsets for selected VT Mode,
3814          * i.e. 32 or 64 VFs for SR-IOV
3815          */
3816         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3817         case IXGBE_82599_VMDQ_8Q_MASK:
3818                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3819                 break;
3820         case IXGBE_82599_VMDQ_4Q_MASK:
3821                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3822                 break;
3823         default:
3824                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3825                 break;
3826         }
3827
3828         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3829
3830         for (i = 0; i < adapter->num_vfs; i++) {
3831                 /* configure spoof checking */
3832                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3833                                           adapter->vfinfo[i].spoofchk_enabled);
3834
3835                 /* Enable/Disable RSS query feature  */
3836                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3837                                           adapter->vfinfo[i].rss_query_enabled);
3838         }
3839 }
3840
3841 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3842 {
3843         struct ixgbe_hw *hw = &adapter->hw;
3844         struct net_device *netdev = adapter->netdev;
3845         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3846         struct ixgbe_ring *rx_ring;
3847         int i;
3848         u32 mhadd, hlreg0;
3849
3850 #ifdef IXGBE_FCOE
3851         /* adjust max frame to be able to do baby jumbo for FCoE */
3852         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3853             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3854                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3855
3856 #endif /* IXGBE_FCOE */
3857
3858         /* adjust max frame to be at least the size of a standard frame */
3859         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3860                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3861
3862         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3863         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3864                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3865                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3866
3867                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3868         }
3869
3870         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3871         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3872         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3873         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3874
3875         /*
3876          * Setup the HW Rx Head and Tail Descriptor Pointers and
3877          * the Base and Length of the Rx Descriptor Ring
3878          */
3879         for (i = 0; i < adapter->num_rx_queues; i++) {
3880                 rx_ring = adapter->rx_ring[i];
3881                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3882                         set_ring_rsc_enabled(rx_ring);
3883                 else
3884                         clear_ring_rsc_enabled(rx_ring);
3885         }
3886 }
3887
3888 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3889 {
3890         struct ixgbe_hw *hw = &adapter->hw;
3891         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3892
3893         switch (hw->mac.type) {
3894         case ixgbe_mac_82598EB:
3895                 /*
3896                  * For VMDq support of different descriptor types or
3897                  * buffer sizes through the use of multiple SRRCTL
3898                  * registers, RDRXCTL.MVMEN must be set to 1
3899                  *
3900                  * also, the manual doesn't mention it clearly but DCA hints
3901                  * will only use queue 0's tags unless this bit is set.  Side
3902                  * effects of setting this bit are only that SRRCTL must be
3903                  * fully programmed [0..15]
3904                  */
3905                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3906                 break;
3907         case ixgbe_mac_X550:
3908         case ixgbe_mac_X550EM_x:
3909         case ixgbe_mac_x550em_a:
3910                 if (adapter->num_vfs)
3911                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3912                 /* fall through for older HW */
3913         case ixgbe_mac_82599EB:
3914         case ixgbe_mac_X540:
3915                 /* Disable RSC for ACK packets */
3916                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3917                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3918                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3919                 /* hardware requires some bits to be set by default */
3920                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3921                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3922                 break;
3923         default:
3924                 /* We should do nothing since we don't know this hardware */
3925                 return;
3926         }
3927
3928         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3929 }
3930
3931 /**
3932  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3933  * @adapter: board private structure
3934  *
3935  * Configure the Rx unit of the MAC after a reset.
3936  **/
3937 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3938 {
3939         struct ixgbe_hw *hw = &adapter->hw;
3940         int i;
3941         u32 rxctrl, rfctl;
3942
3943         /* disable receives while setting up the descriptors */
3944         hw->mac.ops.disable_rx(hw);
3945
3946         ixgbe_setup_psrtype(adapter);
3947         ixgbe_setup_rdrxctl(adapter);
3948
3949         /* RSC Setup */
3950         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3951         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3952         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3953                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3954
3955         /* disable NFS filtering */
3956         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
3957         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3958
3959         /* Program registers for the distribution of queues */
3960         ixgbe_setup_mrqc(adapter);
3961
3962         /* set_rx_buffer_len must be called before ring initialization */
3963         ixgbe_set_rx_buffer_len(adapter);
3964
3965         /*
3966          * Setup the HW Rx Head and Tail Descriptor Pointers and
3967          * the Base and Length of the Rx Descriptor Ring
3968          */
3969         for (i = 0; i < adapter->num_rx_queues; i++)
3970                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3971
3972         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3973         /* disable drop enable for 82598 parts */
3974         if (hw->mac.type == ixgbe_mac_82598EB)
3975                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3976
3977         /* enable all receives */
3978         rxctrl |= IXGBE_RXCTRL_RXEN;
3979         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3980 }
3981
3982 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3983                                  __be16 proto, u16 vid)
3984 {
3985         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3986         struct ixgbe_hw *hw = &adapter->hw;
3987
3988         /* add VID to filter table */
3989         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3990                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3991
3992         set_bit(vid, adapter->active_vlans);
3993
3994         return 0;
3995 }
3996
3997 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3998 {
3999         u32 vlvf;
4000         int idx;
4001
4002         /* short cut the special case */
4003         if (vlan == 0)
4004                 return 0;
4005
4006         /* Search for the vlan id in the VLVF entries */
4007         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4008                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4009                 if ((vlvf & VLAN_VID_MASK) == vlan)
4010                         break;
4011         }
4012
4013         return idx;
4014 }
4015
4016 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4017 {
4018         struct ixgbe_hw *hw = &adapter->hw;
4019         u32 bits, word;
4020         int idx;
4021
4022         idx = ixgbe_find_vlvf_entry(hw, vid);
4023         if (!idx)
4024                 return;
4025
4026         /* See if any other pools are set for this VLAN filter
4027          * entry other than the PF.
4028          */
4029         word = idx * 2 + (VMDQ_P(0) / 32);
4030         bits = ~BIT(VMDQ_P(0) % 32);
4031         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4032
4033         /* Disable the filter so this falls into the default pool. */
4034         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4035                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4036                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4037                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4038         }
4039 }
4040
4041 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4042                                   __be16 proto, u16 vid)
4043 {
4044         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4045         struct ixgbe_hw *hw = &adapter->hw;
4046
4047         /* remove VID from filter table */
4048         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4049                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4050
4051         clear_bit(vid, adapter->active_vlans);
4052
4053         return 0;
4054 }
4055
4056 /**
4057  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4058  * @adapter: driver data
4059  */
4060 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4061 {
4062         struct ixgbe_hw *hw = &adapter->hw;
4063         u32 vlnctrl;
4064         int i, j;
4065
4066         switch (hw->mac.type) {
4067         case ixgbe_mac_82598EB:
4068                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4069                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4070                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4071                 break;
4072         case ixgbe_mac_82599EB:
4073         case ixgbe_mac_X540:
4074         case ixgbe_mac_X550:
4075         case ixgbe_mac_X550EM_x:
4076         case ixgbe_mac_x550em_a:
4077                 for (i = 0; i < adapter->num_rx_queues; i++) {
4078                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4079
4080                         if (ring->l2_accel_priv)
4081                                 continue;
4082                         j = ring->reg_idx;
4083                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4084                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4085                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4086                 }
4087                 break;
4088         default:
4089                 break;
4090         }
4091 }
4092
4093 /**
4094  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4095  * @adapter: driver data
4096  */
4097 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4098 {
4099         struct ixgbe_hw *hw = &adapter->hw;
4100         u32 vlnctrl;
4101         int i, j;
4102
4103         switch (hw->mac.type) {
4104         case ixgbe_mac_82598EB:
4105                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4106                 vlnctrl |= IXGBE_VLNCTRL_VME;
4107                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4108                 break;
4109         case ixgbe_mac_82599EB:
4110         case ixgbe_mac_X540:
4111         case ixgbe_mac_X550:
4112         case ixgbe_mac_X550EM_x:
4113         case ixgbe_mac_x550em_a:
4114                 for (i = 0; i < adapter->num_rx_queues; i++) {
4115                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4116
4117                         if (ring->l2_accel_priv)
4118                                 continue;
4119                         j = ring->reg_idx;
4120                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4121                         vlnctrl |= IXGBE_RXDCTL_VME;
4122                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4123                 }
4124                 break;
4125         default:
4126                 break;
4127         }
4128 }
4129
4130 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4131 {
4132         struct ixgbe_hw *hw = &adapter->hw;
4133         u32 vlnctrl, i;
4134
4135         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4136
4137         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4138         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4139                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4140                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4141         } else {
4142                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4143                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4144                 return;
4145         }
4146
4147         /* Nothing to do for 82598 */
4148         if (hw->mac.type == ixgbe_mac_82598EB)
4149                 return;
4150
4151         /* We are already in VLAN promisc, nothing to do */
4152         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4153                 return;
4154
4155         /* Set flag so we don't redo unnecessary work */
4156         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4157
4158         /* Add PF to all active pools */
4159         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4160                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4161                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4162
4163                 vlvfb |= BIT(VMDQ_P(0) % 32);
4164                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4165         }
4166
4167         /* Set all bits in the VLAN filter table array */
4168         for (i = hw->mac.vft_size; i--;)
4169                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4170 }
4171
4172 #define VFTA_BLOCK_SIZE 8
4173 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4174 {
4175         struct ixgbe_hw *hw = &adapter->hw;
4176         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4177         u32 vid_start = vfta_offset * 32;
4178         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4179         u32 i, vid, word, bits;
4180
4181         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4182                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4183
4184                 /* pull VLAN ID from VLVF */
4185                 vid = vlvf & VLAN_VID_MASK;
4186
4187                 /* only concern outselves with a certain range */
4188                 if (vid < vid_start || vid >= vid_end)
4189                         continue;
4190
4191                 if (vlvf) {
4192                         /* record VLAN ID in VFTA */
4193                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4194
4195                         /* if PF is part of this then continue */
4196                         if (test_bit(vid, adapter->active_vlans))
4197                                 continue;
4198                 }
4199
4200                 /* remove PF from the pool */
4201                 word = i * 2 + VMDQ_P(0) / 32;
4202                 bits = ~BIT(VMDQ_P(0) % 32);
4203                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4204                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4205         }
4206
4207         /* extract values from active_vlans and write back to VFTA */
4208         for (i = VFTA_BLOCK_SIZE; i--;) {
4209                 vid = (vfta_offset + i) * 32;
4210                 word = vid / BITS_PER_LONG;
4211                 bits = vid % BITS_PER_LONG;
4212
4213                 vfta[i] |= adapter->active_vlans[word] >> bits;
4214
4215                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4216         }
4217 }
4218
4219 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4220 {
4221         struct ixgbe_hw *hw = &adapter->hw;
4222         u32 vlnctrl, i;
4223
4224         /* Set VLAN filtering to enabled */
4225         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4226         vlnctrl |= IXGBE_VLNCTRL_VFE;
4227         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4228
4229         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4230             hw->mac.type == ixgbe_mac_82598EB)
4231                 return;
4232
4233         /* We are not in VLAN promisc, nothing to do */
4234         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4235                 return;
4236
4237         /* Set flag so we don't redo unnecessary work */
4238         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4239
4240         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4241                 ixgbe_scrub_vfta(adapter, i);
4242 }
4243
4244 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4245 {
4246         u16 vid = 1;
4247
4248         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4249
4250         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4251                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4252 }
4253
4254 /**
4255  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4256  * @netdev: network interface device structure
4257  *
4258  * Writes multicast address list to the MTA hash table.
4259  * Returns: -ENOMEM on failure
4260  *                0 on no addresses written
4261  *                X on writing X addresses to MTA
4262  **/
4263 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4264 {
4265         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4266         struct ixgbe_hw *hw = &adapter->hw;
4267
4268         if (!netif_running(netdev))
4269                 return 0;
4270
4271         if (hw->mac.ops.update_mc_addr_list)
4272                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4273         else
4274                 return -ENOMEM;
4275
4276 #ifdef CONFIG_PCI_IOV
4277         ixgbe_restore_vf_multicasts(adapter);
4278 #endif
4279
4280         return netdev_mc_count(netdev);
4281 }
4282
4283 #ifdef CONFIG_PCI_IOV
4284 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4285 {
4286         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4287         struct ixgbe_hw *hw = &adapter->hw;
4288         int i;
4289
4290         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4291                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4292
4293                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4294                         hw->mac.ops.set_rar(hw, i,
4295                                             mac_table->addr,
4296                                             mac_table->pool,
4297                                             IXGBE_RAH_AV);
4298                 else
4299                         hw->mac.ops.clear_rar(hw, i);
4300         }
4301 }
4302
4303 #endif
4304 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4305 {
4306         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4307         struct ixgbe_hw *hw = &adapter->hw;
4308         int i;
4309
4310         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4311                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4312                         continue;
4313
4314                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4315
4316                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4317                         hw->mac.ops.set_rar(hw, i,
4318                                             mac_table->addr,
4319                                             mac_table->pool,
4320                                             IXGBE_RAH_AV);
4321                 else
4322                         hw->mac.ops.clear_rar(hw, i);
4323         }
4324 }
4325
4326 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4327 {
4328         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4329         struct ixgbe_hw *hw = &adapter->hw;
4330         int i;
4331
4332         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4333                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4334                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4335         }
4336
4337         ixgbe_sync_mac_table(adapter);
4338 }
4339
4340 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4341 {
4342         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4343         struct ixgbe_hw *hw = &adapter->hw;
4344         int i, count = 0;
4345
4346         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4347                 /* do not count default RAR as available */
4348                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4349                         continue;
4350
4351                 /* only count unused and addresses that belong to us */
4352                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4353                         if (mac_table->pool != pool)
4354                                 continue;
4355                 }
4356
4357                 count++;
4358         }
4359
4360         return count;
4361 }
4362
4363 /* this function destroys the first RAR entry */
4364 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4365 {
4366         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4367         struct ixgbe_hw *hw = &adapter->hw;
4368
4369         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4370         mac_table->pool = VMDQ_P(0);
4371
4372         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4373
4374         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4375                             IXGBE_RAH_AV);
4376 }
4377
4378 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4379                          const u8 *addr, u16 pool)
4380 {
4381         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4382         struct ixgbe_hw *hw = &adapter->hw;
4383         int i;
4384
4385         if (is_zero_ether_addr(addr))
4386                 return -EINVAL;
4387
4388         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4389                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4390                         continue;
4391
4392                 ether_addr_copy(mac_table->addr, addr);
4393                 mac_table->pool = pool;
4394
4395                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4396                                     IXGBE_MAC_STATE_IN_USE;
4397
4398                 ixgbe_sync_mac_table(adapter);
4399
4400                 return i;
4401         }
4402
4403         return -ENOMEM;
4404 }
4405
4406 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4407                          const u8 *addr, u16 pool)
4408 {
4409         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4410         struct ixgbe_hw *hw = &adapter->hw;
4411         int i;
4412
4413         if (is_zero_ether_addr(addr))
4414                 return -EINVAL;
4415
4416         /* search table for addr, if found clear IN_USE flag and sync */
4417         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4418                 /* we can only delete an entry if it is in use */
4419                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4420                         continue;
4421                 /* we only care about entries that belong to the given pool */
4422                 if (mac_table->pool != pool)
4423                         continue;
4424                 /* we only care about a specific MAC address */
4425                 if (!ether_addr_equal(addr, mac_table->addr))
4426                         continue;
4427
4428                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4429                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4430
4431                 ixgbe_sync_mac_table(adapter);
4432
4433                 return 0;
4434         }
4435
4436         return -ENOMEM;
4437 }
4438 /**
4439  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4440  * @netdev: network interface device structure
4441  *
4442  * Writes unicast address list to the RAR table.
4443  * Returns: -ENOMEM on failure/insufficient address space
4444  *                0 on no addresses written
4445  *                X on writing X addresses to the RAR table
4446  **/
4447 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4448 {
4449         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4450         int count = 0;
4451
4452         /* return ENOMEM indicating insufficient memory for addresses */
4453         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4454                 return -ENOMEM;
4455
4456         if (!netdev_uc_empty(netdev)) {
4457                 struct netdev_hw_addr *ha;
4458                 netdev_for_each_uc_addr(ha, netdev) {
4459                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4460                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4461                         count++;
4462                 }
4463         }
4464         return count;
4465 }
4466
4467 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4468 {
4469         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4470         int ret;
4471
4472         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4473
4474         return min_t(int, ret, 0);
4475 }
4476
4477 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4478 {
4479         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4480
4481         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4482
4483         return 0;
4484 }
4485
4486 /**
4487  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4488  * @netdev: network interface device structure
4489  *
4490  * The set_rx_method entry point is called whenever the unicast/multicast
4491  * address list or the network interface flags are updated.  This routine is
4492  * responsible for configuring the hardware for proper unicast, multicast and
4493  * promiscuous mode.
4494  **/
4495 void ixgbe_set_rx_mode(struct net_device *netdev)
4496 {
4497         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4498         struct ixgbe_hw *hw = &adapter->hw;
4499         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4500         netdev_features_t features = netdev->features;
4501         int count;
4502
4503         /* Check for Promiscuous and All Multicast modes */
4504         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4505
4506         /* set all bits that we expect to always be set */
4507         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4508         fctrl |= IXGBE_FCTRL_BAM;
4509         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4510         fctrl |= IXGBE_FCTRL_PMCF;
4511
4512         /* clear the bits we are changing the status of */
4513         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4514         if (netdev->flags & IFF_PROMISC) {
4515                 hw->addr_ctrl.user_set_promisc = true;
4516                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4517                 vmolr |= IXGBE_VMOLR_MPE;
4518                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4519         } else {
4520                 if (netdev->flags & IFF_ALLMULTI) {
4521                         fctrl |= IXGBE_FCTRL_MPE;
4522                         vmolr |= IXGBE_VMOLR_MPE;
4523                 }
4524                 hw->addr_ctrl.user_set_promisc = false;
4525         }
4526
4527         /*
4528          * Write addresses to available RAR registers, if there is not
4529          * sufficient space to store all the addresses then enable
4530          * unicast promiscuous mode
4531          */
4532         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4533                 fctrl |= IXGBE_FCTRL_UPE;
4534                 vmolr |= IXGBE_VMOLR_ROPE;
4535         }
4536
4537         /* Write addresses to the MTA, if the attempt fails
4538          * then we should just turn on promiscuous mode so
4539          * that we can at least receive multicast traffic
4540          */
4541         count = ixgbe_write_mc_addr_list(netdev);
4542         if (count < 0) {
4543                 fctrl |= IXGBE_FCTRL_MPE;
4544                 vmolr |= IXGBE_VMOLR_MPE;
4545         } else if (count) {
4546                 vmolr |= IXGBE_VMOLR_ROMPE;
4547         }
4548
4549         if (hw->mac.type != ixgbe_mac_82598EB) {
4550                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4551                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4552                            IXGBE_VMOLR_ROPE);
4553                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4554         }
4555
4556         /* This is useful for sniffing bad packets. */
4557         if (features & NETIF_F_RXALL) {
4558                 /* UPE and MPE will be handled by normal PROMISC logic
4559                  * in e1000e_set_rx_mode */
4560                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4561                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4562                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4563
4564                 fctrl &= ~(IXGBE_FCTRL_DPF);
4565                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4566         }
4567
4568         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4569
4570         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4571                 ixgbe_vlan_strip_enable(adapter);
4572         else
4573                 ixgbe_vlan_strip_disable(adapter);
4574
4575         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4576                 ixgbe_vlan_promisc_disable(adapter);
4577         else
4578                 ixgbe_vlan_promisc_enable(adapter);
4579 }
4580
4581 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4582 {
4583         int q_idx;
4584
4585         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4586                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4587                 napi_enable(&adapter->q_vector[q_idx]->napi);
4588         }
4589 }
4590
4591 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4592 {
4593         int q_idx;
4594
4595         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4596                 napi_disable(&adapter->q_vector[q_idx]->napi);
4597                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4598                         pr_info("QV %d locked\n", q_idx);
4599                         usleep_range(1000, 20000);
4600                 }
4601         }
4602 }
4603
4604 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4605 {
4606         struct ixgbe_hw *hw = &adapter->hw;
4607         u32 vxlanctrl;
4608
4609         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4610                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4611                 return;
4612
4613         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4614         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4615
4616         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4617                 adapter->vxlan_port = 0;
4618
4619         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4620                 adapter->geneve_port = 0;
4621 }
4622
4623 #ifdef CONFIG_IXGBE_DCB
4624 /**
4625  * ixgbe_configure_dcb - Configure DCB hardware
4626  * @adapter: ixgbe adapter struct
4627  *
4628  * This is called by the driver on open to configure the DCB hardware.
4629  * This is also called by the gennetlink interface when reconfiguring
4630  * the DCB state.
4631  */
4632 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4633 {
4634         struct ixgbe_hw *hw = &adapter->hw;
4635         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4636
4637         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4638                 if (hw->mac.type == ixgbe_mac_82598EB)
4639                         netif_set_gso_max_size(adapter->netdev, 65536);
4640                 return;
4641         }
4642
4643         if (hw->mac.type == ixgbe_mac_82598EB)
4644                 netif_set_gso_max_size(adapter->netdev, 32768);
4645
4646 #ifdef IXGBE_FCOE
4647         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4648                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4649 #endif
4650
4651         /* reconfigure the hardware */
4652         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4653                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4654                                                 DCB_TX_CONFIG);
4655                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4656                                                 DCB_RX_CONFIG);
4657                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4658         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4659                 ixgbe_dcb_hw_ets(&adapter->hw,
4660                                  adapter->ixgbe_ieee_ets,
4661                                  max_frame);
4662                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4663                                         adapter->ixgbe_ieee_pfc->pfc_en,
4664                                         adapter->ixgbe_ieee_ets->prio_tc);
4665         }
4666
4667         /* Enable RSS Hash per TC */
4668         if (hw->mac.type != ixgbe_mac_82598EB) {
4669                 u32 msb = 0;
4670                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4671
4672                 while (rss_i) {
4673                         msb++;
4674                         rss_i >>= 1;
4675                 }
4676
4677                 /* write msb to all 8 TCs in one write */
4678                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4679         }
4680 }
4681 #endif
4682
4683 /* Additional bittime to account for IXGBE framing */
4684 #define IXGBE_ETH_FRAMING 20
4685
4686 /**
4687  * ixgbe_hpbthresh - calculate high water mark for flow control
4688  *
4689  * @adapter: board private structure to calculate for
4690  * @pb: packet buffer to calculate
4691  */
4692 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4693 {
4694         struct ixgbe_hw *hw = &adapter->hw;
4695         struct net_device *dev = adapter->netdev;
4696         int link, tc, kb, marker;
4697         u32 dv_id, rx_pba;
4698
4699         /* Calculate max LAN frame size */
4700         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4701
4702 #ifdef IXGBE_FCOE
4703         /* FCoE traffic class uses FCOE jumbo frames */
4704         if ((dev->features & NETIF_F_FCOE_MTU) &&
4705             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4706             (pb == ixgbe_fcoe_get_tc(adapter)))
4707                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4708 #endif
4709
4710         /* Calculate delay value for device */
4711         switch (hw->mac.type) {
4712         case ixgbe_mac_X540:
4713         case ixgbe_mac_X550:
4714         case ixgbe_mac_X550EM_x:
4715         case ixgbe_mac_x550em_a:
4716                 dv_id = IXGBE_DV_X540(link, tc);
4717                 break;
4718         default:
4719                 dv_id = IXGBE_DV(link, tc);
4720                 break;
4721         }
4722
4723         /* Loopback switch introduces additional latency */
4724         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4725                 dv_id += IXGBE_B2BT(tc);
4726
4727         /* Delay value is calculated in bit times convert to KB */
4728         kb = IXGBE_BT2KB(dv_id);
4729         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4730
4731         marker = rx_pba - kb;
4732
4733         /* It is possible that the packet buffer is not large enough
4734          * to provide required headroom. In this case throw an error
4735          * to user and a do the best we can.
4736          */
4737         if (marker < 0) {
4738                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4739                             "headroom to support flow control."
4740                             "Decrease MTU or number of traffic classes\n", pb);
4741                 marker = tc + 1;
4742         }
4743
4744         return marker;
4745 }
4746
4747 /**
4748  * ixgbe_lpbthresh - calculate low water mark for for flow control
4749  *
4750  * @adapter: board private structure to calculate for
4751  * @pb: packet buffer to calculate
4752  */
4753 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4754 {
4755         struct ixgbe_hw *hw = &adapter->hw;
4756         struct net_device *dev = adapter->netdev;
4757         int tc;
4758         u32 dv_id;
4759
4760         /* Calculate max LAN frame size */
4761         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4762
4763 #ifdef IXGBE_FCOE
4764         /* FCoE traffic class uses FCOE jumbo frames */
4765         if ((dev->features & NETIF_F_FCOE_MTU) &&
4766             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4767             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4768                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4769 #endif
4770
4771         /* Calculate delay value for device */
4772         switch (hw->mac.type) {
4773         case ixgbe_mac_X540:
4774         case ixgbe_mac_X550:
4775         case ixgbe_mac_X550EM_x:
4776         case ixgbe_mac_x550em_a:
4777                 dv_id = IXGBE_LOW_DV_X540(tc);
4778                 break;
4779         default:
4780                 dv_id = IXGBE_LOW_DV(tc);
4781                 break;
4782         }
4783
4784         /* Delay value is calculated in bit times convert to KB */
4785         return IXGBE_BT2KB(dv_id);
4786 }
4787
4788 /*
4789  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4790  */
4791 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4792 {
4793         struct ixgbe_hw *hw = &adapter->hw;
4794         int num_tc = netdev_get_num_tc(adapter->netdev);
4795         int i;
4796
4797         if (!num_tc)
4798                 num_tc = 1;
4799
4800         for (i = 0; i < num_tc; i++) {
4801                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4802                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4803
4804                 /* Low water marks must not be larger than high water marks */
4805                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4806                         hw->fc.low_water[i] = 0;
4807         }
4808
4809         for (; i < MAX_TRAFFIC_CLASS; i++)
4810                 hw->fc.high_water[i] = 0;
4811 }
4812
4813 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4814 {
4815         struct ixgbe_hw *hw = &adapter->hw;
4816         int hdrm;
4817         u8 tc = netdev_get_num_tc(adapter->netdev);
4818
4819         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4820             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4821                 hdrm = 32 << adapter->fdir_pballoc;
4822         else
4823                 hdrm = 0;
4824
4825         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4826         ixgbe_pbthresh_setup(adapter);
4827 }
4828
4829 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4830 {
4831         struct ixgbe_hw *hw = &adapter->hw;
4832         struct hlist_node *node2;
4833         struct ixgbe_fdir_filter *filter;
4834
4835         spin_lock(&adapter->fdir_perfect_lock);
4836
4837         if (!hlist_empty(&adapter->fdir_filter_list))
4838                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4839
4840         hlist_for_each_entry_safe(filter, node2,
4841                                   &adapter->fdir_filter_list, fdir_node) {
4842                 ixgbe_fdir_write_perfect_filter_82599(hw,
4843                                 &filter->filter,
4844                                 filter->sw_idx,
4845                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4846                                 IXGBE_FDIR_DROP_QUEUE :
4847                                 adapter->rx_ring[filter->action]->reg_idx);
4848         }
4849
4850         spin_unlock(&adapter->fdir_perfect_lock);
4851 }
4852
4853 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4854                                       struct ixgbe_adapter *adapter)
4855 {
4856         struct ixgbe_hw *hw = &adapter->hw;
4857         u32 vmolr;
4858
4859         /* No unicast promiscuous support for VMDQ devices. */
4860         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4861         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4862
4863         /* clear the affected bit */
4864         vmolr &= ~IXGBE_VMOLR_MPE;
4865
4866         if (dev->flags & IFF_ALLMULTI) {
4867                 vmolr |= IXGBE_VMOLR_MPE;
4868         } else {
4869                 vmolr |= IXGBE_VMOLR_ROMPE;
4870                 hw->mac.ops.update_mc_addr_list(hw, dev);
4871         }
4872         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4873         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4874 }
4875
4876 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4877 {
4878         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4879         int rss_i = adapter->num_rx_queues_per_pool;
4880         struct ixgbe_hw *hw = &adapter->hw;
4881         u16 pool = vadapter->pool;
4882         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4883                       IXGBE_PSRTYPE_UDPHDR |
4884                       IXGBE_PSRTYPE_IPV4HDR |
4885                       IXGBE_PSRTYPE_L2HDR |
4886                       IXGBE_PSRTYPE_IPV6HDR;
4887
4888         if (hw->mac.type == ixgbe_mac_82598EB)
4889                 return;
4890
4891         if (rss_i > 3)
4892                 psrtype |= 2u << 29;
4893         else if (rss_i > 1)
4894                 psrtype |= 1u << 29;
4895
4896         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4897 }
4898
4899 /**
4900  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4901  * @rx_ring: ring to free buffers from
4902  **/
4903 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4904 {
4905         struct device *dev = rx_ring->dev;
4906         unsigned long size;
4907         u16 i;
4908
4909         /* ring already cleared, nothing to do */
4910         if (!rx_ring->rx_buffer_info)
4911                 return;
4912
4913         /* Free all the Rx ring sk_buffs */
4914         for (i = 0; i < rx_ring->count; i++) {
4915                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4916
4917                 if (rx_buffer->skb) {
4918                         struct sk_buff *skb = rx_buffer->skb;
4919                         if (IXGBE_CB(skb)->page_released)
4920                                 dma_unmap_page(dev,
4921                                                IXGBE_CB(skb)->dma,
4922                                                ixgbe_rx_bufsz(rx_ring),
4923                                                DMA_FROM_DEVICE);
4924                         dev_kfree_skb(skb);
4925                         rx_buffer->skb = NULL;
4926                 }
4927
4928                 if (!rx_buffer->page)
4929                         continue;
4930
4931                 dma_unmap_page(dev, rx_buffer->dma,
4932                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4933                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4934
4935                 rx_buffer->page = NULL;
4936         }
4937
4938         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4939         memset(rx_ring->rx_buffer_info, 0, size);
4940
4941         /* Zero out the descriptor ring */
4942         memset(rx_ring->desc, 0, rx_ring->size);
4943
4944         rx_ring->next_to_alloc = 0;
4945         rx_ring->next_to_clean = 0;
4946         rx_ring->next_to_use = 0;
4947 }
4948
4949 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4950                                    struct ixgbe_ring *rx_ring)
4951 {
4952         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4953         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4954
4955         /* shutdown specific queue receive and wait for dma to settle */
4956         ixgbe_disable_rx_queue(adapter, rx_ring);
4957         usleep_range(10000, 20000);
4958         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4959         ixgbe_clean_rx_ring(rx_ring);
4960         rx_ring->l2_accel_priv = NULL;
4961 }
4962
4963 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4964                                struct ixgbe_fwd_adapter *accel)
4965 {
4966         struct ixgbe_adapter *adapter = accel->real_adapter;
4967         unsigned int rxbase = accel->rx_base_queue;
4968         unsigned int txbase = accel->tx_base_queue;
4969         int i;
4970
4971         netif_tx_stop_all_queues(vdev);
4972
4973         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4974                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4975                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4976         }
4977
4978         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4979                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4980                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4981         }
4982
4983
4984         return 0;
4985 }
4986
4987 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4988                              struct ixgbe_fwd_adapter *accel)
4989 {
4990         struct ixgbe_adapter *adapter = accel->real_adapter;
4991         unsigned int rxbase, txbase, queues;
4992         int i, baseq, err = 0;
4993
4994         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4995                 return 0;
4996
4997         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4998         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4999                    accel->pool, adapter->num_rx_pools,
5000                    baseq, baseq + adapter->num_rx_queues_per_pool,
5001                    adapter->fwd_bitmask);
5002
5003         accel->netdev = vdev;
5004         accel->rx_base_queue = rxbase = baseq;
5005         accel->tx_base_queue = txbase = baseq;
5006
5007         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5008                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5009
5010         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5011                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5012                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5013                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5014         }
5015
5016         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5017                 adapter->tx_ring[txbase + i]->netdev = vdev;
5018                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5019         }
5020
5021         queues = min_t(unsigned int,
5022                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5023         err = netif_set_real_num_tx_queues(vdev, queues);
5024         if (err)
5025                 goto fwd_queue_err;
5026
5027         err = netif_set_real_num_rx_queues(vdev, queues);
5028         if (err)
5029                 goto fwd_queue_err;
5030
5031         if (is_valid_ether_addr(vdev->dev_addr))
5032                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5033
5034         ixgbe_fwd_psrtype(accel);
5035         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5036         return err;
5037 fwd_queue_err:
5038         ixgbe_fwd_ring_down(vdev, accel);
5039         return err;
5040 }
5041
5042 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5043 {
5044         if (netif_is_macvlan(upper)) {
5045                 struct macvlan_dev *dfwd = netdev_priv(upper);
5046                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5047
5048                 if (dfwd->fwd_priv)
5049                         ixgbe_fwd_ring_up(upper, vadapter);
5050         }
5051
5052         return 0;
5053 }
5054
5055 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5056 {
5057         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5058                                       ixgbe_upper_dev_walk, NULL);
5059 }
5060
5061 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5062 {
5063         struct ixgbe_hw *hw = &adapter->hw;
5064
5065         ixgbe_configure_pb(adapter);
5066 #ifdef CONFIG_IXGBE_DCB
5067         ixgbe_configure_dcb(adapter);
5068 #endif
5069         /*
5070          * We must restore virtualization before VLANs or else
5071          * the VLVF registers will not be populated
5072          */
5073         ixgbe_configure_virtualization(adapter);
5074
5075         ixgbe_set_rx_mode(adapter->netdev);
5076         ixgbe_restore_vlan(adapter);
5077
5078         switch (hw->mac.type) {
5079         case ixgbe_mac_82599EB:
5080         case ixgbe_mac_X540:
5081                 hw->mac.ops.disable_rx_buff(hw);
5082                 break;
5083         default:
5084                 break;
5085         }
5086
5087         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5088                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5089                                                 adapter->fdir_pballoc);
5090         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5091                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5092                                               adapter->fdir_pballoc);
5093                 ixgbe_fdir_filter_restore(adapter);
5094         }
5095
5096         switch (hw->mac.type) {
5097         case ixgbe_mac_82599EB:
5098         case ixgbe_mac_X540:
5099                 hw->mac.ops.enable_rx_buff(hw);
5100                 break;
5101         default:
5102                 break;
5103         }
5104
5105 #ifdef CONFIG_IXGBE_DCA
5106         /* configure DCA */
5107         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5108                 ixgbe_setup_dca(adapter);
5109 #endif /* CONFIG_IXGBE_DCA */
5110
5111 #ifdef IXGBE_FCOE
5112         /* configure FCoE L2 filters, redirection table, and Rx control */
5113         ixgbe_configure_fcoe(adapter);
5114
5115 #endif /* IXGBE_FCOE */
5116         ixgbe_configure_tx(adapter);
5117         ixgbe_configure_rx(adapter);
5118         ixgbe_configure_dfwd(adapter);
5119 }
5120
5121 /**
5122  * ixgbe_sfp_link_config - set up SFP+ link
5123  * @adapter: pointer to private adapter struct
5124  **/
5125 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5126 {
5127         /*
5128          * We are assuming the worst case scenario here, and that
5129          * is that an SFP was inserted/removed after the reset
5130          * but before SFP detection was enabled.  As such the best
5131          * solution is to just start searching as soon as we start
5132          */
5133         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5134                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5135
5136         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5137         adapter->sfp_poll_time = 0;
5138 }
5139
5140 /**
5141  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5142  * @hw: pointer to private hardware struct
5143  *
5144  * Returns 0 on success, negative on failure
5145  **/
5146 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5147 {
5148         u32 speed;
5149         bool autoneg, link_up = false;
5150         int ret = IXGBE_ERR_LINK_SETUP;
5151
5152         if (hw->mac.ops.check_link)
5153                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5154
5155         if (ret)
5156                 return ret;
5157
5158         speed = hw->phy.autoneg_advertised;
5159         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5160                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5161                                                         &autoneg);
5162         if (ret)
5163                 return ret;
5164
5165         if (hw->mac.ops.setup_link)
5166                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5167
5168         return ret;
5169 }
5170
5171 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5172 {
5173         struct ixgbe_hw *hw = &adapter->hw;
5174         u32 gpie = 0;
5175
5176         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5177                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5178                        IXGBE_GPIE_OCD;
5179                 gpie |= IXGBE_GPIE_EIAME;
5180                 /*
5181                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5182                  * this saves a register write for every interrupt
5183                  */
5184                 switch (hw->mac.type) {
5185                 case ixgbe_mac_82598EB:
5186                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5187                         break;
5188                 case ixgbe_mac_82599EB:
5189                 case ixgbe_mac_X540:
5190                 case ixgbe_mac_X550:
5191                 case ixgbe_mac_X550EM_x:
5192                 case ixgbe_mac_x550em_a:
5193                 default:
5194                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5195                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5196                         break;
5197                 }
5198         } else {
5199                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5200                  * specifically only auto mask tx and rx interrupts */
5201                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5202         }
5203
5204         /* XXX: to interrupt immediately for EICS writes, enable this */
5205         /* gpie |= IXGBE_GPIE_EIMEN; */
5206
5207         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5208                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5209
5210                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5211                 case IXGBE_82599_VMDQ_8Q_MASK:
5212                         gpie |= IXGBE_GPIE_VTMODE_16;
5213                         break;
5214                 case IXGBE_82599_VMDQ_4Q_MASK:
5215                         gpie |= IXGBE_GPIE_VTMODE_32;
5216                         break;
5217                 default:
5218                         gpie |= IXGBE_GPIE_VTMODE_64;
5219                         break;
5220                 }
5221         }
5222
5223         /* Enable Thermal over heat sensor interrupt */
5224         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5225                 switch (adapter->hw.mac.type) {
5226                 case ixgbe_mac_82599EB:
5227                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5228                         break;
5229                 default:
5230                         break;
5231                 }
5232         }
5233
5234         /* Enable fan failure interrupt */
5235         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5236                 gpie |= IXGBE_SDP1_GPIEN(hw);
5237
5238         switch (hw->mac.type) {
5239         case ixgbe_mac_82599EB:
5240                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5241                 break;
5242         case ixgbe_mac_X550EM_x:
5243         case ixgbe_mac_x550em_a:
5244                 gpie |= IXGBE_SDP0_GPIEN_X540;
5245                 break;
5246         default:
5247                 break;
5248         }
5249
5250         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5251 }
5252
5253 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5254 {
5255         struct ixgbe_hw *hw = &adapter->hw;
5256         int err;
5257         u32 ctrl_ext;
5258
5259         ixgbe_get_hw_control(adapter);
5260         ixgbe_setup_gpie(adapter);
5261
5262         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5263                 ixgbe_configure_msix(adapter);
5264         else
5265                 ixgbe_configure_msi_and_legacy(adapter);
5266
5267         /* enable the optics for 82599 SFP+ fiber */
5268         if (hw->mac.ops.enable_tx_laser)
5269                 hw->mac.ops.enable_tx_laser(hw);
5270
5271         if (hw->phy.ops.set_phy_power)
5272                 hw->phy.ops.set_phy_power(hw, true);
5273
5274         smp_mb__before_atomic();
5275         clear_bit(__IXGBE_DOWN, &adapter->state);
5276         ixgbe_napi_enable_all(adapter);
5277
5278         if (ixgbe_is_sfp(hw)) {
5279                 ixgbe_sfp_link_config(adapter);
5280         } else {
5281                 err = ixgbe_non_sfp_link_config(hw);
5282                 if (err)
5283                         e_err(probe, "link_config FAILED %d\n", err);
5284         }
5285
5286         /* clear any pending interrupts, may auto mask */
5287         IXGBE_READ_REG(hw, IXGBE_EICR);
5288         ixgbe_irq_enable(adapter, true, true);
5289
5290         /*
5291          * If this adapter has a fan, check to see if we had a failure
5292          * before we enabled the interrupt.
5293          */
5294         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5295                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5296                 if (esdp & IXGBE_ESDP_SDP1)
5297                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5298         }
5299
5300         /* bring the link up in the watchdog, this could race with our first
5301          * link up interrupt but shouldn't be a problem */
5302         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5303         adapter->link_check_timeout = jiffies;
5304         mod_timer(&adapter->service_timer, jiffies);
5305
5306         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5307         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5308         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5309         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5310 }
5311
5312 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5313 {
5314         WARN_ON(in_interrupt());
5315         /* put off any impending NetWatchDogTimeout */
5316         netif_trans_update(adapter->netdev);
5317
5318         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5319                 usleep_range(1000, 2000);
5320         if (adapter->hw.phy.type == ixgbe_phy_fw)
5321                 ixgbe_watchdog_link_is_down(adapter);
5322         ixgbe_down(adapter);
5323         /*
5324          * If SR-IOV enabled then wait a bit before bringing the adapter
5325          * back up to give the VFs time to respond to the reset.  The
5326          * two second wait is based upon the watchdog timer cycle in
5327          * the VF driver.
5328          */
5329         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5330                 msleep(2000);
5331         ixgbe_up(adapter);
5332         clear_bit(__IXGBE_RESETTING, &adapter->state);
5333 }
5334
5335 void ixgbe_up(struct ixgbe_adapter *adapter)
5336 {
5337         /* hardware has been reset, we need to reload some things */
5338         ixgbe_configure(adapter);
5339
5340         ixgbe_up_complete(adapter);
5341 }
5342
5343 void ixgbe_reset(struct ixgbe_adapter *adapter)
5344 {
5345         struct ixgbe_hw *hw = &adapter->hw;
5346         struct net_device *netdev = adapter->netdev;
5347         int err;
5348
5349         if (ixgbe_removed(hw->hw_addr))
5350                 return;
5351         /* lock SFP init bit to prevent race conditions with the watchdog */
5352         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5353                 usleep_range(1000, 2000);
5354
5355         /* clear all SFP and link config related flags while holding SFP_INIT */
5356         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5357                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5358         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5359
5360         err = hw->mac.ops.init_hw(hw);
5361         switch (err) {
5362         case 0:
5363         case IXGBE_ERR_SFP_NOT_PRESENT:
5364         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5365                 break;
5366         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5367                 e_dev_err("master disable timed out\n");
5368                 break;
5369         case IXGBE_ERR_EEPROM_VERSION:
5370                 /* We are running on a pre-production device, log a warning */
5371                 e_dev_warn("This device is a pre-production adapter/LOM. "
5372                            "Please be aware there may be issues associated with "
5373                            "your hardware.  If you are experiencing problems "
5374                            "please contact your Intel or hardware "
5375                            "representative who provided you with this "
5376                            "hardware.\n");
5377                 break;
5378         default:
5379                 e_dev_err("Hardware Error: %d\n", err);
5380         }
5381
5382         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5383
5384         /* flush entries out of MAC table */
5385         ixgbe_flush_sw_mac_table(adapter);
5386         __dev_uc_unsync(netdev, NULL);
5387
5388         /* do not flush user set addresses */
5389         ixgbe_mac_set_default_filter(adapter);
5390
5391         /* update SAN MAC vmdq pool selection */
5392         if (hw->mac.san_mac_rar_index)
5393                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5394
5395         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5396                 ixgbe_ptp_reset(adapter);
5397
5398         if (hw->phy.ops.set_phy_power) {
5399                 if (!netif_running(adapter->netdev) && !adapter->wol)
5400                         hw->phy.ops.set_phy_power(hw, false);
5401                 else
5402                         hw->phy.ops.set_phy_power(hw, true);
5403         }
5404 }
5405
5406 /**
5407  * ixgbe_clean_tx_ring - Free Tx Buffers
5408  * @tx_ring: ring to be cleaned
5409  **/
5410 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5411 {
5412         struct ixgbe_tx_buffer *tx_buffer_info;
5413         unsigned long size;
5414         u16 i;
5415
5416         /* ring already cleared, nothing to do */
5417         if (!tx_ring->tx_buffer_info)
5418                 return;
5419
5420         /* Free all the Tx ring sk_buffs */
5421         for (i = 0; i < tx_ring->count; i++) {
5422                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5423                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5424         }
5425
5426         netdev_tx_reset_queue(txring_txq(tx_ring));
5427
5428         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5429         memset(tx_ring->tx_buffer_info, 0, size);
5430
5431         /* Zero out the descriptor ring */
5432         memset(tx_ring->desc, 0, tx_ring->size);
5433
5434         tx_ring->next_to_use = 0;
5435         tx_ring->next_to_clean = 0;
5436 }
5437
5438 /**
5439  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5440  * @adapter: board private structure
5441  **/
5442 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5443 {
5444         int i;
5445
5446         for (i = 0; i < adapter->num_rx_queues; i++)
5447                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5448 }
5449
5450 /**
5451  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5452  * @adapter: board private structure
5453  **/
5454 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5455 {
5456         int i;
5457
5458         for (i = 0; i < adapter->num_tx_queues; i++)
5459                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5460 }
5461
5462 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5463 {
5464         struct hlist_node *node2;
5465         struct ixgbe_fdir_filter *filter;
5466
5467         spin_lock(&adapter->fdir_perfect_lock);
5468
5469         hlist_for_each_entry_safe(filter, node2,
5470                                   &adapter->fdir_filter_list, fdir_node) {
5471                 hlist_del(&filter->fdir_node);
5472                 kfree(filter);
5473         }
5474         adapter->fdir_filter_count = 0;
5475
5476         spin_unlock(&adapter->fdir_perfect_lock);
5477 }
5478
5479 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5480 {
5481         if (netif_is_macvlan(upper)) {
5482                 struct macvlan_dev *vlan = netdev_priv(upper);
5483
5484                 if (vlan->fwd_priv) {
5485                         netif_tx_stop_all_queues(upper);
5486                         netif_carrier_off(upper);
5487                         netif_tx_disable(upper);
5488                 }
5489         }
5490
5491         return 0;
5492 }
5493
5494 void ixgbe_down(struct ixgbe_adapter *adapter)
5495 {
5496         struct net_device *netdev = adapter->netdev;
5497         struct ixgbe_hw *hw = &adapter->hw;
5498         int i;
5499
5500         /* signal that we are down to the interrupt handler */
5501         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5502                 return; /* do nothing if already down */
5503
5504         /* disable receives */
5505         hw->mac.ops.disable_rx(hw);
5506
5507         /* disable all enabled rx queues */
5508         for (i = 0; i < adapter->num_rx_queues; i++)
5509                 /* this call also flushes the previous write */
5510                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5511
5512         usleep_range(10000, 20000);
5513
5514         netif_tx_stop_all_queues(netdev);
5515
5516         /* call carrier off first to avoid false dev_watchdog timeouts */
5517         netif_carrier_off(netdev);
5518         netif_tx_disable(netdev);
5519
5520         /* disable any upper devices */
5521         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5522                                       ixgbe_disable_macvlan, NULL);
5523
5524         ixgbe_irq_disable(adapter);
5525
5526         ixgbe_napi_disable_all(adapter);
5527
5528         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5529         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5530         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5531
5532         del_timer_sync(&adapter->service_timer);
5533
5534         if (adapter->num_vfs) {
5535                 /* Clear EITR Select mapping */
5536                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5537
5538                 /* Mark all the VFs as inactive */
5539                 for (i = 0 ; i < adapter->num_vfs; i++)
5540                         adapter->vfinfo[i].clear_to_send = false;
5541
5542                 /* ping all the active vfs to let them know we are going down */
5543                 ixgbe_ping_all_vfs(adapter);
5544
5545                 /* Disable all VFTE/VFRE TX/RX */
5546                 ixgbe_disable_tx_rx(adapter);
5547         }
5548
5549         /* disable transmits in the hardware now that interrupts are off */
5550         for (i = 0; i < adapter->num_tx_queues; i++) {
5551                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5552                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5553         }
5554
5555         /* Disable the Tx DMA engine on 82599 and later MAC */
5556         switch (hw->mac.type) {
5557         case ixgbe_mac_82599EB:
5558         case ixgbe_mac_X540:
5559         case ixgbe_mac_X550:
5560         case ixgbe_mac_X550EM_x:
5561         case ixgbe_mac_x550em_a:
5562                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5563                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5564                                  ~IXGBE_DMATXCTL_TE));
5565                 break;
5566         default:
5567                 break;
5568         }
5569
5570         if (!pci_channel_offline(adapter->pdev))
5571                 ixgbe_reset(adapter);
5572
5573         /* power down the optics for 82599 SFP+ fiber */
5574         if (hw->mac.ops.disable_tx_laser)
5575                 hw->mac.ops.disable_tx_laser(hw);
5576
5577         ixgbe_clean_all_tx_rings(adapter);
5578         ixgbe_clean_all_rx_rings(adapter);
5579 }
5580
5581 /**
5582  * ixgbe_eee_capable - helper function to determine EEE support on X550
5583  * @adapter: board private structure
5584  */
5585 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5586 {
5587         struct ixgbe_hw *hw = &adapter->hw;
5588
5589         switch (hw->device_id) {
5590         case IXGBE_DEV_ID_X550EM_A_1G_T:
5591         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5592                 if (!hw->phy.eee_speeds_supported)
5593                         break;
5594                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5595                 if (!hw->phy.eee_speeds_advertised)
5596                         break;
5597                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5598                 break;
5599         default:
5600                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5601                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5602                 break;
5603         }
5604 }
5605
5606 /**
5607  * ixgbe_tx_timeout - Respond to a Tx Hang
5608  * @netdev: network interface device structure
5609  **/
5610 static void ixgbe_tx_timeout(struct net_device *netdev)
5611 {
5612         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5613
5614         /* Do the reset outside of interrupt context */
5615         ixgbe_tx_timeout_reset(adapter);
5616 }
5617
5618 #ifdef CONFIG_IXGBE_DCB
5619 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5620 {
5621         struct ixgbe_hw *hw = &adapter->hw;
5622         struct tc_configuration *tc;
5623         int j;
5624
5625         switch (hw->mac.type) {
5626         case ixgbe_mac_82598EB:
5627         case ixgbe_mac_82599EB:
5628                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5629                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5630                 break;
5631         case ixgbe_mac_X540:
5632         case ixgbe_mac_X550:
5633                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5634                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5635                 break;
5636         case ixgbe_mac_X550EM_x:
5637         case ixgbe_mac_x550em_a:
5638         default:
5639                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5640                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5641                 break;
5642         }
5643
5644         /* Configure DCB traffic classes */
5645         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5646                 tc = &adapter->dcb_cfg.tc_config[j];
5647                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5648                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5649                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5650                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5651                 tc->dcb_pfc = pfc_disabled;
5652         }
5653
5654         /* Initialize default user to priority mapping, UPx->TC0 */
5655         tc = &adapter->dcb_cfg.tc_config[0];
5656         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5657         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5658
5659         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5660         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5661         adapter->dcb_cfg.pfc_mode_enable = false;
5662         adapter->dcb_set_bitmap = 0x00;
5663         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5664                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5665         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5666                sizeof(adapter->temp_dcb_cfg));
5667 }
5668 #endif
5669
5670 /**
5671  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5672  * @adapter: board private structure to initialize
5673  *
5674  * ixgbe_sw_init initializes the Adapter private data structure.
5675  * Fields are initialized based on PCI device information and
5676  * OS network device settings (MTU size).
5677  **/
5678 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5679                          const struct ixgbe_info *ii)
5680 {
5681         struct ixgbe_hw *hw = &adapter->hw;
5682         struct pci_dev *pdev = adapter->pdev;
5683         unsigned int rss, fdir;
5684         u32 fwsm;
5685         int i;
5686
5687         /* PCI config space info */
5688
5689         hw->vendor_id = pdev->vendor;
5690         hw->device_id = pdev->device;
5691         hw->revision_id = pdev->revision;
5692         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5693         hw->subsystem_device_id = pdev->subsystem_device;
5694
5695         /* get_invariants needs the device IDs */
5696         ii->get_invariants(hw);
5697
5698         /* Set common capability flags and settings */
5699         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5700         adapter->ring_feature[RING_F_RSS].limit = rss;
5701         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5702         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5703         adapter->atr_sample_rate = 20;
5704         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5705         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5706         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5707 #ifdef CONFIG_IXGBE_DCA
5708         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5709 #endif
5710 #ifdef CONFIG_IXGBE_DCB
5711         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5712         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5713 #endif
5714 #ifdef IXGBE_FCOE
5715         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5716         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5717 #ifdef CONFIG_IXGBE_DCB
5718         /* Default traffic class to use for FCoE */
5719         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5720 #endif /* CONFIG_IXGBE_DCB */
5721 #endif /* IXGBE_FCOE */
5722
5723         /* initialize static ixgbe jump table entries */
5724         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5725                                           GFP_KERNEL);
5726         if (!adapter->jump_tables[0])
5727                 return -ENOMEM;
5728         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5729
5730         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5731                 adapter->jump_tables[i] = NULL;
5732
5733         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5734                                      hw->mac.num_rar_entries,
5735                                      GFP_ATOMIC);
5736         if (!adapter->mac_table)
5737                 return -ENOMEM;
5738
5739         /* Set MAC specific capability flags and exceptions */
5740         switch (hw->mac.type) {
5741         case ixgbe_mac_82598EB:
5742                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5743
5744                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5745                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5746
5747                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5748                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5749                 adapter->atr_sample_rate = 0;
5750                 adapter->fdir_pballoc = 0;
5751 #ifdef IXGBE_FCOE
5752                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5753                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5754 #ifdef CONFIG_IXGBE_DCB
5755                 adapter->fcoe.up = 0;
5756 #endif /* IXGBE_DCB */
5757 #endif /* IXGBE_FCOE */
5758                 break;
5759         case ixgbe_mac_82599EB:
5760                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5761                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5762                 break;
5763         case ixgbe_mac_X540:
5764                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5765                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5766                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5767                 break;
5768         case ixgbe_mac_x550em_a:
5769                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5770                 switch (hw->device_id) {
5771                 case IXGBE_DEV_ID_X550EM_A_1G_T:
5772                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5773                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5774                         break;
5775                 default:
5776                         break;
5777                 }
5778         /* fall through */
5779         case ixgbe_mac_X550EM_x:
5780 #ifdef CONFIG_IXGBE_DCB
5781                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5782 #endif
5783 #ifdef IXGBE_FCOE
5784                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5785 #ifdef CONFIG_IXGBE_DCB
5786                 adapter->fcoe.up = 0;
5787 #endif /* IXGBE_DCB */
5788 #endif /* IXGBE_FCOE */
5789         /* Fall Through */
5790         case ixgbe_mac_X550:
5791                 if (hw->mac.type == ixgbe_mac_X550)
5792                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5793 #ifdef CONFIG_IXGBE_DCA
5794                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5795 #endif
5796                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5797                 break;
5798         default:
5799                 break;
5800         }
5801
5802 #ifdef IXGBE_FCOE
5803         /* FCoE support exists, always init the FCoE lock */
5804         spin_lock_init(&adapter->fcoe.lock);
5805
5806 #endif
5807         /* n-tuple support exists, always init our spinlock */
5808         spin_lock_init(&adapter->fdir_perfect_lock);
5809
5810 #ifdef CONFIG_IXGBE_DCB
5811         ixgbe_init_dcb(adapter);
5812 #endif
5813
5814         /* default flow control settings */
5815         hw->fc.requested_mode = ixgbe_fc_full;
5816         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5817         ixgbe_pbthresh_setup(adapter);
5818         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5819         hw->fc.send_xon = true;
5820         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5821
5822 #ifdef CONFIG_PCI_IOV
5823         if (max_vfs > 0)
5824                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5825
5826         /* assign number of SR-IOV VFs */
5827         if (hw->mac.type != ixgbe_mac_82598EB) {
5828                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5829                         adapter->num_vfs = 0;
5830                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5831                 } else {
5832                         adapter->num_vfs = max_vfs;
5833                 }
5834         }
5835 #endif /* CONFIG_PCI_IOV */
5836
5837         /* enable itr by default in dynamic mode */
5838         adapter->rx_itr_setting = 1;
5839         adapter->tx_itr_setting = 1;
5840
5841         /* set default ring sizes */
5842         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5843         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5844
5845         /* set default work limits */
5846         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5847
5848         /* initialize eeprom parameters */
5849         if (ixgbe_init_eeprom_params_generic(hw)) {
5850                 e_dev_err("EEPROM initialization failed\n");
5851                 return -EIO;
5852         }
5853
5854         /* PF holds first pool slot */
5855         set_bit(0, &adapter->fwd_bitmask);
5856         set_bit(__IXGBE_DOWN, &adapter->state);
5857
5858         return 0;
5859 }
5860
5861 /**
5862  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5863  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5864  *
5865  * Return 0 on success, negative on failure
5866  **/
5867 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5868 {
5869         struct device *dev = tx_ring->dev;
5870         int orig_node = dev_to_node(dev);
5871         int ring_node = -1;
5872         int size;
5873
5874         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5875
5876         if (tx_ring->q_vector)
5877                 ring_node = tx_ring->q_vector->numa_node;
5878
5879         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5880         if (!tx_ring->tx_buffer_info)
5881                 tx_ring->tx_buffer_info = vzalloc(size);
5882         if (!tx_ring->tx_buffer_info)
5883                 goto err;
5884
5885         u64_stats_init(&tx_ring->syncp);
5886
5887         /* round up to nearest 4K */
5888         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5889         tx_ring->size = ALIGN(tx_ring->size, 4096);
5890
5891         set_dev_node(dev, ring_node);
5892         tx_ring->desc = dma_alloc_coherent(dev,
5893                                            tx_ring->size,
5894                                            &tx_ring->dma,
5895                                            GFP_KERNEL);
5896         set_dev_node(dev, orig_node);
5897         if (!tx_ring->desc)
5898                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5899                                                    &tx_ring->dma, GFP_KERNEL);
5900         if (!tx_ring->desc)
5901                 goto err;
5902
5903         tx_ring->next_to_use = 0;
5904         tx_ring->next_to_clean = 0;
5905         return 0;
5906
5907 err:
5908         vfree(tx_ring->tx_buffer_info);
5909         tx_ring->tx_buffer_info = NULL;
5910         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5911         return -ENOMEM;
5912 }
5913
5914 /**
5915  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5916  * @adapter: board private structure
5917  *
5918  * If this function returns with an error, then it's possible one or
5919  * more of the rings is populated (while the rest are not).  It is the
5920  * callers duty to clean those orphaned rings.
5921  *
5922  * Return 0 on success, negative on failure
5923  **/
5924 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5925 {
5926         int i, err = 0;
5927
5928         for (i = 0; i < adapter->num_tx_queues; i++) {
5929                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5930                 if (!err)
5931                         continue;
5932
5933                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5934                 goto err_setup_tx;
5935         }
5936
5937         return 0;
5938 err_setup_tx:
5939         /* rewind the index freeing the rings as we go */
5940         while (i--)
5941                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5942         return err;
5943 }
5944
5945 /**
5946  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5947  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5948  *
5949  * Returns 0 on success, negative on failure
5950  **/
5951 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5952 {
5953         struct device *dev = rx_ring->dev;
5954         int orig_node = dev_to_node(dev);
5955         int ring_node = -1;
5956         int size;
5957
5958         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5959
5960         if (rx_ring->q_vector)
5961                 ring_node = rx_ring->q_vector->numa_node;
5962
5963         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5964         if (!rx_ring->rx_buffer_info)
5965                 rx_ring->rx_buffer_info = vzalloc(size);
5966         if (!rx_ring->rx_buffer_info)
5967                 goto err;
5968
5969         u64_stats_init(&rx_ring->syncp);
5970
5971         /* Round up to nearest 4K */
5972         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5973         rx_ring->size = ALIGN(rx_ring->size, 4096);
5974
5975         set_dev_node(dev, ring_node);
5976         rx_ring->desc = dma_alloc_coherent(dev,
5977                                            rx_ring->size,
5978                                            &rx_ring->dma,
5979                                            GFP_KERNEL);
5980         set_dev_node(dev, orig_node);
5981         if (!rx_ring->desc)
5982                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5983                                                    &rx_ring->dma, GFP_KERNEL);
5984         if (!rx_ring->desc)
5985                 goto err;
5986
5987         rx_ring->next_to_clean = 0;
5988         rx_ring->next_to_use = 0;
5989
5990         return 0;
5991 err:
5992         vfree(rx_ring->rx_buffer_info);
5993         rx_ring->rx_buffer_info = NULL;
5994         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5995         return -ENOMEM;
5996 }
5997
5998 /**
5999  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6000  * @adapter: board private structure
6001  *
6002  * If this function returns with an error, then it's possible one or
6003  * more of the rings is populated (while the rest are not).  It is the
6004  * callers duty to clean those orphaned rings.
6005  *
6006  * Return 0 on success, negative on failure
6007  **/
6008 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6009 {
6010         int i, err = 0;
6011
6012         for (i = 0; i < adapter->num_rx_queues; i++) {
6013                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
6014                 if (!err)
6015                         continue;
6016
6017                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6018                 goto err_setup_rx;
6019         }
6020
6021 #ifdef IXGBE_FCOE
6022         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6023         if (!err)
6024 #endif
6025                 return 0;
6026 err_setup_rx:
6027         /* rewind the index freeing the rings as we go */
6028         while (i--)
6029                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6030         return err;
6031 }
6032
6033 /**
6034  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6035  * @tx_ring: Tx descriptor ring for a specific queue
6036  *
6037  * Free all transmit software resources
6038  **/
6039 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6040 {
6041         ixgbe_clean_tx_ring(tx_ring);
6042
6043         vfree(tx_ring->tx_buffer_info);
6044         tx_ring->tx_buffer_info = NULL;
6045
6046         /* if not set, then don't free */
6047         if (!tx_ring->desc)
6048                 return;
6049
6050         dma_free_coherent(tx_ring->dev, tx_ring->size,
6051                           tx_ring->desc, tx_ring->dma);
6052
6053         tx_ring->desc = NULL;
6054 }
6055
6056 /**
6057  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6058  * @adapter: board private structure
6059  *
6060  * Free all transmit software resources
6061  **/
6062 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6063 {
6064         int i;
6065
6066         for (i = 0; i < adapter->num_tx_queues; i++)
6067                 if (adapter->tx_ring[i]->desc)
6068                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6069 }
6070
6071 /**
6072  * ixgbe_free_rx_resources - Free Rx Resources
6073  * @rx_ring: ring to clean the resources from
6074  *
6075  * Free all receive software resources
6076  **/
6077 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6078 {
6079         ixgbe_clean_rx_ring(rx_ring);
6080
6081         vfree(rx_ring->rx_buffer_info);
6082         rx_ring->rx_buffer_info = NULL;
6083
6084         /* if not set, then don't free */
6085         if (!rx_ring->desc)
6086                 return;
6087
6088         dma_free_coherent(rx_ring->dev, rx_ring->size,
6089                           rx_ring->desc, rx_ring->dma);
6090
6091         rx_ring->desc = NULL;
6092 }
6093
6094 /**
6095  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6096  * @adapter: board private structure
6097  *
6098  * Free all receive software resources
6099  **/
6100 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6101 {
6102         int i;
6103
6104 #ifdef IXGBE_FCOE
6105         ixgbe_free_fcoe_ddp_resources(adapter);
6106
6107 #endif
6108         for (i = 0; i < adapter->num_rx_queues; i++)
6109                 if (adapter->rx_ring[i]->desc)
6110                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6111 }
6112
6113 /**
6114  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6115  * @netdev: network interface device structure
6116  * @new_mtu: new value for maximum frame size
6117  *
6118  * Returns 0 on success, negative on failure
6119  **/
6120 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6121 {
6122         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6123
6124         /*
6125          * For 82599EB we cannot allow legacy VFs to enable their receive
6126          * paths when MTU greater than 1500 is configured.  So display a
6127          * warning that legacy VFs will be disabled.
6128          */
6129         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6130             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6131             (new_mtu > ETH_DATA_LEN))
6132                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6133
6134         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6135
6136         /* must set new MTU before calling down or up */
6137         netdev->mtu = new_mtu;
6138
6139         if (netif_running(netdev))
6140                 ixgbe_reinit_locked(adapter);
6141
6142         return 0;
6143 }
6144
6145 /**
6146  * ixgbe_open - Called when a network interface is made active
6147  * @netdev: network interface device structure
6148  *
6149  * Returns 0 on success, negative value on failure
6150  *
6151  * The open entry point is called when a network interface is made
6152  * active by the system (IFF_UP).  At this point all resources needed
6153  * for transmit and receive operations are allocated, the interrupt
6154  * handler is registered with the OS, the watchdog timer is started,
6155  * and the stack is notified that the interface is ready.
6156  **/
6157 int ixgbe_open(struct net_device *netdev)
6158 {
6159         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6160         struct ixgbe_hw *hw = &adapter->hw;
6161         int err, queues;
6162
6163         /* disallow open during test */
6164         if (test_bit(__IXGBE_TESTING, &adapter->state))
6165                 return -EBUSY;
6166
6167         netif_carrier_off(netdev);
6168
6169         /* allocate transmit descriptors */
6170         err = ixgbe_setup_all_tx_resources(adapter);
6171         if (err)
6172                 goto err_setup_tx;
6173
6174         /* allocate receive descriptors */
6175         err = ixgbe_setup_all_rx_resources(adapter);
6176         if (err)
6177                 goto err_setup_rx;
6178
6179         ixgbe_configure(adapter);
6180
6181         err = ixgbe_request_irq(adapter);
6182         if (err)
6183                 goto err_req_irq;
6184
6185         /* Notify the stack of the actual queue counts. */
6186         if (adapter->num_rx_pools > 1)
6187                 queues = adapter->num_rx_queues_per_pool;
6188         else
6189                 queues = adapter->num_tx_queues;
6190
6191         err = netif_set_real_num_tx_queues(netdev, queues);
6192         if (err)
6193                 goto err_set_queues;
6194
6195         if (adapter->num_rx_pools > 1 &&
6196             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6197                 queues = IXGBE_MAX_L2A_QUEUES;
6198         else
6199                 queues = adapter->num_rx_queues;
6200         err = netif_set_real_num_rx_queues(netdev, queues);
6201         if (err)
6202                 goto err_set_queues;
6203
6204         ixgbe_ptp_init(adapter);
6205
6206         ixgbe_up_complete(adapter);
6207
6208         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6209         udp_tunnel_get_rx_info(netdev);
6210
6211         return 0;
6212
6213 err_set_queues:
6214         ixgbe_free_irq(adapter);
6215 err_req_irq:
6216         ixgbe_free_all_rx_resources(adapter);
6217         if (hw->phy.ops.set_phy_power && !adapter->wol)
6218                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6219 err_setup_rx:
6220         ixgbe_free_all_tx_resources(adapter);
6221 err_setup_tx:
6222         ixgbe_reset(adapter);
6223
6224         return err;
6225 }
6226
6227 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6228 {
6229         ixgbe_ptp_suspend(adapter);
6230
6231         if (adapter->hw.phy.ops.enter_lplu) {
6232                 adapter->hw.phy.reset_disable = true;
6233                 ixgbe_down(adapter);
6234                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6235                 adapter->hw.phy.reset_disable = false;
6236         } else {
6237                 ixgbe_down(adapter);
6238         }
6239
6240         ixgbe_free_irq(adapter);
6241
6242         ixgbe_free_all_tx_resources(adapter);
6243         ixgbe_free_all_rx_resources(adapter);
6244 }
6245
6246 /**
6247  * ixgbe_close - Disables a network interface
6248  * @netdev: network interface device structure
6249  *
6250  * Returns 0, this is not allowed to fail
6251  *
6252  * The close entry point is called when an interface is de-activated
6253  * by the OS.  The hardware is still under the drivers control, but
6254  * needs to be disabled.  A global MAC reset is issued to stop the
6255  * hardware, and all transmit and receive resources are freed.
6256  **/
6257 int ixgbe_close(struct net_device *netdev)
6258 {
6259         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6260
6261         ixgbe_ptp_stop(adapter);
6262
6263         if (netif_device_present(netdev))
6264                 ixgbe_close_suspend(adapter);
6265
6266         ixgbe_fdir_filter_exit(adapter);
6267
6268         ixgbe_release_hw_control(adapter);
6269
6270         return 0;
6271 }
6272
6273 #ifdef CONFIG_PM
6274 static int ixgbe_resume(struct pci_dev *pdev)
6275 {
6276         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6277         struct net_device *netdev = adapter->netdev;
6278         u32 err;
6279
6280         adapter->hw.hw_addr = adapter->io_addr;
6281         pci_set_power_state(pdev, PCI_D0);
6282         pci_restore_state(pdev);
6283         /*
6284          * pci_restore_state clears dev->state_saved so call
6285          * pci_save_state to restore it.
6286          */
6287         pci_save_state(pdev);
6288
6289         err = pci_enable_device_mem(pdev);
6290         if (err) {
6291                 e_dev_err("Cannot enable PCI device from suspend\n");
6292                 return err;
6293         }
6294         smp_mb__before_atomic();
6295         clear_bit(__IXGBE_DISABLED, &adapter->state);
6296         pci_set_master(pdev);
6297
6298         pci_wake_from_d3(pdev, false);
6299
6300         ixgbe_reset(adapter);
6301
6302         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6303
6304         rtnl_lock();
6305         err = ixgbe_init_interrupt_scheme(adapter);
6306         if (!err && netif_running(netdev))
6307                 err = ixgbe_open(netdev);
6308
6309
6310         if (!err)
6311                 netif_device_attach(netdev);
6312         rtnl_unlock();
6313
6314         return err;
6315 }
6316 #endif /* CONFIG_PM */
6317
6318 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6319 {
6320         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6321         struct net_device *netdev = adapter->netdev;
6322         struct ixgbe_hw *hw = &adapter->hw;
6323         u32 ctrl, fctrl;
6324         u32 wufc = adapter->wol;
6325 #ifdef CONFIG_PM
6326         int retval = 0;
6327 #endif
6328
6329         rtnl_lock();
6330         netif_device_detach(netdev);
6331
6332         if (netif_running(netdev))
6333                 ixgbe_close_suspend(adapter);
6334
6335         ixgbe_clear_interrupt_scheme(adapter);
6336         rtnl_unlock();
6337
6338 #ifdef CONFIG_PM
6339         retval = pci_save_state(pdev);
6340         if (retval)
6341                 return retval;
6342
6343 #endif
6344         if (hw->mac.ops.stop_link_on_d3)
6345                 hw->mac.ops.stop_link_on_d3(hw);
6346
6347         if (wufc) {
6348                 ixgbe_set_rx_mode(netdev);
6349
6350                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6351                 if (hw->mac.ops.enable_tx_laser)
6352                         hw->mac.ops.enable_tx_laser(hw);
6353
6354                 /* turn on all-multi mode if wake on multicast is enabled */
6355                 if (wufc & IXGBE_WUFC_MC) {
6356                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6357                         fctrl |= IXGBE_FCTRL_MPE;
6358                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6359                 }
6360
6361                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6362                 ctrl |= IXGBE_CTRL_GIO_DIS;
6363                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6364
6365                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6366         } else {
6367                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6368                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6369         }
6370
6371         switch (hw->mac.type) {
6372         case ixgbe_mac_82598EB:
6373                 pci_wake_from_d3(pdev, false);
6374                 break;
6375         case ixgbe_mac_82599EB:
6376         case ixgbe_mac_X540:
6377         case ixgbe_mac_X550:
6378         case ixgbe_mac_X550EM_x:
6379         case ixgbe_mac_x550em_a:
6380                 pci_wake_from_d3(pdev, !!wufc);
6381                 break;
6382         default:
6383                 break;
6384         }
6385
6386         *enable_wake = !!wufc;
6387         if (hw->phy.ops.set_phy_power && !*enable_wake)
6388                 hw->phy.ops.set_phy_power(hw, false);
6389
6390         ixgbe_release_hw_control(adapter);
6391
6392         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6393                 pci_disable_device(pdev);
6394
6395         return 0;
6396 }
6397
6398 #ifdef CONFIG_PM
6399 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6400 {
6401         int retval;
6402         bool wake;
6403
6404         retval = __ixgbe_shutdown(pdev, &wake);
6405         if (retval)
6406                 return retval;
6407
6408         if (wake) {
6409                 pci_prepare_to_sleep(pdev);
6410         } else {
6411                 pci_wake_from_d3(pdev, false);
6412                 pci_set_power_state(pdev, PCI_D3hot);
6413         }
6414
6415         return 0;
6416 }
6417 #endif /* CONFIG_PM */
6418
6419 static void ixgbe_shutdown(struct pci_dev *pdev)
6420 {
6421         bool wake;
6422
6423         __ixgbe_shutdown(pdev, &wake);
6424
6425         if (system_state == SYSTEM_POWER_OFF) {
6426                 pci_wake_from_d3(pdev, wake);
6427                 pci_set_power_state(pdev, PCI_D3hot);
6428         }
6429 }
6430
6431 /**
6432  * ixgbe_update_stats - Update the board statistics counters.
6433  * @adapter: board private structure
6434  **/
6435 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6436 {
6437         struct net_device *netdev = adapter->netdev;
6438         struct ixgbe_hw *hw = &adapter->hw;
6439         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6440         u64 total_mpc = 0;
6441         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6442         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6443         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6444         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6445
6446         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6447             test_bit(__IXGBE_RESETTING, &adapter->state))
6448                 return;
6449
6450         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6451                 u64 rsc_count = 0;
6452                 u64 rsc_flush = 0;
6453                 for (i = 0; i < adapter->num_rx_queues; i++) {
6454                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6455                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6456                 }
6457                 adapter->rsc_total_count = rsc_count;
6458                 adapter->rsc_total_flush = rsc_flush;
6459         }
6460
6461         for (i = 0; i < adapter->num_rx_queues; i++) {
6462                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6463                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6464                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6465                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6466                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6467                 bytes += rx_ring->stats.bytes;
6468                 packets += rx_ring->stats.packets;
6469         }
6470         adapter->non_eop_descs = non_eop_descs;
6471         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6472         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6473         adapter->hw_csum_rx_error = hw_csum_rx_error;
6474         netdev->stats.rx_bytes = bytes;
6475         netdev->stats.rx_packets = packets;
6476
6477         bytes = 0;
6478         packets = 0;
6479         /* gather some stats to the adapter struct that are per queue */
6480         for (i = 0; i < adapter->num_tx_queues; i++) {
6481                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6482                 restart_queue += tx_ring->tx_stats.restart_queue;
6483                 tx_busy += tx_ring->tx_stats.tx_busy;
6484                 bytes += tx_ring->stats.bytes;
6485                 packets += tx_ring->stats.packets;
6486         }
6487         adapter->restart_queue = restart_queue;
6488         adapter->tx_busy = tx_busy;
6489         netdev->stats.tx_bytes = bytes;
6490         netdev->stats.tx_packets = packets;
6491
6492         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6493
6494         /* 8 register reads */
6495         for (i = 0; i < 8; i++) {
6496                 /* for packet buffers not used, the register should read 0 */
6497                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6498                 missed_rx += mpc;
6499                 hwstats->mpc[i] += mpc;
6500                 total_mpc += hwstats->mpc[i];
6501                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6502                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6503                 switch (hw->mac.type) {
6504                 case ixgbe_mac_82598EB:
6505                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6506                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6507                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6508                         hwstats->pxonrxc[i] +=
6509                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6510                         break;
6511                 case ixgbe_mac_82599EB:
6512                 case ixgbe_mac_X540:
6513                 case ixgbe_mac_X550:
6514                 case ixgbe_mac_X550EM_x:
6515                 case ixgbe_mac_x550em_a:
6516                         hwstats->pxonrxc[i] +=
6517                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6518                         break;
6519                 default:
6520                         break;
6521                 }
6522         }
6523
6524         /*16 register reads */
6525         for (i = 0; i < 16; i++) {
6526                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6527                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6528                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6529                     (hw->mac.type == ixgbe_mac_X540) ||
6530                     (hw->mac.type == ixgbe_mac_X550) ||
6531                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6532                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6533                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6534                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6535                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6536                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6537                 }
6538         }
6539
6540         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6541         /* work around hardware counting issue */
6542         hwstats->gprc -= missed_rx;
6543
6544         ixgbe_update_xoff_received(adapter);
6545
6546         /* 82598 hardware only has a 32 bit counter in the high register */
6547         switch (hw->mac.type) {
6548         case ixgbe_mac_82598EB:
6549                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6550                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6551                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6552                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6553                 break;
6554         case ixgbe_mac_X540:
6555         case ixgbe_mac_X550:
6556         case ixgbe_mac_X550EM_x:
6557         case ixgbe_mac_x550em_a:
6558                 /* OS2BMC stats are X540 and later */
6559                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6560                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6561                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6562                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6563         case ixgbe_mac_82599EB:
6564                 for (i = 0; i < 16; i++)
6565                         adapter->hw_rx_no_dma_resources +=
6566                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6567                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6568                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6569                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6570                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6571                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6572                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6573                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6574                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6575                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6576 #ifdef IXGBE_FCOE
6577                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6578                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6579                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6580                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6581                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6582                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6583                 /* Add up per cpu counters for total ddp aloc fail */
6584                 if (adapter->fcoe.ddp_pool) {
6585                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6586                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6587                         unsigned int cpu;
6588                         u64 noddp = 0, noddp_ext_buff = 0;
6589                         for_each_possible_cpu(cpu) {
6590                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6591                                 noddp += ddp_pool->noddp;
6592                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6593                         }
6594                         hwstats->fcoe_noddp = noddp;
6595                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6596                 }
6597 #endif /* IXGBE_FCOE */
6598                 break;
6599         default:
6600                 break;
6601         }
6602         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6603         hwstats->bprc += bprc;
6604         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6605         if (hw->mac.type == ixgbe_mac_82598EB)
6606                 hwstats->mprc -= bprc;
6607         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6608         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6609         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6610         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6611         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6612         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6613         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6614         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6615         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6616         hwstats->lxontxc += lxon;
6617         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6618         hwstats->lxofftxc += lxoff;
6619         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6620         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6621         /*
6622          * 82598 errata - tx of flow control packets is included in tx counters
6623          */
6624         xon_off_tot = lxon + lxoff;
6625         hwstats->gptc -= xon_off_tot;
6626         hwstats->mptc -= xon_off_tot;
6627         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6628         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6629         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6630         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6631         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6632         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6633         hwstats->ptc64 -= xon_off_tot;
6634         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6635         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6636         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6637         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6638         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6639         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6640
6641         /* Fill out the OS statistics structure */
6642         netdev->stats.multicast = hwstats->mprc;
6643
6644         /* Rx Errors */
6645         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6646         netdev->stats.rx_dropped = 0;
6647         netdev->stats.rx_length_errors = hwstats->rlec;
6648         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6649         netdev->stats.rx_missed_errors = total_mpc;
6650 }
6651
6652 /**
6653  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6654  * @adapter: pointer to the device adapter structure
6655  **/
6656 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6657 {
6658         struct ixgbe_hw *hw = &adapter->hw;
6659         int i;
6660
6661         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6662                 return;
6663
6664         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6665
6666         /* if interface is down do nothing */
6667         if (test_bit(__IXGBE_DOWN, &adapter->state))
6668                 return;
6669
6670         /* do nothing if we are not using signature filters */
6671         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6672                 return;
6673
6674         adapter->fdir_overflow++;
6675
6676         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6677                 for (i = 0; i < adapter->num_tx_queues; i++)
6678                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6679                                 &(adapter->tx_ring[i]->state));
6680                 /* re-enable flow director interrupts */
6681                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6682         } else {
6683                 e_err(probe, "failed to finish FDIR re-initialization, "
6684                       "ignored adding FDIR ATR filters\n");
6685         }
6686 }
6687
6688 /**
6689  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6690  * @adapter: pointer to the device adapter structure
6691  *
6692  * This function serves two purposes.  First it strobes the interrupt lines
6693  * in order to make certain interrupts are occurring.  Secondly it sets the
6694  * bits needed to check for TX hangs.  As a result we should immediately
6695  * determine if a hang has occurred.
6696  */
6697 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6698 {
6699         struct ixgbe_hw *hw = &adapter->hw;
6700         u64 eics = 0;
6701         int i;
6702
6703         /* If we're down, removing or resetting, just bail */
6704         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6705             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6706             test_bit(__IXGBE_RESETTING, &adapter->state))
6707                 return;
6708
6709         /* Force detection of hung controller */
6710         if (netif_carrier_ok(adapter->netdev)) {
6711                 for (i = 0; i < adapter->num_tx_queues; i++)
6712                         set_check_for_tx_hang(adapter->tx_ring[i]);
6713         }
6714
6715         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6716                 /*
6717                  * for legacy and MSI interrupts don't set any bits
6718                  * that are enabled for EIAM, because this operation
6719                  * would set *both* EIMS and EICS for any bit in EIAM
6720                  */
6721                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6722                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6723         } else {
6724                 /* get one bit for every active tx/rx interrupt vector */
6725                 for (i = 0; i < adapter->num_q_vectors; i++) {
6726                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6727                         if (qv->rx.ring || qv->tx.ring)
6728                                 eics |= BIT_ULL(i);
6729                 }
6730         }
6731
6732         /* Cause software interrupt to ensure rings are cleaned */
6733         ixgbe_irq_rearm_queues(adapter, eics);
6734 }
6735
6736 /**
6737  * ixgbe_watchdog_update_link - update the link status
6738  * @adapter: pointer to the device adapter structure
6739  * @link_speed: pointer to a u32 to store the link_speed
6740  **/
6741 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6742 {
6743         struct ixgbe_hw *hw = &adapter->hw;
6744         u32 link_speed = adapter->link_speed;
6745         bool link_up = adapter->link_up;
6746         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6747
6748         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6749                 return;
6750
6751         if (hw->mac.ops.check_link) {
6752                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6753         } else {
6754                 /* always assume link is up, if no check link function */
6755                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6756                 link_up = true;
6757         }
6758
6759         if (adapter->ixgbe_ieee_pfc)
6760                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6761
6762         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6763                 hw->mac.ops.fc_enable(hw);
6764                 ixgbe_set_rx_drop_en(adapter);
6765         }
6766
6767         if (link_up ||
6768             time_after(jiffies, (adapter->link_check_timeout +
6769                                  IXGBE_TRY_LINK_TIMEOUT))) {
6770                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6771                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6772                 IXGBE_WRITE_FLUSH(hw);
6773         }
6774
6775         adapter->link_up = link_up;
6776         adapter->link_speed = link_speed;
6777 }
6778
6779 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6780 {
6781 #ifdef CONFIG_IXGBE_DCB
6782         struct net_device *netdev = adapter->netdev;
6783         struct dcb_app app = {
6784                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6785                               .protocol = 0,
6786                              };
6787         u8 up = 0;
6788
6789         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6790                 up = dcb_ieee_getapp_mask(netdev, &app);
6791
6792         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6793 #endif
6794 }
6795
6796 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
6797 {
6798         if (netif_is_macvlan(upper)) {
6799                 struct macvlan_dev *vlan = netdev_priv(upper);
6800
6801                 if (vlan->fwd_priv)
6802                         netif_tx_wake_all_queues(upper);
6803         }
6804
6805         return 0;
6806 }
6807
6808 /**
6809  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6810  *                             print link up message
6811  * @adapter: pointer to the device adapter structure
6812  **/
6813 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6814 {
6815         struct net_device *netdev = adapter->netdev;
6816         struct ixgbe_hw *hw = &adapter->hw;
6817         u32 link_speed = adapter->link_speed;
6818         const char *speed_str;
6819         bool flow_rx, flow_tx;
6820
6821         /* only continue if link was previously down */
6822         if (netif_carrier_ok(netdev))
6823                 return;
6824
6825         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6826
6827         switch (hw->mac.type) {
6828         case ixgbe_mac_82598EB: {
6829                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6830                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6831                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6832                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6833         }
6834                 break;
6835         case ixgbe_mac_X540:
6836         case ixgbe_mac_X550:
6837         case ixgbe_mac_X550EM_x:
6838         case ixgbe_mac_x550em_a:
6839         case ixgbe_mac_82599EB: {
6840                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6841                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6842                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6843                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6844         }
6845                 break;
6846         default:
6847                 flow_tx = false;
6848                 flow_rx = false;
6849                 break;
6850         }
6851
6852         adapter->last_rx_ptp_check = jiffies;
6853
6854         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6855                 ixgbe_ptp_start_cyclecounter(adapter);
6856
6857         switch (link_speed) {
6858         case IXGBE_LINK_SPEED_10GB_FULL:
6859                 speed_str = "10 Gbps";
6860                 break;
6861         case IXGBE_LINK_SPEED_2_5GB_FULL:
6862                 speed_str = "2.5 Gbps";
6863                 break;
6864         case IXGBE_LINK_SPEED_1GB_FULL:
6865                 speed_str = "1 Gbps";
6866                 break;
6867         case IXGBE_LINK_SPEED_100_FULL:
6868                 speed_str = "100 Mbps";
6869                 break;
6870         case IXGBE_LINK_SPEED_10_FULL:
6871                 speed_str = "10 Mbps";
6872                 break;
6873         default:
6874                 speed_str = "unknown speed";
6875                 break;
6876         }
6877         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6878                ((flow_rx && flow_tx) ? "RX/TX" :
6879                (flow_rx ? "RX" :
6880                (flow_tx ? "TX" : "None"))));
6881
6882         netif_carrier_on(netdev);
6883         ixgbe_check_vf_rate_limit(adapter);
6884
6885         /* enable transmits */
6886         netif_tx_wake_all_queues(adapter->netdev);
6887
6888         /* enable any upper devices */
6889         rtnl_lock();
6890         netdev_walk_all_upper_dev_rcu(adapter->netdev,
6891                                       ixgbe_enable_macvlan, NULL);
6892         rtnl_unlock();
6893
6894         /* update the default user priority for VFs */
6895         ixgbe_update_default_up(adapter);
6896
6897         /* ping all the active vfs to let them know link has changed */
6898         ixgbe_ping_all_vfs(adapter);
6899 }
6900
6901 /**
6902  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6903  *                               print link down message
6904  * @adapter: pointer to the adapter structure
6905  **/
6906 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6907 {
6908         struct net_device *netdev = adapter->netdev;
6909         struct ixgbe_hw *hw = &adapter->hw;
6910
6911         adapter->link_up = false;
6912         adapter->link_speed = 0;
6913
6914         /* only continue if link was up previously */
6915         if (!netif_carrier_ok(netdev))
6916                 return;
6917
6918         /* poll for SFP+ cable when link is down */
6919         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6920                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6921
6922         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6923                 ixgbe_ptp_start_cyclecounter(adapter);
6924
6925         e_info(drv, "NIC Link is Down\n");
6926         netif_carrier_off(netdev);
6927
6928         /* ping all the active vfs to let them know link has changed */
6929         ixgbe_ping_all_vfs(adapter);
6930 }
6931
6932 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6933 {
6934         int i;
6935
6936         for (i = 0; i < adapter->num_tx_queues; i++) {
6937                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6938
6939                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6940                         return true;
6941         }
6942
6943         return false;
6944 }
6945
6946 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6947 {
6948         struct ixgbe_hw *hw = &adapter->hw;
6949         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6950         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6951
6952         int i, j;
6953
6954         if (!adapter->num_vfs)
6955                 return false;
6956
6957         /* resetting the PF is only needed for MAC before X550 */
6958         if (hw->mac.type >= ixgbe_mac_X550)
6959                 return false;
6960
6961         for (i = 0; i < adapter->num_vfs; i++) {
6962                 for (j = 0; j < q_per_pool; j++) {
6963                         u32 h, t;
6964
6965                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6966                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6967
6968                         if (h != t)
6969                                 return true;
6970                 }
6971         }
6972
6973         return false;
6974 }
6975
6976 /**
6977  * ixgbe_watchdog_flush_tx - flush queues on link down
6978  * @adapter: pointer to the device adapter structure
6979  **/
6980 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6981 {
6982         if (!netif_carrier_ok(adapter->netdev)) {
6983                 if (ixgbe_ring_tx_pending(adapter) ||
6984                     ixgbe_vf_tx_pending(adapter)) {
6985                         /* We've lost link, so the controller stops DMA,
6986                          * but we've got queued Tx work that's never going
6987                          * to get done, so reset controller to flush Tx.
6988                          * (Do the reset outside of interrupt context).
6989                          */
6990                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6991                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6992                 }
6993         }
6994 }
6995
6996 #ifdef CONFIG_PCI_IOV
6997 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6998                                       struct pci_dev *vfdev)
6999 {
7000         if (!pci_wait_for_pending_transaction(vfdev))
7001                 e_dev_warn("Issuing VFLR with pending transactions\n");
7002
7003         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
7004         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
7005
7006         msleep(100);
7007 }
7008
7009 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7010 {
7011         struct ixgbe_hw *hw = &adapter->hw;
7012         struct pci_dev *pdev = adapter->pdev;
7013         unsigned int vf;
7014         u32 gpc;
7015
7016         if (!(netif_carrier_ok(adapter->netdev)))
7017                 return;
7018
7019         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7020         if (gpc) /* If incrementing then no need for the check below */
7021                 return;
7022         /* Check to see if a bad DMA write target from an errant or
7023          * malicious VF has caused a PCIe error.  If so then we can
7024          * issue a VFLR to the offending VF(s) and then resume without
7025          * requesting a full slot reset.
7026          */
7027
7028         if (!pdev)
7029                 return;
7030
7031         /* check status reg for all VFs owned by this PF */
7032         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7033                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7034                 u16 status_reg;
7035
7036                 if (!vfdev)
7037                         continue;
7038                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7039                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7040                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7041                         ixgbe_issue_vf_flr(adapter, vfdev);
7042         }
7043 }
7044
7045 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7046 {
7047         u32 ssvpc;
7048
7049         /* Do not perform spoof check for 82598 or if not in IOV mode */
7050         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7051             adapter->num_vfs == 0)
7052                 return;
7053
7054         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7055
7056         /*
7057          * ssvpc register is cleared on read, if zero then no
7058          * spoofed packets in the last interval.
7059          */
7060         if (!ssvpc)
7061                 return;
7062
7063         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7064 }
7065 #else
7066 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7067 {
7068 }
7069
7070 static void
7071 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7072 {
7073 }
7074 #endif /* CONFIG_PCI_IOV */
7075
7076
7077 /**
7078  * ixgbe_watchdog_subtask - check and bring link up
7079  * @adapter: pointer to the device adapter structure
7080  **/
7081 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7082 {
7083         /* if interface is down, removing or resetting, do nothing */
7084         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7085             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7086             test_bit(__IXGBE_RESETTING, &adapter->state))
7087                 return;
7088
7089         ixgbe_watchdog_update_link(adapter);
7090
7091         if (adapter->link_up)
7092                 ixgbe_watchdog_link_is_up(adapter);
7093         else
7094                 ixgbe_watchdog_link_is_down(adapter);
7095
7096         ixgbe_check_for_bad_vf(adapter);
7097         ixgbe_spoof_check(adapter);
7098         ixgbe_update_stats(adapter);
7099
7100         ixgbe_watchdog_flush_tx(adapter);
7101 }
7102
7103 /**
7104  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7105  * @adapter: the ixgbe adapter structure
7106  **/
7107 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7108 {
7109         struct ixgbe_hw *hw = &adapter->hw;
7110         s32 err;
7111
7112         /* not searching for SFP so there is nothing to do here */
7113         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7114             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7115                 return;
7116
7117         if (adapter->sfp_poll_time &&
7118             time_after(adapter->sfp_poll_time, jiffies))
7119                 return; /* If not yet time to poll for SFP */
7120
7121         /* someone else is in init, wait until next service event */
7122         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7123                 return;
7124
7125         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7126
7127         err = hw->phy.ops.identify_sfp(hw);
7128         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7129                 goto sfp_out;
7130
7131         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7132                 /* If no cable is present, then we need to reset
7133                  * the next time we find a good cable. */
7134                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7135         }
7136
7137         /* exit on error */
7138         if (err)
7139                 goto sfp_out;
7140
7141         /* exit if reset not needed */
7142         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7143                 goto sfp_out;
7144
7145         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7146
7147         /*
7148          * A module may be identified correctly, but the EEPROM may not have
7149          * support for that module.  setup_sfp() will fail in that case, so
7150          * we should not allow that module to load.
7151          */
7152         if (hw->mac.type == ixgbe_mac_82598EB)
7153                 err = hw->phy.ops.reset(hw);
7154         else
7155                 err = hw->mac.ops.setup_sfp(hw);
7156
7157         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7158                 goto sfp_out;
7159
7160         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7161         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7162
7163 sfp_out:
7164         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7165
7166         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7167             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7168                 e_dev_err("failed to initialize because an unsupported "
7169                           "SFP+ module type was detected.\n");
7170                 e_dev_err("Reload the driver after installing a "
7171                           "supported module.\n");
7172                 unregister_netdev(adapter->netdev);
7173         }
7174 }
7175
7176 /**
7177  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7178  * @adapter: the ixgbe adapter structure
7179  **/
7180 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7181 {
7182         struct ixgbe_hw *hw = &adapter->hw;
7183         u32 speed;
7184         bool autoneg = false;
7185
7186         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7187                 return;
7188
7189         /* someone else is in init, wait until next service event */
7190         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7191                 return;
7192
7193         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7194
7195         speed = hw->phy.autoneg_advertised;
7196         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7197                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7198
7199                 /* setup the highest link when no autoneg */
7200                 if (!autoneg) {
7201                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7202                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7203                 }
7204         }
7205
7206         if (hw->mac.ops.setup_link)
7207                 hw->mac.ops.setup_link(hw, speed, true);
7208
7209         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7210         adapter->link_check_timeout = jiffies;
7211         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7212 }
7213
7214 /**
7215  * ixgbe_service_timer - Timer Call-back
7216  * @data: pointer to adapter cast into an unsigned long
7217  **/
7218 static void ixgbe_service_timer(unsigned long data)
7219 {
7220         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7221         unsigned long next_event_offset;
7222
7223         /* poll faster when waiting for link */
7224         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7225                 next_event_offset = HZ / 10;
7226         else
7227                 next_event_offset = HZ * 2;
7228
7229         /* Reset the timer */
7230         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7231
7232         ixgbe_service_event_schedule(adapter);
7233 }
7234
7235 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7236 {
7237         struct ixgbe_hw *hw = &adapter->hw;
7238         u32 status;
7239
7240         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7241                 return;
7242
7243         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7244
7245         if (!hw->phy.ops.handle_lasi)
7246                 return;
7247
7248         status = hw->phy.ops.handle_lasi(&adapter->hw);
7249         if (status != IXGBE_ERR_OVERTEMP)
7250                 return;
7251
7252         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7253 }
7254
7255 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7256 {
7257         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7258                 return;
7259
7260         /* If we're already down, removing or resetting, just bail */
7261         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7262             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7263             test_bit(__IXGBE_RESETTING, &adapter->state))
7264                 return;
7265
7266         ixgbe_dump(adapter);
7267         netdev_err(adapter->netdev, "Reset adapter\n");
7268         adapter->tx_timeout_count++;
7269
7270         rtnl_lock();
7271         ixgbe_reinit_locked(adapter);
7272         rtnl_unlock();
7273 }
7274
7275 /**
7276  * ixgbe_service_task - manages and runs subtasks
7277  * @work: pointer to work_struct containing our data
7278  **/
7279 static void ixgbe_service_task(struct work_struct *work)
7280 {
7281         struct ixgbe_adapter *adapter = container_of(work,
7282                                                      struct ixgbe_adapter,
7283                                                      service_task);
7284         if (ixgbe_removed(adapter->hw.hw_addr)) {
7285                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7286                         rtnl_lock();
7287                         ixgbe_down(adapter);
7288                         rtnl_unlock();
7289                 }
7290                 ixgbe_service_event_complete(adapter);
7291                 return;
7292         }
7293         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7294                 rtnl_lock();
7295                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7296                 udp_tunnel_get_rx_info(adapter->netdev);
7297                 rtnl_unlock();
7298         }
7299         ixgbe_reset_subtask(adapter);
7300         ixgbe_phy_interrupt_subtask(adapter);
7301         ixgbe_sfp_detection_subtask(adapter);
7302         ixgbe_sfp_link_config_subtask(adapter);
7303         ixgbe_check_overtemp_subtask(adapter);
7304         ixgbe_watchdog_subtask(adapter);
7305         ixgbe_fdir_reinit_subtask(adapter);
7306         ixgbe_check_hang_subtask(adapter);
7307
7308         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7309                 ixgbe_ptp_overflow_check(adapter);
7310                 ixgbe_ptp_rx_hang(adapter);
7311         }
7312
7313         ixgbe_service_event_complete(adapter);
7314 }
7315
7316 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7317                      struct ixgbe_tx_buffer *first,
7318                      u8 *hdr_len)
7319 {
7320         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7321         struct sk_buff *skb = first->skb;
7322         union {
7323                 struct iphdr *v4;
7324                 struct ipv6hdr *v6;
7325                 unsigned char *hdr;
7326         } ip;
7327         union {
7328                 struct tcphdr *tcp;
7329                 unsigned char *hdr;
7330         } l4;
7331         u32 paylen, l4_offset;
7332         int err;
7333
7334         if (skb->ip_summed != CHECKSUM_PARTIAL)
7335                 return 0;
7336
7337         if (!skb_is_gso(skb))
7338                 return 0;
7339
7340         err = skb_cow_head(skb, 0);
7341         if (err < 0)
7342                 return err;
7343
7344         ip.hdr = skb_network_header(skb);
7345         l4.hdr = skb_checksum_start(skb);
7346
7347         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7348         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7349
7350         /* initialize outer IP header fields */
7351         if (ip.v4->version == 4) {
7352                 unsigned char *csum_start = skb_checksum_start(skb);
7353                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7354
7355                 /* IP header will have to cancel out any data that
7356                  * is not a part of the outer IP header
7357                  */
7358                 ip.v4->check = csum_fold(csum_partial(trans_start,
7359                                                       csum_start - trans_start,
7360                                                       0));
7361                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7362
7363                 ip.v4->tot_len = 0;
7364                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7365                                    IXGBE_TX_FLAGS_CSUM |
7366                                    IXGBE_TX_FLAGS_IPV4;
7367         } else {
7368                 ip.v6->payload_len = 0;
7369                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7370                                    IXGBE_TX_FLAGS_CSUM;
7371         }
7372
7373         /* determine offset of inner transport header */
7374         l4_offset = l4.hdr - skb->data;
7375
7376         /* compute length of segmentation header */
7377         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7378
7379         /* remove payload length from inner checksum */
7380         paylen = skb->len - l4_offset;
7381         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7382
7383         /* update gso size and bytecount with header size */
7384         first->gso_segs = skb_shinfo(skb)->gso_segs;
7385         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7386
7387         /* mss_l4len_id: use 0 as index for TSO */
7388         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7389         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7390
7391         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7392         vlan_macip_lens = l4.hdr - ip.hdr;
7393         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7394         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7395
7396         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7397                           mss_l4len_idx);
7398
7399         return 1;
7400 }
7401
7402 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7403 {
7404         unsigned int offset = 0;
7405
7406         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7407
7408         return offset == skb_checksum_start_offset(skb);
7409 }
7410
7411 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7412                           struct ixgbe_tx_buffer *first)
7413 {
7414         struct sk_buff *skb = first->skb;
7415         u32 vlan_macip_lens = 0;
7416         u32 type_tucmd = 0;
7417
7418         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7419 csum_failed:
7420                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7421                                          IXGBE_TX_FLAGS_CC)))
7422                         return;
7423                 goto no_csum;
7424         }
7425
7426         switch (skb->csum_offset) {
7427         case offsetof(struct tcphdr, check):
7428                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7429                 /* fall through */
7430         case offsetof(struct udphdr, check):
7431                 break;
7432         case offsetof(struct sctphdr, checksum):
7433                 /* validate that this is actually an SCTP request */
7434                 if (((first->protocol == htons(ETH_P_IP)) &&
7435                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7436                     ((first->protocol == htons(ETH_P_IPV6)) &&
7437                      ixgbe_ipv6_csum_is_sctp(skb))) {
7438                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7439                         break;
7440                 }
7441                 /* fall through */
7442         default:
7443                 skb_checksum_help(skb);
7444                 goto csum_failed;
7445         }
7446
7447         /* update TX checksum flag */
7448         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7449         vlan_macip_lens = skb_checksum_start_offset(skb) -
7450                           skb_network_offset(skb);
7451 no_csum:
7452         /* vlan_macip_lens: MACLEN, VLAN tag */
7453         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7454         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7455
7456         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7457 }
7458
7459 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7460         ((_flag <= _result) ? \
7461          ((u32)(_input & _flag) * (_result / _flag)) : \
7462          ((u32)(_input & _flag) / (_flag / _result)))
7463
7464 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7465 {
7466         /* set type for advanced descriptor with frame checksum insertion */
7467         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7468                        IXGBE_ADVTXD_DCMD_DEXT |
7469                        IXGBE_ADVTXD_DCMD_IFCS;
7470
7471         /* set HW vlan bit if vlan is present */
7472         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7473                                    IXGBE_ADVTXD_DCMD_VLE);
7474
7475         /* set segmentation enable bits for TSO/FSO */
7476         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7477                                    IXGBE_ADVTXD_DCMD_TSE);
7478
7479         /* set timestamp bit if present */
7480         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7481                                    IXGBE_ADVTXD_MAC_TSTAMP);
7482
7483         /* insert frame checksum */
7484         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7485
7486         return cmd_type;
7487 }
7488
7489 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7490                                    u32 tx_flags, unsigned int paylen)
7491 {
7492         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7493
7494         /* enable L4 checksum for TSO and TX checksum offload */
7495         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7496                                         IXGBE_TX_FLAGS_CSUM,
7497                                         IXGBE_ADVTXD_POPTS_TXSM);
7498
7499         /* enble IPv4 checksum for TSO */
7500         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7501                                         IXGBE_TX_FLAGS_IPV4,
7502                                         IXGBE_ADVTXD_POPTS_IXSM);
7503
7504         /*
7505          * Check Context must be set if Tx switch is enabled, which it
7506          * always is for case where virtual functions are running
7507          */
7508         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7509                                         IXGBE_TX_FLAGS_CC,
7510                                         IXGBE_ADVTXD_CC);
7511
7512         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7513 }
7514
7515 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7516 {
7517         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7518
7519         /* Herbert's original patch had:
7520          *  smp_mb__after_netif_stop_queue();
7521          * but since that doesn't exist yet, just open code it.
7522          */
7523         smp_mb();
7524
7525         /* We need to check again in a case another CPU has just
7526          * made room available.
7527          */
7528         if (likely(ixgbe_desc_unused(tx_ring) < size))
7529                 return -EBUSY;
7530
7531         /* A reprieve! - use start_queue because it doesn't call schedule */
7532         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7533         ++tx_ring->tx_stats.restart_queue;
7534         return 0;
7535 }
7536
7537 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7538 {
7539         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7540                 return 0;
7541
7542         return __ixgbe_maybe_stop_tx(tx_ring, size);
7543 }
7544
7545 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7546                        IXGBE_TXD_CMD_RS)
7547
7548 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7549                          struct ixgbe_tx_buffer *first,
7550                          const u8 hdr_len)
7551 {
7552         struct sk_buff *skb = first->skb;
7553         struct ixgbe_tx_buffer *tx_buffer;
7554         union ixgbe_adv_tx_desc *tx_desc;
7555         struct skb_frag_struct *frag;
7556         dma_addr_t dma;
7557         unsigned int data_len, size;
7558         u32 tx_flags = first->tx_flags;
7559         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7560         u16 i = tx_ring->next_to_use;
7561
7562         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7563
7564         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7565
7566         size = skb_headlen(skb);
7567         data_len = skb->data_len;
7568
7569 #ifdef IXGBE_FCOE
7570         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7571                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7572                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7573                         data_len = 0;
7574                 } else {
7575                         data_len -= sizeof(struct fcoe_crc_eof);
7576                 }
7577         }
7578
7579 #endif
7580         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7581
7582         tx_buffer = first;
7583
7584         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7585                 if (dma_mapping_error(tx_ring->dev, dma))
7586                         goto dma_error;
7587
7588                 /* record length, and DMA address */
7589                 dma_unmap_len_set(tx_buffer, len, size);
7590                 dma_unmap_addr_set(tx_buffer, dma, dma);
7591
7592                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7593
7594                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7595                         tx_desc->read.cmd_type_len =
7596                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7597
7598                         i++;
7599                         tx_desc++;
7600                         if (i == tx_ring->count) {
7601                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7602                                 i = 0;
7603                         }
7604                         tx_desc->read.olinfo_status = 0;
7605
7606                         dma += IXGBE_MAX_DATA_PER_TXD;
7607                         size -= IXGBE_MAX_DATA_PER_TXD;
7608
7609                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7610                 }
7611
7612                 if (likely(!data_len))
7613                         break;
7614
7615                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7616
7617                 i++;
7618                 tx_desc++;
7619                 if (i == tx_ring->count) {
7620                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7621                         i = 0;
7622                 }
7623                 tx_desc->read.olinfo_status = 0;
7624
7625 #ifdef IXGBE_FCOE
7626                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7627 #else
7628                 size = skb_frag_size(frag);
7629 #endif
7630                 data_len -= size;
7631
7632                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7633                                        DMA_TO_DEVICE);
7634
7635                 tx_buffer = &tx_ring->tx_buffer_info[i];
7636         }
7637
7638         /* write last descriptor with RS and EOP bits */
7639         cmd_type |= size | IXGBE_TXD_CMD;
7640         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7641
7642         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7643
7644         /* set the timestamp */
7645         first->time_stamp = jiffies;
7646
7647         /*
7648          * Force memory writes to complete before letting h/w know there
7649          * are new descriptors to fetch.  (Only applicable for weak-ordered
7650          * memory model archs, such as IA-64).
7651          *
7652          * We also need this memory barrier to make certain all of the
7653          * status bits have been updated before next_to_watch is written.
7654          */
7655         wmb();
7656
7657         /* set next_to_watch value indicating a packet is present */
7658         first->next_to_watch = tx_desc;
7659
7660         i++;
7661         if (i == tx_ring->count)
7662                 i = 0;
7663
7664         tx_ring->next_to_use = i;
7665
7666         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7667
7668         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7669                 writel(i, tx_ring->tail);
7670
7671                 /* we need this if more than one processor can write to our tail
7672                  * at a time, it synchronizes IO on IA64/Altix systems
7673                  */
7674                 mmiowb();
7675         }
7676
7677         return;
7678 dma_error:
7679         dev_err(tx_ring->dev, "TX DMA map failed\n");
7680
7681         /* clear dma mappings for failed tx_buffer_info map */
7682         for (;;) {
7683                 tx_buffer = &tx_ring->tx_buffer_info[i];
7684                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7685                 if (tx_buffer == first)
7686                         break;
7687                 if (i == 0)
7688                         i = tx_ring->count;
7689                 i--;
7690         }
7691
7692         tx_ring->next_to_use = i;
7693 }
7694
7695 static void ixgbe_atr(struct ixgbe_ring *ring,
7696                       struct ixgbe_tx_buffer *first)
7697 {
7698         struct ixgbe_q_vector *q_vector = ring->q_vector;
7699         union ixgbe_atr_hash_dword input = { .dword = 0 };
7700         union ixgbe_atr_hash_dword common = { .dword = 0 };
7701         union {
7702                 unsigned char *network;
7703                 struct iphdr *ipv4;
7704                 struct ipv6hdr *ipv6;
7705         } hdr;
7706         struct tcphdr *th;
7707         unsigned int hlen;
7708         struct sk_buff *skb;
7709         __be16 vlan_id;
7710         int l4_proto;
7711
7712         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7713         if (!q_vector)
7714                 return;
7715
7716         /* do nothing if sampling is disabled */
7717         if (!ring->atr_sample_rate)
7718                 return;
7719
7720         ring->atr_count++;
7721
7722         /* currently only IPv4/IPv6 with TCP is supported */
7723         if ((first->protocol != htons(ETH_P_IP)) &&
7724             (first->protocol != htons(ETH_P_IPV6)))
7725                 return;
7726
7727         /* snag network header to get L4 type and address */
7728         skb = first->skb;
7729         hdr.network = skb_network_header(skb);
7730         if (unlikely(hdr.network <= skb->data))
7731                 return;
7732         if (skb->encapsulation &&
7733             first->protocol == htons(ETH_P_IP) &&
7734             hdr.ipv4->protocol == IPPROTO_UDP) {
7735                 struct ixgbe_adapter *adapter = q_vector->adapter;
7736
7737                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
7738                              VXLAN_HEADROOM))
7739                         return;
7740
7741                 /* verify the port is recognized as VXLAN */
7742                 if (adapter->vxlan_port &&
7743                     udp_hdr(skb)->dest == adapter->vxlan_port)
7744                         hdr.network = skb_inner_network_header(skb);
7745
7746                 if (adapter->geneve_port &&
7747                     udp_hdr(skb)->dest == adapter->geneve_port)
7748                         hdr.network = skb_inner_network_header(skb);
7749         }
7750
7751         /* Make sure we have at least [minimum IPv4 header + TCP]
7752          * or [IPv6 header] bytes
7753          */
7754         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
7755                 return;
7756
7757         /* Currently only IPv4/IPv6 with TCP is supported */
7758         switch (hdr.ipv4->version) {
7759         case IPVERSION:
7760                 /* access ihl as u8 to avoid unaligned access on ia64 */
7761                 hlen = (hdr.network[0] & 0x0F) << 2;
7762                 l4_proto = hdr.ipv4->protocol;
7763                 break;
7764         case 6:
7765                 hlen = hdr.network - skb->data;
7766                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7767                 hlen -= hdr.network - skb->data;
7768                 break;
7769         default:
7770                 return;
7771         }
7772
7773         if (l4_proto != IPPROTO_TCP)
7774                 return;
7775
7776         if (unlikely(skb_tail_pointer(skb) < hdr.network +
7777                      hlen + sizeof(struct tcphdr)))
7778                 return;
7779
7780         th = (struct tcphdr *)(hdr.network + hlen);
7781
7782         /* skip this packet since the socket is closing */
7783         if (th->fin)
7784                 return;
7785
7786         /* sample on all syn packets or once every atr sample count */
7787         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7788                 return;
7789
7790         /* reset sample count */
7791         ring->atr_count = 0;
7792
7793         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7794
7795         /*
7796          * src and dst are inverted, think how the receiver sees them
7797          *
7798          * The input is broken into two sections, a non-compressed section
7799          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7800          * is XORed together and stored in the compressed dword.
7801          */
7802         input.formatted.vlan_id = vlan_id;
7803
7804         /*
7805          * since src port and flex bytes occupy the same word XOR them together
7806          * and write the value to source port portion of compressed dword
7807          */
7808         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7809                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7810         else
7811                 common.port.src ^= th->dest ^ first->protocol;
7812         common.port.dst ^= th->source;
7813
7814         switch (hdr.ipv4->version) {
7815         case IPVERSION:
7816                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7817                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7818                 break;
7819         case 6:
7820                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7821                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7822                              hdr.ipv6->saddr.s6_addr32[1] ^
7823                              hdr.ipv6->saddr.s6_addr32[2] ^
7824                              hdr.ipv6->saddr.s6_addr32[3] ^
7825                              hdr.ipv6->daddr.s6_addr32[0] ^
7826                              hdr.ipv6->daddr.s6_addr32[1] ^
7827                              hdr.ipv6->daddr.s6_addr32[2] ^
7828                              hdr.ipv6->daddr.s6_addr32[3];
7829                 break;
7830         default:
7831                 break;
7832         }
7833
7834         if (hdr.network != skb_network_header(skb))
7835                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7836
7837         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7838         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7839                                               input, common, ring->queue_index);
7840 }
7841
7842 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7843                               void *accel_priv, select_queue_fallback_t fallback)
7844 {
7845         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7846 #ifdef IXGBE_FCOE
7847         struct ixgbe_adapter *adapter;
7848         struct ixgbe_ring_feature *f;
7849         int txq;
7850 #endif
7851
7852         if (fwd_adapter)
7853                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7854
7855 #ifdef IXGBE_FCOE
7856
7857         /*
7858          * only execute the code below if protocol is FCoE
7859          * or FIP and we have FCoE enabled on the adapter
7860          */
7861         switch (vlan_get_protocol(skb)) {
7862         case htons(ETH_P_FCOE):
7863         case htons(ETH_P_FIP):
7864                 adapter = netdev_priv(dev);
7865
7866                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7867                         break;
7868         default:
7869                 return fallback(dev, skb);
7870         }
7871
7872         f = &adapter->ring_feature[RING_F_FCOE];
7873
7874         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7875                                            smp_processor_id();
7876
7877         while (txq >= f->indices)
7878                 txq -= f->indices;
7879
7880         return txq + f->offset;
7881 #else
7882         return fallback(dev, skb);
7883 #endif
7884 }
7885
7886 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7887                           struct ixgbe_adapter *adapter,
7888                           struct ixgbe_ring *tx_ring)
7889 {
7890         struct ixgbe_tx_buffer *first;
7891         int tso;
7892         u32 tx_flags = 0;
7893         unsigned short f;
7894         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7895         __be16 protocol = skb->protocol;
7896         u8 hdr_len = 0;
7897
7898         /*
7899          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7900          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7901          *       + 2 desc gap to keep tail from touching head,
7902          *       + 1 desc for context descriptor,
7903          * otherwise try next time
7904          */
7905         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7906                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7907
7908         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7909                 tx_ring->tx_stats.tx_busy++;
7910                 return NETDEV_TX_BUSY;
7911         }
7912
7913         /* record the location of the first descriptor for this packet */
7914         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7915         first->skb = skb;
7916         first->bytecount = skb->len;
7917         first->gso_segs = 1;
7918
7919         /* if we have a HW VLAN tag being added default to the HW one */
7920         if (skb_vlan_tag_present(skb)) {
7921                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7922                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7923         /* else if it is a SW VLAN check the next protocol and store the tag */
7924         } else if (protocol == htons(ETH_P_8021Q)) {
7925                 struct vlan_hdr *vhdr, _vhdr;
7926                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7927                 if (!vhdr)
7928                         goto out_drop;
7929
7930                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7931                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7932                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7933         }
7934         protocol = vlan_get_protocol(skb);
7935
7936         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7937             adapter->ptp_clock &&
7938             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7939                                    &adapter->state)) {
7940                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7941                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7942
7943                 /* schedule check for Tx timestamp */
7944                 adapter->ptp_tx_skb = skb_get(skb);
7945                 adapter->ptp_tx_start = jiffies;
7946                 schedule_work(&adapter->ptp_tx_work);
7947         }
7948
7949         skb_tx_timestamp(skb);
7950
7951 #ifdef CONFIG_PCI_IOV
7952         /*
7953          * Use the l2switch_enable flag - would be false if the DMA
7954          * Tx switch had been disabled.
7955          */
7956         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7957                 tx_flags |= IXGBE_TX_FLAGS_CC;
7958
7959 #endif
7960         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7961         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7962             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7963              (skb->priority != TC_PRIO_CONTROL))) {
7964                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7965                 tx_flags |= (skb->priority & 0x7) <<
7966                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7967                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7968                         struct vlan_ethhdr *vhdr;
7969
7970                         if (skb_cow_head(skb, 0))
7971                                 goto out_drop;
7972                         vhdr = (struct vlan_ethhdr *)skb->data;
7973                         vhdr->h_vlan_TCI = htons(tx_flags >>
7974                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7975                 } else {
7976                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7977                 }
7978         }
7979
7980         /* record initial flags and protocol */
7981         first->tx_flags = tx_flags;
7982         first->protocol = protocol;
7983
7984 #ifdef IXGBE_FCOE
7985         /* setup tx offload for FCoE */
7986         if ((protocol == htons(ETH_P_FCOE)) &&
7987             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7988                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7989                 if (tso < 0)
7990                         goto out_drop;
7991
7992                 goto xmit_fcoe;
7993         }
7994
7995 #endif /* IXGBE_FCOE */
7996         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7997         if (tso < 0)
7998                 goto out_drop;
7999         else if (!tso)
8000                 ixgbe_tx_csum(tx_ring, first);
8001
8002         /* add the ATR filter if ATR is on */
8003         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8004                 ixgbe_atr(tx_ring, first);
8005
8006 #ifdef IXGBE_FCOE
8007 xmit_fcoe:
8008 #endif /* IXGBE_FCOE */
8009         ixgbe_tx_map(tx_ring, first, hdr_len);
8010
8011         return NETDEV_TX_OK;
8012
8013 out_drop:
8014         dev_kfree_skb_any(first->skb);
8015         first->skb = NULL;
8016
8017         return NETDEV_TX_OK;
8018 }
8019
8020 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8021                                       struct net_device *netdev,
8022                                       struct ixgbe_ring *ring)
8023 {
8024         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8025         struct ixgbe_ring *tx_ring;
8026
8027         /*
8028          * The minimum packet size for olinfo paylen is 17 so pad the skb
8029          * in order to meet this minimum size requirement.
8030          */
8031         if (skb_put_padto(skb, 17))
8032                 return NETDEV_TX_OK;
8033
8034         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8035
8036         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8037 }
8038
8039 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8040                                     struct net_device *netdev)
8041 {
8042         return __ixgbe_xmit_frame(skb, netdev, NULL);
8043 }
8044
8045 /**
8046  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8047  * @netdev: network interface device structure
8048  * @p: pointer to an address structure
8049  *
8050  * Returns 0 on success, negative on failure
8051  **/
8052 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8053 {
8054         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8055         struct ixgbe_hw *hw = &adapter->hw;
8056         struct sockaddr *addr = p;
8057
8058         if (!is_valid_ether_addr(addr->sa_data))
8059                 return -EADDRNOTAVAIL;
8060
8061         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8062         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8063
8064         ixgbe_mac_set_default_filter(adapter);
8065
8066         return 0;
8067 }
8068
8069 static int
8070 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8071 {
8072         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8073         struct ixgbe_hw *hw = &adapter->hw;
8074         u16 value;
8075         int rc;
8076
8077         if (prtad != hw->phy.mdio.prtad)
8078                 return -EINVAL;
8079         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8080         if (!rc)
8081                 rc = value;
8082         return rc;
8083 }
8084
8085 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8086                             u16 addr, u16 value)
8087 {
8088         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8089         struct ixgbe_hw *hw = &adapter->hw;
8090
8091         if (prtad != hw->phy.mdio.prtad)
8092                 return -EINVAL;
8093         return hw->phy.ops.write_reg(hw, addr, devad, value);
8094 }
8095
8096 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8097 {
8098         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8099
8100         switch (cmd) {
8101         case SIOCSHWTSTAMP:
8102                 return ixgbe_ptp_set_ts_config(adapter, req);
8103         case SIOCGHWTSTAMP:
8104                 return ixgbe_ptp_get_ts_config(adapter, req);
8105         default:
8106                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8107         }
8108 }
8109
8110 /**
8111  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8112  * netdev->dev_addrs
8113  * @netdev: network interface device structure
8114  *
8115  * Returns non-zero on failure
8116  **/
8117 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8118 {
8119         int err = 0;
8120         struct ixgbe_adapter *adapter = netdev_priv(dev);
8121         struct ixgbe_hw *hw = &adapter->hw;
8122
8123         if (is_valid_ether_addr(hw->mac.san_addr)) {
8124                 rtnl_lock();
8125                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8126                 rtnl_unlock();
8127
8128                 /* update SAN MAC vmdq pool selection */
8129                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8130         }
8131         return err;
8132 }
8133
8134 /**
8135  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8136  * netdev->dev_addrs
8137  * @netdev: network interface device structure
8138  *
8139  * Returns non-zero on failure
8140  **/
8141 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8142 {
8143         int err = 0;
8144         struct ixgbe_adapter *adapter = netdev_priv(dev);
8145         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8146
8147         if (is_valid_ether_addr(mac->san_addr)) {
8148                 rtnl_lock();
8149                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8150                 rtnl_unlock();
8151         }
8152         return err;
8153 }
8154
8155 #ifdef CONFIG_NET_POLL_CONTROLLER
8156 /*
8157  * Polling 'interrupt' - used by things like netconsole to send skbs
8158  * without having to re-enable interrupts. It's not called while
8159  * the interrupt routine is executing.
8160  */
8161 static void ixgbe_netpoll(struct net_device *netdev)
8162 {
8163         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8164         int i;
8165
8166         /* if interface is down do nothing */
8167         if (test_bit(__IXGBE_DOWN, &adapter->state))
8168                 return;
8169
8170         /* loop through and schedule all active queues */
8171         for (i = 0; i < adapter->num_q_vectors; i++)
8172                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8173 }
8174
8175 #endif
8176
8177 static void ixgbe_get_stats64(struct net_device *netdev,
8178                               struct rtnl_link_stats64 *stats)
8179 {
8180         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8181         int i;
8182
8183         rcu_read_lock();
8184         for (i = 0; i < adapter->num_rx_queues; i++) {
8185                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8186                 u64 bytes, packets;
8187                 unsigned int start;
8188
8189                 if (ring) {
8190                         do {
8191                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8192                                 packets = ring->stats.packets;
8193                                 bytes   = ring->stats.bytes;
8194                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8195                         stats->rx_packets += packets;
8196                         stats->rx_bytes   += bytes;
8197                 }
8198         }
8199
8200         for (i = 0; i < adapter->num_tx_queues; i++) {
8201                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8202                 u64 bytes, packets;
8203                 unsigned int start;
8204
8205                 if (ring) {
8206                         do {
8207                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8208                                 packets = ring->stats.packets;
8209                                 bytes   = ring->stats.bytes;
8210                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8211                         stats->tx_packets += packets;
8212                         stats->tx_bytes   += bytes;
8213                 }
8214         }
8215         rcu_read_unlock();
8216
8217         /* following stats updated by ixgbe_watchdog_task() */
8218         stats->multicast        = netdev->stats.multicast;
8219         stats->rx_errors        = netdev->stats.rx_errors;
8220         stats->rx_length_errors = netdev->stats.rx_length_errors;
8221         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8222         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8223 }
8224
8225 #ifdef CONFIG_IXGBE_DCB
8226 /**
8227  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8228  * @adapter: pointer to ixgbe_adapter
8229  * @tc: number of traffic classes currently enabled
8230  *
8231  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8232  * 802.1Q priority maps to a packet buffer that exists.
8233  */
8234 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8235 {
8236         struct ixgbe_hw *hw = &adapter->hw;
8237         u32 reg, rsave;
8238         int i;
8239
8240         /* 82598 have a static priority to TC mapping that can not
8241          * be changed so no validation is needed.
8242          */
8243         if (hw->mac.type == ixgbe_mac_82598EB)
8244                 return;
8245
8246         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8247         rsave = reg;
8248
8249         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8250                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8251
8252                 /* If up2tc is out of bounds default to zero */
8253                 if (up2tc > tc)
8254                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8255         }
8256
8257         if (reg != rsave)
8258                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8259
8260         return;
8261 }
8262
8263 /**
8264  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8265  * @adapter: Pointer to adapter struct
8266  *
8267  * Populate the netdev user priority to tc map
8268  */
8269 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8270 {
8271         struct net_device *dev = adapter->netdev;
8272         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8273         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8274         u8 prio;
8275
8276         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8277                 u8 tc = 0;
8278
8279                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8280                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8281                 else if (ets)
8282                         tc = ets->prio_tc[prio];
8283
8284                 netdev_set_prio_tc_map(dev, prio, tc);
8285         }
8286 }
8287
8288 #endif /* CONFIG_IXGBE_DCB */
8289 /**
8290  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8291  *
8292  * @netdev: net device to configure
8293  * @tc: number of traffic classes to enable
8294  */
8295 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8296 {
8297         struct ixgbe_adapter *adapter = netdev_priv(dev);
8298         struct ixgbe_hw *hw = &adapter->hw;
8299         bool pools;
8300
8301         /* Hardware supports up to 8 traffic classes */
8302         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8303                 return -EINVAL;
8304
8305         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8306                 return -EINVAL;
8307
8308         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8309         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8310                 return -EBUSY;
8311
8312         /* Hardware has to reinitialize queues and interrupts to
8313          * match packet buffer alignment. Unfortunately, the
8314          * hardware is not flexible enough to do this dynamically.
8315          */
8316         if (netif_running(dev))
8317                 ixgbe_close(dev);
8318         else
8319                 ixgbe_reset(adapter);
8320
8321         ixgbe_clear_interrupt_scheme(adapter);
8322
8323 #ifdef CONFIG_IXGBE_DCB
8324         if (tc) {
8325                 netdev_set_num_tc(dev, tc);
8326                 ixgbe_set_prio_tc_map(adapter);
8327
8328                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8329
8330                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8331                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8332                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8333                 }
8334         } else {
8335                 netdev_reset_tc(dev);
8336
8337                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8338                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8339
8340                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8341
8342                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8343                 adapter->dcb_cfg.pfc_mode_enable = false;
8344         }
8345
8346         ixgbe_validate_rtr(adapter, tc);
8347
8348 #endif /* CONFIG_IXGBE_DCB */
8349         ixgbe_init_interrupt_scheme(adapter);
8350
8351         if (netif_running(dev))
8352                 return ixgbe_open(dev);
8353
8354         return 0;
8355 }
8356
8357 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8358                                struct tc_cls_u32_offload *cls)
8359 {
8360         u32 hdl = cls->knode.handle;
8361         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8362         u32 loc = cls->knode.handle & 0xfffff;
8363         int err = 0, i, j;
8364         struct ixgbe_jump_table *jump = NULL;
8365
8366         if (loc > IXGBE_MAX_HW_ENTRIES)
8367                 return -EINVAL;
8368
8369         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8370                 return -EINVAL;
8371
8372         /* Clear this filter in the link data it is associated with */
8373         if (uhtid != 0x800) {
8374                 jump = adapter->jump_tables[uhtid];
8375                 if (!jump)
8376                         return -EINVAL;
8377                 if (!test_bit(loc - 1, jump->child_loc_map))
8378                         return -EINVAL;
8379                 clear_bit(loc - 1, jump->child_loc_map);
8380         }
8381
8382         /* Check if the filter being deleted is a link */
8383         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8384                 jump = adapter->jump_tables[i];
8385                 if (jump && jump->link_hdl == hdl) {
8386                         /* Delete filters in the hardware in the child hash
8387                          * table associated with this link
8388                          */
8389                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8390                                 if (!test_bit(j, jump->child_loc_map))
8391                                         continue;
8392                                 spin_lock(&adapter->fdir_perfect_lock);
8393                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8394                                                                       NULL,
8395                                                                       j + 1);
8396                                 spin_unlock(&adapter->fdir_perfect_lock);
8397                                 clear_bit(j, jump->child_loc_map);
8398                         }
8399                         /* Remove resources for this link */
8400                         kfree(jump->input);
8401                         kfree(jump->mask);
8402                         kfree(jump);
8403                         adapter->jump_tables[i] = NULL;
8404                         return err;
8405                 }
8406         }
8407
8408         spin_lock(&adapter->fdir_perfect_lock);
8409         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8410         spin_unlock(&adapter->fdir_perfect_lock);
8411         return err;
8412 }
8413
8414 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8415                                             __be16 protocol,
8416                                             struct tc_cls_u32_offload *cls)
8417 {
8418         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8419
8420         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8421                 return -EINVAL;
8422
8423         /* This ixgbe devices do not support hash tables at the moment
8424          * so abort when given hash tables.
8425          */
8426         if (cls->hnode.divisor > 0)
8427                 return -EINVAL;
8428
8429         set_bit(uhtid - 1, &adapter->tables);
8430         return 0;
8431 }
8432
8433 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8434                                             struct tc_cls_u32_offload *cls)
8435 {
8436         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8437
8438         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8439                 return -EINVAL;
8440
8441         clear_bit(uhtid - 1, &adapter->tables);
8442         return 0;
8443 }
8444
8445 #ifdef CONFIG_NET_CLS_ACT
8446 struct upper_walk_data {
8447         struct ixgbe_adapter *adapter;
8448         u64 action;
8449         int ifindex;
8450         u8 queue;
8451 };
8452
8453 static int get_macvlan_queue(struct net_device *upper, void *_data)
8454 {
8455         if (netif_is_macvlan(upper)) {
8456                 struct macvlan_dev *dfwd = netdev_priv(upper);
8457                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8458                 struct upper_walk_data *data = _data;
8459                 struct ixgbe_adapter *adapter = data->adapter;
8460                 int ifindex = data->ifindex;
8461
8462                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8463                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8464                         data->action = data->queue;
8465                         return 1;
8466                 }
8467         }
8468
8469         return 0;
8470 }
8471
8472 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8473                                   u8 *queue, u64 *action)
8474 {
8475         unsigned int num_vfs = adapter->num_vfs, vf;
8476         struct upper_walk_data data;
8477         struct net_device *upper;
8478
8479         /* redirect to a SRIOV VF */
8480         for (vf = 0; vf < num_vfs; ++vf) {
8481                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8482                 if (upper->ifindex == ifindex) {
8483                         if (adapter->num_rx_pools > 1)
8484                                 *queue = vf * 2;
8485                         else
8486                                 *queue = vf * adapter->num_rx_queues_per_pool;
8487
8488                         *action = vf + 1;
8489                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8490                         return 0;
8491                 }
8492         }
8493
8494         /* redirect to a offloaded macvlan netdev */
8495         data.adapter = adapter;
8496         data.ifindex = ifindex;
8497         data.action = 0;
8498         data.queue = 0;
8499         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8500                                           get_macvlan_queue, &data)) {
8501                 *action = data.action;
8502                 *queue = data.queue;
8503
8504                 return 0;
8505         }
8506
8507         return -EINVAL;
8508 }
8509
8510 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8511                             struct tcf_exts *exts, u64 *action, u8 *queue)
8512 {
8513         const struct tc_action *a;
8514         LIST_HEAD(actions);
8515         int err;
8516
8517         if (tc_no_actions(exts))
8518                 return -EINVAL;
8519
8520         tcf_exts_to_list(exts, &actions);
8521         list_for_each_entry(a, &actions, list) {
8522
8523                 /* Drop action */
8524                 if (is_tcf_gact_shot(a)) {
8525                         *action = IXGBE_FDIR_DROP_QUEUE;
8526                         *queue = IXGBE_FDIR_DROP_QUEUE;
8527                         return 0;
8528                 }
8529
8530                 /* Redirect to a VF or a offloaded macvlan */
8531                 if (is_tcf_mirred_egress_redirect(a)) {
8532                         int ifindex = tcf_mirred_ifindex(a);
8533
8534                         err = handle_redirect_action(adapter, ifindex, queue,
8535                                                      action);
8536                         if (err == 0)
8537                                 return err;
8538                 }
8539         }
8540
8541         return -EINVAL;
8542 }
8543 #else
8544 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8545                             struct tcf_exts *exts, u64 *action, u8 *queue)
8546 {
8547         return -EINVAL;
8548 }
8549 #endif /* CONFIG_NET_CLS_ACT */
8550
8551 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8552                                     union ixgbe_atr_input *mask,
8553                                     struct tc_cls_u32_offload *cls,
8554                                     struct ixgbe_mat_field *field_ptr,
8555                                     struct ixgbe_nexthdr *nexthdr)
8556 {
8557         int i, j, off;
8558         __be32 val, m;
8559         bool found_entry = false, found_jump_field = false;
8560
8561         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8562                 off = cls->knode.sel->keys[i].off;
8563                 val = cls->knode.sel->keys[i].val;
8564                 m = cls->knode.sel->keys[i].mask;
8565
8566                 for (j = 0; field_ptr[j].val; j++) {
8567                         if (field_ptr[j].off == off) {
8568                                 field_ptr[j].val(input, mask, val, m);
8569                                 input->filter.formatted.flow_type |=
8570                                         field_ptr[j].type;
8571                                 found_entry = true;
8572                                 break;
8573                         }
8574                 }
8575                 if (nexthdr) {
8576                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
8577                             nexthdr->val == cls->knode.sel->keys[i].val &&
8578                             nexthdr->mask == cls->knode.sel->keys[i].mask)
8579                                 found_jump_field = true;
8580                         else
8581                                 continue;
8582                 }
8583         }
8584
8585         if (nexthdr && !found_jump_field)
8586                 return -EINVAL;
8587
8588         if (!found_entry)
8589                 return 0;
8590
8591         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8592                                     IXGBE_ATR_L4TYPE_MASK;
8593
8594         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8595                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8596
8597         return 0;
8598 }
8599
8600 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8601                                   __be16 protocol,
8602                                   struct tc_cls_u32_offload *cls)
8603 {
8604         u32 loc = cls->knode.handle & 0xfffff;
8605         struct ixgbe_hw *hw = &adapter->hw;
8606         struct ixgbe_mat_field *field_ptr;
8607         struct ixgbe_fdir_filter *input = NULL;
8608         union ixgbe_atr_input *mask = NULL;
8609         struct ixgbe_jump_table *jump = NULL;
8610         int i, err = -EINVAL;
8611         u8 queue;
8612         u32 uhtid, link_uhtid;
8613
8614         uhtid = TC_U32_USERHTID(cls->knode.handle);
8615         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8616
8617         /* At the moment cls_u32 jumps to network layer and skips past
8618          * L2 headers. The canonical method to match L2 frames is to use
8619          * negative values. However this is error prone at best but really
8620          * just broken because there is no way to "know" what sort of hdr
8621          * is in front of the network layer. Fix cls_u32 to support L2
8622          * headers when needed.
8623          */
8624         if (protocol != htons(ETH_P_IP))
8625                 return err;
8626
8627         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8628                 e_err(drv, "Location out of range\n");
8629                 return err;
8630         }
8631
8632         /* cls u32 is a graph starting at root node 0x800. The driver tracks
8633          * links and also the fields used to advance the parser across each
8634          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8635          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8636          * To add support for new nodes update ixgbe_model.h parse structures
8637          * this function _should_ be generic try not to hardcode values here.
8638          */
8639         if (uhtid == 0x800) {
8640                 field_ptr = (adapter->jump_tables[0])->mat;
8641         } else {
8642                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8643                         return err;
8644                 if (!adapter->jump_tables[uhtid])
8645                         return err;
8646                 field_ptr = (adapter->jump_tables[uhtid])->mat;
8647         }
8648
8649         if (!field_ptr)
8650                 return err;
8651
8652         /* At this point we know the field_ptr is valid and need to either
8653          * build cls_u32 link or attach filter. Because adding a link to
8654          * a handle that does not exist is invalid and the same for adding
8655          * rules to handles that don't exist.
8656          */
8657
8658         if (link_uhtid) {
8659                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8660
8661                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8662                         return err;
8663
8664                 if (!test_bit(link_uhtid - 1, &adapter->tables))
8665                         return err;
8666
8667                 /* Multiple filters as links to the same hash table are not
8668                  * supported. To add a new filter with the same next header
8669                  * but different match/jump conditions, create a new hash table
8670                  * and link to it.
8671                  */
8672                 if (adapter->jump_tables[link_uhtid] &&
8673                     (adapter->jump_tables[link_uhtid])->link_hdl) {
8674                         e_err(drv, "Link filter exists for link: %x\n",
8675                               link_uhtid);
8676                         return err;
8677                 }
8678
8679                 for (i = 0; nexthdr[i].jump; i++) {
8680                         if (nexthdr[i].o != cls->knode.sel->offoff ||
8681                             nexthdr[i].s != cls->knode.sel->offshift ||
8682                             nexthdr[i].m != cls->knode.sel->offmask)
8683                                 return err;
8684
8685                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8686                         if (!jump)
8687                                 return -ENOMEM;
8688                         input = kzalloc(sizeof(*input), GFP_KERNEL);
8689                         if (!input) {
8690                                 err = -ENOMEM;
8691                                 goto free_jump;
8692                         }
8693                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8694                         if (!mask) {
8695                                 err = -ENOMEM;
8696                                 goto free_input;
8697                         }
8698                         jump->input = input;
8699                         jump->mask = mask;
8700                         jump->link_hdl = cls->knode.handle;
8701
8702                         err = ixgbe_clsu32_build_input(input, mask, cls,
8703                                                        field_ptr, &nexthdr[i]);
8704                         if (!err) {
8705                                 jump->mat = nexthdr[i].jump;
8706                                 adapter->jump_tables[link_uhtid] = jump;
8707                                 break;
8708                         }
8709                 }
8710                 return 0;
8711         }
8712
8713         input = kzalloc(sizeof(*input), GFP_KERNEL);
8714         if (!input)
8715                 return -ENOMEM;
8716         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8717         if (!mask) {
8718                 err = -ENOMEM;
8719                 goto free_input;
8720         }
8721
8722         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8723                 if ((adapter->jump_tables[uhtid])->input)
8724                         memcpy(input, (adapter->jump_tables[uhtid])->input,
8725                                sizeof(*input));
8726                 if ((adapter->jump_tables[uhtid])->mask)
8727                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8728                                sizeof(*mask));
8729
8730                 /* Lookup in all child hash tables if this location is already
8731                  * filled with a filter
8732                  */
8733                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8734                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
8735
8736                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
8737                                 e_err(drv, "Filter exists in location: %x\n",
8738                                       loc);
8739                                 err = -EINVAL;
8740                                 goto err_out;
8741                         }
8742                 }
8743         }
8744         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8745         if (err)
8746                 goto err_out;
8747
8748         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8749                                &queue);
8750         if (err < 0)
8751                 goto err_out;
8752
8753         input->sw_idx = loc;
8754
8755         spin_lock(&adapter->fdir_perfect_lock);
8756
8757         if (hlist_empty(&adapter->fdir_filter_list)) {
8758                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8759                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8760                 if (err)
8761                         goto err_out_w_lock;
8762         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8763                 err = -EINVAL;
8764                 goto err_out_w_lock;
8765         }
8766
8767         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8768         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8769                                                     input->sw_idx, queue);
8770         if (!err)
8771                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8772         spin_unlock(&adapter->fdir_perfect_lock);
8773
8774         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8775                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8776
8777         kfree(mask);
8778         return err;
8779 err_out_w_lock:
8780         spin_unlock(&adapter->fdir_perfect_lock);
8781 err_out:
8782         kfree(mask);
8783 free_input:
8784         kfree(input);
8785 free_jump:
8786         kfree(jump);
8787         return err;
8788 }
8789
8790 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8791                             struct tc_to_netdev *tc)
8792 {
8793         struct ixgbe_adapter *adapter = netdev_priv(dev);
8794
8795         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8796             tc->type == TC_SETUP_CLSU32) {
8797                 switch (tc->cls_u32->command) {
8798                 case TC_CLSU32_NEW_KNODE:
8799                 case TC_CLSU32_REPLACE_KNODE:
8800                         return ixgbe_configure_clsu32(adapter,
8801                                                       proto, tc->cls_u32);
8802                 case TC_CLSU32_DELETE_KNODE:
8803                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8804                 case TC_CLSU32_NEW_HNODE:
8805                 case TC_CLSU32_REPLACE_HNODE:
8806                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8807                                                                 tc->cls_u32);
8808                 case TC_CLSU32_DELETE_HNODE:
8809                         return ixgbe_configure_clsu32_del_hnode(adapter,
8810                                                                 tc->cls_u32);
8811                 default:
8812                         return -EINVAL;
8813                 }
8814         }
8815
8816         if (tc->type != TC_SETUP_MQPRIO)
8817                 return -EINVAL;
8818
8819         return ixgbe_setup_tc(dev, tc->tc);
8820 }
8821
8822 #ifdef CONFIG_PCI_IOV
8823 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8824 {
8825         struct net_device *netdev = adapter->netdev;
8826
8827         rtnl_lock();
8828         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8829         rtnl_unlock();
8830 }
8831
8832 #endif
8833 void ixgbe_do_reset(struct net_device *netdev)
8834 {
8835         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8836
8837         if (netif_running(netdev))
8838                 ixgbe_reinit_locked(adapter);
8839         else
8840                 ixgbe_reset(adapter);
8841 }
8842
8843 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8844                                             netdev_features_t features)
8845 {
8846         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8847
8848         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8849         if (!(features & NETIF_F_RXCSUM))
8850                 features &= ~NETIF_F_LRO;
8851
8852         /* Turn off LRO if not RSC capable */
8853         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8854                 features &= ~NETIF_F_LRO;
8855
8856         return features;
8857 }
8858
8859 static int ixgbe_set_features(struct net_device *netdev,
8860                               netdev_features_t features)
8861 {
8862         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8863         netdev_features_t changed = netdev->features ^ features;
8864         bool need_reset = false;
8865
8866         /* Make sure RSC matches LRO, reset if change */
8867         if (!(features & NETIF_F_LRO)) {
8868                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8869                         need_reset = true;
8870                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8871         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8872                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8873                 if (adapter->rx_itr_setting == 1 ||
8874                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8875                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8876                         need_reset = true;
8877                 } else if ((changed ^ features) & NETIF_F_LRO) {
8878                         e_info(probe, "rx-usecs set too low, "
8879                                "disabling RSC\n");
8880                 }
8881         }
8882
8883         /*
8884          * Check if Flow Director n-tuple support or hw_tc support was
8885          * enabled or disabled.  If the state changed, we need to reset.
8886          */
8887         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8888                 /* turn off ATR, enable perfect filters and reset */
8889                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8890                         need_reset = true;
8891
8892                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8893                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8894         } else {
8895                 /* turn off perfect filters, enable ATR and reset */
8896                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8897                         need_reset = true;
8898
8899                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8900
8901                 /* We cannot enable ATR if SR-IOV is enabled */
8902                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8903                     /* We cannot enable ATR if we have 2 or more tcs */
8904                     (netdev_get_num_tc(netdev) > 1) ||
8905                     /* We cannot enable ATR if RSS is disabled */
8906                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8907                     /* A sample rate of 0 indicates ATR disabled */
8908                     (!adapter->atr_sample_rate))
8909                         ; /* do nothing not supported */
8910                 else /* otherwise supported and set the flag */
8911                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8912         }
8913
8914         if (changed & NETIF_F_RXALL)
8915                 need_reset = true;
8916
8917         netdev->features = features;
8918
8919         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8920                 if (features & NETIF_F_RXCSUM) {
8921                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8922                 } else {
8923                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8924
8925                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8926                 }
8927         }
8928
8929         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
8930                 if (features & NETIF_F_RXCSUM) {
8931                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8932                 } else {
8933                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8934
8935                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8936                 }
8937         }
8938
8939         if (need_reset)
8940                 ixgbe_do_reset(netdev);
8941         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8942                             NETIF_F_HW_VLAN_CTAG_FILTER))
8943                 ixgbe_set_rx_mode(netdev);
8944
8945         return 0;
8946 }
8947
8948 /**
8949  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
8950  * @dev: The port's netdev
8951  * @ti: Tunnel endpoint information
8952  **/
8953 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
8954                                       struct udp_tunnel_info *ti)
8955 {
8956         struct ixgbe_adapter *adapter = netdev_priv(dev);
8957         struct ixgbe_hw *hw = &adapter->hw;
8958         __be16 port = ti->port;
8959         u32 port_shift = 0;
8960         u32 reg;
8961
8962         if (ti->sa_family != AF_INET)
8963                 return;
8964
8965         switch (ti->type) {
8966         case UDP_TUNNEL_TYPE_VXLAN:
8967                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8968                         return;
8969
8970                 if (adapter->vxlan_port == port)
8971                         return;
8972
8973                 if (adapter->vxlan_port) {
8974                         netdev_info(dev,
8975                                     "VXLAN port %d set, not adding port %d\n",
8976                                     ntohs(adapter->vxlan_port),
8977                                     ntohs(port));
8978                         return;
8979                 }
8980
8981                 adapter->vxlan_port = port;
8982                 break;
8983         case UDP_TUNNEL_TYPE_GENEVE:
8984                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8985                         return;
8986
8987                 if (adapter->geneve_port == port)
8988                         return;
8989
8990                 if (adapter->geneve_port) {
8991                         netdev_info(dev,
8992                                     "GENEVE port %d set, not adding port %d\n",
8993                                     ntohs(adapter->geneve_port),
8994                                     ntohs(port));
8995                         return;
8996                 }
8997
8998                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
8999                 adapter->geneve_port = port;
9000                 break;
9001         default:
9002                 return;
9003         }
9004
9005         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9006         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9007 }
9008
9009 /**
9010  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9011  * @dev: The port's netdev
9012  * @ti: Tunnel endpoint information
9013  **/
9014 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9015                                       struct udp_tunnel_info *ti)
9016 {
9017         struct ixgbe_adapter *adapter = netdev_priv(dev);
9018         u32 port_mask;
9019
9020         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9021             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9022                 return;
9023
9024         if (ti->sa_family != AF_INET)
9025                 return;
9026
9027         switch (ti->type) {
9028         case UDP_TUNNEL_TYPE_VXLAN:
9029                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9030                         return;
9031
9032                 if (adapter->vxlan_port != ti->port) {
9033                         netdev_info(dev, "VXLAN port %d not found\n",
9034                                     ntohs(ti->port));
9035                         return;
9036                 }
9037
9038                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9039                 break;
9040         case UDP_TUNNEL_TYPE_GENEVE:
9041                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9042                         return;
9043
9044                 if (adapter->geneve_port != ti->port) {
9045                         netdev_info(dev, "GENEVE port %d not found\n",
9046                                     ntohs(ti->port));
9047                         return;
9048                 }
9049
9050                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9051                 break;
9052         default:
9053                 return;
9054         }
9055
9056         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9057         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9058 }
9059
9060 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9061                              struct net_device *dev,
9062                              const unsigned char *addr, u16 vid,
9063                              u16 flags)
9064 {
9065         /* guarantee we can provide a unique filter for the unicast address */
9066         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9067                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9068                 u16 pool = VMDQ_P(0);
9069
9070                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9071                         return -ENOMEM;
9072         }
9073
9074         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9075 }
9076
9077 /**
9078  * ixgbe_configure_bridge_mode - set various bridge modes
9079  * @adapter - the private structure
9080  * @mode - requested bridge mode
9081  *
9082  * Configure some settings require for various bridge modes.
9083  **/
9084 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9085                                        __u16 mode)
9086 {
9087         struct ixgbe_hw *hw = &adapter->hw;
9088         unsigned int p, num_pools;
9089         u32 vmdctl;
9090
9091         switch (mode) {
9092         case BRIDGE_MODE_VEPA:
9093                 /* disable Tx loopback, rely on switch hairpin mode */
9094                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9095
9096                 /* must enable Rx switching replication to allow multicast
9097                  * packet reception on all VFs, and to enable source address
9098                  * pruning.
9099                  */
9100                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9101                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9102                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9103
9104                 /* enable Rx source address pruning. Note, this requires
9105                  * replication to be enabled or else it does nothing.
9106                  */
9107                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9108                 for (p = 0; p < num_pools; p++) {
9109                         if (hw->mac.ops.set_source_address_pruning)
9110                                 hw->mac.ops.set_source_address_pruning(hw,
9111                                                                        true,
9112                                                                        p);
9113                 }
9114                 break;
9115         case BRIDGE_MODE_VEB:
9116                 /* enable Tx loopback for internal VF/PF communication */
9117                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9118                                 IXGBE_PFDTXGSWC_VT_LBEN);
9119
9120                 /* disable Rx switching replication unless we have SR-IOV
9121                  * virtual functions
9122                  */
9123                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9124                 if (!adapter->num_vfs)
9125                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9126                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9127
9128                 /* disable Rx source address pruning, since we don't expect to
9129                  * be receiving external loopback of our transmitted frames.
9130                  */
9131                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9132                 for (p = 0; p < num_pools; p++) {
9133                         if (hw->mac.ops.set_source_address_pruning)
9134                                 hw->mac.ops.set_source_address_pruning(hw,
9135                                                                        false,
9136                                                                        p);
9137                 }
9138                 break;
9139         default:
9140                 return -EINVAL;
9141         }
9142
9143         adapter->bridge_mode = mode;
9144
9145         e_info(drv, "enabling bridge mode: %s\n",
9146                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9147
9148         return 0;
9149 }
9150
9151 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9152                                     struct nlmsghdr *nlh, u16 flags)
9153 {
9154         struct ixgbe_adapter *adapter = netdev_priv(dev);
9155         struct nlattr *attr, *br_spec;
9156         int rem;
9157
9158         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9159                 return -EOPNOTSUPP;
9160
9161         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9162         if (!br_spec)
9163                 return -EINVAL;
9164
9165         nla_for_each_nested(attr, br_spec, rem) {
9166                 int status;
9167                 __u16 mode;
9168
9169                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9170                         continue;
9171
9172                 if (nla_len(attr) < sizeof(mode))
9173                         return -EINVAL;
9174
9175                 mode = nla_get_u16(attr);
9176                 status = ixgbe_configure_bridge_mode(adapter, mode);
9177                 if (status)
9178                         return status;
9179
9180                 break;
9181         }
9182
9183         return 0;
9184 }
9185
9186 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9187                                     struct net_device *dev,
9188                                     u32 filter_mask, int nlflags)
9189 {
9190         struct ixgbe_adapter *adapter = netdev_priv(dev);
9191
9192         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9193                 return 0;
9194
9195         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9196                                        adapter->bridge_mode, 0, 0, nlflags,
9197                                        filter_mask, NULL);
9198 }
9199
9200 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9201 {
9202         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9203         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9204         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9205         unsigned int limit;
9206         int pool, err;
9207
9208         /* Hardware has a limited number of available pools. Each VF, and the
9209          * PF require a pool. Check to ensure we don't attempt to use more
9210          * then the available number of pools.
9211          */
9212         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9213                 return ERR_PTR(-EINVAL);
9214
9215 #ifdef CONFIG_RPS
9216         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9217                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9218                             vdev->name);
9219                 return ERR_PTR(-EINVAL);
9220         }
9221 #endif
9222         /* Check for hardware restriction on number of rx/tx queues */
9223         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9224             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9225                 netdev_info(pdev,
9226                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9227                             pdev->name);
9228                 return ERR_PTR(-EINVAL);
9229         }
9230
9231         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9232               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9233             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9234                 return ERR_PTR(-EBUSY);
9235
9236         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9237         if (!fwd_adapter)
9238                 return ERR_PTR(-ENOMEM);
9239
9240         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9241         adapter->num_rx_pools++;
9242         set_bit(pool, &adapter->fwd_bitmask);
9243         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9244
9245         /* Enable VMDq flag so device will be set in VM mode */
9246         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9247         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9248         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9249
9250         /* Force reinit of ring allocation with VMDQ enabled */
9251         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9252         if (err)
9253                 goto fwd_add_err;
9254         fwd_adapter->pool = pool;
9255         fwd_adapter->real_adapter = adapter;
9256
9257         if (netif_running(pdev)) {
9258                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9259                 if (err)
9260                         goto fwd_add_err;
9261                 netif_tx_start_all_queues(vdev);
9262         }
9263
9264         return fwd_adapter;
9265 fwd_add_err:
9266         /* unwind counter and free adapter struct */
9267         netdev_info(pdev,
9268                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9269         clear_bit(pool, &adapter->fwd_bitmask);
9270         adapter->num_rx_pools--;
9271         kfree(fwd_adapter);
9272         return ERR_PTR(err);
9273 }
9274
9275 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9276 {
9277         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9278         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9279         unsigned int limit;
9280
9281         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9282         adapter->num_rx_pools--;
9283
9284         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9285         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9286         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9287         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9288         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9289                    fwd_adapter->pool, adapter->num_rx_pools,
9290                    fwd_adapter->rx_base_queue,
9291                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9292                    adapter->fwd_bitmask);
9293         kfree(fwd_adapter);
9294 }
9295
9296 #define IXGBE_MAX_MAC_HDR_LEN           127
9297 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9298
9299 static netdev_features_t
9300 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9301                      netdev_features_t features)
9302 {
9303         unsigned int network_hdr_len, mac_hdr_len;
9304
9305         /* Make certain the headers can be described by a context descriptor */
9306         mac_hdr_len = skb_network_header(skb) - skb->data;
9307         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9308                 return features & ~(NETIF_F_HW_CSUM |
9309                                     NETIF_F_SCTP_CRC |
9310                                     NETIF_F_HW_VLAN_CTAG_TX |
9311                                     NETIF_F_TSO |
9312                                     NETIF_F_TSO6);
9313
9314         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9315         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9316                 return features & ~(NETIF_F_HW_CSUM |
9317                                     NETIF_F_SCTP_CRC |
9318                                     NETIF_F_TSO |
9319                                     NETIF_F_TSO6);
9320
9321         /* We can only support IPV4 TSO in tunnels if we can mangle the
9322          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9323          */
9324         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9325                 features &= ~NETIF_F_TSO;
9326
9327         return features;
9328 }
9329
9330 static const struct net_device_ops ixgbe_netdev_ops = {
9331         .ndo_open               = ixgbe_open,
9332         .ndo_stop               = ixgbe_close,
9333         .ndo_start_xmit         = ixgbe_xmit_frame,
9334         .ndo_select_queue       = ixgbe_select_queue,
9335         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9336         .ndo_validate_addr      = eth_validate_addr,
9337         .ndo_set_mac_address    = ixgbe_set_mac,
9338         .ndo_change_mtu         = ixgbe_change_mtu,
9339         .ndo_tx_timeout         = ixgbe_tx_timeout,
9340         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9341         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9342         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9343         .ndo_do_ioctl           = ixgbe_ioctl,
9344         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9345         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9346         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9347         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9348         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9349         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9350         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9351         .ndo_get_stats64        = ixgbe_get_stats64,
9352         .ndo_setup_tc           = __ixgbe_setup_tc,
9353 #ifdef CONFIG_NET_POLL_CONTROLLER
9354         .ndo_poll_controller    = ixgbe_netpoll,
9355 #endif
9356 #ifdef CONFIG_NET_RX_BUSY_POLL
9357         .ndo_busy_poll          = ixgbe_low_latency_recv,
9358 #endif
9359 #ifdef IXGBE_FCOE
9360         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9361         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9362         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9363         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9364         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9365         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9366         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9367 #endif /* IXGBE_FCOE */
9368         .ndo_set_features = ixgbe_set_features,
9369         .ndo_fix_features = ixgbe_fix_features,
9370         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9371         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9372         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9373         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9374         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9375         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9376         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
9377         .ndo_features_check     = ixgbe_features_check,
9378 };
9379
9380 /**
9381  * ixgbe_enumerate_functions - Get the number of ports this device has
9382  * @adapter: adapter structure
9383  *
9384  * This function enumerates the phsyical functions co-located on a single slot,
9385  * in order to determine how many ports a device has. This is most useful in
9386  * determining the required GT/s of PCIe bandwidth necessary for optimal
9387  * performance.
9388  **/
9389 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9390 {
9391         struct pci_dev *entry, *pdev = adapter->pdev;
9392         int physfns = 0;
9393
9394         /* Some cards can not use the generic count PCIe functions method,
9395          * because they are behind a parent switch, so we hardcode these with
9396          * the correct number of functions.
9397          */
9398         if (ixgbe_pcie_from_parent(&adapter->hw))
9399                 physfns = 4;
9400
9401         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9402                 /* don't count virtual functions */
9403                 if (entry->is_virtfn)
9404                         continue;
9405
9406                 /* When the devices on the bus don't all match our device ID,
9407                  * we can't reliably determine the correct number of
9408                  * functions. This can occur if a function has been direct
9409                  * attached to a virtual machine using VT-d, for example. In
9410                  * this case, simply return -1 to indicate this.
9411                  */
9412                 if ((entry->vendor != pdev->vendor) ||
9413                     (entry->device != pdev->device))
9414                         return -1;
9415
9416                 physfns++;
9417         }
9418
9419         return physfns;
9420 }
9421
9422 /**
9423  * ixgbe_wol_supported - Check whether device supports WoL
9424  * @adapter: the adapter private structure
9425  * @device_id: the device ID
9426  * @subdev_id: the subsystem device ID
9427  *
9428  * This function is used by probe and ethtool to determine
9429  * which devices have WoL support
9430  *
9431  **/
9432 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9433                          u16 subdevice_id)
9434 {
9435         struct ixgbe_hw *hw = &adapter->hw;
9436         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9437
9438         /* WOL not supported on 82598 */
9439         if (hw->mac.type == ixgbe_mac_82598EB)
9440                 return false;
9441
9442         /* check eeprom to see if WOL is enabled for X540 and newer */
9443         if (hw->mac.type >= ixgbe_mac_X540) {
9444                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9445                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9446                      (hw->bus.func == 0)))
9447                         return true;
9448         }
9449
9450         /* WOL is determined based on device IDs for 82599 MACs */
9451         switch (device_id) {
9452         case IXGBE_DEV_ID_82599_SFP:
9453                 /* Only these subdevices could supports WOL */
9454                 switch (subdevice_id) {
9455                 case IXGBE_SUBDEV_ID_82599_560FLR:
9456                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9457                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9458                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9459                         /* only support first port */
9460                         if (hw->bus.func != 0)
9461                                 break;
9462                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9463                 case IXGBE_SUBDEV_ID_82599_SFP:
9464                 case IXGBE_SUBDEV_ID_82599_RNDC:
9465                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9466                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9467                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9468                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9469                         return true;
9470                 }
9471                 break;
9472         case IXGBE_DEV_ID_82599EN_SFP:
9473                 /* Only these subdevices support WOL */
9474                 switch (subdevice_id) {
9475                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9476                         return true;
9477                 }
9478                 break;
9479         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9480                 /* All except this subdevice support WOL */
9481                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9482                         return true;
9483                 break;
9484         case IXGBE_DEV_ID_82599_KX4:
9485                 return  true;
9486         default:
9487                 break;
9488         }
9489
9490         return false;
9491 }
9492
9493 /**
9494  * ixgbe_probe - Device Initialization Routine
9495  * @pdev: PCI device information struct
9496  * @ent: entry in ixgbe_pci_tbl
9497  *
9498  * Returns 0 on success, negative on failure
9499  *
9500  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9501  * The OS initialization, configuring of the adapter private structure,
9502  * and a hardware reset occur.
9503  **/
9504 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9505 {
9506         struct net_device *netdev;
9507         struct ixgbe_adapter *adapter = NULL;
9508         struct ixgbe_hw *hw;
9509         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9510         int i, err, pci_using_dac, expected_gts;
9511         unsigned int indices = MAX_TX_QUEUES;
9512         u8 part_str[IXGBE_PBANUM_LENGTH];
9513         bool disable_dev = false;
9514 #ifdef IXGBE_FCOE
9515         u16 device_caps;
9516 #endif
9517         u32 eec;
9518
9519         /* Catch broken hardware that put the wrong VF device ID in
9520          * the PCIe SR-IOV capability.
9521          */
9522         if (pdev->is_virtfn) {
9523                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9524                      pci_name(pdev), pdev->vendor, pdev->device);
9525                 return -EINVAL;
9526         }
9527
9528         err = pci_enable_device_mem(pdev);
9529         if (err)
9530                 return err;
9531
9532         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9533                 pci_using_dac = 1;
9534         } else {
9535                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9536                 if (err) {
9537                         dev_err(&pdev->dev,
9538                                 "No usable DMA configuration, aborting\n");
9539                         goto err_dma;
9540                 }
9541                 pci_using_dac = 0;
9542         }
9543
9544         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9545         if (err) {
9546                 dev_err(&pdev->dev,
9547                         "pci_request_selected_regions failed 0x%x\n", err);
9548                 goto err_pci_reg;
9549         }
9550
9551         pci_enable_pcie_error_reporting(pdev);
9552
9553         pci_set_master(pdev);
9554         pci_save_state(pdev);
9555
9556         if (ii->mac == ixgbe_mac_82598EB) {
9557 #ifdef CONFIG_IXGBE_DCB
9558                 /* 8 TC w/ 4 queues per TC */
9559                 indices = 4 * MAX_TRAFFIC_CLASS;
9560 #else
9561                 indices = IXGBE_MAX_RSS_INDICES;
9562 #endif
9563         }
9564
9565         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9566         if (!netdev) {
9567                 err = -ENOMEM;
9568                 goto err_alloc_etherdev;
9569         }
9570
9571         SET_NETDEV_DEV(netdev, &pdev->dev);
9572
9573         adapter = netdev_priv(netdev);
9574
9575         adapter->netdev = netdev;
9576         adapter->pdev = pdev;
9577         hw = &adapter->hw;
9578         hw->back = adapter;
9579         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9580
9581         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9582                               pci_resource_len(pdev, 0));
9583         adapter->io_addr = hw->hw_addr;
9584         if (!hw->hw_addr) {
9585                 err = -EIO;
9586                 goto err_ioremap;
9587         }
9588
9589         netdev->netdev_ops = &ixgbe_netdev_ops;
9590         ixgbe_set_ethtool_ops(netdev);
9591         netdev->watchdog_timeo = 5 * HZ;
9592         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9593
9594         /* Setup hw api */
9595         hw->mac.ops   = *ii->mac_ops;
9596         hw->mac.type  = ii->mac;
9597         hw->mvals     = ii->mvals;
9598         if (ii->link_ops)
9599                 hw->link.ops  = *ii->link_ops;
9600
9601         /* EEPROM */
9602         hw->eeprom.ops = *ii->eeprom_ops;
9603         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9604         if (ixgbe_removed(hw->hw_addr)) {
9605                 err = -EIO;
9606                 goto err_ioremap;
9607         }
9608         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9609         if (!(eec & BIT(8)))
9610                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9611
9612         /* PHY */
9613         hw->phy.ops = *ii->phy_ops;
9614         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9615         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9616         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9617         hw->phy.mdio.mmds = 0;
9618         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9619         hw->phy.mdio.dev = netdev;
9620         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9621         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9622
9623         /* setup the private structure */
9624         err = ixgbe_sw_init(adapter, ii);
9625         if (err)
9626                 goto err_sw_init;
9627
9628         /* Make sure the SWFW semaphore is in a valid state */
9629         if (hw->mac.ops.init_swfw_sync)
9630                 hw->mac.ops.init_swfw_sync(hw);
9631
9632         /* Make it possible the adapter to be woken up via WOL */
9633         switch (adapter->hw.mac.type) {
9634         case ixgbe_mac_82599EB:
9635         case ixgbe_mac_X540:
9636         case ixgbe_mac_X550:
9637         case ixgbe_mac_X550EM_x:
9638         case ixgbe_mac_x550em_a:
9639                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9640                 break;
9641         default:
9642                 break;
9643         }
9644
9645         /*
9646          * If there is a fan on this device and it has failed log the
9647          * failure.
9648          */
9649         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9650                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9651                 if (esdp & IXGBE_ESDP_SDP1)
9652                         e_crit(probe, "Fan has stopped, replace the adapter\n");
9653         }
9654
9655         if (allow_unsupported_sfp)
9656                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9657
9658         /* reset_hw fills in the perm_addr as well */
9659         hw->phy.reset_if_overtemp = true;
9660         err = hw->mac.ops.reset_hw(hw);
9661         hw->phy.reset_if_overtemp = false;
9662         ixgbe_set_eee_capable(adapter);
9663         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9664                 err = 0;
9665         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9666                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9667                 e_dev_err("Reload the driver after installing a supported module.\n");
9668                 goto err_sw_init;
9669         } else if (err) {
9670                 e_dev_err("HW Init failed: %d\n", err);
9671                 goto err_sw_init;
9672         }
9673
9674 #ifdef CONFIG_PCI_IOV
9675         /* SR-IOV not supported on the 82598 */
9676         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9677                 goto skip_sriov;
9678         /* Mailbox */
9679         ixgbe_init_mbx_params_pf(hw);
9680         hw->mbx.ops = ii->mbx_ops;
9681         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9682         ixgbe_enable_sriov(adapter);
9683 skip_sriov:
9684
9685 #endif
9686         netdev->features = NETIF_F_SG |
9687                            NETIF_F_TSO |
9688                            NETIF_F_TSO6 |
9689                            NETIF_F_RXHASH |
9690                            NETIF_F_RXCSUM |
9691                            NETIF_F_HW_CSUM;
9692
9693 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9694                                     NETIF_F_GSO_GRE_CSUM | \
9695                                     NETIF_F_GSO_IPXIP4 | \
9696                                     NETIF_F_GSO_IPXIP6 | \
9697                                     NETIF_F_GSO_UDP_TUNNEL | \
9698                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
9699
9700         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9701         netdev->features |= NETIF_F_GSO_PARTIAL |
9702                             IXGBE_GSO_PARTIAL_FEATURES;
9703
9704         if (hw->mac.type >= ixgbe_mac_82599EB)
9705                 netdev->features |= NETIF_F_SCTP_CRC;
9706
9707         /* copy netdev features into list of user selectable features */
9708         netdev->hw_features |= netdev->features |
9709                                NETIF_F_HW_VLAN_CTAG_FILTER |
9710                                NETIF_F_HW_VLAN_CTAG_RX |
9711                                NETIF_F_HW_VLAN_CTAG_TX |
9712                                NETIF_F_RXALL |
9713                                NETIF_F_HW_L2FW_DOFFLOAD;
9714
9715         if (hw->mac.type >= ixgbe_mac_82599EB)
9716                 netdev->hw_features |= NETIF_F_NTUPLE |
9717                                        NETIF_F_HW_TC;
9718
9719         if (pci_using_dac)
9720                 netdev->features |= NETIF_F_HIGHDMA;
9721
9722         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9723         netdev->hw_enc_features |= netdev->vlan_features;
9724         netdev->mpls_features |= NETIF_F_HW_CSUM;
9725
9726         /* set this bit last since it cannot be part of vlan_features */
9727         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9728                             NETIF_F_HW_VLAN_CTAG_RX |
9729                             NETIF_F_HW_VLAN_CTAG_TX;
9730
9731         netdev->priv_flags |= IFF_UNICAST_FLT;
9732         netdev->priv_flags |= IFF_SUPP_NOFCS;
9733
9734         /* MTU range: 68 - 9710 */
9735         netdev->min_mtu = ETH_MIN_MTU;
9736         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
9737
9738 #ifdef CONFIG_IXGBE_DCB
9739         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9740                 netdev->dcbnl_ops = &dcbnl_ops;
9741 #endif
9742
9743 #ifdef IXGBE_FCOE
9744         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9745                 unsigned int fcoe_l;
9746
9747                 if (hw->mac.ops.get_device_caps) {
9748                         hw->mac.ops.get_device_caps(hw, &device_caps);
9749                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9750                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9751                 }
9752
9753
9754                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9755                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9756
9757                 netdev->features |= NETIF_F_FSO |
9758                                     NETIF_F_FCOE_CRC;
9759
9760                 netdev->vlan_features |= NETIF_F_FSO |
9761                                          NETIF_F_FCOE_CRC |
9762                                          NETIF_F_FCOE_MTU;
9763         }
9764 #endif /* IXGBE_FCOE */
9765
9766         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9767                 netdev->hw_features |= NETIF_F_LRO;
9768         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9769                 netdev->features |= NETIF_F_LRO;
9770
9771         /* make sure the EEPROM is good */
9772         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9773                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9774                 err = -EIO;
9775                 goto err_sw_init;
9776         }
9777
9778         eth_platform_get_mac_address(&adapter->pdev->dev,
9779                                      adapter->hw.mac.perm_addr);
9780
9781         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9782
9783         if (!is_valid_ether_addr(netdev->dev_addr)) {
9784                 e_dev_err("invalid MAC address\n");
9785                 err = -EIO;
9786                 goto err_sw_init;
9787         }
9788
9789         /* Set hw->mac.addr to permanent MAC address */
9790         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9791         ixgbe_mac_set_default_filter(adapter);
9792
9793         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9794                     (unsigned long) adapter);
9795
9796         if (ixgbe_removed(hw->hw_addr)) {
9797                 err = -EIO;
9798                 goto err_sw_init;
9799         }
9800         INIT_WORK(&adapter->service_task, ixgbe_service_task);
9801         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9802         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9803
9804         err = ixgbe_init_interrupt_scheme(adapter);
9805         if (err)
9806                 goto err_sw_init;
9807
9808         /* WOL not supported for all devices */
9809         adapter->wol = 0;
9810         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9811         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9812                                                 pdev->subsystem_device);
9813         if (hw->wol_enabled)
9814                 adapter->wol = IXGBE_WUFC_MAG;
9815
9816         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9817
9818         /* save off EEPROM version number */
9819         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9820         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9821
9822         /* pick up the PCI bus settings for reporting later */
9823         if (ixgbe_pcie_from_parent(hw))
9824                 ixgbe_get_parent_bus_info(adapter);
9825         else
9826                  hw->mac.ops.get_bus_info(hw);
9827
9828         /* calculate the expected PCIe bandwidth required for optimal
9829          * performance. Note that some older parts will never have enough
9830          * bandwidth due to being older generation PCIe parts. We clamp these
9831          * parts to ensure no warning is displayed if it can't be fixed.
9832          */
9833         switch (hw->mac.type) {
9834         case ixgbe_mac_82598EB:
9835                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9836                 break;
9837         default:
9838                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9839                 break;
9840         }
9841
9842         /* don't check link if we failed to enumerate functions */
9843         if (expected_gts > 0)
9844                 ixgbe_check_minimum_link(adapter, expected_gts);
9845
9846         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9847         if (err)
9848                 strlcpy(part_str, "Unknown", sizeof(part_str));
9849         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9850                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9851                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9852                            part_str);
9853         else
9854                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9855                            hw->mac.type, hw->phy.type, part_str);
9856
9857         e_dev_info("%pM\n", netdev->dev_addr);
9858
9859         /* reset the hardware with the new settings */
9860         err = hw->mac.ops.start_hw(hw);
9861         if (err == IXGBE_ERR_EEPROM_VERSION) {
9862                 /* We are running on a pre-production device, log a warning */
9863                 e_dev_warn("This device is a pre-production adapter/LOM. "
9864                            "Please be aware there may be issues associated "
9865                            "with your hardware.  If you are experiencing "
9866                            "problems please contact your Intel or hardware "
9867                            "representative who provided you with this "
9868                            "hardware.\n");
9869         }
9870         strcpy(netdev->name, "eth%d");
9871         err = register_netdev(netdev);
9872         if (err)
9873                 goto err_register;
9874
9875         pci_set_drvdata(pdev, adapter);
9876
9877         /* power down the optics for 82599 SFP+ fiber */
9878         if (hw->mac.ops.disable_tx_laser)
9879                 hw->mac.ops.disable_tx_laser(hw);
9880
9881         /* carrier off reporting is important to ethtool even BEFORE open */
9882         netif_carrier_off(netdev);
9883
9884 #ifdef CONFIG_IXGBE_DCA
9885         if (dca_add_requester(&pdev->dev) == 0) {
9886                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9887                 ixgbe_setup_dca(adapter);
9888         }
9889 #endif
9890         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9891                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9892                 for (i = 0; i < adapter->num_vfs; i++)
9893                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
9894         }
9895
9896         /* firmware requires driver version to be 0xFFFFFFFF
9897          * since os does not support feature
9898          */
9899         if (hw->mac.ops.set_fw_drv_ver)
9900                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
9901                                            sizeof(ixgbe_driver_version) - 1,
9902                                            ixgbe_driver_version);
9903
9904         /* add san mac addr to netdev */
9905         ixgbe_add_sanmac_netdev(netdev);
9906
9907         e_dev_info("%s\n", ixgbe_default_device_descr);
9908
9909 #ifdef CONFIG_IXGBE_HWMON
9910         if (ixgbe_sysfs_init(adapter))
9911                 e_err(probe, "failed to allocate sysfs resources\n");
9912 #endif /* CONFIG_IXGBE_HWMON */
9913
9914         ixgbe_dbg_adapter_init(adapter);
9915
9916         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9917         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9918                 hw->mac.ops.setup_link(hw,
9919                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9920                         true);
9921
9922         return 0;
9923
9924 err_register:
9925         ixgbe_release_hw_control(adapter);
9926         ixgbe_clear_interrupt_scheme(adapter);
9927 err_sw_init:
9928         ixgbe_disable_sriov(adapter);
9929         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9930         iounmap(adapter->io_addr);
9931         kfree(adapter->jump_tables[0]);
9932         kfree(adapter->mac_table);
9933 err_ioremap:
9934         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9935         free_netdev(netdev);
9936 err_alloc_etherdev:
9937         pci_release_mem_regions(pdev);
9938 err_pci_reg:
9939 err_dma:
9940         if (!adapter || disable_dev)
9941                 pci_disable_device(pdev);
9942         return err;
9943 }
9944
9945 /**
9946  * ixgbe_remove - Device Removal Routine
9947  * @pdev: PCI device information struct
9948  *
9949  * ixgbe_remove is called by the PCI subsystem to alert the driver
9950  * that it should release a PCI device.  The could be caused by a
9951  * Hot-Plug event, or because the driver is going to be removed from
9952  * memory.
9953  **/
9954 static void ixgbe_remove(struct pci_dev *pdev)
9955 {
9956         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9957         struct net_device *netdev;
9958         bool disable_dev;
9959         int i;
9960
9961         /* if !adapter then we already cleaned up in probe */
9962         if (!adapter)
9963                 return;
9964
9965         netdev  = adapter->netdev;
9966         ixgbe_dbg_adapter_exit(adapter);
9967
9968         set_bit(__IXGBE_REMOVING, &adapter->state);
9969         cancel_work_sync(&adapter->service_task);
9970
9971
9972 #ifdef CONFIG_IXGBE_DCA
9973         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9974                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9975                 dca_remove_requester(&pdev->dev);
9976                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9977                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9978         }
9979
9980 #endif
9981 #ifdef CONFIG_IXGBE_HWMON
9982         ixgbe_sysfs_exit(adapter);
9983 #endif /* CONFIG_IXGBE_HWMON */
9984
9985         /* remove the added san mac */
9986         ixgbe_del_sanmac_netdev(netdev);
9987
9988 #ifdef CONFIG_PCI_IOV
9989         ixgbe_disable_sriov(adapter);
9990 #endif
9991         if (netdev->reg_state == NETREG_REGISTERED)
9992                 unregister_netdev(netdev);
9993
9994         ixgbe_clear_interrupt_scheme(adapter);
9995
9996         ixgbe_release_hw_control(adapter);
9997
9998 #ifdef CONFIG_DCB
9999         kfree(adapter->ixgbe_ieee_pfc);
10000         kfree(adapter->ixgbe_ieee_ets);
10001
10002 #endif
10003         iounmap(adapter->io_addr);
10004         pci_release_mem_regions(pdev);
10005
10006         e_dev_info("complete\n");
10007
10008         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10009                 if (adapter->jump_tables[i]) {
10010                         kfree(adapter->jump_tables[i]->input);
10011                         kfree(adapter->jump_tables[i]->mask);
10012                 }
10013                 kfree(adapter->jump_tables[i]);
10014         }
10015
10016         kfree(adapter->mac_table);
10017         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10018         free_netdev(netdev);
10019
10020         pci_disable_pcie_error_reporting(pdev);
10021
10022         if (disable_dev)
10023                 pci_disable_device(pdev);
10024 }
10025
10026 /**
10027  * ixgbe_io_error_detected - called when PCI error is detected
10028  * @pdev: Pointer to PCI device
10029  * @state: The current pci connection state
10030  *
10031  * This function is called after a PCI bus error affecting
10032  * this device has been detected.
10033  */
10034 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10035                                                 pci_channel_state_t state)
10036 {
10037         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10038         struct net_device *netdev = adapter->netdev;
10039
10040 #ifdef CONFIG_PCI_IOV
10041         struct ixgbe_hw *hw = &adapter->hw;
10042         struct pci_dev *bdev, *vfdev;
10043         u32 dw0, dw1, dw2, dw3;
10044         int vf, pos;
10045         u16 req_id, pf_func;
10046
10047         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10048             adapter->num_vfs == 0)
10049                 goto skip_bad_vf_detection;
10050
10051         bdev = pdev->bus->self;
10052         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10053                 bdev = bdev->bus->self;
10054
10055         if (!bdev)
10056                 goto skip_bad_vf_detection;
10057
10058         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10059         if (!pos)
10060                 goto skip_bad_vf_detection;
10061
10062         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10063         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10064         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10065         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10066         if (ixgbe_removed(hw->hw_addr))
10067                 goto skip_bad_vf_detection;
10068
10069         req_id = dw1 >> 16;
10070         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10071         if (!(req_id & 0x0080))
10072                 goto skip_bad_vf_detection;
10073
10074         pf_func = req_id & 0x01;
10075         if ((pf_func & 1) == (pdev->devfn & 1)) {
10076                 unsigned int device_id;
10077
10078                 vf = (req_id & 0x7F) >> 1;
10079                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10080                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10081                                 "%8.8x\tdw3: %8.8x\n",
10082                 dw0, dw1, dw2, dw3);
10083                 switch (adapter->hw.mac.type) {
10084                 case ixgbe_mac_82599EB:
10085                         device_id = IXGBE_82599_VF_DEVICE_ID;
10086                         break;
10087                 case ixgbe_mac_X540:
10088                         device_id = IXGBE_X540_VF_DEVICE_ID;
10089                         break;
10090                 case ixgbe_mac_X550:
10091                         device_id = IXGBE_DEV_ID_X550_VF;
10092                         break;
10093                 case ixgbe_mac_X550EM_x:
10094                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10095                         break;
10096                 case ixgbe_mac_x550em_a:
10097                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10098                         break;
10099                 default:
10100                         device_id = 0;
10101                         break;
10102                 }
10103
10104                 /* Find the pci device of the offending VF */
10105                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10106                 while (vfdev) {
10107                         if (vfdev->devfn == (req_id & 0xFF))
10108                                 break;
10109                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10110                                                device_id, vfdev);
10111                 }
10112                 /*
10113                  * There's a slim chance the VF could have been hot plugged,
10114                  * so if it is no longer present we don't need to issue the
10115                  * VFLR.  Just clean up the AER in that case.
10116                  */
10117                 if (vfdev) {
10118                         ixgbe_issue_vf_flr(adapter, vfdev);
10119                         /* Free device reference count */
10120                         pci_dev_put(vfdev);
10121                 }
10122
10123                 pci_cleanup_aer_uncorrect_error_status(pdev);
10124         }
10125
10126         /*
10127          * Even though the error may have occurred on the other port
10128          * we still need to increment the vf error reference count for
10129          * both ports because the I/O resume function will be called
10130          * for both of them.
10131          */
10132         adapter->vferr_refcount++;
10133
10134         return PCI_ERS_RESULT_RECOVERED;
10135
10136 skip_bad_vf_detection:
10137 #endif /* CONFIG_PCI_IOV */
10138         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10139                 return PCI_ERS_RESULT_DISCONNECT;
10140
10141         rtnl_lock();
10142         netif_device_detach(netdev);
10143
10144         if (state == pci_channel_io_perm_failure) {
10145                 rtnl_unlock();
10146                 return PCI_ERS_RESULT_DISCONNECT;
10147         }
10148
10149         if (netif_running(netdev))
10150                 ixgbe_close_suspend(adapter);
10151
10152         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10153                 pci_disable_device(pdev);
10154         rtnl_unlock();
10155
10156         /* Request a slot reset. */
10157         return PCI_ERS_RESULT_NEED_RESET;
10158 }
10159
10160 /**
10161  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10162  * @pdev: Pointer to PCI device
10163  *
10164  * Restart the card from scratch, as if from a cold-boot.
10165  */
10166 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10167 {
10168         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10169         pci_ers_result_t result;
10170         int err;
10171
10172         if (pci_enable_device_mem(pdev)) {
10173                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10174                 result = PCI_ERS_RESULT_DISCONNECT;
10175         } else {
10176                 smp_mb__before_atomic();
10177                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10178                 adapter->hw.hw_addr = adapter->io_addr;
10179                 pci_set_master(pdev);
10180                 pci_restore_state(pdev);
10181                 pci_save_state(pdev);
10182
10183                 pci_wake_from_d3(pdev, false);
10184
10185                 ixgbe_reset(adapter);
10186                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10187                 result = PCI_ERS_RESULT_RECOVERED;
10188         }
10189
10190         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10191         if (err) {
10192                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10193                           "failed 0x%0x\n", err);
10194                 /* non-fatal, continue */
10195         }
10196
10197         return result;
10198 }
10199
10200 /**
10201  * ixgbe_io_resume - called when traffic can start flowing again.
10202  * @pdev: Pointer to PCI device
10203  *
10204  * This callback is called when the error recovery driver tells us that
10205  * its OK to resume normal operation.
10206  */
10207 static void ixgbe_io_resume(struct pci_dev *pdev)
10208 {
10209         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10210         struct net_device *netdev = adapter->netdev;
10211
10212 #ifdef CONFIG_PCI_IOV
10213         if (adapter->vferr_refcount) {
10214                 e_info(drv, "Resuming after VF err\n");
10215                 adapter->vferr_refcount--;
10216                 return;
10217         }
10218
10219 #endif
10220         rtnl_lock();
10221         if (netif_running(netdev))
10222                 ixgbe_open(netdev);
10223
10224         netif_device_attach(netdev);
10225         rtnl_unlock();
10226 }
10227
10228 static const struct pci_error_handlers ixgbe_err_handler = {
10229         .error_detected = ixgbe_io_error_detected,
10230         .slot_reset = ixgbe_io_slot_reset,
10231         .resume = ixgbe_io_resume,
10232 };
10233
10234 static struct pci_driver ixgbe_driver = {
10235         .name     = ixgbe_driver_name,
10236         .id_table = ixgbe_pci_tbl,
10237         .probe    = ixgbe_probe,
10238         .remove   = ixgbe_remove,
10239 #ifdef CONFIG_PM
10240         .suspend  = ixgbe_suspend,
10241         .resume   = ixgbe_resume,
10242 #endif
10243         .shutdown = ixgbe_shutdown,
10244         .sriov_configure = ixgbe_pci_sriov_configure,
10245         .err_handler = &ixgbe_err_handler
10246 };
10247
10248 /**
10249  * ixgbe_init_module - Driver Registration Routine
10250  *
10251  * ixgbe_init_module is the first routine called when the driver is
10252  * loaded. All it does is register with the PCI subsystem.
10253  **/
10254 static int __init ixgbe_init_module(void)
10255 {
10256         int ret;
10257         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10258         pr_info("%s\n", ixgbe_copyright);
10259
10260         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10261         if (!ixgbe_wq) {
10262                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10263                 return -ENOMEM;
10264         }
10265
10266         ixgbe_dbg_init();
10267
10268         ret = pci_register_driver(&ixgbe_driver);
10269         if (ret) {
10270                 destroy_workqueue(ixgbe_wq);
10271                 ixgbe_dbg_exit();
10272                 return ret;
10273         }
10274
10275 #ifdef CONFIG_IXGBE_DCA
10276         dca_register_notify(&dca_notifier);
10277 #endif
10278
10279         return 0;
10280 }
10281
10282 module_init(ixgbe_init_module);
10283
10284 /**
10285  * ixgbe_exit_module - Driver Exit Cleanup Routine
10286  *
10287  * ixgbe_exit_module is called just before the driver is removed
10288  * from memory.
10289  **/
10290 static void __exit ixgbe_exit_module(void)
10291 {
10292 #ifdef CONFIG_IXGBE_DCA
10293         dca_unregister_notify(&dca_notifier);
10294 #endif
10295         pci_unregister_driver(&ixgbe_driver);
10296
10297         ixgbe_dbg_exit();
10298         if (ixgbe_wq) {
10299                 destroy_workqueue(ixgbe_wq);
10300                 ixgbe_wq = NULL;
10301         }
10302 }
10303
10304 #ifdef CONFIG_IXGBE_DCA
10305 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10306                             void *p)
10307 {
10308         int ret_val;
10309
10310         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10311                                          __ixgbe_notify_dca);
10312
10313         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10314 }
10315
10316 #endif /* CONFIG_IXGBE_DCA */
10317
10318 module_exit(ixgbe_exit_module);
10319
10320 /* ixgbe_main.c */