1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/udp_tunnel.h>
54 #include <net/pkt_cls.h>
55 #include <net/tc_act/tc_gact.h>
56 #include <net/tc_act/tc_mirred.h>
59 #include "ixgbe_common.h"
60 #include "ixgbe_dcb_82599.h"
61 #include "ixgbe_sriov.h"
62 #include "ixgbe_model.h"
64 char ixgbe_driver_name[] = "ixgbe";
65 static const char ixgbe_driver_string[] =
66 "Intel(R) 10 Gigabit PCI Express Network Driver";
68 char ixgbe_default_device_descr[] =
69 "Intel(R) 10 Gigabit Network Connection";
71 static char ixgbe_default_device_descr[] =
72 "Intel(R) 10 Gigabit Network Connection";
74 #define DRV_VERSION "4.4.0-k"
75 const char ixgbe_driver_version[] = DRV_VERSION;
76 static const char ixgbe_copyright[] =
77 "Copyright (c) 1999-2016 Intel Corporation.";
79 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
81 static const struct ixgbe_info *ixgbe_info_tbl[] = {
82 [board_82598] = &ixgbe_82598_info,
83 [board_82599] = &ixgbe_82599_info,
84 [board_X540] = &ixgbe_X540_info,
85 [board_X550] = &ixgbe_X550_info,
86 [board_X550EM_x] = &ixgbe_X550EM_x_info,
87 [board_x550em_a] = &ixgbe_x550em_a_info,
90 /* ixgbe_pci_tbl - PCI Device ID Table
92 * Wildcard entries (PCI_ANY_ID) should come last
93 * Last entry must be all 0s
95 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
96 * Class, Class Mask, private data (not used) }
98 static const struct pci_device_id ixgbe_pci_tbl[] = {
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
141 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
142 /* required last entry */
145 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
147 #ifdef CONFIG_IXGBE_DCA
148 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
150 static struct notifier_block dca_notifier = {
151 .notifier_call = ixgbe_notify_dca,
157 #ifdef CONFIG_PCI_IOV
158 static unsigned int max_vfs;
159 module_param(max_vfs, uint, 0);
160 MODULE_PARM_DESC(max_vfs,
161 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
162 #endif /* CONFIG_PCI_IOV */
164 static unsigned int allow_unsupported_sfp;
165 module_param(allow_unsupported_sfp, uint, 0);
166 MODULE_PARM_DESC(allow_unsupported_sfp,
167 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
169 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
170 static int debug = -1;
171 module_param(debug, int, 0);
172 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
174 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
175 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
176 MODULE_LICENSE("GPL");
177 MODULE_VERSION(DRV_VERSION);
179 static struct workqueue_struct *ixgbe_wq;
181 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
183 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
186 struct pci_dev *parent_dev;
187 struct pci_bus *parent_bus;
189 parent_bus = adapter->pdev->bus->parent;
193 parent_dev = parent_bus->self;
197 if (!pci_is_pcie(parent_dev))
200 pcie_capability_read_word(parent_dev, reg, value);
201 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
202 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
207 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
209 struct ixgbe_hw *hw = &adapter->hw;
213 hw->bus.type = ixgbe_bus_type_pci_express;
215 /* Get the negotiated link width and speed from PCI config space of the
216 * parent, as this device is behind a switch
218 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
220 /* assume caller will handle error case */
224 hw->bus.width = ixgbe_convert_bus_width(link_status);
225 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
231 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
232 * @hw: hw specific details
234 * This function is used by probe to determine whether a device's PCI-Express
235 * bandwidth details should be gathered from the parent bus instead of from the
236 * device. Used to ensure that various locations all have the correct device ID
239 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
241 switch (hw->device_id) {
242 case IXGBE_DEV_ID_82599_SFP_SF_QP:
243 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
250 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
253 struct ixgbe_hw *hw = &adapter->hw;
255 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
256 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
257 struct pci_dev *pdev;
259 /* Some devices are not connected over PCIe and thus do not negotiate
260 * speed. These devices do not have valid bus info, and thus any report
261 * we generate may not be correct.
263 if (hw->bus.type == ixgbe_bus_type_internal)
266 /* determine whether to use the parent device */
267 if (ixgbe_pcie_from_parent(&adapter->hw))
268 pdev = adapter->pdev->bus->parent->self;
270 pdev = adapter->pdev;
272 if (pcie_get_minimum_link(pdev, &speed, &width) ||
273 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
274 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
279 case PCIE_SPEED_2_5GT:
280 /* 8b/10b encoding reduces max throughput by 20% */
283 case PCIE_SPEED_5_0GT:
284 /* 8b/10b encoding reduces max throughput by 20% */
287 case PCIE_SPEED_8_0GT:
288 /* 128b/130b encoding reduces throughput by less than 2% */
292 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
296 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
298 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
299 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
300 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
301 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
304 (speed == PCIE_SPEED_2_5GT ? "20%" :
305 speed == PCIE_SPEED_5_0GT ? "20%" :
306 speed == PCIE_SPEED_8_0GT ? "<2%" :
309 if (max_gts < expected_gts) {
310 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
311 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
313 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
317 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
319 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
320 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
321 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
322 queue_work(ixgbe_wq, &adapter->service_task);
325 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
327 struct ixgbe_adapter *adapter = hw->back;
332 e_dev_err("Adapter removed\n");
333 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
334 ixgbe_service_event_schedule(adapter);
337 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
341 /* The following check not only optimizes a bit by not
342 * performing a read on the status register when the
343 * register just read was a status register read that
344 * returned IXGBE_FAILED_READ_REG. It also blocks any
345 * potential recursion.
347 if (reg == IXGBE_STATUS) {
348 ixgbe_remove_adapter(hw);
351 value = ixgbe_read_reg(hw, IXGBE_STATUS);
352 if (value == IXGBE_FAILED_READ_REG)
353 ixgbe_remove_adapter(hw);
357 * ixgbe_read_reg - Read from device register
358 * @hw: hw specific details
359 * @reg: offset of register to read
361 * Returns : value read or IXGBE_FAILED_READ_REG if removed
363 * This function is used to read device registers. It checks for device
364 * removal by confirming any read that returns all ones by checking the
365 * status register value for all ones. This function avoids reading from
366 * the hardware if a removal was previously detected in which case it
367 * returns IXGBE_FAILED_READ_REG (all ones).
369 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
371 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
374 if (ixgbe_removed(reg_addr))
375 return IXGBE_FAILED_READ_REG;
376 if (unlikely(hw->phy.nw_mng_if_sel &
377 IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
378 struct ixgbe_adapter *adapter;
381 for (i = 0; i < 200; ++i) {
382 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
384 goto writes_completed;
385 if (value == IXGBE_FAILED_READ_REG) {
386 ixgbe_remove_adapter(hw);
387 return IXGBE_FAILED_READ_REG;
393 e_warn(hw, "register writes incomplete %08x\n", value);
397 value = readl(reg_addr + reg);
398 if (unlikely(value == IXGBE_FAILED_READ_REG))
399 ixgbe_check_remove(hw, reg);
403 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
407 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
408 if (value == IXGBE_FAILED_READ_CFG_WORD) {
409 ixgbe_remove_adapter(hw);
415 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
417 struct ixgbe_adapter *adapter = hw->back;
420 if (ixgbe_removed(hw->hw_addr))
421 return IXGBE_FAILED_READ_CFG_WORD;
422 pci_read_config_word(adapter->pdev, reg, &value);
423 if (value == IXGBE_FAILED_READ_CFG_WORD &&
424 ixgbe_check_cfg_remove(hw, adapter->pdev))
425 return IXGBE_FAILED_READ_CFG_WORD;
429 #ifdef CONFIG_PCI_IOV
430 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
432 struct ixgbe_adapter *adapter = hw->back;
435 if (ixgbe_removed(hw->hw_addr))
436 return IXGBE_FAILED_READ_CFG_DWORD;
437 pci_read_config_dword(adapter->pdev, reg, &value);
438 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
439 ixgbe_check_cfg_remove(hw, adapter->pdev))
440 return IXGBE_FAILED_READ_CFG_DWORD;
443 #endif /* CONFIG_PCI_IOV */
445 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
447 struct ixgbe_adapter *adapter = hw->back;
449 if (ixgbe_removed(hw->hw_addr))
451 pci_write_config_word(adapter->pdev, reg, value);
454 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
456 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
458 /* flush memory to make sure state is correct before next watchdog */
459 smp_mb__before_atomic();
460 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
463 struct ixgbe_reg_info {
468 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
470 /* General Registers */
471 {IXGBE_CTRL, "CTRL"},
472 {IXGBE_STATUS, "STATUS"},
473 {IXGBE_CTRL_EXT, "CTRL_EXT"},
475 /* Interrupt Registers */
476 {IXGBE_EICR, "EICR"},
479 {IXGBE_SRRCTL(0), "SRRCTL"},
480 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
481 {IXGBE_RDLEN(0), "RDLEN"},
482 {IXGBE_RDH(0), "RDH"},
483 {IXGBE_RDT(0), "RDT"},
484 {IXGBE_RXDCTL(0), "RXDCTL"},
485 {IXGBE_RDBAL(0), "RDBAL"},
486 {IXGBE_RDBAH(0), "RDBAH"},
489 {IXGBE_TDBAL(0), "TDBAL"},
490 {IXGBE_TDBAH(0), "TDBAH"},
491 {IXGBE_TDLEN(0), "TDLEN"},
492 {IXGBE_TDH(0), "TDH"},
493 {IXGBE_TDT(0), "TDT"},
494 {IXGBE_TXDCTL(0), "TXDCTL"},
496 /* List Terminator */
502 * ixgbe_regdump - register printout routine
504 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
510 switch (reginfo->ofs) {
511 case IXGBE_SRRCTL(0):
512 for (i = 0; i < 64; i++)
513 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
515 case IXGBE_DCA_RXCTRL(0):
516 for (i = 0; i < 64; i++)
517 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
520 for (i = 0; i < 64; i++)
521 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
524 for (i = 0; i < 64; i++)
525 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
528 for (i = 0; i < 64; i++)
529 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
531 case IXGBE_RXDCTL(0):
532 for (i = 0; i < 64; i++)
533 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
536 for (i = 0; i < 64; i++)
537 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
540 for (i = 0; i < 64; i++)
541 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
544 for (i = 0; i < 64; i++)
545 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
548 for (i = 0; i < 64; i++)
549 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
552 for (i = 0; i < 64; i++)
553 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
556 for (i = 0; i < 64; i++)
557 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
560 for (i = 0; i < 64; i++)
561 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
563 case IXGBE_TXDCTL(0):
564 for (i = 0; i < 64; i++)
565 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
568 pr_info("%-15s %08x\n", reginfo->name,
569 IXGBE_READ_REG(hw, reginfo->ofs));
573 for (i = 0; i < 8; i++) {
574 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
575 pr_err("%-15s", rname);
576 for (j = 0; j < 8; j++)
577 pr_cont(" %08x", regs[i*8+j]);
584 * ixgbe_dump - Print registers, tx-rings and rx-rings
586 static void ixgbe_dump(struct ixgbe_adapter *adapter)
588 struct net_device *netdev = adapter->netdev;
589 struct ixgbe_hw *hw = &adapter->hw;
590 struct ixgbe_reg_info *reginfo;
592 struct ixgbe_ring *tx_ring;
593 struct ixgbe_tx_buffer *tx_buffer;
594 union ixgbe_adv_tx_desc *tx_desc;
595 struct my_u0 { u64 a; u64 b; } *u0;
596 struct ixgbe_ring *rx_ring;
597 union ixgbe_adv_rx_desc *rx_desc;
598 struct ixgbe_rx_buffer *rx_buffer_info;
602 if (!netif_msg_hw(adapter))
605 /* Print netdevice Info */
607 dev_info(&adapter->pdev->dev, "Net device Info\n");
608 pr_info("Device Name state "
609 "trans_start last_rx\n");
610 pr_info("%-15s %016lX %016lX %016lX\n",
613 dev_trans_start(netdev),
617 /* Print Registers */
618 dev_info(&adapter->pdev->dev, "Register Dump\n");
619 pr_info(" Register Name Value\n");
620 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
621 reginfo->name; reginfo++) {
622 ixgbe_regdump(hw, reginfo);
625 /* Print TX Ring Summary */
626 if (!netdev || !netif_running(netdev))
629 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
630 pr_info(" %s %s %s %s\n",
631 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
632 "leng", "ntw", "timestamp");
633 for (n = 0; n < adapter->num_tx_queues; n++) {
634 tx_ring = adapter->tx_ring[n];
635 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
636 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
637 n, tx_ring->next_to_use, tx_ring->next_to_clean,
638 (u64)dma_unmap_addr(tx_buffer, dma),
639 dma_unmap_len(tx_buffer, len),
640 tx_buffer->next_to_watch,
641 (u64)tx_buffer->time_stamp);
645 if (!netif_msg_tx_done(adapter))
646 goto rx_ring_summary;
648 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
650 /* Transmit Descriptor Formats
652 * 82598 Advanced Transmit Descriptor
653 * +--------------------------------------------------------------+
654 * 0 | Buffer Address [63:0] |
655 * +--------------------------------------------------------------+
656 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
657 * +--------------------------------------------------------------+
658 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
660 * 82598 Advanced Transmit Descriptor (Write-Back Format)
661 * +--------------------------------------------------------------+
663 * +--------------------------------------------------------------+
664 * 8 | RSV | STA | NXTSEQ |
665 * +--------------------------------------------------------------+
668 * 82599+ Advanced Transmit Descriptor
669 * +--------------------------------------------------------------+
670 * 0 | Buffer Address [63:0] |
671 * +--------------------------------------------------------------+
672 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
673 * +--------------------------------------------------------------+
674 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
676 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
677 * +--------------------------------------------------------------+
679 * +--------------------------------------------------------------+
680 * 8 | RSV | STA | RSV |
681 * +--------------------------------------------------------------+
685 for (n = 0; n < adapter->num_tx_queues; n++) {
686 tx_ring = adapter->tx_ring[n];
687 pr_info("------------------------------------\n");
688 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
689 pr_info("------------------------------------\n");
690 pr_info("%s%s %s %s %s %s\n",
691 "T [desc] [address 63:0 ] ",
692 "[PlPOIdStDDt Ln] [bi->dma ] ",
693 "leng", "ntw", "timestamp", "bi->skb");
695 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
696 tx_desc = IXGBE_TX_DESC(tx_ring, i);
697 tx_buffer = &tx_ring->tx_buffer_info[i];
698 u0 = (struct my_u0 *)tx_desc;
699 if (dma_unmap_len(tx_buffer, len) > 0) {
700 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
704 (u64)dma_unmap_addr(tx_buffer, dma),
705 dma_unmap_len(tx_buffer, len),
706 tx_buffer->next_to_watch,
707 (u64)tx_buffer->time_stamp,
709 if (i == tx_ring->next_to_use &&
710 i == tx_ring->next_to_clean)
712 else if (i == tx_ring->next_to_use)
714 else if (i == tx_ring->next_to_clean)
719 if (netif_msg_pktdata(adapter) &&
721 print_hex_dump(KERN_INFO, "",
722 DUMP_PREFIX_ADDRESS, 16, 1,
723 tx_buffer->skb->data,
724 dma_unmap_len(tx_buffer, len),
730 /* Print RX Rings Summary */
732 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
733 pr_info("Queue [NTU] [NTC]\n");
734 for (n = 0; n < adapter->num_rx_queues; n++) {
735 rx_ring = adapter->rx_ring[n];
736 pr_info("%5d %5X %5X\n",
737 n, rx_ring->next_to_use, rx_ring->next_to_clean);
741 if (!netif_msg_rx_status(adapter))
744 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
746 /* Receive Descriptor Formats
748 * 82598 Advanced Receive Descriptor (Read) Format
750 * +-----------------------------------------------------+
751 * 0 | Packet Buffer Address [63:1] |A0/NSE|
752 * +----------------------------------------------+------+
753 * 8 | Header Buffer Address [63:1] | DD |
754 * +-----------------------------------------------------+
757 * 82598 Advanced Receive Descriptor (Write-Back) Format
759 * 63 48 47 32 31 30 21 20 16 15 4 3 0
760 * +------------------------------------------------------+
761 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
762 * | Packet | IP | | | | Type | Type |
763 * | Checksum | Ident | | | | | |
764 * +------------------------------------------------------+
765 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
766 * +------------------------------------------------------+
767 * 63 48 47 32 31 20 19 0
769 * 82599+ Advanced Receive Descriptor (Read) Format
771 * +-----------------------------------------------------+
772 * 0 | Packet Buffer Address [63:1] |A0/NSE|
773 * +----------------------------------------------+------+
774 * 8 | Header Buffer Address [63:1] | DD |
775 * +-----------------------------------------------------+
778 * 82599+ Advanced Receive Descriptor (Write-Back) Format
780 * 63 48 47 32 31 30 21 20 17 16 4 3 0
781 * +------------------------------------------------------+
782 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
783 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
784 * |/ Flow Dir Flt ID | | | | | |
785 * +------------------------------------------------------+
786 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
787 * +------------------------------------------------------+
788 * 63 48 47 32 31 20 19 0
791 for (n = 0; n < adapter->num_rx_queues; n++) {
792 rx_ring = adapter->rx_ring[n];
793 pr_info("------------------------------------\n");
794 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
795 pr_info("------------------------------------\n");
797 "R [desc] [ PktBuf A0] ",
798 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
799 "<-- Adv Rx Read format\n");
801 "RWB[desc] [PcsmIpSHl PtRs] ",
802 "[vl er S cks ln] ---------------- [bi->skb ] ",
803 "<-- Adv Rx Write-Back format\n");
805 for (i = 0; i < rx_ring->count; i++) {
806 rx_buffer_info = &rx_ring->rx_buffer_info[i];
807 rx_desc = IXGBE_RX_DESC(rx_ring, i);
808 u0 = (struct my_u0 *)rx_desc;
809 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
810 if (staterr & IXGBE_RXD_STAT_DD) {
811 /* Descriptor Done */
812 pr_info("RWB[0x%03X] %016llX "
813 "%016llX ---------------- %p", i,
816 rx_buffer_info->skb);
818 pr_info("R [0x%03X] %016llX "
819 "%016llX %016llX %p", i,
822 (u64)rx_buffer_info->dma,
823 rx_buffer_info->skb);
825 if (netif_msg_pktdata(adapter) &&
826 rx_buffer_info->dma) {
827 print_hex_dump(KERN_INFO, "",
828 DUMP_PREFIX_ADDRESS, 16, 1,
829 page_address(rx_buffer_info->page) +
830 rx_buffer_info->page_offset,
831 ixgbe_rx_bufsz(rx_ring), true);
835 if (i == rx_ring->next_to_use)
837 else if (i == rx_ring->next_to_clean)
846 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
850 /* Let firmware take over control of h/w */
851 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
852 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
853 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
856 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
860 /* Let firmware know the driver has taken over */
861 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
862 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
863 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
867 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
868 * @adapter: pointer to adapter struct
869 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
870 * @queue: queue to map the corresponding interrupt to
871 * @msix_vector: the vector to map to the corresponding queue
874 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
875 u8 queue, u8 msix_vector)
878 struct ixgbe_hw *hw = &adapter->hw;
879 switch (hw->mac.type) {
880 case ixgbe_mac_82598EB:
881 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
884 index = (((direction * 64) + queue) >> 2) & 0x1F;
885 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
886 ivar &= ~(0xFF << (8 * (queue & 0x3)));
887 ivar |= (msix_vector << (8 * (queue & 0x3)));
888 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
890 case ixgbe_mac_82599EB:
893 case ixgbe_mac_X550EM_x:
894 case ixgbe_mac_x550em_a:
895 if (direction == -1) {
897 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
898 index = ((queue & 1) * 8);
899 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
900 ivar &= ~(0xFF << index);
901 ivar |= (msix_vector << index);
902 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
905 /* tx or rx causes */
906 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
907 index = ((16 * (queue & 1)) + (8 * direction));
908 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
909 ivar &= ~(0xFF << index);
910 ivar |= (msix_vector << index);
911 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
919 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
924 switch (adapter->hw.mac.type) {
925 case ixgbe_mac_82598EB:
926 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
927 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
929 case ixgbe_mac_82599EB:
932 case ixgbe_mac_X550EM_x:
933 case ixgbe_mac_x550em_a:
934 mask = (qmask & 0xFFFFFFFF);
935 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
936 mask = (qmask >> 32);
937 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
944 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
945 struct ixgbe_tx_buffer *tx_buffer)
947 if (tx_buffer->skb) {
948 dev_kfree_skb_any(tx_buffer->skb);
949 if (dma_unmap_len(tx_buffer, len))
950 dma_unmap_single(ring->dev,
951 dma_unmap_addr(tx_buffer, dma),
952 dma_unmap_len(tx_buffer, len),
954 } else if (dma_unmap_len(tx_buffer, len)) {
955 dma_unmap_page(ring->dev,
956 dma_unmap_addr(tx_buffer, dma),
957 dma_unmap_len(tx_buffer, len),
960 tx_buffer->next_to_watch = NULL;
961 tx_buffer->skb = NULL;
962 dma_unmap_len_set(tx_buffer, len, 0);
963 /* tx_buffer must be completely set up in the transmit path */
966 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
968 struct ixgbe_hw *hw = &adapter->hw;
969 struct ixgbe_hw_stats *hwstats = &adapter->stats;
973 if ((hw->fc.current_mode != ixgbe_fc_full) &&
974 (hw->fc.current_mode != ixgbe_fc_rx_pause))
977 switch (hw->mac.type) {
978 case ixgbe_mac_82598EB:
979 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
982 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
984 hwstats->lxoffrxc += data;
986 /* refill credits (no tx hang) if we received xoff */
990 for (i = 0; i < adapter->num_tx_queues; i++)
991 clear_bit(__IXGBE_HANG_CHECK_ARMED,
992 &adapter->tx_ring[i]->state);
995 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
997 struct ixgbe_hw *hw = &adapter->hw;
998 struct ixgbe_hw_stats *hwstats = &adapter->stats;
1002 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1004 if (adapter->ixgbe_ieee_pfc)
1005 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1007 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1008 ixgbe_update_xoff_rx_lfc(adapter);
1012 /* update stats for each tc, only valid with PFC enabled */
1013 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1016 switch (hw->mac.type) {
1017 case ixgbe_mac_82598EB:
1018 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1021 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1023 hwstats->pxoffrxc[i] += pxoffrxc;
1024 /* Get the TC for given UP */
1025 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1026 xoff[tc] += pxoffrxc;
1029 /* disarm tx queues that have received xoff frames */
1030 for (i = 0; i < adapter->num_tx_queues; i++) {
1031 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1033 tc = tx_ring->dcb_tc;
1035 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1039 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1041 return ring->stats.packets;
1044 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1046 struct ixgbe_adapter *adapter;
1047 struct ixgbe_hw *hw;
1050 if (ring->l2_accel_priv)
1051 adapter = ring->l2_accel_priv->real_adapter;
1053 adapter = netdev_priv(ring->netdev);
1056 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1057 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1060 return (head < tail) ?
1061 tail - head : (tail + ring->count - head);
1066 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1068 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1069 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1070 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1072 clear_check_for_tx_hang(tx_ring);
1075 * Check for a hung queue, but be thorough. This verifies
1076 * that a transmit has been completed since the previous
1077 * check AND there is at least one packet pending. The
1078 * ARMED bit is set to indicate a potential hang. The
1079 * bit is cleared if a pause frame is received to remove
1080 * false hang detection due to PFC or 802.3x frames. By
1081 * requiring this to fail twice we avoid races with
1082 * pfc clearing the ARMED bit and conditions where we
1083 * run the check_tx_hang logic with a transmit completion
1084 * pending but without time to complete it yet.
1086 if (tx_done_old == tx_done && tx_pending)
1087 /* make sure it is true for two checks in a row */
1088 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1090 /* update completed stats and continue */
1091 tx_ring->tx_stats.tx_done_old = tx_done;
1092 /* reset the countdown */
1093 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1099 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1100 * @adapter: driver private struct
1102 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1105 /* Do the reset outside of interrupt context */
1106 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1107 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1108 e_warn(drv, "initiating reset due to tx timeout\n");
1109 ixgbe_service_event_schedule(adapter);
1114 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1116 static int ixgbe_tx_maxrate(struct net_device *netdev,
1117 int queue_index, u32 maxrate)
1119 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1120 struct ixgbe_hw *hw = &adapter->hw;
1121 u32 bcnrc_val = ixgbe_link_mbps(adapter);
1126 /* Calculate the rate factor values to set */
1127 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1128 bcnrc_val /= maxrate;
1130 /* clear everything but the rate factor */
1131 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1132 IXGBE_RTTBCNRC_RF_DEC_MASK;
1134 /* enable the rate scheduler */
1135 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1137 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1138 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1144 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1145 * @q_vector: structure containing interrupt and ring information
1146 * @tx_ring: tx ring to clean
1147 * @napi_budget: Used to determine if we are in netpoll
1149 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1150 struct ixgbe_ring *tx_ring, int napi_budget)
1152 struct ixgbe_adapter *adapter = q_vector->adapter;
1153 struct ixgbe_tx_buffer *tx_buffer;
1154 union ixgbe_adv_tx_desc *tx_desc;
1155 unsigned int total_bytes = 0, total_packets = 0;
1156 unsigned int budget = q_vector->tx.work_limit;
1157 unsigned int i = tx_ring->next_to_clean;
1159 if (test_bit(__IXGBE_DOWN, &adapter->state))
1162 tx_buffer = &tx_ring->tx_buffer_info[i];
1163 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1164 i -= tx_ring->count;
1167 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1169 /* if next_to_watch is not set then there is no work pending */
1173 /* prevent any other reads prior to eop_desc */
1174 read_barrier_depends();
1176 /* if DD is not set pending work has not been completed */
1177 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1180 /* clear next_to_watch to prevent false hangs */
1181 tx_buffer->next_to_watch = NULL;
1183 /* update the statistics for this packet */
1184 total_bytes += tx_buffer->bytecount;
1185 total_packets += tx_buffer->gso_segs;
1188 napi_consume_skb(tx_buffer->skb, napi_budget);
1190 /* unmap skb header data */
1191 dma_unmap_single(tx_ring->dev,
1192 dma_unmap_addr(tx_buffer, dma),
1193 dma_unmap_len(tx_buffer, len),
1196 /* clear tx_buffer data */
1197 tx_buffer->skb = NULL;
1198 dma_unmap_len_set(tx_buffer, len, 0);
1200 /* unmap remaining buffers */
1201 while (tx_desc != eop_desc) {
1206 i -= tx_ring->count;
1207 tx_buffer = tx_ring->tx_buffer_info;
1208 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1211 /* unmap any remaining paged data */
1212 if (dma_unmap_len(tx_buffer, len)) {
1213 dma_unmap_page(tx_ring->dev,
1214 dma_unmap_addr(tx_buffer, dma),
1215 dma_unmap_len(tx_buffer, len),
1217 dma_unmap_len_set(tx_buffer, len, 0);
1221 /* move us one more past the eop_desc for start of next pkt */
1226 i -= tx_ring->count;
1227 tx_buffer = tx_ring->tx_buffer_info;
1228 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1231 /* issue prefetch for next Tx descriptor */
1234 /* update budget accounting */
1236 } while (likely(budget));
1238 i += tx_ring->count;
1239 tx_ring->next_to_clean = i;
1240 u64_stats_update_begin(&tx_ring->syncp);
1241 tx_ring->stats.bytes += total_bytes;
1242 tx_ring->stats.packets += total_packets;
1243 u64_stats_update_end(&tx_ring->syncp);
1244 q_vector->tx.total_bytes += total_bytes;
1245 q_vector->tx.total_packets += total_packets;
1247 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1248 /* schedule immediate reset if we believe we hung */
1249 struct ixgbe_hw *hw = &adapter->hw;
1250 e_err(drv, "Detected Tx Unit Hang\n"
1252 " TDH, TDT <%x>, <%x>\n"
1253 " next_to_use <%x>\n"
1254 " next_to_clean <%x>\n"
1255 "tx_buffer_info[next_to_clean]\n"
1256 " time_stamp <%lx>\n"
1258 tx_ring->queue_index,
1259 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1260 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1261 tx_ring->next_to_use, i,
1262 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1264 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1267 "tx hang %d detected on queue %d, resetting adapter\n",
1268 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1270 /* schedule immediate reset if we believe we hung */
1271 ixgbe_tx_timeout_reset(adapter);
1273 /* the adapter is about to reset, no point in enabling stuff */
1277 netdev_tx_completed_queue(txring_txq(tx_ring),
1278 total_packets, total_bytes);
1280 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1281 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1282 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1283 /* Make sure that anybody stopping the queue after this
1284 * sees the new next_to_clean.
1287 if (__netif_subqueue_stopped(tx_ring->netdev,
1288 tx_ring->queue_index)
1289 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1290 netif_wake_subqueue(tx_ring->netdev,
1291 tx_ring->queue_index);
1292 ++tx_ring->tx_stats.restart_queue;
1299 #ifdef CONFIG_IXGBE_DCA
1300 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1301 struct ixgbe_ring *tx_ring,
1304 struct ixgbe_hw *hw = &adapter->hw;
1308 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1309 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1311 switch (hw->mac.type) {
1312 case ixgbe_mac_82598EB:
1313 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1315 case ixgbe_mac_82599EB:
1316 case ixgbe_mac_X540:
1317 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1318 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1321 /* for unknown hardware do not write register */
1326 * We can enable relaxed ordering for reads, but not writes when
1327 * DCA is enabled. This is due to a known issue in some chipsets
1328 * which will cause the DCA tag to be cleared.
1330 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1331 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1332 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1334 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1337 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1338 struct ixgbe_ring *rx_ring,
1341 struct ixgbe_hw *hw = &adapter->hw;
1343 u8 reg_idx = rx_ring->reg_idx;
1345 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1346 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1348 switch (hw->mac.type) {
1349 case ixgbe_mac_82599EB:
1350 case ixgbe_mac_X540:
1351 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1358 * We can enable relaxed ordering for reads, but not writes when
1359 * DCA is enabled. This is due to a known issue in some chipsets
1360 * which will cause the DCA tag to be cleared.
1362 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1363 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1364 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1366 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1369 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1371 struct ixgbe_adapter *adapter = q_vector->adapter;
1372 struct ixgbe_ring *ring;
1373 int cpu = get_cpu();
1375 if (q_vector->cpu == cpu)
1378 ixgbe_for_each_ring(ring, q_vector->tx)
1379 ixgbe_update_tx_dca(adapter, ring, cpu);
1381 ixgbe_for_each_ring(ring, q_vector->rx)
1382 ixgbe_update_rx_dca(adapter, ring, cpu);
1384 q_vector->cpu = cpu;
1389 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1393 /* always use CB2 mode, difference is masked in the CB driver */
1394 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1395 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1396 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1398 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1399 IXGBE_DCA_CTRL_DCA_DISABLE);
1401 for (i = 0; i < adapter->num_q_vectors; i++) {
1402 adapter->q_vector[i]->cpu = -1;
1403 ixgbe_update_dca(adapter->q_vector[i]);
1407 static int __ixgbe_notify_dca(struct device *dev, void *data)
1409 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1410 unsigned long event = *(unsigned long *)data;
1412 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1416 case DCA_PROVIDER_ADD:
1417 /* if we're already enabled, don't do it again */
1418 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1420 if (dca_add_requester(dev) == 0) {
1421 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1422 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1423 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1426 /* Fall Through since DCA is disabled. */
1427 case DCA_PROVIDER_REMOVE:
1428 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1429 dca_remove_requester(dev);
1430 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1431 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1432 IXGBE_DCA_CTRL_DCA_DISABLE);
1440 #endif /* CONFIG_IXGBE_DCA */
1442 #define IXGBE_RSS_L4_TYPES_MASK \
1443 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1444 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1445 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1446 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1448 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1449 union ixgbe_adv_rx_desc *rx_desc,
1450 struct sk_buff *skb)
1454 if (!(ring->netdev->features & NETIF_F_RXHASH))
1457 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1458 IXGBE_RXDADV_RSSTYPE_MASK;
1463 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1464 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1465 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1470 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1471 * @ring: structure containing ring specific data
1472 * @rx_desc: advanced rx descriptor
1474 * Returns : true if it is FCoE pkt
1476 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1477 union ixgbe_adv_rx_desc *rx_desc)
1479 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1481 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1482 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1483 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1484 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1487 #endif /* IXGBE_FCOE */
1489 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1490 * @ring: structure containing ring specific data
1491 * @rx_desc: current Rx descriptor being processed
1492 * @skb: skb currently being received and modified
1494 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1495 union ixgbe_adv_rx_desc *rx_desc,
1496 struct sk_buff *skb)
1498 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1499 bool encap_pkt = false;
1501 skb_checksum_none_assert(skb);
1503 /* Rx csum disabled */
1504 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1507 /* check for VXLAN and Geneve packets */
1508 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1510 skb->encapsulation = 1;
1513 /* if IP and error */
1514 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1515 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1516 ring->rx_stats.csum_err++;
1520 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1523 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1525 * 82599 errata, UDP frames with a 0 checksum can be marked as
1528 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1529 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1532 ring->rx_stats.csum_err++;
1536 /* It must be a TCP or UDP packet with a valid checksum */
1537 skb->ip_summed = CHECKSUM_UNNECESSARY;
1539 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1542 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1543 skb->ip_summed = CHECKSUM_NONE;
1546 /* If we checked the outer header let the stack know */
1547 skb->csum_level = 1;
1551 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1552 struct ixgbe_rx_buffer *bi)
1554 struct page *page = bi->page;
1557 /* since we are recycling buffers we should seldom need to alloc */
1561 /* alloc new page for storage */
1562 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1563 if (unlikely(!page)) {
1564 rx_ring->rx_stats.alloc_rx_page_failed++;
1568 /* map page for use */
1569 dma = dma_map_page(rx_ring->dev, page, 0,
1570 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1573 * if mapping failed free memory back to system since
1574 * there isn't much point in holding memory we can't use
1576 if (dma_mapping_error(rx_ring->dev, dma)) {
1577 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1579 rx_ring->rx_stats.alloc_rx_page_failed++;
1585 bi->page_offset = 0;
1591 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1592 * @rx_ring: ring to place buffers on
1593 * @cleaned_count: number of buffers to replace
1595 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1597 union ixgbe_adv_rx_desc *rx_desc;
1598 struct ixgbe_rx_buffer *bi;
1599 u16 i = rx_ring->next_to_use;
1605 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1606 bi = &rx_ring->rx_buffer_info[i];
1607 i -= rx_ring->count;
1610 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1614 * Refresh the desc even if buffer_addrs didn't change
1615 * because each write-back erases this info.
1617 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1623 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1624 bi = rx_ring->rx_buffer_info;
1625 i -= rx_ring->count;
1628 /* clear the status bits for the next_to_use descriptor */
1629 rx_desc->wb.upper.status_error = 0;
1632 } while (cleaned_count);
1634 i += rx_ring->count;
1636 if (rx_ring->next_to_use != i) {
1637 rx_ring->next_to_use = i;
1639 /* update next to alloc since we have filled the ring */
1640 rx_ring->next_to_alloc = i;
1642 /* Force memory writes to complete before letting h/w
1643 * know there are new descriptors to fetch. (Only
1644 * applicable for weak-ordered memory model archs,
1648 writel(i, rx_ring->tail);
1652 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1653 struct sk_buff *skb)
1655 u16 hdr_len = skb_headlen(skb);
1657 /* set gso_size to avoid messing up TCP MSS */
1658 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1659 IXGBE_CB(skb)->append_cnt);
1660 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1663 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1664 struct sk_buff *skb)
1666 /* if append_cnt is 0 then frame is not RSC */
1667 if (!IXGBE_CB(skb)->append_cnt)
1670 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1671 rx_ring->rx_stats.rsc_flush++;
1673 ixgbe_set_rsc_gso_size(rx_ring, skb);
1675 /* gso_size is computed using append_cnt so always clear it last */
1676 IXGBE_CB(skb)->append_cnt = 0;
1680 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1681 * @rx_ring: rx descriptor ring packet is being transacted on
1682 * @rx_desc: pointer to the EOP Rx descriptor
1683 * @skb: pointer to current skb being populated
1685 * This function checks the ring, descriptor, and packet information in
1686 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1687 * other fields within the skb.
1689 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1690 union ixgbe_adv_rx_desc *rx_desc,
1691 struct sk_buff *skb)
1693 struct net_device *dev = rx_ring->netdev;
1694 u32 flags = rx_ring->q_vector->adapter->flags;
1696 ixgbe_update_rsc_stats(rx_ring, skb);
1698 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1700 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1702 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1703 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1705 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1706 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1707 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1708 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1711 skb_record_rx_queue(skb, rx_ring->queue_index);
1713 skb->protocol = eth_type_trans(skb, dev);
1716 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1717 struct sk_buff *skb)
1719 skb_mark_napi_id(skb, &q_vector->napi);
1720 if (ixgbe_qv_busy_polling(q_vector))
1721 netif_receive_skb(skb);
1723 napi_gro_receive(&q_vector->napi, skb);
1727 * ixgbe_is_non_eop - process handling of non-EOP buffers
1728 * @rx_ring: Rx ring being processed
1729 * @rx_desc: Rx descriptor for current buffer
1730 * @skb: Current socket buffer containing buffer in progress
1732 * This function updates next to clean. If the buffer is an EOP buffer
1733 * this function exits returning false, otherwise it will place the
1734 * sk_buff in the next buffer to be chained and return true indicating
1735 * that this is in fact a non-EOP buffer.
1737 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1738 union ixgbe_adv_rx_desc *rx_desc,
1739 struct sk_buff *skb)
1741 u32 ntc = rx_ring->next_to_clean + 1;
1743 /* fetch, update, and store next to clean */
1744 ntc = (ntc < rx_ring->count) ? ntc : 0;
1745 rx_ring->next_to_clean = ntc;
1747 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1749 /* update RSC append count if present */
1750 if (ring_is_rsc_enabled(rx_ring)) {
1751 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1752 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1754 if (unlikely(rsc_enabled)) {
1755 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1757 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1758 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1760 /* update ntc based on RSC value */
1761 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1762 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1763 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1767 /* if we are the last buffer then there is nothing else to do */
1768 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1771 /* place skb in next buffer to be received */
1772 rx_ring->rx_buffer_info[ntc].skb = skb;
1773 rx_ring->rx_stats.non_eop_descs++;
1779 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1780 * @rx_ring: rx descriptor ring packet is being transacted on
1781 * @skb: pointer to current skb being adjusted
1783 * This function is an ixgbe specific version of __pskb_pull_tail. The
1784 * main difference between this version and the original function is that
1785 * this function can make several assumptions about the state of things
1786 * that allow for significant optimizations versus the standard function.
1787 * As a result we can do things like drop a frag and maintain an accurate
1788 * truesize for the skb.
1790 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1791 struct sk_buff *skb)
1793 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1795 unsigned int pull_len;
1798 * it is valid to use page_address instead of kmap since we are
1799 * working with pages allocated out of the lomem pool per
1800 * alloc_page(GFP_ATOMIC)
1802 va = skb_frag_address(frag);
1805 * we need the header to contain the greater of either ETH_HLEN or
1806 * 60 bytes if the skb->len is less than 60 for skb_pad.
1808 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1810 /* align pull length to size of long to optimize memcpy performance */
1811 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1813 /* update all of the pointers */
1814 skb_frag_size_sub(frag, pull_len);
1815 frag->page_offset += pull_len;
1816 skb->data_len -= pull_len;
1817 skb->tail += pull_len;
1821 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1822 * @rx_ring: rx descriptor ring packet is being transacted on
1823 * @skb: pointer to current skb being updated
1825 * This function provides a basic DMA sync up for the first fragment of an
1826 * skb. The reason for doing this is that the first fragment cannot be
1827 * unmapped until we have reached the end of packet descriptor for a buffer
1830 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1831 struct sk_buff *skb)
1833 /* if the page was released unmap it, else just sync our portion */
1834 if (unlikely(IXGBE_CB(skb)->page_released)) {
1835 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1836 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1837 IXGBE_CB(skb)->page_released = false;
1839 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1841 dma_sync_single_range_for_cpu(rx_ring->dev,
1844 ixgbe_rx_bufsz(rx_ring),
1847 IXGBE_CB(skb)->dma = 0;
1851 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1852 * @rx_ring: rx descriptor ring packet is being transacted on
1853 * @rx_desc: pointer to the EOP Rx descriptor
1854 * @skb: pointer to current skb being fixed
1856 * Check for corrupted packet headers caused by senders on the local L2
1857 * embedded NIC switch not setting up their Tx Descriptors right. These
1858 * should be very rare.
1860 * Also address the case where we are pulling data in on pages only
1861 * and as such no data is present in the skb header.
1863 * In addition if skb is not at least 60 bytes we need to pad it so that
1864 * it is large enough to qualify as a valid Ethernet frame.
1866 * Returns true if an error was encountered and skb was freed.
1868 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1869 union ixgbe_adv_rx_desc *rx_desc,
1870 struct sk_buff *skb)
1872 struct net_device *netdev = rx_ring->netdev;
1874 /* verify that the packet does not have any known errors */
1875 if (unlikely(ixgbe_test_staterr(rx_desc,
1876 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1877 !(netdev->features & NETIF_F_RXALL))) {
1878 dev_kfree_skb_any(skb);
1882 /* place header in linear portion of buffer */
1883 if (skb_is_nonlinear(skb))
1884 ixgbe_pull_tail(rx_ring, skb);
1887 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1888 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1892 /* if eth_skb_pad returns an error the skb was freed */
1893 if (eth_skb_pad(skb))
1900 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1901 * @rx_ring: rx descriptor ring to store buffers on
1902 * @old_buff: donor buffer to have page reused
1904 * Synchronizes page for reuse by the adapter
1906 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1907 struct ixgbe_rx_buffer *old_buff)
1909 struct ixgbe_rx_buffer *new_buff;
1910 u16 nta = rx_ring->next_to_alloc;
1912 new_buff = &rx_ring->rx_buffer_info[nta];
1914 /* update, and store next to alloc */
1916 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1918 /* transfer page from old buffer to new buffer */
1919 *new_buff = *old_buff;
1921 /* sync the buffer for use by the device */
1922 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1923 new_buff->page_offset,
1924 ixgbe_rx_bufsz(rx_ring),
1928 static inline bool ixgbe_page_is_reserved(struct page *page)
1930 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1934 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1935 * @rx_ring: rx descriptor ring to transact packets on
1936 * @rx_buffer: buffer containing page to add
1937 * @rx_desc: descriptor containing length of buffer written by hardware
1938 * @skb: sk_buff to place the data into
1940 * This function will add the data contained in rx_buffer->page to the skb.
1941 * This is done either through a direct copy if the data in the buffer is
1942 * less than the skb header size, otherwise it will just attach the page as
1943 * a frag to the skb.
1945 * The function will then update the page offset if necessary and return
1946 * true if the buffer can be reused by the adapter.
1948 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1949 struct ixgbe_rx_buffer *rx_buffer,
1950 union ixgbe_adv_rx_desc *rx_desc,
1951 struct sk_buff *skb)
1953 struct page *page = rx_buffer->page;
1954 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1955 #if (PAGE_SIZE < 8192)
1956 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1958 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1959 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1960 ixgbe_rx_bufsz(rx_ring);
1963 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1964 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1966 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1968 /* page is not reserved, we can reuse buffer as-is */
1969 if (likely(!ixgbe_page_is_reserved(page)))
1972 /* this page cannot be reused so discard it */
1973 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1977 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1978 rx_buffer->page_offset, size, truesize);
1980 /* avoid re-using remote pages */
1981 if (unlikely(ixgbe_page_is_reserved(page)))
1984 #if (PAGE_SIZE < 8192)
1985 /* if we are only owner of page we can reuse it */
1986 if (unlikely(page_count(page) != 1))
1989 /* flip page offset to other buffer */
1990 rx_buffer->page_offset ^= truesize;
1992 /* move offset up to the next cache line */
1993 rx_buffer->page_offset += truesize;
1995 if (rx_buffer->page_offset > last_offset)
1999 /* Even if we own the page, we are not allowed to use atomic_set()
2000 * This would break get_page_unless_zero() users.
2007 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2008 union ixgbe_adv_rx_desc *rx_desc)
2010 struct ixgbe_rx_buffer *rx_buffer;
2011 struct sk_buff *skb;
2014 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2015 page = rx_buffer->page;
2018 skb = rx_buffer->skb;
2021 void *page_addr = page_address(page) +
2022 rx_buffer->page_offset;
2024 /* prefetch first cache line of first page */
2025 prefetch(page_addr);
2026 #if L1_CACHE_BYTES < 128
2027 prefetch(page_addr + L1_CACHE_BYTES);
2030 /* allocate a skb to store the frags */
2031 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2033 if (unlikely(!skb)) {
2034 rx_ring->rx_stats.alloc_rx_buff_failed++;
2039 * we will be copying header into skb->data in
2040 * pskb_may_pull so it is in our interest to prefetch
2041 * it now to avoid a possible cache miss
2043 prefetchw(skb->data);
2046 * Delay unmapping of the first packet. It carries the
2047 * header information, HW may still access the header
2048 * after the writeback. Only unmap it when EOP is
2051 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2054 IXGBE_CB(skb)->dma = rx_buffer->dma;
2056 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2057 ixgbe_dma_sync_frag(rx_ring, skb);
2060 /* we are reusing so sync this buffer for CPU use */
2061 dma_sync_single_range_for_cpu(rx_ring->dev,
2063 rx_buffer->page_offset,
2064 ixgbe_rx_bufsz(rx_ring),
2067 rx_buffer->skb = NULL;
2070 /* pull page into skb */
2071 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2072 /* hand second half of page back to the ring */
2073 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2074 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2075 /* the page has been released from the ring */
2076 IXGBE_CB(skb)->page_released = true;
2078 /* we are not reusing the buffer so unmap it */
2079 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2080 ixgbe_rx_pg_size(rx_ring),
2084 /* clear contents of buffer_info */
2085 rx_buffer->page = NULL;
2091 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2092 * @q_vector: structure containing interrupt and ring information
2093 * @rx_ring: rx descriptor ring to transact packets on
2094 * @budget: Total limit on number of packets to process
2096 * This function provides a "bounce buffer" approach to Rx interrupt
2097 * processing. The advantage to this is that on systems that have
2098 * expensive overhead for IOMMU access this provides a means of avoiding
2099 * it by maintaining the mapping of the page to the syste.
2101 * Returns amount of work completed
2103 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2104 struct ixgbe_ring *rx_ring,
2107 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2109 struct ixgbe_adapter *adapter = q_vector->adapter;
2111 unsigned int mss = 0;
2112 #endif /* IXGBE_FCOE */
2113 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2115 while (likely(total_rx_packets < budget)) {
2116 union ixgbe_adv_rx_desc *rx_desc;
2117 struct sk_buff *skb;
2119 /* return some buffers to hardware, one at a time is too slow */
2120 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2121 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2125 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2127 if (!rx_desc->wb.upper.status_error)
2130 /* This memory barrier is needed to keep us from reading
2131 * any other fields out of the rx_desc until we know the
2132 * descriptor has been written back
2136 /* retrieve a buffer from the ring */
2137 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2139 /* exit if we failed to retrieve a buffer */
2145 /* place incomplete frames back on ring for completion */
2146 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2149 /* verify the packet layout is correct */
2150 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2153 /* probably a little skewed due to removing CRC */
2154 total_rx_bytes += skb->len;
2156 /* populate checksum, timestamp, VLAN, and protocol */
2157 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2160 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2161 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2162 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2163 /* include DDPed FCoE data */
2164 if (ddp_bytes > 0) {
2166 mss = rx_ring->netdev->mtu -
2167 sizeof(struct fcoe_hdr) -
2168 sizeof(struct fc_frame_header) -
2169 sizeof(struct fcoe_crc_eof);
2173 total_rx_bytes += ddp_bytes;
2174 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2178 dev_kfree_skb_any(skb);
2183 #endif /* IXGBE_FCOE */
2184 ixgbe_rx_skb(q_vector, skb);
2186 /* update budget accounting */
2190 u64_stats_update_begin(&rx_ring->syncp);
2191 rx_ring->stats.packets += total_rx_packets;
2192 rx_ring->stats.bytes += total_rx_bytes;
2193 u64_stats_update_end(&rx_ring->syncp);
2194 q_vector->rx.total_packets += total_rx_packets;
2195 q_vector->rx.total_bytes += total_rx_bytes;
2197 return total_rx_packets;
2200 #ifdef CONFIG_NET_RX_BUSY_POLL
2201 /* must be called with local_bh_disable()d */
2202 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2204 struct ixgbe_q_vector *q_vector =
2205 container_of(napi, struct ixgbe_q_vector, napi);
2206 struct ixgbe_adapter *adapter = q_vector->adapter;
2207 struct ixgbe_ring *ring;
2210 if (test_bit(__IXGBE_DOWN, &adapter->state))
2211 return LL_FLUSH_FAILED;
2213 if (!ixgbe_qv_lock_poll(q_vector))
2214 return LL_FLUSH_BUSY;
2216 ixgbe_for_each_ring(ring, q_vector->rx) {
2217 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2218 #ifdef BP_EXTENDED_STATS
2220 ring->stats.cleaned += found;
2222 ring->stats.misses++;
2228 ixgbe_qv_unlock_poll(q_vector);
2232 #endif /* CONFIG_NET_RX_BUSY_POLL */
2235 * ixgbe_configure_msix - Configure MSI-X hardware
2236 * @adapter: board private structure
2238 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2241 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2243 struct ixgbe_q_vector *q_vector;
2247 /* Populate MSIX to EITR Select */
2248 if (adapter->num_vfs > 32) {
2249 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2250 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2254 * Populate the IVAR table and set the ITR values to the
2255 * corresponding register.
2257 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2258 struct ixgbe_ring *ring;
2259 q_vector = adapter->q_vector[v_idx];
2261 ixgbe_for_each_ring(ring, q_vector->rx)
2262 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2264 ixgbe_for_each_ring(ring, q_vector->tx)
2265 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2267 ixgbe_write_eitr(q_vector);
2270 switch (adapter->hw.mac.type) {
2271 case ixgbe_mac_82598EB:
2272 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2275 case ixgbe_mac_82599EB:
2276 case ixgbe_mac_X540:
2277 case ixgbe_mac_X550:
2278 case ixgbe_mac_X550EM_x:
2279 case ixgbe_mac_x550em_a:
2280 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2285 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2287 /* set up to autoclear timer, and the vectors */
2288 mask = IXGBE_EIMS_ENABLE_MASK;
2289 mask &= ~(IXGBE_EIMS_OTHER |
2290 IXGBE_EIMS_MAILBOX |
2293 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2296 enum latency_range {
2300 latency_invalid = 255
2304 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2305 * @q_vector: structure containing interrupt and ring information
2306 * @ring_container: structure containing ring performance data
2308 * Stores a new ITR value based on packets and byte
2309 * counts during the last interrupt. The advantage of per interrupt
2310 * computation is faster updates and more accurate ITR for the current
2311 * traffic pattern. Constants in this function were computed
2312 * based on theoretical maximum wire speed and thresholds were set based
2313 * on testing data as well as attempting to minimize response time
2314 * while increasing bulk throughput.
2315 * this functionality is controlled by the InterruptThrottleRate module
2316 * parameter (see ixgbe_param.c)
2318 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2319 struct ixgbe_ring_container *ring_container)
2321 int bytes = ring_container->total_bytes;
2322 int packets = ring_container->total_packets;
2325 u8 itr_setting = ring_container->itr;
2330 /* simple throttlerate management
2331 * 0-10MB/s lowest (100000 ints/s)
2332 * 10-20MB/s low (20000 ints/s)
2333 * 20-1249MB/s bulk (12000 ints/s)
2335 /* what was last interrupt timeslice? */
2336 timepassed_us = q_vector->itr >> 2;
2337 if (timepassed_us == 0)
2340 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2342 switch (itr_setting) {
2343 case lowest_latency:
2344 if (bytes_perint > 10)
2345 itr_setting = low_latency;
2348 if (bytes_perint > 20)
2349 itr_setting = bulk_latency;
2350 else if (bytes_perint <= 10)
2351 itr_setting = lowest_latency;
2354 if (bytes_perint <= 20)
2355 itr_setting = low_latency;
2359 /* clear work counters since we have the values we need */
2360 ring_container->total_bytes = 0;
2361 ring_container->total_packets = 0;
2363 /* write updated itr to ring container */
2364 ring_container->itr = itr_setting;
2368 * ixgbe_write_eitr - write EITR register in hardware specific way
2369 * @q_vector: structure containing interrupt and ring information
2371 * This function is made to be called by ethtool and by the driver
2372 * when it needs to update EITR registers at runtime. Hardware
2373 * specific quirks/differences are taken care of here.
2375 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2377 struct ixgbe_adapter *adapter = q_vector->adapter;
2378 struct ixgbe_hw *hw = &adapter->hw;
2379 int v_idx = q_vector->v_idx;
2380 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2382 switch (adapter->hw.mac.type) {
2383 case ixgbe_mac_82598EB:
2384 /* must write high and low 16 bits to reset counter */
2385 itr_reg |= (itr_reg << 16);
2387 case ixgbe_mac_82599EB:
2388 case ixgbe_mac_X540:
2389 case ixgbe_mac_X550:
2390 case ixgbe_mac_X550EM_x:
2391 case ixgbe_mac_x550em_a:
2393 * set the WDIS bit to not clear the timer bits and cause an
2394 * immediate assertion of the interrupt
2396 itr_reg |= IXGBE_EITR_CNT_WDIS;
2401 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2404 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2406 u32 new_itr = q_vector->itr;
2409 ixgbe_update_itr(q_vector, &q_vector->tx);
2410 ixgbe_update_itr(q_vector, &q_vector->rx);
2412 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2414 switch (current_itr) {
2415 /* counts and packets in update_itr are dependent on these numbers */
2416 case lowest_latency:
2417 new_itr = IXGBE_100K_ITR;
2420 new_itr = IXGBE_20K_ITR;
2423 new_itr = IXGBE_12K_ITR;
2429 if (new_itr != q_vector->itr) {
2430 /* do an exponential smoothing */
2431 new_itr = (10 * new_itr * q_vector->itr) /
2432 ((9 * new_itr) + q_vector->itr);
2434 /* save the algorithm value here */
2435 q_vector->itr = new_itr;
2437 ixgbe_write_eitr(q_vector);
2442 * ixgbe_check_overtemp_subtask - check for over temperature
2443 * @adapter: pointer to adapter
2445 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2447 struct ixgbe_hw *hw = &adapter->hw;
2448 u32 eicr = adapter->interrupt_event;
2450 if (test_bit(__IXGBE_DOWN, &adapter->state))
2453 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2454 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2457 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2459 switch (hw->device_id) {
2460 case IXGBE_DEV_ID_82599_T3_LOM:
2462 * Since the warning interrupt is for both ports
2463 * we don't have to check if:
2464 * - This interrupt wasn't for our port.
2465 * - We may have missed the interrupt so always have to
2466 * check if we got a LSC
2468 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2469 !(eicr & IXGBE_EICR_LSC))
2472 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2474 bool link_up = false;
2476 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2482 /* Check if this is not due to overtemp */
2483 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2488 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2490 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2494 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2496 adapter->interrupt_event = 0;
2499 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2501 struct ixgbe_hw *hw = &adapter->hw;
2503 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2504 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2505 e_crit(probe, "Fan has stopped, replace the adapter\n");
2506 /* write to clear the interrupt */
2507 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2511 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2513 struct ixgbe_hw *hw = &adapter->hw;
2515 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2518 switch (adapter->hw.mac.type) {
2519 case ixgbe_mac_82599EB:
2521 * Need to check link state so complete overtemp check
2524 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2525 (eicr & IXGBE_EICR_LSC)) &&
2526 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2527 adapter->interrupt_event = eicr;
2528 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2529 ixgbe_service_event_schedule(adapter);
2533 case ixgbe_mac_X540:
2534 if (!(eicr & IXGBE_EICR_TS))
2541 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2544 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2546 switch (hw->mac.type) {
2547 case ixgbe_mac_82598EB:
2548 if (hw->phy.type == ixgbe_phy_nl)
2551 case ixgbe_mac_82599EB:
2552 case ixgbe_mac_X550EM_x:
2553 case ixgbe_mac_x550em_a:
2554 switch (hw->mac.ops.get_media_type(hw)) {
2555 case ixgbe_media_type_fiber:
2556 case ixgbe_media_type_fiber_qsfp:
2566 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2568 struct ixgbe_hw *hw = &adapter->hw;
2569 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2571 if (!ixgbe_is_sfp(hw))
2574 /* Later MAC's use different SDP */
2575 if (hw->mac.type >= ixgbe_mac_X540)
2576 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2578 if (eicr & eicr_mask) {
2579 /* Clear the interrupt */
2580 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2581 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2582 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2583 adapter->sfp_poll_time = 0;
2584 ixgbe_service_event_schedule(adapter);
2588 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2589 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2590 /* Clear the interrupt */
2591 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2592 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2593 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2594 ixgbe_service_event_schedule(adapter);
2599 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2601 struct ixgbe_hw *hw = &adapter->hw;
2604 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2605 adapter->link_check_timeout = jiffies;
2606 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2607 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2608 IXGBE_WRITE_FLUSH(hw);
2609 ixgbe_service_event_schedule(adapter);
2613 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2617 struct ixgbe_hw *hw = &adapter->hw;
2619 switch (hw->mac.type) {
2620 case ixgbe_mac_82598EB:
2621 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2622 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2624 case ixgbe_mac_82599EB:
2625 case ixgbe_mac_X540:
2626 case ixgbe_mac_X550:
2627 case ixgbe_mac_X550EM_x:
2628 case ixgbe_mac_x550em_a:
2629 mask = (qmask & 0xFFFFFFFF);
2631 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2632 mask = (qmask >> 32);
2634 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2639 /* skip the flush */
2642 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2646 struct ixgbe_hw *hw = &adapter->hw;
2648 switch (hw->mac.type) {
2649 case ixgbe_mac_82598EB:
2650 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2651 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2653 case ixgbe_mac_82599EB:
2654 case ixgbe_mac_X540:
2655 case ixgbe_mac_X550:
2656 case ixgbe_mac_X550EM_x:
2657 case ixgbe_mac_x550em_a:
2658 mask = (qmask & 0xFFFFFFFF);
2660 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2661 mask = (qmask >> 32);
2663 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2668 /* skip the flush */
2672 * ixgbe_irq_enable - Enable default interrupt generation settings
2673 * @adapter: board private structure
2675 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2678 struct ixgbe_hw *hw = &adapter->hw;
2679 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2681 /* don't reenable LSC while waiting for link */
2682 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2683 mask &= ~IXGBE_EIMS_LSC;
2685 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2686 switch (adapter->hw.mac.type) {
2687 case ixgbe_mac_82599EB:
2688 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2690 case ixgbe_mac_X540:
2691 case ixgbe_mac_X550:
2692 case ixgbe_mac_X550EM_x:
2693 case ixgbe_mac_x550em_a:
2694 mask |= IXGBE_EIMS_TS;
2699 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2700 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2701 switch (adapter->hw.mac.type) {
2702 case ixgbe_mac_82599EB:
2703 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2704 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2706 case ixgbe_mac_X540:
2707 case ixgbe_mac_X550:
2708 case ixgbe_mac_X550EM_x:
2709 case ixgbe_mac_x550em_a:
2710 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2711 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2712 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2713 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2714 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2715 mask |= IXGBE_EICR_GPI_SDP0_X540;
2716 mask |= IXGBE_EIMS_ECC;
2717 mask |= IXGBE_EIMS_MAILBOX;
2723 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2724 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2725 mask |= IXGBE_EIMS_FLOW_DIR;
2727 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2729 ixgbe_irq_enable_queues(adapter, ~0);
2731 IXGBE_WRITE_FLUSH(&adapter->hw);
2734 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2736 struct ixgbe_adapter *adapter = data;
2737 struct ixgbe_hw *hw = &adapter->hw;
2741 * Workaround for Silicon errata. Use clear-by-write instead
2742 * of clear-by-read. Reading with EICS will return the
2743 * interrupt causes without clearing, which later be done
2744 * with the write to EICR.
2746 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2748 /* The lower 16bits of the EICR register are for the queue interrupts
2749 * which should be masked here in order to not accidentally clear them if
2750 * the bits are high when ixgbe_msix_other is called. There is a race
2751 * condition otherwise which results in possible performance loss
2752 * especially if the ixgbe_msix_other interrupt is triggering
2753 * consistently (as it would when PPS is turned on for the X540 device)
2757 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2759 if (eicr & IXGBE_EICR_LSC)
2760 ixgbe_check_lsc(adapter);
2762 if (eicr & IXGBE_EICR_MAILBOX)
2763 ixgbe_msg_task(adapter);
2765 switch (hw->mac.type) {
2766 case ixgbe_mac_82599EB:
2767 case ixgbe_mac_X540:
2768 case ixgbe_mac_X550:
2769 case ixgbe_mac_X550EM_x:
2770 case ixgbe_mac_x550em_a:
2771 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2772 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2773 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2774 ixgbe_service_event_schedule(adapter);
2775 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2776 IXGBE_EICR_GPI_SDP0_X540);
2778 if (eicr & IXGBE_EICR_ECC) {
2779 e_info(link, "Received ECC Err, initiating reset\n");
2780 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2781 ixgbe_service_event_schedule(adapter);
2782 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2784 /* Handle Flow Director Full threshold interrupt */
2785 if (eicr & IXGBE_EICR_FLOW_DIR) {
2786 int reinit_count = 0;
2788 for (i = 0; i < adapter->num_tx_queues; i++) {
2789 struct ixgbe_ring *ring = adapter->tx_ring[i];
2790 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2795 /* no more flow director interrupts until after init */
2796 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2797 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2798 ixgbe_service_event_schedule(adapter);
2801 ixgbe_check_sfp_event(adapter, eicr);
2802 ixgbe_check_overtemp_event(adapter, eicr);
2808 ixgbe_check_fan_failure(adapter, eicr);
2810 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2811 ixgbe_ptp_check_pps_event(adapter);
2813 /* re-enable the original interrupt state, no lsc, no queues */
2814 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2815 ixgbe_irq_enable(adapter, false, false);
2820 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2822 struct ixgbe_q_vector *q_vector = data;
2824 /* EIAM disabled interrupts (on this vector) for us */
2826 if (q_vector->rx.ring || q_vector->tx.ring)
2827 napi_schedule_irqoff(&q_vector->napi);
2833 * ixgbe_poll - NAPI Rx polling callback
2834 * @napi: structure for representing this polling device
2835 * @budget: how many packets driver is allowed to clean
2837 * This function is used for legacy and MSI, NAPI mode
2839 int ixgbe_poll(struct napi_struct *napi, int budget)
2841 struct ixgbe_q_vector *q_vector =
2842 container_of(napi, struct ixgbe_q_vector, napi);
2843 struct ixgbe_adapter *adapter = q_vector->adapter;
2844 struct ixgbe_ring *ring;
2845 int per_ring_budget, work_done = 0;
2846 bool clean_complete = true;
2848 #ifdef CONFIG_IXGBE_DCA
2849 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2850 ixgbe_update_dca(q_vector);
2853 ixgbe_for_each_ring(ring, q_vector->tx) {
2854 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2855 clean_complete = false;
2858 /* Exit if we are called by netpoll or busy polling is active */
2859 if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2862 /* attempt to distribute budget to each queue fairly, but don't allow
2863 * the budget to go below 1 because we'll exit polling */
2864 if (q_vector->rx.count > 1)
2865 per_ring_budget = max(budget/q_vector->rx.count, 1);
2867 per_ring_budget = budget;
2869 ixgbe_for_each_ring(ring, q_vector->rx) {
2870 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2873 work_done += cleaned;
2874 if (cleaned >= per_ring_budget)
2875 clean_complete = false;
2878 ixgbe_qv_unlock_napi(q_vector);
2879 /* If all work not completed, return budget and keep polling */
2880 if (!clean_complete)
2883 /* all work done, exit the polling mode */
2884 napi_complete_done(napi, work_done);
2885 if (adapter->rx_itr_setting & 1)
2886 ixgbe_set_itr(q_vector);
2887 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2888 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2890 return min(work_done, budget - 1);
2894 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2895 * @adapter: board private structure
2897 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2898 * interrupts from the kernel.
2900 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2902 struct net_device *netdev = adapter->netdev;
2906 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2907 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2908 struct msix_entry *entry = &adapter->msix_entries[vector];
2910 if (q_vector->tx.ring && q_vector->rx.ring) {
2911 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2912 "%s-%s-%d", netdev->name, "TxRx", ri++);
2914 } else if (q_vector->rx.ring) {
2915 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2916 "%s-%s-%d", netdev->name, "rx", ri++);
2917 } else if (q_vector->tx.ring) {
2918 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2919 "%s-%s-%d", netdev->name, "tx", ti++);
2921 /* skip this unused q_vector */
2924 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2925 q_vector->name, q_vector);
2927 e_err(probe, "request_irq failed for MSIX interrupt "
2928 "Error: %d\n", err);
2929 goto free_queue_irqs;
2931 /* If Flow Director is enabled, set interrupt affinity */
2932 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2933 /* assign the mask for this irq */
2934 irq_set_affinity_hint(entry->vector,
2935 &q_vector->affinity_mask);
2939 err = request_irq(adapter->msix_entries[vector].vector,
2940 ixgbe_msix_other, 0, netdev->name, adapter);
2942 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2943 goto free_queue_irqs;
2951 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2953 free_irq(adapter->msix_entries[vector].vector,
2954 adapter->q_vector[vector]);
2956 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2957 pci_disable_msix(adapter->pdev);
2958 kfree(adapter->msix_entries);
2959 adapter->msix_entries = NULL;
2964 * ixgbe_intr - legacy mode Interrupt Handler
2965 * @irq: interrupt number
2966 * @data: pointer to a network interface device structure
2968 static irqreturn_t ixgbe_intr(int irq, void *data)
2970 struct ixgbe_adapter *adapter = data;
2971 struct ixgbe_hw *hw = &adapter->hw;
2972 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2976 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2977 * before the read of EICR.
2979 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2981 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2982 * therefore no explicit interrupt disable is necessary */
2983 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2986 * shared interrupt alert!
2987 * make sure interrupts are enabled because the read will
2988 * have disabled interrupts due to EIAM
2989 * finish the workaround of silicon errata on 82598. Unmask
2990 * the interrupt that we masked before the EICR read.
2992 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2993 ixgbe_irq_enable(adapter, true, true);
2994 return IRQ_NONE; /* Not our interrupt */
2997 if (eicr & IXGBE_EICR_LSC)
2998 ixgbe_check_lsc(adapter);
3000 switch (hw->mac.type) {
3001 case ixgbe_mac_82599EB:
3002 ixgbe_check_sfp_event(adapter, eicr);
3004 case ixgbe_mac_X540:
3005 case ixgbe_mac_X550:
3006 case ixgbe_mac_X550EM_x:
3007 case ixgbe_mac_x550em_a:
3008 if (eicr & IXGBE_EICR_ECC) {
3009 e_info(link, "Received ECC Err, initiating reset\n");
3010 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3011 ixgbe_service_event_schedule(adapter);
3012 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3014 ixgbe_check_overtemp_event(adapter, eicr);
3020 ixgbe_check_fan_failure(adapter, eicr);
3021 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3022 ixgbe_ptp_check_pps_event(adapter);
3024 /* would disable interrupts here but EIAM disabled it */
3025 napi_schedule_irqoff(&q_vector->napi);
3028 * re-enable link(maybe) and non-queue interrupts, no flush.
3029 * ixgbe_poll will re-enable the queue interrupts
3031 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3032 ixgbe_irq_enable(adapter, false, false);
3038 * ixgbe_request_irq - initialize interrupts
3039 * @adapter: board private structure
3041 * Attempts to configure interrupts using the best available
3042 * capabilities of the hardware and kernel.
3044 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3046 struct net_device *netdev = adapter->netdev;
3049 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3050 err = ixgbe_request_msix_irqs(adapter);
3051 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3052 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3053 netdev->name, adapter);
3055 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3056 netdev->name, adapter);
3059 e_err(probe, "request_irq failed, Error %d\n", err);
3064 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3068 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3069 free_irq(adapter->pdev->irq, adapter);
3073 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3074 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3075 struct msix_entry *entry = &adapter->msix_entries[vector];
3077 /* free only the irqs that were actually requested */
3078 if (!q_vector->rx.ring && !q_vector->tx.ring)
3081 /* clear the affinity_mask in the IRQ descriptor */
3082 irq_set_affinity_hint(entry->vector, NULL);
3084 free_irq(entry->vector, q_vector);
3087 free_irq(adapter->msix_entries[vector].vector, adapter);
3091 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3092 * @adapter: board private structure
3094 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3096 switch (adapter->hw.mac.type) {
3097 case ixgbe_mac_82598EB:
3098 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3100 case ixgbe_mac_82599EB:
3101 case ixgbe_mac_X540:
3102 case ixgbe_mac_X550:
3103 case ixgbe_mac_X550EM_x:
3104 case ixgbe_mac_x550em_a:
3105 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3107 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3112 IXGBE_WRITE_FLUSH(&adapter->hw);
3113 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3116 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3117 synchronize_irq(adapter->msix_entries[vector].vector);
3119 synchronize_irq(adapter->msix_entries[vector++].vector);
3121 synchronize_irq(adapter->pdev->irq);
3126 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3129 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3131 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3133 ixgbe_write_eitr(q_vector);
3135 ixgbe_set_ivar(adapter, 0, 0, 0);
3136 ixgbe_set_ivar(adapter, 1, 0, 0);
3138 e_info(hw, "Legacy interrupt IVAR setup done\n");
3142 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3143 * @adapter: board private structure
3144 * @ring: structure containing ring specific data
3146 * Configure the Tx descriptor ring after a reset.
3148 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3149 struct ixgbe_ring *ring)
3151 struct ixgbe_hw *hw = &adapter->hw;
3152 u64 tdba = ring->dma;
3154 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3155 u8 reg_idx = ring->reg_idx;
3157 /* disable queue to avoid issues while updating state */
3158 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3159 IXGBE_WRITE_FLUSH(hw);
3161 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3162 (tdba & DMA_BIT_MASK(32)));
3163 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3164 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3165 ring->count * sizeof(union ixgbe_adv_tx_desc));
3166 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3167 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3168 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3171 * set WTHRESH to encourage burst writeback, it should not be set
3172 * higher than 1 when:
3173 * - ITR is 0 as it could cause false TX hangs
3174 * - ITR is set to > 100k int/sec and BQL is enabled
3176 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3177 * to or less than the number of on chip descriptors, which is
3180 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3181 txdctl |= 1u << 16; /* WTHRESH = 1 */
3183 txdctl |= 8u << 16; /* WTHRESH = 8 */
3186 * Setting PTHRESH to 32 both improves performance
3187 * and avoids a TX hang with DFP enabled
3189 txdctl |= (1u << 8) | /* HTHRESH = 1 */
3190 32; /* PTHRESH = 32 */
3192 /* reinitialize flowdirector state */
3193 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3194 ring->atr_sample_rate = adapter->atr_sample_rate;
3195 ring->atr_count = 0;
3196 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3198 ring->atr_sample_rate = 0;
3201 /* initialize XPS */
3202 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3203 struct ixgbe_q_vector *q_vector = ring->q_vector;
3206 netif_set_xps_queue(ring->netdev,
3207 &q_vector->affinity_mask,
3211 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3214 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3216 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3217 if (hw->mac.type == ixgbe_mac_82598EB &&
3218 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3221 /* poll to verify queue is enabled */
3223 usleep_range(1000, 2000);
3224 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3225 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3227 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3230 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3232 struct ixgbe_hw *hw = &adapter->hw;
3234 u8 tcs = netdev_get_num_tc(adapter->netdev);
3236 if (hw->mac.type == ixgbe_mac_82598EB)
3239 /* disable the arbiter while setting MTQC */
3240 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3241 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3242 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3244 /* set transmit pool layout */
3245 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3246 mtqc = IXGBE_MTQC_VT_ENA;
3248 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3250 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3251 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3252 IXGBE_82599_VMDQ_4Q_MASK)
3253 mtqc |= IXGBE_MTQC_32VF;
3255 mtqc |= IXGBE_MTQC_64VF;
3258 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3260 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3262 mtqc = IXGBE_MTQC_64Q_1PB;
3265 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3267 /* Enable Security TX Buffer IFG for multiple pb */
3269 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3270 sectx |= IXGBE_SECTX_DCB;
3271 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3274 /* re-enable the arbiter */
3275 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3276 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3280 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3281 * @adapter: board private structure
3283 * Configure the Tx unit of the MAC after a reset.
3285 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3287 struct ixgbe_hw *hw = &adapter->hw;
3291 ixgbe_setup_mtqc(adapter);
3293 if (hw->mac.type != ixgbe_mac_82598EB) {
3294 /* DMATXCTL.EN must be before Tx queues are enabled */
3295 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3296 dmatxctl |= IXGBE_DMATXCTL_TE;
3297 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3300 /* Setup the HW Tx Head and Tail descriptor pointers */
3301 for (i = 0; i < adapter->num_tx_queues; i++)
3302 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3305 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3306 struct ixgbe_ring *ring)
3308 struct ixgbe_hw *hw = &adapter->hw;
3309 u8 reg_idx = ring->reg_idx;
3310 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3312 srrctl |= IXGBE_SRRCTL_DROP_EN;
3314 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3317 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3318 struct ixgbe_ring *ring)
3320 struct ixgbe_hw *hw = &adapter->hw;
3321 u8 reg_idx = ring->reg_idx;
3322 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3324 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3326 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3329 #ifdef CONFIG_IXGBE_DCB
3330 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3332 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3336 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3338 if (adapter->ixgbe_ieee_pfc)
3339 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3342 * We should set the drop enable bit if:
3345 * Number of Rx queues > 1 and flow control is disabled
3347 * This allows us to avoid head of line blocking for security
3348 * and performance reasons.
3350 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3351 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3352 for (i = 0; i < adapter->num_rx_queues; i++)
3353 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3355 for (i = 0; i < adapter->num_rx_queues; i++)
3356 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3360 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3362 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3363 struct ixgbe_ring *rx_ring)
3365 struct ixgbe_hw *hw = &adapter->hw;
3367 u8 reg_idx = rx_ring->reg_idx;
3369 if (hw->mac.type == ixgbe_mac_82598EB) {
3370 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3373 * if VMDq is not active we must program one srrctl register
3374 * per RSS queue since we have enabled RDRXCTL.MVMEN
3379 /* configure header buffer length, needed for RSC */
3380 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3382 /* configure the packet buffer length */
3383 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3385 /* configure descriptor type */
3386 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3388 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3392 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3393 * @adapter: device handle
3395 * - 82598/82599/X540: 128
3396 * - X550(non-SRIOV mode): 512
3397 * - X550(SRIOV mode): 64
3399 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3401 if (adapter->hw.mac.type < ixgbe_mac_X550)
3403 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3410 * ixgbe_store_reta - Write the RETA table to HW
3411 * @adapter: device handle
3413 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3415 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3417 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3418 struct ixgbe_hw *hw = &adapter->hw;
3421 u8 *indir_tbl = adapter->rss_indir_tbl;
3423 /* Fill out the redirection table as follows:
3424 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3426 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3427 * - X550: 8 bit wide entries containing 6 bit RSS index
3429 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3430 indices_multi = 0x11;
3432 indices_multi = 0x1;
3434 /* Write redirection table to HW */
3435 for (i = 0; i < reta_entries; i++) {
3436 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3439 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3441 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3449 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3450 * @adapter: device handle
3452 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3454 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3456 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3457 struct ixgbe_hw *hw = &adapter->hw;
3459 unsigned int pf_pool = adapter->num_vfs;
3461 /* Write redirection table to HW */
3462 for (i = 0; i < reta_entries; i++) {
3463 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3465 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3472 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3474 struct ixgbe_hw *hw = &adapter->hw;
3476 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3477 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3479 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3480 * make full use of any rings they may have. We will use the
3481 * PSRTYPE register to control how many rings we use within the PF.
3483 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3486 /* Fill out hash function seeds */
3487 for (i = 0; i < 10; i++)
3488 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3490 /* Fill out redirection table */
3491 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3493 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3497 adapter->rss_indir_tbl[i] = j;
3500 ixgbe_store_reta(adapter);
3503 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3505 struct ixgbe_hw *hw = &adapter->hw;
3506 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3507 unsigned int pf_pool = adapter->num_vfs;
3510 /* Fill out hash function seeds */
3511 for (i = 0; i < 10; i++)
3512 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3513 adapter->rss_key[i]);
3515 /* Fill out the redirection table */
3516 for (i = 0, j = 0; i < 64; i++, j++) {
3520 adapter->rss_indir_tbl[i] = j;
3523 ixgbe_store_vfreta(adapter);
3526 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3528 struct ixgbe_hw *hw = &adapter->hw;
3529 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3532 /* Disable indicating checksum in descriptor, enables RSS hash */
3533 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3534 rxcsum |= IXGBE_RXCSUM_PCSD;
3535 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3537 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3538 if (adapter->ring_feature[RING_F_RSS].mask)
3539 mrqc = IXGBE_MRQC_RSSEN;
3541 u8 tcs = netdev_get_num_tc(adapter->netdev);
3543 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3545 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3547 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3548 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3549 IXGBE_82599_VMDQ_4Q_MASK)
3550 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3552 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3555 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3557 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3559 mrqc = IXGBE_MRQC_RSSEN;
3563 /* Perform hash on these packet types */
3564 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3565 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3566 IXGBE_MRQC_RSS_FIELD_IPV6 |
3567 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3569 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3570 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3571 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3572 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3574 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3575 if ((hw->mac.type >= ixgbe_mac_X550) &&
3576 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3577 unsigned int pf_pool = adapter->num_vfs;
3579 /* Enable VF RSS mode */
3580 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3581 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3583 /* Setup RSS through the VF registers */
3584 ixgbe_setup_vfreta(adapter);
3585 vfmrqc = IXGBE_MRQC_RSSEN;
3586 vfmrqc |= rss_field;
3587 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3589 ixgbe_setup_reta(adapter);
3591 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3596 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3597 * @adapter: address of board private structure
3598 * @index: index of ring to set
3600 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3601 struct ixgbe_ring *ring)
3603 struct ixgbe_hw *hw = &adapter->hw;
3605 u8 reg_idx = ring->reg_idx;
3607 if (!ring_is_rsc_enabled(ring))
3610 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3611 rscctrl |= IXGBE_RSCCTL_RSCEN;
3613 * we must limit the number of descriptors so that the
3614 * total size of max desc * buf_len is not greater
3617 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3618 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3621 #define IXGBE_MAX_RX_DESC_POLL 10
3622 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3623 struct ixgbe_ring *ring)
3625 struct ixgbe_hw *hw = &adapter->hw;
3626 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3628 u8 reg_idx = ring->reg_idx;
3630 if (ixgbe_removed(hw->hw_addr))
3632 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3633 if (hw->mac.type == ixgbe_mac_82598EB &&
3634 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3638 usleep_range(1000, 2000);
3639 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3640 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3643 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3644 "the polling period\n", reg_idx);
3648 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3649 struct ixgbe_ring *ring)
3651 struct ixgbe_hw *hw = &adapter->hw;
3652 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3654 u8 reg_idx = ring->reg_idx;
3656 if (ixgbe_removed(hw->hw_addr))
3658 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3659 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3661 /* write value back with RXDCTL.ENABLE bit cleared */
3662 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3664 if (hw->mac.type == ixgbe_mac_82598EB &&
3665 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3668 /* the hardware may take up to 100us to really disable the rx queue */
3671 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3672 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3675 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3676 "the polling period\n", reg_idx);
3680 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3681 struct ixgbe_ring *ring)
3683 struct ixgbe_hw *hw = &adapter->hw;
3684 u64 rdba = ring->dma;
3686 u8 reg_idx = ring->reg_idx;
3688 /* disable queue to avoid issues while updating state */
3689 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3690 ixgbe_disable_rx_queue(adapter, ring);
3692 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3693 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3694 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3695 ring->count * sizeof(union ixgbe_adv_rx_desc));
3696 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3697 IXGBE_WRITE_FLUSH(hw);
3699 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3700 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3701 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3703 ixgbe_configure_srrctl(adapter, ring);
3704 ixgbe_configure_rscctl(adapter, ring);
3706 if (hw->mac.type == ixgbe_mac_82598EB) {
3708 * enable cache line friendly hardware writes:
3709 * PTHRESH=32 descriptors (half the internal cache),
3710 * this also removes ugly rx_no_buffer_count increment
3711 * HTHRESH=4 descriptors (to minimize latency on fetch)
3712 * WTHRESH=8 burst writeback up to two cache lines
3714 rxdctl &= ~0x3FFFFF;
3718 /* enable receive descriptor ring */
3719 rxdctl |= IXGBE_RXDCTL_ENABLE;
3720 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3722 ixgbe_rx_desc_queue_enable(adapter, ring);
3723 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3726 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3728 struct ixgbe_hw *hw = &adapter->hw;
3729 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3732 /* PSRTYPE must be initialized in non 82598 adapters */
3733 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3734 IXGBE_PSRTYPE_UDPHDR |
3735 IXGBE_PSRTYPE_IPV4HDR |
3736 IXGBE_PSRTYPE_L2HDR |
3737 IXGBE_PSRTYPE_IPV6HDR;
3739 if (hw->mac.type == ixgbe_mac_82598EB)
3743 psrtype |= 2u << 29;
3745 psrtype |= 1u << 29;
3747 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3748 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3751 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3753 struct ixgbe_hw *hw = &adapter->hw;
3754 u32 reg_offset, vf_shift;
3755 u32 gcr_ext, vmdctl;
3758 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3761 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3762 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3763 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3764 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3765 vmdctl |= IXGBE_VT_CTL_REPLEN;
3766 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3768 vf_shift = VMDQ_P(0) % 32;
3769 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3771 /* Enable only the PF's pool for Tx/Rx */
3772 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3773 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3774 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3775 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3776 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3777 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3779 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3780 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3782 /* clear VLAN promisc flag so VFTA will be updated if necessary */
3783 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3786 * Set up VF register offsets for selected VT Mode,
3787 * i.e. 32 or 64 VFs for SR-IOV
3789 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3790 case IXGBE_82599_VMDQ_8Q_MASK:
3791 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3793 case IXGBE_82599_VMDQ_4Q_MASK:
3794 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3797 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3801 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3803 for (i = 0; i < adapter->num_vfs; i++) {
3804 /* configure spoof checking */
3805 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3806 adapter->vfinfo[i].spoofchk_enabled);
3808 /* Enable/Disable RSS query feature */
3809 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3810 adapter->vfinfo[i].rss_query_enabled);
3814 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3816 struct ixgbe_hw *hw = &adapter->hw;
3817 struct net_device *netdev = adapter->netdev;
3818 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3819 struct ixgbe_ring *rx_ring;
3824 /* adjust max frame to be able to do baby jumbo for FCoE */
3825 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3826 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3827 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3829 #endif /* IXGBE_FCOE */
3831 /* adjust max frame to be at least the size of a standard frame */
3832 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3833 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3835 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3836 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3837 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3838 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3840 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3843 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3844 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3845 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3846 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3849 * Setup the HW Rx Head and Tail Descriptor Pointers and
3850 * the Base and Length of the Rx Descriptor Ring
3852 for (i = 0; i < adapter->num_rx_queues; i++) {
3853 rx_ring = adapter->rx_ring[i];
3854 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3855 set_ring_rsc_enabled(rx_ring);
3857 clear_ring_rsc_enabled(rx_ring);
3861 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3863 struct ixgbe_hw *hw = &adapter->hw;
3864 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3866 switch (hw->mac.type) {
3867 case ixgbe_mac_82598EB:
3869 * For VMDq support of different descriptor types or
3870 * buffer sizes through the use of multiple SRRCTL
3871 * registers, RDRXCTL.MVMEN must be set to 1
3873 * also, the manual doesn't mention it clearly but DCA hints
3874 * will only use queue 0's tags unless this bit is set. Side
3875 * effects of setting this bit are only that SRRCTL must be
3876 * fully programmed [0..15]
3878 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3880 case ixgbe_mac_X550:
3881 case ixgbe_mac_X550EM_x:
3882 case ixgbe_mac_x550em_a:
3883 if (adapter->num_vfs)
3884 rdrxctl |= IXGBE_RDRXCTL_PSP;
3885 /* fall through for older HW */
3886 case ixgbe_mac_82599EB:
3887 case ixgbe_mac_X540:
3888 /* Disable RSC for ACK packets */
3889 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3890 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3891 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3892 /* hardware requires some bits to be set by default */
3893 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3894 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3897 /* We should do nothing since we don't know this hardware */
3901 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3905 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3906 * @adapter: board private structure
3908 * Configure the Rx unit of the MAC after a reset.
3910 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3912 struct ixgbe_hw *hw = &adapter->hw;
3916 /* disable receives while setting up the descriptors */
3917 hw->mac.ops.disable_rx(hw);
3919 ixgbe_setup_psrtype(adapter);
3920 ixgbe_setup_rdrxctl(adapter);
3923 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3924 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3925 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3926 rfctl |= IXGBE_RFCTL_RSC_DIS;
3928 /* disable NFS filtering */
3929 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
3930 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3932 /* Program registers for the distribution of queues */
3933 ixgbe_setup_mrqc(adapter);
3935 /* set_rx_buffer_len must be called before ring initialization */
3936 ixgbe_set_rx_buffer_len(adapter);
3939 * Setup the HW Rx Head and Tail Descriptor Pointers and
3940 * the Base and Length of the Rx Descriptor Ring
3942 for (i = 0; i < adapter->num_rx_queues; i++)
3943 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3945 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3946 /* disable drop enable for 82598 parts */
3947 if (hw->mac.type == ixgbe_mac_82598EB)
3948 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3950 /* enable all receives */
3951 rxctrl |= IXGBE_RXCTRL_RXEN;
3952 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3955 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3956 __be16 proto, u16 vid)
3958 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3959 struct ixgbe_hw *hw = &adapter->hw;
3961 /* add VID to filter table */
3962 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3963 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3965 set_bit(vid, adapter->active_vlans);
3970 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3975 /* short cut the special case */
3979 /* Search for the vlan id in the VLVF entries */
3980 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
3981 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
3982 if ((vlvf & VLAN_VID_MASK) == vlan)
3989 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
3991 struct ixgbe_hw *hw = &adapter->hw;
3995 idx = ixgbe_find_vlvf_entry(hw, vid);
3999 /* See if any other pools are set for this VLAN filter
4000 * entry other than the PF.
4002 word = idx * 2 + (VMDQ_P(0) / 32);
4003 bits = ~BIT(VMDQ_P(0) % 32);
4004 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4006 /* Disable the filter so this falls into the default pool. */
4007 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4008 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4009 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4010 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4014 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4015 __be16 proto, u16 vid)
4017 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4018 struct ixgbe_hw *hw = &adapter->hw;
4020 /* remove VID from filter table */
4021 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4022 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4024 clear_bit(vid, adapter->active_vlans);
4030 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4031 * @adapter: driver data
4033 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4035 struct ixgbe_hw *hw = &adapter->hw;
4039 switch (hw->mac.type) {
4040 case ixgbe_mac_82598EB:
4041 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4042 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4043 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4045 case ixgbe_mac_82599EB:
4046 case ixgbe_mac_X540:
4047 case ixgbe_mac_X550:
4048 case ixgbe_mac_X550EM_x:
4049 case ixgbe_mac_x550em_a:
4050 for (i = 0; i < adapter->num_rx_queues; i++) {
4051 struct ixgbe_ring *ring = adapter->rx_ring[i];
4053 if (ring->l2_accel_priv)
4056 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4057 vlnctrl &= ~IXGBE_RXDCTL_VME;
4058 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4067 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4068 * @adapter: driver data
4070 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4072 struct ixgbe_hw *hw = &adapter->hw;
4076 switch (hw->mac.type) {
4077 case ixgbe_mac_82598EB:
4078 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4079 vlnctrl |= IXGBE_VLNCTRL_VME;
4080 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4082 case ixgbe_mac_82599EB:
4083 case ixgbe_mac_X540:
4084 case ixgbe_mac_X550:
4085 case ixgbe_mac_X550EM_x:
4086 case ixgbe_mac_x550em_a:
4087 for (i = 0; i < adapter->num_rx_queues; i++) {
4088 struct ixgbe_ring *ring = adapter->rx_ring[i];
4090 if (ring->l2_accel_priv)
4093 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4094 vlnctrl |= IXGBE_RXDCTL_VME;
4095 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4103 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4105 struct ixgbe_hw *hw = &adapter->hw;
4108 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4110 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4111 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4112 vlnctrl |= IXGBE_VLNCTRL_VFE;
4113 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4115 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4116 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4120 /* Nothing to do for 82598 */
4121 if (hw->mac.type == ixgbe_mac_82598EB)
4124 /* We are already in VLAN promisc, nothing to do */
4125 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4128 /* Set flag so we don't redo unnecessary work */
4129 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4131 /* Add PF to all active pools */
4132 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4133 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4134 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4136 vlvfb |= BIT(VMDQ_P(0) % 32);
4137 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4140 /* Set all bits in the VLAN filter table array */
4141 for (i = hw->mac.vft_size; i--;)
4142 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4145 #define VFTA_BLOCK_SIZE 8
4146 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4148 struct ixgbe_hw *hw = &adapter->hw;
4149 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4150 u32 vid_start = vfta_offset * 32;
4151 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4152 u32 i, vid, word, bits;
4154 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4155 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4157 /* pull VLAN ID from VLVF */
4158 vid = vlvf & VLAN_VID_MASK;
4160 /* only concern outselves with a certain range */
4161 if (vid < vid_start || vid >= vid_end)
4165 /* record VLAN ID in VFTA */
4166 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4168 /* if PF is part of this then continue */
4169 if (test_bit(vid, adapter->active_vlans))
4173 /* remove PF from the pool */
4174 word = i * 2 + VMDQ_P(0) / 32;
4175 bits = ~BIT(VMDQ_P(0) % 32);
4176 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4177 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4180 /* extract values from active_vlans and write back to VFTA */
4181 for (i = VFTA_BLOCK_SIZE; i--;) {
4182 vid = (vfta_offset + i) * 32;
4183 word = vid / BITS_PER_LONG;
4184 bits = vid % BITS_PER_LONG;
4186 vfta[i] |= adapter->active_vlans[word] >> bits;
4188 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4192 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4194 struct ixgbe_hw *hw = &adapter->hw;
4197 /* Set VLAN filtering to enabled */
4198 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4199 vlnctrl |= IXGBE_VLNCTRL_VFE;
4200 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4202 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4203 hw->mac.type == ixgbe_mac_82598EB)
4206 /* We are not in VLAN promisc, nothing to do */
4207 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4210 /* Set flag so we don't redo unnecessary work */
4211 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4213 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4214 ixgbe_scrub_vfta(adapter, i);
4217 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4221 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4223 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4224 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4228 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4229 * @netdev: network interface device structure
4231 * Writes multicast address list to the MTA hash table.
4232 * Returns: -ENOMEM on failure
4233 * 0 on no addresses written
4234 * X on writing X addresses to MTA
4236 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4238 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4239 struct ixgbe_hw *hw = &adapter->hw;
4241 if (!netif_running(netdev))
4244 if (hw->mac.ops.update_mc_addr_list)
4245 hw->mac.ops.update_mc_addr_list(hw, netdev);
4249 #ifdef CONFIG_PCI_IOV
4250 ixgbe_restore_vf_multicasts(adapter);
4253 return netdev_mc_count(netdev);
4256 #ifdef CONFIG_PCI_IOV
4257 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4259 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4260 struct ixgbe_hw *hw = &adapter->hw;
4263 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4264 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4266 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4267 hw->mac.ops.set_rar(hw, i,
4272 hw->mac.ops.clear_rar(hw, i);
4277 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4279 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4280 struct ixgbe_hw *hw = &adapter->hw;
4283 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4284 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4287 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4289 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4290 hw->mac.ops.set_rar(hw, i,
4295 hw->mac.ops.clear_rar(hw, i);
4299 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4301 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4302 struct ixgbe_hw *hw = &adapter->hw;
4305 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4306 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4307 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4310 ixgbe_sync_mac_table(adapter);
4313 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4315 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4316 struct ixgbe_hw *hw = &adapter->hw;
4319 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4320 /* do not count default RAR as available */
4321 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4324 /* only count unused and addresses that belong to us */
4325 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4326 if (mac_table->pool != pool)
4336 /* this function destroys the first RAR entry */
4337 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4339 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4340 struct ixgbe_hw *hw = &adapter->hw;
4342 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4343 mac_table->pool = VMDQ_P(0);
4345 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4347 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4351 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4352 const u8 *addr, u16 pool)
4354 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4355 struct ixgbe_hw *hw = &adapter->hw;
4358 if (is_zero_ether_addr(addr))
4361 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4362 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4365 ether_addr_copy(mac_table->addr, addr);
4366 mac_table->pool = pool;
4368 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4369 IXGBE_MAC_STATE_IN_USE;
4371 ixgbe_sync_mac_table(adapter);
4379 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4380 const u8 *addr, u16 pool)
4382 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4383 struct ixgbe_hw *hw = &adapter->hw;
4386 if (is_zero_ether_addr(addr))
4389 /* search table for addr, if found clear IN_USE flag and sync */
4390 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4391 /* we can only delete an entry if it is in use */
4392 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4394 /* we only care about entries that belong to the given pool */
4395 if (mac_table->pool != pool)
4397 /* we only care about a specific MAC address */
4398 if (!ether_addr_equal(addr, mac_table->addr))
4401 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4402 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4404 ixgbe_sync_mac_table(adapter);
4412 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4413 * @netdev: network interface device structure
4415 * Writes unicast address list to the RAR table.
4416 * Returns: -ENOMEM on failure/insufficient address space
4417 * 0 on no addresses written
4418 * X on writing X addresses to the RAR table
4420 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4422 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4425 /* return ENOMEM indicating insufficient memory for addresses */
4426 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4429 if (!netdev_uc_empty(netdev)) {
4430 struct netdev_hw_addr *ha;
4431 netdev_for_each_uc_addr(ha, netdev) {
4432 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4433 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4440 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4442 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4445 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4447 return min_t(int, ret, 0);
4450 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4452 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4454 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4460 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4461 * @netdev: network interface device structure
4463 * The set_rx_method entry point is called whenever the unicast/multicast
4464 * address list or the network interface flags are updated. This routine is
4465 * responsible for configuring the hardware for proper unicast, multicast and
4468 void ixgbe_set_rx_mode(struct net_device *netdev)
4470 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4471 struct ixgbe_hw *hw = &adapter->hw;
4472 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4473 netdev_features_t features = netdev->features;
4476 /* Check for Promiscuous and All Multicast modes */
4477 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4479 /* set all bits that we expect to always be set */
4480 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4481 fctrl |= IXGBE_FCTRL_BAM;
4482 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4483 fctrl |= IXGBE_FCTRL_PMCF;
4485 /* clear the bits we are changing the status of */
4486 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4487 if (netdev->flags & IFF_PROMISC) {
4488 hw->addr_ctrl.user_set_promisc = true;
4489 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4490 vmolr |= IXGBE_VMOLR_MPE;
4491 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4493 if (netdev->flags & IFF_ALLMULTI) {
4494 fctrl |= IXGBE_FCTRL_MPE;
4495 vmolr |= IXGBE_VMOLR_MPE;
4497 hw->addr_ctrl.user_set_promisc = false;
4501 * Write addresses to available RAR registers, if there is not
4502 * sufficient space to store all the addresses then enable
4503 * unicast promiscuous mode
4505 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4506 fctrl |= IXGBE_FCTRL_UPE;
4507 vmolr |= IXGBE_VMOLR_ROPE;
4510 /* Write addresses to the MTA, if the attempt fails
4511 * then we should just turn on promiscuous mode so
4512 * that we can at least receive multicast traffic
4514 count = ixgbe_write_mc_addr_list(netdev);
4516 fctrl |= IXGBE_FCTRL_MPE;
4517 vmolr |= IXGBE_VMOLR_MPE;
4519 vmolr |= IXGBE_VMOLR_ROMPE;
4522 if (hw->mac.type != ixgbe_mac_82598EB) {
4523 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4524 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4526 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4529 /* This is useful for sniffing bad packets. */
4530 if (features & NETIF_F_RXALL) {
4531 /* UPE and MPE will be handled by normal PROMISC logic
4532 * in e1000e_set_rx_mode */
4533 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4534 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4535 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4537 fctrl &= ~(IXGBE_FCTRL_DPF);
4538 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4541 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4543 if (features & NETIF_F_HW_VLAN_CTAG_RX)
4544 ixgbe_vlan_strip_enable(adapter);
4546 ixgbe_vlan_strip_disable(adapter);
4548 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4549 ixgbe_vlan_promisc_disable(adapter);
4551 ixgbe_vlan_promisc_enable(adapter);
4554 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4558 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4559 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4560 napi_enable(&adapter->q_vector[q_idx]->napi);
4564 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4568 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4569 napi_disable(&adapter->q_vector[q_idx]->napi);
4570 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4571 pr_info("QV %d locked\n", q_idx);
4572 usleep_range(1000, 20000);
4577 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4579 struct ixgbe_hw *hw = &adapter->hw;
4582 if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4583 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4586 vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4587 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4589 if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4590 adapter->vxlan_port = 0;
4592 if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4593 adapter->geneve_port = 0;
4596 #ifdef CONFIG_IXGBE_DCB
4598 * ixgbe_configure_dcb - Configure DCB hardware
4599 * @adapter: ixgbe adapter struct
4601 * This is called by the driver on open to configure the DCB hardware.
4602 * This is also called by the gennetlink interface when reconfiguring
4605 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4607 struct ixgbe_hw *hw = &adapter->hw;
4608 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4610 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4611 if (hw->mac.type == ixgbe_mac_82598EB)
4612 netif_set_gso_max_size(adapter->netdev, 65536);
4616 if (hw->mac.type == ixgbe_mac_82598EB)
4617 netif_set_gso_max_size(adapter->netdev, 32768);
4620 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4621 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4624 /* reconfigure the hardware */
4625 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4626 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4628 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4630 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4631 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4632 ixgbe_dcb_hw_ets(&adapter->hw,
4633 adapter->ixgbe_ieee_ets,
4635 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4636 adapter->ixgbe_ieee_pfc->pfc_en,
4637 adapter->ixgbe_ieee_ets->prio_tc);
4640 /* Enable RSS Hash per TC */
4641 if (hw->mac.type != ixgbe_mac_82598EB) {
4643 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4650 /* write msb to all 8 TCs in one write */
4651 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4656 /* Additional bittime to account for IXGBE framing */
4657 #define IXGBE_ETH_FRAMING 20
4660 * ixgbe_hpbthresh - calculate high water mark for flow control
4662 * @adapter: board private structure to calculate for
4663 * @pb: packet buffer to calculate
4665 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4667 struct ixgbe_hw *hw = &adapter->hw;
4668 struct net_device *dev = adapter->netdev;
4669 int link, tc, kb, marker;
4672 /* Calculate max LAN frame size */
4673 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4676 /* FCoE traffic class uses FCOE jumbo frames */
4677 if ((dev->features & NETIF_F_FCOE_MTU) &&
4678 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4679 (pb == ixgbe_fcoe_get_tc(adapter)))
4680 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4683 /* Calculate delay value for device */
4684 switch (hw->mac.type) {
4685 case ixgbe_mac_X540:
4686 case ixgbe_mac_X550:
4687 case ixgbe_mac_X550EM_x:
4688 case ixgbe_mac_x550em_a:
4689 dv_id = IXGBE_DV_X540(link, tc);
4692 dv_id = IXGBE_DV(link, tc);
4696 /* Loopback switch introduces additional latency */
4697 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4698 dv_id += IXGBE_B2BT(tc);
4700 /* Delay value is calculated in bit times convert to KB */
4701 kb = IXGBE_BT2KB(dv_id);
4702 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4704 marker = rx_pba - kb;
4706 /* It is possible that the packet buffer is not large enough
4707 * to provide required headroom. In this case throw an error
4708 * to user and a do the best we can.
4711 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4712 "headroom to support flow control."
4713 "Decrease MTU or number of traffic classes\n", pb);
4721 * ixgbe_lpbthresh - calculate low water mark for for flow control
4723 * @adapter: board private structure to calculate for
4724 * @pb: packet buffer to calculate
4726 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4728 struct ixgbe_hw *hw = &adapter->hw;
4729 struct net_device *dev = adapter->netdev;
4733 /* Calculate max LAN frame size */
4734 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4737 /* FCoE traffic class uses FCOE jumbo frames */
4738 if ((dev->features & NETIF_F_FCOE_MTU) &&
4739 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4740 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4741 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4744 /* Calculate delay value for device */
4745 switch (hw->mac.type) {
4746 case ixgbe_mac_X540:
4747 case ixgbe_mac_X550:
4748 case ixgbe_mac_X550EM_x:
4749 case ixgbe_mac_x550em_a:
4750 dv_id = IXGBE_LOW_DV_X540(tc);
4753 dv_id = IXGBE_LOW_DV(tc);
4757 /* Delay value is calculated in bit times convert to KB */
4758 return IXGBE_BT2KB(dv_id);
4762 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4764 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4766 struct ixgbe_hw *hw = &adapter->hw;
4767 int num_tc = netdev_get_num_tc(adapter->netdev);
4773 for (i = 0; i < num_tc; i++) {
4774 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4775 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4777 /* Low water marks must not be larger than high water marks */
4778 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4779 hw->fc.low_water[i] = 0;
4782 for (; i < MAX_TRAFFIC_CLASS; i++)
4783 hw->fc.high_water[i] = 0;
4786 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4788 struct ixgbe_hw *hw = &adapter->hw;
4790 u8 tc = netdev_get_num_tc(adapter->netdev);
4792 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4793 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4794 hdrm = 32 << adapter->fdir_pballoc;
4798 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4799 ixgbe_pbthresh_setup(adapter);
4802 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4804 struct ixgbe_hw *hw = &adapter->hw;
4805 struct hlist_node *node2;
4806 struct ixgbe_fdir_filter *filter;
4808 spin_lock(&adapter->fdir_perfect_lock);
4810 if (!hlist_empty(&adapter->fdir_filter_list))
4811 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4813 hlist_for_each_entry_safe(filter, node2,
4814 &adapter->fdir_filter_list, fdir_node) {
4815 ixgbe_fdir_write_perfect_filter_82599(hw,
4818 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4819 IXGBE_FDIR_DROP_QUEUE :
4820 adapter->rx_ring[filter->action]->reg_idx);
4823 spin_unlock(&adapter->fdir_perfect_lock);
4826 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4827 struct ixgbe_adapter *adapter)
4829 struct ixgbe_hw *hw = &adapter->hw;
4832 /* No unicast promiscuous support for VMDQ devices. */
4833 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4834 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4836 /* clear the affected bit */
4837 vmolr &= ~IXGBE_VMOLR_MPE;
4839 if (dev->flags & IFF_ALLMULTI) {
4840 vmolr |= IXGBE_VMOLR_MPE;
4842 vmolr |= IXGBE_VMOLR_ROMPE;
4843 hw->mac.ops.update_mc_addr_list(hw, dev);
4845 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4846 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4849 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4851 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4852 int rss_i = adapter->num_rx_queues_per_pool;
4853 struct ixgbe_hw *hw = &adapter->hw;
4854 u16 pool = vadapter->pool;
4855 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4856 IXGBE_PSRTYPE_UDPHDR |
4857 IXGBE_PSRTYPE_IPV4HDR |
4858 IXGBE_PSRTYPE_L2HDR |
4859 IXGBE_PSRTYPE_IPV6HDR;
4861 if (hw->mac.type == ixgbe_mac_82598EB)
4865 psrtype |= 2u << 29;
4867 psrtype |= 1u << 29;
4869 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4873 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4874 * @rx_ring: ring to free buffers from
4876 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4878 struct device *dev = rx_ring->dev;
4882 /* ring already cleared, nothing to do */
4883 if (!rx_ring->rx_buffer_info)
4886 /* Free all the Rx ring sk_buffs */
4887 for (i = 0; i < rx_ring->count; i++) {
4888 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4890 if (rx_buffer->skb) {
4891 struct sk_buff *skb = rx_buffer->skb;
4892 if (IXGBE_CB(skb)->page_released)
4895 ixgbe_rx_bufsz(rx_ring),
4898 rx_buffer->skb = NULL;
4901 if (!rx_buffer->page)
4904 dma_unmap_page(dev, rx_buffer->dma,
4905 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4906 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4908 rx_buffer->page = NULL;
4911 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4912 memset(rx_ring->rx_buffer_info, 0, size);
4914 /* Zero out the descriptor ring */
4915 memset(rx_ring->desc, 0, rx_ring->size);
4917 rx_ring->next_to_alloc = 0;
4918 rx_ring->next_to_clean = 0;
4919 rx_ring->next_to_use = 0;
4922 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4923 struct ixgbe_ring *rx_ring)
4925 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4926 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4928 /* shutdown specific queue receive and wait for dma to settle */
4929 ixgbe_disable_rx_queue(adapter, rx_ring);
4930 usleep_range(10000, 20000);
4931 ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4932 ixgbe_clean_rx_ring(rx_ring);
4933 rx_ring->l2_accel_priv = NULL;
4936 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4937 struct ixgbe_fwd_adapter *accel)
4939 struct ixgbe_adapter *adapter = accel->real_adapter;
4940 unsigned int rxbase = accel->rx_base_queue;
4941 unsigned int txbase = accel->tx_base_queue;
4944 netif_tx_stop_all_queues(vdev);
4946 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4947 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4948 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4951 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4952 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4953 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4960 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4961 struct ixgbe_fwd_adapter *accel)
4963 struct ixgbe_adapter *adapter = accel->real_adapter;
4964 unsigned int rxbase, txbase, queues;
4965 int i, baseq, err = 0;
4967 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4970 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4971 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4972 accel->pool, adapter->num_rx_pools,
4973 baseq, baseq + adapter->num_rx_queues_per_pool,
4974 adapter->fwd_bitmask);
4976 accel->netdev = vdev;
4977 accel->rx_base_queue = rxbase = baseq;
4978 accel->tx_base_queue = txbase = baseq;
4980 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4981 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4983 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4984 adapter->rx_ring[rxbase + i]->netdev = vdev;
4985 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4986 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4989 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4990 adapter->tx_ring[txbase + i]->netdev = vdev;
4991 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4994 queues = min_t(unsigned int,
4995 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4996 err = netif_set_real_num_tx_queues(vdev, queues);
5000 err = netif_set_real_num_rx_queues(vdev, queues);
5004 if (is_valid_ether_addr(vdev->dev_addr))
5005 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5007 ixgbe_fwd_psrtype(accel);
5008 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5011 ixgbe_fwd_ring_down(vdev, accel);
5015 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5017 struct net_device *upper;
5018 struct list_head *iter;
5021 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5022 if (netif_is_macvlan(upper)) {
5023 struct macvlan_dev *dfwd = netdev_priv(upper);
5024 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5026 if (dfwd->fwd_priv) {
5027 err = ixgbe_fwd_ring_up(upper, vadapter);
5035 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5037 struct ixgbe_hw *hw = &adapter->hw;
5039 ixgbe_configure_pb(adapter);
5040 #ifdef CONFIG_IXGBE_DCB
5041 ixgbe_configure_dcb(adapter);
5044 * We must restore virtualization before VLANs or else
5045 * the VLVF registers will not be populated
5047 ixgbe_configure_virtualization(adapter);
5049 ixgbe_set_rx_mode(adapter->netdev);
5050 ixgbe_restore_vlan(adapter);
5052 switch (hw->mac.type) {
5053 case ixgbe_mac_82599EB:
5054 case ixgbe_mac_X540:
5055 hw->mac.ops.disable_rx_buff(hw);
5061 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5062 ixgbe_init_fdir_signature_82599(&adapter->hw,
5063 adapter->fdir_pballoc);
5064 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5065 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5066 adapter->fdir_pballoc);
5067 ixgbe_fdir_filter_restore(adapter);
5070 switch (hw->mac.type) {
5071 case ixgbe_mac_82599EB:
5072 case ixgbe_mac_X540:
5073 hw->mac.ops.enable_rx_buff(hw);
5079 #ifdef CONFIG_IXGBE_DCA
5081 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5082 ixgbe_setup_dca(adapter);
5083 #endif /* CONFIG_IXGBE_DCA */
5086 /* configure FCoE L2 filters, redirection table, and Rx control */
5087 ixgbe_configure_fcoe(adapter);
5089 #endif /* IXGBE_FCOE */
5090 ixgbe_configure_tx(adapter);
5091 ixgbe_configure_rx(adapter);
5092 ixgbe_configure_dfwd(adapter);
5096 * ixgbe_sfp_link_config - set up SFP+ link
5097 * @adapter: pointer to private adapter struct
5099 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5102 * We are assuming the worst case scenario here, and that
5103 * is that an SFP was inserted/removed after the reset
5104 * but before SFP detection was enabled. As such the best
5105 * solution is to just start searching as soon as we start
5107 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5108 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5110 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5111 adapter->sfp_poll_time = 0;
5115 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5116 * @hw: pointer to private hardware struct
5118 * Returns 0 on success, negative on failure
5120 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5123 bool autoneg, link_up = false;
5124 int ret = IXGBE_ERR_LINK_SETUP;
5126 if (hw->mac.ops.check_link)
5127 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5132 speed = hw->phy.autoneg_advertised;
5133 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5134 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5139 if (hw->mac.ops.setup_link)
5140 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5145 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5147 struct ixgbe_hw *hw = &adapter->hw;
5150 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5151 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5153 gpie |= IXGBE_GPIE_EIAME;
5155 * use EIAM to auto-mask when MSI-X interrupt is asserted
5156 * this saves a register write for every interrupt
5158 switch (hw->mac.type) {
5159 case ixgbe_mac_82598EB:
5160 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5162 case ixgbe_mac_82599EB:
5163 case ixgbe_mac_X540:
5164 case ixgbe_mac_X550:
5165 case ixgbe_mac_X550EM_x:
5166 case ixgbe_mac_x550em_a:
5168 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5169 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5173 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5174 * specifically only auto mask tx and rx interrupts */
5175 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5178 /* XXX: to interrupt immediately for EICS writes, enable this */
5179 /* gpie |= IXGBE_GPIE_EIMEN; */
5181 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5182 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5184 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5185 case IXGBE_82599_VMDQ_8Q_MASK:
5186 gpie |= IXGBE_GPIE_VTMODE_16;
5188 case IXGBE_82599_VMDQ_4Q_MASK:
5189 gpie |= IXGBE_GPIE_VTMODE_32;
5192 gpie |= IXGBE_GPIE_VTMODE_64;
5197 /* Enable Thermal over heat sensor interrupt */
5198 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5199 switch (adapter->hw.mac.type) {
5200 case ixgbe_mac_82599EB:
5201 gpie |= IXGBE_SDP0_GPIEN_8259X;
5208 /* Enable fan failure interrupt */
5209 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5210 gpie |= IXGBE_SDP1_GPIEN(hw);
5212 switch (hw->mac.type) {
5213 case ixgbe_mac_82599EB:
5214 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5216 case ixgbe_mac_X550EM_x:
5217 case ixgbe_mac_x550em_a:
5218 gpie |= IXGBE_SDP0_GPIEN_X540;
5224 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5227 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5229 struct ixgbe_hw *hw = &adapter->hw;
5233 ixgbe_get_hw_control(adapter);
5234 ixgbe_setup_gpie(adapter);
5236 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5237 ixgbe_configure_msix(adapter);
5239 ixgbe_configure_msi_and_legacy(adapter);
5241 /* enable the optics for 82599 SFP+ fiber */
5242 if (hw->mac.ops.enable_tx_laser)
5243 hw->mac.ops.enable_tx_laser(hw);
5245 if (hw->phy.ops.set_phy_power)
5246 hw->phy.ops.set_phy_power(hw, true);
5248 smp_mb__before_atomic();
5249 clear_bit(__IXGBE_DOWN, &adapter->state);
5250 ixgbe_napi_enable_all(adapter);
5252 if (ixgbe_is_sfp(hw)) {
5253 ixgbe_sfp_link_config(adapter);
5255 err = ixgbe_non_sfp_link_config(hw);
5257 e_err(probe, "link_config FAILED %d\n", err);
5260 /* clear any pending interrupts, may auto mask */
5261 IXGBE_READ_REG(hw, IXGBE_EICR);
5262 ixgbe_irq_enable(adapter, true, true);
5265 * If this adapter has a fan, check to see if we had a failure
5266 * before we enabled the interrupt.
5268 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5269 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5270 if (esdp & IXGBE_ESDP_SDP1)
5271 e_crit(drv, "Fan has stopped, replace the adapter\n");
5274 /* bring the link up in the watchdog, this could race with our first
5275 * link up interrupt but shouldn't be a problem */
5276 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5277 adapter->link_check_timeout = jiffies;
5278 mod_timer(&adapter->service_timer, jiffies);
5280 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5281 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5282 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5283 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5286 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5288 WARN_ON(in_interrupt());
5289 /* put off any impending NetWatchDogTimeout */
5290 netif_trans_update(adapter->netdev);
5292 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5293 usleep_range(1000, 2000);
5294 ixgbe_down(adapter);
5296 * If SR-IOV enabled then wait a bit before bringing the adapter
5297 * back up to give the VFs time to respond to the reset. The
5298 * two second wait is based upon the watchdog timer cycle in
5301 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5304 clear_bit(__IXGBE_RESETTING, &adapter->state);
5307 void ixgbe_up(struct ixgbe_adapter *adapter)
5309 /* hardware has been reset, we need to reload some things */
5310 ixgbe_configure(adapter);
5312 ixgbe_up_complete(adapter);
5315 void ixgbe_reset(struct ixgbe_adapter *adapter)
5317 struct ixgbe_hw *hw = &adapter->hw;
5318 struct net_device *netdev = adapter->netdev;
5321 if (ixgbe_removed(hw->hw_addr))
5323 /* lock SFP init bit to prevent race conditions with the watchdog */
5324 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5325 usleep_range(1000, 2000);
5327 /* clear all SFP and link config related flags while holding SFP_INIT */
5328 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5329 IXGBE_FLAG2_SFP_NEEDS_RESET);
5330 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5332 err = hw->mac.ops.init_hw(hw);
5335 case IXGBE_ERR_SFP_NOT_PRESENT:
5336 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5338 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5339 e_dev_err("master disable timed out\n");
5341 case IXGBE_ERR_EEPROM_VERSION:
5342 /* We are running on a pre-production device, log a warning */
5343 e_dev_warn("This device is a pre-production adapter/LOM. "
5344 "Please be aware there may be issues associated with "
5345 "your hardware. If you are experiencing problems "
5346 "please contact your Intel or hardware "
5347 "representative who provided you with this "
5351 e_dev_err("Hardware Error: %d\n", err);
5354 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5356 /* flush entries out of MAC table */
5357 ixgbe_flush_sw_mac_table(adapter);
5358 __dev_uc_unsync(netdev, NULL);
5360 /* do not flush user set addresses */
5361 ixgbe_mac_set_default_filter(adapter);
5363 /* update SAN MAC vmdq pool selection */
5364 if (hw->mac.san_mac_rar_index)
5365 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5367 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5368 ixgbe_ptp_reset(adapter);
5370 if (hw->phy.ops.set_phy_power) {
5371 if (!netif_running(adapter->netdev) && !adapter->wol)
5372 hw->phy.ops.set_phy_power(hw, false);
5374 hw->phy.ops.set_phy_power(hw, true);
5379 * ixgbe_clean_tx_ring - Free Tx Buffers
5380 * @tx_ring: ring to be cleaned
5382 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5384 struct ixgbe_tx_buffer *tx_buffer_info;
5388 /* ring already cleared, nothing to do */
5389 if (!tx_ring->tx_buffer_info)
5392 /* Free all the Tx ring sk_buffs */
5393 for (i = 0; i < tx_ring->count; i++) {
5394 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5395 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5398 netdev_tx_reset_queue(txring_txq(tx_ring));
5400 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5401 memset(tx_ring->tx_buffer_info, 0, size);
5403 /* Zero out the descriptor ring */
5404 memset(tx_ring->desc, 0, tx_ring->size);
5406 tx_ring->next_to_use = 0;
5407 tx_ring->next_to_clean = 0;
5411 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5412 * @adapter: board private structure
5414 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5418 for (i = 0; i < adapter->num_rx_queues; i++)
5419 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5423 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5424 * @adapter: board private structure
5426 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5430 for (i = 0; i < adapter->num_tx_queues; i++)
5431 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5434 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5436 struct hlist_node *node2;
5437 struct ixgbe_fdir_filter *filter;
5439 spin_lock(&adapter->fdir_perfect_lock);
5441 hlist_for_each_entry_safe(filter, node2,
5442 &adapter->fdir_filter_list, fdir_node) {
5443 hlist_del(&filter->fdir_node);
5446 adapter->fdir_filter_count = 0;
5448 spin_unlock(&adapter->fdir_perfect_lock);
5451 void ixgbe_down(struct ixgbe_adapter *adapter)
5453 struct net_device *netdev = adapter->netdev;
5454 struct ixgbe_hw *hw = &adapter->hw;
5455 struct net_device *upper;
5456 struct list_head *iter;
5459 /* signal that we are down to the interrupt handler */
5460 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5461 return; /* do nothing if already down */
5463 /* disable receives */
5464 hw->mac.ops.disable_rx(hw);
5466 /* disable all enabled rx queues */
5467 for (i = 0; i < adapter->num_rx_queues; i++)
5468 /* this call also flushes the previous write */
5469 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5471 usleep_range(10000, 20000);
5473 netif_tx_stop_all_queues(netdev);
5475 /* call carrier off first to avoid false dev_watchdog timeouts */
5476 netif_carrier_off(netdev);
5477 netif_tx_disable(netdev);
5479 /* disable any upper devices */
5480 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5481 if (netif_is_macvlan(upper)) {
5482 struct macvlan_dev *vlan = netdev_priv(upper);
5484 if (vlan->fwd_priv) {
5485 netif_tx_stop_all_queues(upper);
5486 netif_carrier_off(upper);
5487 netif_tx_disable(upper);
5492 ixgbe_irq_disable(adapter);
5494 ixgbe_napi_disable_all(adapter);
5496 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5497 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5498 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5500 del_timer_sync(&adapter->service_timer);
5502 if (adapter->num_vfs) {
5503 /* Clear EITR Select mapping */
5504 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5506 /* Mark all the VFs as inactive */
5507 for (i = 0 ; i < adapter->num_vfs; i++)
5508 adapter->vfinfo[i].clear_to_send = false;
5510 /* ping all the active vfs to let them know we are going down */
5511 ixgbe_ping_all_vfs(adapter);
5513 /* Disable all VFTE/VFRE TX/RX */
5514 ixgbe_disable_tx_rx(adapter);
5517 /* disable transmits in the hardware now that interrupts are off */
5518 for (i = 0; i < adapter->num_tx_queues; i++) {
5519 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5520 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5523 /* Disable the Tx DMA engine on 82599 and later MAC */
5524 switch (hw->mac.type) {
5525 case ixgbe_mac_82599EB:
5526 case ixgbe_mac_X540:
5527 case ixgbe_mac_X550:
5528 case ixgbe_mac_X550EM_x:
5529 case ixgbe_mac_x550em_a:
5530 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5531 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5532 ~IXGBE_DMATXCTL_TE));
5538 if (!pci_channel_offline(adapter->pdev))
5539 ixgbe_reset(adapter);
5541 /* power down the optics for 82599 SFP+ fiber */
5542 if (hw->mac.ops.disable_tx_laser)
5543 hw->mac.ops.disable_tx_laser(hw);
5545 ixgbe_clean_all_tx_rings(adapter);
5546 ixgbe_clean_all_rx_rings(adapter);
5550 * ixgbe_tx_timeout - Respond to a Tx Hang
5551 * @netdev: network interface device structure
5553 static void ixgbe_tx_timeout(struct net_device *netdev)
5555 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5557 /* Do the reset outside of interrupt context */
5558 ixgbe_tx_timeout_reset(adapter);
5561 #ifdef CONFIG_IXGBE_DCB
5562 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5564 struct ixgbe_hw *hw = &adapter->hw;
5565 struct tc_configuration *tc;
5568 switch (hw->mac.type) {
5569 case ixgbe_mac_82598EB:
5570 case ixgbe_mac_82599EB:
5571 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5572 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5574 case ixgbe_mac_X540:
5575 case ixgbe_mac_X550:
5576 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5577 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5579 case ixgbe_mac_X550EM_x:
5580 case ixgbe_mac_x550em_a:
5582 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5583 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5587 /* Configure DCB traffic classes */
5588 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5589 tc = &adapter->dcb_cfg.tc_config[j];
5590 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5591 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5592 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5593 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5594 tc->dcb_pfc = pfc_disabled;
5597 /* Initialize default user to priority mapping, UPx->TC0 */
5598 tc = &adapter->dcb_cfg.tc_config[0];
5599 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5600 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5602 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5603 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5604 adapter->dcb_cfg.pfc_mode_enable = false;
5605 adapter->dcb_set_bitmap = 0x00;
5606 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5607 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5608 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5609 sizeof(adapter->temp_dcb_cfg));
5614 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5615 * @adapter: board private structure to initialize
5617 * ixgbe_sw_init initializes the Adapter private data structure.
5618 * Fields are initialized based on PCI device information and
5619 * OS network device settings (MTU size).
5621 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5623 struct ixgbe_hw *hw = &adapter->hw;
5624 struct pci_dev *pdev = adapter->pdev;
5625 unsigned int rss, fdir;
5629 /* PCI config space info */
5631 hw->vendor_id = pdev->vendor;
5632 hw->device_id = pdev->device;
5633 hw->revision_id = pdev->revision;
5634 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5635 hw->subsystem_device_id = pdev->subsystem_device;
5637 /* Set common capability flags and settings */
5638 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5639 adapter->ring_feature[RING_F_RSS].limit = rss;
5640 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5641 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5642 adapter->atr_sample_rate = 20;
5643 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5644 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5645 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5646 #ifdef CONFIG_IXGBE_DCA
5647 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5649 #ifdef CONFIG_IXGBE_DCB
5650 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5651 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5654 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5655 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5656 #ifdef CONFIG_IXGBE_DCB
5657 /* Default traffic class to use for FCoE */
5658 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5659 #endif /* CONFIG_IXGBE_DCB */
5660 #endif /* IXGBE_FCOE */
5662 /* initialize static ixgbe jump table entries */
5663 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5665 if (!adapter->jump_tables[0])
5667 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5669 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5670 adapter->jump_tables[i] = NULL;
5672 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5673 hw->mac.num_rar_entries,
5675 if (!adapter->mac_table)
5678 /* Set MAC specific capability flags and exceptions */
5679 switch (hw->mac.type) {
5680 case ixgbe_mac_82598EB:
5681 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5683 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5684 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5686 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5687 adapter->ring_feature[RING_F_FDIR].limit = 0;
5688 adapter->atr_sample_rate = 0;
5689 adapter->fdir_pballoc = 0;
5691 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5692 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5693 #ifdef CONFIG_IXGBE_DCB
5694 adapter->fcoe.up = 0;
5695 #endif /* IXGBE_DCB */
5696 #endif /* IXGBE_FCOE */
5698 case ixgbe_mac_82599EB:
5699 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5700 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5702 case ixgbe_mac_X540:
5703 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5704 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5705 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5707 case ixgbe_mac_x550em_a:
5708 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5710 case ixgbe_mac_X550EM_x:
5711 #ifdef CONFIG_IXGBE_DCB
5712 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5715 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5716 #ifdef CONFIG_IXGBE_DCB
5717 adapter->fcoe.up = 0;
5718 #endif /* IXGBE_DCB */
5719 #endif /* IXGBE_FCOE */
5721 case ixgbe_mac_X550:
5722 #ifdef CONFIG_IXGBE_DCA
5723 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5725 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5732 /* FCoE support exists, always init the FCoE lock */
5733 spin_lock_init(&adapter->fcoe.lock);
5736 /* n-tuple support exists, always init our spinlock */
5737 spin_lock_init(&adapter->fdir_perfect_lock);
5739 #ifdef CONFIG_IXGBE_DCB
5740 ixgbe_init_dcb(adapter);
5743 /* default flow control settings */
5744 hw->fc.requested_mode = ixgbe_fc_full;
5745 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5746 ixgbe_pbthresh_setup(adapter);
5747 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5748 hw->fc.send_xon = true;
5749 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5751 #ifdef CONFIG_PCI_IOV
5753 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5755 /* assign number of SR-IOV VFs */
5756 if (hw->mac.type != ixgbe_mac_82598EB) {
5757 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5758 adapter->num_vfs = 0;
5759 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5761 adapter->num_vfs = max_vfs;
5764 #endif /* CONFIG_PCI_IOV */
5766 /* enable itr by default in dynamic mode */
5767 adapter->rx_itr_setting = 1;
5768 adapter->tx_itr_setting = 1;
5770 /* set default ring sizes */
5771 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5772 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5774 /* set default work limits */
5775 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5777 /* initialize eeprom parameters */
5778 if (ixgbe_init_eeprom_params_generic(hw)) {
5779 e_dev_err("EEPROM initialization failed\n");
5783 /* PF holds first pool slot */
5784 set_bit(0, &adapter->fwd_bitmask);
5785 set_bit(__IXGBE_DOWN, &adapter->state);
5791 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5792 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5794 * Return 0 on success, negative on failure
5796 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5798 struct device *dev = tx_ring->dev;
5799 int orig_node = dev_to_node(dev);
5803 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5805 if (tx_ring->q_vector)
5806 ring_node = tx_ring->q_vector->numa_node;
5808 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5809 if (!tx_ring->tx_buffer_info)
5810 tx_ring->tx_buffer_info = vzalloc(size);
5811 if (!tx_ring->tx_buffer_info)
5814 u64_stats_init(&tx_ring->syncp);
5816 /* round up to nearest 4K */
5817 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5818 tx_ring->size = ALIGN(tx_ring->size, 4096);
5820 set_dev_node(dev, ring_node);
5821 tx_ring->desc = dma_alloc_coherent(dev,
5825 set_dev_node(dev, orig_node);
5827 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5828 &tx_ring->dma, GFP_KERNEL);
5832 tx_ring->next_to_use = 0;
5833 tx_ring->next_to_clean = 0;
5837 vfree(tx_ring->tx_buffer_info);
5838 tx_ring->tx_buffer_info = NULL;
5839 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5844 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5845 * @adapter: board private structure
5847 * If this function returns with an error, then it's possible one or
5848 * more of the rings is populated (while the rest are not). It is the
5849 * callers duty to clean those orphaned rings.
5851 * Return 0 on success, negative on failure
5853 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5857 for (i = 0; i < adapter->num_tx_queues; i++) {
5858 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5862 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5868 /* rewind the index freeing the rings as we go */
5870 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5875 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5876 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5878 * Returns 0 on success, negative on failure
5880 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5882 struct device *dev = rx_ring->dev;
5883 int orig_node = dev_to_node(dev);
5887 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5889 if (rx_ring->q_vector)
5890 ring_node = rx_ring->q_vector->numa_node;
5892 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5893 if (!rx_ring->rx_buffer_info)
5894 rx_ring->rx_buffer_info = vzalloc(size);
5895 if (!rx_ring->rx_buffer_info)
5898 u64_stats_init(&rx_ring->syncp);
5900 /* Round up to nearest 4K */
5901 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5902 rx_ring->size = ALIGN(rx_ring->size, 4096);
5904 set_dev_node(dev, ring_node);
5905 rx_ring->desc = dma_alloc_coherent(dev,
5909 set_dev_node(dev, orig_node);
5911 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5912 &rx_ring->dma, GFP_KERNEL);
5916 rx_ring->next_to_clean = 0;
5917 rx_ring->next_to_use = 0;
5921 vfree(rx_ring->rx_buffer_info);
5922 rx_ring->rx_buffer_info = NULL;
5923 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5928 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5929 * @adapter: board private structure
5931 * If this function returns with an error, then it's possible one or
5932 * more of the rings is populated (while the rest are not). It is the
5933 * callers duty to clean those orphaned rings.
5935 * Return 0 on success, negative on failure
5937 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5941 for (i = 0; i < adapter->num_rx_queues; i++) {
5942 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5946 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5951 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5956 /* rewind the index freeing the rings as we go */
5958 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5963 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5964 * @tx_ring: Tx descriptor ring for a specific queue
5966 * Free all transmit software resources
5968 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5970 ixgbe_clean_tx_ring(tx_ring);
5972 vfree(tx_ring->tx_buffer_info);
5973 tx_ring->tx_buffer_info = NULL;
5975 /* if not set, then don't free */
5979 dma_free_coherent(tx_ring->dev, tx_ring->size,
5980 tx_ring->desc, tx_ring->dma);
5982 tx_ring->desc = NULL;
5986 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5987 * @adapter: board private structure
5989 * Free all transmit software resources
5991 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5995 for (i = 0; i < adapter->num_tx_queues; i++)
5996 if (adapter->tx_ring[i]->desc)
5997 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6001 * ixgbe_free_rx_resources - Free Rx Resources
6002 * @rx_ring: ring to clean the resources from
6004 * Free all receive software resources
6006 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6008 ixgbe_clean_rx_ring(rx_ring);
6010 vfree(rx_ring->rx_buffer_info);
6011 rx_ring->rx_buffer_info = NULL;
6013 /* if not set, then don't free */
6017 dma_free_coherent(rx_ring->dev, rx_ring->size,
6018 rx_ring->desc, rx_ring->dma);
6020 rx_ring->desc = NULL;
6024 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6025 * @adapter: board private structure
6027 * Free all receive software resources
6029 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6034 ixgbe_free_fcoe_ddp_resources(adapter);
6037 for (i = 0; i < adapter->num_rx_queues; i++)
6038 if (adapter->rx_ring[i]->desc)
6039 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6043 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6044 * @netdev: network interface device structure
6045 * @new_mtu: new value for maximum frame size
6047 * Returns 0 on success, negative on failure
6049 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6051 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6052 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
6054 /* MTU < 68 is an error and causes problems on some kernels */
6055 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
6059 * For 82599EB we cannot allow legacy VFs to enable their receive
6060 * paths when MTU greater than 1500 is configured. So display a
6061 * warning that legacy VFs will be disabled.
6063 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6064 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6065 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
6066 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6068 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6070 /* must set new MTU before calling down or up */
6071 netdev->mtu = new_mtu;
6073 if (netif_running(netdev))
6074 ixgbe_reinit_locked(adapter);
6080 * ixgbe_open - Called when a network interface is made active
6081 * @netdev: network interface device structure
6083 * Returns 0 on success, negative value on failure
6085 * The open entry point is called when a network interface is made
6086 * active by the system (IFF_UP). At this point all resources needed
6087 * for transmit and receive operations are allocated, the interrupt
6088 * handler is registered with the OS, the watchdog timer is started,
6089 * and the stack is notified that the interface is ready.
6091 int ixgbe_open(struct net_device *netdev)
6093 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6094 struct ixgbe_hw *hw = &adapter->hw;
6097 /* disallow open during test */
6098 if (test_bit(__IXGBE_TESTING, &adapter->state))
6101 netif_carrier_off(netdev);
6103 /* allocate transmit descriptors */
6104 err = ixgbe_setup_all_tx_resources(adapter);
6108 /* allocate receive descriptors */
6109 err = ixgbe_setup_all_rx_resources(adapter);
6113 ixgbe_configure(adapter);
6115 err = ixgbe_request_irq(adapter);
6119 /* Notify the stack of the actual queue counts. */
6120 if (adapter->num_rx_pools > 1)
6121 queues = adapter->num_rx_queues_per_pool;
6123 queues = adapter->num_tx_queues;
6125 err = netif_set_real_num_tx_queues(netdev, queues);
6127 goto err_set_queues;
6129 if (adapter->num_rx_pools > 1 &&
6130 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6131 queues = IXGBE_MAX_L2A_QUEUES;
6133 queues = adapter->num_rx_queues;
6134 err = netif_set_real_num_rx_queues(netdev, queues);
6136 goto err_set_queues;
6138 ixgbe_ptp_init(adapter);
6140 ixgbe_up_complete(adapter);
6142 ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6143 udp_tunnel_get_rx_info(netdev);
6148 ixgbe_free_irq(adapter);
6150 ixgbe_free_all_rx_resources(adapter);
6151 if (hw->phy.ops.set_phy_power && !adapter->wol)
6152 hw->phy.ops.set_phy_power(&adapter->hw, false);
6154 ixgbe_free_all_tx_resources(adapter);
6156 ixgbe_reset(adapter);
6161 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6163 ixgbe_ptp_suspend(adapter);
6165 if (adapter->hw.phy.ops.enter_lplu) {
6166 adapter->hw.phy.reset_disable = true;
6167 ixgbe_down(adapter);
6168 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6169 adapter->hw.phy.reset_disable = false;
6171 ixgbe_down(adapter);
6174 ixgbe_free_irq(adapter);
6176 ixgbe_free_all_tx_resources(adapter);
6177 ixgbe_free_all_rx_resources(adapter);
6181 * ixgbe_close - Disables a network interface
6182 * @netdev: network interface device structure
6184 * Returns 0, this is not allowed to fail
6186 * The close entry point is called when an interface is de-activated
6187 * by the OS. The hardware is still under the drivers control, but
6188 * needs to be disabled. A global MAC reset is issued to stop the
6189 * hardware, and all transmit and receive resources are freed.
6191 int ixgbe_close(struct net_device *netdev)
6193 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6195 ixgbe_ptp_stop(adapter);
6197 ixgbe_close_suspend(adapter);
6199 ixgbe_fdir_filter_exit(adapter);
6201 ixgbe_release_hw_control(adapter);
6207 static int ixgbe_resume(struct pci_dev *pdev)
6209 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6210 struct net_device *netdev = adapter->netdev;
6213 adapter->hw.hw_addr = adapter->io_addr;
6214 pci_set_power_state(pdev, PCI_D0);
6215 pci_restore_state(pdev);
6217 * pci_restore_state clears dev->state_saved so call
6218 * pci_save_state to restore it.
6220 pci_save_state(pdev);
6222 err = pci_enable_device_mem(pdev);
6224 e_dev_err("Cannot enable PCI device from suspend\n");
6227 smp_mb__before_atomic();
6228 clear_bit(__IXGBE_DISABLED, &adapter->state);
6229 pci_set_master(pdev);
6231 pci_wake_from_d3(pdev, false);
6233 ixgbe_reset(adapter);
6235 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6238 err = ixgbe_init_interrupt_scheme(adapter);
6239 if (!err && netif_running(netdev))
6240 err = ixgbe_open(netdev);
6247 netif_device_attach(netdev);
6251 #endif /* CONFIG_PM */
6253 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6255 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6256 struct net_device *netdev = adapter->netdev;
6257 struct ixgbe_hw *hw = &adapter->hw;
6259 u32 wufc = adapter->wol;
6264 netif_device_detach(netdev);
6267 if (netif_running(netdev))
6268 ixgbe_close_suspend(adapter);
6271 ixgbe_clear_interrupt_scheme(adapter);
6274 retval = pci_save_state(pdev);
6279 if (hw->mac.ops.stop_link_on_d3)
6280 hw->mac.ops.stop_link_on_d3(hw);
6283 ixgbe_set_rx_mode(netdev);
6285 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6286 if (hw->mac.ops.enable_tx_laser)
6287 hw->mac.ops.enable_tx_laser(hw);
6289 /* turn on all-multi mode if wake on multicast is enabled */
6290 if (wufc & IXGBE_WUFC_MC) {
6291 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6292 fctrl |= IXGBE_FCTRL_MPE;
6293 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6296 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6297 ctrl |= IXGBE_CTRL_GIO_DIS;
6298 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6300 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6302 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6303 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6306 switch (hw->mac.type) {
6307 case ixgbe_mac_82598EB:
6308 pci_wake_from_d3(pdev, false);
6310 case ixgbe_mac_82599EB:
6311 case ixgbe_mac_X540:
6312 case ixgbe_mac_X550:
6313 case ixgbe_mac_X550EM_x:
6314 case ixgbe_mac_x550em_a:
6315 pci_wake_from_d3(pdev, !!wufc);
6321 *enable_wake = !!wufc;
6322 if (hw->phy.ops.set_phy_power && !*enable_wake)
6323 hw->phy.ops.set_phy_power(hw, false);
6325 ixgbe_release_hw_control(adapter);
6327 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6328 pci_disable_device(pdev);
6334 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6339 retval = __ixgbe_shutdown(pdev, &wake);
6344 pci_prepare_to_sleep(pdev);
6346 pci_wake_from_d3(pdev, false);
6347 pci_set_power_state(pdev, PCI_D3hot);
6352 #endif /* CONFIG_PM */
6354 static void ixgbe_shutdown(struct pci_dev *pdev)
6358 __ixgbe_shutdown(pdev, &wake);
6360 if (system_state == SYSTEM_POWER_OFF) {
6361 pci_wake_from_d3(pdev, wake);
6362 pci_set_power_state(pdev, PCI_D3hot);
6367 * ixgbe_update_stats - Update the board statistics counters.
6368 * @adapter: board private structure
6370 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6372 struct net_device *netdev = adapter->netdev;
6373 struct ixgbe_hw *hw = &adapter->hw;
6374 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6376 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6377 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6378 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6379 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6381 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6382 test_bit(__IXGBE_RESETTING, &adapter->state))
6385 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6388 for (i = 0; i < adapter->num_rx_queues; i++) {
6389 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6390 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6392 adapter->rsc_total_count = rsc_count;
6393 adapter->rsc_total_flush = rsc_flush;
6396 for (i = 0; i < adapter->num_rx_queues; i++) {
6397 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6398 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6399 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6400 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6401 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6402 bytes += rx_ring->stats.bytes;
6403 packets += rx_ring->stats.packets;
6405 adapter->non_eop_descs = non_eop_descs;
6406 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6407 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6408 adapter->hw_csum_rx_error = hw_csum_rx_error;
6409 netdev->stats.rx_bytes = bytes;
6410 netdev->stats.rx_packets = packets;
6414 /* gather some stats to the adapter struct that are per queue */
6415 for (i = 0; i < adapter->num_tx_queues; i++) {
6416 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6417 restart_queue += tx_ring->tx_stats.restart_queue;
6418 tx_busy += tx_ring->tx_stats.tx_busy;
6419 bytes += tx_ring->stats.bytes;
6420 packets += tx_ring->stats.packets;
6422 adapter->restart_queue = restart_queue;
6423 adapter->tx_busy = tx_busy;
6424 netdev->stats.tx_bytes = bytes;
6425 netdev->stats.tx_packets = packets;
6427 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6429 /* 8 register reads */
6430 for (i = 0; i < 8; i++) {
6431 /* for packet buffers not used, the register should read 0 */
6432 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6434 hwstats->mpc[i] += mpc;
6435 total_mpc += hwstats->mpc[i];
6436 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6437 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6438 switch (hw->mac.type) {
6439 case ixgbe_mac_82598EB:
6440 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6441 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6442 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6443 hwstats->pxonrxc[i] +=
6444 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6446 case ixgbe_mac_82599EB:
6447 case ixgbe_mac_X540:
6448 case ixgbe_mac_X550:
6449 case ixgbe_mac_X550EM_x:
6450 case ixgbe_mac_x550em_a:
6451 hwstats->pxonrxc[i] +=
6452 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6459 /*16 register reads */
6460 for (i = 0; i < 16; i++) {
6461 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6462 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6463 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6464 (hw->mac.type == ixgbe_mac_X540) ||
6465 (hw->mac.type == ixgbe_mac_X550) ||
6466 (hw->mac.type == ixgbe_mac_X550EM_x) ||
6467 (hw->mac.type == ixgbe_mac_x550em_a)) {
6468 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6469 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6470 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6471 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6475 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6476 /* work around hardware counting issue */
6477 hwstats->gprc -= missed_rx;
6479 ixgbe_update_xoff_received(adapter);
6481 /* 82598 hardware only has a 32 bit counter in the high register */
6482 switch (hw->mac.type) {
6483 case ixgbe_mac_82598EB:
6484 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6485 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6486 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6487 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6489 case ixgbe_mac_X540:
6490 case ixgbe_mac_X550:
6491 case ixgbe_mac_X550EM_x:
6492 case ixgbe_mac_x550em_a:
6493 /* OS2BMC stats are X540 and later */
6494 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6495 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6496 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6497 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6498 case ixgbe_mac_82599EB:
6499 for (i = 0; i < 16; i++)
6500 adapter->hw_rx_no_dma_resources +=
6501 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6502 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6503 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6504 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6505 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6506 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6507 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6508 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6509 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6510 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6512 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6513 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6514 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6515 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6516 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6517 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6518 /* Add up per cpu counters for total ddp aloc fail */
6519 if (adapter->fcoe.ddp_pool) {
6520 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6521 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6523 u64 noddp = 0, noddp_ext_buff = 0;
6524 for_each_possible_cpu(cpu) {
6525 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6526 noddp += ddp_pool->noddp;
6527 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6529 hwstats->fcoe_noddp = noddp;
6530 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6532 #endif /* IXGBE_FCOE */
6537 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6538 hwstats->bprc += bprc;
6539 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6540 if (hw->mac.type == ixgbe_mac_82598EB)
6541 hwstats->mprc -= bprc;
6542 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6543 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6544 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6545 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6546 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6547 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6548 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6549 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6550 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6551 hwstats->lxontxc += lxon;
6552 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6553 hwstats->lxofftxc += lxoff;
6554 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6555 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6557 * 82598 errata - tx of flow control packets is included in tx counters
6559 xon_off_tot = lxon + lxoff;
6560 hwstats->gptc -= xon_off_tot;
6561 hwstats->mptc -= xon_off_tot;
6562 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6563 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6564 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6565 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6566 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6567 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6568 hwstats->ptc64 -= xon_off_tot;
6569 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6570 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6571 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6572 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6573 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6574 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6576 /* Fill out the OS statistics structure */
6577 netdev->stats.multicast = hwstats->mprc;
6580 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6581 netdev->stats.rx_dropped = 0;
6582 netdev->stats.rx_length_errors = hwstats->rlec;
6583 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6584 netdev->stats.rx_missed_errors = total_mpc;
6588 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6589 * @adapter: pointer to the device adapter structure
6591 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6593 struct ixgbe_hw *hw = &adapter->hw;
6596 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6599 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6601 /* if interface is down do nothing */
6602 if (test_bit(__IXGBE_DOWN, &adapter->state))
6605 /* do nothing if we are not using signature filters */
6606 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6609 adapter->fdir_overflow++;
6611 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6612 for (i = 0; i < adapter->num_tx_queues; i++)
6613 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6614 &(adapter->tx_ring[i]->state));
6615 /* re-enable flow director interrupts */
6616 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6618 e_err(probe, "failed to finish FDIR re-initialization, "
6619 "ignored adding FDIR ATR filters\n");
6624 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6625 * @adapter: pointer to the device adapter structure
6627 * This function serves two purposes. First it strobes the interrupt lines
6628 * in order to make certain interrupts are occurring. Secondly it sets the
6629 * bits needed to check for TX hangs. As a result we should immediately
6630 * determine if a hang has occurred.
6632 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6634 struct ixgbe_hw *hw = &adapter->hw;
6638 /* If we're down, removing or resetting, just bail */
6639 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6640 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6641 test_bit(__IXGBE_RESETTING, &adapter->state))
6644 /* Force detection of hung controller */
6645 if (netif_carrier_ok(adapter->netdev)) {
6646 for (i = 0; i < adapter->num_tx_queues; i++)
6647 set_check_for_tx_hang(adapter->tx_ring[i]);
6650 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6652 * for legacy and MSI interrupts don't set any bits
6653 * that are enabled for EIAM, because this operation
6654 * would set *both* EIMS and EICS for any bit in EIAM
6656 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6657 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6659 /* get one bit for every active tx/rx interrupt vector */
6660 for (i = 0; i < adapter->num_q_vectors; i++) {
6661 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6662 if (qv->rx.ring || qv->tx.ring)
6667 /* Cause software interrupt to ensure rings are cleaned */
6668 ixgbe_irq_rearm_queues(adapter, eics);
6672 * ixgbe_watchdog_update_link - update the link status
6673 * @adapter: pointer to the device adapter structure
6674 * @link_speed: pointer to a u32 to store the link_speed
6676 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6678 struct ixgbe_hw *hw = &adapter->hw;
6679 u32 link_speed = adapter->link_speed;
6680 bool link_up = adapter->link_up;
6681 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6683 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6686 if (hw->mac.ops.check_link) {
6687 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6689 /* always assume link is up, if no check link function */
6690 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6694 if (adapter->ixgbe_ieee_pfc)
6695 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6697 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6698 hw->mac.ops.fc_enable(hw);
6699 ixgbe_set_rx_drop_en(adapter);
6703 time_after(jiffies, (adapter->link_check_timeout +
6704 IXGBE_TRY_LINK_TIMEOUT))) {
6705 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6706 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6707 IXGBE_WRITE_FLUSH(hw);
6710 adapter->link_up = link_up;
6711 adapter->link_speed = link_speed;
6714 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6716 #ifdef CONFIG_IXGBE_DCB
6717 struct net_device *netdev = adapter->netdev;
6718 struct dcb_app app = {
6719 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6724 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6725 up = dcb_ieee_getapp_mask(netdev, &app);
6727 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6732 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6733 * print link up message
6734 * @adapter: pointer to the device adapter structure
6736 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6738 struct net_device *netdev = adapter->netdev;
6739 struct ixgbe_hw *hw = &adapter->hw;
6740 struct net_device *upper;
6741 struct list_head *iter;
6742 u32 link_speed = adapter->link_speed;
6743 const char *speed_str;
6744 bool flow_rx, flow_tx;
6746 /* only continue if link was previously down */
6747 if (netif_carrier_ok(netdev))
6750 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6752 switch (hw->mac.type) {
6753 case ixgbe_mac_82598EB: {
6754 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6755 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6756 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6757 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6760 case ixgbe_mac_X540:
6761 case ixgbe_mac_X550:
6762 case ixgbe_mac_X550EM_x:
6763 case ixgbe_mac_x550em_a:
6764 case ixgbe_mac_82599EB: {
6765 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6766 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6767 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6768 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6777 adapter->last_rx_ptp_check = jiffies;
6779 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6780 ixgbe_ptp_start_cyclecounter(adapter);
6782 switch (link_speed) {
6783 case IXGBE_LINK_SPEED_10GB_FULL:
6784 speed_str = "10 Gbps";
6786 case IXGBE_LINK_SPEED_2_5GB_FULL:
6787 speed_str = "2.5 Gbps";
6789 case IXGBE_LINK_SPEED_1GB_FULL:
6790 speed_str = "1 Gbps";
6792 case IXGBE_LINK_SPEED_100_FULL:
6793 speed_str = "100 Mbps";
6796 speed_str = "unknown speed";
6799 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6800 ((flow_rx && flow_tx) ? "RX/TX" :
6802 (flow_tx ? "TX" : "None"))));
6804 netif_carrier_on(netdev);
6805 ixgbe_check_vf_rate_limit(adapter);
6807 /* enable transmits */
6808 netif_tx_wake_all_queues(adapter->netdev);
6810 /* enable any upper devices */
6812 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6813 if (netif_is_macvlan(upper)) {
6814 struct macvlan_dev *vlan = netdev_priv(upper);
6817 netif_tx_wake_all_queues(upper);
6822 /* update the default user priority for VFs */
6823 ixgbe_update_default_up(adapter);
6825 /* ping all the active vfs to let them know link has changed */
6826 ixgbe_ping_all_vfs(adapter);
6830 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6831 * print link down message
6832 * @adapter: pointer to the adapter structure
6834 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6836 struct net_device *netdev = adapter->netdev;
6837 struct ixgbe_hw *hw = &adapter->hw;
6839 adapter->link_up = false;
6840 adapter->link_speed = 0;
6842 /* only continue if link was up previously */
6843 if (!netif_carrier_ok(netdev))
6846 /* poll for SFP+ cable when link is down */
6847 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6848 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6850 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6851 ixgbe_ptp_start_cyclecounter(adapter);
6853 e_info(drv, "NIC Link is Down\n");
6854 netif_carrier_off(netdev);
6856 /* ping all the active vfs to let them know link has changed */
6857 ixgbe_ping_all_vfs(adapter);
6860 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6864 for (i = 0; i < adapter->num_tx_queues; i++) {
6865 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6867 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6874 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6876 struct ixgbe_hw *hw = &adapter->hw;
6877 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6878 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6882 if (!adapter->num_vfs)
6885 /* resetting the PF is only needed for MAC before X550 */
6886 if (hw->mac.type >= ixgbe_mac_X550)
6889 for (i = 0; i < adapter->num_vfs; i++) {
6890 for (j = 0; j < q_per_pool; j++) {
6893 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6894 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6905 * ixgbe_watchdog_flush_tx - flush queues on link down
6906 * @adapter: pointer to the device adapter structure
6908 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6910 if (!netif_carrier_ok(adapter->netdev)) {
6911 if (ixgbe_ring_tx_pending(adapter) ||
6912 ixgbe_vf_tx_pending(adapter)) {
6913 /* We've lost link, so the controller stops DMA,
6914 * but we've got queued Tx work that's never going
6915 * to get done, so reset controller to flush Tx.
6916 * (Do the reset outside of interrupt context).
6918 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6919 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6924 #ifdef CONFIG_PCI_IOV
6925 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6926 struct pci_dev *vfdev)
6928 if (!pci_wait_for_pending_transaction(vfdev))
6929 e_dev_warn("Issuing VFLR with pending transactions\n");
6931 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6932 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6937 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6939 struct ixgbe_hw *hw = &adapter->hw;
6940 struct pci_dev *pdev = adapter->pdev;
6944 if (!(netif_carrier_ok(adapter->netdev)))
6947 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6948 if (gpc) /* If incrementing then no need for the check below */
6950 /* Check to see if a bad DMA write target from an errant or
6951 * malicious VF has caused a PCIe error. If so then we can
6952 * issue a VFLR to the offending VF(s) and then resume without
6953 * requesting a full slot reset.
6959 /* check status reg for all VFs owned by this PF */
6960 for (vf = 0; vf < adapter->num_vfs; ++vf) {
6961 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
6966 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6967 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
6968 status_reg & PCI_STATUS_REC_MASTER_ABORT)
6969 ixgbe_issue_vf_flr(adapter, vfdev);
6973 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6977 /* Do not perform spoof check for 82598 or if not in IOV mode */
6978 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6979 adapter->num_vfs == 0)
6982 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6985 * ssvpc register is cleared on read, if zero then no
6986 * spoofed packets in the last interval.
6991 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6994 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6999 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7002 #endif /* CONFIG_PCI_IOV */
7006 * ixgbe_watchdog_subtask - check and bring link up
7007 * @adapter: pointer to the device adapter structure
7009 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7011 /* if interface is down, removing or resetting, do nothing */
7012 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7013 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7014 test_bit(__IXGBE_RESETTING, &adapter->state))
7017 ixgbe_watchdog_update_link(adapter);
7019 if (adapter->link_up)
7020 ixgbe_watchdog_link_is_up(adapter);
7022 ixgbe_watchdog_link_is_down(adapter);
7024 ixgbe_check_for_bad_vf(adapter);
7025 ixgbe_spoof_check(adapter);
7026 ixgbe_update_stats(adapter);
7028 ixgbe_watchdog_flush_tx(adapter);
7032 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7033 * @adapter: the ixgbe adapter structure
7035 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7037 struct ixgbe_hw *hw = &adapter->hw;
7040 /* not searching for SFP so there is nothing to do here */
7041 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7042 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7045 if (adapter->sfp_poll_time &&
7046 time_after(adapter->sfp_poll_time, jiffies))
7047 return; /* If not yet time to poll for SFP */
7049 /* someone else is in init, wait until next service event */
7050 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7053 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7055 err = hw->phy.ops.identify_sfp(hw);
7056 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7059 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7060 /* If no cable is present, then we need to reset
7061 * the next time we find a good cable. */
7062 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7069 /* exit if reset not needed */
7070 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7073 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7076 * A module may be identified correctly, but the EEPROM may not have
7077 * support for that module. setup_sfp() will fail in that case, so
7078 * we should not allow that module to load.
7080 if (hw->mac.type == ixgbe_mac_82598EB)
7081 err = hw->phy.ops.reset(hw);
7083 err = hw->mac.ops.setup_sfp(hw);
7085 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7088 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7089 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7092 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7094 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7095 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7096 e_dev_err("failed to initialize because an unsupported "
7097 "SFP+ module type was detected.\n");
7098 e_dev_err("Reload the driver after installing a "
7099 "supported module.\n");
7100 unregister_netdev(adapter->netdev);
7105 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7106 * @adapter: the ixgbe adapter structure
7108 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7110 struct ixgbe_hw *hw = &adapter->hw;
7112 bool autoneg = false;
7114 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7117 /* someone else is in init, wait until next service event */
7118 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7121 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7123 speed = hw->phy.autoneg_advertised;
7124 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7125 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7127 /* setup the highest link when no autoneg */
7129 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7130 speed = IXGBE_LINK_SPEED_10GB_FULL;
7134 if (hw->mac.ops.setup_link)
7135 hw->mac.ops.setup_link(hw, speed, true);
7137 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7138 adapter->link_check_timeout = jiffies;
7139 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7143 * ixgbe_service_timer - Timer Call-back
7144 * @data: pointer to adapter cast into an unsigned long
7146 static void ixgbe_service_timer(unsigned long data)
7148 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7149 unsigned long next_event_offset;
7151 /* poll faster when waiting for link */
7152 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7153 next_event_offset = HZ / 10;
7155 next_event_offset = HZ * 2;
7157 /* Reset the timer */
7158 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7160 ixgbe_service_event_schedule(adapter);
7163 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7165 struct ixgbe_hw *hw = &adapter->hw;
7168 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7171 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7173 if (!hw->phy.ops.handle_lasi)
7176 status = hw->phy.ops.handle_lasi(&adapter->hw);
7177 if (status != IXGBE_ERR_OVERTEMP)
7180 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7183 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7185 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7188 /* If we're already down, removing or resetting, just bail */
7189 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7190 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7191 test_bit(__IXGBE_RESETTING, &adapter->state))
7194 ixgbe_dump(adapter);
7195 netdev_err(adapter->netdev, "Reset adapter\n");
7196 adapter->tx_timeout_count++;
7199 ixgbe_reinit_locked(adapter);
7204 * ixgbe_service_task - manages and runs subtasks
7205 * @work: pointer to work_struct containing our data
7207 static void ixgbe_service_task(struct work_struct *work)
7209 struct ixgbe_adapter *adapter = container_of(work,
7210 struct ixgbe_adapter,
7212 if (ixgbe_removed(adapter->hw.hw_addr)) {
7213 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7215 ixgbe_down(adapter);
7218 ixgbe_service_event_complete(adapter);
7221 if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7223 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7224 udp_tunnel_get_rx_info(adapter->netdev);
7227 ixgbe_reset_subtask(adapter);
7228 ixgbe_phy_interrupt_subtask(adapter);
7229 ixgbe_sfp_detection_subtask(adapter);
7230 ixgbe_sfp_link_config_subtask(adapter);
7231 ixgbe_check_overtemp_subtask(adapter);
7232 ixgbe_watchdog_subtask(adapter);
7233 ixgbe_fdir_reinit_subtask(adapter);
7234 ixgbe_check_hang_subtask(adapter);
7236 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7237 ixgbe_ptp_overflow_check(adapter);
7238 ixgbe_ptp_rx_hang(adapter);
7241 ixgbe_service_event_complete(adapter);
7244 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7245 struct ixgbe_tx_buffer *first,
7248 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7249 struct sk_buff *skb = first->skb;
7259 u32 paylen, l4_offset;
7262 if (skb->ip_summed != CHECKSUM_PARTIAL)
7265 if (!skb_is_gso(skb))
7268 err = skb_cow_head(skb, 0);
7272 ip.hdr = skb_network_header(skb);
7273 l4.hdr = skb_checksum_start(skb);
7275 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7276 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7278 /* initialize outer IP header fields */
7279 if (ip.v4->version == 4) {
7280 /* IP header will have to cancel out any data that
7281 * is not a part of the outer IP header
7283 ip.v4->check = csum_fold(csum_add(lco_csum(skb),
7284 csum_unfold(l4.tcp->check)));
7285 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7288 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7289 IXGBE_TX_FLAGS_CSUM |
7290 IXGBE_TX_FLAGS_IPV4;
7292 ip.v6->payload_len = 0;
7293 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7294 IXGBE_TX_FLAGS_CSUM;
7297 /* determine offset of inner transport header */
7298 l4_offset = l4.hdr - skb->data;
7300 /* compute length of segmentation header */
7301 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7303 /* remove payload length from inner checksum */
7304 paylen = skb->len - l4_offset;
7305 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7307 /* update gso size and bytecount with header size */
7308 first->gso_segs = skb_shinfo(skb)->gso_segs;
7309 first->bytecount += (first->gso_segs - 1) * *hdr_len;
7311 /* mss_l4len_id: use 0 as index for TSO */
7312 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7313 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7315 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7316 vlan_macip_lens = l4.hdr - ip.hdr;
7317 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7318 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7320 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7326 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7328 unsigned int offset = 0;
7330 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7332 return offset == skb_checksum_start_offset(skb);
7335 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7336 struct ixgbe_tx_buffer *first)
7338 struct sk_buff *skb = first->skb;
7339 u32 vlan_macip_lens = 0;
7342 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7344 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7345 IXGBE_TX_FLAGS_CC)))
7350 switch (skb->csum_offset) {
7351 case offsetof(struct tcphdr, check):
7352 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7354 case offsetof(struct udphdr, check):
7356 case offsetof(struct sctphdr, checksum):
7357 /* validate that this is actually an SCTP request */
7358 if (((first->protocol == htons(ETH_P_IP)) &&
7359 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7360 ((first->protocol == htons(ETH_P_IPV6)) &&
7361 ixgbe_ipv6_csum_is_sctp(skb))) {
7362 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7367 skb_checksum_help(skb);
7371 /* update TX checksum flag */
7372 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7373 vlan_macip_lens = skb_checksum_start_offset(skb) -
7374 skb_network_offset(skb);
7376 /* vlan_macip_lens: MACLEN, VLAN tag */
7377 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7378 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7380 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7383 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7384 ((_flag <= _result) ? \
7385 ((u32)(_input & _flag) * (_result / _flag)) : \
7386 ((u32)(_input & _flag) / (_flag / _result)))
7388 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7390 /* set type for advanced descriptor with frame checksum insertion */
7391 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7392 IXGBE_ADVTXD_DCMD_DEXT |
7393 IXGBE_ADVTXD_DCMD_IFCS;
7395 /* set HW vlan bit if vlan is present */
7396 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7397 IXGBE_ADVTXD_DCMD_VLE);
7399 /* set segmentation enable bits for TSO/FSO */
7400 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7401 IXGBE_ADVTXD_DCMD_TSE);
7403 /* set timestamp bit if present */
7404 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7405 IXGBE_ADVTXD_MAC_TSTAMP);
7407 /* insert frame checksum */
7408 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7413 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7414 u32 tx_flags, unsigned int paylen)
7416 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7418 /* enable L4 checksum for TSO and TX checksum offload */
7419 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7420 IXGBE_TX_FLAGS_CSUM,
7421 IXGBE_ADVTXD_POPTS_TXSM);
7423 /* enble IPv4 checksum for TSO */
7424 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7425 IXGBE_TX_FLAGS_IPV4,
7426 IXGBE_ADVTXD_POPTS_IXSM);
7429 * Check Context must be set if Tx switch is enabled, which it
7430 * always is for case where virtual functions are running
7432 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7436 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7439 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7441 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7443 /* Herbert's original patch had:
7444 * smp_mb__after_netif_stop_queue();
7445 * but since that doesn't exist yet, just open code it.
7449 /* We need to check again in a case another CPU has just
7450 * made room available.
7452 if (likely(ixgbe_desc_unused(tx_ring) < size))
7455 /* A reprieve! - use start_queue because it doesn't call schedule */
7456 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7457 ++tx_ring->tx_stats.restart_queue;
7461 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7463 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7466 return __ixgbe_maybe_stop_tx(tx_ring, size);
7469 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7472 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7473 struct ixgbe_tx_buffer *first,
7476 struct sk_buff *skb = first->skb;
7477 struct ixgbe_tx_buffer *tx_buffer;
7478 union ixgbe_adv_tx_desc *tx_desc;
7479 struct skb_frag_struct *frag;
7481 unsigned int data_len, size;
7482 u32 tx_flags = first->tx_flags;
7483 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7484 u16 i = tx_ring->next_to_use;
7486 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7488 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7490 size = skb_headlen(skb);
7491 data_len = skb->data_len;
7494 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7495 if (data_len < sizeof(struct fcoe_crc_eof)) {
7496 size -= sizeof(struct fcoe_crc_eof) - data_len;
7499 data_len -= sizeof(struct fcoe_crc_eof);
7504 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7508 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7509 if (dma_mapping_error(tx_ring->dev, dma))
7512 /* record length, and DMA address */
7513 dma_unmap_len_set(tx_buffer, len, size);
7514 dma_unmap_addr_set(tx_buffer, dma, dma);
7516 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7518 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7519 tx_desc->read.cmd_type_len =
7520 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7524 if (i == tx_ring->count) {
7525 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7528 tx_desc->read.olinfo_status = 0;
7530 dma += IXGBE_MAX_DATA_PER_TXD;
7531 size -= IXGBE_MAX_DATA_PER_TXD;
7533 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7536 if (likely(!data_len))
7539 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7543 if (i == tx_ring->count) {
7544 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7547 tx_desc->read.olinfo_status = 0;
7550 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7552 size = skb_frag_size(frag);
7556 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7559 tx_buffer = &tx_ring->tx_buffer_info[i];
7562 /* write last descriptor with RS and EOP bits */
7563 cmd_type |= size | IXGBE_TXD_CMD;
7564 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7566 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7568 /* set the timestamp */
7569 first->time_stamp = jiffies;
7572 * Force memory writes to complete before letting h/w know there
7573 * are new descriptors to fetch. (Only applicable for weak-ordered
7574 * memory model archs, such as IA-64).
7576 * We also need this memory barrier to make certain all of the
7577 * status bits have been updated before next_to_watch is written.
7581 /* set next_to_watch value indicating a packet is present */
7582 first->next_to_watch = tx_desc;
7585 if (i == tx_ring->count)
7588 tx_ring->next_to_use = i;
7590 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7592 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7593 writel(i, tx_ring->tail);
7595 /* we need this if more than one processor can write to our tail
7596 * at a time, it synchronizes IO on IA64/Altix systems
7603 dev_err(tx_ring->dev, "TX DMA map failed\n");
7605 /* clear dma mappings for failed tx_buffer_info map */
7607 tx_buffer = &tx_ring->tx_buffer_info[i];
7608 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7609 if (tx_buffer == first)
7616 tx_ring->next_to_use = i;
7619 static void ixgbe_atr(struct ixgbe_ring *ring,
7620 struct ixgbe_tx_buffer *first)
7622 struct ixgbe_q_vector *q_vector = ring->q_vector;
7623 union ixgbe_atr_hash_dword input = { .dword = 0 };
7624 union ixgbe_atr_hash_dword common = { .dword = 0 };
7626 unsigned char *network;
7628 struct ipv6hdr *ipv6;
7632 struct sk_buff *skb;
7636 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7640 /* do nothing if sampling is disabled */
7641 if (!ring->atr_sample_rate)
7646 /* currently only IPv4/IPv6 with TCP is supported */
7647 if ((first->protocol != htons(ETH_P_IP)) &&
7648 (first->protocol != htons(ETH_P_IPV6)))
7651 /* snag network header to get L4 type and address */
7653 hdr.network = skb_network_header(skb);
7654 if (skb->encapsulation &&
7655 first->protocol == htons(ETH_P_IP) &&
7656 hdr.ipv4->protocol != IPPROTO_UDP) {
7657 struct ixgbe_adapter *adapter = q_vector->adapter;
7659 /* verify the port is recognized as VXLAN */
7660 if (adapter->vxlan_port &&
7661 udp_hdr(skb)->dest == adapter->vxlan_port)
7662 hdr.network = skb_inner_network_header(skb);
7664 if (adapter->geneve_port &&
7665 udp_hdr(skb)->dest == adapter->geneve_port)
7666 hdr.network = skb_inner_network_header(skb);
7669 /* Currently only IPv4/IPv6 with TCP is supported */
7670 switch (hdr.ipv4->version) {
7672 /* access ihl as u8 to avoid unaligned access on ia64 */
7673 hlen = (hdr.network[0] & 0x0F) << 2;
7674 l4_proto = hdr.ipv4->protocol;
7677 hlen = hdr.network - skb->data;
7678 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7679 hlen -= hdr.network - skb->data;
7685 if (l4_proto != IPPROTO_TCP)
7688 th = (struct tcphdr *)(hdr.network + hlen);
7690 /* skip this packet since the socket is closing */
7694 /* sample on all syn packets or once every atr sample count */
7695 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7698 /* reset sample count */
7699 ring->atr_count = 0;
7701 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7704 * src and dst are inverted, think how the receiver sees them
7706 * The input is broken into two sections, a non-compressed section
7707 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7708 * is XORed together and stored in the compressed dword.
7710 input.formatted.vlan_id = vlan_id;
7713 * since src port and flex bytes occupy the same word XOR them together
7714 * and write the value to source port portion of compressed dword
7716 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7717 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7719 common.port.src ^= th->dest ^ first->protocol;
7720 common.port.dst ^= th->source;
7722 switch (hdr.ipv4->version) {
7724 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7725 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7728 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7729 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7730 hdr.ipv6->saddr.s6_addr32[1] ^
7731 hdr.ipv6->saddr.s6_addr32[2] ^
7732 hdr.ipv6->saddr.s6_addr32[3] ^
7733 hdr.ipv6->daddr.s6_addr32[0] ^
7734 hdr.ipv6->daddr.s6_addr32[1] ^
7735 hdr.ipv6->daddr.s6_addr32[2] ^
7736 hdr.ipv6->daddr.s6_addr32[3];
7742 if (hdr.network != skb_network_header(skb))
7743 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7745 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7746 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7747 input, common, ring->queue_index);
7750 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7751 void *accel_priv, select_queue_fallback_t fallback)
7753 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7755 struct ixgbe_adapter *adapter;
7756 struct ixgbe_ring_feature *f;
7761 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7766 * only execute the code below if protocol is FCoE
7767 * or FIP and we have FCoE enabled on the adapter
7769 switch (vlan_get_protocol(skb)) {
7770 case htons(ETH_P_FCOE):
7771 case htons(ETH_P_FIP):
7772 adapter = netdev_priv(dev);
7774 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7777 return fallback(dev, skb);
7780 f = &adapter->ring_feature[RING_F_FCOE];
7782 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7785 while (txq >= f->indices)
7788 return txq + f->offset;
7790 return fallback(dev, skb);
7794 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7795 struct ixgbe_adapter *adapter,
7796 struct ixgbe_ring *tx_ring)
7798 struct ixgbe_tx_buffer *first;
7802 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7803 __be16 protocol = skb->protocol;
7807 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7808 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7809 * + 2 desc gap to keep tail from touching head,
7810 * + 1 desc for context descriptor,
7811 * otherwise try next time
7813 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7814 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7816 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7817 tx_ring->tx_stats.tx_busy++;
7818 return NETDEV_TX_BUSY;
7821 /* record the location of the first descriptor for this packet */
7822 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7824 first->bytecount = skb->len;
7825 first->gso_segs = 1;
7827 /* if we have a HW VLAN tag being added default to the HW one */
7828 if (skb_vlan_tag_present(skb)) {
7829 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7830 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7831 /* else if it is a SW VLAN check the next protocol and store the tag */
7832 } else if (protocol == htons(ETH_P_8021Q)) {
7833 struct vlan_hdr *vhdr, _vhdr;
7834 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7838 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7839 IXGBE_TX_FLAGS_VLAN_SHIFT;
7840 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7842 protocol = vlan_get_protocol(skb);
7844 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7845 adapter->ptp_clock &&
7846 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7848 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7849 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7851 /* schedule check for Tx timestamp */
7852 adapter->ptp_tx_skb = skb_get(skb);
7853 adapter->ptp_tx_start = jiffies;
7854 schedule_work(&adapter->ptp_tx_work);
7857 skb_tx_timestamp(skb);
7859 #ifdef CONFIG_PCI_IOV
7861 * Use the l2switch_enable flag - would be false if the DMA
7862 * Tx switch had been disabled.
7864 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7865 tx_flags |= IXGBE_TX_FLAGS_CC;
7868 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7869 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7870 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7871 (skb->priority != TC_PRIO_CONTROL))) {
7872 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7873 tx_flags |= (skb->priority & 0x7) <<
7874 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7875 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7876 struct vlan_ethhdr *vhdr;
7878 if (skb_cow_head(skb, 0))
7880 vhdr = (struct vlan_ethhdr *)skb->data;
7881 vhdr->h_vlan_TCI = htons(tx_flags >>
7882 IXGBE_TX_FLAGS_VLAN_SHIFT);
7884 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7888 /* record initial flags and protocol */
7889 first->tx_flags = tx_flags;
7890 first->protocol = protocol;
7893 /* setup tx offload for FCoE */
7894 if ((protocol == htons(ETH_P_FCOE)) &&
7895 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7896 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7903 #endif /* IXGBE_FCOE */
7904 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7908 ixgbe_tx_csum(tx_ring, first);
7910 /* add the ATR filter if ATR is on */
7911 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7912 ixgbe_atr(tx_ring, first);
7916 #endif /* IXGBE_FCOE */
7917 ixgbe_tx_map(tx_ring, first, hdr_len);
7919 return NETDEV_TX_OK;
7922 dev_kfree_skb_any(first->skb);
7925 return NETDEV_TX_OK;
7928 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7929 struct net_device *netdev,
7930 struct ixgbe_ring *ring)
7932 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7933 struct ixgbe_ring *tx_ring;
7936 * The minimum packet size for olinfo paylen is 17 so pad the skb
7937 * in order to meet this minimum size requirement.
7939 if (skb_put_padto(skb, 17))
7940 return NETDEV_TX_OK;
7942 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7944 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7947 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7948 struct net_device *netdev)
7950 return __ixgbe_xmit_frame(skb, netdev, NULL);
7954 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7955 * @netdev: network interface device structure
7956 * @p: pointer to an address structure
7958 * Returns 0 on success, negative on failure
7960 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7962 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7963 struct ixgbe_hw *hw = &adapter->hw;
7964 struct sockaddr *addr = p;
7966 if (!is_valid_ether_addr(addr->sa_data))
7967 return -EADDRNOTAVAIL;
7969 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7970 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7972 ixgbe_mac_set_default_filter(adapter);
7978 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7980 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7981 struct ixgbe_hw *hw = &adapter->hw;
7985 if (prtad != hw->phy.mdio.prtad)
7987 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7993 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7994 u16 addr, u16 value)
7996 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7997 struct ixgbe_hw *hw = &adapter->hw;
7999 if (prtad != hw->phy.mdio.prtad)
8001 return hw->phy.ops.write_reg(hw, addr, devad, value);
8004 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8006 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8010 return ixgbe_ptp_set_ts_config(adapter, req);
8012 return ixgbe_ptp_get_ts_config(adapter, req);
8014 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8019 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8021 * @netdev: network interface device structure
8023 * Returns non-zero on failure
8025 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8028 struct ixgbe_adapter *adapter = netdev_priv(dev);
8029 struct ixgbe_hw *hw = &adapter->hw;
8031 if (is_valid_ether_addr(hw->mac.san_addr)) {
8033 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8036 /* update SAN MAC vmdq pool selection */
8037 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8043 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8045 * @netdev: network interface device structure
8047 * Returns non-zero on failure
8049 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8052 struct ixgbe_adapter *adapter = netdev_priv(dev);
8053 struct ixgbe_mac_info *mac = &adapter->hw.mac;
8055 if (is_valid_ether_addr(mac->san_addr)) {
8057 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8063 #ifdef CONFIG_NET_POLL_CONTROLLER
8065 * Polling 'interrupt' - used by things like netconsole to send skbs
8066 * without having to re-enable interrupts. It's not called while
8067 * the interrupt routine is executing.
8069 static void ixgbe_netpoll(struct net_device *netdev)
8071 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8074 /* if interface is down do nothing */
8075 if (test_bit(__IXGBE_DOWN, &adapter->state))
8078 /* loop through and schedule all active queues */
8079 for (i = 0; i < adapter->num_q_vectors; i++)
8080 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8084 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
8085 struct rtnl_link_stats64 *stats)
8087 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8091 for (i = 0; i < adapter->num_rx_queues; i++) {
8092 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8098 start = u64_stats_fetch_begin_irq(&ring->syncp);
8099 packets = ring->stats.packets;
8100 bytes = ring->stats.bytes;
8101 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8102 stats->rx_packets += packets;
8103 stats->rx_bytes += bytes;
8107 for (i = 0; i < adapter->num_tx_queues; i++) {
8108 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8114 start = u64_stats_fetch_begin_irq(&ring->syncp);
8115 packets = ring->stats.packets;
8116 bytes = ring->stats.bytes;
8117 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8118 stats->tx_packets += packets;
8119 stats->tx_bytes += bytes;
8123 /* following stats updated by ixgbe_watchdog_task() */
8124 stats->multicast = netdev->stats.multicast;
8125 stats->rx_errors = netdev->stats.rx_errors;
8126 stats->rx_length_errors = netdev->stats.rx_length_errors;
8127 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8128 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8132 #ifdef CONFIG_IXGBE_DCB
8134 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8135 * @adapter: pointer to ixgbe_adapter
8136 * @tc: number of traffic classes currently enabled
8138 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8139 * 802.1Q priority maps to a packet buffer that exists.
8141 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8143 struct ixgbe_hw *hw = &adapter->hw;
8147 /* 82598 have a static priority to TC mapping that can not
8148 * be changed so no validation is needed.
8150 if (hw->mac.type == ixgbe_mac_82598EB)
8153 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8156 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8157 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8159 /* If up2tc is out of bounds default to zero */
8161 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8165 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8171 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8172 * @adapter: Pointer to adapter struct
8174 * Populate the netdev user priority to tc map
8176 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8178 struct net_device *dev = adapter->netdev;
8179 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8180 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8183 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8186 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8187 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8189 tc = ets->prio_tc[prio];
8191 netdev_set_prio_tc_map(dev, prio, tc);
8195 #endif /* CONFIG_IXGBE_DCB */
8197 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8199 * @netdev: net device to configure
8200 * @tc: number of traffic classes to enable
8202 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8204 struct ixgbe_adapter *adapter = netdev_priv(dev);
8205 struct ixgbe_hw *hw = &adapter->hw;
8208 /* Hardware supports up to 8 traffic classes */
8209 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8212 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8215 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8216 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8219 /* Hardware has to reinitialize queues and interrupts to
8220 * match packet buffer alignment. Unfortunately, the
8221 * hardware is not flexible enough to do this dynamically.
8223 if (netif_running(dev))
8226 ixgbe_reset(adapter);
8228 ixgbe_clear_interrupt_scheme(adapter);
8230 #ifdef CONFIG_IXGBE_DCB
8232 netdev_set_num_tc(dev, tc);
8233 ixgbe_set_prio_tc_map(adapter);
8235 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8237 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8238 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8239 adapter->hw.fc.requested_mode = ixgbe_fc_none;
8242 netdev_reset_tc(dev);
8244 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8245 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8247 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8249 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8250 adapter->dcb_cfg.pfc_mode_enable = false;
8253 ixgbe_validate_rtr(adapter, tc);
8255 #endif /* CONFIG_IXGBE_DCB */
8256 ixgbe_init_interrupt_scheme(adapter);
8258 if (netif_running(dev))
8259 return ixgbe_open(dev);
8264 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8265 struct tc_cls_u32_offload *cls)
8267 u32 hdl = cls->knode.handle;
8268 u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8269 u32 loc = cls->knode.handle & 0xfffff;
8271 struct ixgbe_jump_table *jump = NULL;
8273 if (loc > IXGBE_MAX_HW_ENTRIES)
8276 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8279 /* Clear this filter in the link data it is associated with */
8280 if (uhtid != 0x800) {
8281 jump = adapter->jump_tables[uhtid];
8284 if (!test_bit(loc - 1, jump->child_loc_map))
8286 clear_bit(loc - 1, jump->child_loc_map);
8289 /* Check if the filter being deleted is a link */
8290 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8291 jump = adapter->jump_tables[i];
8292 if (jump && jump->link_hdl == hdl) {
8293 /* Delete filters in the hardware in the child hash
8294 * table associated with this link
8296 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8297 if (!test_bit(j, jump->child_loc_map))
8299 spin_lock(&adapter->fdir_perfect_lock);
8300 err = ixgbe_update_ethtool_fdir_entry(adapter,
8303 spin_unlock(&adapter->fdir_perfect_lock);
8304 clear_bit(j, jump->child_loc_map);
8306 /* Remove resources for this link */
8310 adapter->jump_tables[i] = NULL;
8315 spin_lock(&adapter->fdir_perfect_lock);
8316 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8317 spin_unlock(&adapter->fdir_perfect_lock);
8321 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8323 struct tc_cls_u32_offload *cls)
8325 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8327 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8330 /* This ixgbe devices do not support hash tables at the moment
8331 * so abort when given hash tables.
8333 if (cls->hnode.divisor > 0)
8336 set_bit(uhtid - 1, &adapter->tables);
8340 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8341 struct tc_cls_u32_offload *cls)
8343 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8345 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8348 clear_bit(uhtid - 1, &adapter->tables);
8352 #ifdef CONFIG_NET_CLS_ACT
8353 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8354 u8 *queue, u64 *action)
8356 unsigned int num_vfs = adapter->num_vfs, vf;
8357 struct net_device *upper;
8358 struct list_head *iter;
8360 /* redirect to a SRIOV VF */
8361 for (vf = 0; vf < num_vfs; ++vf) {
8362 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8363 if (upper->ifindex == ifindex) {
8364 if (adapter->num_rx_pools > 1)
8367 *queue = vf * adapter->num_rx_queues_per_pool;
8370 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8375 /* redirect to a offloaded macvlan netdev */
8376 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
8377 if (netif_is_macvlan(upper)) {
8378 struct macvlan_dev *dfwd = netdev_priv(upper);
8379 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8381 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8382 *queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8392 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8393 struct tcf_exts *exts, u64 *action, u8 *queue)
8395 const struct tc_action *a;
8399 if (tc_no_actions(exts))
8402 tcf_exts_to_list(exts, &actions);
8403 list_for_each_entry(a, &actions, list) {
8406 if (is_tcf_gact_shot(a)) {
8407 *action = IXGBE_FDIR_DROP_QUEUE;
8408 *queue = IXGBE_FDIR_DROP_QUEUE;
8412 /* Redirect to a VF or a offloaded macvlan */
8413 if (is_tcf_mirred_redirect(a)) {
8414 int ifindex = tcf_mirred_ifindex(a);
8416 err = handle_redirect_action(adapter, ifindex, queue,
8426 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8427 struct tcf_exts *exts, u64 *action, u8 *queue)
8431 #endif /* CONFIG_NET_CLS_ACT */
8433 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8434 union ixgbe_atr_input *mask,
8435 struct tc_cls_u32_offload *cls,
8436 struct ixgbe_mat_field *field_ptr,
8437 struct ixgbe_nexthdr *nexthdr)
8441 bool found_entry = false, found_jump_field = false;
8443 for (i = 0; i < cls->knode.sel->nkeys; i++) {
8444 off = cls->knode.sel->keys[i].off;
8445 val = cls->knode.sel->keys[i].val;
8446 m = cls->knode.sel->keys[i].mask;
8448 for (j = 0; field_ptr[j].val; j++) {
8449 if (field_ptr[j].off == off) {
8450 field_ptr[j].val(input, mask, val, m);
8451 input->filter.formatted.flow_type |=
8458 if (nexthdr->off == cls->knode.sel->keys[i].off &&
8459 nexthdr->val == cls->knode.sel->keys[i].val &&
8460 nexthdr->mask == cls->knode.sel->keys[i].mask)
8461 found_jump_field = true;
8467 if (nexthdr && !found_jump_field)
8473 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8474 IXGBE_ATR_L4TYPE_MASK;
8476 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8477 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8482 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8484 struct tc_cls_u32_offload *cls)
8486 u32 loc = cls->knode.handle & 0xfffff;
8487 struct ixgbe_hw *hw = &adapter->hw;
8488 struct ixgbe_mat_field *field_ptr;
8489 struct ixgbe_fdir_filter *input = NULL;
8490 union ixgbe_atr_input *mask = NULL;
8491 struct ixgbe_jump_table *jump = NULL;
8492 int i, err = -EINVAL;
8494 u32 uhtid, link_uhtid;
8496 uhtid = TC_U32_USERHTID(cls->knode.handle);
8497 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8499 /* At the moment cls_u32 jumps to network layer and skips past
8500 * L2 headers. The canonical method to match L2 frames is to use
8501 * negative values. However this is error prone at best but really
8502 * just broken because there is no way to "know" what sort of hdr
8503 * is in front of the network layer. Fix cls_u32 to support L2
8504 * headers when needed.
8506 if (protocol != htons(ETH_P_IP))
8509 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8510 e_err(drv, "Location out of range\n");
8514 /* cls u32 is a graph starting at root node 0x800. The driver tracks
8515 * links and also the fields used to advance the parser across each
8516 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8517 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8518 * To add support for new nodes update ixgbe_model.h parse structures
8519 * this function _should_ be generic try not to hardcode values here.
8521 if (uhtid == 0x800) {
8522 field_ptr = (adapter->jump_tables[0])->mat;
8524 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8526 if (!adapter->jump_tables[uhtid])
8528 field_ptr = (adapter->jump_tables[uhtid])->mat;
8534 /* At this point we know the field_ptr is valid and need to either
8535 * build cls_u32 link or attach filter. Because adding a link to
8536 * a handle that does not exist is invalid and the same for adding
8537 * rules to handles that don't exist.
8541 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8543 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8546 if (!test_bit(link_uhtid - 1, &adapter->tables))
8549 /* Multiple filters as links to the same hash table are not
8550 * supported. To add a new filter with the same next header
8551 * but different match/jump conditions, create a new hash table
8554 if (adapter->jump_tables[link_uhtid] &&
8555 (adapter->jump_tables[link_uhtid])->link_hdl) {
8556 e_err(drv, "Link filter exists for link: %x\n",
8561 for (i = 0; nexthdr[i].jump; i++) {
8562 if (nexthdr[i].o != cls->knode.sel->offoff ||
8563 nexthdr[i].s != cls->knode.sel->offshift ||
8564 nexthdr[i].m != cls->knode.sel->offmask)
8567 jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8570 input = kzalloc(sizeof(*input), GFP_KERNEL);
8575 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8580 jump->input = input;
8582 jump->link_hdl = cls->knode.handle;
8584 err = ixgbe_clsu32_build_input(input, mask, cls,
8585 field_ptr, &nexthdr[i]);
8587 jump->mat = nexthdr[i].jump;
8588 adapter->jump_tables[link_uhtid] = jump;
8595 input = kzalloc(sizeof(*input), GFP_KERNEL);
8598 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8604 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8605 if ((adapter->jump_tables[uhtid])->input)
8606 memcpy(input, (adapter->jump_tables[uhtid])->input,
8608 if ((adapter->jump_tables[uhtid])->mask)
8609 memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8612 /* Lookup in all child hash tables if this location is already
8613 * filled with a filter
8615 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8616 struct ixgbe_jump_table *link = adapter->jump_tables[i];
8618 if (link && (test_bit(loc - 1, link->child_loc_map))) {
8619 e_err(drv, "Filter exists in location: %x\n",
8626 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8630 err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8635 input->sw_idx = loc;
8637 spin_lock(&adapter->fdir_perfect_lock);
8639 if (hlist_empty(&adapter->fdir_filter_list)) {
8640 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8641 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8643 goto err_out_w_lock;
8644 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8646 goto err_out_w_lock;
8649 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8650 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8651 input->sw_idx, queue);
8653 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8654 spin_unlock(&adapter->fdir_perfect_lock);
8656 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8657 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8662 spin_unlock(&adapter->fdir_perfect_lock);
8672 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8673 struct tc_to_netdev *tc)
8675 struct ixgbe_adapter *adapter = netdev_priv(dev);
8677 if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8678 tc->type == TC_SETUP_CLSU32) {
8679 switch (tc->cls_u32->command) {
8680 case TC_CLSU32_NEW_KNODE:
8681 case TC_CLSU32_REPLACE_KNODE:
8682 return ixgbe_configure_clsu32(adapter,
8683 proto, tc->cls_u32);
8684 case TC_CLSU32_DELETE_KNODE:
8685 return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8686 case TC_CLSU32_NEW_HNODE:
8687 case TC_CLSU32_REPLACE_HNODE:
8688 return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8690 case TC_CLSU32_DELETE_HNODE:
8691 return ixgbe_configure_clsu32_del_hnode(adapter,
8698 if (tc->type != TC_SETUP_MQPRIO)
8701 return ixgbe_setup_tc(dev, tc->tc);
8704 #ifdef CONFIG_PCI_IOV
8705 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8707 struct net_device *netdev = adapter->netdev;
8710 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8715 void ixgbe_do_reset(struct net_device *netdev)
8717 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8719 if (netif_running(netdev))
8720 ixgbe_reinit_locked(adapter);
8722 ixgbe_reset(adapter);
8725 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8726 netdev_features_t features)
8728 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8730 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8731 if (!(features & NETIF_F_RXCSUM))
8732 features &= ~NETIF_F_LRO;
8734 /* Turn off LRO if not RSC capable */
8735 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8736 features &= ~NETIF_F_LRO;
8741 static int ixgbe_set_features(struct net_device *netdev,
8742 netdev_features_t features)
8744 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8745 netdev_features_t changed = netdev->features ^ features;
8746 bool need_reset = false;
8748 /* Make sure RSC matches LRO, reset if change */
8749 if (!(features & NETIF_F_LRO)) {
8750 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8752 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8753 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8754 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8755 if (adapter->rx_itr_setting == 1 ||
8756 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8757 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8759 } else if ((changed ^ features) & NETIF_F_LRO) {
8760 e_info(probe, "rx-usecs set too low, "
8766 * Check if Flow Director n-tuple support or hw_tc support was
8767 * enabled or disabled. If the state changed, we need to reset.
8769 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8770 /* turn off ATR, enable perfect filters and reset */
8771 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8774 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8775 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8777 /* turn off perfect filters, enable ATR and reset */
8778 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8781 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8783 /* We cannot enable ATR if SR-IOV is enabled */
8784 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8785 /* We cannot enable ATR if we have 2 or more tcs */
8786 (netdev_get_num_tc(netdev) > 1) ||
8787 /* We cannot enable ATR if RSS is disabled */
8788 (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8789 /* A sample rate of 0 indicates ATR disabled */
8790 (!adapter->atr_sample_rate))
8791 ; /* do nothing not supported */
8792 else /* otherwise supported and set the flag */
8793 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8796 if (changed & NETIF_F_RXALL)
8799 netdev->features = features;
8801 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8802 if (features & NETIF_F_RXCSUM) {
8803 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8805 u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8807 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8811 if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
8812 if (features & NETIF_F_RXCSUM) {
8813 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8815 u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8817 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8822 ixgbe_do_reset(netdev);
8823 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8824 NETIF_F_HW_VLAN_CTAG_FILTER))
8825 ixgbe_set_rx_mode(netdev);
8831 * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
8832 * @dev: The port's netdev
8833 * @ti: Tunnel endpoint information
8835 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
8836 struct udp_tunnel_info *ti)
8838 struct ixgbe_adapter *adapter = netdev_priv(dev);
8839 struct ixgbe_hw *hw = &adapter->hw;
8840 __be16 port = ti->port;
8844 if (ti->sa_family != AF_INET)
8848 case UDP_TUNNEL_TYPE_VXLAN:
8849 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8852 if (adapter->vxlan_port == port)
8855 if (adapter->vxlan_port) {
8857 "VXLAN port %d set, not adding port %d\n",
8858 ntohs(adapter->vxlan_port),
8863 adapter->vxlan_port = port;
8865 case UDP_TUNNEL_TYPE_GENEVE:
8866 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8869 if (adapter->geneve_port == port)
8872 if (adapter->geneve_port) {
8874 "GENEVE port %d set, not adding port %d\n",
8875 ntohs(adapter->geneve_port),
8880 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
8881 adapter->geneve_port = port;
8887 reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
8888 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
8892 * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
8893 * @dev: The port's netdev
8894 * @ti: Tunnel endpoint information
8896 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
8897 struct udp_tunnel_info *ti)
8899 struct ixgbe_adapter *adapter = netdev_priv(dev);
8902 if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
8903 ti->type != UDP_TUNNEL_TYPE_GENEVE)
8906 if (ti->sa_family != AF_INET)
8910 case UDP_TUNNEL_TYPE_VXLAN:
8911 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8914 if (adapter->vxlan_port != ti->port) {
8915 netdev_info(dev, "VXLAN port %d not found\n",
8920 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8922 case UDP_TUNNEL_TYPE_GENEVE:
8923 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8926 if (adapter->geneve_port != ti->port) {
8927 netdev_info(dev, "GENEVE port %d not found\n",
8932 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8938 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8939 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8942 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8943 struct net_device *dev,
8944 const unsigned char *addr, u16 vid,
8947 /* guarantee we can provide a unique filter for the unicast address */
8948 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8949 struct ixgbe_adapter *adapter = netdev_priv(dev);
8950 u16 pool = VMDQ_P(0);
8952 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
8956 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8960 * ixgbe_configure_bridge_mode - set various bridge modes
8961 * @adapter - the private structure
8962 * @mode - requested bridge mode
8964 * Configure some settings require for various bridge modes.
8966 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8969 struct ixgbe_hw *hw = &adapter->hw;
8970 unsigned int p, num_pools;
8974 case BRIDGE_MODE_VEPA:
8975 /* disable Tx loopback, rely on switch hairpin mode */
8976 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8978 /* must enable Rx switching replication to allow multicast
8979 * packet reception on all VFs, and to enable source address
8982 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8983 vmdctl |= IXGBE_VT_CTL_REPLEN;
8984 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8986 /* enable Rx source address pruning. Note, this requires
8987 * replication to be enabled or else it does nothing.
8989 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8990 for (p = 0; p < num_pools; p++) {
8991 if (hw->mac.ops.set_source_address_pruning)
8992 hw->mac.ops.set_source_address_pruning(hw,
8997 case BRIDGE_MODE_VEB:
8998 /* enable Tx loopback for internal VF/PF communication */
8999 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9000 IXGBE_PFDTXGSWC_VT_LBEN);
9002 /* disable Rx switching replication unless we have SR-IOV
9005 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9006 if (!adapter->num_vfs)
9007 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9008 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9010 /* disable Rx source address pruning, since we don't expect to
9011 * be receiving external loopback of our transmitted frames.
9013 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9014 for (p = 0; p < num_pools; p++) {
9015 if (hw->mac.ops.set_source_address_pruning)
9016 hw->mac.ops.set_source_address_pruning(hw,
9025 adapter->bridge_mode = mode;
9027 e_info(drv, "enabling bridge mode: %s\n",
9028 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9033 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9034 struct nlmsghdr *nlh, u16 flags)
9036 struct ixgbe_adapter *adapter = netdev_priv(dev);
9037 struct nlattr *attr, *br_spec;
9040 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9043 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9047 nla_for_each_nested(attr, br_spec, rem) {
9051 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9054 if (nla_len(attr) < sizeof(mode))
9057 mode = nla_get_u16(attr);
9058 status = ixgbe_configure_bridge_mode(adapter, mode);
9068 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9069 struct net_device *dev,
9070 u32 filter_mask, int nlflags)
9072 struct ixgbe_adapter *adapter = netdev_priv(dev);
9074 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9077 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9078 adapter->bridge_mode, 0, 0, nlflags,
9082 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9084 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9085 struct ixgbe_adapter *adapter = netdev_priv(pdev);
9086 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9090 /* Hardware has a limited number of available pools. Each VF, and the
9091 * PF require a pool. Check to ensure we don't attempt to use more
9092 * then the available number of pools.
9094 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9095 return ERR_PTR(-EINVAL);
9098 if (vdev->num_rx_queues != vdev->num_tx_queues) {
9099 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9101 return ERR_PTR(-EINVAL);
9104 /* Check for hardware restriction on number of rx/tx queues */
9105 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9106 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9108 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9110 return ERR_PTR(-EINVAL);
9113 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9114 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9115 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9116 return ERR_PTR(-EBUSY);
9118 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9120 return ERR_PTR(-ENOMEM);
9122 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9123 adapter->num_rx_pools++;
9124 set_bit(pool, &adapter->fwd_bitmask);
9125 limit = find_last_bit(&adapter->fwd_bitmask, 32);
9127 /* Enable VMDq flag so device will be set in VM mode */
9128 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9129 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9130 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9132 /* Force reinit of ring allocation with VMDQ enabled */
9133 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9136 fwd_adapter->pool = pool;
9137 fwd_adapter->real_adapter = adapter;
9139 if (netif_running(pdev)) {
9140 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9143 netif_tx_start_all_queues(vdev);
9148 /* unwind counter and free adapter struct */
9150 "%s: dfwd hardware acceleration failed\n", vdev->name);
9151 clear_bit(pool, &adapter->fwd_bitmask);
9152 adapter->num_rx_pools--;
9154 return ERR_PTR(err);
9157 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9159 struct ixgbe_fwd_adapter *fwd_adapter = priv;
9160 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9163 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9164 adapter->num_rx_pools--;
9166 limit = find_last_bit(&adapter->fwd_bitmask, 32);
9167 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9168 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9169 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9170 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9171 fwd_adapter->pool, adapter->num_rx_pools,
9172 fwd_adapter->rx_base_queue,
9173 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9174 adapter->fwd_bitmask);
9178 #define IXGBE_MAX_MAC_HDR_LEN 127
9179 #define IXGBE_MAX_NETWORK_HDR_LEN 511
9181 static netdev_features_t
9182 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9183 netdev_features_t features)
9185 unsigned int network_hdr_len, mac_hdr_len;
9187 /* Make certain the headers can be described by a context descriptor */
9188 mac_hdr_len = skb_network_header(skb) - skb->data;
9189 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9190 return features & ~(NETIF_F_HW_CSUM |
9192 NETIF_F_HW_VLAN_CTAG_TX |
9196 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9197 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN))
9198 return features & ~(NETIF_F_HW_CSUM |
9203 /* We can only support IPV4 TSO in tunnels if we can mangle the
9204 * inner IP ID field, so strip TSO if MANGLEID is not supported.
9206 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9207 features &= ~NETIF_F_TSO;
9212 static const struct net_device_ops ixgbe_netdev_ops = {
9213 .ndo_open = ixgbe_open,
9214 .ndo_stop = ixgbe_close,
9215 .ndo_start_xmit = ixgbe_xmit_frame,
9216 .ndo_select_queue = ixgbe_select_queue,
9217 .ndo_set_rx_mode = ixgbe_set_rx_mode,
9218 .ndo_validate_addr = eth_validate_addr,
9219 .ndo_set_mac_address = ixgbe_set_mac,
9220 .ndo_change_mtu = ixgbe_change_mtu,
9221 .ndo_tx_timeout = ixgbe_tx_timeout,
9222 .ndo_set_tx_maxrate = ixgbe_tx_maxrate,
9223 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
9224 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
9225 .ndo_do_ioctl = ixgbe_ioctl,
9226 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
9227 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
9228 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
9229 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
9230 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9231 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
9232 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
9233 .ndo_get_stats64 = ixgbe_get_stats64,
9234 .ndo_setup_tc = __ixgbe_setup_tc,
9235 #ifdef CONFIG_NET_POLL_CONTROLLER
9236 .ndo_poll_controller = ixgbe_netpoll,
9238 #ifdef CONFIG_NET_RX_BUSY_POLL
9239 .ndo_busy_poll = ixgbe_low_latency_recv,
9242 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9243 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9244 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9245 .ndo_fcoe_enable = ixgbe_fcoe_enable,
9246 .ndo_fcoe_disable = ixgbe_fcoe_disable,
9247 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9248 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9249 #endif /* IXGBE_FCOE */
9250 .ndo_set_features = ixgbe_set_features,
9251 .ndo_fix_features = ixgbe_fix_features,
9252 .ndo_fdb_add = ixgbe_ndo_fdb_add,
9253 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
9254 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
9255 .ndo_dfwd_add_station = ixgbe_fwd_add,
9256 .ndo_dfwd_del_station = ixgbe_fwd_del,
9257 .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port,
9258 .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port,
9259 .ndo_features_check = ixgbe_features_check,
9263 * ixgbe_enumerate_functions - Get the number of ports this device has
9264 * @adapter: adapter structure
9266 * This function enumerates the phsyical functions co-located on a single slot,
9267 * in order to determine how many ports a device has. This is most useful in
9268 * determining the required GT/s of PCIe bandwidth necessary for optimal
9271 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9273 struct pci_dev *entry, *pdev = adapter->pdev;
9276 /* Some cards can not use the generic count PCIe functions method,
9277 * because they are behind a parent switch, so we hardcode these with
9278 * the correct number of functions.
9280 if (ixgbe_pcie_from_parent(&adapter->hw))
9283 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9284 /* don't count virtual functions */
9285 if (entry->is_virtfn)
9288 /* When the devices on the bus don't all match our device ID,
9289 * we can't reliably determine the correct number of
9290 * functions. This can occur if a function has been direct
9291 * attached to a virtual machine using VT-d, for example. In
9292 * this case, simply return -1 to indicate this.
9294 if ((entry->vendor != pdev->vendor) ||
9295 (entry->device != pdev->device))
9305 * ixgbe_wol_supported - Check whether device supports WoL
9306 * @adapter: the adapter private structure
9307 * @device_id: the device ID
9308 * @subdev_id: the subsystem device ID
9310 * This function is used by probe and ethtool to determine
9311 * which devices have WoL support
9314 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9317 struct ixgbe_hw *hw = &adapter->hw;
9318 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9320 /* WOL not supported on 82598 */
9321 if (hw->mac.type == ixgbe_mac_82598EB)
9324 /* check eeprom to see if WOL is enabled for X540 and newer */
9325 if (hw->mac.type >= ixgbe_mac_X540) {
9326 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9327 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9328 (hw->bus.func == 0)))
9332 /* WOL is determined based on device IDs for 82599 MACs */
9333 switch (device_id) {
9334 case IXGBE_DEV_ID_82599_SFP:
9335 /* Only these subdevices could supports WOL */
9336 switch (subdevice_id) {
9337 case IXGBE_SUBDEV_ID_82599_560FLR:
9338 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9339 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9340 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9341 /* only support first port */
9342 if (hw->bus.func != 0)
9344 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9345 case IXGBE_SUBDEV_ID_82599_SFP:
9346 case IXGBE_SUBDEV_ID_82599_RNDC:
9347 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9348 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9349 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9350 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9354 case IXGBE_DEV_ID_82599EN_SFP:
9355 /* Only these subdevices support WOL */
9356 switch (subdevice_id) {
9357 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9361 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9362 /* All except this subdevice support WOL */
9363 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9366 case IXGBE_DEV_ID_82599_KX4:
9376 * ixgbe_probe - Device Initialization Routine
9377 * @pdev: PCI device information struct
9378 * @ent: entry in ixgbe_pci_tbl
9380 * Returns 0 on success, negative on failure
9382 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9383 * The OS initialization, configuring of the adapter private structure,
9384 * and a hardware reset occur.
9386 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9388 struct net_device *netdev;
9389 struct ixgbe_adapter *adapter = NULL;
9390 struct ixgbe_hw *hw;
9391 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9392 int i, err, pci_using_dac, expected_gts;
9393 unsigned int indices = MAX_TX_QUEUES;
9394 u8 part_str[IXGBE_PBANUM_LENGTH];
9395 bool disable_dev = false;
9401 /* Catch broken hardware that put the wrong VF device ID in
9402 * the PCIe SR-IOV capability.
9404 if (pdev->is_virtfn) {
9405 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9406 pci_name(pdev), pdev->vendor, pdev->device);
9410 err = pci_enable_device_mem(pdev);
9414 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9417 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9420 "No usable DMA configuration, aborting\n");
9426 err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9429 "pci_request_selected_regions failed 0x%x\n", err);
9433 pci_enable_pcie_error_reporting(pdev);
9435 pci_set_master(pdev);
9436 pci_save_state(pdev);
9438 if (ii->mac == ixgbe_mac_82598EB) {
9439 #ifdef CONFIG_IXGBE_DCB
9440 /* 8 TC w/ 4 queues per TC */
9441 indices = 4 * MAX_TRAFFIC_CLASS;
9443 indices = IXGBE_MAX_RSS_INDICES;
9447 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9450 goto err_alloc_etherdev;
9453 SET_NETDEV_DEV(netdev, &pdev->dev);
9455 adapter = netdev_priv(netdev);
9457 adapter->netdev = netdev;
9458 adapter->pdev = pdev;
9461 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9463 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9464 pci_resource_len(pdev, 0));
9465 adapter->io_addr = hw->hw_addr;
9471 netdev->netdev_ops = &ixgbe_netdev_ops;
9472 ixgbe_set_ethtool_ops(netdev);
9473 netdev->watchdog_timeo = 5 * HZ;
9474 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9477 hw->mac.ops = *ii->mac_ops;
9478 hw->mac.type = ii->mac;
9479 hw->mvals = ii->mvals;
9482 hw->eeprom.ops = *ii->eeprom_ops;
9483 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9484 if (ixgbe_removed(hw->hw_addr)) {
9488 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9489 if (!(eec & BIT(8)))
9490 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9493 hw->phy.ops = *ii->phy_ops;
9494 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9495 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9496 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9497 hw->phy.mdio.mmds = 0;
9498 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9499 hw->phy.mdio.dev = netdev;
9500 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9501 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9503 ii->get_invariants(hw);
9505 /* setup the private structure */
9506 err = ixgbe_sw_init(adapter);
9510 /* Make sure the SWFW semaphore is in a valid state */
9511 if (hw->mac.ops.init_swfw_sync)
9512 hw->mac.ops.init_swfw_sync(hw);
9514 /* Make it possible the adapter to be woken up via WOL */
9515 switch (adapter->hw.mac.type) {
9516 case ixgbe_mac_82599EB:
9517 case ixgbe_mac_X540:
9518 case ixgbe_mac_X550:
9519 case ixgbe_mac_X550EM_x:
9520 case ixgbe_mac_x550em_a:
9521 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9528 * If there is a fan on this device and it has failed log the
9531 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9532 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9533 if (esdp & IXGBE_ESDP_SDP1)
9534 e_crit(probe, "Fan has stopped, replace the adapter\n");
9537 if (allow_unsupported_sfp)
9538 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9540 /* reset_hw fills in the perm_addr as well */
9541 hw->phy.reset_if_overtemp = true;
9542 err = hw->mac.ops.reset_hw(hw);
9543 hw->phy.reset_if_overtemp = false;
9544 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9546 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9547 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9548 e_dev_err("Reload the driver after installing a supported module.\n");
9551 e_dev_err("HW Init failed: %d\n", err);
9555 #ifdef CONFIG_PCI_IOV
9556 /* SR-IOV not supported on the 82598 */
9557 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9560 ixgbe_init_mbx_params_pf(hw);
9561 hw->mbx.ops = ii->mbx_ops;
9562 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9563 ixgbe_enable_sriov(adapter);
9567 netdev->features = NETIF_F_SG |
9574 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9575 NETIF_F_GSO_GRE_CSUM | \
9576 NETIF_F_GSO_IPXIP4 | \
9577 NETIF_F_GSO_IPXIP6 | \
9578 NETIF_F_GSO_UDP_TUNNEL | \
9579 NETIF_F_GSO_UDP_TUNNEL_CSUM)
9581 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9582 netdev->features |= NETIF_F_GSO_PARTIAL |
9583 IXGBE_GSO_PARTIAL_FEATURES;
9585 if (hw->mac.type >= ixgbe_mac_82599EB)
9586 netdev->features |= NETIF_F_SCTP_CRC;
9588 /* copy netdev features into list of user selectable features */
9589 netdev->hw_features |= netdev->features |
9590 NETIF_F_HW_VLAN_CTAG_FILTER |
9591 NETIF_F_HW_VLAN_CTAG_RX |
9592 NETIF_F_HW_VLAN_CTAG_TX |
9594 NETIF_F_HW_L2FW_DOFFLOAD;
9596 if (hw->mac.type >= ixgbe_mac_82599EB)
9597 netdev->hw_features |= NETIF_F_NTUPLE |
9601 netdev->features |= NETIF_F_HIGHDMA;
9603 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9604 netdev->hw_enc_features |= netdev->vlan_features;
9605 netdev->mpls_features |= NETIF_F_HW_CSUM;
9607 /* set this bit last since it cannot be part of vlan_features */
9608 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9609 NETIF_F_HW_VLAN_CTAG_RX |
9610 NETIF_F_HW_VLAN_CTAG_TX;
9612 netdev->priv_flags |= IFF_UNICAST_FLT;
9613 netdev->priv_flags |= IFF_SUPP_NOFCS;
9615 #ifdef CONFIG_IXGBE_DCB
9616 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9617 netdev->dcbnl_ops = &dcbnl_ops;
9621 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9622 unsigned int fcoe_l;
9624 if (hw->mac.ops.get_device_caps) {
9625 hw->mac.ops.get_device_caps(hw, &device_caps);
9626 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9627 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9631 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9632 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9634 netdev->features |= NETIF_F_FSO |
9637 netdev->vlan_features |= NETIF_F_FSO |
9641 #endif /* IXGBE_FCOE */
9643 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9644 netdev->hw_features |= NETIF_F_LRO;
9645 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9646 netdev->features |= NETIF_F_LRO;
9648 /* make sure the EEPROM is good */
9649 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9650 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9655 eth_platform_get_mac_address(&adapter->pdev->dev,
9656 adapter->hw.mac.perm_addr);
9658 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9660 if (!is_valid_ether_addr(netdev->dev_addr)) {
9661 e_dev_err("invalid MAC address\n");
9666 /* Set hw->mac.addr to permanent MAC address */
9667 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9668 ixgbe_mac_set_default_filter(adapter);
9670 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9671 (unsigned long) adapter);
9673 if (ixgbe_removed(hw->hw_addr)) {
9677 INIT_WORK(&adapter->service_task, ixgbe_service_task);
9678 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9679 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9681 err = ixgbe_init_interrupt_scheme(adapter);
9685 /* WOL not supported for all devices */
9687 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9688 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9689 pdev->subsystem_device);
9690 if (hw->wol_enabled)
9691 adapter->wol = IXGBE_WUFC_MAG;
9693 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9695 /* save off EEPROM version number */
9696 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9697 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9699 /* pick up the PCI bus settings for reporting later */
9700 if (ixgbe_pcie_from_parent(hw))
9701 ixgbe_get_parent_bus_info(adapter);
9703 hw->mac.ops.get_bus_info(hw);
9705 /* calculate the expected PCIe bandwidth required for optimal
9706 * performance. Note that some older parts will never have enough
9707 * bandwidth due to being older generation PCIe parts. We clamp these
9708 * parts to ensure no warning is displayed if it can't be fixed.
9710 switch (hw->mac.type) {
9711 case ixgbe_mac_82598EB:
9712 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9715 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9719 /* don't check link if we failed to enumerate functions */
9720 if (expected_gts > 0)
9721 ixgbe_check_minimum_link(adapter, expected_gts);
9723 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9725 strlcpy(part_str, "Unknown", sizeof(part_str));
9726 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9727 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9728 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9731 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9732 hw->mac.type, hw->phy.type, part_str);
9734 e_dev_info("%pM\n", netdev->dev_addr);
9736 /* reset the hardware with the new settings */
9737 err = hw->mac.ops.start_hw(hw);
9738 if (err == IXGBE_ERR_EEPROM_VERSION) {
9739 /* We are running on a pre-production device, log a warning */
9740 e_dev_warn("This device is a pre-production adapter/LOM. "
9741 "Please be aware there may be issues associated "
9742 "with your hardware. If you are experiencing "
9743 "problems please contact your Intel or hardware "
9744 "representative who provided you with this "
9747 strcpy(netdev->name, "eth%d");
9748 err = register_netdev(netdev);
9752 pci_set_drvdata(pdev, adapter);
9754 /* power down the optics for 82599 SFP+ fiber */
9755 if (hw->mac.ops.disable_tx_laser)
9756 hw->mac.ops.disable_tx_laser(hw);
9758 /* carrier off reporting is important to ethtool even BEFORE open */
9759 netif_carrier_off(netdev);
9761 #ifdef CONFIG_IXGBE_DCA
9762 if (dca_add_requester(&pdev->dev) == 0) {
9763 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9764 ixgbe_setup_dca(adapter);
9767 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9768 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9769 for (i = 0; i < adapter->num_vfs; i++)
9770 ixgbe_vf_configuration(pdev, (i | 0x10000000));
9773 /* firmware requires driver version to be 0xFFFFFFFF
9774 * since os does not support feature
9776 if (hw->mac.ops.set_fw_drv_ver)
9777 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
9780 /* add san mac addr to netdev */
9781 ixgbe_add_sanmac_netdev(netdev);
9783 e_dev_info("%s\n", ixgbe_default_device_descr);
9785 #ifdef CONFIG_IXGBE_HWMON
9786 if (ixgbe_sysfs_init(adapter))
9787 e_err(probe, "failed to allocate sysfs resources\n");
9788 #endif /* CONFIG_IXGBE_HWMON */
9790 ixgbe_dbg_adapter_init(adapter);
9792 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9793 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9794 hw->mac.ops.setup_link(hw,
9795 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9801 ixgbe_release_hw_control(adapter);
9802 ixgbe_clear_interrupt_scheme(adapter);
9804 ixgbe_disable_sriov(adapter);
9805 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9806 iounmap(adapter->io_addr);
9807 kfree(adapter->jump_tables[0]);
9808 kfree(adapter->mac_table);
9810 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9811 free_netdev(netdev);
9813 pci_release_mem_regions(pdev);
9816 if (!adapter || disable_dev)
9817 pci_disable_device(pdev);
9822 * ixgbe_remove - Device Removal Routine
9823 * @pdev: PCI device information struct
9825 * ixgbe_remove is called by the PCI subsystem to alert the driver
9826 * that it should release a PCI device. The could be caused by a
9827 * Hot-Plug event, or because the driver is going to be removed from
9830 static void ixgbe_remove(struct pci_dev *pdev)
9832 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9833 struct net_device *netdev;
9837 /* if !adapter then we already cleaned up in probe */
9841 netdev = adapter->netdev;
9842 ixgbe_dbg_adapter_exit(adapter);
9844 set_bit(__IXGBE_REMOVING, &adapter->state);
9845 cancel_work_sync(&adapter->service_task);
9848 #ifdef CONFIG_IXGBE_DCA
9849 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9850 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9851 dca_remove_requester(&pdev->dev);
9852 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9853 IXGBE_DCA_CTRL_DCA_DISABLE);
9857 #ifdef CONFIG_IXGBE_HWMON
9858 ixgbe_sysfs_exit(adapter);
9859 #endif /* CONFIG_IXGBE_HWMON */
9861 /* remove the added san mac */
9862 ixgbe_del_sanmac_netdev(netdev);
9864 #ifdef CONFIG_PCI_IOV
9865 ixgbe_disable_sriov(adapter);
9867 if (netdev->reg_state == NETREG_REGISTERED)
9868 unregister_netdev(netdev);
9870 ixgbe_clear_interrupt_scheme(adapter);
9872 ixgbe_release_hw_control(adapter);
9875 kfree(adapter->ixgbe_ieee_pfc);
9876 kfree(adapter->ixgbe_ieee_ets);
9879 iounmap(adapter->io_addr);
9880 pci_release_mem_regions(pdev);
9882 e_dev_info("complete\n");
9884 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
9885 if (adapter->jump_tables[i]) {
9886 kfree(adapter->jump_tables[i]->input);
9887 kfree(adapter->jump_tables[i]->mask);
9889 kfree(adapter->jump_tables[i]);
9892 kfree(adapter->mac_table);
9893 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9894 free_netdev(netdev);
9896 pci_disable_pcie_error_reporting(pdev);
9899 pci_disable_device(pdev);
9903 * ixgbe_io_error_detected - called when PCI error is detected
9904 * @pdev: Pointer to PCI device
9905 * @state: The current pci connection state
9907 * This function is called after a PCI bus error affecting
9908 * this device has been detected.
9910 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9911 pci_channel_state_t state)
9913 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9914 struct net_device *netdev = adapter->netdev;
9916 #ifdef CONFIG_PCI_IOV
9917 struct ixgbe_hw *hw = &adapter->hw;
9918 struct pci_dev *bdev, *vfdev;
9919 u32 dw0, dw1, dw2, dw3;
9921 u16 req_id, pf_func;
9923 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9924 adapter->num_vfs == 0)
9925 goto skip_bad_vf_detection;
9927 bdev = pdev->bus->self;
9928 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9929 bdev = bdev->bus->self;
9932 goto skip_bad_vf_detection;
9934 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9936 goto skip_bad_vf_detection;
9938 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9939 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9940 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9941 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9942 if (ixgbe_removed(hw->hw_addr))
9943 goto skip_bad_vf_detection;
9946 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9947 if (!(req_id & 0x0080))
9948 goto skip_bad_vf_detection;
9950 pf_func = req_id & 0x01;
9951 if ((pf_func & 1) == (pdev->devfn & 1)) {
9952 unsigned int device_id;
9954 vf = (req_id & 0x7F) >> 1;
9955 e_dev_err("VF %d has caused a PCIe error\n", vf);
9956 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9957 "%8.8x\tdw3: %8.8x\n",
9958 dw0, dw1, dw2, dw3);
9959 switch (adapter->hw.mac.type) {
9960 case ixgbe_mac_82599EB:
9961 device_id = IXGBE_82599_VF_DEVICE_ID;
9963 case ixgbe_mac_X540:
9964 device_id = IXGBE_X540_VF_DEVICE_ID;
9966 case ixgbe_mac_X550:
9967 device_id = IXGBE_DEV_ID_X550_VF;
9969 case ixgbe_mac_X550EM_x:
9970 device_id = IXGBE_DEV_ID_X550EM_X_VF;
9972 case ixgbe_mac_x550em_a:
9973 device_id = IXGBE_DEV_ID_X550EM_A_VF;
9980 /* Find the pci device of the offending VF */
9981 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9983 if (vfdev->devfn == (req_id & 0xFF))
9985 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9989 * There's a slim chance the VF could have been hot plugged,
9990 * so if it is no longer present we don't need to issue the
9991 * VFLR. Just clean up the AER in that case.
9994 ixgbe_issue_vf_flr(adapter, vfdev);
9995 /* Free device reference count */
9999 pci_cleanup_aer_uncorrect_error_status(pdev);
10003 * Even though the error may have occurred on the other port
10004 * we still need to increment the vf error reference count for
10005 * both ports because the I/O resume function will be called
10006 * for both of them.
10008 adapter->vferr_refcount++;
10010 return PCI_ERS_RESULT_RECOVERED;
10012 skip_bad_vf_detection:
10013 #endif /* CONFIG_PCI_IOV */
10014 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10015 return PCI_ERS_RESULT_DISCONNECT;
10018 netif_device_detach(netdev);
10020 if (state == pci_channel_io_perm_failure) {
10022 return PCI_ERS_RESULT_DISCONNECT;
10025 if (netif_running(netdev))
10026 ixgbe_down(adapter);
10028 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10029 pci_disable_device(pdev);
10032 /* Request a slot reset. */
10033 return PCI_ERS_RESULT_NEED_RESET;
10037 * ixgbe_io_slot_reset - called after the pci bus has been reset.
10038 * @pdev: Pointer to PCI device
10040 * Restart the card from scratch, as if from a cold-boot.
10042 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10044 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10045 pci_ers_result_t result;
10048 if (pci_enable_device_mem(pdev)) {
10049 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10050 result = PCI_ERS_RESULT_DISCONNECT;
10052 smp_mb__before_atomic();
10053 clear_bit(__IXGBE_DISABLED, &adapter->state);
10054 adapter->hw.hw_addr = adapter->io_addr;
10055 pci_set_master(pdev);
10056 pci_restore_state(pdev);
10057 pci_save_state(pdev);
10059 pci_wake_from_d3(pdev, false);
10061 ixgbe_reset(adapter);
10062 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10063 result = PCI_ERS_RESULT_RECOVERED;
10066 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10068 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10069 "failed 0x%0x\n", err);
10070 /* non-fatal, continue */
10077 * ixgbe_io_resume - called when traffic can start flowing again.
10078 * @pdev: Pointer to PCI device
10080 * This callback is called when the error recovery driver tells us that
10081 * its OK to resume normal operation.
10083 static void ixgbe_io_resume(struct pci_dev *pdev)
10085 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10086 struct net_device *netdev = adapter->netdev;
10088 #ifdef CONFIG_PCI_IOV
10089 if (adapter->vferr_refcount) {
10090 e_info(drv, "Resuming after VF err\n");
10091 adapter->vferr_refcount--;
10096 if (netif_running(netdev))
10099 netif_device_attach(netdev);
10102 static const struct pci_error_handlers ixgbe_err_handler = {
10103 .error_detected = ixgbe_io_error_detected,
10104 .slot_reset = ixgbe_io_slot_reset,
10105 .resume = ixgbe_io_resume,
10108 static struct pci_driver ixgbe_driver = {
10109 .name = ixgbe_driver_name,
10110 .id_table = ixgbe_pci_tbl,
10111 .probe = ixgbe_probe,
10112 .remove = ixgbe_remove,
10114 .suspend = ixgbe_suspend,
10115 .resume = ixgbe_resume,
10117 .shutdown = ixgbe_shutdown,
10118 .sriov_configure = ixgbe_pci_sriov_configure,
10119 .err_handler = &ixgbe_err_handler
10123 * ixgbe_init_module - Driver Registration Routine
10125 * ixgbe_init_module is the first routine called when the driver is
10126 * loaded. All it does is register with the PCI subsystem.
10128 static int __init ixgbe_init_module(void)
10131 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10132 pr_info("%s\n", ixgbe_copyright);
10134 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10136 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10142 ret = pci_register_driver(&ixgbe_driver);
10144 destroy_workqueue(ixgbe_wq);
10149 #ifdef CONFIG_IXGBE_DCA
10150 dca_register_notify(&dca_notifier);
10156 module_init(ixgbe_init_module);
10159 * ixgbe_exit_module - Driver Exit Cleanup Routine
10161 * ixgbe_exit_module is called just before the driver is removed
10164 static void __exit ixgbe_exit_module(void)
10166 #ifdef CONFIG_IXGBE_DCA
10167 dca_unregister_notify(&dca_notifier);
10169 pci_unregister_driver(&ixgbe_driver);
10173 destroy_workqueue(ixgbe_wq);
10178 #ifdef CONFIG_IXGBE_DCA
10179 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10184 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10185 __ixgbe_notify_dca);
10187 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10190 #endif /* CONFIG_IXGBE_DCA */
10192 module_exit(ixgbe_exit_module);