1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/udp_tunnel.h>
54 #include <net/pkt_cls.h>
55 #include <net/tc_act/tc_gact.h>
56 #include <net/tc_act/tc_mirred.h>
57 #include <net/vxlan.h>
60 #include "ixgbe_common.h"
61 #include "ixgbe_dcb_82599.h"
62 #include "ixgbe_sriov.h"
63 #include "ixgbe_model.h"
65 char ixgbe_driver_name[] = "ixgbe";
66 static const char ixgbe_driver_string[] =
67 "Intel(R) 10 Gigabit PCI Express Network Driver";
69 char ixgbe_default_device_descr[] =
70 "Intel(R) 10 Gigabit Network Connection";
72 static char ixgbe_default_device_descr[] =
73 "Intel(R) 10 Gigabit Network Connection";
75 #define DRV_VERSION "4.4.0-k"
76 const char ixgbe_driver_version[] = DRV_VERSION;
77 static const char ixgbe_copyright[] =
78 "Copyright (c) 1999-2016 Intel Corporation.";
80 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
82 static const struct ixgbe_info *ixgbe_info_tbl[] = {
83 [board_82598] = &ixgbe_82598_info,
84 [board_82599] = &ixgbe_82599_info,
85 [board_X540] = &ixgbe_X540_info,
86 [board_X550] = &ixgbe_X550_info,
87 [board_X550EM_x] = &ixgbe_X550EM_x_info,
88 [board_x550em_a] = &ixgbe_x550em_a_info,
89 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info,
92 /* ixgbe_pci_tbl - PCI Device ID Table
94 * Wildcard entries (PCI_ANY_ID) should come last
95 * Last entry must be all 0s
97 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
98 * Class, Class Mask, private data (not used) }
100 static const struct pci_device_id ixgbe_pci_tbl[] = {
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
141 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
142 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
143 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
144 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
145 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
146 /* required last entry */
149 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
151 #ifdef CONFIG_IXGBE_DCA
152 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
154 static struct notifier_block dca_notifier = {
155 .notifier_call = ixgbe_notify_dca,
161 #ifdef CONFIG_PCI_IOV
162 static unsigned int max_vfs;
163 module_param(max_vfs, uint, 0);
164 MODULE_PARM_DESC(max_vfs,
165 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
166 #endif /* CONFIG_PCI_IOV */
168 static unsigned int allow_unsupported_sfp;
169 module_param(allow_unsupported_sfp, uint, 0);
170 MODULE_PARM_DESC(allow_unsupported_sfp,
171 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
173 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
174 static int debug = -1;
175 module_param(debug, int, 0);
176 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
178 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
179 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
180 MODULE_LICENSE("GPL");
181 MODULE_VERSION(DRV_VERSION);
183 static struct workqueue_struct *ixgbe_wq;
185 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
186 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
188 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
191 struct pci_dev *parent_dev;
192 struct pci_bus *parent_bus;
194 parent_bus = adapter->pdev->bus->parent;
198 parent_dev = parent_bus->self;
202 if (!pci_is_pcie(parent_dev))
205 pcie_capability_read_word(parent_dev, reg, value);
206 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
207 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
212 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
214 struct ixgbe_hw *hw = &adapter->hw;
218 hw->bus.type = ixgbe_bus_type_pci_express;
220 /* Get the negotiated link width and speed from PCI config space of the
221 * parent, as this device is behind a switch
223 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
225 /* assume caller will handle error case */
229 hw->bus.width = ixgbe_convert_bus_width(link_status);
230 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
236 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
237 * @hw: hw specific details
239 * This function is used by probe to determine whether a device's PCI-Express
240 * bandwidth details should be gathered from the parent bus instead of from the
241 * device. Used to ensure that various locations all have the correct device ID
244 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
246 switch (hw->device_id) {
247 case IXGBE_DEV_ID_82599_SFP_SF_QP:
248 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
255 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
258 struct ixgbe_hw *hw = &adapter->hw;
260 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
261 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
262 struct pci_dev *pdev;
264 /* Some devices are not connected over PCIe and thus do not negotiate
265 * speed. These devices do not have valid bus info, and thus any report
266 * we generate may not be correct.
268 if (hw->bus.type == ixgbe_bus_type_internal)
271 /* determine whether to use the parent device */
272 if (ixgbe_pcie_from_parent(&adapter->hw))
273 pdev = adapter->pdev->bus->parent->self;
275 pdev = adapter->pdev;
277 if (pcie_get_minimum_link(pdev, &speed, &width) ||
278 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
279 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
284 case PCIE_SPEED_2_5GT:
285 /* 8b/10b encoding reduces max throughput by 20% */
288 case PCIE_SPEED_5_0GT:
289 /* 8b/10b encoding reduces max throughput by 20% */
292 case PCIE_SPEED_8_0GT:
293 /* 128b/130b encoding reduces throughput by less than 2% */
297 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
301 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
303 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
304 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
305 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
306 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
309 (speed == PCIE_SPEED_2_5GT ? "20%" :
310 speed == PCIE_SPEED_5_0GT ? "20%" :
311 speed == PCIE_SPEED_8_0GT ? "<2%" :
314 if (max_gts < expected_gts) {
315 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
316 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
318 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
322 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
324 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
325 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
326 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
327 queue_work(ixgbe_wq, &adapter->service_task);
330 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
332 struct ixgbe_adapter *adapter = hw->back;
337 e_dev_err("Adapter removed\n");
338 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
339 ixgbe_service_event_schedule(adapter);
342 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
346 /* The following check not only optimizes a bit by not
347 * performing a read on the status register when the
348 * register just read was a status register read that
349 * returned IXGBE_FAILED_READ_REG. It also blocks any
350 * potential recursion.
352 if (reg == IXGBE_STATUS) {
353 ixgbe_remove_adapter(hw);
356 value = ixgbe_read_reg(hw, IXGBE_STATUS);
357 if (value == IXGBE_FAILED_READ_REG)
358 ixgbe_remove_adapter(hw);
362 * ixgbe_read_reg - Read from device register
363 * @hw: hw specific details
364 * @reg: offset of register to read
366 * Returns : value read or IXGBE_FAILED_READ_REG if removed
368 * This function is used to read device registers. It checks for device
369 * removal by confirming any read that returns all ones by checking the
370 * status register value for all ones. This function avoids reading from
371 * the hardware if a removal was previously detected in which case it
372 * returns IXGBE_FAILED_READ_REG (all ones).
374 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
376 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
379 if (ixgbe_removed(reg_addr))
380 return IXGBE_FAILED_READ_REG;
381 if (unlikely(hw->phy.nw_mng_if_sel &
382 IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
383 struct ixgbe_adapter *adapter;
386 for (i = 0; i < 200; ++i) {
387 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
389 goto writes_completed;
390 if (value == IXGBE_FAILED_READ_REG) {
391 ixgbe_remove_adapter(hw);
392 return IXGBE_FAILED_READ_REG;
398 e_warn(hw, "register writes incomplete %08x\n", value);
402 value = readl(reg_addr + reg);
403 if (unlikely(value == IXGBE_FAILED_READ_REG))
404 ixgbe_check_remove(hw, reg);
408 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
412 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
413 if (value == IXGBE_FAILED_READ_CFG_WORD) {
414 ixgbe_remove_adapter(hw);
420 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
422 struct ixgbe_adapter *adapter = hw->back;
425 if (ixgbe_removed(hw->hw_addr))
426 return IXGBE_FAILED_READ_CFG_WORD;
427 pci_read_config_word(adapter->pdev, reg, &value);
428 if (value == IXGBE_FAILED_READ_CFG_WORD &&
429 ixgbe_check_cfg_remove(hw, adapter->pdev))
430 return IXGBE_FAILED_READ_CFG_WORD;
434 #ifdef CONFIG_PCI_IOV
435 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
437 struct ixgbe_adapter *adapter = hw->back;
440 if (ixgbe_removed(hw->hw_addr))
441 return IXGBE_FAILED_READ_CFG_DWORD;
442 pci_read_config_dword(adapter->pdev, reg, &value);
443 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
444 ixgbe_check_cfg_remove(hw, adapter->pdev))
445 return IXGBE_FAILED_READ_CFG_DWORD;
448 #endif /* CONFIG_PCI_IOV */
450 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
452 struct ixgbe_adapter *adapter = hw->back;
454 if (ixgbe_removed(hw->hw_addr))
456 pci_write_config_word(adapter->pdev, reg, value);
459 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
461 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
463 /* flush memory to make sure state is correct before next watchdog */
464 smp_mb__before_atomic();
465 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
468 struct ixgbe_reg_info {
473 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
475 /* General Registers */
476 {IXGBE_CTRL, "CTRL"},
477 {IXGBE_STATUS, "STATUS"},
478 {IXGBE_CTRL_EXT, "CTRL_EXT"},
480 /* Interrupt Registers */
481 {IXGBE_EICR, "EICR"},
484 {IXGBE_SRRCTL(0), "SRRCTL"},
485 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
486 {IXGBE_RDLEN(0), "RDLEN"},
487 {IXGBE_RDH(0), "RDH"},
488 {IXGBE_RDT(0), "RDT"},
489 {IXGBE_RXDCTL(0), "RXDCTL"},
490 {IXGBE_RDBAL(0), "RDBAL"},
491 {IXGBE_RDBAH(0), "RDBAH"},
494 {IXGBE_TDBAL(0), "TDBAL"},
495 {IXGBE_TDBAH(0), "TDBAH"},
496 {IXGBE_TDLEN(0), "TDLEN"},
497 {IXGBE_TDH(0), "TDH"},
498 {IXGBE_TDT(0), "TDT"},
499 {IXGBE_TXDCTL(0), "TXDCTL"},
501 /* List Terminator */
507 * ixgbe_regdump - register printout routine
509 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
515 switch (reginfo->ofs) {
516 case IXGBE_SRRCTL(0):
517 for (i = 0; i < 64; i++)
518 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
520 case IXGBE_DCA_RXCTRL(0):
521 for (i = 0; i < 64; i++)
522 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
525 for (i = 0; i < 64; i++)
526 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
529 for (i = 0; i < 64; i++)
530 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
533 for (i = 0; i < 64; i++)
534 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
536 case IXGBE_RXDCTL(0):
537 for (i = 0; i < 64; i++)
538 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
541 for (i = 0; i < 64; i++)
542 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
545 for (i = 0; i < 64; i++)
546 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
549 for (i = 0; i < 64; i++)
550 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
553 for (i = 0; i < 64; i++)
554 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
557 for (i = 0; i < 64; i++)
558 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
561 for (i = 0; i < 64; i++)
562 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
565 for (i = 0; i < 64; i++)
566 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
568 case IXGBE_TXDCTL(0):
569 for (i = 0; i < 64; i++)
570 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
573 pr_info("%-15s %08x\n", reginfo->name,
574 IXGBE_READ_REG(hw, reginfo->ofs));
578 for (i = 0; i < 8; i++) {
579 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
580 pr_err("%-15s", rname);
581 for (j = 0; j < 8; j++)
582 pr_cont(" %08x", regs[i*8+j]);
589 * ixgbe_dump - Print registers, tx-rings and rx-rings
591 static void ixgbe_dump(struct ixgbe_adapter *adapter)
593 struct net_device *netdev = adapter->netdev;
594 struct ixgbe_hw *hw = &adapter->hw;
595 struct ixgbe_reg_info *reginfo;
597 struct ixgbe_ring *tx_ring;
598 struct ixgbe_tx_buffer *tx_buffer;
599 union ixgbe_adv_tx_desc *tx_desc;
600 struct my_u0 { u64 a; u64 b; } *u0;
601 struct ixgbe_ring *rx_ring;
602 union ixgbe_adv_rx_desc *rx_desc;
603 struct ixgbe_rx_buffer *rx_buffer_info;
607 if (!netif_msg_hw(adapter))
610 /* Print netdevice Info */
612 dev_info(&adapter->pdev->dev, "Net device Info\n");
613 pr_info("Device Name state "
614 "trans_start last_rx\n");
615 pr_info("%-15s %016lX %016lX %016lX\n",
618 dev_trans_start(netdev),
622 /* Print Registers */
623 dev_info(&adapter->pdev->dev, "Register Dump\n");
624 pr_info(" Register Name Value\n");
625 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
626 reginfo->name; reginfo++) {
627 ixgbe_regdump(hw, reginfo);
630 /* Print TX Ring Summary */
631 if (!netdev || !netif_running(netdev))
634 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
635 pr_info(" %s %s %s %s\n",
636 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
637 "leng", "ntw", "timestamp");
638 for (n = 0; n < adapter->num_tx_queues; n++) {
639 tx_ring = adapter->tx_ring[n];
640 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
641 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
642 n, tx_ring->next_to_use, tx_ring->next_to_clean,
643 (u64)dma_unmap_addr(tx_buffer, dma),
644 dma_unmap_len(tx_buffer, len),
645 tx_buffer->next_to_watch,
646 (u64)tx_buffer->time_stamp);
650 if (!netif_msg_tx_done(adapter))
651 goto rx_ring_summary;
653 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
655 /* Transmit Descriptor Formats
657 * 82598 Advanced Transmit Descriptor
658 * +--------------------------------------------------------------+
659 * 0 | Buffer Address [63:0] |
660 * +--------------------------------------------------------------+
661 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
662 * +--------------------------------------------------------------+
663 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
665 * 82598 Advanced Transmit Descriptor (Write-Back Format)
666 * +--------------------------------------------------------------+
668 * +--------------------------------------------------------------+
669 * 8 | RSV | STA | NXTSEQ |
670 * +--------------------------------------------------------------+
673 * 82599+ Advanced Transmit Descriptor
674 * +--------------------------------------------------------------+
675 * 0 | Buffer Address [63:0] |
676 * +--------------------------------------------------------------+
677 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
678 * +--------------------------------------------------------------+
679 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
681 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
682 * +--------------------------------------------------------------+
684 * +--------------------------------------------------------------+
685 * 8 | RSV | STA | RSV |
686 * +--------------------------------------------------------------+
690 for (n = 0; n < adapter->num_tx_queues; n++) {
691 tx_ring = adapter->tx_ring[n];
692 pr_info("------------------------------------\n");
693 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
694 pr_info("------------------------------------\n");
695 pr_info("%s%s %s %s %s %s\n",
696 "T [desc] [address 63:0 ] ",
697 "[PlPOIdStDDt Ln] [bi->dma ] ",
698 "leng", "ntw", "timestamp", "bi->skb");
700 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
701 tx_desc = IXGBE_TX_DESC(tx_ring, i);
702 tx_buffer = &tx_ring->tx_buffer_info[i];
703 u0 = (struct my_u0 *)tx_desc;
704 if (dma_unmap_len(tx_buffer, len) > 0) {
705 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
709 (u64)dma_unmap_addr(tx_buffer, dma),
710 dma_unmap_len(tx_buffer, len),
711 tx_buffer->next_to_watch,
712 (u64)tx_buffer->time_stamp,
714 if (i == tx_ring->next_to_use &&
715 i == tx_ring->next_to_clean)
717 else if (i == tx_ring->next_to_use)
719 else if (i == tx_ring->next_to_clean)
724 if (netif_msg_pktdata(adapter) &&
726 print_hex_dump(KERN_INFO, "",
727 DUMP_PREFIX_ADDRESS, 16, 1,
728 tx_buffer->skb->data,
729 dma_unmap_len(tx_buffer, len),
735 /* Print RX Rings Summary */
737 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
738 pr_info("Queue [NTU] [NTC]\n");
739 for (n = 0; n < adapter->num_rx_queues; n++) {
740 rx_ring = adapter->rx_ring[n];
741 pr_info("%5d %5X %5X\n",
742 n, rx_ring->next_to_use, rx_ring->next_to_clean);
746 if (!netif_msg_rx_status(adapter))
749 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
751 /* Receive Descriptor Formats
753 * 82598 Advanced Receive Descriptor (Read) Format
755 * +-----------------------------------------------------+
756 * 0 | Packet Buffer Address [63:1] |A0/NSE|
757 * +----------------------------------------------+------+
758 * 8 | Header Buffer Address [63:1] | DD |
759 * +-----------------------------------------------------+
762 * 82598 Advanced Receive Descriptor (Write-Back) Format
764 * 63 48 47 32 31 30 21 20 16 15 4 3 0
765 * +------------------------------------------------------+
766 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
767 * | Packet | IP | | | | Type | Type |
768 * | Checksum | Ident | | | | | |
769 * +------------------------------------------------------+
770 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
771 * +------------------------------------------------------+
772 * 63 48 47 32 31 20 19 0
774 * 82599+ Advanced Receive Descriptor (Read) Format
776 * +-----------------------------------------------------+
777 * 0 | Packet Buffer Address [63:1] |A0/NSE|
778 * +----------------------------------------------+------+
779 * 8 | Header Buffer Address [63:1] | DD |
780 * +-----------------------------------------------------+
783 * 82599+ Advanced Receive Descriptor (Write-Back) Format
785 * 63 48 47 32 31 30 21 20 17 16 4 3 0
786 * +------------------------------------------------------+
787 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
788 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
789 * |/ Flow Dir Flt ID | | | | | |
790 * +------------------------------------------------------+
791 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
792 * +------------------------------------------------------+
793 * 63 48 47 32 31 20 19 0
796 for (n = 0; n < adapter->num_rx_queues; n++) {
797 rx_ring = adapter->rx_ring[n];
798 pr_info("------------------------------------\n");
799 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
800 pr_info("------------------------------------\n");
802 "R [desc] [ PktBuf A0] ",
803 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
804 "<-- Adv Rx Read format\n");
806 "RWB[desc] [PcsmIpSHl PtRs] ",
807 "[vl er S cks ln] ---------------- [bi->skb ] ",
808 "<-- Adv Rx Write-Back format\n");
810 for (i = 0; i < rx_ring->count; i++) {
811 rx_buffer_info = &rx_ring->rx_buffer_info[i];
812 rx_desc = IXGBE_RX_DESC(rx_ring, i);
813 u0 = (struct my_u0 *)rx_desc;
814 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
815 if (staterr & IXGBE_RXD_STAT_DD) {
816 /* Descriptor Done */
817 pr_info("RWB[0x%03X] %016llX "
818 "%016llX ---------------- %p", i,
821 rx_buffer_info->skb);
823 pr_info("R [0x%03X] %016llX "
824 "%016llX %016llX %p", i,
827 (u64)rx_buffer_info->dma,
828 rx_buffer_info->skb);
830 if (netif_msg_pktdata(adapter) &&
831 rx_buffer_info->dma) {
832 print_hex_dump(KERN_INFO, "",
833 DUMP_PREFIX_ADDRESS, 16, 1,
834 page_address(rx_buffer_info->page) +
835 rx_buffer_info->page_offset,
836 ixgbe_rx_bufsz(rx_ring), true);
840 if (i == rx_ring->next_to_use)
842 else if (i == rx_ring->next_to_clean)
851 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
855 /* Let firmware take over control of h/w */
856 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
857 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
858 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
861 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
865 /* Let firmware know the driver has taken over */
866 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
867 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
868 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
872 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
873 * @adapter: pointer to adapter struct
874 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
875 * @queue: queue to map the corresponding interrupt to
876 * @msix_vector: the vector to map to the corresponding queue
879 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
880 u8 queue, u8 msix_vector)
883 struct ixgbe_hw *hw = &adapter->hw;
884 switch (hw->mac.type) {
885 case ixgbe_mac_82598EB:
886 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
889 index = (((direction * 64) + queue) >> 2) & 0x1F;
890 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
891 ivar &= ~(0xFF << (8 * (queue & 0x3)));
892 ivar |= (msix_vector << (8 * (queue & 0x3)));
893 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
895 case ixgbe_mac_82599EB:
898 case ixgbe_mac_X550EM_x:
899 case ixgbe_mac_x550em_a:
900 if (direction == -1) {
902 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
903 index = ((queue & 1) * 8);
904 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
905 ivar &= ~(0xFF << index);
906 ivar |= (msix_vector << index);
907 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
910 /* tx or rx causes */
911 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
912 index = ((16 * (queue & 1)) + (8 * direction));
913 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
914 ivar &= ~(0xFF << index);
915 ivar |= (msix_vector << index);
916 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
924 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
929 switch (adapter->hw.mac.type) {
930 case ixgbe_mac_82598EB:
931 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
932 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
934 case ixgbe_mac_82599EB:
937 case ixgbe_mac_X550EM_x:
938 case ixgbe_mac_x550em_a:
939 mask = (qmask & 0xFFFFFFFF);
940 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
941 mask = (qmask >> 32);
942 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
949 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
950 struct ixgbe_tx_buffer *tx_buffer)
952 if (tx_buffer->skb) {
953 dev_kfree_skb_any(tx_buffer->skb);
954 if (dma_unmap_len(tx_buffer, len))
955 dma_unmap_single(ring->dev,
956 dma_unmap_addr(tx_buffer, dma),
957 dma_unmap_len(tx_buffer, len),
959 } else if (dma_unmap_len(tx_buffer, len)) {
960 dma_unmap_page(ring->dev,
961 dma_unmap_addr(tx_buffer, dma),
962 dma_unmap_len(tx_buffer, len),
965 tx_buffer->next_to_watch = NULL;
966 tx_buffer->skb = NULL;
967 dma_unmap_len_set(tx_buffer, len, 0);
968 /* tx_buffer must be completely set up in the transmit path */
971 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
973 struct ixgbe_hw *hw = &adapter->hw;
974 struct ixgbe_hw_stats *hwstats = &adapter->stats;
978 if ((hw->fc.current_mode != ixgbe_fc_full) &&
979 (hw->fc.current_mode != ixgbe_fc_rx_pause))
982 switch (hw->mac.type) {
983 case ixgbe_mac_82598EB:
984 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
987 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
989 hwstats->lxoffrxc += data;
991 /* refill credits (no tx hang) if we received xoff */
995 for (i = 0; i < adapter->num_tx_queues; i++)
996 clear_bit(__IXGBE_HANG_CHECK_ARMED,
997 &adapter->tx_ring[i]->state);
1000 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1002 struct ixgbe_hw *hw = &adapter->hw;
1003 struct ixgbe_hw_stats *hwstats = &adapter->stats;
1007 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1009 if (adapter->ixgbe_ieee_pfc)
1010 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1012 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1013 ixgbe_update_xoff_rx_lfc(adapter);
1017 /* update stats for each tc, only valid with PFC enabled */
1018 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1021 switch (hw->mac.type) {
1022 case ixgbe_mac_82598EB:
1023 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1026 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1028 hwstats->pxoffrxc[i] += pxoffrxc;
1029 /* Get the TC for given UP */
1030 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1031 xoff[tc] += pxoffrxc;
1034 /* disarm tx queues that have received xoff frames */
1035 for (i = 0; i < adapter->num_tx_queues; i++) {
1036 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1038 tc = tx_ring->dcb_tc;
1040 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1044 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1046 return ring->stats.packets;
1049 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1051 struct ixgbe_adapter *adapter;
1052 struct ixgbe_hw *hw;
1055 if (ring->l2_accel_priv)
1056 adapter = ring->l2_accel_priv->real_adapter;
1058 adapter = netdev_priv(ring->netdev);
1061 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1062 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1065 return (head < tail) ?
1066 tail - head : (tail + ring->count - head);
1071 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1073 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1074 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1075 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1077 clear_check_for_tx_hang(tx_ring);
1080 * Check for a hung queue, but be thorough. This verifies
1081 * that a transmit has been completed since the previous
1082 * check AND there is at least one packet pending. The
1083 * ARMED bit is set to indicate a potential hang. The
1084 * bit is cleared if a pause frame is received to remove
1085 * false hang detection due to PFC or 802.3x frames. By
1086 * requiring this to fail twice we avoid races with
1087 * pfc clearing the ARMED bit and conditions where we
1088 * run the check_tx_hang logic with a transmit completion
1089 * pending but without time to complete it yet.
1091 if (tx_done_old == tx_done && tx_pending)
1092 /* make sure it is true for two checks in a row */
1093 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1095 /* update completed stats and continue */
1096 tx_ring->tx_stats.tx_done_old = tx_done;
1097 /* reset the countdown */
1098 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1104 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1105 * @adapter: driver private struct
1107 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1110 /* Do the reset outside of interrupt context */
1111 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1112 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1113 e_warn(drv, "initiating reset due to tx timeout\n");
1114 ixgbe_service_event_schedule(adapter);
1119 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1121 static int ixgbe_tx_maxrate(struct net_device *netdev,
1122 int queue_index, u32 maxrate)
1124 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1125 struct ixgbe_hw *hw = &adapter->hw;
1126 u32 bcnrc_val = ixgbe_link_mbps(adapter);
1131 /* Calculate the rate factor values to set */
1132 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1133 bcnrc_val /= maxrate;
1135 /* clear everything but the rate factor */
1136 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1137 IXGBE_RTTBCNRC_RF_DEC_MASK;
1139 /* enable the rate scheduler */
1140 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1142 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1143 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1149 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1150 * @q_vector: structure containing interrupt and ring information
1151 * @tx_ring: tx ring to clean
1152 * @napi_budget: Used to determine if we are in netpoll
1154 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1155 struct ixgbe_ring *tx_ring, int napi_budget)
1157 struct ixgbe_adapter *adapter = q_vector->adapter;
1158 struct ixgbe_tx_buffer *tx_buffer;
1159 union ixgbe_adv_tx_desc *tx_desc;
1160 unsigned int total_bytes = 0, total_packets = 0;
1161 unsigned int budget = q_vector->tx.work_limit;
1162 unsigned int i = tx_ring->next_to_clean;
1164 if (test_bit(__IXGBE_DOWN, &adapter->state))
1167 tx_buffer = &tx_ring->tx_buffer_info[i];
1168 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1169 i -= tx_ring->count;
1172 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1174 /* if next_to_watch is not set then there is no work pending */
1178 /* prevent any other reads prior to eop_desc */
1179 read_barrier_depends();
1181 /* if DD is not set pending work has not been completed */
1182 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1185 /* clear next_to_watch to prevent false hangs */
1186 tx_buffer->next_to_watch = NULL;
1188 /* update the statistics for this packet */
1189 total_bytes += tx_buffer->bytecount;
1190 total_packets += tx_buffer->gso_segs;
1193 napi_consume_skb(tx_buffer->skb, napi_budget);
1195 /* unmap skb header data */
1196 dma_unmap_single(tx_ring->dev,
1197 dma_unmap_addr(tx_buffer, dma),
1198 dma_unmap_len(tx_buffer, len),
1201 /* clear tx_buffer data */
1202 tx_buffer->skb = NULL;
1203 dma_unmap_len_set(tx_buffer, len, 0);
1205 /* unmap remaining buffers */
1206 while (tx_desc != eop_desc) {
1211 i -= tx_ring->count;
1212 tx_buffer = tx_ring->tx_buffer_info;
1213 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1216 /* unmap any remaining paged data */
1217 if (dma_unmap_len(tx_buffer, len)) {
1218 dma_unmap_page(tx_ring->dev,
1219 dma_unmap_addr(tx_buffer, dma),
1220 dma_unmap_len(tx_buffer, len),
1222 dma_unmap_len_set(tx_buffer, len, 0);
1226 /* move us one more past the eop_desc for start of next pkt */
1231 i -= tx_ring->count;
1232 tx_buffer = tx_ring->tx_buffer_info;
1233 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1236 /* issue prefetch for next Tx descriptor */
1239 /* update budget accounting */
1241 } while (likely(budget));
1243 i += tx_ring->count;
1244 tx_ring->next_to_clean = i;
1245 u64_stats_update_begin(&tx_ring->syncp);
1246 tx_ring->stats.bytes += total_bytes;
1247 tx_ring->stats.packets += total_packets;
1248 u64_stats_update_end(&tx_ring->syncp);
1249 q_vector->tx.total_bytes += total_bytes;
1250 q_vector->tx.total_packets += total_packets;
1252 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1253 /* schedule immediate reset if we believe we hung */
1254 struct ixgbe_hw *hw = &adapter->hw;
1255 e_err(drv, "Detected Tx Unit Hang\n"
1257 " TDH, TDT <%x>, <%x>\n"
1258 " next_to_use <%x>\n"
1259 " next_to_clean <%x>\n"
1260 "tx_buffer_info[next_to_clean]\n"
1261 " time_stamp <%lx>\n"
1263 tx_ring->queue_index,
1264 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1265 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1266 tx_ring->next_to_use, i,
1267 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1269 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1272 "tx hang %d detected on queue %d, resetting adapter\n",
1273 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1275 /* schedule immediate reset if we believe we hung */
1276 ixgbe_tx_timeout_reset(adapter);
1278 /* the adapter is about to reset, no point in enabling stuff */
1282 netdev_tx_completed_queue(txring_txq(tx_ring),
1283 total_packets, total_bytes);
1285 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1286 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1287 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1288 /* Make sure that anybody stopping the queue after this
1289 * sees the new next_to_clean.
1292 if (__netif_subqueue_stopped(tx_ring->netdev,
1293 tx_ring->queue_index)
1294 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1295 netif_wake_subqueue(tx_ring->netdev,
1296 tx_ring->queue_index);
1297 ++tx_ring->tx_stats.restart_queue;
1304 #ifdef CONFIG_IXGBE_DCA
1305 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1306 struct ixgbe_ring *tx_ring,
1309 struct ixgbe_hw *hw = &adapter->hw;
1313 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1314 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1316 switch (hw->mac.type) {
1317 case ixgbe_mac_82598EB:
1318 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1320 case ixgbe_mac_82599EB:
1321 case ixgbe_mac_X540:
1322 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1323 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1326 /* for unknown hardware do not write register */
1331 * We can enable relaxed ordering for reads, but not writes when
1332 * DCA is enabled. This is due to a known issue in some chipsets
1333 * which will cause the DCA tag to be cleared.
1335 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1336 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1337 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1339 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1342 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1343 struct ixgbe_ring *rx_ring,
1346 struct ixgbe_hw *hw = &adapter->hw;
1348 u8 reg_idx = rx_ring->reg_idx;
1350 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1351 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1353 switch (hw->mac.type) {
1354 case ixgbe_mac_82599EB:
1355 case ixgbe_mac_X540:
1356 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1363 * We can enable relaxed ordering for reads, but not writes when
1364 * DCA is enabled. This is due to a known issue in some chipsets
1365 * which will cause the DCA tag to be cleared.
1367 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1368 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1369 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1371 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1374 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1376 struct ixgbe_adapter *adapter = q_vector->adapter;
1377 struct ixgbe_ring *ring;
1378 int cpu = get_cpu();
1380 if (q_vector->cpu == cpu)
1383 ixgbe_for_each_ring(ring, q_vector->tx)
1384 ixgbe_update_tx_dca(adapter, ring, cpu);
1386 ixgbe_for_each_ring(ring, q_vector->rx)
1387 ixgbe_update_rx_dca(adapter, ring, cpu);
1389 q_vector->cpu = cpu;
1394 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1398 /* always use CB2 mode, difference is masked in the CB driver */
1399 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1400 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1401 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1403 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404 IXGBE_DCA_CTRL_DCA_DISABLE);
1406 for (i = 0; i < adapter->num_q_vectors; i++) {
1407 adapter->q_vector[i]->cpu = -1;
1408 ixgbe_update_dca(adapter->q_vector[i]);
1412 static int __ixgbe_notify_dca(struct device *dev, void *data)
1414 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1415 unsigned long event = *(unsigned long *)data;
1417 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1421 case DCA_PROVIDER_ADD:
1422 /* if we're already enabled, don't do it again */
1423 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1425 if (dca_add_requester(dev) == 0) {
1426 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1431 /* Fall Through since DCA is disabled. */
1432 case DCA_PROVIDER_REMOVE:
1433 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1434 dca_remove_requester(dev);
1435 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1436 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1437 IXGBE_DCA_CTRL_DCA_DISABLE);
1445 #endif /* CONFIG_IXGBE_DCA */
1447 #define IXGBE_RSS_L4_TYPES_MASK \
1448 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1449 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1450 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1451 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1453 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1454 union ixgbe_adv_rx_desc *rx_desc,
1455 struct sk_buff *skb)
1459 if (!(ring->netdev->features & NETIF_F_RXHASH))
1462 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1463 IXGBE_RXDADV_RSSTYPE_MASK;
1468 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1469 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1470 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1475 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1476 * @ring: structure containing ring specific data
1477 * @rx_desc: advanced rx descriptor
1479 * Returns : true if it is FCoE pkt
1481 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1482 union ixgbe_adv_rx_desc *rx_desc)
1484 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1486 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1487 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1488 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1489 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1492 #endif /* IXGBE_FCOE */
1494 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1495 * @ring: structure containing ring specific data
1496 * @rx_desc: current Rx descriptor being processed
1497 * @skb: skb currently being received and modified
1499 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1500 union ixgbe_adv_rx_desc *rx_desc,
1501 struct sk_buff *skb)
1503 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1504 bool encap_pkt = false;
1506 skb_checksum_none_assert(skb);
1508 /* Rx csum disabled */
1509 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1512 /* check for VXLAN and Geneve packets */
1513 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1515 skb->encapsulation = 1;
1518 /* if IP and error */
1519 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1520 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1521 ring->rx_stats.csum_err++;
1525 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1528 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1530 * 82599 errata, UDP frames with a 0 checksum can be marked as
1533 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1534 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1537 ring->rx_stats.csum_err++;
1541 /* It must be a TCP or UDP packet with a valid checksum */
1542 skb->ip_summed = CHECKSUM_UNNECESSARY;
1544 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1547 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1548 skb->ip_summed = CHECKSUM_NONE;
1551 /* If we checked the outer header let the stack know */
1552 skb->csum_level = 1;
1556 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1557 struct ixgbe_rx_buffer *bi)
1559 struct page *page = bi->page;
1562 /* since we are recycling buffers we should seldom need to alloc */
1566 /* alloc new page for storage */
1567 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1568 if (unlikely(!page)) {
1569 rx_ring->rx_stats.alloc_rx_page_failed++;
1573 /* map page for use */
1574 dma = dma_map_page(rx_ring->dev, page, 0,
1575 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1578 * if mapping failed free memory back to system since
1579 * there isn't much point in holding memory we can't use
1581 if (dma_mapping_error(rx_ring->dev, dma)) {
1582 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1584 rx_ring->rx_stats.alloc_rx_page_failed++;
1590 bi->page_offset = 0;
1596 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1597 * @rx_ring: ring to place buffers on
1598 * @cleaned_count: number of buffers to replace
1600 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1602 union ixgbe_adv_rx_desc *rx_desc;
1603 struct ixgbe_rx_buffer *bi;
1604 u16 i = rx_ring->next_to_use;
1610 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1611 bi = &rx_ring->rx_buffer_info[i];
1612 i -= rx_ring->count;
1615 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1619 * Refresh the desc even if buffer_addrs didn't change
1620 * because each write-back erases this info.
1622 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1628 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1629 bi = rx_ring->rx_buffer_info;
1630 i -= rx_ring->count;
1633 /* clear the status bits for the next_to_use descriptor */
1634 rx_desc->wb.upper.status_error = 0;
1637 } while (cleaned_count);
1639 i += rx_ring->count;
1641 if (rx_ring->next_to_use != i) {
1642 rx_ring->next_to_use = i;
1644 /* update next to alloc since we have filled the ring */
1645 rx_ring->next_to_alloc = i;
1647 /* Force memory writes to complete before letting h/w
1648 * know there are new descriptors to fetch. (Only
1649 * applicable for weak-ordered memory model archs,
1653 writel(i, rx_ring->tail);
1657 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1658 struct sk_buff *skb)
1660 u16 hdr_len = skb_headlen(skb);
1662 /* set gso_size to avoid messing up TCP MSS */
1663 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1664 IXGBE_CB(skb)->append_cnt);
1665 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1668 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1669 struct sk_buff *skb)
1671 /* if append_cnt is 0 then frame is not RSC */
1672 if (!IXGBE_CB(skb)->append_cnt)
1675 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1676 rx_ring->rx_stats.rsc_flush++;
1678 ixgbe_set_rsc_gso_size(rx_ring, skb);
1680 /* gso_size is computed using append_cnt so always clear it last */
1681 IXGBE_CB(skb)->append_cnt = 0;
1685 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1686 * @rx_ring: rx descriptor ring packet is being transacted on
1687 * @rx_desc: pointer to the EOP Rx descriptor
1688 * @skb: pointer to current skb being populated
1690 * This function checks the ring, descriptor, and packet information in
1691 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1692 * other fields within the skb.
1694 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1695 union ixgbe_adv_rx_desc *rx_desc,
1696 struct sk_buff *skb)
1698 struct net_device *dev = rx_ring->netdev;
1699 u32 flags = rx_ring->q_vector->adapter->flags;
1701 ixgbe_update_rsc_stats(rx_ring, skb);
1703 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1705 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1707 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1708 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1710 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1711 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1712 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1713 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1716 skb_record_rx_queue(skb, rx_ring->queue_index);
1718 skb->protocol = eth_type_trans(skb, dev);
1721 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1722 struct sk_buff *skb)
1724 skb_mark_napi_id(skb, &q_vector->napi);
1725 if (ixgbe_qv_busy_polling(q_vector))
1726 netif_receive_skb(skb);
1728 napi_gro_receive(&q_vector->napi, skb);
1732 * ixgbe_is_non_eop - process handling of non-EOP buffers
1733 * @rx_ring: Rx ring being processed
1734 * @rx_desc: Rx descriptor for current buffer
1735 * @skb: Current socket buffer containing buffer in progress
1737 * This function updates next to clean. If the buffer is an EOP buffer
1738 * this function exits returning false, otherwise it will place the
1739 * sk_buff in the next buffer to be chained and return true indicating
1740 * that this is in fact a non-EOP buffer.
1742 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1743 union ixgbe_adv_rx_desc *rx_desc,
1744 struct sk_buff *skb)
1746 u32 ntc = rx_ring->next_to_clean + 1;
1748 /* fetch, update, and store next to clean */
1749 ntc = (ntc < rx_ring->count) ? ntc : 0;
1750 rx_ring->next_to_clean = ntc;
1752 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1754 /* update RSC append count if present */
1755 if (ring_is_rsc_enabled(rx_ring)) {
1756 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1757 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1759 if (unlikely(rsc_enabled)) {
1760 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1762 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1763 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1765 /* update ntc based on RSC value */
1766 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1767 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1768 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1772 /* if we are the last buffer then there is nothing else to do */
1773 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1776 /* place skb in next buffer to be received */
1777 rx_ring->rx_buffer_info[ntc].skb = skb;
1778 rx_ring->rx_stats.non_eop_descs++;
1784 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1785 * @rx_ring: rx descriptor ring packet is being transacted on
1786 * @skb: pointer to current skb being adjusted
1788 * This function is an ixgbe specific version of __pskb_pull_tail. The
1789 * main difference between this version and the original function is that
1790 * this function can make several assumptions about the state of things
1791 * that allow for significant optimizations versus the standard function.
1792 * As a result we can do things like drop a frag and maintain an accurate
1793 * truesize for the skb.
1795 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1796 struct sk_buff *skb)
1798 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1800 unsigned int pull_len;
1803 * it is valid to use page_address instead of kmap since we are
1804 * working with pages allocated out of the lomem pool per
1805 * alloc_page(GFP_ATOMIC)
1807 va = skb_frag_address(frag);
1810 * we need the header to contain the greater of either ETH_HLEN or
1811 * 60 bytes if the skb->len is less than 60 for skb_pad.
1813 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1815 /* align pull length to size of long to optimize memcpy performance */
1816 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1818 /* update all of the pointers */
1819 skb_frag_size_sub(frag, pull_len);
1820 frag->page_offset += pull_len;
1821 skb->data_len -= pull_len;
1822 skb->tail += pull_len;
1826 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1827 * @rx_ring: rx descriptor ring packet is being transacted on
1828 * @skb: pointer to current skb being updated
1830 * This function provides a basic DMA sync up for the first fragment of an
1831 * skb. The reason for doing this is that the first fragment cannot be
1832 * unmapped until we have reached the end of packet descriptor for a buffer
1835 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1836 struct sk_buff *skb)
1838 /* if the page was released unmap it, else just sync our portion */
1839 if (unlikely(IXGBE_CB(skb)->page_released)) {
1840 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1841 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1842 IXGBE_CB(skb)->page_released = false;
1844 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1846 dma_sync_single_range_for_cpu(rx_ring->dev,
1849 ixgbe_rx_bufsz(rx_ring),
1852 IXGBE_CB(skb)->dma = 0;
1856 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1857 * @rx_ring: rx descriptor ring packet is being transacted on
1858 * @rx_desc: pointer to the EOP Rx descriptor
1859 * @skb: pointer to current skb being fixed
1861 * Check for corrupted packet headers caused by senders on the local L2
1862 * embedded NIC switch not setting up their Tx Descriptors right. These
1863 * should be very rare.
1865 * Also address the case where we are pulling data in on pages only
1866 * and as such no data is present in the skb header.
1868 * In addition if skb is not at least 60 bytes we need to pad it so that
1869 * it is large enough to qualify as a valid Ethernet frame.
1871 * Returns true if an error was encountered and skb was freed.
1873 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1874 union ixgbe_adv_rx_desc *rx_desc,
1875 struct sk_buff *skb)
1877 struct net_device *netdev = rx_ring->netdev;
1879 /* verify that the packet does not have any known errors */
1880 if (unlikely(ixgbe_test_staterr(rx_desc,
1881 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1882 !(netdev->features & NETIF_F_RXALL))) {
1883 dev_kfree_skb_any(skb);
1887 /* place header in linear portion of buffer */
1888 if (skb_is_nonlinear(skb))
1889 ixgbe_pull_tail(rx_ring, skb);
1892 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1893 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1897 /* if eth_skb_pad returns an error the skb was freed */
1898 if (eth_skb_pad(skb))
1905 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1906 * @rx_ring: rx descriptor ring to store buffers on
1907 * @old_buff: donor buffer to have page reused
1909 * Synchronizes page for reuse by the adapter
1911 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1912 struct ixgbe_rx_buffer *old_buff)
1914 struct ixgbe_rx_buffer *new_buff;
1915 u16 nta = rx_ring->next_to_alloc;
1917 new_buff = &rx_ring->rx_buffer_info[nta];
1919 /* update, and store next to alloc */
1921 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1923 /* transfer page from old buffer to new buffer */
1924 *new_buff = *old_buff;
1926 /* sync the buffer for use by the device */
1927 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1928 new_buff->page_offset,
1929 ixgbe_rx_bufsz(rx_ring),
1933 static inline bool ixgbe_page_is_reserved(struct page *page)
1935 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1939 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1940 * @rx_ring: rx descriptor ring to transact packets on
1941 * @rx_buffer: buffer containing page to add
1942 * @rx_desc: descriptor containing length of buffer written by hardware
1943 * @skb: sk_buff to place the data into
1945 * This function will add the data contained in rx_buffer->page to the skb.
1946 * This is done either through a direct copy if the data in the buffer is
1947 * less than the skb header size, otherwise it will just attach the page as
1948 * a frag to the skb.
1950 * The function will then update the page offset if necessary and return
1951 * true if the buffer can be reused by the adapter.
1953 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1954 struct ixgbe_rx_buffer *rx_buffer,
1955 union ixgbe_adv_rx_desc *rx_desc,
1956 struct sk_buff *skb)
1958 struct page *page = rx_buffer->page;
1959 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1960 #if (PAGE_SIZE < 8192)
1961 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1963 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1964 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1965 ixgbe_rx_bufsz(rx_ring);
1968 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1969 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1971 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1973 /* page is not reserved, we can reuse buffer as-is */
1974 if (likely(!ixgbe_page_is_reserved(page)))
1977 /* this page cannot be reused so discard it */
1978 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1982 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1983 rx_buffer->page_offset, size, truesize);
1985 /* avoid re-using remote pages */
1986 if (unlikely(ixgbe_page_is_reserved(page)))
1989 #if (PAGE_SIZE < 8192)
1990 /* if we are only owner of page we can reuse it */
1991 if (unlikely(page_count(page) != 1))
1994 /* flip page offset to other buffer */
1995 rx_buffer->page_offset ^= truesize;
1997 /* move offset up to the next cache line */
1998 rx_buffer->page_offset += truesize;
2000 if (rx_buffer->page_offset > last_offset)
2004 /* Even if we own the page, we are not allowed to use atomic_set()
2005 * This would break get_page_unless_zero() users.
2012 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2013 union ixgbe_adv_rx_desc *rx_desc)
2015 struct ixgbe_rx_buffer *rx_buffer;
2016 struct sk_buff *skb;
2019 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2020 page = rx_buffer->page;
2023 skb = rx_buffer->skb;
2026 void *page_addr = page_address(page) +
2027 rx_buffer->page_offset;
2029 /* prefetch first cache line of first page */
2030 prefetch(page_addr);
2031 #if L1_CACHE_BYTES < 128
2032 prefetch(page_addr + L1_CACHE_BYTES);
2035 /* allocate a skb to store the frags */
2036 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2038 if (unlikely(!skb)) {
2039 rx_ring->rx_stats.alloc_rx_buff_failed++;
2044 * we will be copying header into skb->data in
2045 * pskb_may_pull so it is in our interest to prefetch
2046 * it now to avoid a possible cache miss
2048 prefetchw(skb->data);
2051 * Delay unmapping of the first packet. It carries the
2052 * header information, HW may still access the header
2053 * after the writeback. Only unmap it when EOP is
2056 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2059 IXGBE_CB(skb)->dma = rx_buffer->dma;
2061 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2062 ixgbe_dma_sync_frag(rx_ring, skb);
2065 /* we are reusing so sync this buffer for CPU use */
2066 dma_sync_single_range_for_cpu(rx_ring->dev,
2068 rx_buffer->page_offset,
2069 ixgbe_rx_bufsz(rx_ring),
2072 rx_buffer->skb = NULL;
2075 /* pull page into skb */
2076 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2077 /* hand second half of page back to the ring */
2078 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2079 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2080 /* the page has been released from the ring */
2081 IXGBE_CB(skb)->page_released = true;
2083 /* we are not reusing the buffer so unmap it */
2084 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2085 ixgbe_rx_pg_size(rx_ring),
2089 /* clear contents of buffer_info */
2090 rx_buffer->page = NULL;
2096 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2097 * @q_vector: structure containing interrupt and ring information
2098 * @rx_ring: rx descriptor ring to transact packets on
2099 * @budget: Total limit on number of packets to process
2101 * This function provides a "bounce buffer" approach to Rx interrupt
2102 * processing. The advantage to this is that on systems that have
2103 * expensive overhead for IOMMU access this provides a means of avoiding
2104 * it by maintaining the mapping of the page to the syste.
2106 * Returns amount of work completed
2108 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2109 struct ixgbe_ring *rx_ring,
2112 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2114 struct ixgbe_adapter *adapter = q_vector->adapter;
2116 unsigned int mss = 0;
2117 #endif /* IXGBE_FCOE */
2118 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2120 while (likely(total_rx_packets < budget)) {
2121 union ixgbe_adv_rx_desc *rx_desc;
2122 struct sk_buff *skb;
2124 /* return some buffers to hardware, one at a time is too slow */
2125 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2126 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2130 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2132 if (!rx_desc->wb.upper.status_error)
2135 /* This memory barrier is needed to keep us from reading
2136 * any other fields out of the rx_desc until we know the
2137 * descriptor has been written back
2141 /* retrieve a buffer from the ring */
2142 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2144 /* exit if we failed to retrieve a buffer */
2150 /* place incomplete frames back on ring for completion */
2151 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2154 /* verify the packet layout is correct */
2155 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2158 /* probably a little skewed due to removing CRC */
2159 total_rx_bytes += skb->len;
2161 /* populate checksum, timestamp, VLAN, and protocol */
2162 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2165 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2166 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2167 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2168 /* include DDPed FCoE data */
2169 if (ddp_bytes > 0) {
2171 mss = rx_ring->netdev->mtu -
2172 sizeof(struct fcoe_hdr) -
2173 sizeof(struct fc_frame_header) -
2174 sizeof(struct fcoe_crc_eof);
2178 total_rx_bytes += ddp_bytes;
2179 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2183 dev_kfree_skb_any(skb);
2188 #endif /* IXGBE_FCOE */
2189 ixgbe_rx_skb(q_vector, skb);
2191 /* update budget accounting */
2195 u64_stats_update_begin(&rx_ring->syncp);
2196 rx_ring->stats.packets += total_rx_packets;
2197 rx_ring->stats.bytes += total_rx_bytes;
2198 u64_stats_update_end(&rx_ring->syncp);
2199 q_vector->rx.total_packets += total_rx_packets;
2200 q_vector->rx.total_bytes += total_rx_bytes;
2202 return total_rx_packets;
2205 #ifdef CONFIG_NET_RX_BUSY_POLL
2206 /* must be called with local_bh_disable()d */
2207 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2209 struct ixgbe_q_vector *q_vector =
2210 container_of(napi, struct ixgbe_q_vector, napi);
2211 struct ixgbe_adapter *adapter = q_vector->adapter;
2212 struct ixgbe_ring *ring;
2215 if (test_bit(__IXGBE_DOWN, &adapter->state))
2216 return LL_FLUSH_FAILED;
2218 if (!ixgbe_qv_lock_poll(q_vector))
2219 return LL_FLUSH_BUSY;
2221 ixgbe_for_each_ring(ring, q_vector->rx) {
2222 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2223 #ifdef BP_EXTENDED_STATS
2225 ring->stats.cleaned += found;
2227 ring->stats.misses++;
2233 ixgbe_qv_unlock_poll(q_vector);
2237 #endif /* CONFIG_NET_RX_BUSY_POLL */
2240 * ixgbe_configure_msix - Configure MSI-X hardware
2241 * @adapter: board private structure
2243 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2246 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2248 struct ixgbe_q_vector *q_vector;
2252 /* Populate MSIX to EITR Select */
2253 if (adapter->num_vfs > 32) {
2254 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2255 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2259 * Populate the IVAR table and set the ITR values to the
2260 * corresponding register.
2262 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2263 struct ixgbe_ring *ring;
2264 q_vector = adapter->q_vector[v_idx];
2266 ixgbe_for_each_ring(ring, q_vector->rx)
2267 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2269 ixgbe_for_each_ring(ring, q_vector->tx)
2270 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2272 ixgbe_write_eitr(q_vector);
2275 switch (adapter->hw.mac.type) {
2276 case ixgbe_mac_82598EB:
2277 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2280 case ixgbe_mac_82599EB:
2281 case ixgbe_mac_X540:
2282 case ixgbe_mac_X550:
2283 case ixgbe_mac_X550EM_x:
2284 case ixgbe_mac_x550em_a:
2285 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2290 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2292 /* set up to autoclear timer, and the vectors */
2293 mask = IXGBE_EIMS_ENABLE_MASK;
2294 mask &= ~(IXGBE_EIMS_OTHER |
2295 IXGBE_EIMS_MAILBOX |
2298 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2301 enum latency_range {
2305 latency_invalid = 255
2309 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2310 * @q_vector: structure containing interrupt and ring information
2311 * @ring_container: structure containing ring performance data
2313 * Stores a new ITR value based on packets and byte
2314 * counts during the last interrupt. The advantage of per interrupt
2315 * computation is faster updates and more accurate ITR for the current
2316 * traffic pattern. Constants in this function were computed
2317 * based on theoretical maximum wire speed and thresholds were set based
2318 * on testing data as well as attempting to minimize response time
2319 * while increasing bulk throughput.
2320 * this functionality is controlled by the InterruptThrottleRate module
2321 * parameter (see ixgbe_param.c)
2323 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2324 struct ixgbe_ring_container *ring_container)
2326 int bytes = ring_container->total_bytes;
2327 int packets = ring_container->total_packets;
2330 u8 itr_setting = ring_container->itr;
2335 /* simple throttlerate management
2336 * 0-10MB/s lowest (100000 ints/s)
2337 * 10-20MB/s low (20000 ints/s)
2338 * 20-1249MB/s bulk (12000 ints/s)
2340 /* what was last interrupt timeslice? */
2341 timepassed_us = q_vector->itr >> 2;
2342 if (timepassed_us == 0)
2345 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2347 switch (itr_setting) {
2348 case lowest_latency:
2349 if (bytes_perint > 10)
2350 itr_setting = low_latency;
2353 if (bytes_perint > 20)
2354 itr_setting = bulk_latency;
2355 else if (bytes_perint <= 10)
2356 itr_setting = lowest_latency;
2359 if (bytes_perint <= 20)
2360 itr_setting = low_latency;
2364 /* clear work counters since we have the values we need */
2365 ring_container->total_bytes = 0;
2366 ring_container->total_packets = 0;
2368 /* write updated itr to ring container */
2369 ring_container->itr = itr_setting;
2373 * ixgbe_write_eitr - write EITR register in hardware specific way
2374 * @q_vector: structure containing interrupt and ring information
2376 * This function is made to be called by ethtool and by the driver
2377 * when it needs to update EITR registers at runtime. Hardware
2378 * specific quirks/differences are taken care of here.
2380 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2382 struct ixgbe_adapter *adapter = q_vector->adapter;
2383 struct ixgbe_hw *hw = &adapter->hw;
2384 int v_idx = q_vector->v_idx;
2385 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2387 switch (adapter->hw.mac.type) {
2388 case ixgbe_mac_82598EB:
2389 /* must write high and low 16 bits to reset counter */
2390 itr_reg |= (itr_reg << 16);
2392 case ixgbe_mac_82599EB:
2393 case ixgbe_mac_X540:
2394 case ixgbe_mac_X550:
2395 case ixgbe_mac_X550EM_x:
2396 case ixgbe_mac_x550em_a:
2398 * set the WDIS bit to not clear the timer bits and cause an
2399 * immediate assertion of the interrupt
2401 itr_reg |= IXGBE_EITR_CNT_WDIS;
2406 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2409 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2411 u32 new_itr = q_vector->itr;
2414 ixgbe_update_itr(q_vector, &q_vector->tx);
2415 ixgbe_update_itr(q_vector, &q_vector->rx);
2417 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2419 switch (current_itr) {
2420 /* counts and packets in update_itr are dependent on these numbers */
2421 case lowest_latency:
2422 new_itr = IXGBE_100K_ITR;
2425 new_itr = IXGBE_20K_ITR;
2428 new_itr = IXGBE_12K_ITR;
2434 if (new_itr != q_vector->itr) {
2435 /* do an exponential smoothing */
2436 new_itr = (10 * new_itr * q_vector->itr) /
2437 ((9 * new_itr) + q_vector->itr);
2439 /* save the algorithm value here */
2440 q_vector->itr = new_itr;
2442 ixgbe_write_eitr(q_vector);
2447 * ixgbe_check_overtemp_subtask - check for over temperature
2448 * @adapter: pointer to adapter
2450 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2452 struct ixgbe_hw *hw = &adapter->hw;
2453 u32 eicr = adapter->interrupt_event;
2456 if (test_bit(__IXGBE_DOWN, &adapter->state))
2459 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2460 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2463 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2465 switch (hw->device_id) {
2466 case IXGBE_DEV_ID_82599_T3_LOM:
2468 * Since the warning interrupt is for both ports
2469 * we don't have to check if:
2470 * - This interrupt wasn't for our port.
2471 * - We may have missed the interrupt so always have to
2472 * check if we got a LSC
2474 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2475 !(eicr & IXGBE_EICR_LSC))
2478 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2480 bool link_up = false;
2482 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2488 /* Check if this is not due to overtemp */
2489 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2493 case IXGBE_DEV_ID_X550EM_A_1G_T:
2494 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2495 rc = hw->phy.ops.check_overtemp(hw);
2496 if (rc != IXGBE_ERR_OVERTEMP)
2500 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2502 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2506 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2508 adapter->interrupt_event = 0;
2511 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2513 struct ixgbe_hw *hw = &adapter->hw;
2515 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2516 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2517 e_crit(probe, "Fan has stopped, replace the adapter\n");
2518 /* write to clear the interrupt */
2519 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2523 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2525 struct ixgbe_hw *hw = &adapter->hw;
2527 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2530 switch (adapter->hw.mac.type) {
2531 case ixgbe_mac_82599EB:
2533 * Need to check link state so complete overtemp check
2536 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2537 (eicr & IXGBE_EICR_LSC)) &&
2538 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2539 adapter->interrupt_event = eicr;
2540 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2541 ixgbe_service_event_schedule(adapter);
2545 case ixgbe_mac_x550em_a:
2546 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2547 adapter->interrupt_event = eicr;
2548 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2549 ixgbe_service_event_schedule(adapter);
2550 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2551 IXGBE_EICR_GPI_SDP0_X550EM_a);
2552 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2553 IXGBE_EICR_GPI_SDP0_X550EM_a);
2556 case ixgbe_mac_X550:
2557 case ixgbe_mac_X540:
2558 if (!(eicr & IXGBE_EICR_TS))
2565 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2568 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2570 switch (hw->mac.type) {
2571 case ixgbe_mac_82598EB:
2572 if (hw->phy.type == ixgbe_phy_nl)
2575 case ixgbe_mac_82599EB:
2576 case ixgbe_mac_X550EM_x:
2577 case ixgbe_mac_x550em_a:
2578 switch (hw->mac.ops.get_media_type(hw)) {
2579 case ixgbe_media_type_fiber:
2580 case ixgbe_media_type_fiber_qsfp:
2590 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2592 struct ixgbe_hw *hw = &adapter->hw;
2593 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2595 if (!ixgbe_is_sfp(hw))
2598 /* Later MAC's use different SDP */
2599 if (hw->mac.type >= ixgbe_mac_X540)
2600 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2602 if (eicr & eicr_mask) {
2603 /* Clear the interrupt */
2604 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2605 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2606 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2607 adapter->sfp_poll_time = 0;
2608 ixgbe_service_event_schedule(adapter);
2612 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2613 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2614 /* Clear the interrupt */
2615 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2616 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2617 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2618 ixgbe_service_event_schedule(adapter);
2623 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2625 struct ixgbe_hw *hw = &adapter->hw;
2628 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2629 adapter->link_check_timeout = jiffies;
2630 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2631 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2632 IXGBE_WRITE_FLUSH(hw);
2633 ixgbe_service_event_schedule(adapter);
2637 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2641 struct ixgbe_hw *hw = &adapter->hw;
2643 switch (hw->mac.type) {
2644 case ixgbe_mac_82598EB:
2645 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2646 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2648 case ixgbe_mac_82599EB:
2649 case ixgbe_mac_X540:
2650 case ixgbe_mac_X550:
2651 case ixgbe_mac_X550EM_x:
2652 case ixgbe_mac_x550em_a:
2653 mask = (qmask & 0xFFFFFFFF);
2655 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2656 mask = (qmask >> 32);
2658 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2663 /* skip the flush */
2666 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2670 struct ixgbe_hw *hw = &adapter->hw;
2672 switch (hw->mac.type) {
2673 case ixgbe_mac_82598EB:
2674 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2675 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2677 case ixgbe_mac_82599EB:
2678 case ixgbe_mac_X540:
2679 case ixgbe_mac_X550:
2680 case ixgbe_mac_X550EM_x:
2681 case ixgbe_mac_x550em_a:
2682 mask = (qmask & 0xFFFFFFFF);
2684 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2685 mask = (qmask >> 32);
2687 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2692 /* skip the flush */
2696 * ixgbe_irq_enable - Enable default interrupt generation settings
2697 * @adapter: board private structure
2699 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2702 struct ixgbe_hw *hw = &adapter->hw;
2703 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2705 /* don't reenable LSC while waiting for link */
2706 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2707 mask &= ~IXGBE_EIMS_LSC;
2709 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2710 switch (adapter->hw.mac.type) {
2711 case ixgbe_mac_82599EB:
2712 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2714 case ixgbe_mac_X540:
2715 case ixgbe_mac_X550:
2716 case ixgbe_mac_X550EM_x:
2717 case ixgbe_mac_x550em_a:
2718 mask |= IXGBE_EIMS_TS;
2723 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2724 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2725 switch (adapter->hw.mac.type) {
2726 case ixgbe_mac_82599EB:
2727 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2728 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2730 case ixgbe_mac_X540:
2731 case ixgbe_mac_X550:
2732 case ixgbe_mac_X550EM_x:
2733 case ixgbe_mac_x550em_a:
2734 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2735 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2736 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2737 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2738 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2739 mask |= IXGBE_EICR_GPI_SDP0_X540;
2740 mask |= IXGBE_EIMS_ECC;
2741 mask |= IXGBE_EIMS_MAILBOX;
2747 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2748 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2749 mask |= IXGBE_EIMS_FLOW_DIR;
2751 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2753 ixgbe_irq_enable_queues(adapter, ~0);
2755 IXGBE_WRITE_FLUSH(&adapter->hw);
2758 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2760 struct ixgbe_adapter *adapter = data;
2761 struct ixgbe_hw *hw = &adapter->hw;
2765 * Workaround for Silicon errata. Use clear-by-write instead
2766 * of clear-by-read. Reading with EICS will return the
2767 * interrupt causes without clearing, which later be done
2768 * with the write to EICR.
2770 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2772 /* The lower 16bits of the EICR register are for the queue interrupts
2773 * which should be masked here in order to not accidentally clear them if
2774 * the bits are high when ixgbe_msix_other is called. There is a race
2775 * condition otherwise which results in possible performance loss
2776 * especially if the ixgbe_msix_other interrupt is triggering
2777 * consistently (as it would when PPS is turned on for the X540 device)
2781 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2783 if (eicr & IXGBE_EICR_LSC)
2784 ixgbe_check_lsc(adapter);
2786 if (eicr & IXGBE_EICR_MAILBOX)
2787 ixgbe_msg_task(adapter);
2789 switch (hw->mac.type) {
2790 case ixgbe_mac_82599EB:
2791 case ixgbe_mac_X540:
2792 case ixgbe_mac_X550:
2793 case ixgbe_mac_X550EM_x:
2794 case ixgbe_mac_x550em_a:
2795 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2796 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2797 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2798 ixgbe_service_event_schedule(adapter);
2799 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2800 IXGBE_EICR_GPI_SDP0_X540);
2802 if (eicr & IXGBE_EICR_ECC) {
2803 e_info(link, "Received ECC Err, initiating reset\n");
2804 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2805 ixgbe_service_event_schedule(adapter);
2806 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2808 /* Handle Flow Director Full threshold interrupt */
2809 if (eicr & IXGBE_EICR_FLOW_DIR) {
2810 int reinit_count = 0;
2812 for (i = 0; i < adapter->num_tx_queues; i++) {
2813 struct ixgbe_ring *ring = adapter->tx_ring[i];
2814 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2819 /* no more flow director interrupts until after init */
2820 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2821 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2822 ixgbe_service_event_schedule(adapter);
2825 ixgbe_check_sfp_event(adapter, eicr);
2826 ixgbe_check_overtemp_event(adapter, eicr);
2832 ixgbe_check_fan_failure(adapter, eicr);
2834 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2835 ixgbe_ptp_check_pps_event(adapter);
2837 /* re-enable the original interrupt state, no lsc, no queues */
2838 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2839 ixgbe_irq_enable(adapter, false, false);
2844 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2846 struct ixgbe_q_vector *q_vector = data;
2848 /* EIAM disabled interrupts (on this vector) for us */
2850 if (q_vector->rx.ring || q_vector->tx.ring)
2851 napi_schedule_irqoff(&q_vector->napi);
2857 * ixgbe_poll - NAPI Rx polling callback
2858 * @napi: structure for representing this polling device
2859 * @budget: how many packets driver is allowed to clean
2861 * This function is used for legacy and MSI, NAPI mode
2863 int ixgbe_poll(struct napi_struct *napi, int budget)
2865 struct ixgbe_q_vector *q_vector =
2866 container_of(napi, struct ixgbe_q_vector, napi);
2867 struct ixgbe_adapter *adapter = q_vector->adapter;
2868 struct ixgbe_ring *ring;
2869 int per_ring_budget, work_done = 0;
2870 bool clean_complete = true;
2872 #ifdef CONFIG_IXGBE_DCA
2873 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2874 ixgbe_update_dca(q_vector);
2877 ixgbe_for_each_ring(ring, q_vector->tx) {
2878 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2879 clean_complete = false;
2882 /* Exit if we are called by netpoll or busy polling is active */
2883 if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2886 /* attempt to distribute budget to each queue fairly, but don't allow
2887 * the budget to go below 1 because we'll exit polling */
2888 if (q_vector->rx.count > 1)
2889 per_ring_budget = max(budget/q_vector->rx.count, 1);
2891 per_ring_budget = budget;
2893 ixgbe_for_each_ring(ring, q_vector->rx) {
2894 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2897 work_done += cleaned;
2898 if (cleaned >= per_ring_budget)
2899 clean_complete = false;
2902 ixgbe_qv_unlock_napi(q_vector);
2903 /* If all work not completed, return budget and keep polling */
2904 if (!clean_complete)
2907 /* all work done, exit the polling mode */
2908 napi_complete_done(napi, work_done);
2909 if (adapter->rx_itr_setting & 1)
2910 ixgbe_set_itr(q_vector);
2911 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2912 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2914 return min(work_done, budget - 1);
2918 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2919 * @adapter: board private structure
2921 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2922 * interrupts from the kernel.
2924 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2926 struct net_device *netdev = adapter->netdev;
2930 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2931 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2932 struct msix_entry *entry = &adapter->msix_entries[vector];
2934 if (q_vector->tx.ring && q_vector->rx.ring) {
2935 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2936 "%s-%s-%d", netdev->name, "TxRx", ri++);
2938 } else if (q_vector->rx.ring) {
2939 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2940 "%s-%s-%d", netdev->name, "rx", ri++);
2941 } else if (q_vector->tx.ring) {
2942 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2943 "%s-%s-%d", netdev->name, "tx", ti++);
2945 /* skip this unused q_vector */
2948 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2949 q_vector->name, q_vector);
2951 e_err(probe, "request_irq failed for MSIX interrupt "
2952 "Error: %d\n", err);
2953 goto free_queue_irqs;
2955 /* If Flow Director is enabled, set interrupt affinity */
2956 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2957 /* assign the mask for this irq */
2958 irq_set_affinity_hint(entry->vector,
2959 &q_vector->affinity_mask);
2963 err = request_irq(adapter->msix_entries[vector].vector,
2964 ixgbe_msix_other, 0, netdev->name, adapter);
2966 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2967 goto free_queue_irqs;
2975 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2977 free_irq(adapter->msix_entries[vector].vector,
2978 adapter->q_vector[vector]);
2980 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2981 pci_disable_msix(adapter->pdev);
2982 kfree(adapter->msix_entries);
2983 adapter->msix_entries = NULL;
2988 * ixgbe_intr - legacy mode Interrupt Handler
2989 * @irq: interrupt number
2990 * @data: pointer to a network interface device structure
2992 static irqreturn_t ixgbe_intr(int irq, void *data)
2994 struct ixgbe_adapter *adapter = data;
2995 struct ixgbe_hw *hw = &adapter->hw;
2996 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3000 * Workaround for silicon errata #26 on 82598. Mask the interrupt
3001 * before the read of EICR.
3003 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3005 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3006 * therefore no explicit interrupt disable is necessary */
3007 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3010 * shared interrupt alert!
3011 * make sure interrupts are enabled because the read will
3012 * have disabled interrupts due to EIAM
3013 * finish the workaround of silicon errata on 82598. Unmask
3014 * the interrupt that we masked before the EICR read.
3016 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3017 ixgbe_irq_enable(adapter, true, true);
3018 return IRQ_NONE; /* Not our interrupt */
3021 if (eicr & IXGBE_EICR_LSC)
3022 ixgbe_check_lsc(adapter);
3024 switch (hw->mac.type) {
3025 case ixgbe_mac_82599EB:
3026 ixgbe_check_sfp_event(adapter, eicr);
3028 case ixgbe_mac_X540:
3029 case ixgbe_mac_X550:
3030 case ixgbe_mac_X550EM_x:
3031 case ixgbe_mac_x550em_a:
3032 if (eicr & IXGBE_EICR_ECC) {
3033 e_info(link, "Received ECC Err, initiating reset\n");
3034 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3035 ixgbe_service_event_schedule(adapter);
3036 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3038 ixgbe_check_overtemp_event(adapter, eicr);
3044 ixgbe_check_fan_failure(adapter, eicr);
3045 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3046 ixgbe_ptp_check_pps_event(adapter);
3048 /* would disable interrupts here but EIAM disabled it */
3049 napi_schedule_irqoff(&q_vector->napi);
3052 * re-enable link(maybe) and non-queue interrupts, no flush.
3053 * ixgbe_poll will re-enable the queue interrupts
3055 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3056 ixgbe_irq_enable(adapter, false, false);
3062 * ixgbe_request_irq - initialize interrupts
3063 * @adapter: board private structure
3065 * Attempts to configure interrupts using the best available
3066 * capabilities of the hardware and kernel.
3068 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3070 struct net_device *netdev = adapter->netdev;
3073 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3074 err = ixgbe_request_msix_irqs(adapter);
3075 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3076 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3077 netdev->name, adapter);
3079 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3080 netdev->name, adapter);
3083 e_err(probe, "request_irq failed, Error %d\n", err);
3088 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3092 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3093 free_irq(adapter->pdev->irq, adapter);
3097 if (!adapter->msix_entries)
3100 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3101 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3102 struct msix_entry *entry = &adapter->msix_entries[vector];
3104 /* free only the irqs that were actually requested */
3105 if (!q_vector->rx.ring && !q_vector->tx.ring)
3108 /* clear the affinity_mask in the IRQ descriptor */
3109 irq_set_affinity_hint(entry->vector, NULL);
3111 free_irq(entry->vector, q_vector);
3114 free_irq(adapter->msix_entries[vector].vector, adapter);
3118 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3119 * @adapter: board private structure
3121 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3123 switch (adapter->hw.mac.type) {
3124 case ixgbe_mac_82598EB:
3125 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3127 case ixgbe_mac_82599EB:
3128 case ixgbe_mac_X540:
3129 case ixgbe_mac_X550:
3130 case ixgbe_mac_X550EM_x:
3131 case ixgbe_mac_x550em_a:
3132 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3133 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3134 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3139 IXGBE_WRITE_FLUSH(&adapter->hw);
3140 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3143 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3144 synchronize_irq(adapter->msix_entries[vector].vector);
3146 synchronize_irq(adapter->msix_entries[vector++].vector);
3148 synchronize_irq(adapter->pdev->irq);
3153 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3156 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3158 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3160 ixgbe_write_eitr(q_vector);
3162 ixgbe_set_ivar(adapter, 0, 0, 0);
3163 ixgbe_set_ivar(adapter, 1, 0, 0);
3165 e_info(hw, "Legacy interrupt IVAR setup done\n");
3169 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3170 * @adapter: board private structure
3171 * @ring: structure containing ring specific data
3173 * Configure the Tx descriptor ring after a reset.
3175 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3176 struct ixgbe_ring *ring)
3178 struct ixgbe_hw *hw = &adapter->hw;
3179 u64 tdba = ring->dma;
3181 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3182 u8 reg_idx = ring->reg_idx;
3184 /* disable queue to avoid issues while updating state */
3185 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3186 IXGBE_WRITE_FLUSH(hw);
3188 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3189 (tdba & DMA_BIT_MASK(32)));
3190 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3191 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3192 ring->count * sizeof(union ixgbe_adv_tx_desc));
3193 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3194 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3195 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3198 * set WTHRESH to encourage burst writeback, it should not be set
3199 * higher than 1 when:
3200 * - ITR is 0 as it could cause false TX hangs
3201 * - ITR is set to > 100k int/sec and BQL is enabled
3203 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3204 * to or less than the number of on chip descriptors, which is
3207 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3208 txdctl |= 1u << 16; /* WTHRESH = 1 */
3210 txdctl |= 8u << 16; /* WTHRESH = 8 */
3213 * Setting PTHRESH to 32 both improves performance
3214 * and avoids a TX hang with DFP enabled
3216 txdctl |= (1u << 8) | /* HTHRESH = 1 */
3217 32; /* PTHRESH = 32 */
3219 /* reinitialize flowdirector state */
3220 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3221 ring->atr_sample_rate = adapter->atr_sample_rate;
3222 ring->atr_count = 0;
3223 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3225 ring->atr_sample_rate = 0;
3228 /* initialize XPS */
3229 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3230 struct ixgbe_q_vector *q_vector = ring->q_vector;
3233 netif_set_xps_queue(ring->netdev,
3234 &q_vector->affinity_mask,
3238 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3241 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3243 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3244 if (hw->mac.type == ixgbe_mac_82598EB &&
3245 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3248 /* poll to verify queue is enabled */
3250 usleep_range(1000, 2000);
3251 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3252 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3254 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3257 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3259 struct ixgbe_hw *hw = &adapter->hw;
3261 u8 tcs = netdev_get_num_tc(adapter->netdev);
3263 if (hw->mac.type == ixgbe_mac_82598EB)
3266 /* disable the arbiter while setting MTQC */
3267 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3268 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3269 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3271 /* set transmit pool layout */
3272 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3273 mtqc = IXGBE_MTQC_VT_ENA;
3275 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3277 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3278 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3279 IXGBE_82599_VMDQ_4Q_MASK)
3280 mtqc |= IXGBE_MTQC_32VF;
3282 mtqc |= IXGBE_MTQC_64VF;
3285 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3287 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3289 mtqc = IXGBE_MTQC_64Q_1PB;
3292 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3294 /* Enable Security TX Buffer IFG for multiple pb */
3296 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3297 sectx |= IXGBE_SECTX_DCB;
3298 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3301 /* re-enable the arbiter */
3302 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3303 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3307 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3308 * @adapter: board private structure
3310 * Configure the Tx unit of the MAC after a reset.
3312 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3314 struct ixgbe_hw *hw = &adapter->hw;
3318 ixgbe_setup_mtqc(adapter);
3320 if (hw->mac.type != ixgbe_mac_82598EB) {
3321 /* DMATXCTL.EN must be before Tx queues are enabled */
3322 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3323 dmatxctl |= IXGBE_DMATXCTL_TE;
3324 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3327 /* Setup the HW Tx Head and Tail descriptor pointers */
3328 for (i = 0; i < adapter->num_tx_queues; i++)
3329 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3332 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3333 struct ixgbe_ring *ring)
3335 struct ixgbe_hw *hw = &adapter->hw;
3336 u8 reg_idx = ring->reg_idx;
3337 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3339 srrctl |= IXGBE_SRRCTL_DROP_EN;
3341 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3344 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3345 struct ixgbe_ring *ring)
3347 struct ixgbe_hw *hw = &adapter->hw;
3348 u8 reg_idx = ring->reg_idx;
3349 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3351 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3353 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3356 #ifdef CONFIG_IXGBE_DCB
3357 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3359 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3363 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3365 if (adapter->ixgbe_ieee_pfc)
3366 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3369 * We should set the drop enable bit if:
3372 * Number of Rx queues > 1 and flow control is disabled
3374 * This allows us to avoid head of line blocking for security
3375 * and performance reasons.
3377 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3378 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3379 for (i = 0; i < adapter->num_rx_queues; i++)
3380 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3382 for (i = 0; i < adapter->num_rx_queues; i++)
3383 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3387 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3389 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3390 struct ixgbe_ring *rx_ring)
3392 struct ixgbe_hw *hw = &adapter->hw;
3394 u8 reg_idx = rx_ring->reg_idx;
3396 if (hw->mac.type == ixgbe_mac_82598EB) {
3397 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3400 * if VMDq is not active we must program one srrctl register
3401 * per RSS queue since we have enabled RDRXCTL.MVMEN
3406 /* configure header buffer length, needed for RSC */
3407 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3409 /* configure the packet buffer length */
3410 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3412 /* configure descriptor type */
3413 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3415 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3419 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3420 * @adapter: device handle
3422 * - 82598/82599/X540: 128
3423 * - X550(non-SRIOV mode): 512
3424 * - X550(SRIOV mode): 64
3426 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3428 if (adapter->hw.mac.type < ixgbe_mac_X550)
3430 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3437 * ixgbe_store_reta - Write the RETA table to HW
3438 * @adapter: device handle
3440 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3442 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3444 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3445 struct ixgbe_hw *hw = &adapter->hw;
3448 u8 *indir_tbl = adapter->rss_indir_tbl;
3450 /* Fill out the redirection table as follows:
3451 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3453 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3454 * - X550: 8 bit wide entries containing 6 bit RSS index
3456 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3457 indices_multi = 0x11;
3459 indices_multi = 0x1;
3461 /* Write redirection table to HW */
3462 for (i = 0; i < reta_entries; i++) {
3463 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3466 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3468 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3476 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3477 * @adapter: device handle
3479 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3481 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3483 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3484 struct ixgbe_hw *hw = &adapter->hw;
3486 unsigned int pf_pool = adapter->num_vfs;
3488 /* Write redirection table to HW */
3489 for (i = 0; i < reta_entries; i++) {
3490 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3492 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3499 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3501 struct ixgbe_hw *hw = &adapter->hw;
3503 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3504 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3506 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3507 * make full use of any rings they may have. We will use the
3508 * PSRTYPE register to control how many rings we use within the PF.
3510 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3513 /* Fill out hash function seeds */
3514 for (i = 0; i < 10; i++)
3515 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3517 /* Fill out redirection table */
3518 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3520 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3524 adapter->rss_indir_tbl[i] = j;
3527 ixgbe_store_reta(adapter);
3530 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3532 struct ixgbe_hw *hw = &adapter->hw;
3533 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3534 unsigned int pf_pool = adapter->num_vfs;
3537 /* Fill out hash function seeds */
3538 for (i = 0; i < 10; i++)
3539 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3540 adapter->rss_key[i]);
3542 /* Fill out the redirection table */
3543 for (i = 0, j = 0; i < 64; i++, j++) {
3547 adapter->rss_indir_tbl[i] = j;
3550 ixgbe_store_vfreta(adapter);
3553 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3555 struct ixgbe_hw *hw = &adapter->hw;
3556 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3559 /* Disable indicating checksum in descriptor, enables RSS hash */
3560 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3561 rxcsum |= IXGBE_RXCSUM_PCSD;
3562 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3564 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3565 if (adapter->ring_feature[RING_F_RSS].mask)
3566 mrqc = IXGBE_MRQC_RSSEN;
3568 u8 tcs = netdev_get_num_tc(adapter->netdev);
3570 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3572 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3574 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3575 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3576 IXGBE_82599_VMDQ_4Q_MASK)
3577 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3579 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3582 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3584 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3586 mrqc = IXGBE_MRQC_RSSEN;
3590 /* Perform hash on these packet types */
3591 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3592 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3593 IXGBE_MRQC_RSS_FIELD_IPV6 |
3594 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3596 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3597 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3598 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3599 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3601 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3602 if ((hw->mac.type >= ixgbe_mac_X550) &&
3603 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3604 unsigned int pf_pool = adapter->num_vfs;
3606 /* Enable VF RSS mode */
3607 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3608 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3610 /* Setup RSS through the VF registers */
3611 ixgbe_setup_vfreta(adapter);
3612 vfmrqc = IXGBE_MRQC_RSSEN;
3613 vfmrqc |= rss_field;
3614 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3616 ixgbe_setup_reta(adapter);
3618 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3623 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3624 * @adapter: address of board private structure
3625 * @index: index of ring to set
3627 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3628 struct ixgbe_ring *ring)
3630 struct ixgbe_hw *hw = &adapter->hw;
3632 u8 reg_idx = ring->reg_idx;
3634 if (!ring_is_rsc_enabled(ring))
3637 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3638 rscctrl |= IXGBE_RSCCTL_RSCEN;
3640 * we must limit the number of descriptors so that the
3641 * total size of max desc * buf_len is not greater
3644 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3645 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3648 #define IXGBE_MAX_RX_DESC_POLL 10
3649 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3650 struct ixgbe_ring *ring)
3652 struct ixgbe_hw *hw = &adapter->hw;
3653 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3655 u8 reg_idx = ring->reg_idx;
3657 if (ixgbe_removed(hw->hw_addr))
3659 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3660 if (hw->mac.type == ixgbe_mac_82598EB &&
3661 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3665 usleep_range(1000, 2000);
3666 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3667 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3670 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3671 "the polling period\n", reg_idx);
3675 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3676 struct ixgbe_ring *ring)
3678 struct ixgbe_hw *hw = &adapter->hw;
3679 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3681 u8 reg_idx = ring->reg_idx;
3683 if (ixgbe_removed(hw->hw_addr))
3685 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3686 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3688 /* write value back with RXDCTL.ENABLE bit cleared */
3689 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3691 if (hw->mac.type == ixgbe_mac_82598EB &&
3692 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3695 /* the hardware may take up to 100us to really disable the rx queue */
3698 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3699 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3702 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3703 "the polling period\n", reg_idx);
3707 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3708 struct ixgbe_ring *ring)
3710 struct ixgbe_hw *hw = &adapter->hw;
3711 u64 rdba = ring->dma;
3713 u8 reg_idx = ring->reg_idx;
3715 /* disable queue to avoid issues while updating state */
3716 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3717 ixgbe_disable_rx_queue(adapter, ring);
3719 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3720 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3721 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3722 ring->count * sizeof(union ixgbe_adv_rx_desc));
3723 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3724 IXGBE_WRITE_FLUSH(hw);
3726 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3727 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3728 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3730 ixgbe_configure_srrctl(adapter, ring);
3731 ixgbe_configure_rscctl(adapter, ring);
3733 if (hw->mac.type == ixgbe_mac_82598EB) {
3735 * enable cache line friendly hardware writes:
3736 * PTHRESH=32 descriptors (half the internal cache),
3737 * this also removes ugly rx_no_buffer_count increment
3738 * HTHRESH=4 descriptors (to minimize latency on fetch)
3739 * WTHRESH=8 burst writeback up to two cache lines
3741 rxdctl &= ~0x3FFFFF;
3745 /* enable receive descriptor ring */
3746 rxdctl |= IXGBE_RXDCTL_ENABLE;
3747 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3749 ixgbe_rx_desc_queue_enable(adapter, ring);
3750 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3753 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3755 struct ixgbe_hw *hw = &adapter->hw;
3756 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3759 /* PSRTYPE must be initialized in non 82598 adapters */
3760 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3761 IXGBE_PSRTYPE_UDPHDR |
3762 IXGBE_PSRTYPE_IPV4HDR |
3763 IXGBE_PSRTYPE_L2HDR |
3764 IXGBE_PSRTYPE_IPV6HDR;
3766 if (hw->mac.type == ixgbe_mac_82598EB)
3770 psrtype |= 2u << 29;
3772 psrtype |= 1u << 29;
3774 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3775 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3778 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3780 struct ixgbe_hw *hw = &adapter->hw;
3781 u32 reg_offset, vf_shift;
3782 u32 gcr_ext, vmdctl;
3785 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3788 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3789 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3790 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3791 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3792 vmdctl |= IXGBE_VT_CTL_REPLEN;
3793 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3795 vf_shift = VMDQ_P(0) % 32;
3796 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3798 /* Enable only the PF's pool for Tx/Rx */
3799 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3800 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3801 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3802 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3803 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3804 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3806 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3807 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3809 /* clear VLAN promisc flag so VFTA will be updated if necessary */
3810 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3813 * Set up VF register offsets for selected VT Mode,
3814 * i.e. 32 or 64 VFs for SR-IOV
3816 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3817 case IXGBE_82599_VMDQ_8Q_MASK:
3818 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3820 case IXGBE_82599_VMDQ_4Q_MASK:
3821 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3824 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3828 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3830 for (i = 0; i < adapter->num_vfs; i++) {
3831 /* configure spoof checking */
3832 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3833 adapter->vfinfo[i].spoofchk_enabled);
3835 /* Enable/Disable RSS query feature */
3836 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3837 adapter->vfinfo[i].rss_query_enabled);
3841 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3843 struct ixgbe_hw *hw = &adapter->hw;
3844 struct net_device *netdev = adapter->netdev;
3845 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3846 struct ixgbe_ring *rx_ring;
3851 /* adjust max frame to be able to do baby jumbo for FCoE */
3852 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3853 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3854 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3856 #endif /* IXGBE_FCOE */
3858 /* adjust max frame to be at least the size of a standard frame */
3859 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3860 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3862 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3863 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3864 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3865 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3867 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3870 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3871 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3872 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3873 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3876 * Setup the HW Rx Head and Tail Descriptor Pointers and
3877 * the Base and Length of the Rx Descriptor Ring
3879 for (i = 0; i < adapter->num_rx_queues; i++) {
3880 rx_ring = adapter->rx_ring[i];
3881 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3882 set_ring_rsc_enabled(rx_ring);
3884 clear_ring_rsc_enabled(rx_ring);
3888 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3890 struct ixgbe_hw *hw = &adapter->hw;
3891 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3893 switch (hw->mac.type) {
3894 case ixgbe_mac_82598EB:
3896 * For VMDq support of different descriptor types or
3897 * buffer sizes through the use of multiple SRRCTL
3898 * registers, RDRXCTL.MVMEN must be set to 1
3900 * also, the manual doesn't mention it clearly but DCA hints
3901 * will only use queue 0's tags unless this bit is set. Side
3902 * effects of setting this bit are only that SRRCTL must be
3903 * fully programmed [0..15]
3905 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3907 case ixgbe_mac_X550:
3908 case ixgbe_mac_X550EM_x:
3909 case ixgbe_mac_x550em_a:
3910 if (adapter->num_vfs)
3911 rdrxctl |= IXGBE_RDRXCTL_PSP;
3912 /* fall through for older HW */
3913 case ixgbe_mac_82599EB:
3914 case ixgbe_mac_X540:
3915 /* Disable RSC for ACK packets */
3916 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3917 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3918 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3919 /* hardware requires some bits to be set by default */
3920 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3921 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3924 /* We should do nothing since we don't know this hardware */
3928 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3932 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3933 * @adapter: board private structure
3935 * Configure the Rx unit of the MAC after a reset.
3937 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3939 struct ixgbe_hw *hw = &adapter->hw;
3943 /* disable receives while setting up the descriptors */
3944 hw->mac.ops.disable_rx(hw);
3946 ixgbe_setup_psrtype(adapter);
3947 ixgbe_setup_rdrxctl(adapter);
3950 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3951 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3952 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3953 rfctl |= IXGBE_RFCTL_RSC_DIS;
3955 /* disable NFS filtering */
3956 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
3957 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3959 /* Program registers for the distribution of queues */
3960 ixgbe_setup_mrqc(adapter);
3962 /* set_rx_buffer_len must be called before ring initialization */
3963 ixgbe_set_rx_buffer_len(adapter);
3966 * Setup the HW Rx Head and Tail Descriptor Pointers and
3967 * the Base and Length of the Rx Descriptor Ring
3969 for (i = 0; i < adapter->num_rx_queues; i++)
3970 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3972 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3973 /* disable drop enable for 82598 parts */
3974 if (hw->mac.type == ixgbe_mac_82598EB)
3975 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3977 /* enable all receives */
3978 rxctrl |= IXGBE_RXCTRL_RXEN;
3979 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3982 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3983 __be16 proto, u16 vid)
3985 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3986 struct ixgbe_hw *hw = &adapter->hw;
3988 /* add VID to filter table */
3989 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3990 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3992 set_bit(vid, adapter->active_vlans);
3997 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4002 /* short cut the special case */
4006 /* Search for the vlan id in the VLVF entries */
4007 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4008 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4009 if ((vlvf & VLAN_VID_MASK) == vlan)
4016 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4018 struct ixgbe_hw *hw = &adapter->hw;
4022 idx = ixgbe_find_vlvf_entry(hw, vid);
4026 /* See if any other pools are set for this VLAN filter
4027 * entry other than the PF.
4029 word = idx * 2 + (VMDQ_P(0) / 32);
4030 bits = ~BIT(VMDQ_P(0) % 32);
4031 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4033 /* Disable the filter so this falls into the default pool. */
4034 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4035 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4036 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4037 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4041 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4042 __be16 proto, u16 vid)
4044 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4045 struct ixgbe_hw *hw = &adapter->hw;
4047 /* remove VID from filter table */
4048 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4049 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4051 clear_bit(vid, adapter->active_vlans);
4057 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4058 * @adapter: driver data
4060 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4062 struct ixgbe_hw *hw = &adapter->hw;
4066 switch (hw->mac.type) {
4067 case ixgbe_mac_82598EB:
4068 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4069 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4070 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4072 case ixgbe_mac_82599EB:
4073 case ixgbe_mac_X540:
4074 case ixgbe_mac_X550:
4075 case ixgbe_mac_X550EM_x:
4076 case ixgbe_mac_x550em_a:
4077 for (i = 0; i < adapter->num_rx_queues; i++) {
4078 struct ixgbe_ring *ring = adapter->rx_ring[i];
4080 if (ring->l2_accel_priv)
4083 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4084 vlnctrl &= ~IXGBE_RXDCTL_VME;
4085 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4094 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4095 * @adapter: driver data
4097 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4099 struct ixgbe_hw *hw = &adapter->hw;
4103 switch (hw->mac.type) {
4104 case ixgbe_mac_82598EB:
4105 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4106 vlnctrl |= IXGBE_VLNCTRL_VME;
4107 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4109 case ixgbe_mac_82599EB:
4110 case ixgbe_mac_X540:
4111 case ixgbe_mac_X550:
4112 case ixgbe_mac_X550EM_x:
4113 case ixgbe_mac_x550em_a:
4114 for (i = 0; i < adapter->num_rx_queues; i++) {
4115 struct ixgbe_ring *ring = adapter->rx_ring[i];
4117 if (ring->l2_accel_priv)
4120 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4121 vlnctrl |= IXGBE_RXDCTL_VME;
4122 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4130 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4132 struct ixgbe_hw *hw = &adapter->hw;
4135 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4137 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4138 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4139 vlnctrl |= IXGBE_VLNCTRL_VFE;
4140 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4142 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4143 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4147 /* Nothing to do for 82598 */
4148 if (hw->mac.type == ixgbe_mac_82598EB)
4151 /* We are already in VLAN promisc, nothing to do */
4152 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4155 /* Set flag so we don't redo unnecessary work */
4156 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4158 /* Add PF to all active pools */
4159 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4160 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4161 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4163 vlvfb |= BIT(VMDQ_P(0) % 32);
4164 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4167 /* Set all bits in the VLAN filter table array */
4168 for (i = hw->mac.vft_size; i--;)
4169 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4172 #define VFTA_BLOCK_SIZE 8
4173 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4175 struct ixgbe_hw *hw = &adapter->hw;
4176 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4177 u32 vid_start = vfta_offset * 32;
4178 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4179 u32 i, vid, word, bits;
4181 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4182 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4184 /* pull VLAN ID from VLVF */
4185 vid = vlvf & VLAN_VID_MASK;
4187 /* only concern outselves with a certain range */
4188 if (vid < vid_start || vid >= vid_end)
4192 /* record VLAN ID in VFTA */
4193 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4195 /* if PF is part of this then continue */
4196 if (test_bit(vid, adapter->active_vlans))
4200 /* remove PF from the pool */
4201 word = i * 2 + VMDQ_P(0) / 32;
4202 bits = ~BIT(VMDQ_P(0) % 32);
4203 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4204 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4207 /* extract values from active_vlans and write back to VFTA */
4208 for (i = VFTA_BLOCK_SIZE; i--;) {
4209 vid = (vfta_offset + i) * 32;
4210 word = vid / BITS_PER_LONG;
4211 bits = vid % BITS_PER_LONG;
4213 vfta[i] |= adapter->active_vlans[word] >> bits;
4215 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4219 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4221 struct ixgbe_hw *hw = &adapter->hw;
4224 /* Set VLAN filtering to enabled */
4225 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4226 vlnctrl |= IXGBE_VLNCTRL_VFE;
4227 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4229 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4230 hw->mac.type == ixgbe_mac_82598EB)
4233 /* We are not in VLAN promisc, nothing to do */
4234 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4237 /* Set flag so we don't redo unnecessary work */
4238 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4240 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4241 ixgbe_scrub_vfta(adapter, i);
4244 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4248 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4250 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4251 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4255 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4256 * @netdev: network interface device structure
4258 * Writes multicast address list to the MTA hash table.
4259 * Returns: -ENOMEM on failure
4260 * 0 on no addresses written
4261 * X on writing X addresses to MTA
4263 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4265 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4266 struct ixgbe_hw *hw = &adapter->hw;
4268 if (!netif_running(netdev))
4271 if (hw->mac.ops.update_mc_addr_list)
4272 hw->mac.ops.update_mc_addr_list(hw, netdev);
4276 #ifdef CONFIG_PCI_IOV
4277 ixgbe_restore_vf_multicasts(adapter);
4280 return netdev_mc_count(netdev);
4283 #ifdef CONFIG_PCI_IOV
4284 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4286 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4287 struct ixgbe_hw *hw = &adapter->hw;
4290 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4291 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4293 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4294 hw->mac.ops.set_rar(hw, i,
4299 hw->mac.ops.clear_rar(hw, i);
4304 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4306 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4307 struct ixgbe_hw *hw = &adapter->hw;
4310 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4311 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4314 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4316 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4317 hw->mac.ops.set_rar(hw, i,
4322 hw->mac.ops.clear_rar(hw, i);
4326 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4328 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4329 struct ixgbe_hw *hw = &adapter->hw;
4332 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4333 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4334 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4337 ixgbe_sync_mac_table(adapter);
4340 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4342 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4343 struct ixgbe_hw *hw = &adapter->hw;
4346 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4347 /* do not count default RAR as available */
4348 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4351 /* only count unused and addresses that belong to us */
4352 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4353 if (mac_table->pool != pool)
4363 /* this function destroys the first RAR entry */
4364 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4366 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4367 struct ixgbe_hw *hw = &adapter->hw;
4369 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4370 mac_table->pool = VMDQ_P(0);
4372 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4374 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4378 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4379 const u8 *addr, u16 pool)
4381 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4382 struct ixgbe_hw *hw = &adapter->hw;
4385 if (is_zero_ether_addr(addr))
4388 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4389 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4392 ether_addr_copy(mac_table->addr, addr);
4393 mac_table->pool = pool;
4395 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4396 IXGBE_MAC_STATE_IN_USE;
4398 ixgbe_sync_mac_table(adapter);
4406 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4407 const u8 *addr, u16 pool)
4409 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4410 struct ixgbe_hw *hw = &adapter->hw;
4413 if (is_zero_ether_addr(addr))
4416 /* search table for addr, if found clear IN_USE flag and sync */
4417 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4418 /* we can only delete an entry if it is in use */
4419 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4421 /* we only care about entries that belong to the given pool */
4422 if (mac_table->pool != pool)
4424 /* we only care about a specific MAC address */
4425 if (!ether_addr_equal(addr, mac_table->addr))
4428 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4429 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4431 ixgbe_sync_mac_table(adapter);
4439 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4440 * @netdev: network interface device structure
4442 * Writes unicast address list to the RAR table.
4443 * Returns: -ENOMEM on failure/insufficient address space
4444 * 0 on no addresses written
4445 * X on writing X addresses to the RAR table
4447 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4449 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4452 /* return ENOMEM indicating insufficient memory for addresses */
4453 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4456 if (!netdev_uc_empty(netdev)) {
4457 struct netdev_hw_addr *ha;
4458 netdev_for_each_uc_addr(ha, netdev) {
4459 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4460 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4467 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4469 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4472 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4474 return min_t(int, ret, 0);
4477 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4479 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4481 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4487 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4488 * @netdev: network interface device structure
4490 * The set_rx_method entry point is called whenever the unicast/multicast
4491 * address list or the network interface flags are updated. This routine is
4492 * responsible for configuring the hardware for proper unicast, multicast and
4495 void ixgbe_set_rx_mode(struct net_device *netdev)
4497 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4498 struct ixgbe_hw *hw = &adapter->hw;
4499 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4500 netdev_features_t features = netdev->features;
4503 /* Check for Promiscuous and All Multicast modes */
4504 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4506 /* set all bits that we expect to always be set */
4507 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4508 fctrl |= IXGBE_FCTRL_BAM;
4509 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4510 fctrl |= IXGBE_FCTRL_PMCF;
4512 /* clear the bits we are changing the status of */
4513 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4514 if (netdev->flags & IFF_PROMISC) {
4515 hw->addr_ctrl.user_set_promisc = true;
4516 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4517 vmolr |= IXGBE_VMOLR_MPE;
4518 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4520 if (netdev->flags & IFF_ALLMULTI) {
4521 fctrl |= IXGBE_FCTRL_MPE;
4522 vmolr |= IXGBE_VMOLR_MPE;
4524 hw->addr_ctrl.user_set_promisc = false;
4528 * Write addresses to available RAR registers, if there is not
4529 * sufficient space to store all the addresses then enable
4530 * unicast promiscuous mode
4532 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4533 fctrl |= IXGBE_FCTRL_UPE;
4534 vmolr |= IXGBE_VMOLR_ROPE;
4537 /* Write addresses to the MTA, if the attempt fails
4538 * then we should just turn on promiscuous mode so
4539 * that we can at least receive multicast traffic
4541 count = ixgbe_write_mc_addr_list(netdev);
4543 fctrl |= IXGBE_FCTRL_MPE;
4544 vmolr |= IXGBE_VMOLR_MPE;
4546 vmolr |= IXGBE_VMOLR_ROMPE;
4549 if (hw->mac.type != ixgbe_mac_82598EB) {
4550 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4551 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4553 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4556 /* This is useful for sniffing bad packets. */
4557 if (features & NETIF_F_RXALL) {
4558 /* UPE and MPE will be handled by normal PROMISC logic
4559 * in e1000e_set_rx_mode */
4560 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4561 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4562 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4564 fctrl &= ~(IXGBE_FCTRL_DPF);
4565 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4568 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4570 if (features & NETIF_F_HW_VLAN_CTAG_RX)
4571 ixgbe_vlan_strip_enable(adapter);
4573 ixgbe_vlan_strip_disable(adapter);
4575 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4576 ixgbe_vlan_promisc_disable(adapter);
4578 ixgbe_vlan_promisc_enable(adapter);
4581 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4585 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4586 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4587 napi_enable(&adapter->q_vector[q_idx]->napi);
4591 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4595 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4596 napi_disable(&adapter->q_vector[q_idx]->napi);
4597 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4598 pr_info("QV %d locked\n", q_idx);
4599 usleep_range(1000, 20000);
4604 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4606 struct ixgbe_hw *hw = &adapter->hw;
4609 if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4610 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4613 vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4614 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4616 if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4617 adapter->vxlan_port = 0;
4619 if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4620 adapter->geneve_port = 0;
4623 #ifdef CONFIG_IXGBE_DCB
4625 * ixgbe_configure_dcb - Configure DCB hardware
4626 * @adapter: ixgbe adapter struct
4628 * This is called by the driver on open to configure the DCB hardware.
4629 * This is also called by the gennetlink interface when reconfiguring
4632 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4634 struct ixgbe_hw *hw = &adapter->hw;
4635 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4637 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4638 if (hw->mac.type == ixgbe_mac_82598EB)
4639 netif_set_gso_max_size(adapter->netdev, 65536);
4643 if (hw->mac.type == ixgbe_mac_82598EB)
4644 netif_set_gso_max_size(adapter->netdev, 32768);
4647 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4648 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4651 /* reconfigure the hardware */
4652 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4653 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4655 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4657 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4658 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4659 ixgbe_dcb_hw_ets(&adapter->hw,
4660 adapter->ixgbe_ieee_ets,
4662 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4663 adapter->ixgbe_ieee_pfc->pfc_en,
4664 adapter->ixgbe_ieee_ets->prio_tc);
4667 /* Enable RSS Hash per TC */
4668 if (hw->mac.type != ixgbe_mac_82598EB) {
4670 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4677 /* write msb to all 8 TCs in one write */
4678 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4683 /* Additional bittime to account for IXGBE framing */
4684 #define IXGBE_ETH_FRAMING 20
4687 * ixgbe_hpbthresh - calculate high water mark for flow control
4689 * @adapter: board private structure to calculate for
4690 * @pb: packet buffer to calculate
4692 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4694 struct ixgbe_hw *hw = &adapter->hw;
4695 struct net_device *dev = adapter->netdev;
4696 int link, tc, kb, marker;
4699 /* Calculate max LAN frame size */
4700 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4703 /* FCoE traffic class uses FCOE jumbo frames */
4704 if ((dev->features & NETIF_F_FCOE_MTU) &&
4705 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4706 (pb == ixgbe_fcoe_get_tc(adapter)))
4707 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4710 /* Calculate delay value for device */
4711 switch (hw->mac.type) {
4712 case ixgbe_mac_X540:
4713 case ixgbe_mac_X550:
4714 case ixgbe_mac_X550EM_x:
4715 case ixgbe_mac_x550em_a:
4716 dv_id = IXGBE_DV_X540(link, tc);
4719 dv_id = IXGBE_DV(link, tc);
4723 /* Loopback switch introduces additional latency */
4724 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4725 dv_id += IXGBE_B2BT(tc);
4727 /* Delay value is calculated in bit times convert to KB */
4728 kb = IXGBE_BT2KB(dv_id);
4729 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4731 marker = rx_pba - kb;
4733 /* It is possible that the packet buffer is not large enough
4734 * to provide required headroom. In this case throw an error
4735 * to user and a do the best we can.
4738 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4739 "headroom to support flow control."
4740 "Decrease MTU or number of traffic classes\n", pb);
4748 * ixgbe_lpbthresh - calculate low water mark for for flow control
4750 * @adapter: board private structure to calculate for
4751 * @pb: packet buffer to calculate
4753 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4755 struct ixgbe_hw *hw = &adapter->hw;
4756 struct net_device *dev = adapter->netdev;
4760 /* Calculate max LAN frame size */
4761 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4764 /* FCoE traffic class uses FCOE jumbo frames */
4765 if ((dev->features & NETIF_F_FCOE_MTU) &&
4766 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4767 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4768 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4771 /* Calculate delay value for device */
4772 switch (hw->mac.type) {
4773 case ixgbe_mac_X540:
4774 case ixgbe_mac_X550:
4775 case ixgbe_mac_X550EM_x:
4776 case ixgbe_mac_x550em_a:
4777 dv_id = IXGBE_LOW_DV_X540(tc);
4780 dv_id = IXGBE_LOW_DV(tc);
4784 /* Delay value is calculated in bit times convert to KB */
4785 return IXGBE_BT2KB(dv_id);
4789 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4791 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4793 struct ixgbe_hw *hw = &adapter->hw;
4794 int num_tc = netdev_get_num_tc(adapter->netdev);
4800 for (i = 0; i < num_tc; i++) {
4801 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4802 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4804 /* Low water marks must not be larger than high water marks */
4805 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4806 hw->fc.low_water[i] = 0;
4809 for (; i < MAX_TRAFFIC_CLASS; i++)
4810 hw->fc.high_water[i] = 0;
4813 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4815 struct ixgbe_hw *hw = &adapter->hw;
4817 u8 tc = netdev_get_num_tc(adapter->netdev);
4819 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4820 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4821 hdrm = 32 << adapter->fdir_pballoc;
4825 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4826 ixgbe_pbthresh_setup(adapter);
4829 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4831 struct ixgbe_hw *hw = &adapter->hw;
4832 struct hlist_node *node2;
4833 struct ixgbe_fdir_filter *filter;
4835 spin_lock(&adapter->fdir_perfect_lock);
4837 if (!hlist_empty(&adapter->fdir_filter_list))
4838 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4840 hlist_for_each_entry_safe(filter, node2,
4841 &adapter->fdir_filter_list, fdir_node) {
4842 ixgbe_fdir_write_perfect_filter_82599(hw,
4845 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4846 IXGBE_FDIR_DROP_QUEUE :
4847 adapter->rx_ring[filter->action]->reg_idx);
4850 spin_unlock(&adapter->fdir_perfect_lock);
4853 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4854 struct ixgbe_adapter *adapter)
4856 struct ixgbe_hw *hw = &adapter->hw;
4859 /* No unicast promiscuous support for VMDQ devices. */
4860 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4861 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4863 /* clear the affected bit */
4864 vmolr &= ~IXGBE_VMOLR_MPE;
4866 if (dev->flags & IFF_ALLMULTI) {
4867 vmolr |= IXGBE_VMOLR_MPE;
4869 vmolr |= IXGBE_VMOLR_ROMPE;
4870 hw->mac.ops.update_mc_addr_list(hw, dev);
4872 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4873 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4876 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4878 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4879 int rss_i = adapter->num_rx_queues_per_pool;
4880 struct ixgbe_hw *hw = &adapter->hw;
4881 u16 pool = vadapter->pool;
4882 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4883 IXGBE_PSRTYPE_UDPHDR |
4884 IXGBE_PSRTYPE_IPV4HDR |
4885 IXGBE_PSRTYPE_L2HDR |
4886 IXGBE_PSRTYPE_IPV6HDR;
4888 if (hw->mac.type == ixgbe_mac_82598EB)
4892 psrtype |= 2u << 29;
4894 psrtype |= 1u << 29;
4896 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4900 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4901 * @rx_ring: ring to free buffers from
4903 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4905 struct device *dev = rx_ring->dev;
4909 /* ring already cleared, nothing to do */
4910 if (!rx_ring->rx_buffer_info)
4913 /* Free all the Rx ring sk_buffs */
4914 for (i = 0; i < rx_ring->count; i++) {
4915 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4917 if (rx_buffer->skb) {
4918 struct sk_buff *skb = rx_buffer->skb;
4919 if (IXGBE_CB(skb)->page_released)
4922 ixgbe_rx_bufsz(rx_ring),
4925 rx_buffer->skb = NULL;
4928 if (!rx_buffer->page)
4931 dma_unmap_page(dev, rx_buffer->dma,
4932 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4933 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4935 rx_buffer->page = NULL;
4938 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4939 memset(rx_ring->rx_buffer_info, 0, size);
4941 /* Zero out the descriptor ring */
4942 memset(rx_ring->desc, 0, rx_ring->size);
4944 rx_ring->next_to_alloc = 0;
4945 rx_ring->next_to_clean = 0;
4946 rx_ring->next_to_use = 0;
4949 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4950 struct ixgbe_ring *rx_ring)
4952 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4953 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4955 /* shutdown specific queue receive and wait for dma to settle */
4956 ixgbe_disable_rx_queue(adapter, rx_ring);
4957 usleep_range(10000, 20000);
4958 ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4959 ixgbe_clean_rx_ring(rx_ring);
4960 rx_ring->l2_accel_priv = NULL;
4963 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4964 struct ixgbe_fwd_adapter *accel)
4966 struct ixgbe_adapter *adapter = accel->real_adapter;
4967 unsigned int rxbase = accel->rx_base_queue;
4968 unsigned int txbase = accel->tx_base_queue;
4971 netif_tx_stop_all_queues(vdev);
4973 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4974 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4975 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4978 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4979 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4980 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4987 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4988 struct ixgbe_fwd_adapter *accel)
4990 struct ixgbe_adapter *adapter = accel->real_adapter;
4991 unsigned int rxbase, txbase, queues;
4992 int i, baseq, err = 0;
4994 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4997 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4998 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4999 accel->pool, adapter->num_rx_pools,
5000 baseq, baseq + adapter->num_rx_queues_per_pool,
5001 adapter->fwd_bitmask);
5003 accel->netdev = vdev;
5004 accel->rx_base_queue = rxbase = baseq;
5005 accel->tx_base_queue = txbase = baseq;
5007 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5008 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5010 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5011 adapter->rx_ring[rxbase + i]->netdev = vdev;
5012 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5013 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5016 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5017 adapter->tx_ring[txbase + i]->netdev = vdev;
5018 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5021 queues = min_t(unsigned int,
5022 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5023 err = netif_set_real_num_tx_queues(vdev, queues);
5027 err = netif_set_real_num_rx_queues(vdev, queues);
5031 if (is_valid_ether_addr(vdev->dev_addr))
5032 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5034 ixgbe_fwd_psrtype(accel);
5035 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5038 ixgbe_fwd_ring_down(vdev, accel);
5042 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5044 if (netif_is_macvlan(upper)) {
5045 struct macvlan_dev *dfwd = netdev_priv(upper);
5046 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5049 ixgbe_fwd_ring_up(upper, vadapter);
5055 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5057 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5058 ixgbe_upper_dev_walk, NULL);
5061 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5063 struct ixgbe_hw *hw = &adapter->hw;
5065 ixgbe_configure_pb(adapter);
5066 #ifdef CONFIG_IXGBE_DCB
5067 ixgbe_configure_dcb(adapter);
5070 * We must restore virtualization before VLANs or else
5071 * the VLVF registers will not be populated
5073 ixgbe_configure_virtualization(adapter);
5075 ixgbe_set_rx_mode(adapter->netdev);
5076 ixgbe_restore_vlan(adapter);
5078 switch (hw->mac.type) {
5079 case ixgbe_mac_82599EB:
5080 case ixgbe_mac_X540:
5081 hw->mac.ops.disable_rx_buff(hw);
5087 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5088 ixgbe_init_fdir_signature_82599(&adapter->hw,
5089 adapter->fdir_pballoc);
5090 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5091 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5092 adapter->fdir_pballoc);
5093 ixgbe_fdir_filter_restore(adapter);
5096 switch (hw->mac.type) {
5097 case ixgbe_mac_82599EB:
5098 case ixgbe_mac_X540:
5099 hw->mac.ops.enable_rx_buff(hw);
5105 #ifdef CONFIG_IXGBE_DCA
5107 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5108 ixgbe_setup_dca(adapter);
5109 #endif /* CONFIG_IXGBE_DCA */
5112 /* configure FCoE L2 filters, redirection table, and Rx control */
5113 ixgbe_configure_fcoe(adapter);
5115 #endif /* IXGBE_FCOE */
5116 ixgbe_configure_tx(adapter);
5117 ixgbe_configure_rx(adapter);
5118 ixgbe_configure_dfwd(adapter);
5122 * ixgbe_sfp_link_config - set up SFP+ link
5123 * @adapter: pointer to private adapter struct
5125 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5128 * We are assuming the worst case scenario here, and that
5129 * is that an SFP was inserted/removed after the reset
5130 * but before SFP detection was enabled. As such the best
5131 * solution is to just start searching as soon as we start
5133 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5134 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5136 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5137 adapter->sfp_poll_time = 0;
5141 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5142 * @hw: pointer to private hardware struct
5144 * Returns 0 on success, negative on failure
5146 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5149 bool autoneg, link_up = false;
5150 int ret = IXGBE_ERR_LINK_SETUP;
5152 if (hw->mac.ops.check_link)
5153 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5158 speed = hw->phy.autoneg_advertised;
5159 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5160 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5165 if (hw->mac.ops.setup_link)
5166 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5171 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5173 struct ixgbe_hw *hw = &adapter->hw;
5176 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5177 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5179 gpie |= IXGBE_GPIE_EIAME;
5181 * use EIAM to auto-mask when MSI-X interrupt is asserted
5182 * this saves a register write for every interrupt
5184 switch (hw->mac.type) {
5185 case ixgbe_mac_82598EB:
5186 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5188 case ixgbe_mac_82599EB:
5189 case ixgbe_mac_X540:
5190 case ixgbe_mac_X550:
5191 case ixgbe_mac_X550EM_x:
5192 case ixgbe_mac_x550em_a:
5194 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5195 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5199 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5200 * specifically only auto mask tx and rx interrupts */
5201 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5204 /* XXX: to interrupt immediately for EICS writes, enable this */
5205 /* gpie |= IXGBE_GPIE_EIMEN; */
5207 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5208 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5210 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5211 case IXGBE_82599_VMDQ_8Q_MASK:
5212 gpie |= IXGBE_GPIE_VTMODE_16;
5214 case IXGBE_82599_VMDQ_4Q_MASK:
5215 gpie |= IXGBE_GPIE_VTMODE_32;
5218 gpie |= IXGBE_GPIE_VTMODE_64;
5223 /* Enable Thermal over heat sensor interrupt */
5224 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5225 switch (adapter->hw.mac.type) {
5226 case ixgbe_mac_82599EB:
5227 gpie |= IXGBE_SDP0_GPIEN_8259X;
5234 /* Enable fan failure interrupt */
5235 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5236 gpie |= IXGBE_SDP1_GPIEN(hw);
5238 switch (hw->mac.type) {
5239 case ixgbe_mac_82599EB:
5240 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5242 case ixgbe_mac_X550EM_x:
5243 case ixgbe_mac_x550em_a:
5244 gpie |= IXGBE_SDP0_GPIEN_X540;
5250 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5253 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5255 struct ixgbe_hw *hw = &adapter->hw;
5259 ixgbe_get_hw_control(adapter);
5260 ixgbe_setup_gpie(adapter);
5262 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5263 ixgbe_configure_msix(adapter);
5265 ixgbe_configure_msi_and_legacy(adapter);
5267 /* enable the optics for 82599 SFP+ fiber */
5268 if (hw->mac.ops.enable_tx_laser)
5269 hw->mac.ops.enable_tx_laser(hw);
5271 if (hw->phy.ops.set_phy_power)
5272 hw->phy.ops.set_phy_power(hw, true);
5274 smp_mb__before_atomic();
5275 clear_bit(__IXGBE_DOWN, &adapter->state);
5276 ixgbe_napi_enable_all(adapter);
5278 if (ixgbe_is_sfp(hw)) {
5279 ixgbe_sfp_link_config(adapter);
5281 err = ixgbe_non_sfp_link_config(hw);
5283 e_err(probe, "link_config FAILED %d\n", err);
5286 /* clear any pending interrupts, may auto mask */
5287 IXGBE_READ_REG(hw, IXGBE_EICR);
5288 ixgbe_irq_enable(adapter, true, true);
5291 * If this adapter has a fan, check to see if we had a failure
5292 * before we enabled the interrupt.
5294 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5295 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5296 if (esdp & IXGBE_ESDP_SDP1)
5297 e_crit(drv, "Fan has stopped, replace the adapter\n");
5300 /* bring the link up in the watchdog, this could race with our first
5301 * link up interrupt but shouldn't be a problem */
5302 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5303 adapter->link_check_timeout = jiffies;
5304 mod_timer(&adapter->service_timer, jiffies);
5306 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5307 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5308 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5309 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5312 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5314 WARN_ON(in_interrupt());
5315 /* put off any impending NetWatchDogTimeout */
5316 netif_trans_update(adapter->netdev);
5318 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5319 usleep_range(1000, 2000);
5320 if (adapter->hw.phy.type == ixgbe_phy_fw)
5321 ixgbe_watchdog_link_is_down(adapter);
5322 ixgbe_down(adapter);
5324 * If SR-IOV enabled then wait a bit before bringing the adapter
5325 * back up to give the VFs time to respond to the reset. The
5326 * two second wait is based upon the watchdog timer cycle in
5329 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5332 clear_bit(__IXGBE_RESETTING, &adapter->state);
5335 void ixgbe_up(struct ixgbe_adapter *adapter)
5337 /* hardware has been reset, we need to reload some things */
5338 ixgbe_configure(adapter);
5340 ixgbe_up_complete(adapter);
5343 void ixgbe_reset(struct ixgbe_adapter *adapter)
5345 struct ixgbe_hw *hw = &adapter->hw;
5346 struct net_device *netdev = adapter->netdev;
5349 if (ixgbe_removed(hw->hw_addr))
5351 /* lock SFP init bit to prevent race conditions with the watchdog */
5352 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5353 usleep_range(1000, 2000);
5355 /* clear all SFP and link config related flags while holding SFP_INIT */
5356 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5357 IXGBE_FLAG2_SFP_NEEDS_RESET);
5358 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5360 err = hw->mac.ops.init_hw(hw);
5363 case IXGBE_ERR_SFP_NOT_PRESENT:
5364 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5366 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5367 e_dev_err("master disable timed out\n");
5369 case IXGBE_ERR_EEPROM_VERSION:
5370 /* We are running on a pre-production device, log a warning */
5371 e_dev_warn("This device is a pre-production adapter/LOM. "
5372 "Please be aware there may be issues associated with "
5373 "your hardware. If you are experiencing problems "
5374 "please contact your Intel or hardware "
5375 "representative who provided you with this "
5379 e_dev_err("Hardware Error: %d\n", err);
5382 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5384 /* flush entries out of MAC table */
5385 ixgbe_flush_sw_mac_table(adapter);
5386 __dev_uc_unsync(netdev, NULL);
5388 /* do not flush user set addresses */
5389 ixgbe_mac_set_default_filter(adapter);
5391 /* update SAN MAC vmdq pool selection */
5392 if (hw->mac.san_mac_rar_index)
5393 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5395 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5396 ixgbe_ptp_reset(adapter);
5398 if (hw->phy.ops.set_phy_power) {
5399 if (!netif_running(adapter->netdev) && !adapter->wol)
5400 hw->phy.ops.set_phy_power(hw, false);
5402 hw->phy.ops.set_phy_power(hw, true);
5407 * ixgbe_clean_tx_ring - Free Tx Buffers
5408 * @tx_ring: ring to be cleaned
5410 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5412 struct ixgbe_tx_buffer *tx_buffer_info;
5416 /* ring already cleared, nothing to do */
5417 if (!tx_ring->tx_buffer_info)
5420 /* Free all the Tx ring sk_buffs */
5421 for (i = 0; i < tx_ring->count; i++) {
5422 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5423 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5426 netdev_tx_reset_queue(txring_txq(tx_ring));
5428 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5429 memset(tx_ring->tx_buffer_info, 0, size);
5431 /* Zero out the descriptor ring */
5432 memset(tx_ring->desc, 0, tx_ring->size);
5434 tx_ring->next_to_use = 0;
5435 tx_ring->next_to_clean = 0;
5439 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5440 * @adapter: board private structure
5442 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5446 for (i = 0; i < adapter->num_rx_queues; i++)
5447 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5451 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5452 * @adapter: board private structure
5454 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5458 for (i = 0; i < adapter->num_tx_queues; i++)
5459 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5462 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5464 struct hlist_node *node2;
5465 struct ixgbe_fdir_filter *filter;
5467 spin_lock(&adapter->fdir_perfect_lock);
5469 hlist_for_each_entry_safe(filter, node2,
5470 &adapter->fdir_filter_list, fdir_node) {
5471 hlist_del(&filter->fdir_node);
5474 adapter->fdir_filter_count = 0;
5476 spin_unlock(&adapter->fdir_perfect_lock);
5479 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5481 if (netif_is_macvlan(upper)) {
5482 struct macvlan_dev *vlan = netdev_priv(upper);
5484 if (vlan->fwd_priv) {
5485 netif_tx_stop_all_queues(upper);
5486 netif_carrier_off(upper);
5487 netif_tx_disable(upper);
5494 void ixgbe_down(struct ixgbe_adapter *adapter)
5496 struct net_device *netdev = adapter->netdev;
5497 struct ixgbe_hw *hw = &adapter->hw;
5500 /* signal that we are down to the interrupt handler */
5501 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5502 return; /* do nothing if already down */
5504 /* disable receives */
5505 hw->mac.ops.disable_rx(hw);
5507 /* disable all enabled rx queues */
5508 for (i = 0; i < adapter->num_rx_queues; i++)
5509 /* this call also flushes the previous write */
5510 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5512 usleep_range(10000, 20000);
5514 netif_tx_stop_all_queues(netdev);
5516 /* call carrier off first to avoid false dev_watchdog timeouts */
5517 netif_carrier_off(netdev);
5518 netif_tx_disable(netdev);
5520 /* disable any upper devices */
5521 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5522 ixgbe_disable_macvlan, NULL);
5524 ixgbe_irq_disable(adapter);
5526 ixgbe_napi_disable_all(adapter);
5528 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5529 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5530 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5532 del_timer_sync(&adapter->service_timer);
5534 if (adapter->num_vfs) {
5535 /* Clear EITR Select mapping */
5536 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5538 /* Mark all the VFs as inactive */
5539 for (i = 0 ; i < adapter->num_vfs; i++)
5540 adapter->vfinfo[i].clear_to_send = false;
5542 /* ping all the active vfs to let them know we are going down */
5543 ixgbe_ping_all_vfs(adapter);
5545 /* Disable all VFTE/VFRE TX/RX */
5546 ixgbe_disable_tx_rx(adapter);
5549 /* disable transmits in the hardware now that interrupts are off */
5550 for (i = 0; i < adapter->num_tx_queues; i++) {
5551 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5552 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5555 /* Disable the Tx DMA engine on 82599 and later MAC */
5556 switch (hw->mac.type) {
5557 case ixgbe_mac_82599EB:
5558 case ixgbe_mac_X540:
5559 case ixgbe_mac_X550:
5560 case ixgbe_mac_X550EM_x:
5561 case ixgbe_mac_x550em_a:
5562 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5563 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5564 ~IXGBE_DMATXCTL_TE));
5570 if (!pci_channel_offline(adapter->pdev))
5571 ixgbe_reset(adapter);
5573 /* power down the optics for 82599 SFP+ fiber */
5574 if (hw->mac.ops.disable_tx_laser)
5575 hw->mac.ops.disable_tx_laser(hw);
5577 ixgbe_clean_all_tx_rings(adapter);
5578 ixgbe_clean_all_rx_rings(adapter);
5582 * ixgbe_eee_capable - helper function to determine EEE support on X550
5583 * @adapter: board private structure
5585 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5587 struct ixgbe_hw *hw = &adapter->hw;
5589 switch (hw->device_id) {
5590 case IXGBE_DEV_ID_X550EM_A_1G_T:
5591 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5592 if (!hw->phy.eee_speeds_supported)
5594 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5595 if (!hw->phy.eee_speeds_advertised)
5597 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5600 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5601 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5607 * ixgbe_tx_timeout - Respond to a Tx Hang
5608 * @netdev: network interface device structure
5610 static void ixgbe_tx_timeout(struct net_device *netdev)
5612 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5614 /* Do the reset outside of interrupt context */
5615 ixgbe_tx_timeout_reset(adapter);
5618 #ifdef CONFIG_IXGBE_DCB
5619 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5621 struct ixgbe_hw *hw = &adapter->hw;
5622 struct tc_configuration *tc;
5625 switch (hw->mac.type) {
5626 case ixgbe_mac_82598EB:
5627 case ixgbe_mac_82599EB:
5628 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5629 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5631 case ixgbe_mac_X540:
5632 case ixgbe_mac_X550:
5633 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5634 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5636 case ixgbe_mac_X550EM_x:
5637 case ixgbe_mac_x550em_a:
5639 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5640 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5644 /* Configure DCB traffic classes */
5645 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5646 tc = &adapter->dcb_cfg.tc_config[j];
5647 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5648 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5649 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5650 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5651 tc->dcb_pfc = pfc_disabled;
5654 /* Initialize default user to priority mapping, UPx->TC0 */
5655 tc = &adapter->dcb_cfg.tc_config[0];
5656 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5657 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5659 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5660 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5661 adapter->dcb_cfg.pfc_mode_enable = false;
5662 adapter->dcb_set_bitmap = 0x00;
5663 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5664 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5665 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5666 sizeof(adapter->temp_dcb_cfg));
5671 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5672 * @adapter: board private structure to initialize
5674 * ixgbe_sw_init initializes the Adapter private data structure.
5675 * Fields are initialized based on PCI device information and
5676 * OS network device settings (MTU size).
5678 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5679 const struct ixgbe_info *ii)
5681 struct ixgbe_hw *hw = &adapter->hw;
5682 struct pci_dev *pdev = adapter->pdev;
5683 unsigned int rss, fdir;
5687 /* PCI config space info */
5689 hw->vendor_id = pdev->vendor;
5690 hw->device_id = pdev->device;
5691 hw->revision_id = pdev->revision;
5692 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5693 hw->subsystem_device_id = pdev->subsystem_device;
5695 /* get_invariants needs the device IDs */
5696 ii->get_invariants(hw);
5698 /* Set common capability flags and settings */
5699 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5700 adapter->ring_feature[RING_F_RSS].limit = rss;
5701 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5702 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5703 adapter->atr_sample_rate = 20;
5704 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5705 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5706 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5707 #ifdef CONFIG_IXGBE_DCA
5708 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5710 #ifdef CONFIG_IXGBE_DCB
5711 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5712 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5715 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5716 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5717 #ifdef CONFIG_IXGBE_DCB
5718 /* Default traffic class to use for FCoE */
5719 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5720 #endif /* CONFIG_IXGBE_DCB */
5721 #endif /* IXGBE_FCOE */
5723 /* initialize static ixgbe jump table entries */
5724 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5726 if (!adapter->jump_tables[0])
5728 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5730 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5731 adapter->jump_tables[i] = NULL;
5733 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5734 hw->mac.num_rar_entries,
5736 if (!adapter->mac_table)
5739 /* Set MAC specific capability flags and exceptions */
5740 switch (hw->mac.type) {
5741 case ixgbe_mac_82598EB:
5742 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5744 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5745 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5747 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5748 adapter->ring_feature[RING_F_FDIR].limit = 0;
5749 adapter->atr_sample_rate = 0;
5750 adapter->fdir_pballoc = 0;
5752 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5753 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5754 #ifdef CONFIG_IXGBE_DCB
5755 adapter->fcoe.up = 0;
5756 #endif /* IXGBE_DCB */
5757 #endif /* IXGBE_FCOE */
5759 case ixgbe_mac_82599EB:
5760 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5761 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5763 case ixgbe_mac_X540:
5764 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5765 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5766 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5768 case ixgbe_mac_x550em_a:
5769 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5770 switch (hw->device_id) {
5771 case IXGBE_DEV_ID_X550EM_A_1G_T:
5772 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5773 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5779 case ixgbe_mac_X550EM_x:
5780 #ifdef CONFIG_IXGBE_DCB
5781 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5784 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5785 #ifdef CONFIG_IXGBE_DCB
5786 adapter->fcoe.up = 0;
5787 #endif /* IXGBE_DCB */
5788 #endif /* IXGBE_FCOE */
5790 case ixgbe_mac_X550:
5791 if (hw->mac.type == ixgbe_mac_X550)
5792 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5793 #ifdef CONFIG_IXGBE_DCA
5794 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5796 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5803 /* FCoE support exists, always init the FCoE lock */
5804 spin_lock_init(&adapter->fcoe.lock);
5807 /* n-tuple support exists, always init our spinlock */
5808 spin_lock_init(&adapter->fdir_perfect_lock);
5810 #ifdef CONFIG_IXGBE_DCB
5811 ixgbe_init_dcb(adapter);
5814 /* default flow control settings */
5815 hw->fc.requested_mode = ixgbe_fc_full;
5816 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5817 ixgbe_pbthresh_setup(adapter);
5818 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5819 hw->fc.send_xon = true;
5820 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5822 #ifdef CONFIG_PCI_IOV
5824 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5826 /* assign number of SR-IOV VFs */
5827 if (hw->mac.type != ixgbe_mac_82598EB) {
5828 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5829 adapter->num_vfs = 0;
5830 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5832 adapter->num_vfs = max_vfs;
5835 #endif /* CONFIG_PCI_IOV */
5837 /* enable itr by default in dynamic mode */
5838 adapter->rx_itr_setting = 1;
5839 adapter->tx_itr_setting = 1;
5841 /* set default ring sizes */
5842 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5843 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5845 /* set default work limits */
5846 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5848 /* initialize eeprom parameters */
5849 if (ixgbe_init_eeprom_params_generic(hw)) {
5850 e_dev_err("EEPROM initialization failed\n");
5854 /* PF holds first pool slot */
5855 set_bit(0, &adapter->fwd_bitmask);
5856 set_bit(__IXGBE_DOWN, &adapter->state);
5862 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5863 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5865 * Return 0 on success, negative on failure
5867 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5869 struct device *dev = tx_ring->dev;
5870 int orig_node = dev_to_node(dev);
5874 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5876 if (tx_ring->q_vector)
5877 ring_node = tx_ring->q_vector->numa_node;
5879 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5880 if (!tx_ring->tx_buffer_info)
5881 tx_ring->tx_buffer_info = vzalloc(size);
5882 if (!tx_ring->tx_buffer_info)
5885 u64_stats_init(&tx_ring->syncp);
5887 /* round up to nearest 4K */
5888 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5889 tx_ring->size = ALIGN(tx_ring->size, 4096);
5891 set_dev_node(dev, ring_node);
5892 tx_ring->desc = dma_alloc_coherent(dev,
5896 set_dev_node(dev, orig_node);
5898 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5899 &tx_ring->dma, GFP_KERNEL);
5903 tx_ring->next_to_use = 0;
5904 tx_ring->next_to_clean = 0;
5908 vfree(tx_ring->tx_buffer_info);
5909 tx_ring->tx_buffer_info = NULL;
5910 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5915 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5916 * @adapter: board private structure
5918 * If this function returns with an error, then it's possible one or
5919 * more of the rings is populated (while the rest are not). It is the
5920 * callers duty to clean those orphaned rings.
5922 * Return 0 on success, negative on failure
5924 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5928 for (i = 0; i < adapter->num_tx_queues; i++) {
5929 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5933 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5939 /* rewind the index freeing the rings as we go */
5941 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5946 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5947 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5949 * Returns 0 on success, negative on failure
5951 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5953 struct device *dev = rx_ring->dev;
5954 int orig_node = dev_to_node(dev);
5958 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5960 if (rx_ring->q_vector)
5961 ring_node = rx_ring->q_vector->numa_node;
5963 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5964 if (!rx_ring->rx_buffer_info)
5965 rx_ring->rx_buffer_info = vzalloc(size);
5966 if (!rx_ring->rx_buffer_info)
5969 u64_stats_init(&rx_ring->syncp);
5971 /* Round up to nearest 4K */
5972 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5973 rx_ring->size = ALIGN(rx_ring->size, 4096);
5975 set_dev_node(dev, ring_node);
5976 rx_ring->desc = dma_alloc_coherent(dev,
5980 set_dev_node(dev, orig_node);
5982 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5983 &rx_ring->dma, GFP_KERNEL);
5987 rx_ring->next_to_clean = 0;
5988 rx_ring->next_to_use = 0;
5992 vfree(rx_ring->rx_buffer_info);
5993 rx_ring->rx_buffer_info = NULL;
5994 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5999 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6000 * @adapter: board private structure
6002 * If this function returns with an error, then it's possible one or
6003 * more of the rings is populated (while the rest are not). It is the
6004 * callers duty to clean those orphaned rings.
6006 * Return 0 on success, negative on failure
6008 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6012 for (i = 0; i < adapter->num_rx_queues; i++) {
6013 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
6017 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6022 err = ixgbe_setup_fcoe_ddp_resources(adapter);
6027 /* rewind the index freeing the rings as we go */
6029 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6034 * ixgbe_free_tx_resources - Free Tx Resources per Queue
6035 * @tx_ring: Tx descriptor ring for a specific queue
6037 * Free all transmit software resources
6039 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6041 ixgbe_clean_tx_ring(tx_ring);
6043 vfree(tx_ring->tx_buffer_info);
6044 tx_ring->tx_buffer_info = NULL;
6046 /* if not set, then don't free */
6050 dma_free_coherent(tx_ring->dev, tx_ring->size,
6051 tx_ring->desc, tx_ring->dma);
6053 tx_ring->desc = NULL;
6057 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6058 * @adapter: board private structure
6060 * Free all transmit software resources
6062 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6066 for (i = 0; i < adapter->num_tx_queues; i++)
6067 if (adapter->tx_ring[i]->desc)
6068 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6072 * ixgbe_free_rx_resources - Free Rx Resources
6073 * @rx_ring: ring to clean the resources from
6075 * Free all receive software resources
6077 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6079 ixgbe_clean_rx_ring(rx_ring);
6081 vfree(rx_ring->rx_buffer_info);
6082 rx_ring->rx_buffer_info = NULL;
6084 /* if not set, then don't free */
6088 dma_free_coherent(rx_ring->dev, rx_ring->size,
6089 rx_ring->desc, rx_ring->dma);
6091 rx_ring->desc = NULL;
6095 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6096 * @adapter: board private structure
6098 * Free all receive software resources
6100 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6105 ixgbe_free_fcoe_ddp_resources(adapter);
6108 for (i = 0; i < adapter->num_rx_queues; i++)
6109 if (adapter->rx_ring[i]->desc)
6110 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6114 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6115 * @netdev: network interface device structure
6116 * @new_mtu: new value for maximum frame size
6118 * Returns 0 on success, negative on failure
6120 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6122 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6125 * For 82599EB we cannot allow legacy VFs to enable their receive
6126 * paths when MTU greater than 1500 is configured. So display a
6127 * warning that legacy VFs will be disabled.
6129 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6130 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6131 (new_mtu > ETH_DATA_LEN))
6132 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6134 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6136 /* must set new MTU before calling down or up */
6137 netdev->mtu = new_mtu;
6139 if (netif_running(netdev))
6140 ixgbe_reinit_locked(adapter);
6146 * ixgbe_open - Called when a network interface is made active
6147 * @netdev: network interface device structure
6149 * Returns 0 on success, negative value on failure
6151 * The open entry point is called when a network interface is made
6152 * active by the system (IFF_UP). At this point all resources needed
6153 * for transmit and receive operations are allocated, the interrupt
6154 * handler is registered with the OS, the watchdog timer is started,
6155 * and the stack is notified that the interface is ready.
6157 int ixgbe_open(struct net_device *netdev)
6159 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6160 struct ixgbe_hw *hw = &adapter->hw;
6163 /* disallow open during test */
6164 if (test_bit(__IXGBE_TESTING, &adapter->state))
6167 netif_carrier_off(netdev);
6169 /* allocate transmit descriptors */
6170 err = ixgbe_setup_all_tx_resources(adapter);
6174 /* allocate receive descriptors */
6175 err = ixgbe_setup_all_rx_resources(adapter);
6179 ixgbe_configure(adapter);
6181 err = ixgbe_request_irq(adapter);
6185 /* Notify the stack of the actual queue counts. */
6186 if (adapter->num_rx_pools > 1)
6187 queues = adapter->num_rx_queues_per_pool;
6189 queues = adapter->num_tx_queues;
6191 err = netif_set_real_num_tx_queues(netdev, queues);
6193 goto err_set_queues;
6195 if (adapter->num_rx_pools > 1 &&
6196 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6197 queues = IXGBE_MAX_L2A_QUEUES;
6199 queues = adapter->num_rx_queues;
6200 err = netif_set_real_num_rx_queues(netdev, queues);
6202 goto err_set_queues;
6204 ixgbe_ptp_init(adapter);
6206 ixgbe_up_complete(adapter);
6208 ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6209 udp_tunnel_get_rx_info(netdev);
6214 ixgbe_free_irq(adapter);
6216 ixgbe_free_all_rx_resources(adapter);
6217 if (hw->phy.ops.set_phy_power && !adapter->wol)
6218 hw->phy.ops.set_phy_power(&adapter->hw, false);
6220 ixgbe_free_all_tx_resources(adapter);
6222 ixgbe_reset(adapter);
6227 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6229 ixgbe_ptp_suspend(adapter);
6231 if (adapter->hw.phy.ops.enter_lplu) {
6232 adapter->hw.phy.reset_disable = true;
6233 ixgbe_down(adapter);
6234 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6235 adapter->hw.phy.reset_disable = false;
6237 ixgbe_down(adapter);
6240 ixgbe_free_irq(adapter);
6242 ixgbe_free_all_tx_resources(adapter);
6243 ixgbe_free_all_rx_resources(adapter);
6247 * ixgbe_close - Disables a network interface
6248 * @netdev: network interface device structure
6250 * Returns 0, this is not allowed to fail
6252 * The close entry point is called when an interface is de-activated
6253 * by the OS. The hardware is still under the drivers control, but
6254 * needs to be disabled. A global MAC reset is issued to stop the
6255 * hardware, and all transmit and receive resources are freed.
6257 int ixgbe_close(struct net_device *netdev)
6259 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6261 ixgbe_ptp_stop(adapter);
6263 if (netif_device_present(netdev))
6264 ixgbe_close_suspend(adapter);
6266 ixgbe_fdir_filter_exit(adapter);
6268 ixgbe_release_hw_control(adapter);
6274 static int ixgbe_resume(struct pci_dev *pdev)
6276 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6277 struct net_device *netdev = adapter->netdev;
6280 adapter->hw.hw_addr = adapter->io_addr;
6281 pci_set_power_state(pdev, PCI_D0);
6282 pci_restore_state(pdev);
6284 * pci_restore_state clears dev->state_saved so call
6285 * pci_save_state to restore it.
6287 pci_save_state(pdev);
6289 err = pci_enable_device_mem(pdev);
6291 e_dev_err("Cannot enable PCI device from suspend\n");
6294 smp_mb__before_atomic();
6295 clear_bit(__IXGBE_DISABLED, &adapter->state);
6296 pci_set_master(pdev);
6298 pci_wake_from_d3(pdev, false);
6300 ixgbe_reset(adapter);
6302 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6305 err = ixgbe_init_interrupt_scheme(adapter);
6306 if (!err && netif_running(netdev))
6307 err = ixgbe_open(netdev);
6311 netif_device_attach(netdev);
6316 #endif /* CONFIG_PM */
6318 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6320 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6321 struct net_device *netdev = adapter->netdev;
6322 struct ixgbe_hw *hw = &adapter->hw;
6324 u32 wufc = adapter->wol;
6330 netif_device_detach(netdev);
6332 if (netif_running(netdev))
6333 ixgbe_close_suspend(adapter);
6335 ixgbe_clear_interrupt_scheme(adapter);
6339 retval = pci_save_state(pdev);
6344 if (hw->mac.ops.stop_link_on_d3)
6345 hw->mac.ops.stop_link_on_d3(hw);
6348 ixgbe_set_rx_mode(netdev);
6350 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6351 if (hw->mac.ops.enable_tx_laser)
6352 hw->mac.ops.enable_tx_laser(hw);
6354 /* turn on all-multi mode if wake on multicast is enabled */
6355 if (wufc & IXGBE_WUFC_MC) {
6356 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6357 fctrl |= IXGBE_FCTRL_MPE;
6358 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6361 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6362 ctrl |= IXGBE_CTRL_GIO_DIS;
6363 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6365 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6367 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6368 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6371 switch (hw->mac.type) {
6372 case ixgbe_mac_82598EB:
6373 pci_wake_from_d3(pdev, false);
6375 case ixgbe_mac_82599EB:
6376 case ixgbe_mac_X540:
6377 case ixgbe_mac_X550:
6378 case ixgbe_mac_X550EM_x:
6379 case ixgbe_mac_x550em_a:
6380 pci_wake_from_d3(pdev, !!wufc);
6386 *enable_wake = !!wufc;
6387 if (hw->phy.ops.set_phy_power && !*enable_wake)
6388 hw->phy.ops.set_phy_power(hw, false);
6390 ixgbe_release_hw_control(adapter);
6392 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6393 pci_disable_device(pdev);
6399 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6404 retval = __ixgbe_shutdown(pdev, &wake);
6409 pci_prepare_to_sleep(pdev);
6411 pci_wake_from_d3(pdev, false);
6412 pci_set_power_state(pdev, PCI_D3hot);
6417 #endif /* CONFIG_PM */
6419 static void ixgbe_shutdown(struct pci_dev *pdev)
6423 __ixgbe_shutdown(pdev, &wake);
6425 if (system_state == SYSTEM_POWER_OFF) {
6426 pci_wake_from_d3(pdev, wake);
6427 pci_set_power_state(pdev, PCI_D3hot);
6432 * ixgbe_update_stats - Update the board statistics counters.
6433 * @adapter: board private structure
6435 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6437 struct net_device *netdev = adapter->netdev;
6438 struct ixgbe_hw *hw = &adapter->hw;
6439 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6441 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6442 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6443 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6444 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6446 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6447 test_bit(__IXGBE_RESETTING, &adapter->state))
6450 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6453 for (i = 0; i < adapter->num_rx_queues; i++) {
6454 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6455 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6457 adapter->rsc_total_count = rsc_count;
6458 adapter->rsc_total_flush = rsc_flush;
6461 for (i = 0; i < adapter->num_rx_queues; i++) {
6462 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6463 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6464 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6465 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6466 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6467 bytes += rx_ring->stats.bytes;
6468 packets += rx_ring->stats.packets;
6470 adapter->non_eop_descs = non_eop_descs;
6471 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6472 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6473 adapter->hw_csum_rx_error = hw_csum_rx_error;
6474 netdev->stats.rx_bytes = bytes;
6475 netdev->stats.rx_packets = packets;
6479 /* gather some stats to the adapter struct that are per queue */
6480 for (i = 0; i < adapter->num_tx_queues; i++) {
6481 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6482 restart_queue += tx_ring->tx_stats.restart_queue;
6483 tx_busy += tx_ring->tx_stats.tx_busy;
6484 bytes += tx_ring->stats.bytes;
6485 packets += tx_ring->stats.packets;
6487 adapter->restart_queue = restart_queue;
6488 adapter->tx_busy = tx_busy;
6489 netdev->stats.tx_bytes = bytes;
6490 netdev->stats.tx_packets = packets;
6492 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6494 /* 8 register reads */
6495 for (i = 0; i < 8; i++) {
6496 /* for packet buffers not used, the register should read 0 */
6497 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6499 hwstats->mpc[i] += mpc;
6500 total_mpc += hwstats->mpc[i];
6501 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6502 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6503 switch (hw->mac.type) {
6504 case ixgbe_mac_82598EB:
6505 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6506 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6507 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6508 hwstats->pxonrxc[i] +=
6509 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6511 case ixgbe_mac_82599EB:
6512 case ixgbe_mac_X540:
6513 case ixgbe_mac_X550:
6514 case ixgbe_mac_X550EM_x:
6515 case ixgbe_mac_x550em_a:
6516 hwstats->pxonrxc[i] +=
6517 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6524 /*16 register reads */
6525 for (i = 0; i < 16; i++) {
6526 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6527 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6528 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6529 (hw->mac.type == ixgbe_mac_X540) ||
6530 (hw->mac.type == ixgbe_mac_X550) ||
6531 (hw->mac.type == ixgbe_mac_X550EM_x) ||
6532 (hw->mac.type == ixgbe_mac_x550em_a)) {
6533 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6534 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6535 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6536 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6540 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6541 /* work around hardware counting issue */
6542 hwstats->gprc -= missed_rx;
6544 ixgbe_update_xoff_received(adapter);
6546 /* 82598 hardware only has a 32 bit counter in the high register */
6547 switch (hw->mac.type) {
6548 case ixgbe_mac_82598EB:
6549 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6550 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6551 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6552 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6554 case ixgbe_mac_X540:
6555 case ixgbe_mac_X550:
6556 case ixgbe_mac_X550EM_x:
6557 case ixgbe_mac_x550em_a:
6558 /* OS2BMC stats are X540 and later */
6559 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6560 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6561 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6562 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6563 case ixgbe_mac_82599EB:
6564 for (i = 0; i < 16; i++)
6565 adapter->hw_rx_no_dma_resources +=
6566 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6567 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6568 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6569 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6570 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6571 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6572 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6573 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6574 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6575 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6577 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6578 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6579 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6580 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6581 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6582 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6583 /* Add up per cpu counters for total ddp aloc fail */
6584 if (adapter->fcoe.ddp_pool) {
6585 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6586 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6588 u64 noddp = 0, noddp_ext_buff = 0;
6589 for_each_possible_cpu(cpu) {
6590 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6591 noddp += ddp_pool->noddp;
6592 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6594 hwstats->fcoe_noddp = noddp;
6595 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6597 #endif /* IXGBE_FCOE */
6602 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6603 hwstats->bprc += bprc;
6604 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6605 if (hw->mac.type == ixgbe_mac_82598EB)
6606 hwstats->mprc -= bprc;
6607 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6608 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6609 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6610 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6611 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6612 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6613 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6614 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6615 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6616 hwstats->lxontxc += lxon;
6617 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6618 hwstats->lxofftxc += lxoff;
6619 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6620 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6622 * 82598 errata - tx of flow control packets is included in tx counters
6624 xon_off_tot = lxon + lxoff;
6625 hwstats->gptc -= xon_off_tot;
6626 hwstats->mptc -= xon_off_tot;
6627 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6628 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6629 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6630 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6631 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6632 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6633 hwstats->ptc64 -= xon_off_tot;
6634 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6635 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6636 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6637 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6638 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6639 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6641 /* Fill out the OS statistics structure */
6642 netdev->stats.multicast = hwstats->mprc;
6645 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6646 netdev->stats.rx_dropped = 0;
6647 netdev->stats.rx_length_errors = hwstats->rlec;
6648 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6649 netdev->stats.rx_missed_errors = total_mpc;
6653 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6654 * @adapter: pointer to the device adapter structure
6656 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6658 struct ixgbe_hw *hw = &adapter->hw;
6661 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6664 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6666 /* if interface is down do nothing */
6667 if (test_bit(__IXGBE_DOWN, &adapter->state))
6670 /* do nothing if we are not using signature filters */
6671 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6674 adapter->fdir_overflow++;
6676 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6677 for (i = 0; i < adapter->num_tx_queues; i++)
6678 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6679 &(adapter->tx_ring[i]->state));
6680 /* re-enable flow director interrupts */
6681 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6683 e_err(probe, "failed to finish FDIR re-initialization, "
6684 "ignored adding FDIR ATR filters\n");
6689 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6690 * @adapter: pointer to the device adapter structure
6692 * This function serves two purposes. First it strobes the interrupt lines
6693 * in order to make certain interrupts are occurring. Secondly it sets the
6694 * bits needed to check for TX hangs. As a result we should immediately
6695 * determine if a hang has occurred.
6697 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6699 struct ixgbe_hw *hw = &adapter->hw;
6703 /* If we're down, removing or resetting, just bail */
6704 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6705 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6706 test_bit(__IXGBE_RESETTING, &adapter->state))
6709 /* Force detection of hung controller */
6710 if (netif_carrier_ok(adapter->netdev)) {
6711 for (i = 0; i < adapter->num_tx_queues; i++)
6712 set_check_for_tx_hang(adapter->tx_ring[i]);
6715 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6717 * for legacy and MSI interrupts don't set any bits
6718 * that are enabled for EIAM, because this operation
6719 * would set *both* EIMS and EICS for any bit in EIAM
6721 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6722 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6724 /* get one bit for every active tx/rx interrupt vector */
6725 for (i = 0; i < adapter->num_q_vectors; i++) {
6726 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6727 if (qv->rx.ring || qv->tx.ring)
6732 /* Cause software interrupt to ensure rings are cleaned */
6733 ixgbe_irq_rearm_queues(adapter, eics);
6737 * ixgbe_watchdog_update_link - update the link status
6738 * @adapter: pointer to the device adapter structure
6739 * @link_speed: pointer to a u32 to store the link_speed
6741 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6743 struct ixgbe_hw *hw = &adapter->hw;
6744 u32 link_speed = adapter->link_speed;
6745 bool link_up = adapter->link_up;
6746 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6748 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6751 if (hw->mac.ops.check_link) {
6752 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6754 /* always assume link is up, if no check link function */
6755 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6759 if (adapter->ixgbe_ieee_pfc)
6760 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6762 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6763 hw->mac.ops.fc_enable(hw);
6764 ixgbe_set_rx_drop_en(adapter);
6768 time_after(jiffies, (adapter->link_check_timeout +
6769 IXGBE_TRY_LINK_TIMEOUT))) {
6770 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6771 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6772 IXGBE_WRITE_FLUSH(hw);
6775 adapter->link_up = link_up;
6776 adapter->link_speed = link_speed;
6779 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6781 #ifdef CONFIG_IXGBE_DCB
6782 struct net_device *netdev = adapter->netdev;
6783 struct dcb_app app = {
6784 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6789 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6790 up = dcb_ieee_getapp_mask(netdev, &app);
6792 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6796 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
6798 if (netif_is_macvlan(upper)) {
6799 struct macvlan_dev *vlan = netdev_priv(upper);
6802 netif_tx_wake_all_queues(upper);
6809 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6810 * print link up message
6811 * @adapter: pointer to the device adapter structure
6813 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6815 struct net_device *netdev = adapter->netdev;
6816 struct ixgbe_hw *hw = &adapter->hw;
6817 u32 link_speed = adapter->link_speed;
6818 const char *speed_str;
6819 bool flow_rx, flow_tx;
6821 /* only continue if link was previously down */
6822 if (netif_carrier_ok(netdev))
6825 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6827 switch (hw->mac.type) {
6828 case ixgbe_mac_82598EB: {
6829 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6830 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6831 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6832 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6835 case ixgbe_mac_X540:
6836 case ixgbe_mac_X550:
6837 case ixgbe_mac_X550EM_x:
6838 case ixgbe_mac_x550em_a:
6839 case ixgbe_mac_82599EB: {
6840 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6841 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6842 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6843 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6852 adapter->last_rx_ptp_check = jiffies;
6854 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6855 ixgbe_ptp_start_cyclecounter(adapter);
6857 switch (link_speed) {
6858 case IXGBE_LINK_SPEED_10GB_FULL:
6859 speed_str = "10 Gbps";
6861 case IXGBE_LINK_SPEED_2_5GB_FULL:
6862 speed_str = "2.5 Gbps";
6864 case IXGBE_LINK_SPEED_1GB_FULL:
6865 speed_str = "1 Gbps";
6867 case IXGBE_LINK_SPEED_100_FULL:
6868 speed_str = "100 Mbps";
6870 case IXGBE_LINK_SPEED_10_FULL:
6871 speed_str = "10 Mbps";
6874 speed_str = "unknown speed";
6877 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6878 ((flow_rx && flow_tx) ? "RX/TX" :
6880 (flow_tx ? "TX" : "None"))));
6882 netif_carrier_on(netdev);
6883 ixgbe_check_vf_rate_limit(adapter);
6885 /* enable transmits */
6886 netif_tx_wake_all_queues(adapter->netdev);
6888 /* enable any upper devices */
6890 netdev_walk_all_upper_dev_rcu(adapter->netdev,
6891 ixgbe_enable_macvlan, NULL);
6894 /* update the default user priority for VFs */
6895 ixgbe_update_default_up(adapter);
6897 /* ping all the active vfs to let them know link has changed */
6898 ixgbe_ping_all_vfs(adapter);
6902 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6903 * print link down message
6904 * @adapter: pointer to the adapter structure
6906 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6908 struct net_device *netdev = adapter->netdev;
6909 struct ixgbe_hw *hw = &adapter->hw;
6911 adapter->link_up = false;
6912 adapter->link_speed = 0;
6914 /* only continue if link was up previously */
6915 if (!netif_carrier_ok(netdev))
6918 /* poll for SFP+ cable when link is down */
6919 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6920 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6922 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6923 ixgbe_ptp_start_cyclecounter(adapter);
6925 e_info(drv, "NIC Link is Down\n");
6926 netif_carrier_off(netdev);
6928 /* ping all the active vfs to let them know link has changed */
6929 ixgbe_ping_all_vfs(adapter);
6932 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6936 for (i = 0; i < adapter->num_tx_queues; i++) {
6937 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6939 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6946 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6948 struct ixgbe_hw *hw = &adapter->hw;
6949 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6950 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6954 if (!adapter->num_vfs)
6957 /* resetting the PF is only needed for MAC before X550 */
6958 if (hw->mac.type >= ixgbe_mac_X550)
6961 for (i = 0; i < adapter->num_vfs; i++) {
6962 for (j = 0; j < q_per_pool; j++) {
6965 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6966 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6977 * ixgbe_watchdog_flush_tx - flush queues on link down
6978 * @adapter: pointer to the device adapter structure
6980 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6982 if (!netif_carrier_ok(adapter->netdev)) {
6983 if (ixgbe_ring_tx_pending(adapter) ||
6984 ixgbe_vf_tx_pending(adapter)) {
6985 /* We've lost link, so the controller stops DMA,
6986 * but we've got queued Tx work that's never going
6987 * to get done, so reset controller to flush Tx.
6988 * (Do the reset outside of interrupt context).
6990 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6991 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6996 #ifdef CONFIG_PCI_IOV
6997 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6998 struct pci_dev *vfdev)
7000 if (!pci_wait_for_pending_transaction(vfdev))
7001 e_dev_warn("Issuing VFLR with pending transactions\n");
7003 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
7004 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
7009 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7011 struct ixgbe_hw *hw = &adapter->hw;
7012 struct pci_dev *pdev = adapter->pdev;
7016 if (!(netif_carrier_ok(adapter->netdev)))
7019 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7020 if (gpc) /* If incrementing then no need for the check below */
7022 /* Check to see if a bad DMA write target from an errant or
7023 * malicious VF has caused a PCIe error. If so then we can
7024 * issue a VFLR to the offending VF(s) and then resume without
7025 * requesting a full slot reset.
7031 /* check status reg for all VFs owned by this PF */
7032 for (vf = 0; vf < adapter->num_vfs; ++vf) {
7033 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7038 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7039 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7040 status_reg & PCI_STATUS_REC_MASTER_ABORT)
7041 ixgbe_issue_vf_flr(adapter, vfdev);
7045 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7049 /* Do not perform spoof check for 82598 or if not in IOV mode */
7050 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7051 adapter->num_vfs == 0)
7054 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7057 * ssvpc register is cleared on read, if zero then no
7058 * spoofed packets in the last interval.
7063 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7066 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7071 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7074 #endif /* CONFIG_PCI_IOV */
7078 * ixgbe_watchdog_subtask - check and bring link up
7079 * @adapter: pointer to the device adapter structure
7081 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7083 /* if interface is down, removing or resetting, do nothing */
7084 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7085 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7086 test_bit(__IXGBE_RESETTING, &adapter->state))
7089 ixgbe_watchdog_update_link(adapter);
7091 if (adapter->link_up)
7092 ixgbe_watchdog_link_is_up(adapter);
7094 ixgbe_watchdog_link_is_down(adapter);
7096 ixgbe_check_for_bad_vf(adapter);
7097 ixgbe_spoof_check(adapter);
7098 ixgbe_update_stats(adapter);
7100 ixgbe_watchdog_flush_tx(adapter);
7104 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7105 * @adapter: the ixgbe adapter structure
7107 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7109 struct ixgbe_hw *hw = &adapter->hw;
7112 /* not searching for SFP so there is nothing to do here */
7113 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7114 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7117 if (adapter->sfp_poll_time &&
7118 time_after(adapter->sfp_poll_time, jiffies))
7119 return; /* If not yet time to poll for SFP */
7121 /* someone else is in init, wait until next service event */
7122 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7125 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7127 err = hw->phy.ops.identify_sfp(hw);
7128 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7131 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7132 /* If no cable is present, then we need to reset
7133 * the next time we find a good cable. */
7134 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7141 /* exit if reset not needed */
7142 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7145 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7148 * A module may be identified correctly, but the EEPROM may not have
7149 * support for that module. setup_sfp() will fail in that case, so
7150 * we should not allow that module to load.
7152 if (hw->mac.type == ixgbe_mac_82598EB)
7153 err = hw->phy.ops.reset(hw);
7155 err = hw->mac.ops.setup_sfp(hw);
7157 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7160 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7161 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7164 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7166 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7167 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7168 e_dev_err("failed to initialize because an unsupported "
7169 "SFP+ module type was detected.\n");
7170 e_dev_err("Reload the driver after installing a "
7171 "supported module.\n");
7172 unregister_netdev(adapter->netdev);
7177 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7178 * @adapter: the ixgbe adapter structure
7180 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7182 struct ixgbe_hw *hw = &adapter->hw;
7184 bool autoneg = false;
7186 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7189 /* someone else is in init, wait until next service event */
7190 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7193 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7195 speed = hw->phy.autoneg_advertised;
7196 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7197 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7199 /* setup the highest link when no autoneg */
7201 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7202 speed = IXGBE_LINK_SPEED_10GB_FULL;
7206 if (hw->mac.ops.setup_link)
7207 hw->mac.ops.setup_link(hw, speed, true);
7209 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7210 adapter->link_check_timeout = jiffies;
7211 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7215 * ixgbe_service_timer - Timer Call-back
7216 * @data: pointer to adapter cast into an unsigned long
7218 static void ixgbe_service_timer(unsigned long data)
7220 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7221 unsigned long next_event_offset;
7223 /* poll faster when waiting for link */
7224 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7225 next_event_offset = HZ / 10;
7227 next_event_offset = HZ * 2;
7229 /* Reset the timer */
7230 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7232 ixgbe_service_event_schedule(adapter);
7235 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7237 struct ixgbe_hw *hw = &adapter->hw;
7240 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7243 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7245 if (!hw->phy.ops.handle_lasi)
7248 status = hw->phy.ops.handle_lasi(&adapter->hw);
7249 if (status != IXGBE_ERR_OVERTEMP)
7252 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7255 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7257 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7260 /* If we're already down, removing or resetting, just bail */
7261 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7262 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7263 test_bit(__IXGBE_RESETTING, &adapter->state))
7266 ixgbe_dump(adapter);
7267 netdev_err(adapter->netdev, "Reset adapter\n");
7268 adapter->tx_timeout_count++;
7271 ixgbe_reinit_locked(adapter);
7276 * ixgbe_service_task - manages and runs subtasks
7277 * @work: pointer to work_struct containing our data
7279 static void ixgbe_service_task(struct work_struct *work)
7281 struct ixgbe_adapter *adapter = container_of(work,
7282 struct ixgbe_adapter,
7284 if (ixgbe_removed(adapter->hw.hw_addr)) {
7285 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7287 ixgbe_down(adapter);
7290 ixgbe_service_event_complete(adapter);
7293 if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7295 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7296 udp_tunnel_get_rx_info(adapter->netdev);
7299 ixgbe_reset_subtask(adapter);
7300 ixgbe_phy_interrupt_subtask(adapter);
7301 ixgbe_sfp_detection_subtask(adapter);
7302 ixgbe_sfp_link_config_subtask(adapter);
7303 ixgbe_check_overtemp_subtask(adapter);
7304 ixgbe_watchdog_subtask(adapter);
7305 ixgbe_fdir_reinit_subtask(adapter);
7306 ixgbe_check_hang_subtask(adapter);
7308 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7309 ixgbe_ptp_overflow_check(adapter);
7310 ixgbe_ptp_rx_hang(adapter);
7313 ixgbe_service_event_complete(adapter);
7316 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7317 struct ixgbe_tx_buffer *first,
7320 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7321 struct sk_buff *skb = first->skb;
7331 u32 paylen, l4_offset;
7334 if (skb->ip_summed != CHECKSUM_PARTIAL)
7337 if (!skb_is_gso(skb))
7340 err = skb_cow_head(skb, 0);
7344 ip.hdr = skb_network_header(skb);
7345 l4.hdr = skb_checksum_start(skb);
7347 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7348 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7350 /* initialize outer IP header fields */
7351 if (ip.v4->version == 4) {
7352 unsigned char *csum_start = skb_checksum_start(skb);
7353 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7355 /* IP header will have to cancel out any data that
7356 * is not a part of the outer IP header
7358 ip.v4->check = csum_fold(csum_partial(trans_start,
7359 csum_start - trans_start,
7361 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7364 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7365 IXGBE_TX_FLAGS_CSUM |
7366 IXGBE_TX_FLAGS_IPV4;
7368 ip.v6->payload_len = 0;
7369 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7370 IXGBE_TX_FLAGS_CSUM;
7373 /* determine offset of inner transport header */
7374 l4_offset = l4.hdr - skb->data;
7376 /* compute length of segmentation header */
7377 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7379 /* remove payload length from inner checksum */
7380 paylen = skb->len - l4_offset;
7381 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7383 /* update gso size and bytecount with header size */
7384 first->gso_segs = skb_shinfo(skb)->gso_segs;
7385 first->bytecount += (first->gso_segs - 1) * *hdr_len;
7387 /* mss_l4len_id: use 0 as index for TSO */
7388 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7389 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7391 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7392 vlan_macip_lens = l4.hdr - ip.hdr;
7393 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7394 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7396 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7402 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7404 unsigned int offset = 0;
7406 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7408 return offset == skb_checksum_start_offset(skb);
7411 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7412 struct ixgbe_tx_buffer *first)
7414 struct sk_buff *skb = first->skb;
7415 u32 vlan_macip_lens = 0;
7418 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7420 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7421 IXGBE_TX_FLAGS_CC)))
7426 switch (skb->csum_offset) {
7427 case offsetof(struct tcphdr, check):
7428 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7430 case offsetof(struct udphdr, check):
7432 case offsetof(struct sctphdr, checksum):
7433 /* validate that this is actually an SCTP request */
7434 if (((first->protocol == htons(ETH_P_IP)) &&
7435 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7436 ((first->protocol == htons(ETH_P_IPV6)) &&
7437 ixgbe_ipv6_csum_is_sctp(skb))) {
7438 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7443 skb_checksum_help(skb);
7447 /* update TX checksum flag */
7448 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7449 vlan_macip_lens = skb_checksum_start_offset(skb) -
7450 skb_network_offset(skb);
7452 /* vlan_macip_lens: MACLEN, VLAN tag */
7453 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7454 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7456 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7459 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7460 ((_flag <= _result) ? \
7461 ((u32)(_input & _flag) * (_result / _flag)) : \
7462 ((u32)(_input & _flag) / (_flag / _result)))
7464 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7466 /* set type for advanced descriptor with frame checksum insertion */
7467 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7468 IXGBE_ADVTXD_DCMD_DEXT |
7469 IXGBE_ADVTXD_DCMD_IFCS;
7471 /* set HW vlan bit if vlan is present */
7472 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7473 IXGBE_ADVTXD_DCMD_VLE);
7475 /* set segmentation enable bits for TSO/FSO */
7476 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7477 IXGBE_ADVTXD_DCMD_TSE);
7479 /* set timestamp bit if present */
7480 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7481 IXGBE_ADVTXD_MAC_TSTAMP);
7483 /* insert frame checksum */
7484 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7489 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7490 u32 tx_flags, unsigned int paylen)
7492 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7494 /* enable L4 checksum for TSO and TX checksum offload */
7495 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7496 IXGBE_TX_FLAGS_CSUM,
7497 IXGBE_ADVTXD_POPTS_TXSM);
7499 /* enble IPv4 checksum for TSO */
7500 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7501 IXGBE_TX_FLAGS_IPV4,
7502 IXGBE_ADVTXD_POPTS_IXSM);
7505 * Check Context must be set if Tx switch is enabled, which it
7506 * always is for case where virtual functions are running
7508 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7512 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7515 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7517 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7519 /* Herbert's original patch had:
7520 * smp_mb__after_netif_stop_queue();
7521 * but since that doesn't exist yet, just open code it.
7525 /* We need to check again in a case another CPU has just
7526 * made room available.
7528 if (likely(ixgbe_desc_unused(tx_ring) < size))
7531 /* A reprieve! - use start_queue because it doesn't call schedule */
7532 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7533 ++tx_ring->tx_stats.restart_queue;
7537 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7539 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7542 return __ixgbe_maybe_stop_tx(tx_ring, size);
7545 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7548 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7549 struct ixgbe_tx_buffer *first,
7552 struct sk_buff *skb = first->skb;
7553 struct ixgbe_tx_buffer *tx_buffer;
7554 union ixgbe_adv_tx_desc *tx_desc;
7555 struct skb_frag_struct *frag;
7557 unsigned int data_len, size;
7558 u32 tx_flags = first->tx_flags;
7559 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7560 u16 i = tx_ring->next_to_use;
7562 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7564 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7566 size = skb_headlen(skb);
7567 data_len = skb->data_len;
7570 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7571 if (data_len < sizeof(struct fcoe_crc_eof)) {
7572 size -= sizeof(struct fcoe_crc_eof) - data_len;
7575 data_len -= sizeof(struct fcoe_crc_eof);
7580 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7584 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7585 if (dma_mapping_error(tx_ring->dev, dma))
7588 /* record length, and DMA address */
7589 dma_unmap_len_set(tx_buffer, len, size);
7590 dma_unmap_addr_set(tx_buffer, dma, dma);
7592 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7594 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7595 tx_desc->read.cmd_type_len =
7596 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7600 if (i == tx_ring->count) {
7601 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7604 tx_desc->read.olinfo_status = 0;
7606 dma += IXGBE_MAX_DATA_PER_TXD;
7607 size -= IXGBE_MAX_DATA_PER_TXD;
7609 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7612 if (likely(!data_len))
7615 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7619 if (i == tx_ring->count) {
7620 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7623 tx_desc->read.olinfo_status = 0;
7626 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7628 size = skb_frag_size(frag);
7632 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7635 tx_buffer = &tx_ring->tx_buffer_info[i];
7638 /* write last descriptor with RS and EOP bits */
7639 cmd_type |= size | IXGBE_TXD_CMD;
7640 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7642 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7644 /* set the timestamp */
7645 first->time_stamp = jiffies;
7648 * Force memory writes to complete before letting h/w know there
7649 * are new descriptors to fetch. (Only applicable for weak-ordered
7650 * memory model archs, such as IA-64).
7652 * We also need this memory barrier to make certain all of the
7653 * status bits have been updated before next_to_watch is written.
7657 /* set next_to_watch value indicating a packet is present */
7658 first->next_to_watch = tx_desc;
7661 if (i == tx_ring->count)
7664 tx_ring->next_to_use = i;
7666 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7668 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7669 writel(i, tx_ring->tail);
7671 /* we need this if more than one processor can write to our tail
7672 * at a time, it synchronizes IO on IA64/Altix systems
7679 dev_err(tx_ring->dev, "TX DMA map failed\n");
7681 /* clear dma mappings for failed tx_buffer_info map */
7683 tx_buffer = &tx_ring->tx_buffer_info[i];
7684 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7685 if (tx_buffer == first)
7692 tx_ring->next_to_use = i;
7695 static void ixgbe_atr(struct ixgbe_ring *ring,
7696 struct ixgbe_tx_buffer *first)
7698 struct ixgbe_q_vector *q_vector = ring->q_vector;
7699 union ixgbe_atr_hash_dword input = { .dword = 0 };
7700 union ixgbe_atr_hash_dword common = { .dword = 0 };
7702 unsigned char *network;
7704 struct ipv6hdr *ipv6;
7708 struct sk_buff *skb;
7712 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7716 /* do nothing if sampling is disabled */
7717 if (!ring->atr_sample_rate)
7722 /* currently only IPv4/IPv6 with TCP is supported */
7723 if ((first->protocol != htons(ETH_P_IP)) &&
7724 (first->protocol != htons(ETH_P_IPV6)))
7727 /* snag network header to get L4 type and address */
7729 hdr.network = skb_network_header(skb);
7730 if (unlikely(hdr.network <= skb->data))
7732 if (skb->encapsulation &&
7733 first->protocol == htons(ETH_P_IP) &&
7734 hdr.ipv4->protocol == IPPROTO_UDP) {
7735 struct ixgbe_adapter *adapter = q_vector->adapter;
7737 if (unlikely(skb_tail_pointer(skb) < hdr.network +
7741 /* verify the port is recognized as VXLAN */
7742 if (adapter->vxlan_port &&
7743 udp_hdr(skb)->dest == adapter->vxlan_port)
7744 hdr.network = skb_inner_network_header(skb);
7746 if (adapter->geneve_port &&
7747 udp_hdr(skb)->dest == adapter->geneve_port)
7748 hdr.network = skb_inner_network_header(skb);
7751 /* Make sure we have at least [minimum IPv4 header + TCP]
7752 * or [IPv6 header] bytes
7754 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
7757 /* Currently only IPv4/IPv6 with TCP is supported */
7758 switch (hdr.ipv4->version) {
7760 /* access ihl as u8 to avoid unaligned access on ia64 */
7761 hlen = (hdr.network[0] & 0x0F) << 2;
7762 l4_proto = hdr.ipv4->protocol;
7765 hlen = hdr.network - skb->data;
7766 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7767 hlen -= hdr.network - skb->data;
7773 if (l4_proto != IPPROTO_TCP)
7776 if (unlikely(skb_tail_pointer(skb) < hdr.network +
7777 hlen + sizeof(struct tcphdr)))
7780 th = (struct tcphdr *)(hdr.network + hlen);
7782 /* skip this packet since the socket is closing */
7786 /* sample on all syn packets or once every atr sample count */
7787 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7790 /* reset sample count */
7791 ring->atr_count = 0;
7793 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7796 * src and dst are inverted, think how the receiver sees them
7798 * The input is broken into two sections, a non-compressed section
7799 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7800 * is XORed together and stored in the compressed dword.
7802 input.formatted.vlan_id = vlan_id;
7805 * since src port and flex bytes occupy the same word XOR them together
7806 * and write the value to source port portion of compressed dword
7808 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7809 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7811 common.port.src ^= th->dest ^ first->protocol;
7812 common.port.dst ^= th->source;
7814 switch (hdr.ipv4->version) {
7816 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7817 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7820 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7821 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7822 hdr.ipv6->saddr.s6_addr32[1] ^
7823 hdr.ipv6->saddr.s6_addr32[2] ^
7824 hdr.ipv6->saddr.s6_addr32[3] ^
7825 hdr.ipv6->daddr.s6_addr32[0] ^
7826 hdr.ipv6->daddr.s6_addr32[1] ^
7827 hdr.ipv6->daddr.s6_addr32[2] ^
7828 hdr.ipv6->daddr.s6_addr32[3];
7834 if (hdr.network != skb_network_header(skb))
7835 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7837 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7838 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7839 input, common, ring->queue_index);
7842 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7843 void *accel_priv, select_queue_fallback_t fallback)
7845 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7847 struct ixgbe_adapter *adapter;
7848 struct ixgbe_ring_feature *f;
7853 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7858 * only execute the code below if protocol is FCoE
7859 * or FIP and we have FCoE enabled on the adapter
7861 switch (vlan_get_protocol(skb)) {
7862 case htons(ETH_P_FCOE):
7863 case htons(ETH_P_FIP):
7864 adapter = netdev_priv(dev);
7866 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7869 return fallback(dev, skb);
7872 f = &adapter->ring_feature[RING_F_FCOE];
7874 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7877 while (txq >= f->indices)
7880 return txq + f->offset;
7882 return fallback(dev, skb);
7886 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7887 struct ixgbe_adapter *adapter,
7888 struct ixgbe_ring *tx_ring)
7890 struct ixgbe_tx_buffer *first;
7894 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7895 __be16 protocol = skb->protocol;
7899 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7900 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7901 * + 2 desc gap to keep tail from touching head,
7902 * + 1 desc for context descriptor,
7903 * otherwise try next time
7905 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7906 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7908 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7909 tx_ring->tx_stats.tx_busy++;
7910 return NETDEV_TX_BUSY;
7913 /* record the location of the first descriptor for this packet */
7914 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7916 first->bytecount = skb->len;
7917 first->gso_segs = 1;
7919 /* if we have a HW VLAN tag being added default to the HW one */
7920 if (skb_vlan_tag_present(skb)) {
7921 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7922 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7923 /* else if it is a SW VLAN check the next protocol and store the tag */
7924 } else if (protocol == htons(ETH_P_8021Q)) {
7925 struct vlan_hdr *vhdr, _vhdr;
7926 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7930 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7931 IXGBE_TX_FLAGS_VLAN_SHIFT;
7932 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7934 protocol = vlan_get_protocol(skb);
7936 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7937 adapter->ptp_clock &&
7938 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7940 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7941 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7943 /* schedule check for Tx timestamp */
7944 adapter->ptp_tx_skb = skb_get(skb);
7945 adapter->ptp_tx_start = jiffies;
7946 schedule_work(&adapter->ptp_tx_work);
7949 skb_tx_timestamp(skb);
7951 #ifdef CONFIG_PCI_IOV
7953 * Use the l2switch_enable flag - would be false if the DMA
7954 * Tx switch had been disabled.
7956 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7957 tx_flags |= IXGBE_TX_FLAGS_CC;
7960 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7961 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7962 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7963 (skb->priority != TC_PRIO_CONTROL))) {
7964 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7965 tx_flags |= (skb->priority & 0x7) <<
7966 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7967 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7968 struct vlan_ethhdr *vhdr;
7970 if (skb_cow_head(skb, 0))
7972 vhdr = (struct vlan_ethhdr *)skb->data;
7973 vhdr->h_vlan_TCI = htons(tx_flags >>
7974 IXGBE_TX_FLAGS_VLAN_SHIFT);
7976 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7980 /* record initial flags and protocol */
7981 first->tx_flags = tx_flags;
7982 first->protocol = protocol;
7985 /* setup tx offload for FCoE */
7986 if ((protocol == htons(ETH_P_FCOE)) &&
7987 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7988 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7995 #endif /* IXGBE_FCOE */
7996 tso = ixgbe_tso(tx_ring, first, &hdr_len);
8000 ixgbe_tx_csum(tx_ring, first);
8002 /* add the ATR filter if ATR is on */
8003 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8004 ixgbe_atr(tx_ring, first);
8008 #endif /* IXGBE_FCOE */
8009 ixgbe_tx_map(tx_ring, first, hdr_len);
8011 return NETDEV_TX_OK;
8014 dev_kfree_skb_any(first->skb);
8017 return NETDEV_TX_OK;
8020 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8021 struct net_device *netdev,
8022 struct ixgbe_ring *ring)
8024 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8025 struct ixgbe_ring *tx_ring;
8028 * The minimum packet size for olinfo paylen is 17 so pad the skb
8029 * in order to meet this minimum size requirement.
8031 if (skb_put_padto(skb, 17))
8032 return NETDEV_TX_OK;
8034 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8036 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8039 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8040 struct net_device *netdev)
8042 return __ixgbe_xmit_frame(skb, netdev, NULL);
8046 * ixgbe_set_mac - Change the Ethernet Address of the NIC
8047 * @netdev: network interface device structure
8048 * @p: pointer to an address structure
8050 * Returns 0 on success, negative on failure
8052 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8054 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8055 struct ixgbe_hw *hw = &adapter->hw;
8056 struct sockaddr *addr = p;
8058 if (!is_valid_ether_addr(addr->sa_data))
8059 return -EADDRNOTAVAIL;
8061 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8062 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8064 ixgbe_mac_set_default_filter(adapter);
8070 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8072 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8073 struct ixgbe_hw *hw = &adapter->hw;
8077 if (prtad != hw->phy.mdio.prtad)
8079 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8085 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8086 u16 addr, u16 value)
8088 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8089 struct ixgbe_hw *hw = &adapter->hw;
8091 if (prtad != hw->phy.mdio.prtad)
8093 return hw->phy.ops.write_reg(hw, addr, devad, value);
8096 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8098 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8102 return ixgbe_ptp_set_ts_config(adapter, req);
8104 return ixgbe_ptp_get_ts_config(adapter, req);
8106 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8111 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8113 * @netdev: network interface device structure
8115 * Returns non-zero on failure
8117 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8120 struct ixgbe_adapter *adapter = netdev_priv(dev);
8121 struct ixgbe_hw *hw = &adapter->hw;
8123 if (is_valid_ether_addr(hw->mac.san_addr)) {
8125 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8128 /* update SAN MAC vmdq pool selection */
8129 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8135 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8137 * @netdev: network interface device structure
8139 * Returns non-zero on failure
8141 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8144 struct ixgbe_adapter *adapter = netdev_priv(dev);
8145 struct ixgbe_mac_info *mac = &adapter->hw.mac;
8147 if (is_valid_ether_addr(mac->san_addr)) {
8149 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8155 #ifdef CONFIG_NET_POLL_CONTROLLER
8157 * Polling 'interrupt' - used by things like netconsole to send skbs
8158 * without having to re-enable interrupts. It's not called while
8159 * the interrupt routine is executing.
8161 static void ixgbe_netpoll(struct net_device *netdev)
8163 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8166 /* if interface is down do nothing */
8167 if (test_bit(__IXGBE_DOWN, &adapter->state))
8170 /* loop through and schedule all active queues */
8171 for (i = 0; i < adapter->num_q_vectors; i++)
8172 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8176 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
8177 struct rtnl_link_stats64 *stats)
8179 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8183 for (i = 0; i < adapter->num_rx_queues; i++) {
8184 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8190 start = u64_stats_fetch_begin_irq(&ring->syncp);
8191 packets = ring->stats.packets;
8192 bytes = ring->stats.bytes;
8193 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8194 stats->rx_packets += packets;
8195 stats->rx_bytes += bytes;
8199 for (i = 0; i < adapter->num_tx_queues; i++) {
8200 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8206 start = u64_stats_fetch_begin_irq(&ring->syncp);
8207 packets = ring->stats.packets;
8208 bytes = ring->stats.bytes;
8209 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8210 stats->tx_packets += packets;
8211 stats->tx_bytes += bytes;
8215 /* following stats updated by ixgbe_watchdog_task() */
8216 stats->multicast = netdev->stats.multicast;
8217 stats->rx_errors = netdev->stats.rx_errors;
8218 stats->rx_length_errors = netdev->stats.rx_length_errors;
8219 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8220 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8224 #ifdef CONFIG_IXGBE_DCB
8226 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8227 * @adapter: pointer to ixgbe_adapter
8228 * @tc: number of traffic classes currently enabled
8230 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8231 * 802.1Q priority maps to a packet buffer that exists.
8233 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8235 struct ixgbe_hw *hw = &adapter->hw;
8239 /* 82598 have a static priority to TC mapping that can not
8240 * be changed so no validation is needed.
8242 if (hw->mac.type == ixgbe_mac_82598EB)
8245 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8248 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8249 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8251 /* If up2tc is out of bounds default to zero */
8253 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8257 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8263 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8264 * @adapter: Pointer to adapter struct
8266 * Populate the netdev user priority to tc map
8268 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8270 struct net_device *dev = adapter->netdev;
8271 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8272 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8275 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8278 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8279 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8281 tc = ets->prio_tc[prio];
8283 netdev_set_prio_tc_map(dev, prio, tc);
8287 #endif /* CONFIG_IXGBE_DCB */
8289 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8291 * @netdev: net device to configure
8292 * @tc: number of traffic classes to enable
8294 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8296 struct ixgbe_adapter *adapter = netdev_priv(dev);
8297 struct ixgbe_hw *hw = &adapter->hw;
8300 /* Hardware supports up to 8 traffic classes */
8301 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8304 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8307 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8308 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8311 /* Hardware has to reinitialize queues and interrupts to
8312 * match packet buffer alignment. Unfortunately, the
8313 * hardware is not flexible enough to do this dynamically.
8315 if (netif_running(dev))
8318 ixgbe_reset(adapter);
8320 ixgbe_clear_interrupt_scheme(adapter);
8322 #ifdef CONFIG_IXGBE_DCB
8324 netdev_set_num_tc(dev, tc);
8325 ixgbe_set_prio_tc_map(adapter);
8327 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8329 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8330 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8331 adapter->hw.fc.requested_mode = ixgbe_fc_none;
8334 netdev_reset_tc(dev);
8336 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8337 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8339 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8341 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8342 adapter->dcb_cfg.pfc_mode_enable = false;
8345 ixgbe_validate_rtr(adapter, tc);
8347 #endif /* CONFIG_IXGBE_DCB */
8348 ixgbe_init_interrupt_scheme(adapter);
8350 if (netif_running(dev))
8351 return ixgbe_open(dev);
8356 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8357 struct tc_cls_u32_offload *cls)
8359 u32 hdl = cls->knode.handle;
8360 u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8361 u32 loc = cls->knode.handle & 0xfffff;
8363 struct ixgbe_jump_table *jump = NULL;
8365 if (loc > IXGBE_MAX_HW_ENTRIES)
8368 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8371 /* Clear this filter in the link data it is associated with */
8372 if (uhtid != 0x800) {
8373 jump = adapter->jump_tables[uhtid];
8376 if (!test_bit(loc - 1, jump->child_loc_map))
8378 clear_bit(loc - 1, jump->child_loc_map);
8381 /* Check if the filter being deleted is a link */
8382 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8383 jump = adapter->jump_tables[i];
8384 if (jump && jump->link_hdl == hdl) {
8385 /* Delete filters in the hardware in the child hash
8386 * table associated with this link
8388 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8389 if (!test_bit(j, jump->child_loc_map))
8391 spin_lock(&adapter->fdir_perfect_lock);
8392 err = ixgbe_update_ethtool_fdir_entry(adapter,
8395 spin_unlock(&adapter->fdir_perfect_lock);
8396 clear_bit(j, jump->child_loc_map);
8398 /* Remove resources for this link */
8402 adapter->jump_tables[i] = NULL;
8407 spin_lock(&adapter->fdir_perfect_lock);
8408 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8409 spin_unlock(&adapter->fdir_perfect_lock);
8413 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8415 struct tc_cls_u32_offload *cls)
8417 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8419 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8422 /* This ixgbe devices do not support hash tables at the moment
8423 * so abort when given hash tables.
8425 if (cls->hnode.divisor > 0)
8428 set_bit(uhtid - 1, &adapter->tables);
8432 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8433 struct tc_cls_u32_offload *cls)
8435 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8437 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8440 clear_bit(uhtid - 1, &adapter->tables);
8444 #ifdef CONFIG_NET_CLS_ACT
8445 struct upper_walk_data {
8446 struct ixgbe_adapter *adapter;
8452 static int get_macvlan_queue(struct net_device *upper, void *_data)
8454 if (netif_is_macvlan(upper)) {
8455 struct macvlan_dev *dfwd = netdev_priv(upper);
8456 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8457 struct upper_walk_data *data = _data;
8458 struct ixgbe_adapter *adapter = data->adapter;
8459 int ifindex = data->ifindex;
8461 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8462 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8463 data->action = data->queue;
8471 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8472 u8 *queue, u64 *action)
8474 unsigned int num_vfs = adapter->num_vfs, vf;
8475 struct upper_walk_data data;
8476 struct net_device *upper;
8478 /* redirect to a SRIOV VF */
8479 for (vf = 0; vf < num_vfs; ++vf) {
8480 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8481 if (upper->ifindex == ifindex) {
8482 if (adapter->num_rx_pools > 1)
8485 *queue = vf * adapter->num_rx_queues_per_pool;
8488 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8493 /* redirect to a offloaded macvlan netdev */
8494 data.adapter = adapter;
8495 data.ifindex = ifindex;
8498 if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8499 get_macvlan_queue, &data)) {
8500 *action = data.action;
8501 *queue = data.queue;
8509 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8510 struct tcf_exts *exts, u64 *action, u8 *queue)
8512 const struct tc_action *a;
8516 if (tc_no_actions(exts))
8519 tcf_exts_to_list(exts, &actions);
8520 list_for_each_entry(a, &actions, list) {
8523 if (is_tcf_gact_shot(a)) {
8524 *action = IXGBE_FDIR_DROP_QUEUE;
8525 *queue = IXGBE_FDIR_DROP_QUEUE;
8529 /* Redirect to a VF or a offloaded macvlan */
8530 if (is_tcf_mirred_egress_redirect(a)) {
8531 int ifindex = tcf_mirred_ifindex(a);
8533 err = handle_redirect_action(adapter, ifindex, queue,
8543 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8544 struct tcf_exts *exts, u64 *action, u8 *queue)
8548 #endif /* CONFIG_NET_CLS_ACT */
8550 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8551 union ixgbe_atr_input *mask,
8552 struct tc_cls_u32_offload *cls,
8553 struct ixgbe_mat_field *field_ptr,
8554 struct ixgbe_nexthdr *nexthdr)
8558 bool found_entry = false, found_jump_field = false;
8560 for (i = 0; i < cls->knode.sel->nkeys; i++) {
8561 off = cls->knode.sel->keys[i].off;
8562 val = cls->knode.sel->keys[i].val;
8563 m = cls->knode.sel->keys[i].mask;
8565 for (j = 0; field_ptr[j].val; j++) {
8566 if (field_ptr[j].off == off) {
8567 field_ptr[j].val(input, mask, val, m);
8568 input->filter.formatted.flow_type |=
8575 if (nexthdr->off == cls->knode.sel->keys[i].off &&
8576 nexthdr->val == cls->knode.sel->keys[i].val &&
8577 nexthdr->mask == cls->knode.sel->keys[i].mask)
8578 found_jump_field = true;
8584 if (nexthdr && !found_jump_field)
8590 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8591 IXGBE_ATR_L4TYPE_MASK;
8593 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8594 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8599 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8601 struct tc_cls_u32_offload *cls)
8603 u32 loc = cls->knode.handle & 0xfffff;
8604 struct ixgbe_hw *hw = &adapter->hw;
8605 struct ixgbe_mat_field *field_ptr;
8606 struct ixgbe_fdir_filter *input = NULL;
8607 union ixgbe_atr_input *mask = NULL;
8608 struct ixgbe_jump_table *jump = NULL;
8609 int i, err = -EINVAL;
8611 u32 uhtid, link_uhtid;
8613 uhtid = TC_U32_USERHTID(cls->knode.handle);
8614 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8616 /* At the moment cls_u32 jumps to network layer and skips past
8617 * L2 headers. The canonical method to match L2 frames is to use
8618 * negative values. However this is error prone at best but really
8619 * just broken because there is no way to "know" what sort of hdr
8620 * is in front of the network layer. Fix cls_u32 to support L2
8621 * headers when needed.
8623 if (protocol != htons(ETH_P_IP))
8626 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8627 e_err(drv, "Location out of range\n");
8631 /* cls u32 is a graph starting at root node 0x800. The driver tracks
8632 * links and also the fields used to advance the parser across each
8633 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8634 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8635 * To add support for new nodes update ixgbe_model.h parse structures
8636 * this function _should_ be generic try not to hardcode values here.
8638 if (uhtid == 0x800) {
8639 field_ptr = (adapter->jump_tables[0])->mat;
8641 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8643 if (!adapter->jump_tables[uhtid])
8645 field_ptr = (adapter->jump_tables[uhtid])->mat;
8651 /* At this point we know the field_ptr is valid and need to either
8652 * build cls_u32 link or attach filter. Because adding a link to
8653 * a handle that does not exist is invalid and the same for adding
8654 * rules to handles that don't exist.
8658 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8660 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8663 if (!test_bit(link_uhtid - 1, &adapter->tables))
8666 /* Multiple filters as links to the same hash table are not
8667 * supported. To add a new filter with the same next header
8668 * but different match/jump conditions, create a new hash table
8671 if (adapter->jump_tables[link_uhtid] &&
8672 (adapter->jump_tables[link_uhtid])->link_hdl) {
8673 e_err(drv, "Link filter exists for link: %x\n",
8678 for (i = 0; nexthdr[i].jump; i++) {
8679 if (nexthdr[i].o != cls->knode.sel->offoff ||
8680 nexthdr[i].s != cls->knode.sel->offshift ||
8681 nexthdr[i].m != cls->knode.sel->offmask)
8684 jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8687 input = kzalloc(sizeof(*input), GFP_KERNEL);
8692 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8697 jump->input = input;
8699 jump->link_hdl = cls->knode.handle;
8701 err = ixgbe_clsu32_build_input(input, mask, cls,
8702 field_ptr, &nexthdr[i]);
8704 jump->mat = nexthdr[i].jump;
8705 adapter->jump_tables[link_uhtid] = jump;
8712 input = kzalloc(sizeof(*input), GFP_KERNEL);
8715 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8721 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8722 if ((adapter->jump_tables[uhtid])->input)
8723 memcpy(input, (adapter->jump_tables[uhtid])->input,
8725 if ((adapter->jump_tables[uhtid])->mask)
8726 memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8729 /* Lookup in all child hash tables if this location is already
8730 * filled with a filter
8732 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8733 struct ixgbe_jump_table *link = adapter->jump_tables[i];
8735 if (link && (test_bit(loc - 1, link->child_loc_map))) {
8736 e_err(drv, "Filter exists in location: %x\n",
8743 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8747 err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8752 input->sw_idx = loc;
8754 spin_lock(&adapter->fdir_perfect_lock);
8756 if (hlist_empty(&adapter->fdir_filter_list)) {
8757 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8758 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8760 goto err_out_w_lock;
8761 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8763 goto err_out_w_lock;
8766 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8767 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8768 input->sw_idx, queue);
8770 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8771 spin_unlock(&adapter->fdir_perfect_lock);
8773 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8774 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8779 spin_unlock(&adapter->fdir_perfect_lock);
8789 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8790 struct tc_to_netdev *tc)
8792 struct ixgbe_adapter *adapter = netdev_priv(dev);
8794 if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8795 tc->type == TC_SETUP_CLSU32) {
8796 switch (tc->cls_u32->command) {
8797 case TC_CLSU32_NEW_KNODE:
8798 case TC_CLSU32_REPLACE_KNODE:
8799 return ixgbe_configure_clsu32(adapter,
8800 proto, tc->cls_u32);
8801 case TC_CLSU32_DELETE_KNODE:
8802 return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8803 case TC_CLSU32_NEW_HNODE:
8804 case TC_CLSU32_REPLACE_HNODE:
8805 return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8807 case TC_CLSU32_DELETE_HNODE:
8808 return ixgbe_configure_clsu32_del_hnode(adapter,
8815 if (tc->type != TC_SETUP_MQPRIO)
8818 return ixgbe_setup_tc(dev, tc->tc);
8821 #ifdef CONFIG_PCI_IOV
8822 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8824 struct net_device *netdev = adapter->netdev;
8827 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8832 void ixgbe_do_reset(struct net_device *netdev)
8834 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8836 if (netif_running(netdev))
8837 ixgbe_reinit_locked(adapter);
8839 ixgbe_reset(adapter);
8842 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8843 netdev_features_t features)
8845 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8847 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8848 if (!(features & NETIF_F_RXCSUM))
8849 features &= ~NETIF_F_LRO;
8851 /* Turn off LRO if not RSC capable */
8852 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8853 features &= ~NETIF_F_LRO;
8858 static int ixgbe_set_features(struct net_device *netdev,
8859 netdev_features_t features)
8861 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8862 netdev_features_t changed = netdev->features ^ features;
8863 bool need_reset = false;
8865 /* Make sure RSC matches LRO, reset if change */
8866 if (!(features & NETIF_F_LRO)) {
8867 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8869 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8870 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8871 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8872 if (adapter->rx_itr_setting == 1 ||
8873 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8874 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8876 } else if ((changed ^ features) & NETIF_F_LRO) {
8877 e_info(probe, "rx-usecs set too low, "
8883 * Check if Flow Director n-tuple support or hw_tc support was
8884 * enabled or disabled. If the state changed, we need to reset.
8886 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8887 /* turn off ATR, enable perfect filters and reset */
8888 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8891 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8892 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8894 /* turn off perfect filters, enable ATR and reset */
8895 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8898 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8900 /* We cannot enable ATR if SR-IOV is enabled */
8901 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8902 /* We cannot enable ATR if we have 2 or more tcs */
8903 (netdev_get_num_tc(netdev) > 1) ||
8904 /* We cannot enable ATR if RSS is disabled */
8905 (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8906 /* A sample rate of 0 indicates ATR disabled */
8907 (!adapter->atr_sample_rate))
8908 ; /* do nothing not supported */
8909 else /* otherwise supported and set the flag */
8910 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8913 if (changed & NETIF_F_RXALL)
8916 netdev->features = features;
8918 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8919 if (features & NETIF_F_RXCSUM) {
8920 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8922 u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8924 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8928 if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
8929 if (features & NETIF_F_RXCSUM) {
8930 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8932 u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8934 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8939 ixgbe_do_reset(netdev);
8940 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8941 NETIF_F_HW_VLAN_CTAG_FILTER))
8942 ixgbe_set_rx_mode(netdev);
8948 * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
8949 * @dev: The port's netdev
8950 * @ti: Tunnel endpoint information
8952 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
8953 struct udp_tunnel_info *ti)
8955 struct ixgbe_adapter *adapter = netdev_priv(dev);
8956 struct ixgbe_hw *hw = &adapter->hw;
8957 __be16 port = ti->port;
8961 if (ti->sa_family != AF_INET)
8965 case UDP_TUNNEL_TYPE_VXLAN:
8966 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8969 if (adapter->vxlan_port == port)
8972 if (adapter->vxlan_port) {
8974 "VXLAN port %d set, not adding port %d\n",
8975 ntohs(adapter->vxlan_port),
8980 adapter->vxlan_port = port;
8982 case UDP_TUNNEL_TYPE_GENEVE:
8983 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8986 if (adapter->geneve_port == port)
8989 if (adapter->geneve_port) {
8991 "GENEVE port %d set, not adding port %d\n",
8992 ntohs(adapter->geneve_port),
8997 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
8998 adapter->geneve_port = port;
9004 reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9005 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9009 * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9010 * @dev: The port's netdev
9011 * @ti: Tunnel endpoint information
9013 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9014 struct udp_tunnel_info *ti)
9016 struct ixgbe_adapter *adapter = netdev_priv(dev);
9019 if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9020 ti->type != UDP_TUNNEL_TYPE_GENEVE)
9023 if (ti->sa_family != AF_INET)
9027 case UDP_TUNNEL_TYPE_VXLAN:
9028 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9031 if (adapter->vxlan_port != ti->port) {
9032 netdev_info(dev, "VXLAN port %d not found\n",
9037 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9039 case UDP_TUNNEL_TYPE_GENEVE:
9040 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9043 if (adapter->geneve_port != ti->port) {
9044 netdev_info(dev, "GENEVE port %d not found\n",
9049 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9055 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9056 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9059 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9060 struct net_device *dev,
9061 const unsigned char *addr, u16 vid,
9064 /* guarantee we can provide a unique filter for the unicast address */
9065 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9066 struct ixgbe_adapter *adapter = netdev_priv(dev);
9067 u16 pool = VMDQ_P(0);
9069 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9073 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9077 * ixgbe_configure_bridge_mode - set various bridge modes
9078 * @adapter - the private structure
9079 * @mode - requested bridge mode
9081 * Configure some settings require for various bridge modes.
9083 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9086 struct ixgbe_hw *hw = &adapter->hw;
9087 unsigned int p, num_pools;
9091 case BRIDGE_MODE_VEPA:
9092 /* disable Tx loopback, rely on switch hairpin mode */
9093 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9095 /* must enable Rx switching replication to allow multicast
9096 * packet reception on all VFs, and to enable source address
9099 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9100 vmdctl |= IXGBE_VT_CTL_REPLEN;
9101 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9103 /* enable Rx source address pruning. Note, this requires
9104 * replication to be enabled or else it does nothing.
9106 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9107 for (p = 0; p < num_pools; p++) {
9108 if (hw->mac.ops.set_source_address_pruning)
9109 hw->mac.ops.set_source_address_pruning(hw,
9114 case BRIDGE_MODE_VEB:
9115 /* enable Tx loopback for internal VF/PF communication */
9116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9117 IXGBE_PFDTXGSWC_VT_LBEN);
9119 /* disable Rx switching replication unless we have SR-IOV
9122 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9123 if (!adapter->num_vfs)
9124 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9125 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9127 /* disable Rx source address pruning, since we don't expect to
9128 * be receiving external loopback of our transmitted frames.
9130 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9131 for (p = 0; p < num_pools; p++) {
9132 if (hw->mac.ops.set_source_address_pruning)
9133 hw->mac.ops.set_source_address_pruning(hw,
9142 adapter->bridge_mode = mode;
9144 e_info(drv, "enabling bridge mode: %s\n",
9145 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9150 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9151 struct nlmsghdr *nlh, u16 flags)
9153 struct ixgbe_adapter *adapter = netdev_priv(dev);
9154 struct nlattr *attr, *br_spec;
9157 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9160 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9164 nla_for_each_nested(attr, br_spec, rem) {
9168 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9171 if (nla_len(attr) < sizeof(mode))
9174 mode = nla_get_u16(attr);
9175 status = ixgbe_configure_bridge_mode(adapter, mode);
9185 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9186 struct net_device *dev,
9187 u32 filter_mask, int nlflags)
9189 struct ixgbe_adapter *adapter = netdev_priv(dev);
9191 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9194 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9195 adapter->bridge_mode, 0, 0, nlflags,
9199 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9201 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9202 struct ixgbe_adapter *adapter = netdev_priv(pdev);
9203 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9207 /* Hardware has a limited number of available pools. Each VF, and the
9208 * PF require a pool. Check to ensure we don't attempt to use more
9209 * then the available number of pools.
9211 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9212 return ERR_PTR(-EINVAL);
9215 if (vdev->num_rx_queues != vdev->num_tx_queues) {
9216 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9218 return ERR_PTR(-EINVAL);
9221 /* Check for hardware restriction on number of rx/tx queues */
9222 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9223 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9225 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9227 return ERR_PTR(-EINVAL);
9230 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9231 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9232 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9233 return ERR_PTR(-EBUSY);
9235 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9237 return ERR_PTR(-ENOMEM);
9239 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9240 adapter->num_rx_pools++;
9241 set_bit(pool, &adapter->fwd_bitmask);
9242 limit = find_last_bit(&adapter->fwd_bitmask, 32);
9244 /* Enable VMDq flag so device will be set in VM mode */
9245 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9246 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9247 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9249 /* Force reinit of ring allocation with VMDQ enabled */
9250 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9253 fwd_adapter->pool = pool;
9254 fwd_adapter->real_adapter = adapter;
9256 if (netif_running(pdev)) {
9257 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9260 netif_tx_start_all_queues(vdev);
9265 /* unwind counter and free adapter struct */
9267 "%s: dfwd hardware acceleration failed\n", vdev->name);
9268 clear_bit(pool, &adapter->fwd_bitmask);
9269 adapter->num_rx_pools--;
9271 return ERR_PTR(err);
9274 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9276 struct ixgbe_fwd_adapter *fwd_adapter = priv;
9277 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9280 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9281 adapter->num_rx_pools--;
9283 limit = find_last_bit(&adapter->fwd_bitmask, 32);
9284 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9285 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9286 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9287 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9288 fwd_adapter->pool, adapter->num_rx_pools,
9289 fwd_adapter->rx_base_queue,
9290 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9291 adapter->fwd_bitmask);
9295 #define IXGBE_MAX_MAC_HDR_LEN 127
9296 #define IXGBE_MAX_NETWORK_HDR_LEN 511
9298 static netdev_features_t
9299 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9300 netdev_features_t features)
9302 unsigned int network_hdr_len, mac_hdr_len;
9304 /* Make certain the headers can be described by a context descriptor */
9305 mac_hdr_len = skb_network_header(skb) - skb->data;
9306 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9307 return features & ~(NETIF_F_HW_CSUM |
9309 NETIF_F_HW_VLAN_CTAG_TX |
9313 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9314 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN))
9315 return features & ~(NETIF_F_HW_CSUM |
9320 /* We can only support IPV4 TSO in tunnels if we can mangle the
9321 * inner IP ID field, so strip TSO if MANGLEID is not supported.
9323 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9324 features &= ~NETIF_F_TSO;
9329 static const struct net_device_ops ixgbe_netdev_ops = {
9330 .ndo_open = ixgbe_open,
9331 .ndo_stop = ixgbe_close,
9332 .ndo_start_xmit = ixgbe_xmit_frame,
9333 .ndo_select_queue = ixgbe_select_queue,
9334 .ndo_set_rx_mode = ixgbe_set_rx_mode,
9335 .ndo_validate_addr = eth_validate_addr,
9336 .ndo_set_mac_address = ixgbe_set_mac,
9337 .ndo_change_mtu = ixgbe_change_mtu,
9338 .ndo_tx_timeout = ixgbe_tx_timeout,
9339 .ndo_set_tx_maxrate = ixgbe_tx_maxrate,
9340 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
9341 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
9342 .ndo_do_ioctl = ixgbe_ioctl,
9343 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
9344 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
9345 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
9346 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
9347 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9348 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
9349 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
9350 .ndo_get_stats64 = ixgbe_get_stats64,
9351 .ndo_setup_tc = __ixgbe_setup_tc,
9352 #ifdef CONFIG_NET_POLL_CONTROLLER
9353 .ndo_poll_controller = ixgbe_netpoll,
9355 #ifdef CONFIG_NET_RX_BUSY_POLL
9356 .ndo_busy_poll = ixgbe_low_latency_recv,
9359 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9360 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9361 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9362 .ndo_fcoe_enable = ixgbe_fcoe_enable,
9363 .ndo_fcoe_disable = ixgbe_fcoe_disable,
9364 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9365 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9366 #endif /* IXGBE_FCOE */
9367 .ndo_set_features = ixgbe_set_features,
9368 .ndo_fix_features = ixgbe_fix_features,
9369 .ndo_fdb_add = ixgbe_ndo_fdb_add,
9370 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
9371 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
9372 .ndo_dfwd_add_station = ixgbe_fwd_add,
9373 .ndo_dfwd_del_station = ixgbe_fwd_del,
9374 .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port,
9375 .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port,
9376 .ndo_features_check = ixgbe_features_check,
9380 * ixgbe_enumerate_functions - Get the number of ports this device has
9381 * @adapter: adapter structure
9383 * This function enumerates the phsyical functions co-located on a single slot,
9384 * in order to determine how many ports a device has. This is most useful in
9385 * determining the required GT/s of PCIe bandwidth necessary for optimal
9388 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9390 struct pci_dev *entry, *pdev = adapter->pdev;
9393 /* Some cards can not use the generic count PCIe functions method,
9394 * because they are behind a parent switch, so we hardcode these with
9395 * the correct number of functions.
9397 if (ixgbe_pcie_from_parent(&adapter->hw))
9400 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9401 /* don't count virtual functions */
9402 if (entry->is_virtfn)
9405 /* When the devices on the bus don't all match our device ID,
9406 * we can't reliably determine the correct number of
9407 * functions. This can occur if a function has been direct
9408 * attached to a virtual machine using VT-d, for example. In
9409 * this case, simply return -1 to indicate this.
9411 if ((entry->vendor != pdev->vendor) ||
9412 (entry->device != pdev->device))
9422 * ixgbe_wol_supported - Check whether device supports WoL
9423 * @adapter: the adapter private structure
9424 * @device_id: the device ID
9425 * @subdev_id: the subsystem device ID
9427 * This function is used by probe and ethtool to determine
9428 * which devices have WoL support
9431 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9434 struct ixgbe_hw *hw = &adapter->hw;
9435 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9437 /* WOL not supported on 82598 */
9438 if (hw->mac.type == ixgbe_mac_82598EB)
9441 /* check eeprom to see if WOL is enabled for X540 and newer */
9442 if (hw->mac.type >= ixgbe_mac_X540) {
9443 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9444 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9445 (hw->bus.func == 0)))
9449 /* WOL is determined based on device IDs for 82599 MACs */
9450 switch (device_id) {
9451 case IXGBE_DEV_ID_82599_SFP:
9452 /* Only these subdevices could supports WOL */
9453 switch (subdevice_id) {
9454 case IXGBE_SUBDEV_ID_82599_560FLR:
9455 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9456 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9457 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9458 /* only support first port */
9459 if (hw->bus.func != 0)
9461 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9462 case IXGBE_SUBDEV_ID_82599_SFP:
9463 case IXGBE_SUBDEV_ID_82599_RNDC:
9464 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9465 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9466 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9467 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9471 case IXGBE_DEV_ID_82599EN_SFP:
9472 /* Only these subdevices support WOL */
9473 switch (subdevice_id) {
9474 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9478 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9479 /* All except this subdevice support WOL */
9480 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9483 case IXGBE_DEV_ID_82599_KX4:
9493 * ixgbe_probe - Device Initialization Routine
9494 * @pdev: PCI device information struct
9495 * @ent: entry in ixgbe_pci_tbl
9497 * Returns 0 on success, negative on failure
9499 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9500 * The OS initialization, configuring of the adapter private structure,
9501 * and a hardware reset occur.
9503 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9505 struct net_device *netdev;
9506 struct ixgbe_adapter *adapter = NULL;
9507 struct ixgbe_hw *hw;
9508 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9509 int i, err, pci_using_dac, expected_gts;
9510 unsigned int indices = MAX_TX_QUEUES;
9511 u8 part_str[IXGBE_PBANUM_LENGTH];
9512 bool disable_dev = false;
9518 /* Catch broken hardware that put the wrong VF device ID in
9519 * the PCIe SR-IOV capability.
9521 if (pdev->is_virtfn) {
9522 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9523 pci_name(pdev), pdev->vendor, pdev->device);
9527 err = pci_enable_device_mem(pdev);
9531 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9534 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9537 "No usable DMA configuration, aborting\n");
9543 err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9546 "pci_request_selected_regions failed 0x%x\n", err);
9550 pci_enable_pcie_error_reporting(pdev);
9552 pci_set_master(pdev);
9553 pci_save_state(pdev);
9555 if (ii->mac == ixgbe_mac_82598EB) {
9556 #ifdef CONFIG_IXGBE_DCB
9557 /* 8 TC w/ 4 queues per TC */
9558 indices = 4 * MAX_TRAFFIC_CLASS;
9560 indices = IXGBE_MAX_RSS_INDICES;
9564 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9567 goto err_alloc_etherdev;
9570 SET_NETDEV_DEV(netdev, &pdev->dev);
9572 adapter = netdev_priv(netdev);
9574 adapter->netdev = netdev;
9575 adapter->pdev = pdev;
9578 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9580 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9581 pci_resource_len(pdev, 0));
9582 adapter->io_addr = hw->hw_addr;
9588 netdev->netdev_ops = &ixgbe_netdev_ops;
9589 ixgbe_set_ethtool_ops(netdev);
9590 netdev->watchdog_timeo = 5 * HZ;
9591 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9594 hw->mac.ops = *ii->mac_ops;
9595 hw->mac.type = ii->mac;
9596 hw->mvals = ii->mvals;
9598 hw->link.ops = *ii->link_ops;
9601 hw->eeprom.ops = *ii->eeprom_ops;
9602 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9603 if (ixgbe_removed(hw->hw_addr)) {
9607 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9608 if (!(eec & BIT(8)))
9609 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9612 hw->phy.ops = *ii->phy_ops;
9613 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9614 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9615 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9616 hw->phy.mdio.mmds = 0;
9617 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9618 hw->phy.mdio.dev = netdev;
9619 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9620 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9622 /* setup the private structure */
9623 err = ixgbe_sw_init(adapter, ii);
9627 /* Make sure the SWFW semaphore is in a valid state */
9628 if (hw->mac.ops.init_swfw_sync)
9629 hw->mac.ops.init_swfw_sync(hw);
9631 /* Make it possible the adapter to be woken up via WOL */
9632 switch (adapter->hw.mac.type) {
9633 case ixgbe_mac_82599EB:
9634 case ixgbe_mac_X540:
9635 case ixgbe_mac_X550:
9636 case ixgbe_mac_X550EM_x:
9637 case ixgbe_mac_x550em_a:
9638 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9645 * If there is a fan on this device and it has failed log the
9648 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9649 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9650 if (esdp & IXGBE_ESDP_SDP1)
9651 e_crit(probe, "Fan has stopped, replace the adapter\n");
9654 if (allow_unsupported_sfp)
9655 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9657 /* reset_hw fills in the perm_addr as well */
9658 hw->phy.reset_if_overtemp = true;
9659 err = hw->mac.ops.reset_hw(hw);
9660 hw->phy.reset_if_overtemp = false;
9661 ixgbe_set_eee_capable(adapter);
9662 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9664 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9665 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9666 e_dev_err("Reload the driver after installing a supported module.\n");
9669 e_dev_err("HW Init failed: %d\n", err);
9673 #ifdef CONFIG_PCI_IOV
9674 /* SR-IOV not supported on the 82598 */
9675 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9678 ixgbe_init_mbx_params_pf(hw);
9679 hw->mbx.ops = ii->mbx_ops;
9680 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9681 ixgbe_enable_sriov(adapter);
9685 netdev->features = NETIF_F_SG |
9692 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9693 NETIF_F_GSO_GRE_CSUM | \
9694 NETIF_F_GSO_IPXIP4 | \
9695 NETIF_F_GSO_IPXIP6 | \
9696 NETIF_F_GSO_UDP_TUNNEL | \
9697 NETIF_F_GSO_UDP_TUNNEL_CSUM)
9699 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9700 netdev->features |= NETIF_F_GSO_PARTIAL |
9701 IXGBE_GSO_PARTIAL_FEATURES;
9703 if (hw->mac.type >= ixgbe_mac_82599EB)
9704 netdev->features |= NETIF_F_SCTP_CRC;
9706 /* copy netdev features into list of user selectable features */
9707 netdev->hw_features |= netdev->features |
9708 NETIF_F_HW_VLAN_CTAG_FILTER |
9709 NETIF_F_HW_VLAN_CTAG_RX |
9710 NETIF_F_HW_VLAN_CTAG_TX |
9712 NETIF_F_HW_L2FW_DOFFLOAD;
9714 if (hw->mac.type >= ixgbe_mac_82599EB)
9715 netdev->hw_features |= NETIF_F_NTUPLE |
9719 netdev->features |= NETIF_F_HIGHDMA;
9721 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9722 netdev->hw_enc_features |= netdev->vlan_features;
9723 netdev->mpls_features |= NETIF_F_HW_CSUM;
9725 /* set this bit last since it cannot be part of vlan_features */
9726 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9727 NETIF_F_HW_VLAN_CTAG_RX |
9728 NETIF_F_HW_VLAN_CTAG_TX;
9730 netdev->priv_flags |= IFF_UNICAST_FLT;
9731 netdev->priv_flags |= IFF_SUPP_NOFCS;
9733 /* MTU range: 68 - 9710 */
9734 netdev->min_mtu = ETH_MIN_MTU;
9735 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
9737 #ifdef CONFIG_IXGBE_DCB
9738 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9739 netdev->dcbnl_ops = &dcbnl_ops;
9743 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9744 unsigned int fcoe_l;
9746 if (hw->mac.ops.get_device_caps) {
9747 hw->mac.ops.get_device_caps(hw, &device_caps);
9748 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9749 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9753 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9754 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9756 netdev->features |= NETIF_F_FSO |
9759 netdev->vlan_features |= NETIF_F_FSO |
9763 #endif /* IXGBE_FCOE */
9765 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9766 netdev->hw_features |= NETIF_F_LRO;
9767 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9768 netdev->features |= NETIF_F_LRO;
9770 /* make sure the EEPROM is good */
9771 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9772 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9777 eth_platform_get_mac_address(&adapter->pdev->dev,
9778 adapter->hw.mac.perm_addr);
9780 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9782 if (!is_valid_ether_addr(netdev->dev_addr)) {
9783 e_dev_err("invalid MAC address\n");
9788 /* Set hw->mac.addr to permanent MAC address */
9789 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9790 ixgbe_mac_set_default_filter(adapter);
9792 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9793 (unsigned long) adapter);
9795 if (ixgbe_removed(hw->hw_addr)) {
9799 INIT_WORK(&adapter->service_task, ixgbe_service_task);
9800 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9801 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9803 err = ixgbe_init_interrupt_scheme(adapter);
9807 /* WOL not supported for all devices */
9809 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9810 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9811 pdev->subsystem_device);
9812 if (hw->wol_enabled)
9813 adapter->wol = IXGBE_WUFC_MAG;
9815 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9817 /* save off EEPROM version number */
9818 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9819 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9821 /* pick up the PCI bus settings for reporting later */
9822 if (ixgbe_pcie_from_parent(hw))
9823 ixgbe_get_parent_bus_info(adapter);
9825 hw->mac.ops.get_bus_info(hw);
9827 /* calculate the expected PCIe bandwidth required for optimal
9828 * performance. Note that some older parts will never have enough
9829 * bandwidth due to being older generation PCIe parts. We clamp these
9830 * parts to ensure no warning is displayed if it can't be fixed.
9832 switch (hw->mac.type) {
9833 case ixgbe_mac_82598EB:
9834 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9837 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9841 /* don't check link if we failed to enumerate functions */
9842 if (expected_gts > 0)
9843 ixgbe_check_minimum_link(adapter, expected_gts);
9845 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9847 strlcpy(part_str, "Unknown", sizeof(part_str));
9848 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9849 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9850 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9853 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9854 hw->mac.type, hw->phy.type, part_str);
9856 e_dev_info("%pM\n", netdev->dev_addr);
9858 /* reset the hardware with the new settings */
9859 err = hw->mac.ops.start_hw(hw);
9860 if (err == IXGBE_ERR_EEPROM_VERSION) {
9861 /* We are running on a pre-production device, log a warning */
9862 e_dev_warn("This device is a pre-production adapter/LOM. "
9863 "Please be aware there may be issues associated "
9864 "with your hardware. If you are experiencing "
9865 "problems please contact your Intel or hardware "
9866 "representative who provided you with this "
9869 strcpy(netdev->name, "eth%d");
9870 err = register_netdev(netdev);
9874 pci_set_drvdata(pdev, adapter);
9876 /* power down the optics for 82599 SFP+ fiber */
9877 if (hw->mac.ops.disable_tx_laser)
9878 hw->mac.ops.disable_tx_laser(hw);
9880 /* carrier off reporting is important to ethtool even BEFORE open */
9881 netif_carrier_off(netdev);
9883 #ifdef CONFIG_IXGBE_DCA
9884 if (dca_add_requester(&pdev->dev) == 0) {
9885 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9886 ixgbe_setup_dca(adapter);
9889 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9890 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9891 for (i = 0; i < adapter->num_vfs; i++)
9892 ixgbe_vf_configuration(pdev, (i | 0x10000000));
9895 /* firmware requires driver version to be 0xFFFFFFFF
9896 * since os does not support feature
9898 if (hw->mac.ops.set_fw_drv_ver)
9899 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
9900 sizeof(ixgbe_driver_version) - 1,
9901 ixgbe_driver_version);
9903 /* add san mac addr to netdev */
9904 ixgbe_add_sanmac_netdev(netdev);
9906 e_dev_info("%s\n", ixgbe_default_device_descr);
9908 #ifdef CONFIG_IXGBE_HWMON
9909 if (ixgbe_sysfs_init(adapter))
9910 e_err(probe, "failed to allocate sysfs resources\n");
9911 #endif /* CONFIG_IXGBE_HWMON */
9913 ixgbe_dbg_adapter_init(adapter);
9915 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9916 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9917 hw->mac.ops.setup_link(hw,
9918 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9924 ixgbe_release_hw_control(adapter);
9925 ixgbe_clear_interrupt_scheme(adapter);
9927 ixgbe_disable_sriov(adapter);
9928 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9929 iounmap(adapter->io_addr);
9930 kfree(adapter->jump_tables[0]);
9931 kfree(adapter->mac_table);
9933 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9934 free_netdev(netdev);
9936 pci_release_mem_regions(pdev);
9939 if (!adapter || disable_dev)
9940 pci_disable_device(pdev);
9945 * ixgbe_remove - Device Removal Routine
9946 * @pdev: PCI device information struct
9948 * ixgbe_remove is called by the PCI subsystem to alert the driver
9949 * that it should release a PCI device. The could be caused by a
9950 * Hot-Plug event, or because the driver is going to be removed from
9953 static void ixgbe_remove(struct pci_dev *pdev)
9955 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9956 struct net_device *netdev;
9960 /* if !adapter then we already cleaned up in probe */
9964 netdev = adapter->netdev;
9965 ixgbe_dbg_adapter_exit(adapter);
9967 set_bit(__IXGBE_REMOVING, &adapter->state);
9968 cancel_work_sync(&adapter->service_task);
9971 #ifdef CONFIG_IXGBE_DCA
9972 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9973 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9974 dca_remove_requester(&pdev->dev);
9975 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9976 IXGBE_DCA_CTRL_DCA_DISABLE);
9980 #ifdef CONFIG_IXGBE_HWMON
9981 ixgbe_sysfs_exit(adapter);
9982 #endif /* CONFIG_IXGBE_HWMON */
9984 /* remove the added san mac */
9985 ixgbe_del_sanmac_netdev(netdev);
9987 #ifdef CONFIG_PCI_IOV
9988 ixgbe_disable_sriov(adapter);
9990 if (netdev->reg_state == NETREG_REGISTERED)
9991 unregister_netdev(netdev);
9993 ixgbe_clear_interrupt_scheme(adapter);
9995 ixgbe_release_hw_control(adapter);
9998 kfree(adapter->ixgbe_ieee_pfc);
9999 kfree(adapter->ixgbe_ieee_ets);
10002 iounmap(adapter->io_addr);
10003 pci_release_mem_regions(pdev);
10005 e_dev_info("complete\n");
10007 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10008 if (adapter->jump_tables[i]) {
10009 kfree(adapter->jump_tables[i]->input);
10010 kfree(adapter->jump_tables[i]->mask);
10012 kfree(adapter->jump_tables[i]);
10015 kfree(adapter->mac_table);
10016 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10017 free_netdev(netdev);
10019 pci_disable_pcie_error_reporting(pdev);
10022 pci_disable_device(pdev);
10026 * ixgbe_io_error_detected - called when PCI error is detected
10027 * @pdev: Pointer to PCI device
10028 * @state: The current pci connection state
10030 * This function is called after a PCI bus error affecting
10031 * this device has been detected.
10033 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10034 pci_channel_state_t state)
10036 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10037 struct net_device *netdev = adapter->netdev;
10039 #ifdef CONFIG_PCI_IOV
10040 struct ixgbe_hw *hw = &adapter->hw;
10041 struct pci_dev *bdev, *vfdev;
10042 u32 dw0, dw1, dw2, dw3;
10044 u16 req_id, pf_func;
10046 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10047 adapter->num_vfs == 0)
10048 goto skip_bad_vf_detection;
10050 bdev = pdev->bus->self;
10051 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10052 bdev = bdev->bus->self;
10055 goto skip_bad_vf_detection;
10057 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10059 goto skip_bad_vf_detection;
10061 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10062 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10063 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10064 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10065 if (ixgbe_removed(hw->hw_addr))
10066 goto skip_bad_vf_detection;
10068 req_id = dw1 >> 16;
10069 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10070 if (!(req_id & 0x0080))
10071 goto skip_bad_vf_detection;
10073 pf_func = req_id & 0x01;
10074 if ((pf_func & 1) == (pdev->devfn & 1)) {
10075 unsigned int device_id;
10077 vf = (req_id & 0x7F) >> 1;
10078 e_dev_err("VF %d has caused a PCIe error\n", vf);
10079 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10080 "%8.8x\tdw3: %8.8x\n",
10081 dw0, dw1, dw2, dw3);
10082 switch (adapter->hw.mac.type) {
10083 case ixgbe_mac_82599EB:
10084 device_id = IXGBE_82599_VF_DEVICE_ID;
10086 case ixgbe_mac_X540:
10087 device_id = IXGBE_X540_VF_DEVICE_ID;
10089 case ixgbe_mac_X550:
10090 device_id = IXGBE_DEV_ID_X550_VF;
10092 case ixgbe_mac_X550EM_x:
10093 device_id = IXGBE_DEV_ID_X550EM_X_VF;
10095 case ixgbe_mac_x550em_a:
10096 device_id = IXGBE_DEV_ID_X550EM_A_VF;
10103 /* Find the pci device of the offending VF */
10104 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10106 if (vfdev->devfn == (req_id & 0xFF))
10108 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10112 * There's a slim chance the VF could have been hot plugged,
10113 * so if it is no longer present we don't need to issue the
10114 * VFLR. Just clean up the AER in that case.
10117 ixgbe_issue_vf_flr(adapter, vfdev);
10118 /* Free device reference count */
10119 pci_dev_put(vfdev);
10122 pci_cleanup_aer_uncorrect_error_status(pdev);
10126 * Even though the error may have occurred on the other port
10127 * we still need to increment the vf error reference count for
10128 * both ports because the I/O resume function will be called
10129 * for both of them.
10131 adapter->vferr_refcount++;
10133 return PCI_ERS_RESULT_RECOVERED;
10135 skip_bad_vf_detection:
10136 #endif /* CONFIG_PCI_IOV */
10137 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10138 return PCI_ERS_RESULT_DISCONNECT;
10141 netif_device_detach(netdev);
10143 if (state == pci_channel_io_perm_failure) {
10145 return PCI_ERS_RESULT_DISCONNECT;
10148 if (netif_running(netdev))
10149 ixgbe_close_suspend(adapter);
10151 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10152 pci_disable_device(pdev);
10155 /* Request a slot reset. */
10156 return PCI_ERS_RESULT_NEED_RESET;
10160 * ixgbe_io_slot_reset - called after the pci bus has been reset.
10161 * @pdev: Pointer to PCI device
10163 * Restart the card from scratch, as if from a cold-boot.
10165 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10167 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10168 pci_ers_result_t result;
10171 if (pci_enable_device_mem(pdev)) {
10172 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10173 result = PCI_ERS_RESULT_DISCONNECT;
10175 smp_mb__before_atomic();
10176 clear_bit(__IXGBE_DISABLED, &adapter->state);
10177 adapter->hw.hw_addr = adapter->io_addr;
10178 pci_set_master(pdev);
10179 pci_restore_state(pdev);
10180 pci_save_state(pdev);
10182 pci_wake_from_d3(pdev, false);
10184 ixgbe_reset(adapter);
10185 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10186 result = PCI_ERS_RESULT_RECOVERED;
10189 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10191 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10192 "failed 0x%0x\n", err);
10193 /* non-fatal, continue */
10200 * ixgbe_io_resume - called when traffic can start flowing again.
10201 * @pdev: Pointer to PCI device
10203 * This callback is called when the error recovery driver tells us that
10204 * its OK to resume normal operation.
10206 static void ixgbe_io_resume(struct pci_dev *pdev)
10208 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10209 struct net_device *netdev = adapter->netdev;
10211 #ifdef CONFIG_PCI_IOV
10212 if (adapter->vferr_refcount) {
10213 e_info(drv, "Resuming after VF err\n");
10214 adapter->vferr_refcount--;
10220 if (netif_running(netdev))
10221 ixgbe_open(netdev);
10223 netif_device_attach(netdev);
10227 static const struct pci_error_handlers ixgbe_err_handler = {
10228 .error_detected = ixgbe_io_error_detected,
10229 .slot_reset = ixgbe_io_slot_reset,
10230 .resume = ixgbe_io_resume,
10233 static struct pci_driver ixgbe_driver = {
10234 .name = ixgbe_driver_name,
10235 .id_table = ixgbe_pci_tbl,
10236 .probe = ixgbe_probe,
10237 .remove = ixgbe_remove,
10239 .suspend = ixgbe_suspend,
10240 .resume = ixgbe_resume,
10242 .shutdown = ixgbe_shutdown,
10243 .sriov_configure = ixgbe_pci_sriov_configure,
10244 .err_handler = &ixgbe_err_handler
10248 * ixgbe_init_module - Driver Registration Routine
10250 * ixgbe_init_module is the first routine called when the driver is
10251 * loaded. All it does is register with the PCI subsystem.
10253 static int __init ixgbe_init_module(void)
10256 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10257 pr_info("%s\n", ixgbe_copyright);
10259 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10261 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10267 ret = pci_register_driver(&ixgbe_driver);
10269 destroy_workqueue(ixgbe_wq);
10274 #ifdef CONFIG_IXGBE_DCA
10275 dca_register_notify(&dca_notifier);
10281 module_init(ixgbe_init_module);
10284 * ixgbe_exit_module - Driver Exit Cleanup Routine
10286 * ixgbe_exit_module is called just before the driver is removed
10289 static void __exit ixgbe_exit_module(void)
10291 #ifdef CONFIG_IXGBE_DCA
10292 dca_unregister_notify(&dca_notifier);
10294 pci_unregister_driver(&ixgbe_driver);
10298 destroy_workqueue(ixgbe_wq);
10303 #ifdef CONFIG_IXGBE_DCA
10304 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10309 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10310 __ixgbe_notify_dca);
10312 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10315 #endif /* CONFIG_IXGBE_DCA */
10317 module_exit(ixgbe_exit_module);