drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/udp_tunnel.h>
  54 #include <net/pkt_cls.h>
  55 #include <net/tc_act/tc_gact.h>
  56 #include <net/tc_act/tc_mirred.h>
  57 #include <net/vxlan.h>
  58
  59 #include "ixgbe.h"
  60 #include "ixgbe_common.h"
  61 #include "ixgbe_dcb_82599.h"
  62 #include "ixgbe_sriov.h"
  63 #include "ixgbe_model.h"
  64
  65 char ixgbe_driver_name[] = "ixgbe";
  66 static const char ixgbe_driver_string[] =
  67                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  68 #ifdef IXGBE_FCOE
  69 char ixgbe_default_device_descr[] =
  70                               "Intel(R) 10 Gigabit Network Connection";
  71 #else
  72 static char ixgbe_default_device_descr[] =
  73                               "Intel(R) 10 Gigabit Network Connection";
  74 #endif
  75 #define DRV_VERSION "5.0.0-k"
  76 const char ixgbe_driver_version[] = DRV_VERSION;
  77 static const char ixgbe_copyright[] =
  78                                 "Copyright (c) 1999-2016 Intel Corporation.";
  79
  80 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  81
  82 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  83         [board_82598]           = &ixgbe_82598_info,
  84         [board_82599]           = &ixgbe_82599_info,
  85         [board_X540]            = &ixgbe_X540_info,
  86         [board_X550]            = &ixgbe_X550_info,
  87         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  88         [board_x550em_a]        = &ixgbe_x550em_a_info,
  89         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  90 };
  91
  92 /* ixgbe_pci_tbl - PCI Device ID Table
  93  *
  94  * Wildcard entries (PCI_ANY_ID) should come last
  95  * Last entry must be all 0s
  96  *
  97  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  98  *   Class, Class Mask, private data (not used) }
  99  */
 100 static const struct pci_device_id ixgbe_pci_tbl[] = {
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 146         /* required last entry */
 147         {0, }
 148 };
 149 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 150
 151 #ifdef CONFIG_IXGBE_DCA
 152 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 153                             void *p);
 154 static struct notifier_block dca_notifier = {
 155         .notifier_call = ixgbe_notify_dca,
 156         .next          = NULL,
 157         .priority      = 0
 158 };
 159 #endif
 160
 161 #ifdef CONFIG_PCI_IOV
 162 static unsigned int max_vfs;
 163 module_param(max_vfs, uint, 0);
 164 MODULE_PARM_DESC(max_vfs,
 165                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 166 #endif /* CONFIG_PCI_IOV */
 167
 168 static unsigned int allow_unsupported_sfp;
 169 module_param(allow_unsupported_sfp, uint, 0);
 170 MODULE_PARM_DESC(allow_unsupported_sfp,
 171                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 172
 173 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 174 static int debug = -1;
 175 module_param(debug, int, 0);
 176 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 177
 178 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 179 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 180 MODULE_LICENSE("GPL");
 181 MODULE_VERSION(DRV_VERSION);
 182
 183 static struct workqueue_struct *ixgbe_wq;
 184
 185 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 186 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 187
 188 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 189                                           u32 reg, u16 *value)
 190 {
 191         struct pci_dev *parent_dev;
 192         struct pci_bus *parent_bus;
 193
 194         parent_bus = adapter->pdev->bus->parent;
 195         if (!parent_bus)
 196                 return -1;
 197
 198         parent_dev = parent_bus->self;
 199         if (!parent_dev)
 200                 return -1;
 201
 202         if (!pci_is_pcie(parent_dev))
 203                 return -1;
 204
 205         pcie_capability_read_word(parent_dev, reg, value);
 206         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 207             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 208                 return -1;
 209         return 0;
 210 }
 211
 212 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 213 {
 214         struct ixgbe_hw *hw = &adapter->hw;
 215         u16 link_status = 0;
 216         int err;
 217
 218         hw->bus.type = ixgbe_bus_type_pci_express;
 219
 220         /* Get the negotiated link width and speed from PCI config space of the
 221          * parent, as this device is behind a switch
 222          */
 223         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 224
 225         /* assume caller will handle error case */
 226         if (err)
 227                 return err;
 228
 229         hw->bus.width = ixgbe_convert_bus_width(link_status);
 230         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 231
 232         return 0;
 233 }
 234
 235 /**
 236  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 237  * @hw: hw specific details
 238  *
 239  * This function is used by probe to determine whether a device's PCI-Express
 240  * bandwidth details should be gathered from the parent bus instead of from the
 241  * device. Used to ensure that various locations all have the correct device ID
 242  * checks.
 243  */
 244 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 245 {
 246         switch (hw->device_id) {
 247         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 248         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 249                 return true;
 250         default:
 251                 return false;
 252         }
 253 }
 254
 255 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 256                                      int expected_gts)
 257 {
 258         struct ixgbe_hw *hw = &adapter->hw;
 259         int max_gts = 0;
 260         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 261         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 262         struct pci_dev *pdev;
 263
 264         /* Some devices are not connected over PCIe and thus do not negotiate
 265          * speed. These devices do not have valid bus info, and thus any report
 266          * we generate may not be correct.
 267          */
 268         if (hw->bus.type == ixgbe_bus_type_internal)
 269                 return;
 270
 271         /* determine whether to use the parent device */
 272         if (ixgbe_pcie_from_parent(&adapter->hw))
 273                 pdev = adapter->pdev->bus->parent->self;
 274         else
 275                 pdev = adapter->pdev;
 276
 277         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 278             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 279                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 280                 return;
 281         }
 282
 283         switch (speed) {
 284         case PCIE_SPEED_2_5GT:
 285                 /* 8b/10b encoding reduces max throughput by 20% */
 286                 max_gts = 2 * width;
 287                 break;
 288         case PCIE_SPEED_5_0GT:
 289                 /* 8b/10b encoding reduces max throughput by 20% */
 290                 max_gts = 4 * width;
 291                 break;
 292         case PCIE_SPEED_8_0GT:
 293                 /* 128b/130b encoding reduces throughput by less than 2% */
 294                 max_gts = 8 * width;
 295                 break;
 296         default:
 297                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 298                 return;
 299         }
 300
 301         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 302                    max_gts);
 303         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 304                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 305                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 306                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 307                     "Unknown"),
 308                    width,
 309                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 310                     speed == PCIE_SPEED_5_0GT ? "20%" :
 311                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 312                     "Unknown"));
 313
 314         if (max_gts < expected_gts) {
 315                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 316                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 317                         expected_gts);
 318                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 319         }
 320 }
 321
 322 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 323 {
 324         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 325             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 326             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 327                 queue_work(ixgbe_wq, &adapter->service_task);
 328 }
 329
 330 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 331 {
 332         struct ixgbe_adapter *adapter = hw->back;
 333
 334         if (!hw->hw_addr)
 335                 return;
 336         hw->hw_addr = NULL;
 337         e_dev_err("Adapter removed\n");
 338         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 339                 ixgbe_service_event_schedule(adapter);
 340 }
 341
 342 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 343 {
 344         u32 value;
 345
 346         /* The following check not only optimizes a bit by not
 347          * performing a read on the status register when the
 348          * register just read was a status register read that
 349          * returned IXGBE_FAILED_READ_REG. It also blocks any
 350          * potential recursion.
 351          */
 352         if (reg == IXGBE_STATUS) {
 353                 ixgbe_remove_adapter(hw);
 354                 return;
 355         }
 356         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 357         if (value == IXGBE_FAILED_READ_REG)
 358                 ixgbe_remove_adapter(hw);
 359 }
 360
 361 /**
 362  * ixgbe_read_reg - Read from device register
 363  * @hw: hw specific details
 364  * @reg: offset of register to read
 365  *
 366  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 367  *
 368  * This function is used to read device registers. It checks for device
 369  * removal by confirming any read that returns all ones by checking the
 370  * status register value for all ones. This function avoids reading from
 371  * the hardware if a removal was previously detected in which case it
 372  * returns IXGBE_FAILED_READ_REG (all ones).
 373  */
 374 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 375 {
 376         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 377         u32 value;
 378
 379         if (ixgbe_removed(reg_addr))
 380                 return IXGBE_FAILED_READ_REG;
 381         if (unlikely(hw->phy.nw_mng_if_sel &
 382                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 383                 struct ixgbe_adapter *adapter;
 384                 int i;
 385
 386                 for (i = 0; i < 200; ++i) {
 387                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 388                         if (likely(!value))
 389                                 goto writes_completed;
 390                         if (value == IXGBE_FAILED_READ_REG) {
 391                                 ixgbe_remove_adapter(hw);
 392                                 return IXGBE_FAILED_READ_REG;
 393                         }
 394                         udelay(5);
 395                 }
 396
 397                 adapter = hw->back;
 398                 e_warn(hw, "register writes incomplete %08x\n", value);
 399         }
 400
 401 writes_completed:
 402         value = readl(reg_addr + reg);
 403         if (unlikely(value == IXGBE_FAILED_READ_REG))
 404                 ixgbe_check_remove(hw, reg);
 405         return value;
 406 }
 407
 408 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 409 {
 410         u16 value;
 411
 412         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 413         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 414                 ixgbe_remove_adapter(hw);
 415                 return true;
 416         }
 417         return false;
 418 }
 419
 420 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 421 {
 422         struct ixgbe_adapter *adapter = hw->back;
 423         u16 value;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return IXGBE_FAILED_READ_CFG_WORD;
 427         pci_read_config_word(adapter->pdev, reg, &value);
 428         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 429             ixgbe_check_cfg_remove(hw, adapter->pdev))
 430                 return IXGBE_FAILED_READ_CFG_WORD;
 431         return value;
 432 }
 433
 434 #ifdef CONFIG_PCI_IOV
 435 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 436 {
 437         struct ixgbe_adapter *adapter = hw->back;
 438         u32 value;
 439
 440         if (ixgbe_removed(hw->hw_addr))
 441                 return IXGBE_FAILED_READ_CFG_DWORD;
 442         pci_read_config_dword(adapter->pdev, reg, &value);
 443         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 444             ixgbe_check_cfg_remove(hw, adapter->pdev))
 445                 return IXGBE_FAILED_READ_CFG_DWORD;
 446         return value;
 447 }
 448 #endif /* CONFIG_PCI_IOV */
 449
 450 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 451 {
 452         struct ixgbe_adapter *adapter = hw->back;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return;
 456         pci_write_config_word(adapter->pdev, reg, value);
 457 }
 458
 459 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 460 {
 461         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 462
 463         /* flush memory to make sure state is correct before next watchdog */
 464         smp_mb__before_atomic();
 465         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 466 }
 467
 468 struct ixgbe_reg_info {
 469         u32 ofs;
 470         char *name;
 471 };
 472
 473 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 474
 475         /* General Registers */
 476         {IXGBE_CTRL, "CTRL"},
 477         {IXGBE_STATUS, "STATUS"},
 478         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 479
 480         /* Interrupt Registers */
 481         {IXGBE_EICR, "EICR"},
 482
 483         /* RX Registers */
 484         {IXGBE_SRRCTL(0), "SRRCTL"},
 485         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 486         {IXGBE_RDLEN(0), "RDLEN"},
 487         {IXGBE_RDH(0), "RDH"},
 488         {IXGBE_RDT(0), "RDT"},
 489         {IXGBE_RXDCTL(0), "RXDCTL"},
 490         {IXGBE_RDBAL(0), "RDBAL"},
 491         {IXGBE_RDBAH(0), "RDBAH"},
 492
 493         /* TX Registers */
 494         {IXGBE_TDBAL(0), "TDBAL"},
 495         {IXGBE_TDBAH(0), "TDBAH"},
 496         {IXGBE_TDLEN(0), "TDLEN"},
 497         {IXGBE_TDH(0), "TDH"},
 498         {IXGBE_TDT(0), "TDT"},
 499         {IXGBE_TXDCTL(0), "TXDCTL"},
 500
 501         /* List Terminator */
 502         { .name = NULL }
 503 };
 504
 505
 506 /*
 507  * ixgbe_regdump - register printout routine
 508  */
 509 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 510 {
 511         int i = 0, j = 0;
 512         char rname[16];
 513         u32 regs[64];
 514
 515         switch (reginfo->ofs) {
 516         case IXGBE_SRRCTL(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 519                 break;
 520         case IXGBE_DCA_RXCTRL(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 523                 break;
 524         case IXGBE_RDLEN(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 527                 break;
 528         case IXGBE_RDH(0):
 529                 for (i = 0; i < 64; i++)
 530                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 531                 break;
 532         case IXGBE_RDT(0):
 533                 for (i = 0; i < 64; i++)
 534                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 535                 break;
 536         case IXGBE_RXDCTL(0):
 537                 for (i = 0; i < 64; i++)
 538                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 539                 break;
 540         case IXGBE_RDBAL(0):
 541                 for (i = 0; i < 64; i++)
 542                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 543                 break;
 544         case IXGBE_RDBAH(0):
 545                 for (i = 0; i < 64; i++)
 546                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 547                 break;
 548         case IXGBE_TDBAL(0):
 549                 for (i = 0; i < 64; i++)
 550                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 551                 break;
 552         case IXGBE_TDBAH(0):
 553                 for (i = 0; i < 64; i++)
 554                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 555                 break;
 556         case IXGBE_TDLEN(0):
 557                 for (i = 0; i < 64; i++)
 558                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 559                 break;
 560         case IXGBE_TDH(0):
 561                 for (i = 0; i < 64; i++)
 562                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 563                 break;
 564         case IXGBE_TDT(0):
 565                 for (i = 0; i < 64; i++)
 566                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 567                 break;
 568         case IXGBE_TXDCTL(0):
 569                 for (i = 0; i < 64; i++)
 570                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 571                 break;
 572         default:
 573                 pr_info("%-15s %08x\n", reginfo->name,
 574                         IXGBE_READ_REG(hw, reginfo->ofs));
 575                 return;
 576         }
 577
 578         for (i = 0; i < 8; i++) {
 579                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 580                 pr_err("%-15s", rname);
 581                 for (j = 0; j < 8; j++)
 582                         pr_cont(" %08x", regs[i*8+j]);
 583                 pr_cont("\n");
 584         }
 585
 586 }
 587
 588 /*
 589  * ixgbe_dump - Print registers, tx-rings and rx-rings
 590  */
 591 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 592 {
 593         struct net_device *netdev = adapter->netdev;
 594         struct ixgbe_hw *hw = &adapter->hw;
 595         struct ixgbe_reg_info *reginfo;
 596         int n = 0;
 597         struct ixgbe_ring *tx_ring;
 598         struct ixgbe_tx_buffer *tx_buffer;
 599         union ixgbe_adv_tx_desc *tx_desc;
 600         struct my_u0 { u64 a; u64 b; } *u0;
 601         struct ixgbe_ring *rx_ring;
 602         union ixgbe_adv_rx_desc *rx_desc;
 603         struct ixgbe_rx_buffer *rx_buffer_info;
 604         u32 staterr;
 605         int i = 0;
 606
 607         if (!netif_msg_hw(adapter))
 608                 return;
 609
 610         /* Print netdevice Info */
 611         if (netdev) {
 612                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 613                 pr_info("Device Name     state            "
 614                         "trans_start\n");
 615                 pr_info("%-15s %016lX %016lX\n",
 616                         netdev->name,
 617                         netdev->state,
 618                         dev_trans_start(netdev));
 619         }
 620
 621         /* Print Registers */
 622         dev_info(&adapter->pdev->dev, "Register Dump\n");
 623         pr_info(" Register Name   Value\n");
 624         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 625              reginfo->name; reginfo++) {
 626                 ixgbe_regdump(hw, reginfo);
 627         }
 628
 629         /* Print TX Ring Summary */
 630         if (!netdev || !netif_running(netdev))
 631                 return;
 632
 633         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 634         pr_info(" %s     %s              %s        %s\n",
 635                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 636                 "leng", "ntw", "timestamp");
 637         for (n = 0; n < adapter->num_tx_queues; n++) {
 638                 tx_ring = adapter->tx_ring[n];
 639                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 640                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 641                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 642                            (u64)dma_unmap_addr(tx_buffer, dma),
 643                            dma_unmap_len(tx_buffer, len),
 644                            tx_buffer->next_to_watch,
 645                            (u64)tx_buffer->time_stamp);
 646         }
 647
 648         /* Print TX Rings */
 649         if (!netif_msg_tx_done(adapter))
 650                 goto rx_ring_summary;
 651
 652         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 653
 654         /* Transmit Descriptor Formats
 655          *
 656          * 82598 Advanced Transmit Descriptor
 657          *   +--------------------------------------------------------------+
 658          * 0 |         Buffer Address [63:0]                                |
 659          *   +--------------------------------------------------------------+
 660          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 661          *   +--------------------------------------------------------------+
 662          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 663          *
 664          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 665          *   +--------------------------------------------------------------+
 666          * 0 |                          RSV [63:0]                          |
 667          *   +--------------------------------------------------------------+
 668          * 8 |            RSV           |  STA  |          NXTSEQ           |
 669          *   +--------------------------------------------------------------+
 670          *   63                       36 35   32 31                         0
 671          *
 672          * 82599+ Advanced Transmit Descriptor
 673          *   +--------------------------------------------------------------+
 674          * 0 |         Buffer Address [63:0]                                |
 675          *   +--------------------------------------------------------------+
 676          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 677          *   +--------------------------------------------------------------+
 678          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 679          *
 680          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 681          *   +--------------------------------------------------------------+
 682          * 0 |                          RSV [63:0]                          |
 683          *   +--------------------------------------------------------------+
 684          * 8 |            RSV           |  STA  |           RSV             |
 685          *   +--------------------------------------------------------------+
 686          *   63                       36 35   32 31                         0
 687          */
 688
 689         for (n = 0; n < adapter->num_tx_queues; n++) {
 690                 tx_ring = adapter->tx_ring[n];
 691                 pr_info("------------------------------------\n");
 692                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 693                 pr_info("------------------------------------\n");
 694                 pr_info("%s%s    %s              %s        %s          %s\n",
 695                         "T [desc]     [address 63:0  ] ",
 696                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 697                         "leng", "ntw", "timestamp", "bi->skb");
 698
 699                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 700                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 701                         tx_buffer = &tx_ring->tx_buffer_info[i];
 702                         u0 = (struct my_u0 *)tx_desc;
 703                         if (dma_unmap_len(tx_buffer, len) > 0) {
 704                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 705                                         i,
 706                                         le64_to_cpu(u0->a),
 707                                         le64_to_cpu(u0->b),
 708                                         (u64)dma_unmap_addr(tx_buffer, dma),
 709                                         dma_unmap_len(tx_buffer, len),
 710                                         tx_buffer->next_to_watch,
 711                                         (u64)tx_buffer->time_stamp,
 712                                         tx_buffer->skb);
 713                                 if (i == tx_ring->next_to_use &&
 714                                         i == tx_ring->next_to_clean)
 715                                         pr_cont(" NTC/U\n");
 716                                 else if (i == tx_ring->next_to_use)
 717                                         pr_cont(" NTU\n");
 718                                 else if (i == tx_ring->next_to_clean)
 719                                         pr_cont(" NTC\n");
 720                                 else
 721                                         pr_cont("\n");
 722
 723                                 if (netif_msg_pktdata(adapter) &&
 724                                     tx_buffer->skb)
 725                                         print_hex_dump(KERN_INFO, "",
 726                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 727                                                 tx_buffer->skb->data,
 728                                                 dma_unmap_len(tx_buffer, len),
 729                                                 true);
 730                         }
 731                 }
 732         }
 733
 734         /* Print RX Rings Summary */
 735 rx_ring_summary:
 736         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 737         pr_info("Queue [NTU] [NTC]\n");
 738         for (n = 0; n < adapter->num_rx_queues; n++) {
 739                 rx_ring = adapter->rx_ring[n];
 740                 pr_info("%5d %5X %5X\n",
 741                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 742         }
 743
 744         /* Print RX Rings */
 745         if (!netif_msg_rx_status(adapter))
 746                 return;
 747
 748         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 749
 750         /* Receive Descriptor Formats
 751          *
 752          * 82598 Advanced Receive Descriptor (Read) Format
 753          *    63                                           1        0
 754          *    +-----------------------------------------------------+
 755          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 756          *    +----------------------------------------------+------+
 757          *  8 |       Header Buffer Address [63:1]           |  DD  |
 758          *    +-----------------------------------------------------+
 759          *
 760          *
 761          * 82598 Advanced Receive Descriptor (Write-Back) Format
 762          *
 763          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 764          *   +------------------------------------------------------+
 765          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 766          *   | Packet   | IP     |   |          |     | Type | Type |
 767          *   | Checksum | Ident  |   |          |     |      |      |
 768          *   +------------------------------------------------------+
 769          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 770          *   +------------------------------------------------------+
 771          *   63       48 47    32 31            20 19               0
 772          *
 773          * 82599+ Advanced Receive Descriptor (Read) Format
 774          *    63                                           1        0
 775          *    +-----------------------------------------------------+
 776          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 777          *    +----------------------------------------------+------+
 778          *  8 |       Header Buffer Address [63:1]           |  DD  |
 779          *    +-----------------------------------------------------+
 780          *
 781          *
 782          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 783          *
 784          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 785          *   +------------------------------------------------------+
 786          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 787          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 788          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 789          *   +------------------------------------------------------+
 790          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 791          *   +------------------------------------------------------+
 792          *   63       48 47    32 31          20 19                 0
 793          */
 794
 795         for (n = 0; n < adapter->num_rx_queues; n++) {
 796                 rx_ring = adapter->rx_ring[n];
 797                 pr_info("------------------------------------\n");
 798                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 799                 pr_info("------------------------------------\n");
 800                 pr_info("%s%s%s",
 801                         "R  [desc]      [ PktBuf     A0] ",
 802                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 803                         "<-- Adv Rx Read format\n");
 804                 pr_info("%s%s%s",
 805                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 806                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 807                         "<-- Adv Rx Write-Back format\n");
 808
 809                 for (i = 0; i < rx_ring->count; i++) {
 810                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 811                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 812                         u0 = (struct my_u0 *)rx_desc;
 813                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 814                         if (staterr & IXGBE_RXD_STAT_DD) {
 815                                 /* Descriptor Done */
 816                                 pr_info("RWB[0x%03X]     %016llX "
 817                                         "%016llX ---------------- %p", i,
 818                                         le64_to_cpu(u0->a),
 819                                         le64_to_cpu(u0->b),
 820                                         rx_buffer_info->skb);
 821                         } else {
 822                                 pr_info("R  [0x%03X]     %016llX "
 823                                         "%016llX %016llX %p", i,
 824                                         le64_to_cpu(u0->a),
 825                                         le64_to_cpu(u0->b),
 826                                         (u64)rx_buffer_info->dma,
 827                                         rx_buffer_info->skb);
 828
 829                                 if (netif_msg_pktdata(adapter) &&
 830                                     rx_buffer_info->dma) {
 831                                         print_hex_dump(KERN_INFO, "",
 832                                            DUMP_PREFIX_ADDRESS, 16, 1,
 833                                            page_address(rx_buffer_info->page) +
 834                                                     rx_buffer_info->page_offset,
 835                                            ixgbe_rx_bufsz(rx_ring), true);
 836                                 }
 837                         }
 838
 839                         if (i == rx_ring->next_to_use)
 840                                 pr_cont(" NTU\n");
 841                         else if (i == rx_ring->next_to_clean)
 842                                 pr_cont(" NTC\n");
 843                         else
 844                                 pr_cont("\n");
 845
 846                 }
 847         }
 848 }
 849
 850 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 851 {
 852         u32 ctrl_ext;
 853
 854         /* Let firmware take over control of h/w */
 855         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 856         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 857                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 858 }
 859
 860 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 861 {
 862         u32 ctrl_ext;
 863
 864         /* Let firmware know the driver has taken over */
 865         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 866         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 867                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 868 }
 869
 870 /**
 871  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 872  * @adapter: pointer to adapter struct
 873  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 874  * @queue: queue to map the corresponding interrupt to
 875  * @msix_vector: the vector to map to the corresponding queue
 876  *
 877  */
 878 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 879                            u8 queue, u8 msix_vector)
 880 {
 881         u32 ivar, index;
 882         struct ixgbe_hw *hw = &adapter->hw;
 883         switch (hw->mac.type) {
 884         case ixgbe_mac_82598EB:
 885                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 886                 if (direction == -1)
 887                         direction = 0;
 888                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 889                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 890                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 891                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 892                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 893                 break;
 894         case ixgbe_mac_82599EB:
 895         case ixgbe_mac_X540:
 896         case ixgbe_mac_X550:
 897         case ixgbe_mac_X550EM_x:
 898         case ixgbe_mac_x550em_a:
 899                 if (direction == -1) {
 900                         /* other causes */
 901                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 902                         index = ((queue & 1) * 8);
 903                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 904                         ivar &= ~(0xFF << index);
 905                         ivar |= (msix_vector << index);
 906                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 907                         break;
 908                 } else {
 909                         /* tx or rx causes */
 910                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 911                         index = ((16 * (queue & 1)) + (8 * direction));
 912                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 913                         ivar &= ~(0xFF << index);
 914                         ivar |= (msix_vector << index);
 915                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 916                         break;
 917                 }
 918         default:
 919                 break;
 920         }
 921 }
 922
 923 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 924                                           u64 qmask)
 925 {
 926         u32 mask;
 927
 928         switch (adapter->hw.mac.type) {
 929         case ixgbe_mac_82598EB:
 930                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 931                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 932                 break;
 933         case ixgbe_mac_82599EB:
 934         case ixgbe_mac_X540:
 935         case ixgbe_mac_X550:
 936         case ixgbe_mac_X550EM_x:
 937         case ixgbe_mac_x550em_a:
 938                 mask = (qmask & 0xFFFFFFFF);
 939                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 940                 mask = (qmask >> 32);
 941                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 942                 break;
 943         default:
 944                 break;
 945         }
 946 }
 947
 948 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 949                                       struct ixgbe_tx_buffer *tx_buffer)
 950 {
 951         if (tx_buffer->skb) {
 952                 dev_kfree_skb_any(tx_buffer->skb);
 953                 if (dma_unmap_len(tx_buffer, len))
 954                         dma_unmap_single(ring->dev,
 955                                          dma_unmap_addr(tx_buffer, dma),
 956                                          dma_unmap_len(tx_buffer, len),
 957                                          DMA_TO_DEVICE);
 958         } else if (dma_unmap_len(tx_buffer, len)) {
 959                 dma_unmap_page(ring->dev,
 960                                dma_unmap_addr(tx_buffer, dma),
 961                                dma_unmap_len(tx_buffer, len),
 962                                DMA_TO_DEVICE);
 963         }
 964         tx_buffer->next_to_watch = NULL;
 965         tx_buffer->skb = NULL;
 966         dma_unmap_len_set(tx_buffer, len, 0);
 967         /* tx_buffer must be completely set up in the transmit path */
 968 }
 969
 970 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 971 {
 972         struct ixgbe_hw *hw = &adapter->hw;
 973         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 974         int i;
 975         u32 data;
 976
 977         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 978             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 979                 return;
 980
 981         switch (hw->mac.type) {
 982         case ixgbe_mac_82598EB:
 983                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 984                 break;
 985         default:
 986                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 987         }
 988         hwstats->lxoffrxc += data;
 989
 990         /* refill credits (no tx hang) if we received xoff */
 991         if (!data)
 992                 return;
 993
 994         for (i = 0; i < adapter->num_tx_queues; i++)
 995                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 996                           &adapter->tx_ring[i]->state);
 997 }
 998
 999 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1000 {
1001         struct ixgbe_hw *hw = &adapter->hw;
1002         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1003         u32 xoff[8] = {0};
1004         u8 tc;
1005         int i;
1006         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1007
1008         if (adapter->ixgbe_ieee_pfc)
1009                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1010
1011         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1012                 ixgbe_update_xoff_rx_lfc(adapter);
1013                 return;
1014         }
1015
1016         /* update stats for each tc, only valid with PFC enabled */
1017         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1018                 u32 pxoffrxc;
1019
1020                 switch (hw->mac.type) {
1021                 case ixgbe_mac_82598EB:
1022                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1023                         break;
1024                 default:
1025                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1026                 }
1027                 hwstats->pxoffrxc[i] += pxoffrxc;
1028                 /* Get the TC for given UP */
1029                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1030                 xoff[tc] += pxoffrxc;
1031         }
1032
1033         /* disarm tx queues that have received xoff frames */
1034         for (i = 0; i < adapter->num_tx_queues; i++) {
1035                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1036
1037                 tc = tx_ring->dcb_tc;
1038                 if (xoff[tc])
1039                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1040         }
1041 }
1042
1043 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1044 {
1045         return ring->stats.packets;
1046 }
1047
1048 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1049 {
1050         struct ixgbe_adapter *adapter;
1051         struct ixgbe_hw *hw;
1052         u32 head, tail;
1053
1054         if (ring->l2_accel_priv)
1055                 adapter = ring->l2_accel_priv->real_adapter;
1056         else
1057                 adapter = netdev_priv(ring->netdev);
1058
1059         hw = &adapter->hw;
1060         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1061         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1062
1063         if (head != tail)
1064                 return (head < tail) ?
1065                         tail - head : (tail + ring->count - head);
1066
1067         return 0;
1068 }
1069
1070 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1071 {
1072         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1073         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1074         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1075
1076         clear_check_for_tx_hang(tx_ring);
1077
1078         /*
1079          * Check for a hung queue, but be thorough. This verifies
1080          * that a transmit has been completed since the previous
1081          * check AND there is at least one packet pending. The
1082          * ARMED bit is set to indicate a potential hang. The
1083          * bit is cleared if a pause frame is received to remove
1084          * false hang detection due to PFC or 802.3x frames. By
1085          * requiring this to fail twice we avoid races with
1086          * pfc clearing the ARMED bit and conditions where we
1087          * run the check_tx_hang logic with a transmit completion
1088          * pending but without time to complete it yet.
1089          */
1090         if (tx_done_old == tx_done && tx_pending)
1091                 /* make sure it is true for two checks in a row */
1092                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1093                                         &tx_ring->state);
1094         /* update completed stats and continue */
1095         tx_ring->tx_stats.tx_done_old = tx_done;
1096         /* reset the countdown */
1097         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1098
1099         return false;
1100 }
1101
1102 /**
1103  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1104  * @adapter: driver private struct
1105  **/
1106 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1107 {
1108
1109         /* Do the reset outside of interrupt context */
1110         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1111                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1112                 e_warn(drv, "initiating reset due to tx timeout\n");
1113                 ixgbe_service_event_schedule(adapter);
1114         }
1115 }
1116
1117 /**
1118  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1119  **/
1120 static int ixgbe_tx_maxrate(struct net_device *netdev,
1121                             int queue_index, u32 maxrate)
1122 {
1123         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1124         struct ixgbe_hw *hw = &adapter->hw;
1125         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1126
1127         if (!maxrate)
1128                 return 0;
1129
1130         /* Calculate the rate factor values to set */
1131         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1132         bcnrc_val /= maxrate;
1133
1134         /* clear everything but the rate factor */
1135         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1136         IXGBE_RTTBCNRC_RF_DEC_MASK;
1137
1138         /* enable the rate scheduler */
1139         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1140
1141         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1142         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1143
1144         return 0;
1145 }
1146
1147 /**
1148  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1149  * @q_vector: structure containing interrupt and ring information
1150  * @tx_ring: tx ring to clean
1151  * @napi_budget: Used to determine if we are in netpoll
1152  **/
1153 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1154                                struct ixgbe_ring *tx_ring, int napi_budget)
1155 {
1156         struct ixgbe_adapter *adapter = q_vector->adapter;
1157         struct ixgbe_tx_buffer *tx_buffer;
1158         union ixgbe_adv_tx_desc *tx_desc;
1159         unsigned int total_bytes = 0, total_packets = 0;
1160         unsigned int budget = q_vector->tx.work_limit;
1161         unsigned int i = tx_ring->next_to_clean;
1162
1163         if (test_bit(__IXGBE_DOWN, &adapter->state))
1164                 return true;
1165
1166         tx_buffer = &tx_ring->tx_buffer_info[i];
1167         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1168         i -= tx_ring->count;
1169
1170         do {
1171                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1172
1173                 /* if next_to_watch is not set then there is no work pending */
1174                 if (!eop_desc)
1175                         break;
1176
1177                 /* prevent any other reads prior to eop_desc */
1178                 read_barrier_depends();
1179
1180                 /* if DD is not set pending work has not been completed */
1181                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1182                         break;
1183
1184                 /* clear next_to_watch to prevent false hangs */
1185                 tx_buffer->next_to_watch = NULL;
1186
1187                 /* update the statistics for this packet */
1188                 total_bytes += tx_buffer->bytecount;
1189                 total_packets += tx_buffer->gso_segs;
1190
1191                 /* free the skb */
1192                 napi_consume_skb(tx_buffer->skb, napi_budget);
1193
1194                 /* unmap skb header data */
1195                 dma_unmap_single(tx_ring->dev,
1196                                  dma_unmap_addr(tx_buffer, dma),
1197                                  dma_unmap_len(tx_buffer, len),
1198                                  DMA_TO_DEVICE);
1199
1200                 /* clear tx_buffer data */
1201                 tx_buffer->skb = NULL;
1202                 dma_unmap_len_set(tx_buffer, len, 0);
1203
1204                 /* unmap remaining buffers */
1205                 while (tx_desc != eop_desc) {
1206                         tx_buffer++;
1207                         tx_desc++;
1208                         i++;
1209                         if (unlikely(!i)) {
1210                                 i -= tx_ring->count;
1211                                 tx_buffer = tx_ring->tx_buffer_info;
1212                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1213                         }
1214
1215                         /* unmap any remaining paged data */
1216                         if (dma_unmap_len(tx_buffer, len)) {
1217                                 dma_unmap_page(tx_ring->dev,
1218                                                dma_unmap_addr(tx_buffer, dma),
1219                                                dma_unmap_len(tx_buffer, len),
1220                                                DMA_TO_DEVICE);
1221                                 dma_unmap_len_set(tx_buffer, len, 0);
1222                         }
1223                 }
1224
1225                 /* move us one more past the eop_desc for start of next pkt */
1226                 tx_buffer++;
1227                 tx_desc++;
1228                 i++;
1229                 if (unlikely(!i)) {
1230                         i -= tx_ring->count;
1231                         tx_buffer = tx_ring->tx_buffer_info;
1232                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1233                 }
1234
1235                 /* issue prefetch for next Tx descriptor */
1236                 prefetch(tx_desc);
1237
1238                 /* update budget accounting */
1239                 budget--;
1240         } while (likely(budget));
1241
1242         i += tx_ring->count;
1243         tx_ring->next_to_clean = i;
1244         u64_stats_update_begin(&tx_ring->syncp);
1245         tx_ring->stats.bytes += total_bytes;
1246         tx_ring->stats.packets += total_packets;
1247         u64_stats_update_end(&tx_ring->syncp);
1248         q_vector->tx.total_bytes += total_bytes;
1249         q_vector->tx.total_packets += total_packets;
1250
1251         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1252                 /* schedule immediate reset if we believe we hung */
1253                 struct ixgbe_hw *hw = &adapter->hw;
1254                 e_err(drv, "Detected Tx Unit Hang\n"
1255                         "  Tx Queue             <%d>\n"
1256                         "  TDH, TDT             <%x>, <%x>\n"
1257                         "  next_to_use          <%x>\n"
1258                         "  next_to_clean        <%x>\n"
1259                         "tx_buffer_info[next_to_clean]\n"
1260                         "  time_stamp           <%lx>\n"
1261                         "  jiffies              <%lx>\n",
1262                         tx_ring->queue_index,
1263                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1264                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1265                         tx_ring->next_to_use, i,
1266                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1267
1268                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1269
1270                 e_info(probe,
1271                        "tx hang %d detected on queue %d, resetting adapter\n",
1272                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1273
1274                 /* schedule immediate reset if we believe we hung */
1275                 ixgbe_tx_timeout_reset(adapter);
1276
1277                 /* the adapter is about to reset, no point in enabling stuff */
1278                 return true;
1279         }
1280
1281         netdev_tx_completed_queue(txring_txq(tx_ring),
1282                                   total_packets, total_bytes);
1283
1284 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1285         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1286                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1287                 /* Make sure that anybody stopping the queue after this
1288                  * sees the new next_to_clean.
1289                  */
1290                 smp_mb();
1291                 if (__netif_subqueue_stopped(tx_ring->netdev,
1292                                              tx_ring->queue_index)
1293                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1294                         netif_wake_subqueue(tx_ring->netdev,
1295                                             tx_ring->queue_index);
1296                         ++tx_ring->tx_stats.restart_queue;
1297                 }
1298         }
1299
1300         return !!budget;
1301 }
1302
1303 #ifdef CONFIG_IXGBE_DCA
1304 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1305                                 struct ixgbe_ring *tx_ring,
1306                                 int cpu)
1307 {
1308         struct ixgbe_hw *hw = &adapter->hw;
1309         u32 txctrl = 0;
1310         u16 reg_offset;
1311
1312         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1313                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1314
1315         switch (hw->mac.type) {
1316         case ixgbe_mac_82598EB:
1317                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1318                 break;
1319         case ixgbe_mac_82599EB:
1320         case ixgbe_mac_X540:
1321                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1322                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1323                 break;
1324         default:
1325                 /* for unknown hardware do not write register */
1326                 return;
1327         }
1328
1329         /*
1330          * We can enable relaxed ordering for reads, but not writes when
1331          * DCA is enabled.  This is due to a known issue in some chipsets
1332          * which will cause the DCA tag to be cleared.
1333          */
1334         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1335                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1336                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1337
1338         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1339 }
1340
1341 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1342                                 struct ixgbe_ring *rx_ring,
1343                                 int cpu)
1344 {
1345         struct ixgbe_hw *hw = &adapter->hw;
1346         u32 rxctrl = 0;
1347         u8 reg_idx = rx_ring->reg_idx;
1348
1349         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1350                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1351
1352         switch (hw->mac.type) {
1353         case ixgbe_mac_82599EB:
1354         case ixgbe_mac_X540:
1355                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1356                 break;
1357         default:
1358                 break;
1359         }
1360
1361         /*
1362          * We can enable relaxed ordering for reads, but not writes when
1363          * DCA is enabled.  This is due to a known issue in some chipsets
1364          * which will cause the DCA tag to be cleared.
1365          */
1366         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1367                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1368                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1369
1370         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1371 }
1372
1373 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1374 {
1375         struct ixgbe_adapter *adapter = q_vector->adapter;
1376         struct ixgbe_ring *ring;
1377         int cpu = get_cpu();
1378
1379         if (q_vector->cpu == cpu)
1380                 goto out_no_update;
1381
1382         ixgbe_for_each_ring(ring, q_vector->tx)
1383                 ixgbe_update_tx_dca(adapter, ring, cpu);
1384
1385         ixgbe_for_each_ring(ring, q_vector->rx)
1386                 ixgbe_update_rx_dca(adapter, ring, cpu);
1387
1388         q_vector->cpu = cpu;
1389 out_no_update:
1390         put_cpu();
1391 }
1392
1393 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1394 {
1395         int i;
1396
1397         /* always use CB2 mode, difference is masked in the CB driver */
1398         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1399                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1400                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1401         else
1402                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1403                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1404
1405         for (i = 0; i < adapter->num_q_vectors; i++) {
1406                 adapter->q_vector[i]->cpu = -1;
1407                 ixgbe_update_dca(adapter->q_vector[i]);
1408         }
1409 }
1410
1411 static int __ixgbe_notify_dca(struct device *dev, void *data)
1412 {
1413         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1414         unsigned long event = *(unsigned long *)data;
1415
1416         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1417                 return 0;
1418
1419         switch (event) {
1420         case DCA_PROVIDER_ADD:
1421                 /* if we're already enabled, don't do it again */
1422                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1423                         break;
1424                 if (dca_add_requester(dev) == 0) {
1425                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1426                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1427                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1428                         break;
1429                 }
1430                 /* Fall Through since DCA is disabled. */
1431         case DCA_PROVIDER_REMOVE:
1432                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1433                         dca_remove_requester(dev);
1434                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1435                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1436                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1437                 }
1438                 break;
1439         }
1440
1441         return 0;
1442 }
1443
1444 #endif /* CONFIG_IXGBE_DCA */
1445
1446 #define IXGBE_RSS_L4_TYPES_MASK \
1447         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1448          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1449          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1450          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1451
1452 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1453                                  union ixgbe_adv_rx_desc *rx_desc,
1454                                  struct sk_buff *skb)
1455 {
1456         u16 rss_type;
1457
1458         if (!(ring->netdev->features & NETIF_F_RXHASH))
1459                 return;
1460
1461         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1462                    IXGBE_RXDADV_RSSTYPE_MASK;
1463
1464         if (!rss_type)
1465                 return;
1466
1467         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1468                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1469                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1470 }
1471
1472 #ifdef IXGBE_FCOE
1473 /**
1474  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1475  * @ring: structure containing ring specific data
1476  * @rx_desc: advanced rx descriptor
1477  *
1478  * Returns : true if it is FCoE pkt
1479  */
1480 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1481                                     union ixgbe_adv_rx_desc *rx_desc)
1482 {
1483         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1484
1485         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1486                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1487                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1488                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1489 }
1490
1491 #endif /* IXGBE_FCOE */
1492 /**
1493  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1494  * @ring: structure containing ring specific data
1495  * @rx_desc: current Rx descriptor being processed
1496  * @skb: skb currently being received and modified
1497  **/
1498 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1499                                      union ixgbe_adv_rx_desc *rx_desc,
1500                                      struct sk_buff *skb)
1501 {
1502         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1503         bool encap_pkt = false;
1504
1505         skb_checksum_none_assert(skb);
1506
1507         /* Rx csum disabled */
1508         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1509                 return;
1510
1511         /* check for VXLAN and Geneve packets */
1512         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1513                 encap_pkt = true;
1514                 skb->encapsulation = 1;
1515         }
1516
1517         /* if IP and error */
1518         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1519             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1520                 ring->rx_stats.csum_err++;
1521                 return;
1522         }
1523
1524         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1525                 return;
1526
1527         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1528                 /*
1529                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1530                  * checksum errors.
1531                  */
1532                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1533                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1534                         return;
1535
1536                 ring->rx_stats.csum_err++;
1537                 return;
1538         }
1539
1540         /* It must be a TCP or UDP packet with a valid checksum */
1541         skb->ip_summed = CHECKSUM_UNNECESSARY;
1542         if (encap_pkt) {
1543                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1544                         return;
1545
1546                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1547                         skb->ip_summed = CHECKSUM_NONE;
1548                         return;
1549                 }
1550                 /* If we checked the outer header let the stack know */
1551                 skb->csum_level = 1;
1552         }
1553 }
1554
1555 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1556                                     struct ixgbe_rx_buffer *bi)
1557 {
1558         struct page *page = bi->page;
1559         dma_addr_t dma;
1560
1561         /* since we are recycling buffers we should seldom need to alloc */
1562         if (likely(page))
1563                 return true;
1564
1565         /* alloc new page for storage */
1566         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1567         if (unlikely(!page)) {
1568                 rx_ring->rx_stats.alloc_rx_page_failed++;
1569                 return false;
1570         }
1571
1572         /* map page for use */
1573         dma = dma_map_page(rx_ring->dev, page, 0,
1574                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1575
1576         /*
1577          * if mapping failed free memory back to system since
1578          * there isn't much point in holding memory we can't use
1579          */
1580         if (dma_mapping_error(rx_ring->dev, dma)) {
1581                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1582
1583                 rx_ring->rx_stats.alloc_rx_page_failed++;
1584                 return false;
1585         }
1586
1587         bi->dma = dma;
1588         bi->page = page;
1589         bi->page_offset = 0;
1590
1591         return true;
1592 }
1593
1594 /**
1595  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1596  * @rx_ring: ring to place buffers on
1597  * @cleaned_count: number of buffers to replace
1598  **/
1599 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1600 {
1601         union ixgbe_adv_rx_desc *rx_desc;
1602         struct ixgbe_rx_buffer *bi;
1603         u16 i = rx_ring->next_to_use;
1604
1605         /* nothing to do */
1606         if (!cleaned_count)
1607                 return;
1608
1609         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1610         bi = &rx_ring->rx_buffer_info[i];
1611         i -= rx_ring->count;
1612
1613         do {
1614                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1615                         break;
1616
1617                 /*
1618                  * Refresh the desc even if buffer_addrs didn't change
1619                  * because each write-back erases this info.
1620                  */
1621                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1622
1623                 rx_desc++;
1624                 bi++;
1625                 i++;
1626                 if (unlikely(!i)) {
1627                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1628                         bi = rx_ring->rx_buffer_info;
1629                         i -= rx_ring->count;
1630                 }
1631
1632                 /* clear the status bits for the next_to_use descriptor */
1633                 rx_desc->wb.upper.status_error = 0;
1634
1635                 cleaned_count--;
1636         } while (cleaned_count);
1637
1638         i += rx_ring->count;
1639
1640         if (rx_ring->next_to_use != i) {
1641                 rx_ring->next_to_use = i;
1642
1643                 /* update next to alloc since we have filled the ring */
1644                 rx_ring->next_to_alloc = i;
1645
1646                 /* Force memory writes to complete before letting h/w
1647                  * know there are new descriptors to fetch.  (Only
1648                  * applicable for weak-ordered memory model archs,
1649                  * such as IA-64).
1650                  */
1651                 wmb();
1652                 writel(i, rx_ring->tail);
1653         }
1654 }
1655
1656 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1657                                    struct sk_buff *skb)
1658 {
1659         u16 hdr_len = skb_headlen(skb);
1660
1661         /* set gso_size to avoid messing up TCP MSS */
1662         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1663                                                  IXGBE_CB(skb)->append_cnt);
1664         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1665 }
1666
1667 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1668                                    struct sk_buff *skb)
1669 {
1670         /* if append_cnt is 0 then frame is not RSC */
1671         if (!IXGBE_CB(skb)->append_cnt)
1672                 return;
1673
1674         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1675         rx_ring->rx_stats.rsc_flush++;
1676
1677         ixgbe_set_rsc_gso_size(rx_ring, skb);
1678
1679         /* gso_size is computed using append_cnt so always clear it last */
1680         IXGBE_CB(skb)->append_cnt = 0;
1681 }
1682
1683 /**
1684  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1685  * @rx_ring: rx descriptor ring packet is being transacted on
1686  * @rx_desc: pointer to the EOP Rx descriptor
1687  * @skb: pointer to current skb being populated
1688  *
1689  * This function checks the ring, descriptor, and packet information in
1690  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1691  * other fields within the skb.
1692  **/
1693 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1694                                      union ixgbe_adv_rx_desc *rx_desc,
1695                                      struct sk_buff *skb)
1696 {
1697         struct net_device *dev = rx_ring->netdev;
1698         u32 flags = rx_ring->q_vector->adapter->flags;
1699
1700         ixgbe_update_rsc_stats(rx_ring, skb);
1701
1702         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1703
1704         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1705
1706         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1707                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1708
1709         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1710             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1711                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1712                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1713         }
1714
1715         skb_record_rx_queue(skb, rx_ring->queue_index);
1716
1717         skb->protocol = eth_type_trans(skb, dev);
1718 }
1719
1720 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1721                          struct sk_buff *skb)
1722 {
1723         napi_gro_receive(&q_vector->napi, skb);
1724 }
1725
1726 /**
1727  * ixgbe_is_non_eop - process handling of non-EOP buffers
1728  * @rx_ring: Rx ring being processed
1729  * @rx_desc: Rx descriptor for current buffer
1730  * @skb: Current socket buffer containing buffer in progress
1731  *
1732  * This function updates next to clean.  If the buffer is an EOP buffer
1733  * this function exits returning false, otherwise it will place the
1734  * sk_buff in the next buffer to be chained and return true indicating
1735  * that this is in fact a non-EOP buffer.
1736  **/
1737 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1738                              union ixgbe_adv_rx_desc *rx_desc,
1739                              struct sk_buff *skb)
1740 {
1741         u32 ntc = rx_ring->next_to_clean + 1;
1742
1743         /* fetch, update, and store next to clean */
1744         ntc = (ntc < rx_ring->count) ? ntc : 0;
1745         rx_ring->next_to_clean = ntc;
1746
1747         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1748
1749         /* update RSC append count if present */
1750         if (ring_is_rsc_enabled(rx_ring)) {
1751                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1752                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1753
1754                 if (unlikely(rsc_enabled)) {
1755                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1756
1757                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1758                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1759
1760                         /* update ntc based on RSC value */
1761                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1762                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1763                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1764                 }
1765         }
1766
1767         /* if we are the last buffer then there is nothing else to do */
1768         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1769                 return false;
1770
1771         /* place skb in next buffer to be received */
1772         rx_ring->rx_buffer_info[ntc].skb = skb;
1773         rx_ring->rx_stats.non_eop_descs++;
1774
1775         return true;
1776 }
1777
1778 /**
1779  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1780  * @rx_ring: rx descriptor ring packet is being transacted on
1781  * @skb: pointer to current skb being adjusted
1782  *
1783  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1784  * main difference between this version and the original function is that
1785  * this function can make several assumptions about the state of things
1786  * that allow for significant optimizations versus the standard function.
1787  * As a result we can do things like drop a frag and maintain an accurate
1788  * truesize for the skb.
1789  */
1790 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1791                             struct sk_buff *skb)
1792 {
1793         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1794         unsigned char *va;
1795         unsigned int pull_len;
1796
1797         /*
1798          * it is valid to use page_address instead of kmap since we are
1799          * working with pages allocated out of the lomem pool per
1800          * alloc_page(GFP_ATOMIC)
1801          */
1802         va = skb_frag_address(frag);
1803
1804         /*
1805          * we need the header to contain the greater of either ETH_HLEN or
1806          * 60 bytes if the skb->len is less than 60 for skb_pad.
1807          */
1808         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1809
1810         /* align pull length to size of long to optimize memcpy performance */
1811         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1812
1813         /* update all of the pointers */
1814         skb_frag_size_sub(frag, pull_len);
1815         frag->page_offset += pull_len;
1816         skb->data_len -= pull_len;
1817         skb->tail += pull_len;
1818 }
1819
1820 /**
1821  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1822  * @rx_ring: rx descriptor ring packet is being transacted on
1823  * @skb: pointer to current skb being updated
1824  *
1825  * This function provides a basic DMA sync up for the first fragment of an
1826  * skb.  The reason for doing this is that the first fragment cannot be
1827  * unmapped until we have reached the end of packet descriptor for a buffer
1828  * chain.
1829  */
1830 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1831                                 struct sk_buff *skb)
1832 {
1833         /* if the page was released unmap it, else just sync our portion */
1834         if (unlikely(IXGBE_CB(skb)->page_released)) {
1835                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1836                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1837                 IXGBE_CB(skb)->page_released = false;
1838         } else {
1839                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1840
1841                 dma_sync_single_range_for_cpu(rx_ring->dev,
1842                                               IXGBE_CB(skb)->dma,
1843                                               frag->page_offset,
1844                                               ixgbe_rx_bufsz(rx_ring),
1845                                               DMA_FROM_DEVICE);
1846         }
1847         IXGBE_CB(skb)->dma = 0;
1848 }
1849
1850 /**
1851  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1852  * @rx_ring: rx descriptor ring packet is being transacted on
1853  * @rx_desc: pointer to the EOP Rx descriptor
1854  * @skb: pointer to current skb being fixed
1855  *
1856  * Check for corrupted packet headers caused by senders on the local L2
1857  * embedded NIC switch not setting up their Tx Descriptors right.  These
1858  * should be very rare.
1859  *
1860  * Also address the case where we are pulling data in on pages only
1861  * and as such no data is present in the skb header.
1862  *
1863  * In addition if skb is not at least 60 bytes we need to pad it so that
1864  * it is large enough to qualify as a valid Ethernet frame.
1865  *
1866  * Returns true if an error was encountered and skb was freed.
1867  **/
1868 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1869                                   union ixgbe_adv_rx_desc *rx_desc,
1870                                   struct sk_buff *skb)
1871 {
1872         struct net_device *netdev = rx_ring->netdev;
1873
1874         /* verify that the packet does not have any known errors */
1875         if (unlikely(ixgbe_test_staterr(rx_desc,
1876                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1877             !(netdev->features & NETIF_F_RXALL))) {
1878                 dev_kfree_skb_any(skb);
1879                 return true;
1880         }
1881
1882         /* place header in linear portion of buffer */
1883         if (skb_is_nonlinear(skb))
1884                 ixgbe_pull_tail(rx_ring, skb);
1885
1886 #ifdef IXGBE_FCOE
1887         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1888         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1889                 return false;
1890
1891 #endif
1892         /* if eth_skb_pad returns an error the skb was freed */
1893         if (eth_skb_pad(skb))
1894                 return true;
1895
1896         return false;
1897 }
1898
1899 /**
1900  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1901  * @rx_ring: rx descriptor ring to store buffers on
1902  * @old_buff: donor buffer to have page reused
1903  *
1904  * Synchronizes page for reuse by the adapter
1905  **/
1906 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1907                                 struct ixgbe_rx_buffer *old_buff)
1908 {
1909         struct ixgbe_rx_buffer *new_buff;
1910         u16 nta = rx_ring->next_to_alloc;
1911
1912         new_buff = &rx_ring->rx_buffer_info[nta];
1913
1914         /* update, and store next to alloc */
1915         nta++;
1916         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1917
1918         /* transfer page from old buffer to new buffer */
1919         *new_buff = *old_buff;
1920
1921         /* sync the buffer for use by the device */
1922         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1923                                          new_buff->page_offset,
1924                                          ixgbe_rx_bufsz(rx_ring),
1925                                          DMA_FROM_DEVICE);
1926 }
1927
1928 static inline bool ixgbe_page_is_reserved(struct page *page)
1929 {
1930         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1931 }
1932
1933 static bool ixgbe_can_reuse_rx_page(struct ixgbe_ring *rx_ring,
1934                                     struct ixgbe_rx_buffer *rx_buffer,
1935                                     struct page *page,
1936                                     const unsigned int truesize)
1937 {
1938 #if (PAGE_SIZE >= 8192)
1939         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1940                                    ixgbe_rx_bufsz(rx_ring);
1941 #endif
1942         /* avoid re-using remote pages */
1943         if (unlikely(ixgbe_page_is_reserved(page)))
1944                 return false;
1945
1946 #if (PAGE_SIZE < 8192)
1947         /* if we are only owner of page we can reuse it */
1948         if (unlikely(page_count(page) != 1))
1949                 return false;
1950
1951         /* flip page offset to other buffer */
1952         rx_buffer->page_offset ^= truesize;
1953 #else
1954         /* move offset up to the next cache line */
1955         rx_buffer->page_offset += truesize;
1956
1957         if (rx_buffer->page_offset > last_offset)
1958                 return false;
1959 #endif
1960
1961         /* Even if we own the page, we are not allowed to use atomic_set()
1962          * This would break get_page_unless_zero() users.
1963          */
1964         page_ref_inc(page);
1965
1966         return true;
1967 }
1968
1969 /**
1970  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1971  * @rx_ring: rx descriptor ring to transact packets on
1972  * @rx_buffer: buffer containing page to add
1973  * @rx_desc: descriptor containing length of buffer written by hardware
1974  * @skb: sk_buff to place the data into
1975  *
1976  * This function will add the data contained in rx_buffer->page to the skb.
1977  * This is done either through a direct copy if the data in the buffer is
1978  * less than the skb header size, otherwise it will just attach the page as
1979  * a frag to the skb.
1980  *
1981  * The function will then update the page offset if necessary and return
1982  * true if the buffer can be reused by the adapter.
1983  **/
1984 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1985                               struct ixgbe_rx_buffer *rx_buffer,
1986                               union ixgbe_adv_rx_desc *rx_desc,
1987                               struct sk_buff *skb)
1988 {
1989         struct page *page = rx_buffer->page;
1990         unsigned char *va = page_address(page) + rx_buffer->page_offset;
1991         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1992 #if (PAGE_SIZE < 8192)
1993         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1994 #else
1995         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1996 #endif
1997
1998         if (unlikely(skb_is_nonlinear(skb)))
1999                 goto add_tail_frag;
2000
2001         if (size <= IXGBE_RX_HDR_SIZE) {
2002                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
2003
2004                 /* page is not reserved, we can reuse buffer as-is */
2005                 if (likely(!ixgbe_page_is_reserved(page)))
2006                         return true;
2007
2008                 /* this page cannot be reused so discard it */
2009                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
2010                 return false;
2011         }
2012
2013 add_tail_frag:
2014         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
2015                         rx_buffer->page_offset, size, truesize);
2016
2017         return ixgbe_can_reuse_rx_page(rx_ring, rx_buffer, page, truesize);
2018 }
2019
2020 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2021                                              union ixgbe_adv_rx_desc *rx_desc)
2022 {
2023         struct ixgbe_rx_buffer *rx_buffer;
2024         struct sk_buff *skb;
2025         struct page *page;
2026
2027         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2028         page = rx_buffer->page;
2029         prefetchw(page);
2030
2031         skb = rx_buffer->skb;
2032
2033         if (likely(!skb)) {
2034                 void *page_addr = page_address(page) +
2035                                   rx_buffer->page_offset;
2036
2037                 /* prefetch first cache line of first page */
2038                 prefetch(page_addr);
2039 #if L1_CACHE_BYTES < 128
2040                 prefetch(page_addr + L1_CACHE_BYTES);
2041 #endif
2042
2043                 /* allocate a skb to store the frags */
2044                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2045                                      IXGBE_RX_HDR_SIZE);
2046                 if (unlikely(!skb)) {
2047                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2048                         return NULL;
2049                 }
2050
2051                 /*
2052                  * we will be copying header into skb->data in
2053                  * pskb_may_pull so it is in our interest to prefetch
2054                  * it now to avoid a possible cache miss
2055                  */
2056                 prefetchw(skb->data);
2057
2058                 /*
2059                  * Delay unmapping of the first packet. It carries the
2060                  * header information, HW may still access the header
2061                  * after the writeback.  Only unmap it when EOP is
2062                  * reached
2063                  */
2064                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2065                         goto dma_sync;
2066
2067                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2068         } else {
2069                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2070                         ixgbe_dma_sync_frag(rx_ring, skb);
2071
2072 dma_sync:
2073                 /* we are reusing so sync this buffer for CPU use */
2074                 dma_sync_single_range_for_cpu(rx_ring->dev,
2075                                               rx_buffer->dma,
2076                                               rx_buffer->page_offset,
2077                                               ixgbe_rx_bufsz(rx_ring),
2078                                               DMA_FROM_DEVICE);
2079
2080                 rx_buffer->skb = NULL;
2081         }
2082
2083         /* pull page into skb */
2084         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2085                 /* hand second half of page back to the ring */
2086                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2087         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2088                 /* the page has been released from the ring */
2089                 IXGBE_CB(skb)->page_released = true;
2090         } else {
2091                 /* we are not reusing the buffer so unmap it */
2092                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2093                                ixgbe_rx_pg_size(rx_ring),
2094                                DMA_FROM_DEVICE);
2095         }
2096
2097         /* clear contents of buffer_info */
2098         rx_buffer->page = NULL;
2099
2100         return skb;
2101 }
2102
2103 /**
2104  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2105  * @q_vector: structure containing interrupt and ring information
2106  * @rx_ring: rx descriptor ring to transact packets on
2107  * @budget: Total limit on number of packets to process
2108  *
2109  * This function provides a "bounce buffer" approach to Rx interrupt
2110  * processing.  The advantage to this is that on systems that have
2111  * expensive overhead for IOMMU access this provides a means of avoiding
2112  * it by maintaining the mapping of the page to the syste.
2113  *
2114  * Returns amount of work completed
2115  **/
2116 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2117                                struct ixgbe_ring *rx_ring,
2118                                const int budget)
2119 {
2120         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2121 #ifdef IXGBE_FCOE
2122         struct ixgbe_adapter *adapter = q_vector->adapter;
2123         int ddp_bytes;
2124         unsigned int mss = 0;
2125 #endif /* IXGBE_FCOE */
2126         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2127
2128         while (likely(total_rx_packets < budget)) {
2129                 union ixgbe_adv_rx_desc *rx_desc;
2130                 struct sk_buff *skb;
2131
2132                 /* return some buffers to hardware, one at a time is too slow */
2133                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2134                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2135                         cleaned_count = 0;
2136                 }
2137
2138                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2139
2140                 if (!rx_desc->wb.upper.status_error)
2141                         break;
2142
2143                 /* This memory barrier is needed to keep us from reading
2144                  * any other fields out of the rx_desc until we know the
2145                  * descriptor has been written back
2146                  */
2147                 dma_rmb();
2148
2149                 /* retrieve a buffer from the ring */
2150                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2151
2152                 /* exit if we failed to retrieve a buffer */
2153                 if (!skb)
2154                         break;
2155
2156                 cleaned_count++;
2157
2158                 /* place incomplete frames back on ring for completion */
2159                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2160                         continue;
2161
2162                 /* verify the packet layout is correct */
2163                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2164                         continue;
2165
2166                 /* probably a little skewed due to removing CRC */
2167                 total_rx_bytes += skb->len;
2168
2169                 /* populate checksum, timestamp, VLAN, and protocol */
2170                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2171
2172 #ifdef IXGBE_FCOE
2173                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2174                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2175                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2176                         /* include DDPed FCoE data */
2177                         if (ddp_bytes > 0) {
2178                                 if (!mss) {
2179                                         mss = rx_ring->netdev->mtu -
2180                                                 sizeof(struct fcoe_hdr) -
2181                                                 sizeof(struct fc_frame_header) -
2182                                                 sizeof(struct fcoe_crc_eof);
2183                                         if (mss > 512)
2184                                                 mss &= ~511;
2185                                 }
2186                                 total_rx_bytes += ddp_bytes;
2187                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2188                                                                  mss);
2189                         }
2190                         if (!ddp_bytes) {
2191                                 dev_kfree_skb_any(skb);
2192                                 continue;
2193                         }
2194                 }
2195
2196 #endif /* IXGBE_FCOE */
2197                 ixgbe_rx_skb(q_vector, skb);
2198
2199                 /* update budget accounting */
2200                 total_rx_packets++;
2201         }
2202
2203         u64_stats_update_begin(&rx_ring->syncp);
2204         rx_ring->stats.packets += total_rx_packets;
2205         rx_ring->stats.bytes += total_rx_bytes;
2206         u64_stats_update_end(&rx_ring->syncp);
2207         q_vector->rx.total_packets += total_rx_packets;
2208         q_vector->rx.total_bytes += total_rx_bytes;
2209
2210         return total_rx_packets;
2211 }
2212
2213 /**
2214  * ixgbe_configure_msix - Configure MSI-X hardware
2215  * @adapter: board private structure
2216  *
2217  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2218  * interrupts.
2219  **/
2220 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2221 {
2222         struct ixgbe_q_vector *q_vector;
2223         int v_idx;
2224         u32 mask;
2225
2226         /* Populate MSIX to EITR Select */
2227         if (adapter->num_vfs > 32) {
2228                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2229                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2230         }
2231
2232         /*
2233          * Populate the IVAR table and set the ITR values to the
2234          * corresponding register.
2235          */
2236         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2237                 struct ixgbe_ring *ring;
2238                 q_vector = adapter->q_vector[v_idx];
2239
2240                 ixgbe_for_each_ring(ring, q_vector->rx)
2241                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2242
2243                 ixgbe_for_each_ring(ring, q_vector->tx)
2244                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2245
2246                 ixgbe_write_eitr(q_vector);
2247         }
2248
2249         switch (adapter->hw.mac.type) {
2250         case ixgbe_mac_82598EB:
2251                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2252                                v_idx);
2253                 break;
2254         case ixgbe_mac_82599EB:
2255         case ixgbe_mac_X540:
2256         case ixgbe_mac_X550:
2257         case ixgbe_mac_X550EM_x:
2258         case ixgbe_mac_x550em_a:
2259                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2260                 break;
2261         default:
2262                 break;
2263         }
2264         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2265
2266         /* set up to autoclear timer, and the vectors */
2267         mask = IXGBE_EIMS_ENABLE_MASK;
2268         mask &= ~(IXGBE_EIMS_OTHER |
2269                   IXGBE_EIMS_MAILBOX |
2270                   IXGBE_EIMS_LSC);
2271
2272         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2273 }
2274
2275 enum latency_range {
2276         lowest_latency = 0,
2277         low_latency = 1,
2278         bulk_latency = 2,
2279         latency_invalid = 255
2280 };
2281
2282 /**
2283  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2284  * @q_vector: structure containing interrupt and ring information
2285  * @ring_container: structure containing ring performance data
2286  *
2287  *      Stores a new ITR value based on packets and byte
2288  *      counts during the last interrupt.  The advantage of per interrupt
2289  *      computation is faster updates and more accurate ITR for the current
2290  *      traffic pattern.  Constants in this function were computed
2291  *      based on theoretical maximum wire speed and thresholds were set based
2292  *      on testing data as well as attempting to minimize response time
2293  *      while increasing bulk throughput.
2294  *      this functionality is controlled by the InterruptThrottleRate module
2295  *      parameter (see ixgbe_param.c)
2296  **/
2297 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2298                              struct ixgbe_ring_container *ring_container)
2299 {
2300         int bytes = ring_container->total_bytes;
2301         int packets = ring_container->total_packets;
2302         u32 timepassed_us;
2303         u64 bytes_perint;
2304         u8 itr_setting = ring_container->itr;
2305
2306         if (packets == 0)
2307                 return;
2308
2309         /* simple throttlerate management
2310          *   0-10MB/s   lowest (100000 ints/s)
2311          *  10-20MB/s   low    (20000 ints/s)
2312          *  20-1249MB/s bulk   (12000 ints/s)
2313          */
2314         /* what was last interrupt timeslice? */
2315         timepassed_us = q_vector->itr >> 2;
2316         if (timepassed_us == 0)
2317                 return;
2318
2319         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2320
2321         switch (itr_setting) {
2322         case lowest_latency:
2323                 if (bytes_perint > 10)
2324                         itr_setting = low_latency;
2325                 break;
2326         case low_latency:
2327                 if (bytes_perint > 20)
2328                         itr_setting = bulk_latency;
2329                 else if (bytes_perint <= 10)
2330                         itr_setting = lowest_latency;
2331                 break;
2332         case bulk_latency:
2333                 if (bytes_perint <= 20)
2334                         itr_setting = low_latency;
2335                 break;
2336         }
2337
2338         /* clear work counters since we have the values we need */
2339         ring_container->total_bytes = 0;
2340         ring_container->total_packets = 0;
2341
2342         /* write updated itr to ring container */
2343         ring_container->itr = itr_setting;
2344 }
2345
2346 /**
2347  * ixgbe_write_eitr - write EITR register in hardware specific way
2348  * @q_vector: structure containing interrupt and ring information
2349  *
2350  * This function is made to be called by ethtool and by the driver
2351  * when it needs to update EITR registers at runtime.  Hardware
2352  * specific quirks/differences are taken care of here.
2353  */
2354 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2355 {
2356         struct ixgbe_adapter *adapter = q_vector->adapter;
2357         struct ixgbe_hw *hw = &adapter->hw;
2358         int v_idx = q_vector->v_idx;
2359         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2360
2361         switch (adapter->hw.mac.type) {
2362         case ixgbe_mac_82598EB:
2363                 /* must write high and low 16 bits to reset counter */
2364                 itr_reg |= (itr_reg << 16);
2365                 break;
2366         case ixgbe_mac_82599EB:
2367         case ixgbe_mac_X540:
2368         case ixgbe_mac_X550:
2369         case ixgbe_mac_X550EM_x:
2370         case ixgbe_mac_x550em_a:
2371                 /*
2372                  * set the WDIS bit to not clear the timer bits and cause an
2373                  * immediate assertion of the interrupt
2374                  */
2375                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2376                 break;
2377         default:
2378                 break;
2379         }
2380         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2381 }
2382
2383 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2384 {
2385         u32 new_itr = q_vector->itr;
2386         u8 current_itr;
2387
2388         ixgbe_update_itr(q_vector, &q_vector->tx);
2389         ixgbe_update_itr(q_vector, &q_vector->rx);
2390
2391         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2392
2393         switch (current_itr) {
2394         /* counts and packets in update_itr are dependent on these numbers */
2395         case lowest_latency:
2396                 new_itr = IXGBE_100K_ITR;
2397                 break;
2398         case low_latency:
2399                 new_itr = IXGBE_20K_ITR;
2400                 break;
2401         case bulk_latency:
2402                 new_itr = IXGBE_12K_ITR;
2403                 break;
2404         default:
2405                 break;
2406         }
2407
2408         if (new_itr != q_vector->itr) {
2409                 /* do an exponential smoothing */
2410                 new_itr = (10 * new_itr * q_vector->itr) /
2411                           ((9 * new_itr) + q_vector->itr);
2412
2413                 /* save the algorithm value here */
2414                 q_vector->itr = new_itr;
2415
2416                 ixgbe_write_eitr(q_vector);
2417         }
2418 }
2419
2420 /**
2421  * ixgbe_check_overtemp_subtask - check for over temperature
2422  * @adapter: pointer to adapter
2423  **/
2424 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2425 {
2426         struct ixgbe_hw *hw = &adapter->hw;
2427         u32 eicr = adapter->interrupt_event;
2428         s32 rc;
2429
2430         if (test_bit(__IXGBE_DOWN, &adapter->state))
2431                 return;
2432
2433         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2434             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2435                 return;
2436
2437         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2438
2439         switch (hw->device_id) {
2440         case IXGBE_DEV_ID_82599_T3_LOM:
2441                 /*
2442                  * Since the warning interrupt is for both ports
2443                  * we don't have to check if:
2444                  *  - This interrupt wasn't for our port.
2445                  *  - We may have missed the interrupt so always have to
2446                  *    check if we  got a LSC
2447                  */
2448                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2449                     !(eicr & IXGBE_EICR_LSC))
2450                         return;
2451
2452                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2453                         u32 speed;
2454                         bool link_up = false;
2455
2456                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2457
2458                         if (link_up)
2459                                 return;
2460                 }
2461
2462                 /* Check if this is not due to overtemp */
2463                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2464                         return;
2465
2466                 break;
2467         case IXGBE_DEV_ID_X550EM_A_1G_T:
2468         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2469                 rc = hw->phy.ops.check_overtemp(hw);
2470                 if (rc != IXGBE_ERR_OVERTEMP)
2471                         return;
2472                 break;
2473         default:
2474                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2475                         return;
2476                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2477                         return;
2478                 break;
2479         }
2480         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2481
2482         adapter->interrupt_event = 0;
2483 }
2484
2485 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2486 {
2487         struct ixgbe_hw *hw = &adapter->hw;
2488
2489         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2490             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2491                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2492                 /* write to clear the interrupt */
2493                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2494         }
2495 }
2496
2497 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2498 {
2499         struct ixgbe_hw *hw = &adapter->hw;
2500
2501         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2502                 return;
2503
2504         switch (adapter->hw.mac.type) {
2505         case ixgbe_mac_82599EB:
2506                 /*
2507                  * Need to check link state so complete overtemp check
2508                  * on service task
2509                  */
2510                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2511                      (eicr & IXGBE_EICR_LSC)) &&
2512                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2513                         adapter->interrupt_event = eicr;
2514                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2515                         ixgbe_service_event_schedule(adapter);
2516                         return;
2517                 }
2518                 return;
2519         case ixgbe_mac_x550em_a:
2520                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2521                         adapter->interrupt_event = eicr;
2522                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2523                         ixgbe_service_event_schedule(adapter);
2524                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2525                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2526                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2527                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2528                 }
2529                 return;
2530         case ixgbe_mac_X550:
2531         case ixgbe_mac_X540:
2532                 if (!(eicr & IXGBE_EICR_TS))
2533                         return;
2534                 break;
2535         default:
2536                 return;
2537         }
2538
2539         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2540 }
2541
2542 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2543 {
2544         switch (hw->mac.type) {
2545         case ixgbe_mac_82598EB:
2546                 if (hw->phy.type == ixgbe_phy_nl)
2547                         return true;
2548                 return false;
2549         case ixgbe_mac_82599EB:
2550         case ixgbe_mac_X550EM_x:
2551         case ixgbe_mac_x550em_a:
2552                 switch (hw->mac.ops.get_media_type(hw)) {
2553                 case ixgbe_media_type_fiber:
2554                 case ixgbe_media_type_fiber_qsfp:
2555                         return true;
2556                 default:
2557                         return false;
2558                 }
2559         default:
2560                 return false;
2561         }
2562 }
2563
2564 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2565 {
2566         struct ixgbe_hw *hw = &adapter->hw;
2567         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2568
2569         if (!ixgbe_is_sfp(hw))
2570                 return;
2571
2572         /* Later MAC's use different SDP */
2573         if (hw->mac.type >= ixgbe_mac_X540)
2574                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2575
2576         if (eicr & eicr_mask) {
2577                 /* Clear the interrupt */
2578                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2579                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2580                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2581                         adapter->sfp_poll_time = 0;
2582                         ixgbe_service_event_schedule(adapter);
2583                 }
2584         }
2585
2586         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2587             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2588                 /* Clear the interrupt */
2589                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2590                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2591                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2592                         ixgbe_service_event_schedule(adapter);
2593                 }
2594         }
2595 }
2596
2597 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2598 {
2599         struct ixgbe_hw *hw = &adapter->hw;
2600
2601         adapter->lsc_int++;
2602         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2603         adapter->link_check_timeout = jiffies;
2604         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2605                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2606                 IXGBE_WRITE_FLUSH(hw);
2607                 ixgbe_service_event_schedule(adapter);
2608         }
2609 }
2610
2611 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2612                                            u64 qmask)
2613 {
2614         u32 mask;
2615         struct ixgbe_hw *hw = &adapter->hw;
2616
2617         switch (hw->mac.type) {
2618         case ixgbe_mac_82598EB:
2619                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2620                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2621                 break;
2622         case ixgbe_mac_82599EB:
2623         case ixgbe_mac_X540:
2624         case ixgbe_mac_X550:
2625         case ixgbe_mac_X550EM_x:
2626         case ixgbe_mac_x550em_a:
2627                 mask = (qmask & 0xFFFFFFFF);
2628                 if (mask)
2629                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2630                 mask = (qmask >> 32);
2631                 if (mask)
2632                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2633                 break;
2634         default:
2635                 break;
2636         }
2637         /* skip the flush */
2638 }
2639
2640 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2641                                             u64 qmask)
2642 {
2643         u32 mask;
2644         struct ixgbe_hw *hw = &adapter->hw;
2645
2646         switch (hw->mac.type) {
2647         case ixgbe_mac_82598EB:
2648                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2649                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2650                 break;
2651         case ixgbe_mac_82599EB:
2652         case ixgbe_mac_X540:
2653         case ixgbe_mac_X550:
2654         case ixgbe_mac_X550EM_x:
2655         case ixgbe_mac_x550em_a:
2656                 mask = (qmask & 0xFFFFFFFF);
2657                 if (mask)
2658                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2659                 mask = (qmask >> 32);
2660                 if (mask)
2661                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2662                 break;
2663         default:
2664                 break;
2665         }
2666         /* skip the flush */
2667 }
2668
2669 /**
2670  * ixgbe_irq_enable - Enable default interrupt generation settings
2671  * @adapter: board private structure
2672  **/
2673 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2674                                     bool flush)
2675 {
2676         struct ixgbe_hw *hw = &adapter->hw;
2677         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2678
2679         /* don't reenable LSC while waiting for link */
2680         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2681                 mask &= ~IXGBE_EIMS_LSC;
2682
2683         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2684                 switch (adapter->hw.mac.type) {
2685                 case ixgbe_mac_82599EB:
2686                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2687                         break;
2688                 case ixgbe_mac_X540:
2689                 case ixgbe_mac_X550:
2690                 case ixgbe_mac_X550EM_x:
2691                 case ixgbe_mac_x550em_a:
2692                         mask |= IXGBE_EIMS_TS;
2693                         break;
2694                 default:
2695                         break;
2696                 }
2697         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2698                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2699         switch (adapter->hw.mac.type) {
2700         case ixgbe_mac_82599EB:
2701                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2702                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2703                 /* fall through */
2704         case ixgbe_mac_X540:
2705         case ixgbe_mac_X550:
2706         case ixgbe_mac_X550EM_x:
2707         case ixgbe_mac_x550em_a:
2708                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2709                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2710                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2711                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2712                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2713                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2714                 mask |= IXGBE_EIMS_ECC;
2715                 mask |= IXGBE_EIMS_MAILBOX;
2716                 break;
2717         default:
2718                 break;
2719         }
2720
2721         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2722             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2723                 mask |= IXGBE_EIMS_FLOW_DIR;
2724
2725         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2726         if (queues)
2727                 ixgbe_irq_enable_queues(adapter, ~0);
2728         if (flush)
2729                 IXGBE_WRITE_FLUSH(&adapter->hw);
2730 }
2731
2732 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2733 {
2734         struct ixgbe_adapter *adapter = data;
2735         struct ixgbe_hw *hw = &adapter->hw;
2736         u32 eicr;
2737
2738         /*
2739          * Workaround for Silicon errata.  Use clear-by-write instead
2740          * of clear-by-read.  Reading with EICS will return the
2741          * interrupt causes without clearing, which later be done
2742          * with the write to EICR.
2743          */
2744         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2745
2746         /* The lower 16bits of the EICR register are for the queue interrupts
2747          * which should be masked here in order to not accidentally clear them if
2748          * the bits are high when ixgbe_msix_other is called. There is a race
2749          * condition otherwise which results in possible performance loss
2750          * especially if the ixgbe_msix_other interrupt is triggering
2751          * consistently (as it would when PPS is turned on for the X540 device)
2752          */
2753         eicr &= 0xFFFF0000;
2754
2755         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2756
2757         if (eicr & IXGBE_EICR_LSC)
2758                 ixgbe_check_lsc(adapter);
2759
2760         if (eicr & IXGBE_EICR_MAILBOX)
2761                 ixgbe_msg_task(adapter);
2762
2763         switch (hw->mac.type) {
2764         case ixgbe_mac_82599EB:
2765         case ixgbe_mac_X540:
2766         case ixgbe_mac_X550:
2767         case ixgbe_mac_X550EM_x:
2768         case ixgbe_mac_x550em_a:
2769                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2770                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2771                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2772                         ixgbe_service_event_schedule(adapter);
2773                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2774                                         IXGBE_EICR_GPI_SDP0_X540);
2775                 }
2776                 if (eicr & IXGBE_EICR_ECC) {
2777                         e_info(link, "Received ECC Err, initiating reset\n");
2778                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2779                         ixgbe_service_event_schedule(adapter);
2780                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2781                 }
2782                 /* Handle Flow Director Full threshold interrupt */
2783                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2784                         int reinit_count = 0;
2785                         int i;
2786                         for (i = 0; i < adapter->num_tx_queues; i++) {
2787                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2788                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2789                                                        &ring->state))
2790                                         reinit_count++;
2791                         }
2792                         if (reinit_count) {
2793                                 /* no more flow director interrupts until after init */
2794                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2795                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2796                                 ixgbe_service_event_schedule(adapter);
2797                         }
2798                 }
2799                 ixgbe_check_sfp_event(adapter, eicr);
2800                 ixgbe_check_overtemp_event(adapter, eicr);
2801                 break;
2802         default:
2803                 break;
2804         }
2805
2806         ixgbe_check_fan_failure(adapter, eicr);
2807
2808         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2809                 ixgbe_ptp_check_pps_event(adapter);
2810
2811         /* re-enable the original interrupt state, no lsc, no queues */
2812         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2813                 ixgbe_irq_enable(adapter, false, false);
2814
2815         return IRQ_HANDLED;
2816 }
2817
2818 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2819 {
2820         struct ixgbe_q_vector *q_vector = data;
2821
2822         /* EIAM disabled interrupts (on this vector) for us */
2823
2824         if (q_vector->rx.ring || q_vector->tx.ring)
2825                 napi_schedule_irqoff(&q_vector->napi);
2826
2827         return IRQ_HANDLED;
2828 }
2829
2830 /**
2831  * ixgbe_poll - NAPI Rx polling callback
2832  * @napi: structure for representing this polling device
2833  * @budget: how many packets driver is allowed to clean
2834  *
2835  * This function is used for legacy and MSI, NAPI mode
2836  **/
2837 int ixgbe_poll(struct napi_struct *napi, int budget)
2838 {
2839         struct ixgbe_q_vector *q_vector =
2840                                 container_of(napi, struct ixgbe_q_vector, napi);
2841         struct ixgbe_adapter *adapter = q_vector->adapter;
2842         struct ixgbe_ring *ring;
2843         int per_ring_budget, work_done = 0;
2844         bool clean_complete = true;
2845
2846 #ifdef CONFIG_IXGBE_DCA
2847         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2848                 ixgbe_update_dca(q_vector);
2849 #endif
2850
2851         ixgbe_for_each_ring(ring, q_vector->tx) {
2852                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2853                         clean_complete = false;
2854         }
2855
2856         /* Exit if we are called by netpoll */
2857         if (budget <= 0)
2858                 return budget;
2859
2860         /* attempt to distribute budget to each queue fairly, but don't allow
2861          * the budget to go below 1 because we'll exit polling */
2862         if (q_vector->rx.count > 1)
2863                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2864         else
2865                 per_ring_budget = budget;
2866
2867         ixgbe_for_each_ring(ring, q_vector->rx) {
2868                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2869                                                  per_ring_budget);
2870
2871                 work_done += cleaned;
2872                 if (cleaned >= per_ring_budget)
2873                         clean_complete = false;
2874         }
2875
2876         /* If all work not completed, return budget and keep polling */
2877         if (!clean_complete)
2878                 return budget;
2879
2880         /* all work done, exit the polling mode */
2881         napi_complete_done(napi, work_done);
2882         if (adapter->rx_itr_setting & 1)
2883                 ixgbe_set_itr(q_vector);
2884         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2885                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2886
2887         return min(work_done, budget - 1);
2888 }
2889
2890 /**
2891  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2892  * @adapter: board private structure
2893  *
2894  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2895  * interrupts from the kernel.
2896  **/
2897 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2898 {
2899         struct net_device *netdev = adapter->netdev;
2900         int vector, err;
2901         int ri = 0, ti = 0;
2902
2903         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2904                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2905                 struct msix_entry *entry = &adapter->msix_entries[vector];
2906
2907                 if (q_vector->tx.ring && q_vector->rx.ring) {
2908                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2909                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2910                         ti++;
2911                 } else if (q_vector->rx.ring) {
2912                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2913                                  "%s-%s-%d", netdev->name, "rx", ri++);
2914                 } else if (q_vector->tx.ring) {
2915                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2916                                  "%s-%s-%d", netdev->name, "tx", ti++);
2917                 } else {
2918                         /* skip this unused q_vector */
2919                         continue;
2920                 }
2921                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2922                                   q_vector->name, q_vector);
2923                 if (err) {
2924                         e_err(probe, "request_irq failed for MSIX interrupt "
2925                               "Error: %d\n", err);
2926                         goto free_queue_irqs;
2927                 }
2928                 /* If Flow Director is enabled, set interrupt affinity */
2929                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2930                         /* assign the mask for this irq */
2931                         irq_set_affinity_hint(entry->vector,
2932                                               &q_vector->affinity_mask);
2933                 }
2934         }
2935
2936         err = request_irq(adapter->msix_entries[vector].vector,
2937                           ixgbe_msix_other, 0, netdev->name, adapter);
2938         if (err) {
2939                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2940                 goto free_queue_irqs;
2941         }
2942
2943         return 0;
2944
2945 free_queue_irqs:
2946         while (vector) {
2947                 vector--;
2948                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2949                                       NULL);
2950                 free_irq(adapter->msix_entries[vector].vector,
2951                          adapter->q_vector[vector]);
2952         }
2953         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2954         pci_disable_msix(adapter->pdev);
2955         kfree(adapter->msix_entries);
2956         adapter->msix_entries = NULL;
2957         return err;
2958 }
2959
2960 /**
2961  * ixgbe_intr - legacy mode Interrupt Handler
2962  * @irq: interrupt number
2963  * @data: pointer to a network interface device structure
2964  **/
2965 static irqreturn_t ixgbe_intr(int irq, void *data)
2966 {
2967         struct ixgbe_adapter *adapter = data;
2968         struct ixgbe_hw *hw = &adapter->hw;
2969         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2970         u32 eicr;
2971
2972         /*
2973          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2974          * before the read of EICR.
2975          */
2976         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2977
2978         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2979          * therefore no explicit interrupt disable is necessary */
2980         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2981         if (!eicr) {
2982                 /*
2983                  * shared interrupt alert!
2984                  * make sure interrupts are enabled because the read will
2985                  * have disabled interrupts due to EIAM
2986                  * finish the workaround of silicon errata on 82598.  Unmask
2987                  * the interrupt that we masked before the EICR read.
2988                  */
2989                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2990                         ixgbe_irq_enable(adapter, true, true);
2991                 return IRQ_NONE;        /* Not our interrupt */
2992         }
2993
2994         if (eicr & IXGBE_EICR_LSC)
2995                 ixgbe_check_lsc(adapter);
2996
2997         switch (hw->mac.type) {
2998         case ixgbe_mac_82599EB:
2999                 ixgbe_check_sfp_event(adapter, eicr);
3000                 /* Fall through */
3001         case ixgbe_mac_X540:
3002         case ixgbe_mac_X550:
3003         case ixgbe_mac_X550EM_x:
3004         case ixgbe_mac_x550em_a:
3005                 if (eicr & IXGBE_EICR_ECC) {
3006                         e_info(link, "Received ECC Err, initiating reset\n");
3007                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3008                         ixgbe_service_event_schedule(adapter);
3009                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3010                 }
3011                 ixgbe_check_overtemp_event(adapter, eicr);
3012                 break;
3013         default:
3014                 break;
3015         }
3016
3017         ixgbe_check_fan_failure(adapter, eicr);
3018         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3019                 ixgbe_ptp_check_pps_event(adapter);
3020
3021         /* would disable interrupts here but EIAM disabled it */
3022         napi_schedule_irqoff(&q_vector->napi);
3023
3024         /*
3025          * re-enable link(maybe) and non-queue interrupts, no flush.
3026          * ixgbe_poll will re-enable the queue interrupts
3027          */
3028         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3029                 ixgbe_irq_enable(adapter, false, false);
3030
3031         return IRQ_HANDLED;
3032 }
3033
3034 /**
3035  * ixgbe_request_irq - initialize interrupts
3036  * @adapter: board private structure
3037  *
3038  * Attempts to configure interrupts using the best available
3039  * capabilities of the hardware and kernel.
3040  **/
3041 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3042 {
3043         struct net_device *netdev = adapter->netdev;
3044         int err;
3045
3046         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3047                 err = ixgbe_request_msix_irqs(adapter);
3048         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3049                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3050                                   netdev->name, adapter);
3051         else
3052                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3053                                   netdev->name, adapter);
3054
3055         if (err)
3056                 e_err(probe, "request_irq failed, Error %d\n", err);
3057
3058         return err;
3059 }
3060
3061 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3062 {
3063         int vector;
3064
3065         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3066                 free_irq(adapter->pdev->irq, adapter);
3067                 return;
3068         }
3069
3070         if (!adapter->msix_entries)
3071                 return;
3072
3073         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3074                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3075                 struct msix_entry *entry = &adapter->msix_entries[vector];
3076
3077                 /* free only the irqs that were actually requested */
3078                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3079                         continue;
3080
3081                 /* clear the affinity_mask in the IRQ descriptor */
3082                 irq_set_affinity_hint(entry->vector, NULL);
3083
3084                 free_irq(entry->vector, q_vector);
3085         }
3086
3087         free_irq(adapter->msix_entries[vector].vector, adapter);
3088 }
3089
3090 /**
3091  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3092  * @adapter: board private structure
3093  **/
3094 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3095 {
3096         switch (adapter->hw.mac.type) {
3097         case ixgbe_mac_82598EB:
3098                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3099                 break;
3100         case ixgbe_mac_82599EB:
3101         case ixgbe_mac_X540:
3102         case ixgbe_mac_X550:
3103         case ixgbe_mac_X550EM_x:
3104         case ixgbe_mac_x550em_a:
3105                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3106                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3107                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3108                 break;
3109         default:
3110                 break;
3111         }
3112         IXGBE_WRITE_FLUSH(&adapter->hw);
3113         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3114                 int vector;
3115
3116                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3117                         synchronize_irq(adapter->msix_entries[vector].vector);
3118
3119                 synchronize_irq(adapter->msix_entries[vector++].vector);
3120         } else {
3121                 synchronize_irq(adapter->pdev->irq);
3122         }
3123 }
3124
3125 /**
3126  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3127  *
3128  **/
3129 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3130 {
3131         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3132
3133         ixgbe_write_eitr(q_vector);
3134
3135         ixgbe_set_ivar(adapter, 0, 0, 0);
3136         ixgbe_set_ivar(adapter, 1, 0, 0);
3137
3138         e_info(hw, "Legacy interrupt IVAR setup done\n");
3139 }
3140
3141 /**
3142  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3143  * @adapter: board private structure
3144  * @ring: structure containing ring specific data
3145  *
3146  * Configure the Tx descriptor ring after a reset.
3147  **/
3148 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3149                              struct ixgbe_ring *ring)
3150 {
3151         struct ixgbe_hw *hw = &adapter->hw;
3152         u64 tdba = ring->dma;
3153         int wait_loop = 10;
3154         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3155         u8 reg_idx = ring->reg_idx;
3156
3157         /* disable queue to avoid issues while updating state */
3158         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3159         IXGBE_WRITE_FLUSH(hw);
3160
3161         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3162                         (tdba & DMA_BIT_MASK(32)));
3163         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3164         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3165                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3166         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3167         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3168         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3169
3170         /*
3171          * set WTHRESH to encourage burst writeback, it should not be set
3172          * higher than 1 when:
3173          * - ITR is 0 as it could cause false TX hangs
3174          * - ITR is set to > 100k int/sec and BQL is enabled
3175          *
3176          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3177          * to or less than the number of on chip descriptors, which is
3178          * currently 40.
3179          */
3180         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3181                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3182         else
3183                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3184
3185         /*
3186          * Setting PTHRESH to 32 both improves performance
3187          * and avoids a TX hang with DFP enabled
3188          */
3189         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3190                    32;          /* PTHRESH = 32 */
3191
3192         /* reinitialize flowdirector state */
3193         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3194                 ring->atr_sample_rate = adapter->atr_sample_rate;
3195                 ring->atr_count = 0;
3196                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3197         } else {
3198                 ring->atr_sample_rate = 0;
3199         }
3200
3201         /* initialize XPS */
3202         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3203                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3204
3205                 if (q_vector)
3206                         netif_set_xps_queue(ring->netdev,
3207                                             &q_vector->affinity_mask,
3208                                             ring->queue_index);
3209         }
3210
3211         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3212
3213         /* enable queue */
3214         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3215
3216         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3217         if (hw->mac.type == ixgbe_mac_82598EB &&
3218             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3219                 return;
3220
3221         /* poll to verify queue is enabled */
3222         do {
3223                 usleep_range(1000, 2000);
3224                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3225         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3226         if (!wait_loop)
3227                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3228 }
3229
3230 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3231 {
3232         struct ixgbe_hw *hw = &adapter->hw;
3233         u32 rttdcs, mtqc;
3234         u8 tcs = netdev_get_num_tc(adapter->netdev);
3235
3236         if (hw->mac.type == ixgbe_mac_82598EB)
3237                 return;
3238
3239         /* disable the arbiter while setting MTQC */
3240         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3241         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3242         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3243
3244         /* set transmit pool layout */
3245         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3246                 mtqc = IXGBE_MTQC_VT_ENA;
3247                 if (tcs > 4)
3248                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3249                 else if (tcs > 1)
3250                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3251                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3252                          IXGBE_82599_VMDQ_4Q_MASK)
3253                         mtqc |= IXGBE_MTQC_32VF;
3254                 else
3255                         mtqc |= IXGBE_MTQC_64VF;
3256         } else {
3257                 if (tcs > 4)
3258                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3259                 else if (tcs > 1)
3260                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3261                 else
3262                         mtqc = IXGBE_MTQC_64Q_1PB;
3263         }
3264
3265         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3266
3267         /* Enable Security TX Buffer IFG for multiple pb */
3268         if (tcs) {
3269                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3270                 sectx |= IXGBE_SECTX_DCB;
3271                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3272         }
3273
3274         /* re-enable the arbiter */
3275         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3276         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3277 }
3278
3279 /**
3280  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3281  * @adapter: board private structure
3282  *
3283  * Configure the Tx unit of the MAC after a reset.
3284  **/
3285 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3286 {
3287         struct ixgbe_hw *hw = &adapter->hw;
3288         u32 dmatxctl;
3289         u32 i;
3290
3291         ixgbe_setup_mtqc(adapter);
3292
3293         if (hw->mac.type != ixgbe_mac_82598EB) {
3294                 /* DMATXCTL.EN must be before Tx queues are enabled */
3295                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3296                 dmatxctl |= IXGBE_DMATXCTL_TE;
3297                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3298         }
3299
3300         /* Setup the HW Tx Head and Tail descriptor pointers */
3301         for (i = 0; i < adapter->num_tx_queues; i++)
3302                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3303 }
3304
3305 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3306                                  struct ixgbe_ring *ring)
3307 {
3308         struct ixgbe_hw *hw = &adapter->hw;
3309         u8 reg_idx = ring->reg_idx;
3310         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3311
3312         srrctl |= IXGBE_SRRCTL_DROP_EN;
3313
3314         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3315 }
3316
3317 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3318                                   struct ixgbe_ring *ring)
3319 {
3320         struct ixgbe_hw *hw = &adapter->hw;
3321         u8 reg_idx = ring->reg_idx;
3322         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3323
3324         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3325
3326         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3327 }
3328
3329 #ifdef CONFIG_IXGBE_DCB
3330 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3331 #else
3332 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3333 #endif
3334 {
3335         int i;
3336         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3337
3338         if (adapter->ixgbe_ieee_pfc)
3339                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3340
3341         /*
3342          * We should set the drop enable bit if:
3343          *  SR-IOV is enabled
3344          *   or
3345          *  Number of Rx queues > 1 and flow control is disabled
3346          *
3347          *  This allows us to avoid head of line blocking for security
3348          *  and performance reasons.
3349          */
3350         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3351             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3352                 for (i = 0; i < adapter->num_rx_queues; i++)
3353                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3354         } else {
3355                 for (i = 0; i < adapter->num_rx_queues; i++)
3356                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3357         }
3358 }
3359
3360 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3361
3362 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3363                                    struct ixgbe_ring *rx_ring)
3364 {
3365         struct ixgbe_hw *hw = &adapter->hw;
3366         u32 srrctl;
3367         u8 reg_idx = rx_ring->reg_idx;
3368
3369         if (hw->mac.type == ixgbe_mac_82598EB) {
3370                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3371
3372                 /*
3373                  * if VMDq is not active we must program one srrctl register
3374                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3375                  */
3376                 reg_idx &= mask;
3377         }
3378
3379         /* configure header buffer length, needed for RSC */
3380         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3381
3382         /* configure the packet buffer length */
3383         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3384
3385         /* configure descriptor type */
3386         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3387
3388         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3389 }
3390
3391 /**
3392  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3393  * @adapter: device handle
3394  *
3395  *  - 82598/82599/X540:     128
3396  *  - X550(non-SRIOV mode): 512
3397  *  - X550(SRIOV mode):     64
3398  */
3399 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3400 {
3401         if (adapter->hw.mac.type < ixgbe_mac_X550)
3402                 return 128;
3403         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3404                 return 64;
3405         else
3406                 return 512;
3407 }
3408
3409 /**
3410  * ixgbe_store_reta - Write the RETA table to HW
3411  * @adapter: device handle
3412  *
3413  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3414  */
3415 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3416 {
3417         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3418         struct ixgbe_hw *hw = &adapter->hw;
3419         u32 reta = 0;
3420         u32 indices_multi;
3421         u8 *indir_tbl = adapter->rss_indir_tbl;
3422
3423         /* Fill out the redirection table as follows:
3424          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3425          *    indices.
3426          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3427          *  - X550:       8 bit wide entries containing 6 bit RSS index
3428          */
3429         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3430                 indices_multi = 0x11;
3431         else
3432                 indices_multi = 0x1;
3433
3434         /* Write redirection table to HW */
3435         for (i = 0; i < reta_entries; i++) {
3436                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3437                 if ((i & 3) == 3) {
3438                         if (i < 128)
3439                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3440                         else
3441                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3442                                                 reta);
3443                         reta = 0;
3444                 }
3445         }
3446 }
3447
3448 /**
3449  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3450  * @adapter: device handle
3451  *
3452  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3453  */
3454 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3455 {
3456         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3457         struct ixgbe_hw *hw = &adapter->hw;
3458         u32 vfreta = 0;
3459         unsigned int pf_pool = adapter->num_vfs;
3460
3461         /* Write redirection table to HW */
3462         for (i = 0; i < reta_entries; i++) {
3463                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3464                 if ((i & 3) == 3) {
3465                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3466                                         vfreta);
3467                         vfreta = 0;
3468                 }
3469         }
3470 }
3471
3472 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3473 {
3474         struct ixgbe_hw *hw = &adapter->hw;
3475         u32 i, j;
3476         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3477         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3478
3479         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3480          * make full use of any rings they may have.  We will use the
3481          * PSRTYPE register to control how many rings we use within the PF.
3482          */
3483         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3484                 rss_i = 4;
3485
3486         /* Fill out hash function seeds */
3487         for (i = 0; i < 10; i++)
3488                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3489
3490         /* Fill out redirection table */
3491         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3492
3493         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3494                 if (j == rss_i)
3495                         j = 0;
3496
3497                 adapter->rss_indir_tbl[i] = j;
3498         }
3499
3500         ixgbe_store_reta(adapter);
3501 }
3502
3503 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3504 {
3505         struct ixgbe_hw *hw = &adapter->hw;
3506         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3507         unsigned int pf_pool = adapter->num_vfs;
3508         int i, j;
3509
3510         /* Fill out hash function seeds */
3511         for (i = 0; i < 10; i++)
3512                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3513                                 adapter->rss_key[i]);
3514
3515         /* Fill out the redirection table */
3516         for (i = 0, j = 0; i < 64; i++, j++) {
3517                 if (j == rss_i)
3518                         j = 0;
3519
3520                 adapter->rss_indir_tbl[i] = j;
3521         }
3522
3523         ixgbe_store_vfreta(adapter);
3524 }
3525
3526 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3527 {
3528         struct ixgbe_hw *hw = &adapter->hw;
3529         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3530         u32 rxcsum;
3531
3532         /* Disable indicating checksum in descriptor, enables RSS hash */
3533         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3534         rxcsum |= IXGBE_RXCSUM_PCSD;
3535         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3536
3537         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3538                 if (adapter->ring_feature[RING_F_RSS].mask)
3539                         mrqc = IXGBE_MRQC_RSSEN;
3540         } else {
3541                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3542
3543                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3544                         if (tcs > 4)
3545                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3546                         else if (tcs > 1)
3547                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3548                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3549                                  IXGBE_82599_VMDQ_4Q_MASK)
3550                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3551                         else
3552                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3553                 } else {
3554                         if (tcs > 4)
3555                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3556                         else if (tcs > 1)
3557                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3558                         else
3559                                 mrqc = IXGBE_MRQC_RSSEN;
3560                 }
3561         }
3562
3563         /* Perform hash on these packet types */
3564         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3565                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3566                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3567                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3568
3569         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3570                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3571         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3572                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3573
3574         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3575         if ((hw->mac.type >= ixgbe_mac_X550) &&
3576             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3577                 unsigned int pf_pool = adapter->num_vfs;
3578
3579                 /* Enable VF RSS mode */
3580                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3581                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3582
3583                 /* Setup RSS through the VF registers */
3584                 ixgbe_setup_vfreta(adapter);
3585                 vfmrqc = IXGBE_MRQC_RSSEN;
3586                 vfmrqc |= rss_field;
3587                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3588         } else {
3589                 ixgbe_setup_reta(adapter);
3590                 mrqc |= rss_field;
3591                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3592         }
3593 }
3594
3595 /**
3596  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3597  * @adapter:    address of board private structure
3598  * @index:      index of ring to set
3599  **/
3600 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3601                                    struct ixgbe_ring *ring)
3602 {
3603         struct ixgbe_hw *hw = &adapter->hw;
3604         u32 rscctrl;
3605         u8 reg_idx = ring->reg_idx;
3606
3607         if (!ring_is_rsc_enabled(ring))
3608                 return;
3609
3610         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3611         rscctrl |= IXGBE_RSCCTL_RSCEN;
3612         /*
3613          * we must limit the number of descriptors so that the
3614          * total size of max desc * buf_len is not greater
3615          * than 65536
3616          */
3617         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3618         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3619 }
3620
3621 #define IXGBE_MAX_RX_DESC_POLL 10
3622 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3623                                        struct ixgbe_ring *ring)
3624 {
3625         struct ixgbe_hw *hw = &adapter->hw;
3626         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3627         u32 rxdctl;
3628         u8 reg_idx = ring->reg_idx;
3629
3630         if (ixgbe_removed(hw->hw_addr))
3631                 return;
3632         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3633         if (hw->mac.type == ixgbe_mac_82598EB &&
3634             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3635                 return;
3636
3637         do {
3638                 usleep_range(1000, 2000);
3639                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3640         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3641
3642         if (!wait_loop) {
3643                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3644                       "the polling period\n", reg_idx);
3645         }
3646 }
3647
3648 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3649                             struct ixgbe_ring *ring)
3650 {
3651         struct ixgbe_hw *hw = &adapter->hw;
3652         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3653         u32 rxdctl;
3654         u8 reg_idx = ring->reg_idx;
3655
3656         if (ixgbe_removed(hw->hw_addr))
3657                 return;
3658         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3659         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3660
3661         /* write value back with RXDCTL.ENABLE bit cleared */
3662         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3663
3664         if (hw->mac.type == ixgbe_mac_82598EB &&
3665             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3666                 return;
3667
3668         /* the hardware may take up to 100us to really disable the rx queue */
3669         do {
3670                 udelay(10);
3671                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3672         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3673
3674         if (!wait_loop) {
3675                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3676                       "the polling period\n", reg_idx);
3677         }
3678 }
3679
3680 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3681                              struct ixgbe_ring *ring)
3682 {
3683         struct ixgbe_hw *hw = &adapter->hw;
3684         u64 rdba = ring->dma;
3685         u32 rxdctl;
3686         u8 reg_idx = ring->reg_idx;
3687
3688         /* disable queue to avoid issues while updating state */
3689         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3690         ixgbe_disable_rx_queue(adapter, ring);
3691
3692         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3693         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3694         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3695                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3696         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3697         IXGBE_WRITE_FLUSH(hw);
3698
3699         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3700         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3701         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3702
3703         ixgbe_configure_srrctl(adapter, ring);
3704         ixgbe_configure_rscctl(adapter, ring);
3705
3706         if (hw->mac.type == ixgbe_mac_82598EB) {
3707                 /*
3708                  * enable cache line friendly hardware writes:
3709                  * PTHRESH=32 descriptors (half the internal cache),
3710                  * this also removes ugly rx_no_buffer_count increment
3711                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3712                  * WTHRESH=8 burst writeback up to two cache lines
3713                  */
3714                 rxdctl &= ~0x3FFFFF;
3715                 rxdctl |=  0x080420;
3716         }
3717
3718         /* enable receive descriptor ring */
3719         rxdctl |= IXGBE_RXDCTL_ENABLE;
3720         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3721
3722         ixgbe_rx_desc_queue_enable(adapter, ring);
3723         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3724 }
3725
3726 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3727 {
3728         struct ixgbe_hw *hw = &adapter->hw;
3729         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3730         u16 pool;
3731
3732         /* PSRTYPE must be initialized in non 82598 adapters */
3733         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3734                       IXGBE_PSRTYPE_UDPHDR |
3735                       IXGBE_PSRTYPE_IPV4HDR |
3736                       IXGBE_PSRTYPE_L2HDR |
3737                       IXGBE_PSRTYPE_IPV6HDR;
3738
3739         if (hw->mac.type == ixgbe_mac_82598EB)
3740                 return;
3741
3742         if (rss_i > 3)
3743                 psrtype |= 2u << 29;
3744         else if (rss_i > 1)
3745                 psrtype |= 1u << 29;
3746
3747         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3748                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3749 }
3750
3751 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3752 {
3753         struct ixgbe_hw *hw = &adapter->hw;
3754         u32 reg_offset, vf_shift;
3755         u32 gcr_ext, vmdctl;
3756         int i;
3757
3758         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3759                 return;
3760
3761         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3762         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3763         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3764         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3765         vmdctl |= IXGBE_VT_CTL_REPLEN;
3766         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3767
3768         vf_shift = VMDQ_P(0) % 32;
3769         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3770
3771         /* Enable only the PF's pool for Tx/Rx */
3772         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3773         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3774         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3775         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3776         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3777                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3778
3779         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3780         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3781
3782         /* clear VLAN promisc flag so VFTA will be updated if necessary */
3783         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3784
3785         /*
3786          * Set up VF register offsets for selected VT Mode,
3787          * i.e. 32 or 64 VFs for SR-IOV
3788          */
3789         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3790         case IXGBE_82599_VMDQ_8Q_MASK:
3791                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3792                 break;
3793         case IXGBE_82599_VMDQ_4Q_MASK:
3794                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3795                 break;
3796         default:
3797                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3798                 break;
3799         }
3800
3801         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3802
3803         for (i = 0; i < adapter->num_vfs; i++) {
3804                 /* configure spoof checking */
3805                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3806                                           adapter->vfinfo[i].spoofchk_enabled);
3807
3808                 /* Enable/Disable RSS query feature  */
3809                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3810                                           adapter->vfinfo[i].rss_query_enabled);
3811         }
3812 }
3813
3814 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3815 {
3816         struct ixgbe_hw *hw = &adapter->hw;
3817         struct net_device *netdev = adapter->netdev;
3818         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3819         struct ixgbe_ring *rx_ring;
3820         int i;
3821         u32 mhadd, hlreg0;
3822
3823 #ifdef IXGBE_FCOE
3824         /* adjust max frame to be able to do baby jumbo for FCoE */
3825         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3826             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3827                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3828
3829 #endif /* IXGBE_FCOE */
3830
3831         /* adjust max frame to be at least the size of a standard frame */
3832         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3833                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3834
3835         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3836         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3837                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3838                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3839
3840                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3841         }
3842
3843         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3844         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3845         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3846         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3847
3848         /*
3849          * Setup the HW Rx Head and Tail Descriptor Pointers and
3850          * the Base and Length of the Rx Descriptor Ring
3851          */
3852         for (i = 0; i < adapter->num_rx_queues; i++) {
3853                 rx_ring = adapter->rx_ring[i];
3854                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3855                         set_ring_rsc_enabled(rx_ring);
3856                 else
3857                         clear_ring_rsc_enabled(rx_ring);
3858         }
3859 }
3860
3861 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3862 {
3863         struct ixgbe_hw *hw = &adapter->hw;
3864         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3865
3866         switch (hw->mac.type) {
3867         case ixgbe_mac_82598EB:
3868                 /*
3869                  * For VMDq support of different descriptor types or
3870                  * buffer sizes through the use of multiple SRRCTL
3871                  * registers, RDRXCTL.MVMEN must be set to 1
3872                  *
3873                  * also, the manual doesn't mention it clearly but DCA hints
3874                  * will only use queue 0's tags unless this bit is set.  Side
3875                  * effects of setting this bit are only that SRRCTL must be
3876                  * fully programmed [0..15]
3877                  */
3878                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3879                 break;
3880         case ixgbe_mac_X550:
3881         case ixgbe_mac_X550EM_x:
3882         case ixgbe_mac_x550em_a:
3883                 if (adapter->num_vfs)
3884                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3885                 /* fall through for older HW */
3886         case ixgbe_mac_82599EB:
3887         case ixgbe_mac_X540:
3888                 /* Disable RSC for ACK packets */
3889                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3890                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3891                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3892                 /* hardware requires some bits to be set by default */
3893                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3894                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3895                 break;
3896         default:
3897                 /* We should do nothing since we don't know this hardware */
3898                 return;
3899         }
3900
3901         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3902 }
3903
3904 /**
3905  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3906  * @adapter: board private structure
3907  *
3908  * Configure the Rx unit of the MAC after a reset.
3909  **/
3910 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3911 {
3912         struct ixgbe_hw *hw = &adapter->hw;
3913         int i;
3914         u32 rxctrl, rfctl;
3915
3916         /* disable receives while setting up the descriptors */
3917         hw->mac.ops.disable_rx(hw);
3918
3919         ixgbe_setup_psrtype(adapter);
3920         ixgbe_setup_rdrxctl(adapter);
3921
3922         /* RSC Setup */
3923         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3924         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3925         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3926                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3927
3928         /* disable NFS filtering */
3929         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
3930         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3931
3932         /* Program registers for the distribution of queues */
3933         ixgbe_setup_mrqc(adapter);
3934
3935         /* set_rx_buffer_len must be called before ring initialization */
3936         ixgbe_set_rx_buffer_len(adapter);
3937
3938         /*
3939          * Setup the HW Rx Head and Tail Descriptor Pointers and
3940          * the Base and Length of the Rx Descriptor Ring
3941          */
3942         for (i = 0; i < adapter->num_rx_queues; i++)
3943                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3944
3945         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3946         /* disable drop enable for 82598 parts */
3947         if (hw->mac.type == ixgbe_mac_82598EB)
3948                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3949
3950         /* enable all receives */
3951         rxctrl |= IXGBE_RXCTRL_RXEN;
3952         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3953 }
3954
3955 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3956                                  __be16 proto, u16 vid)
3957 {
3958         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3959         struct ixgbe_hw *hw = &adapter->hw;
3960
3961         /* add VID to filter table */
3962         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3963                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3964
3965         set_bit(vid, adapter->active_vlans);
3966
3967         return 0;
3968 }
3969
3970 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3971 {
3972         u32 vlvf;
3973         int idx;
3974
3975         /* short cut the special case */
3976         if (vlan == 0)
3977                 return 0;
3978
3979         /* Search for the vlan id in the VLVF entries */
3980         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
3981                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
3982                 if ((vlvf & VLAN_VID_MASK) == vlan)
3983                         break;
3984         }
3985
3986         return idx;
3987 }
3988
3989 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
3990 {
3991         struct ixgbe_hw *hw = &adapter->hw;
3992         u32 bits, word;
3993         int idx;
3994
3995         idx = ixgbe_find_vlvf_entry(hw, vid);
3996         if (!idx)
3997                 return;
3998
3999         /* See if any other pools are set for this VLAN filter
4000          * entry other than the PF.
4001          */
4002         word = idx * 2 + (VMDQ_P(0) / 32);
4003         bits = ~BIT(VMDQ_P(0) % 32);
4004         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4005
4006         /* Disable the filter so this falls into the default pool. */
4007         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4008                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4009                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4010                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4011         }
4012 }
4013
4014 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4015                                   __be16 proto, u16 vid)
4016 {
4017         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4018         struct ixgbe_hw *hw = &adapter->hw;
4019
4020         /* remove VID from filter table */
4021         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4022                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4023
4024         clear_bit(vid, adapter->active_vlans);
4025
4026         return 0;
4027 }
4028
4029 /**
4030  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4031  * @adapter: driver data
4032  */
4033 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4034 {
4035         struct ixgbe_hw *hw = &adapter->hw;
4036         u32 vlnctrl;
4037         int i, j;
4038
4039         switch (hw->mac.type) {
4040         case ixgbe_mac_82598EB:
4041                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4042                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4043                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4044                 break;
4045         case ixgbe_mac_82599EB:
4046         case ixgbe_mac_X540:
4047         case ixgbe_mac_X550:
4048         case ixgbe_mac_X550EM_x:
4049         case ixgbe_mac_x550em_a:
4050                 for (i = 0; i < adapter->num_rx_queues; i++) {
4051                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4052
4053                         if (ring->l2_accel_priv)
4054                                 continue;
4055                         j = ring->reg_idx;
4056                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4057                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4058                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4059                 }
4060                 break;
4061         default:
4062                 break;
4063         }
4064 }
4065
4066 /**
4067  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4068  * @adapter: driver data
4069  */
4070 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4071 {
4072         struct ixgbe_hw *hw = &adapter->hw;
4073         u32 vlnctrl;
4074         int i, j;
4075
4076         switch (hw->mac.type) {
4077         case ixgbe_mac_82598EB:
4078                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4079                 vlnctrl |= IXGBE_VLNCTRL_VME;
4080                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4081                 break;
4082         case ixgbe_mac_82599EB:
4083         case ixgbe_mac_X540:
4084         case ixgbe_mac_X550:
4085         case ixgbe_mac_X550EM_x:
4086         case ixgbe_mac_x550em_a:
4087                 for (i = 0; i < adapter->num_rx_queues; i++) {
4088                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4089
4090                         if (ring->l2_accel_priv)
4091                                 continue;
4092                         j = ring->reg_idx;
4093                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4094                         vlnctrl |= IXGBE_RXDCTL_VME;
4095                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4096                 }
4097                 break;
4098         default:
4099                 break;
4100         }
4101 }
4102
4103 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4104 {
4105         struct ixgbe_hw *hw = &adapter->hw;
4106         u32 vlnctrl, i;
4107
4108         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4109
4110         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4111         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4112                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4113                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4114         } else {
4115                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4116                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4117                 return;
4118         }
4119
4120         /* Nothing to do for 82598 */
4121         if (hw->mac.type == ixgbe_mac_82598EB)
4122                 return;
4123
4124         /* We are already in VLAN promisc, nothing to do */
4125         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4126                 return;
4127
4128         /* Set flag so we don't redo unnecessary work */
4129         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4130
4131         /* Add PF to all active pools */
4132         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4133                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4134                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4135
4136                 vlvfb |= BIT(VMDQ_P(0) % 32);
4137                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4138         }
4139
4140         /* Set all bits in the VLAN filter table array */
4141         for (i = hw->mac.vft_size; i--;)
4142                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4143 }
4144
4145 #define VFTA_BLOCK_SIZE 8
4146 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4147 {
4148         struct ixgbe_hw *hw = &adapter->hw;
4149         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4150         u32 vid_start = vfta_offset * 32;
4151         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4152         u32 i, vid, word, bits;
4153
4154         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4155                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4156
4157                 /* pull VLAN ID from VLVF */
4158                 vid = vlvf & VLAN_VID_MASK;
4159
4160                 /* only concern outselves with a certain range */
4161                 if (vid < vid_start || vid >= vid_end)
4162                         continue;
4163
4164                 if (vlvf) {
4165                         /* record VLAN ID in VFTA */
4166                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4167
4168                         /* if PF is part of this then continue */
4169                         if (test_bit(vid, adapter->active_vlans))
4170                                 continue;
4171                 }
4172
4173                 /* remove PF from the pool */
4174                 word = i * 2 + VMDQ_P(0) / 32;
4175                 bits = ~BIT(VMDQ_P(0) % 32);
4176                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4177                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4178         }
4179
4180         /* extract values from active_vlans and write back to VFTA */
4181         for (i = VFTA_BLOCK_SIZE; i--;) {
4182                 vid = (vfta_offset + i) * 32;
4183                 word = vid / BITS_PER_LONG;
4184                 bits = vid % BITS_PER_LONG;
4185
4186                 vfta[i] |= adapter->active_vlans[word] >> bits;
4187
4188                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4189         }
4190 }
4191
4192 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4193 {
4194         struct ixgbe_hw *hw = &adapter->hw;
4195         u32 vlnctrl, i;
4196
4197         /* Set VLAN filtering to enabled */
4198         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4199         vlnctrl |= IXGBE_VLNCTRL_VFE;
4200         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4201
4202         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4203             hw->mac.type == ixgbe_mac_82598EB)
4204                 return;
4205
4206         /* We are not in VLAN promisc, nothing to do */
4207         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4208                 return;
4209
4210         /* Set flag so we don't redo unnecessary work */
4211         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4212
4213         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4214                 ixgbe_scrub_vfta(adapter, i);
4215 }
4216
4217 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4218 {
4219         u16 vid = 1;
4220
4221         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4222
4223         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4224                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4225 }
4226
4227 /**
4228  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4229  * @netdev: network interface device structure
4230  *
4231  * Writes multicast address list to the MTA hash table.
4232  * Returns: -ENOMEM on failure
4233  *                0 on no addresses written
4234  *                X on writing X addresses to MTA
4235  **/
4236 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4237 {
4238         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4239         struct ixgbe_hw *hw = &adapter->hw;
4240
4241         if (!netif_running(netdev))
4242                 return 0;
4243
4244         if (hw->mac.ops.update_mc_addr_list)
4245                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4246         else
4247                 return -ENOMEM;
4248
4249 #ifdef CONFIG_PCI_IOV
4250         ixgbe_restore_vf_multicasts(adapter);
4251 #endif
4252
4253         return netdev_mc_count(netdev);
4254 }
4255
4256 #ifdef CONFIG_PCI_IOV
4257 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4258 {
4259         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4260         struct ixgbe_hw *hw = &adapter->hw;
4261         int i;
4262
4263         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4264                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4265
4266                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4267                         hw->mac.ops.set_rar(hw, i,
4268                                             mac_table->addr,
4269                                             mac_table->pool,
4270                                             IXGBE_RAH_AV);
4271                 else
4272                         hw->mac.ops.clear_rar(hw, i);
4273         }
4274 }
4275
4276 #endif
4277 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4278 {
4279         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4280         struct ixgbe_hw *hw = &adapter->hw;
4281         int i;
4282
4283         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4284                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4285                         continue;
4286
4287                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4288
4289                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4290                         hw->mac.ops.set_rar(hw, i,
4291                                             mac_table->addr,
4292                                             mac_table->pool,
4293                                             IXGBE_RAH_AV);
4294                 else
4295                         hw->mac.ops.clear_rar(hw, i);
4296         }
4297 }
4298
4299 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4300 {
4301         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4302         struct ixgbe_hw *hw = &adapter->hw;
4303         int i;
4304
4305         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4306                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4307                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4308         }
4309
4310         ixgbe_sync_mac_table(adapter);
4311 }
4312
4313 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4314 {
4315         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         int i, count = 0;
4318
4319         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4320                 /* do not count default RAR as available */
4321                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4322                         continue;
4323
4324                 /* only count unused and addresses that belong to us */
4325                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4326                         if (mac_table->pool != pool)
4327                                 continue;
4328                 }
4329
4330                 count++;
4331         }
4332
4333         return count;
4334 }
4335
4336 /* this function destroys the first RAR entry */
4337 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4338 {
4339         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4340         struct ixgbe_hw *hw = &adapter->hw;
4341
4342         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4343         mac_table->pool = VMDQ_P(0);
4344
4345         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4346
4347         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4348                             IXGBE_RAH_AV);
4349 }
4350
4351 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4352                          const u8 *addr, u16 pool)
4353 {
4354         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4355         struct ixgbe_hw *hw = &adapter->hw;
4356         int i;
4357
4358         if (is_zero_ether_addr(addr))
4359                 return -EINVAL;
4360
4361         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4362                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4363                         continue;
4364
4365                 ether_addr_copy(mac_table->addr, addr);
4366                 mac_table->pool = pool;
4367
4368                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4369                                     IXGBE_MAC_STATE_IN_USE;
4370
4371                 ixgbe_sync_mac_table(adapter);
4372
4373                 return i;
4374         }
4375
4376         return -ENOMEM;
4377 }
4378
4379 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4380                          const u8 *addr, u16 pool)
4381 {
4382         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4383         struct ixgbe_hw *hw = &adapter->hw;
4384         int i;
4385
4386         if (is_zero_ether_addr(addr))
4387                 return -EINVAL;
4388
4389         /* search table for addr, if found clear IN_USE flag and sync */
4390         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4391                 /* we can only delete an entry if it is in use */
4392                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4393                         continue;
4394                 /* we only care about entries that belong to the given pool */
4395                 if (mac_table->pool != pool)
4396                         continue;
4397                 /* we only care about a specific MAC address */
4398                 if (!ether_addr_equal(addr, mac_table->addr))
4399                         continue;
4400
4401                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4402                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4403
4404                 ixgbe_sync_mac_table(adapter);
4405
4406                 return 0;
4407         }
4408
4409         return -ENOMEM;
4410 }
4411 /**
4412  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4413  * @netdev: network interface device structure
4414  *
4415  * Writes unicast address list to the RAR table.
4416  * Returns: -ENOMEM on failure/insufficient address space
4417  *                0 on no addresses written
4418  *                X on writing X addresses to the RAR table
4419  **/
4420 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4421 {
4422         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4423         int count = 0;
4424
4425         /* return ENOMEM indicating insufficient memory for addresses */
4426         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4427                 return -ENOMEM;
4428
4429         if (!netdev_uc_empty(netdev)) {
4430                 struct netdev_hw_addr *ha;
4431                 netdev_for_each_uc_addr(ha, netdev) {
4432                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4433                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4434                         count++;
4435                 }
4436         }
4437         return count;
4438 }
4439
4440 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4441 {
4442         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4443         int ret;
4444
4445         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4446
4447         return min_t(int, ret, 0);
4448 }
4449
4450 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4451 {
4452         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4453
4454         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4455
4456         return 0;
4457 }
4458
4459 /**
4460  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4461  * @netdev: network interface device structure
4462  *
4463  * The set_rx_method entry point is called whenever the unicast/multicast
4464  * address list or the network interface flags are updated.  This routine is
4465  * responsible for configuring the hardware for proper unicast, multicast and
4466  * promiscuous mode.
4467  **/
4468 void ixgbe_set_rx_mode(struct net_device *netdev)
4469 {
4470         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4471         struct ixgbe_hw *hw = &adapter->hw;
4472         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4473         netdev_features_t features = netdev->features;
4474         int count;
4475
4476         /* Check for Promiscuous and All Multicast modes */
4477         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4478
4479         /* set all bits that we expect to always be set */
4480         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4481         fctrl |= IXGBE_FCTRL_BAM;
4482         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4483         fctrl |= IXGBE_FCTRL_PMCF;
4484
4485         /* clear the bits we are changing the status of */
4486         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4487         if (netdev->flags & IFF_PROMISC) {
4488                 hw->addr_ctrl.user_set_promisc = true;
4489                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4490                 vmolr |= IXGBE_VMOLR_MPE;
4491                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4492         } else {
4493                 if (netdev->flags & IFF_ALLMULTI) {
4494                         fctrl |= IXGBE_FCTRL_MPE;
4495                         vmolr |= IXGBE_VMOLR_MPE;
4496                 }
4497                 hw->addr_ctrl.user_set_promisc = false;
4498         }
4499
4500         /*
4501          * Write addresses to available RAR registers, if there is not
4502          * sufficient space to store all the addresses then enable
4503          * unicast promiscuous mode
4504          */
4505         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4506                 fctrl |= IXGBE_FCTRL_UPE;
4507                 vmolr |= IXGBE_VMOLR_ROPE;
4508         }
4509
4510         /* Write addresses to the MTA, if the attempt fails
4511          * then we should just turn on promiscuous mode so
4512          * that we can at least receive multicast traffic
4513          */
4514         count = ixgbe_write_mc_addr_list(netdev);
4515         if (count < 0) {
4516                 fctrl |= IXGBE_FCTRL_MPE;
4517                 vmolr |= IXGBE_VMOLR_MPE;
4518         } else if (count) {
4519                 vmolr |= IXGBE_VMOLR_ROMPE;
4520         }
4521
4522         if (hw->mac.type != ixgbe_mac_82598EB) {
4523                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4524                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4525                            IXGBE_VMOLR_ROPE);
4526                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4527         }
4528
4529         /* This is useful for sniffing bad packets. */
4530         if (features & NETIF_F_RXALL) {
4531                 /* UPE and MPE will be handled by normal PROMISC logic
4532                  * in e1000e_set_rx_mode */
4533                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4534                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4535                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4536
4537                 fctrl &= ~(IXGBE_FCTRL_DPF);
4538                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4539         }
4540
4541         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4542
4543         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4544                 ixgbe_vlan_strip_enable(adapter);
4545         else
4546                 ixgbe_vlan_strip_disable(adapter);
4547
4548         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4549                 ixgbe_vlan_promisc_disable(adapter);
4550         else
4551                 ixgbe_vlan_promisc_enable(adapter);
4552 }
4553
4554 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4555 {
4556         int q_idx;
4557
4558         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4559                 napi_enable(&adapter->q_vector[q_idx]->napi);
4560 }
4561
4562 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4563 {
4564         int q_idx;
4565
4566         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4567                 napi_disable(&adapter->q_vector[q_idx]->napi);
4568 }
4569
4570 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4571 {
4572         struct ixgbe_hw *hw = &adapter->hw;
4573         u32 vxlanctrl;
4574
4575         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4576                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4577                 return;
4578
4579         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4580         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4581
4582         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4583                 adapter->vxlan_port = 0;
4584
4585         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4586                 adapter->geneve_port = 0;
4587 }
4588
4589 #ifdef CONFIG_IXGBE_DCB
4590 /**
4591  * ixgbe_configure_dcb - Configure DCB hardware
4592  * @adapter: ixgbe adapter struct
4593  *
4594  * This is called by the driver on open to configure the DCB hardware.
4595  * This is also called by the gennetlink interface when reconfiguring
4596  * the DCB state.
4597  */
4598 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4599 {
4600         struct ixgbe_hw *hw = &adapter->hw;
4601         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4602
4603         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4604                 if (hw->mac.type == ixgbe_mac_82598EB)
4605                         netif_set_gso_max_size(adapter->netdev, 65536);
4606                 return;
4607         }
4608
4609         if (hw->mac.type == ixgbe_mac_82598EB)
4610                 netif_set_gso_max_size(adapter->netdev, 32768);
4611
4612 #ifdef IXGBE_FCOE
4613         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4614                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4615 #endif
4616
4617         /* reconfigure the hardware */
4618         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4619                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4620                                                 DCB_TX_CONFIG);
4621                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4622                                                 DCB_RX_CONFIG);
4623                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4624         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4625                 ixgbe_dcb_hw_ets(&adapter->hw,
4626                                  adapter->ixgbe_ieee_ets,
4627                                  max_frame);
4628                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4629                                         adapter->ixgbe_ieee_pfc->pfc_en,
4630                                         adapter->ixgbe_ieee_ets->prio_tc);
4631         }
4632
4633         /* Enable RSS Hash per TC */
4634         if (hw->mac.type != ixgbe_mac_82598EB) {
4635                 u32 msb = 0;
4636                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4637
4638                 while (rss_i) {
4639                         msb++;
4640                         rss_i >>= 1;
4641                 }
4642
4643                 /* write msb to all 8 TCs in one write */
4644                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4645         }
4646 }
4647 #endif
4648
4649 /* Additional bittime to account for IXGBE framing */
4650 #define IXGBE_ETH_FRAMING 20
4651
4652 /**
4653  * ixgbe_hpbthresh - calculate high water mark for flow control
4654  *
4655  * @adapter: board private structure to calculate for
4656  * @pb: packet buffer to calculate
4657  */
4658 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4659 {
4660         struct ixgbe_hw *hw = &adapter->hw;
4661         struct net_device *dev = adapter->netdev;
4662         int link, tc, kb, marker;
4663         u32 dv_id, rx_pba;
4664
4665         /* Calculate max LAN frame size */
4666         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4667
4668 #ifdef IXGBE_FCOE
4669         /* FCoE traffic class uses FCOE jumbo frames */
4670         if ((dev->features & NETIF_F_FCOE_MTU) &&
4671             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4672             (pb == ixgbe_fcoe_get_tc(adapter)))
4673                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4674 #endif
4675
4676         /* Calculate delay value for device */
4677         switch (hw->mac.type) {
4678         case ixgbe_mac_X540:
4679         case ixgbe_mac_X550:
4680         case ixgbe_mac_X550EM_x:
4681         case ixgbe_mac_x550em_a:
4682                 dv_id = IXGBE_DV_X540(link, tc);
4683                 break;
4684         default:
4685                 dv_id = IXGBE_DV(link, tc);
4686                 break;
4687         }
4688
4689         /* Loopback switch introduces additional latency */
4690         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4691                 dv_id += IXGBE_B2BT(tc);
4692
4693         /* Delay value is calculated in bit times convert to KB */
4694         kb = IXGBE_BT2KB(dv_id);
4695         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4696
4697         marker = rx_pba - kb;
4698
4699         /* It is possible that the packet buffer is not large enough
4700          * to provide required headroom. In this case throw an error
4701          * to user and a do the best we can.
4702          */
4703         if (marker < 0) {
4704                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4705                             "headroom to support flow control."
4706                             "Decrease MTU or number of traffic classes\n", pb);
4707                 marker = tc + 1;
4708         }
4709
4710         return marker;
4711 }
4712
4713 /**
4714  * ixgbe_lpbthresh - calculate low water mark for for flow control
4715  *
4716  * @adapter: board private structure to calculate for
4717  * @pb: packet buffer to calculate
4718  */
4719 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4720 {
4721         struct ixgbe_hw *hw = &adapter->hw;
4722         struct net_device *dev = adapter->netdev;
4723         int tc;
4724         u32 dv_id;
4725
4726         /* Calculate max LAN frame size */
4727         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4728
4729 #ifdef IXGBE_FCOE
4730         /* FCoE traffic class uses FCOE jumbo frames */
4731         if ((dev->features & NETIF_F_FCOE_MTU) &&
4732             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4733             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4734                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4735 #endif
4736
4737         /* Calculate delay value for device */
4738         switch (hw->mac.type) {
4739         case ixgbe_mac_X540:
4740         case ixgbe_mac_X550:
4741         case ixgbe_mac_X550EM_x:
4742         case ixgbe_mac_x550em_a:
4743                 dv_id = IXGBE_LOW_DV_X540(tc);
4744                 break;
4745         default:
4746                 dv_id = IXGBE_LOW_DV(tc);
4747                 break;
4748         }
4749
4750         /* Delay value is calculated in bit times convert to KB */
4751         return IXGBE_BT2KB(dv_id);
4752 }
4753
4754 /*
4755  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4756  */
4757 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4758 {
4759         struct ixgbe_hw *hw = &adapter->hw;
4760         int num_tc = netdev_get_num_tc(adapter->netdev);
4761         int i;
4762
4763         if (!num_tc)
4764                 num_tc = 1;
4765
4766         for (i = 0; i < num_tc; i++) {
4767                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4768                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4769
4770                 /* Low water marks must not be larger than high water marks */
4771                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4772                         hw->fc.low_water[i] = 0;
4773         }
4774
4775         for (; i < MAX_TRAFFIC_CLASS; i++)
4776                 hw->fc.high_water[i] = 0;
4777 }
4778
4779 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4780 {
4781         struct ixgbe_hw *hw = &adapter->hw;
4782         int hdrm;
4783         u8 tc = netdev_get_num_tc(adapter->netdev);
4784
4785         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4786             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4787                 hdrm = 32 << adapter->fdir_pballoc;
4788         else
4789                 hdrm = 0;
4790
4791         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4792         ixgbe_pbthresh_setup(adapter);
4793 }
4794
4795 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4796 {
4797         struct ixgbe_hw *hw = &adapter->hw;
4798         struct hlist_node *node2;
4799         struct ixgbe_fdir_filter *filter;
4800
4801         spin_lock(&adapter->fdir_perfect_lock);
4802
4803         if (!hlist_empty(&adapter->fdir_filter_list))
4804                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4805
4806         hlist_for_each_entry_safe(filter, node2,
4807                                   &adapter->fdir_filter_list, fdir_node) {
4808                 ixgbe_fdir_write_perfect_filter_82599(hw,
4809                                 &filter->filter,
4810                                 filter->sw_idx,
4811                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4812                                 IXGBE_FDIR_DROP_QUEUE :
4813                                 adapter->rx_ring[filter->action]->reg_idx);
4814         }
4815
4816         spin_unlock(&adapter->fdir_perfect_lock);
4817 }
4818
4819 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4820                                       struct ixgbe_adapter *adapter)
4821 {
4822         struct ixgbe_hw *hw = &adapter->hw;
4823         u32 vmolr;
4824
4825         /* No unicast promiscuous support for VMDQ devices. */
4826         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4827         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4828
4829         /* clear the affected bit */
4830         vmolr &= ~IXGBE_VMOLR_MPE;
4831
4832         if (dev->flags & IFF_ALLMULTI) {
4833                 vmolr |= IXGBE_VMOLR_MPE;
4834         } else {
4835                 vmolr |= IXGBE_VMOLR_ROMPE;
4836                 hw->mac.ops.update_mc_addr_list(hw, dev);
4837         }
4838         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4839         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4840 }
4841
4842 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4843 {
4844         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4845         int rss_i = adapter->num_rx_queues_per_pool;
4846         struct ixgbe_hw *hw = &adapter->hw;
4847         u16 pool = vadapter->pool;
4848         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4849                       IXGBE_PSRTYPE_UDPHDR |
4850                       IXGBE_PSRTYPE_IPV4HDR |
4851                       IXGBE_PSRTYPE_L2HDR |
4852                       IXGBE_PSRTYPE_IPV6HDR;
4853
4854         if (hw->mac.type == ixgbe_mac_82598EB)
4855                 return;
4856
4857         if (rss_i > 3)
4858                 psrtype |= 2u << 29;
4859         else if (rss_i > 1)
4860                 psrtype |= 1u << 29;
4861
4862         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4863 }
4864
4865 /**
4866  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4867  * @rx_ring: ring to free buffers from
4868  **/
4869 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4870 {
4871         struct device *dev = rx_ring->dev;
4872         unsigned long size;
4873         u16 i;
4874
4875         /* ring already cleared, nothing to do */
4876         if (!rx_ring->rx_buffer_info)
4877                 return;
4878
4879         /* Free all the Rx ring sk_buffs */
4880         for (i = 0; i < rx_ring->count; i++) {
4881                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4882
4883                 if (rx_buffer->skb) {
4884                         struct sk_buff *skb = rx_buffer->skb;
4885                         if (IXGBE_CB(skb)->page_released)
4886                                 dma_unmap_page(dev,
4887                                                IXGBE_CB(skb)->dma,
4888                                                ixgbe_rx_bufsz(rx_ring),
4889                                                DMA_FROM_DEVICE);
4890                         dev_kfree_skb(skb);
4891                         rx_buffer->skb = NULL;
4892                 }
4893
4894                 if (!rx_buffer->page)
4895                         continue;
4896
4897                 dma_unmap_page(dev, rx_buffer->dma,
4898                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4899                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4900
4901                 rx_buffer->page = NULL;
4902         }
4903
4904         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4905         memset(rx_ring->rx_buffer_info, 0, size);
4906
4907         /* Zero out the descriptor ring */
4908         memset(rx_ring->desc, 0, rx_ring->size);
4909
4910         rx_ring->next_to_alloc = 0;
4911         rx_ring->next_to_clean = 0;
4912         rx_ring->next_to_use = 0;
4913 }
4914
4915 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4916                                    struct ixgbe_ring *rx_ring)
4917 {
4918         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4919         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4920
4921         /* shutdown specific queue receive and wait for dma to settle */
4922         ixgbe_disable_rx_queue(adapter, rx_ring);
4923         usleep_range(10000, 20000);
4924         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4925         ixgbe_clean_rx_ring(rx_ring);
4926         rx_ring->l2_accel_priv = NULL;
4927 }
4928
4929 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4930                                struct ixgbe_fwd_adapter *accel)
4931 {
4932         struct ixgbe_adapter *adapter = accel->real_adapter;
4933         unsigned int rxbase = accel->rx_base_queue;
4934         unsigned int txbase = accel->tx_base_queue;
4935         int i;
4936
4937         netif_tx_stop_all_queues(vdev);
4938
4939         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4940                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4941                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4942         }
4943
4944         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4945                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4946                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4947         }
4948
4949
4950         return 0;
4951 }
4952
4953 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4954                              struct ixgbe_fwd_adapter *accel)
4955 {
4956         struct ixgbe_adapter *adapter = accel->real_adapter;
4957         unsigned int rxbase, txbase, queues;
4958         int i, baseq, err = 0;
4959
4960         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4961                 return 0;
4962
4963         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4964         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4965                    accel->pool, adapter->num_rx_pools,
4966                    baseq, baseq + adapter->num_rx_queues_per_pool,
4967                    adapter->fwd_bitmask);
4968
4969         accel->netdev = vdev;
4970         accel->rx_base_queue = rxbase = baseq;
4971         accel->tx_base_queue = txbase = baseq;
4972
4973         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4974                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4975
4976         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4977                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4978                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4979                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4980         }
4981
4982         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4983                 adapter->tx_ring[txbase + i]->netdev = vdev;
4984                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4985         }
4986
4987         queues = min_t(unsigned int,
4988                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4989         err = netif_set_real_num_tx_queues(vdev, queues);
4990         if (err)
4991                 goto fwd_queue_err;
4992
4993         err = netif_set_real_num_rx_queues(vdev, queues);
4994         if (err)
4995                 goto fwd_queue_err;
4996
4997         if (is_valid_ether_addr(vdev->dev_addr))
4998                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4999
5000         ixgbe_fwd_psrtype(accel);
5001         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5002         return err;
5003 fwd_queue_err:
5004         ixgbe_fwd_ring_down(vdev, accel);
5005         return err;
5006 }
5007
5008 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5009 {
5010         if (netif_is_macvlan(upper)) {
5011                 struct macvlan_dev *dfwd = netdev_priv(upper);
5012                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5013
5014                 if (dfwd->fwd_priv)
5015                         ixgbe_fwd_ring_up(upper, vadapter);
5016         }
5017
5018         return 0;
5019 }
5020
5021 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5022 {
5023         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5024                                       ixgbe_upper_dev_walk, NULL);
5025 }
5026
5027 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5028 {
5029         struct ixgbe_hw *hw = &adapter->hw;
5030
5031         ixgbe_configure_pb(adapter);
5032 #ifdef CONFIG_IXGBE_DCB
5033         ixgbe_configure_dcb(adapter);
5034 #endif
5035         /*
5036          * We must restore virtualization before VLANs or else
5037          * the VLVF registers will not be populated
5038          */
5039         ixgbe_configure_virtualization(adapter);
5040
5041         ixgbe_set_rx_mode(adapter->netdev);
5042         ixgbe_restore_vlan(adapter);
5043
5044         switch (hw->mac.type) {
5045         case ixgbe_mac_82599EB:
5046         case ixgbe_mac_X540:
5047                 hw->mac.ops.disable_rx_buff(hw);
5048                 break;
5049         default:
5050                 break;
5051         }
5052
5053         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5054                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5055                                                 adapter->fdir_pballoc);
5056         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5057                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5058                                               adapter->fdir_pballoc);
5059                 ixgbe_fdir_filter_restore(adapter);
5060         }
5061
5062         switch (hw->mac.type) {
5063         case ixgbe_mac_82599EB:
5064         case ixgbe_mac_X540:
5065                 hw->mac.ops.enable_rx_buff(hw);
5066                 break;
5067         default:
5068                 break;
5069         }
5070
5071 #ifdef CONFIG_IXGBE_DCA
5072         /* configure DCA */
5073         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5074                 ixgbe_setup_dca(adapter);
5075 #endif /* CONFIG_IXGBE_DCA */
5076
5077 #ifdef IXGBE_FCOE
5078         /* configure FCoE L2 filters, redirection table, and Rx control */
5079         ixgbe_configure_fcoe(adapter);
5080
5081 #endif /* IXGBE_FCOE */
5082         ixgbe_configure_tx(adapter);
5083         ixgbe_configure_rx(adapter);
5084         ixgbe_configure_dfwd(adapter);
5085 }
5086
5087 /**
5088  * ixgbe_sfp_link_config - set up SFP+ link
5089  * @adapter: pointer to private adapter struct
5090  **/
5091 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5092 {
5093         /*
5094          * We are assuming the worst case scenario here, and that
5095          * is that an SFP was inserted/removed after the reset
5096          * but before SFP detection was enabled.  As such the best
5097          * solution is to just start searching as soon as we start
5098          */
5099         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5100                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5101
5102         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5103         adapter->sfp_poll_time = 0;
5104 }
5105
5106 /**
5107  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5108  * @hw: pointer to private hardware struct
5109  *
5110  * Returns 0 on success, negative on failure
5111  **/
5112 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5113 {
5114         u32 speed;
5115         bool autoneg, link_up = false;
5116         int ret = IXGBE_ERR_LINK_SETUP;
5117
5118         if (hw->mac.ops.check_link)
5119                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5120
5121         if (ret)
5122                 return ret;
5123
5124         speed = hw->phy.autoneg_advertised;
5125         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5126                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5127                                                         &autoneg);
5128         if (ret)
5129                 return ret;
5130
5131         if (hw->mac.ops.setup_link)
5132                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5133
5134         return ret;
5135 }
5136
5137 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5138 {
5139         struct ixgbe_hw *hw = &adapter->hw;
5140         u32 gpie = 0;
5141
5142         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5143                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5144                        IXGBE_GPIE_OCD;
5145                 gpie |= IXGBE_GPIE_EIAME;
5146                 /*
5147                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5148                  * this saves a register write for every interrupt
5149                  */
5150                 switch (hw->mac.type) {
5151                 case ixgbe_mac_82598EB:
5152                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5153                         break;
5154                 case ixgbe_mac_82599EB:
5155                 case ixgbe_mac_X540:
5156                 case ixgbe_mac_X550:
5157                 case ixgbe_mac_X550EM_x:
5158                 case ixgbe_mac_x550em_a:
5159                 default:
5160                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5161                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5162                         break;
5163                 }
5164         } else {
5165                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5166                  * specifically only auto mask tx and rx interrupts */
5167                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5168         }
5169
5170         /* XXX: to interrupt immediately for EICS writes, enable this */
5171         /* gpie |= IXGBE_GPIE_EIMEN; */
5172
5173         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5174                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5175
5176                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5177                 case IXGBE_82599_VMDQ_8Q_MASK:
5178                         gpie |= IXGBE_GPIE_VTMODE_16;
5179                         break;
5180                 case IXGBE_82599_VMDQ_4Q_MASK:
5181                         gpie |= IXGBE_GPIE_VTMODE_32;
5182                         break;
5183                 default:
5184                         gpie |= IXGBE_GPIE_VTMODE_64;
5185                         break;
5186                 }
5187         }
5188
5189         /* Enable Thermal over heat sensor interrupt */
5190         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5191                 switch (adapter->hw.mac.type) {
5192                 case ixgbe_mac_82599EB:
5193                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5194                         break;
5195                 default:
5196                         break;
5197                 }
5198         }
5199
5200         /* Enable fan failure interrupt */
5201         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5202                 gpie |= IXGBE_SDP1_GPIEN(hw);
5203
5204         switch (hw->mac.type) {
5205         case ixgbe_mac_82599EB:
5206                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5207                 break;
5208         case ixgbe_mac_X550EM_x:
5209         case ixgbe_mac_x550em_a:
5210                 gpie |= IXGBE_SDP0_GPIEN_X540;
5211                 break;
5212         default:
5213                 break;
5214         }
5215
5216         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5217 }
5218
5219 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5220 {
5221         struct ixgbe_hw *hw = &adapter->hw;
5222         int err;
5223         u32 ctrl_ext;
5224
5225         ixgbe_get_hw_control(adapter);
5226         ixgbe_setup_gpie(adapter);
5227
5228         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5229                 ixgbe_configure_msix(adapter);
5230         else
5231                 ixgbe_configure_msi_and_legacy(adapter);
5232
5233         /* enable the optics for 82599 SFP+ fiber */
5234         if (hw->mac.ops.enable_tx_laser)
5235                 hw->mac.ops.enable_tx_laser(hw);
5236
5237         if (hw->phy.ops.set_phy_power)
5238                 hw->phy.ops.set_phy_power(hw, true);
5239
5240         smp_mb__before_atomic();
5241         clear_bit(__IXGBE_DOWN, &adapter->state);
5242         ixgbe_napi_enable_all(adapter);
5243
5244         if (ixgbe_is_sfp(hw)) {
5245                 ixgbe_sfp_link_config(adapter);
5246         } else {
5247                 err = ixgbe_non_sfp_link_config(hw);
5248                 if (err)
5249                         e_err(probe, "link_config FAILED %d\n", err);
5250         }
5251
5252         /* clear any pending interrupts, may auto mask */
5253         IXGBE_READ_REG(hw, IXGBE_EICR);
5254         ixgbe_irq_enable(adapter, true, true);
5255
5256         /*
5257          * If this adapter has a fan, check to see if we had a failure
5258          * before we enabled the interrupt.
5259          */
5260         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5261                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5262                 if (esdp & IXGBE_ESDP_SDP1)
5263                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5264         }
5265
5266         /* bring the link up in the watchdog, this could race with our first
5267          * link up interrupt but shouldn't be a problem */
5268         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5269         adapter->link_check_timeout = jiffies;
5270         mod_timer(&adapter->service_timer, jiffies);
5271
5272         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5273         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5274         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5275         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5276 }
5277
5278 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5279 {
5280         WARN_ON(in_interrupt());
5281         /* put off any impending NetWatchDogTimeout */
5282         netif_trans_update(adapter->netdev);
5283
5284         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5285                 usleep_range(1000, 2000);
5286         if (adapter->hw.phy.type == ixgbe_phy_fw)
5287                 ixgbe_watchdog_link_is_down(adapter);
5288         ixgbe_down(adapter);
5289         /*
5290          * If SR-IOV enabled then wait a bit before bringing the adapter
5291          * back up to give the VFs time to respond to the reset.  The
5292          * two second wait is based upon the watchdog timer cycle in
5293          * the VF driver.
5294          */
5295         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5296                 msleep(2000);
5297         ixgbe_up(adapter);
5298         clear_bit(__IXGBE_RESETTING, &adapter->state);
5299 }
5300
5301 void ixgbe_up(struct ixgbe_adapter *adapter)
5302 {
5303         /* hardware has been reset, we need to reload some things */
5304         ixgbe_configure(adapter);
5305
5306         ixgbe_up_complete(adapter);
5307 }
5308
5309 void ixgbe_reset(struct ixgbe_adapter *adapter)
5310 {
5311         struct ixgbe_hw *hw = &adapter->hw;
5312         struct net_device *netdev = adapter->netdev;
5313         int err;
5314
5315         if (ixgbe_removed(hw->hw_addr))
5316                 return;
5317         /* lock SFP init bit to prevent race conditions with the watchdog */
5318         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5319                 usleep_range(1000, 2000);
5320
5321         /* clear all SFP and link config related flags while holding SFP_INIT */
5322         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5323                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5324         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5325
5326         err = hw->mac.ops.init_hw(hw);
5327         switch (err) {
5328         case 0:
5329         case IXGBE_ERR_SFP_NOT_PRESENT:
5330         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5331                 break;
5332         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5333                 e_dev_err("master disable timed out\n");
5334                 break;
5335         case IXGBE_ERR_EEPROM_VERSION:
5336                 /* We are running on a pre-production device, log a warning */
5337                 e_dev_warn("This device is a pre-production adapter/LOM. "
5338                            "Please be aware there may be issues associated with "
5339                            "your hardware.  If you are experiencing problems "
5340                            "please contact your Intel or hardware "
5341                            "representative who provided you with this "
5342                            "hardware.\n");
5343                 break;
5344         default:
5345                 e_dev_err("Hardware Error: %d\n", err);
5346         }
5347
5348         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5349
5350         /* flush entries out of MAC table */
5351         ixgbe_flush_sw_mac_table(adapter);
5352         __dev_uc_unsync(netdev, NULL);
5353
5354         /* do not flush user set addresses */
5355         ixgbe_mac_set_default_filter(adapter);
5356
5357         /* update SAN MAC vmdq pool selection */
5358         if (hw->mac.san_mac_rar_index)
5359                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5360
5361         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5362                 ixgbe_ptp_reset(adapter);
5363
5364         if (hw->phy.ops.set_phy_power) {
5365                 if (!netif_running(adapter->netdev) && !adapter->wol)
5366                         hw->phy.ops.set_phy_power(hw, false);
5367                 else
5368                         hw->phy.ops.set_phy_power(hw, true);
5369         }
5370 }
5371
5372 /**
5373  * ixgbe_clean_tx_ring - Free Tx Buffers
5374  * @tx_ring: ring to be cleaned
5375  **/
5376 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5377 {
5378         struct ixgbe_tx_buffer *tx_buffer_info;
5379         unsigned long size;
5380         u16 i;
5381
5382         /* ring already cleared, nothing to do */
5383         if (!tx_ring->tx_buffer_info)
5384                 return;
5385
5386         /* Free all the Tx ring sk_buffs */
5387         for (i = 0; i < tx_ring->count; i++) {
5388                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5389                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5390         }
5391
5392         netdev_tx_reset_queue(txring_txq(tx_ring));
5393
5394         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5395         memset(tx_ring->tx_buffer_info, 0, size);
5396
5397         /* Zero out the descriptor ring */
5398         memset(tx_ring->desc, 0, tx_ring->size);
5399
5400         tx_ring->next_to_use = 0;
5401         tx_ring->next_to_clean = 0;
5402 }
5403
5404 /**
5405  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5406  * @adapter: board private structure
5407  **/
5408 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5409 {
5410         int i;
5411
5412         for (i = 0; i < adapter->num_rx_queues; i++)
5413                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5414 }
5415
5416 /**
5417  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5418  * @adapter: board private structure
5419  **/
5420 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5421 {
5422         int i;
5423
5424         for (i = 0; i < adapter->num_tx_queues; i++)
5425                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5426 }
5427
5428 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5429 {
5430         struct hlist_node *node2;
5431         struct ixgbe_fdir_filter *filter;
5432
5433         spin_lock(&adapter->fdir_perfect_lock);
5434
5435         hlist_for_each_entry_safe(filter, node2,
5436                                   &adapter->fdir_filter_list, fdir_node) {
5437                 hlist_del(&filter->fdir_node);
5438                 kfree(filter);
5439         }
5440         adapter->fdir_filter_count = 0;
5441
5442         spin_unlock(&adapter->fdir_perfect_lock);
5443 }
5444
5445 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5446 {
5447         if (netif_is_macvlan(upper)) {
5448                 struct macvlan_dev *vlan = netdev_priv(upper);
5449
5450                 if (vlan->fwd_priv) {
5451                         netif_tx_stop_all_queues(upper);
5452                         netif_carrier_off(upper);
5453                         netif_tx_disable(upper);
5454                 }
5455         }
5456
5457         return 0;
5458 }
5459
5460 void ixgbe_down(struct ixgbe_adapter *adapter)
5461 {
5462         struct net_device *netdev = adapter->netdev;
5463         struct ixgbe_hw *hw = &adapter->hw;
5464         int i;
5465
5466         /* signal that we are down to the interrupt handler */
5467         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5468                 return; /* do nothing if already down */
5469
5470         /* disable receives */
5471         hw->mac.ops.disable_rx(hw);
5472
5473         /* disable all enabled rx queues */
5474         for (i = 0; i < adapter->num_rx_queues; i++)
5475                 /* this call also flushes the previous write */
5476                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5477
5478         usleep_range(10000, 20000);
5479
5480         netif_tx_stop_all_queues(netdev);
5481
5482         /* call carrier off first to avoid false dev_watchdog timeouts */
5483         netif_carrier_off(netdev);
5484         netif_tx_disable(netdev);
5485
5486         /* disable any upper devices */
5487         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5488                                       ixgbe_disable_macvlan, NULL);
5489
5490         ixgbe_irq_disable(adapter);
5491
5492         ixgbe_napi_disable_all(adapter);
5493
5494         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5495         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5496         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5497
5498         del_timer_sync(&adapter->service_timer);
5499
5500         if (adapter->num_vfs) {
5501                 /* Clear EITR Select mapping */
5502                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5503
5504                 /* Mark all the VFs as inactive */
5505                 for (i = 0 ; i < adapter->num_vfs; i++)
5506                         adapter->vfinfo[i].clear_to_send = false;
5507
5508                 /* ping all the active vfs to let them know we are going down */
5509                 ixgbe_ping_all_vfs(adapter);
5510
5511                 /* Disable all VFTE/VFRE TX/RX */
5512                 ixgbe_disable_tx_rx(adapter);
5513         }
5514
5515         /* disable transmits in the hardware now that interrupts are off */
5516         for (i = 0; i < adapter->num_tx_queues; i++) {
5517                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5518                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5519         }
5520
5521         /* Disable the Tx DMA engine on 82599 and later MAC */
5522         switch (hw->mac.type) {
5523         case ixgbe_mac_82599EB:
5524         case ixgbe_mac_X540:
5525         case ixgbe_mac_X550:
5526         case ixgbe_mac_X550EM_x:
5527         case ixgbe_mac_x550em_a:
5528                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5529                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5530                                  ~IXGBE_DMATXCTL_TE));
5531                 break;
5532         default:
5533                 break;
5534         }
5535
5536         if (!pci_channel_offline(adapter->pdev))
5537                 ixgbe_reset(adapter);
5538
5539         /* power down the optics for 82599 SFP+ fiber */
5540         if (hw->mac.ops.disable_tx_laser)
5541                 hw->mac.ops.disable_tx_laser(hw);
5542
5543         ixgbe_clean_all_tx_rings(adapter);
5544         ixgbe_clean_all_rx_rings(adapter);
5545 }
5546
5547 /**
5548  * ixgbe_eee_capable - helper function to determine EEE support on X550
5549  * @adapter: board private structure
5550  */
5551 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5552 {
5553         struct ixgbe_hw *hw = &adapter->hw;
5554
5555         switch (hw->device_id) {
5556         case IXGBE_DEV_ID_X550EM_A_1G_T:
5557         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5558                 if (!hw->phy.eee_speeds_supported)
5559                         break;
5560                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5561                 if (!hw->phy.eee_speeds_advertised)
5562                         break;
5563                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5564                 break;
5565         default:
5566                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5567                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5568                 break;
5569         }
5570 }
5571
5572 /**
5573  * ixgbe_tx_timeout - Respond to a Tx Hang
5574  * @netdev: network interface device structure
5575  **/
5576 static void ixgbe_tx_timeout(struct net_device *netdev)
5577 {
5578         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5579
5580         /* Do the reset outside of interrupt context */
5581         ixgbe_tx_timeout_reset(adapter);
5582 }
5583
5584 #ifdef CONFIG_IXGBE_DCB
5585 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5586 {
5587         struct ixgbe_hw *hw = &adapter->hw;
5588         struct tc_configuration *tc;
5589         int j;
5590
5591         switch (hw->mac.type) {
5592         case ixgbe_mac_82598EB:
5593         case ixgbe_mac_82599EB:
5594                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5595                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5596                 break;
5597         case ixgbe_mac_X540:
5598         case ixgbe_mac_X550:
5599                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5600                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5601                 break;
5602         case ixgbe_mac_X550EM_x:
5603         case ixgbe_mac_x550em_a:
5604         default:
5605                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5606                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5607                 break;
5608         }
5609
5610         /* Configure DCB traffic classes */
5611         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5612                 tc = &adapter->dcb_cfg.tc_config[j];
5613                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5614                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5615                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5616                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5617                 tc->dcb_pfc = pfc_disabled;
5618         }
5619
5620         /* Initialize default user to priority mapping, UPx->TC0 */
5621         tc = &adapter->dcb_cfg.tc_config[0];
5622         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5623         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5624
5625         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5626         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5627         adapter->dcb_cfg.pfc_mode_enable = false;
5628         adapter->dcb_set_bitmap = 0x00;
5629         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5630                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5631         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5632                sizeof(adapter->temp_dcb_cfg));
5633 }
5634 #endif
5635
5636 /**
5637  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5638  * @adapter: board private structure to initialize
5639  *
5640  * ixgbe_sw_init initializes the Adapter private data structure.
5641  * Fields are initialized based on PCI device information and
5642  * OS network device settings (MTU size).
5643  **/
5644 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5645                          const struct ixgbe_info *ii)
5646 {
5647         struct ixgbe_hw *hw = &adapter->hw;
5648         struct pci_dev *pdev = adapter->pdev;
5649         unsigned int rss, fdir;
5650         u32 fwsm;
5651         int i;
5652
5653         /* PCI config space info */
5654
5655         hw->vendor_id = pdev->vendor;
5656         hw->device_id = pdev->device;
5657         hw->revision_id = pdev->revision;
5658         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5659         hw->subsystem_device_id = pdev->subsystem_device;
5660
5661         /* get_invariants needs the device IDs */
5662         ii->get_invariants(hw);
5663
5664         /* Set common capability flags and settings */
5665         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5666         adapter->ring_feature[RING_F_RSS].limit = rss;
5667         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5668         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5669         adapter->atr_sample_rate = 20;
5670         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5671         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5672         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5673 #ifdef CONFIG_IXGBE_DCA
5674         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5675 #endif
5676 #ifdef CONFIG_IXGBE_DCB
5677         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5678         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5679 #endif
5680 #ifdef IXGBE_FCOE
5681         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5682         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5683 #ifdef CONFIG_IXGBE_DCB
5684         /* Default traffic class to use for FCoE */
5685         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5686 #endif /* CONFIG_IXGBE_DCB */
5687 #endif /* IXGBE_FCOE */
5688
5689         /* initialize static ixgbe jump table entries */
5690         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5691                                           GFP_KERNEL);
5692         if (!adapter->jump_tables[0])
5693                 return -ENOMEM;
5694         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5695
5696         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5697                 adapter->jump_tables[i] = NULL;
5698
5699         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5700                                      hw->mac.num_rar_entries,
5701                                      GFP_ATOMIC);
5702         if (!adapter->mac_table)
5703                 return -ENOMEM;
5704
5705         /* Set MAC specific capability flags and exceptions */
5706         switch (hw->mac.type) {
5707         case ixgbe_mac_82598EB:
5708                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5709
5710                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5711                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5712
5713                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5714                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5715                 adapter->atr_sample_rate = 0;
5716                 adapter->fdir_pballoc = 0;
5717 #ifdef IXGBE_FCOE
5718                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5719                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5720 #ifdef CONFIG_IXGBE_DCB
5721                 adapter->fcoe.up = 0;
5722 #endif /* IXGBE_DCB */
5723 #endif /* IXGBE_FCOE */
5724                 break;
5725         case ixgbe_mac_82599EB:
5726                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5727                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5728                 break;
5729         case ixgbe_mac_X540:
5730                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5731                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5732                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5733                 break;
5734         case ixgbe_mac_x550em_a:
5735                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5736                 switch (hw->device_id) {
5737                 case IXGBE_DEV_ID_X550EM_A_1G_T:
5738                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5739                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5740                         break;
5741                 default:
5742                         break;
5743                 }
5744         /* fall through */
5745         case ixgbe_mac_X550EM_x:
5746 #ifdef CONFIG_IXGBE_DCB
5747                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5748 #endif
5749 #ifdef IXGBE_FCOE
5750                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5751 #ifdef CONFIG_IXGBE_DCB
5752                 adapter->fcoe.up = 0;
5753 #endif /* IXGBE_DCB */
5754 #endif /* IXGBE_FCOE */
5755         /* Fall Through */
5756         case ixgbe_mac_X550:
5757                 if (hw->mac.type == ixgbe_mac_X550)
5758                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5759 #ifdef CONFIG_IXGBE_DCA
5760                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5761 #endif
5762                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5763                 break;
5764         default:
5765                 break;
5766         }
5767
5768 #ifdef IXGBE_FCOE
5769         /* FCoE support exists, always init the FCoE lock */
5770         spin_lock_init(&adapter->fcoe.lock);
5771
5772 #endif
5773         /* n-tuple support exists, always init our spinlock */
5774         spin_lock_init(&adapter->fdir_perfect_lock);
5775
5776 #ifdef CONFIG_IXGBE_DCB
5777         ixgbe_init_dcb(adapter);
5778 #endif
5779
5780         /* default flow control settings */
5781         hw->fc.requested_mode = ixgbe_fc_full;
5782         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5783         ixgbe_pbthresh_setup(adapter);
5784         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5785         hw->fc.send_xon = true;
5786         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5787
5788 #ifdef CONFIG_PCI_IOV
5789         if (max_vfs > 0)
5790                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5791
5792         /* assign number of SR-IOV VFs */
5793         if (hw->mac.type != ixgbe_mac_82598EB) {
5794                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5795                         adapter->num_vfs = 0;
5796                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5797                 } else {
5798                         adapter->num_vfs = max_vfs;
5799                 }
5800         }
5801 #endif /* CONFIG_PCI_IOV */
5802
5803         /* enable itr by default in dynamic mode */
5804         adapter->rx_itr_setting = 1;
5805         adapter->tx_itr_setting = 1;
5806
5807         /* set default ring sizes */
5808         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5809         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5810
5811         /* set default work limits */
5812         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5813
5814         /* initialize eeprom parameters */
5815         if (ixgbe_init_eeprom_params_generic(hw)) {
5816                 e_dev_err("EEPROM initialization failed\n");
5817                 return -EIO;
5818         }
5819
5820         /* PF holds first pool slot */
5821         set_bit(0, &adapter->fwd_bitmask);
5822         set_bit(__IXGBE_DOWN, &adapter->state);
5823
5824         return 0;
5825 }
5826
5827 /**
5828  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5829  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5830  *
5831  * Return 0 on success, negative on failure
5832  **/
5833 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5834 {
5835         struct device *dev = tx_ring->dev;
5836         int orig_node = dev_to_node(dev);
5837         int ring_node = -1;
5838         int size;
5839
5840         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5841
5842         if (tx_ring->q_vector)
5843                 ring_node = tx_ring->q_vector->numa_node;
5844
5845         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5846         if (!tx_ring->tx_buffer_info)
5847                 tx_ring->tx_buffer_info = vzalloc(size);
5848         if (!tx_ring->tx_buffer_info)
5849                 goto err;
5850
5851         u64_stats_init(&tx_ring->syncp);
5852
5853         /* round up to nearest 4K */
5854         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5855         tx_ring->size = ALIGN(tx_ring->size, 4096);
5856
5857         set_dev_node(dev, ring_node);
5858         tx_ring->desc = dma_alloc_coherent(dev,
5859                                            tx_ring->size,
5860                                            &tx_ring->dma,
5861                                            GFP_KERNEL);
5862         set_dev_node(dev, orig_node);
5863         if (!tx_ring->desc)
5864                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5865                                                    &tx_ring->dma, GFP_KERNEL);
5866         if (!tx_ring->desc)
5867                 goto err;
5868
5869         tx_ring->next_to_use = 0;
5870         tx_ring->next_to_clean = 0;
5871         return 0;
5872
5873 err:
5874         vfree(tx_ring->tx_buffer_info);
5875         tx_ring->tx_buffer_info = NULL;
5876         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5877         return -ENOMEM;
5878 }
5879
5880 /**
5881  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5882  * @adapter: board private structure
5883  *
5884  * If this function returns with an error, then it's possible one or
5885  * more of the rings is populated (while the rest are not).  It is the
5886  * callers duty to clean those orphaned rings.
5887  *
5888  * Return 0 on success, negative on failure
5889  **/
5890 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5891 {
5892         int i, err = 0;
5893
5894         for (i = 0; i < adapter->num_tx_queues; i++) {
5895                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5896                 if (!err)
5897                         continue;
5898
5899                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5900                 goto err_setup_tx;
5901         }
5902
5903         return 0;
5904 err_setup_tx:
5905         /* rewind the index freeing the rings as we go */
5906         while (i--)
5907                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5908         return err;
5909 }
5910
5911 /**
5912  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5913  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5914  *
5915  * Returns 0 on success, negative on failure
5916  **/
5917 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5918 {
5919         struct device *dev = rx_ring->dev;
5920         int orig_node = dev_to_node(dev);
5921         int ring_node = -1;
5922         int size;
5923
5924         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5925
5926         if (rx_ring->q_vector)
5927                 ring_node = rx_ring->q_vector->numa_node;
5928
5929         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5930         if (!rx_ring->rx_buffer_info)
5931                 rx_ring->rx_buffer_info = vzalloc(size);
5932         if (!rx_ring->rx_buffer_info)
5933                 goto err;
5934
5935         u64_stats_init(&rx_ring->syncp);
5936
5937         /* Round up to nearest 4K */
5938         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5939         rx_ring->size = ALIGN(rx_ring->size, 4096);
5940
5941         set_dev_node(dev, ring_node);
5942         rx_ring->desc = dma_alloc_coherent(dev,
5943                                            rx_ring->size,
5944                                            &rx_ring->dma,
5945                                            GFP_KERNEL);
5946         set_dev_node(dev, orig_node);
5947         if (!rx_ring->desc)
5948                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5949                                                    &rx_ring->dma, GFP_KERNEL);
5950         if (!rx_ring->desc)
5951                 goto err;
5952
5953         rx_ring->next_to_clean = 0;
5954         rx_ring->next_to_use = 0;
5955
5956         return 0;
5957 err:
5958         vfree(rx_ring->rx_buffer_info);
5959         rx_ring->rx_buffer_info = NULL;
5960         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5961         return -ENOMEM;
5962 }
5963
5964 /**
5965  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5966  * @adapter: board private structure
5967  *
5968  * If this function returns with an error, then it's possible one or
5969  * more of the rings is populated (while the rest are not).  It is the
5970  * callers duty to clean those orphaned rings.
5971  *
5972  * Return 0 on success, negative on failure
5973  **/
5974 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5975 {
5976         int i, err = 0;
5977
5978         for (i = 0; i < adapter->num_rx_queues; i++) {
5979                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5980                 if (!err)
5981                         continue;
5982
5983                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5984                 goto err_setup_rx;
5985         }
5986
5987 #ifdef IXGBE_FCOE
5988         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5989         if (!err)
5990 #endif
5991                 return 0;
5992 err_setup_rx:
5993         /* rewind the index freeing the rings as we go */
5994         while (i--)
5995                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5996         return err;
5997 }
5998
5999 /**
6000  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6001  * @tx_ring: Tx descriptor ring for a specific queue
6002  *
6003  * Free all transmit software resources
6004  **/
6005 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6006 {
6007         ixgbe_clean_tx_ring(tx_ring);
6008
6009         vfree(tx_ring->tx_buffer_info);
6010         tx_ring->tx_buffer_info = NULL;
6011
6012         /* if not set, then don't free */
6013         if (!tx_ring->desc)
6014                 return;
6015
6016         dma_free_coherent(tx_ring->dev, tx_ring->size,
6017                           tx_ring->desc, tx_ring->dma);
6018
6019         tx_ring->desc = NULL;
6020 }
6021
6022 /**
6023  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6024  * @adapter: board private structure
6025  *
6026  * Free all transmit software resources
6027  **/
6028 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6029 {
6030         int i;
6031
6032         for (i = 0; i < adapter->num_tx_queues; i++)
6033                 if (adapter->tx_ring[i]->desc)
6034                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6035 }
6036
6037 /**
6038  * ixgbe_free_rx_resources - Free Rx Resources
6039  * @rx_ring: ring to clean the resources from
6040  *
6041  * Free all receive software resources
6042  **/
6043 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6044 {
6045         ixgbe_clean_rx_ring(rx_ring);
6046
6047         vfree(rx_ring->rx_buffer_info);
6048         rx_ring->rx_buffer_info = NULL;
6049
6050         /* if not set, then don't free */
6051         if (!rx_ring->desc)
6052                 return;
6053
6054         dma_free_coherent(rx_ring->dev, rx_ring->size,
6055                           rx_ring->desc, rx_ring->dma);
6056
6057         rx_ring->desc = NULL;
6058 }
6059
6060 /**
6061  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6062  * @adapter: board private structure
6063  *
6064  * Free all receive software resources
6065  **/
6066 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6067 {
6068         int i;
6069
6070 #ifdef IXGBE_FCOE
6071         ixgbe_free_fcoe_ddp_resources(adapter);
6072
6073 #endif
6074         for (i = 0; i < adapter->num_rx_queues; i++)
6075                 if (adapter->rx_ring[i]->desc)
6076                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6077 }
6078
6079 /**
6080  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6081  * @netdev: network interface device structure
6082  * @new_mtu: new value for maximum frame size
6083  *
6084  * Returns 0 on success, negative on failure
6085  **/
6086 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6087 {
6088         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6089
6090         /*
6091          * For 82599EB we cannot allow legacy VFs to enable their receive
6092          * paths when MTU greater than 1500 is configured.  So display a
6093          * warning that legacy VFs will be disabled.
6094          */
6095         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6096             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6097             (new_mtu > ETH_DATA_LEN))
6098                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6099
6100         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6101
6102         /* must set new MTU before calling down or up */
6103         netdev->mtu = new_mtu;
6104
6105         if (netif_running(netdev))
6106                 ixgbe_reinit_locked(adapter);
6107
6108         return 0;
6109 }
6110
6111 /**
6112  * ixgbe_open - Called when a network interface is made active
6113  * @netdev: network interface device structure
6114  *
6115  * Returns 0 on success, negative value on failure
6116  *
6117  * The open entry point is called when a network interface is made
6118  * active by the system (IFF_UP).  At this point all resources needed
6119  * for transmit and receive operations are allocated, the interrupt
6120  * handler is registered with the OS, the watchdog timer is started,
6121  * and the stack is notified that the interface is ready.
6122  **/
6123 int ixgbe_open(struct net_device *netdev)
6124 {
6125         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6126         struct ixgbe_hw *hw = &adapter->hw;
6127         int err, queues;
6128
6129         /* disallow open during test */
6130         if (test_bit(__IXGBE_TESTING, &adapter->state))
6131                 return -EBUSY;
6132
6133         netif_carrier_off(netdev);
6134
6135         /* allocate transmit descriptors */
6136         err = ixgbe_setup_all_tx_resources(adapter);
6137         if (err)
6138                 goto err_setup_tx;
6139
6140         /* allocate receive descriptors */
6141         err = ixgbe_setup_all_rx_resources(adapter);
6142         if (err)
6143                 goto err_setup_rx;
6144
6145         ixgbe_configure(adapter);
6146
6147         err = ixgbe_request_irq(adapter);
6148         if (err)
6149                 goto err_req_irq;
6150
6151         /* Notify the stack of the actual queue counts. */
6152         if (adapter->num_rx_pools > 1)
6153                 queues = adapter->num_rx_queues_per_pool;
6154         else
6155                 queues = adapter->num_tx_queues;
6156
6157         err = netif_set_real_num_tx_queues(netdev, queues);
6158         if (err)
6159                 goto err_set_queues;
6160
6161         if (adapter->num_rx_pools > 1 &&
6162             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6163                 queues = IXGBE_MAX_L2A_QUEUES;
6164         else
6165                 queues = adapter->num_rx_queues;
6166         err = netif_set_real_num_rx_queues(netdev, queues);
6167         if (err)
6168                 goto err_set_queues;
6169
6170         ixgbe_ptp_init(adapter);
6171
6172         ixgbe_up_complete(adapter);
6173
6174         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6175         udp_tunnel_get_rx_info(netdev);
6176
6177         return 0;
6178
6179 err_set_queues:
6180         ixgbe_free_irq(adapter);
6181 err_req_irq:
6182         ixgbe_free_all_rx_resources(adapter);
6183         if (hw->phy.ops.set_phy_power && !adapter->wol)
6184                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6185 err_setup_rx:
6186         ixgbe_free_all_tx_resources(adapter);
6187 err_setup_tx:
6188         ixgbe_reset(adapter);
6189
6190         return err;
6191 }
6192
6193 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6194 {
6195         ixgbe_ptp_suspend(adapter);
6196
6197         if (adapter->hw.phy.ops.enter_lplu) {
6198                 adapter->hw.phy.reset_disable = true;
6199                 ixgbe_down(adapter);
6200                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6201                 adapter->hw.phy.reset_disable = false;
6202         } else {
6203                 ixgbe_down(adapter);
6204         }
6205
6206         ixgbe_free_irq(adapter);
6207
6208         ixgbe_free_all_tx_resources(adapter);
6209         ixgbe_free_all_rx_resources(adapter);
6210 }
6211
6212 /**
6213  * ixgbe_close - Disables a network interface
6214  * @netdev: network interface device structure
6215  *
6216  * Returns 0, this is not allowed to fail
6217  *
6218  * The close entry point is called when an interface is de-activated
6219  * by the OS.  The hardware is still under the drivers control, but
6220  * needs to be disabled.  A global MAC reset is issued to stop the
6221  * hardware, and all transmit and receive resources are freed.
6222  **/
6223 int ixgbe_close(struct net_device *netdev)
6224 {
6225         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6226
6227         ixgbe_ptp_stop(adapter);
6228
6229         if (netif_device_present(netdev))
6230                 ixgbe_close_suspend(adapter);
6231
6232         ixgbe_fdir_filter_exit(adapter);
6233
6234         ixgbe_release_hw_control(adapter);
6235
6236         return 0;
6237 }
6238
6239 #ifdef CONFIG_PM
6240 static int ixgbe_resume(struct pci_dev *pdev)
6241 {
6242         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6243         struct net_device *netdev = adapter->netdev;
6244         u32 err;
6245
6246         adapter->hw.hw_addr = adapter->io_addr;
6247         pci_set_power_state(pdev, PCI_D0);
6248         pci_restore_state(pdev);
6249         /*
6250          * pci_restore_state clears dev->state_saved so call
6251          * pci_save_state to restore it.
6252          */
6253         pci_save_state(pdev);
6254
6255         err = pci_enable_device_mem(pdev);
6256         if (err) {
6257                 e_dev_err("Cannot enable PCI device from suspend\n");
6258                 return err;
6259         }
6260         smp_mb__before_atomic();
6261         clear_bit(__IXGBE_DISABLED, &adapter->state);
6262         pci_set_master(pdev);
6263
6264         pci_wake_from_d3(pdev, false);
6265
6266         ixgbe_reset(adapter);
6267
6268         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6269
6270         rtnl_lock();
6271         err = ixgbe_init_interrupt_scheme(adapter);
6272         if (!err && netif_running(netdev))
6273                 err = ixgbe_open(netdev);
6274
6275
6276         if (!err)
6277                 netif_device_attach(netdev);
6278         rtnl_unlock();
6279
6280         return err;
6281 }
6282 #endif /* CONFIG_PM */
6283
6284 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6285 {
6286         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6287         struct net_device *netdev = adapter->netdev;
6288         struct ixgbe_hw *hw = &adapter->hw;
6289         u32 ctrl, fctrl;
6290         u32 wufc = adapter->wol;
6291 #ifdef CONFIG_PM
6292         int retval = 0;
6293 #endif
6294
6295         rtnl_lock();
6296         netif_device_detach(netdev);
6297
6298         if (netif_running(netdev))
6299                 ixgbe_close_suspend(adapter);
6300
6301         ixgbe_clear_interrupt_scheme(adapter);
6302         rtnl_unlock();
6303
6304 #ifdef CONFIG_PM
6305         retval = pci_save_state(pdev);
6306         if (retval)
6307                 return retval;
6308
6309 #endif
6310         if (hw->mac.ops.stop_link_on_d3)
6311                 hw->mac.ops.stop_link_on_d3(hw);
6312
6313         if (wufc) {
6314                 ixgbe_set_rx_mode(netdev);
6315
6316                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6317                 if (hw->mac.ops.enable_tx_laser)
6318                         hw->mac.ops.enable_tx_laser(hw);
6319
6320                 /* turn on all-multi mode if wake on multicast is enabled */
6321                 if (wufc & IXGBE_WUFC_MC) {
6322                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6323                         fctrl |= IXGBE_FCTRL_MPE;
6324                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6325                 }
6326
6327                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6328                 ctrl |= IXGBE_CTRL_GIO_DIS;
6329                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6330
6331                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6332         } else {
6333                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6334                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6335         }
6336
6337         switch (hw->mac.type) {
6338         case ixgbe_mac_82598EB:
6339                 pci_wake_from_d3(pdev, false);
6340                 break;
6341         case ixgbe_mac_82599EB:
6342         case ixgbe_mac_X540:
6343         case ixgbe_mac_X550:
6344         case ixgbe_mac_X550EM_x:
6345         case ixgbe_mac_x550em_a:
6346                 pci_wake_from_d3(pdev, !!wufc);
6347                 break;
6348         default:
6349                 break;
6350         }
6351
6352         *enable_wake = !!wufc;
6353         if (hw->phy.ops.set_phy_power && !*enable_wake)
6354                 hw->phy.ops.set_phy_power(hw, false);
6355
6356         ixgbe_release_hw_control(adapter);
6357
6358         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6359                 pci_disable_device(pdev);
6360
6361         return 0;
6362 }
6363
6364 #ifdef CONFIG_PM
6365 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6366 {
6367         int retval;
6368         bool wake;
6369
6370         retval = __ixgbe_shutdown(pdev, &wake);
6371         if (retval)
6372                 return retval;
6373
6374         if (wake) {
6375                 pci_prepare_to_sleep(pdev);
6376         } else {
6377                 pci_wake_from_d3(pdev, false);
6378                 pci_set_power_state(pdev, PCI_D3hot);
6379         }
6380
6381         return 0;
6382 }
6383 #endif /* CONFIG_PM */
6384
6385 static void ixgbe_shutdown(struct pci_dev *pdev)
6386 {
6387         bool wake;
6388
6389         __ixgbe_shutdown(pdev, &wake);
6390
6391         if (system_state == SYSTEM_POWER_OFF) {
6392                 pci_wake_from_d3(pdev, wake);
6393                 pci_set_power_state(pdev, PCI_D3hot);
6394         }
6395 }
6396
6397 /**
6398  * ixgbe_update_stats - Update the board statistics counters.
6399  * @adapter: board private structure
6400  **/
6401 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6402 {
6403         struct net_device *netdev = adapter->netdev;
6404         struct ixgbe_hw *hw = &adapter->hw;
6405         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6406         u64 total_mpc = 0;
6407         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6408         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6409         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6410         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6411
6412         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6413             test_bit(__IXGBE_RESETTING, &adapter->state))
6414                 return;
6415
6416         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6417                 u64 rsc_count = 0;
6418                 u64 rsc_flush = 0;
6419                 for (i = 0; i < adapter->num_rx_queues; i++) {
6420                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6421                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6422                 }
6423                 adapter->rsc_total_count = rsc_count;
6424                 adapter->rsc_total_flush = rsc_flush;
6425         }
6426
6427         for (i = 0; i < adapter->num_rx_queues; i++) {
6428                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6429                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6430                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6431                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6432                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6433                 bytes += rx_ring->stats.bytes;
6434                 packets += rx_ring->stats.packets;
6435         }
6436         adapter->non_eop_descs = non_eop_descs;
6437         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6438         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6439         adapter->hw_csum_rx_error = hw_csum_rx_error;
6440         netdev->stats.rx_bytes = bytes;
6441         netdev->stats.rx_packets = packets;
6442
6443         bytes = 0;
6444         packets = 0;
6445         /* gather some stats to the adapter struct that are per queue */
6446         for (i = 0; i < adapter->num_tx_queues; i++) {
6447                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6448                 restart_queue += tx_ring->tx_stats.restart_queue;
6449                 tx_busy += tx_ring->tx_stats.tx_busy;
6450                 bytes += tx_ring->stats.bytes;
6451                 packets += tx_ring->stats.packets;
6452         }
6453         adapter->restart_queue = restart_queue;
6454         adapter->tx_busy = tx_busy;
6455         netdev->stats.tx_bytes = bytes;
6456         netdev->stats.tx_packets = packets;
6457
6458         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6459
6460         /* 8 register reads */
6461         for (i = 0; i < 8; i++) {
6462                 /* for packet buffers not used, the register should read 0 */
6463                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6464                 missed_rx += mpc;
6465                 hwstats->mpc[i] += mpc;
6466                 total_mpc += hwstats->mpc[i];
6467                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6468                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6469                 switch (hw->mac.type) {
6470                 case ixgbe_mac_82598EB:
6471                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6472                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6473                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6474                         hwstats->pxonrxc[i] +=
6475                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6476                         break;
6477                 case ixgbe_mac_82599EB:
6478                 case ixgbe_mac_X540:
6479                 case ixgbe_mac_X550:
6480                 case ixgbe_mac_X550EM_x:
6481                 case ixgbe_mac_x550em_a:
6482                         hwstats->pxonrxc[i] +=
6483                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6484                         break;
6485                 default:
6486                         break;
6487                 }
6488         }
6489
6490         /*16 register reads */
6491         for (i = 0; i < 16; i++) {
6492                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6493                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6494                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6495                     (hw->mac.type == ixgbe_mac_X540) ||
6496                     (hw->mac.type == ixgbe_mac_X550) ||
6497                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6498                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6499                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6500                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6501                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6502                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6503                 }
6504         }
6505
6506         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6507         /* work around hardware counting issue */
6508         hwstats->gprc -= missed_rx;
6509
6510         ixgbe_update_xoff_received(adapter);
6511
6512         /* 82598 hardware only has a 32 bit counter in the high register */
6513         switch (hw->mac.type) {
6514         case ixgbe_mac_82598EB:
6515                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6516                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6517                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6518                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6519                 break;
6520         case ixgbe_mac_X540:
6521         case ixgbe_mac_X550:
6522         case ixgbe_mac_X550EM_x:
6523         case ixgbe_mac_x550em_a:
6524                 /* OS2BMC stats are X540 and later */
6525                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6526                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6527                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6528                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6529         case ixgbe_mac_82599EB:
6530                 for (i = 0; i < 16; i++)
6531                         adapter->hw_rx_no_dma_resources +=
6532                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6533                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6534                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6535                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6536                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6537                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6538                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6539                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6540                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6541                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6542 #ifdef IXGBE_FCOE
6543                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6544                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6545                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6546                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6547                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6548                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6549                 /* Add up per cpu counters for total ddp aloc fail */
6550                 if (adapter->fcoe.ddp_pool) {
6551                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6552                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6553                         unsigned int cpu;
6554                         u64 noddp = 0, noddp_ext_buff = 0;
6555                         for_each_possible_cpu(cpu) {
6556                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6557                                 noddp += ddp_pool->noddp;
6558                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6559                         }
6560                         hwstats->fcoe_noddp = noddp;
6561                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6562                 }
6563 #endif /* IXGBE_FCOE */
6564                 break;
6565         default:
6566                 break;
6567         }
6568         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6569         hwstats->bprc += bprc;
6570         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6571         if (hw->mac.type == ixgbe_mac_82598EB)
6572                 hwstats->mprc -= bprc;
6573         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6574         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6575         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6576         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6577         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6578         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6579         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6580         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6581         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6582         hwstats->lxontxc += lxon;
6583         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6584         hwstats->lxofftxc += lxoff;
6585         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6586         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6587         /*
6588          * 82598 errata - tx of flow control packets is included in tx counters
6589          */
6590         xon_off_tot = lxon + lxoff;
6591         hwstats->gptc -= xon_off_tot;
6592         hwstats->mptc -= xon_off_tot;
6593         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6594         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6595         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6596         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6597         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6598         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6599         hwstats->ptc64 -= xon_off_tot;
6600         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6601         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6602         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6603         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6604         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6605         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6606
6607         /* Fill out the OS statistics structure */
6608         netdev->stats.multicast = hwstats->mprc;
6609
6610         /* Rx Errors */
6611         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6612         netdev->stats.rx_dropped = 0;
6613         netdev->stats.rx_length_errors = hwstats->rlec;
6614         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6615         netdev->stats.rx_missed_errors = total_mpc;
6616 }
6617
6618 /**
6619  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6620  * @adapter: pointer to the device adapter structure
6621  **/
6622 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6623 {
6624         struct ixgbe_hw *hw = &adapter->hw;
6625         int i;
6626
6627         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6628                 return;
6629
6630         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6631
6632         /* if interface is down do nothing */
6633         if (test_bit(__IXGBE_DOWN, &adapter->state))
6634                 return;
6635
6636         /* do nothing if we are not using signature filters */
6637         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6638                 return;
6639
6640         adapter->fdir_overflow++;
6641
6642         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6643                 for (i = 0; i < adapter->num_tx_queues; i++)
6644                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6645                                 &(adapter->tx_ring[i]->state));
6646                 /* re-enable flow director interrupts */
6647                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6648         } else {
6649                 e_err(probe, "failed to finish FDIR re-initialization, "
6650                       "ignored adding FDIR ATR filters\n");
6651         }
6652 }
6653
6654 /**
6655  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6656  * @adapter: pointer to the device adapter structure
6657  *
6658  * This function serves two purposes.  First it strobes the interrupt lines
6659  * in order to make certain interrupts are occurring.  Secondly it sets the
6660  * bits needed to check for TX hangs.  As a result we should immediately
6661  * determine if a hang has occurred.
6662  */
6663 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6664 {
6665         struct ixgbe_hw *hw = &adapter->hw;
6666         u64 eics = 0;
6667         int i;
6668
6669         /* If we're down, removing or resetting, just bail */
6670         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6671             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6672             test_bit(__IXGBE_RESETTING, &adapter->state))
6673                 return;
6674
6675         /* Force detection of hung controller */
6676         if (netif_carrier_ok(adapter->netdev)) {
6677                 for (i = 0; i < adapter->num_tx_queues; i++)
6678                         set_check_for_tx_hang(adapter->tx_ring[i]);
6679         }
6680
6681         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6682                 /*
6683                  * for legacy and MSI interrupts don't set any bits
6684                  * that are enabled for EIAM, because this operation
6685                  * would set *both* EIMS and EICS for any bit in EIAM
6686                  */
6687                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6688                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6689         } else {
6690                 /* get one bit for every active tx/rx interrupt vector */
6691                 for (i = 0; i < adapter->num_q_vectors; i++) {
6692                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6693                         if (qv->rx.ring || qv->tx.ring)
6694                                 eics |= BIT_ULL(i);
6695                 }
6696         }
6697
6698         /* Cause software interrupt to ensure rings are cleaned */
6699         ixgbe_irq_rearm_queues(adapter, eics);
6700 }
6701
6702 /**
6703  * ixgbe_watchdog_update_link - update the link status
6704  * @adapter: pointer to the device adapter structure
6705  * @link_speed: pointer to a u32 to store the link_speed
6706  **/
6707 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6708 {
6709         struct ixgbe_hw *hw = &adapter->hw;
6710         u32 link_speed = adapter->link_speed;
6711         bool link_up = adapter->link_up;
6712         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6713
6714         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6715                 return;
6716
6717         if (hw->mac.ops.check_link) {
6718                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6719         } else {
6720                 /* always assume link is up, if no check link function */
6721                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6722                 link_up = true;
6723         }
6724
6725         if (adapter->ixgbe_ieee_pfc)
6726                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6727
6728         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6729                 hw->mac.ops.fc_enable(hw);
6730                 ixgbe_set_rx_drop_en(adapter);
6731         }
6732
6733         if (link_up ||
6734             time_after(jiffies, (adapter->link_check_timeout +
6735                                  IXGBE_TRY_LINK_TIMEOUT))) {
6736                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6737                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6738                 IXGBE_WRITE_FLUSH(hw);
6739         }
6740
6741         adapter->link_up = link_up;
6742         adapter->link_speed = link_speed;
6743 }
6744
6745 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6746 {
6747 #ifdef CONFIG_IXGBE_DCB
6748         struct net_device *netdev = adapter->netdev;
6749         struct dcb_app app = {
6750                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6751                               .protocol = 0,
6752                              };
6753         u8 up = 0;
6754
6755         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6756                 up = dcb_ieee_getapp_mask(netdev, &app);
6757
6758         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6759 #endif
6760 }
6761
6762 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
6763 {
6764         if (netif_is_macvlan(upper)) {
6765                 struct macvlan_dev *vlan = netdev_priv(upper);
6766
6767                 if (vlan->fwd_priv)
6768                         netif_tx_wake_all_queues(upper);
6769         }
6770
6771         return 0;
6772 }
6773
6774 /**
6775  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6776  *                             print link up message
6777  * @adapter: pointer to the device adapter structure
6778  **/
6779 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6780 {
6781         struct net_device *netdev = adapter->netdev;
6782         struct ixgbe_hw *hw = &adapter->hw;
6783         u32 link_speed = adapter->link_speed;
6784         const char *speed_str;
6785         bool flow_rx, flow_tx;
6786
6787         /* only continue if link was previously down */
6788         if (netif_carrier_ok(netdev))
6789                 return;
6790
6791         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6792
6793         switch (hw->mac.type) {
6794         case ixgbe_mac_82598EB: {
6795                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6796                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6797                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6798                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6799         }
6800                 break;
6801         case ixgbe_mac_X540:
6802         case ixgbe_mac_X550:
6803         case ixgbe_mac_X550EM_x:
6804         case ixgbe_mac_x550em_a:
6805         case ixgbe_mac_82599EB: {
6806                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6807                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6808                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6809                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6810         }
6811                 break;
6812         default:
6813                 flow_tx = false;
6814                 flow_rx = false;
6815                 break;
6816         }
6817
6818         adapter->last_rx_ptp_check = jiffies;
6819
6820         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6821                 ixgbe_ptp_start_cyclecounter(adapter);
6822
6823         switch (link_speed) {
6824         case IXGBE_LINK_SPEED_10GB_FULL:
6825                 speed_str = "10 Gbps";
6826                 break;
6827         case IXGBE_LINK_SPEED_2_5GB_FULL:
6828                 speed_str = "2.5 Gbps";
6829                 break;
6830         case IXGBE_LINK_SPEED_1GB_FULL:
6831                 speed_str = "1 Gbps";
6832                 break;
6833         case IXGBE_LINK_SPEED_100_FULL:
6834                 speed_str = "100 Mbps";
6835                 break;
6836         case IXGBE_LINK_SPEED_10_FULL:
6837                 speed_str = "10 Mbps";
6838                 break;
6839         default:
6840                 speed_str = "unknown speed";
6841                 break;
6842         }
6843         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6844                ((flow_rx && flow_tx) ? "RX/TX" :
6845                (flow_rx ? "RX" :
6846                (flow_tx ? "TX" : "None"))));
6847
6848         netif_carrier_on(netdev);
6849         ixgbe_check_vf_rate_limit(adapter);
6850
6851         /* enable transmits */
6852         netif_tx_wake_all_queues(adapter->netdev);
6853
6854         /* enable any upper devices */
6855         rtnl_lock();
6856         netdev_walk_all_upper_dev_rcu(adapter->netdev,
6857                                       ixgbe_enable_macvlan, NULL);
6858         rtnl_unlock();
6859
6860         /* update the default user priority for VFs */
6861         ixgbe_update_default_up(adapter);
6862
6863         /* ping all the active vfs to let them know link has changed */
6864         ixgbe_ping_all_vfs(adapter);
6865 }
6866
6867 /**
6868  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6869  *                               print link down message
6870  * @adapter: pointer to the adapter structure
6871  **/
6872 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6873 {
6874         struct net_device *netdev = adapter->netdev;
6875         struct ixgbe_hw *hw = &adapter->hw;
6876
6877         adapter->link_up = false;
6878         adapter->link_speed = 0;
6879
6880         /* only continue if link was up previously */
6881         if (!netif_carrier_ok(netdev))
6882                 return;
6883
6884         /* poll for SFP+ cable when link is down */
6885         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6886                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6887
6888         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6889                 ixgbe_ptp_start_cyclecounter(adapter);
6890
6891         e_info(drv, "NIC Link is Down\n");
6892         netif_carrier_off(netdev);
6893
6894         /* ping all the active vfs to let them know link has changed */
6895         ixgbe_ping_all_vfs(adapter);
6896 }
6897
6898 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6899 {
6900         int i;
6901
6902         for (i = 0; i < adapter->num_tx_queues; i++) {
6903                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6904
6905                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6906                         return true;
6907         }
6908
6909         return false;
6910 }
6911
6912 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6913 {
6914         struct ixgbe_hw *hw = &adapter->hw;
6915         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6916         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6917
6918         int i, j;
6919
6920         if (!adapter->num_vfs)
6921                 return false;
6922
6923         /* resetting the PF is only needed for MAC before X550 */
6924         if (hw->mac.type >= ixgbe_mac_X550)
6925                 return false;
6926
6927         for (i = 0; i < adapter->num_vfs; i++) {
6928                 for (j = 0; j < q_per_pool; j++) {
6929                         u32 h, t;
6930
6931                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6932                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6933
6934                         if (h != t)
6935                                 return true;
6936                 }
6937         }
6938
6939         return false;
6940 }
6941
6942 /**
6943  * ixgbe_watchdog_flush_tx - flush queues on link down
6944  * @adapter: pointer to the device adapter structure
6945  **/
6946 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6947 {
6948         if (!netif_carrier_ok(adapter->netdev)) {
6949                 if (ixgbe_ring_tx_pending(adapter) ||
6950                     ixgbe_vf_tx_pending(adapter)) {
6951                         /* We've lost link, so the controller stops DMA,
6952                          * but we've got queued Tx work that's never going
6953                          * to get done, so reset controller to flush Tx.
6954                          * (Do the reset outside of interrupt context).
6955                          */
6956                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6957                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6958                 }
6959         }
6960 }
6961
6962 #ifdef CONFIG_PCI_IOV
6963 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6964                                       struct pci_dev *vfdev)
6965 {
6966         if (!pci_wait_for_pending_transaction(vfdev))
6967                 e_dev_warn("Issuing VFLR with pending transactions\n");
6968
6969         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6970         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6971
6972         msleep(100);
6973 }
6974
6975 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6976 {
6977         struct ixgbe_hw *hw = &adapter->hw;
6978         struct pci_dev *pdev = adapter->pdev;
6979         unsigned int vf;
6980         u32 gpc;
6981
6982         if (!(netif_carrier_ok(adapter->netdev)))
6983                 return;
6984
6985         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6986         if (gpc) /* If incrementing then no need for the check below */
6987                 return;
6988         /* Check to see if a bad DMA write target from an errant or
6989          * malicious VF has caused a PCIe error.  If so then we can
6990          * issue a VFLR to the offending VF(s) and then resume without
6991          * requesting a full slot reset.
6992          */
6993
6994         if (!pdev)
6995                 return;
6996
6997         /* check status reg for all VFs owned by this PF */
6998         for (vf = 0; vf < adapter->num_vfs; ++vf) {
6999                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7000                 u16 status_reg;
7001
7002                 if (!vfdev)
7003                         continue;
7004                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7005                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7006                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7007                         ixgbe_issue_vf_flr(adapter, vfdev);
7008         }
7009 }
7010
7011 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7012 {
7013         u32 ssvpc;
7014
7015         /* Do not perform spoof check for 82598 or if not in IOV mode */
7016         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7017             adapter->num_vfs == 0)
7018                 return;
7019
7020         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7021
7022         /*
7023          * ssvpc register is cleared on read, if zero then no
7024          * spoofed packets in the last interval.
7025          */
7026         if (!ssvpc)
7027                 return;
7028
7029         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7030 }
7031 #else
7032 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7033 {
7034 }
7035
7036 static void
7037 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7038 {
7039 }
7040 #endif /* CONFIG_PCI_IOV */
7041
7042
7043 /**
7044  * ixgbe_watchdog_subtask - check and bring link up
7045  * @adapter: pointer to the device adapter structure
7046  **/
7047 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7048 {
7049         /* if interface is down, removing or resetting, do nothing */
7050         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7051             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7052             test_bit(__IXGBE_RESETTING, &adapter->state))
7053                 return;
7054
7055         ixgbe_watchdog_update_link(adapter);
7056
7057         if (adapter->link_up)
7058                 ixgbe_watchdog_link_is_up(adapter);
7059         else
7060                 ixgbe_watchdog_link_is_down(adapter);
7061
7062         ixgbe_check_for_bad_vf(adapter);
7063         ixgbe_spoof_check(adapter);
7064         ixgbe_update_stats(adapter);
7065
7066         ixgbe_watchdog_flush_tx(adapter);
7067 }
7068
7069 /**
7070  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7071  * @adapter: the ixgbe adapter structure
7072  **/
7073 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7074 {
7075         struct ixgbe_hw *hw = &adapter->hw;
7076         s32 err;
7077
7078         /* not searching for SFP so there is nothing to do here */
7079         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7080             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7081                 return;
7082
7083         if (adapter->sfp_poll_time &&
7084             time_after(adapter->sfp_poll_time, jiffies))
7085                 return; /* If not yet time to poll for SFP */
7086
7087         /* someone else is in init, wait until next service event */
7088         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7089                 return;
7090
7091         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7092
7093         err = hw->phy.ops.identify_sfp(hw);
7094         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7095                 goto sfp_out;
7096
7097         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7098                 /* If no cable is present, then we need to reset
7099                  * the next time we find a good cable. */
7100                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7101         }
7102
7103         /* exit on error */
7104         if (err)
7105                 goto sfp_out;
7106
7107         /* exit if reset not needed */
7108         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7109                 goto sfp_out;
7110
7111         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7112
7113         /*
7114          * A module may be identified correctly, but the EEPROM may not have
7115          * support for that module.  setup_sfp() will fail in that case, so
7116          * we should not allow that module to load.
7117          */
7118         if (hw->mac.type == ixgbe_mac_82598EB)
7119                 err = hw->phy.ops.reset(hw);
7120         else
7121                 err = hw->mac.ops.setup_sfp(hw);
7122
7123         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7124                 goto sfp_out;
7125
7126         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7127         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7128
7129 sfp_out:
7130         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7131
7132         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7133             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7134                 e_dev_err("failed to initialize because an unsupported "
7135                           "SFP+ module type was detected.\n");
7136                 e_dev_err("Reload the driver after installing a "
7137                           "supported module.\n");
7138                 unregister_netdev(adapter->netdev);
7139         }
7140 }
7141
7142 /**
7143  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7144  * @adapter: the ixgbe adapter structure
7145  **/
7146 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7147 {
7148         struct ixgbe_hw *hw = &adapter->hw;
7149         u32 speed;
7150         bool autoneg = false;
7151
7152         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7153                 return;
7154
7155         /* someone else is in init, wait until next service event */
7156         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7157                 return;
7158
7159         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7160
7161         speed = hw->phy.autoneg_advertised;
7162         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7163                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7164
7165                 /* setup the highest link when no autoneg */
7166                 if (!autoneg) {
7167                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7168                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7169                 }
7170         }
7171
7172         if (hw->mac.ops.setup_link)
7173                 hw->mac.ops.setup_link(hw, speed, true);
7174
7175         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7176         adapter->link_check_timeout = jiffies;
7177         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7178 }
7179
7180 /**
7181  * ixgbe_service_timer - Timer Call-back
7182  * @data: pointer to adapter cast into an unsigned long
7183  **/
7184 static void ixgbe_service_timer(unsigned long data)
7185 {
7186         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7187         unsigned long next_event_offset;
7188
7189         /* poll faster when waiting for link */
7190         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7191                 next_event_offset = HZ / 10;
7192         else
7193                 next_event_offset = HZ * 2;
7194
7195         /* Reset the timer */
7196         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7197
7198         ixgbe_service_event_schedule(adapter);
7199 }
7200
7201 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7202 {
7203         struct ixgbe_hw *hw = &adapter->hw;
7204         u32 status;
7205
7206         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7207                 return;
7208
7209         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7210
7211         if (!hw->phy.ops.handle_lasi)
7212                 return;
7213
7214         status = hw->phy.ops.handle_lasi(&adapter->hw);
7215         if (status != IXGBE_ERR_OVERTEMP)
7216                 return;
7217
7218         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7219 }
7220
7221 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7222 {
7223         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7224                 return;
7225
7226         /* If we're already down, removing or resetting, just bail */
7227         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7228             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7229             test_bit(__IXGBE_RESETTING, &adapter->state))
7230                 return;
7231
7232         ixgbe_dump(adapter);
7233         netdev_err(adapter->netdev, "Reset adapter\n");
7234         adapter->tx_timeout_count++;
7235
7236         rtnl_lock();
7237         ixgbe_reinit_locked(adapter);
7238         rtnl_unlock();
7239 }
7240
7241 /**
7242  * ixgbe_service_task - manages and runs subtasks
7243  * @work: pointer to work_struct containing our data
7244  **/
7245 static void ixgbe_service_task(struct work_struct *work)
7246 {
7247         struct ixgbe_adapter *adapter = container_of(work,
7248                                                      struct ixgbe_adapter,
7249                                                      service_task);
7250         if (ixgbe_removed(adapter->hw.hw_addr)) {
7251                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7252                         rtnl_lock();
7253                         ixgbe_down(adapter);
7254                         rtnl_unlock();
7255                 }
7256                 ixgbe_service_event_complete(adapter);
7257                 return;
7258         }
7259         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7260                 rtnl_lock();
7261                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7262                 udp_tunnel_get_rx_info(adapter->netdev);
7263                 rtnl_unlock();
7264         }
7265         ixgbe_reset_subtask(adapter);
7266         ixgbe_phy_interrupt_subtask(adapter);
7267         ixgbe_sfp_detection_subtask(adapter);
7268         ixgbe_sfp_link_config_subtask(adapter);
7269         ixgbe_check_overtemp_subtask(adapter);
7270         ixgbe_watchdog_subtask(adapter);
7271         ixgbe_fdir_reinit_subtask(adapter);
7272         ixgbe_check_hang_subtask(adapter);
7273
7274         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7275                 ixgbe_ptp_overflow_check(adapter);
7276                 ixgbe_ptp_rx_hang(adapter);
7277         }
7278
7279         ixgbe_service_event_complete(adapter);
7280 }
7281
7282 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7283                      struct ixgbe_tx_buffer *first,
7284                      u8 *hdr_len)
7285 {
7286         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7287         struct sk_buff *skb = first->skb;
7288         union {
7289                 struct iphdr *v4;
7290                 struct ipv6hdr *v6;
7291                 unsigned char *hdr;
7292         } ip;
7293         union {
7294                 struct tcphdr *tcp;
7295                 unsigned char *hdr;
7296         } l4;
7297         u32 paylen, l4_offset;
7298         int err;
7299
7300         if (skb->ip_summed != CHECKSUM_PARTIAL)
7301                 return 0;
7302
7303         if (!skb_is_gso(skb))
7304                 return 0;
7305
7306         err = skb_cow_head(skb, 0);
7307         if (err < 0)
7308                 return err;
7309
7310         ip.hdr = skb_network_header(skb);
7311         l4.hdr = skb_checksum_start(skb);
7312
7313         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7314         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7315
7316         /* initialize outer IP header fields */
7317         if (ip.v4->version == 4) {
7318                 unsigned char *csum_start = skb_checksum_start(skb);
7319                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7320
7321                 /* IP header will have to cancel out any data that
7322                  * is not a part of the outer IP header
7323                  */
7324                 ip.v4->check = csum_fold(csum_partial(trans_start,
7325                                                       csum_start - trans_start,
7326                                                       0));
7327                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7328
7329                 ip.v4->tot_len = 0;
7330                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7331                                    IXGBE_TX_FLAGS_CSUM |
7332                                    IXGBE_TX_FLAGS_IPV4;
7333         } else {
7334                 ip.v6->payload_len = 0;
7335                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7336                                    IXGBE_TX_FLAGS_CSUM;
7337         }
7338
7339         /* determine offset of inner transport header */
7340         l4_offset = l4.hdr - skb->data;
7341
7342         /* compute length of segmentation header */
7343         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7344
7345         /* remove payload length from inner checksum */
7346         paylen = skb->len - l4_offset;
7347         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7348
7349         /* update gso size and bytecount with header size */
7350         first->gso_segs = skb_shinfo(skb)->gso_segs;
7351         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7352
7353         /* mss_l4len_id: use 0 as index for TSO */
7354         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7355         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7356
7357         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7358         vlan_macip_lens = l4.hdr - ip.hdr;
7359         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7360         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7361
7362         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7363                           mss_l4len_idx);
7364
7365         return 1;
7366 }
7367
7368 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7369 {
7370         unsigned int offset = 0;
7371
7372         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7373
7374         return offset == skb_checksum_start_offset(skb);
7375 }
7376
7377 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7378                           struct ixgbe_tx_buffer *first)
7379 {
7380         struct sk_buff *skb = first->skb;
7381         u32 vlan_macip_lens = 0;
7382         u32 type_tucmd = 0;
7383
7384         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7385 csum_failed:
7386                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7387                                          IXGBE_TX_FLAGS_CC)))
7388                         return;
7389                 goto no_csum;
7390         }
7391
7392         switch (skb->csum_offset) {
7393         case offsetof(struct tcphdr, check):
7394                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7395                 /* fall through */
7396         case offsetof(struct udphdr, check):
7397                 break;
7398         case offsetof(struct sctphdr, checksum):
7399                 /* validate that this is actually an SCTP request */
7400                 if (((first->protocol == htons(ETH_P_IP)) &&
7401                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7402                     ((first->protocol == htons(ETH_P_IPV6)) &&
7403                      ixgbe_ipv6_csum_is_sctp(skb))) {
7404                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7405                         break;
7406                 }
7407                 /* fall through */
7408         default:
7409                 skb_checksum_help(skb);
7410                 goto csum_failed;
7411         }
7412
7413         /* update TX checksum flag */
7414         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7415         vlan_macip_lens = skb_checksum_start_offset(skb) -
7416                           skb_network_offset(skb);
7417 no_csum:
7418         /* vlan_macip_lens: MACLEN, VLAN tag */
7419         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7420         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7421
7422         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7423 }
7424
7425 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7426         ((_flag <= _result) ? \
7427          ((u32)(_input & _flag) * (_result / _flag)) : \
7428          ((u32)(_input & _flag) / (_flag / _result)))
7429
7430 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7431 {
7432         /* set type for advanced descriptor with frame checksum insertion */
7433         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7434                        IXGBE_ADVTXD_DCMD_DEXT |
7435                        IXGBE_ADVTXD_DCMD_IFCS;
7436
7437         /* set HW vlan bit if vlan is present */
7438         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7439                                    IXGBE_ADVTXD_DCMD_VLE);
7440
7441         /* set segmentation enable bits for TSO/FSO */
7442         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7443                                    IXGBE_ADVTXD_DCMD_TSE);
7444
7445         /* set timestamp bit if present */
7446         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7447                                    IXGBE_ADVTXD_MAC_TSTAMP);
7448
7449         /* insert frame checksum */
7450         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7451
7452         return cmd_type;
7453 }
7454
7455 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7456                                    u32 tx_flags, unsigned int paylen)
7457 {
7458         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7459
7460         /* enable L4 checksum for TSO and TX checksum offload */
7461         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7462                                         IXGBE_TX_FLAGS_CSUM,
7463                                         IXGBE_ADVTXD_POPTS_TXSM);
7464
7465         /* enble IPv4 checksum for TSO */
7466         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7467                                         IXGBE_TX_FLAGS_IPV4,
7468                                         IXGBE_ADVTXD_POPTS_IXSM);
7469
7470         /*
7471          * Check Context must be set if Tx switch is enabled, which it
7472          * always is for case where virtual functions are running
7473          */
7474         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7475                                         IXGBE_TX_FLAGS_CC,
7476                                         IXGBE_ADVTXD_CC);
7477
7478         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7479 }
7480
7481 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7482 {
7483         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7484
7485         /* Herbert's original patch had:
7486          *  smp_mb__after_netif_stop_queue();
7487          * but since that doesn't exist yet, just open code it.
7488          */
7489         smp_mb();
7490
7491         /* We need to check again in a case another CPU has just
7492          * made room available.
7493          */
7494         if (likely(ixgbe_desc_unused(tx_ring) < size))
7495                 return -EBUSY;
7496
7497         /* A reprieve! - use start_queue because it doesn't call schedule */
7498         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7499         ++tx_ring->tx_stats.restart_queue;
7500         return 0;
7501 }
7502
7503 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7504 {
7505         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7506                 return 0;
7507
7508         return __ixgbe_maybe_stop_tx(tx_ring, size);
7509 }
7510
7511 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7512                        IXGBE_TXD_CMD_RS)
7513
7514 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7515                          struct ixgbe_tx_buffer *first,
7516                          const u8 hdr_len)
7517 {
7518         struct sk_buff *skb = first->skb;
7519         struct ixgbe_tx_buffer *tx_buffer;
7520         union ixgbe_adv_tx_desc *tx_desc;
7521         struct skb_frag_struct *frag;
7522         dma_addr_t dma;
7523         unsigned int data_len, size;
7524         u32 tx_flags = first->tx_flags;
7525         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7526         u16 i = tx_ring->next_to_use;
7527
7528         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7529
7530         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7531
7532         size = skb_headlen(skb);
7533         data_len = skb->data_len;
7534
7535 #ifdef IXGBE_FCOE
7536         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7537                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7538                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7539                         data_len = 0;
7540                 } else {
7541                         data_len -= sizeof(struct fcoe_crc_eof);
7542                 }
7543         }
7544
7545 #endif
7546         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7547
7548         tx_buffer = first;
7549
7550         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7551                 if (dma_mapping_error(tx_ring->dev, dma))
7552                         goto dma_error;
7553
7554                 /* record length, and DMA address */
7555                 dma_unmap_len_set(tx_buffer, len, size);
7556                 dma_unmap_addr_set(tx_buffer, dma, dma);
7557
7558                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7559
7560                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7561                         tx_desc->read.cmd_type_len =
7562                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7563
7564                         i++;
7565                         tx_desc++;
7566                         if (i == tx_ring->count) {
7567                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7568                                 i = 0;
7569                         }
7570                         tx_desc->read.olinfo_status = 0;
7571
7572                         dma += IXGBE_MAX_DATA_PER_TXD;
7573                         size -= IXGBE_MAX_DATA_PER_TXD;
7574
7575                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7576                 }
7577
7578                 if (likely(!data_len))
7579                         break;
7580
7581                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7582
7583                 i++;
7584                 tx_desc++;
7585                 if (i == tx_ring->count) {
7586                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7587                         i = 0;
7588                 }
7589                 tx_desc->read.olinfo_status = 0;
7590
7591 #ifdef IXGBE_FCOE
7592                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7593 #else
7594                 size = skb_frag_size(frag);
7595 #endif
7596                 data_len -= size;
7597
7598                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7599                                        DMA_TO_DEVICE);
7600
7601                 tx_buffer = &tx_ring->tx_buffer_info[i];
7602         }
7603
7604         /* write last descriptor with RS and EOP bits */
7605         cmd_type |= size | IXGBE_TXD_CMD;
7606         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7607
7608         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7609
7610         /* set the timestamp */
7611         first->time_stamp = jiffies;
7612
7613         /*
7614          * Force memory writes to complete before letting h/w know there
7615          * are new descriptors to fetch.  (Only applicable for weak-ordered
7616          * memory model archs, such as IA-64).
7617          *
7618          * We also need this memory barrier to make certain all of the
7619          * status bits have been updated before next_to_watch is written.
7620          */
7621         wmb();
7622
7623         /* set next_to_watch value indicating a packet is present */
7624         first->next_to_watch = tx_desc;
7625
7626         i++;
7627         if (i == tx_ring->count)
7628                 i = 0;
7629
7630         tx_ring->next_to_use = i;
7631
7632         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7633
7634         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7635                 writel(i, tx_ring->tail);
7636
7637                 /* we need this if more than one processor can write to our tail
7638                  * at a time, it synchronizes IO on IA64/Altix systems
7639                  */
7640                 mmiowb();
7641         }
7642
7643         return;
7644 dma_error:
7645         dev_err(tx_ring->dev, "TX DMA map failed\n");
7646
7647         /* clear dma mappings for failed tx_buffer_info map */
7648         for (;;) {
7649                 tx_buffer = &tx_ring->tx_buffer_info[i];
7650                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7651                 if (tx_buffer == first)
7652                         break;
7653                 if (i == 0)
7654                         i = tx_ring->count;
7655                 i--;
7656         }
7657
7658         tx_ring->next_to_use = i;
7659 }
7660
7661 static void ixgbe_atr(struct ixgbe_ring *ring,
7662                       struct ixgbe_tx_buffer *first)
7663 {
7664         struct ixgbe_q_vector *q_vector = ring->q_vector;
7665         union ixgbe_atr_hash_dword input = { .dword = 0 };
7666         union ixgbe_atr_hash_dword common = { .dword = 0 };
7667         union {
7668                 unsigned char *network;
7669                 struct iphdr *ipv4;
7670                 struct ipv6hdr *ipv6;
7671         } hdr;
7672         struct tcphdr *th;
7673         unsigned int hlen;
7674         struct sk_buff *skb;
7675         __be16 vlan_id;
7676         int l4_proto;
7677
7678         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7679         if (!q_vector)
7680                 return;
7681
7682         /* do nothing if sampling is disabled */
7683         if (!ring->atr_sample_rate)
7684                 return;
7685
7686         ring->atr_count++;
7687
7688         /* currently only IPv4/IPv6 with TCP is supported */
7689         if ((first->protocol != htons(ETH_P_IP)) &&
7690             (first->protocol != htons(ETH_P_IPV6)))
7691                 return;
7692
7693         /* snag network header to get L4 type and address */
7694         skb = first->skb;
7695         hdr.network = skb_network_header(skb);
7696         if (unlikely(hdr.network <= skb->data))
7697                 return;
7698         if (skb->encapsulation &&
7699             first->protocol == htons(ETH_P_IP) &&
7700             hdr.ipv4->protocol == IPPROTO_UDP) {
7701                 struct ixgbe_adapter *adapter = q_vector->adapter;
7702
7703                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
7704                              VXLAN_HEADROOM))
7705                         return;
7706
7707                 /* verify the port is recognized as VXLAN */
7708                 if (adapter->vxlan_port &&
7709                     udp_hdr(skb)->dest == adapter->vxlan_port)
7710                         hdr.network = skb_inner_network_header(skb);
7711
7712                 if (adapter->geneve_port &&
7713                     udp_hdr(skb)->dest == adapter->geneve_port)
7714                         hdr.network = skb_inner_network_header(skb);
7715         }
7716
7717         /* Make sure we have at least [minimum IPv4 header + TCP]
7718          * or [IPv6 header] bytes
7719          */
7720         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
7721                 return;
7722
7723         /* Currently only IPv4/IPv6 with TCP is supported */
7724         switch (hdr.ipv4->version) {
7725         case IPVERSION:
7726                 /* access ihl as u8 to avoid unaligned access on ia64 */
7727                 hlen = (hdr.network[0] & 0x0F) << 2;
7728                 l4_proto = hdr.ipv4->protocol;
7729                 break;
7730         case 6:
7731                 hlen = hdr.network - skb->data;
7732                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7733                 hlen -= hdr.network - skb->data;
7734                 break;
7735         default:
7736                 return;
7737         }
7738
7739         if (l4_proto != IPPROTO_TCP)
7740                 return;
7741
7742         if (unlikely(skb_tail_pointer(skb) < hdr.network +
7743                      hlen + sizeof(struct tcphdr)))
7744                 return;
7745
7746         th = (struct tcphdr *)(hdr.network + hlen);
7747
7748         /* skip this packet since the socket is closing */
7749         if (th->fin)
7750                 return;
7751
7752         /* sample on all syn packets or once every atr sample count */
7753         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7754                 return;
7755
7756         /* reset sample count */
7757         ring->atr_count = 0;
7758
7759         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7760
7761         /*
7762          * src and dst are inverted, think how the receiver sees them
7763          *
7764          * The input is broken into two sections, a non-compressed section
7765          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7766          * is XORed together and stored in the compressed dword.
7767          */
7768         input.formatted.vlan_id = vlan_id;
7769
7770         /*
7771          * since src port and flex bytes occupy the same word XOR them together
7772          * and write the value to source port portion of compressed dword
7773          */
7774         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7775                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7776         else
7777                 common.port.src ^= th->dest ^ first->protocol;
7778         common.port.dst ^= th->source;
7779
7780         switch (hdr.ipv4->version) {
7781         case IPVERSION:
7782                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7783                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7784                 break;
7785         case 6:
7786                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7787                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7788                              hdr.ipv6->saddr.s6_addr32[1] ^
7789                              hdr.ipv6->saddr.s6_addr32[2] ^
7790                              hdr.ipv6->saddr.s6_addr32[3] ^
7791                              hdr.ipv6->daddr.s6_addr32[0] ^
7792                              hdr.ipv6->daddr.s6_addr32[1] ^
7793                              hdr.ipv6->daddr.s6_addr32[2] ^
7794                              hdr.ipv6->daddr.s6_addr32[3];
7795                 break;
7796         default:
7797                 break;
7798         }
7799
7800         if (hdr.network != skb_network_header(skb))
7801                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7802
7803         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7804         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7805                                               input, common, ring->queue_index);
7806 }
7807
7808 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7809                               void *accel_priv, select_queue_fallback_t fallback)
7810 {
7811         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7812 #ifdef IXGBE_FCOE
7813         struct ixgbe_adapter *adapter;
7814         struct ixgbe_ring_feature *f;
7815         int txq;
7816 #endif
7817
7818         if (fwd_adapter)
7819                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7820
7821 #ifdef IXGBE_FCOE
7822
7823         /*
7824          * only execute the code below if protocol is FCoE
7825          * or FIP and we have FCoE enabled on the adapter
7826          */
7827         switch (vlan_get_protocol(skb)) {
7828         case htons(ETH_P_FCOE):
7829         case htons(ETH_P_FIP):
7830                 adapter = netdev_priv(dev);
7831
7832                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7833                         break;
7834         default:
7835                 return fallback(dev, skb);
7836         }
7837
7838         f = &adapter->ring_feature[RING_F_FCOE];
7839
7840         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7841                                            smp_processor_id();
7842
7843         while (txq >= f->indices)
7844                 txq -= f->indices;
7845
7846         return txq + f->offset;
7847 #else
7848         return fallback(dev, skb);
7849 #endif
7850 }
7851
7852 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7853                           struct ixgbe_adapter *adapter,
7854                           struct ixgbe_ring *tx_ring)
7855 {
7856         struct ixgbe_tx_buffer *first;
7857         int tso;
7858         u32 tx_flags = 0;
7859         unsigned short f;
7860         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7861         __be16 protocol = skb->protocol;
7862         u8 hdr_len = 0;
7863
7864         /*
7865          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7866          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7867          *       + 2 desc gap to keep tail from touching head,
7868          *       + 1 desc for context descriptor,
7869          * otherwise try next time
7870          */
7871         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7872                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7873
7874         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7875                 tx_ring->tx_stats.tx_busy++;
7876                 return NETDEV_TX_BUSY;
7877         }
7878
7879         /* record the location of the first descriptor for this packet */
7880         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7881         first->skb = skb;
7882         first->bytecount = skb->len;
7883         first->gso_segs = 1;
7884
7885         /* if we have a HW VLAN tag being added default to the HW one */
7886         if (skb_vlan_tag_present(skb)) {
7887                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7888                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7889         /* else if it is a SW VLAN check the next protocol and store the tag */
7890         } else if (protocol == htons(ETH_P_8021Q)) {
7891                 struct vlan_hdr *vhdr, _vhdr;
7892                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7893                 if (!vhdr)
7894                         goto out_drop;
7895
7896                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7897                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7898                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7899         }
7900         protocol = vlan_get_protocol(skb);
7901
7902         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7903             adapter->ptp_clock &&
7904             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7905                                    &adapter->state)) {
7906                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7907                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7908
7909                 /* schedule check for Tx timestamp */
7910                 adapter->ptp_tx_skb = skb_get(skb);
7911                 adapter->ptp_tx_start = jiffies;
7912                 schedule_work(&adapter->ptp_tx_work);
7913         }
7914
7915         skb_tx_timestamp(skb);
7916
7917 #ifdef CONFIG_PCI_IOV
7918         /*
7919          * Use the l2switch_enable flag - would be false if the DMA
7920          * Tx switch had been disabled.
7921          */
7922         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7923                 tx_flags |= IXGBE_TX_FLAGS_CC;
7924
7925 #endif
7926         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7927         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7928             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7929              (skb->priority != TC_PRIO_CONTROL))) {
7930                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7931                 tx_flags |= (skb->priority & 0x7) <<
7932                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7933                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7934                         struct vlan_ethhdr *vhdr;
7935
7936                         if (skb_cow_head(skb, 0))
7937                                 goto out_drop;
7938                         vhdr = (struct vlan_ethhdr *)skb->data;
7939                         vhdr->h_vlan_TCI = htons(tx_flags >>
7940                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7941                 } else {
7942                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7943                 }
7944         }
7945
7946         /* record initial flags and protocol */
7947         first->tx_flags = tx_flags;
7948         first->protocol = protocol;
7949
7950 #ifdef IXGBE_FCOE
7951         /* setup tx offload for FCoE */
7952         if ((protocol == htons(ETH_P_FCOE)) &&
7953             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7954                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7955                 if (tso < 0)
7956                         goto out_drop;
7957
7958                 goto xmit_fcoe;
7959         }
7960
7961 #endif /* IXGBE_FCOE */
7962         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7963         if (tso < 0)
7964                 goto out_drop;
7965         else if (!tso)
7966                 ixgbe_tx_csum(tx_ring, first);
7967
7968         /* add the ATR filter if ATR is on */
7969         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7970                 ixgbe_atr(tx_ring, first);
7971
7972 #ifdef IXGBE_FCOE
7973 xmit_fcoe:
7974 #endif /* IXGBE_FCOE */
7975         ixgbe_tx_map(tx_ring, first, hdr_len);
7976
7977         return NETDEV_TX_OK;
7978
7979 out_drop:
7980         dev_kfree_skb_any(first->skb);
7981         first->skb = NULL;
7982
7983         return NETDEV_TX_OK;
7984 }
7985
7986 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7987                                       struct net_device *netdev,
7988                                       struct ixgbe_ring *ring)
7989 {
7990         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7991         struct ixgbe_ring *tx_ring;
7992
7993         /*
7994          * The minimum packet size for olinfo paylen is 17 so pad the skb
7995          * in order to meet this minimum size requirement.
7996          */
7997         if (skb_put_padto(skb, 17))
7998                 return NETDEV_TX_OK;
7999
8000         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8001
8002         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8003 }
8004
8005 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8006                                     struct net_device *netdev)
8007 {
8008         return __ixgbe_xmit_frame(skb, netdev, NULL);
8009 }
8010
8011 /**
8012  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8013  * @netdev: network interface device structure
8014  * @p: pointer to an address structure
8015  *
8016  * Returns 0 on success, negative on failure
8017  **/
8018 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8019 {
8020         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8021         struct ixgbe_hw *hw = &adapter->hw;
8022         struct sockaddr *addr = p;
8023
8024         if (!is_valid_ether_addr(addr->sa_data))
8025                 return -EADDRNOTAVAIL;
8026
8027         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8028         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8029
8030         ixgbe_mac_set_default_filter(adapter);
8031
8032         return 0;
8033 }
8034
8035 static int
8036 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8037 {
8038         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8039         struct ixgbe_hw *hw = &adapter->hw;
8040         u16 value;
8041         int rc;
8042
8043         if (prtad != hw->phy.mdio.prtad)
8044                 return -EINVAL;
8045         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8046         if (!rc)
8047                 rc = value;
8048         return rc;
8049 }
8050
8051 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8052                             u16 addr, u16 value)
8053 {
8054         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8055         struct ixgbe_hw *hw = &adapter->hw;
8056
8057         if (prtad != hw->phy.mdio.prtad)
8058                 return -EINVAL;
8059         return hw->phy.ops.write_reg(hw, addr, devad, value);
8060 }
8061
8062 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8063 {
8064         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8065
8066         switch (cmd) {
8067         case SIOCSHWTSTAMP:
8068                 return ixgbe_ptp_set_ts_config(adapter, req);
8069         case SIOCGHWTSTAMP:
8070                 return ixgbe_ptp_get_ts_config(adapter, req);
8071         default:
8072                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8073         }
8074 }
8075
8076 /**
8077  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8078  * netdev->dev_addrs
8079  * @netdev: network interface device structure
8080  *
8081  * Returns non-zero on failure
8082  **/
8083 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8084 {
8085         int err = 0;
8086         struct ixgbe_adapter *adapter = netdev_priv(dev);
8087         struct ixgbe_hw *hw = &adapter->hw;
8088
8089         if (is_valid_ether_addr(hw->mac.san_addr)) {
8090                 rtnl_lock();
8091                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8092                 rtnl_unlock();
8093
8094                 /* update SAN MAC vmdq pool selection */
8095                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8096         }
8097         return err;
8098 }
8099
8100 /**
8101  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8102  * netdev->dev_addrs
8103  * @netdev: network interface device structure
8104  *
8105  * Returns non-zero on failure
8106  **/
8107 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8108 {
8109         int err = 0;
8110         struct ixgbe_adapter *adapter = netdev_priv(dev);
8111         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8112
8113         if (is_valid_ether_addr(mac->san_addr)) {
8114                 rtnl_lock();
8115                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8116                 rtnl_unlock();
8117         }
8118         return err;
8119 }
8120
8121 #ifdef CONFIG_NET_POLL_CONTROLLER
8122 /*
8123  * Polling 'interrupt' - used by things like netconsole to send skbs
8124  * without having to re-enable interrupts. It's not called while
8125  * the interrupt routine is executing.
8126  */
8127 static void ixgbe_netpoll(struct net_device *netdev)
8128 {
8129         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8130         int i;
8131
8132         /* if interface is down do nothing */
8133         if (test_bit(__IXGBE_DOWN, &adapter->state))
8134                 return;
8135
8136         /* loop through and schedule all active queues */
8137         for (i = 0; i < adapter->num_q_vectors; i++)
8138                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8139 }
8140
8141 #endif
8142
8143 static void ixgbe_get_stats64(struct net_device *netdev,
8144                               struct rtnl_link_stats64 *stats)
8145 {
8146         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8147         int i;
8148
8149         rcu_read_lock();
8150         for (i = 0; i < adapter->num_rx_queues; i++) {
8151                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8152                 u64 bytes, packets;
8153                 unsigned int start;
8154
8155                 if (ring) {
8156                         do {
8157                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8158                                 packets = ring->stats.packets;
8159                                 bytes   = ring->stats.bytes;
8160                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8161                         stats->rx_packets += packets;
8162                         stats->rx_bytes   += bytes;
8163                 }
8164         }
8165
8166         for (i = 0; i < adapter->num_tx_queues; i++) {
8167                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8168                 u64 bytes, packets;
8169                 unsigned int start;
8170
8171                 if (ring) {
8172                         do {
8173                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8174                                 packets = ring->stats.packets;
8175                                 bytes   = ring->stats.bytes;
8176                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8177                         stats->tx_packets += packets;
8178                         stats->tx_bytes   += bytes;
8179                 }
8180         }
8181         rcu_read_unlock();
8182
8183         /* following stats updated by ixgbe_watchdog_task() */
8184         stats->multicast        = netdev->stats.multicast;
8185         stats->rx_errors        = netdev->stats.rx_errors;
8186         stats->rx_length_errors = netdev->stats.rx_length_errors;
8187         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8188         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8189 }
8190
8191 #ifdef CONFIG_IXGBE_DCB
8192 /**
8193  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8194  * @adapter: pointer to ixgbe_adapter
8195  * @tc: number of traffic classes currently enabled
8196  *
8197  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8198  * 802.1Q priority maps to a packet buffer that exists.
8199  */
8200 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8201 {
8202         struct ixgbe_hw *hw = &adapter->hw;
8203         u32 reg, rsave;
8204         int i;
8205
8206         /* 82598 have a static priority to TC mapping that can not
8207          * be changed so no validation is needed.
8208          */
8209         if (hw->mac.type == ixgbe_mac_82598EB)
8210                 return;
8211
8212         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8213         rsave = reg;
8214
8215         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8216                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8217
8218                 /* If up2tc is out of bounds default to zero */
8219                 if (up2tc > tc)
8220                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8221         }
8222
8223         if (reg != rsave)
8224                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8225
8226         return;
8227 }
8228
8229 /**
8230  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8231  * @adapter: Pointer to adapter struct
8232  *
8233  * Populate the netdev user priority to tc map
8234  */
8235 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8236 {
8237         struct net_device *dev = adapter->netdev;
8238         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8239         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8240         u8 prio;
8241
8242         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8243                 u8 tc = 0;
8244
8245                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8246                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8247                 else if (ets)
8248                         tc = ets->prio_tc[prio];
8249
8250                 netdev_set_prio_tc_map(dev, prio, tc);
8251         }
8252 }
8253
8254 #endif /* CONFIG_IXGBE_DCB */
8255 /**
8256  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8257  *
8258  * @netdev: net device to configure
8259  * @tc: number of traffic classes to enable
8260  */
8261 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8262 {
8263         struct ixgbe_adapter *adapter = netdev_priv(dev);
8264         struct ixgbe_hw *hw = &adapter->hw;
8265         bool pools;
8266
8267         /* Hardware supports up to 8 traffic classes */
8268         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8269                 return -EINVAL;
8270
8271         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8272                 return -EINVAL;
8273
8274         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8275         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8276                 return -EBUSY;
8277
8278         /* Hardware has to reinitialize queues and interrupts to
8279          * match packet buffer alignment. Unfortunately, the
8280          * hardware is not flexible enough to do this dynamically.
8281          */
8282         if (netif_running(dev))
8283                 ixgbe_close(dev);
8284         else
8285                 ixgbe_reset(adapter);
8286
8287         ixgbe_clear_interrupt_scheme(adapter);
8288
8289 #ifdef CONFIG_IXGBE_DCB
8290         if (tc) {
8291                 netdev_set_num_tc(dev, tc);
8292                 ixgbe_set_prio_tc_map(adapter);
8293
8294                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8295
8296                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8297                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8298                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8299                 }
8300         } else {
8301                 netdev_reset_tc(dev);
8302
8303                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8304                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8305
8306                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8307
8308                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8309                 adapter->dcb_cfg.pfc_mode_enable = false;
8310         }
8311
8312         ixgbe_validate_rtr(adapter, tc);
8313
8314 #endif /* CONFIG_IXGBE_DCB */
8315         ixgbe_init_interrupt_scheme(adapter);
8316
8317         if (netif_running(dev))
8318                 return ixgbe_open(dev);
8319
8320         return 0;
8321 }
8322
8323 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8324                                struct tc_cls_u32_offload *cls)
8325 {
8326         u32 hdl = cls->knode.handle;
8327         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8328         u32 loc = cls->knode.handle & 0xfffff;
8329         int err = 0, i, j;
8330         struct ixgbe_jump_table *jump = NULL;
8331
8332         if (loc > IXGBE_MAX_HW_ENTRIES)
8333                 return -EINVAL;
8334
8335         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8336                 return -EINVAL;
8337
8338         /* Clear this filter in the link data it is associated with */
8339         if (uhtid != 0x800) {
8340                 jump = adapter->jump_tables[uhtid];
8341                 if (!jump)
8342                         return -EINVAL;
8343                 if (!test_bit(loc - 1, jump->child_loc_map))
8344                         return -EINVAL;
8345                 clear_bit(loc - 1, jump->child_loc_map);
8346         }
8347
8348         /* Check if the filter being deleted is a link */
8349         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8350                 jump = adapter->jump_tables[i];
8351                 if (jump && jump->link_hdl == hdl) {
8352                         /* Delete filters in the hardware in the child hash
8353                          * table associated with this link
8354                          */
8355                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8356                                 if (!test_bit(j, jump->child_loc_map))
8357                                         continue;
8358                                 spin_lock(&adapter->fdir_perfect_lock);
8359                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8360                                                                       NULL,
8361                                                                       j + 1);
8362                                 spin_unlock(&adapter->fdir_perfect_lock);
8363                                 clear_bit(j, jump->child_loc_map);
8364                         }
8365                         /* Remove resources for this link */
8366                         kfree(jump->input);
8367                         kfree(jump->mask);
8368                         kfree(jump);
8369                         adapter->jump_tables[i] = NULL;
8370                         return err;
8371                 }
8372         }
8373
8374         spin_lock(&adapter->fdir_perfect_lock);
8375         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8376         spin_unlock(&adapter->fdir_perfect_lock);
8377         return err;
8378 }
8379
8380 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8381                                             __be16 protocol,
8382                                             struct tc_cls_u32_offload *cls)
8383 {
8384         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8385
8386         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8387                 return -EINVAL;
8388
8389         /* This ixgbe devices do not support hash tables at the moment
8390          * so abort when given hash tables.
8391          */
8392         if (cls->hnode.divisor > 0)
8393                 return -EINVAL;
8394
8395         set_bit(uhtid - 1, &adapter->tables);
8396         return 0;
8397 }
8398
8399 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8400                                             struct tc_cls_u32_offload *cls)
8401 {
8402         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8403
8404         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8405                 return -EINVAL;
8406
8407         clear_bit(uhtid - 1, &adapter->tables);
8408         return 0;
8409 }
8410
8411 #ifdef CONFIG_NET_CLS_ACT
8412 struct upper_walk_data {
8413         struct ixgbe_adapter *adapter;
8414         u64 action;
8415         int ifindex;
8416         u8 queue;
8417 };
8418
8419 static int get_macvlan_queue(struct net_device *upper, void *_data)
8420 {
8421         if (netif_is_macvlan(upper)) {
8422                 struct macvlan_dev *dfwd = netdev_priv(upper);
8423                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8424                 struct upper_walk_data *data = _data;
8425                 struct ixgbe_adapter *adapter = data->adapter;
8426                 int ifindex = data->ifindex;
8427
8428                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8429                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8430                         data->action = data->queue;
8431                         return 1;
8432                 }
8433         }
8434
8435         return 0;
8436 }
8437
8438 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8439                                   u8 *queue, u64 *action)
8440 {
8441         unsigned int num_vfs = adapter->num_vfs, vf;
8442         struct upper_walk_data data;
8443         struct net_device *upper;
8444
8445         /* redirect to a SRIOV VF */
8446         for (vf = 0; vf < num_vfs; ++vf) {
8447                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8448                 if (upper->ifindex == ifindex) {
8449                         if (adapter->num_rx_pools > 1)
8450                                 *queue = vf * 2;
8451                         else
8452                                 *queue = vf * adapter->num_rx_queues_per_pool;
8453
8454                         *action = vf + 1;
8455                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8456                         return 0;
8457                 }
8458         }
8459
8460         /* redirect to a offloaded macvlan netdev */
8461         data.adapter = adapter;
8462         data.ifindex = ifindex;
8463         data.action = 0;
8464         data.queue = 0;
8465         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8466                                           get_macvlan_queue, &data)) {
8467                 *action = data.action;
8468                 *queue = data.queue;
8469
8470                 return 0;
8471         }
8472
8473         return -EINVAL;
8474 }
8475
8476 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8477                             struct tcf_exts *exts, u64 *action, u8 *queue)
8478 {
8479         const struct tc_action *a;
8480         LIST_HEAD(actions);
8481         int err;
8482
8483         if (tc_no_actions(exts))
8484                 return -EINVAL;
8485
8486         tcf_exts_to_list(exts, &actions);
8487         list_for_each_entry(a, &actions, list) {
8488
8489                 /* Drop action */
8490                 if (is_tcf_gact_shot(a)) {
8491                         *action = IXGBE_FDIR_DROP_QUEUE;
8492                         *queue = IXGBE_FDIR_DROP_QUEUE;
8493                         return 0;
8494                 }
8495
8496                 /* Redirect to a VF or a offloaded macvlan */
8497                 if (is_tcf_mirred_egress_redirect(a)) {
8498                         int ifindex = tcf_mirred_ifindex(a);
8499
8500                         err = handle_redirect_action(adapter, ifindex, queue,
8501                                                      action);
8502                         if (err == 0)
8503                                 return err;
8504                 }
8505         }
8506
8507         return -EINVAL;
8508 }
8509 #else
8510 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8511                             struct tcf_exts *exts, u64 *action, u8 *queue)
8512 {
8513         return -EINVAL;
8514 }
8515 #endif /* CONFIG_NET_CLS_ACT */
8516
8517 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8518                                     union ixgbe_atr_input *mask,
8519                                     struct tc_cls_u32_offload *cls,
8520                                     struct ixgbe_mat_field *field_ptr,
8521                                     struct ixgbe_nexthdr *nexthdr)
8522 {
8523         int i, j, off;
8524         __be32 val, m;
8525         bool found_entry = false, found_jump_field = false;
8526
8527         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8528                 off = cls->knode.sel->keys[i].off;
8529                 val = cls->knode.sel->keys[i].val;
8530                 m = cls->knode.sel->keys[i].mask;
8531
8532                 for (j = 0; field_ptr[j].val; j++) {
8533                         if (field_ptr[j].off == off) {
8534                                 field_ptr[j].val(input, mask, val, m);
8535                                 input->filter.formatted.flow_type |=
8536                                         field_ptr[j].type;
8537                                 found_entry = true;
8538                                 break;
8539                         }
8540                 }
8541                 if (nexthdr) {
8542                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
8543                             nexthdr->val == cls->knode.sel->keys[i].val &&
8544                             nexthdr->mask == cls->knode.sel->keys[i].mask)
8545                                 found_jump_field = true;
8546                         else
8547                                 continue;
8548                 }
8549         }
8550
8551         if (nexthdr && !found_jump_field)
8552                 return -EINVAL;
8553
8554         if (!found_entry)
8555                 return 0;
8556
8557         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8558                                     IXGBE_ATR_L4TYPE_MASK;
8559
8560         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8561                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8562
8563         return 0;
8564 }
8565
8566 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8567                                   __be16 protocol,
8568                                   struct tc_cls_u32_offload *cls)
8569 {
8570         u32 loc = cls->knode.handle & 0xfffff;
8571         struct ixgbe_hw *hw = &adapter->hw;
8572         struct ixgbe_mat_field *field_ptr;
8573         struct ixgbe_fdir_filter *input = NULL;
8574         union ixgbe_atr_input *mask = NULL;
8575         struct ixgbe_jump_table *jump = NULL;
8576         int i, err = -EINVAL;
8577         u8 queue;
8578         u32 uhtid, link_uhtid;
8579
8580         uhtid = TC_U32_USERHTID(cls->knode.handle);
8581         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8582
8583         /* At the moment cls_u32 jumps to network layer and skips past
8584          * L2 headers. The canonical method to match L2 frames is to use
8585          * negative values. However this is error prone at best but really
8586          * just broken because there is no way to "know" what sort of hdr
8587          * is in front of the network layer. Fix cls_u32 to support L2
8588          * headers when needed.
8589          */
8590         if (protocol != htons(ETH_P_IP))
8591                 return err;
8592
8593         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8594                 e_err(drv, "Location out of range\n");
8595                 return err;
8596         }
8597
8598         /* cls u32 is a graph starting at root node 0x800. The driver tracks
8599          * links and also the fields used to advance the parser across each
8600          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8601          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8602          * To add support for new nodes update ixgbe_model.h parse structures
8603          * this function _should_ be generic try not to hardcode values here.
8604          */
8605         if (uhtid == 0x800) {
8606                 field_ptr = (adapter->jump_tables[0])->mat;
8607         } else {
8608                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8609                         return err;
8610                 if (!adapter->jump_tables[uhtid])
8611                         return err;
8612                 field_ptr = (adapter->jump_tables[uhtid])->mat;
8613         }
8614
8615         if (!field_ptr)
8616                 return err;
8617
8618         /* At this point we know the field_ptr is valid and need to either
8619          * build cls_u32 link or attach filter. Because adding a link to
8620          * a handle that does not exist is invalid and the same for adding
8621          * rules to handles that don't exist.
8622          */
8623
8624         if (link_uhtid) {
8625                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8626
8627                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8628                         return err;
8629
8630                 if (!test_bit(link_uhtid - 1, &adapter->tables))
8631                         return err;
8632
8633                 /* Multiple filters as links to the same hash table are not
8634                  * supported. To add a new filter with the same next header
8635                  * but different match/jump conditions, create a new hash table
8636                  * and link to it.
8637                  */
8638                 if (adapter->jump_tables[link_uhtid] &&
8639                     (adapter->jump_tables[link_uhtid])->link_hdl) {
8640                         e_err(drv, "Link filter exists for link: %x\n",
8641                               link_uhtid);
8642                         return err;
8643                 }
8644
8645                 for (i = 0; nexthdr[i].jump; i++) {
8646                         if (nexthdr[i].o != cls->knode.sel->offoff ||
8647                             nexthdr[i].s != cls->knode.sel->offshift ||
8648                             nexthdr[i].m != cls->knode.sel->offmask)
8649                                 return err;
8650
8651                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8652                         if (!jump)
8653                                 return -ENOMEM;
8654                         input = kzalloc(sizeof(*input), GFP_KERNEL);
8655                         if (!input) {
8656                                 err = -ENOMEM;
8657                                 goto free_jump;
8658                         }
8659                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8660                         if (!mask) {
8661                                 err = -ENOMEM;
8662                                 goto free_input;
8663                         }
8664                         jump->input = input;
8665                         jump->mask = mask;
8666                         jump->link_hdl = cls->knode.handle;
8667
8668                         err = ixgbe_clsu32_build_input(input, mask, cls,
8669                                                        field_ptr, &nexthdr[i]);
8670                         if (!err) {
8671                                 jump->mat = nexthdr[i].jump;
8672                                 adapter->jump_tables[link_uhtid] = jump;
8673                                 break;
8674                         }
8675                 }
8676                 return 0;
8677         }
8678
8679         input = kzalloc(sizeof(*input), GFP_KERNEL);
8680         if (!input)
8681                 return -ENOMEM;
8682         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8683         if (!mask) {
8684                 err = -ENOMEM;
8685                 goto free_input;
8686         }
8687
8688         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8689                 if ((adapter->jump_tables[uhtid])->input)
8690                         memcpy(input, (adapter->jump_tables[uhtid])->input,
8691                                sizeof(*input));
8692                 if ((adapter->jump_tables[uhtid])->mask)
8693                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8694                                sizeof(*mask));
8695
8696                 /* Lookup in all child hash tables if this location is already
8697                  * filled with a filter
8698                  */
8699                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8700                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
8701
8702                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
8703                                 e_err(drv, "Filter exists in location: %x\n",
8704                                       loc);
8705                                 err = -EINVAL;
8706                                 goto err_out;
8707                         }
8708                 }
8709         }
8710         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8711         if (err)
8712                 goto err_out;
8713
8714         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8715                                &queue);
8716         if (err < 0)
8717                 goto err_out;
8718
8719         input->sw_idx = loc;
8720
8721         spin_lock(&adapter->fdir_perfect_lock);
8722
8723         if (hlist_empty(&adapter->fdir_filter_list)) {
8724                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8725                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8726                 if (err)
8727                         goto err_out_w_lock;
8728         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8729                 err = -EINVAL;
8730                 goto err_out_w_lock;
8731         }
8732
8733         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8734         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8735                                                     input->sw_idx, queue);
8736         if (!err)
8737                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8738         spin_unlock(&adapter->fdir_perfect_lock);
8739
8740         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8741                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8742
8743         kfree(mask);
8744         return err;
8745 err_out_w_lock:
8746         spin_unlock(&adapter->fdir_perfect_lock);
8747 err_out:
8748         kfree(mask);
8749 free_input:
8750         kfree(input);
8751 free_jump:
8752         kfree(jump);
8753         return err;
8754 }
8755
8756 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8757                             struct tc_to_netdev *tc)
8758 {
8759         struct ixgbe_adapter *adapter = netdev_priv(dev);
8760
8761         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8762             tc->type == TC_SETUP_CLSU32) {
8763                 switch (tc->cls_u32->command) {
8764                 case TC_CLSU32_NEW_KNODE:
8765                 case TC_CLSU32_REPLACE_KNODE:
8766                         return ixgbe_configure_clsu32(adapter,
8767                                                       proto, tc->cls_u32);
8768                 case TC_CLSU32_DELETE_KNODE:
8769                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8770                 case TC_CLSU32_NEW_HNODE:
8771                 case TC_CLSU32_REPLACE_HNODE:
8772                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8773                                                                 tc->cls_u32);
8774                 case TC_CLSU32_DELETE_HNODE:
8775                         return ixgbe_configure_clsu32_del_hnode(adapter,
8776                                                                 tc->cls_u32);
8777                 default:
8778                         return -EINVAL;
8779                 }
8780         }
8781
8782         if (tc->type != TC_SETUP_MQPRIO)
8783                 return -EINVAL;
8784
8785         return ixgbe_setup_tc(dev, tc->tc);
8786 }
8787
8788 #ifdef CONFIG_PCI_IOV
8789 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8790 {
8791         struct net_device *netdev = adapter->netdev;
8792
8793         rtnl_lock();
8794         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8795         rtnl_unlock();
8796 }
8797
8798 #endif
8799 void ixgbe_do_reset(struct net_device *netdev)
8800 {
8801         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8802
8803         if (netif_running(netdev))
8804                 ixgbe_reinit_locked(adapter);
8805         else
8806                 ixgbe_reset(adapter);
8807 }
8808
8809 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8810                                             netdev_features_t features)
8811 {
8812         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8813
8814         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8815         if (!(features & NETIF_F_RXCSUM))
8816                 features &= ~NETIF_F_LRO;
8817
8818         /* Turn off LRO if not RSC capable */
8819         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8820                 features &= ~NETIF_F_LRO;
8821
8822         return features;
8823 }
8824
8825 static int ixgbe_set_features(struct net_device *netdev,
8826                               netdev_features_t features)
8827 {
8828         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8829         netdev_features_t changed = netdev->features ^ features;
8830         bool need_reset = false;
8831
8832         /* Make sure RSC matches LRO, reset if change */
8833         if (!(features & NETIF_F_LRO)) {
8834                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8835                         need_reset = true;
8836                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8837         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8838                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8839                 if (adapter->rx_itr_setting == 1 ||
8840                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8841                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8842                         need_reset = true;
8843                 } else if ((changed ^ features) & NETIF_F_LRO) {
8844                         e_info(probe, "rx-usecs set too low, "
8845                                "disabling RSC\n");
8846                 }
8847         }
8848
8849         /*
8850          * Check if Flow Director n-tuple support or hw_tc support was
8851          * enabled or disabled.  If the state changed, we need to reset.
8852          */
8853         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8854                 /* turn off ATR, enable perfect filters and reset */
8855                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8856                         need_reset = true;
8857
8858                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8859                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8860         } else {
8861                 /* turn off perfect filters, enable ATR and reset */
8862                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8863                         need_reset = true;
8864
8865                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8866
8867                 /* We cannot enable ATR if SR-IOV is enabled */
8868                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8869                     /* We cannot enable ATR if we have 2 or more tcs */
8870                     (netdev_get_num_tc(netdev) > 1) ||
8871                     /* We cannot enable ATR if RSS is disabled */
8872                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8873                     /* A sample rate of 0 indicates ATR disabled */
8874                     (!adapter->atr_sample_rate))
8875                         ; /* do nothing not supported */
8876                 else /* otherwise supported and set the flag */
8877                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8878         }
8879
8880         if (changed & NETIF_F_RXALL)
8881                 need_reset = true;
8882
8883         netdev->features = features;
8884
8885         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8886                 if (features & NETIF_F_RXCSUM) {
8887                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8888                 } else {
8889                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8890
8891                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8892                 }
8893         }
8894
8895         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
8896                 if (features & NETIF_F_RXCSUM) {
8897                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8898                 } else {
8899                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8900
8901                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8902                 }
8903         }
8904
8905         if (need_reset)
8906                 ixgbe_do_reset(netdev);
8907         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8908                             NETIF_F_HW_VLAN_CTAG_FILTER))
8909                 ixgbe_set_rx_mode(netdev);
8910
8911         return 0;
8912 }
8913
8914 /**
8915  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
8916  * @dev: The port's netdev
8917  * @ti: Tunnel endpoint information
8918  **/
8919 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
8920                                       struct udp_tunnel_info *ti)
8921 {
8922         struct ixgbe_adapter *adapter = netdev_priv(dev);
8923         struct ixgbe_hw *hw = &adapter->hw;
8924         __be16 port = ti->port;
8925         u32 port_shift = 0;
8926         u32 reg;
8927
8928         if (ti->sa_family != AF_INET)
8929                 return;
8930
8931         switch (ti->type) {
8932         case UDP_TUNNEL_TYPE_VXLAN:
8933                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8934                         return;
8935
8936                 if (adapter->vxlan_port == port)
8937                         return;
8938
8939                 if (adapter->vxlan_port) {
8940                         netdev_info(dev,
8941                                     "VXLAN port %d set, not adding port %d\n",
8942                                     ntohs(adapter->vxlan_port),
8943                                     ntohs(port));
8944                         return;
8945                 }
8946
8947                 adapter->vxlan_port = port;
8948                 break;
8949         case UDP_TUNNEL_TYPE_GENEVE:
8950                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8951                         return;
8952
8953                 if (adapter->geneve_port == port)
8954                         return;
8955
8956                 if (adapter->geneve_port) {
8957                         netdev_info(dev,
8958                                     "GENEVE port %d set, not adding port %d\n",
8959                                     ntohs(adapter->geneve_port),
8960                                     ntohs(port));
8961                         return;
8962                 }
8963
8964                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
8965                 adapter->geneve_port = port;
8966                 break;
8967         default:
8968                 return;
8969         }
8970
8971         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
8972         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
8973 }
8974
8975 /**
8976  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
8977  * @dev: The port's netdev
8978  * @ti: Tunnel endpoint information
8979  **/
8980 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
8981                                       struct udp_tunnel_info *ti)
8982 {
8983         struct ixgbe_adapter *adapter = netdev_priv(dev);
8984         u32 port_mask;
8985
8986         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
8987             ti->type != UDP_TUNNEL_TYPE_GENEVE)
8988                 return;
8989
8990         if (ti->sa_family != AF_INET)
8991                 return;
8992
8993         switch (ti->type) {
8994         case UDP_TUNNEL_TYPE_VXLAN:
8995                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8996                         return;
8997
8998                 if (adapter->vxlan_port != ti->port) {
8999                         netdev_info(dev, "VXLAN port %d not found\n",
9000                                     ntohs(ti->port));
9001                         return;
9002                 }
9003
9004                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9005                 break;
9006         case UDP_TUNNEL_TYPE_GENEVE:
9007                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9008                         return;
9009
9010                 if (adapter->geneve_port != ti->port) {
9011                         netdev_info(dev, "GENEVE port %d not found\n",
9012                                     ntohs(ti->port));
9013                         return;
9014                 }
9015
9016                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9017                 break;
9018         default:
9019                 return;
9020         }
9021
9022         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9023         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9024 }
9025
9026 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9027                              struct net_device *dev,
9028                              const unsigned char *addr, u16 vid,
9029                              u16 flags)
9030 {
9031         /* guarantee we can provide a unique filter for the unicast address */
9032         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9033                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9034                 u16 pool = VMDQ_P(0);
9035
9036                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9037                         return -ENOMEM;
9038         }
9039
9040         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9041 }
9042
9043 /**
9044  * ixgbe_configure_bridge_mode - set various bridge modes
9045  * @adapter - the private structure
9046  * @mode - requested bridge mode
9047  *
9048  * Configure some settings require for various bridge modes.
9049  **/
9050 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9051                                        __u16 mode)
9052 {
9053         struct ixgbe_hw *hw = &adapter->hw;
9054         unsigned int p, num_pools;
9055         u32 vmdctl;
9056
9057         switch (mode) {
9058         case BRIDGE_MODE_VEPA:
9059                 /* disable Tx loopback, rely on switch hairpin mode */
9060                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9061
9062                 /* must enable Rx switching replication to allow multicast
9063                  * packet reception on all VFs, and to enable source address
9064                  * pruning.
9065                  */
9066                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9067                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9068                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9069
9070                 /* enable Rx source address pruning. Note, this requires
9071                  * replication to be enabled or else it does nothing.
9072                  */
9073                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9074                 for (p = 0; p < num_pools; p++) {
9075                         if (hw->mac.ops.set_source_address_pruning)
9076                                 hw->mac.ops.set_source_address_pruning(hw,
9077                                                                        true,
9078                                                                        p);
9079                 }
9080                 break;
9081         case BRIDGE_MODE_VEB:
9082                 /* enable Tx loopback for internal VF/PF communication */
9083                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9084                                 IXGBE_PFDTXGSWC_VT_LBEN);
9085
9086                 /* disable Rx switching replication unless we have SR-IOV
9087                  * virtual functions
9088                  */
9089                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9090                 if (!adapter->num_vfs)
9091                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9092                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9093
9094                 /* disable Rx source address pruning, since we don't expect to
9095                  * be receiving external loopback of our transmitted frames.
9096                  */
9097                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9098                 for (p = 0; p < num_pools; p++) {
9099                         if (hw->mac.ops.set_source_address_pruning)
9100                                 hw->mac.ops.set_source_address_pruning(hw,
9101                                                                        false,
9102                                                                        p);
9103                 }
9104                 break;
9105         default:
9106                 return -EINVAL;
9107         }
9108
9109         adapter->bridge_mode = mode;
9110
9111         e_info(drv, "enabling bridge mode: %s\n",
9112                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9113
9114         return 0;
9115 }
9116
9117 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9118                                     struct nlmsghdr *nlh, u16 flags)
9119 {
9120         struct ixgbe_adapter *adapter = netdev_priv(dev);
9121         struct nlattr *attr, *br_spec;
9122         int rem;
9123
9124         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9125                 return -EOPNOTSUPP;
9126
9127         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9128         if (!br_spec)
9129                 return -EINVAL;
9130
9131         nla_for_each_nested(attr, br_spec, rem) {
9132                 int status;
9133                 __u16 mode;
9134
9135                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9136                         continue;
9137
9138                 if (nla_len(attr) < sizeof(mode))
9139                         return -EINVAL;
9140
9141                 mode = nla_get_u16(attr);
9142                 status = ixgbe_configure_bridge_mode(adapter, mode);
9143                 if (status)
9144                         return status;
9145
9146                 break;
9147         }
9148
9149         return 0;
9150 }
9151
9152 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9153                                     struct net_device *dev,
9154                                     u32 filter_mask, int nlflags)
9155 {
9156         struct ixgbe_adapter *adapter = netdev_priv(dev);
9157
9158         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9159                 return 0;
9160
9161         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9162                                        adapter->bridge_mode, 0, 0, nlflags,
9163                                        filter_mask, NULL);
9164 }
9165
9166 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9167 {
9168         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9169         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9170         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9171         unsigned int limit;
9172         int pool, err;
9173
9174         /* Hardware has a limited number of available pools. Each VF, and the
9175          * PF require a pool. Check to ensure we don't attempt to use more
9176          * then the available number of pools.
9177          */
9178         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9179                 return ERR_PTR(-EINVAL);
9180
9181 #ifdef CONFIG_RPS
9182         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9183                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9184                             vdev->name);
9185                 return ERR_PTR(-EINVAL);
9186         }
9187 #endif
9188         /* Check for hardware restriction on number of rx/tx queues */
9189         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9190             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9191                 netdev_info(pdev,
9192                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9193                             pdev->name);
9194                 return ERR_PTR(-EINVAL);
9195         }
9196
9197         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9198               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9199             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9200                 return ERR_PTR(-EBUSY);
9201
9202         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9203         if (!fwd_adapter)
9204                 return ERR_PTR(-ENOMEM);
9205
9206         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9207         adapter->num_rx_pools++;
9208         set_bit(pool, &adapter->fwd_bitmask);
9209         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9210
9211         /* Enable VMDq flag so device will be set in VM mode */
9212         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9213         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9214         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9215
9216         /* Force reinit of ring allocation with VMDQ enabled */
9217         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9218         if (err)
9219                 goto fwd_add_err;
9220         fwd_adapter->pool = pool;
9221         fwd_adapter->real_adapter = adapter;
9222
9223         if (netif_running(pdev)) {
9224                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9225                 if (err)
9226                         goto fwd_add_err;
9227                 netif_tx_start_all_queues(vdev);
9228         }
9229
9230         return fwd_adapter;
9231 fwd_add_err:
9232         /* unwind counter and free adapter struct */
9233         netdev_info(pdev,
9234                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9235         clear_bit(pool, &adapter->fwd_bitmask);
9236         adapter->num_rx_pools--;
9237         kfree(fwd_adapter);
9238         return ERR_PTR(err);
9239 }
9240
9241 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9242 {
9243         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9244         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9245         unsigned int limit;
9246
9247         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9248         adapter->num_rx_pools--;
9249
9250         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9251         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9252         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9253         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9254         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9255                    fwd_adapter->pool, adapter->num_rx_pools,
9256                    fwd_adapter->rx_base_queue,
9257                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9258                    adapter->fwd_bitmask);
9259         kfree(fwd_adapter);
9260 }
9261
9262 #define IXGBE_MAX_MAC_HDR_LEN           127
9263 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9264
9265 static netdev_features_t
9266 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9267                      netdev_features_t features)
9268 {
9269         unsigned int network_hdr_len, mac_hdr_len;
9270
9271         /* Make certain the headers can be described by a context descriptor */
9272         mac_hdr_len = skb_network_header(skb) - skb->data;
9273         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9274                 return features & ~(NETIF_F_HW_CSUM |
9275                                     NETIF_F_SCTP_CRC |
9276                                     NETIF_F_HW_VLAN_CTAG_TX |
9277                                     NETIF_F_TSO |
9278                                     NETIF_F_TSO6);
9279
9280         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9281         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9282                 return features & ~(NETIF_F_HW_CSUM |
9283                                     NETIF_F_SCTP_CRC |
9284                                     NETIF_F_TSO |
9285                                     NETIF_F_TSO6);
9286
9287         /* We can only support IPV4 TSO in tunnels if we can mangle the
9288          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9289          */
9290         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9291                 features &= ~NETIF_F_TSO;
9292
9293         return features;
9294 }
9295
9296 static const struct net_device_ops ixgbe_netdev_ops = {
9297         .ndo_open               = ixgbe_open,
9298         .ndo_stop               = ixgbe_close,
9299         .ndo_start_xmit         = ixgbe_xmit_frame,
9300         .ndo_select_queue       = ixgbe_select_queue,
9301         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9302         .ndo_validate_addr      = eth_validate_addr,
9303         .ndo_set_mac_address    = ixgbe_set_mac,
9304         .ndo_change_mtu         = ixgbe_change_mtu,
9305         .ndo_tx_timeout         = ixgbe_tx_timeout,
9306         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9307         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9308         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9309         .ndo_do_ioctl           = ixgbe_ioctl,
9310         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9311         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9312         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9313         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9314         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9315         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9316         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9317         .ndo_get_stats64        = ixgbe_get_stats64,
9318         .ndo_setup_tc           = __ixgbe_setup_tc,
9319 #ifdef CONFIG_NET_POLL_CONTROLLER
9320         .ndo_poll_controller    = ixgbe_netpoll,
9321 #endif
9322 #ifdef IXGBE_FCOE
9323         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9324         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9325         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9326         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9327         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9328         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9329         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9330 #endif /* IXGBE_FCOE */
9331         .ndo_set_features = ixgbe_set_features,
9332         .ndo_fix_features = ixgbe_fix_features,
9333         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9334         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9335         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9336         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9337         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9338         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9339         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
9340         .ndo_features_check     = ixgbe_features_check,
9341 };
9342
9343 /**
9344  * ixgbe_enumerate_functions - Get the number of ports this device has
9345  * @adapter: adapter structure
9346  *
9347  * This function enumerates the phsyical functions co-located on a single slot,
9348  * in order to determine how many ports a device has. This is most useful in
9349  * determining the required GT/s of PCIe bandwidth necessary for optimal
9350  * performance.
9351  **/
9352 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9353 {
9354         struct pci_dev *entry, *pdev = adapter->pdev;
9355         int physfns = 0;
9356
9357         /* Some cards can not use the generic count PCIe functions method,
9358          * because they are behind a parent switch, so we hardcode these with
9359          * the correct number of functions.
9360          */
9361         if (ixgbe_pcie_from_parent(&adapter->hw))
9362                 physfns = 4;
9363
9364         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9365                 /* don't count virtual functions */
9366                 if (entry->is_virtfn)
9367                         continue;
9368
9369                 /* When the devices on the bus don't all match our device ID,
9370                  * we can't reliably determine the correct number of
9371                  * functions. This can occur if a function has been direct
9372                  * attached to a virtual machine using VT-d, for example. In
9373                  * this case, simply return -1 to indicate this.
9374                  */
9375                 if ((entry->vendor != pdev->vendor) ||
9376                     (entry->device != pdev->device))
9377                         return -1;
9378
9379                 physfns++;
9380         }
9381
9382         return physfns;
9383 }
9384
9385 /**
9386  * ixgbe_wol_supported - Check whether device supports WoL
9387  * @adapter: the adapter private structure
9388  * @device_id: the device ID
9389  * @subdev_id: the subsystem device ID
9390  *
9391  * This function is used by probe and ethtool to determine
9392  * which devices have WoL support
9393  *
9394  **/
9395 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9396                          u16 subdevice_id)
9397 {
9398         struct ixgbe_hw *hw = &adapter->hw;
9399         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9400
9401         /* WOL not supported on 82598 */
9402         if (hw->mac.type == ixgbe_mac_82598EB)
9403                 return false;
9404
9405         /* check eeprom to see if WOL is enabled for X540 and newer */
9406         if (hw->mac.type >= ixgbe_mac_X540) {
9407                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9408                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9409                      (hw->bus.func == 0)))
9410                         return true;
9411         }
9412
9413         /* WOL is determined based on device IDs for 82599 MACs */
9414         switch (device_id) {
9415         case IXGBE_DEV_ID_82599_SFP:
9416                 /* Only these subdevices could supports WOL */
9417                 switch (subdevice_id) {
9418                 case IXGBE_SUBDEV_ID_82599_560FLR:
9419                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9420                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9421                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9422                         /* only support first port */
9423                         if (hw->bus.func != 0)
9424                                 break;
9425                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9426                 case IXGBE_SUBDEV_ID_82599_SFP:
9427                 case IXGBE_SUBDEV_ID_82599_RNDC:
9428                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9429                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9430                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9431                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9432                         return true;
9433                 }
9434                 break;
9435         case IXGBE_DEV_ID_82599EN_SFP:
9436                 /* Only these subdevices support WOL */
9437                 switch (subdevice_id) {
9438                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9439                         return true;
9440                 }
9441                 break;
9442         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9443                 /* All except this subdevice support WOL */
9444                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9445                         return true;
9446                 break;
9447         case IXGBE_DEV_ID_82599_KX4:
9448                 return  true;
9449         default:
9450                 break;
9451         }
9452
9453         return false;
9454 }
9455
9456 /**
9457  * ixgbe_probe - Device Initialization Routine
9458  * @pdev: PCI device information struct
9459  * @ent: entry in ixgbe_pci_tbl
9460  *
9461  * Returns 0 on success, negative on failure
9462  *
9463  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9464  * The OS initialization, configuring of the adapter private structure,
9465  * and a hardware reset occur.
9466  **/
9467 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9468 {
9469         struct net_device *netdev;
9470         struct ixgbe_adapter *adapter = NULL;
9471         struct ixgbe_hw *hw;
9472         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9473         int i, err, pci_using_dac, expected_gts;
9474         unsigned int indices = MAX_TX_QUEUES;
9475         u8 part_str[IXGBE_PBANUM_LENGTH];
9476         bool disable_dev = false;
9477 #ifdef IXGBE_FCOE
9478         u16 device_caps;
9479 #endif
9480         u32 eec;
9481
9482         /* Catch broken hardware that put the wrong VF device ID in
9483          * the PCIe SR-IOV capability.
9484          */
9485         if (pdev->is_virtfn) {
9486                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9487                      pci_name(pdev), pdev->vendor, pdev->device);
9488                 return -EINVAL;
9489         }
9490
9491         err = pci_enable_device_mem(pdev);
9492         if (err)
9493                 return err;
9494
9495         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9496                 pci_using_dac = 1;
9497         } else {
9498                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9499                 if (err) {
9500                         dev_err(&pdev->dev,
9501                                 "No usable DMA configuration, aborting\n");
9502                         goto err_dma;
9503                 }
9504                 pci_using_dac = 0;
9505         }
9506
9507         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9508         if (err) {
9509                 dev_err(&pdev->dev,
9510                         "pci_request_selected_regions failed 0x%x\n", err);
9511                 goto err_pci_reg;
9512         }
9513
9514         pci_enable_pcie_error_reporting(pdev);
9515
9516         pci_set_master(pdev);
9517         pci_save_state(pdev);
9518
9519         if (ii->mac == ixgbe_mac_82598EB) {
9520 #ifdef CONFIG_IXGBE_DCB
9521                 /* 8 TC w/ 4 queues per TC */
9522                 indices = 4 * MAX_TRAFFIC_CLASS;
9523 #else
9524                 indices = IXGBE_MAX_RSS_INDICES;
9525 #endif
9526         }
9527
9528         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9529         if (!netdev) {
9530                 err = -ENOMEM;
9531                 goto err_alloc_etherdev;
9532         }
9533
9534         SET_NETDEV_DEV(netdev, &pdev->dev);
9535
9536         adapter = netdev_priv(netdev);
9537
9538         adapter->netdev = netdev;
9539         adapter->pdev = pdev;
9540         hw = &adapter->hw;
9541         hw->back = adapter;
9542         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9543
9544         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9545                               pci_resource_len(pdev, 0));
9546         adapter->io_addr = hw->hw_addr;
9547         if (!hw->hw_addr) {
9548                 err = -EIO;
9549                 goto err_ioremap;
9550         }
9551
9552         netdev->netdev_ops = &ixgbe_netdev_ops;
9553         ixgbe_set_ethtool_ops(netdev);
9554         netdev->watchdog_timeo = 5 * HZ;
9555         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9556
9557         /* Setup hw api */
9558         hw->mac.ops   = *ii->mac_ops;
9559         hw->mac.type  = ii->mac;
9560         hw->mvals     = ii->mvals;
9561         if (ii->link_ops)
9562                 hw->link.ops  = *ii->link_ops;
9563
9564         /* EEPROM */
9565         hw->eeprom.ops = *ii->eeprom_ops;
9566         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9567         if (ixgbe_removed(hw->hw_addr)) {
9568                 err = -EIO;
9569                 goto err_ioremap;
9570         }
9571         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9572         if (!(eec & BIT(8)))
9573                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9574
9575         /* PHY */
9576         hw->phy.ops = *ii->phy_ops;
9577         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9578         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9579         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9580         hw->phy.mdio.mmds = 0;
9581         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9582         hw->phy.mdio.dev = netdev;
9583         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9584         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9585
9586         /* setup the private structure */
9587         err = ixgbe_sw_init(adapter, ii);
9588         if (err)
9589                 goto err_sw_init;
9590
9591         /* Make sure the SWFW semaphore is in a valid state */
9592         if (hw->mac.ops.init_swfw_sync)
9593                 hw->mac.ops.init_swfw_sync(hw);
9594
9595         /* Make it possible the adapter to be woken up via WOL */
9596         switch (adapter->hw.mac.type) {
9597         case ixgbe_mac_82599EB:
9598         case ixgbe_mac_X540:
9599         case ixgbe_mac_X550:
9600         case ixgbe_mac_X550EM_x:
9601         case ixgbe_mac_x550em_a:
9602                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9603                 break;
9604         default:
9605                 break;
9606         }
9607
9608         /*
9609          * If there is a fan on this device and it has failed log the
9610          * failure.
9611          */
9612         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9613                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9614                 if (esdp & IXGBE_ESDP_SDP1)
9615                         e_crit(probe, "Fan has stopped, replace the adapter\n");
9616         }
9617
9618         if (allow_unsupported_sfp)
9619                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9620
9621         /* reset_hw fills in the perm_addr as well */
9622         hw->phy.reset_if_overtemp = true;
9623         err = hw->mac.ops.reset_hw(hw);
9624         hw->phy.reset_if_overtemp = false;
9625         ixgbe_set_eee_capable(adapter);
9626         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9627                 err = 0;
9628         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9629                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9630                 e_dev_err("Reload the driver after installing a supported module.\n");
9631                 goto err_sw_init;
9632         } else if (err) {
9633                 e_dev_err("HW Init failed: %d\n", err);
9634                 goto err_sw_init;
9635         }
9636
9637 #ifdef CONFIG_PCI_IOV
9638         /* SR-IOV not supported on the 82598 */
9639         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9640                 goto skip_sriov;
9641         /* Mailbox */
9642         ixgbe_init_mbx_params_pf(hw);
9643         hw->mbx.ops = ii->mbx_ops;
9644         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9645         ixgbe_enable_sriov(adapter);
9646 skip_sriov:
9647
9648 #endif
9649         netdev->features = NETIF_F_SG |
9650                            NETIF_F_TSO |
9651                            NETIF_F_TSO6 |
9652                            NETIF_F_RXHASH |
9653                            NETIF_F_RXCSUM |
9654                            NETIF_F_HW_CSUM;
9655
9656 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9657                                     NETIF_F_GSO_GRE_CSUM | \
9658                                     NETIF_F_GSO_IPXIP4 | \
9659                                     NETIF_F_GSO_IPXIP6 | \
9660                                     NETIF_F_GSO_UDP_TUNNEL | \
9661                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
9662
9663         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9664         netdev->features |= NETIF_F_GSO_PARTIAL |
9665                             IXGBE_GSO_PARTIAL_FEATURES;
9666
9667         if (hw->mac.type >= ixgbe_mac_82599EB)
9668                 netdev->features |= NETIF_F_SCTP_CRC;
9669
9670         /* copy netdev features into list of user selectable features */
9671         netdev->hw_features |= netdev->features |
9672                                NETIF_F_HW_VLAN_CTAG_FILTER |
9673                                NETIF_F_HW_VLAN_CTAG_RX |
9674                                NETIF_F_HW_VLAN_CTAG_TX |
9675                                NETIF_F_RXALL |
9676                                NETIF_F_HW_L2FW_DOFFLOAD;
9677
9678         if (hw->mac.type >= ixgbe_mac_82599EB)
9679                 netdev->hw_features |= NETIF_F_NTUPLE |
9680                                        NETIF_F_HW_TC;
9681
9682         if (pci_using_dac)
9683                 netdev->features |= NETIF_F_HIGHDMA;
9684
9685         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9686         netdev->hw_enc_features |= netdev->vlan_features;
9687         netdev->mpls_features |= NETIF_F_HW_CSUM;
9688
9689         /* set this bit last since it cannot be part of vlan_features */
9690         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9691                             NETIF_F_HW_VLAN_CTAG_RX |
9692                             NETIF_F_HW_VLAN_CTAG_TX;
9693
9694         netdev->priv_flags |= IFF_UNICAST_FLT;
9695         netdev->priv_flags |= IFF_SUPP_NOFCS;
9696
9697         /* MTU range: 68 - 9710 */
9698         netdev->min_mtu = ETH_MIN_MTU;
9699         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
9700
9701 #ifdef CONFIG_IXGBE_DCB
9702         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9703                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
9704 #endif
9705
9706 #ifdef IXGBE_FCOE
9707         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9708                 unsigned int fcoe_l;
9709
9710                 if (hw->mac.ops.get_device_caps) {
9711                         hw->mac.ops.get_device_caps(hw, &device_caps);
9712                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9713                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9714                 }
9715
9716
9717                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9718                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9719
9720                 netdev->features |= NETIF_F_FSO |
9721                                     NETIF_F_FCOE_CRC;
9722
9723                 netdev->vlan_features |= NETIF_F_FSO |
9724                                          NETIF_F_FCOE_CRC |
9725                                          NETIF_F_FCOE_MTU;
9726         }
9727 #endif /* IXGBE_FCOE */
9728
9729         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9730                 netdev->hw_features |= NETIF_F_LRO;
9731         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9732                 netdev->features |= NETIF_F_LRO;
9733
9734         /* make sure the EEPROM is good */
9735         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9736                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9737                 err = -EIO;
9738                 goto err_sw_init;
9739         }
9740
9741         eth_platform_get_mac_address(&adapter->pdev->dev,
9742                                      adapter->hw.mac.perm_addr);
9743
9744         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9745
9746         if (!is_valid_ether_addr(netdev->dev_addr)) {
9747                 e_dev_err("invalid MAC address\n");
9748                 err = -EIO;
9749                 goto err_sw_init;
9750         }
9751
9752         /* Set hw->mac.addr to permanent MAC address */
9753         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9754         ixgbe_mac_set_default_filter(adapter);
9755
9756         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9757                     (unsigned long) adapter);
9758
9759         if (ixgbe_removed(hw->hw_addr)) {
9760                 err = -EIO;
9761                 goto err_sw_init;
9762         }
9763         INIT_WORK(&adapter->service_task, ixgbe_service_task);
9764         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9765         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9766
9767         err = ixgbe_init_interrupt_scheme(adapter);
9768         if (err)
9769                 goto err_sw_init;
9770
9771         /* WOL not supported for all devices */
9772         adapter->wol = 0;
9773         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9774         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9775                                                 pdev->subsystem_device);
9776         if (hw->wol_enabled)
9777                 adapter->wol = IXGBE_WUFC_MAG;
9778
9779         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9780
9781         /* save off EEPROM version number */
9782         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9783         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9784
9785         /* pick up the PCI bus settings for reporting later */
9786         if (ixgbe_pcie_from_parent(hw))
9787                 ixgbe_get_parent_bus_info(adapter);
9788         else
9789                  hw->mac.ops.get_bus_info(hw);
9790
9791         /* calculate the expected PCIe bandwidth required for optimal
9792          * performance. Note that some older parts will never have enough
9793          * bandwidth due to being older generation PCIe parts. We clamp these
9794          * parts to ensure no warning is displayed if it can't be fixed.
9795          */
9796         switch (hw->mac.type) {
9797         case ixgbe_mac_82598EB:
9798                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9799                 break;
9800         default:
9801                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9802                 break;
9803         }
9804
9805         /* don't check link if we failed to enumerate functions */
9806         if (expected_gts > 0)
9807                 ixgbe_check_minimum_link(adapter, expected_gts);
9808
9809         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9810         if (err)
9811                 strlcpy(part_str, "Unknown", sizeof(part_str));
9812         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9813                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9814                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9815                            part_str);
9816         else
9817                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9818                            hw->mac.type, hw->phy.type, part_str);
9819
9820         e_dev_info("%pM\n", netdev->dev_addr);
9821
9822         /* reset the hardware with the new settings */
9823         err = hw->mac.ops.start_hw(hw);
9824         if (err == IXGBE_ERR_EEPROM_VERSION) {
9825                 /* We are running on a pre-production device, log a warning */
9826                 e_dev_warn("This device is a pre-production adapter/LOM. "
9827                            "Please be aware there may be issues associated "
9828                            "with your hardware.  If you are experiencing "
9829                            "problems please contact your Intel or hardware "
9830                            "representative who provided you with this "
9831                            "hardware.\n");
9832         }
9833         strcpy(netdev->name, "eth%d");
9834         err = register_netdev(netdev);
9835         if (err)
9836                 goto err_register;
9837
9838         pci_set_drvdata(pdev, adapter);
9839
9840         /* power down the optics for 82599 SFP+ fiber */
9841         if (hw->mac.ops.disable_tx_laser)
9842                 hw->mac.ops.disable_tx_laser(hw);
9843
9844         /* carrier off reporting is important to ethtool even BEFORE open */
9845         netif_carrier_off(netdev);
9846
9847 #ifdef CONFIG_IXGBE_DCA
9848         if (dca_add_requester(&pdev->dev) == 0) {
9849                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9850                 ixgbe_setup_dca(adapter);
9851         }
9852 #endif
9853         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9854                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9855                 for (i = 0; i < adapter->num_vfs; i++)
9856                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
9857         }
9858
9859         /* firmware requires driver version to be 0xFFFFFFFF
9860          * since os does not support feature
9861          */
9862         if (hw->mac.ops.set_fw_drv_ver)
9863                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
9864                                            sizeof(ixgbe_driver_version) - 1,
9865                                            ixgbe_driver_version);
9866
9867         /* add san mac addr to netdev */
9868         ixgbe_add_sanmac_netdev(netdev);
9869
9870         e_dev_info("%s\n", ixgbe_default_device_descr);
9871
9872 #ifdef CONFIG_IXGBE_HWMON
9873         if (ixgbe_sysfs_init(adapter))
9874                 e_err(probe, "failed to allocate sysfs resources\n");
9875 #endif /* CONFIG_IXGBE_HWMON */
9876
9877         ixgbe_dbg_adapter_init(adapter);
9878
9879         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9880         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9881                 hw->mac.ops.setup_link(hw,
9882                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9883                         true);
9884
9885         return 0;
9886
9887 err_register:
9888         ixgbe_release_hw_control(adapter);
9889         ixgbe_clear_interrupt_scheme(adapter);
9890 err_sw_init:
9891         ixgbe_disable_sriov(adapter);
9892         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9893         iounmap(adapter->io_addr);
9894         kfree(adapter->jump_tables[0]);
9895         kfree(adapter->mac_table);
9896 err_ioremap:
9897         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9898         free_netdev(netdev);
9899 err_alloc_etherdev:
9900         pci_release_mem_regions(pdev);
9901 err_pci_reg:
9902 err_dma:
9903         if (!adapter || disable_dev)
9904                 pci_disable_device(pdev);
9905         return err;
9906 }
9907
9908 /**
9909  * ixgbe_remove - Device Removal Routine
9910  * @pdev: PCI device information struct
9911  *
9912  * ixgbe_remove is called by the PCI subsystem to alert the driver
9913  * that it should release a PCI device.  The could be caused by a
9914  * Hot-Plug event, or because the driver is going to be removed from
9915  * memory.
9916  **/
9917 static void ixgbe_remove(struct pci_dev *pdev)
9918 {
9919         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9920         struct net_device *netdev;
9921         bool disable_dev;
9922         int i;
9923
9924         /* if !adapter then we already cleaned up in probe */
9925         if (!adapter)
9926                 return;
9927
9928         netdev  = adapter->netdev;
9929         ixgbe_dbg_adapter_exit(adapter);
9930
9931         set_bit(__IXGBE_REMOVING, &adapter->state);
9932         cancel_work_sync(&adapter->service_task);
9933
9934
9935 #ifdef CONFIG_IXGBE_DCA
9936         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9937                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9938                 dca_remove_requester(&pdev->dev);
9939                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9940                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9941         }
9942
9943 #endif
9944 #ifdef CONFIG_IXGBE_HWMON
9945         ixgbe_sysfs_exit(adapter);
9946 #endif /* CONFIG_IXGBE_HWMON */
9947
9948         /* remove the added san mac */
9949         ixgbe_del_sanmac_netdev(netdev);
9950
9951 #ifdef CONFIG_PCI_IOV
9952         ixgbe_disable_sriov(adapter);
9953 #endif
9954         if (netdev->reg_state == NETREG_REGISTERED)
9955                 unregister_netdev(netdev);
9956
9957         ixgbe_clear_interrupt_scheme(adapter);
9958
9959         ixgbe_release_hw_control(adapter);
9960
9961 #ifdef CONFIG_DCB
9962         kfree(adapter->ixgbe_ieee_pfc);
9963         kfree(adapter->ixgbe_ieee_ets);
9964
9965 #endif
9966         iounmap(adapter->io_addr);
9967         pci_release_mem_regions(pdev);
9968
9969         e_dev_info("complete\n");
9970
9971         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
9972                 if (adapter->jump_tables[i]) {
9973                         kfree(adapter->jump_tables[i]->input);
9974                         kfree(adapter->jump_tables[i]->mask);
9975                 }
9976                 kfree(adapter->jump_tables[i]);
9977         }
9978
9979         kfree(adapter->mac_table);
9980         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9981         free_netdev(netdev);
9982
9983         pci_disable_pcie_error_reporting(pdev);
9984
9985         if (disable_dev)
9986                 pci_disable_device(pdev);
9987 }
9988
9989 /**
9990  * ixgbe_io_error_detected - called when PCI error is detected
9991  * @pdev: Pointer to PCI device
9992  * @state: The current pci connection state
9993  *
9994  * This function is called after a PCI bus error affecting
9995  * this device has been detected.
9996  */
9997 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9998                                                 pci_channel_state_t state)
9999 {
10000         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10001         struct net_device *netdev = adapter->netdev;
10002
10003 #ifdef CONFIG_PCI_IOV
10004         struct ixgbe_hw *hw = &adapter->hw;
10005         struct pci_dev *bdev, *vfdev;
10006         u32 dw0, dw1, dw2, dw3;
10007         int vf, pos;
10008         u16 req_id, pf_func;
10009
10010         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10011             adapter->num_vfs == 0)
10012                 goto skip_bad_vf_detection;
10013
10014         bdev = pdev->bus->self;
10015         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10016                 bdev = bdev->bus->self;
10017
10018         if (!bdev)
10019                 goto skip_bad_vf_detection;
10020
10021         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10022         if (!pos)
10023                 goto skip_bad_vf_detection;
10024
10025         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10026         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10027         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10028         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10029         if (ixgbe_removed(hw->hw_addr))
10030                 goto skip_bad_vf_detection;
10031
10032         req_id = dw1 >> 16;
10033         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10034         if (!(req_id & 0x0080))
10035                 goto skip_bad_vf_detection;
10036
10037         pf_func = req_id & 0x01;
10038         if ((pf_func & 1) == (pdev->devfn & 1)) {
10039                 unsigned int device_id;
10040
10041                 vf = (req_id & 0x7F) >> 1;
10042                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10043                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10044                                 "%8.8x\tdw3: %8.8x\n",
10045                 dw0, dw1, dw2, dw3);
10046                 switch (adapter->hw.mac.type) {
10047                 case ixgbe_mac_82599EB:
10048                         device_id = IXGBE_82599_VF_DEVICE_ID;
10049                         break;
10050                 case ixgbe_mac_X540:
10051                         device_id = IXGBE_X540_VF_DEVICE_ID;
10052                         break;
10053                 case ixgbe_mac_X550:
10054                         device_id = IXGBE_DEV_ID_X550_VF;
10055                         break;
10056                 case ixgbe_mac_X550EM_x:
10057                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10058                         break;
10059                 case ixgbe_mac_x550em_a:
10060                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10061                         break;
10062                 default:
10063                         device_id = 0;
10064                         break;
10065                 }
10066
10067                 /* Find the pci device of the offending VF */
10068                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10069                 while (vfdev) {
10070                         if (vfdev->devfn == (req_id & 0xFF))
10071                                 break;
10072                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10073                                                device_id, vfdev);
10074                 }
10075                 /*
10076                  * There's a slim chance the VF could have been hot plugged,
10077                  * so if it is no longer present we don't need to issue the
10078                  * VFLR.  Just clean up the AER in that case.
10079                  */
10080                 if (vfdev) {
10081                         ixgbe_issue_vf_flr(adapter, vfdev);
10082                         /* Free device reference count */
10083                         pci_dev_put(vfdev);
10084                 }
10085
10086                 pci_cleanup_aer_uncorrect_error_status(pdev);
10087         }
10088
10089         /*
10090          * Even though the error may have occurred on the other port
10091          * we still need to increment the vf error reference count for
10092          * both ports because the I/O resume function will be called
10093          * for both of them.
10094          */
10095         adapter->vferr_refcount++;
10096
10097         return PCI_ERS_RESULT_RECOVERED;
10098
10099 skip_bad_vf_detection:
10100 #endif /* CONFIG_PCI_IOV */
10101         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10102                 return PCI_ERS_RESULT_DISCONNECT;
10103
10104         rtnl_lock();
10105         netif_device_detach(netdev);
10106
10107         if (state == pci_channel_io_perm_failure) {
10108                 rtnl_unlock();
10109                 return PCI_ERS_RESULT_DISCONNECT;
10110         }
10111
10112         if (netif_running(netdev))
10113                 ixgbe_close_suspend(adapter);
10114
10115         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10116                 pci_disable_device(pdev);
10117         rtnl_unlock();
10118
10119         /* Request a slot reset. */
10120         return PCI_ERS_RESULT_NEED_RESET;
10121 }
10122
10123 /**
10124  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10125  * @pdev: Pointer to PCI device
10126  *
10127  * Restart the card from scratch, as if from a cold-boot.
10128  */
10129 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10130 {
10131         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10132         pci_ers_result_t result;
10133         int err;
10134
10135         if (pci_enable_device_mem(pdev)) {
10136                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10137                 result = PCI_ERS_RESULT_DISCONNECT;
10138         } else {
10139                 smp_mb__before_atomic();
10140                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10141                 adapter->hw.hw_addr = adapter->io_addr;
10142                 pci_set_master(pdev);
10143                 pci_restore_state(pdev);
10144                 pci_save_state(pdev);
10145
10146                 pci_wake_from_d3(pdev, false);
10147
10148                 ixgbe_reset(adapter);
10149                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10150                 result = PCI_ERS_RESULT_RECOVERED;
10151         }
10152
10153         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10154         if (err) {
10155                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10156                           "failed 0x%0x\n", err);
10157                 /* non-fatal, continue */
10158         }
10159
10160         return result;
10161 }
10162
10163 /**
10164  * ixgbe_io_resume - called when traffic can start flowing again.
10165  * @pdev: Pointer to PCI device
10166  *
10167  * This callback is called when the error recovery driver tells us that
10168  * its OK to resume normal operation.
10169  */
10170 static void ixgbe_io_resume(struct pci_dev *pdev)
10171 {
10172         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10173         struct net_device *netdev = adapter->netdev;
10174
10175 #ifdef CONFIG_PCI_IOV
10176         if (adapter->vferr_refcount) {
10177                 e_info(drv, "Resuming after VF err\n");
10178                 adapter->vferr_refcount--;
10179                 return;
10180         }
10181
10182 #endif
10183         rtnl_lock();
10184         if (netif_running(netdev))
10185                 ixgbe_open(netdev);
10186
10187         netif_device_attach(netdev);
10188         rtnl_unlock();
10189 }
10190
10191 static const struct pci_error_handlers ixgbe_err_handler = {
10192         .error_detected = ixgbe_io_error_detected,
10193         .slot_reset = ixgbe_io_slot_reset,
10194         .resume = ixgbe_io_resume,
10195 };
10196
10197 static struct pci_driver ixgbe_driver = {
10198         .name     = ixgbe_driver_name,
10199         .id_table = ixgbe_pci_tbl,
10200         .probe    = ixgbe_probe,
10201         .remove   = ixgbe_remove,
10202 #ifdef CONFIG_PM
10203         .suspend  = ixgbe_suspend,
10204         .resume   = ixgbe_resume,
10205 #endif
10206         .shutdown = ixgbe_shutdown,
10207         .sriov_configure = ixgbe_pci_sriov_configure,
10208         .err_handler = &ixgbe_err_handler
10209 };
10210
10211 /**
10212  * ixgbe_init_module - Driver Registration Routine
10213  *
10214  * ixgbe_init_module is the first routine called when the driver is
10215  * loaded. All it does is register with the PCI subsystem.
10216  **/
10217 static int __init ixgbe_init_module(void)
10218 {
10219         int ret;
10220         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10221         pr_info("%s\n", ixgbe_copyright);
10222
10223         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10224         if (!ixgbe_wq) {
10225                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10226                 return -ENOMEM;
10227         }
10228
10229         ixgbe_dbg_init();
10230
10231         ret = pci_register_driver(&ixgbe_driver);
10232         if (ret) {
10233                 destroy_workqueue(ixgbe_wq);
10234                 ixgbe_dbg_exit();
10235                 return ret;
10236         }
10237
10238 #ifdef CONFIG_IXGBE_DCA
10239         dca_register_notify(&dca_notifier);
10240 #endif
10241
10242         return 0;
10243 }
10244
10245 module_init(ixgbe_init_module);
10246
10247 /**
10248  * ixgbe_exit_module - Driver Exit Cleanup Routine
10249  *
10250  * ixgbe_exit_module is called just before the driver is removed
10251  * from memory.
10252  **/
10253 static void __exit ixgbe_exit_module(void)
10254 {
10255 #ifdef CONFIG_IXGBE_DCA
10256         dca_unregister_notify(&dca_notifier);
10257 #endif
10258         pci_unregister_driver(&ixgbe_driver);
10259
10260         ixgbe_dbg_exit();
10261         if (ixgbe_wq) {
10262                 destroy_workqueue(ixgbe_wq);
10263                 ixgbe_wq = NULL;
10264         }
10265 }
10266
10267 #ifdef CONFIG_IXGBE_DCA
10268 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10269                             void *p)
10270 {
10271         int ret_val;
10272
10273         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10274                                          __ixgbe_notify_dca);
10275
10276         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10277 }
10278
10279 #endif /* CONFIG_IXGBE_DCA */
10280
10281 module_exit(ixgbe_exit_module);
10282
10283 /* ixgbe_main.c */