2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
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15 * copyright notice, this list of conditions and the following
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19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/cq.h>
35 #include <linux/mlx4/qp.h>
36 #include <linux/mlx4/cmd.h>
40 static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event)
46 int mlx4_en_create_cq(struct mlx4_en_priv *priv,
47 struct mlx4_en_cq **pcq,
48 int entries, int ring, enum cq_type mode,
51 struct mlx4_en_dev *mdev = priv->mdev;
52 struct mlx4_en_cq *cq;
55 cq = kzalloc_node(sizeof(*cq), GFP_KERNEL, node);
57 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
59 en_err(priv, "Failed to allocate CQ structure\n");
65 cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
69 cq->vector = mdev->dev->caps.num_comp_vectors;
71 /* Allocate HW buffers on provided NUMA node.
72 * dev->numa_node is used in mtt range allocation flow.
74 set_dev_node(&mdev->dev->persist->pdev->dev, node);
75 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres,
76 cq->buf_size, 2 * PAGE_SIZE);
77 set_dev_node(&mdev->dev->persist->pdev->dev, mdev->dev->numa_node);
81 err = mlx4_en_map_buffer(&cq->wqres.buf);
85 cq->buf = (struct mlx4_cqe *)cq->wqres.buf.direct.buf;
91 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
98 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
101 struct mlx4_en_dev *mdev = priv->mdev;
104 int timestamp_en = 0;
105 bool assigned_eq = false;
107 cq->dev = mdev->pndev[priv->port];
108 cq->mcq.set_ci_db = cq->wqres.db.db;
109 cq->mcq.arm_db = cq->wqres.db.db + 1;
110 *cq->mcq.set_ci_db = 0;
112 memset(cq->buf, 0, cq->buf_size);
114 if (cq->is_tx == RX) {
115 if (!mlx4_is_eq_vector_valid(mdev->dev, priv->port,
117 cq->vector = cpumask_first(priv->rx_ring[cq->ring]->affinity_mask);
119 err = mlx4_assign_eq(mdev->dev, priv->port,
122 mlx4_err(mdev, "Failed assigning an EQ to %s\n",
131 irq_to_desc(mlx4_eq_get_irq(mdev->dev,
134 /* For TX we use the same irq per
135 ring we assigned for the RX */
136 struct mlx4_en_cq *rx_cq;
138 cq_idx = cq_idx % priv->rx_ring_num;
139 rx_cq = priv->rx_cq[cq_idx];
140 cq->vector = rx_cq->vector;
144 cq->size = priv->rx_ring[cq->ring]->actual_size;
146 if ((cq->is_tx && priv->hwtstamp_config.tx_type) ||
147 (!cq->is_tx && priv->hwtstamp_config.rx_filter))
150 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
151 &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
152 cq->vector, 0, timestamp_en);
156 cq->mcq.comp = cq->is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq;
157 cq->mcq.event = mlx4_en_cq_event;
160 netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_tx_cq,
163 netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq, 64);
164 napi_hash_add(&cq->napi);
167 napi_enable(&cq->napi);
173 mlx4_release_eq(mdev->dev, cq->vector);
174 cq->vector = mdev->dev->caps.num_comp_vectors;
178 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq)
180 struct mlx4_en_dev *mdev = priv->mdev;
181 struct mlx4_en_cq *cq = *pcq;
183 mlx4_en_unmap_buffer(&cq->wqres.buf);
184 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
185 if (mlx4_is_eq_vector_valid(mdev->dev, priv->port, cq->vector) &&
187 mlx4_release_eq(priv->mdev->dev, cq->vector);
195 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
197 napi_disable(&cq->napi);
199 napi_hash_del(&cq->napi);
202 netif_napi_del(&cq->napi);
204 mlx4_cq_free(priv->mdev->dev, &cq->mcq);
207 /* Set rx cq moderation parameters */
208 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
210 return mlx4_cq_modify(priv->mdev->dev, &cq->mcq,
211 cq->moder_cnt, cq->moder_time);
214 int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
216 mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map,
217 &priv->mdev->uar_lock);