drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44
  45 #include <linux/mlx4/device.h>
  46 #include <linux/mlx4/doorbell.h>
  47
  48 #include "mlx4.h"
  49 #include "fw.h"
  50 #include "icm.h"
  51
  52 MODULE_AUTHOR("Roland Dreier");
  53 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  54 MODULE_LICENSE("Dual BSD/GPL");
  55 MODULE_VERSION(DRV_VERSION);
  56
  57 struct workqueue_struct *mlx4_wq;
  58
  59 #ifdef CONFIG_MLX4_DEBUG
  60
  61 int mlx4_debug_level = 0;
  62 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  63 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  64
  65 #endif /* CONFIG_MLX4_DEBUG */
  66
  67 #ifdef CONFIG_PCI_MSI
  68
  69 static int msi_x = 1;
  70 module_param(msi_x, int, 0444);
  71 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  72
  73 #else /* CONFIG_PCI_MSI */
  74
  75 #define msi_x (0)
  76
  77 #endif /* CONFIG_PCI_MSI */
  78
  79 static int num_vfs;
  80 module_param(num_vfs, int, 0444);
  81 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  82
  83 static int probe_vf;
  84 module_param(probe_vf, int, 0644);
  85 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  86
  87 int mlx4_log_num_mgm_entry_size = 10;
  88 module_param_named(log_num_mgm_entry_size,
  89                         mlx4_log_num_mgm_entry_size, int, 0444);
  90 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  91                                          " of qp per mcg, for example:"
  92                                          " 10 gives 248.range: 9<="
  93                                          " log_num_mgm_entry_size <= 12");
  94
  95 #define MLX4_VF                                        (1 << 0)
  96
  97 #define HCA_GLOBAL_CAP_MASK            0
  98 #define PF_CONTEXT_BEHAVIOUR_MASK      0
  99
 100 static char mlx4_version[] __devinitdata =
 101         DRV_NAME ": Mellanox ConnectX core driver v"
 102         DRV_VERSION " (" DRV_RELDATE ")\n";
 103
 104 static struct mlx4_profile default_profile = {
 105         .num_qp         = 1 << 18,
 106         .num_srq        = 1 << 16,
 107         .rdmarc_per_qp  = 1 << 4,
 108         .num_cq         = 1 << 16,
 109         .num_mcg        = 1 << 13,
 110         .num_mpt        = 1 << 19,
 111         .num_mtt        = 1 << 20, /* It is really num mtt segements */
 112 };
 113
 114 static int log_num_mac = 7;
 115 module_param_named(log_num_mac, log_num_mac, int, 0444);
 116 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 117
 118 static int log_num_vlan;
 119 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 120 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 121 /* Log2 max number of VLANs per ETH port (0-7) */
 122 #define MLX4_LOG_NUM_VLANS 7
 123
 124 static bool use_prio;
 125 module_param_named(use_prio, use_prio, bool, 0444);
 126 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 127                   "(0/1, default 0)");
 128
 129 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 130 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 131 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 132
 133 static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE};
 134 static int arr_argc = 2;
 135 module_param_array(port_type_array, int, &arr_argc, 0444);
 136 MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default "
 137                                 "1 for IB, 2 for Ethernet");
 138
 139 struct mlx4_port_config {
 140         struct list_head list;
 141         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 142         struct pci_dev *pdev;
 143 };
 144
 145 static inline int mlx4_master_get_num_eqs(struct mlx4_dev *dev)
 146 {
 147         return dev->caps.reserved_eqs +
 148                 MLX4_MFUNC_EQ_NUM * (dev->num_slaves + 1);
 149 }
 150
 151 int mlx4_check_port_params(struct mlx4_dev *dev,
 152                            enum mlx4_port_type *port_type)
 153 {
 154         int i;
 155
 156         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 157                 if (port_type[i] != port_type[i + 1]) {
 158                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 159                                 mlx4_err(dev, "Only same port types supported "
 160                                          "on this HCA, aborting.\n");
 161                                 return -EINVAL;
 162                         }
 163                         if (port_type[i] == MLX4_PORT_TYPE_ETH &&
 164                             port_type[i + 1] == MLX4_PORT_TYPE_IB)
 165                                 return -EINVAL;
 166                 }
 167         }
 168
 169         for (i = 0; i < dev->caps.num_ports; i++) {
 170                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 171                         mlx4_err(dev, "Requested port type for port %d is not "
 172                                       "supported on this HCA\n", i + 1);
 173                         return -EINVAL;
 174                 }
 175         }
 176         return 0;
 177 }
 178
 179 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 180 {
 181         int i;
 182
 183         for (i = 1; i <= dev->caps.num_ports; ++i)
 184                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 185 }
 186
 187 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 188 {
 189         int err;
 190         int i;
 191
 192         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 193         if (err) {
 194                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 195                 return err;
 196         }
 197
 198         if (dev_cap->min_page_sz > PAGE_SIZE) {
 199                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 200                          "kernel PAGE_SIZE of %ld, aborting.\n",
 201                          dev_cap->min_page_sz, PAGE_SIZE);
 202                 return -ENODEV;
 203         }
 204         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 205                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 206                          "aborting.\n",
 207                          dev_cap->num_ports, MLX4_MAX_PORTS);
 208                 return -ENODEV;
 209         }
 210
 211         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 212                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 213                          "PCI resource 2 size of 0x%llx, aborting.\n",
 214                          dev_cap->uar_size,
 215                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 216                 return -ENODEV;
 217         }
 218
 219         dev->caps.num_ports          = dev_cap->num_ports;
 220         for (i = 1; i <= dev->caps.num_ports; ++i) {
 221                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 222                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 223                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 224                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 225                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 226                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 227                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 228                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 229                 dev->caps.suggested_type[i] = dev_cap->suggested_type[i];
 230                 dev->caps.default_sense[i] = dev_cap->default_sense[i];
 231                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 232                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 233                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 234                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 235         }
 236
 237         dev->caps.uar_page_size      = PAGE_SIZE;
 238         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 239         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 240         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 241         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 242         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 243         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 244         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 245         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 246         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 247         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 248         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 249         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 250         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 251         dev->caps.num_qp_per_mgm     = mlx4_get_qp_per_mgm(dev);
 252         /*
 253          * Subtract 1 from the limit because we need to allocate a
 254          * spare CQE so the HCA HW can tell the difference between an
 255          * empty CQ and a full CQ.
 256          */
 257         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 258         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 259         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 260         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 261         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 262
 263         /* The first 128 UARs are used for EQ doorbells */
 264         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 265         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 266         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 267                                         dev_cap->reserved_xrcds : 0;
 268         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 269                                         dev_cap->max_xrcds : 0;
 270         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 271
 272         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 273         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 274         dev->caps.flags              = dev_cap->flags;
 275         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 276         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 277         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 278         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 279
 280         /* Sense port always allowed on supported devices for ConnectX1 and 2 */
 281         if (dev->pdev->device != 0x1003)
 282                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
 283
 284         dev->caps.log_num_macs  = log_num_mac;
 285         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 286         dev->caps.log_num_prios = use_prio ? 3 : 0;
 287
 288         for (i = 1; i <= dev->caps.num_ports; ++i) {
 289                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 290                 if (dev->caps.supported_type[i]) {
 291                         /* if only ETH is supported - assign ETH */
 292                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 293                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 294                         /* if only IB is supported,
 295                          * assign IB only if SRIOV is off*/
 296                         else if (dev->caps.supported_type[i] ==
 297                                  MLX4_PORT_TYPE_IB) {
 298                                 if (dev->flags & MLX4_FLAG_SRIOV)
 299                                         dev->caps.port_type[i] =
 300                                                 MLX4_PORT_TYPE_NONE;
 301                                 else
 302                                         dev->caps.port_type[i] =
 303                                                 MLX4_PORT_TYPE_IB;
 304                         /* if IB and ETH are supported,
 305                          * first of all check if SRIOV is on */
 306                         } else if (dev->flags & MLX4_FLAG_SRIOV)
 307                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 308                         else {
 309                                 /* In non-SRIOV mode, we set the port type
 310                                  * according to user selection of port type,
 311                                  * if usere selected none, take the FW hint */
 312                                 if (port_type_array[i-1] == MLX4_PORT_TYPE_NONE)
 313                                         dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
 314                                                 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
 315                                 else
 316                                         dev->caps.port_type[i] = port_type_array[i-1];
 317                         }
 318                 }
 319                 /*
 320                  * Link sensing is allowed on the port if 3 conditions are true:
 321                  * 1. Both protocols are supported on the port.
 322                  * 2. Different types are supported on the port
 323                  * 3. FW declared that it supports link sensing
 324                  */
 325                 mlx4_priv(dev)->sense.sense_allowed[i] =
 326                         ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
 327                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 328                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
 329
 330                 /*
 331                  * If "default_sense" bit is set, we move the port to "AUTO" mode
 332                  * and perform sense_port FW command to try and set the correct
 333                  * port type from beginning
 334                  */
 335                 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
 336                         enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE;
 337                         dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
 338                         mlx4_SENSE_PORT(dev, i, &sensed_port);
 339                         if (sensed_port != MLX4_PORT_TYPE_NONE)
 340                                 dev->caps.port_type[i] = sensed_port;
 341                 } else {
 342                         dev->caps.possible_type[i] = dev->caps.port_type[i];
 343                 }
 344
 345                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 346                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 347                         mlx4_warn(dev, "Requested number of MACs is too much "
 348                                   "for port %d, reducing to %d.\n",
 349                                   i, 1 << dev->caps.log_num_macs);
 350                 }
 351                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 352                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 353                         mlx4_warn(dev, "Requested number of VLANs is too much "
 354                                   "for port %d, reducing to %d.\n",
 355                                   i, 1 << dev->caps.log_num_vlans);
 356                 }
 357         }
 358
 359         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 360
 361         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 362         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 363                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 364                 (1 << dev->caps.log_num_macs) *
 365                 (1 << dev->caps.log_num_vlans) *
 366                 (1 << dev->caps.log_num_prios) *
 367                 dev->caps.num_ports;
 368         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 369
 370         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 371                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 372                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 373                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 374
 375         return 0;
 376 }
 377 /*The function checks if there are live vf, return the num of them*/
 378 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 379 {
 380         struct mlx4_priv *priv = mlx4_priv(dev);
 381         struct mlx4_slave_state *s_state;
 382         int i;
 383         int ret = 0;
 384
 385         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 386                 s_state = &priv->mfunc.master.slave_state[i];
 387                 if (s_state->active && s_state->last_cmd !=
 388                     MLX4_COMM_CMD_RESET) {
 389                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 390                                   __func__, i);
 391                         ret++;
 392                 }
 393         }
 394         return ret;
 395 }
 396
 397 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 398 {
 399         struct mlx4_priv *priv = mlx4_priv(dev);
 400         struct mlx4_slave_state *s_slave;
 401
 402         if (!mlx4_is_master(dev))
 403                 return 0;
 404
 405         s_slave = &priv->mfunc.master.slave_state[slave];
 406         return !!s_slave->active;
 407 }
 408 EXPORT_SYMBOL(mlx4_is_slave_active);
 409
 410 static int mlx4_slave_cap(struct mlx4_dev *dev)
 411 {
 412         int                        err;
 413         u32                        page_size;
 414         struct mlx4_dev_cap        dev_cap;
 415         struct mlx4_func_cap       func_cap;
 416         struct mlx4_init_hca_param hca_param;
 417         int                        i;
 418
 419         memset(&hca_param, 0, sizeof(hca_param));
 420         err = mlx4_QUERY_HCA(dev, &hca_param);
 421         if (err) {
 422                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 423                 return err;
 424         }
 425
 426         /*fail if the hca has an unknown capability */
 427         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 428             HCA_GLOBAL_CAP_MASK) {
 429                 mlx4_err(dev, "Unknown hca global capabilities\n");
 430                 return -ENOSYS;
 431         }
 432
 433         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 434
 435         memset(&dev_cap, 0, sizeof(dev_cap));
 436         err = mlx4_dev_cap(dev, &dev_cap);
 437         if (err) {
 438                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 439                 return err;
 440         }
 441
 442         page_size = ~dev->caps.page_size_cap + 1;
 443         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 444         if (page_size > PAGE_SIZE) {
 445                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 446                          "kernel PAGE_SIZE of %ld, aborting.\n",
 447                          page_size, PAGE_SIZE);
 448                 return -ENODEV;
 449         }
 450
 451         /* slave gets uar page size from QUERY_HCA fw command */
 452         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 453
 454         /* TODO: relax this assumption */
 455         if (dev->caps.uar_page_size != PAGE_SIZE) {
 456                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 457                          dev->caps.uar_page_size, PAGE_SIZE);
 458                 return -ENODEV;
 459         }
 460
 461         memset(&func_cap, 0, sizeof(func_cap));
 462         err = mlx4_QUERY_FUNC_CAP(dev, &func_cap);
 463         if (err) {
 464                 mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n");
 465                 return err;
 466         }
 467
 468         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 469             PF_CONTEXT_BEHAVIOUR_MASK) {
 470                 mlx4_err(dev, "Unknown pf context behaviour\n");
 471                 return -ENOSYS;
 472         }
 473
 474         dev->caps.num_ports             = func_cap.num_ports;
 475         dev->caps.num_qps               = func_cap.qp_quota;
 476         dev->caps.num_srqs              = func_cap.srq_quota;
 477         dev->caps.num_cqs               = func_cap.cq_quota;
 478         dev->caps.num_eqs               = func_cap.max_eq;
 479         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 480         dev->caps.num_mpts              = func_cap.mpt_quota;
 481         dev->caps.num_mtts              = func_cap.mtt_quota;
 482         dev->caps.num_pds               = MLX4_NUM_PDS;
 483         dev->caps.num_mgms              = 0;
 484         dev->caps.num_amgms             = 0;
 485
 486         for (i = 1; i <= dev->caps.num_ports; ++i)
 487                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 488
 489         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 490                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 491                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 492                 return -ENODEV;
 493         }
 494
 495         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 496                                        dev->caps.reserved_uars) >
 497                                        pci_resource_len(dev->pdev, 2)) {
 498                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 499                          "PCI resource 2 size of 0x%llx, aborting.\n",
 500                          dev->caps.uar_page_size * dev->caps.num_uars,
 501                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 502                 return -ENODEV;
 503         }
 504
 505 #if 0
 506         mlx4_warn(dev, "sqp_demux:%d\n", dev->caps.sqp_demux);
 507         mlx4_warn(dev, "num_uars:%d reserved_uars:%d uar region:0x%x bar2:0x%llx\n",
 508                   dev->caps.num_uars, dev->caps.reserved_uars,
 509                   dev->caps.uar_page_size * dev->caps.num_uars,
 510                   pci_resource_len(dev->pdev, 2));
 511         mlx4_warn(dev, "num_eqs:%d reserved_eqs:%d\n", dev->caps.num_eqs,
 512                   dev->caps.reserved_eqs);
 513         mlx4_warn(dev, "num_pds:%d reserved_pds:%d slave_pd_shift:%d pd_base:%d\n",
 514                   dev->caps.num_pds, dev->caps.reserved_pds,
 515                   dev->caps.slave_pd_shift, dev->caps.pd_base);
 516 #endif
 517         return 0;
 518 }
 519
 520 /*
 521  * Change the port configuration of the device.
 522  * Every user of this function must hold the port mutex.
 523  */
 524 int mlx4_change_port_types(struct mlx4_dev *dev,
 525                            enum mlx4_port_type *port_types)
 526 {
 527         int err = 0;
 528         int change = 0;
 529         int port;
 530
 531         for (port = 0; port <  dev->caps.num_ports; port++) {
 532                 /* Change the port type only if the new type is different
 533                  * from the current, and not set to Auto */
 534                 if (port_types[port] != dev->caps.port_type[port + 1])
 535                         change = 1;
 536         }
 537         if (change) {
 538                 mlx4_unregister_device(dev);
 539                 for (port = 1; port <= dev->caps.num_ports; port++) {
 540                         mlx4_CLOSE_PORT(dev, port);
 541                         dev->caps.port_type[port] = port_types[port - 1];
 542                         err = mlx4_SET_PORT(dev, port);
 543                         if (err) {
 544                                 mlx4_err(dev, "Failed to set port %d, "
 545                                               "aborting\n", port);
 546                                 goto out;
 547                         }
 548                 }
 549                 mlx4_set_port_mask(dev);
 550                 err = mlx4_register_device(dev);
 551         }
 552
 553 out:
 554         return err;
 555 }
 556
 557 static ssize_t show_port_type(struct device *dev,
 558                               struct device_attribute *attr,
 559                               char *buf)
 560 {
 561         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 562                                                    port_attr);
 563         struct mlx4_dev *mdev = info->dev;
 564         char type[8];
 565
 566         sprintf(type, "%s",
 567                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 568                 "ib" : "eth");
 569         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 570                 sprintf(buf, "auto (%s)\n", type);
 571         else
 572                 sprintf(buf, "%s\n", type);
 573
 574         return strlen(buf);
 575 }
 576
 577 static ssize_t set_port_type(struct device *dev,
 578                              struct device_attribute *attr,
 579                              const char *buf, size_t count)
 580 {
 581         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 582                                                    port_attr);
 583         struct mlx4_dev *mdev = info->dev;
 584         struct mlx4_priv *priv = mlx4_priv(mdev);
 585         enum mlx4_port_type types[MLX4_MAX_PORTS];
 586         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 587         int i;
 588         int err = 0;
 589
 590         if (!strcmp(buf, "ib\n"))
 591                 info->tmp_type = MLX4_PORT_TYPE_IB;
 592         else if (!strcmp(buf, "eth\n"))
 593                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 594         else if (!strcmp(buf, "auto\n"))
 595                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 596         else {
 597                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 598                 return -EINVAL;
 599         }
 600
 601         mlx4_stop_sense(mdev);
 602         mutex_lock(&priv->port_mutex);
 603         /* Possible type is always the one that was delivered */
 604         mdev->caps.possible_type[info->port] = info->tmp_type;
 605
 606         for (i = 0; i < mdev->caps.num_ports; i++) {
 607                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 608                                         mdev->caps.possible_type[i+1];
 609                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 610                         types[i] = mdev->caps.port_type[i+1];
 611         }
 612
 613         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 614             !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) {
 615                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 616                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 617                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 618                                 err = -EINVAL;
 619                         }
 620                 }
 621         }
 622         if (err) {
 623                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 624                                "Set only 'eth' or 'ib' for both ports "
 625                                "(should be the same)\n");
 626                 goto out;
 627         }
 628
 629         mlx4_do_sense_ports(mdev, new_types, types);
 630
 631         err = mlx4_check_port_params(mdev, new_types);
 632         if (err)
 633                 goto out;
 634
 635         /* We are about to apply the changes after the configuration
 636          * was verified, no need to remember the temporary types
 637          * any more */
 638         for (i = 0; i < mdev->caps.num_ports; i++)
 639                 priv->port[i + 1].tmp_type = 0;
 640
 641         err = mlx4_change_port_types(mdev, new_types);
 642
 643 out:
 644         mlx4_start_sense(mdev);
 645         mutex_unlock(&priv->port_mutex);
 646         return err ? err : count;
 647 }
 648
 649 enum ibta_mtu {
 650         IB_MTU_256  = 1,
 651         IB_MTU_512  = 2,
 652         IB_MTU_1024 = 3,
 653         IB_MTU_2048 = 4,
 654         IB_MTU_4096 = 5
 655 };
 656
 657 static inline int int_to_ibta_mtu(int mtu)
 658 {
 659         switch (mtu) {
 660         case 256:  return IB_MTU_256;
 661         case 512:  return IB_MTU_512;
 662         case 1024: return IB_MTU_1024;
 663         case 2048: return IB_MTU_2048;
 664         case 4096: return IB_MTU_4096;
 665         default: return -1;
 666         }
 667 }
 668
 669 static inline int ibta_mtu_to_int(enum ibta_mtu mtu)
 670 {
 671         switch (mtu) {
 672         case IB_MTU_256:  return  256;
 673         case IB_MTU_512:  return  512;
 674         case IB_MTU_1024: return 1024;
 675         case IB_MTU_2048: return 2048;
 676         case IB_MTU_4096: return 4096;
 677         default: return -1;
 678         }
 679 }
 680
 681 static ssize_t show_port_ib_mtu(struct device *dev,
 682                              struct device_attribute *attr,
 683                              char *buf)
 684 {
 685         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 686                                                    port_mtu_attr);
 687         struct mlx4_dev *mdev = info->dev;
 688
 689         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH)
 690                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 691
 692         sprintf(buf, "%d\n",
 693                         ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port]));
 694         return strlen(buf);
 695 }
 696
 697 static ssize_t set_port_ib_mtu(struct device *dev,
 698                              struct device_attribute *attr,
 699                              const char *buf, size_t count)
 700 {
 701         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 702                                                    port_mtu_attr);
 703         struct mlx4_dev *mdev = info->dev;
 704         struct mlx4_priv *priv = mlx4_priv(mdev);
 705         int err, port, mtu, ibta_mtu = -1;
 706
 707         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) {
 708                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 709                 return -EINVAL;
 710         }
 711
 712         err = sscanf(buf, "%d", &mtu);
 713         if (err > 0)
 714                 ibta_mtu = int_to_ibta_mtu(mtu);
 715
 716         if (err <= 0 || ibta_mtu < 0) {
 717                 mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf);
 718                 return -EINVAL;
 719         }
 720
 721         mdev->caps.port_ib_mtu[info->port] = ibta_mtu;
 722
 723         mlx4_stop_sense(mdev);
 724         mutex_lock(&priv->port_mutex);
 725         mlx4_unregister_device(mdev);
 726         for (port = 1; port <= mdev->caps.num_ports; port++) {
 727                 mlx4_CLOSE_PORT(mdev, port);
 728                 err = mlx4_SET_PORT(mdev, port);
 729                 if (err) {
 730                         mlx4_err(mdev, "Failed to set port %d, "
 731                                       "aborting\n", port);
 732                         goto err_set_port;
 733                 }
 734         }
 735         err = mlx4_register_device(mdev);
 736 err_set_port:
 737         mutex_unlock(&priv->port_mutex);
 738         mlx4_start_sense(mdev);
 739         return err ? err : count;
 740 }
 741
 742 static int mlx4_load_fw(struct mlx4_dev *dev)
 743 {
 744         struct mlx4_priv *priv = mlx4_priv(dev);
 745         int err;
 746
 747         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 748                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 749         if (!priv->fw.fw_icm) {
 750                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 751                 return -ENOMEM;
 752         }
 753
 754         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 755         if (err) {
 756                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 757                 goto err_free;
 758         }
 759
 760         err = mlx4_RUN_FW(dev);
 761         if (err) {
 762                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 763                 goto err_unmap_fa;
 764         }
 765
 766         return 0;
 767
 768 err_unmap_fa:
 769         mlx4_UNMAP_FA(dev);
 770
 771 err_free:
 772         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 773         return err;
 774 }
 775
 776 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 777                                 int cmpt_entry_sz)
 778 {
 779         struct mlx4_priv *priv = mlx4_priv(dev);
 780         int err;
 781         int num_eqs;
 782
 783         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 784                                   cmpt_base +
 785                                   ((u64) (MLX4_CMPT_TYPE_QP *
 786                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 787                                   cmpt_entry_sz, dev->caps.num_qps,
 788                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 789                                   0, 0);
 790         if (err)
 791                 goto err;
 792
 793         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 794                                   cmpt_base +
 795                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 796                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 797                                   cmpt_entry_sz, dev->caps.num_srqs,
 798                                   dev->caps.reserved_srqs, 0, 0);
 799         if (err)
 800                 goto err_qp;
 801
 802         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 803                                   cmpt_base +
 804                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 805                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 806                                   cmpt_entry_sz, dev->caps.num_cqs,
 807                                   dev->caps.reserved_cqs, 0, 0);
 808         if (err)
 809                 goto err_srq;
 810
 811         num_eqs = (mlx4_is_master(dev)) ?
 812                 roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :
 813                 dev->caps.num_eqs;
 814         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 815                                   cmpt_base +
 816                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 817                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 818                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 819         if (err)
 820                 goto err_cq;
 821
 822         return 0;
 823
 824 err_cq:
 825         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 826
 827 err_srq:
 828         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 829
 830 err_qp:
 831         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 832
 833 err:
 834         return err;
 835 }
 836
 837 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 838                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 839 {
 840         struct mlx4_priv *priv = mlx4_priv(dev);
 841         u64 aux_pages;
 842         int num_eqs;
 843         int err;
 844
 845         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 846         if (err) {
 847                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 848                 return err;
 849         }
 850
 851         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 852                  (unsigned long long) icm_size >> 10,
 853                  (unsigned long long) aux_pages << 2);
 854
 855         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 856                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 857         if (!priv->fw.aux_icm) {
 858                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 859                 return -ENOMEM;
 860         }
 861
 862         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 863         if (err) {
 864                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 865                 goto err_free_aux;
 866         }
 867
 868         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 869         if (err) {
 870                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 871                 goto err_unmap_aux;
 872         }
 873
 874
 875         num_eqs = (mlx4_is_master(dev)) ?
 876                 roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :
 877                 dev->caps.num_eqs;
 878         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 879                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 880                                   num_eqs, num_eqs, 0, 0);
 881         if (err) {
 882                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 883                 goto err_unmap_cmpt;
 884         }
 885
 886         /*
 887          * Reserved MTT entries must be aligned up to a cacheline
 888          * boundary, since the FW will write to them, while the driver
 889          * writes to all other MTT entries. (The variable
 890          * dev->caps.mtt_entry_sz below is really the MTT segment
 891          * size, not the raw entry size)
 892          */
 893         dev->caps.reserved_mtts =
 894                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 895                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 896
 897         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 898                                   init_hca->mtt_base,
 899                                   dev->caps.mtt_entry_sz,
 900                                   dev->caps.num_mtts,
 901                                   dev->caps.reserved_mtts, 1, 0);
 902         if (err) {
 903                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 904                 goto err_unmap_eq;
 905         }
 906
 907         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 908                                   init_hca->dmpt_base,
 909                                   dev_cap->dmpt_entry_sz,
 910                                   dev->caps.num_mpts,
 911                                   dev->caps.reserved_mrws, 1, 1);
 912         if (err) {
 913                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 914                 goto err_unmap_mtt;
 915         }
 916
 917         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 918                                   init_hca->qpc_base,
 919                                   dev_cap->qpc_entry_sz,
 920                                   dev->caps.num_qps,
 921                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 922                                   0, 0);
 923         if (err) {
 924                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 925                 goto err_unmap_dmpt;
 926         }
 927
 928         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 929                                   init_hca->auxc_base,
 930                                   dev_cap->aux_entry_sz,
 931                                   dev->caps.num_qps,
 932                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 933                                   0, 0);
 934         if (err) {
 935                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 936                 goto err_unmap_qp;
 937         }
 938
 939         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 940                                   init_hca->altc_base,
 941                                   dev_cap->altc_entry_sz,
 942                                   dev->caps.num_qps,
 943                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 944                                   0, 0);
 945         if (err) {
 946                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 947                 goto err_unmap_auxc;
 948         }
 949
 950         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 951                                   init_hca->rdmarc_base,
 952                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 953                                   dev->caps.num_qps,
 954                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 955                                   0, 0);
 956         if (err) {
 957                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 958                 goto err_unmap_altc;
 959         }
 960
 961         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 962                                   init_hca->cqc_base,
 963                                   dev_cap->cqc_entry_sz,
 964                                   dev->caps.num_cqs,
 965                                   dev->caps.reserved_cqs, 0, 0);
 966         if (err) {
 967                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 968                 goto err_unmap_rdmarc;
 969         }
 970
 971         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 972                                   init_hca->srqc_base,
 973                                   dev_cap->srq_entry_sz,
 974                                   dev->caps.num_srqs,
 975                                   dev->caps.reserved_srqs, 0, 0);
 976         if (err) {
 977                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 978                 goto err_unmap_cq;
 979         }
 980
 981         /*
 982          * It's not strictly required, but for simplicity just map the
 983          * whole multicast group table now.  The table isn't very big
 984          * and it's a lot easier than trying to track ref counts.
 985          */
 986         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 987                                   init_hca->mc_base,
 988                                   mlx4_get_mgm_entry_size(dev),
 989                                   dev->caps.num_mgms + dev->caps.num_amgms,
 990                                   dev->caps.num_mgms + dev->caps.num_amgms,
 991                                   0, 0);
 992         if (err) {
 993                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 994                 goto err_unmap_srq;
 995         }
 996
 997         return 0;
 998
 999 err_unmap_srq:
1000         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1001
1002 err_unmap_cq:
1003         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1004
1005 err_unmap_rdmarc:
1006         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1007
1008 err_unmap_altc:
1009         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1010
1011 err_unmap_auxc:
1012         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1013
1014 err_unmap_qp:
1015         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1016
1017 err_unmap_dmpt:
1018         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1019
1020 err_unmap_mtt:
1021         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1022
1023 err_unmap_eq:
1024         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1025
1026 err_unmap_cmpt:
1027         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1028         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1029         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1030         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1031
1032 err_unmap_aux:
1033         mlx4_UNMAP_ICM_AUX(dev);
1034
1035 err_free_aux:
1036         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1037
1038         return err;
1039 }
1040
1041 static void mlx4_free_icms(struct mlx4_dev *dev)
1042 {
1043         struct mlx4_priv *priv = mlx4_priv(dev);
1044
1045         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1046         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1047         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1048         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1049         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1050         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1051         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1052         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1053         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1054         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1055         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1056         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1057         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1058         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1059
1060         mlx4_UNMAP_ICM_AUX(dev);
1061         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1062 }
1063
1064 static void mlx4_slave_exit(struct mlx4_dev *dev)
1065 {
1066         struct mlx4_priv *priv = mlx4_priv(dev);
1067
1068         down(&priv->cmd.slave_sem);
1069         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
1070                 mlx4_warn(dev, "Failed to close slave function.\n");
1071         up(&priv->cmd.slave_sem);
1072 }
1073
1074 static int map_bf_area(struct mlx4_dev *dev)
1075 {
1076         struct mlx4_priv *priv = mlx4_priv(dev);
1077         resource_size_t bf_start;
1078         resource_size_t bf_len;
1079         int err = 0;
1080
1081         if (!dev->caps.bf_reg_size)
1082                 return -ENXIO;
1083
1084         bf_start = pci_resource_start(dev->pdev, 2) +
1085                         (dev->caps.num_uars << PAGE_SHIFT);
1086         bf_len = pci_resource_len(dev->pdev, 2) -
1087                         (dev->caps.num_uars << PAGE_SHIFT);
1088         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
1089         if (!priv->bf_mapping)
1090                 err = -ENOMEM;
1091
1092         return err;
1093 }
1094
1095 static void unmap_bf_area(struct mlx4_dev *dev)
1096 {
1097         if (mlx4_priv(dev)->bf_mapping)
1098                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1099 }
1100
1101 static void mlx4_close_hca(struct mlx4_dev *dev)
1102 {
1103         unmap_bf_area(dev);
1104         if (mlx4_is_slave(dev))
1105                 mlx4_slave_exit(dev);
1106         else {
1107                 mlx4_CLOSE_HCA(dev, 0);
1108                 mlx4_free_icms(dev);
1109                 mlx4_UNMAP_FA(dev);
1110                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1111         }
1112 }
1113
1114 static int mlx4_init_slave(struct mlx4_dev *dev)
1115 {
1116         struct mlx4_priv *priv = mlx4_priv(dev);
1117         u64 dma = (u64) priv->mfunc.vhcr_dma;
1118         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
1119         int ret_from_reset = 0;
1120         u32 slave_read;
1121         u32 cmd_channel_ver;
1122
1123         down(&priv->cmd.slave_sem);
1124         priv->cmd.max_cmds = 1;
1125         mlx4_warn(dev, "Sending reset\n");
1126         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1127                                        MLX4_COMM_TIME);
1128         /* if we are in the middle of flr the slave will try
1129          * NUM_OF_RESET_RETRIES times before leaving.*/
1130         if (ret_from_reset) {
1131                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1132                         msleep(SLEEP_TIME_IN_RESET);
1133                         while (ret_from_reset && num_of_reset_retries) {
1134                                 mlx4_warn(dev, "slave is currently in the"
1135                                           "middle of FLR. retrying..."
1136                                           "(try num:%d)\n",
1137                                           (NUM_OF_RESET_RETRIES -
1138                                            num_of_reset_retries  + 1));
1139                                 ret_from_reset =
1140                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1141                                                       0, MLX4_COMM_TIME);
1142                                 num_of_reset_retries = num_of_reset_retries - 1;
1143                         }
1144                 } else
1145                         goto err;
1146         }
1147
1148         /* check the driver version - the slave I/F revision
1149          * must match the master's */
1150         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1151         cmd_channel_ver = mlx4_comm_get_version();
1152
1153         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1154                 MLX4_COMM_GET_IF_REV(slave_read)) {
1155                 mlx4_err(dev, "slave driver version is not supported"
1156                          " by the master\n");
1157                 goto err;
1158         }
1159
1160         mlx4_warn(dev, "Sending vhcr0\n");
1161         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1162                                                     MLX4_COMM_TIME))
1163                 goto err;
1164         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1165                                                     MLX4_COMM_TIME))
1166                 goto err;
1167         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1168                                                     MLX4_COMM_TIME))
1169                 goto err;
1170         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1171                 goto err;
1172         up(&priv->cmd.slave_sem);
1173         return 0;
1174
1175 err:
1176         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1177         up(&priv->cmd.slave_sem);
1178         return -EIO;
1179 }
1180
1181 static int mlx4_init_hca(struct mlx4_dev *dev)
1182 {
1183         struct mlx4_priv          *priv = mlx4_priv(dev);
1184         struct mlx4_adapter        adapter;
1185         struct mlx4_dev_cap        dev_cap;
1186         struct mlx4_mod_stat_cfg   mlx4_cfg;
1187         struct mlx4_profile        profile;
1188         struct mlx4_init_hca_param init_hca;
1189         u64 icm_size;
1190         int err;
1191
1192         if (!mlx4_is_slave(dev)) {
1193                 err = mlx4_QUERY_FW(dev);
1194                 if (err) {
1195                         if (err == -EACCES)
1196                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1197                         else
1198                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1199                         goto unmap_bf;
1200                 }
1201
1202                 err = mlx4_load_fw(dev);
1203                 if (err) {
1204                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1205                         goto unmap_bf;
1206                 }
1207
1208                 mlx4_cfg.log_pg_sz_m = 1;
1209                 mlx4_cfg.log_pg_sz = 0;
1210                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1211                 if (err)
1212                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1213
1214                 err = mlx4_dev_cap(dev, &dev_cap);
1215                 if (err) {
1216                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1217                         goto err_stop_fw;
1218                 }
1219
1220                 profile = default_profile;
1221
1222                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1223                                              &init_hca);
1224                 if ((long long) icm_size < 0) {
1225                         err = icm_size;
1226                         goto err_stop_fw;
1227                 }
1228
1229                 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1;
1230
1231                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1232                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1233
1234                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1235                 if (err)
1236                         goto err_stop_fw;
1237
1238                 err = mlx4_INIT_HCA(dev, &init_hca);
1239                 if (err) {
1240                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1241                         goto err_free_icm;
1242                 }
1243         } else {
1244                 err = mlx4_init_slave(dev);
1245                 if (err) {
1246                         mlx4_err(dev, "Failed to initialize slave\n");
1247                         goto unmap_bf;
1248                 }
1249
1250                 err = mlx4_slave_cap(dev);
1251                 if (err) {
1252                         mlx4_err(dev, "Failed to obtain slave caps\n");
1253                         goto err_close;
1254                 }
1255         }
1256
1257         if (map_bf_area(dev))
1258                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1259
1260         /*Only the master set the ports, all the rest got it from it.*/
1261         if (!mlx4_is_slave(dev))
1262                 mlx4_set_port_mask(dev);
1263
1264         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1265         if (err) {
1266                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1267                 goto err_close;
1268         }
1269
1270         priv->eq_table.inta_pin = adapter.inta_pin;
1271         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1272
1273         return 0;
1274
1275 err_close:
1276         mlx4_close_hca(dev);
1277
1278 err_free_icm:
1279         if (!mlx4_is_slave(dev))
1280                 mlx4_free_icms(dev);
1281
1282 err_stop_fw:
1283         if (!mlx4_is_slave(dev)) {
1284                 mlx4_UNMAP_FA(dev);
1285                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1286         }
1287 unmap_bf:
1288         unmap_bf_area(dev);
1289         return err;
1290 }
1291
1292 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1293 {
1294         struct mlx4_priv *priv = mlx4_priv(dev);
1295         int nent;
1296
1297         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1298                 return -ENOENT;
1299
1300         nent = dev->caps.max_counters;
1301         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1302 }
1303
1304 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1305 {
1306         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1307 }
1308
1309 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1310 {
1311         struct mlx4_priv *priv = mlx4_priv(dev);
1312
1313         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1314                 return -ENOENT;
1315
1316         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1317         if (*idx == -1)
1318                 return -ENOMEM;
1319
1320         return 0;
1321 }
1322 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1323
1324 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1325 {
1326         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1327         return;
1328 }
1329 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1330
1331 static int mlx4_setup_hca(struct mlx4_dev *dev)
1332 {
1333         struct mlx4_priv *priv = mlx4_priv(dev);
1334         int err;
1335         int port;
1336         __be32 ib_port_default_caps;
1337
1338         err = mlx4_init_uar_table(dev);
1339         if (err) {
1340                 mlx4_err(dev, "Failed to initialize "
1341                          "user access region table, aborting.\n");
1342                 return err;
1343         }
1344
1345         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1346         if (err) {
1347                 mlx4_err(dev, "Failed to allocate driver access region, "
1348                          "aborting.\n");
1349                 goto err_uar_table_free;
1350         }
1351
1352         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1353         if (!priv->kar) {
1354                 mlx4_err(dev, "Couldn't map kernel access region, "
1355                          "aborting.\n");
1356                 err = -ENOMEM;
1357                 goto err_uar_free;
1358         }
1359
1360         err = mlx4_init_pd_table(dev);
1361         if (err) {
1362                 mlx4_err(dev, "Failed to initialize "
1363                          "protection domain table, aborting.\n");
1364                 goto err_kar_unmap;
1365         }
1366
1367         err = mlx4_init_xrcd_table(dev);
1368         if (err) {
1369                 mlx4_err(dev, "Failed to initialize "
1370                          "reliable connection domain table, aborting.\n");
1371                 goto err_pd_table_free;
1372         }
1373
1374         err = mlx4_init_mr_table(dev);
1375         if (err) {
1376                 mlx4_err(dev, "Failed to initialize "
1377                          "memory region table, aborting.\n");
1378                 goto err_xrcd_table_free;
1379         }
1380
1381         err = mlx4_init_eq_table(dev);
1382         if (err) {
1383                 mlx4_err(dev, "Failed to initialize "
1384                          "event queue table, aborting.\n");
1385                 goto err_mr_table_free;
1386         }
1387
1388         err = mlx4_cmd_use_events(dev);
1389         if (err) {
1390                 mlx4_err(dev, "Failed to switch to event-driven "
1391                          "firmware commands, aborting.\n");
1392                 goto err_eq_table_free;
1393         }
1394
1395         err = mlx4_NOP(dev);
1396         if (err) {
1397                 if (dev->flags & MLX4_FLAG_MSI_X) {
1398                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1399                                   "interrupt IRQ %d).\n",
1400                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1401                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1402                 } else {
1403                         mlx4_err(dev, "NOP command failed to generate interrupt "
1404                                  "(IRQ %d), aborting.\n",
1405                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1406                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1407                 }
1408
1409                 goto err_cmd_poll;
1410         }
1411
1412         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1413
1414         err = mlx4_init_cq_table(dev);
1415         if (err) {
1416                 mlx4_err(dev, "Failed to initialize "
1417                          "completion queue table, aborting.\n");
1418                 goto err_cmd_poll;
1419         }
1420
1421         err = mlx4_init_srq_table(dev);
1422         if (err) {
1423                 mlx4_err(dev, "Failed to initialize "
1424                          "shared receive queue table, aborting.\n");
1425                 goto err_cq_table_free;
1426         }
1427
1428         err = mlx4_init_qp_table(dev);
1429         if (err) {
1430                 mlx4_err(dev, "Failed to initialize "
1431                          "queue pair table, aborting.\n");
1432                 goto err_srq_table_free;
1433         }
1434
1435         if (!mlx4_is_slave(dev)) {
1436                 err = mlx4_init_mcg_table(dev);
1437                 if (err) {
1438                         mlx4_err(dev, "Failed to initialize "
1439                                  "multicast group table, aborting.\n");
1440                         goto err_qp_table_free;
1441                 }
1442         }
1443
1444         err = mlx4_init_counters_table(dev);
1445         if (err && err != -ENOENT) {
1446                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1447                 goto err_mcg_table_free;
1448         }
1449
1450         if (!mlx4_is_slave(dev)) {
1451                 for (port = 1; port <= dev->caps.num_ports; port++) {
1452                         ib_port_default_caps = 0;
1453                         err = mlx4_get_port_ib_caps(dev, port,
1454                                                     &ib_port_default_caps);
1455                         if (err)
1456                                 mlx4_warn(dev, "failed to get port %d default "
1457                                           "ib capabilities (%d). Continuing "
1458                                           "with caps = 0\n", port, err);
1459                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1460
1461                         if (mlx4_is_mfunc(dev))
1462                                 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1463                         else
1464                                 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1465
1466                         err = mlx4_SET_PORT(dev, port);
1467                         if (err) {
1468                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1469                                         port);
1470                                 goto err_counters_table_free;
1471                         }
1472                 }
1473         }
1474
1475         return 0;
1476
1477 err_counters_table_free:
1478         mlx4_cleanup_counters_table(dev);
1479
1480 err_mcg_table_free:
1481         mlx4_cleanup_mcg_table(dev);
1482
1483 err_qp_table_free:
1484         mlx4_cleanup_qp_table(dev);
1485
1486 err_srq_table_free:
1487         mlx4_cleanup_srq_table(dev);
1488
1489 err_cq_table_free:
1490         mlx4_cleanup_cq_table(dev);
1491
1492 err_cmd_poll:
1493         mlx4_cmd_use_polling(dev);
1494
1495 err_eq_table_free:
1496         mlx4_cleanup_eq_table(dev);
1497
1498 err_mr_table_free:
1499         mlx4_cleanup_mr_table(dev);
1500
1501 err_xrcd_table_free:
1502         mlx4_cleanup_xrcd_table(dev);
1503
1504 err_pd_table_free:
1505         mlx4_cleanup_pd_table(dev);
1506
1507 err_kar_unmap:
1508         iounmap(priv->kar);
1509
1510 err_uar_free:
1511         mlx4_uar_free(dev, &priv->driver_uar);
1512
1513 err_uar_table_free:
1514         mlx4_cleanup_uar_table(dev);
1515         return err;
1516 }
1517
1518 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1519 {
1520         struct mlx4_priv *priv = mlx4_priv(dev);
1521         struct msix_entry *entries;
1522         int nreq = min_t(int, dev->caps.num_ports *
1523                          min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT)
1524                                 + MSIX_LEGACY_SZ, MAX_MSIX);
1525         int err;
1526         int i;
1527
1528         if (msi_x) {
1529                 /* In multifunction mode each function gets 2 msi-X vectors
1530                  * one for data path completions anf the other for asynch events
1531                  * or command completions */
1532                 if (mlx4_is_mfunc(dev)) {
1533                         nreq = 2;
1534                 } else {
1535                         nreq = min_t(int, dev->caps.num_eqs -
1536                                      dev->caps.reserved_eqs, nreq);
1537                 }
1538
1539                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1540                 if (!entries)
1541                         goto no_msi;
1542
1543                 for (i = 0; i < nreq; ++i)
1544                         entries[i].entry = i;
1545
1546         retry:
1547                 err = pci_enable_msix(dev->pdev, entries, nreq);
1548                 if (err) {
1549                         /* Try again if at least 2 vectors are available */
1550                         if (err > 1) {
1551                                 mlx4_info(dev, "Requested %d vectors, "
1552                                           "but only %d MSI-X vectors available, "
1553                                           "trying again\n", nreq, err);
1554                                 nreq = err;
1555                                 goto retry;
1556                         }
1557                         kfree(entries);
1558                         goto no_msi;
1559                 }
1560
1561                 if (nreq <
1562                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1563                         /*Working in legacy mode , all EQ's shared*/
1564                         dev->caps.comp_pool           = 0;
1565                         dev->caps.num_comp_vectors = nreq - 1;
1566                 } else {
1567                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1568                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1569                 }
1570                 for (i = 0; i < nreq; ++i)
1571                         priv->eq_table.eq[i].irq = entries[i].vector;
1572
1573                 dev->flags |= MLX4_FLAG_MSI_X;
1574
1575                 kfree(entries);
1576                 return;
1577         }
1578
1579 no_msi:
1580         dev->caps.num_comp_vectors = 1;
1581         dev->caps.comp_pool        = 0;
1582
1583         for (i = 0; i < 2; ++i)
1584                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1585 }
1586
1587 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1588 {
1589         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1590         int err = 0;
1591
1592         info->dev = dev;
1593         info->port = port;
1594         if (!mlx4_is_slave(dev)) {
1595                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1596                 mlx4_init_mac_table(dev, &info->mac_table);
1597                 mlx4_init_vlan_table(dev, &info->vlan_table);
1598                 info->base_qpn =
1599                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1600                         (port - 1) * (1 << log_num_mac);
1601         }
1602
1603         sprintf(info->dev_name, "mlx4_port%d", port);
1604         info->port_attr.attr.name = info->dev_name;
1605         if (mlx4_is_mfunc(dev))
1606                 info->port_attr.attr.mode = S_IRUGO;
1607         else {
1608                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1609                 info->port_attr.store     = set_port_type;
1610         }
1611         info->port_attr.show      = show_port_type;
1612         sysfs_attr_init(&info->port_attr.attr);
1613
1614         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1615         if (err) {
1616                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1617                 info->port = -1;
1618         }
1619
1620         sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port);
1621         info->port_mtu_attr.attr.name = info->dev_mtu_name;
1622         if (mlx4_is_mfunc(dev))
1623                 info->port_mtu_attr.attr.mode = S_IRUGO;
1624         else {
1625                 info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR;
1626                 info->port_mtu_attr.store     = set_port_ib_mtu;
1627         }
1628         info->port_mtu_attr.show      = show_port_ib_mtu;
1629         sysfs_attr_init(&info->port_mtu_attr.attr);
1630
1631         err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr);
1632         if (err) {
1633                 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
1634                 device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1635                 info->port = -1;
1636         }
1637
1638         return err;
1639 }
1640
1641 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1642 {
1643         if (info->port < 0)
1644                 return;
1645
1646         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1647         device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr);
1648 }
1649
1650 static int mlx4_init_steering(struct mlx4_dev *dev)
1651 {
1652         struct mlx4_priv *priv = mlx4_priv(dev);
1653         int num_entries = dev->caps.num_ports;
1654         int i, j;
1655
1656         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1657         if (!priv->steer)
1658                 return -ENOMEM;
1659
1660         for (i = 0; i < num_entries; i++)
1661                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1662                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1663                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1664                 }
1665         return 0;
1666 }
1667
1668 static void mlx4_clear_steering(struct mlx4_dev *dev)
1669 {
1670         struct mlx4_priv *priv = mlx4_priv(dev);
1671         struct mlx4_steer_index *entry, *tmp_entry;
1672         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1673         int num_entries = dev->caps.num_ports;
1674         int i, j;
1675
1676         for (i = 0; i < num_entries; i++) {
1677                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1678                         list_for_each_entry_safe(pqp, tmp_pqp,
1679                                                  &priv->steer[i].promisc_qps[j],
1680                                                  list) {
1681                                 list_del(&pqp->list);
1682                                 kfree(pqp);
1683                         }
1684                         list_for_each_entry_safe(entry, tmp_entry,
1685                                                  &priv->steer[i].steer_entries[j],
1686                                                  list) {
1687                                 list_del(&entry->list);
1688                                 list_for_each_entry_safe(pqp, tmp_pqp,
1689                                                          &entry->duplicates,
1690                                                          list) {
1691                                         list_del(&pqp->list);
1692                                         kfree(pqp);
1693                                 }
1694                                 kfree(entry);
1695                         }
1696                 }
1697         }
1698         kfree(priv->steer);
1699 }
1700
1701 static int extended_func_num(struct pci_dev *pdev)
1702 {
1703         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1704 }
1705
1706 #define MLX4_OWNER_BASE 0x8069c
1707 #define MLX4_OWNER_SIZE 4
1708
1709 static int mlx4_get_ownership(struct mlx4_dev *dev)
1710 {
1711         void __iomem *owner;
1712         u32 ret;
1713
1714         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1715                         MLX4_OWNER_SIZE);
1716         if (!owner) {
1717                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1718                 return -ENOMEM;
1719         }
1720
1721         ret = readl(owner);
1722         iounmap(owner);
1723         return (int) !!ret;
1724 }
1725
1726 static void mlx4_free_ownership(struct mlx4_dev *dev)
1727 {
1728         void __iomem *owner;
1729
1730         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1731                         MLX4_OWNER_SIZE);
1732         if (!owner) {
1733                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1734                 return;
1735         }
1736         writel(0, owner);
1737         msleep(1000);
1738         iounmap(owner);
1739 }
1740
1741 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1742 {
1743         struct mlx4_priv *priv;
1744         struct mlx4_dev *dev;
1745         int err;
1746         int port;
1747
1748         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1749
1750         err = pci_enable_device(pdev);
1751         if (err) {
1752                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1753                         "aborting.\n");
1754                 return err;
1755         }
1756         if (num_vfs > MLX4_MAX_NUM_VF) {
1757                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1758                        num_vfs, MLX4_MAX_NUM_VF);
1759                 return -EINVAL;
1760         }
1761         /*
1762          * Check for BARs.
1763          */
1764         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1765             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1766                 dev_err(&pdev->dev, "Missing DCS, aborting."
1767                         "(id == 0X%p, id->driver_data: 0x%lx,"
1768                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1769                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1770                 err = -ENODEV;
1771                 goto err_disable_pdev;
1772         }
1773         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1774                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1775                 err = -ENODEV;
1776                 goto err_disable_pdev;
1777         }
1778
1779         err = pci_request_regions(pdev, DRV_NAME);
1780         if (err) {
1781                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1782                 goto err_disable_pdev;
1783         }
1784
1785         pci_set_master(pdev);
1786
1787         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1788         if (err) {
1789                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1790                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1791                 if (err) {
1792                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1793                         goto err_release_regions;
1794                 }
1795         }
1796         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1797         if (err) {
1798                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1799                          "consistent PCI DMA mask.\n");
1800                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1801                 if (err) {
1802                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1803                                 "aborting.\n");
1804                         goto err_release_regions;
1805                 }
1806         }
1807
1808         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1809         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1810
1811         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1812         if (!priv) {
1813                 dev_err(&pdev->dev, "Device struct alloc failed, "
1814                         "aborting.\n");
1815                 err = -ENOMEM;
1816                 goto err_release_regions;
1817         }
1818
1819         dev       = &priv->dev;
1820         dev->pdev = pdev;
1821         INIT_LIST_HEAD(&priv->ctx_list);
1822         spin_lock_init(&priv->ctx_lock);
1823
1824         mutex_init(&priv->port_mutex);
1825
1826         INIT_LIST_HEAD(&priv->pgdir_list);
1827         mutex_init(&priv->pgdir_mutex);
1828
1829         INIT_LIST_HEAD(&priv->bf_list);
1830         mutex_init(&priv->bf_mutex);
1831
1832         dev->rev_id = pdev->revision;
1833         /* Detect if this device is a virtual function */
1834         if (id && id->driver_data & MLX4_VF) {
1835                 /* When acting as pf, we normally skip vfs unless explicitly
1836                  * requested to probe them. */
1837                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
1838                         mlx4_warn(dev, "Skipping virtual function:%d\n",
1839                                                 extended_func_num(pdev));
1840                         err = -ENODEV;
1841                         goto err_free_dev;
1842                 }
1843                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
1844                 dev->flags |= MLX4_FLAG_SLAVE;
1845         } else {
1846                 /* We reset the device and enable SRIOV only for physical
1847                  * devices.  Try to claim ownership on the device;
1848                  * if already taken, skip -- do not allow multiple PFs */
1849                 err = mlx4_get_ownership(dev);
1850                 if (err) {
1851                         if (err < 0)
1852                                 goto err_free_dev;
1853                         else {
1854                                 mlx4_warn(dev, "Multiple PFs not yet supported."
1855                                           " Skipping PF.\n");
1856                                 err = -EINVAL;
1857                                 goto err_free_dev;
1858                         }
1859                 }
1860
1861                 if (num_vfs) {
1862                         mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs);
1863                         err = pci_enable_sriov(pdev, num_vfs);
1864                         if (err) {
1865                                 mlx4_err(dev, "Failed to enable sriov,"
1866                                          "continuing without sriov enabled"
1867                                          " (err = %d).\n", err);
1868                                 err = 0;
1869                         } else {
1870                                 mlx4_warn(dev, "Running in master mode\n");
1871                                 dev->flags |= MLX4_FLAG_SRIOV |
1872                                               MLX4_FLAG_MASTER;
1873                                 dev->num_vfs = num_vfs;
1874                         }
1875                 }
1876
1877                 /*
1878                  * Now reset the HCA before we touch the PCI capabilities or
1879                  * attempt a firmware command, since a boot ROM may have left
1880                  * the HCA in an undefined state.
1881                  */
1882                 err = mlx4_reset(dev);
1883                 if (err) {
1884                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
1885                         goto err_rel_own;
1886                 }
1887         }
1888
1889 slave_start:
1890         if (mlx4_cmd_init(dev)) {
1891                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1892                 goto err_sriov;
1893         }
1894
1895         /* In slave functions, the communication channel must be initialized
1896          * before posting commands. Also, init num_slaves before calling
1897          * mlx4_init_hca */
1898         if (mlx4_is_mfunc(dev)) {
1899                 if (mlx4_is_master(dev))
1900                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
1901                 else {
1902                         dev->num_slaves = 0;
1903                         if (mlx4_multi_func_init(dev)) {
1904                                 mlx4_err(dev, "Failed to init slave mfunc"
1905                                          " interface, aborting.\n");
1906                                 goto err_cmd;
1907                         }
1908                 }
1909         }
1910
1911         err = mlx4_init_hca(dev);
1912         if (err) {
1913                 if (err == -EACCES) {
1914                         /* Not primary Physical function
1915                          * Running in slave mode */
1916                         mlx4_cmd_cleanup(dev);
1917                         dev->flags |= MLX4_FLAG_SLAVE;
1918                         dev->flags &= ~MLX4_FLAG_MASTER;
1919                         goto slave_start;
1920                 } else
1921                         goto err_mfunc;
1922         }
1923
1924         /* In master functions, the communication channel must be initialized
1925          * after obtaining its address from fw */
1926         if (mlx4_is_master(dev)) {
1927                 if (mlx4_multi_func_init(dev)) {
1928                         mlx4_err(dev, "Failed to init master mfunc"
1929                                  "interface, aborting.\n");
1930                         goto err_close;
1931                 }
1932         }
1933
1934         err = mlx4_alloc_eq_table(dev);
1935         if (err)
1936                 goto err_master_mfunc;
1937
1938         priv->msix_ctl.pool_bm = 0;
1939         mutex_init(&priv->msix_ctl.pool_lock);
1940
1941         mlx4_enable_msi_x(dev);
1942         if ((mlx4_is_mfunc(dev)) &&
1943             !(dev->flags & MLX4_FLAG_MSI_X)) {
1944                 mlx4_err(dev, "INTx is not supported in multi-function mode."
1945                          " aborting.\n");
1946                 goto err_free_eq;
1947         }
1948
1949         if (!mlx4_is_slave(dev)) {
1950                 err = mlx4_init_steering(dev);
1951                 if (err)
1952                         goto err_free_eq;
1953         }
1954
1955         err = mlx4_setup_hca(dev);
1956         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
1957             !mlx4_is_mfunc(dev)) {
1958                 dev->flags &= ~MLX4_FLAG_MSI_X;
1959                 pci_disable_msix(pdev);
1960                 err = mlx4_setup_hca(dev);
1961         }
1962
1963         if (err)
1964                 goto err_steer;
1965
1966         for (port = 1; port <= dev->caps.num_ports; port++) {
1967                 err = mlx4_init_port_info(dev, port);
1968                 if (err)
1969                         goto err_port;
1970         }
1971
1972         err = mlx4_register_device(dev);
1973         if (err)
1974                 goto err_port;
1975
1976         mlx4_sense_init(dev);
1977         mlx4_start_sense(dev);
1978
1979         pci_set_drvdata(pdev, dev);
1980
1981         return 0;
1982
1983 err_port:
1984         for (--port; port >= 1; --port)
1985                 mlx4_cleanup_port_info(&priv->port[port]);
1986
1987         mlx4_cleanup_counters_table(dev);
1988         mlx4_cleanup_mcg_table(dev);
1989         mlx4_cleanup_qp_table(dev);
1990         mlx4_cleanup_srq_table(dev);
1991         mlx4_cleanup_cq_table(dev);
1992         mlx4_cmd_use_polling(dev);
1993         mlx4_cleanup_eq_table(dev);
1994         mlx4_cleanup_mr_table(dev);
1995         mlx4_cleanup_xrcd_table(dev);
1996         mlx4_cleanup_pd_table(dev);
1997         mlx4_cleanup_uar_table(dev);
1998
1999 err_steer:
2000         if (!mlx4_is_slave(dev))
2001                 mlx4_clear_steering(dev);
2002
2003 err_free_eq:
2004         mlx4_free_eq_table(dev);
2005
2006 err_master_mfunc:
2007         if (mlx4_is_master(dev))
2008                 mlx4_multi_func_cleanup(dev);
2009
2010 err_close:
2011         if (dev->flags & MLX4_FLAG_MSI_X)
2012                 pci_disable_msix(pdev);
2013
2014         mlx4_close_hca(dev);
2015
2016 err_mfunc:
2017         if (mlx4_is_slave(dev))
2018                 mlx4_multi_func_cleanup(dev);
2019
2020 err_cmd:
2021         mlx4_cmd_cleanup(dev);
2022
2023 err_sriov:
2024         if (dev->flags & MLX4_FLAG_SRIOV)
2025                 pci_disable_sriov(pdev);
2026
2027 err_rel_own:
2028         if (!mlx4_is_slave(dev))
2029                 mlx4_free_ownership(dev);
2030
2031 err_free_dev:
2032         kfree(priv);
2033
2034 err_release_regions:
2035         pci_release_regions(pdev);
2036
2037 err_disable_pdev:
2038         pci_disable_device(pdev);
2039         pci_set_drvdata(pdev, NULL);
2040         return err;
2041 }
2042
2043 static int __devinit mlx4_init_one(struct pci_dev *pdev,
2044                                    const struct pci_device_id *id)
2045 {
2046         printk_once(KERN_INFO "%s", mlx4_version);
2047
2048         return __mlx4_init_one(pdev, id);
2049 }
2050
2051 static void mlx4_remove_one(struct pci_dev *pdev)
2052 {
2053         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
2054         struct mlx4_priv *priv = mlx4_priv(dev);
2055         int p;
2056
2057         if (dev) {
2058                 /* in SRIOV it is not allowed to unload the pf's
2059                  * driver while there are alive vf's */
2060                 if (mlx4_is_master(dev)) {
2061                         if (mlx4_how_many_lives_vf(dev))
2062                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2063                 }
2064                 mlx4_stop_sense(dev);
2065                 mlx4_unregister_device(dev);
2066
2067                 for (p = 1; p <= dev->caps.num_ports; p++) {
2068                         mlx4_cleanup_port_info(&priv->port[p]);
2069                         mlx4_CLOSE_PORT(dev, p);
2070                 }
2071
2072                 if (mlx4_is_master(dev))
2073                         mlx4_free_resource_tracker(dev,
2074                                                    RES_TR_FREE_SLAVES_ONLY);
2075
2076                 mlx4_cleanup_counters_table(dev);
2077                 mlx4_cleanup_mcg_table(dev);
2078                 mlx4_cleanup_qp_table(dev);
2079                 mlx4_cleanup_srq_table(dev);
2080                 mlx4_cleanup_cq_table(dev);
2081                 mlx4_cmd_use_polling(dev);
2082                 mlx4_cleanup_eq_table(dev);
2083                 mlx4_cleanup_mr_table(dev);
2084                 mlx4_cleanup_xrcd_table(dev);
2085                 mlx4_cleanup_pd_table(dev);
2086
2087                 if (mlx4_is_master(dev))
2088                         mlx4_free_resource_tracker(dev,
2089                                                    RES_TR_FREE_STRUCTS_ONLY);
2090
2091                 iounmap(priv->kar);
2092                 mlx4_uar_free(dev, &priv->driver_uar);
2093                 mlx4_cleanup_uar_table(dev);
2094                 if (!mlx4_is_slave(dev))
2095                         mlx4_clear_steering(dev);
2096                 mlx4_free_eq_table(dev);
2097                 if (mlx4_is_master(dev))
2098                         mlx4_multi_func_cleanup(dev);
2099                 mlx4_close_hca(dev);
2100                 if (mlx4_is_slave(dev))
2101                         mlx4_multi_func_cleanup(dev);
2102                 mlx4_cmd_cleanup(dev);
2103
2104                 if (dev->flags & MLX4_FLAG_MSI_X)
2105                         pci_disable_msix(pdev);
2106                 if (dev->flags & MLX4_FLAG_SRIOV) {
2107                         mlx4_warn(dev, "Disabling sriov\n");
2108                         pci_disable_sriov(pdev);
2109                 }
2110
2111                 if (!mlx4_is_slave(dev))
2112                         mlx4_free_ownership(dev);
2113                 kfree(priv);
2114                 pci_release_regions(pdev);
2115                 pci_disable_device(pdev);
2116                 pci_set_drvdata(pdev, NULL);
2117         }
2118 }
2119
2120 int mlx4_restart_one(struct pci_dev *pdev)
2121 {
2122         mlx4_remove_one(pdev);
2123         return __mlx4_init_one(pdev, NULL);
2124 }
2125
2126 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2127         /* MT25408 "Hermon" SDR */
2128         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
2129         /* MT25408 "Hermon" DDR */
2130         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
2131         /* MT25408 "Hermon" QDR */
2132         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
2133         /* MT25408 "Hermon" DDR PCIe gen2 */
2134         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
2135         /* MT25408 "Hermon" QDR PCIe gen2 */
2136         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
2137         /* MT25408 "Hermon" EN 10GigE */
2138         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2139         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2140         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2141         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2142         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2143         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2144         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2145         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2146         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2147         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2148         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2149         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2150         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2151         /* MT25400 Family [ConnectX-2 Virtual Function] */
2152         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2153         /* MT27500 Family [ConnectX-3] */
2154         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2155         /* MT27500 Family [ConnectX-3 Virtual Function] */
2156         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2157         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2158         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2159         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2160         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2161         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2162         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2163         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2164         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2165         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2166         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2167         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2168         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2169         { 0, }
2170 };
2171
2172 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2173
2174 static struct pci_driver mlx4_driver = {
2175         .name           = DRV_NAME,
2176         .id_table       = mlx4_pci_table,
2177         .probe          = mlx4_init_one,
2178         .remove         = __devexit_p(mlx4_remove_one)
2179 };
2180
2181 static int __init mlx4_verify_params(void)
2182 {
2183         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2184                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2185                 return -1;
2186         }
2187
2188         if (log_num_vlan != 0)
2189                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2190                            MLX4_LOG_NUM_VLANS);
2191
2192         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2193                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2194                 return -1;
2195         }
2196
2197         /* Check if module param for ports type has legal combination */
2198         if (port_type_array[0] == false && port_type_array[1] == true) {
2199                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2200                 port_type_array[0] = true;
2201         }
2202
2203         return 0;
2204 }
2205
2206 static int __init mlx4_init(void)
2207 {
2208         int ret;
2209
2210         if (mlx4_verify_params())
2211                 return -EINVAL;
2212
2213         mlx4_catas_init();
2214
2215         mlx4_wq = create_singlethread_workqueue("mlx4");
2216         if (!mlx4_wq)
2217                 return -ENOMEM;
2218
2219         ret = pci_register_driver(&mlx4_driver);
2220         return ret < 0 ? ret : 0;
2221 }
2222
2223 static void __exit mlx4_cleanup(void)
2224 {
2225         pci_unregister_driver(&mlx4_driver);
2226         destroy_workqueue(mlx4_wq);
2227 }
2228
2229 module_init(mlx4_init);
2230 module_exit(mlx4_cleanup);