2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/errno.h>
34 #include <linux/if_ether.h>
35 #include <linux/export.h>
37 #include <linux/mlx4/cmd.h>
41 #define MLX4_MAC_VALID (1ull << 63)
42 #define MLX4_MAC_MASK 0xffffffffffffULL
44 #define MLX4_VLAN_VALID (1u << 31)
45 #define MLX4_VLAN_MASK 0xfff
47 #define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL
48 #define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL
49 #define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL
50 #define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL
52 void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table)
56 mutex_init(&table->mutex);
57 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
58 table->entries[i] = 0;
61 table->max = 1 << dev->caps.log_num_macs;
65 void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table)
69 mutex_init(&table->mutex);
70 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) {
71 table->entries[i] = 0;
74 table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR;
78 static int mlx4_uc_steer_add(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn)
87 mac &= 0xffffffffffffULL;
88 be_mac = cpu_to_be64(mac << 16);
89 memcpy(&gid[10], &be_mac, ETH_ALEN);
92 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
94 mlx4_warn(dev, "Failed Attaching Unicast\n");
99 static void mlx4_uc_steer_release(struct mlx4_dev *dev, u8 port,
107 mac &= 0xffffffffffffULL;
108 be_mac = cpu_to_be64(mac << 16);
109 memcpy(&gid[10], &be_mac, ETH_ALEN);
112 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
115 static int validate_index(struct mlx4_dev *dev,
116 struct mlx4_mac_table *table, int index)
120 if (index < 0 || index >= table->max || !table->entries[index]) {
121 mlx4_warn(dev, "No valid Mac entry for the given index\n");
127 static int find_index(struct mlx4_dev *dev,
128 struct mlx4_mac_table *table, u64 mac)
132 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
133 if ((mac & MLX4_MAC_MASK) ==
134 (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))
141 int mlx4_get_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn)
143 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
144 struct mlx4_mac_entry *entry;
148 mlx4_dbg(dev, "Registering MAC: 0x%llx for adding\n",
149 (unsigned long long) mac);
150 index = mlx4_register_mac(dev, port, mac);
153 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
154 (unsigned long long) mac);
158 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) {
159 *qpn = info->base_qpn + index;
163 err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
164 mlx4_dbg(dev, "Reserved qp %d\n", *qpn);
166 mlx4_err(dev, "Failed to reserve qp for mac registration\n");
170 err = mlx4_uc_steer_add(dev, port, mac, qpn);
174 entry = kmalloc(sizeof *entry, GFP_KERNEL);
180 err = radix_tree_insert(&info->mac_tree, *qpn, entry);
189 mlx4_uc_steer_release(dev, port, mac, *qpn);
192 mlx4_qp_release_range(dev, *qpn, 1);
195 mlx4_unregister_mac(dev, port, mac);
198 EXPORT_SYMBOL_GPL(mlx4_get_eth_qp);
200 void mlx4_put_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int qpn)
202 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
203 struct mlx4_mac_entry *entry;
205 mlx4_dbg(dev, "Registering MAC: 0x%llx for deleting\n",
206 (unsigned long long) mac);
207 mlx4_unregister_mac(dev, port, mac);
209 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) {
210 entry = radix_tree_lookup(&info->mac_tree, qpn);
212 mlx4_dbg(dev, "Releasing qp: port %d, mac 0x%llx,"
214 (unsigned long long) mac, qpn);
215 mlx4_uc_steer_release(dev, port, entry->mac, qpn);
216 mlx4_qp_release_range(dev, qpn, 1);
217 radix_tree_delete(&info->mac_tree, qpn);
222 EXPORT_SYMBOL_GPL(mlx4_put_eth_qp);
224 static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,
227 struct mlx4_cmd_mailbox *mailbox;
231 mailbox = mlx4_alloc_cmd_mailbox(dev);
233 return PTR_ERR(mailbox);
235 memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE);
237 in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port;
239 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
240 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
242 mlx4_free_cmd_mailbox(dev, mailbox);
246 int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
248 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
249 struct mlx4_mac_table *table = &info->mac_table;
253 mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n",
254 (unsigned long long) mac, port);
256 mutex_lock(&table->mutex);
257 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
258 if (free < 0 && !table->entries[i]) {
263 if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) {
264 /* MAC already registered, Must not have duplicates */
270 mlx4_dbg(dev, "Free MAC index is %d\n", free);
272 if (table->total == table->max) {
273 /* No free mac entries */
278 /* Register new MAC */
279 table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID);
281 err = mlx4_set_port_mac_table(dev, port, table->entries);
283 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
284 (unsigned long long) mac);
285 table->entries[free] = 0;
292 mutex_unlock(&table->mutex);
295 EXPORT_SYMBOL_GPL(__mlx4_register_mac);
297 int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
302 if (mlx4_is_mfunc(dev)) {
303 set_param_l(&out_param, port);
304 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
305 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
306 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
310 return get_param_l(&out_param);
312 return __mlx4_register_mac(dev, port, mac);
314 EXPORT_SYMBOL_GPL(mlx4_register_mac);
317 void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
319 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
320 struct mlx4_mac_table *table = &info->mac_table;
323 index = find_index(dev, table, mac);
325 mutex_lock(&table->mutex);
327 if (validate_index(dev, table, index))
330 table->entries[index] = 0;
331 mlx4_set_port_mac_table(dev, port, table->entries);
334 mutex_unlock(&table->mutex);
336 EXPORT_SYMBOL_GPL(__mlx4_unregister_mac);
338 void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
343 if (mlx4_is_mfunc(dev)) {
344 set_param_l(&out_param, port);
345 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
346 RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,
347 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
350 __mlx4_unregister_mac(dev, port, mac);
353 EXPORT_SYMBOL_GPL(mlx4_unregister_mac);
355 int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac)
357 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
358 struct mlx4_mac_table *table = &info->mac_table;
359 struct mlx4_mac_entry *entry;
360 int index = qpn - info->base_qpn;
363 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) {
364 entry = radix_tree_lookup(&info->mac_tree, qpn);
367 mlx4_uc_steer_release(dev, port, entry->mac, qpn);
368 mlx4_unregister_mac(dev, port, entry->mac);
369 entry->mac = new_mac;
370 mlx4_register_mac(dev, port, new_mac);
371 err = mlx4_uc_steer_add(dev, port, entry->mac, &qpn);
375 /* CX1 doesn't support multi-functions */
376 mutex_lock(&table->mutex);
378 err = validate_index(dev, table, index);
382 table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID);
384 err = mlx4_set_port_mac_table(dev, port, table->entries);
386 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
387 (unsigned long long) new_mac);
388 table->entries[index] = 0;
391 mutex_unlock(&table->mutex);
394 EXPORT_SYMBOL_GPL(mlx4_replace_mac);
396 static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port,
399 struct mlx4_cmd_mailbox *mailbox;
403 mailbox = mlx4_alloc_cmd_mailbox(dev);
405 return PTR_ERR(mailbox);
407 memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE);
408 in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port;
409 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
410 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
412 mlx4_free_cmd_mailbox(dev, mailbox);
417 int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx)
419 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
422 for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) {
423 if (table->refs[i] &&
424 (vid == (MLX4_VLAN_MASK &
425 be32_to_cpu(table->entries[i])))) {
426 /* VLAN already registered, increase reference count */
434 EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan);
436 static int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan,
439 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
443 mutex_lock(&table->mutex);
445 if (table->total == table->max) {
446 /* No free vlan entries */
451 for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) {
452 if (free < 0 && (table->refs[i] == 0)) {
457 if (table->refs[i] &&
458 (vlan == (MLX4_VLAN_MASK &
459 be32_to_cpu(table->entries[i])))) {
460 /* Vlan already registered, increase references count */
472 /* Register new VLAN */
473 table->refs[free] = 1;
474 table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID);
476 err = mlx4_set_port_vlan_table(dev, port, table->entries);
478 mlx4_warn(dev, "Failed adding vlan: %u\n", vlan);
479 table->refs[free] = 0;
480 table->entries[free] = 0;
487 mutex_unlock(&table->mutex);
491 int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index)
496 if (mlx4_is_mfunc(dev)) {
497 set_param_l(&out_param, port);
498 err = mlx4_cmd_imm(dev, vlan, &out_param, RES_VLAN,
499 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
500 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
502 *index = get_param_l(&out_param);
506 return __mlx4_register_vlan(dev, port, vlan, index);
508 EXPORT_SYMBOL_GPL(mlx4_register_vlan);
510 static void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index)
512 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
514 if (index < MLX4_VLAN_REGULAR) {
515 mlx4_warn(dev, "Trying to free special vlan index %d\n", index);
519 mutex_lock(&table->mutex);
520 if (!table->refs[index]) {
521 mlx4_warn(dev, "No vlan entry for index %d\n", index);
524 if (--table->refs[index]) {
525 mlx4_dbg(dev, "Have more references for index %d,"
526 "no need to modify vlan table\n", index);
529 table->entries[index] = 0;
530 mlx4_set_port_vlan_table(dev, port, table->entries);
533 mutex_unlock(&table->mutex);
536 void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index)
541 if (mlx4_is_mfunc(dev)) {
542 set_param_l(&in_param, port);
543 err = mlx4_cmd(dev, in_param, RES_VLAN, RES_OP_RESERVE_AND_MAP,
544 MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
547 mlx4_warn(dev, "Failed freeing vlan at index:%d\n",
552 __mlx4_unregister_vlan(dev, port, index);
554 EXPORT_SYMBOL_GPL(mlx4_unregister_vlan);
556 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
558 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
562 inmailbox = mlx4_alloc_cmd_mailbox(dev);
563 if (IS_ERR(inmailbox))
564 return PTR_ERR(inmailbox);
566 outmailbox = mlx4_alloc_cmd_mailbox(dev);
567 if (IS_ERR(outmailbox)) {
568 mlx4_free_cmd_mailbox(dev, inmailbox);
569 return PTR_ERR(outmailbox);
572 inbuf = inmailbox->buf;
573 outbuf = outmailbox->buf;
574 memset(inbuf, 0, 256);
575 memset(outbuf, 0, 256);
580 *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015);
581 *(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
583 err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
584 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
587 *caps = *(__be32 *) (outbuf + 84);
588 mlx4_free_cmd_mailbox(dev, inmailbox);
589 mlx4_free_cmd_mailbox(dev, outmailbox);
593 int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port)
595 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
597 int err, packet_error;
599 inmailbox = mlx4_alloc_cmd_mailbox(dev);
600 if (IS_ERR(inmailbox))
601 return PTR_ERR(inmailbox);
603 outmailbox = mlx4_alloc_cmd_mailbox(dev);
604 if (IS_ERR(outmailbox)) {
605 mlx4_free_cmd_mailbox(dev, inmailbox);
606 return PTR_ERR(outmailbox);
609 inbuf = inmailbox->buf;
610 outbuf = outmailbox->buf;
611 memset(inbuf, 0, 256);
612 memset(outbuf, 0, 256);
618 *(__be16 *) (&inbuf[16]) = MLX4_ATTR_EXTENDED_PORT_INFO;
619 *(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
621 err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
622 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
625 packet_error = be16_to_cpu(*(__be16 *) (outbuf + 4));
627 dev->caps.ext_port_cap[port] = (!err && !packet_error) ?
628 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO
631 mlx4_free_cmd_mailbox(dev, inmailbox);
632 mlx4_free_cmd_mailbox(dev, outmailbox);
636 static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
637 u8 op_mod, struct mlx4_cmd_mailbox *inbox)
639 struct mlx4_priv *priv = mlx4_priv(dev);
640 struct mlx4_port_info *port_info;
641 struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master;
642 struct mlx4_slave_state *slave_st = &master->slave_state[slave];
643 struct mlx4_set_port_rqp_calc_context *qpn_context;
644 struct mlx4_set_port_general_context *gen_context;
645 int reset_qkey_viols;
654 __be32 slave_cap_mask;
657 port = in_mod & 0xff;
658 in_modifier = in_mod >> 8;
660 port_info = &priv->port[port];
662 /* Slaves cannot perform SET_PORT operations except changing MTU */
664 if (slave != dev->caps.function &&
665 in_modifier != MLX4_SET_PORT_GENERAL) {
666 mlx4_warn(dev, "denying SET_PORT for slave:%d\n",
670 switch (in_modifier) {
671 case MLX4_SET_PORT_RQP_CALC:
672 qpn_context = inbox->buf;
673 qpn_context->base_qpn =
674 cpu_to_be32(port_info->base_qpn);
675 qpn_context->n_mac = 0x7;
676 promisc = be32_to_cpu(qpn_context->promisc) >>
677 SET_PORT_PROMISC_SHIFT;
678 qpn_context->promisc = cpu_to_be32(
679 promisc << SET_PORT_PROMISC_SHIFT |
680 port_info->base_qpn);
681 promisc = be32_to_cpu(qpn_context->mcast) >>
682 SET_PORT_MC_PROMISC_SHIFT;
683 qpn_context->mcast = cpu_to_be32(
684 promisc << SET_PORT_MC_PROMISC_SHIFT |
685 port_info->base_qpn);
687 case MLX4_SET_PORT_GENERAL:
688 gen_context = inbox->buf;
689 /* Mtu is configured as the max MTU among all the
690 * the functions on the port. */
691 mtu = be16_to_cpu(gen_context->mtu);
692 mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port]);
693 prev_mtu = slave_st->mtu[port];
694 slave_st->mtu[port] = mtu;
695 if (mtu > master->max_mtu[port])
696 master->max_mtu[port] = mtu;
697 if (mtu < prev_mtu && prev_mtu ==
698 master->max_mtu[port]) {
699 slave_st->mtu[port] = mtu;
700 master->max_mtu[port] = mtu;
701 for (i = 0; i < dev->num_slaves; i++) {
702 master->max_mtu[port] =
703 max(master->max_mtu[port],
704 master->slave_state[i].mtu[port]);
708 gen_context->mtu = cpu_to_be16(master->max_mtu[port]);
711 return mlx4_cmd(dev, inbox->dma, in_mod, op_mod,
712 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
716 /* For IB, we only consider:
717 * - The capability mask, which is set to the aggregate of all
718 * slave function capabilities
719 * - The QKey violatin counter - reset according to each request.
722 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
723 reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40;
724 new_cap_mask = ((__be32 *) inbox->buf)[2];
726 reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1;
727 new_cap_mask = ((__be32 *) inbox->buf)[1];
732 priv->mfunc.master.slave_state[slave].ib_cap_mask[port];
733 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask;
734 for (i = 0; i < dev->num_slaves; i++)
736 priv->mfunc.master.slave_state[i].ib_cap_mask[port];
738 /* only clear mailbox for guests. Master may be setting
739 * MTU or PKEY table size
741 if (slave != dev->caps.function)
742 memset(inbox->buf, 0, 256);
743 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
744 *(u8 *) inbox->buf = !!reset_qkey_viols << 6;
745 ((__be32 *) inbox->buf)[2] = agg_cap_mask;
747 ((u8 *) inbox->buf)[3] = !!reset_qkey_viols;
748 ((__be32 *) inbox->buf)[1] = agg_cap_mask;
751 err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
752 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
754 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] =
759 int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,
760 struct mlx4_vhcr *vhcr,
761 struct mlx4_cmd_mailbox *inbox,
762 struct mlx4_cmd_mailbox *outbox,
763 struct mlx4_cmd_info *cmd)
765 return mlx4_common_set_port(dev, slave, vhcr->in_modifier,
766 vhcr->op_modifier, inbox);
769 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port)
771 struct mlx4_cmd_mailbox *mailbox;
774 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
777 mailbox = mlx4_alloc_cmd_mailbox(dev);
779 return PTR_ERR(mailbox);
781 memset(mailbox->buf, 0, 256);
783 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
784 err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
785 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
787 mlx4_free_cmd_mailbox(dev, mailbox);
791 int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
792 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx)
794 struct mlx4_cmd_mailbox *mailbox;
795 struct mlx4_set_port_general_context *context;
799 mailbox = mlx4_alloc_cmd_mailbox(dev);
801 return PTR_ERR(mailbox);
802 context = mailbox->buf;
803 memset(context, 0, sizeof *context);
805 context->flags = SET_PORT_GEN_ALL_VALID;
806 context->mtu = cpu_to_be16(mtu);
807 context->pptx = (pptx * (!pfctx)) << 7;
808 context->pfctx = pfctx;
809 context->pprx = (pprx * (!pfcrx)) << 7;
810 context->pfcrx = pfcrx;
812 in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
813 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
814 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
816 mlx4_free_cmd_mailbox(dev, mailbox);
819 EXPORT_SYMBOL(mlx4_SET_PORT_general);
821 int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
824 struct mlx4_cmd_mailbox *mailbox;
825 struct mlx4_set_port_rqp_calc_context *context;
828 u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ?
829 MCAST_DIRECT : MCAST_DEFAULT;
831 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER &&
832 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)
835 mailbox = mlx4_alloc_cmd_mailbox(dev);
837 return PTR_ERR(mailbox);
838 context = mailbox->buf;
839 memset(context, 0, sizeof *context);
841 context->base_qpn = cpu_to_be32(base_qpn);
842 context->n_mac = dev->caps.log_num_macs;
843 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
845 context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT |
847 context->intra_no_vlan = 0;
848 context->no_vlan = MLX4_NO_VLAN_IDX;
849 context->intra_vlan_miss = 0;
850 context->vlan_miss = MLX4_VLAN_MISS_IDX;
852 in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port;
853 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
854 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
856 mlx4_free_cmd_mailbox(dev, mailbox);
859 EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);
861 int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave,
862 struct mlx4_vhcr *vhcr,
863 struct mlx4_cmd_mailbox *inbox,
864 struct mlx4_cmd_mailbox *outbox,
865 struct mlx4_cmd_info *cmd)
872 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port,
873 u64 mac, u64 clear, u8 mode)
875 return mlx4_cmd(dev, (mac | (clear << 63)), port, mode,
876 MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B,
879 EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR);
881 int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave,
882 struct mlx4_vhcr *vhcr,
883 struct mlx4_cmd_mailbox *inbox,
884 struct mlx4_cmd_mailbox *outbox,
885 struct mlx4_cmd_info *cmd)
892 int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave,
893 u32 in_mod, struct mlx4_cmd_mailbox *outbox)
895 return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0,
896 MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
900 int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave,
901 struct mlx4_vhcr *vhcr,
902 struct mlx4_cmd_mailbox *inbox,
903 struct mlx4_cmd_mailbox *outbox,
904 struct mlx4_cmd_info *cmd)
906 if (slave != dev->caps.function)
908 return mlx4_common_dump_eth_stats(dev, slave,
909 vhcr->in_modifier, outbox);
912 void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap)
914 if (!mlx4_is_mfunc(dev)) {
919 *stats_bitmap = (MLX4_STATS_TRAFFIC_COUNTERS_MASK |
920 MLX4_STATS_TRAFFIC_DROPS_MASK |
921 MLX4_STATS_PORT_COUNTERS_MASK);
923 if (mlx4_is_master(dev))
924 *stats_bitmap |= MLX4_STATS_ERROR_COUNTERS_MASK;
926 EXPORT_SYMBOL(mlx4_set_stats_bitmap);