drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34 #include "en_accel/ipsec.h"
  35
  36 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
  37                                struct ethtool_drvinfo *drvinfo)
  38 {
  39         struct mlx5_core_dev *mdev = priv->mdev;
  40
  41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
  42         strlcpy(drvinfo->version, DRIVER_VERSION,
  43                 sizeof(drvinfo->version));
  44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  45                  "%d.%d.%04d (%.16s)",
  46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
  47                  mdev->board_id);
  48         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
  49                 sizeof(drvinfo->bus_info));
  50 }
  51
  52 static void mlx5e_get_drvinfo(struct net_device *dev,
  53                               struct ethtool_drvinfo *drvinfo)
  54 {
  55         struct mlx5e_priv *priv = netdev_priv(dev);
  56
  57         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
  58 }
  59
  60 struct ptys2ethtool_config {
  61         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  62         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  63         u32 speed;
  64 };
  65
  66 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
  67
  68 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
  69         ({                                                              \
  70                 struct ptys2ethtool_config *cfg;                        \
  71                 const unsigned int modes[] = { __VA_ARGS__ };           \
  72                 unsigned int i;                                         \
  73                 cfg = &ptys2ethtool_table[reg_];                        \
  74                 cfg->speed = speed_;                                    \
  75                 bitmap_zero(cfg->supported,                             \
  76                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  77                 bitmap_zero(cfg->advertised,                            \
  78                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  79                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  80                         __set_bit(modes[i], cfg->supported);            \
  81                         __set_bit(modes[i], cfg->advertised);           \
  82                 }                                                       \
  83         })
  84
  85 void mlx5e_build_ptys2ethtool_map(void)
  86 {
  87         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
  88                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  89         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
  90                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  91         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
  92                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  93         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
  94                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  95         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
  96                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
  97         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
  98                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
  99         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
 100                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 101         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
 102                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 103         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
 104                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 105         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
 106                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 107         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
 108                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 109         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
 110                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 111         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
 112                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 113         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
 114                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 115         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
 116                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 117         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
 118                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 119         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
 120                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 121         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
 122                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 123         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
 124                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 125         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
 126                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 127         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
 128                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 129         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
 130                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 131         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
 132                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 133         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
 134                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 135         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
 136                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 137 }
 138
 139 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
 140 {
 141         struct mlx5_core_dev *mdev = priv->mdev;
 142         u8 pfc_en_tx;
 143         u8 pfc_en_rx;
 144         int err;
 145
 146         if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
 147                 return 0;
 148
 149         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
 150
 151         return err ? 0 : pfc_en_tx | pfc_en_rx;
 152 }
 153
 154 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
 155 {
 156         struct mlx5_core_dev *mdev = priv->mdev;
 157         u32 rx_pause;
 158         u32 tx_pause;
 159         int err;
 160
 161         if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
 162                 return false;
 163
 164         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 165
 166         return err ? false : rx_pause | tx_pause;
 167 }
 168
 169 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
 170 #define MLX5E_NUM_RQ_STATS(priv) (NUM_RQ_STATS * (priv)->channels.num)
 171 #define MLX5E_NUM_SQ_STATS(priv) \
 172         (NUM_SQ_STATS * (priv)->channels.num * (priv)->channels.params.num_tc)
 173 #define MLX5E_NUM_PFC_COUNTERS(priv) \
 174         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
 175           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
 176
 177 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
 178 {
 179
 180         switch (sset) {
 181         case ETH_SS_STATS:
 182                 return NUM_SW_COUNTERS +
 183                        MLX5E_NUM_Q_CNTRS(priv) +
 184                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS(priv) +
 185                        NUM_PCIE_COUNTERS(priv) +
 186                        MLX5E_NUM_RQ_STATS(priv) +
 187                        MLX5E_NUM_SQ_STATS(priv) +
 188                        MLX5E_NUM_PFC_COUNTERS(priv) +
 189                        ARRAY_SIZE(mlx5e_pme_status_desc) +
 190                        ARRAY_SIZE(mlx5e_pme_error_desc) +
 191                        mlx5e_ipsec_get_count(priv);
 192
 193         case ETH_SS_PRIV_FLAGS:
 194                 return ARRAY_SIZE(mlx5e_priv_flags);
 195         case ETH_SS_TEST:
 196                 return mlx5e_self_test_num(priv);
 197         /* fallthrough */
 198         default:
 199                 return -EOPNOTSUPP;
 200         }
 201 }
 202
 203 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 204 {
 205         struct mlx5e_priv *priv = netdev_priv(dev);
 206
 207         return mlx5e_ethtool_get_sset_count(priv, sset);
 208 }
 209
 210 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
 211 {
 212         int i, j, tc, prio, idx = 0;
 213         unsigned long pfc_combined;
 214
 215         /* SW counters */
 216         for (i = 0; i < NUM_SW_COUNTERS; i++)
 217                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
 218
 219         /* Q counters */
 220         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
 221                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
 222
 223         /* VPORT counters */
 224         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
 225                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 226                        vport_stats_desc[i].format);
 227
 228         /* PPORT counters */
 229         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
 230                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 231                        pport_802_3_stats_desc[i].format);
 232
 233         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
 234                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 235                        pport_2863_stats_desc[i].format);
 236
 237         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
 238                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 239                        pport_2819_stats_desc[i].format);
 240
 241         for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv); i++)
 242                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 243                        pport_phy_statistical_stats_desc[i].format);
 244
 245         for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
 246                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 247                        pcie_perf_stats_desc[i].format);
 248
 249         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
 250                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
 251                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 252                                 pport_per_prio_traffic_stats_desc[i].format, prio);
 253         }
 254
 255         pfc_combined = mlx5e_query_pfc_combined(priv);
 256         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
 257                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 258                         char pfc_string[ETH_GSTRING_LEN];
 259
 260                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
 261                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 262                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
 263                 }
 264         }
 265
 266         if (mlx5e_query_global_pause_combined(priv)) {
 267                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 268                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 269                                 pport_per_prio_pfc_stats_desc[i].format, "global");
 270                 }
 271         }
 272
 273         /* port module event counters */
 274         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_status_desc); i++)
 275                 strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format);
 276
 277         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
 278                 strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format);
 279
 280         /* IPSec counters */
 281         idx += mlx5e_ipsec_get_strings(priv, data + idx * ETH_GSTRING_LEN);
 282
 283         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
 284                 return;
 285
 286         /* per channel counters */
 287         for (i = 0; i < priv->channels.num; i++)
 288                 for (j = 0; j < NUM_RQ_STATS; j++)
 289                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 290                                 rq_stats_desc[j].format, i);
 291
 292         for (tc = 0; tc < priv->channels.params.num_tc; tc++)
 293                 for (i = 0; i < priv->channels.num; i++)
 294                         for (j = 0; j < NUM_SQ_STATS; j++)
 295                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
 296                                         sq_stats_desc[j].format,
 297                                         priv->channel_tc2txq[i][tc]);
 298 }
 299
 300 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv,
 301                                uint32_t stringset, uint8_t *data)
 302 {
 303         int i;
 304
 305         switch (stringset) {
 306         case ETH_SS_PRIV_FLAGS:
 307                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
 308                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
 309                 break;
 310
 311         case ETH_SS_TEST:
 312                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
 313                         strcpy(data + i * ETH_GSTRING_LEN,
 314                                mlx5e_self_tests[i]);
 315                 break;
 316
 317         case ETH_SS_STATS:
 318                 mlx5e_fill_stats_strings(priv, data);
 319                 break;
 320         }
 321 }
 322
 323 static void mlx5e_get_strings(struct net_device *dev,
 324                               uint32_t stringset, uint8_t *data)
 325 {
 326         struct mlx5e_priv *priv = netdev_priv(dev);
 327
 328         mlx5e_ethtool_get_strings(priv, stringset, data);
 329 }
 330
 331 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
 332                                      struct ethtool_stats *stats, u64 *data)
 333 {
 334         struct mlx5e_channels *channels;
 335         struct mlx5_priv *mlx5_priv;
 336         int i, j, tc, prio, idx = 0;
 337         unsigned long pfc_combined;
 338
 339         if (!data)
 340                 return;
 341
 342         mutex_lock(&priv->state_lock);
 343         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
 344                 mlx5e_update_stats(priv, true);
 345         channels = &priv->channels;
 346         mutex_unlock(&priv->state_lock);
 347
 348         for (i = 0; i < NUM_SW_COUNTERS; i++)
 349                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
 350                                                    sw_stats_desc, i);
 351
 352         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
 353                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
 354                                                    q_stats_desc, i);
 355
 356         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
 357                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
 358                                                   vport_stats_desc, i);
 359
 360         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
 361                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
 362                                                   pport_802_3_stats_desc, i);
 363
 364         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
 365                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
 366                                                   pport_2863_stats_desc, i);
 367
 368         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
 369                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
 370                                                   pport_2819_stats_desc, i);
 371
 372         for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv); i++)
 373                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters,
 374                                                   pport_phy_statistical_stats_desc, i);
 375
 376         for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
 377                 data[idx++] = MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
 378                                                   pcie_perf_stats_desc, i);
 379
 380         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
 381                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
 382                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
 383                                                  pport_per_prio_traffic_stats_desc, i);
 384         }
 385
 386         pfc_combined = mlx5e_query_pfc_combined(priv);
 387         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
 388                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 389                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
 390                                                           pport_per_prio_pfc_stats_desc, i);
 391                 }
 392         }
 393
 394         if (mlx5e_query_global_pause_combined(priv)) {
 395                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 396                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
 397                                                           pport_per_prio_pfc_stats_desc, i);
 398                 }
 399         }
 400
 401         /* port module event counters */
 402         mlx5_priv =  &priv->mdev->priv;
 403         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_status_desc); i++)
 404                 data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters,
 405                                                    mlx5e_pme_status_desc, i);
 406
 407         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
 408                 data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters,
 409                                                    mlx5e_pme_error_desc, i);
 410
 411         /* IPSec counters */
 412         idx += mlx5e_ipsec_get_stats(priv, data + idx);
 413
 414         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
 415                 return;
 416
 417         /* per channel counters */
 418         for (i = 0; i < channels->num; i++)
 419                 for (j = 0; j < NUM_RQ_STATS; j++)
 420                         data[idx++] =
 421                                MLX5E_READ_CTR64_CPU(&channels->c[i]->rq.stats,
 422                                                     rq_stats_desc, j);
 423
 424         for (tc = 0; tc < priv->channels.params.num_tc; tc++)
 425                 for (i = 0; i < channels->num; i++)
 426                         for (j = 0; j < NUM_SQ_STATS; j++)
 427                                 data[idx++] = MLX5E_READ_CTR64_CPU(&channels->c[i]->sq[tc].stats,
 428                                                                    sq_stats_desc, j);
 429 }
 430
 431 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 432                                     struct ethtool_stats *stats,
 433                                     u64 *data)
 434 {
 435         struct mlx5e_priv *priv = netdev_priv(dev);
 436
 437         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
 438 }
 439
 440 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
 441                                     int num_wqe)
 442 {
 443         int packets_per_wqe;
 444         int stride_size;
 445         int num_strides;
 446         int wqe_size;
 447
 448         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
 449                 return num_wqe;
 450
 451         stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
 452         num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
 453         wqe_size = stride_size * num_strides;
 454
 455         packets_per_wqe = wqe_size /
 456                           ALIGN(ETH_DATA_LEN, stride_size);
 457         return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
 458 }
 459
 460 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
 461                                     int num_packets)
 462 {
 463         int packets_per_wqe;
 464         int stride_size;
 465         int num_strides;
 466         int wqe_size;
 467         int num_wqes;
 468
 469         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
 470                 return num_packets;
 471
 472         stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
 473         num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
 474         wqe_size = stride_size * num_strides;
 475
 476         num_packets = (1 << order_base_2(num_packets));
 477
 478         packets_per_wqe = wqe_size /
 479                           ALIGN(ETH_DATA_LEN, stride_size);
 480         num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
 481         return 1 << (order_base_2(num_wqes));
 482 }
 483
 484 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
 485                                  struct ethtool_ringparam *param)
 486 {
 487         int rq_wq_type = priv->channels.params.rq_wq_type;
 488
 489         param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 490                                                          1 << mlx5_max_log_rq_size(rq_wq_type));
 491         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 492         param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 493                                                      1 << priv->channels.params.log_rq_size);
 494         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
 495 }
 496
 497 static void mlx5e_get_ringparam(struct net_device *dev,
 498                                 struct ethtool_ringparam *param)
 499 {
 500         struct mlx5e_priv *priv = netdev_priv(dev);
 501
 502         mlx5e_ethtool_get_ringparam(priv, param);
 503 }
 504
 505 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
 506                                 struct ethtool_ringparam *param)
 507 {
 508         int rq_wq_type = priv->channels.params.rq_wq_type;
 509         struct mlx5e_channels new_channels = {};
 510         u32 rx_pending_wqes;
 511         u32 min_rq_size;
 512         u32 max_rq_size;
 513         u8 log_rq_size;
 514         u8 log_sq_size;
 515         u32 num_mtts;
 516         int err = 0;
 517
 518         if (param->rx_jumbo_pending) {
 519                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
 520                             __func__);
 521                 return -EINVAL;
 522         }
 523         if (param->rx_mini_pending) {
 524                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
 525                             __func__);
 526                 return -EINVAL;
 527         }
 528
 529         min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 530                                                1 << mlx5_min_log_rq_size(rq_wq_type));
 531         max_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 532                                                1 << mlx5_max_log_rq_size(rq_wq_type));
 533         rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
 534                                                    param->rx_pending);
 535
 536         if (param->rx_pending < min_rq_size) {
 537                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
 538                             __func__, param->rx_pending,
 539                             min_rq_size);
 540                 return -EINVAL;
 541         }
 542         if (param->rx_pending > max_rq_size) {
 543                 netdev_info(priv->netdev, "%s: rx_pending (%d) > max (%d)\n",
 544                             __func__, param->rx_pending,
 545                             max_rq_size);
 546                 return -EINVAL;
 547         }
 548
 549         num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes);
 550         if (priv->channels.params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
 551             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
 552                 netdev_info(priv->netdev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
 553                             __func__, param->rx_pending);
 554                 return -EINVAL;
 555         }
 556
 557         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 558                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
 559                             __func__, param->tx_pending,
 560                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 561                 return -EINVAL;
 562         }
 563         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
 564                 netdev_info(priv->netdev, "%s: tx_pending (%d) > max (%d)\n",
 565                             __func__, param->tx_pending,
 566                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
 567                 return -EINVAL;
 568         }
 569
 570         log_rq_size = order_base_2(rx_pending_wqes);
 571         log_sq_size = order_base_2(param->tx_pending);
 572
 573         if (log_rq_size == priv->channels.params.log_rq_size &&
 574             log_sq_size == priv->channels.params.log_sq_size)
 575                 return 0;
 576
 577         mutex_lock(&priv->state_lock);
 578
 579         new_channels.params = priv->channels.params;
 580         new_channels.params.log_rq_size = log_rq_size;
 581         new_channels.params.log_sq_size = log_sq_size;
 582
 583         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 584                 priv->channels.params = new_channels.params;
 585                 goto unlock;
 586         }
 587
 588         err = mlx5e_open_channels(priv, &new_channels);
 589         if (err)
 590                 goto unlock;
 591
 592         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
 593
 594 unlock:
 595         mutex_unlock(&priv->state_lock);
 596
 597         return err;
 598 }
 599
 600 static int mlx5e_set_ringparam(struct net_device *dev,
 601                                struct ethtool_ringparam *param)
 602 {
 603         struct mlx5e_priv *priv = netdev_priv(dev);
 604
 605         return mlx5e_ethtool_set_ringparam(priv, param);
 606 }
 607
 608 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
 609                                 struct ethtool_channels *ch)
 610 {
 611         ch->max_combined   = priv->profile->max_nch(priv->mdev);
 612         ch->combined_count = priv->channels.params.num_channels;
 613 }
 614
 615 static void mlx5e_get_channels(struct net_device *dev,
 616                                struct ethtool_channels *ch)
 617 {
 618         struct mlx5e_priv *priv = netdev_priv(dev);
 619
 620         mlx5e_ethtool_get_channels(priv, ch);
 621 }
 622
 623 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
 624                                struct ethtool_channels *ch)
 625 {
 626         unsigned int count = ch->combined_count;
 627         struct mlx5e_channels new_channels = {};
 628         bool arfs_enabled;
 629         int err = 0;
 630
 631         if (!count) {
 632                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
 633                             __func__);
 634                 return -EINVAL;
 635         }
 636
 637         if (priv->channels.params.num_channels == count)
 638                 return 0;
 639
 640         mutex_lock(&priv->state_lock);
 641
 642         new_channels.params = priv->channels.params;
 643         new_channels.params.num_channels = count;
 644         if (!netif_is_rxfh_configured(priv->netdev))
 645                 mlx5e_build_default_indir_rqt(priv->mdev,
 646                                               new_channels.params.indirection_rqt,
 647                                               MLX5E_INDIR_RQT_SIZE, count);
 648
 649         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 650                 priv->channels.params = new_channels.params;
 651                 goto out;
 652         }
 653
 654         /* Create fresh channels with new parameters */
 655         err = mlx5e_open_channels(priv, &new_channels);
 656         if (err)
 657                 goto out;
 658
 659         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
 660         if (arfs_enabled)
 661                 mlx5e_arfs_disable(priv);
 662
 663         /* Switch to new channels, set new parameters and close old ones */
 664         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
 665
 666         if (arfs_enabled) {
 667                 err = mlx5e_arfs_enable(priv);
 668                 if (err)
 669                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
 670                                    __func__, err);
 671         }
 672
 673 out:
 674         mutex_unlock(&priv->state_lock);
 675
 676         return err;
 677 }
 678
 679 static int mlx5e_set_channels(struct net_device *dev,
 680                               struct ethtool_channels *ch)
 681 {
 682         struct mlx5e_priv *priv = netdev_priv(dev);
 683
 684         return mlx5e_ethtool_set_channels(priv, ch);
 685 }
 686
 687 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
 688                                struct ethtool_coalesce *coal)
 689 {
 690         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 691                 return -EOPNOTSUPP;
 692
 693         coal->rx_coalesce_usecs       = priv->channels.params.rx_cq_moderation.usec;
 694         coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts;
 695         coal->tx_coalesce_usecs       = priv->channels.params.tx_cq_moderation.usec;
 696         coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts;
 697         coal->use_adaptive_rx_coalesce = priv->channels.params.rx_am_enabled;
 698
 699         return 0;
 700 }
 701
 702 static int mlx5e_get_coalesce(struct net_device *netdev,
 703                               struct ethtool_coalesce *coal)
 704 {
 705         struct mlx5e_priv *priv = netdev_priv(netdev);
 706
 707         return mlx5e_ethtool_get_coalesce(priv, coal);
 708 }
 709
 710 static void
 711 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 712 {
 713         struct mlx5_core_dev *mdev = priv->mdev;
 714         int tc;
 715         int i;
 716
 717         for (i = 0; i < priv->channels.num; ++i) {
 718                 struct mlx5e_channel *c = priv->channels.c[i];
 719
 720                 for (tc = 0; tc < c->num_tc; tc++) {
 721                         mlx5_core_modify_cq_moderation(mdev,
 722                                                 &c->sq[tc].cq.mcq,
 723                                                 coal->tx_coalesce_usecs,
 724                                                 coal->tx_max_coalesced_frames);
 725                 }
 726
 727                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 728                                                coal->rx_coalesce_usecs,
 729                                                coal->rx_max_coalesced_frames);
 730         }
 731 }
 732
 733 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
 734                                struct ethtool_coalesce *coal)
 735 {
 736         struct mlx5_core_dev *mdev = priv->mdev;
 737         struct mlx5e_channels new_channels = {};
 738         int err = 0;
 739         bool reset;
 740
 741         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 742                 return -EOPNOTSUPP;
 743
 744         mutex_lock(&priv->state_lock);
 745         new_channels.params = priv->channels.params;
 746
 747         new_channels.params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
 748         new_channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
 749         new_channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
 750         new_channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
 751         new_channels.params.rx_am_enabled         = !!coal->use_adaptive_rx_coalesce;
 752
 753         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 754                 priv->channels.params = new_channels.params;
 755                 goto out;
 756         }
 757         /* we are opened */
 758
 759         reset = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_am_enabled;
 760         if (!reset) {
 761                 mlx5e_set_priv_channels_coalesce(priv, coal);
 762                 priv->channels.params = new_channels.params;
 763                 goto out;
 764         }
 765
 766         /* open fresh channels with new coal parameters */
 767         err = mlx5e_open_channels(priv, &new_channels);
 768         if (err)
 769                 goto out;
 770
 771         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
 772
 773 out:
 774         mutex_unlock(&priv->state_lock);
 775         return err;
 776 }
 777
 778 static int mlx5e_set_coalesce(struct net_device *netdev,
 779                               struct ethtool_coalesce *coal)
 780 {
 781         struct mlx5e_priv *priv    = netdev_priv(netdev);
 782
 783         return mlx5e_ethtool_set_coalesce(priv, coal);
 784 }
 785
 786 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
 787                                         u32 eth_proto_cap)
 788 {
 789         unsigned long proto_cap = eth_proto_cap;
 790         int proto;
 791
 792         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
 793                 bitmap_or(supported_modes, supported_modes,
 794                           ptys2ethtool_table[proto].supported,
 795                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 796 }
 797
 798 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 799                                     u32 eth_proto_cap)
 800 {
 801         unsigned long proto_cap = eth_proto_cap;
 802         int proto;
 803
 804         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
 805                 bitmap_or(advertising_modes, advertising_modes,
 806                           ptys2ethtool_table[proto].advertised,
 807                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 808 }
 809
 810 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
 811                                                    u32 eth_proto_cap,
 812                                                    u8 connector_type)
 813 {
 814         if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
 815                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 816                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 817                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 818                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 819                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 820                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 821                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 822                                                              supported,
 823                                                              FIBRE);
 824                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 825                                                              advertising,
 826                                                              FIBRE);
 827                 }
 828
 829                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 830                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 831                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 832                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 833                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 834                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 835                                                              supported,
 836                                                              Backplane);
 837                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 838                                                              advertising,
 839                                                              Backplane);
 840                 }
 841                 return;
 842         }
 843
 844         switch (connector_type) {
 845         case MLX5E_PORT_TP:
 846                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 847                                                      supported, TP);
 848                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 849                                                      advertising, TP);
 850                 break;
 851         case MLX5E_PORT_AUI:
 852                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 853                                                      supported, AUI);
 854                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 855                                                      advertising, AUI);
 856                 break;
 857         case MLX5E_PORT_BNC:
 858                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 859                                                      supported, BNC);
 860                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 861                                                      advertising, BNC);
 862                 break;
 863         case MLX5E_PORT_MII:
 864                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 865                                                      supported, MII);
 866                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 867                                                      advertising, MII);
 868                 break;
 869         case MLX5E_PORT_FIBRE:
 870                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 871                                                      supported, FIBRE);
 872                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 873                                                      advertising, FIBRE);
 874                 break;
 875         case MLX5E_PORT_DA:
 876                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 877                                                      supported, Backplane);
 878                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 879                                                      advertising, Backplane);
 880                 break;
 881         case MLX5E_PORT_NONE:
 882         case MLX5E_PORT_OTHER:
 883         default:
 884                 break;
 885         }
 886 }
 887
 888 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
 889 {
 890         u32 max_speed = 0;
 891         u32 proto_cap;
 892         int err;
 893         int i;
 894
 895         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
 896         if (err)
 897                 return err;
 898
 899         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
 900                 if (proto_cap & MLX5E_PROT_MASK(i))
 901                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
 902
 903         *speed = max_speed;
 904         return 0;
 905 }
 906
 907 static void get_speed_duplex(struct net_device *netdev,
 908                              u32 eth_proto_oper,
 909                              struct ethtool_link_ksettings *link_ksettings)
 910 {
 911         int i;
 912         u32 speed = SPEED_UNKNOWN;
 913         u8 duplex = DUPLEX_UNKNOWN;
 914
 915         if (!netif_carrier_ok(netdev))
 916                 goto out;
 917
 918         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 919                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
 920                         speed = ptys2ethtool_table[i].speed;
 921                         duplex = DUPLEX_FULL;
 922                         break;
 923                 }
 924         }
 925 out:
 926         link_ksettings->base.speed = speed;
 927         link_ksettings->base.duplex = duplex;
 928 }
 929
 930 static void get_supported(u32 eth_proto_cap,
 931                           struct ethtool_link_ksettings *link_ksettings)
 932 {
 933         unsigned long *supported = link_ksettings->link_modes.supported;
 934
 935         ptys2ethtool_supported_link(supported, eth_proto_cap);
 936         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 937 }
 938
 939 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
 940                             u8 rx_pause,
 941                             struct ethtool_link_ksettings *link_ksettings)
 942 {
 943         unsigned long *advertising = link_ksettings->link_modes.advertising;
 944
 945         ptys2ethtool_adver_link(advertising, eth_proto_cap);
 946         if (rx_pause)
 947                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 948         if (tx_pause ^ rx_pause)
 949                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 950 }
 951
 952 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
 953                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
 954                 [MLX5E_PORT_NONE]               = PORT_NONE,
 955                 [MLX5E_PORT_TP]                 = PORT_TP,
 956                 [MLX5E_PORT_AUI]                = PORT_AUI,
 957                 [MLX5E_PORT_BNC]                = PORT_BNC,
 958                 [MLX5E_PORT_MII]                = PORT_MII,
 959                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
 960                 [MLX5E_PORT_DA]                 = PORT_DA,
 961                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
 962         };
 963
 964 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
 965 {
 966         if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
 967                 return ptys2connector_type[connector_type];
 968
 969         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 970                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 971                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 972                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 973                         return PORT_FIBRE;
 974         }
 975
 976         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 977                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 978                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 979                         return PORT_DA;
 980         }
 981
 982         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 983                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 984                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 985                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 986                         return PORT_NONE;
 987         }
 988
 989         return PORT_OTHER;
 990 }
 991
 992 static void get_lp_advertising(u32 eth_proto_lp,
 993                                struct ethtool_link_ksettings *link_ksettings)
 994 {
 995         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 996
 997         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
 998 }
 999
1000 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1001                                     struct ethtool_link_ksettings *link_ksettings)
1002 {
1003         struct mlx5e_priv *priv    = netdev_priv(netdev);
1004         struct mlx5_core_dev *mdev = priv->mdev;
1005         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
1006         u32 rx_pause = 0;
1007         u32 tx_pause = 0;
1008         u32 eth_proto_cap;
1009         u32 eth_proto_admin;
1010         u32 eth_proto_lp;
1011         u32 eth_proto_oper;
1012         u8 an_disable_admin;
1013         u8 an_status;
1014         u8 connector_type;
1015         int err;
1016
1017         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
1018         if (err) {
1019                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
1020                            __func__, err);
1021                 goto err_query_ptys;
1022         }
1023
1024         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
1025         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
1026         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
1027         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
1028         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
1029         an_status        = MLX5_GET(ptys_reg, out, an_status);
1030         connector_type   = MLX5_GET(ptys_reg, out, connector_type);
1031
1032         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
1033
1034         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
1035         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
1036
1037         get_supported(eth_proto_cap, link_ksettings);
1038         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
1039         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
1040
1041         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1042
1043         link_ksettings->base.port = get_connector_port(eth_proto_oper,
1044                                                        connector_type);
1045         ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
1046                                                connector_type);
1047         get_lp_advertising(eth_proto_lp, link_ksettings);
1048
1049         if (an_status == MLX5_AN_COMPLETE)
1050                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1051                                                      lp_advertising, Autoneg);
1052
1053         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
1054                                                           AUTONEG_ENABLE;
1055         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
1056                                              Autoneg);
1057         if (!an_disable_admin)
1058                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1059                                                      advertising, Autoneg);
1060
1061 err_query_ptys:
1062         return err;
1063 }
1064
1065 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1066 {
1067         u32 i, ptys_modes = 0;
1068
1069         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1070                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
1071                                       link_modes,
1072                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
1073                         ptys_modes |= MLX5E_PROT_MASK(i);
1074         }
1075
1076         return ptys_modes;
1077 }
1078
1079 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
1080 {
1081         u32 i, speed_links = 0;
1082
1083         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1084                 if (ptys2ethtool_table[i].speed == speed)
1085                         speed_links |= MLX5E_PROT_MASK(i);
1086         }
1087
1088         return speed_links;
1089 }
1090
1091 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1092                                     const struct ethtool_link_ksettings *link_ksettings)
1093 {
1094         struct mlx5e_priv *priv    = netdev_priv(netdev);
1095         struct mlx5_core_dev *mdev = priv->mdev;
1096         u32 eth_proto_cap, eth_proto_admin;
1097         bool an_changes = false;
1098         u8 an_disable_admin;
1099         u8 an_disable_cap;
1100         bool an_disable;
1101         u32 link_modes;
1102         u8 an_status;
1103         u32 speed;
1104         int err;
1105
1106         speed = link_ksettings->base.speed;
1107
1108         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
1109                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
1110                 mlx5e_ethtool2ptys_speed_link(speed);
1111
1112         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
1113         if (err) {
1114                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
1115                            __func__, err);
1116                 goto out;
1117         }
1118
1119         link_modes = link_modes & eth_proto_cap;
1120         if (!link_modes) {
1121                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
1122                            __func__);
1123                 err = -EINVAL;
1124                 goto out;
1125         }
1126
1127         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
1128         if (err) {
1129                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
1130                            __func__, err);
1131                 goto out;
1132         }
1133
1134         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
1135                                 &an_disable_cap, &an_disable_admin);
1136
1137         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
1138         an_changes = ((!an_disable && an_disable_admin) ||
1139                       (an_disable && !an_disable_admin));
1140
1141         if (!an_changes && link_modes == eth_proto_admin)
1142                 goto out;
1143
1144         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
1145         mlx5_toggle_port_link(mdev);
1146
1147 out:
1148         return err;
1149 }
1150
1151 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1152 {
1153         struct mlx5e_priv *priv = netdev_priv(netdev);
1154
1155         return sizeof(priv->channels.params.toeplitz_hash_key);
1156 }
1157
1158 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1159 {
1160         return MLX5E_INDIR_RQT_SIZE;
1161 }
1162
1163 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1164                           u8 *hfunc)
1165 {
1166         struct mlx5e_priv *priv = netdev_priv(netdev);
1167
1168         if (indir)
1169                 memcpy(indir, priv->channels.params.indirection_rqt,
1170                        sizeof(priv->channels.params.indirection_rqt));
1171
1172         if (key)
1173                 memcpy(key, priv->channels.params.toeplitz_hash_key,
1174                        sizeof(priv->channels.params.toeplitz_hash_key));
1175
1176         if (hfunc)
1177                 *hfunc = priv->channels.params.rss_hfunc;
1178
1179         return 0;
1180 }
1181
1182 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
1183 {
1184         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
1185         struct mlx5_core_dev *mdev = priv->mdev;
1186         int ctxlen = MLX5_ST_SZ_BYTES(tirc);
1187         int tt;
1188
1189         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
1190
1191         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
1192                 memset(tirc, 0, ctxlen);
1193                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc);
1194                 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
1195         }
1196 }
1197
1198 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1199                           const u8 *key, const u8 hfunc)
1200 {
1201         struct mlx5e_priv *priv = netdev_priv(dev);
1202         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1203         bool hash_changed = false;
1204         void *in;
1205
1206         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1207             (hfunc != ETH_RSS_HASH_XOR) &&
1208             (hfunc != ETH_RSS_HASH_TOP))
1209                 return -EINVAL;
1210
1211         in = kvzalloc(inlen, GFP_KERNEL);
1212         if (!in)
1213                 return -ENOMEM;
1214
1215         mutex_lock(&priv->state_lock);
1216
1217         if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
1218             hfunc != priv->channels.params.rss_hfunc) {
1219                 priv->channels.params.rss_hfunc = hfunc;
1220                 hash_changed = true;
1221         }
1222
1223         if (indir) {
1224                 memcpy(priv->channels.params.indirection_rqt, indir,
1225                        sizeof(priv->channels.params.indirection_rqt));
1226
1227                 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1228                         u32 rqtn = priv->indir_rqt.rqtn;
1229                         struct mlx5e_redirect_rqt_param rrp = {
1230                                 .is_rss = true,
1231                                 {
1232                                         .rss = {
1233                                                 .hfunc = priv->channels.params.rss_hfunc,
1234                                                 .channels  = &priv->channels,
1235                                         },
1236                                 },
1237                         };
1238
1239                         mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1240                 }
1241         }
1242
1243         if (key) {
1244                 memcpy(priv->channels.params.toeplitz_hash_key, key,
1245                        sizeof(priv->channels.params.toeplitz_hash_key));
1246                 hash_changed = hash_changed ||
1247                                priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
1248         }
1249
1250         if (hash_changed)
1251                 mlx5e_modify_tirs_hash(priv, in, inlen);
1252
1253         mutex_unlock(&priv->state_lock);
1254
1255         kvfree(in);
1256
1257         return 0;
1258 }
1259
1260 static int mlx5e_get_rxnfc(struct net_device *netdev,
1261                            struct ethtool_rxnfc *info, u32 *rule_locs)
1262 {
1263         struct mlx5e_priv *priv = netdev_priv(netdev);
1264         int err = 0;
1265
1266         switch (info->cmd) {
1267         case ETHTOOL_GRXRINGS:
1268                 info->data = priv->channels.params.num_channels;
1269                 break;
1270         case ETHTOOL_GRXCLSRLCNT:
1271                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1272                 break;
1273         case ETHTOOL_GRXCLSRULE:
1274                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1275                 break;
1276         case ETHTOOL_GRXCLSRLALL:
1277                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1278                 break;
1279         default:
1280                 err = -EOPNOTSUPP;
1281                 break;
1282         }
1283
1284         return err;
1285 }
1286
1287 static int mlx5e_get_tunable(struct net_device *dev,
1288                              const struct ethtool_tunable *tuna,
1289                              void *data)
1290 {
1291         const struct mlx5e_priv *priv = netdev_priv(dev);
1292         int err = 0;
1293
1294         switch (tuna->id) {
1295         case ETHTOOL_TX_COPYBREAK:
1296                 *(u32 *)data = priv->channels.params.tx_max_inline;
1297                 break;
1298         default:
1299                 err = -EINVAL;
1300                 break;
1301         }
1302
1303         return err;
1304 }
1305
1306 static int mlx5e_set_tunable(struct net_device *dev,
1307                              const struct ethtool_tunable *tuna,
1308                              const void *data)
1309 {
1310         struct mlx5e_priv *priv = netdev_priv(dev);
1311         struct mlx5_core_dev *mdev = priv->mdev;
1312         struct mlx5e_channels new_channels = {};
1313         int err = 0;
1314         u32 val;
1315
1316         mutex_lock(&priv->state_lock);
1317
1318         switch (tuna->id) {
1319         case ETHTOOL_TX_COPYBREAK:
1320                 val = *(u32 *)data;
1321                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1322                         err = -EINVAL;
1323                         break;
1324                 }
1325
1326                 new_channels.params = priv->channels.params;
1327                 new_channels.params.tx_max_inline = val;
1328
1329                 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1330                         priv->channels.params = new_channels.params;
1331                         break;
1332                 }
1333
1334                 err = mlx5e_open_channels(priv, &new_channels);
1335                 if (err)
1336                         break;
1337                 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1338
1339                 break;
1340         default:
1341                 err = -EINVAL;
1342                 break;
1343         }
1344
1345         mutex_unlock(&priv->state_lock);
1346         return err;
1347 }
1348
1349 static void mlx5e_get_pauseparam(struct net_device *netdev,
1350                                  struct ethtool_pauseparam *pauseparam)
1351 {
1352         struct mlx5e_priv *priv    = netdev_priv(netdev);
1353         struct mlx5_core_dev *mdev = priv->mdev;
1354         int err;
1355
1356         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1357                                     &pauseparam->tx_pause);
1358         if (err) {
1359                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1360                            __func__, err);
1361         }
1362 }
1363
1364 static int mlx5e_set_pauseparam(struct net_device *netdev,
1365                                 struct ethtool_pauseparam *pauseparam)
1366 {
1367         struct mlx5e_priv *priv    = netdev_priv(netdev);
1368         struct mlx5_core_dev *mdev = priv->mdev;
1369         int err;
1370
1371         if (pauseparam->autoneg)
1372                 return -EINVAL;
1373
1374         err = mlx5_set_port_pause(mdev,
1375                                   pauseparam->rx_pause ? 1 : 0,
1376                                   pauseparam->tx_pause ? 1 : 0);
1377         if (err) {
1378                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1379                            __func__, err);
1380         }
1381
1382         return err;
1383 }
1384
1385 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1386                               struct ethtool_ts_info *info)
1387 {
1388         int ret;
1389
1390         ret = ethtool_op_get_ts_info(priv->netdev, info);
1391         if (ret)
1392                 return ret;
1393
1394         info->phc_index = priv->tstamp.ptp ?
1395                           ptp_clock_index(priv->tstamp.ptp) : -1;
1396
1397         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1398                 return 0;
1399
1400         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1401                                  SOF_TIMESTAMPING_RX_HARDWARE |
1402                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1403
1404         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1405                          BIT(HWTSTAMP_TX_ON);
1406
1407         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1408                            BIT(HWTSTAMP_FILTER_ALL);
1409
1410         return 0;
1411 }
1412
1413 static int mlx5e_get_ts_info(struct net_device *dev,
1414                              struct ethtool_ts_info *info)
1415 {
1416         struct mlx5e_priv *priv = netdev_priv(dev);
1417
1418         return mlx5e_ethtool_get_ts_info(priv, info);
1419 }
1420
1421 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1422 {
1423         __u32 ret = 0;
1424
1425         if (MLX5_CAP_GEN(mdev, wol_g))
1426                 ret |= WAKE_MAGIC;
1427
1428         if (MLX5_CAP_GEN(mdev, wol_s))
1429                 ret |= WAKE_MAGICSECURE;
1430
1431         if (MLX5_CAP_GEN(mdev, wol_a))
1432                 ret |= WAKE_ARP;
1433
1434         if (MLX5_CAP_GEN(mdev, wol_b))
1435                 ret |= WAKE_BCAST;
1436
1437         if (MLX5_CAP_GEN(mdev, wol_m))
1438                 ret |= WAKE_MCAST;
1439
1440         if (MLX5_CAP_GEN(mdev, wol_u))
1441                 ret |= WAKE_UCAST;
1442
1443         if (MLX5_CAP_GEN(mdev, wol_p))
1444                 ret |= WAKE_PHY;
1445
1446         return ret;
1447 }
1448
1449 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1450 {
1451         __u32 ret = 0;
1452
1453         if (mode & MLX5_WOL_MAGIC)
1454                 ret |= WAKE_MAGIC;
1455
1456         if (mode & MLX5_WOL_SECURED_MAGIC)
1457                 ret |= WAKE_MAGICSECURE;
1458
1459         if (mode & MLX5_WOL_ARP)
1460                 ret |= WAKE_ARP;
1461
1462         if (mode & MLX5_WOL_BROADCAST)
1463                 ret |= WAKE_BCAST;
1464
1465         if (mode & MLX5_WOL_MULTICAST)
1466                 ret |= WAKE_MCAST;
1467
1468         if (mode & MLX5_WOL_UNICAST)
1469                 ret |= WAKE_UCAST;
1470
1471         if (mode & MLX5_WOL_PHY_ACTIVITY)
1472                 ret |= WAKE_PHY;
1473
1474         return ret;
1475 }
1476
1477 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1478 {
1479         u8 ret = 0;
1480
1481         if (mode & WAKE_MAGIC)
1482                 ret |= MLX5_WOL_MAGIC;
1483
1484         if (mode & WAKE_MAGICSECURE)
1485                 ret |= MLX5_WOL_SECURED_MAGIC;
1486
1487         if (mode & WAKE_ARP)
1488                 ret |= MLX5_WOL_ARP;
1489
1490         if (mode & WAKE_BCAST)
1491                 ret |= MLX5_WOL_BROADCAST;
1492
1493         if (mode & WAKE_MCAST)
1494                 ret |= MLX5_WOL_MULTICAST;
1495
1496         if (mode & WAKE_UCAST)
1497                 ret |= MLX5_WOL_UNICAST;
1498
1499         if (mode & WAKE_PHY)
1500                 ret |= MLX5_WOL_PHY_ACTIVITY;
1501
1502         return ret;
1503 }
1504
1505 static void mlx5e_get_wol(struct net_device *netdev,
1506                           struct ethtool_wolinfo *wol)
1507 {
1508         struct mlx5e_priv *priv = netdev_priv(netdev);
1509         struct mlx5_core_dev *mdev = priv->mdev;
1510         u8 mlx5_wol_mode;
1511         int err;
1512
1513         memset(wol, 0, sizeof(*wol));
1514
1515         wol->supported = mlx5e_get_wol_supported(mdev);
1516         if (!wol->supported)
1517                 return;
1518
1519         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1520         if (err)
1521                 return;
1522
1523         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1524 }
1525
1526 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1527 {
1528         struct mlx5e_priv *priv = netdev_priv(netdev);
1529         struct mlx5_core_dev *mdev = priv->mdev;
1530         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1531         u32 mlx5_wol_mode;
1532
1533         if (!wol_supported)
1534                 return -EOPNOTSUPP;
1535
1536         if (wol->wolopts & ~wol_supported)
1537                 return -EINVAL;
1538
1539         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1540
1541         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1542 }
1543
1544 static int mlx5e_set_phys_id(struct net_device *dev,
1545                              enum ethtool_phys_id_state state)
1546 {
1547         struct mlx5e_priv *priv = netdev_priv(dev);
1548         struct mlx5_core_dev *mdev = priv->mdev;
1549         u16 beacon_duration;
1550
1551         if (!MLX5_CAP_GEN(mdev, beacon_led))
1552                 return -EOPNOTSUPP;
1553
1554         switch (state) {
1555         case ETHTOOL_ID_ACTIVE:
1556                 beacon_duration = MLX5_BEACON_DURATION_INF;
1557                 break;
1558         case ETHTOOL_ID_INACTIVE:
1559                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1560                 break;
1561         default:
1562                 return -EOPNOTSUPP;
1563         }
1564
1565         return mlx5_set_port_beacon(mdev, beacon_duration);
1566 }
1567
1568 static int mlx5e_get_module_info(struct net_device *netdev,
1569                                  struct ethtool_modinfo *modinfo)
1570 {
1571         struct mlx5e_priv *priv = netdev_priv(netdev);
1572         struct mlx5_core_dev *dev = priv->mdev;
1573         int size_read = 0;
1574         u8 data[4];
1575
1576         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1577         if (size_read < 2)
1578                 return -EIO;
1579
1580         /* data[0] = identifier byte */
1581         switch (data[0]) {
1582         case MLX5_MODULE_ID_QSFP:
1583                 modinfo->type       = ETH_MODULE_SFF_8436;
1584                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1585                 break;
1586         case MLX5_MODULE_ID_QSFP_PLUS:
1587         case MLX5_MODULE_ID_QSFP28:
1588                 /* data[1] = revision id */
1589                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1590                         modinfo->type       = ETH_MODULE_SFF_8636;
1591                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1592                 } else {
1593                         modinfo->type       = ETH_MODULE_SFF_8436;
1594                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1595                 }
1596                 break;
1597         case MLX5_MODULE_ID_SFP:
1598                 modinfo->type       = ETH_MODULE_SFF_8472;
1599                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1600                 break;
1601         default:
1602                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1603                            __func__, data[0]);
1604                 return -EINVAL;
1605         }
1606
1607         return 0;
1608 }
1609
1610 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1611                                    struct ethtool_eeprom *ee,
1612                                    u8 *data)
1613 {
1614         struct mlx5e_priv *priv = netdev_priv(netdev);
1615         struct mlx5_core_dev *mdev = priv->mdev;
1616         int offset = ee->offset;
1617         int size_read;
1618         int i = 0;
1619
1620         if (!ee->len)
1621                 return -EINVAL;
1622
1623         memset(data, 0, ee->len);
1624
1625         while (i < ee->len) {
1626                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1627                                                      data + i);
1628
1629                 if (!size_read)
1630                         /* Done reading */
1631                         return 0;
1632
1633                 if (size_read < 0) {
1634                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1635                                    __func__, size_read);
1636                         return 0;
1637                 }
1638
1639                 i += size_read;
1640                 offset += size_read;
1641         }
1642
1643         return 0;
1644 }
1645
1646 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1647
1648 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1649 {
1650         struct mlx5e_priv *priv = netdev_priv(netdev);
1651         struct mlx5_core_dev *mdev = priv->mdev;
1652         struct mlx5e_channels new_channels = {};
1653         bool rx_mode_changed;
1654         u8 rx_cq_period_mode;
1655         int err = 0;
1656
1657         rx_cq_period_mode = enable ?
1658                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1659                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1660         rx_mode_changed = rx_cq_period_mode != priv->channels.params.rx_cq_period_mode;
1661
1662         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1663             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1664                 return -EOPNOTSUPP;
1665
1666         if (!rx_mode_changed)
1667                 return 0;
1668
1669         new_channels.params = priv->channels.params;
1670         mlx5e_set_rx_cq_mode_params(&new_channels.params, rx_cq_period_mode);
1671
1672         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1673                 priv->channels.params = new_channels.params;
1674                 return 0;
1675         }
1676
1677         err = mlx5e_open_channels(priv, &new_channels);
1678         if (err)
1679                 return err;
1680
1681         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1682         return 0;
1683 }
1684
1685 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1686 {
1687         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1688         struct mlx5e_channels new_channels = {};
1689         int err = 0;
1690
1691         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1692                 return new_val ? -EOPNOTSUPP : 0;
1693
1694         if (curr_val == new_val)
1695                 return 0;
1696
1697         new_channels.params = priv->channels.params;
1698         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1699
1700         mlx5e_set_rq_type_params(priv->mdev, &new_channels.params,
1701                                  new_channels.params.rq_wq_type);
1702
1703         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1704                 priv->channels.params = new_channels.params;
1705                 return 0;
1706         }
1707
1708         err = mlx5e_open_channels(priv, &new_channels);
1709         if (err)
1710                 return err;
1711
1712         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1713         return 0;
1714 }
1715
1716 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1717                                      bool enable)
1718 {
1719         struct mlx5e_priv *priv = netdev_priv(netdev);
1720         struct mlx5_core_dev *mdev = priv->mdev;
1721
1722         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1723                 return -EOPNOTSUPP;
1724
1725         if (enable && priv->tstamp.hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
1726                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1727                 return -EINVAL;
1728         }
1729
1730         mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1731         priv->channels.params.rx_cqe_compress_def = enable;
1732
1733         return 0;
1734 }
1735
1736 static int mlx5e_handle_pflag(struct net_device *netdev,
1737                               u32 wanted_flags,
1738                               enum mlx5e_priv_flag flag,
1739                               mlx5e_pflag_handler pflag_handler)
1740 {
1741         struct mlx5e_priv *priv = netdev_priv(netdev);
1742         bool enable = !!(wanted_flags & flag);
1743         u32 changes = wanted_flags ^ priv->channels.params.pflags;
1744         int err;
1745
1746         if (!(changes & flag))
1747                 return 0;
1748
1749         err = pflag_handler(netdev, enable);
1750         if (err) {
1751                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1752                            enable ? "Enable" : "Disable", flag, err);
1753                 return err;
1754         }
1755
1756         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1757         return 0;
1758 }
1759
1760 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1761 {
1762         struct mlx5e_priv *priv = netdev_priv(netdev);
1763         int err;
1764
1765         mutex_lock(&priv->state_lock);
1766         err = mlx5e_handle_pflag(netdev, pflags,
1767                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1768                                  set_pflag_rx_cqe_based_moder);
1769         if (err)
1770                 goto out;
1771
1772         err = mlx5e_handle_pflag(netdev, pflags,
1773                                  MLX5E_PFLAG_RX_CQE_COMPRESS,
1774                                  set_pflag_rx_cqe_compress);
1775
1776 out:
1777         mutex_unlock(&priv->state_lock);
1778         return err;
1779 }
1780
1781 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1782 {
1783         struct mlx5e_priv *priv = netdev_priv(netdev);
1784
1785         return priv->channels.params.pflags;
1786 }
1787
1788 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1789 {
1790         int err = 0;
1791         struct mlx5e_priv *priv = netdev_priv(dev);
1792
1793         switch (cmd->cmd) {
1794         case ETHTOOL_SRXCLSRLINS:
1795                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1796                 break;
1797         case ETHTOOL_SRXCLSRLDEL:
1798                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1799                 break;
1800         default:
1801                 err = -EOPNOTSUPP;
1802                 break;
1803         }
1804
1805         return err;
1806 }
1807
1808 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1809                                struct ethtool_flash *flash)
1810 {
1811         struct mlx5_core_dev *mdev = priv->mdev;
1812         struct net_device *dev = priv->netdev;
1813         const struct firmware *fw;
1814         int err;
1815
1816         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1817                 return -EOPNOTSUPP;
1818
1819         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1820         if (err)
1821                 return err;
1822
1823         dev_hold(dev);
1824         rtnl_unlock();
1825
1826         err = mlx5_firmware_flash(mdev, fw);
1827         release_firmware(fw);
1828
1829         rtnl_lock();
1830         dev_put(dev);
1831         return err;
1832 }
1833
1834 static int mlx5e_flash_device(struct net_device *dev,
1835                               struct ethtool_flash *flash)
1836 {
1837         struct mlx5e_priv *priv = netdev_priv(dev);
1838
1839         return mlx5e_ethtool_flash_device(priv, flash);
1840 }
1841
1842 const struct ethtool_ops mlx5e_ethtool_ops = {
1843         .get_drvinfo       = mlx5e_get_drvinfo,
1844         .get_link          = ethtool_op_get_link,
1845         .get_strings       = mlx5e_get_strings,
1846         .get_sset_count    = mlx5e_get_sset_count,
1847         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1848         .get_ringparam     = mlx5e_get_ringparam,
1849         .set_ringparam     = mlx5e_set_ringparam,
1850         .get_channels      = mlx5e_get_channels,
1851         .set_channels      = mlx5e_set_channels,
1852         .get_coalesce      = mlx5e_get_coalesce,
1853         .set_coalesce      = mlx5e_set_coalesce,
1854         .get_link_ksettings  = mlx5e_get_link_ksettings,
1855         .set_link_ksettings  = mlx5e_set_link_ksettings,
1856         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1857         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1858         .get_rxfh          = mlx5e_get_rxfh,
1859         .set_rxfh          = mlx5e_set_rxfh,
1860         .get_rxnfc         = mlx5e_get_rxnfc,
1861         .set_rxnfc         = mlx5e_set_rxnfc,
1862         .flash_device      = mlx5e_flash_device,
1863         .get_tunable       = mlx5e_get_tunable,
1864         .set_tunable       = mlx5e_set_tunable,
1865         .get_pauseparam    = mlx5e_get_pauseparam,
1866         .set_pauseparam    = mlx5e_set_pauseparam,
1867         .get_ts_info       = mlx5e_get_ts_info,
1868         .set_phys_id       = mlx5e_set_phys_id,
1869         .get_wol           = mlx5e_get_wol,
1870         .set_wol           = mlx5e_set_wol,
1871         .get_module_info   = mlx5e_get_module_info,
1872         .get_module_eeprom = mlx5e_get_module_eeprom,
1873         .get_priv_flags    = mlx5e_get_priv_flags,
1874         .set_priv_flags    = mlx5e_set_priv_flags,
1875         .self_test         = mlx5e_self_test,
1876 };