2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/mlx5/fs.h>
37 #define IB_DEFAULT_Q_KEY 0xb1b
39 static int mlx5i_open(struct net_device *netdev);
40 static int mlx5i_close(struct net_device *netdev);
41 static int mlx5i_dev_init(struct net_device *dev);
42 static void mlx5i_dev_cleanup(struct net_device *dev);
44 static const struct net_device_ops mlx5i_netdev_ops = {
45 .ndo_open = mlx5i_open,
46 .ndo_stop = mlx5i_close,
47 .ndo_init = mlx5i_dev_init,
48 .ndo_uninit = mlx5i_dev_cleanup,
51 /* IPoIB mlx5 netdev profile */
53 /* Called directly after IPoIB netdevice was created to initialize SW structs */
54 static void mlx5i_init(struct mlx5_core_dev *mdev,
55 struct net_device *netdev,
56 const struct mlx5e_profile *profile,
59 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
62 priv->netdev = netdev;
63 priv->profile = profile;
66 mlx5e_build_nic_params(mdev, &priv->channels.params, profile->max_nch(mdev));
68 mutex_init(&priv->state_lock);
70 netdev->hw_features |= NETIF_F_SG;
71 netdev->hw_features |= NETIF_F_IP_CSUM;
72 netdev->hw_features |= NETIF_F_IPV6_CSUM;
73 netdev->hw_features |= NETIF_F_GRO;
74 netdev->hw_features |= NETIF_F_TSO;
75 netdev->hw_features |= NETIF_F_TSO6;
76 netdev->hw_features |= NETIF_F_RXCSUM;
77 netdev->hw_features |= NETIF_F_RXHASH;
79 netdev->netdev_ops = &mlx5i_netdev_ops;
82 /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */
83 static void mlx5i_cleanup(struct mlx5e_priv *priv)
88 #define MLX5_QP_ENHANCED_ULP_STATELESS_MODE 2
90 static int mlx5i_create_underlay_qp(struct mlx5_core_dev *mdev, struct mlx5_core_qp *qp)
92 struct mlx5_qp_context *context = NULL;
99 inlen = MLX5_ST_SZ_BYTES(create_qp_in);
100 in = mlx5_vzalloc(inlen);
104 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
105 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_UD);
106 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
107 MLX5_SET(qpc, qpc, ulp_stateless_offload_mode,
108 MLX5_QP_ENHANCED_ULP_STATELESS_MODE);
110 addr_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);
111 MLX5_SET(ads, addr_path, port, 1);
112 MLX5_SET(ads, addr_path, grh, 1);
114 ret = mlx5_core_create_qp(mdev, qp, in, inlen);
116 mlx5_core_err(mdev, "Failed creating IPoIB QP err : %d\n", ret);
121 context = kzalloc(sizeof(*context), GFP_KERNEL);
127 context->flags = cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
128 context->pri_path.port = 1;
129 context->qkey = cpu_to_be32(IB_DEFAULT_Q_KEY);
131 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_RST2INIT_QP, 0, context, qp);
133 mlx5_core_err(mdev, "Failed to modify qp RST2INIT, err: %d\n", ret);
136 memset(context, 0, sizeof(*context));
138 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_INIT2RTR_QP, 0, context, qp);
140 mlx5_core_err(mdev, "Failed to modify qp INIT2RTR, err: %d\n", ret);
144 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_RTR2RTS_QP, 0, context, qp);
146 mlx5_core_err(mdev, "Failed to modify qp RTR2RTS, err: %d\n", ret);
156 static void mlx5i_destroy_underlay_qp(struct mlx5_core_dev *mdev, struct mlx5_core_qp *qp)
158 mlx5_core_destroy_qp(mdev, qp);
161 static int mlx5i_init_tx(struct mlx5e_priv *priv)
163 struct mlx5i_priv *ipriv = priv->ppriv;
166 err = mlx5i_create_underlay_qp(priv->mdev, &ipriv->qp);
168 mlx5_core_warn(priv->mdev, "create underlay QP failed, %d\n", err);
172 err = mlx5e_create_tis(priv->mdev, 0 /* tc */, ipriv->qp.qpn, &priv->tisn[0]);
174 mlx5_core_warn(priv->mdev, "create tis failed, %d\n", err);
181 static void mlx5i_cleanup_tx(struct mlx5e_priv *priv)
183 struct mlx5i_priv *ipriv = priv->ppriv;
185 mlx5e_destroy_tis(priv->mdev, priv->tisn[0]);
186 mlx5i_destroy_underlay_qp(priv->mdev, &ipriv->qp);
189 static int mlx5i_create_flow_steering(struct mlx5e_priv *priv)
191 struct mlx5i_priv *ipriv = priv->ppriv;
194 priv->fs.ns = mlx5_get_flow_namespace(priv->mdev,
195 MLX5_FLOW_NAMESPACE_KERNEL);
200 err = mlx5e_arfs_create_tables(priv);
202 netdev_err(priv->netdev, "Failed to create arfs tables, err=%d\n",
204 priv->netdev->hw_features &= ~NETIF_F_NTUPLE;
207 err = mlx5e_create_ttc_table(priv, ipriv->qp.qpn);
209 netdev_err(priv->netdev, "Failed to create ttc table, err=%d\n",
211 goto err_destroy_arfs_tables;
216 err_destroy_arfs_tables:
217 mlx5e_arfs_destroy_tables(priv);
222 static void mlx5i_destroy_flow_steering(struct mlx5e_priv *priv)
224 mlx5e_destroy_ttc_table(priv);
225 mlx5e_arfs_destroy_tables(priv);
228 static int mlx5i_init_rx(struct mlx5e_priv *priv)
232 err = mlx5e_create_indirect_rqt(priv);
236 err = mlx5e_create_direct_rqts(priv);
238 goto err_destroy_indirect_rqts;
240 err = mlx5e_create_indirect_tirs(priv);
242 goto err_destroy_direct_rqts;
244 err = mlx5e_create_direct_tirs(priv);
246 goto err_destroy_indirect_tirs;
248 err = mlx5i_create_flow_steering(priv);
250 goto err_destroy_direct_tirs;
254 err_destroy_direct_tirs:
255 mlx5e_destroy_direct_tirs(priv);
256 err_destroy_indirect_tirs:
257 mlx5e_destroy_indirect_tirs(priv);
258 err_destroy_direct_rqts:
259 mlx5e_destroy_direct_rqts(priv);
260 err_destroy_indirect_rqts:
261 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
265 static void mlx5i_cleanup_rx(struct mlx5e_priv *priv)
267 mlx5i_destroy_flow_steering(priv);
268 mlx5e_destroy_direct_tirs(priv);
269 mlx5e_destroy_indirect_tirs(priv);
270 mlx5e_destroy_direct_rqts(priv);
271 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
274 static const struct mlx5e_profile mlx5i_nic_profile = {
276 .cleanup = mlx5i_cleanup,
277 .init_tx = mlx5i_init_tx,
278 .cleanup_tx = mlx5i_cleanup_tx,
279 .init_rx = mlx5i_init_rx,
280 .cleanup_rx = mlx5i_cleanup_rx,
281 .enable = NULL, /* mlx5i_enable */
282 .disable = NULL, /* mlx5i_disable */
283 .update_stats = NULL, /* mlx5i_update_stats */
284 .max_nch = mlx5e_get_max_num_channels,
285 .rx_handlers.handle_rx_cqe = mlx5i_handle_rx_cqe,
286 .rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */
287 .max_tc = MLX5I_MAX_NUM_TC,
290 /* mlx5i netdev NDos */
292 static int mlx5i_dev_init(struct net_device *dev)
294 struct mlx5e_priv *priv = mlx5i_epriv(dev);
295 struct mlx5i_priv *ipriv = priv->ppriv;
297 /* Set dev address using underlay QP */
298 dev->dev_addr[1] = (ipriv->qp.qpn >> 16) & 0xff;
299 dev->dev_addr[2] = (ipriv->qp.qpn >> 8) & 0xff;
300 dev->dev_addr[3] = (ipriv->qp.qpn) & 0xff;
305 static void mlx5i_dev_cleanup(struct net_device *dev)
307 struct mlx5e_priv *priv = mlx5i_epriv(dev);
308 struct mlx5_core_dev *mdev = priv->mdev;
309 struct mlx5i_priv *ipriv = priv->ppriv;
310 struct mlx5_qp_context context;
312 /* detach qp from flow-steering by reset it */
313 mlx5_core_qp_modify(mdev, MLX5_CMD_OP_2RST_QP, 0, &context, &ipriv->qp);
316 static int mlx5i_open(struct net_device *netdev)
318 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
321 mutex_lock(&priv->state_lock);
323 set_bit(MLX5E_STATE_OPENED, &priv->state);
325 err = mlx5e_open_channels(priv, &priv->channels);
327 goto err_clear_state_opened_flag;
329 mlx5e_refresh_tirs(priv, false);
330 mlx5e_activate_priv_channels(priv);
331 mutex_unlock(&priv->state_lock);
334 err_clear_state_opened_flag:
335 clear_bit(MLX5E_STATE_OPENED, &priv->state);
336 mutex_unlock(&priv->state_lock);
340 static int mlx5i_close(struct net_device *netdev)
342 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
344 /* May already be CLOSED in case a previous configuration operation
345 * (e.g RX/TX queue size change) that involves close&open failed.
347 mutex_lock(&priv->state_lock);
349 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
352 clear_bit(MLX5E_STATE_OPENED, &priv->state);
354 netif_carrier_off(priv->netdev);
355 mlx5e_deactivate_priv_channels(priv);
356 mlx5e_close_channels(&priv->channels);
358 mutex_unlock(&priv->state_lock);
363 /* IPoIB RDMA netdev callbacks */
364 static int mlx5i_attach_mcast(struct net_device *netdev, struct ib_device *hca,
365 union ib_gid *gid, u16 lid, int set_qkey)
367 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
368 struct mlx5_core_dev *mdev = epriv->mdev;
369 struct mlx5i_priv *ipriv = epriv->ppriv;
372 mlx5_core_dbg(mdev, "attaching QPN 0x%x, MGID %pI6\n", ipriv->qp.qpn, gid->raw);
373 err = mlx5_core_attach_mcg(mdev, gid, ipriv->qp.qpn);
375 mlx5_core_warn(mdev, "failed attaching QPN 0x%x, MGID %pI6\n",
376 ipriv->qp.qpn, gid->raw);
381 static int mlx5i_detach_mcast(struct net_device *netdev, struct ib_device *hca,
382 union ib_gid *gid, u16 lid)
384 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
385 struct mlx5_core_dev *mdev = epriv->mdev;
386 struct mlx5i_priv *ipriv = epriv->ppriv;
389 mlx5_core_dbg(mdev, "detaching QPN 0x%x, MGID %pI6\n", ipriv->qp.qpn, gid->raw);
391 err = mlx5_core_detach_mcg(mdev, gid, ipriv->qp.qpn);
393 mlx5_core_dbg(mdev, "failed dettaching QPN 0x%x, MGID %pI6\n",
394 ipriv->qp.qpn, gid->raw);
399 static int mlx5i_xmit(struct net_device *dev, struct sk_buff *skb,
400 struct ib_ah *address, u32 dqpn, u32 dqkey)
402 struct mlx5e_priv *epriv = mlx5i_epriv(dev);
403 struct mlx5e_txqsq *sq = epriv->txq2sq[skb_get_queue_mapping(skb)];
404 struct mlx5_ib_ah *mah = to_mah(address);
406 return mlx5i_sq_xmit(sq, skb, &mah->av, dqpn, dqkey);
410 static int mlx5i_check_required_hca_cap(struct mlx5_core_dev *mdev)
412 if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
415 if (!MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads)) {
416 mlx5_core_warn(mdev, "IPoIB enhanced offloads are not supported\n");
423 static struct net_device *mlx5_rdma_netdev_alloc(struct mlx5_core_dev *mdev,
424 struct ib_device *ibdev,
426 void (*setup)(struct net_device *))
428 const struct mlx5e_profile *profile = &mlx5i_nic_profile;
429 int nch = profile->max_nch(mdev);
430 struct net_device *netdev;
431 struct mlx5i_priv *ipriv;
432 struct mlx5e_priv *epriv;
435 if (mlx5i_check_required_hca_cap(mdev)) {
436 mlx5_core_warn(mdev, "Accelerated mode is not supported\n");
437 return ERR_PTR(-EOPNOTSUPP);
440 /* This function should only be called once per mdev */
441 err = mlx5e_create_mdev_resources(mdev);
445 netdev = alloc_netdev_mqs(sizeof(struct mlx5i_priv) + sizeof(struct mlx5e_priv),
446 name, NET_NAME_UNKNOWN,
448 nch * MLX5E_MAX_NUM_TC,
451 mlx5_core_warn(mdev, "alloc_netdev_mqs failed\n");
452 goto free_mdev_resources;
455 ipriv = netdev_priv(netdev);
456 epriv = mlx5i_epriv(netdev);
458 epriv->wq = create_singlethread_workqueue("mlx5i");
460 goto err_free_netdev;
462 profile->init(mdev, netdev, profile, ipriv);
464 mlx5e_attach_netdev(epriv);
465 netif_carrier_off(netdev);
467 /* TODO: set rdma_netdev func pointers
470 * rn->send = mlx5i_xmit;
471 * rn->attach_mcast = mlx5i_attach_mcast;
472 * rn->detach_mcast = mlx5i_detach_mcast;
479 mlx5e_destroy_mdev_resources(mdev);
483 EXPORT_SYMBOL(mlx5_rdma_netdev_alloc);
485 static void mlx5_rdma_netdev_free(struct net_device *netdev)
487 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
488 const struct mlx5e_profile *profile = priv->profile;
490 mlx5e_detach_netdev(priv);
491 profile->cleanup(priv);
492 destroy_workqueue(priv->wq);
495 mlx5e_destroy_mdev_resources(priv->mdev);
497 EXPORT_SYMBOL(mlx5_rdma_netdev_free);