2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include "mlx5_core.h"
39 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod,
40 u16 vport, u32 *out, int outlen)
42 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {0};
44 MLX5_SET(query_vport_state_in, in, opcode,
45 MLX5_CMD_OP_QUERY_VPORT_STATE);
46 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
47 MLX5_SET(query_vport_state_in, in, vport_number, vport);
49 MLX5_SET(query_vport_state_in, in, other_vport, 1);
51 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
54 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
56 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
58 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
60 return MLX5_GET(query_vport_state_out, out, state);
62 EXPORT_SYMBOL_GPL(mlx5_query_vport_state);
64 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
66 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
68 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
70 return MLX5_GET(query_vport_state_out, out, admin_state);
72 EXPORT_SYMBOL_GPL(mlx5_query_vport_admin_state);
74 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
77 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {0};
78 u32 out[MLX5_ST_SZ_DW(modify_vport_state_out)] = {0};
80 MLX5_SET(modify_vport_state_in, in, opcode,
81 MLX5_CMD_OP_MODIFY_VPORT_STATE);
82 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
83 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
85 MLX5_SET(modify_vport_state_in, in, other_vport, 1);
86 MLX5_SET(modify_vport_state_in, in, admin_state, state);
88 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
90 EXPORT_SYMBOL_GPL(mlx5_modify_vport_admin_state);
92 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
95 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
97 MLX5_SET(query_nic_vport_context_in, in, opcode,
98 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
99 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
101 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
103 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
106 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
109 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
111 MLX5_SET(modify_nic_vport_context_in, in, opcode,
112 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
113 return mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out));
116 int mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,
117 u16 vport, u8 *min_inline)
119 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {0};
122 err = mlx5_query_nic_vport_context(mdev, vport, out, sizeof(out));
124 *min_inline = MLX5_GET(query_nic_vport_context_out, out,
125 nic_vport_context.min_wqe_inline_mode);
128 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_min_inline);
130 void mlx5_query_min_inline(struct mlx5_core_dev *mdev,
133 switch (MLX5_CAP_ETH(mdev, wqe_inline_mode)) {
134 case MLX5_CAP_INLINE_MODE_L2:
135 *min_inline_mode = MLX5_INLINE_MODE_L2;
137 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
138 mlx5_query_nic_vport_min_inline(mdev, 0, min_inline_mode);
140 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
141 *min_inline_mode = MLX5_INLINE_MODE_NONE;
145 EXPORT_SYMBOL_GPL(mlx5_query_min_inline);
147 int mlx5_modify_nic_vport_min_inline(struct mlx5_core_dev *mdev,
148 u16 vport, u8 min_inline)
150 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
151 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
154 MLX5_SET(modify_nic_vport_context_in, in,
155 field_select.min_inline, 1);
156 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
157 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
159 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
160 in, nic_vport_context);
161 MLX5_SET(nic_vport_context, nic_vport_ctx,
162 min_wqe_inline_mode, min_inline);
164 return mlx5_modify_nic_vport_context(mdev, in, inlen);
167 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
171 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
175 out = mlx5_vzalloc(outlen);
179 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
180 nic_vport_context.permanent_address);
182 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
184 ether_addr_copy(addr, &out_addr[2]);
189 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
191 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
195 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
200 in = mlx5_vzalloc(inlen);
202 mlx5_core_warn(mdev, "failed to allocate inbox\n");
206 MLX5_SET(modify_nic_vport_context_in, in,
207 field_select.permanent_address, 1);
208 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
211 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
213 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
214 in, nic_vport_context);
215 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
218 ether_addr_copy(&perm_mac[2], addr);
220 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
226 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
228 int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)
230 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
234 out = mlx5_vzalloc(outlen);
238 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
240 *mtu = MLX5_GET(query_nic_vport_context_out, out,
241 nic_vport_context.mtu);
246 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
248 int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
250 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
254 in = mlx5_vzalloc(inlen);
258 MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
259 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
261 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
266 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
268 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
270 enum mlx5_list_type list_type,
271 u8 addr_list[][ETH_ALEN],
274 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
283 req_list_size = *list_size;
285 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
286 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
287 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
289 if (req_list_size > max_list_size) {
290 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
291 req_list_size, max_list_size);
292 req_list_size = max_list_size;
295 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
296 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
298 out = kzalloc(out_sz, GFP_KERNEL);
302 MLX5_SET(query_nic_vport_context_in, in, opcode,
303 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
304 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
305 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
308 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
310 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
314 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
316 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
319 *list_size = req_list_size;
320 for (i = 0; i < req_list_size; i++) {
321 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
323 current_uc_mac_address[i]) + 2;
324 ether_addr_copy(addr_list[i], mac_addr);
330 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
332 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
333 enum mlx5_list_type list_type,
334 u8 addr_list[][ETH_ALEN],
337 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
345 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
346 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
347 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
349 if (list_size > max_list_size)
352 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
353 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
355 memset(out, 0, sizeof(out));
356 in = kzalloc(in_sz, GFP_KERNEL);
360 MLX5_SET(modify_nic_vport_context_in, in, opcode,
361 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
362 MLX5_SET(modify_nic_vport_context_in, in,
363 field_select.addresses_list, 1);
365 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
368 MLX5_SET(nic_vport_context, nic_vport_ctx,
369 allowed_list_type, list_type);
370 MLX5_SET(nic_vport_context, nic_vport_ctx,
371 allowed_list_size, list_size);
373 for (i = 0; i < list_size; i++) {
374 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
376 current_uc_mac_address[i]) + 2;
377 ether_addr_copy(curr_mac, addr_list[i]);
380 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
384 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
386 int mlx5_query_nic_vport_vlans(struct mlx5_core_dev *dev,
391 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)];
400 req_list_size = *size;
401 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
402 if (req_list_size > max_list_size) {
403 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max list size\n",
404 req_list_size, max_list_size);
405 req_list_size = max_list_size;
408 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
409 req_list_size * MLX5_ST_SZ_BYTES(vlan_layout);
411 memset(in, 0, sizeof(in));
412 out = kzalloc(out_sz, GFP_KERNEL);
416 MLX5_SET(query_nic_vport_context_in, in, opcode,
417 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
418 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type,
419 MLX5_NVPRT_LIST_TYPE_VLAN);
420 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
423 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
425 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
429 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
431 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
434 *size = req_list_size;
435 for (i = 0; i < req_list_size; i++) {
436 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
438 current_uc_mac_address[i]);
439 vlans[i] = MLX5_GET(vlan_layout, vlan_addr, vlan);
445 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_vlans);
447 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
451 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
459 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
461 if (list_size > max_list_size)
464 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
465 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
467 memset(out, 0, sizeof(out));
468 in = kzalloc(in_sz, GFP_KERNEL);
472 MLX5_SET(modify_nic_vport_context_in, in, opcode,
473 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
474 MLX5_SET(modify_nic_vport_context_in, in,
475 field_select.addresses_list, 1);
477 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
480 MLX5_SET(nic_vport_context, nic_vport_ctx,
481 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
482 MLX5_SET(nic_vport_context, nic_vport_ctx,
483 allowed_list_size, list_size);
485 for (i = 0; i < list_size; i++) {
486 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
488 current_uc_mac_address[i]);
489 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
492 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
496 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
498 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
499 u64 *system_image_guid)
502 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
504 out = mlx5_vzalloc(outlen);
508 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
510 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
511 nic_vport_context.system_image_guid);
517 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
519 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
522 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
524 out = mlx5_vzalloc(outlen);
528 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
530 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
531 nic_vport_context.node_guid);
537 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
539 int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
540 u32 vport, u64 node_guid)
542 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
543 void *nic_vport_context;
549 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
551 if (!MLX5_CAP_ESW(mdev, nic_vport_node_guid_modify))
554 in = mlx5_vzalloc(inlen);
558 MLX5_SET(modify_nic_vport_context_in, in,
559 field_select.node_guid, 1);
560 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
561 MLX5_SET(modify_nic_vport_context_in, in, other_vport, !!vport);
563 nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
564 in, nic_vport_context);
565 MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
567 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
574 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
578 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
580 out = mlx5_vzalloc(outlen);
584 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
586 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
587 nic_vport_context.qkey_violation_counter);
593 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
595 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
596 u8 port_num, u16 vf_num, u16 gid_index,
599 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
600 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
601 int is_group_manager;
609 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
610 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
611 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
612 vf_num, gid_index, tbsz);
614 if (gid_index > tbsz && gid_index != 0xffff)
617 if (gid_index == 0xffff)
622 out_sz += nout * sizeof(*gid);
624 in = kzalloc(in_sz, GFP_KERNEL);
625 out = kzalloc(out_sz, GFP_KERNEL);
631 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
633 if (is_group_manager) {
634 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
635 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
641 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
643 if (MLX5_CAP_GEN(dev, num_ports) == 2)
644 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
646 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
650 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
651 gid->global.subnet_prefix = tmp->global.subnet_prefix;
652 gid->global.interface_id = tmp->global.interface_id;
659 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
661 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
662 u8 port_num, u16 vf_num, u16 pkey_index,
665 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
666 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
667 int is_group_manager;
676 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
678 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
679 if (pkey_index > tbsz && pkey_index != 0xffff)
682 if (pkey_index == 0xffff)
687 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
689 in = kzalloc(in_sz, GFP_KERNEL);
690 out = kzalloc(out_sz, GFP_KERNEL);
696 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
698 if (is_group_manager) {
699 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
700 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
706 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
708 if (MLX5_CAP_GEN(dev, num_ports) == 2)
709 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
711 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
715 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
716 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
717 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
724 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
726 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
727 u8 other_vport, u8 port_num,
729 struct mlx5_hca_vport_context *rep)
731 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
732 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {0};
733 int is_group_manager;
738 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
740 out = kzalloc(out_sz, GFP_KERNEL);
744 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
747 if (is_group_manager) {
748 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
749 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
756 if (MLX5_CAP_GEN(dev, num_ports) == 2)
757 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
759 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
763 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
764 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
765 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
766 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
767 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
768 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
769 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
770 port_physical_state);
771 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
772 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
773 port_physical_state);
774 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
775 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
776 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
777 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
778 cap_mask1_field_select);
779 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
780 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
781 cap_mask2_field_select);
782 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
783 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
785 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
786 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
788 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
789 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
790 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
791 qkey_violation_counter);
792 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
793 pkey_violation_counter);
794 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
795 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
802 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
804 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
807 struct mlx5_hca_vport_context *rep;
810 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
814 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
816 *sys_image_guid = rep->sys_image_guid;
821 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
823 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
826 struct mlx5_hca_vport_context *rep;
829 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
833 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
835 *node_guid = rep->node_guid;
840 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
842 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
849 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
852 out = kzalloc(outlen, GFP_KERNEL);
856 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
860 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
861 nic_vport_context.promisc_uc);
862 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
863 nic_vport_context.promisc_mc);
864 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
865 nic_vport_context.promisc_all);
871 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
873 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
879 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
882 in = mlx5_vzalloc(inlen);
884 mlx5_core_err(mdev, "failed to allocate inbox\n");
888 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
889 MLX5_SET(modify_nic_vport_context_in, in,
890 nic_vport_context.promisc_uc, promisc_uc);
891 MLX5_SET(modify_nic_vport_context_in, in,
892 nic_vport_context.promisc_mc, promisc_mc);
893 MLX5_SET(modify_nic_vport_context_in, in,
894 nic_vport_context.promisc_all, promisc_all);
896 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
902 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
904 enum mlx5_vport_roce_state {
905 MLX5_VPORT_ROCE_DISABLED = 0,
906 MLX5_VPORT_ROCE_ENABLED = 1,
909 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
910 enum mlx5_vport_roce_state state)
913 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
916 in = mlx5_vzalloc(inlen);
918 mlx5_core_warn(mdev, "failed to allocate inbox\n");
922 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
923 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
926 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
933 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
935 return mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
937 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
939 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
941 return mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
943 EXPORT_SYMBOL_GPL(mlx5_nic_vport_disable_roce);
945 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
946 int vf, u8 port_num, void *out,
949 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
950 int is_group_manager;
954 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
955 in = mlx5_vzalloc(in_sz);
961 MLX5_SET(query_vport_counter_in, in, opcode,
962 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
964 if (is_group_manager) {
965 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
966 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
972 if (MLX5_CAP_GEN(dev, num_ports) == 2)
973 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
975 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
980 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
982 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
983 u8 other_vport, u8 port_num,
985 struct mlx5_hca_vport_context *req)
987 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
988 u8 out[MLX5_ST_SZ_BYTES(modify_hca_vport_context_out)];
989 int is_group_manager;
994 mlx5_core_dbg(dev, "vf %d\n", vf);
995 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
996 in = kzalloc(in_sz, GFP_KERNEL);
1000 memset(out, 0, sizeof(out));
1001 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
1003 if (is_group_manager) {
1004 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
1005 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
1012 if (MLX5_CAP_GEN(dev, num_ports) > 1)
1013 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
1015 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
1016 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
1017 MLX5_SET(hca_vport_context, ctx, sm_virt_aware, req->sm_virt_aware);
1018 MLX5_SET(hca_vport_context, ctx, has_smi, req->has_smi);
1019 MLX5_SET(hca_vport_context, ctx, has_raw, req->has_raw);
1020 MLX5_SET(hca_vport_context, ctx, vport_state_policy, req->policy);
1021 MLX5_SET(hca_vport_context, ctx, port_physical_state, req->phys_state);
1022 MLX5_SET(hca_vport_context, ctx, vport_state, req->vport_state);
1023 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
1024 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
1025 MLX5_SET(hca_vport_context, ctx, cap_mask1, req->cap_mask1);
1026 MLX5_SET(hca_vport_context, ctx, cap_mask1_field_select, req->cap_mask1_perm);
1027 MLX5_SET(hca_vport_context, ctx, cap_mask2, req->cap_mask2);
1028 MLX5_SET(hca_vport_context, ctx, cap_mask2_field_select, req->cap_mask2_perm);
1029 MLX5_SET(hca_vport_context, ctx, lid, req->lid);
1030 MLX5_SET(hca_vport_context, ctx, init_type_reply, req->init_type_reply);
1031 MLX5_SET(hca_vport_context, ctx, lmc, req->lmc);
1032 MLX5_SET(hca_vport_context, ctx, subnet_timeout, req->subnet_timeout);
1033 MLX5_SET(hca_vport_context, ctx, sm_lid, req->sm_lid);
1034 MLX5_SET(hca_vport_context, ctx, sm_sl, req->sm_sl);
1035 MLX5_SET(hca_vport_context, ctx, qkey_violation_counter, req->qkey_violation_counter);
1036 MLX5_SET(hca_vport_context, ctx, pkey_violation_counter, req->pkey_violation_counter);
1037 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
1042 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);