2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include "mlx5_core.h"
39 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod,
40 u16 vport, u32 *out, int outlen)
42 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {0};
44 MLX5_SET(query_vport_state_in, in, opcode,
45 MLX5_CMD_OP_QUERY_VPORT_STATE);
46 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
47 MLX5_SET(query_vport_state_in, in, vport_number, vport);
49 MLX5_SET(query_vport_state_in, in, other_vport, 1);
51 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
54 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
56 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
58 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
60 return MLX5_GET(query_vport_state_out, out, state);
62 EXPORT_SYMBOL_GPL(mlx5_query_vport_state);
64 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
66 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
68 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
70 return MLX5_GET(query_vport_state_out, out, admin_state);
72 EXPORT_SYMBOL_GPL(mlx5_query_vport_admin_state);
74 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
77 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {0};
78 u32 out[MLX5_ST_SZ_DW(modify_vport_state_out)] = {0};
80 MLX5_SET(modify_vport_state_in, in, opcode,
81 MLX5_CMD_OP_MODIFY_VPORT_STATE);
82 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
83 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
85 MLX5_SET(modify_vport_state_in, in, other_vport, 1);
86 MLX5_SET(modify_vport_state_in, in, admin_state, state);
88 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
90 EXPORT_SYMBOL_GPL(mlx5_modify_vport_admin_state);
92 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
95 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
97 MLX5_SET(query_nic_vport_context_in, in, opcode,
98 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
99 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
101 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
103 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
106 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
109 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
111 MLX5_SET(modify_nic_vport_context_in, in, opcode,
112 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
113 return mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out));
116 void mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,
119 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {0};
121 mlx5_query_nic_vport_context(mdev, 0, out, sizeof(out));
123 *min_inline_mode = MLX5_GET(query_nic_vport_context_out, out,
124 nic_vport_context.min_wqe_inline_mode);
126 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_min_inline);
128 int mlx5_modify_nic_vport_min_inline(struct mlx5_core_dev *mdev,
129 u16 vport, u8 min_inline)
131 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
132 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
135 MLX5_SET(modify_nic_vport_context_in, in,
136 field_select.min_inline, 1);
137 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
138 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
140 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
141 in, nic_vport_context);
142 MLX5_SET(nic_vport_context, nic_vport_ctx,
143 min_wqe_inline_mode, min_inline);
145 return mlx5_modify_nic_vport_context(mdev, in, inlen);
148 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
152 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
156 out = mlx5_vzalloc(outlen);
160 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
161 nic_vport_context.permanent_address);
163 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
165 ether_addr_copy(addr, &out_addr[2]);
170 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
172 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
176 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
181 in = mlx5_vzalloc(inlen);
183 mlx5_core_warn(mdev, "failed to allocate inbox\n");
187 MLX5_SET(modify_nic_vport_context_in, in,
188 field_select.permanent_address, 1);
189 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
192 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
194 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
195 in, nic_vport_context);
196 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
199 ether_addr_copy(&perm_mac[2], addr);
201 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
207 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
209 int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)
211 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
215 out = mlx5_vzalloc(outlen);
219 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
221 *mtu = MLX5_GET(query_nic_vport_context_out, out,
222 nic_vport_context.mtu);
227 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
229 int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
231 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
235 in = mlx5_vzalloc(inlen);
239 MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
240 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
242 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
247 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
249 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
251 enum mlx5_list_type list_type,
252 u8 addr_list[][ETH_ALEN],
255 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
264 req_list_size = *list_size;
266 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
267 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
268 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
270 if (req_list_size > max_list_size) {
271 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
272 req_list_size, max_list_size);
273 req_list_size = max_list_size;
276 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
277 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
279 out = kzalloc(out_sz, GFP_KERNEL);
283 MLX5_SET(query_nic_vport_context_in, in, opcode,
284 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
285 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
286 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
289 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
291 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
295 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
297 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
300 *list_size = req_list_size;
301 for (i = 0; i < req_list_size; i++) {
302 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
304 current_uc_mac_address[i]) + 2;
305 ether_addr_copy(addr_list[i], mac_addr);
311 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
313 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
314 enum mlx5_list_type list_type,
315 u8 addr_list[][ETH_ALEN],
318 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
326 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
327 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
328 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
330 if (list_size > max_list_size)
333 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
334 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
336 memset(out, 0, sizeof(out));
337 in = kzalloc(in_sz, GFP_KERNEL);
341 MLX5_SET(modify_nic_vport_context_in, in, opcode,
342 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
343 MLX5_SET(modify_nic_vport_context_in, in,
344 field_select.addresses_list, 1);
346 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
349 MLX5_SET(nic_vport_context, nic_vport_ctx,
350 allowed_list_type, list_type);
351 MLX5_SET(nic_vport_context, nic_vport_ctx,
352 allowed_list_size, list_size);
354 for (i = 0; i < list_size; i++) {
355 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
357 current_uc_mac_address[i]) + 2;
358 ether_addr_copy(curr_mac, addr_list[i]);
361 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
365 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
367 int mlx5_query_nic_vport_vlans(struct mlx5_core_dev *dev,
372 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)];
381 req_list_size = *size;
382 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
383 if (req_list_size > max_list_size) {
384 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max list size\n",
385 req_list_size, max_list_size);
386 req_list_size = max_list_size;
389 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
390 req_list_size * MLX5_ST_SZ_BYTES(vlan_layout);
392 memset(in, 0, sizeof(in));
393 out = kzalloc(out_sz, GFP_KERNEL);
397 MLX5_SET(query_nic_vport_context_in, in, opcode,
398 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
399 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type,
400 MLX5_NVPRT_LIST_TYPE_VLAN);
401 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
404 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
406 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
410 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
412 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
415 *size = req_list_size;
416 for (i = 0; i < req_list_size; i++) {
417 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
419 current_uc_mac_address[i]);
420 vlans[i] = MLX5_GET(vlan_layout, vlan_addr, vlan);
426 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_vlans);
428 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
432 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
440 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
442 if (list_size > max_list_size)
445 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
446 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
448 memset(out, 0, sizeof(out));
449 in = kzalloc(in_sz, GFP_KERNEL);
453 MLX5_SET(modify_nic_vport_context_in, in, opcode,
454 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
455 MLX5_SET(modify_nic_vport_context_in, in,
456 field_select.addresses_list, 1);
458 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
461 MLX5_SET(nic_vport_context, nic_vport_ctx,
462 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
463 MLX5_SET(nic_vport_context, nic_vport_ctx,
464 allowed_list_size, list_size);
466 for (i = 0; i < list_size; i++) {
467 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
469 current_uc_mac_address[i]);
470 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
473 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
477 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
479 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
480 u64 *system_image_guid)
483 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
485 out = mlx5_vzalloc(outlen);
489 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
491 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
492 nic_vport_context.system_image_guid);
498 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
500 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
503 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
505 out = mlx5_vzalloc(outlen);
509 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
511 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
512 nic_vport_context.node_guid);
518 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
520 int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
521 u32 vport, u64 node_guid)
523 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
524 void *nic_vport_context;
530 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
532 if (!MLX5_CAP_ESW(mdev, nic_vport_node_guid_modify))
535 in = mlx5_vzalloc(inlen);
539 MLX5_SET(modify_nic_vport_context_in, in,
540 field_select.node_guid, 1);
541 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
542 MLX5_SET(modify_nic_vport_context_in, in, other_vport, !!vport);
544 nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
545 in, nic_vport_context);
546 MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
548 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
555 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
559 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
561 out = mlx5_vzalloc(outlen);
565 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
567 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
568 nic_vport_context.qkey_violation_counter);
574 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
576 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
577 u8 port_num, u16 vf_num, u16 gid_index,
580 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
581 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
582 int is_group_manager;
590 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
591 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
592 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
593 vf_num, gid_index, tbsz);
595 if (gid_index > tbsz && gid_index != 0xffff)
598 if (gid_index == 0xffff)
603 out_sz += nout * sizeof(*gid);
605 in = kzalloc(in_sz, GFP_KERNEL);
606 out = kzalloc(out_sz, GFP_KERNEL);
612 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
614 if (is_group_manager) {
615 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
616 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
622 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
624 if (MLX5_CAP_GEN(dev, num_ports) == 2)
625 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
627 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
631 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
632 gid->global.subnet_prefix = tmp->global.subnet_prefix;
633 gid->global.interface_id = tmp->global.interface_id;
640 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
642 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
643 u8 port_num, u16 vf_num, u16 pkey_index,
646 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
647 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
648 int is_group_manager;
657 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
659 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
660 if (pkey_index > tbsz && pkey_index != 0xffff)
663 if (pkey_index == 0xffff)
668 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
670 in = kzalloc(in_sz, GFP_KERNEL);
671 out = kzalloc(out_sz, GFP_KERNEL);
677 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
679 if (is_group_manager) {
680 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
681 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
687 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
689 if (MLX5_CAP_GEN(dev, num_ports) == 2)
690 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
692 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
696 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
697 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
698 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
705 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
707 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
708 u8 other_vport, u8 port_num,
710 struct mlx5_hca_vport_context *rep)
712 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
713 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {0};
714 int is_group_manager;
719 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
721 out = kzalloc(out_sz, GFP_KERNEL);
725 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
728 if (is_group_manager) {
729 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
730 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
737 if (MLX5_CAP_GEN(dev, num_ports) == 2)
738 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
740 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
744 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
745 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
746 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
747 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
748 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
749 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
750 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
751 port_physical_state);
752 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
753 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
754 port_physical_state);
755 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
756 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
757 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
758 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
759 cap_mask1_field_select);
760 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
761 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
762 cap_mask2_field_select);
763 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
764 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
766 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
767 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
769 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
770 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
771 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
772 qkey_violation_counter);
773 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
774 pkey_violation_counter);
775 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
776 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
783 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
785 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
788 struct mlx5_hca_vport_context *rep;
791 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
795 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
797 *sys_image_guid = rep->sys_image_guid;
802 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
804 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
807 struct mlx5_hca_vport_context *rep;
810 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
814 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
816 *node_guid = rep->node_guid;
821 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
823 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
830 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
833 out = kzalloc(outlen, GFP_KERNEL);
837 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
841 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
842 nic_vport_context.promisc_uc);
843 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
844 nic_vport_context.promisc_mc);
845 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
846 nic_vport_context.promisc_all);
852 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
854 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
860 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
863 in = mlx5_vzalloc(inlen);
865 mlx5_core_err(mdev, "failed to allocate inbox\n");
869 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
870 MLX5_SET(modify_nic_vport_context_in, in,
871 nic_vport_context.promisc_uc, promisc_uc);
872 MLX5_SET(modify_nic_vport_context_in, in,
873 nic_vport_context.promisc_mc, promisc_mc);
874 MLX5_SET(modify_nic_vport_context_in, in,
875 nic_vport_context.promisc_all, promisc_all);
877 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
883 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
885 enum mlx5_vport_roce_state {
886 MLX5_VPORT_ROCE_DISABLED = 0,
887 MLX5_VPORT_ROCE_ENABLED = 1,
890 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
891 enum mlx5_vport_roce_state state)
894 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
897 in = mlx5_vzalloc(inlen);
899 mlx5_core_warn(mdev, "failed to allocate inbox\n");
903 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
904 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
907 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
914 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
916 return mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
918 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
920 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
922 return mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
924 EXPORT_SYMBOL_GPL(mlx5_nic_vport_disable_roce);
926 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
927 int vf, u8 port_num, void *out,
930 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
931 int is_group_manager;
935 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
936 in = mlx5_vzalloc(in_sz);
942 MLX5_SET(query_vport_counter_in, in, opcode,
943 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
945 if (is_group_manager) {
946 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
947 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
953 if (MLX5_CAP_GEN(dev, num_ports) == 2)
954 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
956 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
961 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
963 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
964 u8 other_vport, u8 port_num,
966 struct mlx5_hca_vport_context *req)
968 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
969 u8 out[MLX5_ST_SZ_BYTES(modify_hca_vport_context_out)];
970 int is_group_manager;
975 mlx5_core_dbg(dev, "vf %d\n", vf);
976 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
977 in = kzalloc(in_sz, GFP_KERNEL);
981 memset(out, 0, sizeof(out));
982 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
984 if (is_group_manager) {
985 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
986 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
993 if (MLX5_CAP_GEN(dev, num_ports) > 1)
994 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
996 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
997 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
998 MLX5_SET(hca_vport_context, ctx, sm_virt_aware, req->sm_virt_aware);
999 MLX5_SET(hca_vport_context, ctx, has_smi, req->has_smi);
1000 MLX5_SET(hca_vport_context, ctx, has_raw, req->has_raw);
1001 MLX5_SET(hca_vport_context, ctx, vport_state_policy, req->policy);
1002 MLX5_SET(hca_vport_context, ctx, port_physical_state, req->phys_state);
1003 MLX5_SET(hca_vport_context, ctx, vport_state, req->vport_state);
1004 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
1005 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
1006 MLX5_SET(hca_vport_context, ctx, cap_mask1, req->cap_mask1);
1007 MLX5_SET(hca_vport_context, ctx, cap_mask1_field_select, req->cap_mask1_perm);
1008 MLX5_SET(hca_vport_context, ctx, cap_mask2, req->cap_mask2);
1009 MLX5_SET(hca_vport_context, ctx, cap_mask2_field_select, req->cap_mask2_perm);
1010 MLX5_SET(hca_vport_context, ctx, lid, req->lid);
1011 MLX5_SET(hca_vport_context, ctx, init_type_reply, req->init_type_reply);
1012 MLX5_SET(hca_vport_context, ctx, lmc, req->lmc);
1013 MLX5_SET(hca_vport_context, ctx, subnet_timeout, req->subnet_timeout);
1014 MLX5_SET(hca_vport_context, ctx, sm_lid, req->sm_lid);
1015 MLX5_SET(hca_vport_context, ctx, sm_sl, req->sm_sl);
1016 MLX5_SET(hca_vport_context, ctx, qkey_violation_counter, req->qkey_violation_counter);
1017 MLX5_SET(hca_vport_context, ctx, pkey_violation_counter, req->pkey_violation_counter);
1018 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
1023 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);